imamnurby/smpl_train_seed8 huggingface dataset:
--- initial
+++ final
@@ -1,27 +1,28 @@
 static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx, int lo, int hi, unsigned size, int32_t index) {
+  struct ttm_operation_ctx ctx = {false, false};
   int64_t offset = ((uint64_t)size) * ((int64_t)index);
   struct amdgpu_bo_va_mapping *mapping;
   unsigned i, fpfn, lpfn;
   struct amdgpu_bo *bo;
   uint64_t addr;
   int r;
   addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32;
   if (index >= 0) {
     addr += offset;
     fpfn = PAGE_ALIGN(offset) >> PAGE_SHIFT;
     lpfn = 0x100000000ULL >> PAGE_SHIFT;
   } else {
     fpfn = 0;
     lpfn = (0x100000000ULL - PAGE_ALIGN(offset)) >> PAGE_SHIFT;
   }
   r = amdgpu_cs_find_mapping(p, addr, &bo, &mapping);
   if (r) {
     DRM_ERROR("Can't find BO for addr 0x%010Lx %d %d %d %d\n", addr, lo, hi, size, index);
     return r;
   }
   for (i = 0; i < bo->placement.num_placement; ++i) {
     bo->placements[i].fpfn = max(bo->placements[i].fpfn, fpfn);
     bo->placements[i].lpfn = bo->placements[i].fpfn ? min(bo->placements[i].fpfn, lpfn) : lpfn;
   }
-  return ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+  return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,53 +1,54 @@
 static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, bool direct, struct dma_fence **fence) {
+  struct ttm_operation_ctx ctx = {true, false};
   struct ttm_validate_buffer tv;
   struct ww_acquire_ctx ticket;
   struct list_head head;
   struct amdgpu_job *job;
   struct amdgpu_ib *ib;
   struct dma_fence *f = NULL;
   struct amdgpu_device *adev = ring->adev;
   uint64_t addr;
   int i, r;
   memset(&tv, 0, sizeof(tv));
   tv.bo = &bo->tbo;
   INIT_LIST_HEAD(&head);
   list_add(&tv.head, &head);
   r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
   if (r) return r;
-  r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
+  r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
   if (r) goto err;
   r = amdgpu_job_alloc_with_ib(adev, 64, &job);
   if (r) goto err;
   ib = &job->ibs[0];
   addr = amdgpu_bo_gpu_offset(bo);
   ib->ptr[0] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA0), 0);
   ib->ptr[1] = addr;
   ib->ptr[2] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_DATA1), 0);
   ib->ptr[3] = addr >> 32;
   ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0);
   ib->ptr[5] = 0;
   for (i = 6; i < 16; i += 2) {
     ib->ptr[i] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0);
     ib->ptr[i + 1] = 0;
   }
   ib->length_dw = 16;
   if (direct) {
     r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);
     job->fence = dma_fence_get(f);
     if (r) goto err_free;
     amdgpu_job_free(job);
   } else {
     r = amdgpu_job_submit(job, ring, &adev->vcn.entity_dec, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
     if (r) goto err_free;
   }
   ttm_eu_fence_buffer_objects(&ticket, &head, f);
   if (fence) *fence = dma_fence_get(f);
   amdgpu_bo_unref(&bo);
   dma_fence_put(f);
   return 0;
 err_free:
   amdgpu_job_free(job);
 err:
   ttm_eu_backoff_reservation(&ticket, &head);
   return r;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,15 +1,16 @@
 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = ast_bo_gpu_offset(bo);
   }
   ast_ttm_placement(bo, pl_flag);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   bo->pin_count = 1;
   if (gpu_addr) *gpu_addr = ast_bo_gpu_offset(bo);
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,19 +1,20 @@
 int ast_bo_push_sysram(struct ast_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   if (bo->kmap.virtual) ttm_bo_kunmap(&bo->kmap);
   ast_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) {
     DRM_ERROR("pushing to VRAM failed\n");
     return ret;
   }
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,12 +1,13 @@
 int ast_bo_unpin(struct ast_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
-  return ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  return ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,16 +1,17 @@
 int bochs_bo_pin(struct bochs_bo *bo, u32 pl_flag, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = bochs_bo_gpu_offset(bo);
     return 0;
   }
   bochs_ttm_placement(bo, pl_flag);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   bo->pin_count = 1;
   if (gpu_addr) *gpu_addr = bochs_bo_gpu_offset(bo);
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,14 +1,15 @@
 int bochs_bo_unpin(struct bochs_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,15 +1,16 @@
 int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = cirrus_bo_gpu_offset(bo);
   }
   cirrus_ttm_placement(bo, pl_flag);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   bo->pin_count = 1;
   if (gpu_addr) *gpu_addr = cirrus_bo_gpu_offset(bo);
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,19 +1,20 @@
 int cirrus_bo_push_sysram(struct cirrus_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   if (bo->kmap.virtual) ttm_bo_kunmap(&bo->kmap);
   cirrus_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) {
     DRM_ERROR("pushing to VRAM failed\n");
     return ret;
   }
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,16 +1,17 @@
 int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = bo->bo.offset;
     return 0;
   }
   hibmc_ttm_placement(bo, pl_flag);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   bo->pin_count = 1;
   if (gpu_addr) *gpu_addr = bo->bo.offset;
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,17 +1,18 @@
 int hibmc_bo_unpin(struct hibmc_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) {
     DRM_ERROR("validate failed for unpin: %d\n", ret);
     return ret;
   }
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,16 +1,17 @@
 int mgag200_bo_pin(struct mgag200_bo *bo, u32 pl_flag, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = mgag200_bo_gpu_offset(bo);
     return 0;
   }
   mgag200_ttm_placement(bo, pl_flag);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) return ret;
   bo->pin_count = 1;
   if (gpu_addr) *gpu_addr = mgag200_bo_gpu_offset(bo);
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,19 +1,20 @@
 int mgag200_bo_push_sysram(struct mgag200_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i, ret;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   if (bo->kmap.virtual) ttm_bo_kunmap(&bo->kmap);
   mgag200_ttm_placement(bo, TTM_PL_FLAG_SYSTEM);
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
-  ret = ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
   if (ret) {
     DRM_ERROR("pushing to VRAM failed\n");
     return ret;
   }
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,12 +1,13 @@
 int mgag200_bo_unpin(struct mgag200_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   int i;
   if (!bo->pin_count) {
     DRM_ERROR("unpin bad %p\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
-  return ttm_bo_validate(&bo->bo, &bo->placement, false, false);
+  return ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,7 +1,8 @@
 int nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible, bool no_wait_gpu) {
+  struct ttm_operation_ctx ctx = {interruptible, no_wait_gpu};
   int ret;
-  ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible, no_wait_gpu);
+  ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
   if (ret) return ret;
   nouveau_bo_sync_for_device(nvbo);
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,28 +1,29 @@
 static int qxl_update_area_ioctl(struct drm_device *dev, void *data, struct drm_file *file) {
+  struct ttm_operation_ctx ctx = {true, false};
   struct qxl_device *qdev = dev->dev_private;
   struct drm_qxl_update_area *update_area = data;
   struct qxl_rect area = {.left = update_area->left, .top = update_area->top, .right = update_area->right, .bottom = update_area->bottom};
   int ret;
   struct drm_gem_object *gobj = NULL;
   struct qxl_bo *qobj = NULL;
   if (update_area->left >= update_area->right || update_area->top >= update_area->bottom) return -EINVAL;
   gobj = drm_gem_object_lookup(file, update_area->handle);
   if (gobj == NULL) return -ENOENT;
   qobj = gem_to_qxl_bo(gobj);
   ret = qxl_bo_reserve(qobj, false);
   if (ret) goto out;
   if (!qobj->pin_count) {
     qxl_ttm_placement_from_domain(qobj, qobj->type, false);
-    ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, true, false);
+    ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
     if (unlikely(ret)) goto out;
   }
   ret = qxl_bo_check_id(qdev, qobj);
   if (ret) goto out2;
   if (!qobj->surface_id) DRM_ERROR("got update area for surface with no id %d\n", update_area->handle);
   ret = qxl_io_update_area(qdev, qobj, &area);
 out2:
   qxl_bo_unreserve(qobj);
 out:
   drm_gem_object_unreference_unlocked(gobj);
   return ret;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,17 +1,18 @@
 static int __qxl_bo_pin(struct qxl_bo *bo, u32 domain, u64 *gpu_addr) {
+  struct ttm_operation_ctx ctx = {false, false};
   struct drm_device *ddev = bo->gem_base.dev;
   int r;
   if (bo->pin_count) {
     bo->pin_count++;
     if (gpu_addr) *gpu_addr = qxl_bo_gpu_offset(bo);
     return 0;
   }
   qxl_ttm_placement_from_domain(bo, domain, true);
-  r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+  r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
   if (likely(r == 0)) {
     bo->pin_count = 1;
     if (gpu_addr != NULL) *gpu_addr = qxl_bo_gpu_offset(bo);
   }
   if (unlikely(r != 0)) dev_err(ddev->dev, "%p pin failed\n", bo);
   return r;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,15 +1,16 @@
 static int __qxl_bo_unpin(struct qxl_bo *bo) {
+  struct ttm_operation_ctx ctx = {false, false};
   struct drm_device *ddev = bo->gem_base.dev;
   int r, i;
   if (!bo->pin_count) {
     dev_warn(ddev->dev, "%p unpin not necessary\n", bo);
     return 0;
   }
   bo->pin_count--;
   if (bo->pin_count) return 0;
   for (i = 0; i < bo->placement.num_placement; i++)
     bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
-  r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+  r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
   if (unlikely(r != 0)) dev_err(ddev->dev, "%p validate failed for unpin\n", bo);
   return r;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,14 +1,15 @@
 static int qxl_release_validate_bo(struct qxl_bo *bo) {
+  struct ttm_operation_ctx ctx = {true, false};
   int ret;
   if (!bo->pin_count) {
     qxl_ttm_placement_from_domain(bo, bo->type, false);
-    ret = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
+    ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
     if (ret) return ret;
   }
   ret = reservation_object_reserve_shared(bo->tbo.resv);
   if (ret) return ret;
   /* allocate a surface for reserved + validated buffers */
   ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
   if (ret) return ret;
   return 0;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,56 +1,57 @@
 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) {
+  struct ttm_operation_ctx ctx = {true, false};
   struct radeon_device *rdev = dev->dev_private;
   struct drm_radeon_gem_userptr *args = data;
   struct drm_gem_object *gobj;
   struct radeon_bo *bo;
   uint32_t handle;
   int r;
   if (offset_in_page(args->addr | args->size)) return -EINVAL;
   /* reject unknown flag values */
   if (args->flags & ~(RADEON_GEM_USERPTR_READONLY | RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE | RADEON_GEM_USERPTR_REGISTER)) return -EINVAL;
   if (args->flags & RADEON_GEM_USERPTR_READONLY) {
     /* readonly pages not tested on older hardware */
     if (rdev->family < CHIP_R600) return -EINVAL;
   } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) || !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
     /* if we want to write to it we must require anonymous
        memory and install a MMU notifier */
     return -EACCES;
   }
   down_read(&rdev->exclusive_lock);
   /* create a gem object to contain this object in */
   r = radeon_gem_object_create(rdev, args->size, 0, RADEON_GEM_DOMAIN_CPU, 0, false, &gobj);
   if (r) goto handle_lockup;
   bo = gem_to_radeon_bo(gobj);
   r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
   if (r) goto release_object;
   if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
     r = radeon_mn_register(bo, args->addr);
     if (r) goto release_object;
   }
   if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
     down_read(&current->mm->mmap_sem);
     r = radeon_bo_reserve(bo, true);
     if (r) {
       up_read(&current->mm->mmap_sem);
       goto release_object;
     }
     radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
-    r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
+    r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
     radeon_bo_unreserve(bo);
     up_read(&current->mm->mmap_sem);
     if (r) goto release_object;
   }
   r = drm_gem_handle_create(filp, gobj, &handle);
   /* drop reference from allocate - handle holds it now */
   drm_gem_object_put_unlocked(gobj);
   if (r) goto handle_lockup;
   args->handle = handle;
   up_read(&rdev->exclusive_lock);
   return 0;
 release_object:
   drm_gem_object_put_unlocked(gobj);
 handle_lockup:
   up_read(&rdev->exclusive_lock);
   r = radeon_gem_handle_lockup(rdev, r);
   return r;
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }
--- initial
+++ final
@@ -1,31 +1,32 @@
 static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn, struct mm_struct *mm, unsigned long start, unsigned long end) {
+  struct ttm_operation_ctx ctx = {false, false};
   struct radeon_mn *rmn = container_of(mn, struct radeon_mn, mn);
   struct interval_tree_node *it;
   /* notification is exclusive, but interval is inclusive */
   end -= 1;
   mutex_lock(&rmn->lock);
   it = interval_tree_iter_first(&rmn->objects, start, end);
   while (it) {
     struct radeon_mn_node *node;
     struct radeon_bo *bo;
     long r;
     node = container_of(it, struct radeon_mn_node, it);
     it = interval_tree_iter_next(it, start, end);
     list_for_each_entry(bo, &node->bos, mn_list) {
       if (!bo->tbo.ttm || bo->tbo.ttm->state != tt_bound) continue;
       r = radeon_bo_reserve(bo, true);
       if (r) {
         DRM_ERROR("(%ld) failed to reserve user bo\n", r);
         continue;
       }
       r = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false, MAX_SCHEDULE_TIMEOUT);
       if (r <= 0) DRM_ERROR("(%ld) failed to wait for user bo\n", r);
       radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
-      r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
+      r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
       if (r) DRM_ERROR("(%ld) failed to validate user bo\n", r);
       radeon_bo_unreserve(bo);
     }
   }
 
   mutex_unlock(&rmn->lock);
 }<sep>@@
identifier f;
expression e1,e2,x,y;
symbol ctx;
@@

f(...) {
++ struct ttm_operation_ctx ctx = { e1,e2 };
<+...
               ttm_bo_validate(x,y,
-                               e1,e2
+              			&ctx
			      )
...+> }