--- initial
+++ final
@@ -1,90 +1,90 @@
 static void doc2001plus_command(struct nand_chip *this, unsigned command, int column, int page_addr) {
   struct mtd_info *mtd = nand_to_mtd(this);
   struct doc_priv *doc = nand_get_controller_data(this);
   void __iomem *docptr = doc->virtadr;
   /*
    * Must terminate write pipeline before sending any commands
    * to the device.
    */
   if (command == NAND_CMD_PAGEPROG) {
     WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
     WriteDOC(0x00, docptr, Mplus_WritePipeTerm);
   }
   /*
    * Write out the command to the device.
    */
   if (command == NAND_CMD_SEQIN) {
     int readcmd;
     if (column >= mtd->writesize) {
       /* OOB area */
       column -= mtd->writesize;
       readcmd = NAND_CMD_READOOB;
     } else if (column < 256) {
       /* First 256 bytes --> READ0 */
       readcmd = NAND_CMD_READ0;
     } else {
       column -= 256;
       readcmd = NAND_CMD_READ1;
     }
     WriteDOC(readcmd, docptr, Mplus_FlashCmd);
   }
   WriteDOC(command, docptr, Mplus_FlashCmd);
   WriteDOC(0, docptr, Mplus_WritePipeTerm);
   WriteDOC(0, docptr, Mplus_WritePipeTerm);
   if (column != -1 || page_addr != -1) {
     /* Serially input address */
     if (column != -1) {
       /* Adjust columns for 16 bit buswidth */
       if (this->options & NAND_BUSWIDTH_16 && !nand_opcode_8bits(command)) column >>= 1;
       WriteDOC(column, docptr, Mplus_FlashAddress);
     }
     if (page_addr != -1) {
       WriteDOC((unsigned char)(page_addr & 0xff), docptr, Mplus_FlashAddress);
       WriteDOC((unsigned char)((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);
       if (this->options & NAND_ROW_ADDR_3) {
         WriteDOC((unsigned char)((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);
         printk("high density\n");
       }
     }
     WriteDOC(0, docptr, Mplus_WritePipeTerm);
     WriteDOC(0, docptr, Mplus_WritePipeTerm);
     /* deassert ALE */
     if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 || command == NAND_CMD_READOOB || command == NAND_CMD_READID) WriteDOC(0, docptr, Mplus_FlashControl);
   }
   /*
    * program and erase have their own busy handlers
    * status and sequential in needs no delay
    */
   switch (command) {
   case NAND_CMD_PAGEPROG:
   case NAND_CMD_ERASE1:
   case NAND_CMD_ERASE2:
   case NAND_CMD_SEQIN:
   case NAND_CMD_STATUS: return;
   case NAND_CMD_RESET:
     if (this->legacy.dev_ready) break;
-    udelay(this->chip_delay);
+    udelay(this->legacy.chip_delay);
     WriteDOC(NAND_CMD_STATUS, docptr, Mplus_FlashCmd);
     WriteDOC(0, docptr, Mplus_WritePipeTerm);
     WriteDOC(0, docptr, Mplus_WritePipeTerm);
     while (!(this->legacy.read_byte(this) & 0x40))
       ;
     return;
     /* This applies to read commands */
   default:
     /*
      * If we don't have access to the busy pin, we apply the given
      * command delay
      */
     if (!this->legacy.dev_ready) {
-      udelay(this->chip_delay);
+      udelay(this->legacy.chip_delay);
       return;
     }
   }
   /* Apply this short delay always to ensure that we do wait tWB in
    * any case on any machine. */
   ndelay(100);
   /* wait until command is processed */
   while (!this->legacy.dev_ready(this))
     ;
 }<sep>@@
struct nand_chip *chip;
@@
- chip->chip_delay
+ chip->legacy.chip_delay