imamnurby/smpl_train_seed8 huggingface dataset:
--- initial
+++ final
@@ -1,30 +1,30 @@
 static int exynos_drm_fbdev_update(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes, struct exynos_drm_gem *exynos_gem) {
   struct fb_info *fbi;
   struct drm_framebuffer *fb = helper->fb;
   unsigned int size = fb->width * fb->height * (fb->bits_per_pixel >> 3);
   unsigned int nr_pages;
   unsigned long offset;
   fbi = drm_fb_helper_alloc_fbi(helper);
   if (IS_ERR(fbi)) {
     DRM_ERROR("failed to allocate fb info.\n");
     return PTR_ERR(fbi);
   }
   fbi->par = helper;
   fbi->flags = FBINFO_FLAG_DEFAULT;
   fbi->fbops = &exynos_drm_fb_ops;
-  drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->depth);
+  drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->format->depth);
   drm_fb_helper_fill_var(fbi, helper, sizes->fb_width, sizes->fb_height);
   nr_pages = exynos_gem->size >> PAGE_SHIFT;
   exynos_gem->kvaddr = (void __iomem *)vmap(exynos_gem->pages, nr_pages, VM_MAP, pgprot_writecombine(PAGE_KERNEL));
   if (!exynos_gem->kvaddr) {
     DRM_ERROR("failed to map pages to kernel space.\n");
     drm_fb_helper_release_fbi(helper);
     return -EIO;
   }
   offset = fbi->var.xoffset * (fb->bits_per_pixel >> 3);
   offset += fbi->var.yoffset * fb->pitches[0];
   fbi->screen_base = exynos_gem->kvaddr + offset;
   fbi->screen_size = size;
   fbi->fix.smem_len = size;
   return 0;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,63 +1,63 @@
 static int tegra_fbdev_probe(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) {
   struct tegra_fbdev *fbdev = to_tegra_fbdev(helper);
   struct tegra_drm *tegra = helper->dev->dev_private;
   struct drm_device *drm = helper->dev;
   struct drm_mode_fb_cmd2 cmd = {0};
   unsigned int bytes_per_pixel;
   struct drm_framebuffer *fb;
   unsigned long offset;
   struct fb_info *info;
   struct tegra_bo *bo;
   size_t size;
   int err;
   bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8);
   cmd.width = sizes->surface_width;
   cmd.height = sizes->surface_height;
   cmd.pitches[0] = round_up(sizes->surface_width * bytes_per_pixel, tegra->pitch_align);
   cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth);
   size = cmd.pitches[0] * cmd.height;
   bo = tegra_bo_create(drm, size, 0);
   if (IS_ERR(bo)) return PTR_ERR(bo);
   info = drm_fb_helper_alloc_fbi(helper);
   if (IS_ERR(info)) {
     dev_err(drm->dev, "failed to allocate framebuffer info\n");
     drm_gem_object_unreference_unlocked(&bo->gem);
     return PTR_ERR(info);
   }
   fbdev->fb = tegra_fb_alloc(drm, &cmd, &bo, 1);
   if (IS_ERR(fbdev->fb)) {
     err = PTR_ERR(fbdev->fb);
     dev_err(drm->dev, "failed to allocate DRM framebuffer: %d\n", err);
     drm_gem_object_unreference_unlocked(&bo->gem);
     goto release;
   }
   fb = &fbdev->fb->base;
   helper->fb = fb;
   helper->fbdev = info;
   info->par = helper;
   info->flags = FBINFO_FLAG_DEFAULT;
   info->fbops = &tegra_fb_ops;
-  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
+  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth);
   drm_fb_helper_fill_var(info, helper, fb->width, fb->height);
   offset = info->var.xoffset * bytes_per_pixel + info->var.yoffset * fb->pitches[0];
   if (bo->pages) {
     bo->vaddr = vmap(bo->pages, bo->num_pages, VM_MAP, pgprot_writecombine(PAGE_KERNEL));
     if (!bo->vaddr) {
       dev_err(drm->dev, "failed to vmap() framebuffer\n");
       err = -ENOMEM;
       goto destroy;
     }
   }
   drm->mode_config.fb_base = (resource_size_t)bo->paddr;
   info->screen_base = (void __iomem *)bo->vaddr + offset;
   info->screen_size = size;
   info->fix.smem_start = (unsigned long)(bo->paddr + offset);
   info->fix.smem_len = size;
   return 0;
 destroy:
   drm_framebuffer_unregister_private(fb);
   tegra_fb_destroy(fb);
 release:
   drm_fb_helper_release_fbi(helper);
   return err;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,62 +1,62 @@
 int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb) {
   struct drm_device *dev = crtc->dev;
   struct drm_psb_private *dev_priv = dev->dev_private;
   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
   struct drm_framebuffer *fb = crtc->primary->fb;
   struct psb_framebuffer *psbfb = to_psb_fb(fb);
   int pipe = gma_crtc->pipe;
   const struct psb_offset *map = &dev_priv->regmap[pipe];
   unsigned long start, offset;
   u32 dspcntr;
   int ret = 0;
   if (!gma_power_begin(dev, true)) return 0;
   /* no fb bound */
   if (!fb) {
     dev_err(dev->dev, "No FB bound\n");
     goto gma_pipe_cleaner;
   }
   /* We are displaying this buffer, make sure it is actually loaded
      into the GTT */
   ret = psb_gtt_pin(psbfb->gtt);
   if (ret < 0) goto gma_pipe_set_base_exit;
   start = psbfb->gtt->offset;
   offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
   REG_WRITE(map->stride, fb->pitches[0]);
   dspcntr = REG_READ(map->cntr);
   dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
   switch (fb->bits_per_pixel) {
   case 8: dspcntr |= DISPPLANE_8BPP; break;
   case 16:
-    if (fb->depth == 15)
+    if (fb->format->depth == 15)
       dspcntr |= DISPPLANE_15_16BPP;
     else
       dspcntr |= DISPPLANE_16BPP;
     break;
   case 24:
   case 32: dspcntr |= DISPPLANE_32BPP_NO_ALPHA; break;
   default:
     dev_err(dev->dev, "Unknown color depth\n");
     ret = -EINVAL;
     goto gma_pipe_set_base_exit;
   }
   REG_WRITE(map->cntr, dspcntr);
   dev_dbg(dev->dev, "Writing base %08lX %08lX %d %d\n", start, offset, x, y);
   /* FIXME: Investigate whether this really is the base for psb and why
             the linear offset is named base for the other chips. map->surf
             should be the base and map->linoff the offset for all chips */
   if (IS_PSB(dev)) {
     REG_WRITE(map->base, offset + start);
     REG_READ(map->base);
   } else {
     REG_WRITE(map->base, offset);
     REG_READ(map->base);
     REG_WRITE(map->surf, start);
     REG_READ(map->surf);
   }
 gma_pipe_cleaner:
   /* If there was a previous display we can now unpin it */
   if (old_fb) psb_gtt_unpin(to_psb_fb(old_fb)->gtt);
 gma_pipe_set_base_exit:
   gma_power_end(dev);
   return ret;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,50 +1,50 @@
 static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb) {
   struct drm_device *dev = crtc->dev;
   struct drm_psb_private *dev_priv = dev->dev_private;
   struct drm_framebuffer *fb = crtc->primary->fb;
   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
   struct psb_framebuffer *psbfb = to_psb_fb(fb);
   int pipe = gma_crtc->pipe;
   const struct psb_offset *map = &dev_priv->regmap[pipe];
   unsigned long start, offset;
   u32 dspcntr;
   int ret;
   memcpy(&globle_dev, dev, sizeof(struct drm_device));
   dev_dbg(dev->dev, "pipe = 0x%x.\n", pipe);
   /* no fb bound */
   if (!fb) {
     dev_dbg(dev->dev, "No FB bound\n");
     return 0;
   }
   ret = check_fb(fb);
   if (ret) return ret;
   if (pipe > 2) {
     DRM_ERROR("Illegal Pipe Number.\n");
     return -EINVAL;
   }
   if (!gma_power_begin(dev, true)) return 0;
   start = psbfb->gtt->offset;
   offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
   REG_WRITE(map->stride, fb->pitches[0]);
   dspcntr = REG_READ(map->cntr);
   dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
   switch (fb->bits_per_pixel) {
   case 8: dspcntr |= DISPPLANE_8BPP; break;
   case 16:
-    if (fb->depth == 15)
+    if (fb->format->depth == 15)
       dspcntr |= DISPPLANE_15_16BPP;
     else
       dspcntr |= DISPPLANE_16BPP;
     break;
   case 24:
   case 32: dspcntr |= DISPPLANE_32BPP_NO_ALPHA; break;
   }
   REG_WRITE(map->cntr, dspcntr);
   dev_dbg(dev->dev, "Writing base %08lX %08lX %d %d\n", start, offset, x, y);
   REG_WRITE(map->linoff, offset);
   REG_READ(map->linoff);
   REG_WRITE(map->surf, start);
   REG_READ(map->surf);
   gma_power_end(dev);
   return 0;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,60 +1,60 @@
 static int mgag200fb_create(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) {
   struct mga_fbdev *mfbdev = container_of(helper, struct mga_fbdev, helper);
   struct drm_device *dev = mfbdev->helper.dev;
   struct drm_mode_fb_cmd2 mode_cmd;
   struct mga_device *mdev = dev->dev_private;
   struct fb_info *info;
   struct drm_framebuffer *fb;
   struct drm_gem_object *gobj = NULL;
   int ret;
   void *sysram;
   int size;
   mode_cmd.width = sizes->surface_width;
   mode_cmd.height = sizes->surface_height;
   mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8);
   mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth);
   size = mode_cmd.pitches[0] * mode_cmd.height;
   ret = mgag200fb_create_object(mfbdev, &mode_cmd, &gobj);
   if (ret) {
     DRM_ERROR("failed to create fbcon backing object %d\n", ret);
     return ret;
   }
   sysram = vmalloc(size);
   if (!sysram) {
     ret = -ENOMEM;
     goto err_sysram;
   }
   info = drm_fb_helper_alloc_fbi(helper);
   if (IS_ERR(info)) {
     ret = PTR_ERR(info);
     goto err_alloc_fbi;
   }
   info->par = mfbdev;
   ret = mgag200_framebuffer_init(dev, &mfbdev->mfb, &mode_cmd, gobj);
   if (ret) goto err_framebuffer_init;
   mfbdev->sysram = sysram;
   mfbdev->size = size;
   fb = &mfbdev->mfb.base;
   /* setup helper */
   mfbdev->helper.fb = fb;
   strcpy(info->fix.id, "mgadrmfb");
   info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
   info->fbops = &mgag200fb_ops;
   /* setup aperture base/size for vesafb takeover */
   info->apertures->ranges[0].base = mdev->dev->mode_config.fb_base;
   info->apertures->ranges[0].size = mdev->mc.vram_size;
-  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
+  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth);
   drm_fb_helper_fill_var(info, &mfbdev->helper, sizes->fb_width, sizes->fb_height);
   info->screen_base = sysram;
   info->screen_size = size;
   info->pixmap.flags = FB_PIXMAP_SYSTEM;
   DRM_DEBUG_KMS("allocated %dx%d\n", fb->width, fb->height);
   return 0;
 err_framebuffer_init:
   drm_fb_helper_release_fbi(helper);
 err_alloc_fbi:
   vfree(sysram);
 err_sysram:
   drm_gem_object_unreference_unlocked(gobj);
   return ret;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,37 +1,37 @@
 static void mga_crtc_load_lut(struct drm_crtc *crtc) {
   struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
   struct drm_device *dev = crtc->dev;
   struct mga_device *mdev = dev->dev_private;
   struct drm_framebuffer *fb = crtc->primary->fb;
   int i;
   if (!crtc->enabled) return;
   WREG8(DAC_INDEX + MGA1064_INDEX, 0);
   if (fb && fb->bits_per_pixel == 16) {
-    int inc = (fb->depth == 15) ? 8 : 4;
+    int inc = (fb->format->depth == 15) ? 8 : 4;
     u8 r, b;
     for (i = 0; i < MGAG200_LUT_SIZE; i += inc) {
-      if (fb->depth == 16) {
+      if (fb->format->depth == 16) {
         if (i > (MGAG200_LUT_SIZE >> 1)) {
           r = b = 0;
         } else {
           r = mga_crtc->lut_r[i << 1];
           b = mga_crtc->lut_b[i << 1];
         }
       } else {
         r = mga_crtc->lut_r[i];
         b = mga_crtc->lut_b[i];
       }
       /* VGA registers */
       WREG8(DAC_INDEX + MGA1064_COL_PAL, r);
       WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
       WREG8(DAC_INDEX + MGA1064_COL_PAL, b);
     }
     return;
   }
   for (i = 0; i < MGAG200_LUT_SIZE; i++) {
     /* VGA registers */
     WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]);
     WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
     WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_b[i]);
   }
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,46 +1,46 @@
 static int oaktrail_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb) {
   struct drm_device *dev = crtc->dev;
   struct drm_psb_private *dev_priv = dev->dev_private;
   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
   struct drm_framebuffer *fb = crtc->primary->fb;
   struct psb_framebuffer *psbfb = to_psb_fb(fb);
   int pipe = gma_crtc->pipe;
   const struct psb_offset *map = &dev_priv->regmap[pipe];
   unsigned long start, offset;
   u32 dspcntr;
   int ret = 0;
   /* no fb bound */
   if (!fb) {
     dev_dbg(dev->dev, "No FB bound\n");
     return 0;
   }
   if (!gma_power_begin(dev, true)) return 0;
   start = psbfb->gtt->offset;
   offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
   REG_WRITE(map->stride, fb->pitches[0]);
   dspcntr = REG_READ(map->cntr);
   dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
   switch (fb->bits_per_pixel) {
   case 8: dspcntr |= DISPPLANE_8BPP; break;
   case 16:
-    if (fb->depth == 15)
+    if (fb->format->depth == 15)
       dspcntr |= DISPPLANE_15_16BPP;
     else
       dspcntr |= DISPPLANE_16BPP;
     break;
   case 24:
   case 32: dspcntr |= DISPPLANE_32BPP_NO_ALPHA; break;
   default:
     dev_err(dev->dev, "Unknown color depth\n");
     ret = -EINVAL;
     goto pipe_set_base_exit;
   }
   REG_WRITE(map->cntr, dspcntr);
   REG_WRITE(map->base, offset);
   REG_READ(map->base);
   REG_WRITE(map->surf, start);
   REG_READ(map->surf);
 pipe_set_base_exit:
   gma_power_end(dev);
   return ret;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,54 +1,54 @@
 static int rockchip_drm_fbdev_create(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) {
   struct rockchip_drm_private *private = to_drm_private(helper);
   struct drm_mode_fb_cmd2 mode_cmd = {0};
   struct drm_device *dev = helper->dev;
   struct rockchip_gem_object *rk_obj;
   struct drm_framebuffer *fb;
   unsigned int bytes_per_pixel;
   unsigned long offset;
   struct fb_info *fbi;
   size_t size;
   int ret;
   bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8);
   mode_cmd.width = sizes->surface_width;
   mode_cmd.height = sizes->surface_height;
   mode_cmd.pitches[0] = sizes->surface_width * bytes_per_pixel;
   mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth);
   size = mode_cmd.pitches[0] * mode_cmd.height;
   rk_obj = rockchip_gem_create_object(dev, size, true);
   if (IS_ERR(rk_obj)) return -ENOMEM;
 private
   ->fbdev_bo = &rk_obj->base;
   fbi = drm_fb_helper_alloc_fbi(helper);
   if (IS_ERR(fbi)) {
     dev_err(dev->dev, "Failed to create framebuffer info.\n");
     ret = PTR_ERR(fbi);
     goto err_rockchip_gem_free_object;
   }
   helper->fb = rockchip_drm_framebuffer_init(dev, &mode_cmd, private->fbdev_bo);
   if (IS_ERR(helper->fb)) {
     dev_err(dev->dev, "Failed to allocate DRM framebuffer.\n");
     ret = PTR_ERR(helper->fb);
     goto err_release_fbi;
   }
   fbi->par = helper;
   fbi->flags = FBINFO_FLAG_DEFAULT;
   fbi->fbops = &rockchip_drm_fbdev_ops;
   fb = helper->fb;
-  drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->depth);
+  drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->format->depth);
   drm_fb_helper_fill_var(fbi, helper, sizes->fb_width, sizes->fb_height);
   offset = fbi->var.xoffset * bytes_per_pixel;
   offset += fbi->var.yoffset * fb->pitches[0];
   dev->mode_config.fb_base = 0;
   fbi->screen_base = rk_obj->kvaddr + offset;
   fbi->screen_size = rk_obj->base.size;
   fbi->fix.smem_len = rk_obj->base.size;
-  DRM_DEBUG_KMS("FB [%dx%d]-%d kvaddr=%p offset=%ld size=%zu\n", fb->width, fb->height, fb->depth, rk_obj->kvaddr, offset, size);
+  DRM_DEBUG_KMS("FB [%dx%d]-%d kvaddr=%p offset=%ld size=%zu\n", fb->width, fb->height, fb->format->depth, rk_obj->kvaddr, offset, size);
   fbi->skip_vt_switch = true;
   return 0;
 err_release_fbi:
   drm_fb_helper_release_fbi(helper);
 err_rockchip_gem_free_object:
   rockchip_gem_free_object(&rk_obj->base);
   return ret;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,50 +1,50 @@
 static int udlfb_create(struct drm_fb_helper *helper, struct drm_fb_helper_surface_size *sizes) {
   struct udl_fbdev *ufbdev = container_of(helper, struct udl_fbdev, helper);
   struct drm_device *dev = ufbdev->helper.dev;
   struct fb_info *info;
   struct drm_framebuffer *fb;
   struct drm_mode_fb_cmd2 mode_cmd;
   struct udl_gem_object *obj;
   uint32_t size;
   int ret = 0;
   if (sizes->surface_bpp == 24) sizes->surface_bpp = 32;
   mode_cmd.width = sizes->surface_width;
   mode_cmd.height = sizes->surface_height;
   mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8);
   mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth);
   size = mode_cmd.pitches[0] * mode_cmd.height;
   size = ALIGN(size, PAGE_SIZE);
   obj = udl_gem_alloc_object(dev, size);
   if (!obj) goto out;
   ret = udl_gem_vmap(obj);
   if (ret) {
     DRM_ERROR("failed to vmap fb\n");
     goto out_gfree;
   }
   info = drm_fb_helper_alloc_fbi(helper);
   if (IS_ERR(info)) {
     ret = PTR_ERR(info);
     goto out_gfree;
   }
   info->par = ufbdev;
   ret = udl_framebuffer_init(dev, &ufbdev->ufb, &mode_cmd, obj);
   if (ret) goto out_destroy_fbi;
   fb = &ufbdev->ufb.base;
   ufbdev->helper.fb = fb;
   strcpy(info->fix.id, "udldrmfb");
   info->screen_base = ufbdev->ufb.obj->vmapping;
   info->fix.smem_len = size;
   info->fix.smem_start = (unsigned long)ufbdev->ufb.obj->vmapping;
   info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
   info->fbops = &udlfb_ops;
-  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
+  drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth);
   drm_fb_helper_fill_var(info, &ufbdev->helper, sizes->fb_width, sizes->fb_height);
   DRM_DEBUG_KMS("allocated %dx%d vmal %p\n", fb->width, fb->height, ufbdev->ufb.obj->vmapping);
   return ret;
 out_destroy_fbi:
   drm_fb_helper_release_fbi(helper);
 out_gfree:
   drm_gem_object_unreference_unlocked(&ufbdev->ufb.obj->base);
 out:
   return ret;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,53 +1,53 @@
 static int vmw_ldu_commit_list(struct vmw_private *dev_priv) {
   struct vmw_legacy_display *lds = dev_priv->ldu_priv;
   struct vmw_legacy_display_unit *entry;
   struct vmw_display_unit *du = NULL;
   struct drm_framebuffer *fb = NULL;
   struct drm_crtc *crtc = NULL;
   int i = 0, ret;
   /* If there is no display topology the host just assumes
    * that the guest will set the same layout as the host.
    */
   if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) {
     int w = 0, h = 0;
     list_for_each_entry(entry, &lds->active, active) {
       crtc = &entry->base.crtc;
       w = max(w, crtc->x + crtc->mode.hdisplay);
       h = max(h, crtc->y + crtc->mode.vdisplay);
       i++;
     }
     if (crtc == NULL) return 0;
     fb = entry->base.crtc.primary->fb;
-    return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0], fb->bits_per_pixel, fb->depth);
+    return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0], fb->bits_per_pixel, fb->format->depth);
   }
   if (!list_empty(&lds->active)) {
     entry = list_entry(lds->active.next, typeof(*entry), active);
     fb = entry->base.crtc.primary->fb;
-    vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0], fb->bits_per_pixel, fb->depth);
+    vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0], fb->bits_per_pixel, fb->format->depth);
   }
   /* Make sure we always show something. */
   vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, lds->num_active ? lds->num_active : 1);
   i = 0;
   list_for_each_entry(entry, &lds->active, active) {
     crtc = &entry->base.crtc;
     vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);
     vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
     i++;
   }
   BUG_ON(i != lds->num_active);
   lds->last_num_active = lds->num_active;
   /* Find the first du with a cursor. */
   list_for_each_entry(entry, &lds->active, active) {
     du = &entry->base;
     if (!du->cursor_dmabuf) continue;
     ret = vmw_cursor_update_dmabuf(dev_priv, du->cursor_dmabuf, 64, 64, du->hotspot_x, du->hotspot_y);
     if (ret == 0) break;
     DRM_ERROR("Could not update cursor image\n");
   }
   return 0;
 }<sep>@@
struct drm_framebuffer *fb;
@@
- fb->depth
+ fb->format->depth

@@
struct drm_framebuffer *fb;
@@
- (fb->format->depth)
+ fb->format->depth
--- initial
+++ final
@@ -1,7 +1,7 @@
 static u32 flow_get_nfct(const struct sk_buff *skb) {
 #if IS_ENABLED(CONFIG_NF_CONNTRACK)
-  return addr_fold(skb->nfct);
+  return addr_fold(skb_nfct(skb));
 #else
   return 0;
 #endif
 }<sep>@@
struct sk_buff *skb;
expression e;
statement S1, S2;
@@
(
  skb->nfct = e
|
-       skb->nfct
+       skb_nfct(skb)
)