imamnurby/smpl_train_seed8 huggingface dataset:
--- initial
+++ final
@@ -1,75 +1,75 @@
 static int iblock_configure_device(struct se_device *dev) {
   struct iblock_dev *ib_dev = IBLOCK_DEV(dev);
   struct request_queue *q;
   struct block_device *bd = NULL;
   struct blk_integrity *bi;
   fmode_t mode;
   int ret = -ENOMEM;
   if (!(ib_dev->ibd_flags & IBDF_HAS_UDEV_PATH)) {
     pr_err("Missing udev_path= parameters for IBLOCK\n");
     return -EINVAL;
   }
-  ib_dev->ibd_bio_set = bioset_create(IBLOCK_BIO_POOL_SIZE, 0);
+  ib_dev->ibd_bio_set = bioset_create(IBLOCK_BIO_POOL_SIZE, 0, BIOSET_NEED_BVECS);
   if (!ib_dev->ibd_bio_set) {
     pr_err("IBLOCK: Unable to create bioset\n");
     goto out;
   }
   pr_debug("IBLOCK: Claiming struct block_device: %s\n", ib_dev->ibd_udev_path);
   mode = FMODE_READ | FMODE_EXCL;
   if (!ib_dev->ibd_readonly)
     mode |= FMODE_WRITE;
   else
     dev->dev_flags |= DF_READ_ONLY;
   bd = blkdev_get_by_path(ib_dev->ibd_udev_path, mode, ib_dev);
   if (IS_ERR(bd)) {
     ret = PTR_ERR(bd);
     goto out_free_bioset;
   }
   ib_dev->ibd_bd = bd;
   q = bdev_get_queue(bd);
   dev->dev_attrib.hw_block_size = bdev_logical_block_size(bd);
   dev->dev_attrib.hw_max_sectors = queue_max_hw_sectors(q);
   dev->dev_attrib.hw_queue_depth = q->nr_requests;
   if (target_configure_unmap_from_queue(&dev->dev_attrib, q))
     pr_debug("IBLOCK: BLOCK Discard support available,"
              " disabled by default\n");
   /*
    * Enable write same emulation for IBLOCK and use 0xFFFF as
    * the smaller WRITE_SAME(10) only has a two-byte block count.
    */
   dev->dev_attrib.max_write_same_len = 0xFFFF;
   if (blk_queue_nonrot(q)) dev->dev_attrib.is_nonrot = 1;
   bi = bdev_get_integrity(bd);
   if (bi) {
     struct bio_set *bs = ib_dev->ibd_bio_set;
     if (!strcmp(bi->profile->name, "T10-DIF-TYPE3-IP") || !strcmp(bi->profile->name, "T10-DIF-TYPE1-IP")) {
       pr_err("IBLOCK export of blk_integrity: %s not"
              " supported\n",
              bi->profile->name);
       ret = -ENOSYS;
       goto out_blkdev_put;
     }
     if (!strcmp(bi->profile->name, "T10-DIF-TYPE3-CRC")) {
       dev->dev_attrib.pi_prot_type = TARGET_DIF_TYPE3_PROT;
     } else if (!strcmp(bi->profile->name, "T10-DIF-TYPE1-CRC")) {
       dev->dev_attrib.pi_prot_type = TARGET_DIF_TYPE1_PROT;
     }
     if (dev->dev_attrib.pi_prot_type) {
       if (bioset_integrity_create(bs, IBLOCK_BIO_POOL_SIZE) < 0) {
         pr_err("Unable to allocate bioset for PI\n");
         ret = -ENOMEM;
         goto out_blkdev_put;
       }
       pr_debug("IBLOCK setup BIP bs->bio_integrity_pool: %p\n", bs->bio_integrity_pool);
     }
     dev->dev_attrib.hw_pi_prot_type = dev->dev_attrib.pi_prot_type;
   }
   return 0;
 out_blkdev_put:
   blkdev_put(ib_dev->ibd_bd, FMODE_WRITE | FMODE_READ | FMODE_EXCL);
 out_free_bioset:
   bioset_free(ib_dev->ibd_bio_set);
   ib_dev->ibd_bio_set = NULL;
 out:
   return ret;
 }<sep>@@
expression e1,e2;
@@
-bioset_create(e1,e2)
+bioset_create(e1,e2,BIOSET_NEED_BVECS)
--- initial
+++ final
@@ -1,51 +1,51 @@
 static blk_qc_t dcssblk_make_request(struct request_queue *q, struct bio *bio) {
   struct dcssblk_dev_info *dev_info;
   struct bio_vec bvec;
   struct bvec_iter iter;
   unsigned long index;
   unsigned long page_addr;
   unsigned long source_addr;
   unsigned long bytes_done;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   bytes_done = 0;
   dev_info = bio->bi_bdev->bd_disk->private_data;
   if (dev_info == NULL) goto fail;
   if ((bio->bi_iter.bi_sector & 7) != 0 || (bio->bi_iter.bi_size & 4095) != 0) /* Request is not page-aligned. */
     goto fail;
   if (bio_end_sector(bio) > get_capacity(bio->bi_bdev->bd_disk)) {
     /* Request beyond end of DCSS segment. */
     goto fail;
   }
   /* verify data transfer direction */
   if (dev_info->is_shared) {
     switch (dev_info->segment_type) {
     case SEG_TYPE_SR:
     case SEG_TYPE_ER:
     case SEG_TYPE_SC:
       /* cannot write to these segments */
       if (bio_data_dir(bio) == WRITE) {
         pr_warn("Writing to %s failed because it is a read-only device\n", dev_name(&dev_info->dev));
         goto fail;
       }
     }
   }
   index = (bio->bi_iter.bi_sector >> 3);
   bio_for_each_segment(bvec, bio, iter) {
     page_addr = (unsigned long)page_address(bvec.bv_page) + bvec.bv_offset;
     source_addr = dev_info->start + (index << 12) + bytes_done;
     if (unlikely((page_addr & 4095) != 0) || (bvec.bv_len & 4095) != 0)
       // More paranoia.
       goto fail;
     if (bio_data_dir(bio) == READ) {
       memcpy((void *)page_addr, (void *)source_addr, bvec.bv_len);
     } else {
       memcpy((void *)source_addr, (void *)page_addr, bvec.bv_len);
     }
     bytes_done += bvec.bv_len;
   }
   bio_endio(bio);
   return BLK_QC_T_NONE;
 fail:
   bio_io_error(bio);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,35 +1,35 @@
 static blk_qc_t rsxx_make_request(struct request_queue *q, struct bio *bio) {
   struct rsxx_cardinfo *card = q->queuedata;
   struct rsxx_bio_meta *bio_meta;
   blk_status_t st = BLK_STS_IOERR;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   might_sleep();
   if (!card) goto req_err;
   if (bio_end_sector(bio) > get_capacity(card->gendisk)) goto req_err;
   if (unlikely(card->halt)) goto req_err;
   if (unlikely(card->dma_fault)) goto req_err;
   if (bio->bi_iter.bi_size == 0) {
     dev_err(CARD_TO_DEV(card), "size zero BIO!\n");
     goto req_err;
   }
   bio_meta = kmem_cache_alloc(bio_meta_pool, GFP_KERNEL);
   if (!bio_meta) {
     st = BLK_STS_RESOURCE;
     goto req_err;
   }
   bio_meta->bio = bio;
   atomic_set(&bio_meta->error, 0);
   atomic_set(&bio_meta->pending_dmas, 0);
   bio_meta->start_time = jiffies;
   if (!unlikely(card->halt)) disk_stats_start(card, bio);
   dev_dbg(CARD_TO_DEV(card), "BIO[%c]: meta: %p addr8: x%llx size: %d\n", bio_data_dir(bio) ? 'W' : 'R', bio_meta, (u64)bio->bi_iter.bi_sector << 9, bio->bi_iter.bi_size);
   st = rsxx_dma_queue_bio(card, bio, &bio_meta->pending_dmas, bio_dma_done_cb, bio_meta);
   if (st) goto queue_err;
   return BLK_QC_T_NONE;
 queue_err:
   kmem_cache_free(bio_meta_pool, bio_meta);
 req_err:
   if (st) bio->bi_status = st;
   bio_endio(bio);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,13 +1,13 @@
 blk_qc_t drbd_make_request(struct request_queue *q, struct bio *bio) {
   struct drbd_device *device = (struct drbd_device *)q->queuedata;
   unsigned long start_jif;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   start_jif = jiffies;
   /*
    * what we "blindly" assume:
    */
   D_ASSERT(device, IS_ALIGNED(bio->bi_iter.bi_size, 512));
   inc_ap_bio(device);
   __drbd_make_request(device, bio, start_jif);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,45 +1,45 @@
 static blk_qc_t md_make_request(struct request_queue *q, struct bio *bio) {
   const int rw = bio_data_dir(bio);
   struct mddev *mddev = q->queuedata;
   unsigned int sectors;
   int cpu;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   if (mddev == NULL || mddev->pers == NULL) {
     bio_io_error(bio);
     return BLK_QC_T_NONE;
   }
   if (mddev->ro == 1 && unlikely(rw == WRITE)) {
     if (bio_sectors(bio) != 0) bio->bi_status = BLK_STS_IOERR;
     bio_endio(bio);
     return BLK_QC_T_NONE;
   }
   smp_rmb(); /* Ensure implications of  'active' are visible */
   rcu_read_lock();
   if (mddev->suspended) {
     DEFINE_WAIT(__wait);
     for (;;) {
       prepare_to_wait(&mddev->sb_wait, &__wait, TASK_UNINTERRUPTIBLE);
       if (!mddev->suspended) break;
       rcu_read_unlock();
       schedule();
       rcu_read_lock();
     }
     finish_wait(&mddev->sb_wait, &__wait);
   }
   atomic_inc(&mddev->active_io);
   rcu_read_unlock();
   /*
    * save the sectors now since our bio can
    * go away inside make_request
    */
   sectors = bio_sectors(bio);
   /* bio could be mergeable after passing to underlayer */
   bio->bi_opf &= ~REQ_NOMERGE;
   mddev->pers->make_request(mddev, bio);
   cpu = part_stat_lock();
   part_stat_inc(cpu, &mddev->gendisk->part0, ios[rw]);
   part_stat_add(cpu, &mddev->gendisk->part0, sectors[rw], sectors);
   part_stat_unlock();
   if (atomic_dec_and_test(&mddev->active_io) && mddev->suspended) wake_up(&mddev->sb_wait);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,18 +1,18 @@
 static int pblk_rw_io(struct request_queue *q, struct pblk *pblk, struct bio *bio) {
   int ret;
   /* Read requests must be <= 256kb due to NVMe's 64 bit completion bitmap
    * constraint. Writes can be of arbitrary size.
    */
   if (bio_data_dir(bio) == READ) {
-    blk_queue_split(q, &bio, q->bio_split);
+    blk_queue_split(q, &bio);
     ret = pblk_submit_read(pblk, bio);
     if (ret == NVM_IO_DONE && bio_flagged(bio, BIO_CLONED)) bio_put(bio);
     return ret;
   }
   /* Prevent deadlock in the case of a modest LUN configuration and large
    * user I/Os. Unless stalled, the rate limiter leaves at least 256KB
    * available for user I/O.
    */
-  if (unlikely(pblk_get_secs(bio) >= pblk_rl_sysfs_rate_show(&pblk->rl))) blk_queue_split(q, &bio, q->bio_split);
+  if (unlikely(pblk_get_secs(bio) >= pblk_rl_sysfs_rate_show(&pblk->rl))) blk_queue_split(q, &bio);
   return pblk_write_to_cache(pblk, bio, PBLK_IOTYPE_USER);
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,44 +1,44 @@
 static blk_qc_t pkt_make_request(struct request_queue *q, struct bio *bio) {
   struct pktcdvd_device *pd;
   char b[BDEVNAME_SIZE];
   struct bio *split;
   blk_queue_bounce(q, &bio);
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   pd = q->queuedata;
   if (!pd) {
     pr_err("%s incorrect request queue\n", bdevname(bio->bi_bdev, b));
     goto end_io;
   }
   pkt_dbg(2, pd, "start = %6llx stop = %6llx\n", (unsigned long long)bio->bi_iter.bi_sector, (unsigned long long)bio_end_sector(bio));
   /*
    * Clone READ bios so we can have our own bi_end_io callback.
    */
   if (bio_data_dir(bio) == READ) {
     pkt_make_request_read(pd, bio);
     return BLK_QC_T_NONE;
   }
   if (!test_bit(PACKET_WRITABLE, &pd->flags)) {
     pkt_notice(pd, "WRITE for ro device (%llu)\n", (unsigned long long)bio->bi_iter.bi_sector);
     goto end_io;
   }
   if (!bio->bi_iter.bi_size || (bio->bi_iter.bi_size % CD_FRAMESIZE)) {
     pkt_err(pd, "wrong bio size\n");
     goto end_io;
   }
   do {
     sector_t zone = get_zone(bio->bi_iter.bi_sector, pd);
     sector_t last_zone = get_zone(bio_end_sector(bio) - 1, pd);
     if (last_zone != zone) {
       BUG_ON(last_zone != zone + pd->settings.size);
       split = bio_split(bio, last_zone - bio->bi_iter.bi_sector, GFP_NOIO, fs_bio_set);
       bio_chain(split, bio);
     } else {
       split = bio;
     }
     pkt_make_request_write(q, split);
   } while (split != bio);
   return BLK_QC_T_NONE;
 end_io:
   bio_io_error(bio);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,16 +1,16 @@
 static blk_qc_t ps3vram_make_request(struct request_queue *q, struct bio *bio) {
   struct ps3_system_bus_device *dev = q->queuedata;
   struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
   int busy;
   dev_dbg(&dev->core, "%s\n", __func__);
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   spin_lock_irq(&priv->lock);
   busy = !bio_list_empty(&priv->list);
   bio_list_add(&priv->list, bio);
   spin_unlock_irq(&priv->lock);
   if (busy) return BLK_QC_T_NONE;
   do {
     bio = ps3vram_do_bio(dev, bio);
   } while (bio);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,26 +1,26 @@
 static blk_qc_t rrpc_make_rq(struct request_queue *q, struct bio *bio) {
   struct rrpc *rrpc = q->queuedata;
   struct nvm_rq *rqd;
   int err;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   if (bio_op(bio) == REQ_OP_DISCARD) {
     rrpc_discard(rrpc, bio);
     return BLK_QC_T_NONE;
   }
   rqd = mempool_alloc(rrpc->rq_pool, GFP_KERNEL);
   memset(rqd, 0, sizeof(struct nvm_rq));
   err = rrpc_submit_io(rrpc, bio, rqd, NVM_IOTYPE_NONE);
   switch (err) {
   case NVM_IO_OK: return BLK_QC_T_NONE;
   case NVM_IO_ERR: bio_io_error(bio); break;
   case NVM_IO_DONE: bio_endio(bio); break;
   case NVM_IO_REQUEUE:
     spin_lock(&rrpc->bio_lock);
     bio_list_add(&rrpc->requeue_bios, bio);
     spin_unlock(&rrpc->bio_lock);
     queue_work(rrpc->kgc_wq, &rrpc->ws_requeue);
     break;
   }
   mempool_free(rqd, rrpc->rq_pool);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,12 +1,12 @@
 static blk_qc_t mm_make_request(struct request_queue *q, struct bio *bio) {
   struct cardinfo *card = q->queuedata;
   pr_debug("mm_make_request %llu %u\n", (unsigned long long)bio->bi_iter.bi_sector, bio->bi_iter.bi_size);
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   spin_lock_irq(&card->lock);
   *card->biotail = bio;
   bio->bi_next = NULL;
   card->biotail = &bio->bi_next;
   if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card)) activate(card);
   spin_unlock_irq(&card->lock);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,36 +1,36 @@
 static blk_qc_t xpram_make_request(struct request_queue *q, struct bio *bio) {
   xpram_device_t *xdev = bio->bi_bdev->bd_disk->private_data;
   struct bio_vec bvec;
   struct bvec_iter iter;
   unsigned int index;
   unsigned long page_addr;
   unsigned long bytes;
-  blk_queue_split(q, &bio, q->bio_split);
+  blk_queue_split(q, &bio);
   if ((bio->bi_iter.bi_sector & 7) != 0 || (bio->bi_iter.bi_size & 4095) != 0) /* Request is not page-aligned. */
     goto fail;
   if ((bio->bi_iter.bi_size >> 12) > xdev->size) /* Request size is no page-aligned. */
     goto fail;
   if ((bio->bi_iter.bi_sector >> 3) > 0xffffffffU - xdev->offset) goto fail;
   index = (bio->bi_iter.bi_sector >> 3) + xdev->offset;
   bio_for_each_segment(bvec, bio, iter) {
     page_addr = (unsigned long)kmap(bvec.bv_page) + bvec.bv_offset;
     bytes = bvec.bv_len;
     if ((page_addr & 4095) != 0 || (bytes & 4095) != 0) /* More paranoia. */
       goto fail;
     while (bytes > 0) {
       if (bio_data_dir(bio) == READ) {
         if (xpram_page_in(page_addr, index) != 0) goto fail;
       } else {
         if (xpram_page_out(page_addr, index) != 0) goto fail;
       }
       page_addr += 4096;
       bytes -= 4096;
       index++;
     }
   }
   bio_endio(bio);
   return BLK_QC_T_NONE;
 fail:
   bio_io_error(bio);
   return BLK_QC_T_NONE;
 }<sep>@@
expression e1,e2,e3;
@@
       blk_queue_split(e1, e2
-              , e3
                      )
--- initial
+++ final
@@ -1,4 +1,4 @@
 void __init time_init(void) {
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,10 +1,10 @@
 void __init time_init(void) {
   u32 arch_timer_rate;
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
   tick_setup_hrtimer_broadcast();
   arch_timer_rate = arch_timer_get_rate();
   if (!arch_timer_rate) panic("Unable to initialise architected timer.\n");
   /* Calibrate the delay loop directly */
   lpj_fine = arch_timer_rate / HZ;
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,10 +1,10 @@
 void __init time_init(void) {
   if (machine_desc->init_time) {
     machine_desc->init_time();
   } else {
 #ifdef CONFIG_COMMON_CLK
     of_clk_init(NULL);
 #endif
-    clocksource_probe();
+    timer_probe();
   }
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,11 +1,11 @@
 void __init plat_time_init(void) {
   struct clk *clk;
   ralink_of_remap();
   ralink_clk_init();
   clk = clk_get_sys("cpu", NULL);
   if (IS_ERR(clk)) panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
   pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
   mips_hpt_frequency = clk_get_rate(clk) / 2;
   clk_put(clk);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,5 +1,5 @@
 static void __init zynq_timer_init(void) {
   zynq_clock_init();
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,34 +1,34 @@
 void __init plat_time_init(void) {
   struct device_node *np;
   struct clk *clk;
   of_clk_init(NULL);
   if (!cpu_has_counter) {
     mips_hpt_frequency = 0;
   } else if (mach && mach->measure_hpt_freq) {
     mips_hpt_frequency = mach->measure_hpt_freq();
   } else {
     np = of_get_cpu_node(0, NULL);
     if (!np) {
       pr_err("Failed to get CPU node\n");
       return;
     }
     clk = of_clk_get(np, 0);
     if (IS_ERR(clk)) {
       pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
       return;
     }
     mips_hpt_frequency = clk_get_rate(clk);
     clk_put(clk);
     switch (boot_cpu_type()) {
     case CPU_20KC:
     case CPU_25KF:
       /* The counter runs at the CPU clock rate */
       break;
     default:
       /* The counter runs at half the CPU clock rate */
       mips_hpt_frequency /= 2;
       break;
     }
   }
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,7 +1,7 @@
 void __init time_init(void) {
   struct device_node *np;
   int count = 0;
   for_each_compatible_node(np, NULL, ALTR_TIMER_COMPATIBLE) count++;
   if (count < 2) panic("%d timer is found, it needs 2 timers in system\n", count);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,25 +1,25 @@
 void __init plat_time_init(void) {
   unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK);
   unsigned int freq;
   init_rtc();
   estimate_frequencies();
   freq = mips_hpt_frequency;
   if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) && (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) freq *= 2;
   freq = freqround(freq, 5000);
   printk("CPU frequency %d.%02d MHz\n", freq / 1000000, (freq % 1000000) * 100 / 1000000);
   mips_scroll_message();
 #ifdef CONFIG_I8253
   /* Only Malta has a PIT. */
   setup_pit_timer();
 #endif
 #ifdef CONFIG_MIPS_GIC
   if (gic_present) {
     freq = freqround(gic_frequency, 5000);
     printk("GIC frequency %d.%02d MHz\n", freq / 1000000, (freq % 1000000) * 100 / 1000000);
 #ifdef CONFIG_CLKSRC_MIPS_GIC
     update_gic_frequency_dt();
-    clocksource_probe();
+    timer_probe();
 #endif
   }
 #endif
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,12 +1,12 @@
 static void __init mediatek_timer_init(void) {
   void __iomem *gpt_base;
   if (of_machine_is_compatible("mediatek,mt6589") || of_machine_is_compatible("mediatek,mt7623") || of_machine_is_compatible("mediatek,mt8135") || of_machine_is_compatible("mediatek,mt8127")) {
     /* turn on GPT6 which ungates arch timer clocks */
     gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
     /* enable clock and set to free-run */
     writel(GPT_ENABLE, gpt_base);
     iounmap(gpt_base);
   }
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,4 +1,4 @@
 static void __init sh_of_time_init(void) {
   pr_info("SH generic board support: scanning for clocksource devices\n");
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,7 +1,7 @@
 void __init plat_time_init(void) {
   unsigned long rate = pic32_get_pbclk(7);
   of_clk_init(NULL);
   pr_info("CPU Clock: %ldMHz\n", rate / 1000000);
   mips_hpt_frequency = rate / 2;
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,18 +1,18 @@
 void __init plat_time_init(void) {
   struct device_node *np;
   struct clk *clk;
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
   np = of_get_cpu_node(0, NULL);
   if (!np) {
     pr_err("Failed to get CPU node\n");
     return;
   }
   clk = of_clk_get(np, 0);
   if (IS_ERR(clk)) {
     pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
     return;
   }
   mips_hpt_frequency = clk_get_rate(clk) / 2;
   clk_put(clk);
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,23 +1,23 @@
 static void __init rockchip_timer_init(void) {
   if (of_machine_is_compatible("rockchip,rk3288")) {
     void __iomem *reg_base;
     /*
      * Most/all uboot versions for rk3288 don't enable timer7
      * which is needed for the architected timer to work.
      * So make sure it is running during early boot.
      */
     reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
     if (reg_base) {
       writel(0, reg_base + 0x30);
       writel(0xffffffff, reg_base + 0x20);
       writel(0xffffffff, reg_base + 0x24);
       writel(1, reg_base + 0x30);
       dsb();
       iounmap(reg_base);
     } else {
       pr_err("rockchip: could not map timer7 registers\n");
     }
   }
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();
--- initial
+++ final
@@ -1,54 +1,54 @@
 void __init rcar_gen2_timer_init(void) {
 #ifdef CONFIG_ARM_ARCH_TIMER
   void __iomem *base;
   u32 freq;
   if (of_machine_is_compatible("renesas,r8a7792") || of_machine_is_compatible("renesas,r8a7794")) {
     freq = 260000000 / 8; /* ZS / 8 */
     /* CNTVOFF has to be initialized either from non-secure
      * Hypervisor mode or secure Monitor mode with SCR.NS==1.
      * If TrustZone is enabled then it should be handled by the
      * secure code.
      */
     asm volatile("	cps	0x16\n"
                  "	mrc	p15, 0, r1, c1, c1, 0\n"
                  "	orr	r0, r1, #1\n"
                  "	mcr	p15, 0, r0, c1, c1, 0\n"
                  "	isb\n"
                  "	mov	r0, #0\n"
                  "	mcrr	p15, 4, r0, r0, c14\n"
                  "	isb\n"
                  "	mcr	p15, 0, r1, c1, c1, 0\n"
                  "	isb\n"
                  "	cps	0x13\n"
                  :
                  :
                  : "r0", "r1");
   } else {
     /* At Linux boot time the r8a7790 arch timer comes up
      * with the counter disabled. Moreover, it may also report
      * a potentially incorrect fixed 13 MHz frequency. To be
      * correct these registers need to be updated to use the
      * frequency EXTAL / 2.
      */
     freq = get_extal_freq() / 2;
   }
   /* Remap "armgcnt address map" space */
   base = ioremap(0xe6080000, PAGE_SIZE);
   /*
    * Update the timer if it is either not running, or is not at the
    * right frequency. The timer is only configurable in secure mode
    * so this avoids an abort if the loader started the timer and
    * entered the kernel in non-secure mode.
    */
   if ((ioread32(base + CNTCR) & 1) == 0 || ioread32(base + CNTFID0) != freq) {
     /* Update registers with correct frequency */
     iowrite32(freq, base + CNTFID0);
     asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(freq));
     /* make sure arch timer is started by setting bit 0 of CNTCR */
     iowrite32(1, base + CNTCR);
   }
   iounmap(base);
 #endif /* CONFIG_ARM_ARCH_TIMER */
   of_clk_init(NULL);
-  clocksource_probe();
+  timer_probe();
 }<sep>@@
@@
-       clocksource_probe();
+       timer_probe();