--- initial
+++ final
@@ -1,67 +1,67 @@
 static void vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   int i;
   vega10_initialize_power_tune_defaults(hwmgr);
   for (i = 0; i < GNLD_FEATURES_MAX; i++) {
     data->smu_features[i].smu_feature_id = 0xffff;
     data->smu_features[i].smu_feature_bitmap = 1 << i;
     data->smu_features[i].enabled = false;
     data->smu_features[i].supported = false;
   }
   data->smu_features[GNLD_DPM_PREFETCHER].smu_feature_id = FEATURE_DPM_PREFETCHER_BIT;
   data->smu_features[GNLD_DPM_GFXCLK].smu_feature_id = FEATURE_DPM_GFXCLK_BIT;
   data->smu_features[GNLD_DPM_UCLK].smu_feature_id = FEATURE_DPM_UCLK_BIT;
   data->smu_features[GNLD_DPM_SOCCLK].smu_feature_id = FEATURE_DPM_SOCCLK_BIT;
   data->smu_features[GNLD_DPM_UVD].smu_feature_id = FEATURE_DPM_UVD_BIT;
   data->smu_features[GNLD_DPM_VCE].smu_feature_id = FEATURE_DPM_VCE_BIT;
   data->smu_features[GNLD_DPM_MP0CLK].smu_feature_id = FEATURE_DPM_MP0CLK_BIT;
   data->smu_features[GNLD_DPM_LINK].smu_feature_id = FEATURE_DPM_LINK_BIT;
   data->smu_features[GNLD_DPM_DCEFCLK].smu_feature_id = FEATURE_DPM_DCEFCLK_BIT;
   data->smu_features[GNLD_ULV].smu_feature_id = FEATURE_ULV_BIT;
   data->smu_features[GNLD_AVFS].smu_feature_id = FEATURE_AVFS_BIT;
   data->smu_features[GNLD_DS_GFXCLK].smu_feature_id = FEATURE_DS_GFXCLK_BIT;
   data->smu_features[GNLD_DS_SOCCLK].smu_feature_id = FEATURE_DS_SOCCLK_BIT;
   data->smu_features[GNLD_DS_LCLK].smu_feature_id = FEATURE_DS_LCLK_BIT;
   data->smu_features[GNLD_PPT].smu_feature_id = FEATURE_PPT_BIT;
   data->smu_features[GNLD_TDC].smu_feature_id = FEATURE_TDC_BIT;
   data->smu_features[GNLD_THERMAL].smu_feature_id = FEATURE_THERMAL_BIT;
   data->smu_features[GNLD_GFX_PER_CU_CG].smu_feature_id = FEATURE_GFX_PER_CU_CG_BIT;
   data->smu_features[GNLD_RM].smu_feature_id = FEATURE_RM_BIT;
   data->smu_features[GNLD_DS_DCEFCLK].smu_feature_id = FEATURE_DS_DCEFCLK_BIT;
   data->smu_features[GNLD_ACDC].smu_feature_id = FEATURE_ACDC_BIT;
   data->smu_features[GNLD_VR0HOT].smu_feature_id = FEATURE_VR0HOT_BIT;
   data->smu_features[GNLD_VR1HOT].smu_feature_id = FEATURE_VR1HOT_BIT;
   data->smu_features[GNLD_FW_CTF].smu_feature_id = FEATURE_FW_CTF_BIT;
   data->smu_features[GNLD_LED_DISPLAY].smu_feature_id = FEATURE_LED_DISPLAY_BIT;
   data->smu_features[GNLD_FAN_CONTROL].smu_feature_id = FEATURE_FAN_CONTROL_BIT;
   data->smu_features[GNLD_ACG].smu_feature_id = FEATURE_ACG_BIT;
   data->smu_features[GNLD_DIDT].smu_feature_id = FEATURE_GFX_EDC_BIT;
   if (!data->registry_data.prefetcher_dpm_key_disabled) data->smu_features[GNLD_DPM_PREFETCHER].supported = true;
   if (!data->registry_data.sclk_dpm_key_disabled) data->smu_features[GNLD_DPM_GFXCLK].supported = true;
   if (!data->registry_data.mclk_dpm_key_disabled) data->smu_features[GNLD_DPM_UCLK].supported = true;
   if (!data->registry_data.socclk_dpm_key_disabled) data->smu_features[GNLD_DPM_SOCCLK].supported = true;
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_UVDDPM)) data->smu_features[GNLD_DPM_UVD].supported = true;
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_VCEDPM)) data->smu_features[GNLD_DPM_VCE].supported = true;
+  if (PP_CAP(PHM_PlatformCaps_UVDDPM)) data->smu_features[GNLD_DPM_UVD].supported = true;
+  if (PP_CAP(PHM_PlatformCaps_VCEDPM)) data->smu_features[GNLD_DPM_VCE].supported = true;
   if (!data->registry_data.pcie_dpm_key_disabled) data->smu_features[GNLD_DPM_LINK].supported = true;
   if (!data->registry_data.dcefclk_dpm_key_disabled) data->smu_features[GNLD_DPM_DCEFCLK].supported = true;
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep) && data->registry_data.sclk_deep_sleep_support) {
+  if (PP_CAP(PHM_PlatformCaps_SclkDeepSleep) && data->registry_data.sclk_deep_sleep_support) {
     data->smu_features[GNLD_DS_GFXCLK].supported = true;
     data->smu_features[GNLD_DS_SOCCLK].supported = true;
     data->smu_features[GNLD_DS_LCLK].supported = true;
     data->smu_features[GNLD_DS_DCEFCLK].supported = true;
   }
   if (data->registry_data.enable_pkg_pwr_tracking_feature) data->smu_features[GNLD_PPT].supported = true;
   if (data->registry_data.enable_tdc_limit_feature) data->smu_features[GNLD_TDC].supported = true;
   if (data->registry_data.thermal_support) data->smu_features[GNLD_THERMAL].supported = true;
   if (data->registry_data.fan_control_support) data->smu_features[GNLD_FAN_CONTROL].supported = true;
   if (data->registry_data.fw_ctf_enabled) data->smu_features[GNLD_FW_CTF].supported = true;
   if (data->registry_data.avfs_support) data->smu_features[GNLD_AVFS].supported = true;
   if (data->registry_data.led_dpm_enabled) data->smu_features[GNLD_LED_DISPLAY].supported = true;
   if (data->registry_data.vr1hot_enabled) data->smu_features[GNLD_VR1HOT].supported = true;
   if (data->registry_data.vr0hot_enabled) data->smu_features[GNLD_VR0HOT].supported = true;
   smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_GetSmuVersion);
   vega10_read_arg_from_smc(hwmgr->smumgr, &(data->smu_version));
   /* ACG firmware has major version 5 */
   if ((data->smu_version & 0xff000000) == 0x5000000) data->smu_features[GNLD_ACG].supported = true;
   if (data->registry_data.didt_support) data->smu_features[GNLD_DIDT].supported = true;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)