imamnurby/smpl_train_seed8 huggingface dataset:
--- initial
+++ final
@@ -1,38 +1,38 @@
 static pgoff_t shmem_seek_hole_data(struct address_space *mapping, pgoff_t index, pgoff_t end, int whence) {
   struct page *page;
   struct pagevec pvec;
   pgoff_t indices[PAGEVEC_SIZE];
   bool done = false;
   int i;
-  pagevec_init(&pvec, 0);
+  pagevec_init(&pvec);
   pvec.nr = 1; /* start small: we may be there already */
   while (!done) {
     pvec.nr = find_get_entries(mapping, index, pvec.nr, pvec.pages, indices);
     if (!pvec.nr) {
       if (whence == SEEK_DATA) index = end;
       break;
     }
     for (i = 0; i < pvec.nr; i++, index++) {
       if (index < indices[i]) {
         if (whence == SEEK_HOLE) {
           done = true;
           break;
         }
         index = indices[i];
       }
       page = pvec.pages[i];
       if (page && !radix_tree_exceptional_entry(page)) {
         if (!PageUptodate(page)) page = NULL;
       }
       if (index >= end || (page && whence == SEEK_DATA) || (!page && whence == SEEK_HOLE)) {
         done = true;
         break;
       }
     }
     pagevec_remove_exceptionals(&pvec);
     pagevec_release(&pvec);
     pvec.nr = PAGEVEC_SIZE;
     cond_resched();
   }
   return index;
 }<sep>@@
expression x,e;
@@
-       pagevec_init(x, e);
+       pagevec_init(x);
--- initial
+++ final
@@ -1,8 +1,8 @@
 void __pagevec_release(struct pagevec *pvec) {
   if (!pvec->drained) {
     lru_add_drain();
     pvec->drained = true;
   }
-  release_pages(pvec->pages, pagevec_count(pvec), pvec->cold);
+  release_pages(pvec->pages, pagevec_count(pvec), 0);
   pagevec_reinit(pvec);
 }<sep>@@
struct pagevec *pvec;
expression ct;
@@
-	release_pages(pvec->pages, ct, pvec->cold);
+	release_pages(pvec->pages, ct, 0);
--- initial
+++ final
@@ -1,20 +1,20 @@
 static void pagevec_lru_move_fn(struct pagevec *pvec, void (*move_fn)(struct page *page, struct lruvec *lruvec, void *arg), void *arg) {
   int i;
   struct pglist_data *pgdat = NULL;
   struct lruvec *lruvec;
   unsigned long flags = 0;
   for (i = 0; i < pagevec_count(pvec); i++) {
     struct page *page = pvec->pages[i];
     struct pglist_data *pagepgdat = page_pgdat(page);
     if (pagepgdat != pgdat) {
       if (pgdat) spin_unlock_irqrestore(&pgdat->lru_lock, flags);
       pgdat = pagepgdat;
       spin_lock_irqsave(&pgdat->lru_lock, flags);
     }
     lruvec = mem_cgroup_page_lruvec(page, pgdat);
     (*move_fn)(page, lruvec, arg);
   }
   if (pgdat) spin_unlock_irqrestore(&pgdat->lru_lock, flags);
-  release_pages(pvec->pages, pvec->nr, pvec->cold);
+  release_pages(pvec->pages, pvec->nr, 0);
   pagevec_reinit(pvec);
 }<sep>@@
struct pagevec *pvec;
expression ct;
@@
-	release_pages(pvec->pages, ct, pvec->cold);
+	release_pages(pvec->pages, ct, 0);
--- initial
+++ final
@@ -1,67 +1,67 @@
 int invalidate_inode_pages2_range(struct address_space *mapping, pgoff_t start, pgoff_t end) {
   pgoff_t indices[PAGEVEC_SIZE];
   struct pagevec pvec;
   pgoff_t index;
   int i;
   int ret = 0;
   int ret2 = 0;
   int did_range_unmap = 0;
   if (mapping->nrpages == 0 && mapping->nrexceptional == 0) goto out;
-  pagevec_init(&pvec, 0);
+  pagevec_init(&pvec);
   index = start;
   while (index <= end && pagevec_lookup_entries(&pvec, mapping, index, min(end - index, (pgoff_t)PAGEVEC_SIZE - 1) + 1, indices)) {
     for (i = 0; i < pagevec_count(&pvec); i++) {
       struct page *page = pvec.pages[i];
       /* We rely upon deletion not changing page->index */
       index = indices[i];
       if (index > end) break;
       if (radix_tree_exceptional_entry(page)) {
         if (!invalidate_exceptional_entry2(mapping, index, page)) ret = -EBUSY;
         continue;
       }
       lock_page(page);
       WARN_ON(page_to_index(page) != index);
       if (page->mapping != mapping) {
         unlock_page(page);
         continue;
       }
       wait_on_page_writeback(page);
       if (page_mapped(page)) {
         if (!did_range_unmap) {
           /*
            * Zap the rest of the file in one hit.
            */
           unmap_mapping_range(mapping, (loff_t)index << PAGE_SHIFT, (loff_t)(1 + end - index) << PAGE_SHIFT, 0);
           did_range_unmap = 1;
         } else {
           /*
            * Just zap this page
            */
           unmap_mapping_range(mapping, (loff_t)index << PAGE_SHIFT, PAGE_SIZE, 0);
         }
       }
       BUG_ON(page_mapped(page));
       ret2 = do_launder_page(mapping, page);
       if (ret2 == 0) {
         if (!invalidate_complete_page2(mapping, page)) ret2 = -EBUSY;
       }
       if (ret2 < 0) ret = ret2;
       unlock_page(page);
     }
     pagevec_remove_exceptionals(&pvec);
     pagevec_release(&pvec);
     cond_resched();
     index++;
   }
   /*
    * For DAX we invalidate page tables after invalidating radix tree.  We
    * could invalidate page tables while invalidating each entry however
    * that would be expensive. And doing range unmapping before doesn't
    * work as we have no cheap way to find whether radix tree entry didn't
    * get remapped later.
    */
   if (dax_mapping(mapping)) { unmap_mapping_range(mapping, (loff_t)start << PAGE_SHIFT, (loff_t)(end - start + 1) << PAGE_SHIFT, 0); }
 out:
   cleancache_invalidate_inode(mapping);
   return ret;
 }<sep>@@
expression x,e;
@@
-       pagevec_init(x, e);
+       pagevec_init(x);
--- initial
+++ final
@@ -1,53 +1,53 @@
 unsigned long invalidate_mapping_pages(struct address_space *mapping, pgoff_t start, pgoff_t end) {
   pgoff_t indices[PAGEVEC_SIZE];
   struct pagevec pvec;
   pgoff_t index = start;
   unsigned long ret;
   unsigned long count = 0;
   int i;
-  pagevec_init(&pvec, 0);
+  pagevec_init(&pvec);
   while (index <= end && pagevec_lookup_entries(&pvec, mapping, index, min(end - index, (pgoff_t)PAGEVEC_SIZE - 1) + 1, indices)) {
     for (i = 0; i < pagevec_count(&pvec); i++) {
       struct page *page = pvec.pages[i];
       /* We rely upon deletion not changing page->index */
       index = indices[i];
       if (index > end) break;
       if (radix_tree_exceptional_entry(page)) {
         invalidate_exceptional_entry(mapping, index, page);
         continue;
       }
       if (!trylock_page(page)) continue;
       WARN_ON(page_to_index(page) != index);
       /* Middle of THP: skip */
       if (PageTransTail(page)) {
         unlock_page(page);
         continue;
       } else if (PageTransHuge(page)) {
         index += HPAGE_PMD_NR - 1;
         i += HPAGE_PMD_NR - 1;
         /*
          * 'end' is in the middle of THP. Don't
          * invalidate the page as the part outside of
          * 'end' could be still useful.
          */
         if (index > end) {
           unlock_page(page);
           continue;
         }
       }
       ret = invalidate_inode_page(page);
       unlock_page(page);
       /*
        * Invalidation is a hint that the page is no longer
        * of interest and try to speed up its reclaim.
        */
       if (!ret) deactivate_file_page(page);
       count += ret;
     }
     pagevec_remove_exceptionals(&pvec);
     pagevec_release(&pvec);
     cond_resched();
     index++;
   }
   return count;
 }<sep>@@
expression x,e;
@@
-       pagevec_init(x, e);
+       pagevec_init(x);
--- initial
+++ final
@@ -1,22 +1,22 @@
 static void afs_kill_pages(struct afs_vnode *vnode, bool error, pgoff_t first, pgoff_t last) {
   struct pagevec pv;
   unsigned count, loop;
   _enter("{%x:%u},%lx-%lx", vnode->fid.vid, vnode->fid.vnode, first, last);
-  pagevec_init(&pv, 0);
+  pagevec_init(&pv);
   do {
     _debug("kill %lx-%lx", first, last);
     count = last - first + 1;
     if (count > PAGEVEC_SIZE) count = PAGEVEC_SIZE;
     pv.nr = find_get_pages_contig(vnode->vfs_inode.i_mapping, first, count, pv.pages);
     ASSERTCMP(pv.nr, ==, count);
     for (loop = 0; loop < count; loop++) {
       struct page *page = pv.pages[loop];
       ClearPageUptodate(page);
       if (error) SetPageError(page);
       if (PageWriteback(page)) end_page_writeback(page);
       if (page->index >= first) first = page->index + 1;
     }
     __pagevec_release(&pv);
   } while (first < last);
   _leave("");
 }<sep>@@
expression x,e;
@@
-       pagevec_init(x, e);
+       pagevec_init(x);
--- initial
+++ final
@@ -1,40 +1,40 @@
 void afs_pages_written_back(struct afs_vnode *vnode, struct afs_call *call) {
   struct afs_writeback *wb = call->wb;
   struct pagevec pv;
   unsigned count, loop;
   pgoff_t first = call->first, last = call->last;
   bool free_wb;
   _enter("{%x:%u},{%lx-%lx}", vnode->fid.vid, vnode->fid.vnode, first, last);
   ASSERT(wb != NULL);
-  pagevec_init(&pv, 0);
+  pagevec_init(&pv);
   do {
     _debug("done %lx-%lx", first, last);
     count = last - first + 1;
     if (count > PAGEVEC_SIZE) count = PAGEVEC_SIZE;
     pv.nr = find_get_pages_contig(call->mapping, first, count, pv.pages);
     ASSERTCMP(pv.nr, ==, count);
     spin_lock(&vnode->writeback_lock);
     for (loop = 0; loop < count; loop++) {
       struct page *page = pv.pages[loop];
       end_page_writeback(page);
       if (page_private(page) == (unsigned long)wb) {
         set_page_private(page, 0);
         ClearPagePrivate(page);
         wb->usage--;
       }
     }
     free_wb = false;
     if (wb->usage == 0) {
       afs_unlink_writeback(wb);
       free_wb = true;
     }
     spin_unlock(&vnode->writeback_lock);
     first += count;
     if (free_wb) {
       afs_free_writeback(wb);
       wb = NULL;
     }
     __pagevec_release(&pv);
   } while (first <= last);
   _leave("");
 }<sep>@@
expression x,e;
@@
-       pagevec_init(x, e);
+       pagevec_init(x);
--- initial
+++ final
@@ -1,11 +1,11 @@
 static bool vega10_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   bool is_update_required = false;
   struct cgs_display_info info = {0, 0, NULL};
   cgs_get_active_displays_info(hwmgr->device, &info);
   if (data->display_timing.num_existing_displays != info.display_count) is_update_required = true;
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
+  if (PP_CAP(PHM_PlatformCaps_SclkDeepSleep)) {
     if (data->display_timing.min_clock_in_sr != hwmgr->display_config.min_core_set_clock_in_sr) is_update_required = true;
   }
   return is_update_required;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,21 +1,21 @@
 static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) {
   int tmp_result, result = 0;
   tmp_result = (vega10_is_dpm_running(hwmgr)) ? 0 : -1;
   PP_ASSERT_WITH_CODE(tmp_result == 0, "DPM is not running right now, no need to disable DPM!", return 0);
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ThermalController)) vega10_disable_thermal_protection(hwmgr);
+  if (PP_CAP(PHM_PlatformCaps_ThermalController)) vega10_disable_thermal_protection(hwmgr);
   tmp_result = vega10_disable_power_containment(hwmgr);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable power containment!", result = tmp_result);
   tmp_result = vega10_disable_didt_config(hwmgr);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable didt config!", result = tmp_result);
   tmp_result = vega10_avfs_enable(hwmgr, false);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable AVFS!", result = tmp_result);
   tmp_result = vega10_stop_dpm(hwmgr, SMC_DPM_FEATURES);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to stop DPM!", result = tmp_result);
   tmp_result = vega10_disable_deep_sleep_master_switch(hwmgr);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable deep sleep!", result = tmp_result);
   tmp_result = vega10_disable_ulv(hwmgr);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable ulv!", result = tmp_result);
   tmp_result = vega10_acg_disable(hwmgr);
   PP_ASSERT_WITH_CODE((tmp_result == 0), "Failed to disable acg!", result = tmp_result);
   return result;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,33 +1,33 @@
 static int vega10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   int tmp_result, result = 0;
   tmp_result = smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, PPSMC_MSG_ConfigureTelemetry, data->config_telemetry);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to configure telemetry!", return tmp_result);
   smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, PPSMC_MSG_NumOfDisplays, 0);
   tmp_result = (!vega10_is_dpm_running(hwmgr)) ? 0 : -1;
   PP_ASSERT_WITH_CODE(!tmp_result, "DPM is already running right , skipping re-enablement!", return 0);
   tmp_result = vega10_construct_voltage_tables(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to contruct voltage tables!", result = tmp_result);
   tmp_result = vega10_init_smc_table(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to initialize SMC table!", result = tmp_result);
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ThermalController)) {
+  if (PP_CAP(PHM_PlatformCaps_ThermalController)) {
     tmp_result = vega10_enable_thermal_protection(hwmgr);
     PP_ASSERT_WITH_CODE(!tmp_result, "Failed to enable thermal protection!", result = tmp_result);
   }
   tmp_result = vega10_enable_vrhot_feature(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to enable VR hot feature!", result = tmp_result);
   tmp_result = vega10_enable_deep_sleep_master_switch(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to enable deep sleep master switch!", result = tmp_result);
   tmp_result = vega10_start_dpm(hwmgr, SMC_DPM_FEATURES);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to start DPM!", result = tmp_result);
   /* enable didt, do not abort if failed didt */
   tmp_result = vega10_enable_didt_config(hwmgr);
   PP_ASSERT(!tmp_result, "Failed to enable didt config!");
   tmp_result = vega10_enable_power_containment(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to enable power containment!", result = tmp_result);
   tmp_result = vega10_power_control_set_level(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to power control set level!", result = tmp_result);
   tmp_result = vega10_enable_ulv(hwmgr);
   PP_ASSERT_WITH_CODE(!tmp_result, "Failed to enable ULV!", result = tmp_result);
   return result;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,15 +1,15 @@
 static int vega10_enable_vrhot_feature(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_RegulatorHot)) {
+  if (PP_CAP(PHM_PlatformCaps_RegulatorHot)) {
     if (data->smu_features[GNLD_VR0HOT].supported) {
       PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(hwmgr->smumgr, true, data->smu_features[GNLD_VR0HOT].smu_feature_bitmap), "Attempt to Enable VR0 Hot feature Failed!", return -1);
       data->smu_features[GNLD_VR0HOT].enabled = true;
     } else {
       if (data->smu_features[GNLD_VR1HOT].supported) {
         PP_ASSERT_WITH_CODE(!vega10_enable_smc_features(hwmgr->smumgr, true, data->smu_features[GNLD_VR1HOT].smu_feature_bitmap), "Attempt to Enable VR0 Hot feature Failed!", return -1);
         data->smu_features[GNLD_VR1HOT].enabled = true;
       }
     }
   }
   return 0;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,45 +1,45 @@
 static int vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, const void *input) {
   const struct phm_set_power_state_input *states = (const struct phm_set_power_state_input *)input;
   const struct vega10_power_state *vega10_ps = cast_const_phw_vega10_power_state(states->pnew_state);
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table);
   uint32_t sclk = vega10_ps->performance_levels[vega10_ps->performance_level_count - 1].gfx_clock;
   struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table);
   uint32_t mclk = vega10_ps->performance_levels[vega10_ps->performance_level_count - 1].mem_clock;
   struct PP_Clocks min_clocks = {0};
   uint32_t i;
   struct cgs_display_info info = {0};
   data->need_update_dpm_table = 0;
-  if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ODNinACSupport) || phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ODNinDCSupport)) {
+  if (PP_CAP(PHM_PlatformCaps_ODNinACSupport) || PP_CAP(PHM_PlatformCaps_ODNinDCSupport)) {
     for (i = 0; i < sclk_table->count; i++) {
       if (sclk == sclk_table->dpm_levels[i].value) break;
     }
     if (!(data->apply_overdrive_next_settings_mask & DPMTABLE_OD_UPDATE_SCLK) && i >= sclk_table->count) {
       /* Check SCLK in DAL's minimum clocks
        * in case DeepSleep divider update is required.
        */
       if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && (min_clocks.engineClockInSR >= VEGA10_MINIMUM_ENGINE_CLOCK || data->display_timing.min_clock_in_sr >= VEGA10_MINIMUM_ENGINE_CLOCK)) data->need_update_dpm_table |= DPMTABLE_UPDATE_SCLK;
     }
     cgs_get_active_displays_info(hwmgr->device, &info);
     if (data->display_timing.num_existing_displays != info.display_count) data->need_update_dpm_table |= DPMTABLE_UPDATE_MCLK;
   } else {
     for (i = 0; i < sclk_table->count; i++) {
       if (sclk == sclk_table->dpm_levels[i].value) break;
     }
     if (i >= sclk_table->count)
       data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;
     else {
       /* Check SCLK in DAL's minimum clocks
        * in case DeepSleep divider update is required.
        */
       if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && (min_clocks.engineClockInSR >= VEGA10_MINIMUM_ENGINE_CLOCK || data->display_timing.min_clock_in_sr >= VEGA10_MINIMUM_ENGINE_CLOCK)) data->need_update_dpm_table |= DPMTABLE_UPDATE_SCLK;
     }
     for (i = 0; i < mclk_table->count; i++) {
       if (mclk == mclk_table->dpm_levels[i].value) break;
     }
     cgs_get_active_displays_info(hwmgr->device, &info);
     if (i >= mclk_table->count) data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;
     if (data->display_timing.num_existing_displays != info.display_count || i >= mclk_table->count) data->need_update_dpm_table |= DPMTABLE_UPDATE_MCLK;
   }
   return 0;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,33 +1,33 @@
 static int vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   uint16_t vv_id;
   uint32_t vddc = 0;
   uint16_t i, j;
   uint32_t sclk = 0;
   struct phm_ppt_v2_information *table_info = (struct phm_ppt_v2_information *)hwmgr->pptable;
   struct phm_ppt_v1_clock_voltage_dependency_table *socclk_table = table_info->vdd_dep_on_socclk;
   int result;
   for (i = 0; i < VEGA10_MAX_LEAKAGE_COUNT; i++) {
     vv_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i;
     if (!vega10_get_socclk_for_voltage_evv(hwmgr, table_info->vddc_lookup_table, vv_id, &sclk)) {
-      if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ClockStretcher)) {
+      if (PP_CAP(PHM_PlatformCaps_ClockStretcher)) {
         for (j = 1; j < socclk_table->count; j++) {
           if (socclk_table->entries[j].clk == sclk && socclk_table->entries[j].cks_enable == 0) {
             sclk += 5000;
             break;
           }
         }
       }
       PP_ASSERT_WITH_CODE(!atomctrl_get_voltage_evv_on_sclk_ai(hwmgr, VOLTAGE_TYPE_VDDC, sclk, vv_id, &vddc), "Error retrieving EVV voltage value!", continue);
       /* need to make sure vddc is less than 2v or else, it could burn the ASIC. */
       PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0), "Invalid VDDC value", result = -EINVAL;);
       /* the voltage should not be zero nor equal to leakage ID */
       if (vddc != 0 && vddc != vv_id) {
         data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = (uint16_t)(vddc / 100);
         data->vddc_leakage.leakage_id[data->vddc_leakage.count] = vv_id;
         data->vddc_leakage.count++;
       }
     }
   }
   return 0;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,28 +1,28 @@
 static int vega10_populate_gpio_parameters(struct pp_hwmgr *hwmgr) {
   struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
   PPTable_t *pp_table = &(data->smc_state_table.pp_table);
   struct pp_atomfwctrl_gpio_parameters gpio_params = {0};
   int result;
   result = pp_atomfwctrl_get_gpio_information(hwmgr, &gpio_params);
   if (!result) {
-    if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_RegulatorHot) && (data->registry_data.regulator_hot_gpio_support)) {
+    if (PP_CAP(PHM_PlatformCaps_RegulatorHot) && (data->registry_data.regulator_hot_gpio_support)) {
       pp_table->VR0HotGpio = gpio_params.ucVR0HotGpio;
       pp_table->VR0HotPolarity = gpio_params.ucVR0HotPolarity;
       pp_table->VR1HotGpio = gpio_params.ucVR1HotGpio;
       pp_table->VR1HotPolarity = gpio_params.ucVR1HotPolarity;
     } else {
       pp_table->VR0HotGpio = 0;
       pp_table->VR0HotPolarity = 0;
       pp_table->VR1HotGpio = 0;
       pp_table->VR1HotPolarity = 0;
     }
-    if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_AutomaticDCTransition) && (data->registry_data.ac_dc_switch_gpio_support)) {
+    if (PP_CAP(PHM_PlatformCaps_AutomaticDCTransition) && (data->registry_data.ac_dc_switch_gpio_support)) {
       pp_table->AcDcGpio = gpio_params.ucAcDcGpio;
       pp_table->AcDcPolarity = gpio_params.ucAcDcPolarity;
     } else {
       pp_table->AcDcGpio = 0;
       pp_table->AcDcPolarity = 0;
     }
   }
   return result;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)
--- initial
+++ final
@@ -1,15 +1,15 @@
 static int vega10_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) {
   int result = 0;
   switch (mode) {
   case AMD_FAN_CTRL_NONE: result = vega10_fan_ctrl_set_fan_speed_percent(hwmgr, 100); break;
   case AMD_FAN_CTRL_MANUAL:
-    if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl)) result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
+    if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl)) result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
     break;
   case AMD_FAN_CTRL_AUTO:
     result = vega10_fan_ctrl_set_static_mode(hwmgr, mode);
     if (!result) result = vega10_fan_ctrl_start_smc_fan_control(hwmgr);
     break;
   default: break;
   }
   return result;
 }<sep>@@
expression hwmgr,e;
@@
- phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,e)
+ PP_CAP(e)