Datasets:

imamnurby

/

smpl_train_seed42

like 0

--- initial +++ final @@ -1,57 +1,57 @@ static bool _rtl8723e_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, u8 channel, u8 *stage, u8 *step, u32 *delay) { struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_phy *rtlphy = &rtlpriv->phy; struct swchnlcmd precommoncmd[MAX_PRECMD_CNT]; u32 precommoncmdcnt; struct swchnlcmd postcommoncmd[MAX_POSTCMD_CNT]; u32 postcommoncmdcnt; struct swchnlcmd rfdependcmd[MAX_RFDEPENDCMD_CNT]; u32 rfdependcmdcnt; struct swchnlcmd *currentcmd = NULL; u8 rfpath; u8 num_total_rfpath = rtlphy->num_total_rfpath; precommoncmdcnt = 0; rtl8723_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++, MAX_PRECMD_CNT, CMDID_SET_TXPOWEROWER_LEVEL, 0, 0, 0); rtl8723_phy_set_sw_chnl_cmdarray(precommoncmd, precommoncmdcnt++, MAX_PRECMD_CNT, CMDID_END, 0, 0, 0); postcommoncmdcnt = 0; rtl8723_phy_set_sw_chnl_cmdarray(postcommoncmd, postcommoncmdcnt++, MAX_POSTCMD_CNT, CMDID_END, 0, 0, 0); rfdependcmdcnt = 0; - RT_ASSERT((channel >= 1 && channel <= 14), "illegal channel for Zebra: %d\n", channel); + WARN_ONCE((channel < 1 || channel > 14), "illegal channel for Zebra: %d\n", channel); rtl8723_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, MAX_RFDEPENDCMD_CNT, CMDID_RF_WRITEREG, RF_CHNLBW, channel, 10); rtl8723_phy_set_sw_chnl_cmdarray(rfdependcmd, rfdependcmdcnt++, MAX_RFDEPENDCMD_CNT, CMDID_END, 0, 0, 0); do { switch (*stage) { case 0: currentcmd = &precommoncmd[*step]; break; case 1: currentcmd = &rfdependcmd[*step]; break; case 2: currentcmd = &postcommoncmd[*step]; break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Invalid 'stage' = %d, Check it!\n", *stage); return true; } if (currentcmd->cmdid == CMDID_END) { if ((*stage) == 2) { return true; } else { (*stage)++; (*step) = 0; continue; } } switch (currentcmd->cmdid) { case CMDID_SET_TXPOWEROWER_LEVEL: rtl8723e_phy_set_txpower_level(hw, channel); break; case CMDID_WRITEPORT_ULONG: rtl_write_dword(rtlpriv, currentcmd->para1, currentcmd->para2); break; case CMDID_WRITEPORT_USHORT: rtl_write_word(rtlpriv, currentcmd->para1, (u16)currentcmd->para2); break; case CMDID_WRITEPORT_UCHAR: rtl_write_byte(rtlpriv, currentcmd->para1, (u8)currentcmd->para2); break; case CMDID_RF_WRITEREG: for (rfpath = 0; rfpath < num_total_rfpath; rfpath++) { rtlphy->rfreg_chnlval[rfpath] = ((rtlphy->rfreg_chnlval[rfpath] & 0xfffffc00) | currentcmd->para2); rtl_set_rfreg(hw, (enum radio_path)rfpath, currentcmd->para1, RFREG_OFFSET_MASK, rtlphy->rfreg_chnlval[rfpath]); } _rtl8723e_phy_sw_rf_seting(hw, channel); break; default: RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD, "switch case %#x not processed\n", currentcmd->cmdid); break; } break; } while (true); (*delay) = currentcmd->msdelay; (*step)++; return false; }<sep>@@ expression list e; expression e1,e2,e3; @@ - RT_ASSERT((e1 >= e2 && e1 <= e3),e) + WARN_ONCE((e1 < e2 || e1 > e3),e) <|end_of_text|>

--- initial +++ final @@ -1,11 +1,11 @@ void rtl8723be_set_qos(struct ieee80211_hw *hw, int aci) { struct rtl_priv *rtlpriv = rtl_priv(hw); rtl8723_dm_init_edca_turbo(hw); switch (aci) { case AC1_BK: rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); break; case AC0_BE: break; case AC2_VI: rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); break; case AC3_VO: rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); break; - default: RT_ASSERT(false, "invalid aci: %d !\n", aci); break; + default: WARN_ONCE(true, "invalid aci: %d !\n", aci); break; } }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,23 +1,23 @@ u16 rtl8192cu_mq_to_hwq(__le16 fc, u16 mac80211_queue_index) { u16 hw_queue_index; if (unlikely(ieee80211_is_beacon(fc))) { hw_queue_index = RTL_TXQ_BCN; goto out; } if (ieee80211_is_mgmt(fc)) { hw_queue_index = RTL_TXQ_MGT; goto out; } switch (mac80211_queue_index) { case 0: hw_queue_index = RTL_TXQ_VO; break; case 1: hw_queue_index = RTL_TXQ_VI; break; case 2: hw_queue_index = RTL_TXQ_BE; break; case 3: hw_queue_index = RTL_TXQ_BK; break; default: hw_queue_index = RTL_TXQ_BE; - RT_ASSERT(false, "QSLT_BE queue, skb_queue:%d\n", mac80211_queue_index); + WARN_ONCE(true, "QSLT_BE queue, skb_queue:%d\n", mac80211_queue_index); break; } out: return hw_queue_index; }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,9 +1,9 @@ static int __init rtl92de_module_init(void) { int ret = 0; spin_lock_init(&globalmutex_power); spin_lock_init(&globalmutex_for_fwdownload); spin_lock_init(&globalmutex_for_power_and_efuse); ret = pci_register_driver(&rtl92de_driver); - if (ret) RT_ASSERT(false, "No device found\n"); + if (ret) WARN_ONCE(true, "No device found\n"); return ret; }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,17 +1,17 @@ void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx, u8 desc_name, u8 *val) { if (istx == true) { switch (desc_name) { case HW_DESC_OWN: SET_TX_DESC_OWN(pdesc, 1); break; case HW_DESC_TX_NEXTDESC_ADDR: SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val); break; - default: RT_ASSERT(false, "ERR txdesc :%d not process\n", desc_name); break; + default: WARN_ONCE(true, "ERR txdesc :%d not process\n", desc_name); break; } } else { switch (desc_name) { case HW_DESC_RXOWN: SET_RX_DESC_OWN(pdesc, 1); break; case HW_DESC_RXBUFF_ADDR: SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val); break; case HW_DESC_RXPKT_LEN: SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val); break; case HW_DESC_RXERO: SET_RX_DESC_EOR(pdesc, 1); break; - default: RT_ASSERT(false, "ERR rxdesc :%d not process\n", desc_name); break; + default: WARN_ONCE(true, "ERR rxdesc :%d not process\n", desc_name); break; } } }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,18 +1,18 @@ u32 rtl8821ae_get_desc(u8 *pdesc, bool istx, u8 desc_name) { u32 ret = 0; if (istx) { switch (desc_name) { case HW_DESC_OWN: ret = GET_TX_DESC_OWN(pdesc); break; case HW_DESC_TXBUFF_ADDR: ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc); break; - default: RT_ASSERT(false, "ERR txdesc :%d not process\n", desc_name); break; + default: WARN_ONCE(true, "ERR txdesc :%d not process\n", desc_name); break; } } else { switch (desc_name) { case HW_DESC_OWN: ret = GET_RX_DESC_OWN(pdesc); break; case HW_DESC_RXPKT_LEN: ret = GET_RX_DESC_PKT_LEN(pdesc); break; case HW_DESC_RXBUFF_ADDR: ret = GET_RX_DESC_BUFF_ADDR(pdesc); break; - default: RT_ASSERT(false, "ERR rxdesc :%d not process\n", desc_name); break; + default: WARN_ONCE(true, "ERR rxdesc :%d not process\n", desc_name); break; } } return ret; }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,14 +1,14 @@ static bool _rtl92d_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable, u32 cmdtableidx, u32 cmdtablesz, enum swchnlcmd_id cmdid, u32 para1, u32 para2, u32 msdelay) { struct swchnlcmd *pcmd; if (cmdtable == NULL) { - RT_ASSERT(false, "cmdtable cannot be NULL\n"); + WARN_ONCE(true, "cmdtable cannot be NULL\n"); return false; } if (cmdtableidx >= cmdtablesz) return false; pcmd = cmdtable + cmdtableidx; pcmd->cmdid = cmdid; pcmd->para1 = para1; pcmd->para2 = para2; pcmd->msdelay = msdelay; return true; }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>

--- initial +++ final @@ -1,12 +1,12 @@ void rtl88e_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id, u32 cmd_len, u8 *cmdbuffer) { struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); u32 tmp_cmdbuf[2]; if (!rtlhal->fw_ready) { - RT_ASSERT(false, "return H2C cmd because of Fw download fail!!!\n"); + WARN_ONCE(true, "return H2C cmd because of Fw download fail!!!\n"); return; } memset(tmp_cmdbuf, 0, 8); memcpy(tmp_cmdbuf, cmdbuffer, cmd_len); _rtl88e_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf); return; }<sep>@@ expression list e; @@ - RT_ASSERT(false,e) + WARN_ONCE(true,e) <|end_of_text|>