GitHub repository: wwagner33/adpll-vhdl
Primary language: VHDL
Created: 2021-09-05T17:48:03Z
Description: All-Digital Phase-Locked Loops (ADPLL) code in High Speed Integrated Circuit Hardware Description Language (VHDL) for a Field Programmable Gate Array (FPGA). The code is for the Intel/Altera Cyclone V FPGA.