GitHub repository: teylorwong/ELEX7660-Digital_System_Design
Created: 2025-01-17T03:46:26Z
Description: This is a 3rd year BCIT BEng Electrical course with the following description: Students learn to decompose problems and implement solutions using a combination of RTL synthesis and third-party IP. The course concentrates on FPGA technology and the use of HDLs for synthesis.