GitHub repository: Bimsara-Janakantha/RV32IM-Pipelined-Processor
Primary language: VHDL
Description: Design and implementation of a 32-bit RISC-V processor supporting the RV32IM instruction set, developed as part of the Advanced Computer Architecture course (CO502). Webpage: https://cepdnaclk.github.io/e20-co502-RV32IM_Pipelined_Processor