GitHub repository: DakshKr/CO-Assembler-Simulator
Primary language: Python
Created: 2025-02-12T06:40:49Z
Description: RISC-V Assembler & Simulator: A toolchain for a subset of the RV32I ISA. The assembler converts RISC-V assembly code into 32-bit binary with error-checking and label resolution. The simulator executes the binary, outputting register/memory traces and a final dump at Virtual Halt. Ideal for Computer Organisation assignments.