GitHub repository: Jayakrishnasiddhartha/Digital-clock-using-FPGA
Created: 2024-11-16T12:03:17Z
Description: This repository contains a Verilog implementation of a digital clock module designed for FPGA applications. The project showcases the use of finite state machines and combinational logic to manage time representation and display on a seven-segment display. The clock counts in hours, minutes, and seconds, and resets after reaching 12:59:59.