hybridfree/eevblog-posts huggingface dataset:
'standard' footprint for female micro usb-b connetor ? - Page 1
Forum section: electronics / general

author: Jaunedeau
author_rank: Regular Contributor
timestamp: July 16, 2016, 05:25:38 am
content: Hi,I am working on a something device that blinks leds through usb that I will probably opensource. Every part will be easy to source, but I am a bit worried about the usb connector : if I choose one particular reference of one manufacturer, people will need to order on a shop which stock it. It will probably mean digikey or mouser, and shipping will be more expensive than every component + the pcb (target price at $5).Is there a generic footprint that can be used for "aliexpress" usb connectors ?Thank you,jaune.

author: sleemanj
author_rank: Super Contributor
timestamp: July 16, 2016, 05:59:12 am
content: Micro-B connectors come in various flavours. The most common however looks like this...http://sparks.gogo.co.nz/.tmp/assets/_site_/images/products/640x480/padded/640x480/000/usb-micro-b.jpgyou can see it has two flat tabs for adhering to the board, there are also two locating pins (plastic) just either side of the pins.Here is a footprint I have drawn and used with this type (hand-soldered, hence the very long pads)

author: zapta
author_rank: Super Contributor
timestamp: July 16, 2016, 06:08:54 am
content: I suggest to add small vias in the four mechanical pads, for extra strength. Otherwise the pads may peel with modest force on the connector.

author: wraper
author_rank: Unknown
timestamp: July 16, 2016, 07:25:12 am
content: Don't suggest using microUSB connectors without 4 or at least 2 through hole mounts (completely paste/reflow compatible). They are very easy to rip off the board, usually together with copper layer.
PADS: Ripup all modeless command in layout? - Page 1
Forum section: electronics / general

author: Pack34
author_rank: Frequent Contributor
timestamp: July 15, 2016, 05:59:46 pm
content: In Eagle I often used the "ripup *" command to unroute the entire board when I decide to try something different.Is there a modeless command that I'm missing in PADS layout to do this?

author: Pack34
author_rank: Frequent Contributor
timestamp: July 15, 2016, 06:08:12 pm
content: I just realized I could just switch to "Select Nets" then highlight the design and hit delete.
Mouse wheel control - AutoCad & Eagle versus CS/CM - Page 1
Forum section: electronics / general

author: IanJ
author_rank: Unknown
timestamp: July 15, 2016, 11:32:46 am
content: Hi all,I'm embarking on a full-on CircuitStudio evaluation, taking one of my existing Eagle PCB designs and migrating it to CS. I want every component and track in the same place. I did this with AutoTrax DEX and it was a great way to evaluate (I won't tell you how it ended!). No importing allowed, the idea is to work through the full workflow from scratch and as a brand new Altium user.However, as well as a long time Eagle PCB user I am also a daily AutoCad user.......and as luck would have it the mouse actions are very similar, notably the mouse wheel press and hold to pan without using the keyboard.CS (& CM) don't appear to allow that exact configuration, so I went about remapping the mouse wheel.......and happened on this app:https://www.highrez.co.uk/downloads/xmousebuttoncontrol.htmWhich allows remapping on a per app basis (so it won't affect other apps on my PC). Seems to work a treat, just re-map the MIDDLE BUTTON to RIGHT CLICK.Yes, I could probably get used to right click to pan in CS.......but as I use AutoCad daily also I just don't want to have two methods.Subject to full testing of course to make sure that it doesn't break any CS functionality, but it does mean that EAGLE PCB users should be able to mimic the mouse wheel fully in CS or CM and feel very familiar very quickly. I think Altium should offer this config in the settings.Other than that, am looking forward also to see what AutoDesk will do with EaglePCB.Ian.

author: vzoole
author_rank: Regular Contributor
timestamp: July 15, 2016, 01:48:47 pm
content: Be happy cause there is pan and zoom in all your software.E.g. in Pads Standard no pan capability by mouse.But if you use all as it is work... your brain will learnt to use correct method paralell. Just the first weeks are annoying.
Importing Netlist into CircuitStudio - Page 1
Forum section: electronics / general

author: trophosphere
author_rank: Frequent Contributor
timestamp: July 15, 2016, 02:56:00 am
content: Hello,Does anyone know if it is possible to import a netlist into Circuitstudio? I've tried searching around for the past hour and could not readily find a way to do so. I know I can import a selection of other CAD software's files (e.g. Orcad) but I'm just looking to import a netlist formatted like PADS-PCB or something similiar.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 15, 2016, 03:30:37 am
content: What file names / Vendor and expected extensions show on your import list ?

author: trophosphere
author_rank: Frequent Contributor
timestamp: July 15, 2016, 03:55:19 am
content: Quote from: PCB.Wiz on July 15, 2016, 03:30:37 am

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 15, 2016, 04:09:58 am
content: Try the PADS ASCII PCB .ASC, as the NETLIST is a subset of the full database ASCIIYour file should have*PART*&*NET* sectionsand the parts listed need to exist in the library in the CAD package you are importing into.

author: trophosphere
author_rank: Frequent Contributor
timestamp: July 15, 2016, 04:34:09 am
content: Thanks for the help.I looked at the contents of my netlist and it does indeed have *PART* and *NET* sections. The parts specified in the netlist exist in the CS library; however, the program displays an error after trying to import the netlist of interest.I have attached my netlist as well (renamed the extension from .asc to .txt to comply with allowed filetypes on this forum)

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 15, 2016, 04:47:16 am
content: Don't you just love crash and burn error messages !! 100% useless at moving forward.Quote from: trophosphere on July 15, 2016, 04:34:09 amLooks generic and ok.You could try a full PADS Ascii design file, to see if that imports, and then remove sections until it breaks...

author: trophosphere
author_rank: Frequent Contributor
timestamp: July 15, 2016, 05:13:43 am
content: Love them. I want more of it. I also like the idea of beatings will continue until morale improves.I'll just start from scratch and refer back if I need anything. Originally I thought that I could just use one package for schematic entry and another for PCB layout since my original one was getting old in the tooth. Might as well learn how to use another vendor's schematic entry as it never hurts to learn more.Thank you for your help.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 15, 2016, 11:42:36 am
content: I'd try and find a ASCII file that does import, then you have more choice.It may be as simple as the heading change to!PADS-POWERPCB-V10.0-MILS!or similar.They may not test netlist-only as thoroughly, but I'd expectsomeversion of PADS to have been tested. (even by Altium...)
Footprint for Infineon AUIR3313S [D2PAK-5] - Page 1
Forum section: electronics / general

author: SSL
author_rank: Newbie
timestamp: July 11, 2016, 07:38:42 am
content: I’m designing a board where I would like to use the Infineon AUIR3313S, but I can’t make sense of the case outline and footprint drawings.According to the case outline the pitch is 1.7mm [ein datasheet] while the footprint pad size is 1.93mm [oin datasheet]. Which results in the pads overlapping and that can’t be rightWhat is the correct footprint? Or what am I misreading or overlooking?Datasheet page 12:http://www.infineon.com/dgdl/auir3313.pdf?fileId=5546d462533600a4015355a83e2d1347Thanks

author: vzoole
author_rank: Regular Contributor
timestamp: July 11, 2016, 10:26:19 am
content: There is something wrong in datasheet... but you should use 1.1mm width for the pad.

author: SSL
author_rank: Newbie
timestamp: July 13, 2016, 03:52:40 am
content: Thank you
ANSI/IPC: naked tracks allowed? - Page 1
Forum section: electronics / general

author: tyger
author_rank: Newbie
timestamp: July 09, 2016, 03:24:14 pm
content: Hey,This is a question that i can't seem to find an aswer for:Is it allowed by the standards to use naked tracks on your pcb so you can apply paste on there for power connections?I have seen this in some designs but im not sure if this is allowed.

author: vzoole
author_rank: Regular Contributor
timestamp: July 11, 2016, 06:22:25 am
content: Normal solder mask isn't count as isolator on pcb so it isn't important from standard side.
footprints for tabs - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: July 05, 2016, 06:36:33 am
content: I am creating the footprint for the following jack socket. The pins are in effect sheet metal tabs:http://www.farnell.com/datasheets/1718833.pdfSurely a PCB manufacturer will not be happy with rectangular holes ? I expect round holes will be ok.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 05, 2016, 07:17:57 am
content: The pins are 1.00 x 0.30 mm (give or take about 0.13mm; the tolerances are inches unfortunately), so they'll fit into round slots of 1.50 x 0.60 mm just fine.A 1.1mm round hole would probably do fine, as well. It'll take a lot of solder, and not be quite as reliable (due to possible voiding and fracture of the solder joint, and delamination or peeling of the pad barrel). The slot is preferred.Curiously, the offset from the face is 11.50 mm with the same precision (0.13mm), which seems unbelievably tight for a part like this. That implies the slots could be a lot tighter in length. But I'd be kind of surprised if they really follow those tolerances, honestly. I've seen an awful lot of 0.3 and 0.5mm tolerances, even on smaller parts. YMMV I suppose.Tim

author: Jeroen3
author_rank: Super Contributor
timestamp: July 05, 2016, 07:20:56 am
content: Not all PCB houses do plated slots.It they do, you're in luck. Ask them how they want it.If they don't, you'll need to make a big hole. (and fill it with solder later)Just make two footprints you can easily replace.

author: matseng
author_rank: Frequent Contributor
timestamp: July 05, 2016, 12:28:44 pm
content: Quote from: Jeroen3 on July 05, 2016, 07:20:56 amI've ordered pcb with internal slots for connectors and switches from SmartProto, Seeed, Elecrow and Dirtypcb. They all got back with plating in the slots.I guess that the drilling for holes and vias is done at the same time as the internal routing and thus all get plated automatically.The internal routing seems to be be done with a 1.2mm bit according to my rough measurements.
Protel 99SE: polygon pour with bare copper finish - how? - Page 1
Forum section: electronics / general

author: DTJ
author_rank: Super Contributor
timestamp: July 01, 2016, 06:00:08 am
content: I want to put a polygon pour on an area of a board with no mask over it.The pour on them finished board needs to be bare gold finish for a RF enclosure gasket to mate up against.The P99SE manual and google aren't being helpful. How do I do it?

author: DTJ
author_rank: Super Contributor
timestamp: July 03, 2016, 02:49:55 am
content: I guess no replies means it's either trivially easy or very hard!

author: matseng
author_rank: Frequent Contributor
timestamp: July 03, 2016, 03:07:28 am
content: In Eagle you do two polygons. One for the copper and one on the "soldermask stop" layer to get the copper exposed.I guess that something similar is done in most other packages as well.

author: DTJ
author_rank: Super Contributor
timestamp: July 03, 2016, 03:37:44 am
content: Hi Matseng, that makes sense. I had another look at my options for protel, it seems Protel does not have the solder mask stop option. It sounds neat and simple.The shape is need is rectangular with a few cut outs. I might have to build it piece wise using single layer rectangular pads..EDIT: Matseng, you were spot on. I placed a poly on the top layer and then placed another poly on top of that with the layer "top mask". I did not realise this option existed. Checking the gerbers it appears to do what I want. Thanks!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 03, 2016, 04:35:47 am
content: In Altium, you simply tick the "expose soldermask" checkbox on the copper object. In the olden days, you'd probably have to duplicate the object, move it to the soldermask layer, and make sure it doesn't repour or anything (if there's a "convert to primitives" or "convert to region", use that).Or maybe you can make a footprint for the enclosure part, which includes all the exposed copper as pads or other objects.Tim

author: DTJ
author_rank: Super Contributor
timestamp: July 03, 2016, 04:41:40 am
content: Thanks Tim we're using 99SE from the "old days". The duplication method worked ok.99SE still does the job, Altium priced us out of upgrading. I imagine we will go to an alternative in the near future.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 03, 2016, 08:52:26 am
content: Quote from: DTJ on July 03, 2016, 04:41:40 amCan you system export P-CAD PCB files ? (ASCII, based on ACCEL standard)If so you can export some, and import into KiCad or Eagle to try those alternatives.To me, KiCad looks good - rapidly improving & more open hardware projects are moving to it.
EasyEDA - Free online schematic + PCB editor - Page 1
Forum section: electronics / general

author: tec5c
author_rank: Frequent Contributor
timestamp: August 09, 2016, 07:51:08 am
content: I just came across this "software" and looking around the forums I couldn't see a thread about it already so I thought I'd inform others (apologies if there is a thread and I simply overlooked it)I haven't used the software and I don't think I intend to, so I have no idea what it's like.https://easyeda.com/EnjoyEdit: Site is already in the list and I am unable to delete the thread. My mistake!

author: jct
author_rank: Contributor
timestamp: August 09, 2016, 04:36:56 pm
content: Nice explanation re EasyEDA here:
Help needed: Researching Electrical CAD Platforms - Page 1
Forum section: electronics / general

author: tmk21
author_rank: Newbie
timestamp: July 07, 2016, 10:27:42 am
content: I am trying to find out a bit more about the various Electrical CAD platforms available and the pros/cons of each.I am currently looking at SEE Electrical (from IGE+XAO), Eplan, and AutoCAD Electrical.What are the pros/cons of these platforms and are there any other that I should be looking at?My main questions are:- General impressions and usability of the platforms- How is the technical support- Pricing (always a concern)- Which platforms are most commonly used (and why?)- What are the the platforms good/bad at...etc....Thanks,

author: komet
author_rank: Unknown
timestamp: July 07, 2016, 07:21:09 pm
content: You might want to look at DesignSpark Electrical, which is free:http://www.rs-online.com/designspark/automation/designspark-electricalI have used it occasionally, but am not an installer, so do not feel qualified to comment.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: July 07, 2016, 10:48:45 pm
content: Quote from: tmk21 on July 07, 2016, 10:27:42 am"Electrical CAD" is pretty open ended.You probably should define which sub-section of Electrical you mean, and who the output targets, in what forms.ie Do you want to create drawings to some Electrical standard, or do you need to also create BOMs, and maybe even more complex sets of data like Wire Harness information ?Quote from: tmk21 on July 07, 2016, 10:27:42 amNot quite what my main questions would be.First would be"can the tools even do what I require" ?"Is the file format open, and scriptable" ?

author: tmk21
author_rank: Newbie
timestamp: July 08, 2016, 11:23:01 am
content: Apologies if my initial query was unclear. I am an electrical engineer, but the reason for my post is that I am trying to conduct some research to see what expert users (such as yourselves) are saying about the various platforms.I am specifically interested in the products from IGE+XAO (e.g. SEE Electrical) and how these compare to other platforms. Is IGE+XAO gaining ground? Is their product any good (if so, why? if not, why?) I have heard that Mentor Graphics is a key competitor - any others that are a particular threat to IGE+XAO? If so, why?
show the PCB proofing cycle and price in your country - Page 1
Forum section: electronics / general

author: hushaoxin
author_rank: Contributor
timestamp: June 13, 2016, 06:47:50 am
content: Country:chinaproofing price:1.two layers(10 piece)(<100mm)*(<100mm)=50RMB=8$(<200mm)*(<200mm)=190RMB=30$2.four layers(10 piece)(<50mm)*(<50mm)=100RMB=15$(<100mm)*(<100mm)=200RMB=33$proofing cycle: most of time 4 days, and if you need an urgent services ,you should pay 400RMB=65$,then you will get the PCB in 48 hoursPlease show the PCB proofing cycle and price in your country........PS:I come from china,my English is so poor, if you can't understand please reply....
How to get soldermask on vias - Page 1
Forum section: electronics / general

author: gauravmp
author_rank: Regular Contributor
timestamp: June 08, 2016, 03:45:27 am
content: Hi,Does anyone know how to get the manufacturer to cover the vias with soldermask so as to not expose any copper? Is this what plugged vias mean?Say if I was to order through Advanced circuits, would I have to check the option "plugged vias" to get this done? Please check the attached photoThanks.

author: ruffy91
author_rank: Regular Contributor
timestamp: June 08, 2016, 05:11:42 am
content: You have to generate the gerbers with soldermask over the vias (tented vias in Altium). If you tent the vias on both sides it's possible that they burst open in the reflow oven, thats what plugged vias are for. They will then be filled in an additional step so that there are no voids.
Cadstar Offer - Page 1
Forum section: electronics / general

author: SimonR
author_rank: Regular Contributor
timestamp: June 14, 2016, 04:10:07 pm
content: This may be of interest to someoneUsual 1 year maintenace type clause applieshttp://www.zuken.com/en/campaigns/cadstar-free?utm_source=Zuken%20UK%20Ltd&utm_medium=email&utm_campaign=7185260_CADSTAR%20BOGOF%20-%20English&utm_content=Banner%20graphic&dm_i=21AU,4A06K,ET2WGD,FMZOG,1
pspice in orcad 17.0 - Page 1
Forum section: electronics / general

author: ant17
author_rank: Regular Contributor
timestamp: June 04, 2016, 07:34:30 am
content: hi i have just started simulating with orcad 17.0 using in built pspice but i am trying to simulate the circuit attached which is a simple power source and regulator i have tried using dc sweep sweeping the dc power source and measuring the output of the regulator which gave me what i expected but if i try to do a transient analysis(time domain) sweep of the same source it seems to loop doing a transient analysis then does a bias point calculation and then shows that it had completed it but then starts again at the end i get a warning (orprobe-3191) and then the sweeps fill the black screen i have attached also the pspice output file if someone could help i would be greatful

author: timofonic
author_rank: Frequent Contributor
timestamp: June 04, 2016, 02:27:14 pm
content: I'm interested to know our, as latest OrCAD versions changed many things. I hate proprietary software, but I want to know how to use them at least.

author: ant17
author_rank: Regular Contributor
timestamp: June 04, 2016, 11:49:24 pm
content: i don't understand what you mean could you please clarify
Our thinner PCBs better for heat transfer? - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: June 05, 2016, 08:40:07 pm
content: I'm ordering some PCBs and I have noticed that I can get a 0.8 mm PCB for the same price as a 1.6 mm PCB. Are there any disadvantages? I have a heat spreading plane on both sides of the board and I'm thinking if the board is thinner then the heat will transfer more easily through the shorter via's. Also any heat on one side of the board would more easily get through to the other side and be picked up and spread by the copper layer on the other side not that this really matters. Are there any particular disadvantages to using a thinner circuit board? The board is just 37 x 37 mm and will be potted so mechanical strength is not an issue.

author: tszaboo
author_rank: Super Contributor
timestamp: June 06, 2016, 01:19:49 pm
content: They might charge more for a thinner board. If you change the via geometry, basically you get half the height or double the thickness. I guess it will be little bit cooler. If you pot it, than I doubt it will matter though. I would go with the standard board.I you would mount the board on a heatsink, for sure I would go with the thinner one.
Figures for Papers / Presentations - Page 1
Forum section: electronics / general

author: VanWyk
author_rank: Newbie
timestamp: May 31, 2016, 06:04:40 pm
content: I need to simplify a few schematics to include in papers and presentations, and I want to cut out all the extraneous detail that is only needed for "real" schematic capture. For example, I want a clock to just be a circle with a single cycle square wave in it, and an op-amp to just be a triangle with + and - terminals. Basically, I want to make whiteboard schematics cleaner than I can draw by hand.What tools do you folk use to do this type of documentation? I've been snipping pins off of Altium symbols, there has to be a better way!

author: SimonR
author_rank: Regular Contributor
timestamp: May 31, 2016, 06:44:57 pm
content: Couldn't you just change the colour of the pins so they don't show up when you print the screen or otherwise caputure to bit of schematic you want.Any good Schematic/PCB CAD tools will allow you change the colour of every individual aspect as it helps to clarify things when you are drawing something complecated.I don't use Altium but its a pretty good profesional system so I would of thought you had control over what is visible.

author: Yansi
author_rank: Super Contributor
timestamp: May 31, 2016, 06:46:35 pm
content: https://www.proficad.com/maybe?

author: stmdude
author_rank: Frequent Contributor
timestamp: May 31, 2016, 07:33:58 pm
content: It's not often I need to do this, but when I do, I resort to using Microsoft Visio

author: Yansi
author_rank: Super Contributor
timestamp: May 31, 2016, 08:08:41 pm
content: I do this occasionally too, but by using a mspaint/pbrush and a set of prefabricated symbols :-)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 01, 2016, 03:56:00 am
content: I do that, then print to PDF. The figures have to be cropped from the sheet outline, but many figures fit on a sheet, usually.An excerpt from such a schematic. The symbols are from my library, but I've disabled the supply pins, pin numbers, and am abusing the designators freely (as you can tell by the wavy red lines; they don't print to PDF so that's fine).If you need better synchronization between schematic source and documentation output, I suggest... drawing better schematics.For example, your clock source can be an off-sheet connector or port, with a self-explanatory name, and a waveform or squiggle or text above it, if you like. Use multi-sheet or hierarchical design methods to simplify each sheet down to its most basic elements: make each sheet its own figure!There are plenty of things to go wrong by trying to dumb down a schematic (all that "real schematic capture" data!), or fork a simplified version; but there is absolutely nothing wrong with cleaning up your schematics so they are self-documenting, or nearly so!Tim
What do you think of my first pcb design layout? - Page 1
Forum section: electronics / general

author: sspj9
author_rank: Contributor
timestamp: May 14, 2016, 10:08:51 pm
content: Please be honest and state your opinions and also pinpoint what i should have done to kee thay in mind for my future designs.I did this for an assignment. I had to design a three stage amplifier.THANKS

author: tautech
author_rank: Super Contributor
timestamp: May 14, 2016, 10:53:20 pm
content: Quite unfinished yet as there's a number of "rats nest" links without connecting traces.Post a schematic too.Electrolytic polarities are unknown, they should be identifiable by both one square pad and on the top overlay.More care need be taken in component orientation (rotation) to make routing easier and more direct, this alone will make the layout very different.If a heatsink is needed for the 2 TIP's it will foul against C5 & 6 that shouldn't be near a heatsink anyway.Component pads could be larger in order to get a larger and more robust annular ring on pads. Try for 100 mil.I/O's unmarked.Diode K need be an identifiable footprint.A fail in its present form from me.

author: andre_teprom
author_rank: Regular Contributor
timestamp: May 22, 2016, 04:50:16 pm
content: My two cents:1. Some components are too close, or even overlapped ( electrolitic capacitors )2. There aren't any mounting holes on the corners.3. There are still unconnected nets.4. Component designators under components isn't a good deed.5. Pouring the GND is advisable.6. Instead of putting the value of the TIPxxx transistors, prefer their designators.

author: wraper
author_rank: Unknown
timestamp: May 22, 2016, 05:01:20 pm
content: 1. Very long traces. You should make them as short as possible and place components accordingly to achieve that.2. Why don't you make straight traces. Why do you make arc shaped traces between nearby pads?And overall why do you use arcs where straight shape is the most suitable?I'd say the right word for describing this design is - "weird".EDIT: 3. Annular rings for TIP137 are way too small.

author: rstofer
author_rank: Super Contributor
timestamp: May 23, 2016, 03:37:11 pm
content: The resistor in the upper right corner seems a little strange. The left lead seems asymmetric.

author: ebclr
author_rank: Super Contributor
timestamp: May 27, 2016, 10:54:18 pm
content: For the 1st one is nice.A very important point is component placement.As a example try to turn U1 180 degrees, you will note short links ( that is great ) and no wires between terminals on U1.Congratulations for the 1st one, now is time to im[prove for the 2nd version of the 1st one

author: lem_ix
author_rank: Regular Contributor
timestamp: May 27, 2016, 11:37:52 pm
content: I agree it looks weird. As an addition to above comments some of the overlays seem wrong + traces have uneven spacing (bot right corner just looks wrong)
simulating potential overheating of transistors and other components in pspice - Page 1
Forum section: electronics / general

author: ant17
author_rank: Regular Contributor
timestamp: May 25, 2016, 03:02:50 am
content: hi guys is it possible to simulate if a transistor will overheat due to excessive current or voltage in orcad16.6 Pspice. so that if you have transistors in say something like a power amplifier you will be able to see if you have selected transistors that will take that power level you want in your design if somebody could help i would be greatful
Eagle make personal problem - Page 1
Forum section: electronics / general

author: snipersquad100
author_rank: Frequent Contributor
timestamp: May 22, 2016, 07:56:02 pm
content: I recently bought Eagle make personal edition, I got the extra board size but cant seem to find the extra 4 signal layers, just top and bottom.Do I have to switch them on some how or have i got a faulty license.

author: Wilksey
author_rank: Super Contributor
timestamp: May 22, 2016, 08:51:29 pm
content: Tools -> DRC -> Layers Tab.It will say something like 1*16, this is top and bottom layer, you can add for example, 1+2*15+16 for 4 layer, you can adjust other properties here too, then they will appear in the layer settings.

author: snipersquad100
author_rank: Frequent Contributor
timestamp: May 22, 2016, 09:19:51 pm
content: Thanks Wilksey, If been serching the internet for hours.
ALTIUM : Output Gerber Inner Plane don't output properly - Page 1
Forum section: electronics / general

author: chrischina
author_rank: Contributor
timestamp: May 23, 2016, 10:35:46 am
content: I have a problem when I generate our gerber file with Camtastic.When I generate Cam file everything looks fine.From Camtastic if i export into Gerber file here we have two stranger things which are happening:1./ The layer appearance in camtastic environment appear with very weird lines2./ When I reimport the gerber files into altium to verify them again, we have the two inner layer (which I use for GND and PWR) in particularly which are very weird

author: tszaboo
author_rank: Super Contributor
timestamp: May 23, 2016, 12:47:37 pm
content: Gerber dont support shapes, or polygons, or anything not round or rectangular (maybe to some level). So when you draw a irregular shape, it will be built up by putting lots of lines or rectanges or similar shapes. So your rendering cam kae it look wierd. Dont worry, the boards will be OK, since anything smaller than x um (25?) will be ignored.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 23, 2016, 05:05:05 pm
content: I only ever use CAMTastic for viewing. I wouldn't recommend trying to go back and forth between PCB and gerbers. Keep it one direction only.Tim

author: tboy
author_rank: Contributor
timestamp: May 23, 2016, 05:32:11 pm
content: I have seen this before lots of times. You can usually zoom in to confirm that your Gerbers are ok.
Seperating DGND & AGND but want to use a reference voltage across - what to do? - Page 1
Forum section: electronics / general

author: slow_rider
author_rank: Regular Contributor
timestamp: May 22, 2016, 09:49:55 am
content: My problem is as follows: I have a mixed mode circuit - basically a couple of signals going into a digital pot. and run though an op-amp.There is a controlling section which is digital and populates an MCU. The design has two power supplies: 9V for the analog and 5V for the digital.I also need 2.5V for biasing the signal into the digital pot. This brings me to the problem - I need to run the 2.5V which is created by dividing the digital supply to the analog section to avoid having another analog power supply. I thought about cutting all the ground under the 2.5V however this starts to look a little messy. Any suggestions?

author: nctnico
author_rank: Super Contributor
timestamp: May 22, 2016, 12:17:36 pm
content: Do not use seperate grounds! Instead use ferrite beads & filters in the power supply to keep the analog and digital currents apart.

author: slow_rider
author_rank: Regular Contributor
timestamp: May 22, 2016, 01:35:37 pm
content: nctnico, can you elaborate on that? Perhaps addressing this specific design? This is why I have included both the layout and schematic.

author: Kalvin
author_rank: Super Contributor
timestamp: May 22, 2016, 02:37:36 pm
content: My standard answer: You may find the following document and the concept of the return current useful:http://www.hottconsultants.com/pdf_files/june2001pcd_mixedsignal.pdf

author: Farley
author_rank: Regular Contributor
timestamp: May 22, 2016, 03:08:51 pm
content: How about changing the values of your voltage divider resistors R1 and R2 (this is on U1A, correct?) and then use the 9V analog supply? Maybe R1 = 10K and R2 = 3.9K?

author: slow_rider
author_rank: Regular Contributor
timestamp: May 22, 2016, 04:25:26 pm
content: Changing the resistors and the power supply is one option! Thanks!

author: Neilm
author_rank: Super Contributor
timestamp: May 22, 2016, 04:54:31 pm
content: Quote from: nctnico on May 22, 2016, 12:17:36 pmSeconded. A few years ago I have to re-EMC test a load of measurement instruments as the rules had changed. With a couple of exceptions, all the failures (and certain instrument problems that were decided to live with) were fixed by having just one 0V on the board.As far as I am concerned, the only reason for splitting 0V is if safety isolation is required.
NI ULTIBOARD - Copper Solder Pad - Page 1
Forum section: electronics / general

author: hgg
author_rank: Frequent Contributor
timestamp: May 21, 2016, 01:23:01 pm
content: Hi there,I am trying to create a single solder pad in NI Ultiboard and I cannot find out how!All I want to do is place a copper solder pad that will be connected to a specific Netand on which I would like to solder a wire for an external connection...Does anybody have any experience with Ultiboard ?Any help is appreciated!Thank you.George.
Electronic schematics of TORO DDC-4 - Page 1
Forum section: electronics / general

author: alps
author_rank: Contributor
timestamp: May 20, 2016, 03:18:13 pm
content: Hi everybody!I was looking for electronic schematics of a waterproof battery controller. The producer is TORO, the model is DDC-4 (13 years old).Now I've seen that its name has been changed: DDCWP-4. But I think that they should be rather similar.Unfortunately, on the internet there seems to be no manual with circuit diagrams (neither for the old model, nor for the more recent).I was wondering if someone has any useful link to suggest.Thanks for your help!
Length Matching DDR Termination Resistor - Page 1
Forum section: electronics / general

author: henryk29
author_rank: Newbie
timestamp: May 16, 2016, 10:34:42 pm
content: Hello.I'm working on PCB layout between DDR Ram and FPGA.The serpentine trace has matched length to the longest trace connecting between the DDR Ram and FPGA.Longest trace is 2000mil. Serpentine trace is 1995mil.There is additional trace between the pin and the termination resistor. If this trace gets added to the length of the serpentine the total becomes 2400mil.Should the serpentine be reduced by 400mils to correct for the termination resistor trace or does only pin to pin distance matter for length matching?Please see picture. Thanks

author: dmills
author_rank: Super Contributor
timestamp: May 17, 2016, 05:03:40 pm
content: Does the impedance of the stub match the value of the terminating resistor? If so, it does not matter how long the stub is!The length match is for arrival time at the memory device, you don't care when the edge arrives at the terminating resistor, and if the resistor correctly terminates the stub there will be no reflection to worry about.So no, you probably do not want to shorten the trace to the memory device.Regards, Dan.

author: henryk29
author_rank: Newbie
timestamp: May 17, 2016, 08:15:08 pm
content: Thanks Dan.The traces are calculated for 45 ohms. Termination resistors are 49.9 ohms. Is that close enough?
Schematic convention for breaking signals out of a bus? - Page 1
Forum section: electronics / general

author: knotlogic
author_rank: Regular Contributor
timestamp: April 11, 2016, 08:59:27 am
content: Apologies if the topic title is confusing, but I'm not sure what exactly the proper terminology is.Is there any standard way of drawing signals that are routed out of a bus in a circuit schematic? For example in the picture I attached, PortB 0 to 4 on my uC are routed to a bus. I've seen some schematics where the signals meet the bus at right angles, but others where it meets the bus at 45 deg. And in the latter case I haven't been able to find out if there's any convention to which way the 45 deg tilt should go.

author: Gribo
author_rank: Frequent Contributor
timestamp: April 11, 2016, 10:13:47 am
content: 45 degrees out of the bus is the convention in OrCad, PADS and Altium. It creates a difference from component connection (90 degrees).

author: stmdude
author_rank: Frequent Contributor
timestamp: April 11, 2016, 11:24:01 am
content: Yup, 45 degree to break out from a bus, standard in KiCad as well (required even, if you want to pass DRC checking).Also, you should label _which_ signal you're breaking out of the bus, for readability.I have a schematic with _lots_ of bus breakouts here:https://github.com/slowcoder/SMSSchematic/raw/master/SMSSchematic.pdf( Updated/modernized schematic for a SEGA MasterSystem )

author: knotlogic
author_rank: Regular Contributor
timestamp: April 12, 2016, 02:24:46 am
content: Thanks all.Should the 45 deg tilt go "upwards" or "downwards" when entering the bus?Quote from: stmdude on April 11, 2016, 11:24:01 amDoh! That seems so obvious I don't know why I haven't already been doing that.

author: basinstreetdesign
author_rank: Frequent Contributor
timestamp: May 10, 2016, 05:11:48 am
content: I doubt if there is any real convention which way the angle breakout should be; its up to what you think looks better. Personally I like the angle to suggest which way the signal in question is traveling along the bus (sorta suggestive of a cable-stitched bundle of wires).However, having labels on each breakout net is mandatory or else the software doesn't know which signal to connect it to in the netlist.

author: vzoole
author_rank: Regular Contributor
timestamp: May 10, 2016, 08:28:35 am
content: Quote from: basinstreetdesign on May 10, 2016, 05:11:48 amThis is Eagle and it is know without label (just the user could be confused).
Magnetometer and copper plane - Page 1
Forum section: electronics / general

author: Koen
author_rank: Frequent Contributor
timestamp: May 15, 2016, 04:41:32 pm
content: Hello,I've found some literature about steel EMI shields being bad for magnetometers but what about copper ? Are the copper planes beneath a magnetometer (on lower layers) impacting it ?Thank you,Koen

author: JimRemington
author_rank: Regular Contributor
timestamp: May 15, 2016, 05:54:26 pm
content: Unless they are carry substantial current, it seemsveryunlikely that copper planes will affect a magnetometer.Any nearby ferrous or magnetized object, or current carrying conductors will affect the local magnetic field.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 15, 2016, 09:21:31 pm
content: That, and if you don't need huge bandwidth, then it's no problem.Copper foil acts to shield AC, so you will get reduced gain, and directional and phase shift errors, around the cutoff frequency of the foil. Which for PCB foil, I think, will be in the kHz range.If you're doing, like, Earth's magnetic field, compass reading kinds of stuff, yeah, doesn't matter.Tim

author: noras
author_rank: Contributor
timestamp: May 16, 2016, 09:54:49 am
content: You can design two high-current line parallel, the current General Assembly to form a strong magnetic field, the magnetic field in the center of the central portion of the positive and negative power lines, use two parallel lines, the center of the electromagnetic field that is in between the lines, the effective area of the magnetic field can be reduced to eliminate the influence of other magnetic elements.
Ground Plane Confusion - Page 1
Forum section: electronics / general

author: chota.sanjiv
author_rank: Contributor
timestamp: May 30, 2016, 06:50:55 pm
content: Hi Guys,I am beginner in electronics and PCB design and usually need to study a lot to get things working, I have some questions regarding the layout of the ground plane, please guide.1. I have read that pour of ground plane is a good practice but also it can lead to multiple paths to the GND and thus can cause issues (not sure what), I now prefer to make a 4-lyr PCB with separate GND plane and no GND pour on TOP / BOTTOM.2. How to avoid noise of my switching regulator / power supply to interfere with my digital circuit, are there ways to isolate these two ground planes for noise.3. Is it oky to put a bead on my ground plane .thanks,Sanjeev

author: PChi
author_rank: Frequent Contributor
timestamp: June 02, 2016, 04:00:27 pm
content: OK I'll have a go and try to answer.1. A ground plane is good practice but GND currents cause voltage drops between different points on the ground plane due to it's resistance and inductance. This may or may not be a problem depending on application.2. For a switching reguulator I prefer to draw the schematic to show the ground connections as lines. Then mark up the current flows and waveforms on the schematic. Then it becomes obvious where the voltage drops across the 0V connections will be. Either connect up the switching regulator using wide tracks or use a split in the ground plane to isolate the points where the voltage drops will be to isolate them from the rest of the crircuit.3. I guess that you could use a ferrite bead to isolate separate parts of a ground plane it just depends on the application.

author: Marco
author_rank: Super Contributor
timestamp: June 02, 2016, 05:24:01 pm
content: Quote from: PChi on June 02, 2016, 04:00:27 pmWhen I hear split ground plane I associate that with ground planes isolated from each other with inductors. This is more a ground plane equivalent of star grounding, calling it a partitioned or segmented ground plane seems more apt. A picture fromAnalog's articleon this :

author: John_ITIC
author_rank: Frequent Contributor
timestamp: June 03, 2016, 01:10:59 am
content: https://www.google.com/?gws_rd=ssl#q=power+integrity+design

author: chota.sanjiv
author_rank: Contributor
timestamp: June 03, 2016, 06:17:45 pm
content: Thanks Guys, this gives me a lot of info. Many thanks again.
Help with SpaceNavigator (3D mouse) - Page 1
Forum section: electronics / general

author: dmg
author_rank: Regular Contributor
timestamp: May 13, 2016, 09:44:34 pm
content: Hi,I usually use Altium Designer and Inventor for my job and I read about 3D mouses and thought about getting one. I ordered a spacenavigator from 3D connexion and got it today. I'm not sure if it's me, if I got a defective unit, my hands are too heavy or this thing is broken because I can't get it to properly do things.First of all, I can control the thing well enough in the teapot demo that comes with the drivers, my only compliant there is that I can't do some movements without activating 100% a spurious axis. This is particularly true of the up/down axis, just a light touch without even making it sink down causes the reading to go 100%. So can't do anything in normal mode, have to use "dominant mode", but mostly works.However, with Altium I just can't use it, I just move it and it does whatever it wants at random, trying to adjust the settings doesn't help. Whenever I touch an axis the board goes very small to a corner blazingly fast and windows beeps as if it reached a limit or something. Can't zoom in or restore to a normal view after that.EDI: got it to work with altium, just had to set speed to almost minimum and now it works pretty well there. Why does it go at a different speed at each axis depending on application when they supposedly certify the apps to be compliant with the device?With inventor, with all axis at the same speed setting the up/down axis (I use it for zoom) goes about 10 times faster than the other axis, no kidding. If I try to slow it down then the left/right axis starts going 10 times faster. In the end this is how I have to configure the axis speed for invetor to make all axis go the same speed:Anyone with a similar experience with this device or is it just me?EDIT2: okay, in Altium 2015 I can't pan with the navigator while routing. I hit Place trace, start routing with the mouse but whenever I touch the navigator I can't route while It's panning/zooming, the track just stays stopped until I stop moving the navigator, something that requires lifting the hand due to its sensitivity. Any way to change this behaviour? If not, I'm returning this gadget. It's easy to zoom and pan but loosing directed mouse zoom (zoom where the arrow points using ctrl + wheel), feelig handicapped for not having a hand in the keyboard ready to press space, return or any other shortcut and this behaviour would be too much to trade for easier pan/zoom.
Low cost entry level signal integrity simulator - Page 1
Forum section: electronics / general

author: olegk
author_rank: Contributor
timestamp: May 17, 2016, 10:34:36 am
content: Low cost entry level signal integrity simulator, probably targeted at DipTrace, Eagle and KiCad users.Is it interesting for you? Or everyone already has something for this task?

author: tggzzz
author_rank: Super Contributor
timestamp: May 17, 2016, 10:52:51 am
content: No idea. What's the input? What's the processing? What's the output?

author: AndyC_772
author_rank: Super Contributor
timestamp: May 17, 2016, 11:08:06 am
content: I'd hazard a guess that users of free and hobby-grade PCB software have little use for SI simulation.If I recall correctly, Cadence have just introduced SI analysis to even the most basic version of OrCad PCB Designer. I must remember to check it out some time.
Thermal dissipation area, to mask or not? - Page 1
Forum section: electronics / general

author: stmdude
author_rank: Frequent Contributor
timestamp: May 02, 2016, 04:45:51 pm
content: So, I'm in the process of modifying one of my designs to include a buck-converter (LM22670), and it should have a copper-area connected to the exposed pad to help with heat dissipation.No biggie, easily done. However, should that area have solder-mask on it? In my mind, the solder-mask would insulate the copper-area from the surrounding air..Couldn't find a reference to it in the datasheet, or the referenced application-note about thermal design...In the attached image, U1 is the LM22670

author: blacksheeplogic
author_rank: Frequent Contributor
timestamp: May 03, 2016, 12:45:08 am
content: Quote from: stmdude on May 02, 2016, 04:45:51 pmIs this what you were looking for.http://www.ti.com/lit/an/slma004b/slma004b.pdf

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 03, 2016, 01:07:34 am
content: No*.Mask is thin enough not to worry about, even under forced air conditions. A good comparison is bare vs. anodized vs. painted heatsinks. Under natural convection and modest temperature rises, the radiation dissipated from the paint (which has good emissivity) outweighs the temperature drop to the air.The difference is a few percent.If your design is that critical, you have much more important things to reflect upon...Removing mask also invites scavenging of solder paste, leading to poorly soldered parts.If it's a wave process, removed mask may reduce electrical and thermal (spreading) resistance, leading to slightly lower temperaturesIf it's in contact with a heatsink (i.e., using thermal vias and a back side pour to connect to a heatsink, hopefully with some grease in there too), it may be better without mask, but beware possible problems with flatness (vias overfilled with solder will bulge outward).For the range of possible thermal resistances you can achieve on an SMT construction, it really doesn't matter. A very typical construction would be, DPAK or D2PAK parts on top; modest top side pour; lots of vias (including via-in-pad), back side pour, Sil-Pad, heatsink. Junction temperature is limited by heatsink performance (assuming modest convection heatsink), then vias, then Sil-Pad, in that order.Tim

author: vzoole
author_rank: Regular Contributor
timestamp: May 09, 2016, 12:57:43 pm
content: Remove solder mask on "heatsink" copper area is definitely NOT help, moreover it make even worse.So on attached picture the left side IC is 1% cooler than right side.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 09, 2016, 04:31:24 pm
content: Like I said, insignificant.

author: wraper
author_rank: Unknown
timestamp: May 09, 2016, 04:58:11 pm
content: If there is some forced airflow, opening the solder mask might be helpful. If there is nothing other than natural convection, leaving the solder mask likely will be better, especially if the metal is glossy what will prevent heat radiation.