Reliable soldermask expansion value for 0.5mm pitch QFN - Page 1
Forum section: electronics / projects

author: ricko_uk
author_rank: Super Contributor
timestamp: April 23, 2022, 03:48:10 pm
content: Hi,considering a PCB with 0.5mm pitch SMD components, what is the smallest soldermask expansion you "should" have that can be assumed to be easily manufactured nowadays by most fab houses (i.e. the registration tolerances allow for said expansion to be reliable without overlapping the pad)?Thank you

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 24, 2022, 04:21:47 am
content: I shave the pads down slightly, say 0.23mm width, and that leaves ample room for 0.075mm clearance and 0.1mm web width. All the fabs I've used, I think handle that just fine.Note that the pad mismatch hardly matters; components themselves aren't rated very tightly (what, +/- 0.05mm?) and IPC suggests side fillet can be +/- (if you wish to follow IPC, of course). So it's not at all going outside of typical specs like that.Tim

author: ricko_uk
author_rank: Super Contributor
timestamp: April 25, 2022, 12:58:02 pm
content: Thank you Tim and evb149

author: ricko_uk
author_rank: Super Contributor
timestamp: April 25, 2022, 02:45:34 pm
content: BTW, I just came across this notes (see attached screenshot) from an Altium Academy post. The guy suggests putting the note "solder mask expansion 1:1 same size as pads". Is that possible perhaps with unusual types of photoresist?If by specifying a 1:1 opening the soldermask partially overlaps the pads (due to registration misalignment tolerances), what kind of issues might occur with 0.5mm pitch QFN?Thank you:

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 25, 2022, 08:00:58 pm
content: Oh yikes...LDI (laser direct imaged) has, or can have, tighter tolerances AFAIK, but not that tight.Thing with QFNs is, mask on pad makes it lift up some.I mean, you might do that anyway, and you likely get away with it, too -- sometimes you can hardly avoid traces between pads and the middle (GND), or need to use that inner ring space for additional routing vias*, which better be tented to avoid stray shorts, or, like, misalignment during soldering (not as critically as tenting vias inbetween BGA pads, but same idea, right?). It's probably not such a big deal overall, but in any case, it's that little bit extra distance that needs to be spanned by solder, so it's less side fillet (if wettable flank), more room for voiding (maybe??), etc.*I recall needing to do this just on a piddly MSP430; what is it with MCUs and those shitty randomized pinouts, anyway? You end up spending as much space in PCB routing as you'd save over a TSSOP or QFP...The other thing you can do, is zero, or even negative expansion (i.e. expanding the pad instead, for the same solderable area), with the goal that the pads are entirely mask defined ("SMD"). This is automatic any time you have, say, a power pad that's surrounded by pour with no thermal relief; so it can be helpful to tweak this parameter when you're doing that. But yeh, mask is generally looser tolerance, and many parts will inevitably have some NSMD pads (say because the pitch is too fine to do the pad expansion trick), so you're left with some pads mechanically referenced to copper features (pad edges, connecting traces?) and some pads referenced to soldermask (varying +/- some mils from Cu in the same place), and the fit is kinda awkward, and maybe there's a greater tendency towards shifted (off center) components or pins, or pin-pin shorts or whatever.Tim

author: bson
author_rank: Unknown
timestamp: April 26, 2022, 09:04:57 pm
content: Of course, with QFN if it isn't thin enough you get lifted pads withanysolder mask under the package. (Edit: I mean package "pin" pads not contacting the PCB footprint pads, not PCB footprint pads lifting off the PCB! Probably not using the right terminology here.)

author: ricko_uk
author_rank: Super Contributor
timestamp: April 26, 2022, 11:42:16 pm
content: Thank you Tim and Bson