Improvements/alternatives to op-amp circuit in front of oscilloscope - Page 1
Forum section: electronics / projects

author: MoonshinetheP
author_rank: Newbie
timestamp: July 30, 2025, 08:32:15 pm
content: Hello,I'm working on a little side project which is a little out of my comfort zone and would appreciate any advice or suggestions to help improve my present approach.I plan to 'make an oscilloscope' using the ADC of a Pi Pico and to use this to visualise/process an anologue signal (an exponentially declining voltage transient) from an instrument within a laboratory. The problem is that my analogue signal has a range of +/- 6 V, whereas the ADC of the Pi Pico seems only able to read voltages between 0 - 3.3 V. I designed some op-amp circuit to get my analogue signal within the potential range of the ADC:My reasoning for this approach was as follows:I needed to compress the analogue signal from 12 V amplitude to ~3 V and then shift it positively by ~1.5 V. For this I used an inverting summing amplifier to add the analogue signal to the 3.3 V output on one of the Pi Pico pins. The resistors are chosen to work with these potentialsThe output of the inverting summing amplifier is of course negative, so I added a second op-amp just to invert the signal without any amplificationAs an afterthought, I added another op-amp immediately after the analogue signal input to act as a voltage follower - the output impedance of the instrument is only 1 kOhm and I worked out that with currents of ~4.5 mA, I was going to lose most of my signal.I'm currently using three LM741 op-amps - I understand these are not the best model, but they worked on the simulation and they were pretty cheap (I was a little scared to buy anything more expensive at first). For this reason, I needed to combine two 12 V lead acid batteries with the center point grounded to reach a reasonable op amp supply voltage.Question 1Is there a more efficient or more elegant approach to this problem? I checked the conversion on a real oscilloscope and it seemed to work, but the output was noisier - not sure if this is a consequence of something I did wrong in the circuit, poor performance of LM741s, or that I just didn't ground properly and am using a solderless breadboard. Any suggestions for alternative op-amps are also welcome - I saw one Youtuber recommending something from the MCP600x series and it seems better. In general noise is an important consideration for me and I want to measure transients of up to 1 ms in width, but features might be down to microseconds - although at this point I will likely be limited by ADC frequency.Question 2I had to use two 12 V lead acid batteries to supply at least V+ = +12 V and V- = -12 V to the LM741 op amps. Ideally, I would like to switch to a rail-to-rail op-amp that can operate with V+ = +6 V and V- = -6V. In this case, I wondered if I could use a voltage divider with equal resistors to separate the terminals of just one 12V lead acid battery and then ground the mid-point potential so that the positive terminal is at +6 V and the negative terminal is at -6 V. I tried to simulate this and it worked, but only for small resistance values in the voltage divider:This seems like a problem - surely with smaller resistors, the current will be much greater and I will discharge the battery rapidly? With larger resistance values in the voltage divider, I assume most of the current is drawn by the op-amps - is this universal or again just a quirk of the LM741? If the former, is there a better approach to supplying the required voltage to the op-amps?

author: TimFox
author_rank: Super Contributor
timestamp: July 30, 2025, 08:54:56 pm
content: If you are using symmetric split power supplies, you should not need a 3.3 V bias node: the feedback returns can be grounded.Traditional op amp circuits typically used +/- 15 V supplies to allow +/- 10 V output swing, but single supply operation often requires a bias voltage at approximately half the supply voltage.

author: PGPG
author_rank: Frequent Contributor
timestamp: July 30, 2025, 10:25:36 pm
content: Quote from: MoonshinetheP on July 30, 2025, 08:32:15 pmAt least some uC ADC use very small sampling capacitor at their inputs. You can drive such input with high impedance source (like 100k) still having reasonable bandwidth.First what you have to do is to know what exactly is your source impedance and how looks your ADC input.There is a chance that you can get what you want using only 3 resistors: R1 from source to ADC input, R2 from ADC input to GND, R3 from ADC input to 3.3V.If R1 is for example 300k then: R2||R3 should be 100k, and divider R3+(R1||R2) should give at its output about 1.65V.With such solution your source is loaded with 400k and ADC input is driven from 75k source.For R1=30k the load will be 40k and output impedance 7k5.

author: Phil1977
author_rank: Frequent Contributor
timestamp: July 31, 2025, 07:32:57 am
content: PGPG´s solution is simple and reliable - I´d definitely try this.If you need an OpAmp for any other reason and if your source signal is limited to ca. 100Hz you should use some HF attenuation capacitors parallel to the feedback resistors. E.g. with 100nF over 300Ohm you get a transition frequency of around 5kHz, so it doesn't degrade the 100Hz-performance significantly but it reduces noise.

author: Ian.M
author_rank: Super Contributor
timestamp: July 31, 2025, 01:36:45 pm
content: A small tweak to PGPG's solution. He has neglected the current through the input resistor (R1) to ground via the source, which if the source is low impedance is effectively in parallel with the lower resistor of the bias divider (R2). This means that with his resistors, when the source is connected, the bias voltage becomes slightly under 1.24V, so input negative peaks at -6V become -0.26V, which is out of range for the ADC.The fix is simple:Keep R2||R3 = 100K and R1 = 300K for 25% of the input signalbutandmake R2 150K and R3 300K so the bias voltage with input grounded is 1.65V.An unit gain OPAMP buffer powered from the 3.3V rail (and ground) should then be used to meet the ADC input impedance requirement. It needs to be a low voltage RRIO OPAMP, optimised for supply voltages in the 3V to 5V range.As Phil points out, it may be worth low pass filtering the signal to reduce noise.ADC range and offset *will* need calibration.LTspice sim attached.Edit: I misread PGPG's post! His resistors are correct.

author: PGPG
author_rank: Frequent Contributor
timestamp: July 31, 2025, 03:16:17 pm
content: Quote from: Ian.M on July 31, 2025, 01:36:45 pmHow did you read:Quote from: PGPG on July 30, 2025, 10:25:36 pmFrom using here paralel R1 and R2 you should see that input is grounded.I just have let calculations to be done by OP.

author: Ian.M
author_rank: Super Contributor
timestamp: July 31, 2025, 04:33:58 pm
content: Sorry, you are correct. I can only plead lack of caffeination!

author: SCSKITS
author_rank: Regular Contributor
timestamp: July 31, 2025, 06:08:19 pm
content: First thing I would do is scale up the resistors by 10X to maybe 100X. There is no need for such low values when dealing with a 100Hz signal. i would also look for an op-amp with low input offset voltage and low input bias current. The LM741 is not too good in those areas and the errors add up with each stage in the circuit. Digi Key has a good parametric search engine, just start by searching for OP-AMP.. Also, the voltage used for the offset (currently 3.3V) should be from a reference IC like the ADR03 (2.5V), ADR02 (5V), REF3033 (3.3V), or REF3030 (3.0V). The 726 ohm resistor (scaled up) would have to be re-calculated to compensate for the reference voltage if different from 3.3V. If possible use the same reference for the ADC. If in a 3.3V system, I like to use the 3.0V reference for the ADC..

author: SCSKITS
author_rank: Regular Contributor
timestamp: July 31, 2025, 06:40:58 pm
content: The attached circuit will take a -6V to +6V input and convert it to a +12V to 0V output. The input has a high impedance buffer stage and is offset by 6V and inverted in the second stage. All resistors are 10.0K except for the 100 ohm in series with the power to the reference. The inversion needed to get back to the original can be easily done in software. Getting the 12V output to the 3.3V ADC is just a divide by 4 and a unity gain buffer stage. This leaves a 0.3V headroom on the ADC assuming it uses a 3.3V reference.

author: MoonshinetheP
author_rank: Newbie
timestamp: August 02, 2025, 08:07:53 pm
content: Thank you all for your comments! Sorry I have not responded sooner, I have been away for the last few days.There are two things that I should probably first clarify:My source impedance is 1 kOhmThe signal in the circuits I attached is a sinusiodal wave with a frequency of 100 Hz, but this is more a consequence of the Circuit Simulator application I was using (https://www.falstad.com/circuit/) and not exactly the case for my real analogue signal. I guess the easiest way to explain the real signal is that its the voltage output from an inverting op-amp and that the current signal at the inverting input terminal of this op amp is from the charging of a capacitor with a resistor in series. The time constant for this RC circuit can vary, but I guess as a rough estimate I should expect something like 1 ms, but I obviously would like to observe the charging current transient with enough detail (100 kHz? not sure how to judge exactly). I don't know what the bandwidth of the inverting op amp after this RC circuit is, but I assume it is reasonably high. The ADC of the microcontroller has a sampling frequency of 500 kHz, although I can only get 20 kHz when programming with micropython. I guess then that the worry is more that any filtering will influence the bandwidth of the circuit towards the charging current (I would prefer to see the preserve the analogue signal with sharp rise and exponential decline)Sorry for any poor understanding/description of the circuits, I only really have electronics background from reading a few books. In general I want to also ask if there is some reason to avoid op-amps. I assume you can perhaps slow down the signal or introduce filtering at each op amp slightly, but is this an issue for such a small circuit?Quote from: PGPG on July 30, 2025, 10:25:36 pmI didn't know this about the ADC, so thanks for the tip! I read somewhere that this ADC capacitance is 1 pF, so I assume it is not really going to influence the bandwidth too much even with a 300 kOhm resistor (I calculated 500 kHz). Just to check, I assume you mean something as follows (R2 and R3 in parallel to make 100 kOhm):I was wondering if there was some way of doing this in the beginning, but I didn't know the maths to figure it out. Still not sure how to tweak the resistors to maximise signal for ADC, but I also worked out that I will draw 10 - -20 uA of current, which is then 10 - -20 mV lost from my analogue signal (but I assume only at extremes of 6 or -6 V). I guess this will slightly squash my data, which might be a problem for me. I guess I could either increase the resistance, but then I am reducing bandwidth, or add a buffer in between the source and the resistor. If I do the latter, what capacitances are typically present and will I have to worry about further bandwidth loss?Quote from: Phil1977 on July 31, 2025, 07:32:57 amThank you for the tip. I've seen this in some sircuits but I didn't know what it was for. I think I have some data somewhere for a similar RC circuit and I could apply 1kHz low-pass filter without too much signal distortion.Quote from: Ian.M on July 31, 2025, 01:36:45 pmForgive me if its a stupid question, but do I need another buffer in front of the ADC as well? I assumed it has high impedance and isn't drawing too much current.Quote from: SCSKITS on July 31, 2025, 06:08:19 pmIs there a disadvantage to using smaller resistors other than that I'm going to discharge the 12V batteries sooner? I assumed it was better to keep the resistances low if I had the source buffered so that I didn't accidentally add any filtering (as mentioned above my signal is a bit higher than 100 Hz). I don't know how much current the microcontroller can provide, but I didn't notice any drop from the 3.3V GPIO with the 726 Ohm resistor.

author: SCSKITS
author_rank: Regular Contributor
timestamp: August 03, 2025, 01:10:36 pm
content: Take a look at the circuit I posted the other day. It has a high impedance input so it will not load the source signal. It is simple and uses easy to get 10K resistors in the gain stages. It does need a reference IC, but addresses your concerns. It also has a low impedance output which can drive a resistive divider before the ADC or the divider can be buffered. Inversion can easily be done in the software post analog to digital conversion.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 03, 2025, 10:38:13 pm
content: Scopes are made for a wide range of input voltages. Below is the schematic of the analog section of the DSO-Shell from Jyetech. It's not a great scope, but it it is a usable gadget and it has an frontend that can be set over a reasonably wide voltage range. It can be set from 5mV/div to 20V/div, so that is a range of 1 to 4000.I do have a Siglent SDS1104X-E myself, but I still bought the DSO-shell out of curiosity. And for it's EUR40, it's also a quite nice STM32 development kit with an LCD, rotary encoder and buttons in a box. I am a bit surprised I have not seen this thing used for other projects.

author: PGPG
author_rank: Frequent Contributor
timestamp: August 04, 2025, 11:46:28 am
content: Quote from: MoonshinetheP on August 02, 2025, 08:07:53 pm- the simpler circuit the better,- OpAmp need supplies, supplies need regulators and blocking capacitors,- OpAmp supply fluctuations/noise in some way propagates to its output,- OpAmp adds also its own noise.- OpAmp input offset is not 0 (for cheap OpAmps it can be several mV).Quote from: MoonshinetheP on August 02, 2025, 08:07:53 pmAs I have written with R1=300k in serie you will have 75k output impedance and this impedance counts when looking at ADC input.But situation with bandwidth is not so simple as filer made from 75k and 1pF.If it is sampling capacitor than during conversion it is discharged and then connected back to the input to be charged to get next sample for conversion. It is different situation than if the capacitor will be permanently connected to 75k source. You should rather not look at it as RC filter but assume that RC time constant defines time needed to acquire next sample. After T=4xRC (=300ns) you have capacitor charged to about 98% of input signal (2% error). But if you work with 20kHz than you have about 50us to get next sample (huge time compared to 300ns).You should probably add capacitor (10pF..1nF) at ADC input being a source of charge for sampling internal capacitor. So when 1pF will be connected to it it will be fast charged from capacitor and then both capacitors will be going to the right value by charging from 75k (but not starting from 0). I think that for each IC with ADC there should be some app-notes available describing exactly how it should be used.Quote from: MoonshinetheP on August 02, 2025, 08:07:53 pmYes something like..., but divider:R3 + (R1||R2) =200k + (300k || 200k) =200k + 120kgives 1.24V and not 1.65V2 rules I have written should lead you to system of equations form which you should get R2 and R3. I just want to leave something to you to do, not do everything for you.Schematic to be 'immediately understandable' should have source at left, output at right, GND at bottom, and supply at top.At your schematic only GND is where it should be.