Why do osciloscopes use FPGA and ASiC`s instead of a conventional PC CPU ? - Page 1
Forum section: electronics / beginners

author: little_carlos
author_rank: Regular Contributor
timestamp: March 30, 2016, 05:24:17 am
content: Is there any advantage of using fpga's or ASICS instead of a cpu ? or conventional pc hardware?

author: John_ITIC
author_rank: Frequent Contributor
timestamp: March 30, 2016, 05:29:17 am
content: FPGAs and ASIC can deal with data with nanosecond intervals while a microprocessor deals with microseconds. If you need to do things really fast like data acquisition then a micro is simply not useful.

author: danadak
author_rank: Super Contributor
timestamp: March 30, 2016, 10:53:07 am
content: In the scheme of things -FPGA User Design down to LUT, routability limited by architecture Mid optimizedFull ASIC User Design down to choosing size of transistors, routable at transistor level Highly optimizedUP, some super high volume parts, one can argue, depending on vendor, the most optimizedin terms of die size, process, package, testability.....http://www.eetimes.com/author.asp?section_id=36&doc_id=1322856http://asic-soc.blogspot.com/2007/11/what-is-difference-between-fpga-and_06.htmlRegards, Dana.

author: DutchGert
author_rank: Frequent Contributor
timestamp: March 30, 2016, 12:01:44 pm
content: All of the above and in general:An FPGA is great in parallel processingA CPU is great in sequential processing

author: danadak
author_rank: Super Contributor
timestamp: March 30, 2016, 12:19:27 pm
content: Great embedded CPUs these days have parallel processing in theform of DMA driven architectures.An example (Cypress PSOC) attached. An A/D, followed by Digital Filter andDAC, all operating independently from CPU. Same can be done on com, manyother activities.http://www.cypress.com/products/32-bit-arm-cortex-m-psocIn fact PSOC can additionally be programmed in Verilog, in addition to C/ASM for CPU, to create customparallel operating modules.Regards, Dana.

author: DutchGert
author_rank: Frequent Contributor
timestamp: March 30, 2016, 12:51:14 pm
content: Quote from: danadak on March 30, 2016, 12:19:27 pmCorrect, but in general a CPU is a sequential device and an FPGA is a device that can be great at parallel processing if configured/programmed correctly.In my experience very inefficient designs come from embedded C engineers that start doing VHDL/Verilog because its 'just another programming language'. In a language like C u use hardware to execute your code while in VHDL/Verilog u 'design'/create hardware from available logic blocks.

author: danadak
author_rank: Super Contributor
timestamp: March 30, 2016, 01:33:54 pm
content: I think its getting more and more difficult to differentiate CPU fromFPGA solutions and vice versa, as FPGA vendors recognized theimportance of CPU, memory, so now offer those solutions in theirtools. In short look at the SOC parts of today's tools.I can't comment on proficiency of designers other than the folks I knowusing the Cypress CPU + Verilog capability parts (PSOC) have bridgedsome designs that would have used separates 10+ years ago and drivencosts and power down and reliability up in these designs. In fact I amwrapping up a design where the FPGA fabric capability of PSOC hasallowed me to do the entire system in a PSOC. In this case the CPU isthe heart of the design, the fabric the flexibility I needed.I am now learning FPGA and so far see the design issues largely commonwith CPU embedded work. However the stuff I am contemplating is notsolving Ghz Cell Tower management, or the first Mars expedition commandmodule.Regards, Dana.