Bandwidth of N-JFET Relating to Gate Capacitance Only?... - Page 1
Forum section: electronics / beginners

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 09, 2020, 12:06:42 pm
content: i'm learning to use JFET in common drain (source follower) or in voltage amplifier setup (whichever that will work better for my need).. i'm looking atMMBF4117because it has the lowest gate capacitance in lcsc stock, but there's no gain bandwidth spec. the application is "audio"the choice of lowest gate capacitance is because i want to use it in high freq circuit up to GHz region. i think i really missing something. do i have the right mind? also the circuit is attached, input is 1Mohm impedance 1/10X divider, i want the output to follow 1/10X of what the input is up to GHz or whatever BW the 3pF Ciss can give. is the circuit sensible? (current source at the bottom so i guess to get better linear behaviour) if not (i guess the most likely answer i will get) can you suggest high freq jfet that i need to use? and what other spec to consider? cheers and thanks. (more info: VP+ = 12V, VP- = -12V)

author: Marco
author_rank: Super Contributor
timestamp: September 09, 2020, 01:18:04 pm
content: Why not use something actually meant to be used in that range like the CE3512K2?

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 09, 2020, 04:34:40 pm
content: Quote from: Marco on September 09, 2020, 01:18:04 pmfine, lcsc got the stock, its under mosfet category thats why i didnt spot it. but at $2.55/fet maybe i can only get 1 or 2 for testing... if i buy from digikey ($1/fet) i probably will pay much more for shipping. btw its a bit limiting Vds only 4V but maybe its possible if i change circuit spec.further looking at rf mosfet class in lcsc, i think this kindof fets are meant for common source config ie for high gain application, much like MMIC, one datasheet that provides circuit example is thishttps://datasheet.lcsc.com/szlcsc/1912111437_STMicroelectronics-PD84001_C411392.pdfand they start from $2+ and can go up to $39/fet, a real premium, not something i'm willing to buy for testing. i already have few MMICs.btw, i dont really need high gain amplifier fet, only voltage gain of 1 will do and its high (near inf) input impedance with low capacitance. is there any obvious reason why the MMBF4117 cant work up to at least 1GHz? its only 15 cents / fet. i'm not sure whats the catch thats why i ask.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 09, 2020, 04:35:22 pm
content: You have no solution because you are missing critical information:- What is the source impedance at "up to GHz"?- What is the load impedance at "up to GHz"?- How much does a few pF really matter at those impedances and frequencies?- What effect does transconductance have, in a source follower?Once you understand these, answers will follow simply.One note: a source follower does not have gain-bandwidth. Its DC gain is already less than 1, after all. There are some ways to compensate and peak a follower circuit, but they are limited. The better solution overall is to simply build a regular known-impedance (see above!) circuit with gain, and peak that. For a high (DC) resistance circuit like this (I assume some kind of 1/10x probe buffer), it may be feasible to build a crossover circuit that handles LF and HF through split paths.Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 09, 2020, 05:09:26 pm
content: you are spot on when saying its a somekind of probe buffer, and i've made a careless mistake on the attached circuit (the inp on the right should be the "output") here again attached the corrected version. so here they are...Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmprobing circuit with 50 ohm source impedance, probably up to 1Kohm? the normal circuit/device/T&M that anyone have/sell? i can change the divider values to say 100Kohm + 10Kohm, or 10Kohm + 1Kohm for much lower circuit's voltage and higher BW application.Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmthe output (see attached) will become the input to the next amplifier stage (opamp) with a quite high input impedance (1Mohm to maybe 100Kohm). my only concern now is the fet source follower circuit like this... can the source really follow whatever the gate voltage is? up to say a GHz?Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmthe less pF the better... probe design rule... and the lowest Ciss fet in lcsc i can find is mentioned in OP...Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmnot sure what you mean. i think this is a part of my question... since the fet will have constant source (and drain) current as set by 2 transistors current source at the bottom, i dont think transconductance really matters. no?Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmdo i understand those? am i green?Quote from: T3sl4co1l on September 09, 2020, 04:35:22 pmi've thought about this. i think we all know the $9 AC coupled 1GHz fet probe sold in ebay, we can make another DC path for it but i guess it will complicates the circuit much more, let alone the next stage amplifier to combine them back again. i'm not sure why you said DC gain for the source follower is less than 1, i thought it will follow the gate's voltage whatever it is (with some Vgs drop), otherwise it should not be called source follower should it? one of the objective is to ensure Vgs is near constant at all gate's input range (±5V) thats why i put 2 transistors current source there with hope that with constant Id, Vgs will be constant too, but maybe this is just my delusion, this is the best i can do right now it probably entirely wrong. advices and recommended solutions is highly appreciated. for more clarification to avoid confusion (if its worth it) i'm planning to do the voltage offset correction/biasing and AC gain correction in the next amp stage, i need this front end to be as simple as it can, to reduce stray capacitances. but then if too much complicated circuit means bulky probe and bulky probe is not good. cheers.ps: i can replace the 2 transistors constant current source with just a simple resistor, i will test it later, whichever performs better wins. and i know there are circuit examples out there for 1 transistor constant current source, but lets not get to it..

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 09, 2020, 06:30:40 pm
content: Quote from: Mechatrommer on September 09, 2020, 05:09:26 pmOk. And what capacitance gives a -3dB point at 1GHz and 50 ohms?1kohm?10k?QuoteThat's one hell of an op-amp... I don't know ofanywith a mere 1.6fF input capacitance!QuoteWhat you need to understand is there are multiple competing factors, and you cannot simply minimize one independently, you must compromise between them.It's trivial to get 0 pF. You just use no JFET at all, and your follower has a gain of (almost) 0 at 1GHz.Somewhere inbetween, there will be a case with adequate gain at high frequencies, with anacceptableinput impedance (which may be resistive, capacitive, or mixed).QuoteWell, what is the equivalent circuit of a JFET? What does transconductance actually mean?What is the equivalent circuit of the op-amp input?Quote"Follower" is an approximate term.The gain is always strictly less than 1. (Exercise: under what conditions would it be greater than 1?)Indeed, back in the tube days, a cathode follower might've had a gain of 0.5 or even lower. A typical example being the 6AS7 pass tube in a regulated power supply. This is especially low due to the low amplification factor of the tube; a pentode (with bootstrapped screen grid) has a high amplification factor, and performs about as well as a JFET or BJT.(The transconductance, plate resistance (or 1/output conductance) and amplification factor (mu) form a triangle: gm * Rp = mu. Transistors rarely if ever give mu because it's so high, and only sometimes give output conductance (h_oe for BJTs, y_oe for FETs). In any case, the third can be calculated from the other two.)QuoteIt's true enough at DC, what I'm trying to show is that there are other factors at AC. And you are very much asking about frequencies where those AC factors dominate, so they fundamentally cannot be ignored.Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 09, 2020, 06:56:49 pm
content: thanks for the hintsi'll study more...

author: David Hess
author_rank: Super Contributor
timestamp: September 09, 2020, 07:36:07 pm
content: Leaving out the source impedance, which is why you are using a low input capacitance JFET, for practical circuits the bandwidth is proportional to the transconductance and inversely proportional to the total input and reverse transfer capacitance:Ft = Gm / 2 PI (Ciss + Crss)The 4117 is optimized for low leakage and while it has a low capacitance, its tiny transconductance limits its bandwidth to 7 MHz at most. A more typical JFET for this application will have a hundred times more transconductance. A 2N4416 for instance is more like 250 MHz. Look at RF JFETs.Note that the JFET will not be able to directly drive the following low impedance circuit, so its output is typically buffered by an emitter follower.

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 09, 2020, 11:44:13 pm
content: Quote from: David Hess on September 09, 2020, 07:36:07 pmahh! this should narrow things down pretty quickly and seems to make my above circuit (part selection) is a joke.. this also hinted me that this is the section that i should concentrate on in the datasheet.... which is what is exactly asked in the OP..and they all are equally important based on the formula... i will still struggle to find resources on where the formula originating... as the equivalent jfet circuit normally found in the net doesnt tell anything about this relationship..Quote from: David Hess on September 09, 2020, 07:36:07 pmi'm not sure how this line related to my circuit as the load seen by the jfet should be quite high impedance, ie its output will be buffered by an opamp.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 09, 2020, 11:57:13 pm
content: Quote from: Mechatrommer on September 09, 2020, 11:44:13 pmAh, you found thelow frequency AC equivalentcircuit. But something's missing; as you say, it doesn't tell anything about this!Tim

author: David Hess
author_rank: Super Contributor
timestamp: September 10, 2020, 12:51:15 am
content: Quote from: Mechatrommer on September 09, 2020, 11:44:13 pmThat is fine then, although if the following stage is an operational amplifier, why is the JFET needed at all?

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 01:37:38 am
content: Quote from: David Hess on September 10, 2020, 12:51:15 amthe opamp is not fet input, so not as high input impedance as jfet. this is only for testing and learning of possible options. i have many parts order from lcsc, so ordering some cheap jfets suitable for high speed with them at $1-2 addition will not hurt (save shipping cost). with your provided hint (formula), i have few other candidates to play around... 2SK508, NDS7002A (mosfet), MMBFJ112 (slower) and the famous BF998 (different footprint, i prefer to experiment with sot-23 first), each of them is ~$1/10pcs. i already have earlier prototype version that directly using cfb opamp, have to deal with pcb stray capacitance issues. best regards.Quote from: T3sl4co1l on September 09, 2020, 11:57:13 pmneither does this, or at least not very clear, or at least will take weeks to digest and finding the right materials (in which case i wont need a forum)..should i buy books too? i have a pcb layout to fondle right nowcheers.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 10, 2020, 04:42:09 am
content: Ah perfect -- as simple as it can be, and no simpler (as Einstein said).This is showing:- An input circuit, and an output circuit.- The two sides aren't shown coupled together (besides the transconductance), but mind you can (should, even?) draw the Miller capacitance explicitly between D and G. Then the apparent (Miller effect) capacitance shows up when solving the system, automatically. (This is more specific, because it allows for phase shift in the transistor itself (gm --> Ym(f), i.e. a complex function of frequency). If you aren't using y-parameters, assuming a fixed gm is a fine start.)- In each circuit, You have several resistances and capacitances in parallel; for calculation purposes, just use the total equivalent.- You have a single R and C equivalent in each circuit, which defines an impedance and a cutoff frequency, F = 1 / (2 pi R C).- If five components is still too intimidating, well, I don't know what more to say.Now, you do need to rearrange this circuit; it's shown in common-source form, and you need common-drain:- The stray input capacitances still act between input and ground, but the transistor's contributions act to ground (Cdg -- assuming drain is AC grounded) and to source (Cgs).- The feedback capacitance (Cgs this time) doesn't get multiplied by Miller effect, instead it's bootstrapped away; helpful!- Load capacitance acts from source to ground, which does interesting things to the input impedance.- The dependent source (gm current) is still drawn from D to S, and still depends on Vgs of course.So the input circuit isn't very different, having a little less capacitance, though with a somewhat uncertain impedance due to possible phase-shifted feedback (via Cgs). This total equivalent capacitance defines the maximum input resistance for a given bandwidth. The uncertainty in impedance defines flatness, and stability with respect to input and load impedances.Because Is depends on Vgs and applied voltage is Vg, output Vs is subtracted and the difference is amplified; it's a negative feedback loop, and this greatly reduces the output impedance. In fact, Rout ~= 1/gm. For the 2N4116, that's kohms, hardly an improvement if any at all -- but for a reasonable type like PN4392, it's about a hundred ohms, which can tolerate up to 1.6pF loading on its output. (Which will be easily exceeded by Cds and strays, but hey, it's a start, and it shows that only slightly better transistors are needed to actually meet spec!)FYI, CPH3910 happens to be one of the best JFETs available right now I think? BF862 was a previous favorite, now discontinued. Some combination of hi-falooting RF parts (PHEMTs, GaN FETs and SiGe HBTs?) apparently can make for some ridiculously nice buffers, among other things. Of course, you'll be hard pressed to find high voltage ratings in those families; supplies can be bootstrapped to extend operating range, but, that's adding circuit complexity, too.Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 10:26:55 am
content: Quote from: T3sl4co1l on September 10, 2020, 04:42:09 amyes its a surprise there is mentioning Cmi in the above diagram but not shown anywhere in the graphics. i think if you are the one laying out the equivalent circuit above, it should be much much better! and very close to real life behaviourand so i can see much clearer the coupling effect between input and output, so far the explanation i got from reading is that, the Igs = Igd = 0 (the ideal model) i'm not aware of non ideal behavior of the gate wrt drain and source (except gate capacitance) until you mentioned that Miller capacitance is from G to D. maybe i should dig deeper into realistic or non ideal fet model?... the simplest i can find is...http://web02.gonzaga.edu/faculty/talarico/ee406/20162017/Lectures/nonideal-transistor.pdfcant be any simpleras for now, the formula given by David is the most welcomed as i can put parameters from datasheet into it and quickly figure out the ballpark figure for bandwidth (ignoring stray/outside effect of course) maybe the formula is derived from the ideal/equivalent circuit and math modelling as you've described. anyway its super handy, try to self-derive the formula could take weeks of nothing else to do except learning math.thanks for your time explaining, i think thats more deeper than i originally expected. its like you are providing the puzzles up there while i'm still trying to solve the lower part (much more basics stuffs) hopefully the puzzle will merge together soon. i think i got your idea of trying to understand the circuit behaviour from ideal jfet model and solving in math. but as you've keep mentioning, and i'm already aware of, there are stray elements from pcb that will change the ideal behaviour, so i'd rather build it first, see the actual performance and then try to fit it into the mathematical model if necessary. thanks and cheers.

author: Electro Fan
author_rank: Super Contributor
timestamp: September 10, 2020, 10:27:11 am
content: Quote from: T3sl4co1l on September 10, 2020, 04:42:09 amThis is a very educational (very informative and enlightening) thread, and this is a great summarizing post! THANKS

author: Electro Fan
author_rank: Super Contributor
timestamp: September 10, 2020, 10:58:00 am
content: Quote from: Mechatrommer on September 10, 2020, 10:26:55 amMechatrommer, you are way, way down the path beyond me but this post has provided some very helpful insight - thanks for the original post and spawning all the great Q&A. I like your puzzle forming and framing and get the math outline and notice the ideal vs non-ideal and then build it, measure it/test it, observe it and reflect on it approach, a lot.

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 12:25:59 pm
content: here is my sim using J112 well.... i can make it (almost) flat up to 10GHz, sounds like a pure delusion, but at least it encourages me to keep going building the pcbi'm just not sure why the virt dso showing correct -20dB attenuation, but signal analyzer showing -25dB, hmm something fishy..

author: Marco
author_rank: Super Contributor
timestamp: September 10, 2020, 01:55:36 pm
content: Quote from: Mechatrommer on September 09, 2020, 04:34:40 pmI thought you wanted very low noise and those HEMT FETs are the closest you get to JFETs at very high frequencies.If noise is not an issue just use the double gate MOSFETs like the BF998 one used inthe poor man's GHz active probe and a bunch of others.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 10, 2020, 04:10:43 pm
content: Quote from: Mechatrommer on September 10, 2020, 10:26:55 amMost of those are part of the parameters described: channel length modulation gives rise to output conductance (y_oe) -- just put it in parallel with R_L. Velocity and mobility I think don't apply for these parts, at least not nearly as significantly (notice the small voltage scale in Fig. 2.14). This is specific to monolithic transistors, which you aren't using here. Leakage isn't relevant at these impedances, and significant gate current flows only when Vgs > 0, namely around a diode drop (because G to D and S is an ordinary diode junction). You'll need a pretty large source signal, or heavy load, to see gate rectification, and anyway that introduces distortion and bias shift, which you're better off just marking off as "outside of specifications" -- if you see these effects, just turn down the signal level.Quote from: Mechatrommer on September 10, 2020, 12:25:59 pmThere should at least be a capacitor divider between input and Cdg. Maybe the model is lacking capacitances?You also don't have any output capacitance, so that's not meaningful. If Cgs is dominant then you get the signal source happily feeding through to the output, no transconductance necessary.Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 04:48:36 pm
content: Quote from: T3sl4co1l on September 10, 2020, 04:10:43 pmurgh dont expect me to read all that, nor that you are willing to explain them all i guess, its a tough subject with lots of weird symbols. i'll go through that as i learn and when needed, meaning not soon like tomorrow nor next week. at least now i got a little bit of picture of what should be done next.Quote from: T3sl4co1l on September 10, 2020, 04:10:43 pmattached are the parameters we can change in TI-TINA sim, there is gate-source and gate-drain there. so maybe they are there, but...Quote from: T3sl4co1l on September 10, 2020, 04:10:43 pmwith this statement you probably right and maybe this idea of using cheap jfet as a buffer is just bogus or redundant or make things even worst compared to direct opamp stage after 1/10x divider. my latest pcb's stray capacitance alone i guesstimate around 5pF, combined with 10-30pF of Ciss Crss, those can kill any HF bandwidth before it reach the next stage, or otherwise worsen the probe loading on the probed circuit due to compensating capacitance divider... few new things learnt, modern HF opamp input only 1-2pF, so maybe i'll just use that. but still maybe i will continue to make a test pcb for this just as pure learning as i've never seen a jfet in actioncheers.

author: David Hess
author_rank: Super Contributor
timestamp: September 10, 2020, 04:51:11 pm
content: Quote from: Mechatrommer on September 10, 2020, 01:37:38 amIn applications where the frequency response of a JFET follower would matter, the following circuit will be low impedance and difficult for the JFET to drive so a bipolar follower is used to buffer the JFET follower's output. With operational amplifiers, this may or may not be the case. JFET with operational amplifier composite amplifiers usually involve a JFET differential amplifier. This might be done to get the lowest possible noise and input bias current at the expense of higher input capacitance, but this is less common now because JFET input operational amplifiers have gotten better.

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 05:04:26 pm
content: Quote from: David Hess on September 10, 2020, 04:51:11 pmyes this make sense now... coupled with what TIm has explained. jfet's output also need taking care of, i thought i might just get away by dealing with the input. i might be just doing double or triple work here with jfet. cheers.

author: David Hess
author_rank: Super Contributor
timestamp: September 12, 2020, 04:46:20 pm
content: Quote from: Mechatrommer on September 10, 2020, 05:04:26 pmIt is not a big deal; just add a bipolar emitter follower or two to buffer the JFET output. Sometimes the JFET drives a shunt feedback bipolar stage for a better controlled gain.If a single bipolar emitter follower is used to buffer the JFET, then its Vbe voltage drop can be compensated as part of the Vgs of the JFET by adding a diode into the JFET compensation circuit.