Need help with a transistor and gate. - Page 1
Forum section: electronics / beginners

author: hhoka
author_rank: Newbie
timestamp: February 16, 2019, 09:22:33 am
content: I made this circuit here:https://imgur.com/a/4Wr5zZsThe problem is, that while A is at 0V, B is at 2.9V the output is high. I'm not sure why this is, and I've tried different resistors too (2k, 10k, 20k) but none of them worked. What's wrong here?

author: Damianos
author_rank: Frequent Contributor
timestamp: February 16, 2019, 09:37:52 am
content: I am guessing that the output is around 2.5 V.If we remove the upper transistor, then from input B to output there is a resistor and a diode (the BE junction of the lower transistor).

author: hhoka
author_rank: Newbie
timestamp: February 16, 2019, 09:56:13 am
content: Yes, it's 2.5v. Why is the upper transistor acting like that?

author: Zero999
author_rank: Super Contributor
timestamp: February 16, 2019, 10:06:12 am
content: Quote from: hhoka on February 16, 2019, 09:56:13 amIt's exactly what you should expect to happen.The upper transistor is off and isn't doing anything. Current is flowing from pint B, through the transistor's base and appearing at the emitter.

author: hhoka
author_rank: Newbie
timestamp: February 16, 2019, 10:31:13 am
content: How should I fix this to get the desired output? I read somewhere that this is an improper design of an AND gate, instead you should make a NAND and just invert the output, is this what I'm supposed to be doing?

author: Zero999
author_rank: Super Contributor
timestamp: February 16, 2019, 10:47:26 am
content: Quote from: hhoka on February 16, 2019, 10:31:13 amYes. Note there's also a significant voltage drop, even when both inputs are high. A NAND followed by an inverter will solve this problem.Or just use an IC. Discrete gates such as this are a thing of the past. If space is at a premium, there are surface mount packages available containing one or two gates, such as the 74HC2G00 (dual NAND), 74HC1G08 (single AND) etc.https://assets.nexperia.com/documents/data-sheet/74HC_HCT2G00.pdfhttps://assets.nexperia.com/documents/data-sheet/74HC_HCT1G08.pdf

author: hhoka
author_rank: Newbie
timestamp: February 16, 2019, 10:55:30 am
content: Alright, thanks

author: MarkF
author_rank: Super Contributor
timestamp: February 16, 2019, 11:04:50 am
content: Take a look at these

author: Zero999
author_rank: Super Contributor
timestamp: February 16, 2019, 01:16:35 pm
content: Quote from: MarkF on February 16, 2019, 11:04:50 amAll good ideas but proceed with caution, as some of them have a lot of voltage drop.

author: rstofer
author_rank: Super Contributor
timestamp: February 16, 2019, 05:00:09 pm
content: You need to understand transistors and how they are turned on and off.The bottom transistor needs a base voltage equal to the output voltage plus 0.6V to account for VBEIf you want an output of 5V, you need a base voltage of 5.6V. You also need to account for VCEsatwhich is about 0.2V so the collector needs to get to at least 5.2V which is also the emitter voltage for the top transistor.It's the upper transistor where things really turn south. For the emitter to to get to 5.2V, two things have to happen. First, the supply voltage needs to be 5.2 + VCEsator around 5.4V. The problem is, the base voltage needs to get to the emitter voltage (5.2V) plus 0.6V VBEor 5.8V.If you really only have 5V then you won't see more than 4.2V output on the gate. And this is going to limit the output voltage of downstream gates. The next gate can't get above 3.6V, the one after can't get about 3.0V and so on. When gates were made this way, there were buffers gates inserted to restore the voltage level which slowed down the logic.You're right, this is a lousy circuit for an AND gate.When you think about it, you will see that NAND and NOR gates are easier to make and that's why the first numbered TTL device, the 7400, is a quad NAND gate. The 7402 is a quad NOR gate. They do make AND and OR gates (7408 and 7432) but they are much farther down the list and less important.The NAND gate may still use two transistors stacked but the load resistor is at the top. Worst case, the output will only pull down to 0.4V (two times VCEsat) but that is low enough to prevent a following stage from triggering so that output is fully high.Very little logic design actually uses AND and OR. We tend to write the equations as a sum of products (NAND) or product of sums (NOR).For the 7400, the highest logic LOW input voltage (VIL) is 0.8V and the worst case output LOW voltage (VOL) is 0.4V. So there is about 0.4V of margin - the worst case output is 0.4V lower than the worst case input. The lowest logic HIGH output voltage (VOH) is 2.4V and the worst case logic HIGH input voltage (VIH) is 2.0V so again, there is about 0.4V of margin. See page 2http://web.mit.edu/6.131/www/document/7400.pdf