Performance of Logic Analyzer in Rigol DS1102D - Page 1
Forum section: electronics / testgear

author: pascal_sweden
author_rank: Super Contributor
timestamp: January 04, 2014, 06:13:22 pm
content: I have seen a video on YouTube where there is conclusion that the 2 analog waveforms are not in sync with the digital logic channels when doing measurements.This seems weird, as isn't that the whole purpose of an MSO. Was this an initial bug and has it been solved in the Rigol DS1102D?Here is the video fragment with the finding: (Look at finding around 04:20)Please provide feedback if it has been improved in the new firmware?The PC Logic analyzers only provide digital channels, so they don't combine analog waveforms at all, so the MSO should do the job properly, as it is only way to combine analog and digital, and have them synced.

author: Mark_O
author_rank: Frequent Contributor
timestamp: January 05, 2014, 05:00:25 am
content: Quote from: pascal_sweden on January 04, 2014, 06:13:22 pmYes, I saw that some time ago. That was the hilarious conclusion. Had me laughing hard for a long time.QuoteThis was never 'solved', or 'fixed', because there was nothing wrong with the Rigol. What it showed was exactly correct. It was just another ofmanysituations where an inexperienced operatorcouldn't understand what he was seeing, and thus concluded the Rigol LA must be broken.Unfortunately, that happened a lot.His 'solution' was brilliant though: dump the untrustworthy Rigol. And switch to a different device, that hadno wayfor you to see the confusing analog signals, along with the digital. That 'fixed' it, good and proper.QuoteNope. As I said. Never fixed, because it was never broken.QuoteYes, that's correct. But when you crank the timebase up to max, and are looking at signals in the nanosecond time-frame, you have to remember to consider the speed of light (or more accurately, signal propagation in the cables at ~0.95c). And pay some attention to the lengths of the cables you are using. I didn't go back and replay it, but as I recall, he was seeing unexplained shifts around 4-8 ns? Then ask yourself how long it takes for a wave to travel through a foot of cable. Lastly, look at the probes & cables he was using.You also need to know exactly where each signal is being 'acquired'. And it may not be where you first imagined.Otherwise, you wind up asking yourself how a scope could be showing you the arrival of a signal, several nanosecondsbeforeit was generated!It's incredible! It's amazing!(It's impossible.) Now if I were seeing that, I might conclude I didn't understand it (at first). But not that the equipment was defective.[And just to be clear, with the exception of a few erroneous conclusions, I thought Rich did a nice, careful, and well-described review of many capabilities that no one else ever bothered to do. They just wrote it off as non-functional, and moved on. Rich took the time to set up a test circuit, and walk through the whole process. Which was educational. He also has some informative criticisms, and suggestions for improvement, which I mostly agreed with.]

author: eurofox
author_rank: Unknown
timestamp: January 05, 2014, 09:52:23 am
content: I'm not familiar with the Rigol range, does this scope decode en trigger on serial lines such as USB, I², SPI, Can .....eurofox

author: Mark_O
author_rank: Frequent Contributor
timestamp: January 05, 2014, 10:03:13 am
content: Quote from: eurofox on January 05, 2014, 09:52:23 amNo, it does neither. I've used it to extract and verify SPI comms, and a few other protocols, but it's done raw.Back then, these scopes/MSOs were not that sophisticated. Heck, when the 1000D was introduced, even the expensive Tek scopes that had protocol analyzers could only decode their analog channels, not at all on the digitals.

author: hamster_nz
author_rank: Super Contributor
timestamp: March 21, 2014, 03:34:00 am
content: I've been playing around with my Rigol DS1102D to see just what speeds the logic analyser is actually useful at. The answer seems to be 15ns - (66 MHz for logic signals or 33 MHz for clock signals). You might just be able to stretch a little higher than that in some cases, but it would be pretty patchy.I've put a few screen grabs and the test project up athttp://hamsterworks.co.nz/mediawiki/index.php/Logic_Analyser_Testand would be interested in any comments anybody may have.

author: Mark_O
author_rank: Frequent Contributor
timestamp: March 22, 2014, 05:58:04 pm
content: Quote from: hamster_nz on March 21, 2014, 03:34:00 amThanks for performing your tests, Hamster, and posting the results.The reasons for all the double-boxing you're seeing in the early tests with persistence turned on is simply due to a combination of the quantization level of the digital sampling (max 200 MHz, or 5 ns), and phase shift from lack of sync lock. Things got more interesting when you disabled persistence, since that cleared up all the +/-1 jitter.You wrote there:> Turning down the FPGA's drive strength to 2mA on all outputs allowed the 10ns signal to be captured without corrupting the others, however it is pretty patchy:It's actually not that bad. With only 2 samples per bit cell, you really can't expect to see a uniform width pulse train.> The Rigol 1102D looks to be perfect for looking a logic signals clocked at up to 66Mhz (15.2ns) but is out of its depth at 100MHzKeep in mind that it's unlikely that the bandwidth of the LA section is better than that of the analog section. That means you're really not sampling clean pulses any more, but closer to sine waves. The fundamental itself is already down 3dB, and the remaining harmonics are attenuated much more. The setting of your comparator levels becomes critical, and jitter increases significantly. You can no longer determine pulse edges, because they don't exist any more, as far as your acquisition device is concerned.

author: Mark_O
author_rank: Frequent Contributor
timestamp: March 22, 2014, 06:16:17 pm
content: Quote from: hamster_nz on March 21, 2014, 03:34:00 amSimple analysis based on BW of the device (100 MHz) , and knowing you want at least the first harmonic (at 3f), and preferably the second (at 5f), indicates if other factors permit, then clocks up to 20 MHz should be reliable, and perhaps as much as 33 MHz would be viable. 50 MHz would be out of the question. Your empirical tests pretty much confirmed that theoretical analysis.QuoteNot only that, but a) lead routing to avoid crosstalk and signal coupling, and b) ensuring you have solid grounding. Things get ugly fast, if any of those 3 considerations are ignored.And another way to really mess things up is to also attach a capacitive probe (with or without a long ground lead) to observe the waveshape on an analog channel too.~~One question I had was if you encountered any trouble getting the logic threshold level set properly? I recall that seemed to cause a lot of people grief on the older 1000CD series, which used the same logic head.

author: Electro Fan
author_rank: Super Contributor
timestamp: March 22, 2014, 09:55:40 pm
content: I'm pretty late to this thread but it seems like the conclusion might be that the 1102D was/is fine for up to 20MHz (or maybe ~33MHz) when it comes to time correlating analog and digital signals? And presumably when the Rigol MSO1104Z comes out it will have roughly the same threshold but with more features?

author: Mark_O
author_rank: Frequent Contributor
timestamp: March 23, 2014, 05:59:18 pm
content: Quote from: Electro Fan on March 22, 2014, 09:55:40 pmPossibly. It kind of depends on what sample rate they can crank out on the digital channels. If it's only 250 MSa/s, as it is when the 4 analog channels are active, then yes, you're correct. That's only marginally better than the 200 MSa/s on the 1102D. But if they can manage 500 MSa/s (which I suspect they will, since there are essentially 2 groups of 8 ), then timing resolution would be improved (better quantization and less intrinsic jitter, at 2 ns).But the BW will still impose a limit on the frequencies where the edges of pulses can be determined. Look at any clean square wave source over 50 MHz on a single analog channel of the DS1104Z, even at 1 GSa/s, and I think you'll see what I mean.Still, this isn't meant to diminish it at all. Just to establish the boundaries of where it can operate effectively. It will definitely be a step up from the 1102D, and be a useful tool within that range. (Also considering the actual -3dB point on the 1102D is around 110-120 MHz, but extends to ~150-160 MHz on the DS1104Z). Heck, the sample depth alone (likely multi-megs) will be a big win over the 500K samples on the 1102D.EDIT: also, in the second case I mentioned (500 MSa/s), 50 MHz systems would no longer be "out of the question", but could be sub-optimally usable, if one was careful.