Starting with CPLD / FPGA, seeking advice - Page 1
Forum section: electronics / beginners

author: ALonda
author_rank: Contributor
timestamp: March 11, 2017, 10:42:46 pm
content: Hi there. Im interested in starting development on a cpu core, 8/16 bit RISC with DMA-like characteristics and I cant quite figure out which is best to begin with, CPLD or FPGA. An option would be to build it usic logic chips on a breadboard but it might be expensive or time-consuming to get all the needed chips so a generic solution like CPLD/FGPA is preferred.Problem is that right now Im almost broke, otherwise I think I would go for a bigger FPGA, but as money is a problem it will have to be smaller.I see a bunch of evaluation boards on digikey in my pricerange, but I wouldnt mind some advice on where to go. It seems Coolrunners and Spartans are popular, are iCE chips any good?I was looking at the XC2C256 as a viable option but have a feeling I might get more hands on micromanaging done with an FPGA though Spartan-6 is getting a little bit pricey for what I can afford right this moment.I have plenty of experience with assembly programming and programming in general, but im fairly fresh when it comes to electronics and logic chips.Its just a hobby, a source of entertainment. Instead of movie tickets I buy electronics, mostly MCU and SBC related these days.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: March 11, 2017, 11:26:09 pm
content: Has to be an FPGA for something that complex. Will also be a lot easier, with stuff like on-chip dual-port block RAM.

author: comeau
author_rank: Contributor
timestamp: March 11, 2017, 11:39:31 pm
content: I've started poking around with theMojoboard. I've also heard people like thePapilio DUO. Both have a Spartan-6 Xilinx FPGA and both are <$100. To me the Xilinx ISE seems pretty easy to use and Mojo has its own IDE. The Xilinx ISE supports VHDL-93 and VHDL-200X. It does not support SystemVerilog. The Mojo also supports his new language called Lucid. I hope that helps at least a little.

author: rstofer
author_rank: Super Contributor
timestamp: March 12, 2017, 12:46:10 am
content: The Mojo board, when it comes back in stock, seems like a nice board to begin working with FPGAs. It will easily fit a small RISC computer, it has some BlockRAM (32k 16 bit words) and some amount of IO. Lucid looks like a very clever way to write code. It is, however, non-portable. To the hobbyist, that is not an issue.The Artix 7 board costs a bit more money but it is a larger device and is supported by the latest Xilinx toolchain, Vivado. It has more than 3x as many logic cells and BlockRam. Although I don't use the DDR memory (because I don't understand it), there is plenty of it if a controller is available (I haven't looked).http://store.digilentinc.com/arty-artix-7-fpga-development-board-for-makers-and-hobbyists/

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 01:44:36 am
content: TheDE0 nanois nice, I have one. It has enough resources to implement a full Amiga (32 bit CPU, lots of custom chips) :And don't need such a base board for VGA output, just a few resistors for a R2R DAC and a VGA connector on a breadboard is all you need. Works perfect for like 6 bits per color per color component. Stereo audio out is possible, too, in high quality, with a low pass filter:http://retroramblings.net/?p=190

author: rstofer
author_rank: Super Contributor
timestamp: March 12, 2017, 03:00:40 am
content: Quote from: FrankBuss on March 12, 2017, 01:44:36 amAt the Terasic site, they list the Altera software as available with a 1 year evaluation license. So, what happens at the end of the year? Is it automatically extended or am I out looking to buy more hardware so I can get another license? Or do I just change vendors?I have avoided Altera specifically because of their licensing.

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 03:24:11 am
content: Last time I tried it, I used the Quartus web edition:https://dl.altera.com/13.1/?edition=webThe latest version 16.1 supports the Cyclone 4 of the DE0 nano board, too. But looks like they dropped support for the Cyclone 3This is still a nice device and Digikey still sells it.

author: james_s
author_rank: Super Contributor
timestamp: March 12, 2017, 05:34:47 am
content: Odd that they would drop support for the Cyclone 3 already, I still use Cyclone II's for some projects.Fortunately it's no problem to have multiple versions of Quartus II installed, aside from their obscene size but that's hardly an issue anymore with the size of modern hard drives.

author: BrianHG
author_rank: Super Contributor
timestamp: March 12, 2017, 06:08:27 am
content: Quote from: james_s on March 12, 2017, 05:34:47 amI do the same having QII 9.1 and up. What worries me is that one day there will be a forced USB Blaster driver upgrade, non-reversible, which will make programming with earlier QII incompatible. Then I'll need 2 systems...

author: james_s
author_rank: Super Contributor
timestamp: March 12, 2017, 09:07:28 am
content: Well here's hoping they don't do that, although IIRC the USB blaster works fine from a VM so you could just have a VM for one of the versions.If one is interested in playing with FPGAs on the cheap you really can't beat the EP2C5T144C8 boards that you can get for around $13 shipped on ebay. I don't know how they make them so cheap, must be a big batch of surplus chips because the FPGA alone costs more than that elsewhere. It's a pretty bare bones board but I've done quite a few cool projects with it. It's enough to contain an entire 8 bit retro computer.

author: danadak
author_rank: Super Contributor
timestamp: March 12, 2017, 10:25:50 am
content: Cypress PSOC, boards for $ 10 with debug, software free, DMA, ARM , mixe3d signal, DSP-http://www.cypress.com/products/32-bit-arm-cortex-m3-psoc-5lphttp://www.cypress.com/documentation/development-kitsboards/cy8ckit-059-psoc-5lp-prototyping-kit-onboard-programmer-andFor me what stands out is -1) Routability2) Fast 12 bit SAR A/D and slow 20 bit DelSig3) DFB (Digital Filter Block) that is dual channel, handle FIR or IIR filters, or DFBcan be used as a GP fast processor block, similar to RISC block4) MSI logic elements GUI based and/or the UDB Verilog capability. Eg. the FPGAlike capability5) Onboard Vref6) IDAC, VDAC, OpAmps (up to 4), comparator, mixer, switch cap, analog mux....7) LCD, COM, UART, I2C, I2S, One Wire, SPI, Parallel, LIN, CAN, BLE, USB9) Custom components capability, create with schematic capture or Verilog10) DMA to offload processes like filters, COM, Display11) ARM M0 (PSOC 4) or M3 (PSOC 5LP) or 8051 core(PSOC 3)12) Extensive clock generation capabilities13) All components supported by extensive prewritten APIshttps://www.element14.com/community/thread/23736/l/100-projects-in-100-days?displayFullThread=truehttp://www.cypress.com/documentation/code-examples/psoc-345-code-examplesGreat video libraryAttached component list. A component is an on chip HW resource.Free GUI design tool with schematic capture, "Creator". Components have rich API library attachedto each component. Compilers free as well.PSOC 4 is low end of family, consider 5LP parts as well. PSOC 4 also has arduino footprint boards (pioneer) as wellhttps://www.elektormagazine.com/labs/robot-build-with-cypress-psochttp://www.cypress.com/products/32-bit-arm-cortex-m-psocThe low end, pioneer board -http://www.cypress.com/documentation/development-kitsboards/cy8ckit-044-psoc-4-m-series-pioneer-kitRegards, Dana.

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 10:32:17 am
content: Quote from: james_s on March 12, 2017, 09:07:28 amNice, I just bought one, looks good for prototyping or one-off projects, they are still selling it:http://www.ebay.de/itm/272547446602But I found another one while browsing eBay:http://www.ebay.de/itm/232194910386This looks very similar to the DE0 Nano, except that it is only half as expensive, it has twice as much SDRAM, VGA output connector, and you get an external USB blaster, which is useful if you design your own board. Looks perfect for simulating a retro computer or developing your own CPU.BTW, if someone needs VGA output, I did this some time ago:http://www.frank-buss.de/yagraphcon/index.htmlThe framebuffer bit depth is a VHDL generic. Currently it is using only internal block RAM, but should be easy to extend it to use external RAM.I used this to port an Atari 2600 FPGA implementation to aTurbo Chameleon. I added an additional 6502 for an OSD. My YaGraphCon was accessed with some special memory mapped registers in the address space of the 6502:https://github.com/FrankBuss/TCA2601

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 10:34:38 am
content: Quote from: danadak on March 12, 2017, 10:25:50 amLooks good, but not a FPGA. Of course, the CPU core could be implemented all in software on the ARM, should be fast enough for some MHz. But with a FPGA it is no problem to run it at 100 MHz and more.

author: danadak
author_rank: Super Contributor
timestamp: March 12, 2017, 10:52:01 am
content: KIt has a device fabric which has many prewritten componentsor user can use Verilog to create their own custom solution. Nota full up FPGA, but a fairly good compromise given all the otherresources built in.http://www.cypress.com/documentation/application-notes/an82250-psoc-3-psoc-4-and-psoc-5lp-implementing-programmable-logichttp://www.cypress.com/file/41531/downloadhttp://www.cypress.com/training/psoc-video-tutorial-series-how-create-custom-componentsNot a 100 Mhz solution however. 80 Mhz on internal ARM M3 core, 67 Mhz on timer/counters.Regards, Dana.

author: timb
author_rank: Super Contributor
timestamp: March 12, 2017, 10:53:02 am
content: Quote from: FrankBuss on March 12, 2017, 10:34:38 amIt has onboard FPGA/CPLD type fabric (a few hundred macro cells) that can be programmed graphically or in Verilog. Plus it has fully routable analog peripherals. It's great when you need an MCU, analog and CPLD/mini-FPGA functionality.

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 11:17:57 am
content: Quote from: timb on March 12, 2017, 10:53:02 amRight, but not usable to implement your own 16 bit RISC CPU. E.g. see this document:http://www.cypress.com/file/42161/downloadA 8x8 bit multiply operation needs already 75% of the macrocells when synthesized. The Cyclone FPGA on the other hand has a lot of 18x18 bit high speed hard wired multiplier units integrated. And I don't like Verilog

author: danadak
author_rank: Super Contributor
timestamp: March 12, 2017, 12:04:10 pm
content: The ARM M3 core has mult instructions.Then the PSOC also has a DFB -Some PSoC® devices have a dedicated hardware digital filter block (DFB) used to filter applications. The heart of DFB is amultiply and accumulate unit (MAC), which can do 24 bit * 24 bit multiply and 48 bit accumulate in one system clock cycle. Inaddition, there are data RAMs to store data and coefficients of digital filtersIn fact the low end family has a 32 bit single cycle HW multiply.Then if you do not like verilog it has a graphical component creation tool.Regards, Dana.

author: FrankBuss
author_rank: Unknown
timestamp: March 12, 2017, 02:54:34 pm
content: And it is possible to use these blocks from Verilog or the graphical tool? But it would be still not enough. There are only 192 macro cells max in the larger PSoC parts. If the functionality can be compared to Xilinx LUTs (lookup table elements), then it is not enough. Even a small 6502 (like theT65) needs nearly 1,000 LUTs. With the $13 Cyclone III board, you get a FPGA with 4,608 LEs (a LE is roughly the same as a LUT), and the block RAM, DSP, PLL etc. functions. Unless you emulate large parts of your core in the ARM in software, it won't work.BTW, I think the Quartus IDE is the best IDE for FPGA development. Xilinx ISE is more difficult to understand and to use, and it crashes more often. Both IDEs have schematic editors, if you really want to use lots of AND and OR gates. But it can be used to connect VHDL or Verilog modules as well, for a nice graphical overview of the system design. For example implement the ALU in a module, the opcode decoder in another module etc., then place everything in a diagram and connect it.

author: BrianHG
author_rank: Super Contributor
timestamp: March 12, 2017, 03:15:50 pm
content: Quartus IDE is great for the top layer and interfacing to the FPGA's IOs and settings and pin mappings. It is also good with it's internal verilog compiler, automatically generating block symbols of your verilog code to place on the top layer to wire up and it can automatically make verilog source code templates of their macro-functions which you can setup and configure in their IDE editor.I find using verilog at this level is great for beginners as Altera's IDE gets you started with the chip & allows you to configure their functions while you are free to write within their IDE editor verilog code to take advantage of more sophisticated function which are easily described in A >= b, truth tables, merging parallel functions and importing third party code like from OpenCores.

author: rstofer
author_rank: Super Contributor
timestamp: March 12, 2017, 03:31:26 pm
content: Quote from: FrankBuss on March 12, 2017, 02:54:34 pmI have used ISE extensively for 13 years and I have never had a crash. Not once! I still have it on my systems for use with Spartan 3 boards of which I have several.Vivado is Xilinx's current software and it works pretty well. I think it is easier to come at it with no prior experience with ISE. My one big complaint about Vivado is speed of compilation. It is SLOW. However, I really like the ILA (Integrated Logic Analyzer). This eliminates the need to reserve pins (and header connections) for an external logic analyzer.

author: BrianHG
author_rank: Super Contributor
timestamp: March 12, 2017, 03:46:38 pm
content: Quote from: rstofer on March 12, 2017, 03:31:26 pmFor big designs, ALL fpga compilers bring down any home or office PC. We can't all have the massive supercomputing budget computers at NVidia's head office for VHDL compiling their ICs.One thing I don't like is that the free version of Altera Quartus IDE takes 6 minutes to do a quick compile my video scaler GPU, (not making the chip run at the full timing speed), after a single gate change, but, if I were to purchase the real version, it will perform a feature called incremental compile which would cut down these micro-changes into 30 second compiles... (This was 3 years ago, things may have improved.) A full compile meeting all the timing restraints, proper time closure for all operating temperatures, with the slowest -8 version of the IC took 45 minutes and the fans on my PC would go wild blasting out heat...

author: james_s
author_rank: Super Contributor
timestamp: March 12, 2017, 05:53:20 pm
content: The PSOC is a really interesting part, I have one of those kits I used to program the chip on some SCSI2SD boards I built. I've been meaning to try developing something with it, really unique hybrid of FPGA and microcontroller. As for FPGAs, I've been running Xilinx ISE and Altera Quartus II for years and never had either one crash. They're like EDAs in that they both have quirks and less than ideal UI traits but you get used to it.

author: ALonda
author_rank: Contributor
timestamp: March 12, 2017, 06:52:44 pm
content: I have now gone ahead and placed an order for a EP2C5T144 board from china, with a usb blaster. After looking around it seemed nothing else came close to the 4,600 logic elements for that price.

author: AndyC_772
author_rank: Super Contributor
timestamp: March 12, 2017, 07:13:03 pm
content: Have fun! I think you'll need an early version of Quartus to support that device. IIRC support for Cyclone II was dropped a while back.

author: james_s
author_rank: Super Contributor
timestamp: March 12, 2017, 07:18:30 pm
content: It's a great little board, I have a bunch of them and have built all kinds of stuff. 6502, 6809 and even a Z80 computer that boots CP/M, those were based on this:http://searle.hostei.com/grant/Multicomp/I did a number of sound boards for 80s video games and pinball machines, my friend posted most of those on his site:http://www.notanon.com/category/fpga/I've got Asteroids and Asteroids Deluxe running on one, using a triple DAC to drive a vector monitor. Space Invaders and Galaxian work on it, needing external ROM and/or RAM.I ported the A2601 code to onehttps://retromaster.wordpress.com/a2601/I still need to make up a board with a video filter and a proper 14.318MHz oscillator, I couldn't get the PLL quite close enough to generate a color NTSC picture using the onboard 50MHz oscillator but it does run.I have some much fancier FPGA dev boards but these little Cyclone II boards are what I end up using most often because they're so small and cheap enough that I can just toss one in my bag and not worry about it getting damaged.

author: james_s
author_rank: Super Contributor
timestamp: March 12, 2017, 07:19:32 pm
content: Quote from: AndyC_772 on March 12, 2017, 07:13:03 pmQuartus II 13.0sp1 is the most recent version that supports it.

author: timb
author_rank: Super Contributor
timestamp: March 12, 2017, 08:21:09 pm
content: Quote from: FrankBuss on March 12, 2017, 02:54:34 pmRight, if you want a full FPGA to implement a retro processor, a PSoC won't be enough, but then again neither would most CPLDs! Your topic says "Starting with CPLD/FPGA" which is really broad ranging. When some FPGAs only have a couple of hundred macrocells... It all depends on what you want to do!For example, I'm working on a 6502 project using a PSoC 5LP. I'm using a real 6502 chip, however the PSoC is acting as a CPLD, allowing me to dispense with all the discrete logic. It also functions as a sort of super-PIA controller, implementing timers, interrupts, UART, etc.I'll be able to load programs into the 6502's SRAM or flash over USB through the PSoC, plus do single step debugging (with a complete view of the 6502's bus).Sure I could do all of that on a single, large FPGA, but I wanted to use real hardware, in which case the PSoC seemed the better tool for this particular job.Another thing I've used the PSoC for is a USB to GPIB adapter project. I created a hardware state machine that took care of toggling all the status lines on the bus, monitoring for interrupts and generally doing all the housekeeping required to keep the bus happy. It was really a mini-processor, as it was controllable by the main Cortex M4 via status lines.Anyway, when data came in on the GPIB, the state machine would fire a DMA (the FPGA portion of the PSoC has DMA access to the same SRAM the M4 does) which transferred the data into the USB fifo and kicked off an IRQ, which caused the M4 to transfer the data to the USB host.Using this combination of a hardware state machine and software, I achieved a *very* fast transfer rate. Faster than any other MCU only GPIB adapter solution I've seen.