Top GND Fill on 4 Layer PCB, Yey or Ney? - Page 1
Forum section: electronics / beginners

author: ssashton
author_rank: Frequent Contributor
timestamp: February 02, 2023, 07:20:54 pm
content: Quick question, I hope!I'm laying out a switching DC-DC converter on a 4-layer PCB. There is a solid GND plane on the 1st inner layer. Should I also stitch a GND fill on the top layer?I've read (somewhere) that it is not good practice to connect components directly to a top GND fill if you have an inner plane. So each component has a via directly to the main GND plane and not connected to the top fill. However I'm uncertain if it's a good idea to add GND fill on the top layer around the outside of the converter to 'catch' EMI?In my image I have highlighted the GND nets. The grey colour is the inner GND plane.Thank you!

author: Siwastaja
author_rank: Super Contributor
timestamp: February 02, 2023, 07:28:30 pm
content: Properly stitched top fill - bestNo top fill - OKUnstitched top with long antennae between tracks etc. - worstIf feeling lazy, better leave unfilled. I usually do fill the top, it doesn't take long to add stitching and selectively remove areas where you can't fit the vias, such as narrow passages (adjusting the pour parameters takes care of most narrow fingers, selectively add a few pour cutouts and job done).What is shown in the image is good.

author: ssashton
author_rank: Frequent Contributor
timestamp: February 02, 2023, 07:31:10 pm
content: I did the 3rd one on my last prototype. Top fill and only connected to a single GND pointSo now I'm a bit nervous.

author: spostma
author_rank: Regular Contributor
timestamp: February 03, 2023, 08:54:30 pm
content: Use only one ground plane!Explanation in attachment...Years ago, I got an excellent EMC expert advice session at the DARE! CE testing by senior test engineer there.They also design multi-GHz test equipment themselves, and really know their part in HF and CE compliant design.I made notes for myself of this valuable session, and attached it FYI.I hope this helps you pass the CE testing!

author: ssashton
author_rank: Frequent Contributor
timestamp: February 04, 2023, 05:14:15 pm
content: Thanks for your replies!I was using large power fills but after reading the notes from Spostma I have changed to using only traces.Attached is my current design. What do you guys think?As before, the grey layer you can see under the audio line level parts is the main internal ground plane that is across the entire PCB.You can see that I did not put any top or bottom layer ground fill around the line level audio parts, that is mainly because there is not very much space for via stitching. So I thought it's best to not fill that area.

author: ssashton
author_rank: Frequent Contributor
timestamp: February 04, 2023, 05:27:49 pm
content: A 3D View.

author: BillyO
author_rank: Super Contributor
timestamp: February 04, 2023, 06:14:48 pm
content: There are times when a copper fill can be used and times where it should not. Stitching is also to be used with precautions and is good where the integrity of voltage planes is not compromised by doing the stitching. It gets complicated.If you have a simple circuit where all teh traces are on one layer and contained in a small area, a voltage referenced copper pour that encompasses that trace area and has multiple points of attachment to one of the voltage planes can help reduce the impedance of the power supply. Below is an example. It is a 4 layer board. Layer 1 (top) is a ground plane, layer 2 is a Vcc plane, layer 3 is another ground plane. The 4th layer (pictured) is the one with traces. The copper pour around the traces is connected to the Vcc plane at several (5) low impedance places. It's only purpose is to reduce power supply impedance and is not there to be a ground plane for the signal traces. If you wanted, it could be stitched to the Vcc plane if you didn't go overboard to the extent that the ground planes get compromised. But in this case, it's not really nesseccary.

author: dobsonr741
author_rank: Frequent Contributor
timestamp: February 04, 2023, 11:57:01 pm
content: The green power track to C34 is tiny. It negates the ESR the cap might supposed to provide. An island for that power rail is appropriate, wherever you find the place for it. Just do not interrupt the continuity of the power plane when pacing it.

author: ssashton
author_rank: Frequent Contributor
timestamp: February 05, 2023, 12:20:12 am
content: I'm not sure which bit you are referring too, would you be able to highlight it?C34 is not connected to the power traces. Also I don't have a power plane, only those green trace.

author: ssashton
author_rank: Frequent Contributor
timestamp: February 05, 2023, 12:21:51 am
content: I'm looking at this on my mobile and when I select the red top layer image in my previous post it opens the 3d view instead. Like s file name has been messed up. Does this happen for anybody else?

author: dobsonr741
author_rank: Frequent Contributor
timestamp: February 05, 2023, 01:40:30 am
content: C47 is is - sorry mistyped.

author: ssashton
author_rank: Frequent Contributor
timestamp: February 05, 2023, 01:26:38 pm
content: Guys, it seems like there was an error in the forum database. When I enlarge the Top Layer image it opens the 3D view instead.The top layer was the most importiantHere is the images again. Sorry if it made some confusion!

author: ssashton
author_rank: Frequent Contributor
timestamp: February 05, 2023, 01:38:22 pm
content: My current stack-up is:Top: Signal traces (mostly small signal and some power for the amp IC)Inner 1: Ground planeInner 2: Power tracesBottom: Signal traces (mostly switching speaker output)This puts my high current un-filtered switched speaker traces on the bottom layer, separated from the ground plane by the power layer.What do you think about swapping the order of the 2nd inner and bottom layers so the speaker traces are closer to the GND plane? Do the inner layers have less copper weight?Top: Signal traces (mostly small signal and some power for the amp IC)Inner 1: Ground planeInner 2: Signal traces (mostly switching speaker output)Bottom: Power traces

author: langwadt
author_rank: Super Contributor
timestamp: February 05, 2023, 03:10:48 pm
content: Quote from: ssashton on February 05, 2023, 01:38:22 pmyes usually, they start the same weight, then out layers get plated with the vias