dds chip minimum clock speed? - Page 1
Forum section: electronics / projects

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 25, 2014, 03:41:46 am
content: How low can you go with a DDS for waveform generation?Lets say I have a DDS chip that could take up to a 500 MHz input clock. I only want to use this part to 1 MHz, could I get away with using a 10 MHz clock? So I have more resolution.What is the rule of thumb between generating sine waves and input clocks?

author: jeremy
author_rank: Super Contributor
timestamp: March 25, 2014, 04:55:52 am
content: I don't know of any rules of thumb, but is this a question of bit-depth resolution rather than clock speed? Ultimately low frequencies will be limited by the size of the lookup table (both in terms of number of elements and number of bits) as it will be difficult to filter out the edge transitions from one DAC level to the next if they are spread far apart in time and you want to have any sort of reasonable range of frequencies.How low a frequency are you interested in? What range are you interested in generating; I'm assuming this is why you are using DDS?

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 25, 2014, 05:29:10 am
content: Quote from: jeremy on March 25, 2014, 04:55:52 amI was looking at generating frequencies ~20KHz. Essentially an audio frequency generator. I guess I don't know where I want to make the trade offs...what would 1MHz vs 10MHz vs 100MHz clock in for a 100 MHz dds chip do if i want to make as 10KHz sine wave?like... what are some parameters I can make my choice by, where do the trade offs lie

author: Someone
author_rank: Super Contributor
timestamp: March 25, 2014, 05:47:16 am
content: DDS fundamentals with the equations to design against:http://www.xilinx.com/support/documentation/ip_documentation/dds.pdf

author: jeremy
author_rank: Super Contributor
timestamp: March 25, 2014, 06:04:05 am
content: Well the first thing you need to work out is exactly what frequency range you are interested in generating. You are low enough that you may not actually even need DDS and could just use some sort of analogy sine VCO. But assuming that you are using DDS the important factors will be:how many elements are in the lookup table? more is better, but you also need faster clockwhat is the bit length of the DAC (12bit? 16bit? etc)? more is better, but then the DAC usually has a reduced maximum sample clock and you have to push data into the DAC fasterhow much harmonic distortion can you tolerate? (sometimes referred to as Total Harmonic Distortion or THD)The classic standalone chip for this purpose is the AD9850. It has a 10bit DAC and can be driven anywhere from 1MHz to 100MHz. It has a phase accumulator to generate the sinusoid which I believe comes from effectively a 14bit LUT. So without filtering, regardless of the clock speed you are using, you will get at best 5mV steps between levels at each clock cycle (5/2^10 = 4.8mV). If you want to drive this at the lowest clock speed possible with the best wave possible, then you need to go 2^10 times faster than the frequency you want, so 10kHz * 2^10 = 10.24MHz. Any faster than 10.24MHz to generate a 10k sine would just be a waste as the DAC is not going to be able to switch between levels during a clock period.

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 26, 2014, 05:38:35 pm
content: Quote from: jeremy on March 25, 2014, 06:04:05 amthanks, it makes perfect sense now.