Building an Electronic Load inspired by Louis Scully  - Page 1
Forum section: electronics / projects

author: kalj
author_rank: Contributor
timestamp: August 18, 2020, 06:47:13 pm
content: I am currently in the process of designing and building an Electronic Load, inspired by the fantastic video series by Louis Scully:As part of this, I want to understand some parts of the schematic, and see if some simplifications can be made. Currently, I have the following questions which I need to find the answer to:In Part 6 (https://youtu.be/9auu8hH4IPM?t=63), he describes how he uses some feedback transistors to control limit the load of each individual MOSFET. This seems a bit unusual to me. Wouldn't it be much simpler to equip each MOSFET with its own opamp control loop? That seems like a common solution, such as the one used in this DIY kit (https://www.aliexpress.com/item/32859047052.html):In Part 7 (https://youtu.be/_JReIwVH7eo?t=154), he says that he was not able to get the current down to 0, and therefore added what he calls a "Current Null Calibration" circuit, i.e. a small negative offset on negative opamp input:Unfortunately, he doesn't actually go into detail about thecauseof the problem. What could be the reason? The AD8630 has a very small DC offset, so that can probably be ruled out. Could it be that the op amp is using GND as V-? I.e., could the problem be solved by instead using, ±5V rails for the op amp?Similarly, later in Part 7 (https://youtu.be/_JReIwVH7eo?t=946), he says that he couldn't get the voltage and current readings down to 0, motivating him to add a similar negative offset to the inputs to the ADC:Again, this seems like a hack to me, and it would be interesting to understand the cause. Can it be caused by the same problem with the op amp not being able to go completely down to the GND negative rail?EDIT: Can't for the love of god get the inline attachments to show up...EDIT2: Now they're here. Thanks MarkF!

author: MarkF
author_rank: Super Contributor
timestamp: August 18, 2020, 08:12:10 pm
content: I think you should have a buffer between the adjustment pot and the op-amps:https://www.eevblog.com/forum/projects/constant-current-dummy-load-ran-a-gutter/msg3182924/#msg3182924

author: Vovk_Z
author_rank: Super Contributor
timestamp: August 18, 2020, 08:38:35 pm
content: Q2 is typical elecgronic load problem and typical decision.

author: MarkF
author_rank: Super Contributor
timestamp: August 18, 2020, 08:38:51 pm
content: QuoteThe inline attachments has problems. Dave has been working on it for a while.What I've been doing:- Attach photo to end of post- After posting your message, click on the photo to see it full size- Save URL of full size photo- Edit your message again- Now place your cursor at position you want the photo and 'insert photo' (i.e. button under the BOLD button)That is itExample: {img width=value}photo.url{/img}Replace '{ }' with '[ ]' and the 'width' is optionalIt's best if the 'img' tag is on its own line.

author: Vovk_Z
author_rank: Super Contributor
timestamp: August 18, 2020, 08:44:52 pm
content: I just post an attachments and that's ok ( for me). MarkF way should work.

author: OM222O
author_rank: Frequent Contributor
timestamp: August 19, 2020, 12:08:46 am
content: There are many "hacks" in that project as you'll see later on in the series, like how he parallels the fets. You know what an easy solution would be? use an X channel op amp, each controlling one fet that has a source resistor. your total current would be Set voltage * X (number of channels) / R. Op amps are so cheap these days too, but he uses some sort of weird BJT pulldown method to "balance" the load on the fets which all share the same source resistor ... YIKES.It's a great educational series and I highly recommend you watch it, but I would STAY AWAY FROM FOLLOWING THAT DESIGN. for example another issue is he uses normal fets that aren't really meant for that job and can't handle much power, IXYS linear fets would be MUCH MUCH better options. other choice of parts are also questionable too and like I said, you'd find way better solutions for the hacks used. I encourage you to design your own load after watching his series.The specific issue I'm not sure about, but seems like an op amp supply issue, the OPAX189 family has great precision and wide supply range for that issue. If there still remains DC offset issues: USE THE DAMN SOFTWARE FOR THAT. Add or subtract N to the readings to get the output to be zero with shorted inputs. Then also adjust the gain error, using a known, accurate voltage source. Measure it with the ADC and after subtracting the offset, your gain error is simply ReadVoltage / ActualVoltage. He's using an MCU anyways, so it's really easy to implement basic arithmetics like that.

author: kalj
author_rank: Contributor
timestamp: August 19, 2020, 12:48:18 am
content: Quote from: MarkF on August 18, 2020, 08:12:10 pmI will be controlling the current level electronically using a microcontroller + DAC. Do you still think I need a buffer between the DAC and the feedback opamp?Quote from: MarkF on August 18, 2020, 08:38:51 pmThanks, that did it.Quote from: Vovk_Z on August 18, 2020, 08:38:35 pmJust to confirm, are you saying that using, say ±9V rails would solve the problem?

author: ledtester
author_rank: Super Contributor
timestamp: August 19, 2020, 12:54:05 am
content: Quote from: MarkF on August 18, 2020, 08:12:10 pmJust wanted to add that this thread is also worthwhile to have a look at as it goes into eliminating oscillations in the feedback circuit.

author: MarkF
author_rank: Super Contributor
timestamp: August 19, 2020, 01:44:35 am
content: Quote from: kalj on August 19, 2020, 12:48:18 amYes. You will NOT want to drive the op-amps directly from the microcontroller.You will want a voltage divider to lower the DAC output to the desired range for the op-amps.You will end up with finer current control.With an op-amp buffer, you are assured the resistor divider is not disturbed by the op-amps.I'm guessing 0 to 500mV for the op-amps which would provide a maximum of 5A from each MOSFET with the 0R1Ω.And I echo using a MOSFET in a TO-247 package (Twice the size of a TO-220). I used the IRFP250 in mine.What is the max power and current you wish to obtain?QuoteIf you're going to use +/- power rails, Jay_Diddy_B's Load project would be a better design than Louis Scully'sI watched the Scully Series a while back and thought it was a mess.Read Jay's analysis and see the circuit:https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/

author: pqass
author_rank: Super Contributor
timestamp: August 19, 2020, 04:25:09 am
content: Responding to your Q2 first:One way to compensate for the typical opamp (eg LM358) offset voltage may be to first pipe your microcontroller's +DAC output control voltage through a unity gain inverting op amp mirrored about a level slightly below the half way point of your Vref, and then onto the usual opamp-mosfet-shunt load circuit.For example, assume we are using a 0.1ohm shunt and opamp supply voltages of +15 and -1 (doesn't need to go lower). Then, a control voltage of 1-0V will yield a 0-10A load current. The +Vin of the inverting opamp is set to slightly below Vref/2 (say, 490mV) so a 1V control voltage will produce -20mV at its output which will totally shutdown the downstream opamp-mosfet-shunt circuit.See attached falstad.com min. and max. control voltage examples.As for Q1, I would would agree with you and just make it n opamp-mosfet-shunt circuits in parallel. The output of the inverting opamp (above) would feed all their +Vin pins.EDIT: See attached schematic on parallel loads with summed (total) current monitoring. Any offset here can be compensated for in software.

author: Vovk_Z
author_rank: Super Contributor
timestamp: August 19, 2020, 09:01:13 am
content: Quote from: kalj- no, there is no need in +- rails. They only give a possibility to use any opamp instead of only several ones with 'input gees to ground' capability. The problem is an opamp offset which every opamp has, which leads to a DC current offset at electronic load input.To get rid of it we add some small voltage to inverting input to 'close' opamp (so regulating Mosfet was closed with no input and control voltage).

author: kalj
author_rank: Contributor
timestamp: August 19, 2020, 03:30:31 pm
content: Quote from: MarkF on August 19, 2020, 01:44:35 amYeah, something like that is what I'm envisioning too.Quote from: MarkF on August 19, 2020, 01:44:35 amPower is still unclear. It all depends on how good a heatsink I can get my hands on. In the first prototyping stages I am fine with <50W. Voltage and current-wise, I am aiming for 0-30V and 0-10A.Quote from: MarkF on August 19, 2020, 01:44:35 amThanks for the tip! I am definitely not limited to the design of Scully. I am now looking quite a lot at that HP/Agilent/Keysight 6060B schematic. Quite a treasure trove that one!Quote from: pqass on August 19, 2020, 04:25:09 amThanks for the tip. I see that it works, but doesn't it provide exactly the same level of solution as the one by Scully? I.e. a small negative offset is added to the control voltage. Effectively, I we get something like \$I_{set} = V_{control}-V_{offset}\$. The problem with this in my opinion is that you get a coupling between what the hardware offset is set to, and what the software needs to do to compensate for it. I mean, \$V_{control}\$ must be set such that \$I_{set}\$ get's the desired value. Perhaps if the hardware offset is a constant very well defined stable value, like -0.1mV or something like that, then the computation in the software can simply assume that value and maintain its own calibration quantities.Perhaps I am misunderstanding and that is exactly what you proposed?But wouldn't a simple offset added to a normal non-inverting buffer work just as well?

author: kalj
author_rank: Contributor
timestamp: August 19, 2020, 03:50:00 pm
content: Quote from: Vovk_Z on August 19, 2020, 09:01:13 amOkay, but then the software needs to be aware of what offset to apply (or subtract) in order for it to set the true value accurately. Is it simply naive to hope to get these things to align by just minimizing errors in the circuit? Perhaps some kind of calibration where a set of software offsets/coefficients are tuned is always necessary...

author: kalj
author_rank: Contributor
timestamp: August 19, 2020, 04:50:03 pm
content: Eventually, the plan is to control all the load parameters from a MCU using a DAC and an ADC. However, in order to avoid too many complications at once, the first prototype will only contain the MOSFETs and their feedback circuitry.Here is what I have currently:Here, "Control" is a voltage which sets the current of each MOSFET. With the present sense resistors, we get that Control voltage = [0, 250mV] --> MOSFET current = [0, 2.5A] --> Total current = [0,10A]."Sense" is an output voltage measuring the total current through all the MOSFETs, i.e. Total current = [0, 10A] --> Sense voltage = [0, 1V].Questions:What are suitable op amps for the feedback and the current sense, i.e. U1 and U2, respectively? Looking at the HP6060 schematic, we see that the current sense uses the expensive precision op amp OP270, whereas the feedback uses the cheaper MC34072. Is this general, that the feedback loop is not overly sensitive to the quality of the op amp? On the other hand, Scully uses the AD8630 precision op amp for this...My current shunt resistors will need to graded for at least 0.625W = 0.1* (2.5 A)^2 . Are there any other critical parameters for them? Can I simply use something like this:https://www.mouser.se/ProductDetail/IRC-TT-Electronics/LOB3R100FLF?qs=sGAEpiMZZMtlubZbdhIBII4g82wonVNopo8C%252Bg3hgbY%3DMy feedback circuit is copied from the one from Scully, with a 1k\$\Omega\$ resistor and a 1nF capacitor in series from the op amp output to the negative input. I have also seen other variants, e.g. a capacitor and resistor in parallel, and just a single capacitor. What is the motivation for these different variants? Is there a single optimal one, does it depend on the op amp/other circuit elements, or is it something where almost anything will do?

author: MarkF
author_rank: Super Contributor
timestamp: August 19, 2020, 05:28:12 pm
content: The op-amp I used is:https://www.digikey.com/product-detail/en/texas-instruments/TLC272ACP/296-7346-5-ND/374889A lot of people just use the LM358. Sense resistors:3 watt (biggest you need for 2.5A per MOSFET)https://www.digikey.com/product-detail/en/vishay-dale/LVR03R1000FE70/LVRB-10RCT-ND/11665325 watthttps://www.digikey.com/product-detail/en/vishay-dale/LVR05R1000FE73/LVRC-10RCT-ND/1166540I used 200mΩ 3W sense resistors which yielded 2.5A @ 500mV across each. I only have a capacitor in my feedback circuit.You will probably find that you will need at least a 10nF for stability.Later, you can experiment with smaller values to increase the switching speed response (say faster than 5KHz).Notes:- I think you will want to add 1KΩ resistors in series with each op-amp (+) input.- You probably don't need two op-amps (U2) in the current monitor. Unless, you need extra gain.- You might also want to monitor the DUT voltage. A voltage divider, limiter zener and buffer to an ADC.

author: OM222O
author_rank: Frequent Contributor
timestamp: August 19, 2020, 05:51:05 pm
content: A major improvement suggestion:Get a dual channel DAC, use one channel to control 3 fets and one channel to control 1 fet. It allows you to have "coarse" and "fine" adjustment. Set the channel that controls 3 fets to a rough value and use a PID loop to control the "fine adjust" fet.In order to get fine adjust, you can either divide the voltage coming from the second channel and buffer it with a unity gain amplifier, or use a larger source resistor.

author: pqass
author_rank: Super Contributor
timestamp: August 19, 2020, 06:08:57 pm
content: QuoteA negative opamp power supply (-1V as I proposed) is needed because for the output to swing to or slightly below 0V, the +Vin of the op amp has to be below ground by its offset voltage; which for a LM358 is ~2mA. I proposed an inverting opamp with an offset tweeked below +Vref/2 point because it allows the use of only a single +Vref. I'm not sure where Scully got his negative reference but it should be from a true voltage reference chip/zener; not a power rail. The opamp power supplies (+ and -) can swing a bit (say, +/- 100mV) but as long as the +Vref is solid, your opamp outputs should be solid too. Using a non-inverting buffer instead would need a -Vref to dial in a -2mV at the non-inverting buffer's R1 to the -Vin pin; an additional complexity.By tweaking the low adj. pot, you can set, say, any DAC output value above 999 to be the point where the mosfet is completely off. Below 1000, it turns on by 10A/1000 = 10mA increments. If you can't quite reach full 10A at 0 DAC output (like in my falstad png) you can always adjust the inverting buffer's feedback resistor to raise or lower the gain a bit. Once the low adj. pot and feedback resistor is tweeked, your software can be completely oblivious of a configuration value. The offset voltages of both opamps should be fairly* constant with time and temperature. *Too small to matter (crosses fingers).However, the current monitoring opamp (summing opamp in the last attachment of my last post) will have this offset anyway that you'll need to account for in software. Oh well!FYI:I've built my own simple analog CC load (potentiometer + LM358 + IRF640 + 0.250ohm shunt) and its lowest setting (full counterclockwise) is 10mA. Do you really need to go down to 0A on yours?For the sake of circuit simplicity, it may just be better to spring for a more expensive low offset rail-to-rail opamp.

author: Vovk_Z
author_rank: Super Contributor
timestamp: August 19, 2020, 07:45:23 pm
content: Q2: I would prefer OAR5 series resistors. It is hard to get them 100 mOhm, so I would use 50 mOhm ones (OAR5R050). They have TCR of about 25 ppm - the lowest one. And the price is lowest too at the same time.Q3: it has to be a reason to put series resistor in series with a cap. The simplest way is to use only a cap - the opamp circuit becames simplest integrator cirquit. It was usually stable at my experience.I would lower gate resistors at least two times or more. It is better if they are 10-47 Ohm (again - it is from my experience). With a too high value you'll have one more integrator in a cirquit, and this won't help with stability.

author: kalj
author_rank: Contributor
timestamp: August 27, 2020, 08:38:43 pm
content: Quote from: MarkF on August 19, 2020, 05:28:12 pmThis is just part of the final circuit. I will use a dual-channel 18-bit ADC to get accurate voltage and current readings. The reason for the dual op amps in the current monitor is that they are both inverting (a non-inverting adder is more involved, and possibly less accurate). I will play around with different feedback circuits once I have the first prototype built.Quote from: OM222O on August 19, 2020, 05:51:05 pmThat is quite a good suggestion. I'm already going for a 1-channel 16-bit DAC (MAX5217). Hopefully the high resolution will give enough accuracy. Else I will try the dual channel idea. A 2-channel 12-bit DAC for instance is definitely way cheaper too.Quote from: Vovk_Z on August 19, 2020, 07:45:23 pmI did manage to find a similar low TCR resistor with 100mOhm, which was quite cheap too:https://www.mouser.com/ProductDetail/605-RMCJ3U000R1FSI'll play around with gate resistors and the feedback circuit once I have something built up.f

author: kalj
author_rank: Contributor
timestamp: August 27, 2020, 10:15:07 pm
content: Quote from: pqass on August 19, 2020, 06:08:57 pmOkay, that actually made a bit of sense. So just to confirm that I understood properly; the precision, stability, and the exact value of the negative rail is not crucial, just that it is well below any value we want to pass through, i.e. -2mV in your case. On the other hand, it is crucial that we can produce accurate and stable values at the input to the op amp, including all the way down to say -10mV. With an accurate DAC, and a proper calibration procedure, the exact value of the negative offset should also not be of importance, only that it is rock stable and reproducible, since the values put out through the DAC are going to be adjusted based on calibration anyways.Correct?Regarding applying an offset to a non-inverting buffer, I cooked up this:Does that not make sense? It seems simpler than the inverting one.

author: MasterT
author_rank: Frequent Contributor
timestamp: August 27, 2020, 11:58:41 pm
content: Quote from: kalj on August 27, 2020, 08:38:43 pmI get myself from here,https://www.arrow.com/en/products/msr5-0r1f1/riedonBuild recently load using dual mcp4802, jumping two outputs with 1:256 divider got 16-bits resolution

author: pqass
author_rank: Super Contributor
timestamp: August 28, 2020, 04:45:55 am
content: Quote from: kalj on August 27, 2020, 10:15:07 pmYesQuoteYes.ie. Don't rely on the rails since if they fluctuate (due to dynamic power demands) so does anything that uses them as a reference.QuoteYes.It starts with the +Vref connected to the DAC (Vref in) whose output flows to down-stream op amps. So the accumulated errors go: +Vref temp co+noise, the DAC output adds further errors, and down-stream op amps have offset errors. These totalled should be constant with temperature and aging and should be very small compared to a DAC step.QuoteWell, I'd describe that as a differential op amp configuration. Maybe it's me but I'm just not seeing how it fits into the larger circuit. I mean, if the sawtooth wave is your control voltage, then it looks to be about 4V in range (guessing) which will need its own +Vref in addition to the +1V feeding into it to be subtracted. But we only want to lower the control voltage by ~2mV so instead of a +1V it needs to be at ~+2mV. So you'll at least need a resistor divider (2000:1 off the main +Vref) and a buffer to achieve that.I agree my inverting stage is a bit odd but I did get it to work (well, modeled on falstad.com and attached below); was able to dial-in any desired negative output via op-amp feedback resistor/pot). Which is what I thought you wanted; a non-software-calibrated op amp offset compensation.However, while looking at the datasheet for your chosen 16-bit DAC (https://datasheets.maximintegrated.com/en/ds/MAX5215-MAX5217.pdfpage 24) I stumbled over a method for the DAC to emit bipolar output. Since the DAC won't go below ground by itself, a non-inverting gain=2 stage with offset set to +Vref makes the output swing between +Vref and -Vref.Now, instead of a gain of 2, what if it's set to just above 1? That is, R1=47K and R2=1K where gain=Vin*(1+R2/R1)=Vin*(1+1k/47k)=1.02 Given a +Vref of 1V, now the bipolar output will go from +1V to -20mV! That's enough negative output to compensate for DAC errors, and down-stream op amp offset errors.However, this method now relies on a software-based compensation but simplifies the overall circuit; no pots, accomodates component tolerances, requires only one quality +Vref, negative rail can still be -1V and not a mirror of the positive rail. A DAC constant is saved in EEPROM where, if any lower, will drive the final CC op amp stage output negative (if a 12bit DAC then 20mV/(1/2^12) = ~82). To keep more usable DAC steps, you could raise R1 to 100K but probably no higher.See attached falstad.com screenshot and model file (should you want to play around).With regards to a current monitoring op amp(s), I chose a non-inverting summing amp configuration since using two inverting amps will require a negative rail to be at least as negative (+extra) as the what it's measuring. Also, the software will need to save in EEPROM a constant to subtract the monitoring op amp offset at the 0A.