Layout review: Inverting buck converter - Page 1
Forum section: electronics / projects

author: strobot
author_rank: Contributor
timestamp: September 17, 2013, 07:41:18 pm
content: Hi, I'm looking for feedback on the layout of a switching converter I'm working with.It is a LMR14206 Buck converter configured to be an inverting buck/boost converter. Red is the top layer, blue is the bottom layer ground pour.

author: Bertho
author_rank: Regular Contributor
timestamp: September 17, 2013, 08:28:52 pm
content: Both input and output capacitors are ceramic. With 9V over them, you will need at least a 50V ceramic capacitor to come anywhere near the 10uF and 47uF you have in the diagram (ceramic caps have a lower capacitance with a DC load because the C*V product is nearly constant). With the size on the board, you do not have this designed in. You may also need multiple ceramic caps in parallel.The feedback trace takes input from under the diode. That means it will pick up all the switching noise on that trace. You are interested in having feedback on your output and that means that you need to have the feedback trace to come from the output capacitor.If this is a 2-layer design, than you should consider to create a ground-plane and use that for all gnd connections.

author: strobot
author_rank: Contributor
timestamp: September 18, 2013, 06:29:23 pm
content: Wow thanks for the feedback. I was unaware that ceramics lost that much capacitance with DC bias.This is the CV curve for the Murata GRM21BR61C106KE15L 10uF 16V cap I chose... wowI will move the feedback trace to have it originate from the output cap.It will be a 2-layer design - the blue layer is the GND plane. There is a cutout in the GND plane under the switching node.

author: Bertho
author_rank: Regular Contributor
timestamp: September 18, 2013, 06:53:32 pm
content: Quote from: strobot on September 18, 2013, 06:29:23 pmYes, most people are unaware of that "feature".Quote from: strobot on September 18, 2013, 06:29:23 pmThen you should not make the cutout. It is not helping you in any useful or sensible way.The ground-design should be altered and (nearly) all connections to GND should go through to the other side with vias. Your current design allows for loop-currents in the upper plane (i.e. you have ground-loops). You may want to use slightly smaller vias and then have more of them, placed on both sides of the high current path components. You need to analyze and act according to where the currents flow and which point is reference to what.Do not connect vias on a T-pole, it works like an antenna. Use a thicker trace if the pass-through current is too high, but that is seldom a problem. For that matter, you can use much thicker traces all over for all high current paths. There is plenty of space.

author: strobot
author_rank: Contributor
timestamp: September 19, 2013, 05:45:30 pm
content: Thanks again - here are my revisions.

author: Bertho
author_rank: Regular Contributor
timestamp: September 19, 2013, 06:15:35 pm
content: Quote from: strobot on September 19, 2013, 05:45:30 pmGood improvements. There are still a few things I'd like to comment on:- The vias to the ground-plane should be on the other side of the pads. This is especially important for C2/C5 and C4/C6, which should be connected top side with the vias between the two caps (the short-side of the pad). Two vias should be enough.- L1 should also be connected from the side(s) to the ground-plane (the short side of the pad). No need to make a small trace (or you create a bottleneck). The vias should be flooded in the copper on the top too (i.e. use a wide trace).The two above suggestions reduce parasitic inductance of the traces and connections and therefore generate less EMI.The input/output ground connections could suffice with one via on the short-side of the pads.The connecting traces to the pads of U1 should be the same width as the pads. There is no reason to make a pinch in the connection. Also, the connections to pins 4 and 5 may be put closer to U1 and the connection to C3 may then be closed in a bit more. You could flood-fill pads for pins 4 and 5 completely.

author: strobot
author_rank: Contributor
timestamp: September 19, 2013, 07:24:34 pm
content: Gotcha:I'm going to leave U1 pin4 (SHDN) as a trace to be able to cut it and bodge wire to another control source if needed.Thanks again for your help.

author: Bertho
author_rank: Regular Contributor
timestamp: September 19, 2013, 07:46:48 pm
content: I would lose the vias on the long-side of the pads.

author: strobot
author_rank: Contributor
timestamp: September 19, 2013, 08:09:21 pm
content: OK, done.Do you have any suggestions for filtering the switching regulator output? Is adding an LC filter to the output sensible or would an LDO make more sense?

author: Bertho
author_rank: Regular Contributor
timestamp: September 19, 2013, 08:31:11 pm
content: Quote from: strobot on September 19, 2013, 08:09:21 pmJust one more thing I just saw. The gnd on J1 (input) should be connected directly to the capacitors. The input should hit C2/C5 directly. There is no good reason to loop that path.QuoteWell, I do not know what you used for calculating the output ripple or what you need the -9V for (haven't recalculated your values or analyzed the schematic as such). You can surely use either LC or LDO to filter more. Just remember that the feedback must stay exactly at the place where it is now.The real question is what stability criteria you require at the output. From there more can be added.

author: tszaboo
author_rank: Super Contributor
timestamp: September 19, 2013, 08:47:28 pm
content: I would add a reverse polarity protection on the input. With a MOSFET it doesnt drop that much voltage.Like so:http://nandblog.com/reverse-power-supply-connection-circuits/If you want to get rid of the noise, there are several ways to do this. First, you can add a ferrite bead on the output to get rid of the spikes, maybe with an other capacitor. Also, I suggest to put some different value ceramics on the output. A 10uF a 100nF and a 100pF has different ESR and ESL values at different frequencies. Also, you can add a bigger copper region on the output, that will form a very low inductance some picofarad capacitance on the output, good to reduce spikes. This is not that effective on the two layer boards, but it doesn't cost anything usually.Adding an LDO is only sensible, if you have low frequency ripple on the output, as the PSRR of an LDO decreases with frequency.Damn. I should write about this in more detail.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: September 19, 2013, 11:22:51 pm
content: Hi,I believe the divider resistors are wrong.The 1K Resistor should be on the bottom. The 10K7 resistor should be on the top.What output current do you require?Jay_Diddy_B

author: strobot
author_rank: Contributor
timestamp: September 20, 2013, 01:49:13 am
content: Hey Jay: you're right! I caught this a couple posts ago and changed the schematic to reflect it but haven't posted the updated schematic. If you look at the latest layout I posted, the resistors in the right place. I'm actually planning on having the converter output about -4.5V as -9V is overkill for my needs.NAND: This schematic is just a snapshot of part of a larger circuit. There is definitely going to be reverse polarity protection on the battery input. Thanks for your blog link! I will definitely be browsing around there.Bertho: made the change, thanks - definitely agree here. I still need to make the ripple calculations with the new components.The negative supply is going to power some opamps that will be used to amplify an electret microphone signal, and then eventually drive several pairs of headphones. Ideally 200uV ripple would be a good target as that would make the supply about as quiet as a battery.I need about the negative rail to be able to supply about 250mA.

author: Bertho
author_rank: Regular Contributor
timestamp: September 20, 2013, 11:41:24 am
content: Ok, you need a very quiet psu...I suggest you rotate the output capacitors 180 degrees and put the output-connector in-line with the output caps. Then you can connect the output connector without having to loop the gnd.Before you hit the output connector J2, I's suggest to add a 100n and 470p..1n (C0G) in line with the output caps on the connector's side. The feedback takes from the center-point of the two output caps. J2 takes output from the smallest cap.Further filtering may be required and a ferrite-bead after the 100n/1n combi followed again by a 100n/1n combi should get quite a bit of the HF noise removed. You then need to assure that you keep the rest of the power path away from the switcher so that it does not pick up noise again.Depending your actual ripple, you need a real inductor to get that down. Make sure that the resonance of the LC filter is at >=10 times below the switching frequency. You should place the LC filter before the ferrite-bead filter.

author: strobot
author_rank: Contributor
timestamp: September 23, 2013, 09:51:18 pm
content: I built up the board from the last revision of the layout. The entire bottom layer is GND with 30 awg wire making the via connections to the bottom layer. The extra, unpopulated footprints were for a potential additional LC filter at the output.I used 1.02K for R1 and 10K for R2 because that is what I had on hand. Everything else is accurate to the schematic.I'm getting an output of -8.216 V across a 144R load (random beefy resistor I had). I really need to make an programmable load...Scoped the output:Thanks for the refinement suggestions, Bertho - I think I'm ready to commit this into the rest of the design with your filtering suggestions.EDIT: Ooops had the 20MHz BW limit button pushed. The switching noise is actually worse:

author: Niklas
author_rank: Frequent Contributor
timestamp: September 24, 2013, 07:16:41 am
content: Is that noise measurement made with a probe that has the 10 cm ground clip cable attached? If so, remove it and replace with the clip on tip on the GND sleeve within millimeters from the probe's tip.About a year ago I designed a low power PSU (5V at a few milliamps for sensors) with a Traco switcher as a pre-regulator followed by a LT3080 linear regulator to set the output voltage. The board had pi filters (C-L-C) both before and after the linear regulator. Ceramic capacitors (HF noise) in parallel with electrolytics (energy storage). The result was very low ripple on load step response and noise levels hardly distinguishable from the scope's noise. Replacing the ground lead on the probe with a shorter connection was vital.This appnote gave me some hints back thenhttp://cds.linear.com/docs/en/application-note/an101f.pdf

author: Bertho
author_rank: Regular Contributor
timestamp: September 24, 2013, 10:11:31 am
content: It worksAre you measuring real switch noise or is this (partly) induced in(to) the probes? That is always very hard to differentiate.It looks like the coil is emptying itself and will therefore cause a resonant swing, which is very nasty to get rid of again due to the EMI properties. You want the PSU to have a consistent non-zero ripple current in the coil to avoid it from exhibiting resonant noise. That also requires a minimum load must be guaranteed. You can check the switch node with the scope to see what is happening.I can see that you still looped the input connector's ground to the input capacitors. You should correct that small layout detail. I also suggest that you use physically larger input capacitors (with higher voltage rating), suggesting 1206, to have a better input filter on the line.

author: strobot
author_rank: Contributor
timestamp: September 24, 2013, 03:22:51 pm
content: Niklas: I used the clip-on GND tip you're talking about. It has a sheath that slips over the probe's ground sleeve and a pointy part sticking out parallel to the probe tip. Great app note! I'm going to read it in depth.Bertho: Thanks very much again - your advice has been invaluable. I implemented your suggestions and flipped the input components as well.

author: Bertho
author_rank: Regular Contributor
timestamp: September 24, 2013, 03:46:41 pm
content: QuoteYou are welcome.The design look much more "clean" now, don't you think? That is a good signYou should get rid of the GND via at J2 (output next to the text at the far left side)). That via is not helping because your reference should be from the output capacitor(s) and not the GND-plane at that stage.Actually, the same argument I have for the GND via at J1 (at the far right side). And, you have the text at J1 reversed.It looks like you have C2/C5 mounted on the side. If so, please don't do that as it increases parasitic inductance and therefore reduces the effect(iveness) of the capacitors.

author: strobot
author_rank: Contributor
timestamp: September 24, 2013, 05:52:33 pm
content: OK - thanks I made the via changes. Definitely looks more cleanI'm using the recommended footprint from the TDK datasheet. I expanded the footprint to the max they recommend after hearing your comments.

author: strobot
author_rank: Contributor
timestamp: September 24, 2013, 09:47:54 pm
content: EDIT: hahaaaaa so none of the scope pictures below are accurate as I reversed R1 and R2 when I placed them. Its only outputting -0.8V. Will repost new pics tomorrow.I built up the latest layout: I realized after I etched the board that I didn't have any 1206 caps, so I used a 1210 47uF and bodged a 0805 10uF in there. There are 2 220pF on the output.Output: look at that ripple reduction!Switching node:

author: senso
author_rank: Frequent Contributor
timestamp: September 24, 2013, 10:03:17 pm
content: As you guys are discussing switchers, would a ground-plane/pour in the top plane be worse than not having it?

author: Bertho
author_rank: Regular Contributor
timestamp: September 24, 2013, 10:47:49 pm
content: Quote from: senso on September 24, 2013, 10:03:17 pmAs a general rule, no its not bad but may not be good and can be worse. As much as it says it also says nothing... The point being, it depends on the hardware, goals and performance at many levels.Primarily, you need to look at the currents. If you just pour copper on both sides and connect it at few to several places, then you may introduce ground-loop currents. These would show up as EMI emissions at best and instabilities at worst. You can do "stitching" with many vias to reduce the EMI (as seen in VHF/UHF designs), thereby reducing any potential differences, but if done without any thought, you may introduce odd EMI spikes at various frequencies.Using a top-side pour is often not helping you very much because all components are already mounted on the top and will radiate regardless of the top-side ground-plane. The bottom ground-plane is specifically to manage DC currents effectively and act as a general shield for EMI emissions.Making two separated shields (top and bottom pours) may give rise to one or more tuned antennas with the pours on each side acting as capacitor and the via interconnects as coils. The shielding effect of copper pours next to signal lines does not work as well in PSU designs because the traces are much wider and therefore "see" less of the neighbouring pour as small traces. Also, traces in copper pours act more like transmission lines than those outside the pour. Expressed transmission lines may be bad in high frequency switchers and can introduce additional poles in the regulation, causing instabilities.Switchers at low frequencies (like a MC34063 10..100kHz) have fewer problems than high frequency (LTC* and the like at 500..2500kHz) switchers. Higher switch frequencies introduce more artifacts and are much more difficult to design with low EMI emissions. Lower frequency designs are (generally) much more forgiving.My conclusion has always been to leave the top plane bare for PSUs, unless there is a very good reason to fill it.

author: strobot
author_rank: Contributor
timestamp: September 25, 2013, 08:18:46 pm
content: OK, I fixed the feedback resistor orientation and was able to find a random chip inductor from an old PCB in the scrap heap. I don't know its inductance.Updated schematic. Input = 9 V; VO1, VO2 = -8.2VI bodged the inductor to the output along with two 10uF ceramics. I soldered in another 2 pin 0.100" pitch header across the 10uF output caps after I took the picture. The output caps are indeed grounded - there is a small hole near the ends of the caps that connects via 30 awg wire to the bottom GND plane.VINSwitching nodeVO1 (before LC filter)VO2 (after LC filter)

author: Bertho
author_rank: Regular Contributor
timestamp: September 25, 2013, 10:03:29 pm
content: The output should be regulated at 8.95V, but you only get 8.2V. That means that the input voltage is too low or your divider is simply set optimistically high. If the controller is not in regulatory control, then measurements are not representative and the controller is working hard to get in the control region.What diode are you using? The diode is an important component here and can generate a lot of loss. Also, what is the DCR of the switch coil (datasheet?)?Your bootstrap capacitor is too small. The datasheet says it should be >=0.15uF, up to 1uF. You are on the low side with only 0.1uF. You should, at least for test purposes, stack another 0.1uF on top of the already mounted capacitor.Where is that ~550kHz 10mV sine-wave coming from? It persists from input to output. Is that your feed supply?What is the load? What happens with different loads attached?Can you put two traces on the scope-image so the switch-timing can be correlated with the noise and flanks.

author: strobot
author_rank: Contributor
timestamp: September 26, 2013, 12:14:02 am
content: Hey Bertho, -8.2 V is actually the correct voltage since I'm using different feedback resistors than the schematic. R2 = 10K and R1 = 1.02K should yield Vout = -8.265 V.The diode is a Diodes Inc. B260A-13-FL1 is a Taiyo Yuden NR6045T150M with max DCR of 77 mOhm.I'll stack another 0.1uF on C1.Going to check on the sine wave. The load is a 144R resistor - will test with different loads.Will repost more informative scope images.

author: senso
author_rank: Frequent Contributor
timestamp: September 26, 2013, 12:21:11 am
content: Thanks about the information about the top planes, didn't know that, and usually I base my designs from the eval boards gerbers(when given by the manufacturer) and they always use top and bottom ground pours, but I will follow your advice, thanks

author: Bertho
author_rank: Regular Contributor
timestamp: September 26, 2013, 12:33:08 am
content: As for the diode, I think you should use something like DB2W40200L. The reverse recovery time is very important and should be as short as possible. The B260 has not even specified it in the datasheet and it has a capacity of ~200pF. It may be good for low-frequency switchers, but for 1MHz+ it is not good enough.Coil looks fine and has nice low DCR and saturation at ~2.3A. The self-resonant frequency is at ~10MHz. Can you blow up the switch-noise and see if it looks like a 10MHz signal? It may be the coil's resonance showing in the noise.

author: strobot
author_rank: Contributor
timestamp: September 26, 2013, 06:28:57 pm
content: OK, thanks for the info on the recovery time of the diode. I understand how reverse recovery time can be so important at 1 MHz+.The sine wave must be coming from the circuit somehow.This is the scope of the disconnected benchtop power supply. Its a BK Precision 1610A. Not sure where that burst noise is coming from.I swapped in a 9V battery and there is no measurable noise (with my scope) on the outputs when its disconnected.Scoped the input with the battery attached running the combined 144 ohm load. (10K and 147R in parallel).Switch timing images coming up...

author: Bertho
author_rank: Regular Contributor
timestamp: September 26, 2013, 08:11:43 pm
content: Ok, that could be from the input capacitors and wiring.I read the frequency wrong the first time. It is ~1/(0.8*200ns) ~= 6.25MHz. I suggest you add one or two 0.1uF (X7R or the like) to the input capacitors to see if it comes from there. These high frequencies are very persistent and are a bit awkward to get pinned down.Can you also float the probe, without touching the circuit, over the board and wiring? See if this signal is radiated. It may be picked up by the probe and you may be able to detect where it originates.Your power feed exhibits a resistance of ~0.3Ohm (extrapolating from the ripple). You may want to add a 47..100uF low esr aluminium cap on the input. A much better input cap would be a 47uF aluminium organic polymer capacitor.

author: strobot
author_rank: Contributor
timestamp: September 26, 2013, 10:43:25 pm
content: Hey Bertho - thanks for the guidance again!I soldered a 0.1uF X7R across the input pins and also on top of the 10uF filter cap.I tried floating the probe over the board and am able to pick up a square wave clearly near the switching node and inductor, but I didn't see any sign of our sine wave.I measured the switch node square wave ringing to be around 80 MHz.I tried measuring the switch node and outputs simultaneously, but connecting the probe tip to the switch node copper caused switching noise at the output to increase dramatically.VIN at battery terminalsVIN at circuit terminals - square wave is probably from radiated EM at switchnode. Square wave amplitude was sensitive to scope probe orientation even using the pokey ground lead.VO1VO2

author: Bertho
author_rank: Regular Contributor
timestamp: September 26, 2013, 11:20:49 pm
content: Nice. Your images confirm that the sine originates from the input. I think it is generated from the battery leads ending up as a transmission line. The small capacitors clearly reduce the oscillation amplitude and, if I see it correctly, then the sine is now slightly damped over time.I am convinced that you need a better input capacitor. The ceramics are not cutting it. An organic polymer with some smaller ceramics is the way to go. The input impedance should be low and the current spikes need to be dampened more effectively at the input.The switch-node ringing will probably be reduced with a better diode. My guess here is that the diode allows for a resonant swing when it is turning off.To get rid of the switch induced EMI, you need a HF shielded probe; not the easiest to get. Probes have the problem that the ground-connection (in the cable) is part of the current-loop to the scope connection, thereby sensitive to induction. FWIW; If you are really in for some hackery... You can reduce the induction by wrapping the probe and probe-cable in alu-foil (not touching gnd/live pins) and then adding a wire from that shield to the GND plug on the scope. It is important that the shield in not carrying any current. This is a bad hack and influences the probe's characteristic, but can help to reduce externally induced noise.But then, you are are at ~20mV p-p noise and ~2mV ripple at the second output. That is averygood result for a switching power supply.

author: Bertho
author_rank: Regular Contributor
timestamp: September 26, 2013, 11:27:00 pm
content: QuoteYou probably caused a ground-loop while connecting two probes' grounds. It is a real pain to connect multiple probes in these designs; a really bad pain.

author: strobot
author_rank: Contributor
timestamp: September 27, 2013, 07:00:07 pm
content: Alright, cool. I've tried to take all your suggestions into account.I made the LC filter with the same 15uH that was used in the converter with a 10uF after it. The resonant frequency should be about 18.4 KHz taking into account the 50% derating of the 10uF capacitor.Schematic:BOM: Any suggestions for lowering the BOM cost? I am going to try replacing the 47uF X5R 10V 1210 caps with several 10uF X5R 25V 1206 caps, since the 47uF ceramics are pretty expensive (about $1.50 in single quantities vs $0.35 for the 10uF 25V)https://docs.google.com/spreadsheet/ccc?key=0AlUlVoMq1FqldDZLMEo2U3FPSzdDckxWZjVLMWdpbXc#gid=0

author: Bertho
author_rank: Regular Contributor
timestamp: September 27, 2013, 07:49:22 pm
content: Quote from: strobot on September 27, 2013, 07:00:07 pmThat should be fine.I do suggest that you add at least a 0.1uF at the first filter stage. You only have 3x10uF at the moment and you really want to take part of the HF out at that stage.QuoteOrganic polymer caps are expensive, especially for 1MHz+ switchers as most of them have an ESL that makes them inductive at those frequencies. So, as output capacitor it is not always a good choice. As input capacitor they are a good choice if properly decoupled with ceramics (f.x. 47uF/10V polymer with a 10uF/25V+0.1uF/50V ceramic).Replacing the 47uF ceramic with 5x10uF is fine and should not give you any problem. Mouser 963-TMK316BJ106KLHT is ~$0.15 @10 pcs. so you can replace them all with the same ceramic and get advantage of the larger quantity.

author: strobot
author_rank: Contributor
timestamp: September 28, 2013, 06:13:04 am
content: Roger on the additional 0.1uF.How does this look?

author: Bertho
author_rank: Regular Contributor
timestamp: September 28, 2013, 09:46:34 am
content: Quote from: strobot on September 28, 2013, 06:13:04 amWell, it looks very stylishYou may want to extend the access to the +9V input on the right a bit. The input should hit the big cap first and it seems to me you have a problem attaching right now.The only thing I see is that you changed the grounding plan a bit. I do not know if that has any influence. The ground-impedance should be low enough as not to have any significant effect.The question will be if you see a difference when you are using both +V and -V supplies further on in the design. The advantage of the big grounding (as you have now) is that it creates a better global reference. It still matters where you reference it from later on. In that respect, I think you may want to add a lower trace (at the bottom) to extend the V+ input to the left (taken from C2) and add the same secondary and tertiary filters in the space on the lower left for V+. It would create a perfect symmetry and you have filtered output of both plus and minus supply nicely together with a perfectly center ground reference.

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 12:15:54 pm
content: You have the input battery negative terminal connected to the positive output. This is wrong. It should connect to the ground pin of the switcher IC. This means that the 9V battery will float, but you are not using the 9V battery to power anything else..correct?You really have been led down a primrose path with all this layout trimming when your basic power input connections to the LMR14206 IC are wrong.To correctly view the output of a switcher like this, make a tight twisted pair of insulated wire and connect to the output, then connect the scope leads to the twisted pair ends several inches away from the board using symmetrical ground and probe point lead lengths. This will eliminate any magnetically coupled pulse from being picked up from the switching inductor while giving you a clean view of the output voltage.

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 12:33:00 pm
content: You would do much better in eliminating most of all those ceramic filter caps and use a low ESR, low-profile standard aluminum electrolytic cap shunted by a single ceramic cap. on the input power and output power points. Adding a small (20 to 150uH) choke bypassed by a small low-profile electrolytic will further decouple the neg. output and would lower any remaining noise to almost nothing visible. If you add a filtering choke inductor take care to place it so it does not magnetically couple with the power switching inductor. This looks very easy since the picture of your board show the switching inductor is well magnetically shielded.Your board is bloated by all these excess ceramic caps.There are many types of ceramic caps and you can get ceramic cap types that do not have a high negative coeff. of voltage.

author: lgbeno
author_rank: Frequent Contributor
timestamp: September 28, 2013, 12:52:15 pm
content: Loop inductance of the feedback node is the most sensitive part of any power supply. I think it would be better to shift the c6-c9 down to be inline with r1 and r2. Also I assume that there is a via terminating r1 to gnd. You need to consider the length of the current path of this net back to the IC pin including the vias.All of the filters in the world cannot fix a feedback inductance problem...Also wrt to mr price's comment, I'm also having trouble mapping the layout to the schematic.A word on ground pours and "ground loops". A ground pour is a way to ensure that current finds the lowest path of impedance. If you force current to flow down a path it might not be to lowest impedance. I think a best practice is to pour the top and bottom and stitch them together with ample vias. You can look at you pours afterwards and look for little peninsulas and islands that may exist in the pour and selectively eliminate them as they can become radiating structures. With all things EMI, "it depends". But in my opinion there is such a focus on adding impedance with series filters and ferrite beads, better to focus on lowering the impedance of return currents to the source.

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 12:53:09 pm
content: http://www.digikey.com/product-detail/en/UMA1A330MDD/493-5944-ND/2598615cost each small quan: 22 cents US

author: strobot
author_rank: Contributor
timestamp: September 28, 2013, 01:48:30 pm
content: Thanks for the commments, Paul and lgbeno, but the converter IC is not wired incorrectly.Using a buck converter in an inverting buck-boost topologyhttp://www.ti.com/lit/an/slyt286/slyt286.pdfQuoteThe converter's feedback is positive with respect to the converter's ground, so it has to be this way.Designing an Inverting Buck Boost Using the ADP2300 and ADP2301 Switching Regulatorhttp://www.analog.com/static/imported-files/application_notes/AN-1083.pdfQuoteThe positive terminal of the battery is the positive rail for the opamps.QuoteAwesome! Thanks for the tip, I'll have to try this.QuoteI was worried about ripple current in the electrolytics, which is why I shied away from them initially. If the ripple current is handled by the ceramics, that makes sense. Would the higher ESR of the electrolytics dampen the transmission line effects I was seeing?

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 01:58:37 pm
content: The input power connections are wired wrong. You are not implementing an AD2300 IC. I have some doubt that the LMRxxxx IC would operate the same as the AD2300. You can easily verify this by changing the battery connections as I recommend(op-amp circuits disconnected.)Of course, theoutput positive leadmust be the ground,but the negative for the battery must be at the ground pin of this switcher IC you are using. This is why you are seeing odd voltages and ripple.It is obvious you need another battery here or a different converter configuration/chip if you want to also power the positive rail for the op-amps.A low ESR aluminum electrolytic capacitor will have no problem dealing with these rather low currents and offers low ESR at low to high frequencies. Adding a single additional ceramic cap (.1uF, for example) will take care of any higher frequency noise (>1 MHz). I urge you to try the low-ESR aluminum cap. in your circuit and you will see that you do get the results I mention.

author: Bertho
author_rank: Regular Contributor
timestamp: September 28, 2013, 03:19:07 pm
content: QuoteThe use of aluminium caps at 1MHz+ switchers have the problem that their ESL will get in your way, making them less effective. Even most polymer caps will become inductive at 1MHz+ frequencies and therefore less suited as output capacitor. The point in this design, as far as I am aware of, is to create V+/V- suitable for analog electronics. That means to ensure proper switch dampening. For that, ceramics are better suited than aluminium caps with this particular switcher.Actually, you can buy aluminium and polymer caps for the higher frequencies, but they are more expensive. There is no need for high capacity values and therefore, again, ceramics are a better choice, even if you need a couple more of them.The input capacitor has some slightly different use in this design. With a battery fed system, your input power supply has rather high impedance. The switch noise will be taken by the ceramics, but the bulk-impedance depends on the polymer cap, such that your battery is loaded quite evenly at a rather constant DC current level. A "good" aluminium cap has an ESR in the range of 150..300mOhm; your battery is in the order of 100..500mOhm and a polymer cap is in the order of 30..80mOhm. Ceramics have the very steep V*C product problem whereas polymer caps are less dependent on it, so it is the better choice.QuoteThe high-current path is mainly perpendicular to the feedback node so the problem is rather small. I do agree that the feedback connection can be pulled back a bit farther from under the first cap to reduce the potential coupling there.

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 03:29:32 pm
content: Using analog circuits does not mandate that the main power supply be absolutely clean in output. Op-amps suitable for low-noise application have high power supply noise rejection.In my years of design experience, low ESR aluminum caps bypassed by a ceramic cap do an excellent job in almost all analog circuits. Low enough ESR aluminum caps are neither hard to find nor expensive.Of course, testing a circuit prior to designing a PCB and testing using a prototype PCB will verify that these assumptions are correct.

author: strobot
author_rank: Contributor
timestamp: September 28, 2013, 06:04:48 pm
content: Quote from: Paul Price on September 28, 2013, 01:58:37 pmThis makes no sense to me.The entire purpose of an inverting buck/boost configuration is to generate a negative supply from a positive voltage source, i.e. the battery. The Texas Instruments app. note describesgenerallyhow to implement the inverting buck/boost topology usingnormalbuck converter ICs. There isn't some special feature that the AD2300 has that makes it work in the inverting buck/boost topology.QuoteI don't really know what to say. I think you're missing the point of this circuit. My application needs to run off a single battery and generate a bipolar supply.Here is yet another Texas Instruments app. note that describes how to use a run-of-the-mill buck converter to generate a negative voltage from a positive input voltage source. VIN is positive, the converter GND-pin is connected to the negative output, and the positive end of the output capacitor connects to the system GND.http://www.ti.com/lit/an/slva257a/slva257a.pdfI've built the inverting supply and it works. I'm able to power op-amps with V+ coming from the positive terminal of the battery, GND referenced to the battery's negative terminal, and V- coming from the inverting supply output.QuoteI am more than willing to try out aluminum caps shunted with ceramics on the input/output, though, and appreciate your suggestions concerning them.

author: Paul Price
author_rank: Super Contributor
timestamp: September 28, 2013, 06:15:36 pm
content: I would confidently guess that C3 in figure 3 of the TI circuit could be a low-ESR aluminum electrolytic, and this cap is sufficient to create a low-noise filtered output even without further HF bypassing with a ceramic cap. I also see that the C1 and C4 10uF input caps effectively further bypass power input to the IC ground pin.Every IC can have its own personality, but If you find that the grounded positive output works with the LMRxxx device as well as with a direct connection to the negative term. of the battery, no one can argue with success.Notice that the large uF value of C3 functions to keep the battery ground closely connected with a low reactive impedance to the device ground return pin of the IC.

author: strobot
author_rank: Contributor
timestamp: September 28, 2013, 07:10:47 pm
content: I have some spare Nichicon UCD1E221MNL1GS 220uF 25V low Z caps that I could try. Will post results.Just for reference, here is the noise from the TPS5430 as an inverting buck/boost converter in the TI app. note. It uses a single 10uF 25V X7R on the input, another 10uF across VIN & VOUT, and a single 220uF 10V POSCAP (tantalum with conductive polymer) on the output. The circuit Bertho has helped me design has performance at VO1 (before LC filter) that surpasses the TI EVM in terms of ripple and noise (see post 23).http://www.ti.com/lit/ug/slvu243/slvu243.pdfhttp://www.ti.com/lit/an/slva257a/slva257a.pdfVO1VO2 (after LC filter)