Why use PMOS for reverse polarity protection instead of NMOS?  - Page 1
Forum section: electronics / projects

author: AnasMalas
author_rank: Regular Contributor
timestamp: September 29, 2022, 06:38:17 am
content: Many resources suggest the use of a PMOS for reverse polarity protection instead of a diode, as it decreases losses. However, the characterstics of an NMOS are better than a PMOS, so why is using it for reverse polarity not often mentioned? I have spent considerable time pingponging from "this is ok, here's why" to "absoloutely the f not", so please, help me understand how to use NMOS without things blowing up.Here's an example circuit:I can think of two reasons that a high side element is desirable, biggest of which is that it is more "set and forget", while using an NMOS would require more careful design or wouldnt work at all, as it involves cutting up ground. I tried to think about the clamp circuit found in a microcontroller., but it doesnt matter as using the PMOS or NMOS have a similar result. The external signal will power the MCU through the diode, and if load is present else where it will blow upThe other reason I can think about is that it allows ground to not change level with current. However, this reason does not hold up for newer mosfets that have a low Rds(on). Take IRF7480MTRPBF as an example, it has an Rds(on) of 1.2mΩ, thus at 50A there will be a steady-state 0.06V drop, which seems negligible.By comparision, the smallest -in stock at Digikey- Rds(on) I was able to find for a PMOS was 5mΩ. That device is five times the cost and dissipates 4 times the power, I also found a 7.3mΩ part at double the cost and dissipating 6 times the power. This is due to the P channel having worse intrinsic properties, necessitating a larger die or a more advanced process which makes it more expensive than a similarly performing NMOS.As a check, I did some simulations. Even when choosing an NMOS and a PMOS model that have similar Rds(on) and identical gate charge, the PMOS is slower.Overall, I think that when the circuit can tolerate a negative voltage when ground is disconnected, an NMOS is the better device.

author: TheUnnamedNewbie
author_rank: Super Contributor
timestamp: September 29, 2022, 06:51:57 am
content: Quote from: AnasMalas on September 29, 2022, 06:38:17 amEven though this is an arbitrary assignment, many designers like to think of 'ground' as an uninterupted reference. This means that starting to do low-side cuts in ground breaks that convention up and so they don't like it. In addition, things like silicon substrates of ICs are often one big ground plane (even if it is not a good one) and it works nicer if you can make some assumptions about that.Quote from: AnasMalas on September 29, 2022, 06:38:17 amYou do assume here that you always pick the best mosfet. If you use ground as reference (which we usually do - you use an LDO in the high side, not the low side), you might be able to get away using a much less expensive, higher Rdson PMOS device.Quote from: AnasMalas on September 29, 2022, 06:38:17 amPMOS devices by nature are worse than NMOS, as the mobility of electrons (the carriers in NMOS devices) is larger than the mobility of holes (charge carriers as PMOS devices). A rule of thumb I was told back in uni (don't know if it still applies to modern discretes, I know for sure it doesn't in CMOS technologies) is that a PMOS of the same RdsOn or gm has to be twice as large as an equivalent NMOS.

author: redkitedesign
author_rank: Regular Contributor
timestamp: September 29, 2022, 06:58:30 am
content: Does your piece of equipement have multiple ground connections? Or a non-isolated power supply?Because your user will connect power ground and signal ground together. And just for good measure, protective earth, neutral and the gas mains pipework too.So reverse polarity protection in the ground (or actually, the power return) only works if there cannot be another return path. While a secondary power supply path (scondary positive wire) is much less likely.Of course, if the HW you are building is fully isolated, protection in the power return works just as well.

author: AnasMalas
author_rank: Regular Contributor
timestamp: September 29, 2022, 07:15:47 am
content: QuoteI need a low Rds(on) as I want to allow a maximum continious current of 50A before overcurrent shutoff kicks in, and I want the module to be very small due to its main application being small sized robotics. That's why im finding it hard to use a PMOS.QuoteIt applies as long as Silicon is used, but ofcourse there are a gazillion* strucutres today so who knows, size may be similar but fabrication is more exotic, anyway price is higher for similar performance.*slight exaggerationQuoteAha, noted. Try to eleminate returnsIf we talk about my project specifically, it's an H-bridge, with 2 terminals for probably a lipo battery, two terminals for the motor, and then microcontorller signals on the other side. The two things I think I will need to be careful about are the gate drivers and the shunt resistor.

author: exmadscientist
author_rank: Frequent Contributor
timestamp: September 29, 2022, 07:24:57 am
content: It's the ground thing. It's entirely and completely the ground thing. It's just easier not to mess with ground and design around weird failures like the FET being partially on.If that's not a concern, the NMOS circuit is preferred and common. It's what you'll find in battery protection circuits, for example. They sit directly between the cell and the circuit, so high side versus low side makes no difference whatsoever. (Any other single-ended signal coming in or out of the protection circuit might change that, though.)

author: AnasMalas
author_rank: Regular Contributor
timestamp: September 29, 2022, 07:31:36 am
content: So how can you predict and account for these failures? I dont think in an H-bridge that the FET can be partially on, otherwise the top NMOS would turn on. Or is that just the boost circuit doing something to make sure it is off?Basically what im trying to ask is how can I become confident in doing this, what resource or keyword may help me understand?

author: brabus
author_rank: Frequent Contributor
timestamp: September 29, 2022, 08:47:22 am
content: Well, I just implemented reverse voltage protection across the GND line using an NMOS in a recent project.The reason behind that specific choice of mine is the ground connection; I am currently dealing with an automotive 24V system. The chassis of my device is connected to the vehicle chassis. So, if someone accidentally connects the +24V to the GND terminal on my input connector, a PMOS would have no effect preventing the short to GND through the chassis, which could damage the wiring or the connector itself. Yes, the DC line is protected but no one wants an uncontrolled high current flowing through one's device.So in my case the NMOS keeps GND separated and turns itself on only if the 24V is connected correctly.I used some PMOS on the same circuit to implement some High-side switches as well.

author: redkitedesign
author_rank: Regular Contributor
timestamp: September 29, 2022, 09:55:35 am
content: Quote from: AnasMalas on September 29, 2022, 07:15:47 amThe H-bridge doesn't really matter, if the user reverses it the motor will turn the wrong way but that wont kill the electronics (might still cause a lot of mechanical damage, but it is not something you can protect against in circuit)The microcontroller signals are sneaky, as they are references to a ground, and you'll have to connect that. Optocouplers can be an easy solution here.The LIPO can be protected in both positive and negative, especially if the microcontroller signals are isolated.If you want to protect against the user connecting the battery to the H-bridge outputs, well, the FET's of your bridge make a perfect diode bridge rectifier (through the body diodes). Just make sure you dont start switching.