What's this TFT video standard and how can I capture it? - Page 1
Forum section: electronics / projects

author: DavidAlfa
author_rank: Super Contributor
timestamp: April 19, 2025, 11:30:34 am
content: I'm thinking on replacing the car headunit, but it's a complex integrated system that shows everything there, including climate settings, consumption...I don't care about the rest, but knowing what's the clima doing is important.The dash buttons are directly connected to the clima module, it works autonomously, the head unit simply interrogates it to know what's going on and display it.The panel isLQ5AW136.Edit: AttachedENH050Q1 datasheet, equivalent panel but much cleaner pdf file.My idea was to strip down the unit, leaving only the main board, then use/make a RGB to CVBS converter and a video input on the new stereo, but it seems to use a strange mode I've never seen before.There's no pixel clock, the display is the master, generates HSYNC and VSYNC, and the main processor sends analog RGB data, stops transmitting video when messing with the sync signals or disconnecting the display, but will instantly resume when restored.Just maybe, if I'm lucky, I can send slower sync signals and sample the video with a STM32.320px in 50us gives a sampling rate of about 6.4MHz so not impossible in interleaved mode, but then I'll have to generate CVBS somehow with some external device.But! If there's something already that can talk this, it would be great!Attaching a summary of the waveforms.

author: Terry Bites
author_rank: Super Contributor
timestamp: April 25, 2025, 12:42:48 pm
content: The timing diagram is for NTSC no?

author: DavidAlfa
author_rank: Super Contributor
timestamp: April 25, 2025, 01:40:01 pm
content: Yes.The timing is selected with a logic pin by a CPU output.I emulated the timing with a stm32, few timers+dma, it was spot-on, few nanoseconds off, got no signal out the cpu.I even emulated the power-on levels and delays!Now the issue is double: I need to send the correct signals to get video out, then figure out how to convert it to cvbs.The video conversion looks easy after all, there're plenty of ICs converting rgb to composite.Then I re-read the datasheet, CLK is supposed to send a several MHz clock... But I found that pin to have 2.3V DC??If I short it the video also dies so it must be doing something!I can see 100MHz signals just fine... Of course the probe was set to 10X, no idea what could be wrong to see a DC level.

author: DavidAlfa
author_rank: Super Contributor
timestamp: April 25, 2025, 07:45:14 pm
content: So the clock has an very faint 100mVpp 3.1Mhz signal over 2.3VDC:It's actually defined in page 11 and 14 of the datasheet:Vlo=2.3V, Vhi=2.6VFCLK = F(Horizontal)*1201/6 = 15625*1201/6 = 3.127MHzIt's also extremely weak, can only drive about 250uA!I analyzed the circuit taking this signal, doesn't make much sense to me for a such weak drive?

author: DavidAlfa
author_rank: Super Contributor
timestamp: April 26, 2025, 01:20:21 pm
content: It uses a weird timing... VSYNC separates odd and even fields, with 262/263 horizontal lines each, not 262.5...Also 15625Hz is for PAL, not NTSC... 15625/525 = 29.76fps, NTSC is 15743Hz / 29.969fps...

author: DavidAlfa
author_rank: Super Contributor
timestamp: May 17, 2025, 04:46:41 pm
content: So, it's almost RGB NTSC video after all (262+263=525 lines).Converted VSYNC+VSYNC to CSYNC with a XNOR gate and fed it to a KA2198 converter, the TV recognized the video correctly.However, the picture looks a bit shifted to the right, the colour is weird and the horizontal lines are waving a lot.Now I'll try to generate the timing with a stm32...

author: inse
author_rank: Super Contributor
timestamp: May 19, 2025, 08:37:11 pm
content: What car is it?Just for curiosity…

author: DavidAlfa
author_rank: Super Contributor
timestamp: May 20, 2025, 05:05:56 am
content: Alfa Romeo 166 (TI). They're pretty rare

author: DavidAlfa
author_rank: Super Contributor
timestamp: August 23, 2025, 05:49:51 pm
content: After adding another timer generating 3.125MHz, I got the stupid thing to output video dataI played with the timing: I could stretch VSYNC or HSYNC as I wanted.The video signal ended after 64us and nothing else came out until the next HSYNC, that allows a lot of flexibility.But, the pixel clock had to be kept close 3MHz or nothing came out.Playing with this clock changes the scan area, the image will look more compressed horizontally as you increase the clock, or extended with lower clock, to the point where part of the picture will be lost.Sadly this STM32 lacks auxiliar PLLs for timers, which would be great for fine tuning (H and U series have PLL3), but I think I can get it done with the CPU PLL.In any case, the TV didn't like it... Only showed lines shifting all over the place.VSYNCHSYNC

author: DavidAlfa
author_rank: Super Contributor
timestamp: August 31, 2025, 11:45:42 pm
content: I kept researching why the TV didn't like the timing...NTSC standard is not 15625Hz / 525lines = 29.76fps, so not surprising... Should be 29.969fps = 15734Hz.As the panel is generating the clock, it's not a problem unless you connect the signals to the outside world.Since I'm now the master, I ignored the original timing and adjusted the stm32, setting the PLL to 99.5MHz got everything pretty good:- 15733.7Hz line frequency (0.5Hz error from 15734.2Hz standard)- 29.96897fps (0.0009fps error from 29.9699Hz standard)- 3.316MHz pixel clock showed the entire horizontal image.It worked...! Sort of... The image is perfectly still and he color is good... But it appears interlaced!.

author: BrianHG
author_rank: Super Contributor
timestamp: September 01, 2025, 12:04:08 am
content: Looks like the construction of the interlaced V-sync on the odd field is off by one line.Get that wrong, and the jittering weaved image looks like the results you have shown us.Remember, the v-sync needs to be shifted by half a line on the odd field.It needs to begin halfway inbetween h-syncs and end halfway inbetween h-syncs 3 lines of video later.(It's been so long since I played with NTSC, so take what I said in RED with a grain of salt...)Either that, or the video you are outputting on each field is sending the wrong line of graphic data.

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 01, 2025, 12:09:32 am
content: Thanks.The image is perfectly still, but the odd/even lines are drawn in the wrong place... Or the source is sending it that way.This panel sent 262+263 lines to the head unit, not 262.5+262.5.I guess I could try this timing... Not sure how the head unit will take it

author: Nominal Animal
author_rank: Super Contributor
timestamp: September 01, 2025, 04:57:43 am
content: Can you try reversing the scanning direction, so that the image on the display is rotated 180°? This involves inverting pin 5 and 6, pulling them high if you have them low right now, or vice versa.This is a long-shot, but could explain why the display gets the even/odd field order wrong; with any luck, it also reverses it, while "only" rotating the display (rather than mirroring it).

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 01, 2025, 05:25:11 am
content: I'm not using the panel anymore, I'm making the timing signals with a stm32!Basically, a bunch of timers + dma to create perfectly synced hsync, vsync and clk clocks.And they're stable indeed, looked absolutely static in the tv.But, probably the TV is getting confused as there's no half line anywhere, but whole 262 and 263 line fields.This is a small personal project which I'm dedicating small moments here and there, the final idea is to install a big Android screen, connect the composite video which I'm trying to generate, and enable it for a moment when a keypress is detected in the original controls.Why all this? This is so old, rare and unpopular that no aftermarket radio exists for it... Also no CAN, it's all dedicated signals and custom protocols...

author: Nominal Animal
author_rank: Super Contributor
timestamp: September 01, 2025, 06:00:25 am
content: Quote from: DavidAlfa on September 01, 2025, 05:25:11 amDefinitely this. I thought your source was generating the proper field sync (with hsync and vsync signals) and just the panel getting it wrong, sorry.Yep, you do need to modify your STM32 code to generate the proper hsync/vsync pattern to get the field order right.

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 01, 2025, 09:32:00 pm
content: So I simply delayed the 2nd vsync by 1/2 line (31.8us)... It worked!A bit of pixel phase noise... but good enough. I doubt it will be noticeable in a much smaller screen.320x234 resolution on 55"

author: bingo600
author_rank: Super Contributor
timestamp: September 02, 2025, 01:24:13 pm
content: DavidIf you need a STM w. a bit more OOMPH (MHz + Ram) , and still same form factorWeAct STM32H523CET6https://www.aliexpress.com/item/1005009179669289.html

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 02, 2025, 02:02:18 pm
content: I'm using a STM32F411CE (Black Pill), it's very cheap and packs a lot of ram/flash, and the 100MHZ Cortex M4 with FPU is quite powerful.Thanks, yeah I considered it, but got a STM32U585CI instead, shares exactly the same pinout with the 411, but it's way more powerful: 160MHz Cortex M33, 768KB SRAM, 2MB flash and a lot of new peripherals (Which I don't think I'll ever use LOL, these new STM32 are damn complex!).I chose the much larger RAM instead of a faster CPU.

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 13, 2025, 11:06:44 am
content: Sadly the Android screen I have only has 720 or 1080 input modes (NTSC or PAL), not 525i.I tried overscanning the picture to match 30fps and 720/1080 lines (The original picture should still appear, just smaller), no matter what I tried, I only got garbage.I couldn't find the timing specs for those standards...The screen uses the TP9951 decoder, which seems very close if not the same to theTP9950.

author: DavidAlfa
author_rank: Super Contributor
timestamp: September 17, 2025, 08:22:42 pm
content: Tried with a reverse camera, the Android screen showed the ame garbage, confirmed it's not my fault.I extended the DMA table to include the equalizing pulses (Which my TV was fine without...!) and further tweaked the timings to follow the NTSC spec as exactly as possible: