Adding simple current limit on generic switchmode reg - Page 1
Forum section: electronics / projects

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 06:26:34 am
content: Most of the switch-mode controller IC's I see have a low side sense resistor on the switching FET to GND. No doubt there to limit the peak currents through the mosfet/inductor to something sensible/safe.Example: The CS input on this controller.https://www.ti.com/lit/ds/symlink/lm5156.pdf?ts=1653977723347&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLM5156Is there any way to use this existing current sense system to also implement some crude output current limiting or protection that I can rely on for battery charging?Reason for asking is I'm having lots of issues trying to design a SEPIC 10-35V input 13.8V 2-3A SLA charger that is buildable at 1000pcs / year in the middle of a chip shortage.There's many options that would work great, but they either need specialized chips with only 600 in stock worldwide, or they require 2 extra chips to add output current regulation to a regulator IC that doesn't have it built in. (Unless i'm adding jellybean IC's, adding 2 extra chips to the BOM is almost as bad as needing one specialized chip.)So I have been pondering how I could hack in some basic output current limiting onto a generic sepic chip in a way that is cheap and doesn't require extra chips like specialized High Side Isense amps or things like the AP4312. etc.. Keep in mind this is a battery charger, It does not need to be super stable/low noise etc.. and I don't care if the current limit shifts around a bit due to input volts or temp. Anything from 1.5-3A is fine.Any ideas for hacking current regulation onto a generic switchmode controller using only jellybean chips?(Perhaps a generic opamp/comparator amp as high side Isense detect which turns off a transistor which is bypassing a resistor to GND inside the chips FB divider?)SpecsSEPIC or non inverting buck-boostCommon GND, so no ground line Isense11-35V input13.8V output1.5-3A output limit.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 31, 2022, 08:24:19 am
content: What's wrong with good old UC3843? Controller may be more feasible than regulator. Would think SimpleSwitchers or such are fine for this power level, but if you're having trouble finding them, well, that...You don't need much accuracy on the current limit, right? Just any old current mode control should do.Note that you need over 50V rating on the switch, which may be hard to find in a regulator. 80V MOSFETs are still in ample supply though.If you want the most basic possible (but still output referenced, and at leastsomewhataccurate) current limit, add a sense resistor for ~600mV at desired current, and put a PNP across it (emitter to SEPIC output, base to battery via resistor*), collector to the VFB node. Maybe an emitter resistor too (to limit transconductance and therefore loop gain).*Why? Consider what happens if the output terminals get shorted...Also with a base resistor in there, a little current can be bled out of it (with a pulldown resistor or CCS), biasing down the base voltage thus trading for voltage drop at the shunt -- going down to maybe 200mV is reasonable in this way, but for less you'll definitely want temperature compensation, and might as well go with a one of those current sense amps. Or do it low side and use any old (single supply or RRIO) op-amp.As for charging curve, is this just gonna be a float thing, let it be for a while and it's done? Or with a fancier curve (e.g. up to ~14.4V until current tails off, float 13.8 )? (I would guess at merely 2-3A, unless you have quite small batteries, it's basically not going to be fast enough to be anything more than a float charge anyway.)Should be feasible to make one of those as well, with some kind of, say, negative resistance characteristic, but carefully limited to a narrow band, hence the automatic voltage reduction as current drops. Or, to say by way of contrast: instead of using like a hysteresis circuit or state machine, kind of still do that, but using the output voltage and current as state variables directly; or in still another way: as a fuzzy logic controller, where voltage setpoint is a function of voltage and current, using clamped linear functions to set the input threshold and output ranges.Basically this would take, I think, hmmm, probably under 50 components, including a couple of op-amps, or maybe a half dozen transistors. Such analog circuits tend to have the downside that they take a lot of resistors, lots of biasing and range trimming and stuff to make it all work. Besides a proper charge controller IC as such, an MCU would also be an attractive option at that point. (Again, current events notwithstanding..)Tim

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 09:56:08 am
content: Thanks, that helps a lot.It's only charging with the vehicle engine is on, so charging up to 14.4V is ok, since it's not going to be on for more than a few hours at a time.So I wasn't going to do anything special for charge curve, just voltage limit at 14V and current limit at 2A or so.Looks like UC3843 never came up in my searches because I was filtering for SEPIC, when I should have also added Buck-Boost too.My mistake.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 31, 2022, 10:03:07 am
content: 3843 doesn't... really do buck-boost, at least not the inverting kind, without a fair amount more hardware. I'd say it's somewhat erroneous for it to be listed that way. But boost and flyback are both fair game here, almost identical as far as the controller is concerned, don't leave them out.And yeah, SEPIC is pretty specialized, as in you're much less likely to see it than other types; likely you found a tonne of weird LT/AD parts instead?Tim

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 10:25:07 am
content: Probably need to power that chip from a linear reg so i can get up to 35V input, but that should be fine

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 10:27:09 am
content: Quote from: T3sl4co1l on May 31, 2022, 10:03:07 amYeah lots of LT/AD parts.I just assumed it needed to be listed as SEPIC to do input voltage above and below output voltage.Well. other than flyback, which I assumed needed a flyback transformer instead of inductors.My mistake.

author: oz2cpu
author_rank: Frequent Contributor
timestamp: May 31, 2022, 11:05:44 am
content: see this picture.. this is your circuit.. and you want to add current limit to it..lets see : the FB signal measure the voltage on the output, if it is pulled low, it adds more power.if FB is pulled up, the ic remove power to the output.however it is a step up configuration, meaning even at zero switching, you get input voltage to the output, straight thru the inductorare you with me so far ?

author: oz2cpu
author_rank: Frequent Contributor
timestamp: May 31, 2022, 11:12:23 am
content: as you see the CS pin of the IC is allready a cycle by cycle current limit, it turn off the fet time, when max current is reachedso you simply adjust the source to gnd resistor value as explained in the datasheet,for wanted current..but if you really want to make your own extra current limit, see the attached schematic change

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 12:46:47 pm
content: Quote from: oz2cpu on May 31, 2022, 11:05:44 amI need it to be step up and step down. So there will be a cap isolating input from output.It should all be the same though, with pfet pulling up FB from series resistor V drop

author: Psi
author_rank: Super Contributor
timestamp: May 31, 2022, 12:51:17 pm
content: Quote from: oz2cpu on May 31, 2022, 11:12:23 amAs i understand it, the CS pin is more a cycle by cycle peak current limit to protect the mosfet.I'm unsure how it would function if that was increased until it started current limiting the steady state output current? It sounds like something that would trash the efficiency.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 31, 2022, 02:44:28 pm
content: Quote from: oz2cpu on May 31, 2022, 11:12:23 amClose; like I described, needs to be a PNP, and emitter to the other side. But otherwise yeah, like that, the old school current limiting trick, you have a Vbe drop and then it's tugging on the, well not the pass transistor input in this case, but anything related to the control will do, in this case the FB node. COMP would do as well, if it has the right phase (but most don't).Also note that feedback must be taken AFTER the shunt resistor to maintain low output impedance!Quote from: Psi on May 31, 2022, 12:51:17 pmYeah you wouldn't put it there, that would reduce the range of current but the error amp would still try to regulate within that range as well as it can. So once it goes into current limiting, the error amp just has to get saturated, which is kinda not great (incurs integrator windup, as so many (naively designed?) bench supplies exhibit).And yeah, an LDO is good for supplying the thing, don't want much over 15V anyway to avoid excessive gate drive power. A real LDO isn't necessary, just anything other than an HDO will do; this is a good application for depletion MOS e.g. DN3545 with a pullup + shunt zener to the gate. Will pass load dump ezpz.Tim

author: Psi
author_rank: Super Contributor
timestamp: June 01, 2022, 12:14:54 am
content: Quote from: T3sl4co1l on May 31, 2022, 02:44:28 pmYeah, if I go with a reg for vcc it will have to be 9V or ideally 10V so it remains in regulation at 11V input while still being compatible with the chips UVLO. Would have to be the UC3843 or UC3845 variant since the other two trip at 10V and 16V to restart. 3 and 5 should come back out of UVLO at 9V maxHm..What effect does having the UC384X version with 50% vs 100% max duty cycle have when it's configured with two inductors for both step up and step down ? I'm guessing I want the 100% version for full control.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 01, 2022, 04:34:44 am
content: It's basically a boost: -3 is what you want. -5 is typically chosen for 1-2 switch forward, where the 50% is "wasted" as reset flux and you definitely don't want it trying too hard to push into that range.Which, just to explain that a bit more:In a half-wave forward converter, the transformer reset voltage is inverse with the reset time. Basic flux balance of course. If it's on for say 320V * 5us, it needs to be off for equal Vrst * t_rst. At 50%, times are equal, so the voltages will also be equal, and a clamp RCD snubber will charge up to this voltage (more or less). Thus the peak switch voltage is 640V (plus not much transient peak, since, well, it's clamped right there, isn't that handy?), so probably using an 800V MOSFET will do.Note that, if load current is zero, the controller doesn't know much about what's going on with the primary magnetizing current. The transformer is high inductance (a transformer transformer, as opposed to the coupled inductors of a flyback), so the current is small, probably less than 10% of total load current. So whether the magnetizing current is high or low, relative to its own limit (saturation current), is not something the controller is very sensitive to.So, if the controller happens to push over 50%, the reset voltage will rise, eventually quite sharply (it's hyperbolic with PWM%), thus dissipating more power (there's more voltage dropped across the snubber resistor), thus drawing more current (magnetizing current may transition into CCM). And once it's in CCM, the primary DC current is a free variable, balanced relatively slowly (over multiple cycles) by the snubber RC time constant. Eventually either enough current flows through the snubber to put the transformer into saturation, or MOSFET avalanche causes a hard limit and flux walks up very quickly. (Obviously, TVS clamped reset does the same thing, too.) Once the transformer is banging into saturation, the controller only notices something different when peak magnetizing current (the extra due to saturation) approaches load current, and more power cannot be delivered (i.e. it goes into current limiting, probably with a lot of extra core loss).It's not an instantly destructive situation, if it's not avalanching the transistor that is -- the peak currents are of course on par with normal maximum load currents, and the primary winding has to be rated for that anyway, so it's not adding more winding or switching losses. And output power is reduced by way of saturation effectively stealing what would otherwise be load current.(Remember that, in a peak current mode 1/2 wave forward converter, the output inductor's reflected current is what's being tested. So it works just the same as a flyback, as far as the controller is concerned. And, like any peak current mode control, the inductor needs to be relatively small, to work in DCM, or shallow CCM with slope compensation.)The real trouble is that there's no good limit, it's nearly a free variable; the PWM is very squishy, and likely the snubber isn't designed to draw very much current (to drive the primary into saturation, where such a limit would occur) before the MOSFET avalanches. So, we'd rather just design the thing with a hard 50% limit to begin with, and never run the risk of all this weirdness. The 50% limit then is fairly arbitrary, but it's most reasonable by symmetry (equal and opposite conduction and reset pulses), and allows clamping at +V (either with a reset winding and catch diode, or by flipping around both ends of the same primary as in a 2-switch forward).So that's what motivates that.Anyways, such a limit isn't relevant with SEPIC -- higher PWM is higher Vout, nothing weird going on, it's tight and controlled.Tim

author: Psi
author_rank: Super Contributor
timestamp: June 01, 2022, 07:50:17 am
content: Thanks Tim,That makes sense

author: Marco
author_rank: Super Contributor
timestamp: June 01, 2022, 12:33:31 pm
content: Quote from: Psi on May 31, 2022, 06:26:34 amJust want to point out this is a priori impossible, buck boost is short hand for inverting buck boost and inverting buck boost uses the ground as the positive electrode for the output. SEPIC or flyback are your options if you want to be able to work with lower and higher supply voltages.

author: Zero999
author_rank: Super Contributor
timestamp: June 01, 2022, 12:42:04 pm
content: Quote from: Marco on June 01, 2022, 12:33:31 pmHe's talking about a four switch buck-boost, which gives the same polarity as the input. It's literally a buck converter and boost converter, sharing the same inductor.https://en.wikipedia.org/wiki/Buck%E2%80%93boost_converter#Principles_of_operation_of_the_four-switch_topology

author: Psi
author_rank: Super Contributor
timestamp: June 03, 2022, 12:20:09 pm
content: Quote from: Marco on June 01, 2022, 12:33:31 pmOk, it seems i'm getting confused with the terminology then.SEPIC is what i'm currently working on building, using the UC3843.I need input above and below output.Though i am a little concerned about the efficiency that will be achievable using the UC3843 and the amount of heat i can afford to dissipate.

author: RoGeorge
author_rank: Super Contributor
timestamp: June 03, 2022, 01:47:47 pm
content: About the many SMPS naming and topologies:https://www.ti.com/lit/ml/sluw001g/sluw001g.pdf

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 03, 2022, 03:01:42 pm
content: There are other controllers out there of course (just avoid the TPS40210, its limiting behavior was designed by an idiot), and still with 3843 you can reduce current sense voltage by biasing it up with a divider from VREF, and/or adding slope compensation (a divider from RtCt, but not directly from it, use an emitter follower inbetween).Tim

author: Psi
author_rank: Super Contributor
timestamp: June 04, 2022, 09:29:20 am
content: Out of interest, are there any jellybean (multiple manufactures) switching controllers which support either- synchronous sepic- non inverting buck-boost (either synchronous 4 mosfet, or 2 mosfet+2 diode)I can see many synchronous sepic from a quick google but they are all specialized low stock / $10 each type parts.

author: Marco
author_rank: Super Contributor
timestamp: June 04, 2022, 04:54:34 pm
content: You can bootstrap and capacitively couple the gate drive of a synchronous boost controller to do SEPIC.https://www.ti.com/tool/PMP10886

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 04, 2022, 05:41:38 pm
content: I've done something similar with Cuk, cap coupling to a PMOS (which being PMOS, is ground referenced, easy to drive). Worked fine, albeit with not great performance, just because, well, PMOS are PMOS.Tim

author: Psi
author_rank: Super Contributor
timestamp: June 18, 2022, 11:10:27 am
content: Hm.. are there any generic/cheap opamps that could be used for an Isense amp on the UC3843 when running at 250 kHz?I imagine needing to run close to the ground rail and also needing to be pretty high bandwidth limits the options quite a bit.I have a circuit and PCB based on the UC3843 up and running, but it's running a little hotter than I would like, though less hot than I was expecting. PCB is at 50deg C around the switching area and the Isense resistor around 80-90C. FLIR showed that by a significant margin the heat is coming from the Isense resistors.There are 2 Isense resistors.The FET source to GND for the IC's sense line, and the series resistor that does my current regulation.So a dual opamp would be a nice solution to take care of both those heat sources by dropping the resistors by a factor of 10.That is, if a suitable ones is available in the middle of a chip shortage and not too expensive. (<$1.5)If the switching is at 250khz, what sort of bandwidth opamp do I need? 2.5mhz at 10x gain?

author: Someone
author_rank: Super Contributor
timestamp: June 18, 2022, 02:06:22 pm
content: Doesn't sound particularly demanding for an opamp (can tolerate error/drifting of mV), do you have a regulated low voltage rail? Plenty of very cheap 5V opamps these days.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 18, 2022, 03:05:19 pm
content: Schematic?Tim

author: Psi
author_rank: Super Contributor
timestamp: June 19, 2022, 02:38:30 am
content: Quote from: T3sl4co1l on June 18, 2022, 03:05:19 pmThis is where the schematic is at now.I've not yet figured out the best way to add the other opamp into the current regulation.I don't plan to use a TL072, it was just what i had laying around to play with.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 19, 2022, 04:51:37 am
content: Yeh well LM358 would do more than TL072, the latter simply does not pull down low enough at all. Not that the slowness of the former would do much better, but maybe it would at least run.. heh, hmm.Have you tried just biasing up ISENSE, say 10k to VREF? That halves the range needed by the shunt resistor. Also, this is CCM isn't it? Those inductors look rather large, 22uH 8A, that's the DC rating right? So more than that, you require slope compensation: put an NPN emitter follower on the RtCt pin, and run about 3.3k from emitter to ISENSE. This both biases up ISENSE in the same way, and adds timing ramp to it, making it stable down to, some modest amount of ripple, say 50%.Note that this restricts the range of ISENSE --> range of COMP, so the compensation components may need to change (larger C, smaller R).Oh what the hell, R13 is in the wrong place again, you looked up the wrong... well, there are a LOT of wrong references out there, sadly... it's not your fault. This basically sets it to gain ~67 so the regulation is poor. Easier to compensate, yes, but is that worth the cost? Best is R+C in series, between COMP and FB. I'd suggest starting with 10k and 10nF, and adjust from there to get reasonable step response. Hardly matters anyway, really, as long as it's stable at idle and with a battery attached; it can be maddeningly slow and still more than fine for charging!As for CS amps, note you can use 5V compatible devices from VREF, or 12V from VCC. You need >20MHz GBW, and "single supply" (input and output range includes GND) or RRIO type. I don't recall what I used last time I needed something exactly like this; would have to go shopping.Similarly for ISENSE, R1/Q4 can be tweaked by biasing the base down a bit; you've already got R5 there, a little resistance from base to GND would do. Note this makes the bias dependent on VOUT -- a foldback current limiter. For regulated VOUT, this will be fine, but if you prefer more stability/precision, use three resistors, a diode and NPN to make a CCS.Also, consider turning up the LM317 a couple volts, it's at 8.52 as shown. 10 would be better. Could also use a zener clamp + depletion MOS (source follower), just crude voltage limiting is all that's needed. Actually, is LM317 cheaper than a DMOS? Haven't checked... probably is, too.Hmm, the reverse protection thing might not turn on at idle. Which would be a bit frustrating as a power supply, but, arguably a safety feature for charging? To better enforce this, maybe add a B-E resistor to Q6 -- this gives a leakage path through Q2 (consider both capacitance and leakage) so it can start off (notice this is a flip-flop configuration, so it latches on once started). You might also have something that turns it off later, once current goes to zero (and which itself must stay latched until output goes to zero i.e. the battery is disconnected, or, to be a bit more subtle about it, and useful: until battery voltage drops below charging threshold, where it will start back up again). The disable can also force off the controller (pull COMP to GND; it'll still be drawing some ~mA supply current, it doesn't have a proper power-down unfortunately).Hmm still not quite everything there, would have to be.. stays latched until below charging threshold (battery still connected), or voltage goes to zeroand then back up-- showing that a battery was disconnected and reconnected. So there's more than just two nodes in the state diagram, and the transitions between them need to be correct... the kind of thing that starts to get a bit of a pain to do in discrete logic -- not that it's infeasible, but it's starting to get just a little bit complicated, and honestly might be worthwhile to add an MCU. Or charge controller IC proper.Cheers!Tim

author: Psi
author_rank: Super Contributor
timestamp: September 11, 2022, 07:01:04 am
content: So, I'm back on this project.Currently I seem to have hit a wall at 82% efficiency.Input 12.55V @ 2.42AOutput 13.1V @ 1.9AAny ideas how I can improve it more.The 2512 Isense resistor R122 gets to 110Deg C which is bit hot for my liking.I have the aforementioned emitter follower on the RtCt pin for some slope comp and to try reduce the waste heat in R122.But anything under about 100mR for R122 Isense and it starts to go unstable and efficiency falls. See scope images.Any ideas?

author: Psi
author_rank: Super Contributor
timestamp: September 11, 2022, 07:11:30 am
content: I'm beginning to wonder if i should start again with something like the LM5158-QIt runs at around 2mhz 90% efficiency with built in switcher and isense.Would just need to add the same output current limiter and it should work.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 11, 2022, 09:34:06 am
content: Looks fine.I mean, it's bouncing around, but in a usual way.Again, R122 can be reduced further by biasing Isense up: whether by introducing still more slope comp (maybe not desirable, you should really only use what you need -- lest startup/SC/fault current limit get too sloppy), or a resistor from VREF to Isense.The second waveform just has poor compensation. Check COMP node, it'll be wobbling around following the peak envelope of Isense (or rather, the latter is a consequence of the former). Adjust C10, R13, and, are you sure a single 10uF (C11) is enough at the output? Also, what load is this with? Stability will be very different with a resistor, CCS or battery load.Also notice compensation will be different in current limit mode, because Q4 has quite high gain. Consider giving it a series emitter resistor, maybe an R+C across it C to B. (R10 might seem somewhat redundant in that case, but leave it in, it's necessary to give some voltage swing for the R+C to provide feedback!)Oh hm, C2 an electrolytic, for damping I would suppose? It won't do much at equal value to C3; more like 47uF+ should do nicely though. (May want an LC filter too, to reduce emissions?)Tim

author: Psi
author_rank: Super Contributor
timestamp: September 11, 2022, 11:44:06 am
content: Thanks Tim,Will have a play with those suggestions and see how things improve.Normally the isense system runs at 1V, what's the largest practical offset that can beobtained to lower the resistor value? My inductors saturate at 10A which would normally warrant a 100mR resistor. Is 50, 25, 10mR doable?I just need to get the temps down a bit, maybe do little more stability testing, then I'll probably add a NTC to gently pull up the feedback if the PCB gets too hot and should be good to go,

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 11, 2022, 10:05:47 pm
content: Limited by offset and speed... which "helpfully" they don't provide, so, a few hundred mV is probably about it. They do give a range 0.9-1.1V for maximum threshold, which seems to suggest biasing it above 0.9V peak (maximum DC + slope comp) might not work. Also means, at say 800mV peak, the variation from unit to unit might be 100mV-300mV, which is again pretty loose (on top of slope comp's effect).If you need more, a newer controller can be chosen, or a current transformer or sense amp used to increase the scale a bit.Tim

author: Psi
author_rank: Super Contributor
timestamp: September 26, 2022, 03:23:18 am
content: Quick question.Are there any issues using a 10k NTC + trimming resistor between UC3843 COMP and GND to add some basic thermal protection to lower the output current as the PCB gets hotter.I did some tests with a 10k NTC and 1.8k resistor and it seems to work quite well.Doesn't appear to affect the output current until around 60C then it starts scaling back to around 50% at 90C.Are there any issues doing a crude thermal limit this way? I don't need anything super accurate, but if I can reduce output current above 70C that will help in situations where the device maybe used on a hot summer day where the typical output current is probably a little high and would otherwise cause higher than ideal operating temps.I know from the DS that pulling COMP to GND is an acceptable way to shut down the IC.So it all seems ok to me?Edit: Seems like current ramp down with temp is less at higher input voltages, so that is one downside.(I only need to deal with 12V and 24V systems so I can add a NPN to short out the NTC trim resistor to GND and increase sensitivity at 24V)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 26, 2022, 04:56:34 pm
content: Probably better to do hysteresis: add a comparator (LM321?) and pull ISENSE high (>1V) to force off.I think shunting most pins will do something (pulling COMP to zero, or RtCt as well), but the flip-flop is reset-dominant so forcing ISENSE guarantees the output off most solidly (and quickly).I don't like forcing COMP because it's not rated for max current sink/source. It's probably hFE limited, highly variable across manufacturing and temperature ranges. It's probably not as strong as most op-amps, let alone transistors if you want to put in a couple mA base current or use a 2N7002 or bigger, but an alternative is preferable.Forcing RtCt is kind of cute, as holding it low prevents the oscillator from triggering a new cycle. You could use this if you prefer whole cycles i.e. it will never be turned off in the middle of a pulse.Tim

author: glentek
author_rank: Regular Contributor
timestamp: September 27, 2022, 02:12:30 am
content: Old thread I know, but your original question on adding a current limit to a SMPS - I have done this to an off the shelf 600W 36V supply. I have it set to limit at 12A and it quite happily supplied a load for 3 hours with minimal heating.

author: Psi
author_rank: Super Contributor
timestamp: September 27, 2022, 03:25:38 am
content: I was playing with the idea of not having any current limit but instead just a thermal limit of around 70C.There's already a mosfet current limit as part of the UC3843 and being SEPIC it's not going to care all that much if the output is shorted.So a thermal limit will limit the output current to keep the board at an acceptable temp.And for this kind of system no hysteresis maybe better?I will have a play using RtCt, as that might be better than COMP.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 27, 2022, 03:40:08 am
content: It's interesting at least, in this case, just charging slower -- well, it doesn't really matter whether it's PWM'd (hysteretic) or throttled to the battery. Whereas a general power supply, hysteresis is preferred -- it should either work, or not, and partial operation may cause unexpected malfunction, and better to signal malfunction in the clearest (on/off) way possible.So, I don't mind either way.Tim

author: Psi
author_rank: Super Contributor
timestamp: September 27, 2022, 03:49:47 am
content: Yeah, the one thing I do need to address is in the unlikely situation of a load that draws huge current at say 3V, the current maybe too high for the rectification diode to handle. If the diode gets hot that will heat up the PCB and scale back the output, but if the diode is passing more than its max rated current for even a very short time it may get damaged regardless.For a 12V battery charger this is pretty unlikely situation. Worst case is probably just 1 shorted cell so 10V SLA load.Might just have to spec a 20A diode and be done with it.

author: Psi
author_rank: Super Contributor
timestamp: September 29, 2022, 11:43:56 am
content: Is it normal to get ringing across the mosfet Isense resistor at turn on which indicates current peaks of over 90A?I can see ringing that peaks around 650mV. The Isense resistor is 7mR. Ringing is around 50mhz lasting around 30ns(The 7mR sense is going through opamp before UC3843 to restore expected voltage range)hm. wonder if I just need a faster opamp. Current one is 20mhz TSV992IDT but i do have a TLV3541IDR around here somewhere (200mhz)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 29, 2022, 04:22:09 pm
content: Maybe?Turn-on corresponds to diode ringing, maybe put an RC there. Or slow turn-on by using a R || D gate network.Usually just a turn-on blip due to gate charge and diode/secondary capacitance,Though this one is exaggerated because of a fairly small shunt resistor.What was layout again?Tim

author: Psi
author_rank: Super Contributor
timestamp: September 29, 2022, 11:43:08 pm
content: My concern is mainly the mosfet. It's a 15A mosfet 50A peakAttached image of PCB loop for each inductor in green and coupling in purple.The inductor foot prints are a little larger on this pcb than they need to be, i wanted to keep options open for testing larger ones.But there doesn't seem to be much difference in heat with larger 14mR vs smaller 40mR so will probably go with smaller one andshrink the loop a little.Bottom graphs are probing across the 7mR Isense resistor using spring round clip.

author: Psi
author_rank: Super Contributor
timestamp: September 29, 2022, 11:49:27 pm
content: Follow up, actually its not as bad as I thought.I had the probe across the resistor's pads on the pcb, but i moved them to right on the top of the 7mR resistor package itself as close as physically possible and it dropped from ~600mV to 240mV. So 0.24/0.007 = 34A which is more reasonable.Damn pcb track resistance is so close to the resistor, heheI knew this, just forgot.Also, i noticed in my view of each cycle graph above, the waveform is inverted. So this ringing is negative a lot more than positive.So is happening at switch off. Must just be inductive kickback from the PCB track current flow?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 30, 2022, 06:34:20 am
content: Reactance dominates at these frequencies. You're measuring peaks with frequency content of 10s of MHz. The chip resistor itself will have say 2-5nH (what size is it?) or 0.12 ohms already at 10MHz. Worse still if your probe ground is picking up some common mode. So that's why I asked about layout.The best way to compensate for inductance is to apply a square wave (can you maybe set up a toy switching scenario with a resistive load and hard-wired pulse width?), and add an R+C after the sense resistor and adjust the value until the measured wave is square.Another way is to put an inverse loop in series with the probe connection, coupled to the inductance of the resistor itself. This looks like this:This is a parallel array of STP50N06s with a 10mΩ sense resistor in series at the bottom (source to GND), which I use for pulsing high-current loads, hence all the caps off to the side). The black wire at the bottom-right is a coax output to the scope. The blue wire connects to the "hot" end of the resistor, and loops around twice, backwards, where the resistor (one of those metal strip types) loops around once. This compensation winding only needs one turn if perfectly coupled, but that's impossible, so two turns with weak coupling (evidently k = 0.5) does the trick. Here, the turns are positioned until a square wave is measured. (Confusion is avoided by using a load resistance -- which will inevitably have some inductance itself at these impedances -- with a different time constant than the sense resistor. The leading edge might be rounded over, but the rounding/overshoot being adjusted by the wire position is at a different rate, so is easily visually separable, and so an accurate calibration can be made.)You wouldn't be able to stuff a winding under that resistor, but an RC network does the same thing. Specifically, the L/R time constant of the resistor must be matched by the RC time constant of the filter, and that will give a flat frequency response.Tim