Improving High Frequency Response of a Source Follower - Page 1
Forum section: electronics / beginners

author: Volly
author_rank: Newbie
timestamp: November 03, 2023, 07:06:27 pm
content: I'm trying to build a high input impedance buffer that can work up to source impedances of about 10M. I know the solution to this problem would be to use an opamp, but where is the fun in that? I'm trying to keep this discrete because I'm trying to learn more about analog design in general. I've definitely played with enough opamp circuits to know some tricks, but when it comes more discrete circuitry my knowledge is more limited. I'm aiming for the audio band here as the intended purpose would be listening or viewing high impedance nodes in some audio circuits.The attached schematic is currently where I'm sitting. Anyway, basic walkthrough of the circuit as I understand it. Q1 is the input buffer and is acting as a source follower with Q2 acting as an active load. Q1 is biased up via R2, R3, and VR1 through R1. The signal is AC coupled in via C1. C3 is a bootstrap capacitor to increase the input impedance to well in excess of what I'm interested in attaching it to. The output is taken to Q3 which is acting as an emitter follower and buffering Q1. It has an active load in the form of Q4. The signal is then AC coupled via C5. C4 (not sure of its name) is tapped off the drain of Q1 and connects to the emitter of Q3. C4 increase the high frequency response of the circuit reasonably well, at least to source impedances of about 1M. C2 tames the low frequency response a smidgen when the source impedance is low.I have tried numerous different inductor and capacitor paths between various parts of the circuit and I've come up with nothing. Granted I most certainly have not tried every single way to tackle this. But several attempts have been made. With the J113 in simulation land I'm getting the -3dB point around 16.5KHz and 20KHz is about -7.8dB. This is with a source impedance of 10M, which is what I'm aiming for. I'd like to push that 20KHz closer to -1dB or nearer to zero. I know it won't be zero because of how single transistor followers work. In simulation land at least I also know that changing out to a J111 and increasing the current to about 5mA will also sort the problem. But I'm trying to do this a bit more intelligently rather than just throw more current at the problem. Any insight would be appreciated.

author: nigelwright7557
author_rank: Frequent Contributor
timestamp: November 03, 2023, 07:13:31 pm
content: As it stands input impedance is around 5M.The two 10 megs are effectively in parallel.

author: Kleinstein
author_rank: Super Contributor
timestamp: November 03, 2023, 07:28:28 pm
content: The capacitor C2 is loading down the source follower. Reducing (or removing) C2 should improve the response for higher frequencies.One may want filtering at the postive side and thus more more the trimmer to the positive side and use a capacitor for filtering to ground (not the +24 V) there.C4 is quite small and this way the drain side bootstrapping only works for higher frequencies. This can give another small break in the response, with less amplitude at lower frequency.R1 is only partially effective. For higher frequencies it is bootstrapped and will be less effective as the left side moves with the input signal.The J113 is a rather large, high capacity JFET. For high impedance (e.g. a condensor mic) one may want to consider a lower capcitance JFET, like J309, J201, SK208 or 2N4416.

author: Volly
author_rank: Newbie
timestamp: November 03, 2023, 08:46:20 pm
content: Quote from: nigelwright7557 on November 03, 2023, 07:13:31 pmThat was a mistake on my part.In sim land I have that resistor disabled. I know in practice I'll need it so it will have to be increased in value. However, it does not alter the response just the level. I also know that C1 does not need to be 1uF, that'll decrease in value. Much tweaking to be had!Quote from: Kleinstein on November 03, 2023, 07:28:28 pmHmmmm, I had originally placed C2 in there to deal with low frequency response, but playing with it some more yeah it is does some funky things in the highs as well. Actually, looking at it now I didn't think about it effectively being in parallel with the drain to gate. Silly mistake on my part. Without C2 I'm getting -3dB at about 2Hz and about 136KHz. But there is a 2dB drop going from 1KHz to 10KHz. That is with C4 in circuit and C2 not there. If I remove R1 then the response is way way worse. The issue I have been fighting was in particular the high frequency roll off. That is why I added R1 & C4 in the first place. Originally, they were not there. Just for my own amusement I put a 1uH inductor in place of R1 and it sorted out that dip. Indeed, much tweaking to be had with renewed eyes.I was using J113s in the simulation primarily out of convenience. The 2N4416 looks like a really solid contender though and the 2N4416A is even in stock. Much much better behaved response overall. I'll run forward with that and hopefully in a couple of days I'll have a working version of this.Thank you!

author: Zero999
author_rank: Super Contributor
timestamp: November 03, 2023, 10:19:47 pm
content: Just a few of questions:What's the amplifier for?What's the maximum output voltage swing?Why does it need to be AC coupled? All bootstrapping does it remove the effect of the biasing resistors. If the tiny gate leakage current isn't an issue, just DC couple it. If it needs to be AC coupled, then use much higher value biasing resistors to bias the J-FET, so bootstrapping is no longer required.If you're going to bias it with low value resistors, then you might as well use good old BJTs.

author: RoGeorge
author_rank: Super Contributor
timestamp: November 03, 2023, 10:37:11 pm
content: You may want to see these examples of improved followers:https://www.eevblog.com/forum/projects/(circuithology)-white-emitter-follower/

author: RFDx
author_rank: Regular Contributor
timestamp: November 04, 2023, 09:41:06 am
content: Attached is a somewhat simplified circuit with Cin~0.14pF. The bandwidth extends well above the audio frequency range. Unfortunately you won't be able to keep the input capacitance that low in the real world.

author: Volly
author_rank: Newbie
timestamp: November 04, 2023, 12:49:41 pm
content: More food for thought! I've had some more time to think on this, but not everything new that has come in especially that white emitter follower, which is rather interesting...At any rate this is where I'm currently sittingAnd I'm getting about -1.8dB at 20KHz with a 10M source impedance.While I can increase the high frequency response of the buffer with a resistor and cap it has some limitations that I'm not particularly fond of. Thanks to Kleinstein pointing out a few things that should've been obvious from the start. While the resistor and cap combo I had did work, it severely limited the maximum level through the buffer, which makes sense to me now. However, my brain was simply too focused on minutia rather than looking at the bigger picture of things.Quote from: Zero999I answered this in the first post. But it basically boils down to being able to listen or view high source impedance nodes in some types of audio circuits. I do not think I'll ever actually need to do this to a 10M source impedance circuit, but knowing that this works pretty well up to about 20M or so is enough to put my mind at ease. This is also why it is AC coupled. This is actually part of a larger project at the end of the day. But it is also serving as an exercise for me to stretch my skills. I understand that attempting to build this on a PCB is going to have its own issues that I will have to figure out too. I am not under any illusion that this is going to be easy to actually realize.The original values were primarily just sort of what I had in my head when I was starting to put the circuit into the simulator. They were not going to be final values. I needed some place to start and being trying to understand where things started to break. It is sort of like why I was using the J113 initially. It was mainly out of convenience rather than it needed to be a J113. I was able to get the J113 to operate much better in the original circuit which meant that when I moved to a more appropriate JFET for the job the performance only got better overall.Quote from: Zero999As close the +24V rail as I can manage. As it stands I'm just a little above 20Vpk-pkwhich I can live with. I realize that this is not going to swing all the way to rail, and that was never the goal. The end goal here is to stretch some skills and get something useful out of it.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 04, 2023, 01:26:16 pm
content: FYI, gate leakage (and by extension, excess noise) should be avoided by reducing Vds: above 5 or 10V, hot carriers flow in the channel and tunnel into the gate. The drain bootstrap could be done by an NPN follower, suitably offset above the output, and then supply voltage can be almost arbitrarily high (whatever the Vce and power dissipations allow).The CCSs can be cascoded similarly. Speaking of, note that input bias current doesn't need to be very particular since it's biased by fixed DC voltage and Vgs doesn't matter much; and the emitter follower can be biased with a BJT in the usual way, or even just a resistor.Tim