MpLab XIDE V5.45 Simulator-Logic Analyzer does not show output wave-forms - Page 1
Forum section: electronics / general

author: abrarbaig
author_rank: Contributor
timestamp: March 06, 2021, 05:03:32 pm
content: Hello I have written a code to test PIC32 DIO's When I run using MpLab XIDE V5.45 Simulator-Logic Analyzer does not show output wave-forms. All previous versions ( v 5.05 till 5.35) show the output waveform. Anybody knows the reason? Here is the code:Code:/** File: lab4_DIO.c* Author: Administrator** Created on March 6, 2021, 7:27 PM*/// 'C' source line config statements// DEVCFG3#pragma config USERID = 0xFFFF // Enter Hexadecimal value (Enter Hexadecimal value)#pragma config FSRSSEL = PRIORITY_7 // SRS Select (SRS Priority 7)#pragma config FMIIEN = ON // Ethernet RMII/MII Enable (MII Enabled)#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)#pragma config FCANIO = ON // CAN I/O Pin Select (Default CAN I/O)#pragma config FUSBIDIO = ON // USB USID Selection (Controlled by the USB Module)#pragma config FVBUSONIO = ON // USB VBUS ON Selection (Controlled by USB Module)// DEVCFG2#pragma config FPLLIDIV = DIV_12 // PLL Input Divider (12x Divider)#pragma config FPLLMUL = MUL_24 // PLL Multiplier (24x Multiplier)#pragma config UPLLIDIV = DIV_12 // USB PLL Input Divider (12x Divider)#pragma config UPLLEN = OFF // USB PLL Enable (Disabled and Bypassed)#pragma config FPLLODIV = DIV_256 // System PLL Output Clock Divider (PLL Divide by 256)// DEVCFG1#pragma config FNOSC = LPRC // Oscillator Selection Bits (Low Power RC Osc (LPRC))#pragma config FSOSCEN = ON // Secondary Oscillator Enable (Enabled)#pragma config IESO = ON // Internal/External Switch Over (Enabled)#pragma config POSCMOD = OFF // Primary Oscillator Configuration (Primary osc disabled)#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)#pragma config FPBDIV = DIV_8 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)#pragma config FWDTEN = ON // Watchdog Timer Enable (WDT Enabled)// DEVCFG0#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select (ICE EMUC2/EMUD2 pins shared with PGC2/PGD2)#pragma config PWP = OFF // Program Flash Write Protect (Disable)#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)#pragma config CP = OFF // Code Protect (Protection Disabled)// #pragma config statements should precede project file includes.// Use project enums instead of #define for ON and OFF.#include <xc.h>#include <sys/attribs.h>#define Delay_ms 20void TimeDelay(unsigned t);void main(){int j,x=1;LATA= 0; // initialize portA with 0LATD = 0xFFFF;DDPCONbits.JTAGEN=0;// disable JTAG to free up portA pinsTRISDbits.TRISD6 = 1;// push button D6 as inputTRISDbits.TRISD13 = 1; //push button D13 as inputTRISA= 0xFF00; // Set RA0 through RA7 as digital outputPORTDbits.RD6; // Read pin6 of port D, push buttonPORTDbits.RD13; // Read pin13 of port D, push buttonwhile(1){if(PORTDbits.RD6==0) // If push button is pressed{for (j=0;j<8;j++){LATA = x<<j; // Illuminate all LEDs from A0 to A7 with a delayTimeDelay(Delay_ms);}}if(PORTDbits.RD13==0) // If push button is pressedLATA=0; // Turn OFF all LEDs from A0 to A7} // end while}// end mainvoid TimeDelay(unsigned int t){int i;for( i=0; i<t;i++ ); // wait t s}Here are:the first picture: output using previous versionsthe second picture: output using 5.4 or later