Microcontroller Programming CPLD - Page 1
Forum section: electronics / projects

author: mrpackethead
author_rank: Super Contributor
timestamp: October 25, 2015, 01:37:02 am
content: Have searched around the internet, and found a few references to such an idea, but nothing concrete.I was thinking of putting a CPLD ( type to be determined ) next to a PIC micro controller, and allowing the PIC to program the CPLD so its set up could be changed easily. ( in the field )..CPLD's seem to not be nearly as popular as the once where.. though..Any thoughts.

author: JoeN
author_rank: Frequent Contributor
timestamp: October 25, 2015, 01:46:20 am
content: CPLDs can be field programmed by a microcontroller. There is a microcontroller in the programmer that the CPLD manufacturer provides. I am pretty sure all manufacturers document the protocol to allow for applications that can reflash the CPLDs as part of upgrades or maintenance. Read the programming literature by the CPLD manufacturer that you want to use.

author: DanielS
author_rank: Frequent Contributor
timestamp: October 25, 2015, 03:53:41 am
content: Quote from: mrpackethead on October 25, 2015, 01:37:02 amWhen a large CPLD costs over $10 and an entry-level FPGA with heaps more features and capabilities costs under $20, it might be difficult to get excited about CPLDs unless you cannot imagine how the FPGA's extras might benefit your application.As for how to program your CPLD, nearly all programmable devices can be configured over JTAG or vendor-specific ISP. As JoeN said, you will need to read your preferred manufacturer's chip configuration guide if you want to do your own.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 25, 2015, 04:34:20 am
content: Quote from: DanielS on October 25, 2015, 03:53:41 amA small ( $1.50 ) CPLD will suffice for my applicaiton.. its replacing a few flipflops and selectable buffers / muxes.

author: JoeN
author_rank: Frequent Contributor
timestamp: October 25, 2015, 05:17:31 am
content: Quote from: mrpackethead on October 25, 2015, 04:34:20 amBut it needs to be configurable in the field? Is there any chance you can figure out in advance all the ways it may need to work or all the combinations that it could ever be asked to do and make it "pin programmable" with unused resources on the CPLD rather than having to reprogram it from time to time? That may end up being a lot simpler. Some older CPLDs like the MAX II are only guaranteed to be able to be reflashed 100 times or so, you might want to keep that in mind. All flash devices have an upper limit. You don't want the microcontroller reflashing it too often.

author: Pjotr
author_rank: Frequent Contributor
timestamp: October 25, 2015, 07:04:17 am
content: Quote from: mrpackethead on October 25, 2015, 04:34:20 amThe old simple PAL/Gal devices needing a dedicated programmer are from a past age. Have a look at the Lattice IspMach devices then (Farnell, Mouser etc.). Those are easily programmed isp with a simple interface (just a simple HC buffer/level shifter) at the parallel port of your PC through their JTAG interface. The free Lattice development platform support this. Maybe the problem nowadays is to find a PC with a parallel port

author: miguelvp
author_rank: Super Contributor
timestamp: October 25, 2015, 07:07:40 am
content: Altera had documentation on how to program their FPGAs, amongst the methods they included programming the FPGA with an MCU. I would think this extends to CPLDs as well.I'll do a quick search and post if I find it.

author: John_ITIC
author_rank: Frequent Contributor
timestamp: October 25, 2015, 07:08:38 am
content: Altera FPGAs and some CPLDs can be programmed in-system by a microcontroller via the 'passive serial' configuration scheme:https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cfg/cfg_cf51001.pdf. I'm using this method in my USB and PCI Express Protocol Analyzers, where a Cypress FX2 microcontroller (8051-based) uses its serial port to shift out the Altera RBF file directly to the FPGA. PM me in case you would like a C snippet.

author: miguelvp
author_rank: Super Contributor
timestamp: October 25, 2015, 07:10:47 am
content: I guess John beat me to find the actual document

author: kripton2035
author_rank: Super Contributor
timestamp: October 25, 2015, 07:15:42 am
content: you can also take a look as cypres PSOC (3 or 5) which are reprogrammable in the field, and contains some logic gates.

author: Pjotr
author_rank: Frequent Contributor
timestamp: October 25, 2015, 07:28:39 am
content: Hey guys, OP asked for a simple CPLD not a FPGA. It is like advising a 20-tonner when the customer asks for a bicycle

author: mrpackethead
author_rank: Super Contributor
timestamp: October 25, 2015, 09:00:07 am
content: Quote from: JoeN on October 25, 2015, 05:17:31 amNot really, the point of putting the CPLD in there is to cover possible things in the future that I dont' know abut today!