Guard ring on 4 layer PCB - Page 1
Forum section: electronics / beginners

author: metebalci
author_rank: Frequent Contributor
timestamp: February 14, 2024, 02:09:17 pm
content: I am trying to understand how to create a guard ring, and particularly on a 4 layer board (sig-gnd-pwr-sig). So a trace forming the ring is created on top and bottom, and connected to a low impedance source. The rings are connected with PTHs, how many/often PTH is the rule of thumb ? Should I modify anything inside the ring on the 2nd gnd and 3rd pwr layers ?

author: Kleinstein
author_rank: Super Contributor
timestamp: February 14, 2024, 02:22:01 pm
content: The main reason for the guard rings / traces is to reduce surface leakage. Even if OK when clean the leakage can go up quite a bit when more dirty and more humid. Th eguard ring reduces the voltage and thus the leakage current. A 2nd point can be reducing effective capacitance (and the loss related to this, as the FR4 board is a low grage dielectric with quite some loss). For the capacitance part it would help to also have a guard on the layers below. How improtant depends. Not all guarded nodes have the same requirements. The capacitive part may or may not be relevant. It also depends on the rest of the circuit if an interruption in the ground plane or power can be tolerated. For the power plane coupling of noise may be an issue.Normally the gurads don't need to be very low impedance and thus just a normal link and no additional vias. To reduce capacitive loading one may even have a resistor in series with the guard. Things are different with more RF signals that need a shield / return path.

author: Andree Henkel
author_rank: Regular Contributor
timestamp: February 15, 2024, 01:30:09 pm
content: added info:*voltage of guard should be close to voltage to guard, but small difference like offset of real low cost OPAMP doesn´t matter*you need to draw tracks onto solder your resist layer(s) so your guard tracks are not covered by solder resist

author: MarkT
author_rank: Frequent Contributor
timestamp: February 15, 2024, 08:07:13 pm
content: For information, there are "electroscope grade" opamps for very high impedance signals like the ADA4530-1 which have guard outputs and a pinout designed for guard rings. That one has input currents down to the femtoampere range, and max voltage offset of only 50µV.

author: metebalci
author_rank: Frequent Contributor
timestamp: February 16, 2024, 09:27:15 am
content: Quote from: MarkT on February 15, 2024, 08:07:13 pmI havent seen this before, thanks for mentioning.

author: metebalci
author_rank: Frequent Contributor
timestamp: February 16, 2024, 09:29:26 am
content: Quote from: Andree Henkel on February 15, 2024, 01:30:09 pmwhy is it needed to not cover the guard tracks with solder resist ?

author: metebalci
author_rank: Frequent Contributor
timestamp: February 16, 2024, 09:31:33 am
content: Quote from: Kleinstein on February 14, 2024, 02:22:01 pmThanks for the explanation. It seems, as usual, the answer is more complicated than I thought.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: February 16, 2024, 09:34:39 am
content: Quote from: metebalci on February 16, 2024, 09:29:26 amBecause the point is that the ring needs to be the first thing any surface current encounters from the guarded node - if it has resist, the leakage goes over the top of the resist to whatever node it finds next

author: metebalci
author_rank: Frequent Contributor
timestamp: February 16, 2024, 02:28:04 pm
content: Quote from: mikeselectricstuff on February 16, 2024, 09:34:39 amI confused the resist with plating, thanks.

author: mawyatt
author_rank: Super Contributor
timestamp: February 16, 2024, 02:51:59 pm
content: Guard rings are a 2D version of an old technique of driving a cable shield with a copy of the center conductor signal voltage. If the cable shield and center conductor have similar voltages then the displacement current thru the cable dielectric is minimized and thus the capacitance as "seen" from the signal standpoint is minimized, as well as dielectric leakage current. Very effective technique and we often employed a simple ~unity gain buffer (even an emitter or source follower) to drive the cable shield, the important point is the buffer needs to be fast enough to follow the signal dynamics with little delay and have a suitable low output impedance to sink any outside signals to act as a proper shield for center conductor signal.PCB guard rings serve a similar purpose and very effective at reducing surface leakage and effective parasitic capacitances. An unusual use of this 2D technique was with an imaging chip utilized in enhancement tubes for Night Vision applications. Chip surface leakage at electron second levels were a big issue with these chips in production and required extensive cleaning and often caused yield issues. We came up with a chip solution which surrounded each pixel with a thin guard ring driven by a buffer linked to said pixel to reduce the surface leakage, see patent for details.Patent 8102452 "Electron Imaging Pixel Leakage Reduction"https://patents.justia.com/patent/8102452Best,

author: MarkT
author_rank: Frequent Contributor
timestamp: February 17, 2024, 10:25:30 am
content: Quote from: metebalci on February 16, 2024, 09:29:26 amBecause otherwise the charge can leak over the top of the resist to some other trace/component - surfaces attract a film of mobile water molecules in humid conditions and become (very slightly, but definitely) conducting. Remove the resist and the leakage can only see the guard-ring potential, which is hopefully zero.