Sipeed Tang Nano 1K (GW1NZ-1) Internal Flash Issue: Seeking Recovery & Programmi - Page 1
Forum section: electronics / general

author: Vamshi
author_rank: Newbie
timestamp: June 17, 2025, 06:37:04 am
content: I'm reaching out for urgent assistance with my Sipeed Tang Nano 1K board, featuring the Gowin GW1NZ-1 FPGA. The internal Flash memory appears to be damaged, preventing the board from booting and making it impossible to program.The Core Problem: Damaged Internal Flash & Failed Programming:The board no longer boots and cannot be reliably programmed to its internal Flash via JTAG. All attempts to program the Flash, using the official Gowin Programmer or the openFPGALoader fail.FPGA State Issues:When checked via JTAG, the FPGA often starts in a state where a "Non-JTAG Active" bit is high. This means the FPGA is persistently attempting to load a configuration from its internal Flash memory. Since the Flash is likely damaged, it's stuck in a continuous, failed boot attempt. The "VLD (Valid Configuration) Flag" is low, indicating the FPGA has not successfully loaded any valid configuration. The "POR (Power-On Reset Success Flag)" is also low, which is very concerning. This means the FPGA's fundamental internal power-on reset sequence (essential for chip initialization) is failing or reporting an issue.SRAM Programming WorksDespite the Flash issues, the FPGA's core logic is functional! I've found a specific Gowin datasheet (designed for "Clearing Status Code Errors") JTAG sequence that makes the FPGA responsive, allowing me to successfully program its volatile SRAM. This confirms the chip itself isn't dead. However, after each power cycle, the board reverts to its problematic state, requiring the sequence to be reapplied.Core Question:Flash Recovery & ProgrammingGiven that the FPGA's core seems functional, but its internal Flash appears damaged and won't retain data. Is there any known method or procedure to "recover," "repair," "re-initialize," or "force-program" the internal Flash memory of a Gowin GW1NZ-1 chip on Tang Nano 1k board.

author: vstrakh
author_rank: Contributor
timestamp: June 17, 2025, 04:45:26 pm
content: The issue possibly lies with incompatibility between the newer Gowin IDE and the jtag cable implementation in the onboard MCU with usb interface.I've experienced this with older Tang Nano board (not 1k variant). It seems the id of the jtag speeds in the IDE does not match the one in the MCU, so fpga gets flashed at speeds at different speed, likely beyond specs, the configuration gets garbled and fpga is stuck in some state it can't be programmed.What did work for me - first step is to erase internal flash. Choose that operation only, no programming, just erase flash. Then power cycle the board. Erasing flash does not break fpga out of that loop, it has to be power cycled.Then it will be programmable again, but you may need to choose the jtag speed that works for your particular setup. Sometimes it was 2.5MHz, sometimes it's 10MHz or 15MHz. It's the combination of the onboard MCU firmware and the IDE version that makes different preference. Selecting some particular frequency does not necessarily mean it will be programmed at that speed, it's just some choice in the IDE combobox causes the MCU to flash fpga within the specs.

author: Zengfh
author_rank: Newbie
timestamp: August 14, 2025, 02:41:06 pm
content: I also use the GW1NSR-LV4CQN48P chip normally, and the chips I got from the supplier are from 2021 inventory. I have also experienced the phenomenon of ROM outputting missing bytes, but I don't know if it is the same fault as yours.Good idea, 2nd floor. I'll mark it if I encounter similar Flash issues.Has the OP burned Flash a lot of times?