Buck converters - trace to inductor and under inductor - Page 1
Forum section: electronics / projects

author: carveone
author_rank: Contributor
timestamp: September 22, 2015, 03:23:01 pm
content: I'm wondering a few things about buck converter layout. According to what I've read, what you need to be concerned about is where the current flow changes suddenly:Thus the catch diode and input bypass cap are critical. Which is fine, I get that. What I'm never sure about is the inductor. I can see there's a great big square wave on the PH pin but I'm a bit fuzzy on how that translates into layout. I would expect that would mean that the trace from switch node to inductor should be as short as possible but is that true? Is it current that matters and not voltage? Not everything can be "as close as possible" - something has to be further away :-)I'm taking a look at a TPS5430 buck converter layout done by a graduate in my company. It's not a very nice layout but it seems to function ok. What I've seen is an attempt to have everything as close as possible with the result that he's routed the Vin trace right under the main inductor. I wouldn't generally do this but it doesn't seem to be causing any problems.On the other hand, the recommended layout in the TPS5430 datasheet has quite a long PH trace across to the inductor. Would this radiate? It feels like, because the PH node is switching, that longer trace isn't such a good idea. But then, that's the recommended layout so it should be the right one. Right ? :-)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 22, 2015, 07:30:25 pm
content: Right, current flow counts. Well, what current is flowing through the inductor?It's a ramp. Or a rampy sort of thing, anyway. Basically, the trace inductance adds in series with the inductor's -ance, and acts as a voltage divider to the SW waveform. So you still get square waves, but much less than anything coupling directly with the highlighted current loops.It's not strictly true that loops should be minimal. Monolithic regulators don't leave much choice in design, but doing it with an external-switch type, or a larger inverter of your own design (where it's worth adding the snubbers and such for both EMI and efficiency reasons), it's important.BTW, app notes and examples and such, are only as good as the people (lower tier engineers, technicians or interns?) who make them. They are rarely good examples of design.My favorite example to point and laugh at is,http://www.ti.com/lit/an/slpa010/slpa010.pdfwhich basically only manages to touch the issue, and shows no understanding of the underlying problem. Namely: since it's demonstrably inconvenient (wasteful R+Cs) or impossible (the ringing never goes away in any of their examples) to do it "following general advice", that advice must be wrong.Since it can't be dealt with in parallel, loop inductance must be damped in series: by opening up the inductive loop and damping that inductance (usually with an R || L, or an RCD snubber). This begs the question, how much L and C is best, if not zero? The answer is, the product should be similar to, or smaller than, the switching speed (and must be less than 1/20th of the cycle time, give or take -- otherwise too much of the switching cycle is spent circulating reactive power, usually wasting it in dampers or snubbers and edge transitions), and the ratio Z = sqrt(L/C) (L being parasitic loop inductance, and C being Coss of the transistors) equal to the peak-to-peak voltage and current output from the inverter.Tim

author: Siwastaja
author_rank: Super Contributor
timestamp: September 22, 2015, 08:05:53 pm
content: Long traces are problematic due to their parasitic inductance.The inductor traces are the only place where you actually want inductance.Longer traces add a tiny bit of inductance to the inductor, although the effect will usually be very small. So it's not beneficial practically, but shouldn't hurt either.Please correct me if I'm wrong, but IMO, the inductor is the only component that can be placed further away.Of course, it will increase emissions (radiated, capacitively and inductively coupled), because the trace is not properly shielded, whereas the inductor can be a shielded type. But it shouldn't generate catastrophic parasitic overvoltage ringing effects like inductance after the input bypass cap or near the freewheeling diode easily does.

author: carveone
author_rank: Contributor
timestamp: September 23, 2015, 04:53:19 pm
content: Quote from: T3sl4co1l on September 22, 2015, 07:30:25 pmAh yes. It is a ramp! Heck, I did the calcs for the peak currents to decide on an inductor and forgot. I think I'm new enough to smps to not get when voltage is important and when current is. As Siwastaja suggests, I was hung up on the voltage waveform producing EMI emissions and attempting to get everything as close as possible even when it wasn't necessary. The guy who did the green PCB in the middle there first had the diode miles away and then tried to supress the resulting catastrophe. Didn't work. He went the opposite extreme and had the inductor and diode parked on top of the SW node. I suppose routing Vin under the inductor isn't all that bad - it's a shielded inductorQuoteI'm beginning to notice that! Good link - once you start reading it, it seems very odd. I've seen some bad layouts depending on who is the manufacturer. I've found Linear a little better. I'm not sure that the same goes for magazines (eg: Elektor or EPE). I like to figure out what is important and understand it and then do the layout but that can take a lot of time. Which is why I get hung up on things, especially magic things like EMI. All my previous smps designs work though!The TI doc I took the first picture did say that some things should be less "as close as possible" than others. There are physical limitations... One EPE magazine article I read on switch mode used a through hole inductor on the other side of the board which got them the best of both worlds.Thanks, Conor.