Understanding the feedback loop for op-amp driving a MOSFET - Page 1
Forum section: electronics / beginners

author: jmw
author_rank: Frequent Contributor
timestamp: August 31, 2019, 04:11:08 am
content: I've been reading Tim Green's articles on op amp stability, and paying attention to the articles on capacitive loads. They never explicitly show an example of an op amp driving a MOSFET, so my question is, is it correct to replace the MOSFET with its Cgs for AC analysis?E.g. for the dual-feedback compensated circuit on the left, would the correct way to start analyzing the feedback dynamics be to use the feedback network on the right?

author: ledtester
author_rank: Super Contributor
timestamp: August 31, 2019, 05:21:09 am
content: Do you have a link for the articles?

author: magic
author_rank: Super Contributor
timestamp: August 31, 2019, 06:02:42 am
content: You already have it in SPICE so run AC analysis from 1Hz to 1GHz on both and see what happensMy guess:It will give similar results, both in phase and magnitude, at frequencies high enough that conductance (the inverse of impedance) of Cgs is many times greater than transconductance of M1 at its given operating point.It will give wrong results otherwise, in phase and in magnitude alike.Also, Cds may be important too. And beware that MOSFET parasitics vary quite a lot with Vds in practice.

author: jmw
author_rank: Frequent Contributor
timestamp: August 31, 2019, 06:13:37 am
content: Quote from: ledtester on August 31, 2019, 05:21:09 amhttps://e2e.ti.com/cfs-file/__key/telligent-evolution-components-attachments/00-14-01-00-01-31-96-48/TG-Stability_5F00_All-pdf.zip

author: Kevin.D
author_rank: Frequent Contributor
timestamp: August 31, 2019, 07:43:56 pm
content: It's along those lines, but you should include the effect of transistor gm and also Cgd in the analysis when driving a transistor.Then any voltage gain at either the MOSFET source or drain node will amplify the apparent size of Cgs and Cgd respectfully.Briefly why :-This is due to the " miller effect" which is an amplifying/attenuating effect observed on an impedance (usually refers tocapacitor but can also be applied to any Impedance element) that is connected between an input node and another node thatexhibits amplification of that input. From this we get the resultant impedance of any such element Zmiller(Zm)= Z/(Av+1) ,Which when applied to capacitance is Cm= C(Av+1). where Av= -Av (i.e inverting gain as been defined as positive) .Lets Apply this to Cgs first, notice that with the feedback node being at the top of Rsource (your R1) this node basically follows the gate voltage (it's a source follower) the voltage gain for a source folllower is Rs/(Rs+(1/gm)) . If 1/gm is small compared to Rs then it can be ignored and Av taken as 1 . Applying this to our Cgs gives Cgs(miller) = Cgs(-1+1) =0 (Yes miller effect can make capacitors smaller or even disappear which is easy to see if you imagine both sides of a capacitor rising and falling at the same rate then the voltage across it does not change and no charge flows into it).For the above situation in which the MOSFET 1/gm is much larger than Rs (say by a factor of 10 making Av is much less than one which would actually be the more typical case for an high power constant current source/electronic load with a very low value Rs ) then Cgs size will not be effected much and we can ignore miller effect.Applying the same reasoning to Cgd then any voltage gain at FET drain node would multiply's Cgd : if we had some Resistance in the drain (Rd) then gain at that node ~ Rd/(Rs+(1/gm)) . Here with no Rd Gain at drain Av=0 .Thus Cgd(miller) = Cgd*(0+1)= Cgd*1 .So in a common source config with high voltage gain at the drain note that the Cgd (due to Av multiplier) can become the dominant input capacitor even though it's initially smaller than Cgs in your FET's data sheet.Now compare with a source follower config with no voltage gain at the drain (thus no Cgd multiplier) and a gain at the sourcenode of almost 1 (non inverting) (here miller effect can make Cgs look smaller as we show above.)Approaching the subject of stability analysis requires a huge amount of time and effort and you'l face much frustration I've no doubt , it's not for everyone (it's a specialization most would say) but if you put in the effort and crack it you'l be in the low percentage of techies who can actually handle it.

author: langwadt
author_rank: Super Contributor
timestamp: August 31, 2019, 08:53:47 pm
content: https://www.dropbox.com/s/9js30un7l4it6r6/4x.26_MOSFET-CS_Nodal-Analysis.pdf?dl=1

author: jmw
author_rank: Frequent Contributor
timestamp: September 01, 2019, 12:46:01 am
content: Quote from: langwadt on August 31, 2019, 08:53:47 pmWhere is this from? This is a pretty helpful tract; I want to develop a basic analytic framework for setting up the compensation network and tweak the last few percent in SPICE, so this is great to read. After doing some SPICE setup, I can say that using Cgs isn't sufficient for the original circuit - the current source has to be accounted for.Quote from: Kevin.D on August 31, 2019, 07:43:56 pmTell me about it ... after concerted study the black magic veil has lifted but practical application remains pretty difficult with a lot of second guessing my results.

author: langwadt
author_rank: Super Contributor
timestamp: September 01, 2019, 01:02:52 am
content: Quote from: jmw on September 01, 2019, 12:46:01 amWinfield Hill posted it on sci.electronics.design, it is a draft for the x-chapters book follow up to "the art of electronics"