Parallel Shift Registers - Page 1
Forum section: electronics / beginners

author: TheDood
author_rank: Regular Contributor
timestamp: October 27, 2019, 08:36:50 am
content: Hey guys, thanks for all the help thus far, I've got another question for you.Maybe I'm over thinking it, but you shouldn't have any issues running a multitude of shift registers with the input pins wired in parallel to each other? Instead of cascading a multitude of shift registers and wiring the "data out" to the "data in" (in series), could I run 10 shift registers simultaneously if I wired the SR's in parallel to each other?

author: ogden
author_rank: Super Contributor
timestamp: October 27, 2019, 08:40:46 am
content: If you need exact copy of data in all shift registers, then yes. Next time draw schematics and take some time to analyze it.

author: TheDood
author_rank: Regular Contributor
timestamp: October 27, 2019, 09:04:45 am
content: Quote from: ogden on October 27, 2019, 08:40:46 amYa I'm a newby, I don't know the internals of a shift register so figured I'd ask someone more knowledgeable (though didn't see any preliminary issues). Thanks! You were spot on comprehending what I was asking! Once I plan a CCT I'll send in a schematic. Still just brainstorming and was just trying to confirm my understanding.

author: jhpadjustable
author_rank: Frequent Contributor
timestamp: October 27, 2019, 09:32:06 am
content: Quote from: TheDood on October 27, 2019, 09:04:45 amIf you'd like a digital workbench for little sanity-checks like that, and you don't want to spend any money on it, you could do far worse than good oldLogisim.

author: Ian.M
author_rank: Super Contributor
timestamp: October 27, 2019, 09:57:51 am
content: It depends what you are doing with them. Data inputs in parallel doesn't make sense unless you have either separate shift clocks or chip select/latch signals. However you can parallel shift clocks and latch signals and connect each register's data in to a separate port pin (all on the same port) of your MCU, so eight 74HC595 chips wired like that give you a byte wide eight byte deep set of registers, with each byte striped across all eight chips. It generally only makes sense to do that if you can configure the port for automatic strobe on write, otherwise the overhead of bit-banging the shift clock for each byte is likely to eat up about half of the speed advantage over simply dumping bytes into a SPI peripheral to feed daisychained shift registers.

author: TheDood
author_rank: Regular Contributor
timestamp: October 27, 2019, 11:13:22 pm
content: Thanks, @Ian.M, I was brainstorming parallel as I had expandability in mind and was curious if I could achieve the same data output signaling & timing when all shift register inputs were wired to a singular MCU, (all shift register inputs wired in parallel to each other).If I was designing something modular I assumed accounting for the number of modules, ie shift registers, would require more complex coding and/or circuitry than just designing them to operate in parallel.I've never heard or used logism, thanks @jhpadjustable, I've been playing with LT Spice recently but still really new. Ill take a peek at logism.

author: rstofer
author_rank: Super Contributor
timestamp: October 28, 2019, 12:53:34 am
content: There is the concept of fan-out. A logic gate can only drive just so many other gates and maintain the logic voltages. It's been decades since I thought about it but the typical number is 10 - a logic gate can drive, at most, 10 other gates ASSUMING they have a fan-in value of 1. Complex gates may not have a fan-in of one because the first thing they do is invert the signal and then you both the true signal and the inverted signal somewhere else. This can result in a fan-in of 2 and, if this happens, the poor driving logic gate can only drive 5 such devices.

author: Nusa
author_rank: Super Contributor
timestamp: October 28, 2019, 01:15:47 am
content: A fan-out of 10 was pretty typical for most of the TTL family. For the CMOS family, it's usually much larger. If you are mixing families, you best understand the specs of the chips in question to see if it will work.But there's also the subject of input capacitance. The more inputs you have the longer it takes to charge, which means the propagation delay for a fan-out of 10 will be significantly higher than that of a single input. In other words, there is a speed penalty as fan-out increases. Which may not matter in your application.

author: TheDood
author_rank: Regular Contributor
timestamp: October 28, 2019, 08:59:41 am
content: Thanks guys, @rstofer, I've not come across "fan-out" or fan-in" yet so Ill have to read up. I anticipated there would be a limit, but don't envision a need for more than 10 atm.@Nusa, that's helpful info, brainstorming some 74HC595's and an ESP32. Ill have to look to see if the 74HC595 is a CMOS chip or TTL. CMOS would require less power I'm assuming, that's what I'd be after if that's the case.

author: amyk
author_rank: Super Contributor
timestamp: October 28, 2019, 12:04:36 pm
content: Quote from: Ian.M on October 27, 2019, 09:57:51 amThis is worth quoting again since I frequently see beginners (and sometimes even beyond) ask "can I do it this way" without ever sayingwhatthey want to do.The first step of design is not to figure out how you want to do something, but what you want to do.

author: TheDood
author_rank: Regular Contributor
timestamp: October 28, 2019, 09:52:53 pm
content: Quote from: amyk on October 28, 2019, 12:04:36 pmSure, you'd want to know what you'd want to do first before trying to figure out how to achieve it. That makes sense, thanks!