4 layer signal choices... - Page 1
Forum section: electronics / projects

author: alank2
author_rank: Super Contributor
timestamp: March 08, 2019, 09:08:10 pm
content: I've done mostly 2 layer things using the plan of bottom layer is ground and intended to be as uncut by traces as possible; top layer gets vcc route first, then top layer gets signals. Again, try not to cut the ground layer, but if it has to be done, try to do it in a way that doesn't limit ground. I would describe it like this:signal/vcc (gnd pour everywhere traces aren't that is via tacked down to the bottom layer)groundSo now I am looking at a board that will be 4 layer. No fancy need to separate anything, no analog, etc. Will be a 5V project. I have been reading and it looks like:signal (gnd pour everywhere traces aren't that is via tacked down to the bottom layer)vccgroundsignal (gnd pour everywhere traces aren't that is via tacked down to the bottom layer)Q#1 - Is what is recommended - does this make sense?Q#2 - The project will be a Z80 type project so there will be lots of parallel runs of data and address lines and IC's in SMD form being located close to each other. Does it matter if all signals in a set use the same layer, or is it ok if 4 data lines are on top and 4 data lines are on bottom if that is easier to route.Q#3 - If the top and bottom are not enough, would you cut into VCC if it didn't affect anything, just like I do on the bottom layer of a 2 layer pcb?Thanks!

author: DaJMasta
author_rank: Super Contributor
timestamp: March 08, 2019, 10:44:31 pm
content: That's a normal stackup and it usually means fairly uninterrupted ground/power planes with very low parasitic inductance while having just a bit of inherent capacitance. Two signal layers are likely enough as long as your tracks aren't so wide, but if you need to, keep the breaks short and to a minimum. Every signal via is effectively a tiny break in the plane, but because the distance around it isn't big and the width on either side is still large, it doesn't contribute a lot to overall plane impedance. Remember, parasitic inductance is probably the biggest enemy in power rails for high speed designs, so keeping the loop area to a minimum is always best, so as long as there isn't long breaks and snaking routes for the current to take, you're probably on the right track. Less of an issue, but still something on thinner inner copper layers, trace resistance is per square, with no additional units, so a trace that is twice as wide and is the same length is half the resistance, so again keeping it as filled in as possible and as far from snaking standard traces as possible, the better... but unless you're running really high currents, once you get past a few mm wide, resistance will be basically negligible on half ounce copper for most digital logic stuff.

author: alank2
author_rank: Super Contributor
timestamp: March 09, 2019, 01:53:43 am
content: Thanks - I appreciate the info!

author: georges80
author_rank: Frequent Contributor
timestamp: March 09, 2019, 04:23:18 am
content: You say "z80 type..." so that's 4MHz or maybe a little higher?Stuff like that was done with wirewrap and worked just fineI wrapped up many a Z80 board in the time before dinosaurs... Wrapped 10MHz boards as well (16/32 bit processors) and other than keeping the wirewrap UNTIDY there weren't significant issues. TIDY wirewrap (pretty bundles) was a crosstalk nightmare at higher speeds.At Z80 clock speeds I doubt you would have issues with a trace on one side (of a 2 layer board) running on top of another trace (in parallel) for extended distances (you would still have 1.6mm separation).4 layer board would be no issue if you have any experience laying out digital boards. Signal on outside layers and vcc/gnd on the inside. I wouldn't bother flooding the signal layers. I don't do that even on high speed boards (hdmi/usb2/ddr2/ddr3 etc).cheers,george.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 09, 2019, 04:26:48 am
content: Don't worry about pouring the outer layers -- it's a PITA to stitch while considering four layers and all the stuff on 'em! It's not much improvement, EMically speaking, over just using the two inner layers.Tim

author: alank2
author_rank: Super Contributor
timestamp: March 09, 2019, 04:46:19 am
content: Z80 up to 20 Mhz is what I'll be doing with it.

author: georges80
author_rank: Frequent Contributor
timestamp: March 09, 2019, 05:02:34 am
content: ^ ok, so just a little higher in frequency than DCDon't overthink and overcomplicate the problem.Just sprinkle bypass caps and some bulk caps around. SMD bypass caps are very effective versus the thruhole parts of old.cheers,george.

author: alank2
author_rank: Super Contributor
timestamp: March 09, 2019, 03:22:47 pm
content: Thanks everyone!