<30 ps pulse generator for TDR - Page 1
Forum section: electronics / projects

author: Snake
author_rank: Contributor
timestamp: September 11, 2014, 06:43:37 am
content: I need a <30ps pulse generator with >400mV amplitude as pulse generator for TDR application. At the moment I was testing an ADCMP580 and Hittite product but I have the feeling there are other alternatives.Is it possible to build an avalanche diode pulser for <500$ with very fast diodes?I want to hook it up to my 50 GHz sample oscilloscope which makes it more difficult (how to generate the external trigger).Any advice?

author: Marco
author_rank: Super Contributor
timestamp: September 11, 2014, 08:11:01 am
content: I bought a Tek mainframe with 2 SD-24s (with one dud channel) for less than 500$.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 11, 2014, 08:25:52 am
content: Avalanche doesn't go that fast, not with conventional devices. Might get lucky with some small RF transistors, which will have junctions small enough and reasonable stripline characteristics. Otherwise, that's either step recovery or, I think more often these days, monolithic shock line territory.Eh, might be neat to try either way -- could approximate a schottky transmission line with die-scale RF parts. Won't be cheap though.Tim

author: Marco
author_rank: Super Contributor
timestamp: September 11, 2014, 09:48:59 am
content: The fastest edge I have seen on this forum from a discrete circuit is the one fromthis thread. Unfortunately, it's the trailing/falling edge ... ridiculously fast though, on the order of 5 picoseconds (about 4 pixels, with the division being 80 pixels and 1 ns). Hell it might be faster since that's near the risetime of the scope.The only way to make it a rising edge would be to use a PNP transistor, which are unlikely to reach the same speeds.PS. low voltage diode pulsers don't generally use avalanching. For low voltage there are tunnel diode pulsers (ancient), step recovery diode pulsers (less ancient) and nonlinear transmission line diode pulsers (modern).

author: eurofox
author_rank: Unknown
timestamp: September 11, 2014, 10:12:24 am
content: Quote from: Snake on September 11, 2014, 06:43:37 amUse ONET8501

author: Snake
author_rank: Contributor
timestamp: September 11, 2014, 11:58:09 am
content: Thank you for all the feedback. This ONET8501 is new for me. It is fast but not terminated to ground (important for 50 Ohm TDR?) It is also pretty complex to control.Any advice how to trigger my HP83480A sample oscilloscope that requires 22ns pre-trigger? I have some ideas and did several tests. All resulted in to much jitter or rise-time degradation.I saw an user on this forum that was using a SD22 from Tektronix in combination with sampling mainframe to measure the output of a ADCMP580 without any jitter. Does somebody know how he did this?

author: Rerouter
author_rank: Super Contributor
timestamp: September 11, 2014, 12:19:49 pm
content: There are 2 thoughts that spring to mind, note that i have yet to exceed a few hundred Mhz, so i may be way off,First up, you could make up a 23 foot length of coax for the signal your using to toggle the stupidly fast comparator? that way its still maintained inside a transmission line, and the critical factor which is the output signal jitter should be effected less than how i am guessing you where attaching it,Next up would be abuse the latch enable pin, but it appears this may add jitter rather than calm it, as the datasheet hints at the time it takes to react not being dead on repeatable,

author: Marco
author_rank: Super Contributor
timestamp: September 11, 2014, 01:13:48 pm
content: Quote from: Snake on September 11, 2014, 11:58:09 amI assume he just connects clock out to the comparator input, the output to the sampling head and presses autoset ... as for jitter, does the screenshot say if it was in averaging mode?

author: Snake
author_rank: Contributor
timestamp: September 11, 2014, 01:27:43 pm
content: Yes he was using average but still with fast rise-time so I expect there was not that much jitter. Do you think his oscilloscope has an trigger output he hooked up to the input of the ADCMP580?I used a 26 ns delay line on the output with a power divider to generate a delay of 26 ns between trigger and sample input of my scope. This is working but the delay line is cause a little bit distortion and rise-time degradation.Another method is using the delay line on the input of the ADCMP580. This is preferred but is causing 100ps jitter. I hooked up an differential clock generator and used only a single delay line. I later want to do the same test with two matched delay lines which can improve jitter (the other method made it single ended).Another option is to trigger on an rising edge and delay the trigger on the scope with e.g. 100 ns to the next edge. If the clock generator is not accurate enough this will cause horrible jitter.Any other suggestions?

author: krenzo
author_rank: Regular Contributor
timestamp: September 11, 2014, 04:13:10 pm
content: Quote from: Marco on September 11, 2014, 01:13:48 pmYes, that's what I did. The screenshot I posted was in average mode, but without averaging, jitter is around 20-30 ps. I have since purchased an SD-24 like you have. I still use the comparator circuit to generate UWB pulses for RF positioning.

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: September 11, 2014, 04:29:04 pm
content: Tunnel diode?http://w140.com/tekwiki/wiki/S-52only 200mV, maybe you can put a 741 with a gain of 2 after it.

author: mazurov
author_rank: Frequent Contributor
timestamp: September 11, 2014, 05:09:11 pm
content: You can use Tektronix S-12 TDR plugin, with pre-trigger and other useful stuff included. Make sure it comes with S-52 pulser and S-[4,6] sampling head if you want 25ps. IIRC you only need to provide 50V via the rear connector to get it working, the rest is accessible through the front panel.

author: Marco
author_rank: Super Contributor
timestamp: September 11, 2014, 07:58:46 pm
content: Quote from: Snake on September 11, 2014, 11:58:09 amOh that scope doesn't even have a clock output and a setting for an internal clock trigger I see ... you can't use the same method as on the Tektronix.An alternative to a delay cable would be a delay circuit. Jay_Diddy_B simply usedsome schmitt trigger inverters with a R/C delay(dunno why he chained so many inverters instead of just increasing the resistor, you could add a diode in parallel with the resistor to allow smaller periods).

author: Snake
author_rank: Contributor
timestamp: September 12, 2014, 05:47:07 am
content: Thank you for all the advice. I didn't know the Tektronix has a clock outputYesterday I had a breakthrough and captured the 50 ps waveform from the ADCMP580 with only ~10 ps jitter. I hooked up my differential 500ps rise-time clock IC to the ADCMP580 with 2 delay lines instead of one to apply the clock differential instead of single ended. this solved all the problems and I have a very stable signal. I think I can even improve the signal by using another ADCMP580 connected to the clock IC output to speed up clock transitions from 500ps to 50ps. This will result in a 10 times faster trigger pulse and probably lower jitter.Now my goal is to find a faster comparator and preferable > 400mV step with 50Ohm to ground termination. Some time ago I worked with a Hittite comparator with ~12ps rise-time. This device is very expensive and I first want to buy a cheaper comparator/ buffer or logic port that can be used in the same way as the ADCMP580. The ONET8501 could be an option but it seems pretty complicated. Any other IC's with <30ps rise-time?PS: I own many S-12, S52, S6, S4, etc. hardware that I was using as 30 ps TDR but I want to build a future proof system that is reliable for the future. The Tektronix hardware is heavy and has a lot of unobtainable components when they fail.The ADCMP580 is very stable and the waveform has very low aberrations.Below a picture of the first results from the ADCMP580

author: David Hess
author_rank: Super Contributor
timestamp: September 12, 2014, 10:41:07 am
content: Quote from: Snake on September 11, 2014, 11:58:09 amTektronix used a physical delay line on their large pulse generators. Their S series plug-in pulse generators used ECL logic and an RC delay. Jim Williams used a discrete ramp generator and comparator.If you control power supply noise and regulation, then even TTL can get down into the 10s of picoseconds of jitter range with an RC delay so this is practical to do with many logic families. One of the better logic options would be to use either a differential line receiver as a comparator or an ECL gate that supplies or supports an external reference.QuoteThe sampling mainframe either has a delay line or produces a trigger clock output depending on how it is configured.

author: Marco
author_rank: Super Contributor
timestamp: September 12, 2014, 12:14:40 pm
content: Quote from: Snake on September 12, 2014, 05:47:07 amIs 50 Euros really worth worrying about?

author: Snake
author_rank: Contributor
timestamp: September 12, 2014, 12:54:53 pm
content: The Hittite device is >$210 and the small eval PCB ~$1000. The device is affordable but the PCB is very expensive. When the IC's dies you loose 1000 dollar if you do not have the special equipment to solder a new device accurately to the PCB.I used them at work and they are extremely sensitive for ESD/ EOS.It would be great if somebody can make a small Rogers PCB for this device for ~100 dollar. To make a low cost 12 ps TDR for users interested in TDR.

author: eurofox
author_rank: Unknown
timestamp: September 12, 2014, 01:08:45 pm
content: Quote from: Snake on September 12, 2014, 12:54:53 pmIf you provide the schematic and type if IC I'm not afraid to solder and have all equipment to do it, I used several time time the prescalers from Hittite without problems.

author: Marco
author_rank: Super Contributor
timestamp: September 12, 2014, 01:56:42 pm
content: Quote from: Snake on September 12, 2014, 12:54:53 pmAh, I thought you meant this one :http://www.digikey.nl/product-detail/en/HMC674LC3C/1127-1698-ND/4476130If you launch the signal straight into coax 1 cm next to the device with a 2.92mm or 2.4mm connector does it matter if you use FR4?

author: eurofox
author_rank: Unknown
timestamp: September 12, 2014, 02:17:26 pm
content: Quote from: Marco on September 12, 2014, 01:56:42 pmThis one I supposehttp://www.hittite.com/content/documents/data_sheet/hmc940lc4b.pdfI'm working as well to build a complete ultra fast pulse generator.

author: schopi68
author_rank: Regular Contributor
timestamp: September 12, 2014, 03:02:08 pm
content: This document gives a nice overview.http://www.overunity.com/12736/kapanadze-cousin-dally-free-energy/dlattach/attach/115338/&ei=ZQgTVLiOF6a6ygOA3YDgBQ&usg=AFQjCNHFnQZAoTPRNBtPeKQK_aPKfyq60w&sig2=x7uEmOeBHanfabbYuR1IIw

author: Marco
author_rank: Super Contributor
timestamp: September 12, 2014, 05:48:20 pm
content: BTW, how do you actually want to create a pulse rather than a step? A NTL can do it, but it's very hard. A differentiator can do it, but is also very hard (a simple stub based differentiator got nowhere near and you can forget about an RC one).The only relatively easy way I can see is by being tricky with the inputs for a comparator, for instance throwing a low passed HF square wave at one input and then a single cycle of the square wave but with an offset at the other input and changing the offset to tweak the pulse length.

author: Snake
author_rank: Contributor
timestamp: September 13, 2014, 08:33:06 am
content: I did several improvements to my TDR measurement setup and verified the pulse with my 50 GHz sample head. The measurement ADCMP580 gave 30 ps (20/80%) rise-time and jitter of less than 5ps. I only have a minor baseline shift of a few milivolts. I know the Hittite HMC851 gave excellent results wrt baseline shift. I was never able to correctly trigger with the sample oscillscope on the device so I do not know the rise-time.My goal is to borrow the HMC851 again and do some more measurements. It would be nice if somebody can copy the evaluation board from the HMC851 (see datasheet for layout view).At the moment I use the ADCMP580 as TDR in combination with a 6dB power divider from Huber & Suhner. This power divider gave the lowest reflections. The disadvantage of the TDR method with a power divider is the signal attentuation from 400 mVpp to 200 mVpp (0 Ohm to infinity Ohm).For my oscillscope it seems to be fine and I still have a good resolution but it would be nicer If I can double that amplitude. Any advice on the usage of power divider for TDR?Later I will post some pictures of the results.

author: David Hess
author_rank: Super Contributor
timestamp: September 13, 2014, 05:56:07 pm
content: Quote from: Marco on September 12, 2014, 05:48:20 pmIf you want a fast and high level impulse, then there are few ways to beat an avalanche pulse generator driving a step recovery diode and clipping line. At lower frequencies an RF transistor driving a resonate network and switched output clamp can generate a half-sine like in a Tektronix 1503 TDR.Quote from: Snake on September 13, 2014, 08:33:06 amThe TDR designs I have seen couple the edge or impulse directly into the transmission line in a way that decouples the drive before sampling occurs.What I would like to try is using an RF transistor as a transconductance amplifier to drive a current into the sampler termination to create a fast edge.An alternative would be to use a constant current source balanced with a sink (or sink and then source) to hold the line output at zero voltage and then disconnect the sink. That would allow using schottky diodes for switching and no active devices would be shunting the line. Fast calibration generators and fast integrators often work like this.

author: douzzer
author_rank: Newbie
timestamp: September 14, 2014, 06:21:46 am
content: Earlier this year I too was looking for a way to get <30ps edges for TDR/TDT, with the additional requirement that the stimulus be differential. The solution turned out to be the Colby PG-5000A, a long-out-of-production clipping amplifier built around some Fujitsu GaAs magic. It will routinely put out sub-30ps differential stimulus at rep rates from 10MHz or so to 5GHz, and if you hold it at just the right angle you can get it below 23ps (all times 20-80). Using an ESG-AP to drive it, the jitter is silly low. Measured TIE around 420fs RMS, N-cycle around 1ps RMS, at 2+ GHz rep rates, and at 30MHz rep rates, a still wholly respectable 3ps RMS TIE. The only caveat is that it's AC-coupled, so your rep rate can't realistically go below 5MHz and your driving signal has to have DC balance (though you *can* drive it with a square wave to synergistic effect). But there are a couple bonuses: on each of the two differentially related outputs, it has a 10 position attenuator for the pulse signal and, independently, a multiturn pot for DC offset injection. You can imagine the quality of the attenuators and bias Ts, to pass signals past >12GHz with negligible attenuation and group delay. I've peeked inside it and it looks like a physics experiment, all hand-made of course.See attached for a pretty comprehensive demo. I won't take the time to describe each image in detail. Upshot -- it or my scope or both peter out around 14Ghz, but there are strong harmonics with intact phase to 12GHz. For the demo I show square waves at 2.0GHz, 2.4GHz, and 2.8GHz, with a scattering of jitter figures, rise and fall times, FFT and odd harmonic amplitudes, and I also show a zoom in on the calculated (scope math) differential rise at 30MHz, showing a 35ps rise time.

author: Marco
author_rank: Super Contributor
timestamp: September 14, 2014, 03:41:40 pm
content: Quote from: David Hess on September 13, 2014, 05:56:07 pmAs I said before, the reverse recovery method has produced the fastest edge I've seen on this forum. It should work for this as well (with some complications for long steps, you'll need a second switch to pull down for long durations ... you can only saturate the transistor for a limited time for the fast reverse recovery to work).PS. I suspect there is some similar physics going on with that method and with Drift Step Recovery Diodes, both require gently driving a junction forward for a limited time and then reversing (unlike SRDs which you can just forward bias indefinitely before reversing).PPS. the SD-24 works exactly the opposite way, it takes the current source off the DUT to pulse.

author: David Hess
author_rank: Super Contributor
timestamp: September 14, 2014, 10:46:21 pm
content: So the SD-24 works the way I described with a diode switched current source and gets into the 30 picosecond range. That is reassuring but I cannot see being able to duplicate that performance without hybrid or maybe waveguide construction. I would be happy just to get to 8 GHz. Tektronix provided a nice theory section but no schematic details in the service manual.The Tektronix 067-0587-02 and 067-0587-10 1 GHz standardizers generate differential edge rates better than 150 picoseconds good enough for 1 GHz oscilloscope calibration and may give some idea into how they went about it in the SD-24.

author: Marco
author_rank: Super Contributor
timestamp: September 15, 2014, 12:06:09 am
content: Quote from: David Hess on September 14, 2014, 10:46:21 pmI know I'm being repetitive ... but one of the edges on the scope trace of the pulse using the reverse recovery method dropped 80-20 in 4 picoseconds and he just used CPWG on a normal PCB with an end launch connector. It would require a fair amount of experimentation to get it to work though, you can forget about trying anything out in spice.QuoteIf you just want something simple why not just drive a RF NPN into saturation without emitter degeneration with relatively fast logic? (ALVC for instance.) This should give you a damn good edge enhancement all on it's own ... it's not like these RF BJTs are slow even when used normally, cheap too.

author: David Hess
author_rank: Super Contributor
timestamp: September 15, 2014, 02:22:21 am
content: Quote from: Marco on September 15, 2014, 12:06:09 amI mean duplicating the performance of an SD-24 which couples the edge into the 50 ohm termination (25 ohm impedance) of a sampling head without disrupting the sampling process and without using a power divider. The pulse generator is effectively transparent before sampling occurs.QuoteThe transconductance based reference flat top pulse generators I have studied work in the way you describe but without saturation and so far the fastest I have seen is 150 picoseconds using an integrated end-fire configuration like you see in the fastest integrated ECL/CML parts. A PG506 uses discrete through-hole 2 GHz PNPs and 4 GHz NPNs to generate 600 picosecond (10 to 90) negative and positive edges but I believe performance is limited by layout considerations. The similar National Bureau of Standard design is the same speed and the Picoseconds Labs improved implementation is 425 picoseconds.I want to try this without saturation using a transconductance and diode switch based design. Where it gets tricky is that the straightforward general purpose implementations have some complementary elements and PNP RF transistors are slower. Lead inductance is a problem which Tektronix often solved by using dual base, collector, and emitter connections but nobody makes parts like that.I have not exactly given up on step recovery diodes but I have decided to grade my own from varactor and PIN diodes. I will have to add transistors as well now based on that link to the NPN based step recovery design. Tektronix used all kind of odd diodes in step recovery applications.

author: Marco
author_rank: Super Contributor
timestamp: September 15, 2014, 11:34:52 am
content: Quote from: David Hess on September 15, 2014, 02:22:21 amTheSSTD designed for NIFput 32 discrete diode samplers on a PCB transmission line and kept reflections to less than 2% (presumably measured with the SD-24).Flat top is always going to be harder than step edge ... but step edge is all you need for TDR, or to generate a pulse through differentiation.PS. the original paper for the reverse recovery method (which I had to find through google because the person who wrote the thread and blog didn't link it) ishere.

author: David Hess
author_rank: Super Contributor
timestamp: September 15, 2014, 05:11:53 pm
content: Quote from: Marco on September 15, 2014, 11:34:52 amI have that article already saved. The LLNL sampler is more than I want to tackle.QuoteThanks for this. I was planning on looking for it today.I am surprised the relatively high collector junction capacitance does not limit performance but it probably would in a slower transistor. I have been planning on testing the collector-base junction of various transistors in step recovery applications and this article gives me an idea of what can be expected.