Stability of LDOs - Page 1
Forum section: electronics / projects

author: rfbroadband
author_rank: Unknown
timestamp: February 16, 2015, 08:19:05 pm
content: I am curious if some of you had a hard time getting a LDOs stable under certain load conditions. If so and if you remember the conditions, I would be interested to know which regulator was used and the condition that lead to instability (compensation Cap, to low of an Cap ESR or whatever caused the issue, obviously incl. a schematic).In case you are curious , I am working on closed loop bode measurements of LDOs and I am looking for additional LDO casesor even better, if someone has concluded a certain LDO should not used for stability reasons I would like to know the details...thanks

author: dannyf
author_rank: Super Contributor
timestamp: February 16, 2015, 08:30:58 pm
content: LDOs generally are less stable than the non-LDO types (emitter output). So you need to read the datasheet carefully.One interesting LDO is the TA78DL05: It has a tendency to oscillate as load current goes up. The datasheet specifies a 110uf cap, as I recall. Fairly unusual for regulators.

author: mariush
author_rank: Super Contributor
timestamp: February 16, 2015, 08:57:48 pm
content: MIC2941 / LM2941 requires an output capacitor with at least 0.1 ohm esr and at most 1 ohm at low currents... seehttp://www.farnell.com/datasheets/1848918.pdffigure 15, page 7. The micrel datasheet doesn't mention it but the recommended capacitors kinda give you a hint ( ex 22uf electrolytics usually don't have <0.1 ohm esr)There's other regulators that have such requirements but nothing springs to mind right away.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 17, 2015, 01:53:38 am
content: I don't have specific "hate" examples offhand, but I've seen some datasheets that look like, at best, lost causes in the making.All the Microchip, TI/National, ADI and LT regulators I've used have performed within datasheet expectations, when used as suggested.My checklist:- Dropout at required load current, under worst case temp/mfg condition- ADJ/GND pin current at low Vin (for bipolar types)- Discussion of acceptable capacitor value and ESR ranges- Claims "stable with ceramic capacitors"- Transient response at useful load conditions (near dropout, at or near rated load, C + ESR specified)- Locus of stability (zone of stability vs. C, ESR)etc.Tim

author: rfbroadband
author_rank: Unknown
timestamp: February 17, 2015, 02:10:34 am
content: thanks for the responses. I probably should re-phrase the question. I am familiar stability issues related to LDOs and how to compensate the LDOs for proper stability, tune ESRs etc.. I was wondering whether anyone remembered any particular painful case (using a specific IC) where the compensation turned out to be more complicated than initially expected.While we are on the topic: What is your preferred method to verify stability? I prefer closed loop bode plot measurements to verify that phase margin is > 65deg and that I have decent gain margin.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 17, 2015, 03:26:00 am
content: Ah...Not much to "compensating", of course, for the most part... as you rarely if ever get the compensation node brought out to a pin. Which is part of the reason why they're so notoriously finicky (when they do behave badly, there's simply nothing you can do about it).I prefer switching regulators with external compensation, for the same reason.Alas, because the average engineer is happy enough following a "typical application" and doesn't want or need to deal with compensation each and every time, the value of internal compensation is real. So, it's not going to be going away any time soon.As for testing, I normally do a step response test, which can be as simple as scoping the output rail and 'sparking' a load resistor across the output. Ideally, the same should be done on the input side (source step response / PSRR) as well, and also over the expected range of input voltage and load current, in case it varies with operating condition (which it often does).Without access to the error amp, loop response isn't really a thing, but you could test PSRR and Zo vs. F, which is basically to the same end. The step response is more limited (it doesn't provide exact data at any given frequency), but arguably may be more informative (a true large signal test).Tim

author: Mad ID
author_rank: Regular Contributor
timestamp: February 17, 2015, 08:30:38 am
content: Quote from: rfbroadband on February 16, 2015, 08:19:05 pmMIC5205 with ceramic output cap i.e. 10uF oscillates. I use it with 1R resistor in series.

author: MrAl
author_rank: Super Contributor
timestamp: February 18, 2015, 02:54:21 pm
content: Hi,LDO regulators usually require a PNP transistor as the pass transistor rather than an NPN. The PNP has a high voltage gain, whereas the NPN functions as a voltage follower so the voltage gain is always slightly less than one.When the error amplifier detects an error, it takes a finite time ts to respond, and in that time the large gain of the PNP could make the output signal change by a lot. In contrast, the NPN has a small voltage gain so the output can not change by too much, even though it could change a little. The difference is that the PNP allows a greater change before the control circuit has time to detect anything is wrong, while the NPN only allows a small change which will usually damp out.This means in the forward path we have a larger gain for PNP and lower gain for NPN, and larger gains are harder to control so it has to be handled more carefully (it's a full blown control system).The NPN drops more voltage however because it is set up as a voltage follower so it's not as good for use in an LDO regulator as a PNP is. Another idea is to use a properly biased NPN to control a PNP, which helps, but i dont think they like doing it this way because it means another transistor added to the circuit.

author: Marco
author_rank: Super Contributor
timestamp: February 18, 2015, 03:04:02 pm
content: Why aren't there more charge pump LDOs with N-MOSFET outputs? The bit of silicon for the charge pump is too negligible to be relevant, the area for a large enough on chip capacitor might be ... but the 2 cents for an extra external part would be worth the reduction in headache.

author: nctnico
author_rank: Super Contributor
timestamp: February 18, 2015, 03:24:05 pm
content: The LM1117 will sing like a bird with a 10uf ceramic cap at the output. I usually use a simulated tantalum (=0.47 Ohm + 10uf ceramic) at the output or I put the 10uf further away from the LDO using a relatively thin trace with enough self inductance and resistance.