analog logic of driver circuit - Page 1
Forum section: electronics / projects

author: john23
author_rank: Frequent Contributor
timestamp: February 22, 2025, 06:12:43 pm
content: Hello , I was given the following driver.given the circuit and the result below, what is the analog logic for the BW and gain of in the circuit below?LTspice file is attached.Thanks.

author: jwet
author_rank: Frequent Contributor
timestamp: February 22, 2025, 11:56:09 pm
content: I don't quite understand your question- the "logic". Here's a guess as to your question.The LT1795 is a dual current feedback amplifier. It can drive the hell out of very very low impedance loads out to 10's of MHz with very high fidelity (low distortion). These parts are common in ADSL drivers for driving transformers at high frequencies with complex modulation- don't want to pick up distortion products- they have linearities in the 80 db + range. I would expect this to have a gain near 1 (0 db) and low phase shift as your spice sweep shows. You're getting a gain of about 7 and then throwing it away with the feedback. CFA's are sometimes driven this way- take gain forward and then take it way with feedback. It can flatten the frequency and phase response. This is likely a notional circuit to get the idea across. It will take some careful layout and bypassing to get this thing to behave as in the spice model. Commlinear invented the CFA and had some good app notes about them. (CLC acquired by National and further by TI, app notes survived). They only caught on in some special application like ADSL and Video line drivers. Good luck.

author: john23
author_rank: Frequent Contributor
timestamp: February 23, 2025, 12:39:30 pm
content: Hello Jwet, I count find in google app note regarding this configuration could you help me with some documents?Also how do you define "low phase shift"?How do i see the phase shift ?Thanks.

author: jwet
author_rank: Frequent Contributor
timestamp: February 23, 2025, 05:44:25 pm
content: Try this app note-https://www.analog.com/en/resources/technical-articles/adsl-line-driver-receiver-design-guide-part-one.htmlPhase is the lighter green line in your LT Spice plot with the numbers at the right. Its the delay in degrees of the signal through the amp. To drive signals like these amps are designed to do with complex modulation, you want the phase shift to be constant and small. Data is modulated in the phase of these signals and having a non linear phase response destroys this data. Video signals are especially color ones are also especially sensitive to phase.What is the application/final product for the circuit if you can say. These drivers are extremely specialized parts- not that they won't work elsewhere.Good Luck.

author: CaptDon
author_rank: Super Contributor
timestamp: February 23, 2025, 11:28:43 pm
content: You have listed many circuits with unusual components not easily available. How are you obtaining them on the continent of Antarctica? They are hard enough to get on Iceland. B.T.W., one of my good friends was stationed on Antarctica as part of operation 'Deep Freeze'. Skandik folks seem to love shitty weather!! Look at where most of the Skandinavian folks settled in North America!! Cheers mate!

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: February 26, 2025, 03:57:27 am
content: Hi,If we try a few experiments in LTspice.Replace the amplifiers with ideal amplifiersThe LT1795 amplifiers have been replaced with amplifiers with a gain of 1E6 and infinite BW.The current in the inductor has 45 degrees of phase shift at 5MHz.Create equivalent circuitsThis model shows two equivalent circuits with the same gain and frequency response.Compare with the LT1795 circuitThe difference between these two plots, I(L1) and I(L2), is result of the limited bandwidth of the LT1795 amplifiers.Regards,Jay_Diddy_B

author: john23
author_rank: Frequent Contributor
timestamp: February 26, 2025, 10:02:02 am
content: Hello Jwet,The apllication is driving a YIGwhich is a current controller oscilator.I have a FM coil of 1.5uH which is the load.(no transformers)I know that this circuit has a current sensing feedback.Could you please give me some intuition regarding how this mechanism works.So I could see the math and play with the parameters and see In action how the BW and gain changes?Thanks.https://www.analog.com/en/resources/technical-articles/adsl-line-driver-receiver-design-guide-part-one.html

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: February 26, 2025, 05:47:44 pm
content: Hi,I have implemented a PID controller using Laplace. The PID controller is described well here:http://www.ee.ic.ac.uk/pcheung/teaching/de2_ee/Lecture%2018%20-%20PID%20controller%20(x2).pdfHow to use Laplace in LTspice is described here:https://www.analog.com/en/resources/technical-articles/model-transfer-functions-by-applying-the-laplace-transform-in-ltspice.htmlThis is an ideal PID controller.You can play with coefficients Ki, Kp and Kd to see how these impact the control loop gain.You can only run this model in the frequency domain, AC analysis.I have attached the LTspice model.Regards,Jay_Diddy_BJDB PID.png(74.97 kB. 1593x750 - viewed 33 times.)

author: jwet
author_rank: Frequent Contributor
timestamp: February 27, 2025, 05:21:42 pm
content: All I can do is the point you towards the literature and the Web. I would look at old TI app note that came from Commlinear. The CLC401 was an early part and was described well back in the day.CFA's have a unique architecture. One of their inputs is a high impedance, not unlike an VFA, the other input is a follower output- low impedance- this is strange but it works- requires some study. The normal VFA rules about BW vs gain don't apply directly- they don't have the dominant pole compensation of VFA's and all that. You can take gain independent of BW to first order.Its not something I can get across in a message, it will require some independent study on your part.Regards,John

author: john23
author_rank: Frequent Contributor
timestamp: March 04, 2025, 06:34:47 pm
content: I know that feedback is sensing and returning ,we can sense current/voltage and return current / voltage . I am imagining feedback as comparing reference to "real signal" then by the value of the error signal we change the real signal ,its a time domain sequential process like PLL.Where in this circuit We have the reference where we have the "real signal" where is the "VCO" which is fixing the "real signal" by the error? \I want to imagine this feedback in similar manner so I could intuitively see how the feedback functions.https://www.analog.com/en/resources/technical-articles/adsl-line-driver-receiver-design-guide-part-two.html