The fear of using vias - Page 1
Forum section: electronics / projects

author: shadewind
author_rank: Frequent Contributor
timestamp: October 23, 2011, 02:56:03 pm
content: Everywhere you read about PCB design, people always recommend against using vias for high speed tracks (I know the theory mostly). But what about when you can't avoid it? Let's say X number of pins on a chip need to be connected to X number of pins on another chip but these pins are in the wrong order (which they usually are!). Even if it's just two nets, that's two vias for one of them if you need to flip them. I assume it's the same even if you're using multilayer boards, you still need to switch layers.Is there some magic trick I haven't heard about or is vias simply a necessary evil in most boards?

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 23, 2011, 03:29:48 pm
content: It's a case of prioritising - route the more critical circuits first, when there's plenty of room, and the less critical ones later on, where vias become more necessary.

author: Neilm
author_rank: Super Contributor
timestamp: October 23, 2011, 07:13:00 pm
content: I seem to remember reading that if you need to add a via you should put a small capacitor near it. I don't have any practical experience of this, but of course it does all depend on what you call "High Speed". I know people who would refer to anything less than 1GHz as DC.I would suggest going tohttp://www.compliance-club.com/and looking through the back issues and articles on PCB design.Neil

author: jahonen
author_rank: Super Contributor
timestamp: October 23, 2011, 07:34:40 pm
content: I think it is most important to choose initially a routing layer which avoids layer swaps. So it is ok to use vias near the components but worse in the middle of the trace. Next best thing to have the whole trace on same layer, is to swap to other side of the reference plane, but that is not usually possible unless you have 6 or more layers.The trick here is to figure out where your return current is going to flow. It wants to flow as near the signal current as it can. If the return current is not able to make a neat transition near the via, it will flow anywhere it can, usually causing EMC/SI problemsRegards,Janne

author: gregariz
author_rank: Frequent Contributor
timestamp: October 23, 2011, 10:15:32 pm
content: Many high speed lines are implemented using impedance matched lines. ie LVDS are typically a 100 ohm line running around your board. You'd want to lay down 100 ohm balanced lines across a ground if at all possible for those designs. And you'd want to avoid via's for the simple reason that you wouldn't really know what was going to happen to the matched lines. Get it wrong and you may end up with alot of common mode ground noise.But as always.. when designs are compact.. you often have little choice but to 'go for it'. Sometimes you get lucky, sometimes not. But you generally wouldn't pump fast impedance matched lines through via's if you could help it.

author: ejeffrey
author_rank: Super Contributor
timestamp: October 24, 2011, 08:01:43 am
content: There are two issues with vias.The first issue is the return current path. A high speed signal has an equal and opposite return current flowing on the nearest power or ground plane. If your signal jumps from one plane to another, the return current needs to make the jump, too. Since there is no via for the return current, it has to go to the nearest decoupling capacitor, greatly increasing the loop area and inductance. If the signal is jumping from one ground referenced plane to another you can just add in a via between the ground planes, but if it is between a ground and power plane, you may need to add a decoupling cap near the via. Differential pairs also mostly solve this problem as the two conductors carry each others return current and don't need so much help from the ground plane.The second is the impedance mismatch. If you have controlled impedance transmission lines, a via is a bump in the impedance and will reflect some signal even if you have a via or cap for the return current. This is only infrequently a problem in digital design: see the thread about 90 degree turns to see how bad you have to get for a small impedance bump to be a problem. You need to be at very high speed, have long traces, or be very sensitive to jitter to worry about this. High speed clocks and serial protocols like PCIe are typical examples. Usually there are only a few traces that need such careful treatment so as long as you route them first you have plenty of room.

author: ehughes
author_rank: Frequent Contributor
timestamp: November 02, 2011, 01:01:02 am
content: High Speed is greater than 500MHz....If you wavelength is from here to the other end of the workbench your OK.