Typical Values for Parasitic - Page 1
Forum section: electronics / beginners

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 15, 2011, 05:35:32 am
content: can someone advice on "typical" parasitic capacitance, inductance and resistance values for "typical" application such as:1) solderless breadboard2) x distance of pcb track and widthany parasitic relation to track dimension and distance between adjacent track?i mean typical is general, good enough estimation during circuit design/simulation.and "typical" can means the things you've encountered incl it application.whatever value will do, i just want to get a rough picture. thanx.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 15, 2011, 05:47:06 am
content: btw, to be more precise, actually i want to include parasitic model in my future circuit simulation. here is my basic model, the values are just blind guess. so c&c welcomed.(note: coupler usually means ground, but can be connected to adjacent transmission line)

author: vk6zgo
author_rank: Super Contributor
timestamp: May 15, 2011, 06:07:22 am
content: Back in the valve(vacuum tube)/discrete component days,the figure commonly quoted was 20pf.Even though our components are many times smaller,most of the dielectric was air,now it is PCB material,so it may still be a good figure to startfrom.VK6ZGO

author: Zero999
author_rank: Super Contributor
timestamp: May 15, 2011, 08:02:01 am
content: At high frequencies you can't use lumped elements, the PCB traces must be treated as transmission lines.

author: jahonen
author_rank: Super Contributor
timestamp: May 15, 2011, 08:22:42 am
content: I tend nowadays always think PCB traces as transmission lines since that won't give misleading results for any situation unlike the lumped element assumption. Although it must be noted that this is sensible solution only if the traces have some reasonable geometry, for which the impedance can be calculated (like trace near the ground plane so that width of the trace is about same or more than height from the ground plane), so this does not apply if you have traces in the pcb with no ground plane in opposite side. But then, you generally can't use that kind of "cheap" geometry if you have concerns about fast edge rates or high frequencies.Regards,Janne

author: saturation
author_rank: Super Contributor
timestamp: May 15, 2011, 11:59:58 am
content: I second or third that, treat all cables/traces/connections like transmission lines. If it doesn't apply, its overkill, if it does apply, you'll already have in your head a common problem point.A problem with a parasitic model is how accurate those assumptions are. If you lump parasitics as a single cap in parallel or an inductor in series, or even a limited number of them down the line [which makes it a transmission line of some length] it may take you down a path of design that really isn't real in the first place, and potentially wasted effort, time, and money!I dead bug all prototypes, it tends to work most all the time, and the dead bug style is fairly open, easy to troubleshoot and probe.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 15, 2011, 12:35:25 pm
content: Quote from: Hero999 on May 15, 2011, 08:02:01 amQuote from: jahonen on May 15, 2011, 08:22:42 amQuote from: saturation on May 15, 2011, 11:59:58 ammaybe my statement was not very clear. i mean during simulation stage, or design on paper. not the real hardware debugging.any good reference on how to treat one as a transmission line and not by lumped elements? how to simulate transmission line?thanx for the inputs.edit: already got some reference about tline theory in google.

author: joelby
author_rank: Frequent Contributor
timestamp: May 15, 2011, 01:25:05 pm
content: Quote from: Mechatrommer on May 15, 2011, 12:35:25 pmAll SPICE-based programs should let you simulate a transmission line of a given characteristic impedance as if it were a normal component.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 15, 2011, 01:32:16 pm
content: Quote from: joelby on May 15, 2011, 01:25:05 pmthanx. i'll study on this. half reading the tline reference, i can see the tline analysis is crucial when the track length is greater at some ratio compared to wavelength... still reading. sometime i think i only need to simulate parasitic near hi freq chip/opamp and the track length will be short.

author: vk6zgo
author_rank: Super Contributor
timestamp: May 15, 2011, 03:15:36 pm
content: Its OK to treat traces as transmission lines,but real components in an active circuit have very real values of stray reactance which do not fit neatly in the transmission line model.The connections between components on a solderless breadboard will not look a lot like any simple line.Another point is that the "transmission lines" may not match the impedance of the devices they are connecting in practical PCBs,with resultingreflections,etc.In RF work,great care is paid to ensuring correct matching between source,line,& termination.VK6ZGO