hybridfree/eevblog-posts huggingface dataset:
Microcap timed switch not making sense - Page 1
Forum section: electronics / general

author: techninja80
author_rank: Regular Contributor
timestamp: August 10, 2024, 10:42:39 pm
content: Why when the switch is off I am getting 1.6V?? I know I must be doing something wrong. I am a self learner, and am struggling with something really simple. I know this is an issue with using the product, because if I change the switch to a animated switch or a static one, I don't get this leakage. I really need to understand this because I need the timed switch function Please someone explain why I am getting this odd behavour, and point me in the right direction. Also I have faith in microcap, it has always been my fault so if your advise is to use something else, I wont do it. Thanks for any help. I labeled the test point tmns (This Makes No Sense).|

author: Kim Christensen
author_rank: Super Contributor
timestamp: August 10, 2024, 11:23:20 pm
content: The software must simulate a tiny bit of switch leakage. The 1.6V comes from that leakage current going through the LED but not visibly lighting it. A real DMM would load it enough that you wouldn't see the 1.6V...Perhaps there's a way of setting this leakage current to zero?Or do something like this to get rid of the ghost voltage:

author: nctnico
author_rank: Super Contributor
timestamp: August 10, 2024, 11:28:22 pm
content: Look for the on / off resistance values for the switch in the properties.

author: techninja80
author_rank: Regular Contributor
timestamp: August 11, 2024, 03:02:21 am
content: Thank you nctnico, and Kim Christensen. Both your suggestions affected the circuit in the way that I desired. I employed both in order to get the desired results. I will need to keep this in mind for future work. Both it dropped from 1.6V to 8.9mV Thanks a million I can move on. Finally to get rid of that horrible negative spike the almighty diode.
Multi-via objects and transitions - Page 1
Forum section: electronics / general

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: March 01, 2024, 04:22:04 pm
content: For high-speed signals that require specific signal and ground via configurations, do you1) Create a footprint and schematic symbol2) Just create it in the layout and copy paste in the PCB with no special schematic involvement.For 1, if there's a simulate/layout cycle, all you do is update the footprint, but 2 is easier to get going quickly.So, WWYD?

author: Sagar
author_rank: Contributor
timestamp: August 12, 2024, 09:53:05 am
content: I always go with the second approach, after proper R&D once next revisions are easy to carry out.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 12, 2024, 06:02:05 pm
content: Well, "high speed" is a wide net. You may be interested to know that schematics can be layout-precise, specifying lengths and widths of transmission lines, junctions, stubs, etc., and this is a reasonable way to do RF design and layout -- usually with a check step of EM field simulation of the tentative/finished PCB design, or perhaps model extraction to verify that the output (an n-port matrix) matches the design (when expressed in the same way) within expected tolerances.For digital signals, there is only one impedance to choose, length to various features is variable, and geometric limits apply instead: length maximum, length matching (within a pair or group, between pairs/groups, etc.), maximum vias, via geometry and clearance, etc. Any limitations on stub length are handled by inspection, or specifying back-drill when via stubs are the concern. Many of these can be specified for autorouting purposes, but in a simple hand layout it's less work to just review things manually.Tim
Do all of LTspice in Qspice? - Page 1
Forum section: electronics / general

author: Faringdon
author_rank: Super Contributor
timestamp: July 27, 2024, 05:33:14 pm
content: Hi,Can i put the .sub file for an LT1248 in LTspice, and load it into Qspice and run it there?From what i gather at least, Qspice sounds quicker than LTspice?Also, Qspice has FETs/Diodes which have the correct Cgd vs voltage, etc etc?..So Qspice will sim switching losses better than LTspice?https://www.qorvo.com/design-hub/design-tools/interactive/qspice/

author: tggzzz
author_rank: Super Contributor
timestamp: July 27, 2024, 06:16:54 pm
content: Quote from: Faringdon on July 27, 2024, 05:33:14 pmThose general questions you can answer for yourself: just try it.The question specific to your requirement can only be answered by you, of course.

author: Faringdon
author_rank: Super Contributor
timestamp: July 28, 2024, 12:54:14 pm
content: Thanks , ive listened to two of Dr Engelhardts vids on Qspice, and read quite a bit.But when he simmed a SMPS, he seemed to have written the model for it himself in C?Either that, or he had built up the controller model himself from circuit units?......he didnt just download a "UCC38C43" model and start running it....which is what would be really great.Even better if you could download say, a LT1248 and start simming that......because PFCs take ages to simulate , so if Qspice is quicker then it would be great for PFC sims.......LLC controllers too....say i want to put a LLC controller into Qspice.....i dont think an LLC controller model exists on the web, so its no can do.....so in most projects, you just wouldnt bother, as you can do a restricted LLC sim in LTspice ,and thats enough...and most projects just dont have time for an engineer to go round and do loads of researchy stuff aswell.Obviously, Dr Engelhardt wrote LTspice too.....but with LTspice , if i want to do a quick basic check on a flyback converter, i can just shovel a LT1243 into a LTspice sim, and within minutes , its job done......i couldnt yet see how such ease of use could be gotten from Qspice?

author: thm_w
author_rank: Super Contributor
timestamp: July 29, 2024, 09:10:33 pm
content: Did you read these topicshttps://forum.qorvo.com/t/is-there-a-way-to-import-lt1170-model-in-qspice/16114/3https://forum.qorvo.com/t/open-or-convert-an-ltspice-schematic/14156/9https://forum.qorvo.com/t/compatability-with-ltspice/17447/5Sounds like if its encrypted its going to be more work.
LCSC, looking for spice modals - Page 1
Forum section: electronics / general

author: Geoff
author_rank: Contributor
timestamp: August 07, 2024, 07:19:05 am
content: LCSChas a lot of nice MOSFETs, but I would like to pick from those that have spice modals available.I have tried searching for the manufacturer's website, but no luck when it comes to these lesser known brands.Is there another, better way, or place to search for their spice modals?

author: thm_w
author_rank: Super Contributor
timestamp: August 07, 2024, 09:10:16 pm
content: Create it:http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice_tutorial_6.htmedit: looks like you crossposted here, please don't spam the forumhttps://www.eevblog.com/forum/projects/lcsc-looking-for-spice-modals-436149/

author: Geoff
author_rank: Contributor
timestamp: August 08, 2024, 02:39:30 am
content: I tried moving my post, but it would not let me delete the topic.
JLCPCB FPC Service? - Page 1
Forum section: electronics / general

author: hlord2000
author_rank: Newbie
timestamp: March 20, 2023, 12:34:50 pm
content: JLC seems to have added "Flex PCB" capability to their site. Seems that flex orders cannot be placed yet but they have stackups listed for 1 and 2 layer FPCs with and without stiffener/EMI shield.https://jlcpcb.com/capabilities/flex-pcb-capabilities

author: thm_w
author_rank: Super Contributor
timestamp: March 20, 2023, 08:25:40 pm
content: PCBway has it if you want a quote:https://www.pcbway.com/flexible.aspxhttps://www.pcbway.com/pcb_prototype/What_is_Flexible_PCB.html

author: JLCPCB Official
author_rank: Regular Contributor
timestamp: March 21, 2023, 01:59:38 am
content: jlcpcb will launch flex PCBs soon ~

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 31, 2023, 09:35:24 pm
content: Quote from: JLCPCB Official on March 21, 2023, 01:59:38 amNice, will you have PCB assembly on flex too?

author: Sagar
author_rank: Contributor
timestamp: July 23, 2024, 04:44:26 pm
content: I get some FPC units from JLC, they are good. I don't know how they estimated the cost too much lower than others without compromising the quality. What do you think about that?
Shielding on connection distrubution board ET200 - Page 1
Forum section: electronics / general

author: danie0408
author_rank: Newbie
timestamp: July 10, 2024, 01:41:43 pm
content: I'm sorry if this is a stupid question, but I can't figure this out. I am wondering if I somehow need to add ground planes to shield my PCB;I have a Siemens ET200eco PN M12-L (6ES7148-6JE00-0BB0). Right now, the connections are distributed to terminals and from there connected to sensors.I am making a PCB that takes the connections from the ET200 and distributes them to terminals. The ports are either switched or non-switched, I think these should be connected. Two connectors of the PCB use the switched power and three use the non-switched power. One connector doesn't use ground, only 24V+ and the signals. I don't want to connect the grounds from these connectors, to prevent cross connection. So if I were to shield the PCB I would have four different ground planes and one connector without shielding, because it doesn't use ground.These are all digital signals, so shielding wouldn't be very necessary, right? I have a feeling shielding these connectors doesn't make sense, as there was no shielding before and it worked fine. Am I right, or am I missing something?I've attached the current state of the PCB and the warning I found in the ET200 manual.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 10, 2024, 02:17:33 pm
content: This seems to be relevant,https://cache.industry.siemens.com/dl/files/293/109778293/att_1027365/v2/et200ecopn_di_8x24vdc_m12l_8xm12_manual_en-US_en-US.pdfbut I don't know which parts of it to refer to.Are the cables shielded?What kind of signaling do they use?What are you connecting from and to? Is it legal to fan out these signals? Is it not a fan-out at all, just a straight-through connector adapter more or less?Tim

author: thm_w
author_rank: Super Contributor
timestamp: July 10, 2024, 08:34:13 pm
content: How you've drawn it makes sense, just having individual straight through wiring to the connectors. The planes probably aren't necessary, looks like almost all DC connections, but won't hurt.Only thing to check is if any of these are higher current connections or not, then might want wider traces.

author: danie0408
author_rank: Newbie
timestamp: July 15, 2024, 07:25:19 am
content: Hi, thank you for your reply, and sorry for my late response.The cables from the et200 could be shielded, but the cable out from the terminals is not shielded.These are digital signals.The connections mainly go to a spindle, normally they are fanned out using din rail terminals. The goal was to make it easier to assemble using a PCB.Kind regards

author: danie0408
author_rank: Newbie
timestamp: July 15, 2024, 07:27:35 am
content: Hi thm_w,These are all DC connections indeed. I did do some calculations for the needed trace width.Thanks for your reply and your help!
Multisim Convergence Error on 555 Timer Circuit - Page 1
Forum section: electronics / general

author: SanctePieDecime
author_rank: Contributor
timestamp: June 25, 2024, 07:26:34 pm
content: I built this circuit in Multisim and keep getting a convergence error. I took a closer look at the circuit during simulation and found that the error only occured when either of the 555 timers reached the switching point.I cannot seem to find out what is causing this.Additionally, the 555 timers do not seem to be sourcing enough current, when on, to light the LED, so if any of you would happen to know why that might be that would also be appreciated.I have the 555 timers configured in a monostable mode with a capacitor connected between the trigger pin and ground so that it will just start the timer when the IC gets power.
CD4066BE bug in Proteus or I use it wrong? - Page 1
Forum section: electronics / general

author: Xahon
author_rank: Newbie
timestamp: June 01, 2024, 06:15:21 am
content: I have made this test thing to check if CD4066BE works in minimal sample, it doesn't work as I intendedI expected the LED to light up because I push +V to control pin, one of the SIG pins is connected to +V as well and I expect the other SIG_A pin to passthrough current but it doesn't happenHardware CD4066BE works fine for meCD4066BE was added from SamacSys page of the Pick Device manager

author: wraper
author_rank: Unknown
timestamp: June 01, 2024, 06:22:58 am
content: Likely buggy or incompatible model. Also bugs were pretty common in Proteus while using its own models at least in the past. I did not bother emulating anything other than simplest passive circuits in Proteous for a long time as I have better things to do than figuring out emulation bugs.
PICMG Interface Connector Drawing files and details - Page 1
Forum section: electronics / general

author: Arsh ahmad
author_rank: Regular Contributor
timestamp: June 20, 2024, 10:40:56 am
content: I am using a PICMG based carrier card. I want to make another peripheral with the same, but I am not able to find PICMG pinout Details so that I can make a PCB edge Connector card. The electromechanical details are paid and cost is high, I need the drawings for the connector.
Shape the future of our EDA tool with your insights! - Page 1
Forum section: electronics / general

author: circuitly
author_rank: Newbie
timestamp: June 04, 2024, 11:30:42 pm
content: ⭐Calling all circuit design enthusiasts! ⭐Your voice matters in shaping the future of our circuit board design tool! At Circuitly, we're on a mission to elevate collaboration in circuit board design. Take our 5-minute survey to share your insights on your current experience with EDA tools. Your feedback will help us tailor our upcoming product to meet your needs. Plus, there's a chance to win a $50 e-gift card! Let's innovate together!Survey link:https://qualtricsxmxp2vmtyp2.qualtrics.com/jfe/form/SV_0HF50sRUkw1zfxQ
qspice download problem - Page 1
Forum section: electronics / general

author: Sniper1
author_rank: Regular Contributor
timestamp: May 22, 2024, 06:25:13 pm
content: Anyone having problems downloading / receiving the download email from QSPICE? ( on gmail)Tried for 5 days to get in touch with them but it is like gmail does not work with their server.Am i alone?

author: blackfin76
author_rank: Regular Contributor
timestamp: May 31, 2024, 10:19:19 pm
content: Worked fine for me with a gmail address.
Weird issue in a simple LTspice circuit simulation - Page 1
Forum section: electronics / general

author: Shay
author_rank: Regular Contributor
timestamp: May 22, 2024, 09:17:11 pm
content: Hello,Consider the attached circuit to this post.The issue is that I dont get the expected output, which is the V5 = 1V on the inverting input of the OP-AMP.It seems to me that everything is connected OK. But the OP-AMP output shoots to -15V like it is in open loop. But clearly there is a feedback here.I was wondering if someone know what is going on.

author: Andy Watson
author_rank: Super Contributor
timestamp: May 22, 2024, 09:45:46 pm
content: The overall feedback is positive.
Need to view old Tango PCB Plus V2.11 file  - Page 1
Forum section: electronics / general

author: jmelson
author_rank: Super Contributor
timestamp: May 18, 2024, 04:55:52 pm
content: Hello,I have a Tango PCB Plus V2.11 binary file that I'd like to just view the screen and print the silkscreen layer. Does anybody know how to get this into a more modern tool? I DO have the Tango PCB exe on an old virtual machine, but it exits immediately as I assume it doesn't find the license dongle. I have Protel 99 SE but that won't import it. Any other options?Thanks,Jon
LTspice not responding quickly - Page 1
Forum section: electronics / general

author: Faringdon
author_rank: Super Contributor
timestamp: May 15, 2024, 07:59:03 pm
content: Hi,When i am trying to save an LTspice schem, i hit "FILE" > "SAVE".However, when i hit "file", nothing happens for about 4 seconds.....then the drop down list comes.What is causing this delay?I confess, this is a works computer, and incidentally, on a similar note, whenever i click a folder that i want to open, it very often hangs for a few seconds before opening the folder.The laptop is a HP Probook 450, Windows 11 Pro.I suspect some thing has been "done" to this laptop to slow it up.Do you know how to "Undo" it?

author: Gyro
author_rank: Super Contributor
timestamp: May 15, 2024, 08:15:54 pm
content: Quote from: Faringdon on May 15, 2024, 07:59:03 pmI suspect even you would struggle to get a dodgy pirate copy of LTspice!As for what other stuff you've got on there though...

author: thm_w
author_rank: Super Contributor
timestamp: May 16, 2024, 08:43:52 pm
content: You said in the other thread there was a hard drive full error, so its not surprising its super slow if its almost full.But it is an SSD right?Check task manager to see if anything is using high cpu.

author: Faringdon
author_rank: Super Contributor
timestamp: May 17, 2024, 06:57:30 am
content: Hi, Actually no this isnt relevant to that thread. That was a different problem.This is a different laptop, the HD is not full on this one.

author: janoc
author_rank: Super Contributor
timestamp: May 17, 2024, 07:02:40 am
content: Most likely zero to do with LTSpice but some problem with the laptop or the folder you are trying to save stuff into - e.g. is it a network drive, by chance? Do you have antivirus scanning the files in that folder? Is there something heavily using the HDD in the background? E.g. Windows Update running in the background used to make my Windows machine pretty much unusable for the first 30 minutes after turning the machine on. Given that this is a work machine, it is also likely you have some software inventory agents, company's security software and what not running in the background.Also, how much RAM do you have in that machine? E.g. some models of this laptop come with only 8GB of RAM, which is barely enough to have usable Windows these days.In other words - the usual Windows suspects & problems.
LTspice error message - Page 1
Forum section: electronics / general

author: Faringdon
author_rank: Super Contributor
timestamp: May 12, 2024, 06:15:36 pm
content: Hi,Do you know how to solve this error message..it appears just after LTspice prematurely terminates running a sim.I looked on the LT user site but no luck"Trouble writing 4 more bytes to the disk. Full? Permission problem?"I have permission and the disk has 9GB left free.

author: xvr
author_rank: Frequent Contributor
timestamp: May 13, 2024, 06:34:05 pm
content: Are you have only one disk? LTSpice can write to different places, and different disks (if it found them)

author: Faringdon
author_rank: Super Contributor
timestamp: May 13, 2024, 06:53:43 pm
content: Hi Thanks, it appears my laptop's disk was nearly full and i hadnt realised...didnt realise that that would also result in the laptop heating up so much...and the fan going round fast and loud...guess when the disk is full it has to keep partitioning and it takes energy.

author: Kean
author_rank: Unknown
timestamp: May 14, 2024, 06:28:15 am
content: Quote from: Faringdon on May 13, 2024, 06:53:43 pmWhat? No!LTspice is computationally heavy and any heat generated is from the CPU/GPU not the HDD/SDD.It can also generate very large temporary files on disk when running simulations - as you experienced.
Allegro "X" PCB design:  COMPARISON chart ??? - Page 1
Forum section: electronics / general

author: frogblender
author_rank: Regular Contributor
timestamp: April 04, 2024, 03:04:10 pm
content: Under "Allegro X", cadence has:Artist (cheapest)DesignerDesigner PlusVenture (almost10xthe cost of artist)Does anyone have acomparison chartfor these different versions? Cadence' website has useless marketing wank like "bring your innovative and bleeding-edge designs to life!" and "improve productivity!", which make me want to slap someone upside the head, instead of buying their product.

author: thm_w
author_rank: Super Contributor
timestamp: April 04, 2024, 08:14:18 pm
content: Ask their marketing to give you a list, should be their job.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/51317/venture-pcb-designer-suite-vs-pcb-designer

author: frogblender
author_rank: Regular Contributor
timestamp: April 04, 2024, 08:20:50 pm
content: I found something:https://www.goengineer.com/cadence/allegro-x

author: Shell Albert
author_rank: Contributor
timestamp: April 25, 2024, 06:23:40 am
content: Yeah, I heard Cadence update Allegro to the latest version, the new generation powered with AI, called "Allegro X", but I have no courage to update to "X". Afraid to be the first man to eat the crab. haha. And Now, I'm using Allegro SPB23.1, be patient, waiting for 2 years after cadence issued all necessary patches.
LTspice AND statement - Page 1
Forum section: electronics / general

author: Faringdon
author_rank: Super Contributor
timestamp: April 07, 2024, 04:40:45 pm
content: Hi,Do you know what's wrong with the attached?As you can see, its obvious what is meant, but syntax dumps it.

author: PlainName
author_rank: Super Contributor
timestamp: April 07, 2024, 04:56:34 pm
content: There are five opening parenthesis and only four closing ones.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 07, 2024, 10:12:13 pm
content: Quote from: Faringdon on April 07, 2024, 04:40:45 pmYes, damn syntax.

author: Zero999
author_rank: Super Contributor
timestamp: April 08, 2024, 07:36:13 am
content: What are you trying to achieve?LTSpice doesn't have an AND statement. Use the boolean operator &.https://groups.io/g/LTspice/topic/50204515

author: Shell Albert
author_rank: Contributor
timestamp: April 25, 2024, 06:33:48 am
content: Haha, so interesting. I never use LTSpice, although it's small size and has many libraries built-in, but it's too simple. I highly recommend you to use Cadence Pspice, powerful, complicated and popular.
Looking for CADSTAR pcb Uplaod Program - Page 1
Forum section: electronics / general

author: hello188
author_rank: Newbie
timestamp: April 23, 2024, 07:41:02 am
content: Hi.My company gave work to modify a PCB file which was done with the original version of CADSTAR Ver 1.3I.I am trying to import these .cdo files to windows version.However it seems I can only import data created by versions later than CADSTAR 7.I searched this blog and elsewhere and found that there is a utility program called CADSTAR PCB Upload, which converts previous versions of CADSTAR files to Version 7.Anyone has an idea on where I can get hold of it?Thanks

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 23, 2024, 03:21:22 pm
content: Not a direct answer, but if you have Gerber files available, then maybe KiCad is an option.In KiCad you can re-create a PCB from a set of Gerber files. This process is not "instant", but you can recover a lot of information, such as PCB outline, mounting hole locations, all tracks, locations of footprints (implied in endpoints of tracks). There is no concept of footprints or pads in Gerber files, but when you place native KiCad footprints on the end locations of tracks, the re-creation is pretty good. As an estimate, an euro-sized (100x160mm) PCB will take approximately half a work day to convert.For schematic (re) entry, there is no automation, but re-entering a schematic from a .pdf or printout is much quicker then redesigning or reverse engineering a schematic.

author: hello188
author_rank: Newbie
timestamp: April 24, 2024, 01:53:17 am
content: Thank you for kind reply.One of the things that I need to do is extract component placement coordinate from the old .cdo file.I guess I can generate gerber file.Do you have any good way i can extract component coordinate from gerber?Thanks

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 24, 2024, 09:29:04 am
content: The concept of footprints (components) does not exist in Gerber files. (Except maybe for the newest X3 variant) "Pads" also do not exist in older Gerber files. As a result there is no way to directly export the coordinates of the footprints. Even now there is still a separate placement file with this information. But it's not as bad as it seems. It is quite easy to delete the remnants of the pads, and then place real footprints on the same locations as the old ones. You can use the ends of the tracks to snap to, and this is either perfect, or very close (Depending on differences between the old and the new footprint).If a set of Gerber files is is converted to a KiCad project, then you can generate a placement file via the regular methods of course.
Seeking Cadstar for DOS, or Cadstar "Upload" program - Page 1
Forum section: electronics / general

author: inaxeon
author_rank: Regular Contributor
timestamp: February 10, 2023, 12:09:49 pm
content: HelloI'm trying to re-build part of an old bit of kit for a hobby project. I've managed to get the design files which are Cadstar DOS binary .CSD and .CDO format. They cannot be opened by any current packages.I have seen this topic come up here before and a program called "upload" has been mentioned which can convert these to a more modern format? I cannot find a download for these anywhere. Does anyone have any of this software?Cheers

author: inaxeon
author_rank: Regular Contributor
timestamp: February 10, 2023, 08:43:03 pm
content: (got it)

author: hello188
author_rank: Newbie
timestamp: April 23, 2024, 08:03:32 am
content: Hi,I am also searching for the utility.Can you share some info, if you have found it?Thanks
ltspice model for irs2186 half-bridge driver or similar? - Page 1
Forum section: electronics / general

author: julian1
author_rank: Frequent Contributor
timestamp: April 19, 2024, 11:09:28 pm
content: I found a readme that points to IR-HCdrv.zip, independently developed by analogspiceman.https://ltwiki.org/files/LTspiceIV/examples/LtSpicePlus/Smps/Ir21xx/IR_readme.txtBut cannot find the zip file. on groups.io or from a google search.Alternatively a model for a similar high and low-side driver, with independent ctrl channels would probably be fine.

author: julian1
author_rank: Frequent Contributor
timestamp: April 19, 2024, 11:18:39 pm
content: Ignore me. There's an official pspice model,https://www.infineon.com/cms/en/product/power/gate-driver-ics/irs2186s/#!designsupport
Open VSP (vehicle sketch pad) - Page 1
Forum section: electronics / general

author: 3roomlab
author_rank: Frequent Contributor
timestamp: April 16, 2024, 01:02:32 am
content: found these goodies on the netmain site :https://openvsp.org/links for download in the websitelinux version 20 is about 64MB *.debtutorialshttps://www.youtube.com/@openvspvideos5394/videos(look at the videos from the oldest first for beginner tutorials)sample cessna modelhttps://vspu.larc.nasa.gov/example-file-download/a 3MB user manual was found on the net. it is attached below(i have yet to find the actual user manual inside the file directories)related : XFOILhttps://web.mit.edu/drela/Public/web/xfoil/this is a command line program tool for airfoilsa ton of tutorials on youtube on XFOILhave fun !
problem controlling variable DC-DC LTC1261LCS8-4 - Page 1
Forum section: electronics / general

author: john23
author_rank: Frequent Contributor
timestamp: April 14, 2024, 08:58:42 am
content: Hello,In the datasheet shown below they say that the output resistance could be controlled using the COMP pin as shown in the links below.I have tried to simulate this component in LTSPICE.However I cannot understand the datasheet regarding how exactly do I need to use the COMP pin for tuning the output voltage?LTSPICE and phots are attached in the link.( I dont know other ways to present here photos and simulation files :-)Thanks.https://www.analog.com/media/en/technical-documentation/data-sheets/1261lfa.pdfhttps://ibb.co/WtvMYwshttps://ibb.co/vLyCjr5https://easyupload.io/4s197x

author: iMo
author_rank: Super Contributor
timestamp: April 14, 2024, 09:30:42 am
content: Your part is not adjustable, it seems..The Adjustable parts should not end with the suffix -4 or -4.5..
Modifying a auto-generated symbol in LT Spice - Page 1
Forum section: electronics / general

author: joniengr081
author_rank: Regular Contributor
timestamp: April 13, 2024, 06:05:16 pm
content: Hi,I am wondering how do we modify the auto-generated symbols in LT Spice that created automatically by the tool from *.lib file.If we just delete the default rectangle, can we import a symbol and assign the pins to that ? instead drawing a new symbol or modifying manually ?
Help Understanding LTSpice Netlist for SCHMITT Device - Page 1
Forum section: electronics / general

author: Azmarith
author_rank: Newbie
timestamp: April 20, 2024, 11:03:54 am
content: I'm not particularly knowledgeable with regards to LTSpice. I only really know the basics. I'm trying to debug a .sub that describes a component. It works for the most part, but some behaviour isn't what it should be.In order to debug it, I'm trying to recreate the subcircuit from the netlist in the .sub file. For example one of the instances of a SCHMITT is "A1 Ct b8 0 0 0 0 N015 0 SCHMITT vt=0 vh=1m". I'm happy with most of it. The input is pin 1, and is connected to net Ct. However, I can't find the a pin 2 that b8 is supposedly connected to. Am I missing something here?

author: Kean
author_rank: Unknown
timestamp: April 21, 2024, 12:48:40 pm
content: Discussed herehttps://electronics.stackexchange.com/a/626245Quote
SG3524 SPICE file - Page 1
Forum section: electronics / general

author: Azmarith
author_rank: Newbie
timestamp: April 08, 2024, 11:56:19 pm
content: Looking for a SPICE file for an SG3524 to use in LTSpice. Ive found some for an SG3525A, but they don't seem to work. Could anyone help?
LTSpice 24.0.10: waveform viewer is completely borked - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 03, 2024, 01:04:28 am
content: I upgraded LTSpice from 24.0.9 to 24.0.10 (which appeared a couple days ago), and the waveform viewer is now completely borked.Can anyone confirm that it's the same on their side? (I'm using LTSpice on Wine here, will be interested to get feedback both from Windows users and Wine users.)

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 06, 2024, 02:41:20 am
content: Version 24.0.11 has been released - they quickly fixed it.The main culprit was linked to changes affecting only users for which the locale settings would define the 'comma' as the decimal point (which is my case, but would explain why many of you didn't run into it.)Quote
Crosstalk between parallel traces... - Page 1
Forum section: electronics / general

author: westfw
author_rank: Super Contributor
timestamp: April 01, 2024, 11:56:37 pm
content: How much should I worry about running pin signals (say, microcontroller IO ports) as closely spaced parallel tracks on a PCB?Back in the low-density TH days, I would have tried to keep traces pretty far apart as much as possible, even interspersing "sensitive" signals (eg analog inputs) with GND signals to form a sort of "shielded" connection, but this is getting increasingly impractical as finer-pitch SMT becomes more popular, and the math in my head (two "wires" approx .2 [ Attachment Invalid Or Does Not Exist ] mm apart and and less than 5cm in length; not much capacitance between them!) says maybe I've been silly all along.For example, consider these two layouts. Does it matter?Here's some of the math:http://4ms.org/?p=441

author: selcuk
author_rank: Frequent Contributor
timestamp: April 02, 2024, 11:45:52 am
content: Yes, it is hard to place GND between each signal. But the coupling is not only capacitive. There is also a fringing effect of EM radiation. You should place the ground plane under the signals very close to the top layer in order to keep the radiation distance small.

author: 2N3055
author_rank: Super Contributor
timestamp: April 02, 2024, 12:31:21 pm
content: Speed is the key. Namely, how fast signal edges are and signaling rate.Look up Prof. Bogatin. He has some nice material on the topic.That is for digital.For analog, it depends on analog levels. Analog you shield as needed.For analog, there are no rules of thumb.

author: thm_w
author_rank: Super Contributor
timestamp: April 02, 2024, 09:24:54 pm
content: As mentioned, does it matter depends on your design and what signals they are. If they are simple low frequency 3.3V button inputs or LED outputs from a MCU, it does not matter at all. Is this a hobby design where we don't care too much about EMI?Need context.Also looking at that PCB layout my guess is you could use much smaller via's. JLCPCB standard is 0.3/0.5mm for a cheap 2 layer board.
Symbol/footprint sites and licensing - Page 1
Forum section: electronics / general

author: GabrielBlackfox
author_rank: Newbie
timestamp: March 27, 2024, 07:08:37 pm
content: Hi.I usually make my own symbols and footprints when working in KiCAD. This is becoming annoying, so I've started looking at sites like ultralibrarian or snapeda to make my life easier. However I'm not entirely convinced if the symbols/footprint they offer a free to use, especially in commercial applications. They state "free access" everywhere, but that's not very straightforward. Like... free access and then you have to pay a licensing fee for every manufactured device. Does anyone know the legal side of things regarding using these sites (or others you may know)?

author: thm_w
author_rank: Super Contributor
timestamp: March 28, 2024, 08:57:24 pm
content: https://support.snapmagic.com/en/?q=licensehttps://www.snapeda.com/questions/question/clarification-on-licensing/

author: Uky
author_rank: Regular Contributor
timestamp: March 31, 2024, 03:47:09 pm
content: Recognizing the efforts made by the operators who makes symbols and footprints available, I have to comment on this subject.Now the grunt...I have tried from time to time to use free symbols and footprint providers but in the end reverted back to make my own. There are several reasons for this:1. Footprint naming conventions differs between the sites.2. Padstack naming conventions differs between the sites.3. Many pad stacks follows a US standard where the copper and solder mask dimensions are the same. The board manufacturer in the US then adds the appropriate "swell" to the mask. In Europe, it is customary to define this already when creating the pad stack. Some CAD-systems can do this on the user level when creating the Gerbers. Some cannot.4. In far to many cases, there are unneeded details created in the footprints.5. Silkscreen widths are way to fat or created above pads. Sure, there are utilities that will remove lines that crosses pads but I prefer doing it right the first time.6. Silkscreens are created when not needed for eg. microminiature footprints.7. Vital details have been found to be missing, like perimeter information in an assembly/documentation layer for connectors that should be allowed to overhang board edges or polarization key graphics created in such a way that it is underneath the footprint when placed on the board above other components.8. Footprint court-yard ("DFM" shapes) has been found to be wrong. Either too large or to small.A ready-made footprint can be a time saver but once the local lib starts to get cluttered with padstack names or footprint names that all follow different standards the situation gets out of control.As for Schematic symbols, they are often created with the connecting pins in a disorganized manner, eg. not having inputs to the left and outputs to the right, or not grouping supply and GND pins together.I prefer doing it right the first time.
LTspice problem for stability - Page 1
Forum section: electronics / general

author: andrewsh
author_rank: Newbie
timestamp: March 24, 2024, 02:47:30 pm
content: Hi! Can I know how to find my pole capacitor and zero resistor(C3, C4 and R4.) by AC open-loop. The stability : AC open-loop Bode plot has at least 45 degrees of phase margin at both 1% and 100% of the assigned Maximum Load Current.I don't know how to get C3, C4 and R4.Records of using the LTspice AC analysis to design the values of pole capacitors (CP3 andCP4) and the value of zero resistor (R4) such that the AC open-loop Bode plots has at least45 degrees of phase margin at both 1% and 100% of the assigned Maximum Load Curren.
Trace "smoothing" tool - Page 1
Forum section: electronics / general

author: katzohki
author_rank: Frequent Contributor
timestamp: March 14, 2024, 11:19:56 pm
content: Years ago (2011ish?) I came across a tool that would take a gerber file set (or possibly Altium?) and it would take all your traces and change them from 45 degree routed stuff into very organic rounded routes. Now, I wouldn't argue for this being necessary, but it did make some NEAT looking boards.Any idea what that might have been? Is it still around? Might be a long shot.

author: langwadt
author_rank: Super Contributor
timestamp: March 14, 2024, 11:27:03 pm
content: there's a plugin for kicad,https://github.com/mitxela/kicad-round-tracks

author: ataradov
author_rank: Super Contributor
timestamp: March 15, 2024, 12:07:53 am
content: There is also TopoR router that can take source files in multiple formats and re-routes the board using freestyle curved lines. The boards look cool, but I don't see a point of a paid product for that.

author: katzohki
author_rank: Frequent Contributor
timestamp: March 15, 2024, 01:04:06 am
content: Quote from: ataradov on March 15, 2024, 12:07:53 amYou found it! That was the one for sure. Yeah, not much need for it, but haha it does make cool looking stuff. I believe there is a light and a trial versions!Thanks!
LTspice24 - user libraries and Search Paths in the Settings - Page 1
Forum section: electronics / general

author: iMo
author_rank: Super Contributor
timestamp: March 10, 2024, 11:19:07 am
content: Hi, could somebody kindly advise me how to use the "user libraries"?Especially how to set the paths in the Settings->Search Paths.I did my best but not found the trick.I have libs with transistors and diodes (standard.bjt and standard.dio) from the XVII, want to use them in 24.I tried to set all possible paths in the Settings->Search Paths to the old libs, but still I get the stock 24 offer when picking up a transistor.So far I've simply overwritten the stock ones, and I can pickup my BC337-40 now (for example), but that is not the solution, sure.Win10 here.PS:I've renamed them to "user.dio" and "user.bjt" with no luck.Sooo, it seems the .dio .bjt etc. files have to be indeed named user.dio user.bjt etc.ANDthe "User libraries directory" has to be set into your library "..\lib\cmp" containing them (for example)C:\Users\JohnSmith\Documents\LTspice\lib\cmpANDthe files in original folderC:\Users\JohnSmith\AppData\Local\LTspice\lib\cmphave to be deleted, otherwise I get the stock offer again..
I want everyone to help me refer to the PCB multilayer board equipment list - Page 1
Forum section: electronics / general

author: Nigen
author_rank: Newbie
timestamp: March 05, 2024, 03:10:23 am
content: One of my clients wants me to provide a PCB equipment list.I asked my engineer to help me sort out a production list for PCB multilayer boards.I'm concerned if there are any omissions in this list.I need everyone's help.

author: VK3DRB
author_rank: Super Contributor
timestamp: March 08, 2024, 08:18:27 am
content: Have you ever heard of the word "please" ?!You don't need everyone's help because you will get 10,000 messages. You have not elaborated on what you want. PCB production? PCBA production? Test equipment? Fabrication equipment? Your request is vague.I suggest you contact you local equipment provider and show them your list and go from there.Ah, I just read the bottom line of your post. You are a pest, and this should be locked.
Micro Cap Help needed - Page 1
Forum section: electronics / general

author: paffii
author_rank: Newbie
timestamp: February 12, 2024, 07:03:31 pm
content: Hello,this post can be closed. I did mistakes in shorting some wires in components, error found :-)Hello,i am a beginner in spice and only a little hobbyist in electronic. I want to simulate a schematic from a book. In real it works fine but in Micro cap the output is not real.It is a booster from 12 to 200V and maybe here is someone who is working with Micro cap to view my schematic? This would be nice..in the attachement my filesGreetsAndreas

author: paffii
author_rank: Newbie
timestamp: February 12, 2024, 08:02:05 pm
content: sorry, i forgot the schematic..

author: thm_w
author_rank: Super Contributor
timestamp: February 12, 2024, 10:07:28 pm
content: Its working as you uploaded, just the voltage is not that high? Is that what you are worried about?Where did the schematic come from, any reason you didn't use this configuration:https://theorycircuit.com/boost-converter-circuit-555/

author: paffii
author_rank: Newbie
timestamp: February 12, 2024, 10:21:10 pm
content: oh, i made a big fault, sorry. I saw that the Diode D1 is wrong (shortened). I have to change this error at once..

author: paffii
author_rank: Newbie
timestamp: February 12, 2024, 11:12:21 pm
content: i removed the error, but still there is no output voltage..

author: kashinath
author_rank: Newbie
timestamp: March 06, 2024, 07:51:47 am
content: You have Drain and Source of mosfet shorted. Check the corrected circuit. How do you know that the output will be 200 V ? it is approx 110V.

author: paffii
author_rank: Newbie
timestamp: March 06, 2024, 09:35:46 am
content: oh, thank you very much :-) The error was in the schematic "under" the mosfet. I saw it now as i magnified.Now the output voltage is super, about 170Volt
Micro-Cap 12 import model problem - Page 1
Forum section: electronics / general

author: yabba235
author_rank: Contributor
timestamp: February 26, 2024, 04:18:42 pm
content: Hi!I can't propelly import model PA443 hv op amp into MC12.When start simulate I got message:Error: Illegal use of reserved variable or symbol, 'DT'.Text: .MODEL DT DFile: C:\MC12\data\circuit2.cir.Subckt: X2 calls PA443Any help ?

author: kashinath
author_rank: Newbie
timestamp: March 06, 2024, 07:33:17 am
content: It is because DT is a Micro-cap reserved symbol. In .lib file change all instances of "DT" to something like "DTTT" before import.The modified lib file is attached.
LTspice syntax problem - Page 1
Forum section: electronics / general

author: Faringdon
author_rank: Super Contributor
timestamp: February 24, 2024, 07:29:19 pm
content: Hi,How do i make the time of a "Pulse" source equal to the voltage of a node in LTspice?The attached LTspice wont work. Do you know how to solve?

author: SiliconWizard
author_rank: Super Contributor
timestamp: February 25, 2024, 09:42:51 pm
content: As we already explained in an earlier thread, you can't have *parameters* in a simulation that are time-dependent, even less so depending on a node voltage or on a current. Parameters can only be constants for the whole simulation; the simulator can step parameters over some range though - in this case, it will just launch as many simulations as there are steps, every time with a new constant value for said parameters. Not at all what you want here.Also as we explained earlier, you can use an arbitrary voltage source for this. A sin function combined with some thresholding function could get you a voltage-dependent pulse width generator.Alternatively, you can look at one of the "modulate" models in the "Special Functions".

author: Ian.M
author_rank: Super Contributor
timestamp: February 25, 2024, 10:17:01 pm
content: Yep. It washttps://www.eevblog.com/forum/eda/ltspice-if-statement-syntax/three weeks ago . . .I wonder if our O.P. also struggles with object permanence?

author: Zero999
author_rank: Super Contributor
timestamp: February 25, 2024, 10:54:11 pm
content: Oh well, last time I did this with a comparator. Now lets try a behavioural voltage source.

author: Zero999
author_rank: Super Contributor
timestamp: February 25, 2024, 11:13:19 pm
content: Drat. That's already been done before. I should have read the other thread properly.Oh well, for fun, here's another way.

author: Ian.M
author_rank: Super Contributor
timestamp: February 26, 2024, 01:34:47 am
content: LTC (now AD) have a chip for that. TheLTC6992-1 TimerBlox VCPWMdoes the core of what our O.P. wants, both in LTspice and real life!Input and output voltage scaling is left as an exercise for the user . . .

author: Zero999
author_rank: Super Contributor
timestamp: February 29, 2024, 10:05:34 pm
content: The original poster appears to have forgotten about this thread.I just thought I'd post this, simply because I couldn't think of anywhere else to post it. I wanted to see how well the voltage controlled switch could simulate an open collector comparator.
Flicker noise voltage source (LT-SPICE) - Page 1
Forum section: electronics / general

author: Guille
author_rank: Regular Contributor
timestamp: February 25, 2024, 06:36:00 pm
content: SOLVEDHi everyone,I need to simulate a sensor noise floor for which I have the curve, to do this I wanted to create a couple of noise sources that would give me flicker noise and white noise, Section 4-5 in this book:https://pearl-hifi.com/06_Lit_Archive/14_Books_Tech_Papers/Motchenbacher_Connelly/Low-noise_Electronic_Design.pdfsuggested biasing a diode with a DC current source to generate some 1/f current noise, then measuring this current noise with a dummy 0V voltage source (with a 1GF cap decoupling I_DC) and finally using the dummy VS to drive a current dependent voltage source to turn it into voltage. From there it would only be a matter of fitting the Diode variables KF and AF to get the expected level.However when I perform the .noise analysis all I'm getting is a constant noise spectra fixed at 3.12pV/Hz½, no presence of flicker noise no matter how much I play with the parameters...FlickerVoltageNoise_Motchenbacher.asc(0.82 kB - downloaded 1029 times.)I've been at this all day and I cannot get it to work, I tried with a noiseless series resistance to the diode but that gave me a constant 0pV/Hz½. how can I get this to work? Is there some workaround to get a flicker noise voltage in LT-SPICE?You can find the simulation file "FlickerVoltageNoise_Motchenbacher.asc" in up this post.Many thanks in advanced.--Guille

author: Guille
author_rank: Regular Contributor
timestamp: February 27, 2024, 04:18:48 pm
content: SOLUTION:I needed to change the model directive from change.MODEL D1 D (KF = 6.408E-17, AF = 1)to.MODEL D D (KF = 6.408E-17, AF = 1)It's working now however if you are in my same position and want tunable noise sources I found the following Github with a couple of models you can use:https://github.com/yildi1337/LTspiceNoiseSources
PCB paristic capacitance - Page 1
Forum section: electronics / general

author: john23
author_rank: Frequent Contributor
timestamp: February 26, 2024, 02:09:03 pm
content: Hello, given the pcb shown below, how do i know from the route from 1 to 2 what parasitic capacitance i will get into the input of the opamp located at point 2?Thanks.

author: iMo
author_rank: Super Contributor
timestamp: February 26, 2024, 02:21:30 pm
content: You may a) calculate that (you have got all the data needed), or, b) your PCB design tool tells you that.a) is a quite difficult exercise, b) would cost you an arm and a leg..

author: metebalci
author_rank: Frequent Contributor
timestamp: February 26, 2024, 03:00:47 pm
content: Quote from: iMo on February 26, 2024, 02:21:30 pmWhat is the solution for (b) ? an EM solver or something else

author: metebalci
author_rank: Frequent Contributor
timestamp: February 26, 2024, 05:09:57 pm
content: Quote from: john23 on February 26, 2024, 02:09:03 pmDoes the PCB have two layers ?

author: john23
author_rank: Frequent Contributor
timestamp: February 26, 2024, 06:53:06 pm
content: yes two layers.

author: Andree Henkel
author_rank: Regular Contributor
timestamp: February 27, 2024, 08:52:31 am
content: given you would know the answer, what would you use it for?