External 16-bit ADC for STM32F7 - Page 1
Forum section: electronics / general

author: Mino
author_rank: Newbie
timestamp: October 20, 2017, 11:51:47 am
content: Hello,I'm looking for suitable external ADC for my project. It can be single multichannel IC multiple ICs. Basically, I need at at least 8 channels with 16-bit resolution and 1Msps rate (or higher).I want to use a STM32F7 microcontroller to read the ADC output and store data to SDRAM. Data would be then saved to SD card.I'm not sure if it's possible to achieve such throughput without using additional FPGA.I found this ADC:http://www.linear.com/product/LTC2320-16. It has 8 simultaneously sampled channels at 1.5Msps. The problem is that it outputs data on 8 serial lines @ 100MHz. That's probably not possible to read out using STM32. (Maybe somehow using FMC ?)Another approach I was thinking of, is to use all 6 SPIs on STM32F7 with six dual channel ADCs. Then use 6 DMA channels to store data in SDRAM. However, I didn't find any such ADC.Thank you for any ideas

author: Marco
author_rank: Super Contributor
timestamp: October 20, 2017, 05:55:40 pm
content: A beaglebone black or pocketbeagle could interface with that Linear ADC.AD7902 and AD7903 are dual channel ADCs which can use one SPI channel.

author: suicidaleggroll
author_rank: Super Contributor
timestamp: October 20, 2017, 10:39:30 pm
content: Quote from: Mino on October 20, 2017, 11:51:47 amYou're asking for an MCU to handle 16 MB/s of throughput, that's a tall order. You don't need to dump this to an SD card in real time do you, because I don't think that's going to happen. If you just plan to burst the ADCs into SDRAM and then trickle the data into the SD card, I'd seriously consider adding a small FPGA to handle the ADCs and SDRAM, then the MCU can pull data out of it at its leisure.

author: technix
author_rank: Super Contributor
timestamp: October 21, 2017, 07:28:38 pm
content: 16MB/s or 128Mbps will overwhelm most microcontrollers - even some SoC's I/O blocks. You may want to use a FPGA for this.Or if you don't mind the complexity, you can try using one of those Zynq or Cyclone V SoC's. That is effectively a FPGA and a BeagleBone Black's SoC baked into one chip. Depend on the interface speed you need you can run the FPGA part and its RAM as a ring buffer and pull samples from the buffer at the ARM's leisure, or build the FPGA part as an ADC to AXI or AHB bridge and dump the data onto the SoC's internal system bus directly.

author: dgtl
author_rank: Regular Contributor
timestamp: October 21, 2017, 10:11:43 pm
content: The 16MB is doable on 32-bitters, but the cpu won't have much time to do anything with the data. I've pushed from eMMC to USB over 200mbit/s on STM32F205 (eMMC->DMA->internal SRAM->DMA->USB HS). The important part is that the bus matrix is 32-bit, for each 32-bit port you can move 4 bytes on 1 clock. You definitely want to use DMA everywhere. Most of STM32-s have internal SRAM split into 2 regions, that both have full bandwidth on bus matrix. On can be used for data-lifting, the other runs the CPU. When using external SDRAM, it may be major bottleneck as SDRAM row select wastes a lot of time, you may overrun without another cache/SRAM buffer inbetween when doing full duplex communications (ie triple buffering simultaneous having write and read).For ADC connections, check the datasheets for suggestions connecting multiple ADCs. Also, multiple devices can share one SPI on different CS lines (considering that the maximal SPI frequency on the devices and the MCU does not get violated and that this configuration can be somehow handled with DMA).Also, SD card timing is very undocumented. For some cards, they are busy at apparently random times for very long periods (probably doing some maintenance internally). You must have enough RAM to buffer the data to overcome these stalls.

author: Mino
author_rank: Newbie
timestamp: October 22, 2017, 06:26:40 pm
content: Thanks for your suggestions!Quote from: suicidaleggroll on October 20, 2017, 10:39:30 pmYes, I only need to burst ADCs for few seconds when triggered and then save data to SD card.Quote from: dgtl on October 21, 2017, 10:11:43 pmFor this approach I would need ADC with parallel output and suitable interface on STM32 side, right ?Quote from: dgtl on October 21, 2017, 10:11:43 pmThese ADCs I've found have usually multiple SPI compatible serial outputs, but require SCK speed around 100 MHz. With STM32 being able to do SPI at max ~50 MHz, I can't even use single device (or single channel).It seems like I can't avoid using FPGA as a buffer.

author: technix
author_rank: Super Contributor
timestamp: October 22, 2017, 07:07:45 pm
content: Quote from: Mino on October 22, 2017, 06:26:40 pmIf you are using FPGA, once again maybe just jump straight to Zynq or Cyclone V SoC. This way you won't have to design the interconnect between FPGA and the main processor, or waste FPGA space and maybe money to a soft core. With those chips you get an FPGA and an ARM Cortex-A hard IP core baked into the chip and the interconnect already taken care of. The Cortex-A core also runs Linux (even Android) so a lot of low level stuff is already done for you. You just need to cook up a Linux kernel module that interfaces with the FPGA side of things, and write the user mode application that writes the data to the SD card, dumps it onto the network or show it on the attached display.

author: Mino
author_rank: Newbie
timestamp: October 23, 2017, 12:00:30 am
content: Quote from: technix on October 22, 2017, 07:07:45 pmThanks for input. I probably should have mentioned this is for a school project and resources are limited. Also I need to pick components that I will be able to hand solder, so no BGAs. Building it around one of those SoC would be nice and compact, but not feasible for me right now. I only have some experience with FPGA from Xilinx and their design tools. There are few Spartan 6 in TQFP package for reasonable price, so I will look into that next.

author: technix
author_rank: Super Contributor
timestamp: October 23, 2017, 06:32:13 am
content: Quote from: Mino on October 23, 2017, 12:00:30 amThere are ready-made modules, not unlike Raspberry Pi, based on Zynq. You can use one of those and built on top of that with that ADC.

author: ogden
author_rank: Super Contributor
timestamp: October 23, 2017, 07:07:41 pm
content: Quote from: Mino on October 22, 2017, 06:26:40 pmEach second means 16 Megabytes of ADC data which shall be stored somewhereI would build special bus translator interface between four (2-channel SPI) ADCs and SD card using small CPLD to write data directly into (4-lane SDIO) SD card w/o passing it through uC at all. Indeed this is just wild idea which needs to be investigated.Quote from: Mino on October 23, 2017, 12:00:30 amWhat's your device function?

author: technix
author_rank: Super Contributor
timestamp: October 23, 2017, 07:29:46 pm
content: Maybe you can start with this:http://www.myirtech.com/list.asp?id=502You can build your ADC as a module that plugs into this, program the FPGA to function as a bridge between the super fast ADC and the ARM core AXI bus, and write the Linux program that pulls data out of the ADC and dumps it somewhere, be it Ethernet, SD card or monitor.

author: ebclr
author_rank: Super Contributor
timestamp: October 23, 2017, 07:49:04 pm
content: Maybe will be easier to buy this thing, and eventually modify it, But is less bit'shttps://www.ebay.com/itm/Hantek1008B-8CH-PC-USB-Oscilloscope-DAQ-8CH-Programmable-Generator-2-4MSa-s-/282176137064?epid=2256039927&hash=item41b3022768:g:Jg8AAOSwV0RXuTEA

author: khach
author_rank: Contributor
timestamp: October 23, 2017, 08:15:45 pm
content: Try to put all SD1-SD8 serial data output of LTC2320-16 to DCMI bus of STM32F7. Syncronize DCMI capture by CLKOUT ( connect to PIXCLX). Set DCMI to JPEG mode ( without HSYNC VSYNC synchronization). After buffer capture by DMA your need extract bit streems for all channels.

author: daqq
author_rank: Super Contributor
timestamp: October 24, 2017, 05:58:37 am
content: Well, if you want to avoid using an FPGA as a buffer, there are other ways to do a buffer - several smaller STM32s (or controller of your choice) should be able to act as a buffer, connect one or two output lines of the ADC per "buffer", CLKOUT as parallel, using SPI Slave mode with DMA, some creative synchronization, connect them to the main processor as you see fit. Not an elegant solution, but it should work. Given how cheap these devices are, you could beat an FPGA.Edit: Or a dedicated FIFO - there are such devices.That said, at a few seconds record length, you will have a memory problem pretty soon. Or you can use the buffers to convert the signal to a faster interface that you can handle. khach's suggestions sounds great, if you could not use that directly, you could make an interface converter rather than a buffer.

author: xaxaxa
author_rank: Regular Contributor
timestamp: October 24, 2017, 07:07:45 am
content: At those specs you are looking at many tens of MB of ram, which no fpga or microcontroller will have internally; the largest fpga with a reasonable price has <1MB of sram.The cheapest way to do this is probably with a fpga board with sdram (about $50 on aliexpress; search "xc6slx9 sdram"); connecting an sd card to the board is very easy; just connect the data pins to gpios.There are open source sdram controllers on the internet. Putting it all together is a 2-day job if you are experienced with HDL and fpga development, or could be a 3 month project if you are learning fpga development from scratch.If you can afford the $100 for a SoC fpga board like the de0-nano-soc or z-turn, i'd highly recommend this route because you get to learn software/hardware interfacing, the AXI interface, and linux driver development; one of the most fun projects I did was in first year university where I implemented a video output device that read from a framebuffer in main memory and outputted pixels to the VGA DAC, and then wrote a framebuffer driver for linux and ran X window + a full desktop environment on it

author: Mino
author_rank: Newbie
timestamp: October 24, 2017, 01:51:38 pm
content: Quote from: khach on October 23, 2017, 08:15:45 pmThat might work, but acording toAN5020- table 2, maximum pixel clock frequency for STM32F7 devices is 54MHz. CLKOUT on LTC2320-16 is 100MHz to get full sample rate.Quote from: xaxaxa on October 24, 2017, 07:07:45 amI already ordered Mimas V2 board from Numato. It has Spartan 6 (XC6SLX9 ), 512Mbit of SDRAM, microSD slot and some other stuff (and it's only 37 USD with academic discount).Quote from: daqq on October 24, 2017, 05:58:37 amThere still would be problem with maximum SPI frequency which is AFAIK ~54 MHz for STM devices.

author: JoeN
author_rank: Frequent Contributor
timestamp: October 25, 2017, 08:46:51 am
content: Quote from: Mino on October 23, 2017, 12:00:30 amDid your instructor really give you a project with these requirements or was this your idea? If your instructor gave it to you, he's sadistic. If he suggested this should be done with a microcontroller, that's hard to believe. Have you run this by your instructor for comments yet on his or her thoughts about the feasibility of your idea and if you are possibly exceeding what is required for your project?