Help with debugging thernet PHY on Zynq  - Page 1
Forum section: electronics / projects

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 06, 2024, 05:13:38 pm
content: Hi all,I recently built a piece of electronics on the Zynq xc7020 SoC where I based the ethernet implementation on the Digilent Cora Z7 design using the RTL8211E. My schematic is attached.Cora Z7 Schematic:https://s3-us-west-2.amazonaws.com/digilent/resources/programmable-logic/cora-z7/Cora+Z7_sch-public.pdfCora Z7 Reference Manual:https://digilent.com/reference/programmable-logic/cora-z7/reference-manualRTL8211E datasheet is attached.Now I have verified most of the electronics is working in the design however I'm having issues with the ethernet PHY. My issues are:When using petalinux I get the following output at boot when plugged into a gigabit switch.Code:Configuring network interfaces... macb e000c000.ethernet eth0: PHY [e000c000.ethernet-ffffffff:00] driver [RTL8211E Gigabit Ethernet] (irq=POLL)macb e000c000.ethernet eth0: configuring for phy/rgmii-id link modeudhcpc: started, v1.35.0udhcpc: broadcasting discoverudhcpc: broadcasting discoverudhcpc: broadcasting discoverudhcpc: no lease, forking to backgrounddone.If I then use `ifconfig` I get the following output:Code:camera:~$ ifconfigeth0 Link encap:Ethernet HWaddr 22:51:93:89:DB:20UP BROADCAST MULTICAST MTU:1500 Metric:1RX packets:0 errors:0 dropped:0 overruns:0 frame:0TX packets:0 errors:0 dropped:0 overruns:0 carrier:0collisions:0 txqueuelen:1000RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)Interrupt:40 Base address:0xc000lo Link encap:Local Loopbackinet addr:127.0.0.1 Mask:255.0.0.0inet6 addr: ::1/128 Scope:HostUP LOOPBACK RUNNING MTU:65536 Metric:1RX packets:2 errors:0 dropped:0 overruns:0 frame:0TX packets:2 errors:0 dropped:0 overruns:0 carrier:0collisions:0 txqueuelen:1000RX bytes:140 (140.0 B) TX bytes:140 (140.0 B)The link is down and so I cannot get an IP.If I connect the system directly to the laptop and configure the IPs manually, I can get communication including running a small HTTP server and retrieving files using wget.Now loading `freertos_lwip_udp_perf_server/` which is my intended OS, I get the following error:Code:-----lwIP Socket Mode UDP Server Application------Start PHY autonegotiationWaiting for PHY to complete autonegotiation.Auto negotiation errorPhy setup errorPhy setup failure init_emacpsEthernet Link downI am aware there maybe a bug with the Xilinx LWIP implementation where the auto negotiation doesn't work. If I try setting the speed manually at any setting I get the following output:Code:-----lwIP Socket Mode UDP Server Application------Ethernet Link downSo I wrote my own application to simply read out all the PHY registers and nothing else. There's no LWIP, just the following code in main:Code:XEmacPs_Config *emac_config = XEmacPs_LookupConfig(XPAR_XEMACPS_0_BASEADDR);XEmacPs emac = {0};XEmacPs_CfgInitialize(&emac, emac_config, XPAR_XEMACPS_0_BASEADDR);xil_printf("\r\n\r\n");char bin_num = {0};for (uint32_t addr = 0; addr < 32; addr++){uint16_t data = 0;XEmacPs_PhyRead(&emac, 0x01, addr, &data);to_binary16(data, bin_num);xil_printf("PHY REGS: reg = 0x%02x, reg value = 0x%04x or %s\r\n", addr, data, bin_num);}Which has the following output when the system starts with a connection to a 10/100 switch:Code:PHY REGS: reg = 0x00, reg value = 0x1140 or 0001 0001 0100 0000PHY REGS: reg = 0x01, reg value = 0x7949 or 0111 1001 0100 1001PHY REGS: reg = 0x02, reg value = 0x001C or 0000 0000 0001 1100PHY REGS: reg = 0x03, reg value = 0xC915 or 1100 1001 0001 0101PHY REGS: reg = 0x04, reg value = 0x05E1 or 0000 0101 1110 0001PHY REGS: reg = 0x05, reg value = 0x45E1 or 0100 0101 1110 0001PHY REGS: reg = 0x06, reg value = 0x0007 or 0000 0000 0000 0111PHY REGS: reg = 0x07, reg value = 0x2001 or 0010 0000 0000 0001PHY REGS: reg = 0x08, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x09, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x0A, reg value = 0x8000 or 1000 0000 0000 0000PHY REGS: reg = 0x0B, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x0C, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x0D, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x0E, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x0F, reg value = 0x3000 or 0011 0000 0000 0000PHY REGS: reg = 0x10, reg value = 0x016E or 0000 0001 0110 1110PHY REGS: reg = 0x11, reg value = 0x4000 or 0100 0000 0000 0000PHY REGS: reg = 0x12, reg value = 0x9F01 or 1001 1111 0000 0001PHY REGS: reg = 0x13, reg value = 0xA040 or 1010 0000 0100 0000 // Auto-Negotiation Error, Auto-Negotiation not completedPHY REGS: reg = 0x14, reg value = 0x8040 or 1000 0000 0100 0000PHY REGS: reg = 0x15, reg value = 0x1006 or 0001 0000 0000 0110PHY REGS: reg = 0x16, reg value = 0x4100 or 0100 0001 0000 0000PHY REGS: reg = 0x17, reg value = 0x2100 or 0010 0001 0000 0000PHY REGS: reg = 0x18, reg value = 0x0000 or 0000 0000 0000 0000PHY REGS: reg = 0x19, reg value = 0x8C00 or 1000 1100 0000 0000PHY REGS: reg = 0x1A, reg value = 0x0040 or 0000 0000 0100 0000PHY REGS: reg = 0x1B, reg value = 0x805A or 1000 0000 0101 1010PHY REGS: reg = 0x1C, reg value = 0x0408 or 0000 0100 0000 1000PHY REGS: reg = 0x1D, reg value = 0x8038 or 1000 0000 0011 1000PHY REGS: reg = 0x1E, reg value = 0x0123 or 0000 0001 0010 0011PHY REGS: reg = 0x1F, reg value = 0x0000 or 0000 0000 0000 0000So we see there's an auto negotiation error which makes sense given the console output above. However I don't see any reason why at the moment, this is why I'm here.As far as I can see the HW is identical to the Cora Z7 implementation. I have used external magnetics, tho. I did then lookup the datasheet for the magjack they use and copied the schematic for it in my transformer selection. I think this area is the most likely place for an error. The reason I didn't use the magjack is because I didn't have the height clearance for a full RJ45 jack, so I used a mini DisplayPort connector instead. I have made an adapter for it to RJ45 and have checked this multiple times both by inspection and with a continuity test from jack to transformer outputs.I did select the 3.3V IO variant of the RTL8211E which is in theory incompatible with the Zynq MIO - it should be 2.5 or 1.8V however having some read some posts online it shouldn't really be a problem. Also, this auto negotiation issue seems to be with the PHY, not the MAC.I have verified the 50MHz input on the XI pin is present, the PHY is not in reset and all the supply lines are present without any issues while plugging cables into the RJ45, powering up etc.I don't have a lot of experience with low level ethernet and would love some pointers of what to check, where to look next. Any help would be greatly appreciated! Please ask for any information.Thanks!

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 08, 2024, 05:08:52 pm
content: Anyone have any ideas?

author: sd
author_rank: Unknown
timestamp: April 08, 2024, 09:05:17 pm
content: The magjack has the center taps connected with 10nF caps. It probably won't make a difference, but you could try changing C118 C119 C155 C280 from 100nF to 10nF.Edit: since the center taps are also connected together, having 400nF to ground might actually be an issue.