Circuit review: Fast DAC driver / pulse generator for 50 ohm loads - Page 1
Forum section: electronics / projects

author: Joakim
author_rank: Contributor
timestamp: May 17, 2022, 05:19:27 pm
content: Hi fellow electronics enthusiasts!I am a student working in an optics lab where much of my time is spent developing FPGA systems for data acquisition, experiment control and data processing. Now, I have been tasked with developing an interface board that is able to drive 50Ω loads with either pulses or a waveform, (sine/triangle etc) and all I can say is; analog electronics is difficult!This is my first time designing, in an organized manner, something that is a) high-speed and b) using multiple IC's, so I would really appreciate any advice both on component selection and circuit topology before I start laying out the board.I have simulated the circuit (apart from the LDO regulators and the analog switch, for which I was unable to find working SPICE models), and it indeed behaves as I would like, but I have a feeling that there are many traps that I surely must have fallen into.The problem (In order for me not to fall into the XY-trap):I would like to send narrow (~10 ns) pulses to an electro-optical modulator (EOM,https://www.thorlabs.com/newgrouppage9.cfm?objectgroup_id=3918) which is 50Ω terminated. In addition, I would also like to set the amplitude of said pulses, or drive a non-pulsed signal (does not need to be very fast) into the modulator.Using a benchtop function generator is easy enough, but I would like to control the signal send to the EOM using my FPGA (Zynq-7020). For my use case, I would like to drive voltages between 0 to ~6V, and naturally the FPGA's GPIO pins cannot source the current necessary for that.Let me illustrate two use cases I have in mind:UC1: I want to output a waveform to the modulator using the FPGA in the range 0-6.6VUC2: I want to output narrow pulses with a digitally-settable amplitude to the modulatorThe general idea:Use a DAC to set the amplitude (0-3.3V output) or drive waveform from the FPGA(Optionally, "chop" the DAC signal into pulses if I want to feed a pulsed signal)Amplify and buffer the 0-3.3V signal to the full range (0-6.6V)Schematic:(Schematics are attached below the post)Below are the design choices that I made when choosing the components and designing the blocks in the schematic, as well as some comments on the process."DAC":Here I have opted to use a simpler DAC, which I already am familiar with from the Digilent Pmod DA2, and I figured that, since the digital switch will do the high-speed switching, the DAC itself doesn't need to be fast. The DAC is powered using the 3V3 rail from the FPGA, and the FPGA ground is connected to the GND net on the board."Pulse generator ('Chopper')":Fastest SPDT switch I could find. When the PULSE pin is high, it will output the voltage at pin B1, and be grounded (output 0V) when the pin PULSE is low. My understanding is that it works almost like a mechanical switch, where the signal is directly fed through when the switch is closed. If this assumption is true, then I would be able to drive a waveform from the DAC straight through the chopper by leaving the PULSE pin high, but also generate pulses by outputting a voltage using the DAC and rapidly toggling the PULSE pin. The motivation for using an analog switch in lieu of something transistor based is that I was unable to design a transistor circuit to switch the signal adequately. :-)"Gain + 50 ohm driver":Fast op-amp that is capable of supplying high currents, but a drawback is that it is not rail-to-rail, hence the peculiar VCC/VEE using two LDO regulators. The voltage swing is around 1.2-1.3 volts from the supply rails. The absolute maximum supply voltage is 12.6 V. The feedback resistor is a trimpot in order to be able to adjust the gain, but at 50% setting it should give a gain of G=2. I've placed a 2pF capacitor to ground as suggested in the datasheet. It seems really difficult to find an amplifier that has both i) high bandwidth, ii) high input voltage range, iii) rail-to-rail, iv) can drive 50Ω. Capacitor choices on the power rails are heavily"+8V Supply" & "+2V Supply:Linear regulators because I want to limit noise that could be amplified by the op-amp. I am very unsure about generating the power rails for the op-amp this way. It just does seem like the right way to do this, but I need a negative supply voltage to the op-amp. 10uF capacitors to ground, but I am really unsure about the values here.Power supply:I intend to power the voltage regulators with a 12 volt wall plug.Connectors:12 pin straight header that plugs into a Pmod header on the board used to control the DAC and trigger the pulse. Barrel jack for the power supply. SMA connector to connect to the equipment using a standard 50 ohm coaxial cable.Component datasheets:Operation amplifier (AD8009):https://www.analog.com/media/en/technical-documentation/data-sheets/ad8009.pdfAnalog switch (PI5A3157):https://www.diodes.com/assets/Datasheets/PI5A3157.pdf8V regulator (BD80GA5WEFJ):https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/linear_regulator/bdxxga5wefj-e.pdf2V regulator (BU20TD3WG):https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/linear_regulator/buxxtd3wg-e.pdfQuestions:Is this a sensible approach to solving the general problem? I have a funny feeling that there might be better ways.Are the decoupling capacitors properly sized? C3 is an electrolytic capacitor in the datasheet, does this matter?Is there a better way of solving the power supply for the op-amp?Conclusion:I have waded through a bunch of different components like line drivers, MOSFET circuits, BJT circuits and also tried altering the order of the blocks, and finally landed in this design here. I don't really know how to proceed anymore, and I would appreciate any pointers in the right direction.Sincerely,A graduate student who is lost in the analog forest

author: Weston
author_rank: Regular Contributor
timestamp: May 17, 2022, 07:07:16 pm
content: In theory your method should work. Rise time is going to be limited by the DAC output current / resistance of the digital switch and the capacitance of the digital switch and amplifier. If you are just using the DAC at ~ DC you might want to add a capacitor to the output of the DAC (datasheet says 1nF should be ok) so it has a lower impedance at high frequencies.A current mode opamp is a good choice of a driver for applications like this. If you have the voltage to spare you might want to have the output in series with 50 ohms so the output impedance is 50 ohms. This will dampen any reflections due to mismatch with the load.Some peculiarities with the schematic though:The + and - inputs of the amplifier are shorted together.Opamps can become unstable and oscillate at gains less than one. You might want to add a resistor in series with the pot so the minimum gain is 1.You are shorting the +8 and +2 volt rail to each other and to ground. Are you trying to create a split supply? Neither the input voltage range nor the output voltage range of the opamp does goes to 0V, so if you want a true 0V output you will need some sort of level shifting. Effectively you are going to need to supply the VSS rail with a negative voltage relative to ground of the output connector. The negative voltage you need will be dependent on the common mode input voltage and output voltage range given in the datasheet.Easiest way to do this would be dual external power supplies. Can you do that? As this is a research project its probably the most time/cost efficient way to do it.

author: Joakim
author_rank: Contributor
timestamp: May 17, 2022, 08:25:20 pm
content: Thank you Weston for having a look - much appreciated!I will use the DAC for both setting the pulse amplitude and for driving a sine wave, and whenever I'm not outputting DC, the frequency is most likely going to be in the tens of kHz to maybe a 100-200 kHz. I'll add a cap. Thanks for the pointers on the internal capacitances/resistances. I have a hunch that my PCB layout will be the dominating source of parasitics, thus being the de-facto limiter of the rise time.I believe I would have to increase the gain of the op-amp by a factor of 2 to compensate for the added 50 ohm series resistor here, so that the maximum voltage out would be ~12V. Given the negative supply that seems to be needed, I do not have that range here unfortunately while still complying with the absolute maximum supply voltage. Also, I am not sure how much of bandwidth I would sacrifice by increasing the gain here.Regarding the power supply: I figured that I needed to have a negative voltage range in order to bring the output to 0V for an input of 0V, as the input to the amplifier can be between 0-3.3V regardless of whether I am generating pulses or just passing through the switch. Since the op-amp only goes to 1.3V above the negative rail, I thought I had to have a negative rail that is actually less than -1.3V. In the simulations I did something similar to what I drew in Altium, where I got it to work by connecting two voltage sources in series with a ground in the middle of them (I have attached a screenshot + the .asc file below). I am not very familiar with SPICE at all, but I suspect this could have something to do with me using ideal sources.My initial idea was to use two lab power supplies to generate the positive and negative rail, but I wanted a more compact/integrated solution as these kinds of boards tend to long outlive the students' stay at the institution and become lab standard equipment. However, if using benchtop power supplies would greatly simplify handling of the power rails then so be it. I am leaning toward doing that.Alternatively, would it be possible to amplify the input signal to close to the full range of the AD8009 and then add a negative bias to the output in order to compensate for the 1.3V offset? But again would I not run in to the problem of needing to find a high-speed, high-current rail-to-rail op-amp in order to do that? Or at least one with a higher output voltage.Oh dang, thanks for noticing the short between Vin+ and Vin-! Resistor will be added to the pot, thanks.Another question: The 10 uF between either of the power rails of the op-amp are electrolytic caps in the datasheet, but I picked ceramic ones. Would this make a difference in this application?Again, thank you very much for taking the time to help!

author: moffy
author_rank: Super Contributor
timestamp: May 17, 2022, 10:59:32 pm
content: Just a small note, it can be safer to place a fixed resistor in parallel with the pot, so that if the pot wiper should break, go open circuit, for any reason then the gain is limited to a maximum value by the resistor in parallel with the pot. Wipers on pots can break contact due to wear, environment, vibration, poor quality etc. so a simple precaution can help.

author: Weston
author_rank: Regular Contributor
timestamp: May 18, 2022, 02:31:22 am
content: If you want to have the DAC output a sine wave a capacitor might load it down too much. The datasheet for the DAC is a bit sparse on information about the DAC output. I would put an empty pad on the PCB for a cap at the very least.If you want to supply a single power supply input what you want is commonly called a "virtual ground", if you look online there are lots of schematics. Its a bit tricky as most voltage regulators can only source current and a virtual ground has to sink or source currents to maintain its output. At low powers you see a common way to create a virtual ground is to use an opamp output, but most opamps can not source high currents and can not drive large capacitive loads.Is your load actually 50 ohms or is it purely capacitive? If its purely capacitive you could level shift the DAC output and then level shift the output connector.Ceramic capacitors over electrolytic will be fine. Ceramic capacitors have lower ESR so will typically be better. One think I like to do on PCBs with an external power supply is to add an additional large electrolytic capacitor on the input. The smaller capacitors referenced in the datasheets are often not enough when dealing with cable inductance. Additionally, when the power adapter is plugged in there can be a voltage spike of up to 2x the supply voltage due to ringing with the cable inductance. The ESR of a larger electrolytic capacitor will dampen this resonance and prevent voltage spikes.

author: Berni
author_rank: Super Contributor
timestamp: May 18, 2022, 06:03:36 am
content: The idea sounds good but the implementation might have issues.The analog switch according to the datasheet can take between 3 to 13 ns to actually switch over once given the command. So it might be too slow for how fast you want to go. There is also a brief period where the switch disconnects the output while in the process of switching over (to avoid shorting the A and B pins). But the stray capacitance will probably hold the output steady during that short of a time.You also want to watch out with putting potentiometers in the feedback path of a high speed current feedback opamp. Parasitic capacitance in the feedback of those makes them very unstable. For stability and good high frequency performance you want the feedback path to be as short and compact as possible.

author: Joakim
author_rank: Contributor
timestamp: May 18, 2022, 08:19:02 pm
content: Quote from: moffy on May 17, 2022, 10:59:32 pmThank you, I will consider this too!Quote from: Weston on May 18, 2022, 02:31:22 amDue to part (un-)availability, I have had to replace the TI DAC with a MAX5705 instead and I have drawn the schematic according to the app notes. Not much should have changed, as I still power it from the 3V3-rail of the FPGA development board. The datasheet shows decoupling capacitors on each of the power rails/voltage references, but even though I use the same 3V3 rail for all, should I place the same capacitor bank ateachof the pins? My intuition says that it would be good to have them close to the pins and hence a cap for each pin must be better even though it's the same rail.After some careful consideration, I have opted to go with benchtop power supplies. I think that is the most pragmatic way of solving the issue, plus it allows me to debug the AC part of the circuit first to get a minimum-viable-product up and running as soon as possible so that I can start iterating designs.As to whether the load is capacitive or not I cannot really tell from the manufacturer's datasheet. The modulator itself is just a Z-cut crystal whose refractive index is changed by an applied voltage, so it "should not" draw any significant current, but I don't know if the manufacturer has included a 50 ohm termination. I cannot link the datasheet directly, but the "Specs" tab shows the RF characteristics of the device (https://www.thorlabs.com/newgrouppage9.cfm?objectgroup_id=3918), and there the manufacturer only states 24 dBm maximum RF input power. Here I am a bit unsure, since I don't know what resistance that is taken over.Thanks for the explanation of the electrolytic vs ceramic too.I have attached a revised schematic with the new ADC.Quote from: Berni on May 18, 2022, 06:03:36 amThanks for your advice! I have looked into faster switches, but I think for now this will suffice for a first version.Good point regarding using potentiometers to tune the gain. I have an alternative idea - to use a trimpot while debugging while leaving some pads unpopulated, and then setting the final gain using fixed 0603's and removing the pot. Would this be feasible, or would I introduce additional parasitics here from unpopulated pads to the extent that it wouldn't be worth doing this?Edit: The barrel jack and the schematic symbols for the power rails are incorrectly labeled. I forgot to update my schematic library.

author: PartialDischarge
author_rank: Super Contributor
timestamp: May 18, 2022, 08:49:20 pm
content: Remove c8, the ad8009 is fast enough and may create problems.Also I would be wary of the potentiometer, but just test this vs a 0603 resistor

author: Joakim
author_rank: Contributor
timestamp: May 18, 2022, 09:01:06 pm
content: Thanks for the review!I will remove that 2pF cap. I’ll just make sure I use the same package as the resistor so that can piggyback a cap, should I need it.

author: Joakim
author_rank: Contributor
timestamp: May 18, 2022, 10:30:42 pm
content: I have confirmed with the manufacturer of my modulator that the input impedance indeed is 50 ohms, so I believe that the next step now is to start laying out the board.

author: Terry Bites
author_rank: Super Contributor
timestamp: May 19, 2022, 09:30:49 am
content: I'd update thishttps://www.vk5tm.com/homebrew/dds/dds.php

author: Joakim
author_rank: Contributor
timestamp: May 24, 2022, 08:00:39 am
content: Hi again everyone!I have now laid out the PCB to the best of my ability. I am bit blind here, so I surely must have fallen into plenty of traps. I have tried to keep components close, and traces short. Since I will be hand soldering this, I have also given myself some clearance for the soldering iron. I poured the bottom layer solid and connected to ground, and after routing the top layer I poured a polygon connected to ground. My idea was to use vias whenever I needed to ground anything, and my thinking here was to have a solid connection to ground.For power traces, I have used 0.5mm, and for signal traces 0.3mm.Attached are screencaps from the EDA, showing the top layer, bottom layer and 3D views of the board.What I am unsure about is:Are the capacitors appropriately placed? I was trying to keep them close to the IC pins.Is the board adequately grounded?I have a hunch that the feedback net is a bit long here. Would you consider it to be the case?Altium is complaining about silk screen clearance in the DRC, but I cannot find any design rule on the board house's website (Aisler). What would be a typical value here?I'm very excited to send this for manufacturing, but I realize that with today's IC shortage I need to source the parts first to be certain that I can actually assemble it./JEdit: Attached revised schematicEdit 2: I realize I forgot mounting holes. My plan is to use M3 spacers as standoffs to offload the PCB header.

author: Joakim
author_rank: Contributor
timestamp: June 13, 2022, 05:11:04 pm
content: Finally the components and the PCB has arrived and I have started assembling them. Of course, Murphy's law applied here too, and I had forgotten a via that i moved last-minute to make space for test pads. Ah well, yet another thing to fix in rev 2 of the board.I messed up ~CS too as I forgot it was SPI, but cutting the trace and soldering bodge wires both for the aforementioned GND-via for the digital switch, and for ~CS and ~LOAD of the DAC makes the DAC+switch work in isolation.First, I am driving the board with an Arduino to test it, and it is powered from the 5V rail (the end use case is for 3V3-boards, but since all components support VCC of 5V, this was the simplest way to test it). The first attached scope capture shows a ramp from the DAC in coarse steps, demonstrating that it indeed works.Now I have run in to an issue with the op-amp oscillating (I believe this is the case). For low (s.t. the output is not saturated) input voltages, the amplifier is extremely noisy and oscillates at around 70 MHz (see FFT). This happens regardless of whether I toggle the switch or not, and if the switch is grounded so that the input to the op amp is grounded, I still have noise. I have attached a capture where I alternate between toggling the output and zeroing it.The solder blobs below C4 and between U2 and U3 are test pads which where I have soldered enamel wire to be able to probe the output of the DAC and the switch, respectively.QuestionsI really don't have a clue what could be the issue here. I have tried to populate/unpopulate both C4 and C8, without any luck.Do you believe it is as simple as poor board design? I suspect that might be part of the issue.In all oscilloscope captures, CH1 is the output of the digital switch, and CH2 is the output of the amplifier, currently unterminated (i.e. no 50 ohm in parallel).

author: Weston
author_rank: Regular Contributor
timestamp: June 13, 2022, 07:03:59 pm
content: Don't despair too much, hardware bringup is a crucial part of the design process!Beyond checking if all your footprints are correct I suspect your issue is related to the amplifier. Can you first disconnect the DAC and feed a fixed signal into the amplifier with a bypassed resistive divider off the supply rails or something?First to check would be if your supply rails are clean and if the amplifier is somehow amplifying noise from the supply rails. Scope out VDD to GND and VSS to ground and see if there is any noise. It might help if you can saturate the amplifier so its output is not oscillating, as if it is oscillating independent from the supply rails it could couple noise into them.More likely an issue is your feedback network. It's a control theory problem, the loop gain is determined by the gain/phase of the amplifier and the feedback network. If the phase shift of the two is 180 degrees or greater when the gain is 1 the system will oscillate. At the unity gain the phase shift of the amplifier itself is typically a bit more than 90 degrees so added external phase shift can bring it close to oscillation.Two things can cause issues with this that you can check:A capacitive load on the output can add a phase shift to the amplifier and make it unstable. Are you testing with a coax cable connected but no load? A short coax cable at these frequencies is going to be a capacitor and might make the amplifier oscillate.The second issue could be with your feedback network. If you have excessive stray capacitance between the feedback node and ground that is going to add phase shift and could make the amplifier oscillate. This could be cause by poor layout on the feedback node causing excessive capacitance. Also, make sure not to connect any scope probes to the feedback pin.Your opamp is a current feedback amplifier, which is a bit different than a normal voltage feedback opamp, but if you increase the value of the feedback resistors while keeping the ratio the same the phase margin should increase and the amplifier may stop oscillating if this is the issue. Take a look at this app note:https://www.analog.com/en/design-notes/current-feedback-amplifier.html

author: Joakim
author_rank: Contributor
timestamp: June 13, 2022, 08:00:03 pm
content: Thank you very much Weston! You have given me a lot more ideas on what to try once I’m back in the lab tomorrow.I noticed some changes in the output signal of the amplifier’s output when I probed the output of the switch, which must have been caused by the probe’s capacitance.Another thing I saw was that the oscillations were present at the op amps input, which seemed odd, since they should be on the negative input, not the positive, but I will read through the app note thoroughly. After skimming through it, I’m starting to realize why the values of the feedback resistor divider are relatively low, like an order of magnitude lower than I’ve used for regular amps, and why I previously just couldn’t use the AD8009 as a drop-in replacement.Yeah the output was measured using regular coax, actually both with and without a 50-ohm termination on a T connector at the DUT end of the signal path. I was afraid drawing that much current when oscillating close to the upper rail could have killed the op-amp, so I made a judgement call here to proceed without a load while risking reflections.Definitely the next step is to try to isolate the amplifier and to get it working properly. Actually I soldered the DAC first and tested that plus the switch in isolation, and only after that worked I proceeded with the amplifier, which I thought would be the easiest part, hah. A Bode plot for that subcircuit would be the next thing to measure.The feedback net is what I was the most unsure about. For bread-/perfboard stuff it has kinda always worked for me by just winging it, in particular for slower stuff like buffering DACs using whatever “slow” voltage feedback amp I had in my drawer. Although I’m starting to realize it’s time to bring out my BP Lathi book here and do it properly.

author: Weston
author_rank: Regular Contributor
timestamp: June 13, 2022, 09:59:35 pm
content: A few more comments:Looking at your schematic the ground symbol for the feedback resistor is not actually connected. Did you correct that at some later point? It could cause issues.If you are seeing oscillations on the opamp input it could be the DAC oscillating. Another possibility is that for some opamps there is a path between the + and - inputs that is biased off during correct operation but can conduct when the + and - inputs are not close. An antiparallel diode pair is one example of this. If its oscillating its a possibility that its coupling back to the other input.Looking through the DAC datasheet there is a maximum capacitive load of 500pF. So more capacitance on the DAC output could cause it to oscillate. If you removed that capacitor the DAC itself should not oscillate. The nominal loading of the opamp should be pretty high, so also verify the DAC itself without the opamp connected?In regards to the output loading, another advantage of putting a 50 ohm resistor in between the opamp output / connection to the feedback network and the load is that it reduces the impact of output capacitance on stability. As previously mentioned, this cuts your output signal by half, but it may be needed to get the opamp to be stable with a capacitive load. You could also try a smaller output resistor and increasing the resistance of the feedback network. Both of those would increase phase margin with a capacitive load.

author: Joakim
author_rank: Contributor
timestamp: June 15, 2022, 12:16:36 pm
content: Having worked on the circuit now for two days I am happy to see that the amplifier itself seems to be working decently now. Great news!Quote from: Weston on June 13, 2022, 09:59:35 pmYou are correct about GND in the first version of the schematic. Unfortunately I attached the revised schematic as a pdf so it was not immediately obvious which one the PCB was based on. Probing the net confirms it was properly grounded.After confirming that the power rails all are stable and noise-free I desoldered the switch in order to isolate the input of the op-amp, and I soldered a 47 ohm resistor inline with the output of the op amp. Small pads in combination with a large ground plane made desoldering the SMA connector impossible without ripping the through-hole plating. No big deal really as I still have a few boards to spare, and I still need to have rev 2 manufactured. Anyway, the amplifier still did not work and after pulling my hair out I had to call it a day. What I did notice however was that the issue seemed to be with the input signal, as I was able to get somewhat decent output when I poked the input signal into my finger. The LT app note mentioned that any bandwidth limiting capacitors should be on the positive input, not in the feedback net, so I suspected that the capacitive coupling to my finger which made the circuit work implied that I needed a cap on the input.When returning to the lab today I realized that I hadn't terminated the input of the signal generator. I had simply connected the output of the signal generator to both the scope and the DUT with a T-coupler. Of course this worked for low frequencies, but when I increased the frequency of the stimulus signal I started seeing oscillation and the current draw increased beyond comfortable levels. It turned out that the output load also made a poor connection to the coax/T-coupler, so I had intermittent issues here. Now with new connectors and a 50 ohm load in the input signal path I am starting to get results.Unfortunately I am not able to reach the full output swing that I would like when halving the voltage with a ~50 ohm inline with the output of the op amp. The output of the op amp would have to swing swing between 0-12V +-Voffset, so eliminating that resistor would be ideal.So, with properly terminated in-/output I am starting to make progress. I'm feeding a 40ns/100ns pulse directly into the amplifier and I get the results in the attached captures. The rise time is ~15ns and the fall time ~25ns, which is decent enough for me at this point. However I am seeing some noise on top of the signal, plus something which I suspect is a reflection.In the tests above I am supplying only VCC, while VEE is turned off as the amplifier becomes very noisy when supplying +8/-2 volts. I cannot figure out why this is the case here, but if the circuit works with a single supply it is more than fine. At the moment I am not concerned about the exact gain as I am able to saturate the amplifier, as I could easily just calibrate the DAC appropriately. I can confirm that the output indeed is adjustable by adjusting the trimmer pot.What worries me now is how the output of the switch would operate when not terminated, just like yesterday's tests when the output of the function generator was not terminated.The next steps now are to confirm that the DAC still is working after having reworked the amplifier stage, re-connect the switch and test the board in its entirety. Judging by the LT app note, in a new version of the board I should swap the fixed resistor and the pot in the feedback network.Edit: Added photograph of the board in its current state. It's sticky with flux residue, mangled and not pretty - but I'm making progress

author: Marco
author_rank: Super Contributor
timestamp: June 16, 2022, 02:28:00 pm
content: On second thought the concept is fine, it's the choice of components which is the problem.The THS4271 can handle the necessary supply voltage (~16V from negative to positive) to handle source termination while still being able to supply 6.6V to the modulator, the AD8009 simply doesn't, taking into account the necessary margins around the rails voltages.There is a faster analogue switch, the SD5400CY. Though it's a little harder to work with, also unobtainium at the moment through normal channels, so would have to play ebay roulette.