FET between two grounds, could my circuit idea work? - Page 1
Forum section: electronics / projects

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 08, 2023, 12:40:14 pm
content: I have a circuit that does not work as I intended/expected. It's been over a year since I worked on it, but recently Farnell send me the FET I originally intended to use but became "out of stock" for a year, so I thought about picking it up again. I've been learning electronics on my own, and I remember I couldn't figure out what was wrong. Since I don't really have anyone I can ask for help, I'll try here... For now I would like to get some feedback whether my idea is even just correct/feasible.In the past, I've designed a led ring for my stereoscope with functionality that I wanted to have but couldn't find in commercial products (and I just wanted to do it). My previous version works, but if I forgot to switch it off, the lipo battery would slowly drain until it was discharged enough that the smps couldn't continue regulating. Not good for the battery (and simply bad design). So I started revision 2. Please note I do this mostly for learning. I could simplify things a lot by using a simple on/off switch but that feels like cheating.So I came up with this (only power section shown):On the left an USB plug with a LiPo charger circuit. The two connectors on top (BAT/BAT_HEADER) go to the battery. On the right is the power supply to get 3.3V. Both sections work as intended (used them in the past and on the previous version). The yellow lines going to the blue bus on the bottom got to the PIC ADC and two GPIO pins.My idea is the following: The FET separates the battery ground from Vss. So the battery doesn't drain. By pressing the startup button, the battery ground is shorted to Vss, allowing the circuit to start up. The PIC24 can then start up and control the FET to tie the two grounds together. The circuit runs as though it is directly connected to the battery. After a while (timeout) or when the user presses the shutdown button or if the battery becomes too drained, the FET is released and the grounds are separated again. No more discharging.As far as I recall, I populated the power section and the thing worked as I hoped it would. As soon as I populated the PIC (IIRC) the circuit wouldn't start up anymore. So, before I dive in again, could someone tell me if my reasoning above is correct (although I do realize there are certainly better ways to do it). Any thoughts?

author: wasedadoc
author_rank: Super Contributor
timestamp: February 08, 2023, 12:49:43 pm
content: 1. Do you mean that it will not start even when you press and hold the button which shorts the FET? Or do you mean that it does start and runs while the button is pressed but stop when you release it?2. You should not use the ground symbol and GND label on two or more points which are not permanently connected to each other. (But that is not the cause of your startup problem.)

author: inse
author_rank: Super Contributor
timestamp: February 08, 2023, 12:55:19 pm
content: The pull-down resistor R6 should be connected to Batt ground, not the secondary ground.Did you check whether the MOSFET is completely off before you press the startup button?If not, the PIC might have not properly been reset due to brown-out condition.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 08, 2023, 01:06:16 pm
content: Thanks.Right, I'll replace the GND symbol on the battery ground part, I see this was not a good idea. I did add "Batt" to the GND symbol to imply it was the (separate) battery ground, but that is not a very nice solution.Since both are on different nets in my EDA, I never really thought much about it.I'll try to take some scope traces tonight and post back on startup behaviour. It's been a very long time since I worked on the circuit and I don't have my notes from back then here at the moment. For now, I was mostly wondering whether my ideacouldeven work. I came up with the circuit without much previous background or experience, so I wouldn't be surprised if the basic idea isn't even feasible.I find the idea of having the source as well the drain on a "ground" level rather confusing and I'm far from the point where understanding the behavior comes intuitively to me.

author: inse
author_rank: Super Contributor
timestamp: February 10, 2023, 06:29:24 am
content: To me it was clear that Batt GND and GND are separate nets, symbols are reused all the time in a schematic, it’s the label that matters.

author: pcprogrammer
author_rank: Super Contributor
timestamp: February 10, 2023, 07:08:53 am
content: Why make things so complicated when there is an enable input on the used step down converter.(TPS62203)With a pull down to ground the FET's inside this device are turned off, doing the same as the separate FET in the design. Having the MCU control this signal allows for keeping it on as long as needed. It still needs the start button to initially pull the enable to high, and then the MCU can take over.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 11, 2023, 09:52:55 pm
content: Quote from: pcprogrammer on February 10, 2023, 07:08:53 amDefinitely true, no discussion as to whether that would be the simpler or more elegant solution. But somehow I came up with the idea of the FET between the two grounds as an alternative for a mechanical switch and wanted to try that when I did the schematic (more than a year ago).Now that I've got the boards and the parts, I would like to eithera) Get it to workorb) Understand why it didn't workGetting it to work isn't that important, as long as I understand why it doesn't. If I can get it to work and know why, that's a double win.Hope that makes sense, somehow.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 11, 2023, 10:14:12 pm
content: Quote from: inse on February 08, 2023, 12:55:19 pmFixed the pulldown to the GND batt, should have seen that myself.How can I measure whether the MOSFET is completely off? There's no voltage difference between both GND_batt and GND, but that is to be expected (if I'm correct).(spoiler alert: it works, even when I don't want it to work. The switcher starts up even when I think it shouldn't)Right now I get this *BEFORE* pushing the button, after connecting the battery:I can't understand what is going on. As far as I understand, I expect the FET should be open, prohibiting the LDO from operating, thus VCC should be at GND potential. Which it isn't.VCC is at 3.3V, so the switcher is operatingGND batt is pulsing about 700mV below GND at about 16kHz (that frequency should probably be a hint in the right direction, but I don't know where it comes from. The switcher operates at much higher frequencies according to the datasheet).The seems to be driven, but I think that might also be due to the voltage on the GND_bat changing. So I'm not sure if what I'm seeing at the gate is actually coming from the PIC.My current assumption (but I need to think about this) is that-somehow- the switcher manages to start up once and gets enough voltage on it's output tostart the PIC that tries to drive the gatebut trying to drive the gate draws more power than the switcher can deliverrestarting the cycle againBut that doesn't match with the seemingly stable VCC.If I recall correctly from over a year ago, if I remove the PIC, the switcher doesn't start up if the button isn't pressed. I'll cut the trace tomorrow and see if the PIC is somehow involved.

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 11, 2023, 11:11:55 pm
content: I've simplified and redrawn your schematic... You should see the problem now...

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 12, 2023, 12:17:24 am
content: pcprogrammer's idea of using the enable input on the step down converter is the best.But, if for some reason you wanted to switch a power source with a FET, here's a couple more ideas:

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 12, 2023, 01:21:45 pm
content: Quote from: Kim Christensen on February 11, 2023, 11:11:55 pmKim, thanks.At first I thought I understand from you drawing that this was the issue:The pullup in the PIC, combined with the 20k pulldown on the gate, provides a path from battery positive to GND_batt, allowing the switcher to start up, starting the PIC. Seemed obvious and I felt stupid I had not seen that.So I triedwith the 20k connected to GND (instead of GND_batt) and alsowithout the 20k (so removed the 20k).Both had similar results:So there is something else going on, not involving R6 (the 20k).Leaves the path through the PIC and R4. But as far as I know, very little current (ideally none I though) can flow from the gate to the source, so that's not a path either.I wonder whether my FET should be turned around (so source/drain the other way around)?So I'm afraid I still fail to understand what's going on. Although I did learn:It helps to redraw a simplified schematic to better see what's going on (or could be going on)Don't ignore paths trough the GPIO pins/internal pullup/pulldownsAt least I learned that form this, for which I sincerely thank you.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 12, 2023, 01:26:36 pm
content: Quote from: Kim Christensen on February 12, 2023, 12:17:24 amI will likely try one of the FET based solutions as I (clearly) have almost no experience using FETs and that bothers me. Toggling the enable pin is something that wouldn't teach me anything... Thank you for the suggestions.I seem to remember having a high-side switch with a p-channel required a gate voltage above the positive supply rail (hence often requiring drivers), but I need to look into it again. Clearly lots of things to learn...

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 12, 2023, 06:38:16 pm
content: See attached diagram for reference. (Any voltages I mention are referenced the the battery's negative terminal)QuoteWell, if you connect the 20K to "GND" then you are essentially connecting it between the FET's drain and gate terminals, turning the FET ON more.(I really don't like that circuit net being labeled GND because itwillconfuse you. It's not "ground": Assuming a 4V battery voltage, it's a floating node that will be at 4V when the FET is fully off and near 0V with the FET is fully ON)QuoteWith the 20K connected to GND_BAT, it's connected between the FET's source and gate terminals, helping to turning it OFF a little bit. By removing it, you're no longer sinking any of the current leaking through the PIC circuitry. (Represented by RL & Rb)ie: If you took a voltmeter and put it between the FET's gate and source terminals you would see voltage there when the circuit is supposed to be OFF. This will allow the FET to turn on a little bit which will be enough to fire up the boost circuit, boot the PIC which will make the control line to the FET high, thus turning the FET fully on.

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 12, 2023, 08:34:40 pm
content: Some answers to your other questions:Quote from: fozzyvis on February 12, 2023, 01:26:36 pmNo, "a gate voltage above the positive supply rail" would only be required if you used anN-FET to switch the positive supply rail.AP-FET will turn ON when it's gate voltage is morenegativethan it's source voltage. That's the advantage of using aP-FET to switch the positive rail.QuoteNo. If you swapped the source/drain the other way around, then the FET's internal diode (Between source & drain), would be forward biased. You can see this diode in the schematic symbol of your diagram.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 12, 2023, 08:35:55 pm
content: Quote from: Kim Christensen on February 12, 2023, 06:38:16 pmRight. Definitely makes sense.Quote from: Kim Christensen on February 12, 2023, 06:38:16 pmOk, that's a good way of looking at it. Is there a "conventional" or "correct way of calling it that would make sense to most people? Floating ground? Virtual ground? Something else?Quote from: Kim Christensen on February 12, 2023, 06:38:16 pmOk, so let me rephrase that to see if I understand correctly. (all again according to your drawing):When connecting the battery, without the 20k/R6:Altough the switcher has no return path to GND (as the FET is open), it produces some output voltageThe output goes trough Rb (the PIC)R4 (gate limiting resistor) is only 10R so has little effectThe gate voltage rises slightly above the source...Closing the FETThat sounds like it has some logic to it, although I don't really see how the switcher can "start" without having a complete path back to the battery negative terminal. Although... maybe it has and I don't see it. Or it doesn't really need one to make the output voltage rise a bit.Is that a correct understanding?

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 12, 2023, 08:39:45 pm
content: Quote from: Kim Christensen on February 12, 2023, 08:34:40 pmRight, sorry. I should have taken my notes before replying to that question. My apologies.Somehow, there's a lot of things I find intuitive (especially, -maybe strangely- RF related stuff), but transistor related things fail to "click" for me. Having a very bad memory and having to rely on notes all the time doesn't help.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 12, 2023, 08:45:03 pm
content: Actually, thinking of the net that I called "GND" as being something that is floating but can be connected to GNDbattmakes it much easier to think about it....If what I understand is correct, I first of all do realize that anything I can do to try to "fix" my circuit to work as intended will not be considered pretty or "good manners".But second, if I would want to make it work (if only for the exercise and to save this revision of PCB's I have already made), could this work then:I've copied the designators from your drawing to avoid confusion.The idea would then be that the switcher would not have enough energy to charge C1 through R4.Or is that an even worse idea than the uhm... let's call it "creative thing" that I came up with in the first place?

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 12, 2023, 09:38:11 pm
content: QuoteClose... Initially, the switcher isn't running. What's happening is that a little bit of current is leaking between the terminals marked Vin and "GND" on U1. (pins 1&2)QuoteYes, because the PIC's "GND" pin is connected to U1's "GND" (switcher IC pin2) which is connected to the FET's drain. So a little bit of current leaks from the FET's drain to it's gate, which produces a voltage on the gate.QuoteYes... By "Closing the FET" at this point we mean it's passing some current, but not fully on.QuoteThe switcher IC (U1) has a mode called "100% Duty Cycle Low-Dropout Operation" which basically means that if the voltage on it's input (Vin) is below 3.3V, it connects it's Vin terminal to it's Sw terminal. Effectively it stops regulating and connects the voltage on Vin directly to it's output. ie: If Vin = 2V then it's output is also near 2V...Because the FET is partly turned on, it's possible there is 1-2V across it's drain/source, which would leave 2-3V across the power input pins of the switcher IC (U1) which can then start up in "100% Duty Cycle Low-Dropout Operation" mode and feed power to the PIC. (Exact voltages are loose estimates). If the voltage across U1-1 (Vin) & U1-2 ("GND") exceeds 3.3V, then U1 will start switching.The FET is being biased in it's linear region until the PIC fully boots. Kind of likein this examplehalf way down the page called "E-MOSFET Bias Circuits" figure 10-53 (Rg is your leakage from PIC/U1)

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 12, 2023, 10:19:00 pm
content: Quote from: fozzyvis on February 12, 2023, 08:45:03 pmNo it won't work. The problem is that the PIC's negative supply rail is connected to NOT_REALLY_GND, which means that it's GPIO pin would have to go below (negative) NOT_REALLY_GND by a few volts which it can't.You could add a PNP transistor like shown below, and reprogram the PIC so that the logic is reversed. (GPIO low = ON, GPIO high = OFF) This should work since the PIC pins will go Hi-Z when the PIC goes into reset. Therefore the PNP transistor should also stay off when there's no power to the PIC and when the PIC voltage is low enough for it to be in reset.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 13, 2023, 10:07:37 am
content: Quote from: Kim Christensen on February 12, 2023, 09:38:11 pmOk, so the NOT_REALLY_GND net starts to rise/voltage slowly goes up. I don't really understand how it would leak current from its input to GND, but I'll gladly take your word for it.QuoteYou lost me there I'm afraid. So the voltage at the PIC's GND terminals starts to rise (see above). This then goes through the pulldown on the GPIO pin of the PIC and so towards the gate of the FET? If that is correct, I understand why the drain (tied to the rising "NOT_REALLY_GND") as well as the gate voltage starts to increase.QuoteThis is about the VCC rail again, and separate from the path/effect described above, right?Is there a net name that descibes "NOT_REALLY_GND" in a way that most electronic designers would understand what it is? I though maybe "virtual ground", or is that used for something else?

author: Kim Christensen
author_rank: Super Contributor
timestamp: February 13, 2023, 04:19:43 pm
content: Quote from: fozzyvis on February 13, 2023, 10:07:37 amAll ICs draw a bit of power. ie: current goes in the Vcc/Vdd pin and flows out the Vee/Vss/GND pin, so if the Vee/Vss/GND pin is open then you'll measure some voltage on it.QuoteThere are diodes on almost all PIC IO pins that go to both Vdd and Vss/gnd pins on the PIC. (See pic). In your circuit, the lower diode gets forward biased and passes the current from Vss/gnd to the IO pin.QuoteYes. I'm describing how the PIC can actually be powered up and running at lower voltages before the switcher actually starts "switching" (As seen on your scope)QuoteVirtual ground is a good name for this situation.

author: fozzyvis
author_rank: Regular Contributor
timestamp: February 16, 2023, 02:09:22 pm
content: Kim,I think I finally understand. I'm still at the point where -for me- it's logical that if there is no closed loop, there is no current. Of course there can be a little bit but I would never have thought about that without you mentioning it.I've learned from this and will keep that in mind next time I come up with a similar idea. I think I'll just draw another PCB with the enable line controlled via a GPIO.Actually...While writing this answer, I realized I can try add a patch wire from the GPIO that drives the gate to the EN pin of the LDO. I can try to drive both of them from the same GPIO with a pull down to GND (ifthatidea actually works).I'd also have to add patchwires so that the switch/button pulls the gate/EN to VCC, but patch wires I can manage. I do realize that this is not ideal either, but at least I might be able to salvage at least one partially-populated pcb and not feel completely defeated.(That won't work because the switcher is reference to the NOT_REALLY_GND and the GNDbatt might be below that potential, pulling the EN below the GND of the switcher.)