PCB for a BGA microcontroller. - Page 1
Forum section: electronics / general

author: luiHS
author_rank: Frequent Contributor
timestamp: April 13, 2020, 09:06:56 am
content: Hi.I want to make my first PCB with a BGA microcontroller, an NXP RT1062 and I have some doubts.1.- Will 4 layers on the PCB suffice?2.- Is it possible to put the decoupling capacitors on the same side of the PCB as the microcontroller? Having to solder on both sides, using an oven, would be a problem, I don't know how I could do it.Regards.

author: cgroen
author_rank: Unknown
timestamp: April 13, 2020, 09:36:24 am
content: Luis,I have done a few RT106x designs, all on 4 layer boards (JLCPCB). I did however, mount all decoupling on the opposite side of the CPU. My guess is it would work just fine on the same side as the chip with proper layout.You can easily solder on both sides using an oven, surface tension will keep the small components on the "backside" fixed while they are reflowed again. Larger/heavier components may need to be glued, but decoupling caps etc will stick just fine without gluing.

author: luiHS
author_rank: Frequent Contributor
timestamp: April 13, 2020, 10:19:03 am
content: Thanks cgroen, for the suggestion.I thought of that same solution, but I wasn't sure it could be done. All the capacitors and resistors I use are 0402, I could even use 0201, in theory my Neoden4 pick and place machine can put 0201.So the ideal would be to first put and solder the decoupling capacitors on one side, and then put and solder the microcontroller, crystal and other components on the other side.Another question I have is about the size of the vias, I also order all my PCBs to JLCPCB. I have never made a PCB for a BGA before, I would use a MIMXRT1062DVJ6A microcontroller, 12x12mm BGA, 0.8mm pitch.At most PCB manufacturers, they indicate that the smallest via size is 12mil, which I assume is too large for a BGA. What via size are you using on your PCBs for the RT106x? I understand then that JLCPCB supports PCBs with vias smaller than 12mil, although I suppose will be more expensive.I have looked at JLCPCB and they allow you to select the minimum size of the vias in advanced options, between 0.45mm and 0.2/0.40mm, this I suppose allows vias as small as 8mil.

author: cgroen
author_rank: Unknown
timestamp: April 13, 2020, 10:25:08 am
content: Luis,I violated JLCPCB's via rules for this! I did not get any response/angry mails or other from themThe VIA's used under the BGA is 0.2/0.356 mm, and it has worked 100% perfect every time I got boards from them this way!Below you will see the layout from one of my boards (RT1064)Regards,Carsten

author: luiHS
author_rank: Frequent Contributor
timestamp: April 13, 2020, 10:45:44 am
content: That's great, thanksI see that on your PCB you are using meanders to tune the length of tracks. Is that to connect some SDRAM?In my design with the MIMXRT1062DVJ6A, I do not plan to put an external SDRAM at the moment, but to put a micro SD card. I have check the PCB design of the Teensy 4.0 board, which installs this same microcontroller and I see that on the bottom side they are using some meander for the tracks that connect to some pads to solder a socket for micro SD cards.Do you think it is really necessary to tune the track length for the SDIO, connecting a micro SD socket?Another question, what minimum thickness of track and separation between tracks are you using ?, I think the minimum allowed is 6mil, I don't know if JLCPCB allows smaller sizes and if would be necessary for a BGA.

author: cgroen
author_rank: Unknown
timestamp: April 13, 2020, 10:53:51 am
content: Luis,I don't think it is needed to match the lengths to the SDRAM, I did it "just because I could". I have other designs with the RT series where I didn't bother with this and they work perfectly too. As long as you dont make the tracks VERY different lengths, I would not bother. I have several LPC54628 designs with SDRAM where the SDRAM runs at 100 MHz, and they are not length matched, also works perfect. I normally, in a new design with SDRAM, let it run for days doing a SDRAM test (at different temperatures, multiple boards etc) to verify.The ones I have done with SDIO, I have also never bothered to length match anything!Clearance rules track/track from JLCPCB is only 3.5 mil !from VIA to track it is 5 milTheir capabilities:https://jlcpcb.com/capabilities/CapabilitiesRegards,Carsten

author: cgroen
author_rank: Unknown
timestamp: April 13, 2020, 10:58:31 am
content: Luis,some more details of my design:

author: luiHS
author_rank: Frequent Contributor
timestamp: April 13, 2020, 12:24:11 pm
content: Thanks cgroen.You put a decoupling capacitor on each ball with NVCC/VDD, of what value?I'm looking at the schematic on the Teensy 4.0 board, and also on the MIMXRT1060_EVK evaluation board, and I see it uses a series of 220nF and 4.7uF capacitors in parallel. In Teensy 4.0 it doesn't seem like there is a capacitor for each NVCC/VDD ball, instead there are fewer and they are shared by several balls. In the MIMXRT1060_EVK it does seem that there is a capacitor per supply ball.I don't know if each certain number of balls can share the same capacitor or it has to be one per NVCC/VDD ball.

author: cgroen
author_rank: Unknown
timestamp: April 13, 2020, 12:39:05 pm
content: Luis,I looked in NXP recommendation for the hardware design of the RT series and their dev boards, I then compromised between these two and what room I thought I had available.There are several connections on the CPU in my design that shares the capacitors, I have measured the rails and all are perfectly fine in my design.PS: What CAD system are you using ?Regards,Carsten

author: luiHS
author_rank: Frequent Contributor
timestamp: April 13, 2020, 12:54:07 pm
content: I am working with Eagle 9.5

author: cebrax
author_rank: Contributor
timestamp: March 24, 2021, 05:41:38 am
content: Quote from: cgroen on April 13, 2020, 10:53:51 amHa! They have changed their webpage on this and removed via-to-track, or I cannot find it?I was looking for this information everywhere, thank youDo you have any recent boards that turned out fine with a 5mils via-to-track clearance?