Microcomputer/serial communication troubles - Page 1
Forum section: electronics / projects

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 05:39:36 pm
content: Hey, I'm having a bit(!!) of trouble with a computer I'm building, and I was hoping that someone might have some ideas for troubleshooting.It's a euro card bus (ECB) system; pcbs with DIN4.1612 connectors on a backplane.Currently it has three boards:-CPU-4K ram-Turnkey moduleIt's not an altair clone, but very similar, using the altair 8800b-turnkey serial monitor code, slightly modded for addresses to match.I'll post all schematics, but here's the symptoms:It should display a "." prompt and wait for input via UART, but it just sends the occasional (every 8 sec's or so) package of 00 00 and FF. - doesn't look like serial data but haven't looked at the actual packets (logic analyzer down for maintenance).All code lies in a single 2764 EPROM, and ends at address 01FFH = 0000 0001 1111 1111B so A9 and upwards should never be high - though they are clearly seen flicker with a logic probe.The RAM starting at 2000H are never accessed, even though the ROM routines should push stack values on it.The processor is definitely running, all lines, /WR, /RD, M/IO are all pulsing happily along..Here's the list file for the ROM:Code:0001 0000 ;***************************************************************0002 0000 ;* THIS IS A 256 BYTE PROM MONITOR FOR USE WITH THE ALTAIR *0003 0000 ;* 8800B TURNKEY MODULE. THIS MONITOR PROVIDES THE USER WITH *0004 0000 ;* THE FOLLOWING FUNCTIONS: *0005 0000 ;* *0006 0000 ;* 1) MEMORY EXAMINE AND CHANGE FUNCTION *0007 0000 ;* YOU CAN EXAMINE AND CHANGE THE CONTENTS OF ANY *0008 0000 ;* VALID MEMORY LOCATION *0009 0000 ;* 2) MEMORY DUMP FUNCTION *0010 0000 ;* YOU CAN DUMP IN THE ALTAIR BINARY PUNCH FORMAT *0011 0000 ;* BETWEEN ANY TWO VALID MEMORY LOCATIONS *0012 0000 ;* 3) JUMP TO FUNCTION *0013 0000 ;* YOU CAN CAUSE THE MONITOR TO JUMP TO ANY *0014 0000 ;* LOCATION AND START EXECUTING THE PROGRAMS THERE *0015 0000 ;* *0016 0000 ;* THE MONITOR CAN BE REENTERED FROM THE USER'S PROGRAM *0017 0000 ;* SO THAT THE FEATURES OF THE MONITOR ARE ALWAYS AVAILABLE *0018 0000 ;* TO ANY USER PROGRAM. *0019 0000 ;* EDITED FOR DIFFERENT SYSTEM BY CHRISTOFFER B. 19/04/2016 *0020 0000 ;***************************************************************0021 0000 ;0022 0000 ; MITS TURNKEY MONITOR0023 0000 ; C.W. VERTREES01/13/19770024 0000 ; REVISED01/17/19770025 0000 ;01/19/19770026 0000 ;01/20/19770027 0000 ;0028 00000029 0000 ACIACR.EQU00H; SIO STATUS AND COMMAND REGISTER/IO ADDR 00H; WILL BE MIRR'D AT SOME ADDR.0030 0000 ACIADR.EQUACIACR+1; SIO DATA REGISTER /AT IO ADDRESS 01H0031 0000 SIORST.EQU03H; ACIA MASTER RESET0032 0000 SIOINIT.EQU11H; /16,8 BITS,NO PARITY,2 STOP,NO INTS (THE BAUD GEN USED ORIG. IS X16: REG. IF NEED)0033 00000034 0000 LEADCH.EQU0DH; PUNCH LEADER CHAR0035 0000 LEADCNT.EQU3CH; PUNCH LEADER COUNT0036 0000 SOFB.EQU3CH; PUNCH "START OF BLOCK" CHAR0037 00000038 0000 PROMPT.EQU'.'; COMMAND PROMPT0039 00000040 0000 ;STACKEQU0FC00H0041 0000 STACK.EQU02000H;START OF STACK/START OF RAM - 4K OF RAM STARTING AT 2000H0042 00000043 00FF .ORG000FFH;START OF MONITOR (ALMOST BOTTOM OF ROM)0044 00FF0045 00FF 3E 03 MON:MVIA,SIORST; RESET 2SIO /PUT SIORST IN A0046 0101 D3 00OUTACIACR; AND INITIALIZE /ENABLE INT.0047 0103 3E 11MVIA,SIOINIT0048 0105 D3 00OUTACIACR ;SET ACIA /16, 8 BITS, NO PARITY, 2 STOP, NO INTS0049 01070050 0107 31 00 20 ENTER:LXISP,STACK; LOAD STACK0051 010A CD 9C 01CALLCRLF; FORMAT OUTPUT0052 010D 3E 2EMVIA,PROMPT; HELLO MONITOR0053 010F CD F1 01CALLOUTCHK0054 0112 CD E7 01CALLINCH; WHAT TO DO?0055 01150056 0115 FE 4DCPI'M'0057 0117 CA 28 01JZMEM; DO MEMORY EXAMINE0058 011A0059 011A FE 44CPI'D'0060 011C CC 4E 01CZDMP; DO A MEMORY DUMP0061 011F0062 011F FE 4ACPI'J'0063 0121 C2 07 01JNZENTER; NOT A VALID CMD0064 01240065 0124 CD A6 01CALLOCTL6; DO A JUMP, GET ADDRESS0066 0127 E9PCHL; LOAD PC AND GO0067 01280068 0128 ; THIS CONTROL STRUCTURE HANDLES THE MEMORY0069 0128 ; EXAMINE AND CHANGE FUNCTION0070 0128 ;0071 0128 CD A6 01 MEM:CALLOCTL6; GET ADDRESS0072 012B0073 012B 3E.DB3EH; "MVI A," SKIP NEXT (BOMB A)0074 012C 23 CONT:INXH; INCREMENT ADDRESS0075 012D CD 9C 01CALLCRLF; NEW LINE0076 01300077 0130 54MOVD,H; STORE ADDRESS IN D/E0078 0131 5DMOVE,L0079 0132 CD C8 01CALLPRINT6; PRINT ADDRESS0080 01350081 0135 1ALDAXD; LOAD DATA0082 0136 67MOVH,A0083 0137 CD CE 01CALLPRINT3; PRINT DATA BYTE0084 013A0085 013A CD A7 01CALLOCTL3; GET NEW DATA0086 013D0087 013D EBXCHG; RESTORE ADDRESS0088 013E DA 2C 01JCCONT; NO NEW DATA0089 01410090 0141 77MOVM,A; STORE DATA0091 0142 BECMPM; COMPARE DEPOSIT0092 0143 CA 2C 01JZCONT; OK, DO NEXT0093 01460094 0146 3E 3F ERR:MVIA,'?'; FLAG BAD DEPOSIT0095 0148 CD F1 01CALLOUTCHK; PRINT '?'0096 014B0097 014B C3 07 01JMPENTER; RETURN TO MONITOR0098 014E0099 014E ; ERROR CONDITIONS RETURN TO MONITOR VIA "ERR"0100 014E ; THIS CONTROL STRUCTURE RUNS THE MEMORY DUMP FUNCTION0101 014E ;0102 014E CD A6 01 DMP:CALLOCTL6; GET START0103 01510104 0151 EBXCHG; STORE IN D/E0105 0152 D4 E2 01CNCSPACE0106 01550107 0155 CD A6 01CALLOCTL6; GET END0108 01580109 0158 3E 0DMVIA,LEADCH; LOAD LEADER CHAR0110 015A 06 3C X1:MVIB,LEADCNT; LOAD LEADER CNTR0111 015C0112 015C CD F1 01 X2:CALLOUTCHK; PUNCH LEADER0113 015F0114 015F 05DCRB; DECREMENT COUNT0115 0160 C2 5C 01JNZX20116 01630117 0163 B8CMPB; THROUGH WITH LEADER?0118 0164 78MOVA,B0119 0165 C2 5A 01JNZX1; PUNCH NULLS0120 01680121 0168 7DMOVA,L; SUB START FROM END0122 0169 93SUBE0123 016A 6FMOVL,A0124 016B 7CMOVA,H0125 016C 9ASBBD0126 016D 67MOVH,A; HL CONTAINS TOT BYTES0127 016E 23INXH; INCREMENT TOT BYTES0128 016F0129 016F 05 BLOCK:DCRB; B=FFH0130 0170 7CMOVA,H0131 0171 B7ORAA; MORE THAN ONE BLOCK?0132 0172 C2 76 01JNZNOTLST; NOT LAST BLOCK0133 01750134 0175 45MOVB,L; LAST BLOCK LENGTH0135 01760136 0176 3E 3C NOTLST:MVIA,SOFB0137 0178 CD F1 01CALLOUTCHK; PUNCH "START OF BLOCK"0138 017B0139 017B 78MOVA,B; B=BYTE CNTR0140 017C CD F1 01CALLOUTCHK; PUNCH BYTE COUNT0141 017F0142 017F 0E 00MVIC,0; CLEAR CHECKSUM0143 01810144 0181 7BMOVA,E; PUNCH LOAD ADDR0145 0182 CD F1 01CALLOUTCHK; L.S. BYTE0146 0185 7AMOVA,D0147 0186 CD F1 01CALLOUTCHK; M.S. BYTE0148 01890149 0189 1A DATA:LDAXD; GET DATA BYTE0150 018A CD F1 01CALLOUTCHK; PUNCH IT0151 018D0152 018D 13INXD; INCREMENT ADDR0153 018E 2BDCXH; TOTBYTES=TOTBYTES-10154 018F 05DCRB; DONE W/BLOCK?0155 0190 C2 89 01JNZDATA; NO0156 01930157 0193 79MOVA,C; YES, PUNCH CKSUM0158 0194 CD F1 01CALLOUTCHK0159 01970160 0197 7CMOVA,H; THROUGH W/ALL BYTES?0161 0198 B5ORAL0162 0199 C2 6F 01JNZBLOCK; NO, PUNCH NXT BLOCK0163 019C0164 019C 3E 0D CRLF:MVIA,0DH; DO A CRLF AND RETURN TO MONITOR0165 019E0166 019E CD F1 01CALLOUTCHK0167 01A10168 01A1 3E 0AMVIA,0AH0169 01A30170 01A3 C3 F1 01JMPOUTCHK0171 01A60172 01A6 ; RETURN TO MONITOR THROUGH OUTCHK0173 01A6 ; THIS SUBROUTINE BUILDS 3/6 OCTAL DIGITS IN H&L0174 01A6 ;0175 01A6 ; SPECIAL RETURN PROVIDED BY A "SPACE", CARRY BIT SET.0176 01A6 ; ONLY VALID OCTAL OR "SPACE" ACCEPTED. ALL OTHERS FLAGGED AND0177 01A6 ; CONTROL RETURNS TO MONITOR.0178 01A6 ;0179 01A6 06 OCTL6:.DB6; LOAD B WITH A 6, SKIP NEXT0180 01A7 06 OCTL3:.DB6; LOAD B WITH 30181 01A8 03.DB30182 01A9 21 00 00LXIH,0; CLEAR H/L FOR LESS THAN 6 DIG RET0183 01AC0184 01AC CD E7 01 AGN:CALLINCH; GET CHARACTER0185 01AF 4FMOVC,A; STORE IN C0186 01B0 FE 20CPI' '; COMPARE TO "SPACE"0187 01B20188 01B2 37STC; SET THE CARRY0189 01B3 C8RZ; RETURN IF "SPACE"0190 01B4 E6 B8ANI0B8H; TEST FOR VALID OCTAL0191 01B60192 01B6 EE 30XRI30H0193 01B80194 01B8 C2 46 01JNZERR; BAD, FLAG & RET TO MON0195 01BB0196 01BB 79MOVA,C; RESTORE CHAR0197 01BC E6 07ANI7; STRIP OFF ASCII0198 01BE0199 01BE 29DADH; SHIFT H&L LEFT 3 BITS0200 01BF 29DADH0201 01C0 29DADH0202 01C1 85ADDL0203 01C2 6FMOVL,A; PUT OCTAL IN H0204 01C3 05DCRB; THROUGH?0205 01C4 C2 AC 01JNZAGN; NO, DO AGAIN0206 01C70207 01C7 C9RET; YES, NORM RETURN0208 01C8 ; THIS SUBROUTINE PRINTS 3 OCTAL DIGITS FROM H0209 01C8 ; OR 6 OCTAL DIGITS FROM H AND L0210 01C8 ;0211 01C8 ; DIGITS ARE FOLLOWED BY A SPACE0212 01C8 ;0213 01C8 06 06 PRINT6:MVIB,6; LOAD CNTR W/60214 01CA0215 01CA AFXRAA; CLEAR A0216 01CB C3 D5 01JMPNEXT1; SHIFT ONE BIT0217 01CE0218 01CE 06 03 PRINT3:MVIB,3; LOAD CNTR W/30219 01D00220 01D0 E6.DB0E6H; SKIP NEXT, SHIFT 2 BITS0221 01D1 29 NEXT3:DADH; SHIFT H/L LEFT 3 INTO A0222 01D2 17RAL0223 01D3 29DADH0224 01D4 17RAL0225 01D5 29 NEXT1:DADH0226 01D6 17RAL0227 01D7 E6 07ANI7; STRIP OFF OCTAL0228 01D90229 01D9 F6 30ORI30H; ADD ASCII / 30H OR A0230 01DB0231 01DB CD F1 01CALLOUTCHK; PRINT IT0232 01DE0233 01DE 05DCRB; THROUGH?0234 01DF C2 D1 01JNZNEXT3; NO, SHIFT NEXT THREE0235 01E20236 01E2 3E 20 SPACE:MVIA,' '; YES, PRINT SPACE0237 01E40238 01E4 C3 F1 01JMPOUTCHK; AND RETURN0239 01E70240 01E7 ; RETURN TO CALLING PROGRAM THROUGH OUTCHK0241 01E7 ; THIS SUBROUTINE WILL INPUT A CHARACTER, STRIP0242 01E7 ; PARITY AND AUTOMATICLY ECHO THE CHARACTER.0243 01E7 ; IT WILL ALSO OUTPUT A CHARACTER WITH CHECKSUM CALCULATIONS.0244 01E7 ;0245 01E7 DB 00 INCH:INACIACR; READ STATUS0246 01E90247 01E9 0FRRC; ROTATE A RIGHT THROUGH CARRY0248 01EA D2 E7 01JNCINCH; NOT READY / BIT 0 OF REGISTER =0 (THIS CHECKS THE "RX DATA REGISTER FULL" FLAG)0249 01ED0250 01ED DB 01INACIADR; READ CHARACTER INTO A0251 01EF0252 01EF E6 7FANI7FH; STRIP PARITY0253 01F10254 01F1 F5 OUTCHK:PUSHPSW; SAVE CHARACTER0255 01F2 81ADDC; ADD IN CHECKSUM0256 01F3 4FMOVC,A; UPDATE CHECKSUM0257 01F40258 01F4 DB 00 LOOP:INACIACR; READ STATUS0259 01F6 0FRRC0260 01F7 0FRRC0261 01F8 D2 F4 01JNCLOOP; READY ?0262 01FB0263 01FB F1POPPSW; YES, GET CHAR0264 01FC D3 01OUTACIADR; PRINT CHARACTER0265 01FE0266 01FE C9RET; FROM WHENCE YE CAME0267 01FF0268 01FF.ENDtasm: Number of errors = 0One issue I have, is the "E" pin on the 6850B ACIA. I honestly have no clue what to do with it, and most UART's don't have a similar feature, so I searched for schematics using the chip, and found one just tying it to IO/M, but I really don't know if that's a good idea.Note: There's some pull-up resistors missing from the CPU module schematic, that I've added on the circuit, but the processor DOES run.Note2: The xtal and 15M resistor at the bitrate gen are replaced with an oscillator can of the same freq: 1.8432MHzReally hope someone has some insight, as I'm at a bit of a loss. And here I thought debugging would be easy on more interchangable boards..Thanks in advance!

author: Andy Watson
author_rank: Super Contributor
timestamp: April 22, 2016, 05:47:18 pm
content: Check the operation of the stack. I believe the stack pointer in this processor starts at its highest value and then decreases as data is pushed on to it.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 05:58:07 pm
content: Ugh, you're absolutely right! That might explain a good deal of my issues.Thanks!

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 07:05:10 pm
content: Updated stack to top of RAM instead of bottom, doesn't really make any change. No /CS'ing the RAM, still reading from ROM, still spewing a few randoms over serial.Though that's indicative in itself, ofcourse, since it can't be executing any stack parts of the code..hmm..

author: Andy Watson
author_rank: Super Contributor
timestamp: April 22, 2016, 08:16:37 pm
content: Quote from: ChristofferB on April 22, 2016, 05:39:36 pmWhat have you done with it?The datasheet says that the Enable input "enables the bus input/output buffers and clocks data to and from the ACIA". It also says, under operation of the transmitter, that the negative edge of the E signal is used to transfer data to Transmit Data Buffer - so it looks like you have to use to somehow synchronise the reading and writing of data - you can't just tie it up or down.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 08:57:22 pm
content: I didn't tie the E pin on the 6850 hi or lo. I connected it to the IO/M, as I'd seen in some other designs. So it is being toggled. Just don't really know if it's at the correct rate.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 09:13:52 pm
content: The "E" line is a feature of the MC6800 family, and, as far as I can tell, it's more or less just a clock output for timing things. Pin name "enable theta-2 output" - should it just be the processor clock?Seems to be what would mimic the 6800 function the closest.

author: rfeecs
author_rank: Frequent Contributor
timestamp: April 22, 2016, 09:47:21 pm
content: The 6850 clocks data in/out on the trailing edge of E. The 8085 uses the trailing edge of /R or /W. One approach that works is nand /R and /W together and use that for E, and use the 8085 S1 for the 6850 R/W.Make sure your /DCD and /CTS signals are wired appropriately.You can check out your system with a simple echo program first:http://www.solivant.com/altair_bootloaders/index.php?album=altair_bootloaders&pagen=1

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 10:20:34 pm
content: Just consulted the original 6850 serial card for the altair 8800, and nand'ing /RD and /WR is exactly what they've used for E. But with both /RD and /WR active low, wouldn't that essentially become an "and" ?Is there any advantage in using S1 for R/W instead of just /WR ?Thanks, this must be the way to go.

author: rfeecs
author_rank: Frequent Contributor
timestamp: April 22, 2016, 10:34:38 pm
content: /RD nand /WR = RD or WRThe advantage of using S1 is it is set at the beginning of the instruction cycle and held for the entire cycle, so it is stable when you clock E.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 22, 2016, 10:40:41 pm
content: Right, S1 it is, then.Ah, sorry, read "NOR" - getting late. So you basically let it trigger on any change in read/write, as I see it?I'll go ahead and redo the ACIA control.Thanks!

author: Andy Watson
author_rank: Super Contributor
timestamp: April 22, 2016, 11:49:05 pm
content: Does the program run? Looking at the CE line for the EPROM it appears to be driven by an LS138 which has an enable and not-enable both tied to ground?

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 23, 2016, 12:00:52 am
content: The program appears to run, since the EPROM /CS line is toggling - it's a schematic fault I have corrected, the active high is of course to be pulled HI.Sorry, haven't been keeping up with my schematic errata.I should probably make a test eprom with a tiny routine jumping between 10 addresses, in a loop, so I know exactly what address pins should be toggling, then that way get the ROM part verified, then maybe a program that just writes to all locations in RAM, to check out that board, THEN figure out the EPROM thing.The changing of "E" and R/W on the ACIA didn't seem to change anything, so I suspect the program not running must be the primary fault.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 23, 2016, 11:38:58 pm
content: Okay, after solving some smaller issues (like not soldering a decoder pin on the RAM cardand a solder blob tying ALE to gnd) I've tried a ROM with a tiny routine:Code:0001 0000 ;***************************************************************0002 0000 ;* SIMPLE ROM PROGRAM TO TEST TURNKEY ROM LOCATIONS *0003 0000 ;* PROGRAM JUMPS BETWEEN VERY FEW ADDRESSES, ALLOWING *0004 0000 ;* PROBING OF ADDRESS LINES THAT SHOULDN'T BE ACCESSED. *0005 0000 ;* PROGRAM IS ONLY 6 BYTES LONG, SO A4-15 SHOULD BE LOW. *0006 0000 ;* WRITTEN BY CHRISTOFFER B. , 23/04/2016 *0007 0000 ;***************************************************************0008 00000009 00000010 00000011 00000012 0000 .ORG 0000H0013 00000014 0000 3E FF ROMSTART:MVI A,0FFH ;LOADS ACCUMULATOR WITH FFH0015 0002 78MOV A,B ; LOADS A INTO B0016 0003 C3 00 00JMP ROMSTART ; JUMPS TO ADDRESS 00017 0006 .ENDtasm: Number of errors = 0As the comment said, it only takes up 6 bytes, and since no IO ports or memory higher than that is addressed, all address pins higher than A3 should be LOW and it should loop in those 3 instructions.They're still flickering happily, though, so that doesn't work. It seems, interestingly enough, that the hi/lo time increases (doubles, it looks like) with every higher address line, indicating that it's in fact just counting up on the addresses, as if it doesn't read any memory (I only have CPU and EPROM/UART card installed).The EPROM /CS is still toggling.Maybe there's a timing issue with EPROM output enabling.

author: Andy Watson
author_rank: Super Contributor
timestamp: April 24, 2016, 12:39:43 am
content: Quote from: ChristofferB on April 23, 2016, 11:38:58 pmMaybe! Have you checked the propagation delay through the address selection and chip-select paths? My vague memory of using the 8085 is that we only had timing problems with the slowest of slow EPROMs when the processor was being run with a 6MHz crystal. Could you temporarily substitute a 1MHz crystal?You have indicated some bus termination resistors - it looks like the EPROM needs to be able to drive this termination - can it? You might also try removing anything that can be unplugged from the data bus to ensure that there is no contention.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 24, 2016, 01:08:59 am
content: The pullup resistors are 5.5 k - no pulldowns and only on data lines.I actually just substituted the crystal for a 1,5 MHz one - the previous 3,6 MHz is above what my particular chip was rated at. Problem persists, though.QuoteWell the datasheets for the 74LS devices say about 18 ns per chip =36 ns.but I haven't measured it myself.The EPROM is a 81 vintage Mitsubishi M5L2764K-2, must be 200 ns access time. Maybe I should try with a newer one, but 200 ns is pretty ordinary for EPROM's if I recall correctly.

author: Andy Watson
author_rank: Super Contributor
timestamp: April 24, 2016, 01:49:22 am
content: Can you isolate the processor card and force instructions on to the data bus (using appropriate resistive pull-up/downs)? NOPs (00h) should see the processor read through its entire address range. Restart (ffh) should cause the processor to sit in a tight loop reading instructions from address 0038h (I think), whilst pushing the stack to a decreasing address.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 24, 2016, 02:04:20 am
content: FF's is easy, actually, since the data bus is already pulled up.If there are no other boards installed, that should be enough to make it read RST 7's That's a really good idea!NOP's could be accomplished by putting some resistors connected to gnd directly into the backplane sockets. Should be doable.edit: the force-FF needs stronger pullup' it seems. I'll have to try that.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: April 29, 2016, 10:17:06 pm
content: Okay, so, sorry for reviving an old thread, but I'm going absolutely nuts.I fixed most of the (plentiful) issues I had (including adding pull-up's to everything), and got the system running.I've even gotten it to transmit via serial, using a slightly modified version of this:http://www.solivant.com/altair_bootloaders/index.php?album=altair_bootloaders&pagen=1serial card test routine that starts by spitting some characters out:Code:0001 0000 ;***************************************************************0002 0000 ; UART REFLECTOR TEST *0003 0000 ; SHOULD REFLECT ANY INPUT TO ACIA. *0004 0000 ;***************************************************************0005 00000006 00000007 0000 SIORST.EQU03H; ACIA MASTER RESET0008 0000 SIOINIT.EQU35H; 8/N/1, /160009 0000 ACIACR.EQU00H; SIO STATUS AND COMMAND REGISTER0010 0000 ACIADR.EQUACIACR+1; SIO DATA REGISTER /AT IO ADDRESS 01H0011 00000012 0000 .ORG 0000H0013 0000 INIT:0014 0000 3E 03MVI A,SIORST0015 0002 D3 00OUT ACIACR;RESET ACIA0016 0004 3E 35MVI A,SIOINIT0017 0006 D3 00OUT ACIACR;SETUP ACIA0018 0008 3E 54MVI A,54H0019 000A D3 01OUT ACIADR0020 000C 3E 45MVI A,45H0021 000E D3 01OUT ACIADR0022 0010 3E 53MVI A,53H0023 0012 D3 01OUT ACIADR0024 0014 3E 54MVI A,54H0025 0016 D3 01OUT ACIADR0026 0018 3E 0DMVI A,0DH0027 001A D3 01OUT ACIADR0028 001C 3E 3EMVI A,3EH0029 001E D3 01OUT ACIADR;"TEST"CR">"0030 00200031 0020 DB 00 LOOP:IN ACIACR;READ STATUS REG.0032 0022 0FRRC0033 0023 D2 20 00JNC LOOP;WAIT FOR IN CHARACTER0034 0026 DB 01IN ACIADR;GET CHAR0035 0028 D3 01OUT ACIADR;WRITE CHAR BACK0036 002A C3 20 00JMP LOOP;REPEAT FOREVER0037 002D .END0038 002D0039 002Dtasm: Number of errors = 0And I do see the "TEST >" characters. But for the life of me I can't get the ACIA to READ any serial data.I've traced the RX signal all the way from my terminal PC to the output of the RS232->TTL converter (MC1489) - But the UART/ACIA doesn't seem very interested.I'm unsure whether it's a code thing (unlikely, the ports are correct, since it writes, and the loop is very very basic)-Given that the code just mirrors, even messing up parity or start/stop bits shouldn't matter.I'm attatching the updated serial/rom card schematic, but my only other guess is that the MC1489's "response control" lines can't be left floating, but I can't find anything on that, and I can see the data on both sides.Any hints would be much appreciated!