Curve Tracer/Study in feature creep - Page 1
Forum section: electronics / projects

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: April 27, 2025, 05:57:21 pm
content: I recently started on a transistor curve tracer with the goal of being able to make accurate measurements of various two and three terminal devices. The initial design goals were:10 fA resolution at 1 SPS on most sensitive range at both collector and base (or gate and drain, etc.)0.1A @ 100V/1A @ 15V drive capability at collector, 50 mA @ 20V at base>5 digit resolution at 10 SPSforce/sense connections at all portsFit in a standard half rack x 2U enclosureAllow convenient switching between two DUTs for matchingPotential for standalone operation (i.e., display and buttons)The basic design idea was to force voltage at both ports and take the current as voltage drop across a resistor (see the attached picture). Voltage between base and emitter and collector and emitter is measured via the sense connections. The notional amplifiers in the theory of operation are (kind of) bootstrapped low bias current op amps (ADA4530-1 or OPA928) that drive a diamond buffer. The voltage rails for the collector drive are out of the range of using ICs, so there is a gain stage made from discrete transistors in a CFB-type configuration. All the measurements are taken with programmable gain FDAs using THP210s and an AD4134. Each input is chopped to be able to do CDS to null (some of) the offsets. To measure the voltage of the collector sense resistor at unity gain with a common mode voltage potentially +/-100V from common, there is a current source/sink and a pair of precision resistors with compliance over the full voltage range. The force voltages are generated by 18 bit R2R DACs with a four-channel 12-bit DAC that enables offset and gain calibration.At this point, I thought that it would be pretty nice to be able to control the temperature of the devices as well, so I added a block for sensing temperature with (ideally) a PT1000 RTD and 2.5A/24V capable current sources (2 channels each, why not?). Also, another cascode FET on the collector drive could keep individual device dissipation to <65W worst case at 1 A drive, so I figured it was worth it to be able to do 1 A over the full voltage range.There are a couple of items on which I was hoping to get some input:Given the complexity of the design so far, should I just add a crossover and clamp DAC to be able to force current and have full four quadrant operation on both channels? Right now, four quadrant operation is possible but not optimal, and the current clamp is essentially set by the current range resistor and the supply voltage for the bootstrapped amp.Is there a viable alternative to using triaxial connectors?I have attached the schematic for the design so far. There is a bit more work to do on the power tree, and I haven't connected all the MCU pins, as I like to get a rough idea of where things will go in relation to the MCU before finalizing that part of the design. I also haven't done the full thermal analysis for the TEC source block, but driving a dead short from 24V at 2.5A gives a max of 60W divided between two FETs and a resistor, so it should be doable. I have done a fair amount of simulation work with the collector drive to figure out fault tolerance and stability, and it is looking good. I will probably add some divider/buffer blocks for using the MCU ADC to monitor at least some of the voltage rails for diagnostics and fault detection as well. Also, the supply for the 24V primary side will just be a 400W AC/DC converter module. It remains to be seen whether I can fit this in a half-rack width box.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 27, 2025, 07:19:47 pm
content: It's an impressive schematic. Do you still have more room left for more feature creep?The simplest curve tracer these days is a two channel function generator (one channel "stairs", the other triangle for each stair step) combined with a scope. Especially if your instruments understand SCPI, the rest is pretty simple.For the rest, it's a topic I've thought quite a lot about, but never built one myself. One of the reasons I never built it is because I don't have enough use for such a specialized instrument to justify the effort and cost.So my latest thoughts diverged in a different direction. Now my intention is to design and build a SMU, and then simply build two of them. You can do a lot of different things with a few SMU's. From use as a simple power supply, to a battery simulator, or a bunch of different semiconductor tests. Building a few of the same type of instruments is also more efficient for ordering PCB's, soldering, writing firmware etc.There are already a few DIY SMU's, both on this forum, and elsewhere on the 'net, and they look like quite impressive instruments, but they are a bit too advanced for my liking.For myself, I want reasonable features, but at the same time keeping complexity and cost modest Not extremely low budget such as most generic power supplies, but somewhere in between the EUR 100 power supplies, and a EUR 6000 Keithley SMU. Plenty of room to maneuver in between those two extremes. I'm happy with 1mV and 1uA resolution.

author: mawyatt
author_rank: Super Contributor
timestamp: April 27, 2025, 07:49:03 pm
content: Agree, that's impressive schematics!!@ Curtis, have you considered utilizing a "Virtual Ground" node for the Emitter/Source DUT terminal. We posted something about this for use in a Curve Tracer and did a quick "experiment" just to see if things behave nicely, they do!! Also, for the HV Collector/Drain terminal, the PA443 Dual 350V Op-Amp or PA441 is available now, this can make a nice HV amp. We used one for our AWG HV Buffer Amp and it works nicely, but not much BW tho, however for a Curve Tracer you don't need much BW anyway. You can followed the details here.https://www.eevblog.com/forum/projects/dso-awg-based-curve-tracer/https://www.eevblog.com/forum/testgear/fooln-around-with-dso-awg/msg4421209/#msg4421209Anyway, interesting project good luck and keep us posted on your progress!!Best

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: April 27, 2025, 08:21:01 pm
content: Thanks. The feature creep will continue until I run out of patience or board space. I am at the point where I need to be cognizant of how many parts I can place within a four hour window after getting solder paste on the board. I am just trying to envision what I might end up using this for whereDave Erickson's DIY SMU was a source of inspiration for this. This instrument is meant to fill my need (want) to measure sub pA leakage currents, and also because I am not satisfied with the curve tracer jig that I built for my analog discovery. I could use my two DMMs and three channel PSU to do some of this, but it would fall short of the design goals.It is likely at this point that the dual SMU strategy you mentioned would be easier, but I made it this far, and the high voltage collector amp seems fun, so I am OK with this strategy instead. @mawyatt - I will have to look up that high voltage op amp you mentioned, but I will probably stick with this hybrid bootstrapped thingy because I had fun designing it, and now I want to build one up.I have thought about using a virtual ground to essentially keep the emitter sense terminal at ground potential by sourcing/sinking an appropriate amount of current through the force connection. As I have it now, there is a REFGND node that serves as common for the voltage references, precision DACs, etc., but I admit that this could be problematic if there is too much resistance in the force connection. I may add a full bridge rectifier to the low voltage center tapped secondary to give the bipolar rails for this. Good suggestion.

author: mawyatt
author_rank: Super Contributor
timestamp: April 27, 2025, 08:58:30 pm
content: The "Virtual Ground" approach allows one to forgo the Collector/Drain side Current Sensing and makes this a ground referenced voltage which becomes easy to digitize/display and scale with appropriate resistors all at low voltages, and why we were venturing into this area. Of course the measured current is now Ie or Is and not Ic or Id.Not sure if this has been done with a Curve Tracer before, and why we did some sims and a protoboard test circuit.The Dual SMUs also seems interesting and we've been considering such for some time now. Using a Lab Supply for a Curve Tracer is limited in resolution/precision (can be resolved with external DMMs tho). Awhile back we did some crude testing and found that the loop time with the supply control is just too slow and makes achieving a plot tedious, not to mention that attempting to create a high power current/voltage where the DUT sees significant power dissipation is much too slow and causes the DUT to significantly heat up. Here we wanted to have a very fast sweep, pause then another fast sweep at next bias level, and repeat, with the idea of limiting the DUT power dissipation as well as with the Curve Tracer HV/HC Driver.Anyway, interesting areas that seem like good spots for some quality home grown approachesBest

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: April 27, 2025, 09:27:44 pm
content: My thought was more to use the virtual ground to keep the large ground currents confined to the small region between the center taps of the secondaries on the transformer (i.e., between the +/-120V secondary for the collector drive and the +/-7V secondary for virtual ground). This also prevents potentially destructive fault states, like REFGND moving 1V above GND and driving REF+ over the rail of the AD4134.I will still probably use high side current sensing to avoid uncertainties associated with calculating I_c = I_e - I_b because I can see that being problematic at <1 pA where Johnson noise of the 1G sense resistor and EMI/triboelectric effect/DA become troublesome. Were I not interested in very small currents, measuring the emitter/source current may well be the better choice.

author: RoGeorge
author_rank: Super Contributor
timestamp: April 28, 2025, 06:17:56 am
content: Quote from: CurtisSeizert on April 27, 2025, 05:57:21 pmThe price to build that would be probably between $10k..100k, and a few years of work. fA is electrometer grade, will need triaxial cables and other extreme measures. Also, a 5 digits SMU is far from trivial to achieve in practice.I think the specs are already way, way too much for a curve tracer. A single milligrade deviation in the DUT temperature will make the 5 digits resolution irrelevant.I would try a 3 digits and 1pA resolution for the first version, use that for a while, then decide if I need to go for more.

author: chilternview
author_rank: Frequent Contributor
timestamp: April 28, 2025, 08:59:55 am
content: Quote from: RoGeorge on April 28, 2025, 06:17:56 amAlso you could buy a HP/Agilent 4155C for less than $10k which would do all that and more. Not so much fun as making your own though I guess.

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: April 28, 2025, 11:59:41 am
content: Quote from: RoGeorge on April 28, 2025, 06:17:56 amI am doing this for fun, so I have design goals, not specs. Specs mean test methods, validation, etc. With a goal, if I fall short of 10 fA resolution and it can only do 1 pA, I have learned something about pitfalls of sub pA measurement. If I shoot for 1 pA and succeed, I have learned nothing about sub pA measurement. An instrument like this can also measure leakage current and dielectric absorption in capacitors, temperature coefficients, etc. Why not shoot for 5 digits?This has always been a hobby for me, so if I am having fun, I have no reason to try to look for a solution that is going to be timely, economical, or proportional to the problem at hand. If I needed to stay within those constraints, I would be doing work, and I would be getting paid for it. Also, $10k/2 years is probably about my burn rate on this stuff anyway.

author: RoGeorge
author_rank: Super Contributor
timestamp: April 29, 2025, 06:31:38 am
content: I guess I might have misunderstood the "Study in feature creep" part.Took that as "looking for arguments to lower the proposed specs".

author: mtwieg
author_rank: Frequent Contributor
timestamp: April 29, 2025, 11:32:01 am
content: Ok I'll bite, what's going on with Q60, Q61, and R112? There's no way to turn both FETs on, so you get some poorly-defined high impedance from leakage currents...?edit: ah nevermind, they're depletion mode, should have read the datasheet first.

author: Kleinstein
author_rank: Super Contributor
timestamp: April 30, 2025, 06:43:33 am
content: For just a curve tracer there is no real need to have separate drive an sense terminals for the voltage. This is especially the case for the smaller base / gate current. Not having separate drive an sense would simplify the stability a little and could save on the low bias amplifiers, using the same buffer for both current and voltage.What relays are planed for the current range switching ?Especially the simpler reed relays may not isolate very well.One may be able to separate the current ranges in a more leakage sensitive part and the noncritical ranges. This could need one more relay, but fewer critical ones where leakage matters.The level shift for the current measurement and set signal looks complicated. Are you sure it works with the rather large common mode voltage and bipolar signal. The classic SMU circuit avoids this by having the DAC / ADC with a ground at the shunts and an auxiliary floating supply.

author: mtwieg
author_rank: Frequent Contributor
timestamp: April 30, 2025, 12:44:10 pm
content: Yeah it's unclear what the purpose of the "Current Sense Level Shift" circuit is. LS_SUM is apparently driven to be equal to HV_IcSENSE-, which already comes from buffered source U57, so apparently its purpose isn't to generate LS_SUM. The only signals it seems to produce which couldn't be derived directly from other circuits is LS_IcSENSE+ (and therefore LS_SENSE_GRD). But from inspection, it seems LS_IcSENSE+ will always be within +/-10V of HV_IcSENSE-/VC_FORCE, which doesn't reduce its common mode range much.edit: oh ok I think I see it. The voltage HV_IcSENSE differential voltage is forced across R77 (still at high CM voltage). The current through R77 is steered through R78, which creates the LV_IcSENSE differential voltage (equal to HV_IcSENSE but at low CM voltage). Most of the voltage drop in the level shifting will be across Q37/Q38.I can only guess why the output stage of the of U33 uses such a hodgepodge of semiconductors

author: Kleinstein
author_rank: Super Contributor
timestamp: April 30, 2025, 04:15:57 pm
content: The ADC shown is quite fast. Are there plans to als incude more AC tests, to measure the differential (usually written with lower case) paramter ?For just the plain DC curves one could get away with a much slower ADC, or with the SMU like version with 2 separate ADCs as they would not share a common ground and likely also not reference.

author: mawyatt
author_rank: Super Contributor
timestamp: April 30, 2025, 04:48:52 pm
content: These are some of the reasons we considered the "Virtual Ground" approach, the Emitter/Source current measurement is ground referenced, as is the Collector/Drain Voltage. No floating supplies required and the ADC can be a single ground referenced chip. Depending on one's DUT range, the Force/Sense isn't necessary unless higher DUT currents are envisioned. Our initial testing of the "Virtual Ground" concept proved highly encouraging and normally would have already been having custom PCBs fabricated if the new tariffs were not in place.Now it's too expensive to acquire these out-of-pocket and offer the PCBs (or assemblies) without additional support (cost share). The concept was to have the Curve Tracer operate with a DSO in XY mode and/or Digitize such for display on a Laptop, RPi, or Arduino, and for DUT fixtures using the Tek 577 Adapters we developed awhile back for leaded and SMD DUTs. Two CT Versions were envisioned, one High Voltage with +- ~175V capability at low currents (<100ma), and another with High Current (+- ~3A) at lower voltages +-60V.Anyway, the OP wants to dive down to extreme levels for current measurements and this may very well require more extreme circuit measures to achieve such, so hats off for attempting this level of performance and hopefully will keep us posted on the progressBest