teho AWG: open source arbitary waveform generator - Page 1
Forum section: electronics / projects

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 04:56:27 am
content: I am designing an AWG/function generator that will be open source hardware. There will probably be a kickstarter for it when the design is done. Already working on prototypes, I see it as falling along the lines of a Rigol DG1022 or Agilent 33210A.I also noticed the long thread on the Hantek DDS, I think my design will have lower jitter and exceed that box in several other ways.I am curious though as to what features the maker/hacker community here would find highly desirable. Cost, final features all still to be determined for sure, I figure it is best to get input before a lot of money goes to prototypes. If there is any price you feel it is essential to keep such a design under I'm all ears on that also.

author: amspire
author_rank: Super Contributor
timestamp: April 21, 2012, 05:46:27 am
content: Good luck.Just be aware that there are lots of cheap Analog Device IC-based function/waveform generator boards available at places like Aliexpress.com in various states from a simple $15 basic board to ones perhaps to $100 with SMA connectors, display and buttons. They are usually dual channel and top frequencies over 100MHz are available.You will have to be offering something better then these boards. Better packaging, better output amp, better controls, better performance or better communications with a PC.Richard.

author: Rerouter
author_rank: Super Contributor
timestamp: April 21, 2012, 05:53:15 am
content: For me:- the ability to drive high level outputs such as +-10V across the entire frequency rance,- 0 Starting, so you can work down to 1 or 0.5Hz- Variable Current limit, On more than one project i have seeked to limit the maximum current the AWG can source and sink, (sometimes at different values but thats not really neccesary)

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 06:21:04 am
content: Quote from: amspire on April 21, 2012, 05:46:27 amIt is mostly for myself so it doesn't really matter what else exists. People seemed pretty excited here 25 pages for the AWG I mentioned and mine should be significantly better and open so we will see... Most of the cheap things I have seen (very cheap) have just been DDS not AWG. But feel free to point me at something if you like specific you think is a great option.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 06:23:06 am
content: Quote from: Rerouter on April 21, 2012, 05:53:15 amCurrent compliance eh? I'm not sure how you would do that with a very fast circuit. I'll have to think about it. As far as short circuit protection it will have that. As far as you blowing it up if you attach some large voltage to the output I guess I should make allowance for that, the allowance may be you have to change an opamp... No matter what I do if you put a large enough voltage on the output it will blow up if that is your issue.Current idea should do +/- 10 into high-Z +/- 5 into 50 ohm (50 ohm output Z).Frequency ranges TBD. Sample depth should be around 16 Kpts.

author: amspire
author_rank: Super Contributor
timestamp: April 21, 2012, 06:39:05 am
content: Quote from: teholabs on April 21, 2012, 06:21:04 amI am sure I have seen a AWG board in the past, but right now it seems to be mainly DDS at the low end. So the cheapest AWG is probably the DDS-3X25 USB generator for about $150 or the HP 33120A type clones starting at around $320.http://www.aliexpress.com/product-gs/517174178-Arbitrary-waveform-function-generator-SM-4020-wholesalers.htmlRichard.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 06:52:15 am
content: I agree I cited the 150 dollar one in the main post. This should be lower jitter and similar in cost, easier to modify and have features closer to the 300 dollar Agilent clones I think. Hopefully for less than 300 dollars.

author: free_electron
author_rank: Super Contributor
timestamp: April 21, 2012, 11:58:34 am
content: Here"s a couple you can grit you teeth on- capability to time sync two or more.- digital output of the wavepattern with programmable voltage levels. 1.2 to 3.3 volts.. So i can aatach my own dac- 16 k points ? You are kidding right ? Can we start with 16 MEG points ? Or pump it to 1 gig points ?Here's something that doesnt exist in any awg out there : the ability to play back long signals.I want to be able to play back long scope captures- phase accurate fsk. Program two frequencies and select two waveforms. Toggling is under control of an input pin. The generator must complete the paatern before switching to the other.- non phase accurate fsk. If i toggle : abort current pattern and switch immediately, i want the glitch !Pattern looping. 3 times pattern a followed by nine times pattern b , 1 time pattern c , 1 time pattern a 3 times pattern d etc. i want to give a list of what order and gow many repeats. Nested lopping is not required ( i can always unfold the loop if the buffer is sufficiiently long. Like 100000 steps...- Programmable output impedance. 50 ohm 75 ohm 600 ohm- calibrated output in Vpp Vrms and dBm ( taking into account output impedance.- use a large fpga... So users can add their own logic.Dont spend time on fancy displays. Give it a usb connection. Well drive it from a pc. Its cheaper to put the board in a box , stick a mini itx mobo next to it and hook up a 800x600 toucsrceen than messing around with a custom display interface.

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 21, 2012, 05:26:33 pm
content: setting 3x25 as a reference is not really a good idea if you havent bought one. recent discussion on siglent sgd1020 might be a good candidate to reverse engineer. or as Richard suggested (but there's no tear down yet here). only 3x25 doesnt limit you to use its maximum clock rate. what electron suggested might boost the cost exponentially. imo, the benchmark should be... standalone (no need PC), AWG, sine to 50MHz-100MHz max (to match our lovely DS1052E), smooth sweep func (not like 3x25) and yeah, buffy memory (16Kpts minimum i think), decent noise filter on the output. and somewhere $200-300.power requirement is not essential imho, just as the adjustable output impedance, since these can be done easy plugged to the output. providing it may increase the cost.just minor addition (i dont think will increase the cost significantly). power jack at the front (+ve -ve 5-15V rail, i prefer just that female DIP 3pins, simple) so we can easily get power for our plug and play extended device to be connected to the output (power amp module, DUT etc).just my 2cnt.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 05:49:41 pm
content: Quote from: free_electron on April 21, 2012, 11:58:34 amA lot of good suggestions but some of it won't be in the cards for this design. I certainly can see how to get very long sample depths at full sample rate, DRAM is cheap after all, but it won't be on this one, to reduce manufacturing cost it will almost certainly be FPGA only so about 16 K is all that it would hold.There should be a means of essentially compression I hope though with pointer tables and up/down counters.I don't think digital output of the pattern makes any sense because every DAC uses different I/O. LVDS, parallel, SPI, also different widths. I think if you want to use your own DAC you should take the open design and modify it and the VHDL to what you want as a base.I have never seen a real scientific instrument in all my years of science that had programmable output impedance (excluding current compliance, which is sort of that) The output impedance will be 50 Ohm, if you want higher just put a resistor in a Pomona box, easy and cheap.

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 21, 2012, 06:07:09 pm
content: Quotebut it can be done easy! see how 3x25 do it. might be handy for someone? with 3x25, i should be able to program it to output usefull/meaningfull digital data, but i haventtime and space not permitting.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 06:15:04 pm
content: Quote from: Mechatrommer on April 21, 2012, 05:26:33 pmThanks for the input. I am not planning to reverse engineer anything. I enjoy doing the design without looking too much at other designs to see what I will come up with. The referenced AWGs are mostly to get a feel for how difficult a spec to write for the design, that is what I am aiming for in the design.I would say my main goals are signal accuracy (noise, jitter, frequency) over speed.The power supply for this thing is a big issue actually, that is keeping the cost of that bit down low enough. I can certainly leave some rail pins for hackers who want to solder but there won't be a ton of power left to use off the board. The whole thing will almost certainly run at less than 10W. The analog section at half of that about. At least with the idea in my head currently.The sample rate will be about 150 MSPS, in my view that means Sine would be okay up to only about 20 MHz, without some tricks I don't know about. One of the specs on the 3x25 I didn't understand was 75 MHz sine at only 200 MSPS. Which is close to nyquist, with some filter if you don't care about the harmonics or level sure a square wave out looks almost sine like but aside from that or multiple interpolated and summed DACs I can't think how you would do it offhand, perhaps the 3 means there 3 channels summed?(Here is a nice note from SRS for anyone just make a vanilla DDS that reassures that I am not crazy:http://www.thinksrs.com/downloads/PDFs/ApplicationNotes/DDS.pdf, IE that 200 MHz should get to to maybe 66 Mhz without any further tricks of course Agilent's 33250A does 80 MHz so again that suggests something beyond direct sample output + filtering at the stated 200 MSPS rate).If a sine is all you want there are better ways to get it than AWG I think anyway, a nice fractional-N + VCO seems better to me. I've thought about making a YIG source for kicks also but yeah I don't have a lot of use for very high RF at home.I'm getting a lot of good input here, I doubt I will satisfy anyone completely. I also hope people will use whatever I come up with as a base rather than just saying: what a piece of junk. I want to put a decent AWG in reach of more people. 50 MHz output at most because that mates well with the common 50 MHz DSO a lot of hobbyists would have.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 06:21:21 pm
content: Quote from: Mechatrommer on April 21, 2012, 06:07:09 pmI see how they did it and I don't think it is a good design honestly. If you want to do that sort of thing probably easier to just get an FPGA development board. I think there would be a lot of issues with radiation with a high frequency bus like that unshielded if we are talking single ended square waves on the bus.The design I hope to achieve will be more like the Rigol/Agilents I mentioned than the 3x25 design I think.

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 21, 2012, 06:56:53 pm
content: Quoteworking with 3x25 has been a really educative experience for me. on how you generate signal out of a few points, when you have 5 points for a cycle of sine wont produce nice sine, but then when you have 2 points, then popped! a very nice sine! its amazing how digital works if you know what i mean, its just like... "theoritical software engineering development"btw: that 75MHz spec you saw? thats a lie, thats an aliasing, intermodulated sine or whatever you want to call it, and its a lie, you have to see it to believe it.

author: free_electron
author_rank: Super Contributor
timestamp: April 21, 2012, 07:05:05 pm
content: [quoteA lot of good suggestions but some of it won't be in the cards for this design. I certainly can see how to get very long sample depths at full sample rate, DRAM is cheap after all, but it won't be on this one, to reduce manufacturing cost it will almost certainly be FPGA only so about 16 K is all that it would hold.modern FPGa's have easily 512K or more of ram these days. and they don't need to be expensive. beides simply tack on an SRA externally. 4 dollars gets you 128Kx8 .or more. CY7C1024 comes to mind. ad these do 10nS. i've used these frequently in my ARB's.Quotethat's why i said programable output levels. all it costs is to slap a couple of 74LVCX4245s on the databus. two chips is what this costs you and now you have not only an AWG but also a digital pattern generator with programmable levels ( the LVC X has two power pins. one is static the other can be set between 1.2 and 3.3 it does all the level shifting for you. isn't life grand ...Quoteoh my ... any arb from agilent can do that ... even their lowly 33120a can do that.Quotethat is NOT changing output impedance !anyway, just my 2 cents.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 07:38:17 pm
content: Weirdly messed up quotes. But let me try to address your remarks free_electron.Sure you can get a huge FPGA or add a big SRAM. However, 10 ns isn't fast enough though to keep up with the DAC so you'd have to use a sync SRAM with sub 7 ns and that is rather costly. DDR with appropriate buffering would be a much better choice but I think keeping the design simple, hackable and manufacturable are more important than a deep buffer.33120a doesnothave variable output impedance. In fact the data sheet explicitly says it doesn't:http://cp.literature.agilent.com/litweb/pdf/5968-0125EN.pdf50 Ohm fixed. All the Agilent AWGs (that I have used or read the data sheets of) are 50 Ohm fixed. Having a 50 Ohm BNC connector any designer is going to have a 50 Ohm Z-out. All the datasheets read twice PP voltage into high-z and half into 50 Ohm again saying 50 Ohm fixed output Z. I can understand why people would want 75 Ohm for other sorts of coax.Now is a resistor in a box an output impedance. I think that depends on the frequency and size of the box and resistor. The output impedance of most high slew rate opamps is set by your choice of a resistor actually. An isolation resistor is needed to protect it from capacitive loading. There is an intrinsic output impedance of the amplifier of course but the larger resistance sets it by being much much larger. The is you have a buried "ideal" voltage source behind a resistance.At a frequency of < 100 MHz, a resistor in a box can be a lumped parameter. What matters is the phase of the signal across the object. If it is small then you can indeed change the output Z with a simple resistor. In fact resistive couplings are used even at very high frequencies (I've used power splitters at 10 GHz that are just resistors in a box). However there is always the option of having a transformer as well, or strip lines or directional couplers. RF is fun and there isn't just one way. But at these frequencies yes a small box with a small resistor does change the output Z. Especially since it was defined by a small resistor in the first place!Besides if the total wave nature of the EM matters than you have to change your transmission line too, and you can't program the copper to change geometry nor the connector or cable. So yeah it will have to be the standard 50 Ohm fixed. If you need 75 Ohm use a transformer or a resistive coupling in the right spot.

author: nctnico
author_rank: Super Contributor
timestamp: April 21, 2012, 08:30:17 pm
content: Quote from: teholabs on April 21, 2012, 04:56:27 amNice project and very feasible with today's parts. What I'd like to see:minimum output frequency 0.05Hz+/-10V output drive capability into high impedance loads (say over 1k Ohm)2 full featured outputs8(or more) digital outputs preferably with variable logic levels*High output frequencies don't matter much. 5MHz is enough.* Digital outputs are usefull for generating digital patterns. Its would be neat if the software allows to generate I2C and SPI patterns for prototyping circuits with I2C and SPI chips without the need for a microcontroller.@free_electron: if you want to playback long scope recordings, use an FTDI USB chip and stick a CPLD + DAC to it. IIRC this should get you (at least) 15MB/s sustained playback. This is not the territory of an AWG.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 10:55:44 pm
content: nctnico, I am seriously considering duel output. Having internal modulation basically requires a second channel anyway, the downsides of doing duel out are twice the power, and twice the analog cost. If it looks like I can do duel for say 30% more cost it will probably happen if it is 70% then no, I would probably select simply for a cheaper main board (IE buy two!).There are a bunch of features I am thinking of leaving off as standard but as DIY options for those who can solder. For instance a 10 MHz TCXO (~ 50 dollars) as a on board reference. So maybe a second channel could end up there if it doesn't make it on to the main design. I'm not sure yet. External modulation is certainly in the plan as of now (100 KSPS for analog, faster for digital).With a 50 Ohm Z-out and 20 V Pk-Pk into high z you are talking 9.5 V bipolar swing into 1K. The current output opamp is +/- 15 V bipolar at most, but not rail to rail of course, it may run off 12 V bipolar due to power supply design. I'll give as much swing as I can fit.I think Bus Pirate fills your need for I2C/SPI pretty well and has a nice mature firmware for that sort of thing. Sure it is nice and people could add it to the core but probably not a high priority given the limited sample depth.Perhaps I should bite the bullet and do a deep memory version (heavily pipelined DRAM) to allow for what you are suggesting there also, but I'm probably going to prove the core AWG/analog design first before turning it into a mixed signal device.It should do 5 MHz very cleanly (I hope!). I will try to get quantitative measures of phase noise and spurs for sure.

author: teholabs
author_rank: Contributor
timestamp: April 21, 2012, 11:09:07 pm
content: Thinking about that a bit more, I mean duel on one board is helpful because you get automatic phase locking if that is important to an application. So I certainly see that as a useful feature, but I also need to apply KISS here to the maximum, for cost, for the ability of people to put them together themselves if they want to.I'm certainly going to think about it more though. Here is a hypothetical, would you rather have two 12 bit channels or one 14 bit one? That might trade a bit of at least the cost and memory depth off.Edit: I just ran a crude estimate of the numbers a second channel would increase the price about 40-50% over a single channel design. Which may be too much (it will lower yield on the boards also and increase area, etc. so the 40-50% cost in parts isn't the whole cost increase still). Phase locking to 10 MHz reference + trigger with multiple boards might be a better engineering choice. Don't know still going to think about it more.

author: nctnico
author_rank: Super Contributor
timestamp: April 22, 2012, 12:56:32 am
content: I think you can keep things quite simple if you use a CPLD and an SRAM to store the waveform (* see below). You'll also need a filter with several cut-off frequencies to allow for low sample rates. And a variable gain amplifier (VGA) to control the output amplitude so you'll keep full resolution. I think 12 bits is more than enough. I'm not quite sure whether modulation is a feature which is often used. If the memory is long enough this can be done by the software.So the whole chain for one channel would look like this:DDS clock generator -> CPLD + SRAM -> DAC -> VGA -> FILTER -> output amplifierThe SRAM could be 16 bits wide. The bits not connected to the DAC can be used for other purposes (like indicating the end of the waveform and number of loops but this takes some extra logic).Having two synchronous channels is very handy. A lot of stuff has more than one channel. Its nice to test more than one channel at the same time to see if there isn't any cross contamination.Another nice feature is adding noise to the output signal. Good noise is hard to generate with an AWG because the resolution may be too low so its easier to have an analog noise generator and add it to the output through another VGA.Creating a pattern output is quite simple. Just connect a buffer parallel to the DAC and put the outputs on a connector. You'll need one digital output anyway: the marker output. A marker output is a digital signal which is usually generated based on one bit of of the memory. It is mostly used to trigger an oscilloscope (or something else) at the beginning or the signal. Imagine doing a sweep through a filter. If the scope triggers on the marker signal, it can show the filter response as a steady image.*) A CPLD may be a nice solution for this device. Let me elaborate a little on this. About two years ago I was looking for a simple solution to replace a CRT display in a Tektronics TDS510 scope. First I was looking into FPGA solutions. The problem with FPGAs is the need for several voltages and a device to store the program. Not to mention a package with many pins. Then I looked further until I found an XC9572 from Xilinx in a PLCC package. That runs from 3.3V and has 5V tolerant I/O.Last year I got a spectrum analyzer. That had an interlaced CRT display. This meant I needed to store the image first to combine 2 half images into one and send it to the LCD panel. As a complication the TFT panel had only half the horizontal resolution so the CPLD also needed to compress the image and combine the colors. For text it needed to do some anti-aliasing. This sounds complicated but a XC95C144 (TQFP package) has more than enough for flipflops for the job. An external SRAM is used as a storage. The datarate for this device is 10MB/s in and 10MB/s out while being clocked at 20MHz. If you aim for 25Ms/s a 40ns SRAM will do. The CPLDs I mentioned will be happy to run at 50MHz.The problem with these kind of projects is not the hardware but the software. The hardware can be put together in a few weeks. Writing the software to get the AWG to do something usefull will take much longer.

author: teholabs
author_rank: Contributor
timestamp: April 22, 2012, 02:08:13 am
content: I had considered using a CPLD and the SRAM approach you outlined but already had decided against it. There are good reasons on both sides. The FPGA reduces part count board complexity and size by having the SRAM inside it. The CPLD + SRAM is somewhat cheaper way of doing things. But the FPGA is a lot more flexible, extendable and hackable.Although they won't always be used the features like DCMs and DLLs can be helpful to phase lock to reference signals if needed.The CPLD way only saves 10 dollars at best... So I won't be using a CPLD I don't think. If I wanted to do a straight minimum cost AWG that is a good way to do it but the way I am planning will be much more flexible for hacking and upgrades.As far as variable gain amplifier, I don't think it is needed either. The resolution alone is less than 1 mV. Because of power supply cost limitations combined with the PSRR of the amplifiers and DACs, I don't think the output will more than a few times that in terms of stability. (PSRR is perhaps as low as 20 dB since the over all gain is about 20 dB also that means the rail noise will basically show up at the output). The clear path forward is to match the DAC resolution to the effective noise floor I can get at a low cost both in terms of parts, assembly and international compatibility.I will include some free FPGA output pins for free use so if people want the raw DAC bit stream they can copy it there by changing a few lines of VHDL. However I think it very unwise to drive more pins over a long distance than needed in terms of noise. If the design goes 4 layer then perhaps, but I don't want any long high speed buses on the board to minimize RF emissions.

author: nctnico
author_rank: Super Contributor
timestamp: April 22, 2012, 01:24:13 pm
content: Quote from: teholabs on April 22, 2012, 02:08:13 amMore flexibility often means more complexity and an exponentially longer time to develop something!QuoteEven with a 14 bit DAC you'll get > 1mV steps per bit when going for 20Vp-p output swing.IFthe DAC is linear with no missing codes. Better use a DAC with less bits and a VGA. Every AWG I've come across uses a VGA to allow for creating very small signals.QuoteIf you use series resistors on the FPGA outputs the RF emissions will be greatly dampened. Besides that, FPGA output drivers can be switched to low drive strengths and usually the output stages are designed to avoid very sharp edges.

author: teholabs
author_rank: Contributor
timestamp: April 22, 2012, 06:05:01 pm
content: I already have written a first FPGA based core. It isn't going to be exponential for me.You are of course correct that there is no such thing as a completely linear DAC. Using a variable gain would let me effectively select full scale ranges, however it would rely on the linearity of another DAC to generate the control voltage.Also notable is that most DACs are non-linear to a few LSB, another way to remove this linearity issue is to again bury the lowest order bits in noise. (IE use a 16-bit DAC and never use the 2 LSB for instance).The VGA approach will give cleaner small signals without resolution loss for sure so it is worth consideration.

author: Rufus
author_rank: Super Contributor
timestamp: April 22, 2012, 07:02:26 pm
content: Quote from: teholabs on April 22, 2012, 06:05:01 pmCleaner? If you design for 20v pk-pk with a 14 bit DAC and the only amplitude control is scaling the DAC input then when you want a 20mV pk-pk output you have 4 bits left.I would call a 4 bit approximation of the waveform you are generating more than 'dirty'.

author: Unknown
author_rank: Unknown
timestamp: April 22, 2012, 07:23:17 pm
content: On my request, Shafri posted some results from the Hantek DDS-3x25 (which also lacks a VGA and has the DAC output directly connected to the FG output) at very low output levels in a recent(ish) thread. Since it also lacked a proper filter after the DAC, the signals became very ugly at low levels. Without a VGA, you can only sacrifice a few bits to amplitude control before distortion goes through the roof, unless you go design the DAC for a very high effective resolution. A 14-bit DAC configured for 20 Vpp will only have a little over six bits left at 100 mVpp. And this assumes that the LSBs are not lost in the noise floor.

author: nctnico
author_rank: Super Contributor
timestamp: April 22, 2012, 07:35:00 pm
content: If something needs 20Vp-p drive then its highly unlikely it cares about (sub) mV signals. You could increase the number of DAC bits but that just adds extra costs and gains very little accuracy. A VGA solves that problem by trading output swing for accuracy.

author: Unknown
author_rank: Unknown
timestamp: April 22, 2012, 08:31:09 pm
content: If you design this as part of a circuit, sure. But a general purpose generator should serve both purposes, IMO. You might use it for high amplitude signals one day, and for low level signals the next day. My point is that a fixed output stage severely limits your dynamic range. In your current design, what is the minimum amplitude for sinusoidal signals that will still achieve your intended distortion spec, assuming 20 Vpp full-scale?I don't see amplitude accuracy as a particularly important spec for signal gens, although most HP/Agilent generators I've seen are quite good in this respect. Stability is somewhat more important, but shouldn't be a problem with a decent amplifier.

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 22, 2012, 10:24:36 pm
content: Quotei thought the OP considering variable gain amp, not fixed V/bit. i dont see the need for higher bit count if using VGA. 12bits is adequate i think, ofcourse higher is better if budget permits.

author: teholabs
author_rank: Contributor
timestamp: April 22, 2012, 10:39:19 pm
content: A VGA will probably be included. Although it is clear that you loose huge numbers of bit for small amplitudes the true AWG part isn't likely to be able to make dynamic use of the VGA. It simply would set the full scale range.So let's say you want a small sine wave on a DC level then you are limited in resolution for the small sine part. Of course you could produce a summing circuit, calculate the mean value of the wave form set that as a DC level and then reference all samples from that offset, to increase the dynamic range of the AC part of the waveform.There are any number of ways to do this sort of thing. Each has its own trade offs. With 14 bit resolution you have about 0.5 mV resolution into a 50 ohm load with a +/-10V high Z swing design. Now it all depends on what you want to put the AWG into. I for one have no use for a sine wave that is only 2 mV in amplitude. Amplitude and time quantization both are relevant in terms of spectral purity.Anyway having a VGA is a good suggestion and as I said likely to be included, but not including one isn't a bad design either just a different one. After all its function is basically variable attenuation and you can always do that before input the whatever you are outputting the signal to. Clearly not as convenient but not a big deal either particularly at these fairly low frequencies.Anyway I hear you guys who want one! So I will consider including one.So far I have heard VGA, two channels, and 10 V into High-Z as recurring requests.

author: Unknown
author_rank: Unknown
timestamp: April 22, 2012, 10:59:14 pm
content: I agree that external attenuation/amplification is definitely viable, although it would require another computer interface if you want to make it programmable. For a bench instrument, however, a certain versatility is expected, in my opinion. Just like I expect internal current shunts from the high uA range up to a few amps on a modern DMM, or a probe cal output on a scope.Is the DC offset problem you state really a problem, i.e. shouldn't your output signal be the sum of the DAC output plus a DC offset signal anyway? I'm guessing your DAC outputs signals between 0 and VDD, how do you handle its DC offset? Will the signal be AC coupled, which will remove the ability for any DC offset? Or is the DAC biased so VDD/2 out of the DAC becomes 0V at the output? I'm not expecting you to make it as complex as your average Agilent generator, but it should at least have some way of generating signals with and without a variable DC offset. For example a sine wave for an audio circuit or a pulse train as digital clock signal.

author: teholabs
author_rank: Contributor
timestamp: April 22, 2012, 11:05:12 pm
content: Most high speed DAC I have looked at are current mode differential. I don't think I will use a DC offset. There is an I/V stage followed by other stuff.The system is DC coupled so to produce a DC offset you just command the DAC rather than doing it in analog domain, that was what I was referencing.Because of the nature of the scheme I am planning for the VHDL core it doesn't really make any sense to use DC offsets in analog domain, plus it is another part you have to null when you manufacture. So I am almost certainly not going to do that. If someone gives me a massively compelling reason perhaps I will reconsider that also.VGA is again a possibility but this has to be done to a budget and there is a reason some AWGs cost more than others. I can't add everything for a low cost and I think reasonable features at low cost is the most important thing. Lots of people don't own a function generator of any sort...Making a killer AWG that is as good as a 4000 dollar Agilent at 500 dollars is probably possible, but I'm not interested in trying to do that for the first design. I want something people can afford. We shall see what makes the cost cut in terms of features.

author: nctnico
author_rank: Super Contributor
timestamp: April 22, 2012, 11:51:23 pm
content: Let me throw a curve ball here:IMHO the hardware is not very interesting. The hardest part on this project is going to be the software. If you would have a software core which can produce waveforms based on desired output waveform and hardware limits and a GUI module it would not matter what the hardware can do. You could have a small microcontroller with an I2S codec to produce waveforms for audio frequencies or have an ultra high speed DAC for hundreds of MHz and everything in between. If the software eco-system is there, then it is much easier to slap some hardware together and get going.If I look at my Lecroy LW420 AWG its very clear that most of the design effort went into the software.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 12:24:22 am
content: I think (know) the software is pretty trivial honestly.SciLab/Matlab will be used to generate the waveforms. Do any math you want plot them to see they are right, import and rescale anything you want from any source you want then run a script (in SciLab or Matlab) to download the waveform.There will also be a terminal interface, and perhaps a Python module. SciLab and Python and both free. Terminal is free too, file format to download a waveform will just be raw binary so not really complex if people want the write their own front ends. Most everyone should be able to learn Matlab/SciLab if they don't already know them. I can have the script warn if you exceed the max swing. The sampling can just be done via linear interpolation for any high density numerical waveform. (IE make your time space very small and then the script will calculate the right values from whatever you have drawn).On the full scale output range stuff, the DAC itself has some ability to do that. There is a pretty big trade in spectral purity to use a VGA honestly it might not be worth it. Its more or less an extra 20 dB of THD. Not great...

author: Unknown
author_rank: Unknown
timestamp: April 23, 2012, 12:26:29 am
content: Fair enough. In your original post you mentioned that you expected it to be comparable to the low-end Rigol and Agilent AFGs, which all have a fully featured output stage (gain, DC offset, floating outputs).Things lacking in most affordable commercial designs would be output stage (eg. Hantek), sampling rate and memory depth. Addressing these in your design will each add significant BOM cost and complexity, however. Competing with Hantek prices would probably be hard.Quote from: nctnico on April 22, 2012, 11:51:23 pmOr you could do like Rigol and produce crap software which can import from the Tektronix software.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 12:30:08 am
content: The analog supply is floating so it can perhaps be floating outputs. Not independent though between channels if there are more than one (common BNC shield).There will be DC offset of course, just not independent of full scale range I don't think. Certainly a independent nice analog DC offset would be superior, I'll consider everything. But we don't really need to get tied down in the more obvious engineering tradeoffs.I'd rather stay big picture. There was basically one person interested in really deep memory and someone who felt 10 V into high Z was essential. Those types of things...

author: amspire
author_rank: Super Contributor
timestamp: April 23, 2012, 02:31:18 am
content: What sort of filtering are you thinking about for the DAC output of the arbitrary waveforms? Are you thinking about a high order filter with flat group delay, or something fairly basic. Having a high sample rate is wasted if it is followed by a filter with variable group delay.I do regularly use the DC offset feature of my HP 33120A, so I would miss it if you cannot provide it. But then again, a wideband power amplifier would be a great project for someone to tackle, and a DC offset feature could always be added to the amplifier.On the software front, what you are proposing sounds great. For me, as long as the AWG can take data in a simple format, and there is a fairly simple way to load it into the generator, then I would be happy. Nicer utilities can always be created later.Richard.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 03:17:49 am
content: You are worried about the dispersion of the filtering if I follow you? I presume that would show up the worst by looking at pulses where we have all harmonics essentially via the sharp edges.Be specific about what distortion you are worried about. How much group delay is tolerable to you?Some of the less expensive filters don't have group delay or phase in the datasheets sadly. Current filtering is low cost ceramic filters at each active stage, giving a high order roll off over all, but currently unknown group delay (probably not good, but honestly the current prototype is just for writing VHDL :-) and getting something to look at on my scope!).

author: amspire
author_rank: Super Contributor
timestamp: April 23, 2012, 03:53:18 am
content: I honestly could not give you filter specs without sitting down, designing filters and looking at the resulting waveforms.I guess a basic test is just output a squarewave at 1/10th of the sampling rate, and if you get something that looks reasonably like a rounded squarewave , then you are not doing to badly. It is the sharp cuttoff filters in particular that give you the maximum sinewave bandwidth that are the worse for arbitrary waves. Squarewaves come out with massive ringing on the edges.Flat group delay filters such as a Bessel filter gives you a waveform out that is closest to the waveform you intended to get out, unless the waveform is a sinewave in which case group delay is irrelevant.Richard.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 04:56:39 am
content: All the waves I have used look nice (Gaussian pulse, square, triangle, sawtooth, sine). There is some overshoot on the hard edges (It doesn't ring though, close to critically damped). The bandwidth is just less than 50 MHz currently. I can't find data on the TDK PI filter I choose but the similar T filter is flat to 4-5 ns across the bandwidth with the low frequencies being the worse. I am going to try to look at the jitter in detail. I'll try to check the group delay when I get to that point. There are some very flat filters from mini-circuits. My main beef with that is just the cost for assembly if it isn't reeled, I am not going to select any parts I would have to place myself. I'll probably just look around for a cheap but reasonably flat Pi or T filter for each stage. I assume you are only concerned about the passband not some phase margin issue for some later stage, since this is open loop effectively I can't see how it could be that you are worried about.

author: amspire
author_rank: Super Contributor
timestamp: April 23, 2012, 05:03:45 am
content: I am only concerned with waveforms out of the filter that look nothing like the waveform you programmed.There is every chance those very flat filters from Mini-circuits will be ugly for abitrary waveforms. In general, flat passband means really bad group delay and really bad waveforms at the upper end of the frequency range. A response that slowly rolls off will probably give good waveforms.If is common for abitrary waveform generators to have two filters - one flat one for sinewaves, and one non-flat one for everything else.Richard.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 05:06:18 am
content: I meant flat in terms of group delay. Like ridiculously flat 0.5 ns across 50 MHz. But at a price. Here is an example:http://www.minicircuits.com/pdfs/SXLP-40+.pdfI'm not likely to source such a filter though.The filters I am using are only currently 2nd order so probably not sharp enough to really mess up the AWG. Don't worry I will check many waveforms and measure them verse what I wanted it to output, plus I will measure as much of the time domain stuff as I can.I can maybe take a filter in and measure the S-parameters directly since there is no data yet for the one I selected. (There is data for the analogous T filter but not my Pi).

author: amspire
author_rank: Super Contributor
timestamp: April 23, 2012, 06:07:07 am
content: Quote from: teholabs on April 23, 2012, 05:06:18 amThat filter is not great for group-delay between 40MHz and 50MHz. A Bessel filter is genuinely flat to well in the stop band.A Butterworth filter is a good compromise between flat passband and reasonably flat group delay. The point is say you want to represent a 10MHz non-sine waveform. It will have harmonics at 20MHz, 30MHz, 40MHz and 50Mhz that are in the passband. In the Bessel filter, all those harmonics will have the correct phase relationship to the fundamental. With that microcircuits filter, the 4th harmonic will be out by almost 180 degrees, and higher harmonics even weirder.The problem with a Bessel filter is that if you want it 40dBdown at 100MHz, then the filter will probably start to roll of at 10MHz, unless you go for a really high order filter.Richard.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 06:16:42 am
content: I was reading the table wrong all the way across sorry. You are quite right there were others that were better... I just picked the wrong one quickly by reading the table wrong. IE 50 = 19.85 ns, not 88 ns :-P.

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 06:17:57 am
content: Quote from: Mechatrommer on April 23, 2012, 05:33:00 amThanks Mechatrommer. It will mostly be PC based but some people have asked for at least some stand alone controls.I will certainly be punishing detailed specs and complete firmware for the microcontroller (ATMEGA32U4 currently) and the VHDL core (basically a memory mapped SPI controlled device).Because the AWG is basically a memory mapped peripherial the uC just sends the samples to the FPGA. It might convert them to binary offset format or the VHDL core might do that I haven't decided, the memory array is actually 14 bit samples but I will likely specify a 16 bit input format both because of the byte wide SPI transfer bus and the standardization for 2s complement for writing samples. There are ASCII command for macros of opcodes to the FPGA core. I will all become clear when I start to publish the codes after the kickstarter is started.In matlab speak all you do currently is:fid = fopen('data.bin', 'w');fwrite(fid, array, 'int16', 0);fclose(fid);Assuming array is the raw samples you want to "play", then you just upload the file. Eventually it will just take an inline function IE "x*sin(x)*exp(-x)" and turn that into samples all for you.If you want to use the phase accumulator the format for the data file to send is almost certainly going to be just:16384 signed integers no header.But there will be a full spec written when I am done.

author: nctnico
author_rank: Super Contributor
timestamp: April 23, 2012, 10:42:34 am
content: If you are going to use Matlab isn't it easier to get some d/a converter card from Ebay? What is the point of building an AWG without user interface (even if the user interface sits on a PC)?

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 05:01:12 pm
content: As I have been over at least once on this thread already, there is no such board at the price I am aiming for with the features I want. I am aiming sub 200 dollars. There is no known AWG to me for that price besides the Hantek.Even if there was there are still many good reasons to build one:First it will be entertaining. I design because I like to design.Second it will be open. Just because a commercial product exists at a similar price point doesn't exclude an open one. Open ones are more fully documented and easier for people to improve and modify. Along with this there is the opportunity for those on a very tight budget to just get the PCB and use their own labor to replace the assembly cost (which is a large percentage of the total for a 100 unit size run), making it even more affordable.Personally I think a math program is better than any other possible interface for an AWG. It has absolutely no limitations on what you can do to create the waveforms. It allows you to script and program them, and it will allow serial control of the device in program. Though LabView remains the most popular instrument control software, I find the programing paradigm (visual) silly, though LabWindows is better, I would still end up using Matlab to do the analysis so I might as well take the data in Matlab (which I do over GPIB for my University research).There will be an optional physical interface, and simple ASCII commands for those who want the normal stuff you'd find on a front panel. But for creation of complex waveforms a complete computer algebra system really has no parallel for data processing. Matlab has symbolic math available even. I realize that not everyone has Matlab so I will certainly make sure things work with free SciLab as well. Typing for instance awgPerodic(awgA, 'sin(x)*0.5*sin(3x)', 'repeat', 5, 1e6) is a user interface, just not a visual one. (But it can pop up a plot before running the wave to make sure it is what you want).

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 05:58:07 pm
content: Bus Pirate is very very popular right? It is nothing but a serial terminal. I am aiming to start with that crowd as a base of users.There is a huge pool of people who know C like languages. I agree it isn't everyone who would want an AWG, but it is nearly all the people who probably want to tinker with an open one.For those who don't, there will be a physical LCD + buttons interface. You are right that sine, square etc is going to be the most common so it will be easy with the physical add on interface for those who want a stand alone box. (IE freq, amplitude, offset, type).I honestly don't view typing awgSine(1e6, 1, 0.5) is too much work for people verse clicking many places with a mouse on some GUI. You can disagree if you like, and that is fine but it is only sensible that I build something I want not what someone else might want as a starting point (given I could sell 0 of them).

author: nctnico
author_rank: Super Contributor
timestamp: April 23, 2012, 07:38:44 pm
content: Did you look at this product?http://www.drdaq.com/datalogger.html

author: teholabs
author_rank: Contributor
timestamp: April 23, 2012, 11:31:18 pm
content: So the AWG on that device is 2 MSPS. It it runs to 20 KHz. You can get that out of a 3 dollar microcontroller and a simple voltage mode SPI DAC.I am building something that runs at 160 MSPS, the bandwidth required is 2.245 Gbit. More than USB 2.0 to go at the full sample rate. They are very different. (I assume you are suggesting this device to me as a competitor).The markup on the DrDAQ hardware is about 500, maybe 1000%. I plan on far smaller margins to give better value to those who would use my AWG.

author: nctnico
author_rank: Super Contributor
timestamp: April 24, 2012, 07:08:12 am
content: The DrDAQ comes with a complete software package to create waveforms. You should factor that into the price as well.

author: teholabs
author_rank: Contributor
timestamp: April 24, 2012, 03:03:30 pm
content: So will mine. I'm sorry you don't like my design choice. I don't know if you don't understand it or just don't like it but no matter how great their software is my approach is more flexible. I doubt their software even knows what a polylog is for instance. Hopefully you will reserve judgement until you see how easy it is to use what I have planned.I generally don't factor software into cost comparisons. I like to use open software which is free and modifiable. In addition software reproduction is free meanwhile hardware is not. In a long term amortization software, even commercial software you paid to have made costs nothing, so I don't factor it into the price. I agree many people are willing to pay money for software so it affects the price you can charge for something, but since I believe in open source, the software stack whatever it is will be free.

author: nctnico
author_rank: Super Contributor
timestamp: April 24, 2012, 09:04:26 pm
content: Open source software isn't free. Like they say: it's free as in speech, not as in beerIt is a shared effort. The various patches I submitted to several OSS projects over the last several years represent months of paid work. I don't mean I could have been paid for doing the work; I was getting paid for doing the work.Anyway, I do see the use of a math package to create complex waveforms. I do the same when I want to create something the software on my LW420 doesn't allow (or is too cumbersome). I think for your AWG to sell to the general public it needs at least a simple way to generate standard waveforms (sine, square, triangle, sweeps). When importing waveforms you'll need a tool to check the waveform for compatibility with the hardware (length, sampling frequency, amplitude, filtering). When I look at test equipment I see that most manufacturers are putting a lot of effort in making things simple. If I look at some of my older digital test equipment the user interfaces are not very intuitive.

author: Unknown
author_rank: Unknown
timestamp: April 24, 2012, 09:19:53 pm
content: Doesn't MATLAB have some GUI capabilities? I'm not sure how much of this is implemented in the open-source clones (Octave and Scilab), but this might be an easy way to provide a simple interface for the basic signals if you design it around MATLAB.

author: teholabs
author_rank: Contributor
timestamp: April 24, 2012, 10:53:24 pm
content: Yes Matlab has GUIDE but none of the clones have it. I will be sticking (feature wise) to what I can do in SciLab and will likely have a Matlab port.I thought I had stated this clearly, but let me try again.For basic stuff there will be an optional physical interface with buttons.(Optional so it does not add cost to those who do not need it). No one is going to find this thing hard to use to make a standard waveform.Matlab, SciLab, Python, etc will just be for complex stuff and people who prefer to have scripts.