Will ST add HS-USB to STM32 at some point ? - Page 1
Forum section: electronics / general

author: Koen
author_rank: Frequent Contributor
timestamp: July 05, 2016, 11:26:37 pm
content: Hello,I was wondering if anyone of you knew of a roadmap for ST to add HighSpeed-USB to their MCU ? Not the external PHY ULPI solution, a native HS-USB implementation.If I recall correctly, some NXP LPC parts had it for years.Thank you,Koen

author: MosherIV
author_rank: Super Contributor
timestamp: July 06, 2016, 06:50:24 am
content: HiI might be incorrect, it is early (for me) in the morning and I am going by memory.I think Stm32 already support 'hs' - this was stupid marketing which was suppose to sell to consumers.If I remeber rightly HS actually refers to USB 1.The stm32 support usb1 & 2 so should already support hs.

author: hans
author_rank: Super Contributor
timestamp: July 06, 2016, 07:11:34 am
content: No, since USB1.0 we have 1.5Mbit/s LS devices and 12Mbit/s FS devices.USB2.0 is an updated protocol, and you will see most devices boasting USB2.0 protocol compatability. Additionally, USB2.0 has a negotiation feature that can bump the speed up to 480Mbit/s (USB HS).For example the STM32F407 chip has 2 USB peripherals; an embedded USB FS OTG peripheral with integrated phy. But if you want to use USB HS you must add an external USB ULPI phy, which means routing a 60MHz 8-bit + control parallel bus on your board.Indeed, the STM32F4 could very much use this. E.g. PIC32MZ also has an integrated USB2.0 HS Phy in them, although I haven't used it so can't tell much about bugs or ease of use.

author: Jeroen3
author_rank: Super Contributor
timestamp: July 06, 2016, 07:35:08 am
content: A USB phy takes an enourmous amount of space due to the fast output drivers for several meters of wire.I can't find any die photo's right now. But I've seen a die, and the usb takes up almost half of the die.edit: found onehttp://www.m31tech.com/eng/products/USB2.0.html

author: Brutte
author_rank: Frequent Contributor
timestamp: July 06, 2016, 08:09:08 am
content: You would like to put a 480MHz IC on a ~120MHz die. That does not look like economically viable solution. Doable but expensive. Besides ULPI PHY is 1$ in volume so I do not see the point of integrating that.Also mind HS is 40MB/s which means that if you would like to process that with 120MHz uC, you have to do it in 3 clocks per byte, average!! Thus Cortex M3 is not capable of any reasonalble processing of that stream.You can do more with Cortex M4 as it has DSP engine as it performs some 8-bit operands 4x faster but that would be the bordering edge, asm loops etc.

author: Koen
author_rank: Frequent Contributor
timestamp: July 06, 2016, 09:10:39 am
content: Thank you guys. It seems Atmel SAM, NXP LPC, Microchip PIC32, FreeScale Kinetis and probably others in the same league as STM32F7 have variants with on-board HS PHY. I'm very space constrained and would have to move to LQFP-144, add a QFN32 PHY, a 1.8V LDO and the ULPI pins on the STM32 have been, mmmh, randomly placed which doesn't help. I'll probably forget it.Anyway, if you know a similar chip to STM32F7 with > 256K RAM, HS-USB, parallel memory controller and a low power timer, please fill me in.

author: Brutte
author_rank: Frequent Contributor
timestamp: July 06, 2016, 09:32:10 am
content: STM32F7 application and QFN32 space constrained??How much of real estate does your TFT + SDRAM interface occupy then?

author: Koen
author_rank: Frequent Contributor
timestamp: July 06, 2016, 09:38:14 am
content: There's other chips on board but they use UART and SPI which all MCU provide.PIC32MZ1024ECG100 looked promising but there's no interface to SD cards aside SPI ?

author: Kilrah
author_rank: Unknown
timestamp: July 06, 2016, 09:44:34 am
content: Again what's your reason for wanting USB-HS? As already mentioned you might be looking for something that's actually useless. For example your reason is fast access files on an SD card it would be totally useless to have USB-HS since on an STM32 the bottleneck already isn't USB even in FS mode.Unless you do things with practically no overhead (think Saleae Logic analyzer, read an 8-bit port and send that through USB without any processing) you're very unlikely to saturate an FS link.

author: Koen
author_rank: Frequent Contributor
timestamp: July 06, 2016, 10:03:06 am
content: Well that's a good point actually. I spent the night going from datasheet to datasheet without wondering about this point.So, I've got a nice hobby prototype. The only thing I'm sad about is that the transfer of files from it to the computer through USB-MSC is painfully slow (850KB/s).And now I can't even find benchmarks of MSC using the onboard FS and external HS so I'll head to sleep.

author: Bassman59
author_rank: Super Contributor
timestamp: July 06, 2016, 07:56:58 pm
content: Quote from: Kilrah on July 06, 2016, 09:44:34 amFull-duplex stereo digital audio at sampling frequencies greater than 48 kHz requires High Speed USB.

author: timb
author_rank: Super Contributor
timestamp: July 06, 2016, 08:26:11 pm
content: Quote from: Bassman59 on July 06, 2016, 07:56:58 pmNo it doesn't.... Maybe if you're talking about a 8x2 channels of 48khz 192kbit DTS or something... But just standard 2 channel stereo doesn't.Sent from my Smartphone

author: bktemp
author_rank: Super Contributor
timestamp: July 06, 2016, 08:45:22 pm
content: Quote from: Kilrah on July 06, 2016, 09:44:34 amUsing an STM32F469 with an external ULPI USB-HS phy I can read files form an USB drive at 13Mbytes/s and write at 8Mbytes/s. There are many applications where the high data rate is useful.Using USB-FS you can hardly reach more than 1Mbyte/s. It makes a big difference if the user has to wait 1s or 10s for something to write or read.

author: Bassman59
author_rank: Super Contributor
timestamp: July 07, 2016, 07:02:08 pm
content: Quote from: timb on July 06, 2016, 08:26:11 pmFull duplex, which is simultaneous record and play, stereo 96kHz 24-bit audio (in other words four channels), requires about 9.2 Mbps bandwidth, which is less than the 12 Mbps wire speed, but when you consider that the OS generally reserves about 10% of the bandwidth for the control pipe, and otherother overhead, in practice it doesn't work. Hence, the need for High Speed USB.

author: dgtl
author_rank: Regular Contributor
timestamp: July 07, 2016, 07:10:20 pm
content: I've pushed the STM32F205 USB to 30MB/s. Totally doable, the uc is running at 120MHz, data is lifted by DMAs and everything goes 4-bits at a time (32-bit busses). Also I've reached 21MB/s download speed from 8-bit eMMC flash via USB to host. The limiting factor was the small block read speed of eMMC or the lack of buffer ram (I used only internal SRAM); eMMC (like SD cards) does not perform well doing small block reads; going larger was not possible due to lack of memory. Self-written bare-metal code, triple buffering, one DMA is pumping data from eMMC to SRAM, another DMA is pumping data to USB. The cpu does not touch the data, just handles buffer pointers.Around 30-40MB/s is the limit of HS usb. 480Mbit/s is the signalling speed, the protocol has its overhead. In addition, most host controllers have limits of how many transfers they can schedule in one microframe, this limit also limits the total throughput.So HS usb is very appropriate for 32-bit controllers, even cortex-M3.

author: langwadt
author_rank: Super Contributor
timestamp: July 07, 2016, 07:23:40 pm
content: Quote from: dgtl on July 07, 2016, 07:10:20 pmafaik alot of the usb flash, usb parallel bus interface, etc. ICs are basically fancy DMA and an 8051

author: Rasz
author_rank: Super Contributor
timestamp: July 08, 2016, 01:32:25 am
content: Quote from: langwadt on July 07, 2016, 07:23:40 pmas are usb 3.0 ones, for example GL3220 based flash card readers (Transcend TS-RDF5K, Lexar® Professional USB 3.0 Dual-Slot UDMA7 Reader)GL3220 is 8051 + dma datapump reaching >120MB/s with no problem in CF mode (16 bit parallel bus), firmware is small and easy to understand, would be perfect for adopting into hobby projects as a cheap USB 3.0 interface if not for lousy availability of those chips (only shady alibaba listings)

author: Brutte
author_rank: Frequent Contributor
timestamp: July 08, 2016, 08:24:33 am
content: Quote from: dgtl on July 07, 2016, 07:10:20 pmDo you read what you write?3 CPU clocks for each processed byte.How many algorithms are there that can be accomplished in 3 clocks on CM3?

author: Jeroen3
author_rank: Super Contributor
timestamp: July 08, 2016, 08:44:58 am
content: The core can do 4 bytes per read/write on aligned data. And it has LDM and STM instructions to have 1 instruction for 7 word read/writes. If I'm reading the manual correctly. (I always let the compiler sort this stuff out for me)But it still does not compete with a single bit write "start dma" though.

author: Koen
author_rank: Frequent Contributor
timestamp: November 12, 2016, 05:37:11 pm
content: STM32F7x3 will have an on-chip high-speed USB PHY.

author: bobaruni
author_rank: Regular Contributor
timestamp: November 13, 2016, 02:20:39 am
content: Unfortunately the new STM32H7 doesn't have a HS phy included, still need to use en external ULPI phy.I wonder why they would do this on possibly the fastest cortex M ever made.

author: westfw
author_rank: Super Contributor
timestamp: November 14, 2016, 02:14:29 am
content: QuoteSure, but there are plenty of "averagedata rates" in between ~1MB/s ("full speed") and the ~40MB of "HS" that are sensible on a typical CM3...

author: dgtl
author_rank: Regular Contributor
timestamp: November 14, 2016, 08:45:57 am
content: And in addition to that, some use cases do not require processing. For example, the data is processed and stored to flash; fast USB is needed to download the flash contents at one go. Although the USB HS is 480Mbit/s, the real maximum throughput is around 35MB/s and this varies with different host adapters (depends on how many transfers per microframe can be scheduled). The clocks-per-byte metrics is not the best because the cortex-m has internally 32-bit AHB bus; so 120/35*4~=13.7 clocks per bus cycle. This is totally doable with DMAs.Personally, I've pushed 25MB/s from eMMC flash to HS usb via STM32F205 in a data logger application (read back 8GB data). Using a low/full speed USB would have been terribly slow. Internal PHY would have been useful. Without reading from flash, 30MB/s was no issue; flash read speed was the bottleneck.ST told that H7 uses smaller process; perhaps the PHY was not available in that process or they decided not to incldue it. Or they included it and it did not work, so they are not including it in specs.

author: Brutte
author_rank: Frequent Contributor
timestamp: November 14, 2016, 08:59:19 am
content: Quote from: westfw on November 14, 2016, 02:14:29 amI guess these intermediate {1MB/s : 40 MB/s} speeds explain why some ~100MHz uCs support HS. I am sure there are even s'lower performance uCs that do HS.Perhaps not pointless on 120MHz CM3 but IMHO that HS is a niche application only for a 3 to 119 clocks algorithm per byte (average, including USB servicing, IRQs etc).Going same route, with an assembler and just DMA streaming (no processing) the data, one could hit 41MB/s limit. 120MHz CM3 with SS

author: kfishy
author_rank: Newbie
timestamp: November 14, 2016, 04:15:36 pm
content: Cypress did integrated USB-HS Phy on 48MHz 8051's so certainly a 120MHz or higher Cortex-M should be able to handle it no problem.

author: mac.6
author_rank: Regular Contributor
timestamp: November 15, 2016, 03:07:58 pm
content: NXP Kinetis K65/66 have integrated USB OTG HS + phy (and one LS/FS + phy). It also have sdram controller and lp timer, but BGA.

author: bobaruni
author_rank: Regular Contributor
timestamp: November 15, 2016, 03:21:11 pm
content: NXP also include HS in a few LPC's, the specs for routing the USB D+ and D- lines are a bit particular so maybe ST excluded HS as it could get unreliable if the PCB is not designed well enough....

author: tszaboo
author_rank: Super Contributor
timestamp: November 15, 2016, 03:40:12 pm
content: Quote from: westfw on November 14, 2016, 02:14:29 amExactly. The 480 mbit/s does not have to be constantly piped into your micro, it is only the peak speed for one USB controller (!= endpoint). If you want to send 16mbit/sec, you need high speed. For example a 16 bit sample, every 100 clock cycles.But the way I see it, small micros dont have Ethernet Phy and USB Phy built it, because they use low power semiconductor nodes, and the frequencies are large.

author: andersm
author_rank: Super Contributor
timestamp: November 15, 2016, 04:02:32 pm
content: High speed could also be useful if latency is very important.(I've never understood the point of "will company X do Y" threads. If anyone knows, they probably can't tell.)

author: Koen
author_rank: Frequent Contributor
timestamp: November 15, 2016, 09:31:36 pm
content: (It isn't about insider's informations. They could have released an updated roadmap mentioning it which I could have missed. For example, the recent ST newsletters mention STM32H7 but not (yet) this first onboard-HSUSB MCU. I stumbled upon it while looking for a datasheet.)

author: tszaboo
author_rank: Super Contributor
timestamp: November 16, 2016, 11:02:03 am
content: Quote from: Koen on November 15, 2016, 09:31:36 pmH7 was released last week on Electronica. It is an M7 like the STM32F7, but faster 400MHz, more memory. While 400MHz is close to 480, I guess it is possible, you need something to run twice the speed in the core? Or they just dont have IP, or doesnt want to increase the price with the IP.

author: kfishy
author_rank: Newbie
timestamp: November 16, 2016, 02:01:00 pm
content: A commenter above mentioned that the STM32F7x3 will have integrated HS Phy, so obviously ST is able to do it on their 90nm process. My guess is they were rushing to push the H7 out so they can claim the "fastest Cortex-M7" mantle, and that means re-using all the existing peripherals.

author: satrapes
author_rank: Newbie
timestamp: May 06, 2019, 08:11:16 pm
content: I know the thread is old but it comes up as top page in my google search.Update:https://www.st.com/content/ccc/resource/technical/document/application_note/group0/0b/10/63/76/87/7a/47/4b/DM00296349/files/DM00296349.pdf/jcr:content/translations/en.DM00296349.pdfTables 3 and 5 indicate that STM have finally integrated an HS phy in the STM32F7x3, STM32F730Z/I lines.