ATSAMC21 Rx Buffer Issues - Page 1
Forum section: electronics / general

author: dmerry03
author_rank: Newbie
timestamp: December 16, 2022, 02:18:31 pm
content: Hello all,I am currently developing an ATSAMC21 (SAMC21 Xplained development board) MCU to listen to CAN messages. I am developing on Embedded Workbench for ARM by IAR, and I am writing in strictly Assembly. I am having no trouble compiling or running my code. I have configured (or at least tried to) the MCU in such a way that I have two filter elements, and the frames matching these filter elements get stored into Rx Buffers in RAM. I have even made it so my Rx Buffers are located at the beginning of RAM (Addr: 0x2000'0000). I have tried to keep it as simple as possible and disabled all transmission of data, as well as the Rx FIFO's. My GCLK serving the CAN peripheral is configured at 16Mhz, from the 48MHz internal oscillator. The CAN bus is set for 500Kb/s, no 29-bit headers, no CAN-FD.Now when I send a simple CAN frame, sometimes it will store the message without any issue. But then at other times, it will flip the data received into the buffers. Example below.Frame Sent Data0x123 11 22 33 44 55 66 77 88Data ReceivedAddress0x20000000 Buffer Register 10x20000004 Buffer Register 20x20000008 44 33 22 110x2000000C 88 77 66 55And then after sending the same message a random number of times, the data will be stored as:Address0x20000000 Buffer Register 10x20000004 Buffer Register 20x20000008 88 77 66 550x2000000C 88 77 66 55Or it will be stored as:0x20000000 Buffer Register 10x20000004 Buffer Register 20x20000008 88 77 66 550x2000000C 44 33 22 11When the data comes in erroneously as in method 2 and 3, the CAN0_IR.MRAF bit will be set. I never enabled this interrupt, but it sets itself regardless. I am following the Rx Buffer Handling procedure detailed on page 614 of the datasheet. And I cannot understand the register description of the CAN0_IR.MRAF bit.My CAN0 setup and interrupt are attached.Link to the datasheet here:https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/DataSheets/SAM-C20-C21-Family-Data-Sheet-DS60001479J.pdfI have given it a good read, at least the parts that I am trying to understand.Can anyone tell me if I am missing something in my setup?

author: dmerry03
author_rank: Newbie
timestamp: December 16, 2022, 02:20:46 pm
content: File didn't attach the first time. I tried again here. Otherwise code is below:oscillator_setLDR R1,=OSCCTRL_OSC48MCTRLLDR R0,=0x00070282 ;...1014:0x82 - On Demand | Enable OscillatorSTR R0, ;...1015:0x02 - 0010 div = 16MHz;...1016:0x07 - 1024 Clock Cycle Startup (64us)clock_gen_set_1LDR R1,=GCLK_SYNCBUSY ;Load the SYNCBUSY StatusLDR R0,LDR R2,=0x00000008 ;Look at bit 3ANDS R0,R0,R2 ;If bit 3 is set,BNE clock_gen_set_1 ;then check the SYNC status againLDR R0,=0x00000306 ;elseLDR R1,=GCLK_GENCTRL1 ;Enable Generator 1STR R0,;Attach CAN0 to GCLK1LDR R1,=GCLK_PCHCTRL26_CAN0LDR R0,=0x000000C1STR R0,;*******************************************************************************; CAN 0 Setup;*******************************************************************************can0_set;Read the AHBMASK Register and modify it to enable CLK_CAN0_AHBLDR R1,=MCLK_AHBMASKLDR R0,LDR R2,=0000'0000'0000'0000'0000'0001'0000'0000BORRS R0,R0,R2STR R0,;Enable Line 15 of the NVICLDR R1,=NVIC_ISERLDR R0,=0000'0000'0000'0000'1000'0000'0000'0000BSTR R0,;Enable CAN0 Register ConfigurationLDR R1,=CAN0_CCCRLDR R0,=0000'0000'0000'0000'0000'0000'0000'0011BSTR R0,;Enable Bus Monitoring ModeLDR R0,=0000'0000'0000'0000'0000'0000'0010'0011BSTR R0,;Configure Quality of ServiceLDR R1,=CAN0_MRCFGLDR R0,=0000'0000'0000'0000'0000'0000'0000'0011BSTR R0,;Configure Data Bit Timing and PrescalerLDR R1,=CAN0_DBTPLDR R0,=0000'0000'0000'0001'0000'0101'1000'0011BSTR R0,;Configure Nominal Bit Timing and PrescalerLDR R1,=CAN0_NBTPLDR R0,=0000'0110'0000'0001'0000'1010'0000'0011BSTR R0,;Configure Enabled CAN Interrupts;XXXXXXXXXXXXXXXXX MAY NEED TO CHANGE THIS XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXLDR R1,=CAN0_IELDR R0,=0000'0000'0000'1000'0000'0000'0000'0000BSTR R0,;Enable CAN Interrupt Line 0LDR R1,=CAN0_ILELDR R0,=0000'0000'0000'0000'0000'0000'0000'0001BSTR R0,;Standard Frame ID Filtering;Reject remote frames and non-matching framesLDR R1,=CAN0_GFCLDR R0,=0000'0000'0000'0000'0000'0000'0011'1111BSTR R0,;Number of filter elements: 2;Filter List Start Address:LDR R1,=CAN0_SIDFC;Load the address of filter element 0LDR R0,=can0_sf0LDR R2,=0x20000000SUBS R0,R0,R2;Filter elements number specification: 2LDR R2,=0000'0000'0000'0010'0000'0000'0000'0000BORRS R0,R0,R2STR R0,;Configure the Rx BufferLDR R1,=CAN0_RXBC;Load the address of Rx Buffer 0LDR R0,=can0_rxb0_0LDR R2,=0x20000000 ;Start of RAMSUBS R0,R0,R2STR R0,;Rx buffer is already set to 8-Byte data field;Rx Buffer / FIFO Element Size Configuration;LDR R1,=CAN0_RXESC;LDR R0,=0000'0000'0000'0000'0000'0000'0000'0000B;STR R0,;Enable CAN0 and Lock Configuration RegistersLDR R1,=CAN0_CCCRLDR R0,=0000'0000'0000'0000'0000'0000'0000'0000BSTR R0,;*******************************************************************************; Initialize RAM Variables;*******************************************************************************can0_filter_set;Standard ID Filter Element 0;[31:30] = Classic Filter => 10B;[29:27] = Store into Rx Buffer (Ignore [31:30]) => 111B;[26:16] = Frame ID: 0x123 => 001'0010'0011B;[15:11] = Reserved => 0'0000B;[10:9] = Store into an Rx Buffer => 00B;[8:6] = Event pin => 000B;[5:0] = Buffer Element Number: 0 => 00'0000BLDR R0,=1011'1001'0010'0011'0000'0000'0000'0000BLDR R1,=can0_sf0STR R0,;*******************************************************************************;*******************************************************************************;*******************************************************************************; Beginning of MAIN CodemainB main;*******************************************************************************; CAN0 Interrupt Routine;*******************************************************************************CAN0_Handler__can0_handlerCPSID I;Clear the interrupt flagsLDR R4,=CAN0_IRLDR R3,=0000'0000'0000'1010'0000'0000'0000'0000BSTR R3,;Clear the new data in buffer flagsLDR R4,=CAN0_NDAT1LDR R3,=0xFFFFFFFFSTR R3,;Read the messages from RAMLDR R4,=my_RAM_variableLDR R3,=0x0STR R3,LDR R7,=can0_rxb0_2LDR R6,LDR R5,=0x44332211CMP R6,R5BNE can0_handler_exitLDR R3,=0xFFFFFFFFSTR R3,can0_handler_exit;Clear the new data in buffer flagsLDR R4,=CAN0_NDAT1LDR R3,=0xFFFFFFFFSTR R3,CPSIE IBX LR