How to protect analog inputs on low power device from overvoltage? - Page 1
Forum section: electronics / projects

author: NotAVirus
author_rank: Newbie
timestamp: December 11, 2019, 11:16:43 pm
content: Hi,Normaly, to protect my ADC-inputs from overvoltage I would use diode clamps to the supply rail, and use a series resistor to limit the current into my supply rail. As long as the current injected into the supply-rail is lower than the total current-consumption of the device, everything should be fine. However, in low power applications with sleep-modes only consuming microamps, I dont think clamping the input-signal to the supply rail is viable.Another way to clamp the signal would be to use a zener diode instead of diodes to the supply-rail. The problem with this solution is that low voltage Zener diodes have a terrible reverse leakage current, and requires a significant reverse current to achieve its reverse voltage. This will ruin the accuracy of the analog input.A third solution, might be to make another voltage rail, and then diode-clamp inputs to this. This rail should have a voltage slightly lower voltage than VCC to ensure that current will be clamped to this rail instead of VCC. This rail should have some kind of shunt regulator, making it possible to dissipate the the injected current. My VCC voltage may vary between 3.0 and 3.6V depending on battery voltage. Therefore the shunt regulator should be referenced to VCC instead of a fixed value. This is where I am stuckI cannot find a simple circuit that can dissipate current when voltage on this clamping rail is approaching VCC.have anybody else struggled with similar problems, and found a solution? Is there perhaps another way to protect analog inputs from overvoltage?

author: DBecker
author_rank: Frequent Contributor
timestamp: December 11, 2019, 11:50:08 pm
content: A diode-isolated protection rail, with zener clamping on the rail.I've used a SRV05-4-P-T7 as a low capacitance steering diode array primarily because JLCPCB assembly has that as a basic part. It is intended for USB data line protection and has 3.5pf capacitance to ground. You'll probably want to treat the internal TVS as secondary and provide your own zener clamp. Bias that rail to minimize the loading and capacitance.

author: David Hess
author_rank: Super Contributor
timestamp: December 12, 2019, 02:05:43 am
content: Transistors can be used with the base/gate connected to a reference while the collector/drain directs the current at the emitter/source to a sink point.A low zener diode can be prebiased to provide a stable reference for diode or transistor based protection. Transistors and diodes can be paired to remove the effect of Vbe or diode forward voltage drop.

author: EEEnthusiast
author_rank: Frequent Contributor
timestamp: December 12, 2019, 02:19:36 am
content: Does the ADC have input drivers? If so, limit the voltage of the OPAMP driving the ADC so that it is just below the max input limits. This would protect the ADC at all times. Ensure that the OPAMP can drive rail to rail.

author: NotAVirus
author_rank: Newbie
timestamp: December 12, 2019, 11:00:45 pm
content: Thank you so much for the replies."diode-isolated protection rail" was the thing I was thinking on. Combining this with a prebiased zener-diode, I would get an accurate clamping voltage. I am a bit conserned of the current required to bias a zener. Most zeners I have looked at requires several mA of current to reach their rated voltage. A shunt-regulator like ATL431 requires a bias of 35uA. This is still a bit high for a small IoT-device spending most of its life in deep sleep.I have come up withe the attached circuit, which uses VCC as a voltage reference, and transistors to shunt the overvoltage. This way the clamping-voltage will follow VCC to some degree. The circuit works i LTSpice and only draws about 2uA from VCC. Is there any reason why this should'nt work in practice?Quote from: EEEnthusiast on December 12, 2019, 02:19:36 amThere is no external buffering on the inputs. The ADC I am using(ADS124S06), have internal input buffering.

author: David Hess
author_rank: Super Contributor
timestamp: December 13, 2019, 03:42:37 am
content: M1 should not be required if R3 is effectively a short assuming that the transistor can carry the current and the impedance at the base is lower enough to control the base current.Things become difficult when lower power operation is required. It helps considerably to raise the value of the input series resistor as high as possible consistent with precision and a low input bias current buffer makes this easy. The resistor is bypassed with enough capacitance to control noise and parasitic effects at higher frequencies. 1 megohm oscilloscope inputs typically use 470 kilohms bypassed with up to 1000 picofarads which provides protection up to 400 volts.

author: Ed.Kloonk
author_rank: Super Contributor
timestamp: December 13, 2019, 05:58:29 am
content: This page goes into detail on how to harden your arduino but could be adapted to anything really.https://www.rugged-circuits.com/ruggeduino-1

author: jbb
author_rank: Super Contributor
timestamp: December 13, 2019, 06:29:01 am
content: Ah, nice. I was thinking about the PNP common base clamp trick myself, and I’m glad to see it’s a known method.If you’re really in a jam between needing low value series resistors and having too much fault current, Bourns make some series protector circuits which are normally a few Ohms, but limit currents to just a few mA in fault conditions. I don’t know if they make a lot of thermal EMF, though.

author: Berni
author_rank: Super Contributor
timestamp: December 13, 2019, 06:49:21 am
content: I take a different approach when i need really rugged IO, using the little known depletion mode MOSFET.Here is an example of a digital output (Something that is even more difficult to protect) that can survive a few hundreds of volts in both the positive or negative direction being applied to it.These particular depletion FETs will have about 300 Ohm across them since they are turned on by default and need a negative voltage to turn off. But because these are small FETs means they can saturate the channel rather quickly at just 22 mA, past that they stop acting as resistors but acting as current sources limiting the current to 22mA. The rated voltage for these FETs is 600V so they wont break down all that easily and they start closing down when they get hot so they wont thermal runaway so easily.The excess 22mA current is clamped by the protection diodes and the resistors provide an extra layer of protection to limit current into the pin so that the chips internal ESD diodes have a better chance of surviving.For cases where you need even lower impedance its also possible to use a biassed diode bridge to protect inputs, but those are less attractive because they constantly consume the biasing current to keep the diodes turned on and require a negative supply to reach all the way to zero volts.

author: David Hess
author_rank: Super Contributor
timestamp: December 13, 2019, 12:22:36 pm
content: Another structure which can be used is a diode bridge driven by current sources as shown below. This works for both inputs and outputs and is bidirectional.

author: NotAVirus
author_rank: Newbie
timestamp: December 13, 2019, 09:02:01 pm
content: Quote from: jbb on December 13, 2019, 06:29:01 amyea. had a little eureka-moment, finding this trick.Quote from: Berni on December 13, 2019, 06:49:21 amdidn't knew this things existed. This app-note from Infineon was interesting.https://www.infineon.com/dgdl/Infineon-Application_Note_Applications_for_Depletion_MOSFETs-AN-v01_00-EN.pdf?fileId=5546d4624cb7f111014cd63d1a197d94I have done some modifications on my initial design. As David Hess suggested, M1 is not required if the impedance on the PNP-base is low enough. This can be done by adding an op-amp buffer between the voltage divider and PNP-base. I have also removed the isolation diode(D3) as this is not needed. When protecting several inputs one could simply add a PNP-transistor to each input, and connect all the base-pins to one single op-amp. Removing one isolation diode should give the circuit a sharper clamping voltage.

author: DBecker
author_rank: Frequent Contributor
timestamp: December 14, 2019, 02:03:20 am
content: Bias the clamping rail. That doesn't mean that you need to push much current through the zener. You aren't trying to get a stable voltage there, just minimize the loading on the signal lines. A zener is more appropriate than a TVS because of the sharper curve.Most of the other solutions suggested seem a bit overkill, costing in components, board area and complexity.

author: David Hess
author_rank: Super Contributor
timestamp: December 14, 2019, 03:22:48 am
content: Quote from: NotAVirus on December 13, 2019, 09:02:01 pmDepletion mode MOSFETs have been available almost from the beginning and before them, JFETs could be used and there were even high voltage JFETs. Their poor cost and availability tends to limit them to more expensive applications.A resistor added in series with the source before the gate connection allows lowering the current limit at the expense of raising the series resistance.Their flaw, if it can be considered that, is that they have no overload capability above their breakdown voltage at all. Which reminds me that another useful current limiting device is a small high voltage incandescent light bulb. The low thermal mass of the filament allows much faster response than a PTC thermister or polyfuse and in the worst case, it acts as a pretty good fuse.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 14, 2019, 04:18:19 am
content: Nice thing about high voltage DMOS is you can afford enough voltage range to use a frickin' MOV to handle ESD/surge. (No need for leaded parts, MOVs come in small chip packages too -- the low ESL is especially good for ESD.)If you're using a biased clamping rail, note that you need capacitors to absorb ESD. Something like a TL431 won't react nearly quick enough, and can't handle that much current anyway (~100mA; figure ca. 10A peak during an ESD pulse).TL431 is normally rated for 1mA bias, but that's for VREF within spec. The subthreshold region is poorly documented, but it's usually the case that complete cutoff (Ik <1uA?) comes for V_VREF < 2.2V or so. Which is still a damn sight sharper than any zener diode can do.Also, if you do opt for an "adjustable shunt" like this, using a high-ohms divider to VREF (assuming IREF is low enough -- TL431 isn't, but one of the low current variants may be, or you can use a CMOS op-amp against a micropower reference to much the same effect), consider putting a capacitor in parallel with the top resistor so that transient changes in output are coupled quickly into REF. Not much should be needed, 1nF would even be a lot.Also consider using higher voltage zeners (>= 5V) to clamp the brunt of it, then add a series resistor between zener and ADC to limit injected current. A shunt could be used to absorb excess VCC rise, or you can just kind of let it happen and see how bad it is. Most 3.6V (abs. max.) devices break down in the 4.2V range, which may not necessarily be harmful to them, but may disrupt internal state.I once had swapped out a 3.3V LDO for 5V, which was applied to a PIC24E; it simmered in the 4.2-4.4V range with something like 100 or 200mA flowing. It kinda sorta worked, but it wouldn't always take programming, and the USB device was cacked. Presumably the analog bits (12MHz PLL?) weren't behaving under the... "sweaty" conditions, shall we say. Put in the correct 3.3V LDO and all was fine (no apparent damage to the chip).Tim

author: exmadscientist
author_rank: Frequent Contributor
timestamp: December 14, 2019, 08:20:08 am
content: Quote from: NotAVirus on December 13, 2019, 09:02:01 pmNote that this circuit does have some appreciable leakage through the transistor's B-E pn junction. If you require very high precision (nA or better), an improvement is to drive the transistor base directly from an op-amp follower buffering the input signal. When the signal voltage goes beyond the op-amp's ability to follow, the transistor will turn on and pull the whole thing down toward ground. No great precision is required of the op-amp, so a series resistor is sufficient to protect its input.This approach is also viable for bipolar signals, at the expense of added complexity (you'll need complementary transistors and have to avoid transistor reverse mode operation). But it's one of the better ways I've found to protect low-level analog signals when leakage is critical.