Serialisers with SFP+ modules? - Page 1
Forum section: electronics / projects

author: knapik
author_rank: Regular Contributor
timestamp: May 17, 2018, 01:42:20 am
content: I'm doing a student project in which we are trying to take 8 parallel 3.3V logic lines and serialise them to one differential line to send to a bidirectional SFP+ module for a fibre communication. However, I've been having a large amount of difficulties trying to find a serialiser that would do the job for this. From what I understand, an SFP+ module requires an CML differential input of at least 800mV, but I just can't find any serialisers which will output a voltage that high. I should add that I'm looking to sample each channel at about 25-50MHz.It would be ideal to use an LVDS serialiser/deserialiser as they seem rather plentiful. Would a differential amplifier be suitable to increase the differential voltage swing?

author: knapik
author_rank: Regular Contributor
timestamp: May 17, 2018, 02:42:41 am
content: Ah, thank you very much for that! I have been looking into the SFF-8431 specifications for SFP+ modules, however I couldn't find the 500mV p-p level mentioned. Looking at table 26, 12 and figure 19 (attached as pictures), am I correct in assuming that its saying that a differential input of 700mV is regarded as a one level? I've just been having a lot of difficulty understanding which differential value I should be targeting for going through many different datasheets.I saw the TI serialiser/deserialisers with the two different differential voltage levels, so I was planning on using one of those.I would also like to ask a few other questions about SFP+ modules. For my application, say I want to send data at a rate of 480Mbit/s (assuming an 8b/10b encoding scheme of the serdes and sampling 8 channels at 50MHz) I've been worried about limiting SFP+ modules. I haven't been able to find all too much information about the differences between limiting and linear SFP+ modules, do limiting modules have some sort of filtering applied to attenuate the lower datarates which are outside of the 10Gbit/s range?Furthermore, am I right in assuming that Idon'twant a bi-directional SFP+ module for a bi-directional communication of data between two SFP+ modules, as bi-directional SFP+ modules are used to retransmit a signal instead.

author: knapik
author_rank: Regular Contributor
timestamp: May 17, 2018, 03:44:13 am
content: Could you send me a copy of that datasheet? It could be interesting to read.

author: knapik
author_rank: Regular Contributor
timestamp: May 17, 2018, 04:48:48 am
content: Ah, I see what you mean by that. That was a question I was really wanting to ask my project supervisor. I just couldn't tell whether the differential input voltage swing referred to the electrical minimum and maximum, or the threshold. There was no real reason for a SFP+ module as 1Gbps would definitely be fast enough for the data we need to transmit, but I might need one as there might be a bit of difficulty finding a serialiser/deserialiser around 8 channels as they mostly seem to be 24 bit for RGB video.Shouldn't have much of a problem interfacing with the SFP module now, thank you!

author: knapik
author_rank: Regular Contributor
timestamp: May 17, 2018, 06:22:32 am
content: Looking further into SFP(+ and non plus), I noticed that the output of the SFP module is AC coupled. Going back to a deserialiser from the SFP module, I would therefore need to add a DC offset of 2v (as its LVPECL for a regular SFP module), right? To achieve this, is this something I should be looking into level shifters, or op amps?

author: radar_macgyver
author_rank: Frequent Contributor
timestamp: May 18, 2018, 04:27:19 am
content: No need for op-amps, use a termination network that terminates to Vtt. If the receiving chip does not provide a Vtt, then you can use a resistor divider that is the Thevenin equivalent of terminating to Vtt.

author: Scrts
author_rank: Frequent Contributor
timestamp: May 18, 2018, 12:42:58 pm
content: Quote from: blueskull on May 17, 2018, 02:05:49 amI think the back link will not work on SFP using TI FPDLink, since the back channel is embedded into the same link.

author: knapik
author_rank: Regular Contributor
timestamp: May 19, 2018, 05:00:41 am
content: Quote from: radar_macgyver on May 18, 2018, 04:27:19 amOh alright, that doesn't sound too difficult then. I haven't really learned much about differential signalling in university, except for a bit about differential amplifiers. I'll do some reasearch and some spice simulations (the latter in hindsight I really should have started off with) and I'll make another post once I've made some progress.Quote from: Scrts on May 18, 2018, 12:42:58 pmI'm not too sure what you mean by back link, could you please clarify that for me?

author: Scrts
author_rank: Frequent Contributor
timestamp: May 21, 2018, 01:55:09 pm
content: Quote from: knapik on May 19, 2018, 05:00:41 amSection 8.5.2 of the serializer datasheet:http://www.ti.com/lit/ds/symlink/ds90ub913a-q1.pdf

author: dmills
author_rank: Super Contributor
timestamp: May 21, 2018, 02:43:37 pm
content: Most of the usual suspects have application notes on this stuff, see for examplehttp://www.ti.com/lit/an/slla120/slla120.pdf, but most of the manufacturers of LVDS/PECL/CML have notes showing how to do the required level and impedance transformations.Regards, Dan.

author: knapik
author_rank: Regular Contributor
timestamp: June 07, 2018, 11:19:46 am
content: With the end of the semester and exams finally over, its time to start working on this project again.Quote from: dmills on May 21, 2018, 02:43:37 pmThanks for that link. I was previously going through the TI application notes regarding interfacing with DC and interfacing with AC, but I didn't see this one. I had a meeting with my supervisor shortly after you made your post, and he recommended a scheme identical to that of 5.2.4, so that's what I'll be pursuing.

author: knapik
author_rank: Regular Contributor
timestamp: June 07, 2018, 12:21:32 pm
content: Quote from: Scrts on May 21, 2018, 01:55:09 pmAh, are you referring to programming the serialiser / deserialiser pair with I2C? I've found a pair which I believe should be suitable for my application which doesn't require any programming, with a differential output of ~780mV with a load resistor of 100R, while apparently being able to lock to random data. Its the sn65lv1023A & sn65lv1224B pair. The one drawback however is that it doesn't use a DC balanced encoding scheme.Am I correct in assuming that a DC balanced code isn't essential as the SFP module will have some sort of internal DC biasing, and that the data back from the SFP module will be DC biased by the scheme I mentioned in my post before? I watched a teardown video an SFP module, and I saw that it has a Maxim 3286C inside of it which I believe has some internal biasing from the diagrams.

author: Scrts
author_rank: Frequent Contributor
timestamp: June 11, 2018, 07:59:26 pm
content: No, I meant that the I2C commands sent to the Deserializer can be transferred to the Serializer and then to the devices connected to that Serializer. So the DESerializer has I2C slave and the SERializer has I2C master. Let's say you have configuration of MCU1->SER----coax----DES->MCU2, you can send an I2C command from MCU2 to MCU1 and that command will be transferred through SerDes pair over the back-channel communication.A real life example: a video processor outputs video data to the Serializer and on the other end, there is a Deserializer with an LCD display with a touch panel (e.g. plane seat display). Once you do the touch, the finger location is transferred back to the video processor over the back-channel link, so the video processor can proceed with the menu option you've selected.