Using GaNFETS versus Silcon FETs - Page 1
Forum section: electronics / projects

author: mrpackethead
author_rank: Super Contributor
timestamp: October 11, 2015, 04:54:05 am
content: I am looking to convert 48-60VDC down to 5VDC (@5A) and need to optimise for efficiency. I have limited thermal capability to remove heat, and also in this application saving every bit of power is important.Currenly i'm Using traditional Silicon Mosfets ( carefully chosen to reduce Switching and conduction losses ), large inductors, providing a Bias voltage for my converter Controller ( LM5116mHZ ) and that gets me to around 92% the major losses now are in teh Fets.I was considering looking at replacing the Silicon FETs with GaNfets which have very low Rds and very Low Gate charge..Currently i'm using a BSC340N ( Fet to +V ) and BSC190N ( to GND ).. they have Rds of .07 and 0.02 ohms respectively.If i replaced those with a EPC2001, ( epc-co.com/epc/Portals/0/epc/documents/datasheets/EPC2001_datasheet.pdf )Rdson is 0.007Ohms, and Qg to 7nC.It results in an overall power saving of around 1.2W, which is another 4% or so, halfing my power loss. Futher optimization of frequency may result in better results, if i can increase the frequency and reduce the inductor value.. ( for a lower resistance ).There are no free lunches in engineering.. The GaNFets are 3x the price, and the package is hardwork.Does anyone have any words of wisdom about what might go wrong, before i launch into designing and testing a prototype.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 11, 2015, 09:08:48 am
content: You'll need purpose-made gate drivers to harness the available risetime benefit. And there's only so much you can do in the layout to support that risetime. Rather than attempting to "minimize inductance", you'll be much better served by adding snubbers. Which can be quasi-resonant types to keep efficiency high.An easy saver is also reducing frequency. The inductor and capacitor values get large quickly, and core loss rises, but if you have the space and budget, it can save too.Tim

author: mrpackethead
author_rank: Super Contributor
timestamp: October 11, 2015, 09:25:32 am
content: Quote from: T3sl4co1l on October 11, 2015, 09:08:48 amthe big power saving is in the conduction loss, and that's a compelling enough reason to do it. If the rise time is a bit slower than optimal then its probably not a big loss in terms of power. Space is always a issue!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 11, 2015, 11:17:46 am
content: If conduction losses are high, then you can still save by going to bigger transistors, without changing technology. Try that first?Usually, people get overly enthusiastic about the conduction, and choose transistors ten times toolarge... then wonder why it's still so sloppy and hot. Switching losses depend on current too, so one can easily think it's the other (dang, these already big transistors are getting hot, better use even biggerer ones!) when simply looking at the problem and doing a little analysis shows which way the balance is tipped.Whatever the case, there's an optimally sized transistor that will achieve minimum loss for the drive strength and power output in the circuit. It sounds like you may be below this point, rather than above it, as seems to often happen.Tim

author: mrpackethead
author_rank: Super Contributor
timestamp: October 11, 2015, 11:44:06 am
content: The currnet Transistors are a very carefully selected choice. A careful balance of Qg and Rds on.. And I've got two differnet transistors, for the two differnet parts as well. Get bigger Fets, that's great, with lower RDS, but at the cost of increased Gate Charge.. Seriously I've been through this, exercise, and get the level of efficiency I want, swapping differnet FETS of the same technology isn't going to cut it..The reason for looking at the conduction loss is its the biggest line itme.

author: ruffy91
author_rank: Regular Contributor
timestamp: October 11, 2015, 12:39:07 pm
content: You can still go up with driving current of the FETs and get "bigger" (lower RDSon) FETs. While balancing driving losses and switching losses. What are your static and dynamic losses atm?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 11, 2015, 01:43:49 pm
content: Quote from: mrpackethead on October 11, 2015, 11:44:06 amThat sounds pretty good, so you're probably fairly close to optimal already. For example, reducing conduction loss by 50% might increase switching loss by 33%. And then another change of the same magnitude (going to 50+50% larger transistors) might actually be the other way around, having passed the ideal point.At that stage, you can only possibly reduce loss by reducing Rds(on) and freq. at the same time, or using altogether better parts (like GaN).By the way, how are you measuring conduction loss, or what have you defined as that component? Could you provide some of your analysis or measurements?Tim

author: Circlotron
author_rank: Super Contributor
timestamp: October 12, 2015, 02:48:35 am
content: Quote from: mrpackethead on October 11, 2015, 04:54:05 amIt is not another 4%, it is another 4 percentage points.https://en.wikipedia.org/wiki/Percentage_pointWe are engineers so we speak in numbers and we do so in a precise manner.Womenfolk are endlessly impressed by this, BTW.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 12, 2015, 03:34:57 am
content: Quote from: Circlotron on October 12, 2015, 02:48:35 amDid someone give you a wedgie today.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 12, 2015, 03:35:36 am
content: QuoteThanks, that first one is pretty handy.

author: ralphd
author_rank: Frequent Contributor
timestamp: October 12, 2015, 03:52:54 am
content: If the marketing hype is true, SiC may be a better option.

author: ralphd
author_rank: Frequent Contributor
timestamp: October 12, 2015, 03:57:38 am
content: http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/

author: Phoenix
author_rank: Frequent Contributor
timestamp: October 12, 2015, 09:13:51 am
content: Quote from: ralphd on October 12, 2015, 03:52:54 amSiC transistors are usually quite high voltage (i.e. the ones you linked at 1200V and 1700V) and require pretty hefty gate drivers to run well.GaN seem to come in more lower voltage varieties but they can be a bit tricky to drive very fast. You don't mention your topology so I'm not sure if you need to consider their reverse conduction characteristics (probably not), but Si MOSFETs anti-parallel body diodes are pretty bad anyway.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 12, 2015, 09:25:43 pm
content: Quote from: Phoenix on October 12, 2015, 09:13:51 amSynchronous Buck Regulator..

author: mrpackethead
author_rank: Super Contributor
timestamp: October 13, 2015, 01:00:25 am
content: Discussed this today with my student engineers and they ( as usual ) had lots of good ideas, but found an evaluation board from TI.. its pretty close to the numbers i'm looking for.. Wonder how much improvement can be had by futher improvement.. Its optimised for a higher current than i'm wanting so its likely i can find a few percent more efficency.. Id like to think its possible to get to 96%, anything over 95% though will be a sucess.http://www.ti.com/tool/lm5113llpevb

author: mrpackethead
author_rank: Super Contributor
timestamp: October 19, 2015, 09:28:42 am
content: lt3891 has Logic level drives, is suitable for driving the GANFETS. Running at 150Khz, I've at least on paper got 97.5% which is well worth pursing.

author: tszaboo
author_rank: Super Contributor
timestamp: October 19, 2015, 12:24:48 pm
content: Quote from: mrpackethead on October 19, 2015, 09:28:42 amCareful with those numbers, GaN rds increases with temperature, so once it is running and gets hot, the efficiency gets lower.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 19, 2015, 11:42:18 pm
content: Quote from: NANDBlog on October 19, 2015, 12:24:48 pmYes, in deed. And that is what "at least on paper" means..... :-)Attached is my rough circuit schematic.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 20, 2015, 02:18:42 am
content: FYI, a GaN FET symbol shouldn't have a body diode -- the EPC ones don't have it (as mentioned). There's also no connection to the substrate. I think the datasheet has a reasonable suggested symbol?Tim

author: mrpackethead
author_rank: Super Contributor
timestamp: October 20, 2015, 02:32:11 am
content: Quote from: T3sl4co1l on October 20, 2015, 02:18:42 amYou know thats a very interesting observation, and i had'nt noticed that. The irony is that symbol is in the library that was provided by EPC ( on their web site )..

author: mrpackethead
author_rank: Super Contributor
timestamp: October 20, 2015, 07:42:37 am
content: I'm about to order some of the 2105, which is a 80V dual FET in an asymmetric half bridge..Going back to the datasheet...

author: lukaq
author_rank: Regular Contributor
timestamp: October 20, 2015, 08:19:54 am
content: at what voltage do you drive your fets?

author: Phoenix
author_rank: Frequent Contributor
timestamp: October 20, 2015, 09:55:03 am
content: Quote from: T3sl4co1l on October 20, 2015, 02:18:42 amThe app note AN003 explicitly talks about a reverse body diode, and provides a schematic symbol with diode (regular MOSFET looking), this does make it a bit confusing.http://epc-co.com/epc/Portals/0/epc/documents/product-training/Using_GaN_r4.pdfLooking at epc's literature it appears they are using a HEMT type, which does not have the parasitic diode, however don't worry they do still have reverse conduction.http://epc-co.com/epc/Portals/0/epc/documents/presentations/DesignWest%202013%20GaN%20Seminar.pdf(page 11 shows HEMT layer structure)http://www.microsemi.com/document-portal/doc_view/132828-ganfet-application-note(page 2 shows the HEMT layout for comparison and discusses reverse conduction)http://www.gansystems.com/_uploads/whitepapers/982304_GN001%20App%20Note%20-%20How%20to%20Drive%20GaN%20E-Mode%20Transistors%202014-10-21.pdf(page 4 shows reverse conduction characterist of a GaN-Systems HEMT device.)It's worth noting the a negative gate drive supply rail will increase the magnitude of the reverse conduction Vds, which makes it a quite a bit harder to design a gate drive that can clamp it off without the miller effect causing shoot-through.(On a side note - I'm not sure measuring the voltage accross the inductor is a good way to measure feedback current, the average voltage must be 0).

author: tszaboo
author_rank: Super Contributor
timestamp: October 20, 2015, 10:59:32 am
content: Quote from: Phoenix on October 20, 2015, 09:55:03 amIf I understand it correctly, some add the diode intentionally, so it can be used for various DC-DC topologies, while normally you dont have the diode. But you have reverse conduction, if the gate source voltage is above the threshold. Basically the characteristic is more less symmetrical.But I might be wrong, maybe this is only for some manufacturers.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 20, 2015, 09:29:54 pm
content: Nevermind, I guess they don't use a correct symbol.Not that anyone else does, but that shouldn't be reason to purge all meaning of the symbol from your mind.They don't talk about the reverse characteristics at all in the first appnote, but the reason it behaves somewhat like that is strictly due to drive. Any time gate is Vgs(th) above sourceordrain voltage, the channel becomes (bidirectionally) conductive. This has the appearance of rectification, when Vgs is fixed at somewhat less than Vgs(th). Vgd could be fixed just as well; but Vgs(max) would be easily exceeded, so this isn't very practical. (It does work for CMOS construction, where the transistors are symmetrical. Power transistors are asymmetrical to achieve higher voltage ratings, and usually made with substrate and source shorted together -- when present, of course.)Speaking of substrate, they do have a substrate terminal brought out. But I don't think it's usable as a "back gate" (which was true of the ancient 4-terminal MOSFETs e.g. 3N138??), because it's literally the substrate, i.e., the thing it's built on top of, not actually the back side of the channel.So it really needs a more JFET-like symbol, but with an insulated gate (not a junction arrow), an enhancement mode channel (dashed line), and no substrate junction or connection (though the actual connection that's provided could be represented as a shield, e.g., a pin tied to the circle bounding the symbol).Tim

author: rfeecs
author_rank: Frequent Contributor
timestamp: October 21, 2015, 12:02:15 am
content: In their app note 002, they explain why they use the MOSFET symbol with body diode:QuoteApp note 002:http://epc-co.com/epc/Portals/0/epc/documents/product-training/Appnote_GaNfundamentals.pdfBut they also explain there is no actual body diode. As you said, when the drain goes negative, the gate turns on the channel.These parts are GaN HEMTs. They have no body diode. The drain and source are ohmic contacts, not PN junctions. They add a P-type AlGaN layer to the gate to deplete the channel and make it normally off, creating an enhancement mode device. Forward biasing the gate injects some holes that attract electrons into the channel and turn it on. So the Gate is an AlGaN PN junction. The AlGaN/GaN heterojunction supresses gate current to an extent. The gate acts like a diode with a high built-in voltage.It is not a MOSFET at all: no real gate insulator, no PN junctions on source or drain. So it's much more like a JFET, except enhancement mode.Panasonic calls this a GIT (Gate Injection Transistor). Lots of information on it can be found with Google.