What is a good retro platform for learning computer organization? - Page 1
Forum section: electronics / general

author: technix
author_rank: Super Contributor
timestamp: January 12, 2020, 06:04:21 am
content: The idea here is to build a retro computer for the purpose of learning computer organization - how the system bus works, how DMA and bus sharing works, etc. What is a good platform for that?Here are my candidates for the CPU: NEC V20 (Intel 8088,) WDC W65C02, Motorola MC68008, Intel 80386EX, Microchip AT91SAM9260 (ARM926,) or Loongson LS1C0300B (GS232 MIPS-compatible.)

author: hamster_nz
author_rank: Super Contributor
timestamp: January 12, 2020, 06:37:35 am
content: I don't think the older 8-bitters will meet you aims. They are very simple and most bus sharing techniwues (e.g. video) were hacks rather than carefully crafted designs.IMO small computer architecture started to became well designed with the Amiga or Mac with the 68000.

author: Ian.M
author_rank: Super Contributor
timestamp: January 12, 2020, 07:29:30 am
content: @hampster_nz,The 68008 is internally equivalent to a full 68000, only with its address bus cut down a bit and limited to an 8 bit data bus. One of the features of the 68000 family is that bus access width and bus cycle time can be controlled by hardware on a per location basis, The Miracle Super Gold Card 68EC040 accelerator card for the Sinclair QL (which originally used the 68008), disabled the motherboard CPU and took over its bus, using 8 bit accesses for all the I/O on the motherboard.@Technix: The Z80 also has a bus grant / bus release mechanism which lets it be used with an external DMA controller, so IMHO should be added to your list of 8 bit candidates

author: technix
author_rank: Super Contributor
timestamp: January 12, 2020, 10:54:20 am
content: Quote from: Ian.M on January 12, 2020, 07:29:30 amIf it is just external DMA, I think NEC V20 would suffice.How about the 80386EX? That thing (along with the ARM9 and MIPS) has modern compiler support in GCC. (And in the case of 386EX and ARM, LLVM/clang.)

author: Kleinstein
author_rank: Super Contributor
timestamp: January 12, 2020, 02:55:34 pm
content: For a DIY solution a 8 Bit bus makes things easier. The 386 CPU is probably a little tricky on the boards with no real advantage over the V20.Another point to look at is which assembler / compiler is available. I don't think the 6502 has a lot support for DMA - it is nice an easy, but maybe to easy / simple.

author: RoGeorge
author_rank: Super Contributor
timestamp: January 12, 2020, 04:05:17 pm
content: If you want to learn computer architecture, reading the docs for the AM2900 bitslice architecture would be a great start. It'll explain how it all works. From there, you'll be able to go for more complex architectures, up to current PC.Physically building whatever retro system you'll pick can be interesting, but will be a huge time sink without adding much to the understanding of how it all works.However, if you want to have hands-on experience, it will be much faster to simulate/emulate your own digital designs, or to use a FPGA to test whatever hardware blocks you want to understand. Altera still have a graphic schematic editor, so you won't need to learn VHDL/Verilog (keep in mind that learning/using FPGA is one of the most challenging and hard to learn things in digital design, not really recommended to use, unless you want to make a career in digital design).To answer the title question, I loved to build a system around the Z80 microprocessor. It was my own design of a 'ZX Spectrum' + 'CP/M' compatible, built decades ago.After all, the platform doesn't matter much.Whatever you choose, I can assure you it'll be a lot of fun!

author: technix
author_rank: Super Contributor
timestamp: January 12, 2020, 05:46:05 pm
content: Quote from: RoGeorge on January 12, 2020, 04:05:17 pmI understand that it is faster to emulate things - I have both a Zynq 7020 and a Spartan 3 XC3S500E board for those purposes, Zynq 7020 for a FPGA system with a ready-made CPU core in it, or XC3S500E if I want to do everything using HDL. I would prefer something I can stick an oscilloscope to here though.Quote from: RoGeorge on January 12, 2020, 04:05:17 pmCan I buy Z80 chips now? How to hook it up to memory and peripherals? What kind of interface voltage do I need? (Since I use CPLD for address decoding, interface voltage determines to what CPLD I can use, EPM7032S for 5V and XC2C32A for 3.3V.) Is there any standard memory map layout? How fast can the thing run? How can I find compilers and assemblers, preferably something that can understand the GCC flavor of C11.Also how different would it be for a Z80 based system and a V20/8088 based system? Then how should I do the video output?

author: RoGeorge
author_rank: Super Contributor
timestamp: January 12, 2020, 06:57:53 pm
content: - Z80 can still be found (a random "Z80 Aliexpress" search shows they are less than $1,https://pt.aliexpress.com/item/32519338899.html)- To add memory to a Z80, buy memory chips then read the processor and the memory datasheets to see how to interconnect them- Z80 family works at 5V. A minimal system doesn't need much glue logic, so it can be done with gate logic ICs (i.e. 7400 family) maybe a couple of multiplexer if you choose dynamic RAM chips, but nowadays there are plenty of static RAM choices instead dynamic. It can be done without CPLDs.- Z80 can address 64KB of memory. You can map it upon wish, or you can use the memory map of some vintage Z80 based computer (there never was a single standard in memory mapping, and probably never will), if you choose to make yours compatible with any of the existing designs.- To see how fast it can run, you need to read the datasheets. 1-4 MHz is normal range for vintage computers. There are also microcontrollers based on Z80 or Z8 core that can run 10 times faster, or so.- There are plenty of assemblers and C compilers for Z80. A "GCC Z80" search will return plenty of options.- About how different, it was like that: First it was Intel8080, then a few guys left intel, made their own company named Zilog and designed an even better version of 8080, named Z80. Z80 was very successful at the time. Remember we are now during CP/M era, way before first IBM PC or Microsoft (MS/DOS). Then it was Intel 8088, then Intel 80188, then Intel 80286 (short called 286), then 386, 486, Pentium, and so on and so forth up to nowadays latest i7/i9/Xeon whatever or similar from AMD (the AM2900 bitslice family were from AMD, too, but before the microprocessors era). All the above, from I8080 to the latest multicore Xeon can still run 8080 (or Z80) code, they are stillbackwards compatible(at binary code level) after so many decades.Anyways, by the question you are asking I think you want to know more only about the specific architecture of IBM PC, or what we now call a "desktop PC", and not about (digital) computers architecture in general, which is broader than IBM PC, the popular instance of the many existing computer architectures out there.Motorola (6800/68000) family was very successful too (not code compatible with Intel), it was used in the first Apple computers, but at some point Apple dropped Motorola, and switched to Intel.Detail a little what kind of computers do you have in mind when saying "vintage" computers? What period of time are you aiming at?At an extreme, analog computers are "the most vintage" ones, very interesting architectures and very different from the digital ones, but completely unrelated to what we know and use now in programming/computer science.

author: saipan59
author_rank: Contributor
timestamp: January 12, 2020, 09:29:17 pm
content: As others have said, it would help to know more about what you already know.And, are you wanting to build something from scratch, or just buy a ready-made board to study?Meanwhile, here is an idea:A good way to learn computer architecture concepts is to design and build one yourself. I'm not talking about a "practical" computer, but rather something that demonstrates the concepts. To avoid a really complex HW project, you could use (for example) a cluster of 2 or 3 microcontroller eval boards (from your favorite MCU vendor), or FPGA eval boards, design a very simple 'bus', then learn how to implement the things you care about (such as DMA, memory, I/O).Execution speed is not an issue. Put LEDs on the various signal lines, and run it super slow so that you can *see* things happening.Pete

author: saipan59
author_rank: Contributor
timestamp: January 12, 2020, 09:35:53 pm
content: Also, when you say "build a retro computer" - what do you mean by "build"?Some people mean buy a motherboard, buy a power supply, buy a box, plug in the connectors - then say "I built a computer".Other people mean designing a component-level schematic, designing a PCB layout, soldering parts, etc.My previous reply suggests a reasonable compromise, I think, but what are you wanting to do?Pete

author: RoGeorge
author_rank: Super Contributor
timestamp: January 12, 2020, 09:40:34 pm
content: Quote from: saipan59 on January 12, 2020, 09:29:17 pmGood advice. Don't overdo it, thought, like this guy:

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 13, 2020, 12:29:14 am
content: Actually, I think a 8088/8086-based design with a 8237 DMA controller would be the sweet spot if you want simple bus architecture, easily understandable, yet will give you all the concepts. It can be built relatively easily these days and you can observe all signals.

author: Cerebus
author_rank: Super Contributor
timestamp: January 13, 2020, 01:15:49 am
content: Quote from: RoGeorge on January 12, 2020, 04:05:17 pmA man who might be regarded as one of the pioneer computer scientists, Elliot Organick, might disagree with you there.That book gets cited by just about every ComputerArchitecturetextbook and Organick himself was significant enough to get a biography written up in the Communications of the ACM shortly after his death from leukaemia in 1985. I think we can allow 'computer organization' if Organick chose to use it. Organick, and other authors, have used the phrase to describe what some will describe as "computer architecture". The term certainly has been used a lot, and is still current. A quick web search will demonstrate that a lot of universities have a module entitled "Computer Organization".Quote from: PrefaceIt certainly, with that pedigree, doesn't "mean nothing". If there is a distinction to be drawn between "computer organization" and "computer architecture" then it would be that the former is more concerned with hardware and practical implementation, the latter more abstract and software orientated. In the context of the OP's interests "computer organization" may well be the more apposite term.Reflecting on this in a more general sense I think 'Computer System Organization' may even be a better general term than 'Architecture'. In everyday speech it's much more natural to ask "How is this system organized?" rather than the rather pretentious sounding "How is this system architected?".Wouldn't be popular with the computer folks who like to have 'architect' in their job titles though - if you changed "Systems Architect" to "Systems Organizer" it would become rapidly clear from the prevailing level of disorganization that most computer systems have thatsomeonewasn't living up to their job title.

author: Cerebus
author_rank: Super Contributor
timestamp: January 13, 2020, 01:43:01 am
content: Rather than answer the OP's question - because it still isn't quite clear to me at least what their ultimate goal is - I'm going to chime in with a book recommendation."Computer Organization and Design - the hardware/software interface" by David Patterson and John Hennessy is probably the best current textbook on the basics of modern computer hardware design. It's a broad textbook, so although it covers 'modern' design it also covers the basics that are relevant for "retro" territory too. Patterson was the man behind RISC at Berkeley, and Hennessy was the man behind MIPS, so they both have actual successful computer designs under their belts, not something that can be said by a lot of the other authors of textbooks in this field.Getting back to building. A Z80 based system might be quite a good fit for what Icandiscern about the OP's needs. Cheap, slow (4MHz - so almost any old scope would be good enough to follow what's happening on the buses), a simple bus with minimal secondary logic needed, a good family of support chips (serial, DMA, etc) and relatively well documented. I certainly found them easier to use than some of their contemporary micros back in the day.

author: RoGeorge
author_rank: Super Contributor
timestamp: January 15, 2020, 04:27:11 pm
content: Quote from: Cerebus on January 13, 2020, 01:15:49 amThanks for pointing it out, that's new to me.Found the book onlinehttp://www.textfiles.com/bitsavers/pdf/burroughs/B5000_5500_5700/Organick_B5700_B6700_1973.pdf,and at a first browse seems like a handbook for B5700/B6700 mainframe computers, not a reference textbook to cite decades later. Since it's only about 100 pages and so popular, will give it a read.

author: Cerebus
author_rank: Super Contributor
timestamp: January 15, 2020, 05:01:49 pm
content: Quote from: RoGeorge on January 15, 2020, 04:27:11 pmWarning, Organick's style is a little difficult to read but, if you're interested in how computer design evolved then it's worth persevering. The type of book, "Here's the description of the design of a particular computer" was quite common in that era and perhaps for 20 years more. Think of them as an extended version of an academic paper rather than as a classic textbook. I've three similar on my bookshelf, one describing MU5 (Manchester University 5 which formed the basis of the ICL 2900 series of mainframes), one describing the CAP machine from Cambridge University and one describing SOAR (Smalltalk On A RISC) - the latter another ACM Monograph like Organick's book was.That series of Burrough's machines was the first attempt to try and make a machine that was designed to conform to the way programming languages worked rather than the other way around. That style of stack machine with complex descriptors has fallen by the wayside but it's important not to forget about them, who knows what new problem might be well-fitted to that basic style of complex machine in the near future? Capability machines were forgotten for years and are just beginning to attract research interest again because of the strong security guarantees that they can offer.

author: saipan59
author_rank: Contributor
timestamp: January 15, 2020, 10:23:56 pm
content: Another book option that I recommend:https://gordonbell.azurewebsites.net/CGB%20Files/Computer%20Engineering%207809%20c.pdfA large chunk of the book details the PDP-11.I worked for DEC beginning in 1981 (now retired).Pete

author: MarkMLl
author_rank: Frequent Contributor
timestamp: February 01, 2020, 01:47:34 pm
content: Quote from: RoGeorge on January 15, 2020, 04:27:11 pmOrganick is so often seen as a shil for Burroughs that it's very easy to forget that on the one hand he had an illustrious career for which he is well-regarded and on the other that both Knuth and Dijkstra were at various times consultants for them.As others have said, OP's question regarding "computer organisation" very much needs expansion. OTOH:If he wants to learn aboutcomputersthen he could do worse than buying a cheap FPGA cardhttps://hackaday.com/2020/01/24/new-part-day-led-driver-is-fpga-dev-board-in-disguise/and implementing something like RISC-V on it.If he wants to learn aboutsystemsthen possibly he should be looking at a software emulation of one of the "classics" like the IBM S/370 so that he can absorb the requirements of commercial and scientific data processing and see how they were fulfilled with comparatively simple hardware.If he wants to build a physical computer I think that first and foremost he needs to consider his physical skill level, and after that the availability of system software and development tools. Or at least the availability of sufficient development tools to allow him to implement system software. Something like a 68k might fit the bill, but I'm concerned that he might find the only affordable RAM to be DDR DIMMs which could end up being a heroic interfacing challenge.MarkMLl

author: Canis Dirus Leidy
author_rank: Regular Contributor
timestamp: February 01, 2020, 02:21:00 pm
content: Quote from: RoGeorge on January 12, 2020, 04:05:17 pmYou wanted to say"BESM-6"?UPD: There is abook«МикроЭВМ. Книга 7. Учебные стенды» (Microcomputers. Book 7. Educational computers). It describes systems designed for studying computer software and circuitry, so authors uses the following microprocessors: 580VM80A (Intel 8080), K589 (Intel 3000 bit-slice processor), 1801VM2 (CPU with PDP-11 ISA), 1810VM86 (Intel 8086) and 1816VE48 (Intel 8048).

author: technix
author_rank: Super Contributor
timestamp: February 01, 2020, 03:19:27 pm
content: Quote from: MarkMLl on February 01, 2020, 01:47:34 pmI have already done this: bought a Myir Z-Turn Board 7020 for experiments that involves only peripherals (that Zynq 7020 comes with a dual Cortex-A9 core complex in it,) and built my own Spartan 3E board for CPU level stuff.Quote from: MarkMLl on February 01, 2020, 01:47:34 pmEmulators don't allow me to 1) swap out peripherals freely, and 2) poke an oscilloscope probe at things. This is what I am asking, a retro-ish platform where I can poke oscilloscope probes into.Quote from: MarkMLl on February 01, 2020, 01:47:34 pmThis is also done to some extent, however my platform of choice for this is ARM. I have already built a 2-layer PoC Cortex-A7 SIP board using Allwinner V3s, and for a proper thing using a 4-layer board I would use something like ATSAMA5D27 SIP.

author: Canis Dirus Leidy
author_rank: Regular Contributor
timestamp: February 01, 2020, 04:11:13 pm
content: Quote from: technix on February 01, 2020, 03:19:27 pmThis description fits any system with a passive backplane:S100,Euro Card Bus,RC2014.

author: MarkMLl
author_rank: Frequent Contributor
timestamp: February 01, 2020, 04:13:51 pm
content: Quote from: technix on February 01, 2020, 03:19:27 pmI have a long-term project- a /very/ long-term project- which involves reimplementing Paul Kimpel's B5500 emulator with- among other things- a built-in logic analyser. I'd not call his implementation completely cycle-accurate, but the various registers etc. are traceable to the actual physical devices that implemented them: typically with half a dozen transistors per modulehttps://www.mirrorservice.org/sites/www.bitsavers.org/pdf/burroughs/B5000_5500_5700/service/logic/Burroughs_From_Components_to_Computation.pdfIf you really do want to probe things, I think it adds weight to my final option which is to choose something with an implementation technology that makes you comfortable. What this probably means in practice is either DIL chips (68k or, downmarket, Z80) or at least to make sure that you can interpose an analyser or ICE between the CPU and main bus.MarkMLl

author: MarkMLl
author_rank: Frequent Contributor
timestamp: February 01, 2020, 04:19:31 pm
content: Quote from: Canis Dirus Leidy on February 01, 2020, 04:11:13 pmUnless he wants to probe the microcode, or look at the timing inside the ALU: both of which would be entirely reasonable.I had a bit of a revelation one morning 35 years ago. I started running test routines on a system I was refurbishing and found that 8 bits of the ALU were failing: when I opened the door I found I'd left the middle register card pulled out. Anybody like to guess what the machine was? :-)MarkMLl

author: RoGeorge
author_rank: Super Contributor
timestamp: February 01, 2020, 04:23:06 pm
content: Quote from: technix on February 01, 2020, 03:19:27 pmPerfect choice!Why wasting time building obsolete hardware when time is the most limited resource, and there are a ton of very interesting current (or future) technologies to play with.

author: TK
author_rank: Super Contributor
timestamp: February 01, 2020, 04:56:21 pm
content: Why don't you start with RISC-V? It is a modern ISA with a lot of potential, open source and there are some simulators and FPGA (ARTY) based implementations.

author: technix
author_rank: Super Contributor
timestamp: February 01, 2020, 07:22:55 pm
content: Quote from: Canis Dirus Leidy on February 01, 2020, 04:11:13 pmI wonder if PC104 works similarly - not the more advanced PCI-104 etc, the original ISA-based one - in fact a reduced version I would call PC104/64, with just the part that is equivalent of XT bus. (original PC104 uses what seem to me like a full ISA bus.) If this works, the NEC V20 would be an attractive target processor.If this works, a benefit would be that some existing PC104 modules would also work since what I am doing is just a subset of it. Also things like XT-IDE and Ad-Lib clone card would work on it too. As of software, at least I have existing tools like OpenWatcom C compiler and NASM for 16-bit x86, both of which are still maintained, and it is an option to make the system DOS compatible to unlock a wealth of existing software that can run on it.Quote from: MarkMLl on February 01, 2020, 04:19:31 pmFor anything on that level, I would use a FPGA instead and implement some kind of debug interface.Quote from: RoGeorge on February 01, 2020, 04:23:06 pmSadly modern stuff usually means SoC, which limits debugging and probing.Quote from: TK on February 01, 2020, 04:56:21 pmI don't think RISC-V specs has stabilized yet, and the ecosystem is not ready either. Also since my personal favorite CPU architecture for embedded use is ARM...

author: RoGeorge
author_rank: Super Contributor
timestamp: February 01, 2020, 07:36:30 pm
content: Go ahead and probe some boards with an oscilloscope. Nothing can replace the hands on experience and the joy of it. Anybody into hardware should do it at least once.However, the real world waveforms won't be as clear as in the textbook, right? Real world is messy, and poking with an oscilloscope at a databuss might be interesting only as a first time experience, but very soon afterwards it'll turn irrelevant, and mostly a waste of time from a learning experience standpoint, unless that board really has some problems and needs some very specific probing done with very specific program loops.

author: rdl
author_rank: Super Contributor
timestamp: February 07, 2020, 11:37:30 pm
content: Some possible options.https://www.amazon.com/8088-Project-Book-Robert-Grossblatt/dp/0830631712https://www.ebay.com/itm/Z80-MBC2-Single-Board-Computer-PCB/283494335966

author: c64
author_rank: Frequent Contributor
timestamp: February 29, 2020, 12:45:19 am
content: You can build a clone of ZX Spectrum (Z80 cpu still can buy brand new). Very simple design.If you think it's too simple, make a clone of IBM 5150 (i8088). You can buy cpu and all chipset cheap second hand. Or you can replace chipset with your own fpga/cpld. Documentation from IBM has schematic, although people say there are few mistakes - good for debugging

author: SL4P
author_rank: Super Contributor
timestamp: March 01, 2020, 04:12:16 pm
content: To study fundamental concepts, make sure you use static capable components that allow you to stop and single step the whole ‘system’.This will allow you to probe and observe all the buss states without worrying about transient stares decaying.

author: technix
author_rank: Super Contributor
timestamp: March 02, 2020, 07:57:13 pm
content: Quote from: SL4P on March 01, 2020, 04:12:16 pmI think most FPGA are static, ditto chips like NEC V20, WDC W65C02 and MC68SEC000.Quote from: c64 on February 29, 2020, 12:45:19 amI would prefer the IBM 5150, as it have modern compiler support in Watcom C Compiler. The challenge for this would be somehow designing up a graphics stack that is at at least CGA compatible and emits HDMI. Do you have any recommendations?

author: c64
author_rank: Frequent Contributor
timestamp: March 03, 2020, 01:44:36 am
content: If you decide to use old chips, they may be not static. For example, early Z80 were not.As for the graphics, maybe use the same design as the original CGA card (MC6845 chip), but don't generate analogue output. Send it as digital to fpga. After full frame of pixels is collected, send to HDMI.If I only had enough free time, I would do it myself ...

author: Circlotron
author_rank: Super Contributor
timestamp: March 03, 2020, 02:29:34 am
content: Anything you like really, as long as it has a linear address space. None of this segment:offset rubbish! My choice would be a Motorola 68000 or one of its variations. And write everything in assembly of course.But that's just my preference.

author: MarkMLl
author_rank: Frequent Contributor
timestamp: March 03, 2020, 08:06:44 am
content: Quote from: Circlotron on March 03, 2020, 02:29:34 amThere's nothing wrong with segmentation /provided/ that it doesn't impose unreasonable restrictions on the applications.MarkMLl

author: ebastler
author_rank: Super Contributor
timestamp: March 03, 2020, 01:24:06 pm
content: Quote from: MarkMLl on March 03, 2020, 08:06:44 amHmm, could you elaborate on that please? What different "flavors" of segmentation were you thinking of? What would be an example for an implementation of segmentation which doesn't impose unreasonable restrictions, vs. one that does? Thanks!

author: MarkMLl
author_rank: Frequent Contributor
timestamp: March 03, 2020, 02:39:05 pm
content: Quote from: ebastler on March 03, 2020, 01:24:06 pmI have to say that I don't want to hijack somebody else's thread, and I don't want to get into a flame war.I'm speaking from the experience of having designed and implemented a microkernel (with network etc.) on a '386DX using protected mode, almost entirely written in Modula-2 (the same code also ran on attached Z80-based devices). I can't safely comment on things like the systems that ran Multics, so I will not attempt to do so.Architecturally, the 8086 (and 8088, V20 etc.) provided multiple segments each of which was as large as the entire memory space of an earlier (CP/M-80 based) computer. It very rapidly became apparent that it was inadequate, particularly since the rise of the IBM PC coincided with a shift from writing programs in assembler to writing them in poorly-optimised high-level languages. Controversially, I suspect that Intel already had much of the '286 roughed out when they designed the 8086.The Intel '286 provided segmentation without paging, and with two major restrictions: (a) each segment was limited to a maximum of 64K, and (b) the global descriptor table (GDT) was itself restricted to 64K and since each entry was 8 bytes this enforced a hard limit of 8K globally-accessible descriptors. A process's local descriptor table (LDT) was similarly restricted to 8K entries, and by the time the '286 was launched these restrictions were problematic: it took a lot of discipline to spread data structures over multiple 64K segments (dealt with in detail in e.g. the IBM OS/2 manuals) and since standard linkers liked to put the code generated from each source file into a separate segment and since many segments needed multiple descriptors (e.g. if a debugger were to require access to code) the 8+8K limit very quickly became restrictive.The '386 allowed segments larger than 64K, except that the GDT and LDTs were still limited to 8K entries each: by the early '90s that was laughably inadequate. There were other problems as well, for example since highly-privileged code (e.g. the memory manager) can't call less-privileged code (e.g. the disc drivers) implementing things like virtual memory rapidly became baroque: queued swap-in/out commands with a context/privilege switch just when you didn't want it.Obviously, the '386 introduced paging which was widely viewed as an alternative to segmentation. However while paging has undeniable advantages for memory management (fixed-size pages swapped between block-structured media of different speeds) it doesn't provide the precision of protection that you can get with intelligent use of segmentation.As a particular example of the latter, if you have a vastly-complex application program it is likely to have bugs, and some of those bugs might have security implications: it should run with restricted privilege. And if you have a context-swapper which looks after the lowest levels of resource management (processor and memory), in principle you can keep it simple enough to be at least demonstrably and possibly even provably (in the strict sense) correct. And in between those you've got things like filesystems (tricky code which doesn't really need direct hardware access), and device drivers (simpler code which needs hardware access, but not necessarily unfettered rights to mess around with context (low-level memory management: who can get at what).Windows (NT) and OS/2, running in protected mode, originally had provision for two different levels of privilege inside application code, and multiple levels in the kernel. Now while many programmers automatically say "I want my code to have as much access as possible to keep my life simple", my own experience is that with a bit of self-discipline it is possible to break a program up into layers with different privilege, and having those multiple layers makes finding problems much easier: both because of privilege restrictions applied to segments, and also because of implicit checks that access is not overunning the limit of the target segment. And my opinion is based on nursing a moderately complex system from a state where I needed a logic analyser to find problems, to one where failures came with sufficient diagnostic messages to allow me to immediately locate the failure in the source code.So to answer your question. The '286 and successors have "bad" segmentation, on account of the size limit imposed on descriptor tables. But there is no reason to believe that successor chips couldn't have been fixed, particularly if the performance issues popularly believed to be implicit to descriptor and table lookup had been tackled by the use of even a moderate amount of on-chip cache: and it is the provision of fast cache which has, more than anything else, brought us to the level of performance that we expect today.Reference:https://archive.org/download/bitsavers_inteldataBatingSystemWritersGuide_13845467/1983_iAPX_286_Operating_System_Writers_Guide.pdfThat's basically Intel's description of how they expected segmentation to be used. Throw away the bits that talk about virtual memory (since it's better done by paging than by segmentation), adjust where appropriate to allow larger segments (e.g. coarser offset in 32-bit mode) and even 30 years on it's a pretty good read.MarkMLl

author: technix
author_rank: Super Contributor
timestamp: March 03, 2020, 03:55:23 pm
content: Quote from: c64 on March 03, 2020, 01:44:36 amI think the RGBI interface for CGA is digital. So this option now is implement CGA using MC6845 and modern SRAM chips (getting rid of the DRAM controller and consolidate the memory into one chip or two can save me a lot of headache, and if dual-port SRAM is used I can even save a lot of bus arbiting headaches) that emits RGBI. I have datasheet on an Analog Devices HDMI encoder chip that takes a 24-bit parallel LCD style video feed and a I2S audio feed and generate HDMI from that, so I can get away with low end FPGA that lacked any serdes. And since that HDMI encoder also deals with audio, the whole A/V block should also contain the audio solution.So the overall A/V subsystem would be a CGA reimplementation with MC6845 emitting RGBI for the FPGA, a Yamaha YMF262 (OPL3) wired up as an AdLib but operating without its special DAC YAC512 (digital output only) also feeding into the FPGA, the FPGA converting RGBI into 24-bit LCD and YMF262 digital output into I2S, a STM32F103 handling the HDMI interfacing and EDID, and then that ADI HDMI transmitter chip packing both feeds into one HDMI stream.I wonder how popular was CGA + AdLib back in the day? This card would be both in one physical package. (As of my planned PC/104 form factor, I think the CGA graphics alone would require two or three boards, plus one for AdLib and another for the FPGA RGBI + OPL3 to HDMI transcoder.)