Tell me how terrible my PCB layout is! - Page 1
Forum section: electronics / general

author: HwAoRrDk
author_rank: Super Contributor
timestamp: September 27, 2016, 05:45:29 pm
content: I've been working on this board layout and would like some critique and feedback. If it sucks, tell me how much and what I should be doing instead!I don't have a great deal of experience laying out boards and this is my first 'proper' complicated layout - everything I've done before has been fairly trivial and much simpler than this.The line down the middle is where the board is intended to be split, so I end up with two boards that will be stacked (with component sides facing). By the way, ignore the grey traces between the 14-way headers in the middle, I had to put jumper links there to satisfy the ERC - they will actually be a ribbon cable when assembled. Might have it v-groove cut at time of manufacture, or maybe leave it whole and cut it myself - depends on cost (I know many PCB makers want to charge you extra for 'multiple' designs, which this isn't really, but who knows what they'll say). I would have made it a routed slot with break-away joins, but that would make the whole thing >100mm wide, which unfortunately puts you into a higher pricing bracket for a lot of PCB manufacturers.

author: Ian.M
author_rank: Super Contributor
timestamp: September 27, 2016, 06:07:57 pm
content: Application?Max frequency?Any sensitive analog circuits?Its very difficult to critique it without seeing the schematic.Long slots in planes are generally bad. Move the ends of the horizontal and vertical tracks cutting up the red plane so the plane isn't broken where they nearly meet and take the horizontal track topside under K2 to add more connectivity between the two halves of the red plane.if you are tight for space or board area, then why not go SMD for some or all of it. as those PDIPs are space hogs.

author: mariush
author_rank: Super Contributor
timestamp: September 27, 2016, 08:18:24 pm
content: Any particular reason why you couldn't move the Q1 chip more to the left? It looks like you could potentially route that thick voltage behind that first row of pins on the DIP chip and avoid going on the other side of the board with the K1, K2, K3 and K4 buttons (or whatever those are)Moving it to the left may also give you more room to arrange those 3 resistors that are now between q1 and the header so you don't have to wiggle those traces that muchYou could also potentially route those tiny traces so they won't go under the IC and to vias but rather go above the row of pins in the DIP chip and just change the order of the wires in the header (if it's not critical to be in that order)That U5 ... it just feels like there's a lot of space wasted by placing it vertically .. and i don't really like that thick trace going from the header under those VO parts and then down all the way to that C3 and into the chip. It it wasn't for those three thin traces going all the length of the chip down and then to the ICSP header, you could have routed that thick trace under the chip and then come out directly to that header around those VOx parts.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: September 27, 2016, 08:42:04 pm
content: Quote from: Ian.M on September 27, 2016, 06:07:57 pmThe micro is running at 16MHz, off the external crystal Y1. But generally, the fastest things would have to be the serial debug and ICSP headers - which of course won't be used in-situ. Other than that, the only 'fast' signal on the board would be drive of the piezo buzzer (around 3-4KHz, I forget the exact spec right now)! Everything else is single-digit Hz.There are only a couple of analog circuits for current sensing feeding the ADC on the micro - that small area around U2/3. I would like those to be as noise-free as is reasonably possible, but it's not super-critical.Quote from: Ian.M on September 27, 2016, 06:07:57 pmHmm, I don't really feel comfortable posting that publicly, but I could send it in private if you'd like.Quote from: Ian.M on September 27, 2016, 06:07:57 pmIs this better?Do you think I should likewise try to break-up the long power traces at the bottom-right of the right-hand board?I'm not sure what you mean by "take the horizontal track topside under K2".Quote from: Ian.M on September 27, 2016, 06:07:57 pmYes, I could probably fit the whole thing on half the area (i.e. one board vs. two) if I went exclusively SMD. But I already have most of the components in through-hole form, so I figured I might as well use them. Plus the less SMD soldering I have to do by hand the better. Those tiny SC-70 packages of U2/3 are going to be enough a pain as it is!

author: HwAoRrDk
author_rank: Super Contributor
timestamp: September 27, 2016, 09:04:01 pm
content: Quote from: mariush on September 27, 2016, 08:18:24 pmHeh, I did just that a few minutes ago! Precisely to give more room around those resistors.Good idea about the power trace. It might be a tight squeeze, I'll have to see. But then that means I can move those traces that were underneath to the topside, freeing up more ground plane. By the way, K1-6 are relays, not buttons.Quote from: mariush on September 27, 2016, 08:18:24 pmAh, yes, if I push Q1allthe way to the left (and down a bit, to avoid being too close the top-left mounting hole), that may be do-able. Thanks for the suggestion.Quote from: mariush on September 27, 2016, 08:18:24 pmU5?There is no U5. You mean U6, the 28-pin DIP on the right? I did try it horizontally initially, but everything didn't fit. I need to keep those debug headers at the far right edge, and with the DIP-28 horizontal, there's not enough space to run traces past either side. (Unless you start running traces between all the pins, but that's best avoided, right?) I think I'll keep the right-hand board as-is for the moment, and concentrate on improving the left-hand one.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: September 30, 2016, 05:16:20 pm
content: I made a few changes to my PCB following some of the suggestions here. Shuffled Q1 over to the left a fair bit; didn't end up re-routing the power trace under it. Slightly re-arranged some of the stuff in the purple area at the lower-middle of the left-hand board so the plane is more open. On the right-hand board, broke up the power traces on the bottom as best I could. Moving the SERIAL_EN header facilitated this, as because it's just a jumper it doesn't really need to be on the right-hand edge of the board.Here's a question:Is there a better way to craft the link between my ground planes? It's at the top-left next to U1. I am using DipTrace, and the only way I could determine of doing such a thing was to create a custom component pattern that has two pads with a very short trace between them. But, it's a bit ugly to me, as the pads unnecessarily have no solder mask. I can't see a way to manually add solder mask back either.

author: Ian.M
author_rank: Super Contributor
timestamp: September 30, 2016, 08:06:43 pm
content: You can still improve ground plane connectivity a bit at the expense of two vias. Take the bottom-side trace that connects the left pin by the + symbol of K1..K4, bring it topside between K2w and K3 then dive back down again as far to the right under K2 as you can. There's nothing currently in the way and that breaks up the longest slot you've got left.Sorry - cant help with the PCB jumper soldermask issue.

author: tautech
author_rank: Super Contributor
timestamp: September 30, 2016, 08:34:27 pm
content: There's still a few more minor component shifts that'll make it more pretty but the main things that stick out for me is TH pads sizes and annular rings are too small. TH drill sizes are all over the place, I'd set most to no more than 30 mil and adjust those that need to be larger. There's no reason that I can see for some traces to be as fine as they are, I try to stay above 15 mil just so they are a little more robust.Otherwise not bad but with layouts I find this is where the most time is spent. I may be too fussy and I can spend a day or two easy on a PCB like this.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: September 30, 2016, 10:29:18 pm
content: Quote from: Ian.M on September 30, 2016, 08:06:43 pmAh, I see what you mean. Yes, I'll do that... Like this?I've done similar with the vertical trace running between K5/6 and C8.Quote from: tautech on September 30, 2016, 08:34:27 pmI hadn't given the through-hole sizes much thought, other than to make sure that they're big enough for leads of the components I am using. With the exception of the board connectors at top/bottom and the relays, these are all just the standard patterns from the DipTrace library. For the connectors and relays, I followed exactly the manufacturer's recommended footprint.When you say the annular rings are too small, do you mean in terms of solderability, or something else? I've had no problems soldering other boards with similar or same hole/pad dimensions.For trace widths, I've specified them as follows: 10 mil for signals, 24 mil for +5V power (and +12V relay coil side), and 36 mil for general +12V power. I tried just now bumping it up 15 mil for signals, but ran into a trace-to-board-edge issue with that trace that goes all the way up the very left-hand side, plus I'd have to re-route some stuff as the trace-to-trace gaps seem as though they'd be too small. 12 mil appears to work out fine though, so I may go with that. It even makes all my trace widths multiples of 12.

author: tautech
author_rank: Super Contributor
timestamp: September 30, 2016, 10:47:51 pm
content: If you have no problems with annular ring dimensions, fine.Based on the rework I've done insufficient size and width can make them the most fragile part of a PCB.I tend to make all TH pads 100 mil and adjust the shape of them as needs dictate.The other thing I'm inclined to do as much as possible for nets that connect to a # of TH pads is to run the net past all the intermediate pads and bring a short branch of the net to the pad.This also enhances mechanical robustness.SMD pads however being somewhat more robust without a hole in the middle of them I use both "run through" and branch connection techniques.

author: nctnico
author_rank: Super Contributor
timestamp: October 01, 2016, 02:04:39 am
content: I don't know what V02 through V09 are but they seem placed awfully close to each other. I'd put more space in between because the case may be larger than you expect. Also try to put a ground copper pour on the top layer and stitch that to the one on the bottom layer.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: October 01, 2016, 12:28:37 pm
content: Quote from: nctnico on October 01, 2016, 02:04:39 amThose are optocouplers. They're perfectly fine with that spacing. The cases are barely wider than their pins. They seem to be designed to be able to be placed side-by-side on 0.1" grid. Also, I laid it out like that so I have the option of using DIP-16 quad optocoupler ICs.What benefit will a top ground pour bring? I have shied away from doing so because it's going to be a pain with the split plane on the left-hand board.I know it's good to equalise the amount of copper on each side of a board, but that's only of real importance for larger boards, right?

author: nctnico
author_rank: Super Contributor
timestamp: October 02, 2016, 01:26:37 am
content: I already guessed they where optocouplers. It's just that my experience is that sometimes people are surprised by larger cases than expected.A top ground pour will make it easier to stitch to the bottom ground pour and effectively create a more solid ground plane.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 02, 2016, 06:41:53 am
content: Tell you how terrible it is? Sure!Free: It's crap! NEXT!$10 or a free beer: Sure, I'll glance at it.$100: I'll prepare an itemized list of issues for your consideration.$1000: I'll even fix them for 'ya...Tim

author: grouchobyte
author_rank: Regular Contributor
timestamp: October 03, 2016, 01:33:34 am
content: Quote from: T3sl4co1l on October 02, 2016, 06:41:53 amTimLOL.....I like the way you think.🤔You and I are alike in that way. I was thinkin the same thing. If you want some remote consulting work I might be able to help you. It kinda depends on your skill level or tech chops.@grouchobyte

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 03, 2016, 02:02:41 am
content: Quote from: grouchobyte on October 03, 2016, 01:33:34 amI'm pretty busy right now actually, but if you'd just like a second pair of eyes on something, I can fit that in, no problem.As reference, I submit only my entire posting history on this forum...Tim

author: IanJ
author_rank: Unknown
timestamp: October 03, 2016, 11:01:08 am
content: Hi,My tuppenceworth..........Not really show stoppers.......just good practice IMHO:-- Kinda been mentioned but I'd increase the size of the via's on the power traces compared to the signal ones.- Increase spacing between traces where you can, some of the thicker traces (power?) seem to get quite close too each other when you could easily adjust.Ian.

author: salbayeng
author_rank: Frequent Contributor
timestamp: November 21, 2016, 10:53:04 am
content: Doesn't look that bad actually, I've seen worse from people doing it for years.I think your capacitor holes might be too big? I would use 0.7mm (28mil) for capacitors/resistors etc.and 0.8mm for 2W resistors, 0.9mm for power diodes.Be careful with the 2.54mm SIP strip some brands are different to others, usually 0.8mm (32mil) is snug and 0.9 (36mil) is sloppyAlways double check the connectors for (a) pin diameter/diagonal size (b) pitch (c) pin1 orientation. (eg the RJ45 with tab UP has a different pitch and pin1 position to RJ45 with the tab DOWN). Measure the actual part you going to use!If I have long slots in ground planes, I bridge them on another layer at 1" or close spacer, you are trying to reduce the inductance, and you do this by reducing the effective area.If timing accuracy isn't essential, then use a resonator, crystals + caps are such a space hog, (you can get some nice SMD crystals with internal caps too)