STM32H750 failed to debug after RCC setup - Page 1
Forum section: electronics / general

author: bogdant
author_rank: Regular Contributor
timestamp: January 11, 2023, 11:08:15 am
content: After configuring RCC 16Mhz external crystal, PLL1 400MHz and debugging with this settings, I am not longer able to connect to debug."Active read protected STM32 device detected" "This could cause problems during flash download"Selecting yes to this dialog box, another error occurs after "launching app Debug has encounterd a problem" Failed to execute MI command: target remote:2331I in Ubuntu using J-link edu. Is it a way to mass erase the STM32H750 micro with J-Link?

author: wek
author_rank: Frequent Contributor
timestamp: January 11, 2023, 11:33:27 am
content: Try to connect then erase under reset.JW

author: bogdant
author_rank: Regular Contributor
timestamp: January 11, 2023, 02:07:42 pm
content: Quote from: wek on January 11, 2023, 11:33:27 amdo you have the steps to do that ?

author: DavidAlfa
author_rank: Super Contributor
timestamp: January 11, 2023, 05:05:51 pm
content: That mean to also use the nRST pin, not only SWC/SWD.

author: wek
author_rank: Frequent Contributor
timestamp: January 11, 2023, 06:59:33 pm
content: Quote from: bogdant on January 11, 2023, 02:07:42 pmAs David said above, it's either that the debugging hardware supports this, by having a NRST connection and adequate setting in software; or you simply hold the chip in reset by pulling down NRST pin manually. Maybe you want to do this in CubeProgrammer or similar, just to erase.Erase/reprogram with a program (blinky perhaps) which does not set PLL to 400MHz. Works? Maybe the crystal is not 16MHz, maybe there's something wrong in that setting of PLL (FLASH waitstates perhaps?), maybe it's inadequate hardware (power supply, decoupling,etc.).Try first on a "known good" hardware such as a Nucleo board.JW

author: bogdant
author_rank: Regular Contributor
timestamp: January 12, 2023, 05:26:16 am
content: Let me provide more informationhere is a link with the hardware schematic:https://github.com/bogdan-tirzioru/BusAnalizer/blob/master/factory/sampleA/schematic.PDFI have 5 samples, all was succefuly working with a release firmware, 2 of them has been looked now with the problemeatic RCC firmware.I am using JTAG interface to debug, so the Reset line is connected to debuger J-link.The programming environment is STM32cubeide connected to a Jlink ecu debugger. I can not find in STM32cubeIde the masserase button.

author: bogdant
author_rank: Regular Contributor
timestamp: January 12, 2023, 05:58:15 am
content: The release firmware and blinky firmware works on the good boards, but does not work on the broken ones.There is no doubt there is a wrong configuration in my current firmware:https://github.com/bogdan-tirzioru/totalcpp/blob/master/Src/rcc.cpp

author: hans
author_rank: Super Contributor
timestamp: January 12, 2023, 10:22:50 am
content: If you have a STLink (e.g. from a Discovery or Nucleo board), you could use the STM32CubeProgrammer tool to connect under reset and issue an erase command. You only need to bridge power and the SWDCLK SWDIO and nRST pins.Maybe OpenOCD can also do this, but I haven't looked up the docs to compile a command for it.Alternatively you could connect pin 94 (BOOT0, R16?) to VCC and then power up the board. That should keep the MCU in ST's bootloader and not run the firmware that changes the RCC bits to an incorrect state.

author: bogdant
author_rank: Regular Contributor
timestamp: January 12, 2023, 05:26:23 pm
content: Quote from: hans on January 12, 2023, 10:22:50 amDo not have a STLink, so I can not use STM32CubeProgrammer.I did try the second option to connect the Boot0 to 3.3. But the programmer still does not work:SEGGER J-Link GDB Server V7.82b Command Line VersionJLinkARM.dll V7.82b (DLL compiled Nov 9 2022 17:06:48)Command line: -port 2331 -s -device STM32H750VB -endian little -speed 4000 -vd-----GDB Server start settings-----GDBInit file: noneGDB Server Listening port: 2331SWO raw output listening port: 2332Terminal I/O port: 2333Accept remote connection: yesGenerate logfile: offVerify download: onInit regs on start: offSilent mode: offSingle run mode: onTarget connection timeout: 0 ms------J-Link related settings------J-Link Host interface: USBJ-Link script: noneJ-Link settings file: none------Target related settings------Target device: STM32H750VBTarget device parameters: noneTarget interface: JTAGTarget interface speed: 4000kHzTarget endian: littleConnecting to J-Link...J-Link is connected.Firmware: J-Link V9 compiled May 7 2021 16:26:12Hardware: V9.30S/N: 269304348OEM: SEGGER-EDUFeature(s): FlashBP, GDBChecking target voltage...Target voltage: 3.32 VListening on TCP/IP port 2331Connecting to target...ERROR: STM32: Connecting to CPU via connect under reset failed.ERROR: Could not connect to target.Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...Shutting down...Could not connect to target.Please check power, connection and settings.

author: bogdant
author_rank: Regular Contributor
timestamp: January 14, 2023, 02:00:39 pm
content: By removing the crystal quartz and programing with same tool J-Link a blinky application, I was able to bypass the problem. Soldering again the crystal , i was able to debug again the application.The issue in application in RCC configuration was, the source of sysclk incorect set and also the periferam D1,D2,D3 domain prescalares was not set:Code:while ((reg->CR & RCC_CR_PLL1RDY) != RCC_CR_PLL1RDY);/*setup the clock prescalers for bus*/reg->D1CFGR = 0x00;/*D1 domain AHB prescaler*/reg->D1CFGR |= RCC_D1CFGR_HPRE_DIV2;/*D1 domain Core prescaler*/reg->D1CFGR |= RCC_D1CFGR_D1CPRE_DIV1;/*D1 domain APB3 prescaler*/reg->D1CFGR |= RCC_D1CFGR_D1PPRE_DIV2;reg->D2CFGR =0x00;/*D2 domain APB1 prescaler*/reg->D2CFGR |= RCC_D2CFGR_D2PPRE1_DIV2;/*D2 domain APB2 prescaler*/reg->D2CFGR |= RCC_D2CFGR_D2PPRE2_DIV2;reg->D3CFGR = 0x00;reg->D3CFGR |= RCC_D3CFGR_D3PPRE_DIV2;/*select cpu to clock from PLL1*/reg->CFGR |= RCC_CFGR_SW_PLL1;