DDS Function Gen Layout Review - Page 1
Forum section: electronics / projects

author: jgrossman
author_rank: Regular Contributor
timestamp: October 18, 2023, 02:38:27 am
content: Hello EEVblogI am planning my first from-scratch electronics project which is a small, lowish frequency signal gen with an STM32 and an AD9837. I want to get feedback on the layout in particular, since is this the very first time I have ever laid out a board, period, so surely I am doing some dumb/non-optimal stuff. The things regarding the power and analog portions are what I am worried most about. Any feedback, no matter how obvious, is appreciatedMy targets are:Frequency: As low as reasonable, up to 1 to 2MHzAmplitude: From 0.600Vpp to 5VppWaveforms: Sine, square, and triangle waves at all frequenciesHere are the front/back view of layout, as well as the front layout annotated to roughly correspond with the high-level blocks from the schematic:Schematics:

author: MarkF
author_rank: Super Contributor
timestamp: October 18, 2023, 04:51:20 am
content: Have a look at the Function Generator I built using a AD9834 and screen captures of the waveforms:https://www.eevblog.com/forum/testgear/looking-for-lt$50-function-generator/msg3082494/#msg3082494By taking advantage of the differential outputs of the AD9834, changing the amplitude does NOT change the DC offset.The only thing I don't like is that the sine and triangle outputs are on one pin and the square wave on another. (Note: I don't have any scaling or offset on the square wave output.) The square wave output is just a TTL level in my design and it includes a sync pulse for freq sweeps and is multiplexed with the MCU to provide a PWM output.Modified design (haven't built it):

author: jgrossman
author_rank: Regular Contributor
timestamp: October 18, 2023, 05:17:01 am
content: Quote from: MarkF on October 18, 2023, 04:51:20 amInteresting! I did look at the AD9834, but because for me this is not really for me to DIY my own function generator, but more of a learning project as a first foray into electronics design, I opted for the simpler (and cheaper) part. In the same vein, to reduce the scope of this for myself I didn't really want to deal with arbitrary DC offset, so I limited it to essentially zero-centered or not, since adding centering off the fixed offset AD9837 isn't too bad.Just curious, what is the purpose of hex inverters on the digital output? Seems to me the double inversion in and of itself isn't useful, so it must be providing some other property for you.

author: Hammbone
author_rank: Newbie
timestamp: October 18, 2023, 05:58:09 am
content: Why do you have a 50 ohm parallel termination at the output? I would think you would want it to be a 50 ohm in series with the output. That is typically how most signal generators work.

author: newbrain
author_rank: Super Contributor
timestamp: October 18, 2023, 08:40:15 am
content: Quote from: MarkF on October 18, 2023, 04:51:20 amI have also built something based on the AD9834, quite similar in many respects.I use a balanced filter directly on the DACs outputs, to avoid feeding extra stuff to the output amp, though.I'm also using a dual DAC to control the output amplitude (via biasing of the current setting resistor) and to add a programmable offset to the output waveform.For higher quality (14 bit DAC) and more control in amplitude and phase I'm now using an AD9954, nice little ($$$) DDS - I'm using the phase and amplitude controls, at 384 KSamples/s, to recreate an SSB signal at any freuency.Quote from: jgrossman on October 18, 2023, 05:17:01 amThe four inverters are there to provide a 50 Ω output impedance, given by the 4 × 200 Ω resistors parallel; ¼ of the output impedance of the inverters needs to be added, but it's in general quite low, in the order of a few ohms, so this is good approximation.The extra inverter driving the 4 is probably not necessary, but does not hurt.My major problem with that setup for the square wave is that at higher frequencies the duty cycle is not 50% (and not even constant, periodically jittery?), as it takes the MSB of thephase wordEdit: no, of the sin output, but the consideration still holds.The AD9834 provides a comparator that can directly square the DAC output, with better results.Yeah, no. Perhaps my brains are old and scrambled (cit), mixing up the 9834 with something else. The comparator output and sign bit are on the same pin, SW selecatable, so all is good (sign for lower F, comp out for > 4 MHz). Sorry for the bad info.

author: MarkF
author_rank: Super Contributor
timestamp: October 18, 2023, 04:58:37 pm
content: Quote from: jgrossman on October 18, 2023, 05:17:01 amI understand trying to save money. But, have you considered just HOW HARD it is going to be to hand solder a 10-LFCSP-WD package.Quote from: newbrain on October 18, 2023, 08:40:15 amYa. I looked at using the on-chip comparator (after PCB was built) to solve the jitter of the sign-bit output. But, the 4MHz freq limit is a non-starter. I can use something external for now. If I decide to build a new PCB, I can look for a suitable comparator at that time.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 18, 2023, 05:41:20 pm
content: Quote from: MarkF on October 18, 2023, 04:58:37 pmHaha yeah, I did notice that. I plan to use solder paste for that part in particular. I realize now you can't see, but I put a fill on the underside of the AD9837 footprint too:So using solder paste and being able to heat the backside for the GND pad, I'm hoping it's nottoobad

author: Kleinstein
author_rank: Super Contributor
timestamp: October 18, 2023, 06:15:41 pm
content: The series termination at the output is definitely a thing to change. Most OP-amps do not like driving a higher capacitive load or unterminated cable.The digi pot in the gain setting part may not be ideal because of parasitic capacitance at the inverting input. It is also usually better to use both sides of the pot and not just a adjustable resistor.Coarse amplitude settings (e.g. 20 dB steps) are usually better done with switches or relays, possibly even at the very output after the amplifier. At the relatively low frequency aimed for this may not be such an issue, but it would add some protection and reduce noise at the lowest amplitude setting. The DC offset is often better set after the gain, so one could get a large offset also with a small amplitude. So it would be more like a fixed DC correction and than gain and only at the end a variable DC offset to add.The filter after the DDS is rather minimalistic. This may not work well with the slower A version and > 1 MHz. Usually one has a higher order LC filter to get a little sharper cut off, even if this distorts the triangle. The triangle waveform will no be very good at higher frequency anyway and for an at least somewhat better triangle one may want the faster B version of a faster chip like the AD9834.The square wave, with the AD9837 would not longer be very sharp edge, as it also goes through the filter. The square wave from just the MSB also has quite high in jitter - for a low jitter square wave one would have to go via sine wave, LP filter and comparator, e.g. like included with the AD9850 - but these don't have the triangle anymore.The max1044 and similar switched capacitor supply chips are producing quite some supply spikes on both the input and output. They usually need careful decoupling and maybe added LC or RC filter stages for the input power and output.For the layout, the few traces on the blue layer cut the ground plane to pieces and can make a good slit antenna. A ground plane usually does not like long cuts by traces running inside.I would like more space between U5 and U6 to ease on soldering. The output amplfier may also want a bit more copper area connected to the supply pins, that can help cooling. The higher speed OP-amps tend to run quite warm, especially when driving a high load like 50/100 Ohms.

author: MarkF
author_rank: Super Contributor
timestamp: October 18, 2023, 06:57:19 pm
content: Quote from: Kleinstein on October 18, 2023, 06:15:41 pmYes. I used a LM7171 in a SOIC package and it gets very hot driving a 50Ω load.I limited my output to 2Vp-pand a DC offset of +/-2.5V to reduce the op-amp heating.You WILL have over heating issues and should take measures to reduce it.

author: temperance
author_rank: Super Contributor
timestamp: October 19, 2023, 01:52:17 am
content: Why do people insist on drawing schematics by cramming different building blocks into rectangles and then proceed to connect those together with net labels?It makes schematics unreadable.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 19, 2023, 02:59:17 am
content: Quote from: Kleinstein on October 18, 2023, 06:15:41 pmSo, something more like this?The reason I originally had so little vertical space in the opamp area was because the top of my board was about level with R5, originally. With the movement of SW2 up there though, I see no reason not to take advantage of the space to address some of your concerns.Quote from: Kleinstein on October 18, 2023, 06:15:41 pmI'm not too sure I know what you mean here, would you be able to draw a quick napkin diagram?Thanks for taking the time to leave some detailed feedback, appreciate it!

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 19, 2023, 07:41:29 am
content: First, the schematic looks well organized. No overlapping things. Divided in functional blocks. Signal flow from left to right, voltages from top to bottom.I also like the bigger texts for quickly identifying schematic sections, but I don't like the yellow boxes. Those boxes add nothing that a bit of whitespace on the schematic does not make equally clear, and they tend to absorb a lot of time during schematic design and maintenance.Separating analog and digital GND planes is a deprecated practice though. Using a single solid GND plane and combining that with some physical separation between the analog and digital sections is nearly always a better solution. Take for example the control lines to U5. The return paths for these signals have to make a detour to wherever the connection between the GND planes is. Noise generating U4 is now also quite close to the analog section. You have a quite big PCB. It's easy to have multiple centimeters of distance between the analog and digital sections by moving those sections apart.And why use an USB to serial converter IC? Your STM32L053 has onboard USB. There are probably plenty of examples to use it as a CDC device. USB may be difficult to get going at first. But you can at least route the USB wires, and then use some resistors (just like R6 and R7) to either use U4 or the USB of the STM32 directly.I also sort of like the jumper for current measurement, but it is also a possible failure point. I would probably add a shunt resistor directly on the PCB, or add a "normally closed solder jumper". If you more projects with USB, it is probably worth it to have the ability to have an adapter cable (or PCB) so you can directly measure current through the USB cable. Especially for the first power up, it's also handy to power it from a current limited power supply.I don't see a crystal anywhere on the PCB. This may work (RC oscillators are getting better) but they generally still have a 1% error (which is acceptable for Uart). But watch out for temperature differences.I don't see any PWR_FLAG symbols, and some of the uC pins do not have "No Connect" crosses. Did you run ERC?I also prefer to break out unused pins to some sort of pads, and often add an experimentation area (with separate pads) to be able to easily make modifications. Especially for prototypes.As Hammbone already mentioned. R3, the 50 Ohm resistor does not make much sense. The output impedance is determined by U6B, the LMH6634 opamp. R3 just draws extra (too much?) current from the opamp output.I also like to have SW1 and SW2 close together, so you can both push them with a single finger.Add a KiCad logo, your own logo, and a serial number or date to the PCB.Add texts to the Silk screen (legend) to identify things: Functions of switches. Function of connectors. pinout of the programming pins.I see you already moved a lot of the tracks to the top side. This is good (For EMC reasons), but you can move more of them to the top. In general it's better to keep the GND plane uninterrupted, even if it means detouring signals on the other side. (Except for some critical signals, but your design does not have these). Both Rick Hartley and Robert Feranec have made good youtube video's about the importance and quality of GND planes. I also don't like the hatched GND plane. Solid copper GND plane shortens the return path of signal currents. You can balance the amount of copper on both layers (against warping, although that is not such a big issue as it used to be) by adding more copper on the top too.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 19, 2023, 01:48:37 pm
content: Quote from: Doctorandus_P on October 19, 2023, 07:41:29 amWasn't aware this was the case. Was mostly following the latter portion of the following advice from the AD9837 datasheet (emphasis mine):QuoteIf that's not considered good practice anymore, I would rather do away with it, makes it easier on me haha. Ope, also just realizing "minimum etch" didnotin fact mean hatched. I'm not sure if I was just confused (very likely) or if an opamp datasheet recommended that.Quote from: Doctorandus_P on October 19, 2023, 07:41:29 amI originally started with the onboard USB, but really mostly because I wanted to. Also because since this part is pin compatible with some devices thatdon'thave USB, I wanted to be able to swap STM32 more easily, since most of those parts support the bootloader on USART2 on PA2/PA3. Also, most (all?) of the nucleo boards I have use those for the ST-LINK VCP already, so even though it would be a small change to just change which UART it is using, this way it "just works" on the prototype board.EDIT: Oh and also this STM32 doesn't support bootloader over USB to begin withQuote from: Doctorandus_P on October 19, 2023, 07:41:29 amYeah, but after reorganizing the schematic for some pin-changes after my first pass I forgot to do it again. Re added those and still passesQuote from: Doctorandus_P on October 19, 2023, 07:41:29 amGood ideaQuote from: Doctorandus_P on October 19, 2023, 07:41:29 amOk, so no resistor on the signal output, period? Just straight from opamp to BNC?Quote from: Doctorandus_P on October 19, 2023, 07:41:29 amSome if the issues I had here were with the difference in SPI pin orientation between the DDS and the digipot. I think by expanding the space in that portion of the board in general though, I might be able to alleviate that.Quote from: Doctorandus_P on October 19, 2023, 07:41:29 amSimilar thing as before, given my inexperience I just blindly followed the DDS and opamps datasheet layout suggestions.Thanks for the input!As an aside: Is there a better way to sync my PCB and schematic if I want to re-annotate the schematic part numbers? Or should I not even care about that. The reason I ask is because right before posting, I had touched up the schematic, synced to PCB, and suddenly it thought I was missing half the board because the part IDs were no longer the same... had to go and hand verify/change most caps/resistors on the board.

author: MarkF
author_rank: Super Contributor
timestamp: October 19, 2023, 03:32:22 pm
content: Quote from: jgrossman on October 19, 2023, 01:48:37 pmNo. You want to provide a low-pass (reconstruction) filter and a 50Ω output impedance.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 19, 2023, 04:59:07 pm
content: Quote from: jgrossman on October 19, 2023, 01:48:37 pmIn theSchematic Editor / Tools / Update PCB from Schematic process there are a few checkboxes. The first isRe-link footprints to schematic symbols based on their reference designatorsand this checkbox should beOff. When it is off, KiCad uses the normal method which are UUID's. That checkbox is only used when things got out of sync somehow, and the UUID connections need to be restored.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 19, 2023, 05:53:35 pm
content: The normal way is to have a LC based elliptic filter directly after the DDS chip, so before any amplification. Amplitude setting and amplification would be after that.Ideally the triangle wave would like a different (more Bessel type) filter. Better DDS/AWG geneators have this option with the sharper filter for sine wave to allow using higher frequencies, like 1/3 the clock.With the Bessel type fitler one has to expect aliasing / artifacts maybe already at clock / 5 , but on the positive side the triangle wave is less distorted from phase shifts.The filter looks similar to the simple LC low pass shown by markF, but with extra capacitors in parallel to the inductors to add zeros.Directly from the fitler to the output is not ideal as the filter needs a well defined output load and would not work the same with an open output. Especially at the lower frequencies one may use the generator also without load matching at the output, e.g. connect to a higher impedance amplifier / scope.The output would have a series resistor of some 50 ohm. Optional there could be a relay for a 50 ohm resistive attenuator (e.g. -20 dB) directly at the output.Directly from an OP-amp to a BNC ouput is gnerally a bad idea - many amplifiers can already oscillate from the capacitance of 2 m of coax cable ( ~ 200 pF), the faster ones even earlier.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 20, 2023, 05:35:25 am
content: Quote from: Kleinstein on October 19, 2023, 05:53:35 pmSo, something like this instead of the RC filter (or in addition to?):I used this toolhttps://markimicrowave.com/technical-resources/tools/lc-filter-design-tool/. I placed a 200Ohm resistor after the filter to match the 200Ohm resistor on the AD9837. I also changed to a 16MHz clock to give me more ceiling room for filtering out clock images on the output without affecting my signal as much.I supposed I could also lay out a bessel-type filter in parallel with this one, and switch between the two using another one of those TMUX121 SPDT switches for better output on triangle, but not sure if it is worth it since with a 16MHz filter my output is max 1/8 the clock (or less, since I am probably going to pull back to 1MHz max)Would it be best to put a filter on the opamp output, too?

author: Kleinstein
author_rank: Super Contributor
timestamp: October 20, 2023, 08:32:21 am
content: The LC filter usually needs a defined load, so this time the 200 ohm towards ground. Usually one would have a higher filter, like one more such fitler step.The output would than get an amplifier (OP at the output).A 2nd path and 2nd filter is a bit tricky as the 2 can effect each other as the Vout is not a pure voltage output with zero output impedance.Not sure how important the quality of the triangle wave is - it would not be great anyway.The possibly more relevant point could be a low jitter square wave one a separate output derived from a comparator off a sine wave.If costs are an isse one can also use cheaper switches than TMUX121 etc. e.g. TMUX4053 and even 74HC405x are possible too. It should be possible to combine the DC offset corection and gain setting with 1 OP-amp. For the coase gain after the amplifier I would even consider a crude, old style mechanical switch (DPDT).

author: duak
author_rank: Super Contributor
timestamp: October 20, 2023, 03:05:06 pm
content: It shouldn't affect the layout much but the fc of the reconstruction filter must be 1/2 or less of the sampling clock to be of any use. Sampling theory predicts that aliases of the desired waveform exist imaged around the sampling clock, eg. with a 16 MHz clock the desired 1 MHz sine wave will also have 15 and 17 MHz components. Selection of the filter's fc is determined by how flat the response is for the desired waveform vs how much to attenuate the aliases. A 1 MHz triangle wave is going to need a fairly complex filter so as to look not too rough.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 22, 2023, 08:07:46 am
content: It is a little strange to have the DDS chip with USB supply, but not µC to control the frequency and other settings.It would make more sense to have a PCB similar to the 1st. suggestion with DDS chip, µC and a minmal amplifier.I don't think the series resistor R4 is right ar the input of the fitler, I would more expect a resistor to ground.The comp pin wants a separte capacitor to ground, not a link to the supply.The filter part should have a much more careful layout, likely with also ground on the top side.The filter is designed for 200 ohm output impedance, while the usual BNC / SMA connections are for 50 ohm cables.If needed one could change the filter to 50 ohm impedance, though this would mean a rather small amplitude (1/4 as with 200 ohm as the DAC is a current source).Even with the +- outputs, when using only 1 the output signal still has an offset. So one has to deal with this. The AD9850 data-sheet may give some hints on how to handle this: use the average of Iout+- to get the offset and than subtract it in an exra step.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 22, 2023, 08:14:40 am
content: Quote from: Kleinstein on October 22, 2023, 08:07:46 amYeah, sorry I had deleted that post shortly before this response. I hadn't really put enough thought into what I wanted to do there, and also realized like you mentioned I would almost certainly want an on-board micro to control it, and that very quickly I would end up right where I started and the "evaluation board" would become the project again. Thanks anyways for the input. Do you know any resources I could study for laying out discrete filter elements?

author: MarkF
author_rank: Super Contributor
timestamp: October 22, 2023, 01:19:35 pm
content: Quote from: jgrossman on October 22, 2023, 08:14:40 amHave a look at Analog Devices application note:https://www.analog.com/media/en/technical-documentation/application-notes/351016224AN_837.pdf

author: jgrossman
author_rank: Regular Contributor
timestamp: October 22, 2023, 03:12:13 pm
content: Quote from: MarkF on October 22, 2023, 01:19:35 pmExtremely helpful, thank you.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 23, 2023, 01:48:31 am
content: I've decided to go ahead with using the AD9834 instead, which has basically come down to a redesign. The FS_ADJUST and complementary outputs lend themselves well to being controlled by two STM32 DAC channels to set the offset and amplitude (analogous to MCP4812 in markyF's design). This removes the need for the centering analog switch and the digipot gain control.I've attached my very WIP schematic, and have a few specific questions:Is there a way to simplify my output selection circuit? I want to use a SPDT relay to switch between the comparator and IOUT signals so they can utilize the same BNC. I also want to use another SPDT relay to switch between the output BNC and a loopback to the MCU to self calibrate the DC offset (and maybe gain?) in software with one of the ADCs on the MCU.Here is what I have:One issue I'm coming up against is having a safe default state of the system. I don't really want to pump just whatever garbage is in the AD9834 registers to the BNC, andespeciallynot back to the MCU. For this reason, I'm using the SPST-NO relay in between the comparator-iout switch and the calibration-bnc as a kill switch. Something about this smells, and was wondering if there is a better way. I thought about using the SHDN input of my ±9V rail generation to just not apply rails to the opamps, but this seems like it would damage them.Regarding the following:Quote from: Kleinstein on October 22, 2023, 08:07:46 amThe series resistor comes from copying this output for a 37.5MHz low pass filter:Am I misinterpreting this somehow? I notice when I export to LTSpice, it's done slightly differently, with the AC source having an intrinsic 50Ohm series resistance. This would still indicate to me a series resistor, since the AC source can be broken down into an ideal AC source and an ESR of 50Ohm.For the COMP pin, that actually looks correct from the datasheet... wonder why markF is instead putting the capacitor to 5V?How can I avoid the amplitude loss in the low pass portion? Could I just use a fixed gain opamp circuit to compensate this known loss to bring it back up to what it was pre-filter? Or is there another typical solution.I want to be able to do amplitudes of maximum 5Vpp. I noticed markF in another topic noted that the LM7171 got hot at 2Vpp, and wondered if a small passive heat sink like these would be enough to alleviate this:https://www.aliexpress.us/item/2251801297859915.htmlPS: What is the forum etiquette on changing topic titles? This has clearly devolved from "check my layout?" to "help me with my design", but I'm not sure if it's considered OK to change the title to reflect that.

author: MarkF
author_rank: Super Contributor
timestamp: October 23, 2023, 03:42:31 am
content: Just a couple thoughts:There are two versions of the AD9834. One is 75 MHz (AD9834CURZ) and the other is 50 MHz (AD9834BRUZ). Design accordingly. I designed for and used 48 MHz clock since that was the max clock frequency of a PIC18F2550. You don't really need an elaborate reconstuction filter. The results in my screen captures where with a simple 3rd order Chebyshev filter.The LM7171 only got hot driving a 50Ω at 5Vp-p. But, you can't count on always having a high impedance load. I'm considering a DIN package instead of the SOIC. The bigger package would dissipate more heat. I also didn't tie the 'NC' pins to the ground plane which will also get rid of heat. Proabaly a more robust output drive circuit needed here.The comparator output with its frequency limitation is pretty much useless. Just forget it has one.If your thoughts were of a square wave output and jitter, you need another solution.I used the 'sign-bit' output on a second output BNC as my square wave (the jitter is not a big problem for me).The 2nd BNC is to provide more functionality over and above the capabilities of the AD9834.Examples: a trigger pulse when doing a frequency sweep, a PWM output from the PIC18F2550. There are probably more things you could do (i.e. maybe amplitude modulation) but I ran out of program memory in the PIC18F2550.If you update the AD9834 frequency at a fixed rate from a processor timer interrupt, you can provide a very nice frequency sweep; up or down.The AD9834 has a high impedance output state (see my attached notes). Parallel it with a MCU pin and careful software programming (i.e. break-before-connect) and you don't need any switches. I forgot to buffer my digital output, so definitely add the hex-inverter for the drive capability.Microchip also makes the MCP4822 which are 12-bit DACs if you want more resolution. All three verisons are pin compatible.I'm actually using the 8-bit version.Correction, I did use the MCP4812.Depending on where you put the reconstruction filter, you should be able to loop back the signal to a MCU analog input pin without any analog switches. Even adding an op-amp to buffer the feedback signal. The output of the AD9834 is well behaved. At least the way I have it and the MCP4812 programmed at power up. (As you can probably see, I'm not a big lover of analog switches. In your case, I don't think you need them.)

author: MarkF
author_rank: Super Contributor
timestamp: October 23, 2023, 04:23:04 am
content: Quote from: jgrossman on October 23, 2023, 01:48:31 amThe capacitor for the COMP pin is wired just as the test circuit shown in the datasheet.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 23, 2023, 04:39:17 am
content: Quote from: MarkF on October 23, 2023, 03:42:31 amYeah, I don't plan on using an external crystal for the STM32. It's max clock is only 32MHz anyway, and it can hit that + crystal less USB with just the on-chip oscillators, so I opted to max my sampling frequency on the DDS instead. I'll look into simpler filters. I think I just took "seventh order elliptical filter" straight from the application note you linked. Did you use a different filter in the screen captures? The one in your schematic appears to be a 5th order:Quote from: MarkF on October 23, 2023, 03:42:31 amYou know, that actually makes quite a bit of sense. I think I may copy you (more than I already have) because having those extra functionalities would be nice. The MCU I picked has 192kB of flash, so I think I'll only be limited to what I can come up with.Quote from: MarkF on October 23, 2023, 03:42:31 amUnless I put it in between the DDS and the opamp (which I would then have to do for both IOUT and IOUTB, right?), the issue I foresee is that the minimum voltage I can put into any pin is Vss-.3V, but immediately on startup, the DC offset generating opamp will cause the spurious output of the DDS through the opamp to be well below that. In my configuration, 0 DAC input applied to the offset opamp will generate a -3.3V offset, so I am worried about my poor little ADC pin when it gets -3.3V applied right off the bat until the DAC can be initialized. That is the purpose of the dedicated switch for the loopback, I would need to configure the output of the system before pumping it back into the MCU.I would really like to, as much possible, make it soonlygood output can come from the BNC. That is, if my absolute maximum rating on the sine/triangle BNC is "-5.5V to 5.5V, 5Vp-p", then even during startup, mode changes, etc, I would like not to violate that so any attached device does not get a beat down. This is the purpose of the normally-open kill switch, so where necessary (startup? not sure when else), it can be open and not put voltage out on the BNC.Quote from: MarkF on October 23, 2023, 03:42:31 amOther than the limitation of having max output 3.3V for the DAC on the specific MCU I'm using, I didn't see an advantage to a discrete DAC. I did originally start the design around it, but I realized the DACs on this STM32 are 12-bit already, and have a hold register so can be trivially set in a very small interrupt handler. I can work around this 3.3V limitation by picking appropriate voltage dividers for the FS adjust and offset opamp inverting input, since I only need ±2.5V offset anyways. So I ended up dropping it for two DAC outputs on the STM32.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 23, 2023, 04:44:11 am
content: Quote from: MarkF on October 23, 2023, 04:23:04 amMy understanding of "DAC Bias Pin. This pin is used for decoupling the DAC bias voltage" would be to decouple to ground, but the test circuit clear as day shows it to AVdd, with no real explanation of its purpose that I saw other than the previous short quote.

author: MarkF
author_rank: Super Contributor
timestamp: October 23, 2023, 06:53:32 am
content: This is the 3rd order filter I'm currently using (and shown in screen captures):The one in the schematic is a re-design if I remake the PCB.

author: MarkF
author_rank: Super Contributor
timestamp: October 23, 2023, 07:26:25 am
content: Quote from: jgrossman on October 23, 2023, 04:39:17 amMost MCU's power up with all their I/O pins as inputs (i.e. high impedance). You could have ahigh resistancevoltage divider on the two DAC outputs to set the DDS output amplitude and DC offset. Something like two 100K resistors between 0V and 3.3V would drive your DC offset to zero until you enabled the DAC output on the MCU.Quote from: jgrossman on October 23, 2023, 04:39:17 amNice. The PIC18F2550 doesn't have a useful DAC.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 23, 2023, 09:15:31 am
content: The filter design tool shown the series resistor (50 or 200 ohm) at the input of the filter, as they start with a voltage source.The DDS chips DAC output is a current source and to set a output impedance one needs the resistor to ground, not in series.The interal comparator is of limited use with it's low frequency limit. A compartor and seprate output for fast rise time makes sense for a low jitter square wave.If really needed one could also a smaller copy of that to the normal input.The adjustment range for the amplitude via the reference / resistor at FS adjust is limited (maybe 10 dB). So that part would only be a fine adjust and I would suggest additional coarse steps with maybe 10 dB and 20 db attenuation / gain steps.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 23, 2023, 03:40:20 pm
content: Quote from: Kleinstein on October 23, 2023, 09:15:31 amHow does that work? From CN-0156https://www.analog.com/media/en/reference-design-documentation/reference-designs/CN0156.pdf:$$I_{FULLSCALE} = \frac{18 \times (V_{ref} - V_{dac})}{ R_{set}}$$Would this not imply that when Vdacis equal to Vref(1.2V in this case), that the output current is 0 (ish), and so the voltage must also be 0 (ish)

author: Kleinstein
author_rank: Super Contributor
timestamp: October 23, 2023, 04:15:55 pm
content: One may be able to set the amplitude very low low (e.g. near zero current), but with too low a current the accuracy of the DAC will likely suffer. So at least the very coarse amplitude adjustment (e.g. 1 or 2 attenuator steps) would be better done externaly. The datasheet gives an amplitude range of 600 mV to 30 mV. So it may be OK to use a little more of the range (e.g. some 20 dB for amplitude adjustment via the reference side. If more is wanted an external attenuator would be a good idea.Keep in mind that with a change in the amplitude from the ref. side there will also be a change in the DC offset.

author: MarkF
author_rank: Super Contributor
timestamp: October 23, 2023, 09:29:17 pm
content: With my gain of 4.3 to get a +/-2.5V output swing, the output gets a little noisy/fuzzy at levels say below 0.5V as @Kleinstein is indicating. If you're still wanting a 5V output range, you might want to consider a high/low output range selection with two op-amp gains for a better low end response. Or a second op-amp stage with a 2x gain that you can switch in and out.Quote from: Kleinstein on October 23, 2023, 04:15:55 pmI believe the @jgrossman is now planning to use the AD9834 complimentary outputs to drive a differential op-amp.In which case, changing the amplitude will not effect the DC offset.Note. I did have to tweak the DAC output (in software) to obtain a zero DC offset. Or you add a trimmer pot in the op-amp creating the offset voltage.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 23, 2023, 09:31:22 pm
content: Quote from: MarkF on October 23, 2023, 09:29:17 pmYeah, I'm using the differential outputs now

author: jgrossman
author_rank: Regular Contributor
timestamp: October 24, 2023, 01:20:49 am
content: Quote from: Kleinstein on October 23, 2023, 04:15:55 pmJust to make sure I understand, if I wanted say, a -3dB and -6dB attenuation, I could set up a circuit like this on the output, with relays between signal and R8/R9:I guess I would also get a -4.8dB attenuation with just R9.Then, with an appropriate gain on the opamp, I would get 5Vp-pthat can be coarsely adjusted in halves, and finely adjusted with the DAC input.Or would it be better to attenuate before the opamp, so that it does notalwaysdrive 5vpp through the attenuation?

author: MarkF
author_rank: Super Contributor
timestamp: October 24, 2023, 03:15:35 am
content: The short answer: NoThe longer answer:Most function generators have an output impedance of 50Ω. Modern generators it is selectable. The generator assumes that the load impedance matches in order to provide the proper output voltage when the user changes the amplitude.In your last circuit the output impedance will vary when changing output ranges. This will make it impossible to set the proper amplitude or to calculate a correction if the load impedance is not 50Ω (assuming you have a fixed 50Ω output impedance in your generator). At the very minimum you want your output to have a series 50Ω resistor.Carefully study the circuit from the filter design program. The load resistor (far right in my pictures) is not internal to your generator. It is in what you are connecting to. The placement of the resistors around the filter is important. RL1 should be in series. The filter design also assumes a pure resistive load which you will not have with the filter at the output. This will effect the filter characteristics as @Kleinstein has mentioned.Here's a short video that may help:

author: MarkF
author_rank: Super Contributor
timestamp: October 24, 2023, 05:47:18 am
content: I wonder if something like this might work?Here S1 could be a physical switch or a MCU pin that is changes between low and high impedance to change the gain. With the switch open, you would have a 1x gain. And with the switch closed, you would have a 2x gain.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 24, 2023, 08:34:39 am
content: The amplifiers have a hard time with the unwanted very high frequency part and demodulate part of it. So ideally there should be at least some filtering before the differential amplifier, e.g. at least some capacitance in parallel to the 220 ohm resistors to ground, maybe also 1 LC filter stage. Filtering before the amplifier is more effort because it is for both signals and should be symmetric.Another tricky point is that the offset OP-amp would also have to be low output impedance for the high frequencies. So here one may want some extra capatitance to ground to at least help the OP a little. As the output from the DDS is relatively small, one may have some gain (e.g. x 4 ) already in the differential amplifier this also makes the FB resistors a bit larger.I would prefer adding a DC offset with the 2nd amplifier and thus only after the filters. This would also make the offset uneffected by the 1 st. attenuator setting. In addition the filtered signal would be available without an offset, e.g. for a comparator to generate a good square wave.Changing the gain of an amplifer stage is a bit tricky as the can also effect the frequency response. I would instead consider making the load resistor to the filter a divider and than switch between the undivided and divided (e.g. 1/5 or 1/10) signal. The filter is anyway relatively low impedance (e.g. 200 ohm) and thus suitable for switching.If wanted a 2nd switched attenuator (e.g. 1/10 ... 1/100) could be at the output. This would want a mechanical 2 pole 2 trough relay (or manual switch) and choose on both sides of the 50 ohm series resistor or a 3 resistor (I would prefer T form) divider.

author: iMo
author_rank: Super Contributor
timestamp: October 24, 2023, 08:56:26 am
content: I was using MMICs (4pin package, 6-18dB gain, 1-6GHz BW, 50ohm i/o) amplifiers in past with AD98/99xx DDSes.I would not mess with switching the different Zout, keep it at 50ohm that is a standard..Also do not put 50ohm resistors here and there, those are "impedancies" seen by somebody when looking into an output or an input, they are not real resistors..PS: as I can remember the best spectral output with those DDSes is when using a balun (a transformer) from the DDSes outputs into the LP filter (or into an amplifier). Like the 200ohm balanced -> 50ohm.

author: MarkF
author_rank: Super Contributor
timestamp: October 24, 2023, 05:28:35 pm
content: Had a little play around with a PCB layout. Having a filter on each of the differential op-amp inputs doesn't appear to be very difficult. Used the filter design program with a 100Ω input and output impedances to match the AD9834 200Ω load on its output pins. Cut-off frequency of 16MHz. Would that be correct?All parts are SMD 1206 size.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 24, 2023, 08:01:19 pm
content: As already written before the DAC is a current output. To get a defined source impedance one needs a resistor to ground, not a series resistor. So the fitlers should start with reistors to ground and not a series resistor. One could than use 200 ohm to get the most signal. The 1 K resistors to the amplifier also contribute to the load resistance. So on the output side the resistarts to ground should be a little larger.I would at least plan with pads for capacitors in parallel to the inductors to make it an elliptic filter for an even steeper drop. One could still decide to not populate them.For the layout the filters could likely be closer together. In a first approxiation the currents between the filter sides would compensate. The capacitors looks quite large - 0603 side should be large enough.The FB path at the amplifier should be shorter and with less capacitance at the inverting input. Decoupling at the amplifier is defintely also needed.

author: MarkF
author_rank: Super Contributor
timestamp: October 24, 2023, 08:40:28 pm
content: Well, the filter design tool does not allow a resistor to ground at the front end.So...Also, I used 1206 size for two reasons. One, I wanted a ground trace between the pads to connect the center copper pour to ground. Second, I'm old and my fingers shake. So, nothing smaller than 0805!!!The example PCB is not a completed design. Much to be added.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 24, 2023, 08:54:47 pm
content: The usual filter would be without R1. RL would be the value of R1 in the fitler program.A current source (e.g. the DAC output) wants a resistor to ground for termination. A voltage source has the same resistor in series.having R1 and RL would start with an impedance of RL+R1. For most signal one usually wants RL large and R1 = 0.1206 size is really quite large. The PCBs made in china have no problem in having a trace under a 0805 and even a 0603 with suitable footprint.Chances are one would need a 2 sided PCB anyway and could use vias.

author: MarkF
author_rank: Super Contributor
timestamp: October 24, 2023, 09:11:30 pm
content: Given:RL = 200R1 = 0What would you set for R2?When you're old and gray, let me know how those 0603 parts go.Some days I have trouble soldering through-hole parts. No kidding!

author: Kleinstein
author_rank: Super Contributor
timestamp: October 24, 2023, 09:38:01 pm
content: R2 combined in parallel with the input resistor should be the same as RL as the filter impedance. So this could be 400 ohm for R2 and 400 ohm at the amplfier input.

author: MarkF
author_rank: Super Contributor
timestamp: October 25, 2023, 09:12:04 am
content: I'm still confused.You're saying the DDS RLOADin Figure 1 is R1 in parallel with R2?But, the RLOADin Figure 2 is not R1 in series with R2? Further more, the filter is broken in Figure 2? I should say Figure 2 does not provide a proper load for the DDS?Or, are both of these filter configurations acceptable?Thanks for your patience.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 25, 2023, 10:44:27 am
content: The 1 st filter is OK and the DDS should see a load of about R1 parallel to R2. The details depend on the LC filter components and the depending on the frequency the load impedance may vary somewhat.The filter in fig. 2 is bad, as the input side is not terminated, but sees R1 plus near infinite impedance from the DDS chip current source. At some frequencies the load impedance seen by the DDS may still be R1+R2, but larger excursions are posible if the filter is not designed to work with a high impedance left side. The usual fitler tools / tables assume termination at both ends.The Fig 2 filter would be OK if the DDS output would be a voltage source (e.g. OP output).I don't know if it is possible to also find LC combinations the work in the configuration like in fig 2, but I somewhat doubt it works well, as I have not seen it in professional designed circuits. At least R1 could be droped as a resistor in series to a current source has no effect.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 03:17:22 am
content: Quote from: Kleinstein on October 24, 2023, 08:01:19 pmAfter reading through your discussion with markF, I ran some sims with this circuit:This is a 37.5MHz low pass 5th order elliptical filter (say that five times fast) on both outputs from the AD9834. Would I expect inductors of this size to be much larger than 0603, or even 0805? Skimming through mouser, many of the inductors are 1608 or bigger.... just sanity checking.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 05:32:37 am
content: Hmm... I looked at the LM7171 datasheet, and it recommends a 510Ohm feedback resistor. The problem is if I scale the resistor values for the opamp gain to match, they become small compared to the resistors on either side of the filter, and so my output amplitude is affected (simmed 1Vp-p). The datasheet says "Large values of feedback resistors can couple with parasitic capacitance and cause undesirable effects such as ringing or oscillation in high speed amplifiers." While I want to take their word for it, I wonder what this practically means. Say I want to drive 30MHz sine. Would resistors as big as Rf=17.2k make a meaningful difference?While I could use some voltage follower to separate the impedances (https://www.ti.com/product/LMH6622?*), using larger resistors seems much easier, if there is not a practical effect.* Shoot, this doesn't support the supply input I need.https://www.ti.com/product/THS3062? Does anyone have any suggestions for a low-cost, adequate frequency opamp for a voltage follower?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: October 26, 2023, 05:39:44 am
content: Quote from: jgrossman on October 26, 2023, 03:17:22 amDigikey shows coilcraft 0402DF series, with high SRF, and 5% tolerances.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 05:44:34 am
content: Quote from: PCB.Wiz on October 26, 2023, 05:39:44 amYep, thanks!

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 07:15:04 am
content: Quote from: Kleinstein on October 24, 2023, 08:34:39 amI'm having trouble visualizing this. This is the only thing i can conceptualize, but its SPDT not DPDT as you have mentioned, and I'm not really sure of the resistor configuration.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 26, 2023, 07:56:07 am
content: For a +-5 V supply the LMH6639 or AD8055 are candidates for the amplifier.The filter could still use lower resistors, like 220 ohm, so that the loading from the amplifier is not that significant. It may need a simulation to check the effect of the loading by the amplfier. So R9 and R10 would ideally be a bit larger as R1 and R3 are also loading the filter output. With the amplfier feedback the loading through R1 should be stronger. So R9 and R10 would no longer be the same. Especially R9 may need to be a little larger, as R1 with additional voltage gain is effectively in parallel.For a 75 MHz DDS clock the low pass filter cross over frequency should be less than 37 MHz, more like 30 MHz so that everything beyound 37 MHz is already well attenuated. The maximum usable frequency for a sine would be some 20-25 MHz. The usable frequency for the triangle is considerably lower anyway - maybe 1 MHz or so.Inductors are available also in the small form factor, especially the relatively low values or around 1 µH and less. Some ferrite ones may be tricky with the Q droping at the relevant frequencies. However I am not an RF expert. With a lower impedance and thus smaller inductor values this becomes less of an issue. There is a reason that RF circuits are usually relatively low impedance of some 20-100 ohm as this is the typical cable / trace impedance and parasitics get less relevant. 400 Ohm is already higher than the 379 ohm of free space.Due to the parasitic capacitance and self resonance of the inductors the capacitors parallel to the inductors should be a little (e.g. 0.1-1 pF range) smaller than calculated in the simulation.The attenuator switching would need the relay choosing between a path of just the 50 ohm series resistor and a path with a divided down signal. The divider would no longer have the 50 ohm in series, but the ouput impedance of the divider should be 50 ohm. So may be a divider with 56 ohm and 470 ohm. At the not yet that high frequencies the OP-amp should be OK with the slightly variable load. A true RF style circuit would use a double pole relay and also switch the connection of the divider / 50 ohm and than have a 3 resistor 50 ohm attenuator (e.g. 3 x 33 ohm as a T for a -6db attenuation).

author: PCB.Wiz
author_rank: Super Contributor
timestamp: October 26, 2023, 08:00:58 am
content: Quote from: jgrossman on October 26, 2023, 05:44:34 amThere are also choices at lcsc, pick a high SRF.Unless you have very specific RF uses for this, the output opamp is going to have filtering anyway, and a higher DDS clock will do more than a complex LC filter.Did you also look at aliexpress DDS modules ? - some of those cost less than the DDS chips, and a board could allow for choices via DIP headers ?https://www.aliexpress.com/item/1005002594682266.htmlhttps://www.aliexpress.com/item/4001081438278.htmlhttps://www.aliexpress.com/item/1005002962562189.html

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 08:03:33 am
content: Appreciate it, that makes sense now with the attenuation.What about this circuit to separate the DDS and gain load (could be way off base here, but it worked in sim at least). Ignore whats going on at the top for now, and I haven't modified the filter yet.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 26, 2023, 08:08:27 am
content: Quote from: PCB.Wiz on October 26, 2023, 08:00:58 amI'm maxing out the DDS clock at 75MHz.WRT to aliexpress DDS, yeah if Ineededa waveform solution on the cheap, those would probably work. The primary goal for me here though is to learn, so the exercise of building the design is more important to me than overall cost or function, as long as it meets some minimum spec/usability.

author: MarkF
author_rank: Super Contributor
timestamp: October 27, 2023, 07:35:41 am
content: You appear to be driven to design a filter at the nyquist frequency. No doubt, you've been taught that the nyquist frequency is the highest frequency you can generate. Which is true (HOWEVER...). As said before, don't design for the absolute max. Give yourself a little breathing room. So, let me give you an exercise and then ask a few questions.Exercise:1) Draw one cycle of a sine wave on a piece of paper.2) Draw dots on the sine wave until you think by connecting them you get an acceptable sine wave.3) Count the number of dots you drew.Questions:1) Divide your 75MHz AD9834 clock by the number of dots. What frequency did you get?2) How many samples are you going to have at the nyquest frequency?3) How well are that many samples going to represent a sine wave?4) Now, what frequency do you expect to be able to generate? Maybe, re-visit your filter design?Not trying to be a smart a$$ here. If you already know this, I'm sorry.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 27, 2023, 08:00:15 am
content: No offense taken. I'm not really trying to drive signals at 30MHz or whatever, I would probably want to cap that at 15, or even 10. The reason I am shooting for such a comparably high filter is to give plenty of breathing room for the higher harmonics of the triangle wave, which will be going through the filter as well, which as far as I understand even at frequencies like 1-2MHz will only get like 7-15 of the harmonics under 30MHz. Anyways all that to say I'm thinking in terms of maximums to get the best result when I pull back for implementation.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 27, 2023, 08:43:03 am
content: The triangle is limited in useful frequency for more than just harmonics. With the harmonics it is not so much about the really high ones, but about getting phase shift for some 5 times the frequency. Most filters (especially the sharp ones) effect the phase already quite a bit below the cross over. A sine wave output usually does not care about the phase response. Ideally the filter for the triangle is made for a more linear phase, which is corresponding to just a delay in time. So a relatively high cross over frequency makes some sense, but one should still stay below the nyqueist limit.The other point is that a triange with a low number of points per period is that the peak value can vary. This can add some modulation near the peaks.The system with the extra buffers should work but is quite some extra effort. A simulation should tell how much the amplifier is actuall loading the filter on one could adjust the loading resistor accordingly. The one for the non inv input to the OP-amp is easy to calculate.When not going super fast the LM7171 could also be OK with a higher resistor (e.g. 1-4 K) in FB. So I would go for adjusted resistors and a little lower fitler impedance instead of extra buffers. With a USB supply and charge pump for the negative side one is anyway a bit limited in the power, espcially for the negative side.

author: mawyatt
author_rank: Super Contributor
timestamp: October 27, 2023, 01:17:10 pm
content: Quote from: jgrossman on October 26, 2023, 08:03:33 amYou aren't going to get much of a DDS signal output with C37 and C38 at 0.1uF!!!!Best,

author: jgrossman
author_rank: Regular Contributor
timestamp: October 27, 2023, 06:08:49 pm
content: Quote from: mawyatt on October 27, 2023, 01:17:10 pmOh... sure enough.Quote from: Kleinstein on October 24, 2023, 08:34:39 amI think I was trying to follow this advice, but I'm not sure if it'sreallynecessary to have capacitors in parallel with the first load resistor since it also goes through a low pass immediately after...

author: Kleinstein
author_rank: Super Contributor
timestamp: October 27, 2023, 08:02:51 pm
content: No extra fitlers in parallel to the initial resistors to set the input side termination / DAC load. There are already calculated size capacitors as part of the filter. Added capacitance would change the filter. If one is really serious one may even want to reduce that capacitance by the output side capacitance of the DAC, which may be a few pF. Not sure if there are specs on this.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 28, 2023, 03:38:29 am
content: This is what I've simmed up:For channel 2, I wanted to convert the singled ended 0-3.3V output from either the aux function or MSB square wave from AD9834 to a differential 0.6Vp-pthat matches the AD9834 sin/tri output. This way the offset and coarse attenuation (via switches, not FSadjust) can be controlled together. Probably also going to put a switch to skip processing on channel 2 so that the 3.3V level signal can be used as a trigger, etc.One issue I'm having is that at higher frequencies (5-10Meg), I get about 0.83dB attenuation on the sine channel. While this seems OK, I'm not really sure why and would appreciate some insight here.Also attached the sim .asc, though I changed the opamps to universal opamp2 for ease of sharing. Behaves approx. the same as spice models for the parts I am trying to use.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 28, 2023, 06:34:07 am
content: Quote from: Kleinstein on October 26, 2023, 07:56:07 amWhen I sim this, the impedance is ~56 ohm.When you say "3 resistor 50 ohm attenuator (e.g. 3 x 33 ohm ...)", do you mean "50 ohm" as in "around 50 ohm", or am I misinterpreting here? Don't have an amazing grasp of this, so I'm not trying to correct you, just trying to solidify my understanding.EDIT: Hmm, when I remove the series resistor R4, the output of this sim does get very close to 50 ohm (undershoots a little).When I was googling, I saw multiple sources that gave me the impression that the impedance of this tee circuit is what the input sees when connected to a load of that impedance. This was backed up with sims utilizing various values of resistors output from here:https://www.digikey.com/en/resources/conversion-calculators/conversion-calculator-attenuator.For example, if I wanted a 6.02dB attenuation at 121 impedance, it would spit out R1=40.3296, R2=161.35191. Connecting a tee attenuator with those values followed by a series 121R to ground, the output of the sim was bang on 121ohm.So I guess I have a mental disconnect here.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 28, 2023, 08:33:18 am
content: With the attenuator I was wrong with the resistor values - somehow memory tricked me - sorry for that confusion. I think you found a proper calculator for the attenuators.The 0.8 dB drop could be just part of the fitler response. The filter is not a perfect brick wall. There are compromises with pass band ripple and steepness. Especially with a DDS one does not need it as there is the additional sin(x)/x drop anyway and one may have to correct that. With the fine adjustable amplitude this can be done in SW.In the simulation the resistor R10 for the output load should be 100 Ohm, as 50 ohm in series as part of the amplifier and 50 ohm external load. For the simulation it would not change much.The square wave output part looks overly complicated. It makes little sense to go single ended -> differential and than back again.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 28, 2023, 06:09:55 pm
content: Quote from: Kleinstein on October 28, 2023, 08:33:18 amNo worries! Just wanted to make sure I understood what the sim output represented.Quote from: Kleinstein on October 28, 2023, 08:33:18 amYeah, I guess so. I was trying to make it easier to control the dc offset the same for both, not really sure why I was fixated on making it like the other channel. This circuit works with 1 less opamp, and the single LM7171 is marginally cheaper than the LM7372, even if the latter is dual-channel.It does shift the phase of the input 180deg, though I think that cancels out with the fact the output of the OP U1 on the sine channel is already 180deg out of phase with the output from IOUT, which I think is what maps to the NCO of AD9834 (as opposed to IOUTB which is the complement, I think). Since any other signal passing through channel 2 originates from software, it can just be complemented in sw with no problem.Quote from: Kleinstein on October 28, 2023, 08:33:18 amI would assume this means I have to increase on the gain for channel 1 slightly, since the fine adjust with the FSadjustpin is purely subtractive.

author: MarkF
author_rank: Super Contributor
timestamp: October 28, 2023, 07:19:44 pm
content: I fail to see all this effort to incorporate a DC Offset adjustment for the square/aux channel when there is no amplitude adjustment. All of the sources will be fixed logic levels. The 'sign-bit' output of the AD9834 does not vary with FSadjust. Most likely you will want this output to be solely positive to some logic device or gate. In my experience with it, I have found uses for an amplitude adjustment that was 0V to some +V value though (When using a PWM output for example.).I don't think I would be too worried about filter losses and DC offset errors at this point. More concerning would be the flatness of the filter in the pass-band. I had to fine tune (in software) both the gain and the DC offset after the hardware was built. I suspect you will need small scaling factors in your software too in order to get exact results. In addition, you will probably have two different scaling factors dependent on whether you have the attenuator switched in or out.Also, you're forgetting the elephant in the room. Heat dissipation for the LM7171.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 28, 2023, 08:42:20 pm
content: Quote from: MarkF on October 28, 2023, 07:19:44 pmI guess I'm trying to be able to generate 0-centered square waves, but I'm really racking my brain for a reason to have anything other than 0-centered or 0-V+on the square/aux channel... and really coming short on the former too, other than "because I can". How do you implement the amplitude adjustment? The easiest way I can think of on the spot is to power the AD9834 from 5V from USB so that sign-bit out is 0-5V, then can be attenuated down to 3.3V, 1.8V, 1V or whatever with discrete steps.This would also simplify the circuit overall, only needing the single high-speed opamp for the primary channel, and the one lower speed for DC offset.Quote from: MarkF on October 28, 2023, 07:19:44 pmYes, this is one of the reasons I want some kind of loopback to the MCU from multiple points to be able to do some calibration and store that information to the internal EEPROM on the STM32. Then some algorithm on the software side to do be able to automate that process when required. I was thinking tapping off a few points:DC offset. While I can't directly monitor the whole range (my circuit maps [0,3.3] onto [2.5,-2.5]), I want to measure a few points on the positive side and linearly interpolate that through the rangeSine output (post diff-opamp). Setting the AD9834 reset bit I should get a mid-scale output, which after performing (1), would allow me to be able to calibrate FSadjustby adding a DC offset to place the mid-scale output within the middle of the STM32 ADC range. This would be performed both with and without attenuation.As far as compensating for the insertion loss of the filter over frequency ranges, the only way I could really see that being done automagically is with a fastish ADC (>=100MS/s for a 10Meg signal). That hardly seems worth it here, I'd probably just do this manually.

author: MarkF
author_rank: Super Contributor
timestamp: October 29, 2023, 01:07:15 am
content: I have no adjustment of amplitude nor DC offset of my digital channel. I directly routed the sign-bit pin of the AD9834 and a PWM pin of the MCU directly to a BNC connector. Regrettably, I didn't even buffer the output. As shown, I suggest using the hex inverter configured for a 50Ω output.My MCU and AD9834 are running with a 5V power supply. I'm old enough to still think in 5V logic. A hard habit to break.I don't know how you would do the attenuation for different logic levels. I would be worried that the switching would destroy the rise/fall times.I fine tuned my scaling factors manually via trial-and-error. Don't see any reason for anything complex since you will probably only ever need to do this once. You just need to make sure the gain through the system ends up a little over the max output you want. That way you can knock a little off the FSadjustscaling to tune the amplitude. The fine tuning of the DC offset will mostly be dependent on the resolution of your DAC output and the gain in the op-amp creating the offset voltage to set a precise zero.You may have more variation across the pass-band of your filter than in the rest of the system. Which you can only minimize in the design phase. You're not going to have a lot of control afterwards. The AD9834 is pretty much a setup and let it do it's thing. You don't really have any low-level control over details. Trying to determine what it's doing at any precise moment is impossible.Adding a bunch of extra hardware to perform automatic tuning will add to the cost and will need calibration too. Added switching for it will also be an added risk of failure. This may be more trouble than benefit. Also remember, tapping a signal will also change that signal.Being able to quickly and easily change scaling factors in software would be more of a benefit. Being able to make a measurement and then enter a correction through a GUI would be less trouble than the extra loopback hardware.Are you sure you're not over-thinking the calibration? What accuracy are your requirements? Most likely you're going to dial-in a waveform / measure it on a scope / fine tune it. You will have to put in much more work if you want a precision instrument here. I'm guessing 1% tolerances at best.This is just a basic function generator? Right?

author: jgrossman
author_rank: Regular Contributor
timestamp: October 29, 2023, 01:36:05 am
content: If the STM32 was 5V power-capable, I would probably do that too. The only reason I'm using the STM32 at all is to skill up (I'm a software guy, and some upcoming projects at work are using the STM32). It really is fairly overkill for this application, otherwise.But anyways, I think you are right about over complicating this. Some twiddle factors set over GUI is probably more than good enough.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 29, 2023, 07:49:39 am
content: I've attached a schematic incorporating the feedback I've received so far. A few specific points I want to address:For channel 2, because I'm using the hex inverter to buffer the output, I don't have to care about the impedance of the attenuators, right? So I can use simple voltage dividers through relays, like what is shown?Just realized the inverters can't possibly come after the attenuation; not quite sure what I'd like to to do here but it is late so I'll figure it out later. Is there a reason I couldn't omit the parallel 200Ohm resistors and just switch between some attenuating circuits with 50Ohm impedance?When I look at BNC connectors, they are labeled 50Ohm. From googling that would be the "characteristic impedance"? I.E., I shouldnotconsider them as 50Ohms in series? Sanity check here.Is there a more standard way to represent the SPDT symbol for the attenuation in a way that makes sense topologically? The one I grotesquely morphed into the symbol for K3 doesn't look too slick, but the normal one puts the input and output (in this case) on the same side so it can't flow nice and tidy left to right. Curious what others have seen.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 29, 2023, 08:46:37 am
content: The Inverter as digital gates want a full range signal and thus no attenuator infront. The usual logic chips are not strong enough to drive a 50/100 ohm load. The logic gates are also cheap and inverters come as a 6 pack, so why not share the load.For a variable amplitude one could replace the inverters with AND or NOR gates and than use 4 x 200 ohm resistors as a simple 2 bit DAC by choosing how many of the outputs are active and how many are fixed GND. This would allow levels of 5 V , 3.75 V, 2.5 V and 1.25 V. With slightly different resistors (e.g. a mix with 220 and 180/150 ohm) one could get more and different levels. For the actual levels one would also need to include the output resistance of the chips (some 30-50 ohm).The BNC connectors are made for 50 ohm characteristic impedance. This does not mean there is a 50 ohm resistance inside, but when used with 50 ohm (e.g. standard coax) cables at both sides it would not be a discontinuity. As the connector is short anyway this would be relevant only for much higher frequencies (e.g. 500 MHz range). Here the 50 Ohm BNC mainly acts like a label, telling the user to use 50 ohm cables and not 75 ohm ones (video standard).I think the low pass fitler is too high in impedance. This may not work with the normal 3 mA DAC current (too high a voltage for the DAC) and parasitic capacitance gets problematic. There is a reason that the standard with DDS chips is with 200 ohm termination and sometimes lower for the very fast ones.The output fitler looksOK in principle, but I would have a larger attenuation step, like -20 dB there. The fine adjustment can be done at the DDS ref.. It is more that one may want a larger range. Still this is only a change in the resistors.

author: MarkF
author_rank: Super Contributor
timestamp: October 29, 2023, 12:38:53 pm
content: Quote from: Kleinstein on October 29, 2023, 08:46:37 amI thought you said that the input impedance of the filter was (R31 || R26) and (R32 || R34) which is the 200Ω load wanted by the DDS. I would not have used 470Ω resistors. The nearest standard values would be 390Ω or 430Ω. I indicated 430Ω only because I was using that value elsewhere. Refer to:https://www.eevblog.com/forum/projects/dds-function-gen-layout-review/msg5133393/#msg5133393Are you saying R31 = R26 = R31 = R34 = 390Ω ?@jgrossman,Resistors R23 and R24 forming the voltage divider drive FSadjustseem to be too high to me. I would try to make them an order of magnitude lower than R25 (6.8KΩ). You want the current through the divider to dominate over the current going into FSadjust. I don't know what the peak voltage is of a STM32 DAC to suggest values.Refering to the AD9834 Eval Board, they have a 100nF capacitor on the FSadjustto ground. Seems like a good idea to reduce noise and provide a stable reference.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 29, 2023, 02:10:40 pm
content: The 600 mV compliance voltage for the DAC output are maximum values. 200 ohm is the maximum valid load see for 3 mA of DAC current. I am not so sure how much the LC filter part may add the the impedance at some frequencies. It should not add much at the low frequencies and R32|| R34 should be OK there. So I would consider 390 ohm the absolute upper limit, maybe better go even lower. For the upper path R29 is also kind of parallel to R26, so R26 should be somewhat larger. However this does not fully work for the DC part as the OP's input is not at GND, but DC wise lifted and the extra DC offset also adds to this.AC wise R29 sees the near (e.g. 85%) the inverse voltage and is thus eben more relevant. For the filter the AC part is the more relevant one. In the last PDF R29 with 640 ohm would already be more than enough AC loading, about equivalent to some 350 ohm.To be on the safe side (avoid distortion from exceeding the 600 mV) I would go even lower in the resistors. The nornal value in appl. notes seems to be 200 ohm.I would consider 220 ohm for R31, R31. R34 and R26 get than larger due to the additional loading. Probably around 270 ohm for R34 and some 400 ohm for R26. The simulation should help to get the right values here. The loading due to the differential amplfiier is a bit tricky to calculate in the head.The point with parasitic capacitance is not directly related to the DAC. RF circuits just don't work well at high impedance and 400 ohm is already higher than the free space impedance. With higher impedance (e.g. > 200 ohm parasitic capacitance can be an issue). With very low impedance ( < 20 ohm) parasitic inductance is more relevant.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 29, 2023, 08:56:36 pm
content: Quote from: Kleinstein on October 29, 2023, 02:10:40 pmWhen I use asymmetrical resistors for R34/R26, the OP output has a pretty bad DC offset. When R31=R32=270R and R26=R34=400R, the amplitude of the positive and negative peak are within 1% of each other (~2.9V). The voltage directly from the current source is ~400-450mV, which seems to me to be plenty of headroom from the 600mV max. I'm not really sure in SPICE how to correctly measure the load of the OP to be able to make a more informed decision other than "lets just plop some numbers down and measure some points".Quote from: MarkF on October 29, 2023, 12:38:53 pmYeah, that's a good point. I just plopped in the numbers given to me by the TI voltage divider tool, but they are both available in a lower decade (187 and 107). The STM32 DAC is 0-3.3V, which I'm scaling to 0-1.2V. I also think a cap on the voltage ref is a good idea, will probably do that on the input to the voltage offset circuit as well. Also going to change the range scale on that from ±2.5V to ±2.75V to give myself room on both sides, since I actually want to perform at ±2.5V, and if either end isn'tperfect(and it won't be) I am basically SOL.

author: MarkF
author_rank: Super Contributor
timestamp: October 29, 2023, 10:08:03 pm
content: Quote from: jgrossman on October 29, 2023, 08:56:36 pmA 100nF capacitor might be a little big. Since you have lots of program memory in the STM32, you could probably emulate an 'amplitude modulated' signal. Setting the carrier freq in the DDS and then varying the FSadjust. You will have to generate a sine wave via a timer interrupt. The STM32 might be fast enough to get up in the 100KHz if you use fixed point math. I can point you to some online lectures from Cornell Univ. if needed for that. Might be useful for testing some device.R23 = 360Ω and R24 = 200Ω might be acceptable choices. You also need to insure you're not overloading the current capabilities of the STM32 DAC.I actually have a cap in the feedback of the 'offset voltage' op-amp to clean it up. Don't know if that is the right place or how I got there during testing. As far as having the offset being symmetrical, it just has to be close. You will correct the centering and +/- range in software when you do the calibration. You will adjust it for center and then limit the value to the lesser of the two sides.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 30, 2023, 12:06:19 am
content: Quote from: Kleinstein on October 29, 2023, 08:46:37 amAs long as the parallel resistance is about 50Ohm, I can pick any values I want, right?Looking at this quad-and:https://www.ti.com/lit/ds/symlink/sn74hcs08-q1.pdfIn the graph, Rlow≈ 34Ohm, Rhigh≈ 45Ohm, so I picked 40Ohm to use as the "average" output resistance to add to the nominal resistor values I pick.Using these resistors, I get pretty nice levels for 3.3V, 2.5V, 1.8V, and 1V, and adding 40Ohm to each gets a 49.162 Ohm output impedance:Quote from: MarkF on October 29, 2023, 10:08:03 pmYeah, I guess that would be compensated for with cal. So is the target equal current from IOUT/IOUTB?I would appreciate those lectures, yeah!

author: jgrossman
author_rank: Regular Contributor
timestamp: October 30, 2023, 03:48:38 am
content: Is this a valid layout for the filters following ad9834? I tried to adhere to AN-837 from analog devices. Those vias are going to an internal ground plane.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 30, 2023, 08:28:21 am
content: For the resistor values for the square wave output one is not totally free, not to overload one channel. The values shown look OK with not too much differences.The filter layout looks OK. I would prefer to have the filter a little closer to the DDS chip and the resistors R32 and R31 towards the center GND instead the outer GND. The sum of the 2 currents from the DDS chip is constant and thus a reasonable good compensation of the AC component. I see no real need to keep the 2 filter sides so far seprated.For the amplifier it may be better to have R27 and R29 closer to the inverting input pin of the OP-amp. One should normally keep the capacitance of the inverting input node small.

author: MarkF
author_rank: Super Contributor
timestamp: October 30, 2023, 02:28:37 pm
content: Here are the two relevant lectures from the ECE 4760 course at Cornell Univ. The course is centered around the PIC32 32-bit microcontroller. There are 31 lectures in total. If I remember correctly, they claim they can generate frequencies up to 900MHz. But the PIC32 uses a 40MHz clock and I believe they used its DMA channels to accomplish those frequencies.In addition, there are two other years available for this course. An earlier year centered on the AVR microcontroller and currently they are using the Raspberry Pi Pico for the course.

author: jgrossman
author_rank: Regular Contributor
timestamp: October 30, 2023, 03:01:24 pm
content: Quote from: MarkF on October 30, 2023, 02:28:37 pmThanks for the links. I'd have to do a trade study, but given that my STM32 has 192kB of flash, I might just bake in a sine table that maps onto the FSadjustpin and use DMA triggered at the modulation frequency to the DAC. I haven't watched these yet, but I would imagine that's similar to how a DMA-based solution would work there.

author: MarkF
author_rank: Super Contributor
timestamp: October 30, 2023, 04:43:29 pm
content: Quote from: jgrossman on October 30, 2023, 03:01:24 pmAfter watching the lectures, I built a small eval PCB and using a 256 byte sine table with the audio CD 44.1KHz sample frequency was able to cover the audio frequencies with a MCP4822 DAC. While looping it back into the PIC32 doing a fixed point FFT on a small OLED display. So, you don't need a lot of memory for the sine table. I actually had two tables. One for a sine waveform and one for a triangle waveform. You can put any waveform shape into the lookup table as long as it's periodic.I used DMA to get the FFT samples. But, just a timer interrupt to generate the waveform.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 05, 2023, 03:54:43 am
content: Here's what I have for my updated design:Schematic:Board Layout (stackup is signal-gnd-pwr-signal, but inner planes omitted for clarity):Front is actually bottom (going to mount on some motherboard standoffs+feet), back side is top, with output BNCs and OLED and rotary switch.I really don't like the CH2 attenuation U5/U6/U7, it's pretty much a cluster. Not sure what can be done here.Not really sure to what extent via stitching to power planes by U1 is necessary... kindof just went all in, since I can just take them away if too manyI made vias that are not under the screen blind vias where possible, what is the downside, if any? The only reason is to have a cleaner user-side where I'm going to put some text to the right of the controls/output.

author: Kleinstein
author_rank: Super Contributor
timestamp: November 05, 2023, 06:06:06 am
content: The digital outputs should be 74AC08 or similar. 74LS... does not work with 3.3 V and has weak drivers at the high side.With enough free pins at the µC one could skip the 2 extra logic chips to decode the amplitudes and use 4 lines from the µC instead.With a 12 V supply one may run into limits of the power that USB can deliver. The OP amp for the output needs quite some power.At the very least cooling of the OP-amp would need extra copper connected to the pins (except pin 2) on the top, including the NC pins.There is little need for 0.5 % resistors at the differential amplifier.I think the resistors at the filter ouput still don't inlcude the effect of loading by the amplifier stage.The 50 ohm output resistor and the divider should also use larger resistors, like 1206 or maybe a combination of 2 or 4 x 0805.The attenuator should also have a ground link already on the top layer. For mechanical stability it may be good to solder the connectors also on top and have soem ground there.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 05, 2023, 07:45:50 am
content: Quote from: Kleinstein on November 05, 2023, 06:06:06 amYeah, I forgot to change the value in Kicad, I would be using sn74hcsXXX I linked above insteadQuote from: Kleinstein on November 05, 2023, 06:06:06 amI was trying to make it so every combination was a "valid" one, but I mean... I don't really see why I even care. I'm sure I could route two of my many free pins over there instead. Though it's still a bit of a mess since the CH2 input is on both sides of the IC...Quote from: Kleinstein on November 05, 2023, 06:06:06 amWould this circuit really exceed the 500mA limit for USB 2.0?Quote from: Kleinstein on November 05, 2023, 06:06:06 amAll good points. I definitely tweaked those resistors, but I forgot to copy the values over from SPICEThanks

author: Kleinstein
author_rank: Super Contributor
timestamp: November 05, 2023, 08:41:06 am
content: For the power needed it gets close with a correct 50 ohm termination at the load. Some 10 V at 100 ohm load would be 100 mA from the 12 V and this may need some 300 mA from the 5 V (or a bit less). With a short at the output the current may be higher in theory, but chances are the OP-amp with go to current limiting.The charge would however run into problems earlier. Not sure if it likes +12 V to -12 V at all. Some of the chips have a limit more at some 16 V between both ends, so +-8 V max.

author: MarkF
author_rank: Super Contributor
timestamp: November 05, 2023, 09:10:34 am
content: Do you really need a four layer PCB?I use a two layer PCB with a ground copper pour on both sides. I run wide traces for +5V, +12V and -12V.Attached are my two layers showing the copper pours.The 50Ω output resistor is a 1210 size to handle the higher current. Also, the traces from the op-amp to the BNC are a little wider than normal. Same for the 'digital' BNC.Notes on your digital output:- Insure the STM32 pin is PWM capable- If possible, have all the pins that select the ch #2 logic level be on the same port. I say this so that when you update the level (i.e. a port write) all pins change simultaneously. You may run into some case where you don't want any switching spikes due delays in pin edges caused by multiple CPU write cycles.Quote from: Kleinstein on November 05, 2023, 08:41:06 amHe's not going to get anywhere close to those kind of loads.With a 50Ω load, 2 or 3Vp-poutput is about all the lm7171 in a SOIC package is going to handle before melting. Even with all the heat dissipation. Ask me how I know?I drive my lm7171 with +/-12V. It's maximum Vmax- Vmin= 36V.I was wondering if a lower supply voltage to the lm7171 (say +/-9V) might reduce the power drop and allow a larger output voltage swing???I never looked into the relationship between power supply vs output voltage concerning heat dissipation.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 05, 2023, 04:56:36 pm
content: Quote from: MarkF on November 05, 2023, 09:10:34 am"Need" in the strict sense, no. It was just easier to layout, with the added benefit of a little more thermal mass. It made it easier to keep all SMD components on one side without a bunch of jumping to the other side of the board so that the top side with the controls would look better.It's not like I have a ton of powered parts, It could absolutely be 2-layer with ground pour.Quote from: MarkF on November 05, 2023, 09:10:34 amFunny you mention that because I did indeed royally screw the pinout in a few placesafter I realized that I've been using the STM32CubeMX tool to keep it all straight.I moved from +-9 to +-12 voltsonlybecause the OLED Vccis +12VQuote from: Kleinstein on November 05, 2023, 08:41:06 amNot sure if you mean the +-12V generation or the OP, but as MarkF said the OP is 36V differential max. I switched from the MAX1044 (no A) to the MAX1044A because the former was only +-10V, which was fine when I was using +-9, but I've now moved to +-12 to satisfy OLED power.

author: MarkF
author_rank: Super Contributor
timestamp: November 05, 2023, 11:56:31 pm
content: A two layer PCB will be much cheaper to get manufactured.__________________________I used a Waveshare OLED module that generated it's own 12V. It only needs 3.3V power. It has a SPI interface.https://www.amazon.com/gp/product/B07DB5YFGW/ref=ppx_yo_dt_b_asin_title_o02_s00?ie=UTF8&psc=1__________________________While you're laying out pin assignments...Let's think of a scenario:You can get all the STM32 bits for the channel 2 into one 8-bit port. Both the levels and the PWM/On/Off pin.Externally send a table of 256 bytes, each containing one sample, to the STM32.Setup a timer interrupt with the duration of each sample.You sequence thru the table writing each sample to your channel 2 control port when the interrupt occurs.You now have an arbitrary waveform generator that is able to output a short message.You can also simulate a runt pulse since the samples contain both high/low and the level.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 06, 2023, 01:00:24 am
content: Yeah, I was going to use one of these only because I had 2-3 of them anyways... but for simplicity sake I probably will go for a solution that can power itself from 3.3V or 5V. Added benefit is being able to display anything at all, the type I have are just 4 line character displays.Given that I wouldn't need to provide the OLED Vccdirectly, I could almost surely get away with any supply voltage for the OP that gives me enough headroom at the maximum/minimum DC offsets. I'm thinking of fabricating a board for the LM7171 to be able to better characterize it's temperature/current draw with different supply/output voltages, as well as the current consumption of the supply voltage generation:Not sure if I want/need to put some constant current sources here to try and do the filter as well, since I'm mostly trying to mess with the LM7171WRT to 2/4 layer fabrication costs, it seemed to not make a difference on JLCPCB, though I would agree that in general, 4-layer must be more expensive, just because mo' stuff is mo' money.

author: MarkF
author_rank: Super Contributor
timestamp: November 06, 2023, 01:16:09 am
content: I bought a bunch of these breakout boards from Adafruit some time ago. Lots of varities.https://www.adafruit.com/category/198You might even want to consider the through-hole DIP package for the LM7171. Just for the dissipation.Although, I seriously doubt you're going to be able to reach the output levels you want.I guess JLCPCB pricing has changed since I last checked. Must be doing a lot of business...Your capacitors on the power supply rails of the LM7171 on the breakout board make no sense.They should go to ground. Both sides of the caps connected together do nothing.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 06, 2023, 02:08:21 am
content: Quote from: MarkF on November 06, 2023, 01:16:09 amthanks

author: jgrossman
author_rank: Regular Contributor
timestamp: November 06, 2023, 06:16:10 am
content: Breakout schematic:Breakout layout:

author: Kleinstein
author_rank: Super Contributor
timestamp: November 06, 2023, 09:16:01 am
content: The OP-amps definitely need more copper area near there pads for cooling. Most SMD parts get rid of the heat via the PCB and thus need extra copper for higher power parts. Ideally also connect the NC pins to copper / ground.

author: MarkF
author_rank: Super Contributor
timestamp: November 06, 2023, 01:54:58 pm
content: Question. More for my info than anything. Google search hasn't given me much insight.Why use a Tee attenuator in the 50Ω output path?More specifically, why use a Tee attenuator over a Pi configuration?What are the advantages and disadvantages of each?What do you base a choice on?

author: jgrossman
author_rank: Regular Contributor
timestamp: November 07, 2023, 03:55:49 am
content: Quote from: Kleinstein on November 06, 2023, 09:16:01 amWhere in the goldilocks scale is this? Still too little, too much, or somewhere in between? Vcc/Vee highlighted in red, and all GND and NC are connected to the ground pour without thermal reliefs where feasiblee

author: MarkF
author_rank: Super Contributor
timestamp: November 07, 2023, 10:38:33 am
content: It won't be enough.My op-amp at 4Vp-pinto 50Ω got so hot you couldn't touch it in seconds!!!The only way you will get near 8V is into a high impedance load.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 07, 2023, 02:55:09 pm
content: Revisiting using a heatsink on the LM7171... as you noted I may also be better off with the DIP package to better be able to transfer heat into the board. Big reason I'm making this breakout board is to be able to see what is required thermally for LM7171, as I'dreallylike to get 5Vp-punless it becomes apparent that would require an excessive amount of effort.Are all opamps this way? What intrinsic parameters of the opamp typically contribute to higher heat (GBW, etc)? Is the signal of the op-amp relevant to the energy consumption, or just the gain, or both?

author: Kleinstein
author_rank: Super Contributor
timestamp: November 07, 2023, 07:18:46 pm
content: For the heat there are 2 parts:1) The load current at about 2/3 the amplitude so that half the voltage is at the load and 50 ohm termination resistor. With higher voltage the heat goes down again from less voltage. The FB resistors are a little extra load, often neglegible though.2) The no load current of the OP-amp. Here it is mainly a high GBW that need more internal current, but there are also more and less power hungry ones. Newer ones may be lower power for the same speed.For the amplitude it makes a difference if the 5 V_pp are for a high impedance load or with 50 ohm termination.5 V_pp even with termination would need the amplifier to provide 10 V_pp and thus likely a supply of some +-7 to +-10 V.20 V and some 6 mA of no load current would be 120 mW - not very much.5 V to a 100 ohm load results in 50 mA and thus some 5 v * 50 mA = 250 mW of power loss. This should still be OK for an SO8 with some copper area.Even a short with thus 2 x the current would "only" be 500+120 mW. With some 200 K/W of thermal resistance this would be some 134 K temperature rise for the chip, which is boarderline, but usually still ok. It could still need the extra copper to spread the heat and ground plane and maybe some extra heat sink to the chip or PCB.With more than +-10 V supply a short at the output could be an issue. Some chips have thermal protection too.RF circuits tend to run a bit hotter than LF.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 07, 2023, 10:15:39 pm
content: Quote from: jgrossman on November 07, 2023, 02:55:09 pmThe power loss depends on supply voltage, load swing, and load resistance. It's a classic class-B power vs signal level.This is worst case - appx 64% full swing, where I and V intersect at 50%Note here they show power per transistor, your Opamp has two transistors, so the green line doubles to average 0.4, or 80% of the peak.A rough calc indicates about 450mW which is a lot for a SO-8 and will need agressive maximum copper

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 07, 2023, 10:30:29 pm
content: Quote from: jgrossman on November 07, 2023, 03:55:49 amYou can never have too muchNot bad, but I'd certainly move the output resistor R7 and greatly increase its size.It also generates significant heat, keep it well away from the opamp !Double sided copper can help too, with liberal thermal vias to get heat into the other side.You can also increase the copper flow from VCCHere is SO-8 2oz copper area vs thermal max indications, more copper is better

author: jgrossman
author_rank: Regular Contributor
timestamp: November 10, 2023, 04:00:46 am
content: Any other suggestions before I get this BOB manufactured? I've attached a PDF of the schematic again for reference, but it's 99% identical as before, just made it so there is a single jumper for the boost+inverter selection

author: jgrossman
author_rank: Regular Contributor
timestamp: November 10, 2023, 04:43:48 am
content: Quote from: PCB.Wiz on November 07, 2023, 10:30:29 pmIs the same volume of 1oz copper over 2x the area approx. equivalent?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 10, 2023, 05:56:33 am
content: Quote from: jgrossman on November 10, 2023, 04:43:48 amIt will not quite be as good, as the heat needs to travel sideways, but a larger board will radiate more heat into the air than a smaller board.PCB houses tend to charge an adder for 2oz, so most prototypes use 1oz copper.This design is not many-watts so you should be ok.In your design I might duplicate the power copper areas on the reverse side, at least for 20~40mm, and add thermal vias to those areas.The heat then transfers across a larger area to the larger GND planes.Also, place the thermal vias closer to the SO-8 package. You want both side to be working for you.

author: jgrossman
author_rank: Regular Contributor
timestamp: November 10, 2023, 08:23:03 am
content: Decided to just respin this BOB layout, it was easier to incorporate the feedback with it in mind from the start:

author: jgrossman
author_rank: Regular Contributor
timestamp: November 13, 2023, 02:17:58 am
content: I think I'm closing in on what I'm going to get manufactured.Here is updated schematic + layout:

author: jgrossman
author_rank: Regular Contributor
timestamp: November 13, 2023, 04:29:50 am
content: As it is laid out right now, it still passes ERC without the inner ground layers. I'm thinking about dropping them for cost (I must have done something wrong when looking before, or my board sized changed enough, but JLCPCBismore expensive by 4x for 4 layers), but am worried about some stuff:The inner layers may provide a non-negligible amount of thermal mass around the LM7171, even with only inner 0.5Oz Cu. I'm not sure how much, if it all, this will matter.I'm worried my bottom ground has been chopped up too much. I tried to keep the length of my bottom traces as short as I could anticipating the possible removal of the inner layers, but especially the 3.3V for the DDS is kindof way out by itself and I struggled to find another way that didn't meander around the whole board:I know this isn't a high speed board by most definitions, but worried about signal integrity without the support of the inner layers. I'm sure a more experienced engineer could do just fine with 2 layers, but that's not me

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 13, 2023, 07:22:18 am
content: Quote from: jgrossman on November 13, 2023, 04:29:50 amIf you can fit on 2 layers, you can keep the 4 layer design for the final pass, as this is a prototype, and likely to change.Thermally, it is looking quite good, you could maybe get some thermal vias under the SO-8 packages.You are not trying to cool many-watts here.