My first PCB design, tell me what i've done wrong. - Page 1
Forum section: electronics / beginners

author: TAZ-NZ
author_rank: Newbie
timestamp: August 16, 2020, 02:26:46 pm
content: I recently got it to tinkering with vintage computers, namely Commodore C64 and Apple IIe, what started as re-capping and restoring a couple of old computers has evolved, I found myself wanting a way to write C64 disk Image direct from my PC, and after looking a options available I found myself wanting something cleaner than the options available, so I got the crazy idea of squeezing all the required electronics in the 6 pin DIN plug itself, letting me create a USB to C64 1541 drive cable.So I found this blog post using a Arduino Pro Micro:http://cpsvis.hu/xum-1541-adapter-keszites-commodore-1541-meghajtohoz-pro-micro-val-windows-10-re/Which lead me to the electrical designs for the Pro Micro here:https://easyeda.com/oshw/Pro_Micro_5V_16MHz_Open_hardware-qJfxrJ1VdAfter some comically bad attempts at designing a PCB, and more research in similar designs, and the IC itself, and managed to create a PCB that wasn't missing parts would probably work and didn't look like spaghetti, but I didn't think it was a practical design so now knowing the Zoom floppy is based on the same firmwarehttp://www.root.org/~nate/c64/xum1541/but uses the smaller Atmega16U2 vs the Atmega32U4 on the Pro Micro I'd been trying to use.So I went back to the drawing board and a week of tweaking and charging designs I have something that I hope will work. But I'm a noob at this so please tell me what I've done right and what I've done wrong. I've shared my design on EastEDA since It's what I designed it with it.https://easyeda.com/TAZ-NZ/nano-xum-1541-atmega16u2-muThe design is tiny measuring 10.5x13.5mm as I needs to fit inside a 6 pin din like the Cui Devices SD-160https://www.cuidevices.com/product/resource/sd.pdfI measure a plug that I have that's a similar design but different brand, and came up with a measurement of 11x14mm with a 1.6mm PCB will fit inside with the PCB wedged between 2 rows of pins.My Electrical Schematic:PCB layout:Any comments or recommendations will be welcome.Thanks,TAZ-NZ

author: langwadt
author_rank: Super Contributor
timestamp: August 16, 2020, 02:41:06 pm
content: why not turn the board so you only need one wire for /SQR ?

author: TAZ-NZ
author_rank: Newbie
timestamp: August 16, 2020, 03:07:37 pm
content: Quote from: langwadt on August 16, 2020, 02:41:06 pmI original I had it that way, but it's was going to be really tight fitting the cable under the PCB, so I move it above the 3 pins instead of below them to give more room to fit the cable into plug, and to give move clearance between PCB and metal cable retention crimp. Basically where pin 3 is I need room for a 4 or 5mm diameter cable at least right at the back of the plug, so I figured it was safer to move the PCB up.

author: hitech95
author_rank: Regular Contributor
timestamp: August 16, 2020, 04:42:48 pm
content: Not an huge EE expert but:Don't interrupt USB signal, use only a layer for that, try to have a ground plane always below(signal integrity). In this case the last option is not strictly required but is good practive. USB is a differential pair signal so it should also be length matched.Does you really need to filter de AVCC? I have no idea if it is used for the USB PHY.Are thoose pin/port required to be mapped like that? One of the cool things about uC is that you can move pins around to clean up the pcb layouts.Try to use ground planes and vias for GND, you will free up some space in the board.(This is no a so complex design that require star grounding or crazy stuff)I would use PORD instead of PORTB, I would rotate the chip 45 deg anti clock wise, aligned it to the left as far I can go. USB ESD diodes on the bottom side, using the pad as a via. The 22R resistors aligned probably parallel to the two pads (that must also be inverted), singlas goes out and split in the middle. Than exit the resistor and goe straight to the pad.On right side I would put all my bypass caps, and the AVCC filtering. (Aligned horizzontally) Fuse is on the right of all this (if there is space, or on bottom layer same spot) aligned vertically. 10uF cap on bottom layer below fuse. (Or in the side of the fuse if the last one is on bottom layer too)10K reset resistor I would put in the bottom layer near the ESD diodes.EDIT: Added some images for reference, I don't have a mouse right now so this is the best I can do!If someone with more experience want to add something I've missed or said wrong is welcome!

author: TAZ-NZ
author_rank: Newbie
timestamp: August 17, 2020, 12:05:17 pm
content: Quote from: hitech95 on August 16, 2020, 04:42:48 pmThanks for the input, I'd tried to match the length of the USB data pins, but hadn't thought about the layer swap.Do I need the filter? Probably no, but it was in the micro controllers spec sheet somewhere that you should have it so I put it in, I don't really need the ESD diodes, but I seemed like a good idea to have them after see them on another design for the same controller.The pinout are copied from a design for the same disk controller that uses Atmega32U4, I just copied every across to the port with the same features on the Atmega16U2 to be safe and to make modding code easier.I painted my self in a corner with the way I did the IC ground pins.The 45 deg chip position was a left over from when I had PCB below the 3 pins and only had one wire and chip on the bottom layer, there was a reason at the time a square layout didn't work for me, I flip flopped the design a few times and should have started from scratch when I did, it's another reason the power rail end up the way they did.I went back and cleared everything but the contacts and wire holes and tried to apply what you said, I kept the chip centered for maximum mechanical clearance, but move it up the board as much as possible, to give me room to route everything, it probably still look like spaghetti to you, but USB Data traces are now on one layer and as close to even length as I can get them, the back of the board is now largely ground plane.New PCB layout.and in 3DI uploaded updated layout to EasyEDAhttps://easyeda.com/TAZ-NZ/nano-xum-1541-atmega16u2-muAnyway let me know what you think of my improvements.

author: hitech95
author_rank: Regular Contributor
timestamp: August 17, 2020, 01:16:40 pm
content: Better than before, but yoi might have to do some more cleanup:Seems that you don't have a proper snap grid, componets are not completly aligned someone is 1deg off.I quite hate easyeda key map and interface. So cant do better on that cad sw. I'm more an aAtium/Eagle guy I'll have to move to kicad some dayThis is what I did in a few minutes.

author: Bud
author_rank: Super Contributor
timestamp: August 17, 2020, 02:27:26 pm
content: What is the deal with the gazillion of ports symbols in the schematic? Was a reason that i do not see why you did not connect wires to the chip ? This makes schematics difficult to read and is usually a sign of immaturity of the schematic creator.

author: SerieZ
author_rank: Regular Contributor
timestamp: August 17, 2020, 03:05:13 pm
content: @TAZ-NZ Avoid stubs and avoid sharp angles >90°@hitech95 your Design is fairly good but you also need to avoid stubs with your ground plane and fix your heat traps. (Are they really necessary here?)I also see 1 sharp corner on your Bottom...Might be pedantic for such a mini design but the more used you get to avoid the little sins the better your bigger designs will be.Edit: When talking about the heat traps I am referring specifically the ones of the vias. The ones on the smd Pads are fine.

author: hitech95
author_rank: Regular Contributor
timestamp: August 17, 2020, 03:28:42 pm
content: Quote from: SerieZ on August 17, 2020, 03:05:13 pmMy design is just for an idea of component placement. I don't know how to properly setup easyeda. (I've tried but no luck, my lunch break is small)I just ended moving the componets around and cleaned some of the polygon that was present in the bottom layer. (probaly to cover the thermal relief of the groundplane)My main goal was to show a better layout for the USB lanes, that was quite complicated before (lots of bends).Here the only heat trap that might be needed is the one for the two GNDs throuhole header.Did I put a 90deg bend somewhere? After a second look I didn't have seen on bottom layer. I'll check that later!Out of curiosity what you mean with stub? Different languages can have their barrier. You mean the via on the UVCC bypass cap?I've forgot to route that one so I just added the via as a last second solution.Unfortunatly the board is quite small and without having a complete CAD setup is hard to show a proper complete design.Probaly this a simple circuit that would work in any case, but my first concern as Bud said is the schematic that have a lots of ports making it harder to read.Now if that one is correctthe PCB can be created in any case, but a general celanup before production is a must in this case.BTW, I'm a DIY guy so my knowlenge come from first person experience (aka errors) and online docs.

author: SerieZ
author_rank: Regular Contributor
timestamp: August 17, 2020, 04:20:32 pm
content: I am replying from my phone so this post might be a mess.1. I am sure your design would work. For hobbyist that is more than enough most of the time. If there is a problem most likely it is in the schematis2. With gnd stub I refer to unnecessary Gnd "spikes" or antenna. Which can do more harm than good.3. Your sharp angle is on the bottom layer top left.

author: hitech95
author_rank: Regular Contributor
timestamp: August 17, 2020, 04:36:55 pm
content: Quote from: SerieZ on August 17, 2020, 04:20:32 pmOk I'm definitly blind, i still cannot see it.Are you referring to the 3d view or the 2d one?Just ended work brain is complete gone for SQL UML and algorithm stuff.

author: jnz
author_rank: Frequent Contributor
timestamp: August 17, 2020, 05:44:09 pm
content: I have no idea, but is it common to use an inductor with a ohm rating and not a Henry value?It took me longer than I would have likely to see that VCC was coming from your 5V USB and then became the 5 VCC points and also tied to VCC on the micro and UVCC, etc. I typically use something that ALSO calls out which rail it is. For example "VCC 5V USB", "VBAT 12V", "INVERTED 5V BUCKBOOST", "RAIL 24V", etc, just me personally but then I know what it is and where it came from. Otherwise I would have applications with VCC VDD VDD2, etc.As far as the PBC goes. IDK. Whatever, I'm not being paid to trace it all out!One issue I do see there is that your XTAL1/XTAL2 will be a pain in the ass to solder nicely. Don't connect SMD parts directly to planes. Too much heat and your solder will be a mess. Even with silkscreen it's just not ideal. Instead use "thermal" connections in your PCB software. Makes a pad that has 2 or 4 connections to ground still, but enough disconnected to allow the heat to stay right there instead of flowing out into your ground.

author: TAZ-NZ
author_rank: Newbie
timestamp: August 18, 2020, 12:29:35 pm
content: Quote from: hitech95 on August 17, 2020, 01:16:40 pmYeah I draw this on my laptop with track pad, and I had the snap setting really low so I could do finer movements, but side effect was every time rotated some with cursor, 9/10 it would be 1 deg off, I wasn't aiming for beautiful I was aiming for functional with the intent of going back a cleaning up component alignment later.I think you'll be happy with my improvements, everything is much better aligned, and took you ideas and did a couple of tweaks like swapping wire holes to move the data line to the middle, I also rotated the crystal to allow me to have the ground plan cover as much of the USB data trace path as possible.Quote from: Bud on August 17, 2020, 02:27:26 pmIt was a hack to make my life easy when laying out the board, when I first started trying to layout board I was using generic pin headers for all the wire holes and contacts, and keeping them sorted was doing my head in, I tried labeling net paths manual in the PCB editor, but any time I made a change to the Schematic to fix a error or change a component, when I applied the changes to the PCB it defaulted the net path names and broke all the links, so I did a ugly hack to make it work for me. And honestly it's still easier to read than most of the examples I was working from.Quote from: SerieZ on August 17, 2020, 03:05:13 pmBy stubs I presume you mean bits sticking out from the ground plan edge ? If you can circle and example on one of my layout in MS paint that would great, If I have a clear example I know what to avoid.I've tried to avoid any 90 traces, but not sure about one like the clock pin in the top left of the where it leave the contact at 90 degs.Sorry I'm total noob (reason this is posted in beginner section.) what do you mean buy a heat trap ?Like I said in title my first PCB layout so I have a lot to learn, happy to have any construct feed back.Quote from: hitech95 on August 17, 2020, 03:28:42 pmThank you for the input It's just what I need to improve my design, and sorry for subject you to EasyEDA, a coupe of the examples were already in it, so it made sense for me to use what was in front of me, I think I tried one of the better known packages before and got no where fast.I can't believe I didn't think to move ESD diodes to the back of the PCB, I remember thinking I got a lot of empty space is there anything else that should be on the back side of the board.Quote from: hitech95 on August 17, 2020, 03:28:42 pmSorry for the schematic, I didn't think it would be that hard to read, as I said above it was a hack to make my life easier, I plan to go back to normal links.Quote from: jnz on August 17, 2020, 05:44:09 pmI think it's 10 µH I need to double check, I basically found the value in spec sheet punched it in to parts search and selected the size and clicked on the component that had the best match to what the spec sheet said, and fired the part number it to the editor, I didn't label it, but now I know I need to have another look.The schematic was some issues, I designed it to work or me, and hoped it wouldn't be too confusing for others, I will try to tidy it up later.I'll keep the soldering issues and heat wicking in mind, I really just used the editors copper fill tool, but it looks like to get a good result I'll need to do more manually or look to changing to a better app.

author: SerieZ
author_rank: Regular Contributor
timestamp: August 18, 2020, 01:38:35 pm
content: Green Arrows are things to avoid.Yellow are suggestions.Red Circle are what I call stubs (might be incorrect term).I Hope the attachment clears things up.Edit Edit Edit: A heat trap is the "empty space" around and near Pads so you can solder the pad more easily. Look up "Thermal pad +PCB" on google.

author: hitech95
author_rank: Regular Contributor
timestamp: August 18, 2020, 02:09:55 pm
content: The last one is quite better, even usb in that way is a lot more linear.I had that change in mind but i had no idea if you had some constraint about the pin order so I tried to keep the headers in the same location.I only have a note to add over the suggestion of SerieZ, try to celeanup a but the clock singnal path.And if possible put the ground via in the middle of the thermal pad on the qfn. (It might create small alignement problem due to the heat sinking unbalance during soldering) I generally put one in the center. IPC footprint have lot of thermal vias under the qfn, for mechanincal stability and thermal conduction.Quote from: SerieZ on August 18, 2020, 01:38:35 pmI call it thermal relief!If i'm saying something stupid stop me

author: TAZ-NZ
author_rank: Newbie
timestamp: August 19, 2020, 11:15:59 am
content: Here is my latest attempt, think I've fix most of the issues, more minor layout changes.Only flood fill the lower half of PCB this time, the top have just turns into a mess and ready doesn't seam to gain anything.And I made a cleaner version of schematic, hopeful this version will not trigger people. (still need to check inductor value)

author: hitech95
author_rank: Regular Contributor
timestamp: August 19, 2020, 11:57:35 am
content: The schematic is still a bit a mess for me, but better than before. (Some cleanup of the bypass caps orientation)You have some unconnected GND pins on the QFN.PCB to mee looks fine except some sylk screen over the pads and a ground loop on the cyrystal load capacitance.Other than that I don't see anything wrong.

author: TAZ-NZ
author_rank: Newbie
timestamp: August 20, 2020, 09:21:36 am
content: Quote from: hitech95 on August 19, 2020, 11:57:35 amI'll work on the schematic some more, still need to confirm value of inductor.Yeah, oops. Was doing some clean up of random hidden traces, and forgot to put ground pin trace back afterwards.By ground loop I presume you mean the 3 trace in a circle, that was another mistake I added trace to try and fix an issue with flood fill and forgot to remove it, when I gave up flood filling top of board.I've shuffled components so no more major silk screen overlaps.I think I got it this time, but feel free to point out anything I've overlocked, or you think I should change.I very grateful for the advice and feed back.

author: hitech95
author_rank: Regular Contributor
timestamp: August 20, 2020, 10:17:47 am
content: I've missed another potential error:C1 should be as close as possible to the fuse. it is the main cap. is not usefull if you put it near the pullup for the reset.This is an example of the schematic I would draw.Not the cleanest possible. just a 2 minute rework. I particullary hate that crystal symbol it make a mess on drwawing stuff around it.Generally I would draw it like so, with the 2 ground pins in the bottom of the symbol:

author: TAZ-NZ
author_rank: Newbie
timestamp: August 20, 2020, 12:03:02 pm
content: Quote from: hitech95 on August 20, 2020, 10:17:47 amYeah moved try to fix the swiss cheese ground plane, but figured it was getting to far away for 5v source to be effective.Here is fixed version:Yeah that's how I figured schematic should be drawn, I know there is standard contentions, but I hate disembodied capacitors and crossed net paths, Every time I have to read some old service manual that is a low res scan of a photocopy, there is some questionable crossed path I have to figure out.But again thank you for the help.