driving the gate of a mosfet through a coaxial cable - Page 1
Forum section: electronics / beginners

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 09:55:52 am
content: Hello,another day another issue.I am forced to run a wire from a mosfet driver to a mosfet.The distance from the driver to the fet is around 80mm.The enviorment is extremly noisy, probing the gate and the output of the driver prooved that the noise gets picked up at the wire.I am also really space limited so the smaller the better...I came across these small coaxial cables, I'm interested in the 90mm one:coaxThe core wire seems to be 0.2mm (32AWG)No idea what the conductor material is but 2Ohm seems really high for 9cm.The mosfets I am driving areCSD19535KCSThe drivers I am using areUCC27511A:Probing a 100mOhm resistor in series with the gate of a fet showed a pek current flow of around 2A.The frequencys range from dc up to around 400KHz.Some are fixed at aound 16% duty cycle and others are variable from 0 to 100%What issues will I encounter using these coax's as the transmission lines?I know the cable will see that peak current only for a short amount of time, but the insulation is very thick compared to the conducter.Should I be worried about melting/softening insulation? (I have no clue what the insulatin is made out of.)What traps are there I might fall into?Are there any better options without paying with my organs?I need to route 16 cables from 16 drivers to 16 fets...Thanks in advance.

author: daqq
author_rank: Super Contributor
timestamp: July 29, 2021, 10:52:23 am
content: QuoteA well twisted pair might be good enough - minimize the loop area. I used the setup to drive an IGBT transistor some 150mm away in a very noisy environment.QuoteBeware here - did you use a proper measurement setup? Even on a relatively small loop created by the probe and the probe hook up wire you can get a lot of noise. Measurements in noisy environments can be deceptive.

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 12:10:02 pm
content: The scope probe as well as the scope was set to X1.BW limit was set to the smallest setting which is 20MHz on my scope.BTW the wire from the driver to the fet runs in between 7 inductors that will most probably be the final routing place.

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 12:16:43 pm
content: Are there any twisted pair cables with some kind of an smd connector out there?And how to I know what wire diameter I will be needing?

author: Terry Bites
author_rank: Super Contributor
timestamp: July 29, 2021, 01:13:01 pm
content: If you drive and teminate your coax with the correct impedance (eg 50R or what ever your cables Z is) you will get a nicer result. Your drive waveform wil be better preserved. This comes a cost, the voltage at the MOSFET gate will be half of the cable driving end.You can also ger a bit of extra common mode (garbage) rejection ar the Rx end by earthing the braid through a 10 R resistor or a few uH ckoke.Don't drive the cable from a micro or logic circuit without a buffer/ line driver.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 29, 2021, 01:56:12 pm
content: Beats me. How hard are you trying to drive them? What does the layout look like, is there any interference that would suggest different types of connection? Maybe it needs common mode filtering instead (anything from ferrite beads, to full-out isolation)?Twisted pair keeps the loop area low, which is nice for immunity, but the impedance is rather high (~100 ohms) so the inductance per length likewise is fairly high (~600nH/m). Coax is lower at 50 ohms, but maybe hard to use (and, thinner coax is available, but it's kind of specialty, or yeah, you can rip up premade cables I suppose).The next best is "star quad", take four wires and twist them together evenly. As viewed from the end, going around the circle, connect each wire alternately, +, -, +, -. This puts both +'s opposite each other, interleaved with the -'s, and halves the inductance compared to using two twisted pairs alone in parallel; the characteristic impedance is around 30 ohms. To save space, use solid-core wirewrap wire.Tim

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 03:12:07 pm
content: Quote from: T3sl4co1l on July 29, 2021, 01:56:12 pmWhy is coax hard to use?I would not rip the cable apart. I would get the smd connectors with it, if I take that route.My concern is the inner conductor of the coax I've found with just 0.2mm Dia (32awg).Quote from: T3sl4co1l on July 29, 2021, 01:56:12 pmAround 16V. rise and fall times are really small at the output of the buffer.I have double checked it with orcad and the current flow is more or less on par with my measurement.A full isolation of that wire would be great to test.Power to the driver seems healthy with around 200mV peak to peak ripple while switching a fet

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 03:15:55 pm
content: Quote from: Terry Bites on July 29, 2021, 01:13:01 pmI can't afford loosing half the voltage. Is it really that bad if a 9cm coax is not terminated properly?I just want to shield the gate from the outside world somewhat...

author: Siwastaja
author_rank: Super Contributor
timestamp: July 29, 2021, 03:26:58 pm
content: The gate is a large capacitive (low-impedance) load, and the driver has impedance of a few ohms, as well.It seems unlikely that even some strong EMI source would be able to develop significant current, being able to erroneously charge or discharge the gate, to a simple a 8cm long twisted pair with minimized loop area. Saying this because such twisted pairs seem common. 8cm isn't optimal but really it isn't unheard of in large commercial converters or motor drives.Test it under worst case EMI. Probe Vgs directly at the FET. You can use some homemade "lo-Z" probing techniques. Are you seeing the noise voltage there?

author: Nikan
author_rank: Regular Contributor
timestamp: July 29, 2021, 03:55:57 pm
content: Quote from: Siwastaja on July 29, 2021, 03:26:58 pmTrue that, the buffer and the gate are low empedance, but the capacitance seems prettey low to me or am I misunderstanding the datasheet?Quote from: Siwastaja on July 29, 2021, 03:26:58 pmI haven't used a twisted pair on my test setup, because the source of the fet is connected to the buffer via the ground plane of the pcb.I was just running a simple enameled copper wire.

author: KrudyZ
author_rank: Frequent Contributor
timestamp: July 29, 2021, 04:22:54 pm
content: Quote from: Nikan on July 29, 2021, 03:55:57 pmThe gate capacitance of your FET is around 7nF which is quite high as expected for a 150 A rated MOSFET.I agree with Siwastaja, that it is quite unlikely that EMI will cause erroneous switching assuming this is an on/off control rather than you trying to use the FET in the linear region.Taking gate voltage measurements in noisy environments is extremely challenging.In most cases you get into trouble by the source lead having too much inductances and wobbling around as the FET turns on or off. This is a form of ground bounce.It's not quite clear from your description if you actually have seen a problem on the output of the FET or if you are just worried about what MIGHT happen based on a scope trace from the gate or driver output...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 29, 2021, 06:50:32 pm
content: Quote from: Nikan on July 29, 2021, 03:12:07 pmOh yikes... those connectors aren't very reliable. I certainly wouldn't use them in power electronics.Can you show anything of what you're doing?It perhaps sounds like you've worked yourself into an awkward design corner that now needs creative solutions, when a more conventional solution applied earlier would do better.Tim

author: David Hess
author_rank: Super Contributor
timestamp: July 29, 2021, 07:00:29 pm
content: I have never had a problem driving bipolar or MOSFET power transistors with twisted pair over distances longer than 80mm except in linear applications where parasitic oscillation was a consideration, and that was easily handled with a ferrite bead or snubber located at the transistor.What I have seen be a significant problem is the return current from the emitter/source through the inductance to the emitter/source lead pushing the base/gate voltage around. An isolated driver and 4 wire connection to the transistor solves this in high current applications.Quote from: Terry Bites on July 29, 2021, 01:13:01 pmThere is no requirement to source terminate the transmission line if it is terminated at the load, which avoids dividing the voltage. Often source termination is used because the driver cannot easily drive the lower impedance but that should never be a problem with a power transistor driver.Quote from: T3sl4co1l on July 29, 2021, 01:56:12 pmA parallel termination at the load will halve the impedance seen by the power MOSFET. I have very occasionally seen a series RC network added at the power transistor but whether this is a termination for the transmission line driving the base/gate or snubber to prevent oscillation depends the observer.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 29, 2021, 07:17:06 pm
content: As for transmission line stuff, this iswellbelow the frequency where transmission line theory need apply -- to be clear, the only consequence is the inductance per length of the connection. The drive impedance is much lower than Zo, so the line manifests as inductance. Thus, it suffices to analyze the series RLC network, between driver, line, gate resistor (if any), internal gate spreading resistance, and equivalent gate capacitance. As long as R >> sqrt(L/C), it will be well behaved.With such large gate capacitance, it doesn't take much length to affect the response. This is ultimately what posters are concerned about.For example, at 0.6uH/m, 80mm is about 50nH. With a ~6 ohm driver and ~8nF capacitor, sqrt(L/C) = 2.45 ohms, and it should be okay. I'd be concerned for much more length than this.Tim

author: Nikan
author_rank: Regular Contributor
timestamp: August 02, 2021, 12:12:41 pm
content: Thanks for all the help!So the layout looks something likethis.No actual dimensions etc I just drew it rough to visualise it...There are 8 halfbridges in total.All low side fet source's are connected to the corresponding driver via the ground plane.All high side fets have no connections to their corresponding driver at all.For testing 8 enamled copper wires were soldered from the drivers to the gates of those 8 low side fets.I'll try twisted pairs on the high side fets in a few days.If it turns out that this solves my ''issue'' what should I do about the low side fets?Should I use twisted pairs on them as well and cut the ground connection on the pcb, or just leave it as is and have two ways for the current to flow?Thanks again.

author: Nikan
author_rank: Regular Contributor
timestamp: August 02, 2021, 12:28:10 pm
content: Quote from: T3sl4co1l on July 29, 2021, 07:17:06 pmSo what you are saying with this is, that I can still tweak the gate resistance and add another 3ohm in series without even needing to start worrying?

author: Nikan
author_rank: Regular Contributor
timestamp: August 02, 2021, 05:15:24 pm
content: Quote from: Nikan on August 02, 2021, 12:28:10 pm

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 02, 2021, 05:33:18 pm
content: You want to be a bit under (Zo < R), say by half, to avoid peaking. But yeah, there's a pretty good margin there.So the diagram, without knowing what's in the blocks -- I'm assuming they can be shoved anywhere, no connections are shown anywhere right? Why not put the iso-drive stuff on the far left, or between the column of FETs and the giant block?Surely the blocks aren't separate stuff, but related materials, filter chokes, diodes, caps, etc.? Would it not be relevant to show them as such..?Tim

author: jmelson
author_rank: Super Contributor
timestamp: August 02, 2021, 05:47:43 pm
content: Quote from: Nikan on July 29, 2021, 03:15:55 pmAssuming about 10 ns risetime, the edges are longer than the cable, so you really don't have to sweat the termination. The gate capacitance is likely to gobble up any transients. Take a look at RG-178, that seems to have a decent inner conductor, and the dielectric is teflon, so it can stand some heat.Jon