Zener Diode as Trigger for counter Chip odd Behavior - Page 1
Forum section: electronics / beginners

author: tk_trash
author_rank: Newbie
timestamp: January 29, 2022, 07:00:59 am
content: Hey all, I'm not the newbiest newb but a bit out of my element here. I have a circuit that takes in AC, rectifies it, filters it, and uses a 1n47733a 5v Zener and a 20k resistor to limit the voltage to 5c. That feeds a Texas Instruments CD4017BE decade counter clock pin. The intent is each time the ac power comes on the rectified regulated dc voltage causes the counter to increment by one. MY current issue is as the voltage comes up across the Zener, around about 2.5v there is a harsh set of oscillations or something from the current-voltage down to zero and back up spiking above the previous voltage, causing the counter chip to count several times as the voltage comes up. I am not exactly sure why this is happening if it is normal, or how exactly to stop it from happening. I have tried a few different values of capacitor across the Zener but for those seam to almost all cap the voltage down to about 2v? that part is even more odd to me than the original issue. I am sure I am missing something simple as I ahve never really built a rectifier circuit or a Zener regulated circuit before so hopefully, someone here can point me in the right direction. I will include a screenshot of that part of my circuit and an image of the issue as I am seeing it on my oscilloscope.

author: ledtester
author_rank: Super Contributor
timestamp: January 29, 2022, 07:49:35 am
content: QuoteWhat voltage is your AC? Is it coming directly from mains or is it low voltage through a transformer?Your circuit looks awfully complicated compared to some others, e.g.:fromhttps://people.ece.cornell.edu/land/courses/ece4760/FinalProjects/s2008/dmh64_hs284/dmh64_hs284/index.htmlor fromhttps://hackaday.com/2010/04/30/using-ac-frequency-as-a-clock-signal/Note that both of these circuits utilize a transformer to produce a low voltage sine wave which is then rectified.

author: ledtester
author_rank: Super Contributor
timestamp: January 29, 2022, 08:40:57 am
content: You might also be interested in this eevblog video:EEVblog #801 - How To Design A Digital Clockhttps://youtu.be/5kGhoRuhlxMLink to the schematic is in the description.Skip ahead to 13:37 to hear Dave talk about the 50Hz clock generation from mains.

author: SeanB
author_rank: Super Contributor
timestamp: January 29, 2022, 12:27:36 pm
content: Add a capacitor of between 47n and 100n across the zener diode, which will filter out the noise, though better is to use one or 2 sections of a cmos schmitt trigger IC, like a CD40106, or a 74HC14, in addition to the capacitor to get the slowly rising pulse to be a more well defined clock input.You can also use one of the unused gates to generate a reset pulse for the 4017 counter, so it will be reset reliably when the permanent power is connected, as they often will power up in an indeterminate state.

author: jmelson
author_rank: Super Contributor
timestamp: January 29, 2022, 03:37:10 pm
content: The transitions as C1 charges and discharges are going to be WAY too slow for the CD4017 to count properly. It needs to pass through the transition region in probably less than 50 ns for reliable operation. You need to put at least a Schmitt trigger before the clock input.Jon

author: CaptDon
author_rank: Super Contributor
timestamp: January 29, 2022, 03:49:48 pm
content: Who designed that circuit?? That circuit is so out to lunch I can't begin to tell you how to fix it. You need a different circuit!!!!