make a chip - Page 1
Forum section: electronics / general

author: s.mosfet
author_rank: Contributor
timestamp: May 15, 2012, 11:08:34 am
content: how much it costs to make a chip from a foundry?

author: Psi
author_rank: Super Contributor
timestamp: May 15, 2012, 11:15:29 am
content: Entirely depends on how many you want and how complex it is.There are a different foundrys too. Some are setup for 'cheap + massive quantity' and others for 'super expensive + small quantity'.So really, its an impossible question to answer.

author: free_electron
author_rank: Super Contributor
timestamp: May 15, 2012, 01:17:01 pm
content: There is another thread on the forum here that talks about that. Depending on technology the mask costs alone can run well over a million dollar...Your only chance at this is to get on a mosis project.Www.mosis.comThat is a chartered wafer with multiple projects on it. You get a little corner and you will have a few thousand parts after the run. But it will still be 100k$ by the time you have the parts.And then there is the whole design tool problem. The tools used to design on silicon are not exactly chickenfeed... Your best option, if you dont want to fork over another couple of million dollar every year to Cadence, Mentor, Magma, Synopsys, Apache, Azuro and others; is to go with Tanner. But that's also going to cost you a bunch. You can get the mosis scalable linrary for free from mosis. Want anything else ? NDA's are going to be involved and the fabs are not going to sign those with individuals...

author: T4P
author_rank: Super Contributor
timestamp: May 15, 2012, 03:47:58 pm
content: It's very-very expensive. A not-recent-anymore 65nm process will cost you 3billions just for the fab aloneNow let's talk about designing, you take many man hours to do a custom chip and the software involved, so it can run to many hundred thousand dollars with man hours involved.Let's discuss about the ways managements work.Quote

author: A-sic Enginerd
author_rank: Regular Contributor
timestamp: May 15, 2012, 05:37:37 pm
content: Yeah, you have to look at ALL aspects. In all the jobs I've been on we spend probably as much (if not maybe even more) on tools, hardware to run those tools, and engineering man-months than we do the actual cost for just the fab.I don't know if there's anyone around that still does it, but way back when there used to be companies out that did laser etched gate-arrays. Think of them as a halfway step between and FPGA and a full blown asic. I know the FPGA companies have a process that's kinda-sorta in that direction as well. You use their FPGA to work the kinks out of your design, then they can take that routing / netlist and commit it to "dedicated" silicon. However, I don't believe it's capable of same performance as what the etched gate-arrays used to give you.Either way, you're still in for some decent expense even going those routes.

author: free_electron
author_rank: Super Contributor
timestamp: May 15, 2012, 09:30:09 pm
content: yes , you can do that as well.. AMIS and Actel still do these 'sea-of-gates' style devices. but you still have to shell out for the metalmasks ...These techniques are very old. there was in the 70's already the capability of rolling your own IC like that. all you needed was a wire-bonder. hang on a second , trying to find datasheet ...

author: free_electron
author_rank: Super Contributor
timestamp: May 15, 2012, 09:40:26 pm
content: found it. Silicon General SG3801 ...

author: SeanB
author_rank: Super Contributor
timestamp: May 16, 2012, 06:51:39 pm
content: Sort of a step between a custom chip and a hybrid module.I used to use some, which were a resistor network for a DA converter that used thumbwheel switches to input data. 100 tiny wire leads out of a small ceramic substrate with a protective Parylene coating to keep the laser trimmed resistors clean. Not R 2R, but BCD resistor ladders with a set of matched dividers for the outputs to enable them to be summed into a virtual earth on a 741. Only problems were the leads corroding off due to exposure to sweat dripping on them though the panel.

author: Pat Pending
author_rank: Regular Contributor
timestamp: May 16, 2012, 10:40:42 pm
content: A long time ago we took the standard cell approach with Chip Express and made 4 identical custom IC's at a cost of 5k Pounds each.They offered a one day gate array prototyping service utilizing a laser micro-machining system.But also factor in 6 ASIC team members, prototyping, tool licenses, workstations and 1.5 years development and overtime.Not cheap by any means.