USB inrush current limiting circuit P-CH MOSFET - Page 1
Forum section: electronics / projects

author: MaximilianMM
author_rank: Contributor
timestamp: January 15, 2022, 11:48:16 am
content: Hello,I would like to implement the inrush current limiting circuit suggested by the FTDI chip, I am using.Unfortunately, my FT232RL is setup for 3.3V, so PWREN (CBUS3) is also driven with 3.3V. The MOSFET I am using has a Gate Threshold Voltage of -0.55V and therefore the MOSFET will never be turned off completely, when PWREN is high (3.3V).I adapted the circuit for 3.3V and would like to know if there is a better way to achieve this.Thanks,Max

author: Benta
author_rank: Super Contributor
timestamp: January 15, 2022, 12:20:18 pm
content: Easiest would be using a different MOSFET instead of a logic-level type.

author: Faringdon
author_rank: Super Contributor
timestamp: January 15, 2022, 01:18:47 pm
content: I would either...1...Let the inrush happen through an inrush resistor, and then short out the inrush resistor with a fet2...Add some small amount of VGS degeneration resistance, and also pulse the mosfet on and off with low duty cycle, until the capacitor into which the inrush is happening , is completely charged up, or very nearly fully charged up....then leave the inrush fet on for good.3....If the current will always be small going through the inrush fet, then just use a fet with quite high rds...and also pulse it on/off/on....until finally leaving it on.....you know what i mean by "VGS degeneration resistance"...it s a resistor , placed startegically, such that the higher the current flow through it, the lower is the VGS....its essentially a type of negative feedback kind of thing.

author: MaximilianMM
author_rank: Contributor
timestamp: January 15, 2022, 01:32:04 pm
content: Thanks for the replies!The idea of this circuit is not only to limit the inrush current, but also to disable the 5V for external devices, until the USB enumeration has finished.Like Benta suggested the easiest way would probably be to use a different MOSFET with a higher Gate Threshold Voltage. Unfortunately, it’s quite hard to find a suitable SOT 23 P-Ch MOSFET, which is also available to me.

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 15, 2022, 06:14:10 pm
content: Shouldn't be that hard to find a suitable PMOS. But I know, these days, availability is never a given.I've also successfully used parts like the TPS2061/C for this purpose. ~ $1The internal current limiter is a nice plus.

author: MaximilianMM
author_rank: Contributor
timestamp: January 16, 2022, 10:06:14 am
content: That’s a good idea. I will go with a TPS2061DBVT.

author: Terry Bites
author_rank: Super Contributor
timestamp: January 16, 2022, 12:38:11 pm
content: Drive it with PWM from 0-100% at a rate that suits you.

author: bson
author_rank: Unknown
timestamp: January 16, 2022, 04:25:22 pm
content: You could use an N channel MOSFET to switch the P channel.You can also put a pull-up across the P ch S-G so when PWREN# is floating, an input, or hi-Z power is turned off and then instead of switching the pin between H and L switch it between being an input and an output (L). But then you have to deal with the potential supply leakage and gate overvoltage (from the pullup); but if the GPIO pin is 5V I/O tolerant it might be good.A third option is to carefully read the MCU datasheet. Some allow 5V on the VDDIO supplies that each drives a group of GPIO pins, which would allow you designate one group of pins (not usually a single port) as 5V.Option 4: a 74HC1G04 inverter powered by the 5V Vbus supply.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 16, 2022, 06:49:00 pm
content: You need a level shifter, which also needs to be noninverting. The easiest solution is to "cascode" a higher voltage transistor on top of the PWREN pin:BJT: connect E to PWREN, B to a voltage divider say VCC/2 (1.65V) (e.g. 10k + 10k), C to the P-ch gate, pullup resistor from S-G across the P-ch.MOSFET: connect S to PWREN, G to VCC (3.3V), D to P-ch gate (gate pullup same).Note that this is only a soft start, limited by P-ch transconductance, the gate capacitor, and how fast it's able to be charged by PWREN. (So the series 1k should probably be kept; that can be in series with the collector/drain of the added transistor.) It is most certainly not a current limiting circuit; it is only able to limit current in the condition where the load is highly capacitive, and thus a gradually rising current can potentially charge the capacitance to full before reaching full short-circuit (fault) current levels. This only works when the DC load current is small in relation, and the load capacitance is not excessive compared to the rate of gate voltage.A better circuit would use a USB load switch, like the TPS2061 mentioned above, which does provide active current limiting as well as other protective features (usually thermal protection, so it can't blow itself up).Tim

author: Leo Bodnar
author_rank: Frequent Contributor
timestamp: January 16, 2022, 09:40:32 pm
content: Try XC8101 serieshttps://www.mouser.co.uk/c/semiconductors/switch-ics/power-switch-ics-power-distribution/?q=xc810They are still available in qty for less than £0.50Leo

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 16, 2022, 10:05:58 pm
content: Quote from: Leo Bodnar on January 16, 2022, 09:40:32 pmThanks. Those are cheaper than the TI parts, and available on Mouser indeed (but not on Digikey as far as I've seen.)I have good experience with Torex parts.Note that the ON resistance is significant though, compared to the TPS206x.

author: niconiconi
author_rank: Frequent Contributor
timestamp: January 17, 2022, 10:35:19 pm
content: BTW, if your motivation to make an inrush current limiter is to make the USB device compliant to the official specs and to pass the certification, the task can actually be surprisingly tricky.I studied the USB 2.0 specs for days and these are my findings.The requirements of the USB 2.0 spec are basically:1. A device should never draw more than 100 mA of current from a USB port before enumeration.Note 1: Because there are so many non-compliant novelty items like USB fans, USB lights, eventually in In USB Type-C spec, USB-IF admitted defeat, after that it became legal for a non-enumerable, non-USB dummy device ("Power Sinking Device") to consume 500 mA via USB Type-C.Note 2: In addition, I think there is also a maximum time limit for the device to start enumerating. But I think this limit is never seriously enforced and the exact rules have changed multiple times by later standards like the Dead Battery Provision in USB Battery Charging Specification, I need more investigation, so let's just ignore the max enumeration time requirement for now.2. If the device draws transient current above 100 mA after it's plugged in, it's seen as an inrush event. Inrush current less than 100 mA is always acceptable and not seen as an inrush event at all, it's only considered to be one when the 100 mA mark is exceeded.3. There's actually no limit on inrush current itself, only the transferred charge. If an inrush event occurs, the maximal charge transferred, calculating by area under the current curve, should be less than 50 uC. For 5 V, it means the equivalent capacitance should be less than 10 uF. The reason is to avoid draining the output capacitance at the upstream by too much - USB's voltage droop budget is based on the assumption that the port has a big capacitor (100 uF) and the device has a small capacitor (10 uF). If the device has too much capacitance, this creates an unacceptable voltage droop that may reset other devices. On the other hand, the absolute inrush current itself is irrelevant.4. If two inrush events are separated by 100+ us, they are considered as two separate events. Only the "biggest" inrush event is considered, all other events are ignored. Thus, it's possible to get more capacitance allowance by delayed startup in the power sequencing process.Thus, this can be either a simple or tricky task. If it's just a USB dongle, just don't put more than 10 uF of capacitance at VBUS. If it's a device with multiple power domains and it has a microcontroller, just switch them on one by one, or use RC timers to spread the startup time of different DC/DC converters apart.However, if you must have more than 10 uF of capacitance on a single rail, and when your USB device doesn't have a microcontroller, it's just a pre-made ASIC, you're going to have a hard time. it would be tricky to design an inrush current limiter for that. The logic required is basically: (start) -> (use 100 mA current limit) -> (finished startup?) -> (use post enumeration current limit). AFAIK, almost all of the load switches, even those specifically designed for USB, do not satisfy this requirement. They only limit the current slew rate, without a "under 100 mA limit."I honestly have no idea about how a bus-powered USB Hub can meet the official specs and to pass the certification - USB requires big capacitors (100 uF) at the downstream port, and small capacitors (10 uF) at the device. But a USB Hub has both upstream and downstream ports - how is the 100 uF capacitor initially charged without violating the USB specs?And more on measurements:1. USB-IF has an official test certification software to calculate pass/fail, but it's basically an integration. You can use a small shunt resistor and probe that with an oscilloscope. Single shot capture a pulse. Use the average current measurement, and multiply by time. If everything looks fine, check your results using the USB-IF software as a final step. Beware of some edge cases, such as a negative current generated by a ferrite bead or inductor. I'm not sure how it's calculated, use the USB-IF software as the ultimate test.2. The official certification test specifies a GHz current probe, insufficient bandwidth can reduce the peak and make the result look better than it's actually is. But in my experience, I measured the voltage peak across a shunt resistor with both a 100 MHz 10x probe and a direct coax connection, which has a bandwidth of ~1 MHz, and the rise time in both tests are almost the same. Thus, my conclusion is that the actual bandwidth of that pulse in a manual device insertion in practice is not that high, at least for a mostly capacitive load. 2.2 x 0.1Ω x 10uF = 220 ns, and 0.35 GHz / 220 ns = 1.6 MHz. A normal scope is probably adequate for pre-compilance checks. It's difficult to see the 100 mA mark with a 10x probe, so just check the rise time to ensure measurement confidence and use 1x probe later on. Similarly, the expensive official inrush current test board is probably not needed, it's pre-compliance and just a sanity check anyways. Use a lab power supply with floating output so you can probe directly across the resistor. BTW, if the behavior of the USB power sequencing depends on data communication, the measurement would be more complicated.3. When biased by DC, ceramic capacitors lose their capacitance by 20% to 50%. Thus, You actually have more margin from 10 uF than it initially appears to be.Attached are some photos of my test fixture and experiment results. Just a shunt resistor with a Kelvin connection. Measured "inrush charge" roughly matches the ceramic capacitor values on the circuit board.Finally, all of these probably don't matter unless you have a lawyer-obsession like me. The USB inrush capacitance limit is routinely ignored in many cheap gadgets unless you are making a serious mass market product and must have the USB certification.See Also:https://colinoflynn.com/2015/03/usb-inrush-testing/http://www.epsilonlabs.com/USB_Inrush_I.htmlDisclaimer: I've never ever made a certified USB device, I studied the USB inrush current spec only as a curiosity.

author: Leo Bodnar
author_rank: Frequent Contributor
timestamp: January 19, 2022, 10:35:28 pm
content: Yes, it's TSIGATTand should not exceed 100ms after the bus power rail stabilised. This is the time for device to signal attachment.Enumeration timing (and exact sequence) is defined by the host so device just has to respond promptly and correctly.LeoQuote from: niconiconi on January 17, 2022, 10:35:19 pm