Need help to understand power supply circuit... - Page 1
Forum section: electronics / projects

author: Mr Simpleton
author_rank: Unknown
timestamp: June 28, 2014, 01:19:10 pm
content: I am trying to repair a special multi cannel receiver and have found what seems to be faulty. Now I just tries to understand how and why it worksThe schematics is drawn from my memory, but should be ok. Now, this is not an ordinary negative stabilizer circuit. The FET is in a SOIC-8 and can only dissipate low wattage. The op-amp seems to be run in comparator mode, and I cannot understand the output resistor values. If it operates as intended, it provides 21 volt at the output but looking at the schematics the 10k+47k means it will never see a value low enough to "switch" the output. And then there is no capacitance so the output from the OP is either 0 or 24 volt (assuming rail to rail).If this is a sort of ovp, if the output is shut off, then the comparator senses low voltage and turns on again... no capacitor to slow the process down.

author: SeanB
author_rank: Super Contributor
timestamp: June 28, 2014, 01:49:13 pm
content: It runs as a regular opamp with only a pull down to -24V ( you can think of it as being only able to sink current) and then the regulator will be somewhat stable as long as there is some output capacitance. It should not oscillate, just has the full open loop gain of the opamp and the FET available to close the error loop. You just have a visible connection to part of the internal stages of any opamp visible.

author: Mr Simpleton
author_rank: Unknown
timestamp: June 28, 2014, 01:58:45 pm
content: Sean,thanks for the explanation... But given my "nick" I still have issues to grasp thisLook at the output, says 21 volt but the resistor divider at the output will never give anything lower than -24*10/57=-4.2 Volt (with the FET fully open and no current drawn and losses at input resistor). Now IF the circuit works, and delivers 21 Volt the value at the positive input will be even closer to zero, never near the -5v at the negative op input. Now this to me seems like it will never close the FET unless the voltaga at the output is -28,5 or lower... Or am I having a senior moment??BTW the -24V is a stabilized voltage using Vicor modules and it is used by other circuits too.

author: bktemp
author_rank: Super Contributor
timestamp: June 28, 2014, 02:26:15 pm
content: I think there is something wrong in the schematic:Even at -24V at the output the noninverting input is only at -4.2V. It never goes below -5V. Therefore the opamp always outputs 0V. This creates about -10V at the gate. The mosfet would output about -6.5V since it needs typically about 3-4V GS voltage.My guess is, it is actually a n-channel mosfet and source and drain are reversed. With -10V at the gate the mosfet would see 15V and turn fully on. Only when the output goes above -28.5V it would limit the voltage.

author: mij59
author_rank: Frequent Contributor
timestamp: June 28, 2014, 02:44:47 pm
content: Quote from: bktemp on June 28, 2014, 02:26:15 pmI agree.The -5V is used to switch the power supply on .

author: Mr Simpleton
author_rank: Unknown
timestamp: June 28, 2014, 03:32:38 pm
content: Quote from: bktemp on June 28, 2014, 02:26:15 pmAck! Sorry my error at drawing the schematic. It is indeed a N-channel FET with the Source at -24 volt, SI9410.This should be updated now...

author: Mr Simpleton
author_rank: Unknown
timestamp: June 28, 2014, 03:41:13 pm
content: Good to hear that I seem have understood the cirucit. Now I only have to grasp why they do this... Most of the various voltages use (quite a number of them) do use this type of swtiching, it could be some sort of sequencing, still I am not sure about this. It may still be a type of OVP.