Optimizing crystal load capacitance - Page 1
Forum section: electronics / projects

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 01:54:25 pm
content: I'm designing a custom ESP32-C3 board, and have questions about optimizing crystal load capacitance (as my bluetooth performace is quite poor).According to the guidelines, i need to use a radio communication analyzer or a spectrum analyzer and tweak the load capacitors. That seems easy enough, but I don't have that equipment. I only have a VNA (PS-100), signal generator (3.3GHz) and oscilloscope (1GHz). Will these be of any use? What else can I do, except trying and failing?In the circuit there is also R1 (resistance or inductor). Guideline recommends 24nH as a starting point. What will this do? Is it to form a low pass filter with C1?

author: Benta
author_rank: Super Contributor
timestamp: October 24, 2024, 04:58:27 pm
content: A starting point would be the recommended load capacitance from the crystal data sheet.

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 06:11:30 pm
content: I did. With no luck. I came to approx 9.5pF for both so I chose 9pF. Bluetooth didn't work at all. I tried every step and ended up at 24pF with less than decent connection. For example, it really struggles to connect to Google Pixel 8.

author: Gribo
author_rank: Frequent Contributor
timestamp: October 24, 2024, 06:56:05 pm
content: Your scope should have an FFT function, which can be a poor replacement for an SA. Try probing the crystal output with a 100MHz probe and a 10K resistor in series. From a layout perspective, the crystal should be as close as possible to the IC, on the same layer. What package size do you use for the passives and the crystal? 0402 adds about 1pF per pad as parasitic capacitance. What is the crystal part number?

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 08:37:33 pm
content: The crystal is 9S40000048 and passives are 0402.In the version I'm trying to optimize, the crystal is quite close. Then I read this in the guidelines: "The crystal should be placed far from the clock pin to avoid interference on the chip. The gap should be at least 2.0 mm. It is good practice to add high-density ground vias stitching around the clock trace for better isolation."But in the PCB layout pictures, the crystal is as close as it can get to the chip.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: October 24, 2024, 08:43:13 pm
content: Maybe find a good 40 MHz clock source, to confirm it really is crystal issues ?A good 40 MHz will also let you compare two units for exact trim.R1 can help total power and startup time.You can skew the caps slightly, if trying to tune to an exact MHz- the input cap has higher ppm/pF

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 08:46:26 pm
content: Clock source be a good idea. I have a Rohde & Schwarz SME03, but no idea how in spec it is after all these years.What settings like amplitude, waveform, etc do I set it to?

author: janoc
author_rank: Super Contributor
timestamp: October 24, 2024, 09:04:08 pm
content: I do wonder what has poor Bluetooth performance to do with the load capacitance of the main clock crystal?If you get the capacitors really wrong, the crystal will either not oscillate at all and you won't have clock (and the MCU will either not run at all or run using an internal RC oscillator) or you would make the crystal oscillate at the fundamental instead of overtone frequency (40MHz is certainly an overtone crystal) - but then the clock would be totally off and your Bluetooth wouldn't have poor performance but would not work at all.That's most likely what happened with those 9pF capacitors - it either was not running at all or the crystal was oscillating at the fundamental frequency which is much lower than 40MHz, so the radio tuning was totally off.The best you could hope to achieve by tweaking the capacitor values is that you could "pull" the crystal frequency by maybe a 1MHz or so but that's all. That's totally irrelevant given that the Bluetooth frequency is derived from the internal PLL running at much higher frequency that is only synchronized with the crystal for stability. The capacitor values are never this critical to require such "tweaking" - how do you think would the manufacturer deal with component and manufacturing tolerances if this was necessary?I wonder whether these "guidelines" are not referring rather to theantenna matching capacitorsgiven that you wrote:Quoteand that you obviously don't know which measurements this refers to given your questions about the measuring equipment.Fixing poor antenna matching/design would make a lot more sense in the context of a poor radio performance.

author: Benta
author_rank: Super Contributor
timestamp: October 24, 2024, 09:37:18 pm
content: How about selecting a crystal that has better information than:"8, 16, 20 pF or specify"Duh.

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 09:51:58 pm
content: Quote from: Benta on October 24, 2024, 09:37:18 pmIt's a 9pF ±10ppm.

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 10:01:17 pm
content: Quote from: janoc on October 24, 2024, 09:04:08 pmThe ESP hardware design guidelines:"When Wi-Fi or Bluetooth connection fails, after ruling out software problems, you may follow the steps mentioned above to ensure that the frequency offset meets the requirements by adjusting capacitors at the two sidesof the crystal."The "above mentioned steps" are adjusting the frequency offset of the crystal by changing C1/C2.Quote from: janoc on October 24, 2024, 09:04:08 pmNot very polite. How do you know? I would observe the RF signal (bluetooth) and adjust this to be within 10ppm by changing load capacitors (crystal capacitors). According to ESP design guidelines.Quote from: janoc on October 24, 2024, 09:04:08 pmI have already done it, and observe around -38dBi so I would say it's more than sufficient.

author: Benta
author_rank: Super Contributor
timestamp: October 24, 2024, 10:33:02 pm
content: Quote from: okw on October 24, 2024, 09:51:58 pmNo, it's not:https://www.lcsc.com/datasheet/lcsc_datasheet_2304140030_YL-Failong-Crystal-9S40000048_C516561.pdf

author: okw
author_rank: Frequent Contributor
timestamp: October 24, 2024, 10:37:39 pm
content: Quote from: Benta on October 24, 2024, 10:33:02 pmYes, it is:40MHz Surface Mount Crystal 9pF ±10ppm ±15ppm SMD2016-4P Crystals ROHShttps://www.lcsc.com/product-detail/Crystals_YL-Failong-Crystal-9S40000048_C516561.htmlIt's a general datasheet. I doubt they produce a crystal "16～96MHz" crystal.Duh.

author: Dave
author_rank: Super Contributor
timestamp: October 26, 2024, 12:35:54 pm
content: The specified load capacitance of 9pF does not mean "put two 9pF capacitors on the PCB".There are numerous articles online on how to calculate the load capacitance for crystal oscillators. Ballpark you should be looking at around 15pF each.Also worth noting: Component distributors are notoriously bad at copying relevant data into the product descriptions. As others have suggested, find a product where you can determine the exact load capacitance based on the part number.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: October 26, 2024, 08:36:04 pm
content: If you have a good frequency counter you can confirm load c by measure of some HW clk out, as the slope is 10-20 ppm/pF ballpark, so that claimed 10 ppm needs ~0.5pF match.You should check multiple boards to get a feel for the averages.

author: Someone
author_rank: Super Contributor
timestamp: October 26, 2024, 10:02:12 pm
content: Quote from: okw on October 24, 2024, 10:37:39 pmHave fun hunting that 0.001% tolerance capacitor. To go with your micron accurate ruler.

author: okw
author_rank: Frequent Contributor
timestamp: November 18, 2024, 05:42:59 am
content: I just finished tuning the load capacitance with a TinySA Ultra. Bluetooth 2.402GHz test tone was 141ppm too high with 24pF (ESP recommends max 10ppm). I ended up with 330pF load caps, which sounds ridiculously high. However, bluetooth frequency is now dead on 2.402GHz (+ a few ppm).What could this indicate? Poor choice of crystal?Second problems is, one board works, the other doesn't. Could the load cap be so high, it's on the edge of what the crystal can handle. So with the variances in crystal batches makes one work, and the other not?The crystal oscillates fine on the working board, dead on the other.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 18, 2024, 08:24:35 am
content: That sounds a long way out.With very large CL, the gain of the amplifier drops, which can then be insufficient to start.If you feed in an exact 40MHz does that work correctly ?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 18, 2024, 09:02:20 am
content: Try another crystal. (same type / brand) just to exclude the possibility that the crystal you used is damaged in some way.Or try some other brand / type. Crystals are not all the same, and some combinations just do not work very well. Crystal oscillators are also sensitive to PCB layout.

author: okw
author_rank: Frequent Contributor
timestamp: November 18, 2024, 01:33:25 pm
content: Quote from: PCB.Wiz on November 18, 2024, 08:24:35 amYes, it does. I have a R&S SME03. RFDx in the forum recommended putting a 1nF in series with the signal, then a 51 Ohm shunt resistor in front. That would also mean in series right?I actually have 50 Ohms which I'll use. Then what level should I set the SME03 to (in dBm)?

author: okw
author_rank: Frequent Contributor
timestamp: November 18, 2024, 01:34:15 pm
content: I think I have a few Abracon ABM11W40.0000MHZ8B1UT (40MHz ±10ppm Tolerance ±10ppm Stability 8pF).I just measured the four boards I have. They were all PCBA (except a few components I had to replace due to some errors, plus the load caps were changed from 10pF to 24pF). I think all changes made to #1 was transferred to the other boards (have spent hours in the microscope without detecting any missing changes).I measured the crystal in circuit with a PP510 set to 10x, with a DC block, 10dB and 20dB on the TinySA Ultra input.#1 (330pF) -80dBm#2 (24pF) -59dBm#3 (24pF) -59-63dBm#4 (330pF) "dead" (or extremely low amplitude)Would these numbers tell me anything?Board #1 is my experimental board, where I transferred all the "good fixes" to boards 2,3,4. #1 for some reason works "fine" with 330pF (I did experience problems uploading firmware a few times, but not sure if that was a bad cable or something else), but $4 is dead. #1 has a short instead of the 24nH inductor in series with crystal (ripped the pad and no space to fix it). All others have the 24nH assembled. But #1 was also working before with both 330pF and 24nH in place.

author: ftg
author_rank: Frequent Contributor
timestamp: November 18, 2024, 03:39:57 pm
content: What do those dBm numbers even mean?Aren't you after frequency error?As for the drive power from the signal generator to the MCU, the MCU datasheet should have details on the requirements for external clocks.For example, if used with an external TCXO.

author: okw
author_rank: Frequent Contributor
timestamp: November 18, 2024, 03:49:09 pm
content: Quote from: ftg on November 18, 2024, 03:39:57 pmYes, frequency is of concern. But with no/low drive level on the crystal, I have no frequency.I mean if the levels would indicate that the level should be higher, especially on the boards with a smaller capacitor?

author: Siwastaja
author_rank: Super Contributor
timestamp: November 18, 2024, 03:57:07 pm
content: Usually one would configure another microcontroller pin to act as clock output, or enable some timer peripheral to work from the clock-to-be-measured and output a divided down version another pin, then use an instrument calledfrequency counteron that output.You could even do something stupidly simple like divide the clock in microcontroller and count seconds on UART or something, then compare to good known wall clock time (e.g. computer running time synchronization) after a few days and calculate the difference. You can easily see say 2-3 second difference which would be 20-30 ppm error after 24 hours of running.

author: ftg
author_rank: Frequent Contributor
timestamp: November 18, 2024, 04:33:21 pm
content: Quote from: okw on November 18, 2024, 03:49:09 pmI'm not hugely surprised that the oscillations are weak or nonexistent with 330pF, that's likely 10x to 20x too large of a cap.Usually the Pierce oscillator in MCU's is rather tolerant of wrong loading caps, but the 40MHz crystal is likely an overtone one and thus the caps and series inductor matter more.In any case, the capacitors look way too large and contribute to general weirdness.If the setup is marginal just probing it with an oscilloscope probe might kill the oscillation or detune the oscillator.Some simple receive loop/probe for the magnetic field connected to the TinySA is what I'd do to verify that it is oscillating and doing it on the right frequency.

author: okw
author_rank: Frequent Contributor
timestamp: November 19, 2024, 01:36:00 am
content: Quote from: ftg on November 18, 2024, 04:33:21 pmI don't think it's oscillating at all, since uploading code fails (through an external CH340, not the native USB).

author: bson
author_rank: Unknown
timestamp: November 19, 2024, 08:42:37 pm
content: Quote from: okw on October 24, 2024, 09:51:58 pmI have a very simple XO load capacitor calculator athttps://github.com/bson/xoloadIt's created for the typical, common case where the load is symmetric. The calculation is trivial, I just got tired of looking it up every time.Using CL=9.5, Cpin=2 (you should use the actual value from the datasheet), I get 17pF load caps.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 19, 2024, 09:22:33 pm
content: Quote from: okw on October 24, 2024, 10:37:39 pmThe vendors website does not mention a 48 suffix in their 40MHz offerings that I could find ?http://dgylec.com/product-list/cat_id/2893/name/9S+Series+%282016%29.htmlDo you have another MCU that can oscillate at 40MHz (or even a 74LVC1GU04 / 74LVC2GU04 ) that can check the crystal is legit ?How certain are you of your measuring setup ?This is a typical crystal pull range = +/- 20ppm is easy, but 140ppm is getting extreme.

author: Bud
author_rank: Super Contributor
timestamp: November 19, 2024, 11:08:02 pm
content: To calculate the two capacitors value you have to consider 3 components: ESP32 pin capacitance, PCB stray capacitance, and the combined value of the two physical capacitors. Assume PCB stray capacitance ballpark of 2pF,. 2 ESP32 pins 2pF each, in equivalent schematic connected in series, so they produce 1pF. Connected in parallel with stray capacitance totalling to 3pF. If the desired load capacitance should be 9pF, that leaves 9-3=6pF for the series combined physical capacitors (in equivalent schematic they are connected in series). Two 12pF physical capacitors will give 6pF in series. Therefore you start with 12pF capacitors from each leg of the crystal to ground, to arrive to 9pF load capacitance.

author: okw
author_rank: Frequent Contributor
timestamp: November 20, 2024, 12:48:29 am
content: Quote from: PCB.Wiz on November 19, 2024, 09:22:33 pmYes, they have over 600 crystalsSo I had to filter for 40MHz. Here is the product page:http://dgylec.com/detail/42769_9S40000048.htmlAnd datasheet:http://dgylec.com/uploads/files/products/product-file-170548627726.pdfQuote from: PCB.Wiz on November 19, 2024, 09:22:33 pmI'm quite certain the equipment is ok. I have two TinySA Ultra and two R&S SME03. I set the SME03 to 2.45GHz and observed +3ppm on one TinySA and 8ppm on the other. Tried then with the other SME03 and they were 2ppm and 7ppm off. So I would assume they are dead on.When I measure the crystals I use a 10x probe with the little ground spring (not the clip), and 10dB and 20dB attenuator +a DC block. Probably overkill with 30dB...I could probably desolder the crystal and load caps and inject a 40MHz. Design guide recommends amplitude of minimum 500mV. Would that be approx. +4dBm?Do I put a DC block in or doesn't it matter to the ESP32?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 20, 2024, 01:17:37 am
content: Quote from: okw on November 20, 2024, 12:48:29 amA coupling cap would allow the crystal amplifier to bias correctly.I also found this, which is an interesting crystal or crystal+osc simulator. They suggest slightly skewed Cg.Cd values.https://www.geyer-electronic.de/en/design-test-center/design-support/#y-design-app2

author: okw
author_rank: Frequent Contributor
timestamp: November 20, 2024, 09:19:54 pm
content: Quote from: PCB.Wiz on November 20, 2024, 01:17:37 amCool. I tried to run it, but Windows 7 complained about some missing librariesCould a feedback resistor across the crystal help?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: November 20, 2024, 10:46:41 pm
content: Quote from: okw on November 20, 2024, 09:19:54 pmNot usually, that just dampens things, it is not going to shift the frequency.I'd try another crystal - if you can extract a part code from a vendors eval board, that's a good place to start.