stm32f042k6 boot with power switch only? (no reset) - Page 1
Forum section: electronics / general

author: marikka
author_rank: Newbie
timestamp: September 28, 2019, 02:47:26 pm
content: I've been working on a small game based on the stm32f042k6. This is my first microcontroller design. I've attached the schematic as mp1.1.pngI've used figure 10 on page 33 of this datasheet as reference:https://www.st.com/content/ccc/resource/technical/document/user_manual/e3/0e/88/05/e8/74/43/a0/DM00231744.pdf/files/DM00231744.pdf/jcr:content/translations/en.DM00231744.pdfCurrently my circuit works, but I need to connect NRST to GND to start after I turn the power switch on.Can you please help me understand, what exactly needs to happen for the MCU to boot when I turn on the power switch, without a hardware reset? I'm thinking of adding a reset button in my next iteration, but as this is a minimalist design, I'd really like to avoid that.I am aware that I'm missing some things from the reference design. Can you help me understand the meaning of these:1. A reset switch, with a 100nF capacitor in parallel.2. A 100nF capacitor between GND and AVDD3. A BEAD (Ferrite bead?) between AVDD and VDD3.5.2 Power supply supervisors in this datasheethttps://www.st.com/resource/en/datasheet/stm32f042c6.pdfsays:"The POR monitors only the VDD supply voltage. During the startup phase it is requiredthat VDDA should arrive first and be greater than or equal to VDD."Is this my problem? How can I ensure that VDDA arrives first? Is the bead or the capacitor essential for this to work?Thank you in advance for helping me understand this

author: Siwastaja
author_rank: Super Contributor
timestamp: September 28, 2019, 04:21:32 pm
content: STM32 chips (at least some) require a 100nF (or thereabouts) capacitor between NRST and GND. This information is buried in very strange places within thousands of pages of documentation - not in the relevant datasheet section - it took me over five years to find it for the first time, before that my designs happened to work by luck without the capacitor.You don't usually want a physical reset switch, IMHO.

author: newbrain
author_rank: Super Contributor
timestamp: September 28, 2019, 05:35:25 pm
content: Quote from: marikka on September 28, 2019, 02:47:26 pmSiwastaja covered this, and I cannot but agree with them.Quote from: marikka on September 28, 2019, 02:47:26 pmThough good practice, I admit never using it (unless I need the ADC).I never had reset problems.Decoupling is important, but I see you have a couple of 100 nF caps.Another thing I notice is the direct connection of user buttons to the GPIO pin: I can imagine you are using the internal pull-ups and a debouncing is completely carried out in SW.Depending how it's done, it might get flaky with buttons aging; many reference boards include a bit of HW debounce too:It has a stronger pull-up, and and an RC network to avoid 'stressing' the button with the capacitor discharge.Quote from: Siwastaja on September 28, 2019, 04:21:32 pmEh, recommended in Picture 25 in the NRST Pin Characteristics, but easily overlooked.What is even worse is that theAN4080 "Getting started with STM32F0x1/x2/x8 hardware development"only shows it in the reference design, and does not mention it in the System Reset chapter.Quote from: Siwastaja on September 28, 2019, 04:21:32 pmUseful for development, maybe.Edited: The (fire)fox ate my homework...

author: Siwastaja
author_rank: Super Contributor
timestamp: September 30, 2019, 08:09:50 am
content: Quote from: newbrain on September 28, 2019, 05:35:25 pmFig. 22 in h743 datasheet I'm looking at, shows an optional combination of reset switch paralleled with the 100nF; their combination is circled and labeled as "External reset circuit", and the footnote says: "The reset network protects the device against parasitic resets." For any seasoned designer, this implies that the capacitor is recommended when the physical switch is used, for "protection" (presumably debouncing and ESD/EMI filtration). Naturally, without the "external reset circuit" connected, such "recommended protection" is not needed.Of course, this is not the issue here, at all. The issue isn't spurious resets, EMI, ESD or whatever. Without the 100nF cap, the MCU may fail to bootcompletely. The capacitor is neededas a functional part of their internal reset circuitry to work properly. I'mguessingthey have an edge detector which relies on delayed rise of the reset signal, or something similar going on.They just fail to document that completely in the datasheet. The only place where theyspecifythat the capacitor isactually needed, is in the reference manual (where it doesn't belong), for example page 310 on the H743 reference manual I'm looking at:"It is not recommended to let the NRST pin unconnected. When it is not used, connect this pin to ground via a 10 to 100 nF capacitor (C R in Figure 39)."Andthisis very hard to find from 3247 pages of documentation which is supposed to describe the internal logic, peripherals and registers, and doesn't talk anything else regarding schematic capture or PCB design, and constantly redirects the reader to the datasheet whenever talking about electrical properties and external components.

author: marikka
author_rank: Newbie
timestamp: October 07, 2019, 03:15:18 am
content: Kiitos, anteeksi, tack och förlot Siwastaja and newbrain! Your help is very much appreciated.After leaving this problem be for a while, I suddenly realized that this is a software problem.I'm using an I2C OLED display, and somehow it must not be ready when the MCU is. If I add a short delay in the beginning, it works fine. NRST and GND are completely disconnected, no caps or switches.I was so focused on trying to figure out the unfamiliar (the hardware), that I got completely blind to an obvious source of error.

author: OwO
author_rank: Super Contributor
timestamp: October 07, 2019, 05:27:04 am
content: That is strange, both the stm32f1 and stm32f0 datasheets have this text:QuoteThe capacitor approach is really dumb because it relies on a minimum Vcc slew rate to work at all (if power supply comes up slowly NRST will always be at Vcc). If these chips really don't have a power supervisor that means one is needed externally, which really sucks.

author: Siwastaja
author_rank: Super Contributor
timestamp: October 07, 2019, 06:33:08 am
content: Quote from: OwO on October 07, 2019, 05:27:04 amThey are clearly not giving us enough information to really know what's going on. Recently I had a H743 which won't boot up unless I touched the NRST pin with an oscilloscope probe - then text searching for "NRST" from all 4000 pages of documentation found me the part I quoted above, and adding the cap solved the problem. And while it's clearly included in (at least some) devboards, I'm not the only one who has successfully made several designs without the capacitor whatsoever.MCU manufacturers seem to have problems creating proper reset circuits. I remember early AVRs did have problems as well, and needed external reset circuitry to work really reliably. The idea is that they integrate everything and make it work without external components (a desirable goal), but then have some bug that pops up rarely, in some edge cases, causing endless pain.