How is position tolerance of pcb parts like pads, vias, tracks... defined? - Page 1
Forum section: electronics / general

author: radiowave
author_rank: Newbie
timestamp: April 12, 2022, 06:35:36 pm
content: Hello,this is my first post, so i'm happy about your advice if something is wrong about it.I'm currently getting into working with PCB's and i came up with a question while reading standards. It may be a very theoretical perspective, but it bothers me since it came to my mind.I understand that IPC 610 defines, how accurate the position of a component on its pad must be, given the required ipc-class.Is there a similar standard that defines "how precise" the position of pcb parts like pads, tracks, vias in relation to a fixed point, e.g. the outer contour or fiducial marks, must be?From my perspective, PCB manufactures can produce products only with a limited precision. Pick&Place-Machines also only work with a limited precision. While both precisions are usually very high, the sum of tolerances may lead to components which position does not comply the already named ipc 610. (This view neglects other influences, i know).I'm actually wondering who is defining the "precision" or "allowed tolerance" of layout parts on a produced pcb. I did not find any standard covering this topic, but i may have overseen it. How ist this handled in practice? Is this a thing only a pcb manufacturer can name for it's given capabilities (i can dothis valueprecise)? Or is the tolerance in real world usually that low that no one even thinks about it?Thanks in Advance!

author: Feynman
author_rank: Regular Contributor
timestamp: April 12, 2022, 08:43:50 pm
content: The relevant standards for this are IPC-6012 and IPC-A-600, which is the acceptability standard for IPC-6012 (similar to IPC-A-610 for PCBAs).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 12, 2022, 11:25:29 pm
content: That, and check the manufacturer / fab what their dimensional tolerances are. Most say on their website.Normally, copper tolerances are quite excellent, but they're only in relation to themselves, i.e. on a given layer; layer alignment is modest (typically by drilled registration holes, or x-ray), and comparable to other registration tolerances (soldermask, drill, etc.). Silk and rout are the worst, silk sometimes being quite good (it can be printed the same way as soldermask, but is usually inkjet or screened) but usually swelling a bit (due to screening), while rout is good by itself (reliable CNC positioning) but subject to errors due to tool pressure and wear, sudden change in direction (often, corners get blown in or out, as the end mill grabs the material there), and deflection of the material itself if cutting thin webs (intricate outlines can be difficult to fabricate).Basically, the copper image resolution is finer than you'll ever need, and the printing resolution (in terms of maximum lines/length) is pretty good, while the minimum trace/space is an adequate factor larger than that minimum resolution to ensure accurate etching and reliable connections (free from shorts/breaks).The others suffer from reduced resolution, soldermask I think more for structural reasons than imaging (too thin of a web and it can just peel off the board itself), and silk like I said due to inkjet or screening resolution.And, by special request / custom order -- you can get tighter tolerances, on holes, slots, board edge / rout, etc., but you will of course have to pay extra for the custom job. Mechanically speaking, they need to give such an order more attention, it doesn't fit into normal proto flow, they might have to order new drills, end mills, etc. to get the required size, or due to extra tool wear for narrow slots, and simply charge more for taking more time to run the machines slower / more carefully / multiple passes to achieve the desired tolerances. Not to mention testing dimensions afterward, if metrology is offered / required.So, as far as assembly / placement goes -- copper to copper is what matters, which is very good. And, I mean, clearly it's good enough for 0201s and below to be practical, as is normal these days. As for if you need to know what this spec actually is, what kind of error you expect to see between fiducials (to each other) and (to) pads, see above, mfg spec, or if in doubt -- ask them.Tim

author: free_electron
author_rank: Super Contributor
timestamp: April 13, 2022, 12:23:43 am
content: STEP 1 : DITCH THE IPC MANUALS.step 2 : read step 1 attentively.step 3 : talk to your fabricator.IPC is a money making machine with outdated standards, designed by committee that takes 10 years to craft a document that, by the time of publication, is outdated beyond hope. All these committees do is hold luncheon meetings to craft documents to sell.The contents are outdated and contradictory.The landpattern standard defines that the pin of a gull wing component needs to fall inside the pad boundary. The assembly standard declares it is ok of the tip of the pin fall outside the boundary. The same standard also talks about wettability of the flank and the correct formation of the fillets. The mechanical strength is in the HEEL and the tip flank hasn't been wettable since we switched to RoHS products 20 years ago.

author: tszaboo
author_rank: Super Contributor
timestamp: April 13, 2022, 08:42:54 am
content: I disagree. I very much like that I can just write on an order that it should adhere to IPC 610 or IPC 2221.And if I we find something that is not according to that, it's the MF responsibility and cost.

author: free_electron
author_rank: Super Contributor
timestamp: April 13, 2022, 02:54:46 pm
content: Quote from: tszaboo on April 13, 2022, 08:42:54 amSo you are ok with pins sticking out over pad edge?

author: tszaboo
author_rank: Super Contributor
timestamp: April 13, 2022, 03:55:02 pm
content: Quote from: free_electron on April 13, 2022, 02:54:46 pmI think the specification for SOIC pakage overhangs are a bit loose, and I would probably define it differently. The spec said directly, that it shouldn't violate electrical clearance, so it would be safe to assemble boards like that. And TBH, I don't see this happening often, and if some MF cannot solder SOIC properly, there are usually bigger problems.What I see that often happens is that small components like SAW filter, LNA and such doesn't get soldered down properly, because they ignore reflow profiles, rework the paste mask that we create or the combination of these. That's not the discussion here. At least there is a common standard that the two parties can adhere to without hours of discussion what's acceptable and what's not. Or they can at least tell us if they are only doing class 1 work so we can strike them from the possible candidates right away.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 13, 2022, 05:00:51 pm
content: IPC is also valuable as simply a perspective or framework to begin with. What dimensions matter, how are they specified? Heel, toe and side fillets, with these basic solder joint types. What's a courtyard? Where should pin 1 be (orientation)? Part centroid? If nothing else, these are all starting points to work from. Exact values vary, and the true test is always at final assembly: how much yield do you get, what are the typical failure modes, what can be solved by adjusting temp profile, paste formula, paste geometry, pad geometry... And keep in mind, very little is firm in IPC; much of it is "should", not "shall".Tim

author: Feynman
author_rank: Regular Contributor
timestamp: April 13, 2022, 05:51:49 pm
content: Quote from: free_electron on April 13, 2022, 12:23:43 amWhile it is sometimes true that IPC standards are outdated and contradictory, this example reveals some misconceptions, I guess. The land pattern standard is a guideline for designing land patterns based on the geometry of a part. The assembly standard definesacceptability of soldered assemblies. Land pattern design and assembly are two different things entirely, hence there is no contradiction here. The land pattern standard is intended to design footprints that help getting acceptable assemblies in the end, of course.I don't deny that there might be some stupidity going on in the IPC organization (e. g. the shit-show with IPC-7351C). And IPC standards are not the holy bible, either. They are a collection of good practices and concepts that have been proven to fit many but certainly not all applications. And they are a good way of communicating your intents. When I tell the PCB shop "please fabricate in accordance with IPC-6012 class 2" and the assembly shop "please assemble in accordance with IPC-A-610 class 2" I know what to expect from the suppliers and - equally important - the suppliers know what I expect from them.Good luck communicating your intents by "ditching" IPC standards in a professional environment. You might get away with it when your supplier adheres to IPC standards anyhow without you knowing about itHaving said that, IPC standards are certainly NOT a replacement for talking to your supplier. Talking to your supplier will always be #1 priority. However, standards help to clarify the standard stuff (literally).

author: free_electron
author_rank: Super Contributor
timestamp: April 13, 2022, 06:05:20 pm
content: Quote from: T3sl4co1l on April 13, 2022, 05:00:51 pmproblem is that it is not correct (not anymore) . Kovar (leadframes are made from kovar , sometimes called alloy 42) is not wettable by tin, only with lead. So you cannot use lead-free to create a toe fillet on modern packages. That's the reason manufacturers now call out "side-wettable flank" on SON and QFN packages. They need special processing to deposit chemical tin flashing.Quoteeven there they are in conflict with themselves. dot ? line ? corner ? what about precision positioning like for large qfn or bga ? (reverse corner markers , where you mark three corners but leave the origin position blank). what do the AOI's expect ?Naming conventions ? for half the modern packages out there there is no syntax. Encoding size of thermal pads in footprints ?QuoteAnd there is the problem. it WAS a standard . it is now degraded to guideline... the big assemblers chuck it in the bin because it doesn't fit modern production. Version C of 7351 has been what, 10, 15 years in the making ? still not released. outdated before release. verbage altered from "standard" to "guideline"We've been lied to for 50 years with their 2221 trace current curves. Based on flawed research ( that was government sponsored, paid by taxpayer money and thus supposed to be available for free), published behind a paywall.What about "Let's make a standard for landpatterns , we will make a program that generates footprints according to the standard. We'll give the software away for free"... once the standard is ratified we take the company private, stop the free version and sell the newer versions for oodles of money. By the way , what the landpattern generator creates is VERY different from what the standard says... the generator has been tuned for real world production. So no complaints on the quality of the generator. But i don't like the concept of first establishing a standard then profiting off it. That left a sour taste.A lot of things depend on what machinery and process you have in the fab. So, i reiterate : talk to your fabricators. they will tell you what works in their plant.Yeah, it's pretty clear i don't like IPC.Of course if this is for hobby, hand assembly or small scale , low technology designs : feel free to also chuck IPC in the bin. Leaves the question.. what case do you need them for...

author: free_electron
author_rank: Super Contributor
timestamp: April 13, 2022, 06:15:22 pm
content: Quote from: Feynman on April 13, 2022, 05:51:49 pmSame organization :document A says you must design the landpattern so the pin falls inside.document b says it is ok for the pin stick out.Which is it ?(i raised this issue during a meeting. The official answer is : the committees don't necessarily talk to each other...")A proper footprint will not have the pin sticking out because it will be designed to handle the tolerances of the part. The datasheet shows the tolerances. if it is designed properly it will fit. If it still sticks out there is a problem with quality control at the part manufacturer, or at the assembler( the part drifted)There are many other issues not covered. Small stencil opening require rounded corners for better paste release. What about selective thickness stencils ?There is a lot of technology in assembly these days for which IPC has nothing. They are still mucking about with 7351C ...

author: radiowave
author_rank: Newbie
timestamp: April 15, 2022, 07:44:00 am
content: Hello all,in first place i'd like to thank you for your very detailed answers so far - i also enjoyed reading the discussion about your viewpoints towards the ipcIn the next days i think i'll start with screening the IPC 6012, IPC-A-600 and every manufacturer information i can get.

author: nctnico
author_rank: Super Contributor
timestamp: April 17, 2022, 09:57:37 am
content: I'm not sure whether this is covered in the IPC specs but I have been told that the layout may not be transferred to the board 100% accurate due to warping/distortion at some point in the lithographic process. This is why some assemblers like to have fiducials near fine pitch components so they can place these components relative to markers close to the component to minimise the effect of the warping. When in doubt, check with your assembler.

author: free_electron
author_rank: Super Contributor
timestamp: April 17, 2022, 02:47:42 pm
content: Quote from: nctnico on April 17, 2022, 09:57:37 amLocal fiducials are for the placement machine to fine position the part. The precision of the older machines (mid 80's) was not enough to place a part on a large board ( keep in mind boards in mass production are still panelized. so it is not uncommon to see a half meter by one meter panel roll through the pick and place... something holding 4 full size AT motherboards for example). The machines had trouble doing rotational and x/y positioning for large movement. The vibrations could cause the board to shift by half a millimeter in the machine. There goes your 0.5mm tqfp ... So they could not bank on the fiducials of the panel. they needed fiducials at the part site. The cameras on the placement head could capture the local fiducials and the machine could do last moment adjustment when it had already decelerated the head.These were teething problems. This has been solved and local fiducials have long gone. They shoot the vibration causing parts first. Pick and place machines are not exactly "gentle" when shooting things like resistors and capacitors. More frequently that stuff is shot on one machine while the precision parts are placed using a "gentle" cycle on a different machine. The machines can now identify the pads themselves. the image processing has become smart enough to use the pads directly . no more need for local fiducials. I haven't seen that in use since the late 90's. Maybe if you are dealing with small assemblers that use old machinery. But any shop that has stuff made in the last 15 years should not require local fiducials.the same goes for the pcb patterning. Every shop worth its salt uses LDI or DDI or other forms of direct imaging. DDI is the way to go. The imaging quality is just perfect. they essentially use a camera combined with a DLP mirror. They can compensate the projected image to adjust for any panel warping (important when doing flex boards)https://artwork.com/raster/dmd/High_Speed_MLI_TechPaper.pdfthe local shops here in the valley are all equipped with DDI.The same goes for soldermask. Gone are the days of inkpots , silkscreens and squeegees. You can get 50 micron soldermask over copper accuracy.Direct Jetprinting :

author: eugene
author_rank: Frequent Contributor
timestamp: April 20, 2022, 08:21:39 pm
content: Quote from: free_electron on April 13, 2022, 02:54:46 pmHonestly, I don't know which of IPC 610 or IPC 2221 say it's ok for pins to stick out over the edge of a pad. But, you don't need to ditch all of IPC just because you disagree with something(s) in some of their documents.In any case, I interpreted the OP as asking about tolerances on PCB fabrication, not assembly. The problem being that Gerbers do not include any sort of tolerance information. What's needed is a way to specify how close to the Gerbers that I expect the raw PCB to be. This has nothing to do with land pattern design or component placement.As others have noted, IPC standards like IPC-A-600 can be a very good place to start, especially since all PCB fab houses are familiar with them. I always send a mechanical drawing along with the Gerbers. This drawing is for reference only. Not every detail is called out and only a few dimensions are provided. However, the drawing does say clearly "Build to IPC-A-600 Class 2" or something similar. In addition, anyspecial requirements beyond thatare called out explicitly. This makes it much easier for the fab house to know what I expect and provide a working quote.

author: free_electron
author_rank: Super Contributor
timestamp: April 20, 2022, 10:08:50 pm
content: Quote from: eugene on April 20, 2022, 08:21:39 pmhttps://blog.samtec.com/post/understanding-ipc-class-2-vs-class-3-for-a-gull-wing-lead/QuoteNo, you don't , but ... talk to your fabricators and assembly shop. They may have something to say too. They can often deliver a superior product when you follow their rules as opposed to IPC rules. Like i said : a lot of their stuff is outdated and manufacturers all have some secret sauce depending on their machinery.That whole 7351 landpattern tool story has left a VERY sour taste with a lot of people in the industry. "We'll make a standard , and give you a nice program that does the work (provided you pay your membership dues)." Once the standard is ratified the tool maker bolts, pulls the free version and cashes in on the standard he helped write7351B is outdated due to new machinery. And revision C .. we have been waiting for years...