Digital Null Meter Design - Page 1
Forum section: electronics / general

author: azeeman
author_rank: Regular Contributor
timestamp: July 27, 2025, 10:02:51 pm
content: The Python script has been debugged and improved and the changes are in the zip file.I've come up with a much simpler solution for a null meter design. The R-2R ladder has fatal flaws which are probably not worth the trouble to fix. Instead, by stacking multiple, cheap low bit DACs and combining them in a ladder network using standard 1% resistors, very high resolution is possible with relatively low cost. The DACs have low precision and are useless for direct measurement, but are more than sufficient for tasks such as nulling out a load cell common mode voltage along with op-amp input offset.For measurement purposes, a 12 bit DAC is used to make the actual measurement. Because it is also connected to the ladder network with 1% resistors, it's precision will be lost, but it's easy to calibrate it against a PWM based reference to regain the precision.The trick to interpolating low precision DACs is to make sure that the interpolating DAC more than overlaps two steps of the more significant DAC. Also, the stacked DACs don't act like a single DAC, they act more like a Kelvin-Varley divider with each DAC representing one digit. A very sloppy Kelvin-Varley divider because of the significant overlap, but that is easily overcome in software.The design of the ladder network is not done analytically, instead a quantum annealing algorithm is used to find the resistor values. To make the quantum annealer's job easier, the DACs are separated by extra ladder stages to give more degrees of freedom for resistor selection.The quantum annealing algorithm is extremely simple, but it seems to work by witchcraft because I have absolutely no idea how something so simple can solve even very complex resistor networks in a few minutes. It's like taking a box of jigsaw puzzle pieces, shaking them for a few seconds and then opening the box and finding the puzzle neatly put together. The hardest part is creating a model for testing.A Python simulator is used to demonstrate how the nulling is done. First the coarse DAC is nulled. This takes care of the worst of the common mode voltage and op-amp input offset. Then the medium DAC is nulled to interpolate the coarse DAC output. The fine and atomic DACs will be the most active because the load cell common mode voltage and op-amp input offset are static errors. The MCP6001 has a worst case offset of 4.5 mV, but this is a static error. It's offset drift is only +/-2.5 uV per degree C. The DACs are very fast and can change their output at sub millisecond speeds. If the temperature change is 1 degree per second, the offset drift is only 2.5 nV per millisecond which is easy to balance out.Because the least significant DAC has resolution of roughly 10 nV, it can jump around a lot because of the noise, but still null very close to the true value without introducing a lot of noise into the feedback path. With averaging, the voltage difference can be read to below the uV level.The Python simulator is not intended as a proof of circuit operation, it's intended more for insight into how the circuit works and as an aid in developing software to control the nulling process. I'm fairly confident that the circuit will work. The circuit itself is quite simple and the parts are very cheap so there's little risk or expense in building a prototype board.I've attached all the design notes and source code in the zip file.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 27, 2025, 10:19:20 pm
content: It is usually not the ADC/DAC resolution or OP-amp open loop gain that is limiting the performance of a null meter. The limiting factors are more thermal EMF at connectors, switching and similar and amplifier drift and low frequency noise. In this respect the MCP6002 is not performing that well.

author: TimFox
author_rank: Super Contributor
timestamp: July 27, 2025, 10:21:41 pm
content: Also input bias current, which is more important than input impedance (resistance) at null.

author: azeeman
author_rank: Regular Contributor
timestamp: July 27, 2025, 10:31:35 pm
content: The loop bandwidth is in the microhertz range, there's not much noise of any sort in that narrow a bandwidth.

author: azeeman
author_rank: Regular Contributor
timestamp: July 27, 2025, 10:42:11 pm
content: I used the the cheapest CMOS op-amp I could find. The high speed of the null makes it possible to compensate for short term drift. I didn't expect to get such a high performance I was hoping to get down to microvolts only to find that the null was going down to the nanovolts. If I knew I could get that kind of result, I would've used a better op-amp.I realize there's problems with thermals and used a four layer board with lots of copper to maintain thermal equilibrium. The drift is low and measureable in the nanovolt range which was completely unexpected. I'm sure there's lots of room for improvement. The cost of parts is very low and it is easy to replicate the circuit. I have a board design with some mistakes on it. I can fix those, but I'm not sure how to post the KiCad files.

author: azeeman
author_rank: Regular Contributor
timestamp: July 27, 2025, 10:44:27 pm
content: The MCP6002 is a CMOS op-amp and the bias input current is extremely low.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 28, 2025, 02:05:24 am
content: Regardless of the other aspects (noise, drift, opamp quality, etc) I find the idea to use a R - 2.01R DAC quite intriguing.It reminds me of the Ohmsource RM-270 and the Eastwood RM55. Both these products are "programmable resistors", made from a long string of resistors, and a relay over each resistor to short it out. Each "next" resistor is a little bit less then the sum of all the previous resistors , and an uC figures out what relays to switch for a particular programmed resistor.I will have to read your post a few times for the calibration procedure. It looks like you flip only one bit, and then measure the voltage directly after the resistor connected to that I/O pin. And then repeat that for all the other bits. Correct?Maybe this can be simplified with a "self calibration" procedure.Instead of a long R - 2.01R network, you use two shorter networks, and an intermediate comparator / null detector between the outputs. And then you can compare these two networks to each other. But I have not thought this through completely.The Idea is at least intriguing, but whether it has practical use is another question, and all the mentioned error sources are important. I'm toying myself with the idea of building a DAC with around 20-bit of resolution by combining PWM techniques. PWM has been used for generating programmable voltage references for many years, and even with those high resolutions, but implementation is certainly not trivial.

author: David Hess
author_rank: Super Contributor
timestamp: July 28, 2025, 02:46:28 am
content: It seems like you have invented a succession approximation converter which switches to a tracking converter.Quote from: azeeman on July 27, 2025, 10:02:51 pmStrain gauge load cells are not particularly stable or accurate, so electronic measurement only require moderate performance. If exceptional performance is required, then it has been available for decades with an order of magnitude more performance than you describe. The performance of my own 4 operational amplifier DC differential preamplifier design for strain gauges achieved 0.1 microvolt noise and stability, which is much better than any strain gauge can provide.It is more important to use ratiometric conversion, which relaxes reference requirements and removes flicker noise, and some form of correlated double sampling to remove thermocouple effects. With good strain gain load cell performance, the later is still not required.

author: iMo
author_rank: Super Contributor
timestamp: July 28, 2025, 07:49:47 am
content: Quote from: David Hess on July 28, 2025, 02:46:28 amAI tool is telling me the stuff is unique and it could be filed for a patent..AI tool found no published patents that fully cover the system as described, suggesting the design appears novel at the patent-search level.Quote

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 28, 2025, 10:25:55 am
content: Another way that may be used for self-calibration of the bits is to alternatively flip all the lower significant bits including the the bit you want to calibrate, and then minimize for AC voltage output.

author: azeeman
author_rank: Regular Contributor
timestamp: July 28, 2025, 12:54:31 pm
content: It's much easier to measure the loss of each stage by turning on a single bit at a time. The voltage at the bit node is measured and then the voltage at the next significant bit measured. The ratio gives the stage loss. Do this for every stage and save the results in a lookup table. By using the table it's possible to calculate the output for every input bit pattern. Everything is ratiometric so the reference voltage doesn't matter only the voltage ratios.There's a lot of calculation involved, especially for the lower bits because their node voltage has to be multiplied by all the other following stage ratios. With modern computers and 64 bit precision, this shouldn't introduce too much error.For higher accuracy calibration, a PWM can be used as a ratiometric voltage reference for measuring the stage voltages. All the stage voltages are in the same range so an eight or 10 bit PWM can be used since there are only two voltage ranges. A handheld meter can then be used to measure the voltage difference between the node voltage and the PWM voltage. This reduces the error introduced by the meter because it's only measuring the much smaller difference voltage.

author: azeeman
author_rank: Regular Contributor
timestamp: July 28, 2025, 12:57:39 pm
content: I have no intention of patenting the ideas and they are free for anyone to use. Everything was developed using open source tools so patenting the ideas would be a crime.

author: azeeman
author_rank: Regular Contributor
timestamp: July 28, 2025, 01:16:23 pm
content: The feedback loop filter bandwidth can be reduced to an arbitrarily low frequency so even flicker noise will have no effect. Of course there is somewhat of a trade off because the output cannot track a fast moving signal. But then, what frequency is DC?The op-amp input offset drift because of time or temperature is largest error term. I used a commodity CMOS op-amp to keep costs low as this project is still in the experimental phase. I'm sure a higher quality op-amp with lower offset drift would give even better results. Also, I'm using the Nano 5V supply as the reference voltage. The next iteration will use a precision voltage reference with a six wire connection to the load cell. I've proven that the circuit can track down to the nanovolt level and now have the software and hardware insight to take things to the next level.Component costs are very low which brings this circuit within reach of any hobbyist and I hope that others will take this up and improve and extend it.

author: iMo
author_rank: Super Contributor
timestamp: July 28, 2025, 01:23:20 pm
content: Quote from: azeeman on July 28, 2025, 01:16:23 pmFdc = 1/13.8billion_years = 2.3e-18Hz

author: gamalot
author_rank: Super Contributor
timestamp: July 28, 2025, 01:32:44 pm
content: You might want to recheck this:Quote

author: azeeman
author_rank: Regular Contributor
timestamp: July 28, 2025, 01:55:38 pm
content: I've written Python scripts to exhaustively test the circuit and proven that it works that way. An R-2.01R ladder is self similar so if four stages work, then five stages, six stages and so on will work. This is because the output, and any error, of a lower stage will get successively and exponentially divided down by the following stages and contribute very little to the final error.The first stage is responsible for 50% of the error. The next lower stage, 25%, then 12.5% and so on.Create a three stage ladder network and then test it under all conditions. The ladder has a constant termination resistance so the last resistor in the network can be replaced by a similar ladder network with minimal effect on the first ladder network. Rinse and repeat until you have the required ladder length.

author: azeeman
author_rank: Regular Contributor
timestamp: August 03, 2025, 01:00:44 am
content: A simple way to calibrate and linearize the ladder network if by measuring the stage voltages. Two voltages have to be measured, the voltage at a particular bit node when that node is high and the voltage at the next higher node.The loss from the node voltage to the next higher stage can then be calculated as the ratio of bit node voltage to the voltage at the next stage. This can be done for all stages and then the output voltage for each bit calculated base on its bit voltage and the stage losses between it and the output. The calculated bit weights can then be put into a lookup table for calculating the output of the ladder network.Instead of measuring each node voltage directly, the node voltages can be measured as the difference between a PWM output voltage and the node voltage. The reference voltage for both the PWM and ladder network would be the same so the measurements would be ratiometric giving high precision. The bit voltage is roughly for each node is roughly 1/3 the reference voltage and the stage loss is roughly 1/2 giving a voltage of 1/6 the reference voltage.For an Arduino Nano, the PWM base count would be twelve giving a PWM base frequency of 1.33 MHz. For the bit node voltage, the counter output compare would be set to 3 because the PWM adds 1. For the loss voltage, the output compare would be set to 1 giving 1/6 of the reference voltage.For high precision, the PWM filter time constant needs to be fairly high. The formula for the time constant is 2^N/(pi^2*Fpwm) where N is the required bit resolution. For 20 bits of resolution, the time constant is 2^20/(pi^2*1.33MHz) = 788 ms. The filter resistance should be relatively high so that the switch resistance of the PWM is neglible relative to the filter resistance. Also, using a relatively high filter resistance allows the use of a smaller, and more readily available film capacitor. If the filter resistance is 1M, a 1 uF capacitor is required.The settling time for the PWM output to be within 20 bit accuracy is about 14 time constants or about 11 seconds.20 bit precision is probably overkill, but the difference voltage between the nodes and the PWM is in the millivolt range. The meter precision doesn't need to be high, because the difference between the node voltage and PWM is a few percent of the reference voltage. Also, the PWM duty cycle can be set to 11/12 and the meter calibrated by measuring the difference between the PWM voltage and the reference voltage. If the node voltage is off by 5% and the meter has a 5% error, the final error, neglecting any PWM errors which should be small, is 5% of 5% or 0.25%.Also, a very high input resistance null meter is required because the ladder and PWM resistances are 1 MOhm. The load cell circuit can be modified to act as a null meter, but it must be battery powered for isolation.Now that I know that the circuit works, I'm working on an upgrade and intend to use a proper low noise voltage reference and op-amp along with battery power and fiber optic isolation. Hopefully, this will give even better results.The components are cheap so multiple meters can be made and used to calibrate each other in a bootstrap method to get higher precision.Also, resistors with 1% tolerance and temperature coefficients of +/-5 ppm are relatively cheap from DigiKey and would work well in the circuit requiring only an initial calibration.I've attached the derivations of the PWM filtering calculations as a PDF and a revised schematic using counter 1 as a PWM.I'm also trying to finish the software for the load cell version for more detailed testing and algorithm optimization. When completed, all documentation and source code will be posted on SourceForge.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 03, 2025, 03:35:10 am
content: Yes, you can also do self calibration by comparing it with a filtered PWM, but reaching 20 bit accuracy with PWM is also not a simple task. One of the problems you run into is variation in the uC clock frequency if it is PLL generated. Hoping that will average out to less then 1ppm is probably wishful thinking.But with your R-1.01R network, you've got a relatively fast DAC. I wonder if it can be used with an FPGA to do DDS.New Idea:You're building a null meter. So that involves a differential amplifier with a high amplification. Yes?You can (dis) charge a (high quality) capacitor with the output of your DAC. then decouple it, and find the inflection point between all the lower lsb's relative to the last MSB. You can either charge or discharge the capacitor a bit by temporarily outputting a very high or very low output voltage. Then switch over so your differential amplifier compares the (slowly drifting) capacitor voltage with the DAC. This way you can find local non-lineairities in your R-2.01R DAC.And what for speed are you aiming at for your R-2.01R DAC? A hybrid DAC may be a good option. Do the lower 6 to 12 bits in PWM, and use the resistor network only for the higher bits. This will already greatly reduce PWM ripple, and you can add a small capacitor at each resistor no further filter it out. This also gives you the opportunity to decouple the two sections and use the PWM to calibrate the most significant digits of the R-2.01R network.

author: David Hess
author_rank: Super Contributor
timestamp: August 03, 2025, 03:40:08 am
content: Quote from: azeeman on July 28, 2025, 01:16:23 pmThe alternative to making a heroic effort with DC coupling is to chop the excitation and use synchronous demodulation on the output, removing DC errors, noise, and other interference. This is also less expensive than what you are proposing. Nobody bothers because strain gauges, and strain gauge load cells, are not good enough to require it.Flicker noise is perniciously resistant to low pass filtering. A precision reference is not required if the ADC is ratiometric, and this removes flicker noise better than any filter.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 03, 2025, 08:47:25 am
content: AC excitation was not that uncommon with strain gages. It makes perfectly sense and was at least standard for good accuracy some 30 years ago.There is little need to use a DIY discrete build DAC/ADC. For things like a null-meter there are ready made SD ADC chips with good performance and less need for anti aliasing filtering. When it comes to high resolution the details, like voltage dependent switch resistance and the balance of high and low side switch make a high resolution R2R DAC not that easy.

author: azeeman
author_rank: Regular Contributor
timestamp: August 03, 2025, 10:40:23 am
content: My current board has a 12 DAC which I originally intended to use for the measurement. Because the output of the ladder is purely resistive, a voltage divider can be used to divide the DAC output down to a full scale of a few millivolts and then combined resistively with the ladder and use it for the final measurement. I abandoned this when I found that the ladder network was far superior on its own.The circuit is purely resistive, the bit switches act as voltage sources and their resistance is low enough compared to 1 M that they can be considered as ideal. The circuit is a linear resistance network and can be treated as such.The bit switches feeding the ladder can be driven by AND gates with a common PWM going to one input of each AND gate. The input code is then put into the other input of the AND gate and now the ladder network can multiply the PWM signal. A filter capacitor can then be put on the output of the ladder. Multiple circuits can be combined using resistors with each output weighted to reflect its digit position. One PWM would be two bits with not attenuation, the second would be four bits with its output attenuated so that it interpolates one step of the two bit PWM. The same is done with a six bit PWM to interpolate one step of the four bit PWM. This can continue until the desired resolution is achieved. Because of the output attenuation, the filtering requirements of all PWMs is the same for a given amount of PWM ripple.There are two problems with this, it is very slow and the cost of the filtering capacitor is very high assuming that the value required is available. The resistor ladder alone is the best solution.Noise is essentially defined by bandwidth. For high speed measurements, a low bandwidth is required so the device noise has to be low to reduce filtering requirements and increase speed. Conversely, a high noise device can be used with a very low bandwidth filter to reduce the effective noise. It would be useless for high speed measurements, but the DC voltages I'm trying to measure are very low frequency. Remember that the feedback loop time constant can extend to millennia and the loop is DC coupled.The minimum specified DC gain of the op-amp is 25,000 and the ADC is used with the internal 1.25 V reference. The ADC is 10 bit so its resolution is roughly 1.25 mV therefore the resolution is 1.25mV/25,000 = 50 nV. I assume the typical gain is probably a lot higher.A PWM output can be filtered using a massive amount of capacitance to greatly reduce the bandwidth. The settling time will be very long and it would be useless for direct measurement, but as a Klevin-Varley divider for someone with a lot of patience and little cash, it's a good solution for doing very low frequency measurements. The main source of offset is the difference in the high and low switches used to generate the PWM output. Power MOSFETs with milliohm on resistances can be used for these to reduce that error. Another source of error is capacitor leakage which creates a voltage divider with the PWM filter resistor. I found that film capacitors are available up to 100 uF with very high insulation resistance and can be used up to 31 bits. Thermal noise dependent on the capacitance value and if a low bit PWM is used, clock frequency anomalies aren't as significant. A PWM with a base count of 12 has a fundamental frequency of 16 MHz/12 = 1.33 MHz. Any frequency artifacts caused by the clock phase noise or frequency instability will be completely destroyed by the PWM output filter. But, the PWM filter will require about 12 seconds or more to stabilize to the correct voltage. This is useless for anything other than as a fixed voltage source with very limited resolution and a high output resistance.For calibrating the ladder, only two fixed voltages are required and two PWMs can be used to create those voltages to eliminate the need to wait for the PWM output to settle before taking a measurement.If the op-amp input is not switched and only one side of the load cell is being balanced, the last two digits of the ladder setting will flicker implying stability down to 28 bits. There is a slow drift on the other digits. At that level the output of the resistor network is constrained to change at roughly 1nV every 200 us and this can be lowered to 1 nV per year if desired. Of course, the resistor values are going to drift, the op-amp input offset is going to drift and the reading is not precise because it can only show what happened in the distant past.When the op-amp input is being switched from one side of the load cell to the other, the difference voltage has noise in the single digit uV range. I believe this is caused by charge injection transients, the low frequency response of the op-amp causing settling time errors, the 5V regulator output drift and other noise. Adding strategic delays reduces the noise somewhat, but a better op-amp with lower input offset drift, separate low noise voltage reference and slower switching speed should improve the measurement.The electrical environment in which the circuit is working is incredibly crappy. I'm using cheap 9V wall mount power supply power the Nano. The Nano 5V regulator is the voltage reference. The USB connection is done through an isolator. When I saw the results, it blew my socks off. The last thing I expected was to see a null balance in the nV range.I used a four layer board with lots of copper planes and single point grounding to reduce thermal and electrical gradients. I made some mistakes on the board layout and had to add some bodges to get it to work.There is so much more to explore and I'm happy to get feedback from people like you who have the skills to take the concept much further. I'm finishing up the software now and once that's done, a new board will be created to incorporate the refinements.

author: azeeman
author_rank: Regular Contributor
timestamp: August 03, 2025, 11:07:51 am
content: I've used chopper circuits with synchronous detection and found that direct DC coupling of the op-amp with low voltage feedback is far more superior. For example, the differential output of the load cell can be directly fed into an op-amp and feedback applied directly to the load cell through high value resistors. Typical load cell resistance at the output is 1 k so if 5 V excitation is used, a 499k feedback resistance will give about 10 mV of feedback to the load cell. Two DACs can be used, one on each side for balancing. The DACs input will be signed binary with zero at the DAC output midpoint. One DAC input would then be the two's complement of the other. Because the DAC output is being divided down, the error at the op-amp input is very low.The only problem is op-amp input offset which requires the feedback voltage range to be increased by 5 mV to compensate for it.The problem with synchronous detection is that the filtering is done around the chopping frequency requiring filtering around that frequency. Extremely low bandwidths can't be implemented using only analog techniques and digital filtering is required. By using direct DC feedback, a simple RC filter can be used in the analog domain and filtering in the digital domain is also much easier.Because there's no switching, there's no switching artifacts like charge injection. Also, high quality auto zeroing op-amps can be used which decrease noise and offset even more.I have a self powered elliptical at home and needed to control the brake current using a small shunt resistor. One input of an op-amp was connected to the shunt and the other to a 16 bit PWM based DAC. To compensate for the op-amp input offset, a small DC voltage is injected to bias the op-amp input so the offset wouldn't be a problem. Op-amp input offset is relatively stable and for the use case ultra high precision was not necessary. Both the hardware and software are simple compared to the chopper solutions I tried in previous versions. I've attached the circuit schematic.The elliptical was an interesting problem because the generator voltage can range from 10V to 200V or more and I wanted a cheap and simple solution using through hole parts. I went old school on the circuit because it was the easiest solution.All design information, source code and KiCad files are available athttps://sourceforge.net/projects/elliptical-controller/.

author: David Hess
author_rank: Super Contributor
timestamp: August 03, 2025, 12:29:23 pm
content: Quote from: Kleinstein on August 03, 2025, 08:47:25 amI worked in the industry at that time. I think the OP-07 made AC excitation obsolete, but even before that, Fairchild had a couple of low drift parts, (1) and there was what we did which was to grade 308s for low drift and ovenize them. I never found any references online, but we bought small PTC element ovens designed to fit over a TO-99 metal can.AC excitation was not foolproof either, as it caused some odd problems in the field resulting in higher noise and poor accuracy. Maybe they were doing it wrong. Chopper stabilized amplifiers, at least back then, also had the same problems.If I did this sort of thing now, I would try using current excitation and drive the other side of the excitation to remove the common mode signal, allowing all amplification to be single ended, but I am not sure how to get this to work with ratiometric operation without gain error. Alternatively inexpensive and awfully good differential input delta-sigma converters have been available for more than a decade, although to achieve the lowest noise they require external amplification.(1) The Fairchild 725 was designed by George Erdi before he moved to PMI to design the OP-07, and Fairchild also had the 727 temperature controlled low drift differential preamplifier, but I never saw either used.

author: azeeman
author_rank: Regular Contributor
timestamp: August 03, 2025, 02:03:33 pm
content: It's very easy to implement AC excitation now by using two microcontroller digital outputs as an H bridge for excitation and then use an op-amp with the non-inverting input connected to one side of the load cell and the inverting input to the other with a high value feedback resistor and a series capacitor. A small capacitance, around 10 pF has to be put in parallel with the feedback resistor to compensate for stray input capacitance.The load cell resistance is relatively constant so the op-amp gain will be relatively constant and the response speed can be reasonably high depending on how much resolution and averaging is used. The microcontroller ADC input is DC biased to 1/2 the power supply voltage and the output of the op-amp capacitively coupled to the ADC. The ADC sampling is done synchronous with the H bridge drive and a certain degree of randomness can be added if desired to reduce noise sensitivity.Detection is done by reading the ADC multiple times when the H bridge is in one orientation and the same number of times when the H bridge is in the opposite orientation. This means that ADC is sampling at intervals over 180 degrees. A lookup table containing sine values at each degree interval is used to for synchronous detection by multiplying the signed ADC reading by the sine value in the lookup table. Also, the cosine value is calculated by multiplying the ADC value by the cosine value given by shifting the lookup table pointer by 90 degrees. The absolute value of the op-amp can then be calculated by taking the square root of the averaged sine and cosine values. The hardware is very simple and the results are quite good.To reduce calculation time, the ADC readings are summed and saved in buffer and then the buffered readings are multiplied by sine and cosine. The ADC is 10 bits and if the buffer is 32 or even 16 bits, a decent amount of ADC readings can be summed.In my implementation, I used two buffers. As one buffer was being filled with new readings, the other buffer was being read and the multiplications done. Because the ADC is AC coupled, op-amp input offset is common mode and cancels out and so a commodity CMOS op-amp like an MCP6002 can be used.The code shown below was used for reading brake current for an elliptical exerciser with a chopper amplifier. I can't find the code for load cell, but the principle is the same.Incidentally, for a simple random generator, a maximal length shift register sequence is very easy to implement in software with very good control of spectrum spread. For low spread use a low bit shift register such as 4 bits. The lowest frequency output occurs when the code is 0011 or 1100 and the highest frequency is when the code is 0101 or 1010. The same rule applies for all bit widths and gives a good estimate of the harmonic content.The sequence has a DC component because the all zeros code is not used, to get around this a lookup table can be used to generate the sequency if the number of bits is eight or less.This is probably the simplest possible load cell meter because it requires a single op-amp, a few resistors and capacitors and a small microcontroller. I used an Arduino Nano which was overkill, but easy to use.In the code below, the ADC was triggered by one of the counters so the timing could be precisely controlled. Interrupts aren't used and the serial port was controlled by buffering the output and then writing to serial port using a state machine to write out bytes during idle times.bool checkADC(void){/** This function implements a frequency tuned AC detector* The ADC samples at exactly 32 times the chopper frequency* Autocorrelation is used to extract the real and imaginary parts of the chopper fundamental harmonic* Bandwidth is inversely proportional to sample size. 200 cycles are used as a compromise between noise and speed*/static byte sampleCount = 0;static unsigned int cycleCount = 0;//Wait for ADC to finishif(ADCSRA & B00010000){ADCSRA |= B00010000; //Clear ADC done flagTIFR0 |= B00000001; //Clear TOV0 flagsamples += ADC;sampleCount ++;if(sampleCount == 1){PORTC |= B00100000;}else if(sampleCount == 16){PORTC &= B11001111;}else if(sampleCount == 17){PORTC |= B00010000;}else if(sampleCount > 31){PORTC &= B11001111;sampleCount = 0;cycleCount ++;if(cycleCount > 200){cycleCount = 0;//Calculate chopper fundamental harmonic vector values using convolution with cosine and sinefloat cosineSum = 0.0;float sineSum = 0.0;for(byte cosineIndex = 0; cosineIndex <= 31; cosineIndex ++){byte sineIndex = (cosineIndex +% 32;cosineSum += float(samples) * cosine;sineSum += float(samples) * cosine;}//Calculate scalar value of chopper fundamental harmoniccurrent.value = sqrt(sq(cosineSum) + sq(sineSum)) * currentCalibration.value;//Send current value to host for displayif(queueAppendByteVerbatim(&rs232writeBuffer, START) == true){if(queueAppendByteVerbatim(&rs232writeBuffer, BRAKE_CURRENT) == true){queueAppendFloat(&rs232writeBuffer, &current);}}memset (samples, 0, 32 * sizeof(samples));return true;}else{return false;}}else{return false;}}else{return false;}}

author: azeeman
author_rank: Regular Contributor
timestamp: August 03, 2025, 02:23:42 pm
content: l'm activating only one bit and measuring at the bit node and at the next higher node. This way I can measure the loss from the bit switch to the ladder node and the loss from the bit node to the next higher node. Repeat this for all nodes and the whole ladder can be characterized. Once all the measurements and calculations are done, a 32 entry lookup table is constructed with the output value of each bit and it becomes easy to calculate the output voltage by simply summing all the active bit values.Self calibration is easy to implement by using four 8:1 analog multiplexers to bring all 31 nodes to a detector. There are only two voltage values, the bit node value which is 1/3 of the reference voltage and the next stage value which is 1/6 of the reference voltage. The voltage difference from the node to 1/3 of the reference and 1/6 of the reference can be measured as the difference between one PWM set at 1/3 duty cycle and a second PWM set at 1/6 duty cycle. The PWM base count would be 12 giving a fundamental frequency of 1.33 MHz making filtering relatively easy. A 1M resistor with a 1uF film capacitor would be sufficient for very high resolution. Because only the difference or error term is measured, the measurement precision can be quite high.The biggest problem is that the detector input resistance has to be very high to avoid loading ladder and PWM outputs. A DMM won't hack it because the 10 M input impedance will load and the difference voltage is in the millivolt level. If the meter has sufficient resolution and a well defined input resistance, the loading can be calculated and compensated for.Using the ladder network purely as a potentiometer has a lot of benefits. Unlike a conventional potentiometer, the output resistance is constant at 1MOhm regardless of the setting. Now consider a 20 turn potentiometer. Assume that the shaft can be set with 5 degrees of resolution or 360/5 = 72 positions. The total number of positions is 20*72 = 1,440 or roughly 11 bits. The ladder network can be extended indefinitely with any number of bits of resolution.The only problem is that the 1M output resistance will generate a lot of thermal noise. This can be mitigated by putting a capacitor on the output. The thermal noise is then determined by the capacitor value and can be made arbitrarily small at the expense of output setting time. I've attached a PDF showing how to calculate PWM filtering time constant and filter settling time.

author: azeeman
author_rank: Regular Contributor
timestamp: August 04, 2025, 04:21:14 pm
content: I've come up with an exhaustive proof of how the R-2R ladder works. The ladder is a linear resistive network which means that the bit voltages will add linearly regardless of which bits are on or off. This means that Kirchoff's laws are in force and can be used to prove that the ladder works.The proof is simple, if the output voltage for input code 1 is greater than the output for input code 0, the network is monotonic whenever bit 0 of the input code goes from 0 to 1.If the output voltage for input code 10 is greater than the output code for 01, the network is monotonic. The output voltage for input code 11 will also be greater than input code 10 because bit 0 has been proven to be monotonic and the output of the ladder is the sum of the bit voltages. The output voltage for 11 is composed of the output voltage for input code 10 and the output voltage for input code 01.The critical transition points are input code transitions of the pattern from 0 to 1 to 10 to 11 to 100 to 111 to 1000 to 1111 to 10000 to 11111 to 100000, and so on indefinitely. For a 32 bit ladder there are 64 such transitions so the ladder network can be tested exhaustively using loop equations.I've attached a Python script that does this and found a mistake in my circuit. The network is monotonic only if the 2R resistors are less than twice the R resistors. I'm using 499k and 1M resistors. Instead, I should be using 511k and 1M resistors. The R resistor can be any value as long as it is equal to, or greater than half the 2R resistor value. If the R resistor is much larger in value, the output voltage will just be lower, but still monotonic. This allows the use of lower tolerance resistors with low temperature coefficients which are much cheaper than high tolerance resistors with similar temperature coefficients.I used a spreadsheet to help write the Python script and a PDF showing the loop equations. All files have been attached.Here's the program output for a perfect R-2R ladder:Output 0.0Output 7.761021455128988e-10Output 1.5522042910257976e-09Output 2.3283064365386963e-09Output 3.104408582051595e-09Output 5.432715018590291e-09Output 6.20881716410319e-09Output 1.1641532182693481e-08Output 1.241763432820638e-08Output 2.405916651089986e-08Output 2.483526865641276e-08Output 4.889443516731262e-08Output 4.967053731282552e-08Output 9.856497248013814e-08Output 9.934107462565105e-08Output 1.9790604710578918e-07Output 1.986821492513021e-07Output 3.965881963570913e-07Output 3.973642985026042e-07Output 7.939524948596954e-07Output 7.947285970052084e-07Output 1.5886810918649037e-06Output 1.5894571940104167e-06Output 3.1781382858753204e-06Output 3.1789143880208335e-06Output 6.3570526738961535e-06Output 6.357828776041667e-06Output 1.271488144993782e-05Output 1.2715657552083334e-05Output 2.5430539002021156e-05Output 2.5431315104166668e-05Output 5.086185410618782e-05Output 5.0862630208333336e-05Output 0.00010172448431452115Output 0.00010172526041666667Output 0.00020344974473118782Output 0.00020345052083333334Output 0.00040690026556452114Output 0.0004069010416666667Output 0.0008138013072311878Output 0.0008138020833333334Output 0.0016276033905645213Output 0.0016276041666666667Output 0.003255207557231188Output 0.0032552083333333335Output 0.006510415890564522Output 0.006510416666666667Output 0.013020832557231188Output 0.013020833333333334Output 0.02604166589056452Output 0.026041666666666668Output 0.05208333255723119Output 0.052083333333333336Output 0.10416666589056452Output 0.10416666666666667Output 0.2083333325572312Output 0.20833333333333334Output 0.4166666658905645Output 0.4166666666666667Output 0.8333333325572312Output 0.8333333333333334Output 1.6666666658905644Output 1.6666666666666667Output 3.333333332557231Here's the output for a 600k, 1M ladder which shows that even if the R value is substantially too large, monotonicity is retained.Output 0.0Output 1.0894248396737847e-10Output 2.3967346472823264e-10Output 3.486159486956113e-10Output 5.142085243260263e-10Output 8.628244730216374e-10Output 1.097268698519436e-09Output 1.9600931715410737e-09Output 2.338690091824507e-09Output 4.298783263365578e-09Output 4.983325540224282e-09Output 9.282108803589863e-09Output 1.0617956312758621e-08Output 1.9900065116348486e-08Output 2.262336087294815e-08Output 4.252342598929663e-08Output 4.820278195690655e-08Output 9.072620794620319e-08Output 1.0270387221500889e-07Output 1.934300801612121e-07Output 2.1882728580211657e-07Output 4.122573659633287e-07Output 4.662470708704942e-07Output 8.78504436833823e-07Output 9.934150984611684e-07Output 1.8719195352949918e-06Output 2.1166321851285436e-06Output 3.9885517204235355e-06Output 4.509828582873045e-06Output 8.49838030329658e-06Output 9.608922130341373e-06Output 1.8107302433637956e-05Output 2.0473368956014533e-05Output 3.858067138965248e-05Output 4.362183715529642e-05Output 8.220250854494892e-05Output 9.294340764775612e-05Output 0.00017514591619270504Output 0.00019803102272886958Output 0.0003731769389215745Output 0.00042193725144730465Output 0.0007951141903688793Output 0.0008990058310341225Output 0.0016941200214030012Output 0.0019154779092414146Output 0.003609597930644416Output 0.004081236732993554Output 0.00769083466363797Output 0.008695737596541828Output 0.0163865722601798Output 0.0185276810180152Output 0.034914253278194994Output 0.03947623305029769Output 0.07439048632849267Output 0.08411052491275879Output 0.1585010112412515Output 0.17921113172287517Output 0.3377121429641267Output 0.3818384175667167Output 0.7195505605308433Output 0.8135687539505884Output 1.5331193144814315Output 1.7334403427048128Output 3.266559657186245Here's the output for a ladder network with 499k and 1M:Output 0.0Output 7.923174274503624e-10Output 1.5830502200458258e-09Output 2.375367647496188e-09Output 3.163725072444153e-09Output 5.539092719940342e-09Output 6.323098735992115e-09Output 1.1862191455932458e-08Output 1.263769866880014e-08Output 2.4499890124732602e-08Output 2.5258510237339446e-08Output 4.975840036207205e-08Output 5.048331841431113e-08Output 1.0024171877638315e-07Output 1.0089930248002403e-07Output 2.0114102125640713e-07Output 2.0166403848326893e-07Output 4.0280505973967625e-07Output 4.0305912968966505e-07Output 8.058641894293408e-07Output 8.055807266112041e-07Monotonicity failOutput 1.611444916040545e-06Output 1.6100871061117335e-06Monotonicity failOutput 3.2215320221522778e-06Output 3.2180269515620178e-06Monotonicity failOutput 6.439558973714297e-06Output 6.43176224584175e-06Monotonicity failOutput 1.2871321219556047e-05Output 1.285494690079651e-05Monotonicity failOutput 2.5726268120352547e-05Output 2.5692750059248744e-05Monotonicity failOutput 5.141901817960129e-05Output 5.135123549726608e-05Monotonicity failOutput 0.0001027702536768674Output 0.00010263398744841923Monotonicity failOutput 0.00020540424112528666Output 0.00020513109913633353Monotonicity failOutput 0.0004105353402616203Output 0.0004099886292932782Monotonicity failOutput 0.0008205239695548984Output 0.0008194304854675687Monotonicity failOutput 0.0016399544550224673Output 0.0016377681538901762Monotonicity failOutput 0.0032777226089126437Output 0.003273352131103981Monotonicity failOutput 0.006551074740016626Output 0.006542338821738674Monotonicity failOutput 0.013093413561755298Output 0.013075952584420963Monotonicity failOutput 0.02616936614617627Output 0.02613446668672931Monotonicity failOutput 0.05230383283290558Output 0.05223407966571559Monotonicity failOutput 0.1045379124986212Output 0.10439849839789395Monotonicity failOutput 0.20893641089651516Output 0.2086577678306214Monotonicity failOutput 0.41759417872713656Output 0.4170372634108289Monotonicity failOutput 0.8346314421379655Output 0.8335183534330401Monotonicity failOutput 1.6681497955710056Output 1.6659251018183385Monotonicity failOutput 3.334074897389344The output is almost monotonic which is why my circuit is working, but that's more from good luck than good engineering.It's easy to change the Python script so that the resistor values are random within the tolerance range and I'll do that for further testing. I'm working on a new circuit, but I don't want to commit to expensive hardware until I'm 99.999% certain the all my ducks are in row.

author: azeeman
author_rank: Regular Contributor
timestamp: August 04, 2025, 04:44:28 pm
content: I've modified the Python code such that the resistor values are randomly changed within a 1% range over 500 trials and found that 511k and 1M is not consistently monotonic. By going up two standard values to 563k and 1M, there was no monotonicity fails. The new script is attached.

author: azeeman
author_rank: Regular Contributor
timestamp: August 05, 2025, 01:32:53 pm
content: Self calibration of the ladder network can be done by using the second op-amp on the board as a null detector with two PWMs. A high resolution, 16 to 20 bit, PWM will be used for making the measurement and a second PWM with a count length of 6 and duty cycle of 1/6 will be used as an auto zero reference for the op-amp. 8:1 analog switches will be used to multiplex each node of the ladder network and the PWM to one op-amp input. The other input of the op-amp will be permanently connected to the high resolution PWM.Auto zeroing is done by measuring the op-amp input offset directly by comparison to 1/6 of the reference voltage set by the 1/6 duty cycle PWM.Only two node voltages are measured, the voltage directly at the bit node and the voltage at the next higher bit node. The bit node voltage is roughly 1/3 of the reference voltage and the next higher bit node voltage is roughly half or 1/6 of the reference voltage. By auto zeroing the op-amp at 1/6 of the voltage, any non-linearities in the op-amps common mode rejection will be reduced.A probability based technique is required to use a PWM in a successive approximation analog to digital converter.When determining the most significant bit, the output of the PWM needs to be known to more than 1 bit of uncertainty, but not much more. The most significant bit determines only whether the input voltage is above or below 1/2 the reference. It's a single bit measurement so how much higher or lower the input voltage is compared to half the reference is unimportant. By using a series of rough estimates at where the input is and using exponentially longer filter settling times as the voltage change between the estimates is reduced it's possible to null down to the microvolt range or lower. There is a significant cost to achieving this type of resolution and that is time. For 20 bit resolution five minutes or more may be required to reach the microvolt range. The ladder network is much faster, but to get similar precision, extremely expensive resistors have to be used. There's a time versus money tradeoff.Implementing a 20 bit PWM is done by using a 16 bit hardware PWM and software. The PWM interval is broken up into blocks defined by the 16 bit PWM. A block is either all on, all off, or has a transition in somewhere during its period. The transition will either be in the first half of the block or the second half. The number of PWM blocks and the transition position can be determined in advance for a give input code. The software then monitors the hardware PWM, counts the blocks and then if the transition happens in the first half of the next block, it sets the PWM output compare register to the required duty cycle value when the PWM counter is close to the end in the current block. Because the current block PWM count exceeds the next block output compare value, its duty cycle is unaffected and the output compare affects only the next block.If the transition occurs in the second half of the PWM block, the software waits until the start of the next PWM and then sets the output compare register value for the required duty cycle. Because the output compare value will be larger than the current count, it will have no effect until after halfway through count.Software controlled PWM transitions cannot be done close to the start or end of a PWM block because of software overhead. This is a minor problem and only affects the overall PWM output range in that output voltages very close to zero or 100% duty cycle can't be output. For an auto zero application where the common mode voltage is 1/6 of the reference voltage this is not a problem.This technique gives hardware precision to the PWM output while making it possible to have arbitrarily high resolution with minimal software. The limiting factor is the PWM filter and the exponentially increasing settling times. This is why I prefer to use the ladder network.Because a high stability voltage reference is required, the Nano cannot be used to directly drive the PWMs. Instead, the output of the Nano is used to drive paralleled CMOS hex inverters with the chip Vcc connected to the voltage reference. The same thing is done with port expanders used to drive the ladder network. Grounding is critical and the hex inverter and port expanders ground pins will go to analog ground and be routed back to the Nano ground in such a way that the ground currents don't disturb the ladder network ground. My prototype board is four layer just so there can be dedicated analog and digital ground planes along with using single point reference connections between planes and even on the planes.

author: azeeman
author_rank: Regular Contributor
timestamp: August 05, 2025, 04:48:05 pm
content: I've modified the Python script to calculate the average and standard deviation of the ladder network output and got some surprising results. With the resistor values randomly set within a range of 1% to -1%, six standard deviations around the mean was less than 1%. I believe this is because an error in one stage is balanced out by opposing errors in other stages.I've also added bit weighting calculations which can be used in a lookup table for linearizing input code to output voltage.The previous script tolerance had a minor bug where the tolerance was -0.5% to 0.5%, this has been corrected to -1% to 1%. The resistor values have also been changed to 576k and 1M to ensure monotonicity with the wider tolerance.Based on the above results, calibration may not be needed if high precision is not required. It might be sufficient to use 0.1% SMD type resistors which are quite cheap and readily available. A 32 entry lookup table using 32 bit resolution requires 128 bytes of memory. Both measurement and linearization can then be done within an Arduino Nano. Add a display and battery and it becomes simple to create a fully isolated null meter.A virtual ground is required for a bipolar input. This can be provided by using a single bit PWM to generate half the reference voltage and buffer the PWM output with the unused op-amp. The input voltage source ground would connect to the virtual ground and the ladder network would be used to measure the virtual ground and the other side of the input voltage source. The difference is the null voltage.Even with the input range cut in half because of the virtual ground, there is still more than sufficient resolution for a very sensitive null meter.Input overvoltage protection needs to be added, but there are well established ways of doing this.

author: iskel
author_rank: Newbie
timestamp: August 09, 2025, 08:11:01 am
content: QuoteTheoretically it is, in practice we have some technological limitations. These days with the help of AI I created a table for selecting resistors in a classic R-2R resistor ladder. I hope it helps someonehttps://stm32dds.tk/data/files/dac_resistor_matching_form.html

author: azeeman
author_rank: Regular Contributor
timestamp: August 09, 2025, 10:38:56 am
content: Does the code take monotonicity into consideration? It definitely makes sense to use higher precision resistors in the most significant bits and lower precision elsewhere, but monotonicity is also important. When used in a feedback type situation such as a successive approximation analog to digital converter, it's very important that increasing input codes always result in increasing output voltages. If the ratio deviates from the ideal 1:2, the output can decrease when the input code changes from a pattern like 011111 to 100000. By changing the ratio from the ideal 1:2 to 1.x:2, monotonicity can be ensured for any given component tolerance provided x is small enough.This is critical when the ladder is used for common mode rejection applications where two large voltages with a very small difference voltage are being compared. The linearity of a 1:2 ratio is not as important as being able to guarantee that one voltage is a tiny fraction of the overall voltage higher or lower than the other.

author: iskel
author_rank: Newbie
timestamp: August 09, 2025, 12:03:36 pm
content: I see things like this:R ↔ 2.01R = R ↔ (2R +0.01R)R ↔ 2.01R = R ↔ 2R +0.01R and this 0.01R is a manufacturing tolerance at higher resolutions, i.e. the trick with a more accurate DAC with less accurate resistors will stop working after increasing the resolution by 2-3 bitsAnd this is how the AI sees things:### Explanation:* For the R–2.01R ladder, the weights are slightly shifted due to the small increase in resistance (2.01 instead of 2).* This causes the accuracy requirements to be a bit stricter mainly for the most significant bits, while for the less significant bits the effect is almost negligible.* The accuracies are calculated as ± percentages relative to the nominal resistor value R, to ensure the output error does not exceed ±½ LSB.---### Table: Required Resistor Tolerances (±%) for a 16-bit DAC| Bit # | Weight $w_i$ | Required Accuracy R–2R (%) | Required Accuracy R–2.01R (%) || -------- | --------------- | -------------------------- | ----------------------------- || 15 (M) | 0.000015259 | ±0.000763 | ±0.00075 || 14 | 0.000030518 | ±0.001526 | ±0.00152 || 13 | 0.000061035 | ±0.003052 | ±0.00305 || 12 | 0.000122070 | ±0.006104 | ±0.00610 || 11 | 0.000244141 | ±0.012207 | ±0.01220 || 10 | 0.000488281 | ±0.024414 | ±0.02438 || 9 | 0.000976563 | ±0.048828 | ±0.04860 || 8 | 0.001953125 | ±0.097656 | ±0.09740 || 7 | 0.003906250 | ±0.195312 | ±0.19490 || 6 | 0.007812500 | ±0.390625 | ±0.39000 || 5 | 0.015625000 | ±0.781250 | ±0.78000 || 4 | 0.031250000 | ±1.562500 | ±1.56000 || 3 | 0.062500000 | ±3.125000 | ±3.12000 || 2 | 0.125000000 | ±6.250000 | ±6.24000 || 1 | 0.250000000 | ±12.500000 | ±12.48000 || 0 (L) | 0.500000000 | ±25.000000 | ±24.96000 |

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 09, 2025, 12:05:23 pm
content: Quote from: azeeman on August 09, 2025, 10:38:56 amApparently you did not understand the concept. (Same for Iskel).Edit:Huh, I'm confused. azeeman is OP here.I'll explain it briefly, but with some other wordings.If you start with a regular R-2R network, there will be little gaps and overlaps due to resistor tolerances. This is the main handicap of an R-2R network.Now to "fix" this, you make each "more significant bit" a little bit less then the sum of all the previous bits. This ensures that there is always an overlap when a bunch of least significant bits overflow into the next MSB. But on itself, this does not work, as the output voltage will take a step in the wrong direction, because that last MSB was too small.And now the crucial part:You calibrate the thing in software, and then you skip a few counts in the DAC output at the right time, so when the least significant bits overflow, monotonicity is maintained during the overflow.So instead of: ... 13, 14, 15, 16You output: ... 13, 14, 16.In this case you would have skipped "15" because that would have resulted in a value that generates a bigger analog output then "16".This also makes the DAC (mostly) independent of resistor tolerances. The tolerances are calibrated out by measuring the weights of all the bits after manufacturing.

author: azeeman
author_rank: Regular Contributor
timestamp: August 09, 2025, 03:18:41 pm
content: Good explanation as that was my thinking when I originally stumbled upon this discovery. I had written a Python script to determine stage by stage what resistor values should be to guarantee monotonicity over the resistance tolerance range. I originally did this for combining low bit width PWMs to create a single effective high bit PWM where each PWM output was weighted using short ladders to get the required attenuation without requiring huge resistor ratios. The script also found the closest standard value for each resistor and then tested the chosen resistor value to verify monotonicity.It was easy to extend this to a 32 stage ladder only to find that the resistor values were very close to each other and it was more economical to just use the same values provided the 1.x:2 ratio was maintained. The Python script was then useless other than the loop equation solving and resistor selection parts.The resistor selection code was borrowed from another project which was used for creating precision trimmer circuits using commercially available 1% resistors and standard potentiometers. I've attached the program and documentation for that in case anyone finds it useful. It was originally developed for testing industrial motor controls where precision thermistor resistances values were required.Incidentally, I've found a way to eliminate ADC as part of the null detector. Instead, the output of the op-amp will go into a comparator with 1mV of hysteresis. If the op-amp gain is 100 dB, then the sensitivity will be 1 mV / 100 dB = 10 nV. The detector will be much faster and a microcontroller without an ADC can be used which will reduce cost. As long as the microcontroller has an SPI interface, at least one PWM and one digital input, a high resolution ADC can be created.The PWM will be one bit and is use to bias the comparator input to 1/2 the reference voltage. The PWM is used for two reasons. First, it is very precise and more importantly, it is very low noise. The PWM is a sampling device so any voltage reference noise will be shifted up in frequency by the PWM frequency and then filtered by the PWM filter. This gives a very low noise output voltage. The only significant noise will come from noise frequencies close to the PWM frequency. With the PWM running a 8 MHz, there's not a lot of noise energy at that frequency.This is still very much a work in progress and the circuit hasn't been tested, but I'm fairly certain it will work.

author: azeeman
author_rank: Regular Contributor
timestamp: August 09, 2025, 04:39:20 pm
content: The 5V and 5VA are mixed up in some places on the schematic, a corrected version is attached. Note that the port expanders are treated as analog switches which are connected to the reference voltage source and their power and ground connections must be treated as such. This gives some degree of isolation between the noisy 5V from the Nano and the quieter 5 Volt reference. The digital inputs can tolerate relatively high amounts of noise and ground voltage differences so any disparity between the digital 5V supply and the analog 5V reference shouldn't cause problems.It's the same with the Schmitt input inverter and comparator. They are acting as isolators between the noisy digital PWM output from the Nano and the quieter 5 Volt reference. The comparator is powered by the reference 5V, but the output pullup resistor is powered from the digital 5V because the output current is relatively high. The comparator ground current will also be very high and must have its own path back to the single point ground.The ground returns from these chips must be independent and ground at a single point to prevent any digitally derived currents from contaminating the analog grounds for the other analog circuits.I intend to have independent ground planes for the port expanders and their associated ladder resistors as well as other parts of the circuit. These ground planes will only connect together at one point using substantial trace widths to prevent excessive ground voltage differences.The same techniques will apply to the reference voltage distribution. There will be individual power planes connecting back to a single source.

author: azeeman
author_rank: Regular Contributor
timestamp: August 10, 2025, 04:01:41 pm
content: I've attached a PDF outlining the probability based feedback strategy and the supporting mathematics. Because of the high resolution a mix of exponential and linear search techniques are required to keep null convergence time low. Further research is required to optimize the null speed and response time with regard to noise.I'm working on an new circuit board using surface mount parts. This allows the use of much higher precision and cheaper parts with a reduced overall board size. The only problem is that I've never used SMD parts and there will be a learning curve.

author: azeeman
author_rank: Regular Contributor
timestamp: August 10, 2025, 09:01:49 pm
content: I increased the number of samples in one period and found that the difference in probability between the worst case of equal ones and zeros and the best case of all ones or zeros became smaller and smaller. I also used the technique on the board and the results were very poor. For example, for eight samples the ratio is 99.61% to 72.66% while the ratio for 64 samples is 100% to 90% which is far worse even though more samples are being taken.The next step is to look for special patterns like the length of contiguous strings of ones and zeros. There are far fewer of these patterns and their presence should be a better indicator of measurement certainty.I've attached the spreadsheet showing the calculations used in creating the previous PDF.

author: azeeman
author_rank: Regular Contributor
timestamp: August 14, 2025, 02:54:23 am
content: I did some testing using a measurement certainty condition where 10 contiguous similar null detector outputs are considered high certainty to see where the noise threshold is on my prototype board. A binary search was used to null against one side of a load cell. The binary search continued until the measurement certainty condition failed and then the search stopped. I found that the feedback could be set with about 12 bits of repeatability. This is still very experimental, but it does demonstrate a way of determining the quality of a probabilistic type feedback system. This also greatly reduces the time to null an input because a binary search works in exponential time to get the null relatively close to the final value. A much slower and much more noise tolerant linear nulling algorithm could then be used to get higher null resolution.The certainty measurement is useless for determining the true quality of the null because it is affected by things like the op-amp output settling time, the null detector output sampling time and the system noise characteristics. It's main use is in getting the null close the the noise threshold in the shortest time possible and then change to a linear search algorithm which can be much more noise tolerant at the expense of time.Because the op-amp null detector has a very low bandwidth, there must be sufficient settling time after the feedback voltage is set for the op-amp output to be unambiguously high or low. If the op-amp output is still ramping high or low, the first few samples will be one polarity and then the next different. This will cause the certainty test to fail even though the null difference voltage is relatively high.Ideally, the output settling time will be as low as possible for the highest nulling speed while still allowing an exponential search to reach the highest resolution before hitting the noise threshold.I've attached a PDF showing how to estimate op-amp settling times by treating the op-amp as a charging capacitor.

author: azeeman
author_rank: Regular Contributor
timestamp: August 14, 2025, 07:14:16 pm
content: I now have a working algorithm which will rapidly null down into the nanovolt range.* Nulling is done by sampling the the null detector output and comparing the first output to subsequent outputs.* The number of contiguous similar outputs is counted and used as a measure of certainty.* If an output differs from the previous output, sampling is stopped.* Up to 10 samples will be taken if all outputs are the same.* A state machine is used to track the null feedback direction.* If the feedback has been low, the machine will be in state 0.* If the feedback has been high, the machine will be in state 1.* While in state 0, if the null detector shows that the feedback is low with high certainty, the feedback step* size will be doubled and added to the feedback setting.* While in state 0, if the null detector shows that the feedback is low with low certainty, the feedback step* size will be set to 1 before being added to the feedback setting.* While in state 0, if the null detector shows that the feedback is high with high certainty, the feedback step* size will be divided by 4 before being subtracted from the feedback setting. The state will be changed to 1.* While in state 0, if the null detector shows that the feedback is high with low certainty, the feedback step* size will be set to 1 before being subtracted from the feedback setting. The state will be changed to 1.* While in state 1, if the null detector shows that the feedback is high with high certainty, the feedback step* size will be doubled and subtracted from the feedback setting.* While in state 1, if the null detector shows that the feedback is high with low certainty, the feedback step* size will be set to 1 before being subtracted from the feedback setting.* While in state 0, if the null detector shows that the feedback is low with high certainty, the feedback step* size will be divided by 4 before being added from the feedback setting. The state will be changed to 0.* While in state 0, if the null detector shows that the feedback is low with low certainty, the feedback step* size will be set to 1 before being added to the feedback setting. The state will be changed to 0.* After every setting change, there will be a delay to allow the null detector op-amp output to settle.* AMU setting is calculated as a signed long integer so overflow and underflow can be determined.* Maximum calculated AMU setting will be 0x7FFFFFFF and maximum step size will also be 0x7FFFFFFF or less.* This guarantees that when the maximum calculated AMU setting is added to the maximum step size, the sum will be* 0xFFFFFFFE which is a negative 32 bit number. This makes it possible to detect calculation overflow and underflow.* The setting value is doubled before being sent to the AMU as an unsigned long integer.* Unions are used to hold the various parameters to make it easy to send them in messages to a host computer for* display and debugging purposes.I've attached the Arduino code, but I'm not sure how useful it is other than to demonstrate the algorithm. I've put all the Python code and current documentation, KiCad files, etc. on SourceForge athttps://sourceforge.net/projects/ardweighno/files/This is still very much a work in progress and the latest circuit board hasn't been built yet, but based on the results I've seen so far, I'm fairly confident it should work.Here's a sample of the readings showing the feedback voltage going from nanovolts to the final null voltage. The final null voltage should be 2.5 V, but my prototype board doesn't have all the correct resistor values so the computed values are slightly different than the true value. The leftmost number is the voltage and the rightmost number is a timestamp.Currently, only one side of the load cell is being measured as I want to prove out the algorithm first before multiplexing the null detector to both sides of the load cell.I believe that this type of exponential search and tracking technique may be useful for other applications. In a measurement application the track and hold circuit can be eliminated as well as the instrumentation amplifier.It should also be possible to integrate the ladder network on an IC because it needs only 64 resistors of only two values. Also, the resistor values are not critical, only the ratio which is easier to maintain than absolute values.AMU setting 1.5840340666153915e-09 0.02528966002864763AMU setting 1.5840340666153915e-09 1.5473463099915534AMU setting 4.749967492530636e-09 1.7405905720079318AMU setting 1.107760105727744e-08 1.9245518970419653AMU setting 2.3724423909664456e-08 2.1008907990180887AMU setting 4.90012006530328e-08 2.2845477050286718AMU setting 9.952104288232325e-08 2.4596897370065562AMU setting 2.0049335186995178e-07 2.6397429640055634AMU setting 4.0230330980074507e-07 2.8220014980179258AMU setting 8.056540856821688e-07 3.006160960998386AMU setting 1.6118177166790535e-06 3.187886484025512AMU setting 3.2230698546588458e-06 3.3744325740262866AMU setting 6.443425316473462e-06 3.55744510499062AMU setting 1.2879841477568394e-05 3.735987516003661AMU setting 2.574409000233001e-05 3.9232800920144655AMU setting 5.145543090461435e-05 4.102175247040577AMU setting 0.00010284382329466132 4.284130190033466AMU setting 0.00020555207497510432 4.462824815011118AMU setting 0.00041083160353448444 4.652075936028268AMU setting 0.0008211168937239323 4.8295457159983926AMU setting 0.0016411403053479823 5.008140783989802AMU setting 0.003280093520807035 5.192641217028722AMU setting 0.006555814194615159 5.373002895037644AMU setting 0.013102886943002608 5.559549597033765AMU setting 0.026188301067414717 5.734788555011619AMU setting 0.052341678215933135 5.928977854026016AMU setting 0.10461355358566854 6.098806505033281AMU setting 0.20908759298611893 6.289759160019457AMU setting 0.417896342078109 6.471199963008985AMU setting 0.8352353666585419 6.646923494990915AMU setting 1.6693568399930536 6.832758016011212AMU setting 3.336487375691531 7.01213688601274AMU setting 3.323401963151153 7.239799529023003AMU setting 3.2972311147680786 7.468354851996992AMU setting 3.2449592457259766 7.703701091988478AMU setting 3.140485218972349 7.923612457991112AMU setting 2.9316764951571357 8.1471567240078AMU setting 2.514337521096545 8.37149811803829AMU setting 2.6188115478501723 8.562186413037125AMU setting 2.6180079053569383 8.789161683002021AMU setting 2.6163689552947353 9.011445942043792AMU setting 2.6130932409485608 9.243439460988156AMU setting 2.6065461807290404 9.473941300995648AMU setting 2.593582833248033 9.691146449011285AMU setting 2.567429506619357 9.922070486005396AMU setting 2.57397656673779 10.10468629800016AMU setting 2.5739262063730193 10.336487680033315AMU setting 2.5738235012872726 10.558701219037175AMU setting 2.5736182280610334 10.78599966201AMU setting 2.573207955417667 11.010268353042193AMU setting 2.5723956050112005 11.244184262992349AMU setting 2.5707567023155837 11.449639397033025AMU setting 2.5711669749589503 11.628298180992715AMU setting 2.57198587951972 11.814466956013348AMU setting 2.5719795047105842 12.01167673501186AMU setting 2.571981114385056 12.20922810502816AMU setting 2.5719843315745843 12.41502518299967AMU setting 2.571990701659066 12.60825723799644AMU setting 2.572003553260768 12.817552792024799AMU setting 2.5720292395606403 13.00432250101585AMU setting 2.5720805089000884 13.21346961898962AMU setting 2.5720801087442564 13.410990494012367AMU setting 2.5720793057338813 13.625206199008971AMU setting 2.5720777029581914 13.817557986010797AMU setting 2.572074508077532 14.019632974988781AMU setting 2.5720753110794625 14.223546613007784AMU setting 2.5720769010356177 14.425572252017446AMU setting 2.5720801087442564 14.620633656042628AMU setting 2.5720865198836407 14.830063300032634AMU setting 2.572099282234137 15.030591536022257AMU setting 2.5720991832496622 15.235974493029062AMU setting 2.57209898459296 15.437046600040048AMU setting 2.5720985881077385 15.639776752039324AMU setting 2.5720985865237047 15.835953669040464AMU setting 2.5720985881077385 16.037182331026997AMU setting 2.5720985912736722 16.23837148002349AMU setting 2.5720985975759922 16.44316034304211AMU setting 2.5720986102228154 16.644871002994478AMU setting 2.572098608638781 16.850925159000326AMU setting 2.572098605472848 17.050662219000515AMU setting 2.5720985991536587 17.257125100004487AMU setting 2.5720986007376925 17.447979886026587AMU setting 2.572098603903626 17.661626624001656AMU setting 2.5720986102228154 17.8650257299887AMU setting 2.5720986118004814 18.064969448023476AMU setting 2.5720986102228154 18.263851828000043AMU setting 2.5720986070568816 18.475691049010493AMU setting 2.5720986007376925 18.66541372501524AMU setting 2.5720985991536587 18.86694035801338AMU setting 2.5720986007376925 19.068835703015793AMU setting 2.572098603903626 19.274946672027AMU setting 2.5720986102228154 19.476631325029302AMU setting 2.572098608638781 19.683942528034095AMU setting 2.572098605472848 19.878240520018153

author: azeeman
author_rank: Regular Contributor
timestamp: August 15, 2025, 01:21:50 am
content: Although the modified 1R-2R ladder is great in a null feedback circuit, a PWM is also very useful for lower resolution applications. Because a PWM has extremely low offset, it's perfect for use in measuring low level voltages close to ground level. An example is measuring low side current using small shunt resistance such as a circuit board track. Normally, an instrumentation amplifier would be used with an ADC, but a much simpler circuit uses a standard op-amp like an MCP6002 with one input connected to the shunt, the other input to a PWM and the output to a digital input.The problem with an op-amp like the MCP6002 is its input offset which at up to 4.5 mV can be comparable to the signal being measured. Although the offset may be high, it is relatively stable and if the required resolution is not that high, there is a simple way to compensate for it and still measure voltages close to ground. I've attached a circuit to demonstrate this.By deliberately adding a positive offset greater than the maximum op-amp input offset, it becomes possible to measure input voltages down to the zero. The output of the PWM is also scaled down so that it's full output range matches the expected voltage across the shunt as well the added offset. In the attached circuit, the PWM output is roughly 0 to 113.63 mV. The current being measured will range from 0 to 2A. The shunt resistance is 50 Ohms giving a maximum voltage of 100 mV across the shunt. R2 and R3 are substantially larger than the shunt resistance and the added current through the shunt resistance is negligible. The voltage drop across R3 is 5 mV which guarantees that input of U1A will always be in the linear zone regardless of the input offset value.The output of U1A goes to a digital input so U1A acts as a single bit null detector. In the original use for this circuit, a 16 bit PWM was used for feedback and a simple linear null search was used. The current being measured was very stable so the slow response times of both the PWM and null algorithm were not a problem.If a lower resolution PWM such as 10 bits was used, the PWM speed would be 2^6 or 64 times faster and an exponential type search would be much more suitable. If only current measurement is required a successive approximation algorithm could be used.In the original application, the current was used in a feedback loop which controlled the load supply voltage to give a constant current. The power supply was three phase AC fed through triacs, a diode bridge and filter capacitor. A second 16 bit PWM was used to as setpoint voltage generator. A comparator then turned triacs on and off when the power supply voltage was low or high.No PID was required because the whole circuit worked exactly like a sigma-delta converter. The slow PWMs and filter capacitor replaced the digital filter in a conventional sigma-delta converter and the current was regulated extremely precisely.Because the current was always the same, a single point calibration is all that was required. The op-amp input offset is quite stable and for lower resolution applications, only one calibration should be required. The op-amp can also be replaced with a lower input offset type eliminating the need for calibration because all the other resistors can be 0.1% tolerance or higher and the various ratios and offset accurately determined in advance. A two point calibration can also be done to correct for offset and gain errors.For higher speed applications a linear search is not suitable and for high resolution, a single PWM is too slow. Multiple low bit PWMs combined resistively can also be used.What I don't like is sigma-delta converters. I've studied these extensively and found that they are triumphs of marketing over engineering and are barely fit for purpose. I used an HX711 chip for a weigh scale application and did a lot of measurements on it to see if it was suitable for null detection. Although touted as a 24 bit converter, the true resolution is much less and it requires extensive averaging to get even 10 bits of resolution. This is true for all sigma-delta converters. Also, sigma-delta converters are inherently non-linear with no practical way to correct for non-linearity. The input resistance of the HX711 is also relatively low and it has a very limited common mode range.That a sigma-delta converter is non-linear is very easy to prove. There are multiple ways to generate a particular duty cycle such as 50%. If there is only one transition, then the duty cycle will be very precise. If there are multiple transitions, the rise and fall times of each transition cause duty cycle errors and the more transitions there are, the greater the error. The only way to correct for this non-linearity is by measuring at all input codes and then setting up a correction table for all input codes.The ladder network is also highly non-linear, but the non-linearity is completely predictable and also easy to calibrate by measuring node voltages. A lookup table is also required, but only one table entry per bit is required. The ladder network is also orders of magnitude faster than sigma-delta simply because it can use a linear search technique like sigma-delta or it can use an exponential search. This becomes painfully obvious when very high resolution is required. If a 24 bit sigma-delta converter could actually put out a 1/2^24 voltage, it has to either output 1 pulse in 2^24 which requires a very long time. Or it puts out a whole lot of noise with a DC level of 1/2^24 which requires a tremendous amount of filtering to bring the noise level down to the 1/2^24 level. I've tested this using my computer's sound card for doing low level measurements. The sound card is great for low level signal measurements down to the 100s of uV and is very useful for lock in amplifier applications because of near perfect phase synchronization between the left and right input channels. The phase error is down in picosecond territory. The only problem is that the resolution is less than 14 bits and definitely not 24 bits as advertised.The sigma-delta feedback digital to analog converter is usually only one bit or maybe four bits which limits how fast the its output can change. The very high sample rate ameliorates this, but the rate of change of the integrated output is still limited because a change from 0 to 2^24 requires 2^24 or 16.8 million clock pulses. The ladder network requires 32 clocks to output a full range voltage.Because the sigma-delta DAC output is so low, an exponential search technique is useless. The ladder network can go from zero to maximum in 32 clocks and using an exponential search blows everything else out of the water.The exponential search technique I described earlier has a number of tuning knobs which are not that intuitive. The most important is the op-amp output settling time and to some extent, the ladder network output settling time. The op-amp will generally be the slowest part of the system and its very important that its output be at a known value, especially when the null difference voltage is very low and close to the noise threshold and the op-amp output is barely above or below center.The same applies if a PWM is used as the feedback source. After the PWM output is changed, there has to be sufficient settling time to guarantee the PWM's output voltage is within the required tolerance.For simple modelling of a PWM, treat it as an ideal variable voltage source charging the RC filter network. The filter network time constant is determined by the PWM fundamental frequency and as such is fixed. But the charge and discharge times can be calculated the same as for a simple resistor capacitor circuit connected to a variable voltage source.Another knob is the reduction of the step size when the output of the null detector changes state. The step size must be reduced to less than the previous step size otherwise the feedback voltage will oscillate between two levels. In the algorithm, if the uncertainty is low, the step size is reduced by 256 times. I started by reducing it by half, but there was severe oscillation. I tried reduction by four and the oscillation was reduced but still far too high. I then went nuts and set it 256 which worked very well. More tuning is probably in order, although the current speed is pretty good.If adjusted right, low uncertainty measurements only occur when the null difference voltage is in the uV range and a step size of one will still give reasonable nulling speed. Also, the low feedback rate of change acts as an integrator with large time constant which greatly filters out noise. This is why the feedback can track down to the nanovolts even though the electrical environment is extremely noisy. Noise power is inversely proportional to bandwidth. The lower the bandwidth, the lower the noise. Another important thing to note is that the noise referred to is at the input of the op-amp. At the nanovolt level I'm certain there are far greater noise and error sources elsewhere on the board, but these need to be dealt with using other techniques.The number of samples required to determine measurement certainty is another knob to tune. Because the probability of a contiguous output sequence drops in half with every bit increase, the tuning knob is very sensitive. If too many samples are required, the certainty required becomes so high that the search degenerates into a linear search and becomes very slow. If set too low, the feedback will become very noisy because it will be jumping up and down exponentially with noise.The sample rate is also important and adds a frequency sensitive component. This will become much more noticeable when the ADC currently being used is replaced by a comparator. A digital input is much faster than the ADC and taking ten samples requires much less time. This means that the detector will become much more sensitive to low frequency noise because the noise amplitude can be high over a short sampling period unless the number of samples is increased or delays are introduced between samples. The latter is probably the best solution.Because of the slow op-amp, the feedback will have a phase delay and if there are other delays in the feedback chain, oscillation is possible. With the current regulator circuit above, I found that the triac bridge filter, op-amp detector frequency response and slow PWM response caused oscillation when an exponential null search was used. A linear null search was used with the PWM output update rate deliberately slowed down so that the PWM response became a dominant pole which stabilized the system. This option may not always be possible, but the feedback is fully programmable so more sophisticate digital filtering can be implemented if desired. This is easy with a linear search, but the mathematics when an exponential search is used might get a little hairy.There's one more major advantage to using a PWM with a one bit null detector, isolation. Because both are single bit, it's very easy to optically isolate them for applications such as high side current monitoring. I've found that optical components used for consumer audio are quite fast and cheap and can be used for isolation over long distances or high voltages, or high speed photocouplers for short distances.Feel free to use all of the above ideas as I make no claims as to their use. I've learned so much and found so many useful tools given freely that whatever I give back will never repay the debt.

author: azeeman
author_rank: Regular Contributor
timestamp: August 16, 2025, 12:02:52 pm
content: DC null detection is far superior to AC null detection which is why it is used in all high precision voltmeters. A typical chopper amplifier uses AC detection because the signal chain uses an AC amplifier with AC to DC conversion. A DC null detector uses an op-amp as a comparator with only high or low as an output with digitally controlled feedback.Multi-slope integration has a DC signal chain and uses DC null detection. Multi-slope also takes advantage of the noise threshold, which is only present in DC null detectors, for its exponential search.DC null detection is so much better than AC detection because only two possible choices are sent back the null detector. The feedback is either high or low. In AC null detection, a vast amount of signal energy is sent back and various techniques such as synchronous sampling, low pass filtering and so on are required to extract a usable signal from the noise. It's very difficult to reliably determine whether the null feedback is too high or too low and there is no well defined noise threshold making it difficult to implement an exponential search.The only advantage that AC detection offers is that it sends back information about how much too high or how much too low the feedback is. This makes it easy to create an analog feedback system.With DC null detection, only one bit of information is available which can only transfer a tiny amount of energy, noise or otherwise and digital techniques are required to set the feedback level.In the earlier dual slope detectors a linear search technique was used where the time to charge and discharge an integrator was measured. This works well but is inherently slow and doesn't take advantage of the noise threshold.HP came up with multi-slope detection where the integration constant was changed by using different resistor values for charging and discharging the integrator. Below the noise threshold, very high charging currents can be used in an exponential search technique to quickly get close to null and the noise threshold and then switch to a linear search technique using using a much higher integrator time constant to reduce the loop bandwidth and increase noise tolerance.The noise threshold is typically in the microvolt region so for low resolution measurements very high speeds are possible. For higher resolution, the null voltage difference will be below the noise threshold and a much slower linear search is required.HP's technique is a mix of DC or digital null detection with analog feedback. Now replace analog feedback with digital feedback and a purely digital system is possible. As much as I like the modified R-2R ladder network as a feedback element, I don't think it is the best solution because it requires too many resistors and too many calibration points. HP used only a small number of high precision resistors increasing exponentially in value in their meter which reduced the calibration burden. Also, self calibration is possible by measuring the resistor ratios against each other.For a purely digital solution, the multiple resistors can be replaced by multiple PWMs with integration done in software. Software defined integration is superior to analog integration because the integration time constant can be any value giving an extremely low bandwidth. Because the null detector chain is DC, the bandwidth can be reduced as close to zero as desired reducing noise sensitivity to arbitrarily low values.For low precision applications such as an 8 bit ADC, a single PWM can be used for feedback because the filter time constant can be very low and the settling time also very low. For higher resolution the filter time constant and settling time double for every added bit of resolution and quickly become impractical. Regardless, for a lot of applications 8 bits is sufficient and easily implemented in microcontrollers without an ADC. If the PWM clock frequency is 16 MHz, the filter time constant is 415 us and the settling time about 5.6 time constants or 2.3 ms. An exponential search such as successive approximation can be used giving a conversion time of roughly 2.3 ms * 8 = 18.4 ms.The best all digital solution is to combine multiple low bit PWMs using a precision resistor network and common filter. Although two eight bit PWMs can be combined to create one 16 bit PWM, the PWM filter bandwidth has to attenuate the PWM ripple down to 1/2^16 which requires a time constant of 106 ms and a settling time of 11 time constants for a total time of 1.2 s which is not that practical.Instead, a two bit PWM can be combined with a four bit PWM, a six bit PWM and an eight bit PWM giving 20 bits of resolution.The PWM filter time constant is determined mainly by the two bit PWM because it produces the most ripple noise. The four bit PWM is used to interpolate one step of the two bit PWM and its output has to be attenuated by 1/4. This also attenuates its ripple noise such that the filter used for the two bit PWM is sufficient. The same applies to the other PWMs as long as they differ by two bits.The ripple noise power from each PWM will sum in the output filter so the filter time constant will need to be increased to compensate for this.Although 20 bit resolution is possible with the above scheme, it will be difficult to realize in practice because of the difficulty in calibrating the resistor ratios to that level of precision. The main advantage of the higher resolution is that it allows for smaller integration steps. A DC null detector is sensitive down to the nanovolt range and if the feedback can also be applied with nanovolt resolution, very high resolution measurements are possible. The precision will not be anywhere near the resolution, but in an application like a null meter where the intent is to minimize a voltage difference, this is not a problem.Another possibility is to use a conventional DAC as the feedback source. Instead of using an instrumentation amplifier to amplify a small signal to a high level and then use an ADC to digitize the signal, the DAC output can be divided down using a resistance voltage divider feeding into a DC null detector with digital feedback loop to set the DAC. The voltage divider has to have a precise resistor ratio, but so does an instrumentation amplifier. This technique is best used where the common mode voltage is very low such as in low side current measurement.When the common mode voltage is high, the modified R-2R ladder network combined with a conventional DAC can be used. The DAC would be set to midpoint and then the ladder output nulled against the common mode voltage such as one side of a load cell. The DAC output will be attenuated and resistively combined with the R-2R ladder network output so that it's output range covers only the normal mode voltage. The normal mode voltage can then be measured using only the DAC.Only the last few resistors of the ladder network and the resistors used to attenuate the DAC output need to be precisely known for high precision measurement.Regardless of how the feedback is applied, the null detector must be DC for best performance.

author: azeeman
author_rank: Regular Contributor
timestamp: August 17, 2025, 02:47:16 am
content: I've done more testing on my prototype board and the results are amazing but expected. The null feedback circuit consists of a ladder network combined with a 12 bit SPI controlled DAC. The DAC output is scaled and is superimposed on the output of the ladder network so that it adds 0 to 15.5 mV to the output.I prefer to call the ladder network an analog memory unit or AMU. The primary intent of the ladder network is not to measure a voltage, but to hold a common mode voltage value with very high resolution and indefinite hold time. Once the AMU is nulled on one side of the load cell, it holds both the load cell common mode voltage and the op-amp input offset voltage.The null detector input is then switched to the other side of the load cell and then the SPI DAC is used to null that side. Because the DAC output voltage is superimposed on the AMU voltage, only the normal mode voltage needs to be nulled. The measurement precision is now independent of the AMU as long as the AMU output doesn't change and the op-amp input offset doesn't change.To minimize this possibility, a full null is not done on one side and then the other. Instead, a state machine is used with each side independently saving its state so that the nullling of both sides is effectively done in parallel. This keeps the amount of time down between nulling steps and reduces the opportunity for drift. But because of the changing input voltage to the op-amp input, there has to be significant settling time after an input change.The same null algorithm is used for both the AMU and DAC with the setting calculated to 31 bits. Because the DAC is only 12 bits, the setting value is shifted right 19 times, (31-12 = 19). This is done so that the rate of change of the null feedback is the same for both the AMU and the DAC. This is important because this determines the integration time constant and I want to keep it the same for the AMU and DAC. This is probably overkill and may be causing problems, but this is still very much a research project and a lot of tuning remains to be done.The AMU is constructed with 1% resistors and I also made a mistake and used the wrong value resistors in the ladder network. The ratio should be 1.xR:2R such as 562k to 1M, instead it is 499k to 1M or 0.xR:R. This inherently non-monotonic so that two different input codes will give the same output voltage. Regardless, the AMU still nulls very well but is useless for measurement purposes.The AMU will null down to the 100 nV range. This may seem to defy physics, but this is not a measurement of the true null voltage, it is the AMU feedback setting. The full scale output of the AMU is roughly 2/3 * 5V = 3.33 V. The resolution is 32 bits so one step is 3.33V / 2^32 = 776 pV. The AMU output is changed roughly every 100 ms so the output rate of change is 776 pV/100 ms = 7.76 nV/s.This acts like an integrator with a time constant of 1/7.76 nv/s which is 128.85 gigaseconds or roughly four years. The AMU output resistance is 1 MOhm, so there will be significant thermal noise, the op-amp itself is relatively noisy, but because of the huge integrator time constant, the noise has little effect.The surprising thing is not how low the noise is, but how high it is. The only reason that the AMU output can change at all is because the integration time constant can change exponentially depending on measurement certainty. The maximum rate of change is 3.33 V in 100 ms or 333 mV/s which gives an integration time constant of 3 seconds. This is nowhere near enough to filter down to the nV level, but if the null voltage difference is high enough, no filtering is required at all.Assume the input noise at the op-amp input is 100 uV peak while the null voltage difference is 10 mV. It doesn't matter whether the null voltage is 10.1 mV or 9.99 mV because of noise, the output of the op-amp is going to be pegged to one of the power supply rails and the noise has absolutely no effect at all. The noise has no effect until the null difference voltage is close to the peak noise voltage or what I call the noise threshold. This threshold exists only with a single bit DC null detector. The detector has only two output states, high or low. If the null difference voltage is higher than the noise threshold, than the measurement certainty is essentially 100%. The algorithm recognizes this and increases the AMU step size exponentially so the AMU output can slew extremely rapidly towards the true null voltage.With an AC detector the output has an infinite number of output states and the measurement certainty is defined by the amplifier bandwidth, sample averaging, phase synchronicity between the chopper switches, the phase of the moon and numerous other factors. The input of the null detector is a big, hairy ball of noise and switching artifacts and it is a miracle that it works at all.With the DC null detector, once the null difference voltage comes close to the peak noise voltage, the measurement certainty drops like a stone. The algorithm also can recognize this and immediately drops the step size down to 1 and now the four year integrator time constant kicks in. The noise at the op-amp input is still there, but only the average DC value is relevant. The AMU output can go up and down with a slight bias one way until its average output matches the DC value. The DC value is affected by op-amp input offset drift, resistor value drift and op-amp output settling time. These change relatively slowly so even with a massive integration time constant, the AMU can track the changes.When the null detector input switches to the other side of the load cell, the AMU output remains constant and only the SPI DAC output is changed. Because the AMU holds the common mode and op-amp input offset voltages, these are effectively cancelled out and the SPI DAC will only measure the normal mode voltage or the voltage difference across the load cell. The SPI DAC output is divided down to 15.5 mV giving it a resolution of 15.5 mV / 4096 = 3.78 uV. At those low voltages, the null difference voltage is very close to the noise threshold and the DAC output changes relatively slowly. I've noticed that it seems to oscillate a little bit before it finally settles down and then the output is extremely stable. To test it, I stand on the weigh scale and then step off. The weigh scale is an ancient piece of junk and the load cell output goes from about 1.8 mV to about 7 mV. It's not quite up to metrology lab standards. The DAC value will not change for a few seconds and then bounce around before finally staying at one value. Considering the insanely high integration constant, it's seems almost a miracle that the output changes at all. As a rough guess, I would say repeatability is about 200 counts or 757 uV. I believe that the low repeatability is an artifact of the algorithm in that the integration constant is much too high for the low resolution of the DAC and output is frozen because of excessive filtering.Instead of using the same algorithm and parameters for the AMU and DAC, the DAC should have its own tuning parameters.The results I'm getting are so disproportionate to the simplicity of the circuit that I don't expect anyone to believe that they are possible. Yet as explained above, there is solid reasoning to support the results and it would be great to see others replicate and hopefully extend them.I've attached the latest Arduino code, a corrected schematic with KiCad files for the board. The printed circuit board has errors and doesn't match the schematic. The input pins to the analog switch are wrong and the left side ladder termination resistance network is wrong. On the prototype board pins 2 and 3 have been lifted and wires added to swap them. The ladder termination error is not that critical to circuit operation and doesn't need to be fixed. I hacked my prototype board just in case there was some effect.The schematic is functionally correct and can be used to create a new board. I will also put all files on SourceForge.The Python program uses a unique programming paradigm based on industrial workcells. I've spent over 30 years in automotive production and assembly automation and found that the programming and communication paradigms used for industrial workcells is far superior to anything else I've seen. I was paid very well to sit on my ass and do nothing because if I was working to fix a machine, the company was losing tons of money. If an industrial electrician can't understand why a machine is stopped because of a program bug, the programmer will no longer have a job. If one workcell goes down, the whole production line stops. If the millwrights or electrician can't get the workcell going in a very short amount of time, the contractor who designed and built that workcell will no longer be able to bid on jobs. The industrial world is harsh and full of machines that will maim, electrocute and kill and the programming environment reflects that.Each workcell is completely independent with a very limited interface with other workcells. One workcell doesn't do function calls on another workcell. It's internal state and internal variables are completely isolated from the outside world. If one workcell goes haywire, it will have minimal effect on other workcells because there are so few connections between them. At worst, it just won't feed a part to the next workcell. There's no possibility of cascading failures because of the extreme isolation between workcells.In my program a workcell is an anonymously instantiated object that maintains its own state and interacts with other workcells only by simple messages passed over a network. It is completely private and doesn't expose any of its internal workings to the outside world.Tkinter is used as a thread manager for all the workcells with one workcell used to run the network. When a workcell is instantiated, it sends a message to the network workcell which then setups the required communication links. All messages are queued and acted on in order, and atomically to prevent race conditions.As much as possible, the Tkinter graphical display elements and the interactive controls are disconnected. This is normal industrial practice. The controller for a workcell is a Programmable Logic Controller or PLC. The programming model for a PLC is a box of relays. It's far easier to train a programmer to be an electrician than it is to train an electrician to be a programmer. If a physical button is pressed or a button on a touch screen is pressed, the PLC sees the same thing, a contact closure on one of its inputs. The physical button doesn't call a function in the PLC so why should the touch screen? Instead, the touch screen will send a simple message to the PLC which will virtually activate an input exactly as if a physical button was pressed. Electricians understand relays and buttons. The PLC program is an electrical schematic which the electricians understand and once mastered, is very easy to program. The industrial environment is highly interactive with thousands of sensors, buttons, lights, touch screens, etc all run by 8 bit microcontrollers. Modern desktop GUI software doesn't reflect that and I refuse to use that type of programming model. Fortunately, other than for event handling, Tkinter is a great tool for developing highly interactive applications. By adding a messaging network and anonymously instantiated workcells, it's possible to create an industrial like programming environment which is much easier to work with.Graphically it makes sense for a button to have a parent for display purposes. But the button contact has nothing to do with its position on the display and doesn't need a parent. When a button is pressed, it's position on the screen is meaningless and it shouldn't have to go back to its parent to let other workcells know that it was pressed. It should just send out a message that it was pressed and any workcell which is listening for that message can then act accordingly. It's the same for any other event such as RS232 message, mouse click, etc. Just send out a simple message and let the other workcells do what they want with it. There's no reason to have a chain of command for events like button presses just because a hierachial model is better for display purposes. The hierarchial model is fantastic and easy to work with when building a GUI display and that's it. Buttons and controls require a completely different programming paradigm and the GUI software should reflect that.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 17, 2025, 10:35:18 am
content: I downloaded your "Printer Circuit.zip" file and then deleted some redundant files from it.This reduced it's size from 4.8MB to 127kB. A reduction of 38xThe files I deleted were:Backup directory with 25 copies of your project.Bak files in the project.Gerber files and zipped up gerber file.fp-info-cache.xml fileFor distribution / archiving, there is also no need to backup the libraries in a KiCad project, as in newer KiCad versions (V6 and up) the data is also embedded in the project itself, but it's an understandable choice to backup the libraries too. (KiCad only embeds the used symbols and footprints, and export / re-creation of these files is a bit of a nuisance).You also have two footprints in the KiCad project directory. It's a bit neater to move those to the library directory too.

author: azeeman
author_rank: Regular Contributor
timestamp: August 17, 2025, 11:09:05 am
content: Thanks, I'm still learning how to use modern software tools. I'm an expert on hpl,http://www.hp9825.com/html/hpl.htmland know my ASRU, from a hole in the ground.https://www.scribd.com/document/806293188/HP-3253A-Operation,but that kind of expertise is not quite as useful now although the ASRU was an incredible piece of technology.

author: azeeman
author_rank: Regular Contributor
timestamp: August 18, 2025, 12:50:38 am
content: I have found a simple way to get higher precision measurements without resorting to PWMs. Simply put two AMUs in parallel. Their outputs are then in superposition. One AMU can be used to null out the common mode voltage and the second to make the measurement.The first AMU can use 1% resistors because it's setting value is irrelevant, it only has to be stable for the length of time it takes the second AMU to make a the measurement. But, because each AMU terminates the other, it's probably best to use 1% resistors for both AMUs. Resistors are also much cheaper in quantity.The AMU on my prototype board is nulling below 10's of nanovolts and is extremely stable which means the op-amp input offset is also extremely stable. The null itself takes about seven seconds to null from 0 to 2.5 V with nanovolt stability. Subsequent nulls are much faster because they only have to adjust for very minor drift. Also, a low drift OPA607 is recommended which should have much less drift than the MCP6002 I'm currently using.On my prototype board, I have a 12 bit DAC with the output attenuated down to 15 mV full scale and paralleled with the AMU output. It's readings are relatively stable, but nowhere near the AMU's. The problem with the 12 bit DAC is that the low resolution makes it impossible to implement very high time constant integration. The integration is not just about time, it's the ability to make nanovolt adjustments to the op-amp input so that the op-amp output is not suddenly jumping up and down. Instead, it is gently encouraged to move in the right direction with forces similar to those causing the drift.Using one AMU for both common mode nulling and normal mode measurement can't work because even with high tolerance resistors, subtracting two large numbers to get one small number is inherently a high error operation. By using superposition, there is no subtraction as such. The common mode nulling is done with the normal mode AMU output set to zero so there is no error contribution. Once the common mode has been nulled, it will be quite stable for the few seconds or less that it will take for the normal mode AMU to make a measurement. Even though the normal mode AMU will be set to zero during the null, it's previous value can be retained so it doesn't have to null starting from zero so the measurement will be very fast.I believe that by using this technique it should be possible to make nanovolt level measurements. The precision will still be determined by the resistor tolerances, but because the common mode has been removed, an error of less than 1% in the microvolt range should be tolerable.I've attached an updated schematic.I have a new board coming in based on the previous design using a comparator. It's now effectively obsolete, but will be good for learning how to solder SMD parts.I bought a cheap hot plate from Vevor and from what I've seen the temperature control is extremely primitive with no programmability. Platinum RTDs,https://www.te.com/usa-en/product-NB-PTCO-006.datasheet.pdf,are relatively inexpensive at around $3 each and it should be easy to directly read their using a DC null detector made with an OPA607. The OPA607 input offset is about 120 uV. The RTD resistance is 1k. For the offset voltage to be small relative to voltage across the RTD, the RTD voltage should be at least 120 uV * 1,000 = 120 mV. This can be increased to say 500 mV. If the reference voltage is 5 V, a 4.53 k, 0.1% resistor can be used to make a voltage divider with the RTD. An AMU can then be used for null feedback. Because everything is ratiometric, decent precision is obtainable. A Nano can be used to run the show and connect to a desktop for programming a temperature control cycle with all the bells and whistles. The large thermal mass of the hot plate means that a simple on-off control is all that is required. If the null detector shows a low temperature, turn on a solid state relay until the null detector sees a high temperature and then turn the relay off. Sampling can be done at a very high rate so that the plate's thermal mass determines the frequency response and the system should be stable.One RTD, one resistor, the Nano 5 V supply is sufficient to act as reference, an AMU and a solid state relay is all the hardware required.

author: azeeman
author_rank: Regular Contributor
timestamp: August 18, 2025, 11:26:11 am
content: The two paralleled AMUs can be treated as a single 64 bit AMU with a center tap. The loop equations can be written for the network and then the voltage on any node can be found. This makes it possible to model it and test to see how sensitive it is to part tolerance.For the heater control, instead of using an AMU for feedback, it's much simpler to put the RTD in a bridge circuit to give greater output sensitivity and then use two eight bit PWMs as feedback to the bridge circuit. This gives good speed and resolution.One PWM output has to be 1/256 of the other which is a fairly high ratio. Because the resistance values required for PWM filtering are very high, a ladder network is used for attenuation on one PWM which keeps resistance values in a practical range. Also, 0.1% resistors are probably not available in values over 1M.The PWM output range is 0 to 5V, but it is part of a voltage divider with the RTD so the actual feedback voltage range will be much smaller consistent with the RTD resistance variation over the temperature range.The math to convert from feedback setting to temperature will be a bit hairy, but this will be done on a desktop computer using Python and Numpy which also makes it easy to have a nice graphical display and sophisticated control.I've attached a schematic to show the circuit topology, but I haven't calculated the resistor and capacitance values. I've used a PWM to feedback to a load cell and that worked well. The PWM was 16 bit and far too slow for practical use. By using two eight bit PWMs, the speed will be much faster at the expense of precision. For controlling a solder plate, precision shouldn't be an issue.Because a bridge is used, there will be offset and gain corrections required and a two point temperature calibration is needed.For even simpler hardware, a Nano or other high precision square wave source can be used to drive an analog switch to sample each side of the bridge and also supply the 5 V reference. The switch will then go to one of line in inputs of a sound card. The sound card uses a decent internal voltage reference so good precision is possible. Python and Numpy are used to extract the signal using an FFT.Another possibility is to use the sound card headphone jack through a Schmitt trigger to drive the analog switch and use one input channel to monitor the headphone output and the other to monitor the analog switch output. A sound card has near perfect phase synchronicity between left and right channels and synchronous detection can be used to recover the DC voltage. I've used this technique and it works well. The main problem is that the minimum period is 1 second which may be too slow for some applications.Because of channel to channel crosstalk the headphone signal should be attenuated down to very low levels before being fed into the sound card. Ideally, the signal from the headphone should be at the same amplitude as the signal from the bridge.Personally, I think the only purpose of hardware is to get some sort of signal into the desktop. The freely available software tools for processing the signal are so powerful that even very simple hardware is all that is required to capture the required signal.

author: azeeman
author_rank: Regular Contributor
timestamp: August 20, 2025, 04:12:23 pm
content: I've done a preliminary design for the temperature meter. A four bit PWM with a 12 SPI controlled DAC will be used to give 16 bit resolution. A PDF is attached showing the design parameters and the actual design. A Python script is used to tweak the final resistor values and is also attached.To estimate the noise threshold, the peak noise voltage of a 1 M resistor is used. The assumption is that if the null difference voltage is greater than the peak noise voltage, the noise voltage will not change the output state of the null detector. If the DAC steps are bigger than the noise peaks, an exponential search is possible for higher reading speeds.The intended range of the temperature meter is 0 to 600 degrees C to match the RTD.https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=PTF-FAMILY&DocType=Data%20Sheet&DocLang=English&DocFormat=pdf&PartCntxt=NB-PTCO-006Ideally, 0.1%, 10 ppm temperature coefficient resistors will be used. These are relatively cheap and available from DigiKey.https://www.yageo.com/upload/media/product/app/datasheet/rchip/pyu-rt_1-to-0.01_rohs_l.pdfSelf calibration of the meter can be done by using a 1k 0.1% resistor as a 0 degree reference and a 3.09 k 0.1% resistor as a 600 degree reference. These can be used in a two point calibration to correct for op-amp input offset and network resistor tolerances. The circuit can be self calibrating by using low voltage, low on resistance solid state relays to switch in the calibration resistors.A film capacitor must be used in the PWM filter. Ceramic capacitors have a much lower insulation resistance and are generally poorer quality.https://www.yageogroup.com/content/datasheet/asset/file/KEM_F3101_R82The intent of the circuit is not to have a linear volts per degree output. It's intended to send information about the RTD resistance to a host computer which will do the necessary calculations for error correction, linearization, etc. The ultimate goal is to create a desktop application for controlling either a cheap hot plate or toaster oven for SMD soldering.

author: azeeman
author_rank: Regular Contributor
timestamp: August 23, 2025, 04:50:32 pm
content: Because of the internet, and now AI, getting an answer to a question is easy, the hard part is knowing what questions to ask.This is a metrology forum and the most important questions are how to achieve high precision and high accuracy measurements.This applies not only to electronic measurements, but any kind of measurement. More abstractly, it is a question of how to collect information.The same basic questions and answers apply whether measuring voltage, weight, frequency, length, etc.The first question is what signal are you looking for? If you don't know what you're looking for, how do you know when you've found it?For a null detector the answer is very simple, the difference between two DC voltages with the highest possible resolution.There is a hierarchy in measurement. The foundation is sensitivity. The first mirror galvanometers had extremely high sensitivity and in the right hands could sense down to microvolts or below.https://en.wikipedia.org/wiki/Mirror_galvanometerWith high sensitivity, it becomes possible to precisely compare two voltages or currents to a very high resolution.The precise voltage values may not be known, but if one is known, such as a standard cell voltage, the other can be compared to it and adjusted until it matches to a very high degree.The resolution of the null detector may be low, but if the difference between the two voltages is low, the null detector resolution is not as critical.For example if the difference between the voltages is 1% and the null detector resolution is 10%, the difference between the voltages can be resolved down to 0.1%.Because the signal being measured is DC, the ideal null detector must have infinite input resistance, zero offset, high resolution and monotonicity.The voltage sources being measured will always have some resistance so any input resistance in the null detector will cause measurement uncertainty.Zero offset is necessary because any offset will directly cause an error. Generally, offset is correctable by simply putting zero Volts across the null detector and adjusting its output to zero.High resolution is desired because it makes it easier to adjust one voltage to match another. The higher the resolution, the higher degree of matching.Linearity is not important, but monotonicity is vital. If turning the knob clockwise increases a voltage, the voltage must always increase as the knob turns clockwise.If the voltage goes up and then down when the knob is turned in the same direction, adjustment becomes very difficult.It doesn't matter if the voltage goes up a bit more or less relative to the amount the knob is turned as long as the direction is consistent and resolution remains high.The next step in the hierarchy is precision. Precision depends on resolution and stability. An adjustable source has to be stable with high resolution and a monotonic output.If those conditions are met, precision is possible by calibration. A curve fit or other means such as a lookup table can be used to correlate an input setting to an output voltage.Once this correlation is established, it becomes possible to make high precision measurements.Another step in the hierarchy is accuracy. This is important for measurements in general, but more of a convenience than a necessity in a null detector.Accuracy is only possible if measurements are precise and stable. Offsets can be corrected provided they are stable for the duration of a measurement.Correlation between an adjustment setting and output is possible only if monotonicity is guaranteed.The hardest problem to solve is noise. There are many sources of noise such as DC thermoelectric voltages to AC thermal noise and the electrical environment.DC noise sources are managed by guarding, eliminating thermal gradients, etc. AC noise sources are managed by shielding and filtering.Because the null detector is looking for a DC signal, assuming that DC noise is controlled and shielding is adequate, filtering is required for reducing AC noise.For random AC noise such as thermal noise, the noise amplitude is proportional to the square root of the signal bandwidth.If the detector bandwidth is reduced to a tenth of its value, the noise amplitude is reduced by the square root of 10 or roughly one third.For extreme noise reduction, the bandwidth has to be reduced by even more extreme values.For instance if the noise level is 10 microvolts within a 10 Hz bandwidth, reducing the noise to 10 nanovolts requires reducing the bandwidth to 316 millihertz.Noise is also probability based. Although the mathematics of probability is very complex, the basis of probability is very simple and is just counting.To determine the probability of some event, just count all possible wrong events and all possible right events.The probability of a right event is just the ratio of right events to wrong events.This gives another tool for battling noise. Reduce the total number of possible events and then the probability of getting a right event increases.A null detector can be an AC type such as a chopper amplifier or a DC type where two DC signals are directly compared with a one bit binary output.In the AC type, there is a multidimensional space of wrong events. The feedback signal can have an infinite number of frequencies with each frequency having an infinite range of amplitudes andphases. This gives an infinite number of ways of being wrong and one way to be right. The odds can be improved by filtering, but it becomes exponentially harder to reduce noise.With a single bit DC detector there is only one way to be right and one way to be wrong. Those are great odds.Noise is still a factor, but it behaves in a much different way when a DC detector is used compared to an AC detector. Noise amplitude becomes critical only when it's peak value is close to the input voltage seen by the null detector.Noise frequency is critical only when it closely matches the null detector output sampling rate. The noise has to peak at just the right times to consistently cause a detector error.Because of this, the DC null detector has a sharply defined input noise threshold. When the null detector input voltage is above the peak noise, its measurement certainty is close to 100%.When the input voltage becomes comparable to the peak noise, the measurement certainty drops precipitously because the output of the op-amp can change state only if the input noise exceedsinput voltage. If the input voltage difference is 1 mV, the peak noise has to exceed 1 mV to affect the output. If the RMS noise level is 100 uV, the six sigma peak voltage is 660 uV which isnot enough to affect the output.If the input voltage drops to 500 uV, then the probability of the output changing due to noise becomes close to 100%.For very low voltage measurements, the only solution is to radically decrease the bandwidth.This solution also applies to an AC detector, with one major difference. The AC detector is always sensitive to any noise level, the DC detector is only sensitive to noise levels close to theinput voltage. By using software to define the detector bandwidth, the effect of noise can be reduced to an arbitrarily low level at the expense of measurement speed.Measuring down to nanovolts becomes a lifetime achievement. It seems to take a lifetime to make a measurement.In my previous post, I showed a temperature measurement circuit using a two bit PWM and 12 bit PWM to create a 16 bit resolution meter.Based on the above, a better way to measure temperature is to only use the 12 bit DAC for measurement and to use multiple low bit PWMs or a ladder network for balancing out the op-amp input offset.The circuit topology remains similar as multiple PWMs will just act as multiple voltage sources. The PWM outputs have to be weighted such that the combined output is guaranteed monotonic.Linearity is not an issue because the PWM settings are not critical, only their stability.Because the PWM outputs are digitally derived, only resistance stability and filter capacitor insulation resistance is critical.The op-amp input offset is also not critical, but its stability is critical. The offset can be balanced out to any desired level, but this is useful only if the offset is stable.Adjusting the PWMs will be a very slow process because the op-amp input offset is very low so the detector bandwidth needs to be much lower for a precise null.If the op-amp input offset is stable with time and temperature, the offset adjustment only needs to be done once and the time required is not a burden.Once the op-amp input offset is corrected, the only remaining error term is the DAC attenuation error.The DAC offset and linearity errors are proportional to its full scale, and when its output is attenuated, only the attenuation error needs to measured and compensated.Calibration is done by putting a precision 1 k resistor in place of the RTD and then nulling out the op-amp input offset. This also sets the 0 degree output voltage.A second precision resistor with a value comparable to the highest temperature is put in place of the RTD and the DAC used to null the voltage.This is used to determine the attenuation error correction. For higher precision and accuracy, the divider resistance can be deliberately set to a higher value such that parallel resistancecan be added to it to precisely set the high output. If high stability resistors are used, no further calibration should be necessary and the full DAC range becomes usable.For input offset and DAC output attenuation compensation, a variable bandwidth algorithm is the best tool to use.Because of the low voltages being measured, the bandwidth has to be extremely low and this can only be achieved in software.Also, the calibration should be automated because at the required time to null to very low levels will take a considerable amount of time and best left for a machine to do.The null detector is DC and the nulling resolution is limited only by the stability of the op-amp input offset, the stability of the resistors, the loop gain and the control of DC noise sourceslike thermoelectric voltages.On my prototype board, the noise level is very high, the resistors have a temperature coefficient of +/- 50 ppm, the Nano 5 V power supply is used as a reference and the op-amp is an MCP6002.The nulling takes forever because the high noise level forces the bandwidth to be very low, but once nulled, the drift is extremely low and is in the nanovolt range.With readily available +/ 10 ppm resistors and an op-amp like the OPA607, the drift can be reduced by orders of magnitude.To keep measuring speed high in a practical circuit, the noise levels have to be reduced so an exponential search technique like successive approximation can be used to keep the measurementrate high. Ideally, the peak noise level has to be well below the DAC's minimum resolution.I've got the null search algorithm working very well, but that will be the subject of another post as this one is already quite long.

author: azeeman
author_rank: Regular Contributor
timestamp: August 23, 2025, 06:23:15 pm
content: Because of the internet, and now AI, getting an answer to a question is easy, the hard part is knowing what questions to ask.This is a metrology forum and the most important questions are how to achieve high precision and high accuracy measurements.This applies not only to electronic measurements, but any kind of measurement. More abstractly, it is a question of how to collect information.The same basic questions and answers apply whether measuring voltage, weight, frequency, length, etc.The first question is what signal are you looking for? If you don't know what you're looking for, how do you know when you've found it?For a null detector the answer is very simple, the difference between two DC voltages with the highest possible resolution.There is a hierarchy in measurement. The foundation is sensitivity. The first mirror galvanometers had extremely high sensitivity and in the right hands could sense down to microvolts or below.https://en.wikipedia.org/wiki/Mirror_galvanometerWith high sensitivity, it becomes possible to precisely compare two voltages or currents to a very high resolution.The precise voltage values may not be known, but if one is known, such as a standard cell voltage, the other can be compared to it and adjusted until it matches to a very high degree.The resolution of the null detector may be low, but if the difference between the two voltages is low, the null detector resolution is not as critical.For example if the difference between the voltages is 1% and the null detector resolution is 10%, the difference between the voltages can be resolved down to 0.1%.Because the signal being measured is DC, the ideal null detector must have infinite input resistance, zero offset, high resolution and monotonicity.The voltage sources being measured will always have some resistance so any input resistance in the null detector will cause measurement uncertainty.Zero offset is necessary because any offset will directly cause an error. Generally, offset is correctable by simply putting zero Volts across the null detector and adjusting its output to zero.High resolution is desired because it makes it easier to adjust one voltage to match another. The higher the resolution, the higher degree of matching.Linearity is not important, but monotonicity is vital. If turning the knob clockwise increases a voltage, the voltage must always increase as the knob turns clockwise.If the voltage goes up and then down when the knob is turned in the same direction, adjustment becomes very difficult.It doesn't matter if the voltage goes up a bit more or less relative to the amount the knob is turned as long as the direction is consistent and resolution remains high.The next step in the hierarchy is precision. Precision depends on resolution and stability. An adjustable source has to be stable with high resolution and a monotonic output.If those conditions are met, precision is possible by calibration. A curve fit or other means such as a lookup table can be used to correlate an input setting to an output voltage.Once this correlation is established, it becomes possible to make high precision measurements.Another step in the hierarchy is accuracy. This is important for measurements in general, but more of a convenience than a necessity in a null detector.Accuracy is only possible if measurements are precise and stable. Offsets can be corrected provided they are stable for the duration of a measurement.Correlation between an adjustment setting and output is possible only if monotonicity is guaranteed.The hardest problem to solve is noise. There are many sources of noise such as DC thermoelectric voltages to AC thermal noise and the electrical environment.DC noise sources are managed by guarding, eliminating thermal gradients, etc. AC noise sources are managed by shielding and filtering.Because the null detector is looking for a DC signal, assuming that DC noise is controlled and shielding is adequate, filtering is required for reducing AC noise.For random AC noise such as thermal noise, the noise amplitude is proportional to the square root of the signal bandwidth.If the detector bandwidth is reduced to a tenth of its value, the noise amplitude is reduced by the square root of 10 or roughly one third.For extreme noise reduction, the bandwidth has to be reduced by even more extreme values.For instance if the noise level is 10 microvolts within a 10 Hz bandwidth, reducing the noise to 10 nanovolts requires reducing the bandwidth to 316 millihertz.Noise is also probability based. Although the mathematics of probability is very complex, the basis of probability is very simple and is just counting.To determine the probability of some event, just count all possible wrong events and all possible right events.The probability of a right event is just the ratio of right events to wrong events.This gives another tool for battling noise. Reduce the total number of possible events and then the probability of getting a right event increases.A null detector can be an AC type such as a chopper amplifier or a DC type where two DC signals are directly compared with a one bit binary output.In the AC type, there is a multidimensional space of wrong events. The feedback signal can have an infinite number of frequencies with each frequency having an infinite range of amplitudes andphases. This gives an infinite number of ways of being wrong and one way to be right. The odds can be improved by filtering, but it becomes exponentially harder to reduce noise.With a single bit DC detector there is only one way to be right and one way to be wrong. Those are great odds.Also, the DC feedback source is programmatically controlled and can be pristine. A large capacitance can be used across the source to reduce thermal noise at the expense of measurement speed. The amount of noise being fed back can be predetermined.Noise is still a factor, but it behaves in a much different way when a DC detector is used compared to an AC detector. Noise amplitude becomes critical only when it's peak value is close to the input voltage seen by the null detector.Noise frequency is critical only when it closely matches the null detector output sampling rate. The noise has to peak at just the right times to consistently cause a detector error.Because of this, the DC null detector has a sharply defined input noise threshold. When the null detector input voltage is above the peak noise, its measurement certainty is close to 100%.When the input voltage becomes comparable to the peak noise, the measurement certainty drops precipitously because the output of the op-amp can change state only if the input noise exceedsinput voltage. If the input voltage difference is 1 mV, the peak noise has to exceed 1 mV to affect the output. If the RMS noise level is 100 uV, the six sigma peak voltage is 660 uV which isnot enough to affect the output.If the input voltage drops to 500 uV, then the probability of the output changing due to noise becomes close to 100%.For very low voltage measurements, the only solution is to radically decrease the bandwidth.This solution also applies to an AC detector, with one major difference. The AC detector is always sensitive to any noise level, the DC detector is only sensitive to noise levels close to theinput voltage. By using software to define the detector bandwidth, the effect of noise can be reduced to an arbitrarily low level at the expense of measurement speed.Measuring down to nanovolts becomes a lifetime achievement. It seems to take a lifetime to make a measurement.In my previous post, I showed a temperature measurement circuit using a two bit PWM and 12 bit PWM to create a 16 bit resolution meter.Based on the above, a better way to measure temperature is to only use the 12 bit DAC for measurement and to use multiple low bit PWMs or a ladder network for balancing out the op-amp input offset.The circuit topology remains similar as multiple PWMs will just act as multiple voltage sources. The PWM outputs have to be weighted such that the combined output is guaranteed monotonic.Linearity is not an issue because the PWM settings are not critical, only their stability.Because the PWM outputs are digitally derived, only resistance stability and filter capacitor insulation resistance is critical.The op-amp input offset is also not critical, but its stability is critical. The offset can be balanced out to any desired level, but this is useful only if the offset is stable.Adjusting the PWMs will be a very slow process because the op-amp input offset is very low so the detector bandwidth needs to be much lower for a precise null.If the op-amp input offset is stable with time and temperature, the offset adjustment only needs to be done once and the time required is not a burden.Once the op-amp input offset is corrected, the only remaining error term is the DAC attenuation error.The DAC offset and linearity errors are proportional to its full scale, and when its output is attenuated, only the attenuation error needs to measured and compensated.Calibration is done by putting a precision 1 k resistor in place of the RTD and then nulling out the op-amp input offset. This also sets the 0 degree output voltage.A second precision resistor with a value comparable to the highest temperature is put in place of the RTD and the DAC used to null the voltage.This is used to determine the attenuation error correction. For higher precision and accuracy, the divider resistance can be deliberately set to a higher value such that parallel resistancecan be added to it to precisely set the high output. If high stability resistors are used, no further calibration should be necessary and the full DAC range becomes usable.For input offset and DAC output attenuation compensation, a variable bandwidth algorithm is the best tool to use.Because of the low voltages being measured, the bandwidth has to be extremely low and this can only be achieved in software.Also, the calibration should be automated because at the required time to null to very low levels will take a considerable amount of time and best left for a machine to do.The null detector is DC and the nulling resolution is limited only by the stability of the op-amp input offset, the stability of the resistors, the loop gain and the control of DC noise sourceslike thermoelectric voltages.On my prototype board, the noise level is very high, the resistors have a temperature coefficient of +/- 50 ppm, the Nano 5 V power supply is used as a reference and the op-amp is an MCP6002.The nulling takes forever because the high noise level forces the bandwidth to be very low, but once nulled, the drift is extremely low and is in the nanovolt range.With readily available +/ 10 ppm resistors and an op-amp like the OPA607, the drift can be reduced by orders of magnitude.To keep measuring speed high in a practical circuit, the noise levels have to be reduced so an exponential search technique like successive approximation can be used to keep the measurementrate high. Ideally, the peak noise level has to be well below the DAC's minimum resolution.I've got the null search algorithm working very well, but that will be the subject of another post as this one is already quite long.When a single bit DC null detector is used, the extreme reduction of input information is great for noise reduction, but not so great for determining how to null the input.The easiest way to think of the detector output is to treat it as a coin toss. With one toss, the probability of heads or tails is 50%.Instead of heads or tails, the output is either the null feedback voltage is too high or the null feedback voltage is too low.To determine which direction the feedback should go the odds of a correct decision have to be improved. This can be done by doing multiple measurements and then finding whatpattern of highs and lows are both indicative of the required null feedback direction and are also rare enough to give a high probability of being right.For example if 10 measurements are taken there are 2^10 or 1024 possible outcomes.Out of all these outcomes there are two unique patterns, a contiguous string of all highs and a contiguous string of all lows.The probability of one of these outcomes is 1 in 1024 or 0.097% or conversely 1-1/1024 = 90.23% possibility of being correct.The probability increases exponentially with the number of measurements. If 15 measurements are taken the probability of being correct increases to 1-1/2^15 = 99.997%.Although the certainty of measurement being correct can be arbitrarily high, this only applies if the detector input voltage is well above the peak noise level.If the detector input voltage is close to, or below the peak noise level, high certainty measurements become very rare and it becomes virtually impossible to change the feedback voltagewithout introducing a large amount of noise.If the detector input voltage is well above the peak noise level, a single measurement will have high certainty and making multiple measurements is a waste of time.Instead a compromise solution is to use a limited number of measurements to estimate measurement certainty. The number of measurements making up one sample will be limited to say 10.As long as each measurement polarity is the same, up to 10 measurements will be taken. If a measurement polarity changes, the sampling will stop because the certainty is known to be low.Because the odds of successive high certainty measurements of the same output polarity also increases exponentially, the null feedback voltage rate of change can also change exponentially.The search becomes exponential and is functionally similar to a successive approximation type search. The major difference is that it will be much slower.Successive approximation assumes that each measurement has high certainty and only one measurement per sample period is used.The null detector can't make that assumption and requires multiple measurements to determine certainty and will be much slower.As the null feedback voltage increases exponentially, at some point it is going to exceed the input voltage and the op-amp output state will change.The measurement that determines the change will either be a high or low certainty measurement.If the certainty is high, the the null feedback voltage can change a substantial amount in the opposite direction.If the certainty is low, the feedback voltage is probably close to the input voltage and any null voltage change should be small.Because the probability of the input voltage being close to the peak noise is high, the null voltage step change will be the minimum possible.For a high certainty measurement, the null feedback change can be high, but must be less than the voltage change that brought it the current level.If the the change is the same amount, the voltage will change too much and then a high certainty measurement will then cause an large change in the opposite direction and oscillation will occur.The voltage change can be reduced to a minimum, but this slows down the process too much.The trick is to reduce the feedback change just enough to prevent oscillation while still keeping the speed high.At this time, I'm not certain what the ideal change is, but I've found that a reduction of 2^6 or 1/64 is easy to implement with a six bit right shift and gives a stable result.Because the odds of being below the noise threshold is very high when a measurement is uncertain, the null change is dropped down to the lowest possible level.If the feedback resolution is very high, such as 32 bits, the very low change of null feedback with time creates a low pass filter with with a time constant that can be years in size.This makes it possible to null down to extremely low voltages in the presence of substantial noise because of the extremely low bandwidth.Also, because of the exponential nature of the search, the effective feedback loop bandwidth can change exponentially as a function of measurement certainty.My prototype board can null from zero to almost full scale with four digit accuracy in about 9 seconds. Nulling down to the single nanovolts takes minutes or longer.The null depth is limited by the system loop gain, the feedback resolution and the sampling rate.On the prototype board, the loop gain is made as high as possible by connecting the op-amp output to the analog to digital converter.The ADC has 10 bit resolution, if the internal bandgap reference is used, the resolution is roughly 1.2 mV per bit.The minimum op-amp gain is 25,000 so the minimum resolution is 48 nV. A 32 bit ladder network is used which has resolution of roughly 2/3 * 5V / 2^32 = 776 pV.The ladder setting is done to 31 bits with the most significant bit used as an overflow bit. So the final resolution is 1.55 nV.When stable, the null voltage varies about 10 nV.I've attached the prototype board schematic and KiCad files along with Arduino code. The files will also be loaded to SourceForge athttps://sourceforge.net/projects/ardweighno/upload/I screwed up the analog switch footprint and the termination resistance on the ladder network so some bodges have to be applied to the circuit board to make it work.The changes are indicated on the schematic.The circuit has a 12 bit DAC output combined with the ladder network but is not used with the current Arduino software because I want to work with just the nulling algorithm.Also, the circuit topology is not ideal for the intended purpose as a weigh scale meter and a completely different solution will be implemented.Instead of using the ladder network to remove the common mode voltage, a better solution is to use a flying capacitor to eliminate the common mode voltage.https://www.analog.com/media/en/technical-documentation/data-sheets/1043fa.pdfMultiple PWMs or a ladder network will be used for offset compensation and the DAC with attenutation network used to measure the flying capacitor voltage.This will be a much simpler and more precise solution. Also, an OPA607 op-amp will be used because of its superior input offset specifications.https://www.ti.com/lit/ds/symlink/opa607.pdfThis is primarily a research project so the code will be ugly and the documentation a mess. I'll try and refine them as time goes by, but I'm more interested in the process than the product.

author: azeeman
author_rank: Regular Contributor
timestamp: August 24, 2025, 12:37:27 am
content: One thing I forgot to mention is that an isolated USB adapter is used to reduce noise. These are used for digital audio isolation to break ground loops and are cheap and readily available.

author: azeeman
author_rank: Regular Contributor
timestamp: August 24, 2025, 01:25:32 am
content: One remaining problem with the null algorithm is knowing when the null has converged. At very low null detector input voltages, the voltage change will be very small because of the low bandwidth, but generally in one direction until a true null is achieved. There will also be drift because of thermal changes of resistance or the op-amp input offset. This makes it difficult to definitively know when the null has converged.One solution is to count null feedback direction changes. Count up if the feedback is in the same direction as the previous sample and count down if the direction has changed. The count will remain low if the feedback is bouncing around the true null. Because this may happen for a short time even without a true null being achieved, the trend count can be averaged and if the average is low, the null is most likely true. At the start of the null process, the average value will be initiated to a relatively high value so that a minimum number of samples are required to decrease the null value.If the null measurement is being used to compensate for input offset, the feedback value can then be saved for future use.The revised Arduino code is attached.

author: azeeman
author_rank: Regular Contributor
timestamp: August 25, 2025, 01:16:17 am
content: I have a better design for a temperature meter with the RTD connected using four wires. The RTD resistance is calculated by measuring the voltage across it and also the voltage across a series sense resistor. Flying capacitors are used remove the common mode voltage and a DC null detector with a 12 bit DAC used to measure the voltage. The voltage across the sense resistor is close to the full scale voltage change across the RTD to keep precision as high as possible.This requires more calculations to determine the RTD value, but the circuit is much simpler and capable of higher precision than by using a precision current source.Both the RTD and sense resistor will be high precision and no temperature calibration will be required.For the remaining circuit, an eight bit PWM is used to provide a precise offset calibration voltage at a duty cycle of 11/256 and a precise scale calibration voltage at a duty cycle of 31/256. Because the whole circuit is ratiometric this technique should give very precise results. The gain and scale interact so two rounds of calibration may be required. The resistors around the DAC don't need to be super precise, just stable. The current sense resistor determines the precision and a high precision type should be used. R1 doesn't need to be precise because it doesn't affect the measurement.This is a preliminary design and hasn't been tested. I'm fairly confident it will work, but there might be hidden bugs.The intention is to use a Python script running on a desktop to handle all calculations and display results.I've attached the schematic and design notes.

author: azeeman
author_rank: Regular Contributor
timestamp: August 27, 2025, 07:22:52 pm
content: A floating calibration source can be created by charging a flying capacitor with a PWM. This makes it possible to createa fully self calibrating bridge meter.A flying capacitor is used to sample the bridge output voltage and this is presented to a DC null detector. The nulldetector has extremely high input resistance and is a perfect match to a flying capacitor.Two 12 bit DACs are used for feedback to the null detector. One DAC is used for compensating op-amp input offset andalso for adding controlled input offset.The second DAC is used for measurement.The offset DAC feedback voltage output range will be half the measurement DAC range. This allows it to compensate foroffset down to 1/2 the least significant bit of the measurement DAC. There is no reason for higher resolution. If theop-amp input offset is relatively low compared to the measurement range, the additional offset range can be used tooffset the measurement DAC allowing for bipolar input measurements.When the offset is being measured, the measurement DAC can be set to some value with the offset dac range. The DAC cannow measure negative input voltages in that range.This is useful when measuring load cells which may have a small negative offset even with no load on them.The measuring DAC feedback voltage is calibrated by using the flying PWM. The PWM voltage will be fixed at just belowthe measuring DAC full scale voltage. The DAC can then measure the PWM voltage and calculate a correction factor.If the measuring DAC range is offset down, the PWM voltage must be changed to match.Because the PWM duty cycle never changes and the slow PWM response time is not a problem, a 16 bit PWM can be used toset the calibration voltage. This will require a large ripple filter capacitor, but this is a bonus because it reducesthe effect of charge injection from the analog switches and presents as a low thermal noise source.All measurements and calibrations are ratiometric which helps maintain precision.In the schematic, resistors R2, R3, R4 and R5 values will need to be determined based on the desired input offset andmeasurement range.Their exact values can be determined by using circuit theory and then adjusting each resistor to get the correctvalue. I used a very simple Python script to manually find the resistor values. I also wrote a Python script forfinding the closest standard resistance value. Both are attached.There is very little interaction between the resistors so it's easy to tweak one resistor value without greatlyaffecting the others. After a few rounds of tweaking, the required values can easily be found.For example, the maximum expected bridge output voltage is 15 mV, the maximum op-amp input offset is 1 mV and themeasurement range should be from -3 mV to 12 mV.To compensate for the negative input and op-amp input offset, the voltage across R3 should be at least 4 mV. R3 shouldalso be a low resistance to keep thermal noise low. Also, the lower the voltage, the less influence variations in thereference voltage will have on the input offset. If the input offset is 5 mV the attenuation ratio is 1000:1. If thereference voltage varies 1%, the input offset will vary only by 1/1000th of 1% of 5 V or 50 uV.Because the measuring DAC range is 15 mV, the offset DAC range should be 7.5 mV which easily covers the required 4 mVrange.With the resistor values shown on the schematic, the voltage across R3 is 5 mV. The voltage across R5 when both DACoutputs are zero is 1.243 mV which brings the voltage difference at the op-amp input terminals to5 mV - 1.243 mV = 3.757 mV.If the offset DAC output is 5V, the voltage across R5 is 8.723 mV giving a voltage difference at the op-amp input of5 mV - 8.723 mV = -3.723 mV.The measuring DAC range is 15.2 mV.This is a preliminary design and it hasn't been tested. The principles of operation are straightforward and I don'tanticipate too many problems.

author: azeeman
author_rank: Regular Contributor
timestamp: August 28, 2025, 05:19:10 pm
content: With self calibration possible for both offset and scale, a wide range voltmeter based on the DC null detector is easyto make. A wide range constant resistance attenuator is used for feedback giving an input range from microvolts tovolts with 12 bit resolution.The minimum calibration voltage is 1/2^16 * 5V = 76.29 uV. With a 12 bit DAC, this gives a minimum resolution of18.6 nV. For sufficient detector sensitivity, a comparator will be required between the op-amp output and digital input.The attenuator is based on a ladder network, but only one input switch is connected to the DAC output giving six inputranges. These will be logarithmically spaced to give the full input range.Each attenuator range will be calibrated against the 16 bit PWM. This makes high precision measurements possible eventhough component tolerances are not precise.Because the attenuator is constant resistance, the input scale can be changed without affecting the offset compensation.The meter input is unipolar with a small offset between the meter low input and the meter ground. This offset isnecessary for op-amp input offset compensation.Because of this small offset, the meter has to be battery powered or well isolated by other means from the sourcebeing measured. The USB connection must also be isolated.Input protection is not shown on the schematic because additional input attenuation can be added to increase the meterrange. The input protection circuit also depends on how the meter is intended to be used.The meter input impedance is extremely high which is useful for high source impedances like pH electrodes and inputprotection has to be designed to maintain this high impedance.For other applications this may not be as critical and simpler protection may be sufficient.The resistor network used for offset compensation and ranging is not easily designed using analytic methods, instead a Pythonprogram will be used to determine the resistor values. This will be the subject of another post.

author: ivo
author_rank: Regular Contributor
timestamp: August 29, 2025, 04:53:39 am
content: Why going so high as 1M and ~499k resistors? Won't that introduce current noise?

author: azeeman
author_rank: Regular Contributor
timestamp: August 29, 2025, 12:01:36 pm
content: Yes it will introduce noise. At the time I originally used it I didn't expect to be able to null down to the nanovolt level and just wanted high enough resistance values that the analog switch on resistance would be an insignificant part of the ladder resistance. Also, the ground currents change when a bit changes from reference to ground and this current has to flow through the common ground and will cause variable offset errors.Now that I know what is possible, it's time to start improving the design to take advantage of the new tools that are available.The output of the ladder can go through a voltage divider to decrease the output resistance at the expense of reducing the voltage range. This is useful when the ladder is used for auto zeroing an op-amp's input offset to the nanovolt range. A high quality op-amp like the OPA607 has a maximum input offset range of 1 mV. To null down to 1 nV requires a 1,000,000: 1 range. A 32 bit ladder network has a range of 2^32:1 or 4.294967296e9:1 and a voltage range of 0 to 2.3 V. It's output can be divided down substantially giving a much lower output resistance and lower thermal noise.Because only a 1 mV range is required, the output can be divided by 2,300. If the ladder termination resistance is 500k, the divider output resistance will be 217 Ohms.The ladder non-linearity and uncalibrated output are not a problem because the offset is not being measured only nulled out.Both inputs of the op-amp have to sit close to the offset point which creates a problem because the offset voltage is absolute while the everything else is ratiometric. To get around this problem a modified bridge circuit is required at the input of the op-amp. A ballast resistor will remove most of the power supply voltage as common mode which reduces both power supply and resistor matching problems. Also, the bridge resistance will be very low which will keep noise levels low. I've attached a very preliminary schematic to demonstrate this.The voltage reference will change because it must be very stable. The resistor values haven't been calculated yet and the values shown are not correct, but it does show the concept.The circuit is effectively a double bridgehttps://www.electrical4u.com/kelvin-bridge-circuit-kelvin-double-bridge/because both the input and offset have to be nulled simultaneously. The measuring DAC output will influence the offset voltage adjustment so after the DAC output is changed, the offset has to be readjusted. The network is constant resistance so the DAC measurement value is not affected by offset voltage changes.As long as the measurement DAC effect on the offset voltage is attenuated, the null will converge.I still need to model the circuit and create a Python script to calculate the required resistor values and for testing circuit sensitivity to reference voltage and resistance changes.

author: azeeman
author_rank: Regular Contributor
timestamp: August 29, 2025, 01:57:01 pm
content: Two principles underlay the circuit topology used for the null detector design, process gain and process loss.Process gain occurs when the output of a process is an improvement and the output of the process can be fed back intothe process producing further gains.A simple example is compound interest, as the interest gets reinvested or fed back into the investment process, theoutput grows exponentially. Even a low interest rate will generate huge returns if the process is repeated enough times.Process loss is the converse and is used for error reduction. As the process is applied repeatedly and there is areduction in the process outcome error, the error will be reduced exponentially.The modified ladder network is an example of this. For every stage added, the resolution doubles. This is a massiveprocess gain.Conversely, if the resistance ratio is skewed the right way, the output error in terms of monotonicity as a function ofresistor tolerance can be kept the same as stages are added. There is a process loss as a stage is added because itsoutput and output error are divided by all the following stages. Any number of stages can be added without increasingmonotonicity error.For the null detector, an attenuator network is required to reduce the reference voltage down to the input level.For a conventional meter this is done by using a voltage divider topology with exponentially increasing resistor values.This introduces a process gain in terms of errors. The resistance values grow exponentially which increase toleranceproblems because of leakage currents and the difficulty of measuring high resistance values. It becomes even moredifficult when very high attenuation is required. 1,000,000:1 ratios are possible but what if 1,000,000,000:1 isrequired for nanovolt level measurements?The ladder topology or more generally, an isolator-divider topology allows for extremely high attenuation while usingmoderate resistor values.The isolator-divider model consists of a high resistance, low resistance voltage divider followed by another highresistance, low resistance voltage divider. Because the high resistances isolate the low resistance dividers, there isa lot of freedom in selecting the low resistance dividers without affect other parts of the ladders. In terms ofsensitivity to changing divider resistance values, there is significant process loss.The same applies to the high resistance values. Because of the intervening low resistance divider, changes in theisolator resistance value have very little affect on the preceding and following stages.There is also a high process gain in terms of attenuation. Very high attenuation is possible in a few stages.Finally, because of the high isolation, it's relatively simple to design arbitrary attenuation values. In many casesthe isolator resistors can have the same values and the divider resistors tweaked or both can be tweaked. There is ahigh process loss involved with changing resistor values so an individual resistor value can be changed substantiallywith little affect on the other resistors.A brute force and ignorance algorithm can then be use to find the correct resistor values for a given attenuation.A model is made of the network and then tested under different input conditions. The resistor affecting a particularinput condition is then tweaked up or down and then the remaining resistors also tweaked in turn. This can be repeatedmultiple times until no further improvement is possible. Because of the high process error, even a simple algorithm willconverge to a solution very quickly.Note that goal is to find the closest standard resistor value. As part of the algorithm, the calculated resistor valuewill be replaced by the nearest standard value and then the process repeated for the remaining resistors. Once thealgorithm runs without changing any resistor values it stops.If laser trimmed resistors of arbitrary value are to be used, the algorithm will stop when the resistance change iswithin a given tolerance and all calculated outputs are within that tolerance.Once the new null meter circuit topology is nailed down, a model and Python script will be used to select standardresistor values for the various attenuators.

author: azeeman
author_rank: Regular Contributor
timestamp: August 29, 2025, 06:26:55 pm
content: I've updated the null meter circuit to show the bridge circuit used for offset compensation and to also demonstrate the isolator-divider model. A very stable voltage reference is used which has a very low temperature coefficient of 10 ppm. The bridge circuit is fed by ballast resistor R45 which is connected to the much smaller resistance R47. The voltage across R47 is roughly 5 mV or 1,000th of the reference voltage. A 10 ppm change of the reference voltage will change the 5 mV offset reference by 10 ppm or 50 nV. The 5 mV is then divided on the left by R44 and R42 with the junction of the two resistors feeding the non-inverting input of the op-amp. The ladder network also feeds this side of the bridge through an isolator resistance. Because R47 is so small, very little of the output of the ladder network will bleed over into the other side of the bridge.The measurement DAC has its own bridge half feeding the inverting input of the null. It also has isolation and divider resistances and because of R47, will have very little influence on the offset voltage.The offset voltage across R47 is common to both inputs of the op-amp so any drift of the reference voltage will have little differential effect.The attenuators also present a constant resistance to both sides of the bridge so changes in either the offset or measuring feedback voltages will not cause secondary effects.The resistor values shown are not correct, the intent is to get the circuit topology correct and then create a model and use a Python script to dial in the correct resistor values.Because of the low voltages being measured, a PWM is not suitable for calibrating the measuring DAC attenuator. Instead, precision resistors will be used with a model used to calculate the attenuation. At the expected voltage levels being measured, a 2% reading error should be more than tolerable.

author: azeeman
author_rank: Regular Contributor
timestamp: August 30, 2025, 10:09:35 am
content: I've attached an image showing how the input balancing circuit will work. Vbias and Rbias represent a voltage divider connected to the reference voltage. Vbias will be about 3 mV so the balance resistors on either side will sit at 1.5 mV. This makes it possible to have a positive or negative differential voltage across the op-amp inputs for input offset correction.Rbias will be a very low value resistor so that bias source approximates an ideal voltage source. It's value is primarily determined by how much current is available from the reference. If 1 mA is drawn, Rbias will be 3 Ohms. The low value reduces interaction between the offset and measure inputs.The balance resistors will also be low value, but are constrained by the value of the isolator resistors Roffset and Rmeasure. The Thevenin resistance seen at the junction of the balance resistors act as a divider resistance and is used to attenuate the offset and measurement voltages.The maximum offset voltage output range from the ladder network is 2.33 V, but only a 3 mV range is required. Roffset can then be about 388 times the balance resistor value.In practice, Roffset will be smaller because the ladder network has extremely high resolution while the measurement DAC is limited to 12 bits. For a usable measurement range, the DAC voltage division will be relatively low. Ideally, Roffset should equal Rmeasure so that the bridge remains perfectly balanced.If the bridge is well balanced, a change in Vbias will not result in a change of the differential voltage seen at the input of the op-amp. Also, because both the ladder network and DAC attenuator network have constant resistance outputs, changes in their output voltages will not affect the balance. This means that the stability of the reference voltage source is not as critical and a lower cost reference can be used.The op-amp input offset is set by connecting its non-inverting input to the input common and setting the measurement DAC output to zero. The ladder network output is then set null out any op-amp input offset.The input is connected and then the measurement DAC used to null the input voltage. Because Vbias has series resistance Rbias, there will be some coupling of the measurement voltage to the offset voltage. This will be very small because Rbias will be substantially smaller than Rmeasure. Regardless, because the resistances are constant, the circuit can be modeled and the error corrected.The offset cancellation is not affected, and the error is purely a scaling error.This circuit is the most critical part of the null detector as it must be extremely stable down to nanovolt level. The balance resistors need be well matched and stable because they ultimately determine how well the op-amp input offset can be nulled out and how stable it will be. Of course, the op-amp itself must have a stable input offset.The offset and measurement resistors should also be well matched, but because they are so much larger than the balance resistors, the matching is not as critical. The remaining resistors in the ladder network are not critical and can be 1% because they don't contribute much to the error.The DAC attenuator resistors are also not that critical, but because self calibration is not possible at very low input ranges, precision is required to retain 12 bit resolution.Stray input currents from the input source and leakage currents from the op-amp inputs and any input protection circuit will also cause errors. If these are stable, offset compensation will correct for some of the error. The effective resistance seen by these currents is Rbalance/2.The values of Roffset and Rmeasure are somewhat constrained and these will be fixed and then their values used to constrain the balance resistors. The ladder network and measurement DAC attenuator can then be modeled independently making their design much easier.

author: azeeman
author_rank: Regular Contributor
timestamp: August 31, 2025, 12:59:28 pm
content: To determine the required resistor values for the measurement DAC attenuator and for resistance matching of the measuring DAC and ladder network outputs, a Python script will be used. The script uses a very simple algorithm, each resistor in the network is adjusted slightly up or down and the output tested to see if either change brings the output closer to a target value or has no effect.Instead of calculating absolute values, standard resistor values are used with the circuit looping until either a looping limit is reached or a solution has been found.The resistor tweaking value is based on the IEC resistor standards,https://eepower.com/resistor-guide/resistor-standards-and-codes/resistor-values/#using the 1% or 96 step series. The tweak resistor increase multiplier is 10^(1/96) = 1.0243 and the decrease multiplier is 10^(-1/96) = 0.9763. This way the test resistance values will closely match the standard values.A lookup table of all possible resistor values over a range is created and this is used for selecting a resistor value. A binary search is used which will narrow down the search to at most two resistor values. These two values are then tested to find the closest standard resistor value to the calculated value.The isolator-divider circuit topology used has a high process loss. A 1% change in one resistor will have a close to 1% change in its associated voltage output while having substantially less effect on the rest of the network. Even though the algorithm is not very efficient, it converges very rapidly.The DAC attenuator has multiple constraints. The first is range progression. The lowest output range is 0 to 5 uV. With a 12 bit DAC, this gives least significant bit resolution of 5 uV/4096 = 1.22 nV.I originally intended to have each range increase by four times but found that the resistance values became too small to work effectively with the offset bridge. Ideally, the attenuator output resistance should be high relative to the balance resistor values. This way any mismatch between the measurement DAC output resistance and the offset trim ladder network output resistance will not cause significant balance errors.Another constraint on the DAC attenuator is the maximum DAC output current. The DAC has an output op-amp with significant output resistance so the output current has to be kept low to avoid errors caused by loss of op-amp output headroom.To meet these constraints, the offset bridge balance resistor value is changed until it is as low as possible while still keeping the maximum DAC output current below 1 mA. The balance resistor is changed manually and then new attenuator resistance values and maximum DAC current calculated.Once the DAC attenuator resistances have been calculated, its output resistance is calculated so the offset trim ladder network output resistance can be matched to it. The offset trim has a substantial output range which gives a lot of freedom in creating a resistor network on its output to match the DAC attenuator output resistance.I've attached the Python script and associated documentation for calculating the DAC output attenuator resistance values. These may change because of offset bridge constraints or other problems, but it does demonstrate the design principles involved.The code is application specific with the model created by hand. It's possible to create a more generally applicable program, but the time involved to develop a more beautiful and elegant program is not worth the effort at the moment. The primary goal is to first prove out the circuit topology, if the topology works, then refining the tools used can be done later.I'll post the other Python scripts after other parts of the circuit have been realized.

author: azeeman
author_rank: Regular Contributor
timestamp: September 01, 2025, 12:26:10 am
content: I've completed the schematic and Python scripts used for the design. I've attached all my design notes, KiCad files, Tex files, etc.The Python code has been broken up into separate modules to make reuse a bit easier.Note that it's very critical to maintain a balance on the op-amp input offset circuit. If the measurement DAC attenuator circuit is changed such that its output resistance is changed, the ladder network termination resistance will also need to be changed to maintain balance. Op-amp input offset is the only voltage that is not ratiometric and any change in the offset bridge balance will cause differential input errors with reference voltage change or resistor value drift. Auto zeroing will be used to correct for drift, but if used at nanovolt levels, it's not going to be very fast and drift has to be minimized.Low drift auto zero op-amps are available,https://www.onsemi.com/pdf/datasheet/ncs333-d.pdfand one of these can be used as the detector. They aren't very fast, but speed is not important.I've also added input protection. The circuit is intended to be floating so the input protection is only for differential input voltage. The protection kicks in at around 3 V. The shunt regulator can handle up to 100 mA so the series input resistors and Schottky diodes have to be sized appropriately for the expected input overload.

author: azeeman
author_rank: Regular Contributor
timestamp: September 05, 2025, 06:09:48 pm
content: I've come up with a simpler bridge meter which takes advantage of a low input offset op-amp, OPA233,https://www.ti.com/lit/ds/symlink/opa333.pdf?ts=1757076368942which allows the DAC to compensate for the input offset by using a half chopper circuit.A typical chopper circuit has switches to both modulate and demodulate the input DC signal. The idea is to modulate up to a frequency where the signal can be amplified by an AC amplifier and then demodulated back down to DC to null out the input DC. This works great but can be improved by eliminating the demodulation back to DC. Instead, synchronous detection by directly measuring the AC voltage is a much better technique. This requires that the AC amplifier output be centered exactly in the middle of the ADC range and the ADC output read as a two's complement number. The ADC readings are then correlated against sine and cosine to extract the fundamental harmonic of the modulated signal. I've attached a circuit and a snippet of Arduino Nano code where this was done.An improvement on the above is to use single bit DC detection by switching the inputs of the op-amp. The output of the op-amp will be inverted, but the nulling works the same. The difference in the DC voltages measured is the input offset.This only works if the input offset is small relative to the voltage being measured because it will take up a part of the DAC input range. The op-amp inputs also have to be lifted up slightly from ground to allow the DAC output to go above and below the input levels to measure both positive or negative offsets.In the attached circuit, a flying capacitor is used to remove the bridge common mode voltage and a combined flying capacitor and PWM will be used to calibrate the DAC output attenuator. The flying capacitors allow the input voltages to be offset the same as the op-amp inputs.The single bit DC null detector algorithm has a very distinct characteristic. The null will stop right at the point where the differential voltage at the input of the op-amp is close to the peak noise voltage.If the peak noise is much less than the differential voltage, it will have no effect on the op-amp output. Noise is an AC phenomenon and it will be centered on the DC voltage at each input. The peak noise has to overcome the differential voltage to switch the op-amp output. Any less, and noise has no effect. This also affects measurement certainty. The measurement certainty is very close to 100% when the differential voltage is greater than peak noise and drops to 50% when close to peak noise.I've attached a simple Python model which uses a similar algorithm to that used in the Arduino Nano for null detection. Both the software and hardware versions show the same characteristic.What makes this useful is that because if the noise is inherently AC and if the DC null is approached from two different directions, the peak noise will be averaged out. This still needs to be tested in the hardware. This can also be done in the model, but that is not a proof. The model is mostly useful for refining the algorithm.

author: azeeman
author_rank: Regular Contributor
timestamp: September 07, 2025, 06:00:10 pm
content: By using dynamic integration time constant control of the feedback signal, it becomes possible to set any filtering bandwidth and the noise level. Setting the time constant is trivial, if the feedback setting time is fixed, the integration time constant is simply the feedback step size change. Because the feedback can only change at the integration rate, the noise bandwidth is also set by the integration rate.The trick is determining what the integration rate should be. I'm experimenting with setting the rate based on measurement certainty, but the certainty is extremely high until the differential input voltage on the op-amp input detector is close to the peak noise. Prior to that there is effectively no uncertainty and the feedback bounces up and down by huge steps because of the high measurement certainty.I can crank up the certainty requirement to very high levels, but it has no effect unless the integration time constant is very high. It then takes a long time to integrate up to the null point and then the reading is stable up to the step size. I'm nulling at 2.5 V so it the integration step size is 100 uV, the reading is stable up to 100 uV. The problem is that to get to 2.5 V in 100 uV steps takes a long time and a more sophisticated approach is required. I think this is simple to do by just looking at the slope of the feedback. As long as the slope is in the same direction, the step size can be huge and then when a direction reversal occurs, the step size can be reduced and the integration time constant increased. The main point is controlling the integration time constant and in turn the noise bandwidth.I've also potentially found another neat trick, but this only exists in a Python model where the inputs of the op-amp are reversed. With a single bit detector, reversing the op-amp inputs only requires complementing the output in software when calculating the feedback. The input is first nulled with the op-amp inputs in one state and the reading saved. The inputs are then reversed and the reading saved and then the two readings are averaged. This cancels out the input offset, but what's more surprising is that it also cancels out noise.The op-amp is sensitive to noise only when the differential input voltage is less than the peak noise voltage. This creates a very well defined threshold where the uncertainty goes from 0 to close to 50%But, this threshold is directional. If the integration feedback goes from zero to the input, it will still stop just below noise threshold so it effectively becomes the same as op-amp input offset. If the op-amp input is now reversed, the threshold shifts and when the two readings are averaged, both the noise threshold offset and input offset are cancelled.I haven't built the hardware to prove the model, but it looks very promising. I've attached the Python model and a preliminary schematic for the circuit.I know that I'm getting into some really weird stuff, but the math is correct and and the hardware, such as it is, matches the theory.Noise is an AC phenomenon so even with very high noise, it cannot create a DC signal provided the circuit remains linear and it has no inherent DC so it must always be centered on the DC voltage. With a sufficiently high integration constant, noise can be reduced to an arbitrarily low level. With a large enough integration time constant the only "noise" left is DC voltage drift caused by thermal gradients, component changes, etc. The filtering caused by integration will hide these if their frequency is high enough. This could be a good thing or bad thing depending on what the goal of a DC measurement is or how DC is defined.The null algorithm is quite simple and I've attached the nulling C code for unswitched op-amp inputs.

author: azeeman
author_rank: Regular Contributor
timestamp: September 08, 2025, 12:00:31 pm
content: I've found a fast nulling algorithm. It starts in state 0 with step size of 1 and DAC setting of 0. The ADC is read and if the feedback is low, the DAC setting is increased by the step size. This continues as long as the feedback is too low. If the setting remains low for 16 loops, the step size is doubled. This continues until the feedback is too high. The step size is then put back to 1 and the state changes to 1. As before, the DAC setting is decreased by the step size with the step size doubling every 16 steps. If the feedback is too low, the step size goes back to 1 and the state goes to 0.This results in a very rapid jump to the noise threshold and then it starts changing by about 1 uV per second and then slows down until it flickers in the tens of nanovolts after a few minutes.The nanovolt stability may seem too good to be true given the hardware, but the step size is in the nanovolts at that point so the integration time constant is in the months or years. This will not only filter out thermal noise, but also short term drift caused by temperature, seasonal, geological and other changes. If the drift is uniformly in one direction, the null will drift with it over time. The intent of the circuit is to measure the slower varieties of DC, not the fast types.