Impedance for someone that still doesn't really get it. - Page 1
Forum section: electronics / beginners

author: paulca
author_rank: Super Contributor
timestamp: May 27, 2025, 10:38:41 am
content: In other threads I am building a computer. Signal integrity is important if I want to use "interconnect ribbons" between boards.So I went through the thought process, guided by the scope on what happens to signals when they share paths with other signal paths. I was able to send a square wave into a rail on a breadboard and then receive that mangled square wave on adjacent rails. "Capacitive coupling" between conductors routed close together.So that lit the light bulb up, "That's why we route lots of grounds on multi-signal cables." We are dumping that coupled noise to ground... it's a decoupling cap made out of 2 wires.But decoupling caps "couple" AC to ground.So does this "parasitic capacitance" circuit present a "higher" or "lower" impedance to high frequencies signals?My own thought process says it would be a "low" impedance for high frequency and a high(er) impedance for low frequency. The high frequencies will couple and have a easy path to ground, where they would like to go anyway. However the low frequnces don't get that easy an option, they have to go the long haul to the end of the cable and through whatever load might be there.Theory/ideal if you put a very high frequency wave done the line, it will almost entirely couple through the caps straight to ground. If you then put a very low frequency through it, very little would couple to ground and have to go all the way through the --- lets say a 10Ohm load.However, part of me thinks I have this entirely backwards and I still don't get impedence.Maybe I am viewing it from the point of view of the "source", it's easier to push the current at high frequencies because it couples to ground. However, if you look at it from a circuit analysis point of view, you put in N db of 100MHz and got back out N/X db, therefore the attenuation is that ratio of X. For higher frequencies the end to end attenuation of those frequences is higher and .... that means it "shows a higher impedence to high frequencies".EDIT: In terms of what I am building, I believe the above is purely academic interest only... I am confident, as long as my ribbons stay no longer than 10cm total length and I am using solid CMOS ICs and not fakes, it should allow me to approach the 3Mhz 'standard' speed of the ICs in question. If I get random crashes at 3Mhz I don't really care and for this purpose I actually bought a 1.6Mhz crystal and may ever put a 32kHz RTC crystal in it initially! Breadboard tests so far, using a signal gen for clock, have discovered the "clock minima" for dynamic internal registers et.al is still capable of running as low at 32Hz. Im sure that has caveats though.

author: Ice-Tea
author_rank: Super Contributor
timestamp: May 27, 2025, 11:20:27 am
content: Quote from: paulca on May 27, 2025, 10:38:41 amIt's not just that. Imagine having only a single gnd or return pin. In that case, the return current from every single signal wire would pass through that single conductor. They'd get much too chumy ;-)

author: radiolistener
author_rank: Super Contributor
timestamp: May 27, 2025, 11:24:07 am
content: Impedance is not about how easily a signal "goes to ground" through a capacitor. It's a more fundamental property of the transmission line - the combination of the conductor's inductance and the capacitance to ground (or to a return path). When you send a signal into a line, the impedance determines how much current flows before any reflections occur - that is, before the wave reaches the far end and is reflected back.You can think of a transmission line as a ladder of infinitesimal inductors (wire) and capacitors (to ground or return). When a pulse is applied, the current is initially limited by the line's inductance, and the parasitic capacitance acts as a temporary sink. This sets up the characteristic impedance of the line, which is constant as long as the geometry - especially the spacing between signal and ground remains constant.Here are the key takeaways for your ribbon cable and board interconnects:1)Maintain a fixed and close spacing between signal and ground.This defines a stable impedance across the line, minimizes internal reflections, and reduces EMI. That’s why ground wires (or ground planes) are interleaved between signal lines - they help define the impedance and suppress crosstalk.2)Impedance matching matters.If the load impedance differs from the line’s characteristic impedance, part of the signal will reflect back, distorting the waveform. At low frequencies this often doesn't matter, but at higher speeds or longer distances, it becomes very critical.At 3 MHz and with cable lengths under 10 cm, you're mostly safe. Reflections are moderate because the signal rise times are relatively slow and the physical path is short. But your thought process will serve you well as you push toward faster logic or more complex interconnects.The key concept to understand here is that signal propagation in conductors is not instantaneous - it occurs at a finite, and relatively slow, speed (typically around half the speed of light in a PCB or cable).When you apply a high-frequency pulse to a transmission line, the duration of the pulse may be shorter than the time it takes for the signal’s leading edge to reach the end of the wire. In that case, the signal has no "knowledge" of what's connected at the far end - the source effectively sees only the local properties of the line at that moment: the inductance of the conductor and the capacitance to the nearby ground or return path. These local reactive elements determine the initial current flow and voltage behavior. This is what impedance is.To be more clear, the impedance is defined as:Z = sqrt( L' / C' )where L' and C' are per-unit-length inductance and capacitance of the transmission line.In other words, the inductance and capacitance are uniformly distributed along the length of the cable. Since both L and C are evenly distributed throughout the transmission line, any small segment of the line will have the same inductance-to-capacitance ratio as the entire length. This ratio is what defines the characteristic impedance of the line.This should clarify why it's critical to maintain consistent conductor dimensions and spacing between conductors in order to ensure a uniform characteristic impedance along the transmission line. Any deviation in geometry causes a change in impedance, which in turn leads to signal reflections at those points, degrading signal integrity.As you can see, the important detail thatwas missing in your observations is the role of inductance, which is just as critical as the capacitance between conductors. What’s essential is that both inductance and capacitance are uniformly distributed along the length of the conductors - this uniform distribution is what defines the line's impedance and ensures consistent signal propagation.This is how the wavefront propagates: at each infinitesimal segment, the signal interacts with a small inductance and capacitance, and the energy transfers forward step by step along the line. This is the basis of transmission line theory and the foundation for understanding impedance, signal integrity, and reflections.

author: golden_labels
author_rank: Super Contributor
timestamp: May 27, 2025, 11:29:45 am
content: Your intuition about how capacitance works is spot on. It will short higher frequencies to ground, while lower frequencies will pass through to the receiver.But it’s not acompleteexplanation of what happens on the cable. Or why ground wires are added.I feel it’s beyond my capabilities to explain this to you in full,(1)but to draw some rough image, consider a few things.That shorting happens regardless of what wire goes is in vincinity. If it’s another signal wire, it will go into it. And this is exactly the problem. The ground wire limits crosstalk not merely through providing low-impedance path. It also isolates the wires. Even if not directly between them, because high frequencies aren’t coupled directly to another wire. Instead, it becomes a combination of both: coupling between nearby wires and coupling going wire-gnd-wire. With signals having strong preference towards the latter. So the situation is more complicated than just a simple capacitor to ground.With higher frequencies, the return path for current becomes more tricky than with lower ones. At high frequencies the current prefers the smallest area loop. It’s quite counterintuitive, if you look at the bahavior on PCBs. One would think current goes the shortest path across the ground layer, but with high frequencies this isn’t the case. It’ll tend towards the path of the signal wire. And same applies to wiring. The high frequency signal will not go all around the entire width of the wire to nicely return through the designated ground wire. Instead, large part of it tries to go through the nearest one, as this is the smallest area loop. Providing multiple ground wires offers current the opportunity to go that path, limiting its effect on signal wires.The final part: inductance. It’s significant in long wires. This affects the signal in two ways. Not only the wire has its own inductance affecting signal integrity, but wires form a (very poor) transformer. Careful layout of ground wires may help mitigate these issues to some degree.Also mind signals you’re working with are not sinusoids. High-speed circuits produce very sharp transitions. And a square wave has multiple significant harmonics. So while base frequency of your signal is 3 MHz, we’re actually dealing with something in 30 MHz range. This should not matter in the situation you described, but you ask about the theory… and in theory it may.(1)Both because all the gory details are way beyond my knowledge and experience, and because the topic is so wide and deep it can’t easily fit into a forum post. Certainly not into a simple reply.

author: madires
author_rank: Super Contributor
timestamp: May 27, 2025, 11:29:59 am
content: Impedance isn't just about capacitance, it comprises the reactance of the capacitive component, the reactance of the inductive component and the resistive component. The reactance of a cap is X_C = 1 / (2 pi f C) and for an inductor it's X_L = 2 pi f L. A lower frequency increases X_C but decreases X_L, and vice versa. The coupling of signals into other wires (crosstalk) is a different story, but can involve impedance, especially in case of a common return path.Back to your main concern, 10 cm ribbon cable should be fine for 3 MHz.

author: tggzzz
author_rank: Super Contributor
timestamp: May 27, 2025, 11:43:23 am
content: Clock period is irrelevant; the EM fields neither know nor care when the next transition might occur. The important parameter is the risetime relative to the conductor length.https://entertaininghacks.wordpress.com/2018/05/08/digital-signal-integrity-and-bandwidth-signals-risetime-is-important-period-is-irrelevantThe transition time depends on the logic family.The other issue is to keep the power and ground lines short, to minise inductance and hence ground bounce. I always layout the power and ground first, then the signals. The ground bounce depends on the transition time, the load, and the number of outputs changing simultaneously.

author: paulca
author_rank: Super Contributor
timestamp: May 27, 2025, 12:52:26 pm
content: The particulars. I am aiming for ribbons of 5cm for side by side testing and probing. However if I get the layout working, that should move to stacked boards (on hexspacers) where the ribbons will be only 1-2cm long. If I get to the predicted maximum number of boards 4, it will be one ribbon with 4 "taps" ie, it will interconnect 4 boards eventually.I hold little hopes for a trouble free experience here. I expect dragons. However, I am not jumping down rabbit holes if I can just step over them. So I am going to keep going with interconnected passive ribbons until something stops me and forces me to go active and buffer ... when the problem shifts from analogue electrical coupling and propagation and lands firmly in the land of digital propagation problems.The first layout on a schematic usingodd pins as signal and even pins as ground.... I would need two 50 pin IDC ribbons to break everything out.I'm not entirely happy with that. There is design to do. As a minima they can be split into "functional" and "test harness use only". That and not all signals need to go to all boards. To program the flash in circuit with the Z80 for example, requires the programmer has full access to the ROM pins as well as the CPU DMA pins etc.. However nothing else on the bus should be anywhere near those, except maybe a "montior/debug card".At the same time I don't want individual ribbons for individual boards.Does50 interconnects with 50 paired groundssound like overkill for an "MBC?" Multiboard computer? I suppose not in terms of PCI-e, but in terms of an 8bit mickey mouse play thing, it sounds extreme to me.

author: radiolistener
author_rank: Super Contributor
timestamp: May 27, 2025, 01:09:25 pm
content: Quote from: paulca on May 27, 2025, 12:52:26 pmThis is because you don't see how much noise it radiate. You can test it with AM receiver.

author: TimFox
author_rank: Super Contributor
timestamp: May 27, 2025, 04:21:16 pm
content: For transmission lines, one must distinguish “characteristic impedance” of the line from the actual impedance in a circuit. For high-speed transitions and high frequency waveforms, terminating a line with a resistance equal to the characteristic impedance avoids reflections from the terminated end, which can degrade the signal. However, the impedance of a given length of line depends on the measurement frequency and termination. Done properly, a terminated line will give a clean signal at the far end, but the line can still radiate if not shielded. With equal and opposite currents in two wires of a line, the radiation from the two wires tends to cancel at distant locations.

author: Tation
author_rank: Regular Contributor
timestamp: May 27, 2025, 04:40:56 pm
content: Some months ago there was athreadabout coax impedance that may be interesting.

author: radiolistener
author_rank: Super Contributor
timestamp: May 27, 2025, 05:10:15 pm
content: Quote from: TimFox on May 27, 2025, 04:21:16 pmWhen the impedance of a transmission line is not constant along its length, it increases the line’s tendency to radiate electromagnetic energy. In the worst-case scenario, such as two conductors diverging from a single point, causing continuous impedance variation - the transmission line effectively turns into a radiating dipole antenna, significantly degrading signal integrity and EMI.

author: fourfathom
author_rank: Super Contributor
timestamp: May 27, 2025, 05:10:28 pm
content: Quote from: TimFox on May 27, 2025, 04:21:16 pmYes.But you still have to make sure that the non-degraded signal still has the amplitude necessary to drive the input circuitry. If the output impedance of the driver = the line impedance = the load impedance, then the voltage at the receive end will be half of the unloaded driver voltage. Usually with modern digital circuitry the driver output impedance will be well under 50 Ohms, so if your transmission line and load are in the 200 Ohm vicinity then the Voltage swing at the load will be 80% or better. You need to play off impedances and and driver power dissipation, and logic threshold levels.Sometimes we will use a series R-C circuit to terminate the transition edge which will then allow the voltage to rise to the unloaded level. This can minimize reflection distortion but you need to pay attention to driver rise time and of course cable length.

author: TimFox
author_rank: Super Contributor
timestamp: May 27, 2025, 05:17:37 pm
content: Quote from: fourfathom on May 27, 2025, 05:10:28 pmSeries termination, where the total source impedance including driver and series resistor equals the characteristic impedance, but the load impedance is very high, works because the 100% positive reflection at the load produces a total voltage equal to the original value, while the reflected pulse or waveform is absorbed (later) at the source so there is no second delayed pulse at the load.

author: Terry Bites
author_rank: Super Contributor
timestamp: May 27, 2025, 05:32:35 pm
content: As Davros says. Terminate, terminate, terminate, bypass and exterminate.Decoupling caps don't just bypass AC to ground they store energy to mitigate against supply rail resistance and inductance.The supply rail and/ or planes are also transmission lines and decoupling/ bypassing swamps down the characteristic Z to a very low value (hopefully). The lower the better obviously. Read up on "ground bounce" it can wreak havoc in your circuit and coms cables.See Dave's helpful video:

author: fourfathom
author_rank: Super Contributor
timestamp: May 27, 2025, 05:48:29 pm
content: Quote from: TimFox on May 27, 2025, 05:17:37 pmYes again.You can provide an impedance match at either end of the transmission line to minimize reflections. And a source-series termination feeding a high-Z load will give you full voltage-swing at the load. But if you are driving a shared bus (such as on a a backplane) rather than a single point-to-point connection, an unmatched source or load will give you distortions mid-bus. In this case the usual approach is to terminate the line endpoints and have the bus connections be high impedance. Again, rise-time and other factors do matter.Fortunately for me, the last few systems I designed were fast enough (2.5 GHz clock rate) that we had to use point-point interconnect. Fast bussed interconnects are hard. And yes, I recognize that the OP really just wanted to learn about transmission lines!

author: TimFox
author_rank: Super Contributor
timestamp: May 27, 2025, 07:49:44 pm
content: An interesting thought experiment for a single series-terminated line (sorry for absence of drawing).Take a low-impedance pulse generator, connect it to a 50-ohm cable 100 ns long through a 50 ohm series resistor.Set the generator to 1 V pk, 5 ns wide positive pulses, at a repetition rate of 1 MHz (1000 ns period).Use three matched high-impedance 'scope probes (very high input impedance):One after the series resistor, one half-way to the other end of the line, and the third at the end of the line (otherwise unterminated).You can then see the original pulse on probe 1 (0.5 V amplitude), 50 ns later the pulse hits the mid-point probe, and 50 ns after that it hits the end of the line and grows back to 1.0 V for 5 ns.Continuing, the reflected pulse (0.5 V peak, positive) hits the mid-point, and then disappears at the source probe when absorbed by the series termination.

author: fourfathom
author_rank: Super Contributor
timestamp: May 27, 2025, 09:28:29 pm
content: Quote from: TimFox on May 27, 2025, 07:49:44 pmI was doing this, more or less, using LTSpice and their transmission line model just to make sure I wouldn't be putting my foot in my mouth when I posted. If anyone wants to play with this stuff, even the simplest LTSpice simulations will reveal a lot. Don't forget to play with the source rise/fall time to see how that affects the waveforms.

author: TimFox
author_rank: Super Contributor
timestamp: May 27, 2025, 09:55:36 pm
content: That should work.Note that the transmission line model in Spice does not have galvanic connection from one end to the other: if necessary, you need to add explicit ground at each end.Otherwise, you do not have DC continuity along each wire.

author: BlackHecilopter
author_rank: Contributor
timestamp: May 28, 2025, 05:31:15 am
content: I'm not sure what you're doing but for most applications you can think of impedance as a frequency dependent resistance.There are two frequency dependent circuit elements: inductance and capacitance.Both these elements store energy. Capacitors store energy in a electric field. Inductors store energy in a magnetic field.Capacitors:At low frequencies (i.e. DC) capacitors looks like an open circuit.At high frequencies capacitors looks like a short circuit.Everywhere in between, capacitors have an impedance that depends on frequency.Inductors:At low frequencies (i.e. DC) inductors look like a short circuit.At high frequencies inductors look like an open circuit.Everywhere in between, inductors have an impedance that depends on frequency.Combine two or more of these energy storage elements together and you get second, third, or more order equations that become essentially impossible to solve by hand. So you start solving things in the frequency domain.

author: paulca
author_rank: Super Contributor
timestamp: May 28, 2025, 10:04:20 am
content: Well thank you all for reminding me why I like digital electronics.Thank you for also reminding me that when it comes to physical conductors there is no such thing as "digital". It's all analogue and calculus governed.But also thank you for complimenting my intuition.However, given the speeds and distances involved, I am going to fit my head firmly into a bucket of sand for most of it and go back to pretending that "digital signals" existThere are still things to decide on, but they appear to be "nice to haves", "might make it last longer", "won't transmit AM noise to the local neighbour hood" type things I can leave to the later stages of PCB design.Items added to that list are:* Do I need to bother with transmission line series resistors- I think the answer is - as you have interconnets and distance, yes. On a shared bus with multiple "ends", where though? This is a "later on" thing, it will work without them. It will last longer and be more resilient with them.* Do I need to electrically pull the tri-state buses down? This one again looks like "it depends" and it will be fine for now. If it's not fine, it will let you know. The corner case here is that there are times when the bus will be tri-state floating on purpose at at least one end. However, without doing the full top to bottom analysis of every single timing diagram to the nth degree, I cannot be 100% sure it won't be left floating at all ends. So it can have garbage on it. This "shouldn't" matter. In all the timing analysis I have done so far, the bus will be driven when it matters. Bus pull downs will just add to the total current when they are active high. I could use token "1MOhm" resistors just to stop them being reciever antenna... is that even worth it?Things I am going to do anyway, as they were planned.Suck it up, it's sig-gnd, sig-gnd, sig-gnd, sig-gnd, sig-gnd. It's a good job I like soldering headers.Also for later...Do tune in with an AM receiver when it starts running off a crystal and not silly slow debug speed. Come here and ask "How bad is it?"

author: tggzzz
author_rank: Super Contributor
timestamp: May 28, 2025, 10:50:31 am
content: Good to see that you realise "when it comes to physical conductors there is no such thing as "digital" ", but it goes further than that in important ways.The "digital circuits" themselves are actually analogue components thatinterpretthe incoming analogue waveforms as digital signals. If the analogue waveforms do not conform to the signal integrity required by the analogue components, then the interpretation may be incorrect. Such invalid interpretations are often pattern sensitive and can be the devil to identify and correct.In addition, the analogue componentsgeneratenoiseinternallyduring switching, and this noise can also cause invalid interpretation. Hence large ICs have many PSU pins and strict decoupling requirements. The classic problem is ground bounce.I suggest you start by understanding the difference between source and receiver termination, and the relationship with transition time. That can all be done intuitively.Of course as with many topics, TAoE3 is invaluable, see section 12.10. Youdohave that, don't you.The suggestion about doing asimpleSpice simulation is very valid. By playing around with transition time, line length, different termination resistors, you should be able to develop some intuition. Maybehttps://iexploresiliconvalley.com/2019/08/27/ltspice-lesson-3-transmission-lines-part-1/would be a starting point.

author: paulca
author_rank: Super Contributor
timestamp: May 28, 2025, 10:55:33 am
content: Sort of off topic, but on topic.Noise. My "lab" is untamable. There is just too much digital stuff like ethernet, USB, HDMI and DP running around in loops of birds nested cables on the floor.It all just gets mixed together and appears on everything.I have identified the HDMI cables as the worst offenders, so I can take some steps there, like spending some money on proper "Spec" shielded cables and routing them more sensibly.As to the USB noise... it has so many cheap buck converters on it and so many inductor spikes it's just not worth trying.Makes clean audio very hard to get. Optical isolation and battery power seems the only reliable way. EDIT: The easier way by far is to use Bluetooth from the digital source to the headphones directly. EDIT2: Oddly the RF isn't that bad. 433Mhz dongles get signal house (and garage/garden) wide without issue. Bluetooth and Wifi are also fine with a few dead spots if the "boiler cabinet" is directly between. Large mass of earth bonded copper and steel to get past.

author: paulca
author_rank: Super Contributor
timestamp: May 28, 2025, 11:00:21 am
content: Quote from: tggzzz on May 28, 2025, 10:50:31 amNot yet.I have dabbled with Spice for "characterising" circuits like OpAmps and there output drive circuits to match them with my headphones using Bode plots.That's about as far as I could stomach it. It's not the basics, it's when you need to "fill in the blanks" in an EE equation and I don't even begin to understand what they mean.Pre made example labs however might be the solution there. I assume if I play with the "speed" of the simulated square wave patterns Spice will allow me to see the rounding edges and the reflections etc?I'll go dig for a while on my own with the references you gave. One thing that sort of jumps out at me, is that a series resistor on the end of a capacitively coupled transmission line is a LPF.

author: tggzzz
author_rank: Super Contributor
timestamp: May 28, 2025, 01:49:12 pm
content: Quote from: paulca on May 28, 2025, 11:00:21 am"Capacitively coupled transmission line" is exactly as (in)correct as an "inductively coupled transmission line". There are no inductors and no capacitors (although insomecircumstances the response may look as if there are inductors or capacitors).Think in terms of a voltage step moving at the speed of light.The edges willnotbe rounded.Do not think in terms of LC oscillation, even where the waveforms might look a bit like that.Try an LTSpice simulation with only four components:voltage source, pulse, amplitude 1, period 1e-3, ton 100e-6, trise and tfall 1e-9source resistorlossless transmission line, default settingstermination resistortransient simulation (not AC), stop time 100e-9Vary the source and termination resistors: 0, 50, 100, 1e6m (N.B. in all spices M=m=1e-3, because originally computers only had uppercase characters)Observe the waveforms at the voltage source and each end of the transmission line.Vary the risetime 1e-10, 1e-9, 1e-8, 1e-6, 1e-6.Compare with what you see in the references given.Finally, ifreallywant to think of transmission lines as inductors/capacitors, realise that theinternalconstruction of a capacitor is a very short transmission line. Hence some of the waveforms you can see with those simulations do actually occurinside capacitors.But thinking in those terms will just confuse you, so leave that until later

author: fourfathom
author_rank: Super Contributor
timestamp: May 28, 2025, 04:04:26 pm
content: Here's a simulation. It's easy.

author: paulca
author_rank: Super Contributor
timestamp: May 28, 2025, 08:21:43 pm
content: So if I got that working and understand it...R1 I set to 50Ohm on the best reference a 2 minute google would tell me what a CMOS output gate impedance was.R2 I set to 4MOhm, even though it's likely a CMOS input gate is a lot higher.I extended the pulse to match a 1MHz clock and shortened the transmission line to 1ns for much shorter cables.It says I don't need to worry and the waves are barely different.If I mess with that values I can get all many of horrors to appear. Like 0 and 0 for R1 and R2 causes bedlam.If I increase the line to 1meter and the frequency to 10Mhz things start to look a little ropey.Now... I don't understand what "output" impedance is. Input I can kinda get it's just "load" V=IR. Output, .... wait...Does the output impedence come from the bias resistor on the output gate, sort of like the pull down?Like when doing an audio "Line out" you might provide your output "dropped across" a 10k resistor. Does that give that "Audio line out" a 10K output impedance or am I up the wrong tree?More importantly. I quite often see the first response on the load is higher than the 5V input. Is that expected?

author: TimFox
author_rank: Super Contributor
timestamp: May 28, 2025, 08:48:40 pm
content: Output impedance is a measure of how much the output voltage decreases as you increase the load current (by decreasing the load impedance).Many signal generators have inherently low output impedance, and increase it to the standard 50 ohms with a series resistor before the output jack.For an ideal source, you can measure the output impedance by measuring the current into a short circuit. However, real sources may be unhappy with a literal short circuit.

author: fourfathom
author_rank: Super Contributor
timestamp: May 28, 2025, 10:58:13 pm
content: For the output impedance of a logic gate you won't go far wrong by taking the VOHand VOLdatasheet specs. Example: The 74LVCG04 dual inverter --With VCC = 3, VOH at -24 mA = 2.3V. That's a 0.7V drop, 0.7 / .024 = 29 Ohms. VOL at 24 mA = 0.55V, 0.55 / 0.024 = 22.9 Ohms. Average it and call it 23.5 Ohms. It's not actually going to be a fixed linear resistance but it will be close enough for most purposes. If you want to source-terminate a 50 Ohm trace add a 27 Ohm resistor in series with the output.The gate output impedance is set by the on-resistance of the PMOS and NMOS output transistors. During the transition the drain/source resistance will be changing, but this usually doesn't have a significant effect.Linear amplifiers will have the output impedance set by the circuit configuration, and any negative feedback (which lowers the effective output impedance.) If you are trying for maximum power transfer you need to work with the output stage intrinsic output impedance, not the feedback-reduced impedance (I once got in a fight with my idiot boss over this one.)As for the output voltage exceeding the input voltage, yes, it definitely can happen. I don't know if this helps, but one way to look at it is to consider it as a quarter-wave transmission line (and it will be quarter-wave at *some* frequency). A quarter wave transmission line will take a low impedance and transform it to a high impedance, with the resulting increase in voltage. Since a square transition contains *all* frequencies, you will see the effects on the waveform. The reflections are another way of looking at the same thing.

author: tggzzz
author_rank: Super Contributor
timestamp: May 29, 2025, 09:11:32 am
content: Quote from: paulca on May 28, 2025, 08:21:43 pmA CMOS input is most usefully modelled as a capacitor, as specified in the datasheet. Don't worry about that when modelling transmission lines, but it is very important when modelling ground bounce with short lines.QuoteStop thinking in terms of frequency. The circuit neither "knows" nor "cares" when the next transition might occur.Digital signal integrity problems caused by transmission lines are equally bad with 1Hz signals as with 1MHz signals.The only parameter of interest is the transition time, related to the transmission line length.Intuition should indicate that if the transition time is longer than the propagation time (i.e. the line is shorter than then transition), then it needn't be treated as a transmission line. The details are slightly different, but that's the starting intuition.QuoteYou need to describe the form of the "bedlam" to yourself. Only then will you be able to start to understand what's happening.Read the references you have already been given.

author: paulca
author_rank: Super Contributor
timestamp: May 30, 2025, 11:31:51 am
content: Just on passing I looked for VOH in a 74HC datasheet.They seem to give 3 different values ranging from 10Ohms to 100Ohms.... suspiciously exactly 10Ohms and 100Ohms. I didn't calculate it out, but it's almost certain the middle one if 50Ohms.The graphs aren't much help either.It's when I start looking at what else those 3 test conditions correlate with that it becomes clear, stay at 5V. At lower voltages it's slow a dog and that's a problem, but it's still slow on 5V! "slow" is of course "decade relevant". Above 5V it heats the room.Does that mean I can just go with a 50Ohm output impedence?I haven't looked at VOL yet, but I expect the same dance. Datasheets never, ever give you exactly what you want. They always force you to go the long way so that they can then remind you everything has a consequence, so pick wisely. It's both irritating and understandable and quite ingenious in it's own way.

author: TimFox
author_rank: Super Contributor
timestamp: May 30, 2025, 02:53:42 pm
content: Logic gates at their binary extremes are not necessarily linear, and therefore the output resistance for small variations aboutVOHandVOLis not constant.Ohm’s Law is a good approximation for many practical components, but it is not universally applicable.

author: tggzzz
author_rank: Super Contributor
timestamp: May 30, 2025, 03:17:10 pm
content: Some of the OP's confusion and surprise could be reduced by looking at TAoE3 sections 12.9 and 12.10. One example is this scope trace, where I deliberately exclude the caption in order to encourage the OP to read all of the source.Horizontal: 40 ns/div; Vertical: 3 V/div.If the OP is using 74HC logic rather than any other type (e.g. 74AC), then the transition times are likely to be sufficiently long that anysensiblelength line does not need to be treated as a transmission line. (Sensible == short, not DuPont wires!)Nonetheless, as Horowitz and Hill put it in TAoE3 p857, p809...Because of these noise problems, it is generally best not to use a faster logic family than you need. That’s whywe use 74HC(T) logic, rather than 74AC(T), for general-purpose use in our electronics course (where students puttheir circuits togetherusing “solderless breadboards”).This is a 10 MHz clock signal at the output of a 74AC14 inverter, wired up on a “solderless prototyping” board(a dubious practice; but, hey, it works, most of the time anyway).We took the precaution of using an IC socket with integral SMT bypass capacitor,to put the best face on it.I didn't realise you could still get such sockets.There were also Rogers Micro-Q decoupling capacitors. People might like to consider why those were needed, invented and used, and why the physical construction is good for the purpose.

author: shabaz
author_rank: Frequent Contributor
timestamp: May 30, 2025, 03:46:46 pm
content: I keep a few axial caps handy to replicate those old sockets (i.e. soldered to the underside of the DIP socket). In the photo below, I'd forgotten to add any decoupling to a Flash memory adapter board, so that method was useful in this case (although I could have soldered the cap to the PCB I suppose).

author: fourfathom
author_rank: Super Contributor
timestamp: May 30, 2025, 05:04:12 pm
content: Quote from: paulca on May 30, 2025, 11:31:51 amAs Tim and I have said, the output impedance over the high/low-state will not be linear, but the Ohm's Law calculations are a useful approximation.Here's what I get for the 74HC04 at Vcc of 4.5V, 4mA output current, using the TI datasheet: VOH drop = 0.2V, R = 50 Ohms. VOL drop = 0.17V, R = 42.5 Ohms.The difference is probably due to the PMOS part of the output stage, often not as robust as the NMOS. My designs are generally too fast for HC logic, but the 'HC04 could reasonably drive a 50 Ohm transmission line (and not exceed the maximum current specs). However, if you are driving long circuit board traces, the trace impedance may be higher or lower than 50 Ohms, depending on trace width and layer stackup. And if driving an external transmission line you need to consider transient protection for not just the receiver input, but the driver output. By using a low-impedance driver you can add series resistance to make transient suppression easier, and also to reduce source impedance variations due to driver characteristics.In some cases I use input-paralleled drivers and per-driver series resistors to drive a transmission line. Here's an example of a circuit that is used to provide 50 Ohm clocks (frequency from 1 Hz to 100 MHz) to external equipment. I think I measured the output impedance, using loaded / unloaded voltage, at being pretty close to 50 Ohms. I may have reduced the resistor values a little bit, but not much. That "Z4" is a low-capacitance transient-suppression diode.