[Sold] FS: PTUSB1 USB 2.0 test fixture (for current measurement) - Page 1
Forum section: electronics / general

author: bloguetronica
author_rank: Frequent Contributor
timestamp: October 31, 2017, 10:47:41 am
content: Hi,This is a breakout board that was made specifically for the measuring of current consumption of USB 1.1 and USB 2.0 devices. The board was tested with several devices and, in any case, no noticeable performance loss was observed with this board between the host PC and the device.I'm currently selling one module on eBay:http://www.ebay.com/itm/152694577253Sold!Besides serving the purpose of current measurement, this board can be used on compliance pretesting and enumeration by Vbus interruption. Only high quality materials were used, namely the base material is FR408 substrate and the copper has an ENIG finishing. Although the board is not certified, all the connectors were certified by USB-IF.Kind regards, Samuel Lourenço

author: Zucca
author_rank: Unknown
timestamp: October 31, 2017, 11:24:03 am
content: Any discount for EEVblog guys? Can you sell directly here without the 10% ecrap fee?

author: bloguetronica
author_rank: Frequent Contributor
timestamp: October 31, 2017, 11:32:08 am
content: Hi zucca,If I can exclude eBay and sell it here, then yes, I can take 10% off. That would be $52. Of course the shipping would be still $8, giving a total of $60 (instead of $66 on eBay).Please PM me if you are interested. I (only) accept PayPal.Kind regards, Samuel Lourenço

author: ovnr
author_rank: Frequent Contributor
timestamp: October 31, 2017, 12:31:40 pm
content: $60 for a board with six connectors and nothing else is a bit steep.Is this a four-layer board, by the way? If it's only two-layer and standard thickness (1.6mm), your differential lines are wrong.

author: bloguetronica
author_rank: Frequent Contributor
timestamp: October 31, 2017, 02:10:56 pm
content: Hi ovnr,It is a 4 layer board and it has to be, so you can have controlled differential impedance using relatively thin traces. The price seems to be a bit steep, but, mind that the 4-layer boards form OSH Park are expensive in orders of three, plus the price of the connectors, plus assembly margin cost.Agilent sells boards with connectors for a arm and a leg, although they are more complete and bigger.Kind regards, Samuel Lourenço

author: bloguetronica
author_rank: Frequent Contributor
timestamp: October 31, 2017, 11:36:09 pm
content: Hi,I've attached the calculations which served as a base to establish the trace width in order to have 90 ohms of differential impedance, while keeping the single ended impedance within spec as well. The PCB stack-up and materials were also taken into account.Kind regards, Samuel Lourenço

author: Zucca
author_rank: Unknown
timestamp: November 01, 2017, 11:19:55 am
content: Pm sent

author: Zucca
author_rank: Unknown
timestamp: November 02, 2017, 08:38:18 am
content: Good communication, I am waiting for item to arrive.Next time USB 3.0?

author: bloguetronica
author_rank: Frequent Contributor
timestamp: November 02, 2017, 10:21:06 am
content: Hi zucca,The board was sent today. All details in PM.By the way, I do have a USB 3.0 board, similar to this one, for sale. It works very well at the intended speed, again with no noticeable performance degradation.I can create a new thread to sell it here if you're interested, although I prefer to give it more time on eBay, just because of the reviews. Nevertheless, I'll post it here in a few days, with discount for eevblogers.Kind regards, Samuel Lourenço

author: Zucca
author_rank: Unknown
timestamp: November 07, 2017, 01:54:43 pm
content: I got it today. Very well done, a bit expensive at the end but happy so far.Just a question; why not use one of the two middle layer for the Data lines and surrond them by GND (above and under layer)? It seems to me you placed the D+ and D- in the bottom layer, so you have them exposed to "air" on one side.https://oshpark.com/shared_projects/EwXI88CL

author: bloguetronica
author_rank: Frequent Contributor
timestamp: November 07, 2017, 03:31:02 pm
content: Thanks, zucca! I'm glad you found the board useful.Quote from: zucca on November 07, 2017, 01:54:43 pmGood point! It never occurred to me, actually.I guess I could do an "inverted" microstrip, but I don't know if the plane opposite to the core will have an effect, if I'm laying out the board on a stripline fashion (it would be more like a microstrip, in reality). Also, I don't know about having FR4 on both sides. It will probably influence the impedance. But that could be possible on this USB 2.0 board. The differential pair would therefore be isolated from external influences. Not sure if it is doable on the USB3.0 board, though.

author: Zucca
author_rank: Unknown
timestamp: November 08, 2017, 08:53:27 am
content: Oh, I supposed it was an easy/stupid question...Yeah surely the Z of a microstrip surrounded by FR4 and GND is different than yours... but if you can why not?. The interference/noise picked up in your board on the other hand should not be a problem for the USB 2.0 communication.You/I could try to put your board close to a noisy device (ATX smps power supply?) and scope the D line out.

author: bloguetronica
author_rank: Frequent Contributor
timestamp: November 08, 2017, 11:12:44 am
content: Hi zucca,First thing, I have to see if this can be calculated. I normally use Saturn PCB Design Toolkit to do this.However, you may notice that most differential pairs, USB or even PCIe are on the surface, and pretty much noise immune. Noise wouldn't be much of a problem. However, I managed to disturb the USB 3.0 communication on one of my USB 3.0 board by laying a finger directly above the differential pairs. That, I assume, changed the characteristic impedance of the tracks.I'll check this once I have more time, perhaps even today.Kind regards, Samuel Lourenço

author: bloguetronica
author_rank: Frequent Contributor
timestamp: November 09, 2017, 12:42:44 am
content: Hi zucca,I've been doing some calculations considering the use on differential pairs on one of the internal layers. There are some considerations:- The internal copper layers, according to the OSH Park 4-layer stack up specks, are 0.5Oz;- Prepeg is 6.7mils and core is 47 mils.By inputting this, I concluded that I must have 6,5mil traces in order to get nearly 90of differential impedance, but the single-ended impedance is out of spec. By limiting to 8/8 layout design rules, I would get a marginally acceptable 81of differential impedance, and the single-ended impedance would still be in spec. This would be acceptable for a USB 2.0 design, but not acceptable for a USB 3.0 design, in which the spec allows for a tolerance of just 7% instead of 15%.Thus, a microstrip design, like the one in the current board, gives out better results and achieves a near 2 to 1 ratio of differential to single ended impedance easier. A stripline configuration, asymmetric in this case, is not ideal.Hope this clears any doubt. It surely enlightened me to the whys that never occurred to me.As for the noise evaluation, how do you plan to do the measurements? My oscilloscope only goes to 100MHz, so it won't capture USB 2.0 signaling that well. As far as noise is concerned, if any, it will just filter out. Thus I can't evaluate the electrical performance. So it has to be you, so please, feel free to test this out. I'm curious to see the results.Kind regards, Samuel Lourenço