bus capacitance - Page 1
Forum section: electronics / projects

author: Dan Moos
author_rank: Frequent Contributor
timestamp: July 04, 2016, 07:33:22 pm
content: I'm working on an I2C driver forr AVR for my own use/education. In reading the datasheet for the MCU, i noticed the suggested pull-up for the I2C bus lines is dependent on the bus capacitance.This isn't the first time I've seen bus capacitance referenced as an important variable in a datasheet or similar paper. I realize in my application, its not likely that bog a deal, but I'm mostly just curious how a hobbyist can determine this. To my eyes, there are just too many variables for it to be simple. Size of traces, clearances (on a double sided PCB, this to me would be tricky because its a 3d problem involving multiple traces), relative voltages on all the traces involved (a constantly moving target in many cases), and who knows what else that I haven't even considered.In a professional environment, is this aspect measured with an LCR meter, or is it calculated?As a hobbyist, is there a simple back of the envelope method? Like I said, I'm sure its not a huge deal in my project. I'm just trying to expand my knowledge.

author: ataradov
author_rank: Super Contributor
timestamp: July 04, 2016, 07:51:45 pm
content: In both environments you put some good approximation resistors (something in the rage 1 - 4.7 KOhm) and then check on the prototype that signals look OK and adjust accordingly.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 04, 2016, 08:18:15 pm
content: Traces aren't much of a big deal, because you probably don't have much of them!Traces, like cables, have characteristic transmission line impedances. Fancy words that simply mean: electrical signals introduced at one end, propagate along the conductors and reach the other end after a given delay. That's the electrical length. The impedance is the other important parameter: this says how much a signal will reflect off the end (incoming or outgoing), relative to what's connected to the transmission line at either end -- namely, termination. Reflection isn't a bad thing; it can be useful at times! Many practical systems are designed with this in mind.What does that have to do with slow stuff like I2C? If the signals are slow, and they'll have bounced around many times over the course of a given event (such as a falling edge), we can approximate that by reducing the transmission line to an LC circuit.What are the values of that? The time delay is:To = pi*sqrt(L*C)/2and the characteristic impedance is:Zo = sqrt(L/C)If you turn these around and solve for L and C, and run the numbers with some real examples, you may find that the L-per-length and C-per-length coincide with the physical constants mu_0 (1.257 uH/m) and e_0 (8.85 pF/m). The L/length is always lower, due to geometry (conductors closer together have lower inductance), while C/length is always higher (for the same reason, but also because insulators have a dielectric constant that multiplies it further).Typical wave-of-the-hand figures are around 0.3uH/m and 33pF/m, which is close to 100 ohm twisted pair, a good average example.If you don't know the characteristic impedance, it's unlikely to be much less than 50 ohms, or much more than 150. (Exact values can be computed based on the trace width, and its height over a ground plane ... you do have a continuous ground plane, right?) A trace length of 20cm is only a nanosecond, so if your falling edge is 5ns, that trace looks like an LC network, for practical purposes.How do you know if it's L or C? In fact, one is usually dominant. For I2C, it's probably conditional, meaning:- When any transmitter asserts a 1-->0 transition (turn-on from an open line condition), it turns on with a fairly low resistance to ground, maybe 30-80 ohms (this is typical of CMOS output pins). If this is less than Zo, then the line acts inductively for that event. Meaning: we have a series RLC circuit, were R is the pin output resistance, L is the line inductance, and C is whatever load is at the end of the line (i.e., logic input pins), plus the line's C equivalent, charged to an initial value of 5V. If R < sqrt(L/C), there will be undershoot at the far end of the line; to prevent this, add enough series resistance to the transmitter, so R is equal or greater. (It also matters if the source is fast enough: if it's not (following the To formula above), then there will be little undershoot, regardless of the impedance matching.)- Most of the time, you'll have a high value (i.e., much more than 150 ohms!) pull-up resistor slowly tugging on the line. If all transmitters are off (open collector/drain), the line acts as a capacitor (and there's really no high-current event at turn-off to excite the inductance, so we don't care about it here), and charges at the exponential RC time constant determined by the pullup and the line capacitance.So really all I needed to say was that last bit, that the RC time constant defines the rising edge and the pull-up value. But now you know how to calculate it, for almost any length of transmission line.Which, by the way, since the pull-up is so large compared to any practical transmission line: you can immediately tell that, too much length will lead to excessive equivalent capacitance, and the rising edge will take longer than a pulse width. This is the limiting distance for I2C. As the name suggests, it's really only intended for within-PCB signals. It's dubious enough (for other reasons) to put it in a short cable, say to an interface PCB. It's almost useless over any kind of length. For that, you need a proper signaling method, like RS-232, 422/485, any of the many LVDS (low voltage differential signaling) standards (USB and Ethernet included), and so on.Tim

author: m98
author_rank: Frequent Contributor
timestamp: July 05, 2016, 07:49:19 am
content: I use I2C in a "professional" environment, and just start at 10 k and lower the value when rise time becomes unacceptable.The EDA I use (TARGET 3001) also has some signal integrity analysis functions, where among many other parameters you can get the expected capacitance of a net. Then you can just use the shortest recommended signal rise time of one of the components to get the desired minimum cutoff frequency and solve the RC-lowpass equation for R.

author: Jeroen3
author_rank: Super Contributor
timestamp: July 05, 2016, 09:06:08 am
content: You know the capacitance of the devices on the bus. It's in the datasheet.You can guesstimate the capacitance of the traces using math, eg:Saturn PCB Tool.But in the end you'll perform empirical research to the resistor values.

author: Neilm
author_rank: Super Contributor
timestamp: July 05, 2016, 06:42:30 pm
content: Personally, I guestimate the required pull up from what is on the bus and ignore the connections unless the bus goes off the board. Then measure it to see if it is in spec and adjust if necessary. I have had the occasion to put small resistors in series to correctly control the rise