RLC parasitic extraction from layout - Page 1
Forum section: electronics / general

author: free_electron
author_rank: Super Contributor
timestamp: June 27, 2014, 09:51:27 pm
content: does anyone know a tool that can do that ?i am aware of FastCap and Fasthenry.The problem is creating input data. i want a tool that can read gerber or odb++ data . it is silly to have to try to recreate an entire layout in the fastcap format by hand...oh, and it has to be cheap. we don;t have any money.

author: KJDS
author_rank: Super Contributor
timestamp: June 27, 2014, 11:02:02 pm
content: Sonnet lite will meet the "free" requirement.https://www.sonnetsoftware.com/products/lite/It's far better to use it to analyze a selection of examples, eg a 4" 10 thou track, then a pair of them with 10 thou spacing and so on to build up a library to add to the spice model. It's the sort of chunk of work that I find best thrown at a summer student (intern) for a few weeks.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 28, 2014, 05:07:55 am
content: Only one I've heard of, Ansul's simulation suite. If you want to know the price, you should probably be sitting down...I don't see much point, myself. If you're advanced enough in design that 1. you're thinking about parasitics, 2. you've laid out the board being mindful of them, and 3. you want to close the simulation on only the most exact model, then... why not just guess? You're lucky if you can even find models for transistors and stuff, let alone anything nearly good enough for that level of precision. It's very easy to determine values by inspection and see if it works or not.Or if you'd like, I could inspect your board and add a crude approximation for you. But if you were looking for keywords like "free"....Tim

author: KJDS
author_rank: Super Contributor
timestamp: June 28, 2014, 10:31:09 pm
content: Cadence and Mentor Graphics are the two that I've most known used for this. Both are very expensive, not only in price per seat but also in the training required to use them.If you're looking from a more microwave/RF perspective, then either AWR or ADS is the way to go.When you start designing very high end systems and need to cram them into a small space, then it's well worth while doing.There's a little more info herehttp://www.mentor.com/pcb/hyperlynx/signal-integrity/

author: Marco
author_rank: Super Contributor
timestamp: June 28, 2014, 10:56:50 pm
content: Couldn't you get an intern to program a translator from ODB++ to whatever fastcap/imp expect and then add the extracted parasitics back into the netlist? Seems likely a reasonable project to abuse student interns with (of course student interns often get back at you for abusing them by being completely useless, gotta get lucky).

author: AlfBaz
author_rank: Super Contributor
timestamp: June 29, 2014, 02:43:27 am
content: Quote from: T3sl4co1l on June 28, 2014, 05:07:55 amThere in lies the irony.If you are a small outfit or a hobbyist, spinning a complex prototype board to test if you've mitigated these parasitics can be prohibitively expensive and the only software that can help by approximating these parasitics via simulation can cost a small fortune. Yet if you can afford these simulation programs then you could easily afford to spin and test real examples thereby not really needing them

author: G0HZU
author_rank: Super Contributor
timestamp: June 29, 2014, 12:40:36 pm
content: It might help if there was more info available from the OP wrt what type of circuit is going to be simulated and at what frequency. Sometimes an EM simulator isn't really needed and other times it is invaluable and can save a lot of time and frustration.However, if the circuit layout is fairly basic it may be possible to get good results with a basic linear simulator especially if it has models for microstrip and some common layout discontinuities. This approach can work well right through the UHF range.The downside is that it can take a long time to enter all the little models for the microstrip sections.The beauty of doing it all with a modern ($$$) EM simulator is you just draw the circuit schematic (with the each component model linked to its symbol) then create or import the PCB artwork and then use the combination of a linear simulator and an EM simulator to model the whole thing.Much quicker in terms of time taken to create the simulation and you only have to simulate the layout once. It can take minutes or hours to simulate the PCB layout depending on complexity but once this is done you can tweak the lumped components or the active components pretty much in in real time. In my experience this is the best way to accurately simulate RF circuits up at UHF/SHF. At work I use Agilent/Eagleware Genesys together with Sonnet EM to do the above.You could try and ask for a free 30 day trial of something like Agilent Genesys 2012. This has its own inbuilt EM simulator called Momentum but in my experience it isn't as accurate or as powerful as Sonnet EM for critical designs. But for maybe 90% of basic EM stuff it is just as good as Sonnet. It would take you most of the 30 days to get used to using the overall package though.

author: AlfBaz
author_rank: Super Contributor
timestamp: June 29, 2014, 09:53:19 pm
content: Here's a thread that may be worth looking throughhttp://www.edaboard.com/thread180440.html

author: free_electron
author_rank: Super Contributor
timestamp: June 30, 2014, 01:37:04 am
content: Hold it : the intent is NOT to run simulations in the tool !Here is the problem :i have a board that is driven from two IC pins.- We have the accurate spice model for the chip (since we made it)- we also have the interconnect model for the package.- We are driving a coil that sits a while away from the part. we have an exact model of the coil.the problem is that there are two traces that are routed differentially and are doing a few layer changes. what i need to extract is the parasitic capacitance and inductance created by the rest of the routing around these traces. i need to know the total stray capacitance of the tracks to ground (there is only ground) as well as the resistance and inductance of the traces and via's.the goal is to simulate the system including interconnects , integrated circuit .. everything.Second problem is that this inductor can be drawn as a trace on the board. ( multilayer inductor ) i want to know the parasitic inter-winding capacitance. and inter-layer capacitance. as well as the inductance of the coil. essentially i want to know the resonance point of this structure.So it is required that i can import the actual gerber data. The gerber file is plotted using real arcs and not an approximated trace.

author: KJDS
author_rank: Super Contributor
timestamp: June 30, 2014, 04:04:42 am
content: Sonnet Lite will work and is free, but it'll take some effort to get an accurate simulation.Alternatively, just build it and measure the board on it's own.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 30, 2014, 05:03:13 am
content: And what bandwidth are you interested in?If you're actually concerned about vias and layers, apparently you're doing >20GHz bandwidth with <1dB gain error. Which really makes me wonder if your "coil" model is correct, whatever it is -- even a very small "coil" will exhibit a vast number of dispersive modes in that bandwidth, probably needing 10k, even 100k of SPICE data. Needless to say, any simulation will run at a crawl; you're probably better off doing the sim in the E&M model directly (transient E&M), using a sufficiently streamlined model of the driver (or whatever it is). Or a simulator that interfaces SPICE and E&M directly.However, if your intent on bulk-equivalent stray capacitance and inductance indicates your bandwidth is significantly less than the electrical length of traces "a while away", I fail to see how an exceedingly detailed model could possibly benefit you.For more moderate gain-bandwidth ranges (say +/-1dB and up to 5 or 10GHz), I would be more than satisfied by simply using a SPICE transmission line or two. Should be able to arrange two or three in such a way as to emulate the differential and common mode impedance of a differential route.If you'd like, I could inspect your data and come up with some SWAGs.Tim

author: free_electron
author_rank: Super Contributor
timestamp: June 30, 2014, 01:31:03 pm
content: Quote from: KJDS on June 30, 2014, 04:04:42 amNot an option...

author: G0HZU
author_rank: Super Contributor
timestamp: June 30, 2014, 08:13:25 pm
content: Sonnet can output broadband SPICE models as lib files but this isn't something I would normally do myself.eg I could import your PCB gerber into Genesys, export it to Sonnet to simulate it and produce a 4 port s parameter model of your diff pair and then get Sonnet to convert this to a broadband SPICE model.Sadly, I don't think the Lite version of Sonnet can do these gerber import and file conversion functions. I use the full unlimited pro version of Sonnet at work and this can be used to convert s parameters to SPICE and then export a broadband SPICE model using bbextract. But as I said before, this isn't the way I would normally do things.The lib model will only ever be an approximation and you can control the errors during the conversion process but I guess the penalty will be the complexity of the lib file it spits out.Is this for an RFID application? If so, what frequency band is it for?

author: AndyC_772
author_rank: Super Contributor
timestamp: June 30, 2014, 08:47:40 pm
content: What's the tolerance in your PCB fabricator's process?Is it even worth doing the simulation if the real value will vary, say, +/- 20% from board to board or batch to batch?

author: G0HZU
author_rank: Super Contributor
timestamp: June 30, 2014, 08:50:04 pm
content: I had a read/play with Sonnet and it looks like you don't need the bbextract option in order to extract a broadband model directly from Sonnet.So it might be possible to do this bit in Sonnet Lite after all. But it will be a challenge keeping the memory requirements below 32Mb if you have a complex layout with lots of vias.Worth a try though...

author: xygor
author_rank: Regular Contributor
timestamp: July 02, 2014, 08:53:34 pm
content: Here's a field solver:http://mmtl.sourceforge.net/Still missing the piece that extracts the physical dimensions from the Gerber files though.

author: free_electron
author_rank: Super Contributor
timestamp: July 02, 2014, 09:06:12 pm
content: well yeah. that seems to always be the problem. none of these tools can read an exisiting geometry. bummer

author: xygor
author_rank: Regular Contributor
timestamp: July 02, 2014, 10:16:21 pm
content: The TNT part of MMTL allows one to do the design graphically. I am not sure if this is any less tedious than creating a text file.I don't know what COMSOL format looks like, but here is a MATLAB solution:http://www.mathworks.com/matlabcentral/fileexchange/36014-gerber-to-odb-pcb-tracks-converter-for-comsolI have not looked at it in detail.Maybe the matlab code can be tweaked to make what you want instead of making COMSOL. Maybe COMSOL format gets a step closer to fasthenry et. al. Or maybe not; just thinking out loud.I looked for a (free) solution to this years ago and it was on peoples' todo list. Still is! cf. eispice.Edit: Never mind. I totally misread what this is. It's gerber to ODB(X)++. May be useful for gerber parsing example, but this is nowhere near a complete solution.

author: G0HZU
author_rank: Super Contributor
timestamp: July 03, 2014, 10:48:11 pm
content: Quote from: free_electron on July 02, 2014, 09:06:12 pmThe full pro version of Sonnet can import gerbers directly (with the relevant option enabled) or indirectly via Genesys. I'm pretty sure Sonnet Lite can read project files from the full version of Sonnet and it can analyse them as long as they are below the 32Mb limit.So if you post up your gerbers for the diff pair and the printed coil I can import them into Sonnet Pro project files that can then be imported into the free Lite version.It looks like Sonnet can export broadband lib files (with an expensive option called bbextract) or it can export simpler models that are narrowband. Obviously it can also export the usual N port models. However, I've never used the Lite version of Sonnet to actually prove this can be done.