clock recommendation for Xilinx XCR3064XL (3.3v) or Altera Max 7000s (5v) CPLD - Page 1
Forum section: electronics / general

author: grips03
author_rank: Contributor
timestamp: March 30, 2014, 04:22:28 am
content: Looking for a clock recommendation for Xilinx XCR3064XL (3.3v) or Altera Max 7000s (5v) CPLDClock will be 60hz. Would be cool if time high is same as time low. For some reason 555 timer does not like doing that.thanks

author: JoeN
author_rank: Frequent Contributor
timestamp: March 30, 2014, 07:03:33 am
content: Provide a clock of any value divisible by 60 and divide it down within the CPLD. 12.000 Mhz crystal / 60 = divide by 200,000. Assumes you have the resources available. It will give you a very accurate clock, as accurate as the crystal.Something like this for 5V:http://www.ebay.com/itm/Valpey-Crystal-Oscillator-24MHz-5V-VF70BHT24-000MHz-DIP-8-Qty-4-/400272426272http://www.ebay.com/itm/FOX-F1100E-120-Crystal-Oscillator-12MHz-5V-TTL-DIP-14-Qty-4-/3011390163063.3V, search it out.Why do you need such a slow clock?

author: dannyf
author_rank: Super Contributor
timestamp: March 30, 2014, 02:39:50 pm
content: QuoteTo build the world's slowest computer?a 32Khz crystal + divider will work. Or a simple mcu.

author: grips03
author_rank: Contributor
timestamp: March 30, 2014, 03:06:43 pm
content: Quote from: JoeN on March 30, 2014, 07:03:33 am

author: SeanB
author_rank: Super Contributor
timestamp: March 30, 2014, 03:14:19 pm
content: You can make a 555 give a 120Hz output then divide by 2 in a 4013 chip to give 60HZ with equal on and off times quite easily. Otherwise a 4060 and use a RC oscillator to make some higher frequency and use the divider to get 60Hz.

author: grips03
author_rank: Contributor
timestamp: March 30, 2014, 03:47:51 pm
content: Your right 555 timer will work after all.I looked at the scope and pin 7 for the most part its 40 microseconds low, then 50 milliseconds high and then repeats. Its software controlled on the Genesis, so sometimes it high longer than this. For my purposes it should work ok.r1=72kr2=60ohmc=1uf

author: JoeN
author_rank: Frequent Contributor
timestamp: April 01, 2014, 05:15:45 am
content: Quote from: dannyf on March 30, 2014, 02:39:50 pmWhat simple divider solution could be used? 60 is not evenly divisible into 32768.

author: codeboy2k
author_rank: Super Contributor
timestamp: April 01, 2014, 09:34:32 am
content: Quote from: JoeN on April 01, 2014, 05:15:45 amNot simple, but possible in hardware32768 divide by 256 = 128 which is 8 more than you need for 120Hz. So drop 8 of every 128 pulses, or 128/8=16 so every 16th pulse of the 128Hz is gated out (dropped/swallowed). This gives 120Hz.Then divide the final output by 2 to get a 50% duty cycle at 60Hz. But this needs too much hardware... several counters and gates.It's really way, way easier with a small micro running an internal counter and dropping the needed counts.

author: JoeN
author_rank: Frequent Contributor
timestamp: April 01, 2014, 05:33:16 pm
content: Quote from: codeboy2k on April 01, 2014, 09:34:32 amOnce I needed a divide by ten million counter and I found this project, he's doing exactly what you are saying with this micro. Obviously you could provide a 12Mhz clock externally based on a crystal and divide by 200k. It would just require a small code change:http://www.leapsecond.com/pic/picdiv.htm