DS203 schematic - why is this feedback capacitor so large? - Page 1
Forum section: electronics / projects

author: m.m.m
author_rank: Regular Contributor
timestamp: August 08, 2021, 01:37:54 pm
content: I'm trying to design a simple analog input stage for a 7.2Msps oscilloscope. So I was reviewing some of the available designs on the internet. Then I found this schematic from DS203 (btw I'm not sure if that's actually the real schematic of it. but you can find it by googling "DS203 schematic"):So I was wondering if thisC9capacitor (in the schematic above, not below) which is in parallel with the feedback resistors is too large.As far as I know, its duty is to prevent from peaking in the frequency response of the amplifier.So I simulated one of the input channels & its amplifiers with LTspice XVII.Here's the schematic that I used in order to simulate both the 10x probe and the amplifiers:I've put a 0.2pF capacitor parallel with the feedback resistor to simulate the resistor parasitic capacitance.Here's the frequency response with only the 0.2pF capacitor:And when I use an additional 10pF capacitor in parallel with the feedback resistor just as in the schematic:You can clearly see that the frequency response doesn't already peak with the 0.2pF stray capacitance, and the added 10pF capacitor only reduces the bandwidth without adding any benefit.So to what extent can I trust my simulations? Can I conclude that the 0.2pF capacitance is enough?

author: ignilux
author_rank: Unknown
timestamp: August 08, 2021, 05:36:20 pm
content: Your simulation is missing critical details like stray capacitance at the output and/or inverting input of the amplifier.

author: m.m.m
author_rank: Regular Contributor
timestamp: August 08, 2021, 06:59:40 pm
content: Quote from: ignilux on August 08, 2021, 05:36:20 pmThank you for the reply,So I tried to add some stray caps in the simulation, and the frequency response got a lot worse :(Here's the schematic & results, but it still gets worse by adding extra capacitance in the feedback path.Is there anything else I have to include in the simulation?

author: esepecesito
author_rank: Regular Contributor
timestamp: August 08, 2021, 07:12:16 pm
content: If seems U3 can also put in parallel R19, so you will have less than 5k resistor, in that case the BW will be higher.

author: m.m.m
author_rank: Regular Contributor
timestamp: August 08, 2021, 07:18:17 pm
content: Quote from: esepecesito on August 08, 2021, 07:12:16 pmYes, you can choose the feedback resistance via the 74HC4052, so that the user can choose between nothing in parallel with 27k (10x gain), 22k in parallel with 27k (~5x gain), 5.1k in parallel with 27k (~2.4x gain), or even the 27k shorted (1x gain).But I'm trying to simulate the worst-case scenario here, which is a 10x gain, and optimize the circuit with that setting.

author: m.m.m
author_rank: Regular Contributor
timestamp: August 08, 2021, 07:52:52 pm
content: Quote from: m.m.m on August 08, 2021, 06:59:40 pmJust a quick update, I was able to cancel the poles introduced by the new stray capacitances that I added by adjusting the C4 (in my schematic)So here's the frequency response:But then I added the extra 10pF in the feedback path, and used a parametric sweep to see if there's any sweet spot for the C4 and here's the result:so as you can see again, with the added 10pF capacitance the frequency response only gets worse (at least in the simulation).So I have 2 more questions now:1. Is there any other parasitic element that I'm missing out?2. Are these types of simulations generally reliable? I mean how accurate are the op-amp models provided by the manufacturers (TI in this case)?

author: m.m.m
author_rank: Regular Contributor
timestamp: August 12, 2021, 01:56:29 pm
content: So I think I found the solution.I just added an analog switch (ADG658) to my simulation in order to choose between the feedback resistors, and just realized that adding the analog switch somehow introduces some zeroes in the frequency response, which results in peaking in the frequency response (@~15MHz).In order to cancel the peak, I had to add some extra capacitors in both amplifier stages' feedback paths.