How important is good signal termination? - Page 1
Forum section: electronics / projects

author: pyrohaz
author_rank: Regular Contributor
timestamp: February 23, 2016, 03:40:58 am
content: Hi all,I've designed two PCBs, a source PCB, containing a microcontroller and a destination PCB, consisting predominantly of an LCD display. I'm driving the LCD PCB from the microcontroller using the SPI bus and a 30cm IDC cable. My LCD supports clock frequencies up to 33.3MHz and I'm hoping to drive it with 21MHz.Having tested the two PCBs together with all parts working, I thought I'd scope out the LCD SCK input to see what the clock was looking like at the input to the LCD. Using my probe set to 10x to reduce loading, the overshoot was pretty magnificent with a peak to peak value of 6.4V (the system runs at 3.3V). Adding a 220 Ohm resistor at the LCD side to ground brings this overshoot to a completely reasonable level with the whole signal being 3.12V P-P.What I'm wondering is:As the system works reliably currently, do I need to worry about end termination, even though the overshoot is pretty large? What issues may arise in the future if I wasn't to terminate the LCD side PCB?I'm much happier to modify the LCD PCB compared to the source PCB (as this is much more complex and contains other circuitry etc.) so if required, should I look into active termination? I tried putting a BAT81 schottky diode from SCK to VCC and the effect on the overshoot was minimal - around 300mV reduction P-P. I also tried a 3V zener diode from SCK to GND but obviously the diode was way too capacitive and filtered the clock to a triangle wave!Thanks

author: John_ITIC
author_rank: Frequent Contributor
timestamp: February 23, 2016, 04:04:16 am
content: Check the absolute maximum input voltage on the LCD display. If too high, add series terminator on the driving side. It appears your scope has very low bandwidth since the reflections are not seen. Normally, you'll see very distinct overshoot that quickly dies out.

author: Dago
author_rank: Frequent Contributor
timestamp: February 23, 2016, 06:28:41 am
content: Also do not use the ground clip of a probe for high-speed measurements, the inductance of the ground clip will kill any ringing and thus will show something completely else than what is really happening on the bus. A good alternative for high-bandwidth measurements in a pinch is a 1k probe such ashttp://koti.kapsi.fi/jahonen/Electronics/DIY%201k%20probe/And like John_ITIC said be sure to use an oscilloscope with enough bandwidth and sampling speed. For a 20 MHz bus the risetimes should probably in the range of 5-10ns (or under) so something like at least 200 MHz.

author: tggzzz
author_rank: Super Contributor
timestamp: February 23, 2016, 10:20:03 am
content: Quote from: pyrohaz on February 23, 2016, 03:40:58 amThe clock frequency is more or less irrelevant; what matters is the edge transition time.QuoteYes. At best you may get occasional pattern-dependent and temperature dependent errors. At worst the overvoltage can weaken the receivers inputs or transmitters outputs.There are many references on the net describing different types of termination; which is relevant depends on your circuit.Also ensure there is a sufficient number of grounds in the cable, preferably surrounding the clock/signal lines.Make sure your probe technique is good, and don't use a 6" ground lead. FFI, see the references inhttps://entertaininghacks.wordpress.com/2015/04/23/scope-probe-accessory-improves-signal-fidelity/

author: Siwastaja
author_rank: Super Contributor
timestamp: February 23, 2016, 07:17:42 pm
content: First try a simple series resistor between about 30 and 100 ohm. Microcontroller output can source quite a lot of current into the "AC short" caused by the cable capacitance. This causes ringing in cable inductance as well as MCU power trace inductance. Resistance is the only way to limit the current if the MCU is not advanced enough to have active slope control.Surprisingly small series resistance helps avoid the peak and dampen the oscillation, while still keeping the edges quick enough to achieve signal rates such as 21 MHz. Using at very least the same resistance as the MCU CMOS output Rds(on) makes sense, which would be around 30-50 ohms.Or you could simply calculate the resistor so that you don't even briefly exceed the absolute maximum current value in the MCU datasheet; for example, the AVR species is (IIRC) specified at 40 mA, which at 5V would mean 125 ohms, so a 82-100 ohm resistor would be a great candidate including the Rds(on) in the internal IO structure. I'm pretty sure 100 ohm total external resistance won't slow the edges down too much for your 21MHz communication in a 30cm cable.Zener or diode protection is the wrong way to solve the problem; it just causes further current pulsing and oscillation. It's good to have against other problems, but always with some amount of series resistance.For best robustness against all kinds of errors, add around 47R of series resistance on both ends - the LCD module and the MCU side. Now the integrated protection diodes can do their job better.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 23, 2016, 08:24:20 pm
content: How long is the ribbon cable? What is the pinout?Measurements are mostly irrelevant if you are using an instrument under 200MHz, preferably 400.Tim

author: pyrohaz
author_rank: Regular Contributor
timestamp: February 23, 2016, 11:28:00 pm
content: Quote from: John_ITIC on February 23, 2016, 04:04:16 amThat’s a really good shout, I've looked at the datasheet and the input range is -0.4V to 3.6V. The overshoot is just over this so I think I'll need to look into some form of termination scheme. It is a relatively low bandwidth scope - a standard 70MHz hobby Hantek scope.Quote from: Dago on February 23, 2016, 06:28:41 amI feel that that might've been a contributor to the low bandwidth look of my results, I was using a flying lead soldered to a ground near the test point.Quote from: tggzzz on February 23, 2016, 10:20:03 amQuote from: Siwastaja on February 23, 2016, 07:17:42 pmI'm using an STM32F4 microcontroller and it does offer slope control on the output but changing this didn't seem to have much effect on the level of overshoot. I think I'm going have to definitely look into termination schemes.Quote from: T3sl4co1l on February 23, 2016, 08:24:20 pmThe ribbon cable is ~30cm and I've merely placed all the signals in the cable with no thought of placement i.e. I've not interlaced ground with every signal.

author: tggzzz
author_rank: Super Contributor
timestamp: February 23, 2016, 11:46:13 pm
content: Quote from: pyrohaz on February 23, 2016, 11:28:00 pmMake sure you understand the different characteristics of source termination and receiver termination.QuoteSuboptimum. Interlacing reduces crosstalk (which might or might not be a problem) and is a more controlled impedance (which reduces reflections and pattern sensitivity).In many cases crosstalk and pattern sensitivity can be made unimportant by reducing the transfer rate (i.e. clock MHz) so that everything has "settled down" by the critical instants. But to reduce overshoot requires slower edge rates - or preferably correct termination.Be aware that the inductance of a 6" ground lead plus the typical probe tip capacitance form a resonant circuit somewhere around 100MHz. That resonance will introduce overshoot, even in a well terminated line.

author: pyrohaz
author_rank: Regular Contributor
timestamp: February 24, 2016, 01:16:57 am
content: Quote from: tggzzz on February 23, 2016, 11:46:13 pmRealistically, I'd be happy to reduce the clock rate, 21MHz was the top end of my specification so going lower than that would be fine. Are ribbon cables ever used for high speed applications or should I switch to a better type of cable? My choice for ribbon cables with IDC connectors was due to ease of obtaining them.

author: tggzzz
author_rank: Super Contributor
timestamp: February 24, 2016, 01:47:52 am
content: Quote from: pyrohaz on February 24, 2016, 01:16:57 amRibbon cables are certainly capable of carrying those signals. But maybe, maybe not in this case; the devil is in the details. If it works sufficiently well, whatever that might mean, then it is OK.Given the choice, I would prefer to remove known and uninteresting failure mechanisms so I can concentrate debugging new and interesting features. Choose a decent termination, use the ribbon cable in ways that are known to minimise problems, and use scope probes correctly.BTW, have you calculated the load on the circuit at 70MHz (and above) using your *10 probe? If you haven't done it already, you will probably be unpleasantly surprised.

author: Siwastaja
author_rank: Super Contributor
timestamp: February 24, 2016, 07:04:21 am
content: If you have the option to reduce the clock rate, that's good; just use series resistors large enough (try 100R) to get rid of any problems. Then, if the edges are too slow to achieve proper communication because of the resistors, just slow down the clock rate.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 24, 2016, 07:24:23 am
content: Since the signals aren't interleaved, I'd suggest either doing so (use 33-100 ohm termination resistors at each pin driver/output), or using somewhat excessive termination resistors (say 100-470 ohms) and a lower clock rate (because now the data rate will be capacitance limited). The slower edges will couple less, ensuring better data quality, at the expense of speed.To test for the maximum usable clock rate, you can try increasing until it starts losing bits (use a fairly involved data pattern, like random chars/pixels, constantly being refreshed), then use less than half that clock rate for the maximum in operation. (If you have multiple displays and/or MCUs, try it with all to see what the maximum for each is, then take the lowest and halve it.)Tim

author: cowana
author_rank: Frequent Contributor
timestamp: February 24, 2016, 08:38:53 am
content: Quote from: tggzzz on February 24, 2016, 01:47:52 amThis is a very good point - while *10 probes are known as high impedance probes, it's not always the case at higher frequencies. A typical 500MHz rated probe (I've got one in front of me) is rated at 10M/8pF - while the probe may present an impedance of 10M at DC, this falls to 40 ohms at 500MHz! For analysing high frequency effects such as ringing, this sort of thing needs to be considered.

author: tggzzz
author_rank: Super Contributor
timestamp: February 24, 2016, 09:51:23 am
content: Quote from: cowana on February 24, 2016, 08:38:53 amStrictly speaking, that load as described won't affect the ringing. It will draw more current than expected from the circuit and. For usual circuit impedances, it will reduce the measured edge speed.The ringing is principally due to the inductance of the ground lead in conjunction with the scope probe capacitance. For a passive *10 probe, the only way of reducing the ringing is to move it to a higher out-of-band frequency - and that is done by having shorter ground leads with reduced inductance. That is definitely necessary for a 100MHz scope, but it might not be for a 70MHz scope.Personally I find a movable bayonet/spear tip the most convenient ground mechanism. For pointers to such commercial tips and measurements on a retrofittable homebrew tip, seehttps://entertaininghacks.wordpress.com/2015/04/23/scope-probe-accessory-improves-signal-fidelity/But for this purpose a "low impedance Z0 probe" is preferable, since it better, more than adequate, and more robust and cheaper than an active probe. The only disadvantage is that they are not differential. Seehttps://entertaininghacks.wordpress.com/library-2/scope-probe-reference-material/for theory and practice of probes, including homebrew Z0 probes and other attechment techniques, seehttps://entertaininghacks.wordpress.com/library-2/scope-probe-reference-material/

author: pyrohaz
author_rank: Regular Contributor
timestamp: February 24, 2016, 11:23:21 pm
content: Quote from: tggzzz on February 24, 2016, 01:47:52 amThe display works fine with no dropped pixels at all clock rates, I was more looking into this as a long term reliability issue, I wouldn't want to have this be a cause of long term issues.How would I go about calculating the circuit load with my x10 probe?Quote from: Siwastaja on February 24, 2016, 07:04:21 amThis may seem a stupid question but is it possible for me to include the resistor on the receiver side and not the transmitter side?Quote from: tggzzz on February 24, 2016, 09:51:23 amI most definitely need a better grounding procedure, I could do with getting some of those spring ground prongs, I've got a ground pin one across from the clock (ground, MOSI, SCK) so there is opportunity for a close grounding point. They're some good reads though, thank you!

author: tggzzz
author_rank: Super Contributor
timestamp: February 25, 2016, 12:15:22 am
content: Quote from: pyrohaz on February 24, 2016, 11:23:21 pmIt is just the standard equation for a resistor in parallel with a capacitor. The actual R & C values will be written on the probe.

author: joeqsmith
author_rank: Super Contributor
timestamp: February 25, 2016, 03:25:12 am
content: Edge rate vs physical length will determine if it needs to be treated as a transmission line or not.A couple of books I recommend are "High-Speed Digital System Design A Handbook of Interconnect Theory and Design Practices" and "High-Speed Digital Design A Handbook of Black Magic".

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 25, 2016, 04:21:01 am
content: Quote from: pyrohaz on February 24, 2016, 11:23:21 pmLoading is relative to the system impedance, which is determined by the pin output resistance (at low frequencies), or the transmission line (at high frequencies). Simple resistor divider rules apply, give or take.Note that a low-frequency approximation would treat the cable as a capacitance, but the impedance does not approach zero as frequency goes up. That's the magic of transmission lines!The same is true of the probe, which ultimately is a transmission line as well. It uses a lossy TL of particular impedance and length, so that high frequencies are attenuated by about 10x when driven with what's in the probe tip. (When in 1x mode (if present), the tip compensation network is bypassed, line losses dominate, and the cutoff frequency is around 10MHz!) The impedance, loss and equivalent capacitance determine what RLC network is needed for 10x compensation -- no, it's not simply a 9M resistor! It's more like 9M in parallel with (~10pF + 100 ohm) or something like that: the resistance increases HF loss if needed, and the cap allows the probe's impedance to smoothly transition from 9M to ~100s ohms over a long frequency range (~3kHz to 30MHz) while keeping a square step response (as measured from a voltage generator!).So, it follows that the probe looks like ~100s ohms in the "high frequency" range. This will have some impact on the cable -- but, with only a 100MHz or so scope, you wouldn't be able to tell the difference. (If you were getting bit errors, it might be enough damping to prevent errors, thus illustrating a case of "observer effect"...)It's also a good illustration that a "passive Zo" probe can do a better job: a 450+50 ohm resistor divider (450 ohms at the probe tip; the cable serves as the lower resistor, and can be any length of ideal 50 ohm cable, terminated at the scope) has a relatively low impedance at DC (several orders of magnitude worse than the usual probe!), but comes out significantly better at high frequencies. 500 ohms out of a 100 ohm system is only a 17% reduction in impedance (and thus a similar amount of damping, reflection, SWR, however you want to account for it). It's more than 10% (the general threshold of "not caring"), but not terrifically more: so, mind the difference and try to anticipate its effects, but what you see won't be terrifically far off from reality.QuoteYes, but it has to be a parallel resistor (to ground), which is obviously a bit of a problem!You can use an R+C where R is characteristic and C is >= 2.5 x C_line (which includes cable, trace and pin capacitances). But this is impractical for long lines and high clock rates, because it has a lowpass filtering effect and dissipates a lot of power (which is hard on the resistor, and even harder on the driver!).It's probably pretty reasonable here, as you'd only need maybe 47pF?If the clock rate is much slower than the RC time constant, then it will be fully charged/discharged every cycle, and the total ESR (includes pin driver and termination resistor) will dissipate P = (0.5 * C * VCC^2) * 2 * Fclk.Tim