SAMC ARM has the same drawback as legacy AVR - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 07:58:17 pm
content: i am reading through the counter documentation on the SAMC ARM and I am amazed to find that PWM mode in 16 and 32 bit mode has the sae limitation as the the old 8 bit AVR's, worse infact.In 8 bit mode the conter has a "top" value register. but in 16 bit mode there is no such register and the user is forced to use all 16 or 32 bits unless one of the compare match (PWM) channels is sacrificed so that it's compare register can be used as top. On the AVR it was the same but at least 8, 9, and 10 bit top values were also selectable.it's not an impossible situation but i thought ARM's were supposed to be all singing and dancing. I see bits literally thrown away as unused in 32 bit registers and yet they could not spare themselves another 8 bits to extend the period register to 16 bits (2 counters are ganged together for 32 bit operation so would have a 16 bit register each).at 48MHz 16 bits is 700Hz so it's a decent number but really surprised here.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 11, 2019, 08:16:46 pm
content: Quote from: Simon on August 11, 2019, 07:58:17 pmYes, a quite common syndrome.NXP tend to be better here, but some vendors get tangled up in either reusing old timers, or thinking a simple paste helps portability...- but one of my pet peeves is the 32b MCUs lacking 32b usability in the peripherals. Too many have just 16b timers, or worse, as you say here...NXP I think do 32b timers and 32b prescalers and Nuvoton do 24b timers and 8b prescalers which I think is a more practical middle ground for a vendor worried about gate counts.

author: langwadt
author_rank: Super Contributor
timestamp: August 11, 2019, 08:21:22 pm
content: Quote from: Simon on August 11, 2019, 07:58:17 pmARM is just the CPU, peripherals are vendor specific some ARMs have all singing and dancing timersunused bits in a register doesn't mean those bits are wasted, it is more likely that the bits don't existadding bits to a register and a compare cost actual hw

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:26:19 pm
content: But this is not even a copy of those AVR timers, it's a totally different , they could just not be bothered to have a 16 bit PER register which is nuts and retrograde when another setup register is 32 bits and only uses 1 byte!I can understand the 16 bit counter rather than 32 bit. The CPU is designed by ARM but the peripherals are done by the vendor. I don't have a problem with 16 bits and ganging two together if I am desperate for a 32 bit counter which I am not as even at 48MHz it will take over a minute to roll over so use of 32 bit instances are going to be rare.

author: ataradov
author_rank: Super Contributor
timestamp: August 11, 2019, 08:27:09 pm
content: You are being compensated by having A LOT more timers.Also, SAM L10/L11 address this issue and there is PER register in all modes. The same timer peripheral will be propagated to new devices in due time.Yes sure, it would be nice to have the hardware that does exactly what you need it to do at that exact moment, but it does not work that way on any architecture or vendor.

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:27:51 pm
content: Quote from: langwadt on August 11, 2019, 08:21:22 pmbut a measly 8 bits? I mean cmon, a major product limitation over 8 bits? take it out of the program memory if they are so precious.

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:30:47 pm
content: Quote from: ataradov on August 11, 2019, 08:27:09 pm8 bits, that is all that was needed and I'd be happy loosing a whole counter instance for it if it doubles the outputs. i mean this is not about saving 8 bits, it feels like some lame ass marketing move to push us onto bigger and more complex chips that really do not do what i want. SAMC's are just perfect for the auto sector, 5V operation, dual CAN bus, what more could one ask for in a project that is not a smart phone - 8 measly more bits......

author: ataradov
author_rank: Super Contributor
timestamp: August 11, 2019, 08:34:25 pm
content: Things don't just happen. The peripherals that SAM C uses were designed before Cortex-M0+ core was used. That's why they all have strange 8-bit registers and stuff like that.Over time peripherals are improved and put into new MCUs. There will always be legacy stuff, and you just have to live with that. Designing and putting into production new peripherals is actually a lengthy process.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 11, 2019, 08:38:32 pm
content: Quote from: Simon on August 11, 2019, 08:30:47 pmYes, it does smack of laziness, and the fact Atmel/Microchip are fixing this in newer parts, shows you are not alone in giving then stick about this.Chaining timers kludges I expect on a 8 bit MCU, but not on a 32b one....

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:39:44 pm
content: Well these are not AVR counters so where did they come from? and they are less than the AVR counters. I am just stunned that they did this, I mean why put a PER register in at all, and having decided to put one why not make it the same size as the native and default counter size?16bits is not a huge issue as i said. it yeilds frequencies of 700Hz and down but I still fail to get over the sheer stupidity of it. Where they trying to stop say motor drivers being developed? 8 bits is probably a bit lame for motor drivers but 16 bits is too slow, but 9 or 10 bit would work.

author: ataradov
author_rank: Super Contributor
timestamp: August 11, 2019, 08:40:56 pm
content: On Cortex-M0+ parts silicon area is actually a concern. So I would not expect to see 6 full 32-bit timers anyway. It really does drive the price of the part up.I know we all have a dream chip, but that just does not happen.

author: langwadt
author_rank: Super Contributor
timestamp: August 11, 2019, 08:41:07 pm
content: Quote from: Simon on August 11, 2019, 08:26:19 pmjust because a register looks like it is 32 bit doesn't mean that there actually is 32 bitsyou could give every bit its own address

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:41:31 pm
content: Quote from: PCB.Wiz on August 11, 2019, 08:38:32 pmI really don't mind chaining timers, at 16 bits you are rarely going to want more and another time can be sacrificed to make a 32 bit one if you really need one. But a decent 16 bit timer is a must and even the 8 bitter get that right.

author: ataradov
author_rank: Super Contributor
timestamp: August 11, 2019, 08:42:53 pm
content: Quote from: Simon on August 11, 2019, 08:39:44 pmThey were designed for an unreleased architecture. Again, designing this stuff takes years. And market shifts during those years. In this case Cortex-M0+ core came along, and plans changed.

author: Simon
author_rank: Unknown
timestamp: August 11, 2019, 08:44:21 pm
content: Quote from: langwadt on August 11, 2019, 08:41:07 pmThere are plenty of 8 bit and 16 bit registers with holes in them too. No none of thu bits have addresses as they are humble setup registers. Unless you can miss bits out in the smalest block you can address they gained nothing.

author: langwadt
author_rank: Super Contributor
timestamp: August 11, 2019, 09:15:53 pm
content: Quote from: Simon on August 11, 2019, 08:44:21 pmonly the bits that are used exist, it is hardware

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 11, 2019, 10:36:47 pm
content: Quote from: ataradov on August 11, 2019, 08:42:53 pmHeh, anyone familiar with AVR32? Maybe that's where it came from, or what they were working on before they moved to ARM.Tim

author: ataradov
author_rank: Super Contributor
timestamp: August 11, 2019, 10:39:40 pm
content: Quote from: T3sl4co1l on August 11, 2019, 10:36:47 pmI'm not 100% sure of the actual history of those peripherals. AVR32 used all 32-bit registers, so it was not it. It would have been something different, probably continuation of Xmega line. I don't know the timelines for all of that.Or may be it was designed for Cortex all along, but since it was done by the 8-bit people, they chose to do 8- and 16-bit registers.

author: ogden
author_rank: Super Contributor
timestamp: August 11, 2019, 10:52:10 pm
content: I do not get those rants "my MCU does not do this or that". It's like "my car does not reach X speed or Y mileage". Well... it does not. You can blame *yourself* that you did not chose right tool for the job. Don't blame the tool.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 12, 2019, 12:04:43 am
content: Quote from: ogden on August 11, 2019, 10:52:10 pmWell, yes.That's why I point out the vendors whodooffer 'the right tools for the job'...Some MCU suppliers do this better than others.

author: techman-001
author_rank: Frequent Contributor
timestamp: August 12, 2019, 03:11:02 am
content: Quote from: ogden on August 11, 2019, 10:52:10 pmI can see Simon's point, he bought a 32 bit chip and expected more. It's a complex chip and perhaps Simon hadn't read all the copious reference PDF before purchase ?To continue your car analogy Simon bought the 32 cylinder Atmel/Microchip car and just assumed it would have a AM/FM radio but they cheaped out and it's AM only.Simon should have bought a proper STM32 cylinder car.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 03:12:47 am
content: Yeah, STM timers are not the greatest either, so I would not be too excited here. There will be different kinds of complaints, but there will be plenty.

author: ogden
author_rank: Super Contributor
timestamp: August 12, 2019, 05:18:45 am
content: Quote from: techman-001 on August 12, 2019, 03:11:02 amYou nailed the problem. Thing is that 32 "cylinders" does not guarantee anything. We talk about SAMC which is Cortex-M0+ based ARM - chip class where most of the bloody price competition wars happen. This class is so price-optimized that you have to read specifications well because in car analogy there could be no passenger seats nor wheels included.That's why stm32 community make so many designs using overkill stm32f4 chip - because it is packed with virtually everything stm32 chips can have. When you are finished with your build and understand kinds and number of peripherals you need, RAM and FLASH and CPU resources - then you look at the lower series of the stm32 chips.When you lived all your life in the Arduino world and suddenly wake-up in front of Mouser ARM MCU page which has 11137 various offers (today), you have to think why it is so in free market where offer is consumer-driven.Quote from: ataradov on August 12, 2019, 03:12:47 amLOL, yes. You may solve timer capture register count problem but run into another For me most annoying stm32 problem is - clock subsystem. Try to run ADC directly from crystal oscillator source while PLL with it's **ing jitter is running - you can't.

author: Jeroen3
author_rank: Super Contributor
timestamp: August 12, 2019, 05:58:39 am
content: I guess most vendors just pulled a timer from the Synopsys library they bought anywhere in the last century and just keep using it.

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 06:32:37 am
content: As i said I can work with it I'm just stagered they did it, I am reading through the documentation now to find out how it works. 8 timers all locked at set frequencies unless a channel is lost. As I also said if they were concerned about cost I am sure users would opt to loose 1 timer and guarantee full flexibility on 2 channels of what is left not just 1. So SAMC has up to 8 timers, if I need a specific frequency I only have 8 outputs. If they dropped a counter and added 8 bits more to 7 registers I would have full flexibility on 14 channels, that's a bit more than 8 eh? that's all i am saying, the decision defies logic.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 06:38:17 am
content: Have you seen the difference between TC and TCC? TCCs are much more flexible and capable.And yes, it would have been nice if all the things were perfect from the beginning. Imagine how the world would be different if Intel made i9 right away instead of 4004.

author: Siwastaja
author_rank: Super Contributor
timestamp: August 12, 2019, 06:38:38 am
content: Quote from: Simon on August 11, 2019, 08:44:21 pmWhen they design the hardware (writing in a HDL, hardware description language), even if they leave a hole, the logic synthesis tool will simply optimize the unused flipflops and all unused wiring away. So having a large register, even with holes in it, doesn't mean any wasted die area.Why are the registers all over the place? Poor planning, multiple design revisions, requirement of software compatibility, even to internal, non-released product revisions, etc.It's a pity the most basic peripherals like timers, uarts, SPIs, etc. do suck. You could do a clean-sheet redesign in days or weeks; instead, forcefully "reusing" inferior, bloated designs for years is likely more expensive in the long run, but the management tends to work on the basic assumption that reuse is always a good thing, and sometimes this assumption is just wrong, especially if you calculate the customer's total cost of ownership.They also assume that the customer benefits from "software compatibility", but this is a fallacy because you most often won't have that anyway - having 5 different poor, bloated timers is no better than having 10 different timers that have evolved properly to be simpler and more effective than the previous ones, by breaking compatibility on purpose.

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 06:41:34 am
content: Quote from: ataradov on August 12, 2019, 06:38:17 amNo I have not got there yet. But begs the question again, if they wanted to save precious die make all the timers damn good and have less of them overall so you don't end up having a bigger chip to get more of the timers you need. Or was that marketing again.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 06:43:08 am
content: You generally want more independent timers. Adding channels to the same timer block is a compromise to save die area. So having less of them is not a good idea.The problem is that things change a lot even with process node. A thing that is great on 110 nm is not so great on 55 nm, and vice versa. But the design takes into account possible dies shrinks in the future. It is not easy, and not a lot of things happen on accident. It is a really hard multi-variable optimization problem.And yes, it would be cool to do a clean slate design. But that will be expensive and will take years. And after you fix all the bugs, you will end up with the same problem all over again.Have a look at TCCs. They are exactly what you need.

author: boB
author_rank: Frequent Contributor
timestamp: August 12, 2019, 06:53:53 am
content: Do you really want to have PWM at such a low frequency ?I would be really happy if I could get even 16 bits worth of resolution above 20 kHz without having to go to a HRPWM processor peripheral.If you just want slow, the the prescaler should allow that.Some of the STM32 parts allow you to have one timer trigger another timer for longer counts if you want.

author: techman-001
author_rank: Frequent Contributor
timestamp: August 12, 2019, 06:55:26 am
content: Quote from: ataradov on August 12, 2019, 03:12:47 amNot from me ... is my STM32 bias showing I wonder ?Seriously, I think the subject of "counter/timers" is almost too complex to debate, given the sheer number of configurations possible.Even the lowly STM32F051 (cortex-m0) has :-8 Timers with132 registers and573 associated bitfieldsThere are years of experience needed before one would consider himself a expert on the timers in this chip alone in my opinion.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 07:03:45 am
content: Quote from: techman-001 on August 12, 2019, 06:55:26 amI personally not a fan of all those timers being totally different.If you look at the same STM32F051:TIM1 - Advanced-control timersTIM2 and TIM3 - General-purpose timersTIM14 - General-purpose timer (different to TIM2 and TIM3)TIM15/16/17 - General-purpose timers (again different to all others and even between themselves)TIM6/TIM7 - Basic timerI'm not complaining. I've seen so many microcontrollers, that I just roll with whatever I get at this point. But it would be nice to have some universality.

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 07:04:07 am
content: Quote from: boB on August 12, 2019, 06:53:53 amThe problem is that it limits the frequency because you have to do all of the 16 bits so you can't do 10 bits with almost 20KHz.As it happens for what I do 700Hz is fine but it's inflexible and i can only go down. I usually drive fans that want 100-500Hz drive.

author: ogden
author_rank: Super Contributor
timestamp: August 12, 2019, 07:10:59 am
content: Quote from: Simon on August 12, 2019, 06:32:37 amIt is so with any timer of any MCU. - Either you let it roll-over or you "waste" register to reset it.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 07:12:56 am
content: What he wants is multiple compare channels in the same timer that are at least 16-bits. That is exactly what TCC is.

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 07:13:59 am
content: Quote from: ogden on August 12, 2019, 07:10:59 amnot really, in old AVR they gave different roll over options and in this case in 8 bit mode there is a register for it, that is the confounding thing, that actually did it but only made it 8 bit not 16 but hde funtionality is all there - what a waste.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 07:16:01 am
content: There is no waste. Adding 8 more register bits will increase the area. It is a lack of a feature that you like, but not a waste by any means.Would it be better is PER register did not exist even in 8-bit mode?

author: techman-001
author_rank: Frequent Contributor
timestamp: August 12, 2019, 07:40:45 am
content: Quote from: ataradov on August 12, 2019, 07:03:45 amI'm with you there, that's the thing about timers/counters ... their variations are legion.Remember the good old Motorola 6840 Programmable Timer Module (PTM) ?We complain now about timer/counters inside a MCU and we don't even have to connect them like we did with the 6840 plus supply a clock, chip select etc!PLUS: these were about $25 each in my day.From the old MC6840, 28 pin DIP package, Timer Counter chip PDF:-------------------------------------------------------------------------------------------The MC6840 is a programmable subsystem component of the M6800 Family designed to provide variable system time intervals.The MC6840 has three 16-bit binary counters, three corresponding control registers, and a status register.These counters are under software control and may be used to cause system interrupts and or generate output signals.The MC6840 may be utilized for such tasks as frequency measurements, event counting, interval measuring, and similar tasks.The device may be used for square wave generation, gated delay signals, single pulses of controlled duration, and pulse width modulation as well as system interrupts.MODES---------Continuous Operating Mode: Gate 1 or Write to Latches or Reset Causes Counter InitializationFrequency Comparison Mode: Interrupt If Gate ~ is< Counter Time OutContinuous Operating Mode: Gate 1 or Reset Causes Counter InitializationPulse Width Comparison Mode: Interrupt if Gate ~ # Is< Counter Time OutSingle Shot Mode: Gate J or Write to Latches or Reset Causes Counter InitializationFrequency Comparison Mode: Interrupt If Gate ~ Is> Counter T!me OutSingle Shot Mode: Gate I or Reset Causes Counter InitializationPulse Width Comparison Mode: Interrupt If Gate $ ~ is> Counter Time Out

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 07:52:13 am
content: what I am saying is that unless you want 8 bits specifically all of the circuitry for the PER register and it's interaction with the peripheral was a waste. the lowest you can go on maximum clock is 183Hz, any further reduction in bits at 8 bit just puts the frequency up. You are limited in options. 16 bit gives you much more flexibility, because you can afford to discard resolution for accurate frequency. Another 8 bits is all it needed to make them fully featured.But at the end of the day it can be done in single channel mode.

author: jfiresto
author_rank: Frequent Contributor
timestamp: August 12, 2019, 08:27:03 am
content: Quote from: ogden on August 11, 2019, 10:52:10 pmThe problem with that reasoning is that can be difficult to impossible to discover all the gotchas and their consequences while selecting a part. To say nothing of the loss of valuable development time.How much outside incompetence must you assume and accept, when you are selecting a part, to be sure you can still realize a design?

author: techman-001
author_rank: Frequent Contributor
timestamp: August 12, 2019, 09:05:03 am
content: Quote from: ogden on August 12, 2019, 05:18:45 amIt's probably easier to select a new car than a new microBeing a Forth user I started at the bottom with Cortex-M0, namely a STM32F051 when I bought 480 of them from Avenet for $0.56 USD each in 2014. They are feature packed in a UFN32 package, small but still hand solder-able. I've been using and learning about them for 5 years now and feel I've covered about 60% of the peripherals in some way.I started with PACE in 1975 using Assembler then decades later jumped from PIC to STM32 and avoided Atmel and Arduino altogether.You're right about the stm32f4 chip it has:80 peripherals1453 registers11811 bitfieldsIn case anyone is wondering, here are the 80 peripherals in a STM32F437x :ADC1ADC2ADC3CAN1CAN2CRCCRYPC_ADCDACDBGDCMIDMA1DMA2EXTIEthernet_DMAEthernet_MACEthernet_MMCEthernet_PTPFLASHFMCGPIOAGPIOBGPIOCGPIODGPIOEGPIOFGPIOGGPIOHGPIOIHASHI2C1I2C2I2C3I2S2extI2S3extIWDGNVICOTG_FS_DEVICEOTG_FS_GLOBALOTG_FS_HOSTOTG_FS_PWRCLKOTG_HS_DEVICEOTG_HS_GLOBALOTG_HS_HOSTOTG_HS_PWRCLKPWRRCCRNGRTCSDIOSPI1SPI2SPI3SPI4SPI5SPI6SYSCFGTIM1TIM10TIM11TIM12TIM13TIM14TIM2TIM3TIM4TIM5TIM6TIM7TIM8TIM9UART4UART5UART7UART8USART1USART2USART3USART6WWDG

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 11:42:43 am
content: Quote from: jfiresto on August 12, 2019, 08:27:03 amPrecisely, I can tell you without looking that the head line specs are dual channel 16 bit counter which one could assume has so flexibility in it, like the AVR's that at least allow you to choose an intermediate resolution. I coded something the other week where I needed up to 10 bits but was stuck with 8 because I was using the arduino for speed. Luckily the way the transfer characteristics of the fan's PWM input worked meant that 1 bit was 1% with 1 bit to spare so was sor of doable but ideally i needed more resolution to get better fitting numbers but 16 bit would have been overkill.

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 12:03:36 pm
content: Just reading the TCC section. I assume it's 24 bit with a 18 bit PER register. I'm guessing because it does not actually state it anywhere and I'm counting bits in the register.Really this is the worse datasheet I have ever read. The english is sometimes not intelligible and I guess what they meant and they can't even start the TCC intraduction by saying: "this is a 24 bit counter". But yes it does sound like they are very good at with 3 counters at 4 channels each very useful.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 12, 2019, 12:56:50 pm
content: Quote from: ogden on August 12, 2019, 05:18:45 amI'm fond of noting to my colleagues at the office, that the thing canrun DOOM. Sadly most of the applications we've had lately are headless embedded applications, boring stuff that's all serial, GPIO, ADCs and such (and usually not with much memory either). Reallyreallyoverkill using a 32F4 for the most part, but our customers are usually modest quantity and not so price conscious, and so again we can save some development time by having so much power available.Tim

author: NorthGuy
author_rank: Super Contributor
timestamp: August 12, 2019, 02:10:27 pm
content: I think they just tried to be compatible, so that a program written for AVR could be re-compiled without modifications. This is supposed to "ease up" migration.When Microchip designed 16-bit PICs, they mimicked all the assembler commands from 8-bit PICs even though they didn't fit the design well. I think this was done for the sake of compatibility. They probably have realized how silly this looks, so they changed the assembler mnemonics before the release. But if you look closely, the full set of the inherited WREG-based commands is still there.

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 03:46:09 pm
content: Quote from: Simon on August 12, 2019, 12:03:36 pmIt would not make sense to create CC registers that are bigger than PER register. All registers are 24 bits. Some bits just change their meaning if dithering is used.But keep in mind that different instances of TCC have different number of channels as described in the Table 6-9. "TCC Configuration Summary".

author: Simon
author_rank: Unknown
timestamp: August 12, 2019, 05:32:14 pm
content: Quote from: ataradov on August 12, 2019, 03:46:09 pmWhat like they did with TC counters?

author: ataradov
author_rank: Super Contributor
timestamp: August 12, 2019, 05:34:08 pm
content: Quote from: Simon on August 12, 2019, 05:32:14 pmTC counters have different modes. In 8-bit mode they behave one way, in 16-bit mode they behave a different way. TCC have only one mode.

author: JOEBOBSICLE
author_rank: Regular Contributor
timestamp: August 12, 2019, 06:55:03 pm
content: Quote from: T3sl4co1l on August 12, 2019, 12:56:50 pmIn terms of engineer time , a decent embedded engineer costs about 100 32F4s a day. Potentially more...Basically pointless to skimp on MCU these days unless you are making > 10,000 units a year when you can save so much development time by not worrying about Flash space and optimizing a motor control loop.

author: MT
author_rank: Super Contributor
timestamp: August 12, 2019, 09:04:45 pm
content: Quote from: ataradov on August 12, 2019, 07:03:45 amI would argue those timers even the 32bitter are the same on logic level, while ST just functionally reduced them as to portray them as different. Bad marketing move id say. How much chip floorplan do they save between say a T15 and T16/T17 for instance.Most area on a eg STM32F103V seams to be memory while pheripherials are tiny.https://upload.wikimedia.org/wikipedia/commons/thumb/8/89/STM32F103VGT6-HD.jpg/616px-STM32F103VGT6-HD.jpg

author: techman-001
author_rank: Frequent Contributor
timestamp: August 12, 2019, 09:35:46 pm
content: Quote from: MT on August 12, 2019, 09:04:45 pmThe STM32F103 was ST's first 32 bit ARM, released in 2007 and a lot has changed in 12 years.For a STM32F051:TIM122 registers127 bitfieldsTIM220 registers107 bitfieldsTIM320 registers107 bitfieldsTIM1412 registers27 bitfieldsTIM68 registers13 bitfieldsTIM1518 registers78 bitfieldsTIM1616 registers57 bitfieldsTIM1716 registers57 bitfields