How much stray capacitance in this? - Page 1
Forum section: electronics / projects

author: alank2
author_rank: Super Contributor
timestamp: June 22, 2020, 09:29:12 pm
content: I had planned on using a 12pF RTC crystal, but the datasheet says it is optimized for 6pF crystals. It is MCP7940N. It mentions that CL=(CX1*CX2)/(CX1+CX2)+Cstray, but I'm not sure how to calculate the stray capacitance. I saw some estimates online of 3-8 pF. I've attached a picture of the layout, it has its own ground pour top/bottom layer, but both the traces to the crystal are pretty short 0.2" or 0.3" ish.

author: bob91343
author_rank: Super Contributor
timestamp: June 22, 2020, 10:01:58 pm
content: You can't calculate stray capacitance. You can estimate it based on experience; about 1 or 2 pF per inch of twisted pair wire, for instance.Having said that, most crystal frequencies I have measured are painfully inaccurate. Further, they are riddled with spurious responses.I put a signal generator signal into a counter and oscilloscope with a crystal between (either series or parallel) and carefully vary the frequency to get a null or peak. Results usually are disappointing.I fail to understand why crystals are usually specified at parallel resonance with a specified capacitance in parallel. It seem that a better characterization would be to use series resonance, as that isn't controlled by strays.

author: alank2
author_rank: Super Contributor
timestamp: June 24, 2020, 08:05:19 pm
content: How important is a top pour? Can you do a crystal layout with just a bottom pour that is its own separate thing? If that is workable, then do you just connect the two bottom pours (crystal, main) together at one small point?

author: bob91343
author_rank: Super Contributor
timestamp: June 24, 2020, 08:36:36 pm
content: There is no simple answer. You must evaluate the paths and see where the signal goes and make sure it only goes where you want.

author: temperance
author_rank: Super Contributor
timestamp: June 24, 2020, 09:29:22 pm
content: A requirement is to minimize stray capacitance between the input and the output of the oscillator. A better solution which is also easier to implement is a guard ring.You can see how this is being done on page 46 in the following app note:https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8af-al-s-stm32-mcus-and-mpus-stmicroelectronics.pdf

author: alank2
author_rank: Super Contributor
timestamp: June 25, 2020, 12:23:58 am
content: I read the PDF, thanks. I replaced the top pour with a guard ring.The capacitor grounds and connected to the bottom pour which is isolated from the main ground pour. Then it is via stitched to the top guard ring which goes around the crystal and the cap. The guard ring then goes to the RTC ground and connects the bottom pour to RTC ground as well. I also ungrounded the mounting wire to hold it down per the PDF leaving the metal case ungrounded.Should I extend the top a little higher to put the entire crystal inside of it?Should the caps be isolated with a guard ring as well? It looked somewhat like that in the PDF, but I couldn't tell for sure.How does this look?

author: floobydust
author_rank: Super Contributor
timestamp: June 25, 2020, 02:26:20 am
content: Um, read theMCP7940 silicon erratabefore designing it in. The part is cheap for a reason.

author: srb1954
author_rank: Super Contributor
timestamp: June 25, 2020, 06:26:40 am
content: The silicon flaws in this chip are so serious I wouldn't use it no matter how cheap it was. The engineering cost of debugging any design based on this chip would far outweigh any BOM cost savingsIt also doesn't say much for the manufacturer's product testing that it took up to 4 years after it was initially released before they found and documented issues 3 and 4, both of which are very serious and must have caused considerable frustration for anyone trying to debug an product using this chip.

author: alank2
author_rank: Super Contributor
timestamp: June 25, 2020, 12:07:51 pm
content: Wow, you guys aren't kidding, that is some errata.What are the alternatives for a PDIP8 i2c RTC? DS1307 ? Anything else?This is for a hobbiest type project where it isn't critical, so it may still be workable.Issue #1 can be avoided if you follow what the datasheet says and don't try to change the time with the oscillator started.Issue #2 can be avoided by not using either the trim feature or the alarm feature.Issue #3/4 can be avoided by only setting the time when stopped and then rereading back the registers to make sure they were written correctly before starting the time. If they were not rewrite them. Only an issue when setting the time, or when trying to clear the PWRFAIL bit. I question the lack of wisdom in making bits like PWRFAIL part of the weekday so you can't clear them without rewriting a field that might change (weekday) if the time is running.If I use the DS1307 instead, it lacks trim all together so issue #2 is a non issue because if you don't use it no problem. It also lacks the alarm or pwrfail stamping, so again, if you stop the time like the datasheet says, set it, read it to make sure it set properly, then start it, I'm not sure the DS1307 has as much to offer for 4 times the price.The PWRFAIL is the one that annoys me though. Issue #4 could occur if you write it (to clear pwrfail) while the oscillator is running. The problem with writing it when the oscillator is running is that you could be on the edge of it changing and writng the wrong value (yesterday). You don't want to stop/start the clock every time you turn the unit on and PWRFAIL is set either because it would eventually lose time. I suppose the only thing to do is read the time, make sure you aren't in the window of a day rollover (such as within 2s of it) and update it while running. If within 2s, then delay until it rolls over, then change it. The 2s could be much shorter, maybe just 1s, just look for a time of 23:59:59 and delay 1s if found. They should have put this flag somewhere else if it has to be commonly cleared!What do yo guys think about the layout in my previous message? I tend to avoid crystals because I don't like how careful you have to be when laying them out.

author: alank2
author_rank: Super Contributor
timestamp: June 25, 2020, 01:08:57 pm
content: Also, for the separate pour on the bottom layer, there is really on reason to exclude the two crystal pins in the DIP8 from it, right? I don't really need to have it cut up and around those two pins?