Impedance controlled traces and attached components - Page 1
Forum section: electronics / general

author: swmcl
author_rank: Contributor
timestamp: March 25, 2022, 04:20:48 am
content: Hi,I'm trying to design a pcb for an Ethernet application and the circuit I'm using has series resistors in impedance controlled traces and also other impedance controlled traces have decoupling caps (12pF) to ground and pull-up resistors.Q1. How does one go about attaching the components to the trace ? Does one use a small trace from the component pad to the actual signal trace so as to avoid the signal trace going through the pad ? I assume this is right because a component pad would introduce an impedance anomaly right ?Q2. The location of the pull-up resistors would be where on the trace ? Same goes for the decoupling caps too.I am using the latest Kicad on Linux.Are there and pdf documents that could help ?Cheers,Steve

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 25, 2022, 06:14:04 am
content: Better to connect through diagonal corners. The stub shown is almost so short it's hard to fab, and the effective notch-down between trace and pad is particularly discontinuous.But you'd only notice such discontinuity at, like, 40GHz.It might not be pretty at all frequencies, but you have to look very close indeed (picosecond time scales) to tell for sure!And at lower frequencies, it really doesn't matter, it just manifests as some lumped capacitance corresponding to pad area. Which is not much, and I guess you need extra capacitance anyway (for filtering?), of which the pad capacitance is merely a rounding error to the capacitor tolerance.So, the situation is more or less irrelevant. Do what looks best!Ethernet isn't very demanding on bandwidth: low 100s MHz, so stub lengths of somecmare acceptable; indeed, necessary -- consider the lengths of the PHY side windings of a typical 10/100 transformer. (Typical 1G transformers/PHYs however use a balanced driver, making the stub length irrelevant, nice.) Best practices are always nice of course, for when it does matter -- USB high speed modes, PCIe, etc.Note that, most board-level high-bandwidth protocols, have mitigations in place: fairly generous thresholds (true of most digital logic, really), preshoot/overdrive, automatic frequency response compensation and echo cancellation, input stages with hysteresis and edge blanking (i.e. to ignore ringing following an edge), clock recovery/synchronization, error correction, etc. etc. Usually not all of these are applied, I think, but a good set of them, like DDR3 memory, or 4 or something (it's been a while since I looked it up TBH) has overdrive and edge blanking, as well as differential input thresholds (signals are single-ended, but with respect to a reference plane that's biased mid-supply; basically differential like LVDS, but all the '-' nodes are gathered together, saving on pins), and some automatic delay compensation to deal with trace length variation.Tim

author: swmcl
author_rank: Contributor
timestamp: March 25, 2022, 06:40:38 am
content: Thanks Tim !I'm using an Ethernet socket that has the magnetics inbuilt. I will stop using the short traces to the pads as you say.Yes this isn't pretty at this stage. I'm manually putting comonents on the board to see how it fits.Rgds,