another misuse of an opto? - Page 1
Forum section: electronics / beginners

author: KTP
author_rank: Frequent Contributor
timestamp: September 21, 2010, 11:03:30 pm
content: Ok, so here is another case where I used an opto in my flashing bike light circuit. This time it wasn't used because of lazyness, but rather it seemed like the easiest way to get the logic output that I wanted. It wasn't so much of an isolation need rather than the fact that I wanted to drive the base of the transistor with a voltage much higher than the 3.3V output of the msp430. I don't immediately see a way to do this while maintaining the logic level 0 = off, logic level 1 = lights on without using extra transistors as inverters (if I got rid of the opto). The push pull npn/pnp was my attempt to drive the large gate capacitance of the nmos fet hard enough such that I could pwm the leds at reasonably high frequencies (and this worked well). Again, this was just junkbox prototyping with parts I had on hand. I didn't have logic level mosfets or mosfet driver chips. What is the easier way here using the same (but fewer) parts?

author: KTP
author_rank: Frequent Contributor
timestamp: September 22, 2010, 02:48:29 am
content: Quote from: shafri on September 22, 2010, 02:11:18 amMmmm, the Q1 and Q2 is in a classic push pull configuration. When the opto is inactive and no current is flowing out of it's emitter through R1 then the bases of Q1 and Q2 are both pulled to ground through R2. In order for the upper npn transistor Q1 to conduct in this state, the output would have to be -0.6V, which it can't be so this transistor is cutoff. The lower pnp transistor Q2 has the base at the same ground potential so the emitter is about 0.6V above that, thus the gate of the mosfet is driven low to about 0.6 volts, which is below the Vgs threshold of the mosfet. When the opto conducts, current flows through R1 and the voltage at the bases of Q1 and Q2 is nonzero, in fact it is close to 12V. this means Q1 emitter is about 0.6V below this and thus Q1 Vbe is foward biased and conducting. Q2 is also foward biased but since it is a pnp it is cutoff. Thus the gate of the nmos fet is driven well above the saturation level and it conducts nicely with a very small Vds.I am still newbie as well, so this explanation may not really be clear or correct.

author: Zero999
author_rank: Super Contributor
timestamp: September 22, 2010, 07:11:44 am
content: Quote from: shafri on September 22, 2010, 02:11:18 amNo because both Q1 and Q2 will never turn on simultaneously.When the opto-coupler is on Q1 is on and Q2 is off. When Q1 is on, Q2's emitter voltage will be 12V - 0.8V but its base voltage will be nearer 12V. Remember Q2 is a PNP transistor so its base voltage needs to be about 0.7V below the emitter to turn on.QuoteAt higher speeds, two transistors are required to ensure that the MOSFET's gate is charged/discharge very quickly.KTP,There are several options.I'd connect R2 to +12V and connect a transistor to short the bases of Q1 and Q2 to 0V.Attached is another idea I came up with to solve a similar problem for someone on another forum. It used a P-MOS transistor but it's easy to change to to N-MOS. It has the advantage of only requiring two NPN-transistors to give a push-pull output with level shifting.

author: scrat
author_rank: Frequent Contributor
timestamp: September 22, 2010, 10:42:42 am
content: Excuse me for the off topic question...Hero, can you tell us which tool you're using for drawing? Seems pretty neat... Thanks!

author: Zero999
author_rank: Super Contributor
timestamp: September 22, 2010, 11:32:32 am
content: I drew that Electronics Workbench 5.12 which is totally obsolete (l1996) and has since been bought by Multisim. It was good but it could be clumsy for drawing schematics and I don't know what the latest version is like.I use LTSpice most of the time but I sometimes simulate using different programs to get a feel for a circuit.

author: scrat
author_rank: Frequent Contributor
timestamp: September 22, 2010, 11:41:46 am
content: I remember it, and I even thought it could be the one you used, but the gnd symbol made me leave that guess. It was also good for simulation of some simple circuits.Thanks!

author: KTP
author_rank: Frequent Contributor
timestamp: September 22, 2010, 12:31:52 pm
content: Quote from: Hero999 on September 22, 2010, 07:11:44 amYes, I knew this way but it would require inverting the logic from the microcontroller (a low output from the micro in your circuit would have the effect of turning on the leds). If we didn't want to change the microcontroller code, then I guess we would have to add another transistor to act as an inverter before the transistor shorting Q1/Q2 base to ground. At this point the opto is actually not looking bad.I like the other circuit you posted also, thanks.