Mixed Signal PCB with Digital and Analog Supplies (Image of PCB) - Page 1
Forum section: electronics / projects

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 08:01:29 am
content: Hi,I've been reading about mixed signal ground PCBs and I thought I had this figured out already but now that I have added a Analog supply I have a doubt that I can't seem to find an answer to.So far for me the main idea is to avoid separating ground planes, only divide the board and put all the analog circuitry in a way so that the digital current returns are not in the way of the analog return path.About the ADC I have read from TI's and Analog Devices guides that usually you want to connect ground of the digital and analog part of the ADC.Now, I have a doubt of whether I should follow these recommendations in this case or not.In the image attached, you can see that now I have devided the digital GND (yellow) and analog GND (red). I have separated both GND Planes and GND at the ADC. I only run digital signals over the digital GND plane and only analogs signals over the analog plane.You might think, this guy is stupid! He reads one thing and he is asking if he can do just the opposite. Yes, but the big difference is the supplies. The switching supply is providing power for all the digital but also the analog supply. Also, the analog ground only goes to the analog supply and just underneath it both planes ARE CONNECTED with a net tie. My logic says this is not bad for the analog part but then again the analog supply is connected to the switching supply. Moreover, the separation of the GND and AGND in the ADC might be creating a dipole antenna.What do you guys think that would be the best solution in this case to reduce all the noise possible in the analog part.The switching supply is a 3.3V and the Analog is a switched capacitor 5V (I know this is not the most quiet supply but it is good enough in my case)The adc is a ADS1262. I know is 32bits, we don't need it really but we can afford it and is just to simplify our design since with 20bits would be more than enough but we couldn't find any with all the features this one provided with the same amount of channels and for a lot less money.Thanks

author: tszaboo
author_rank: Super Contributor
timestamp: July 05, 2017, 08:34:36 am
content: Quote from: Twistx77 on July 05, 2017, 08:01:29 amYes, this is absolutely true.Dont split the ground plane. That is the worst that you can do. And dont tie it together with a wimpy net tie, make it a solid ground plane. If you want 20 bits, you need differential routing for the analog signals. This includes the analog input, and the vref. For the Vref GND you should also use differential signal, and there you might use a net tie.For 20 bit, mA of current will create LSBs of noise on a solid ground plane. You can actually measure it, if you have a very good multimeter.Quote from: Twistx77 on July 05, 2017, 08:01:29 amJust forget about those. I never seen a switched cap, which wasn't noisy.

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 08:44:23 am
content: Quote from: NANDBlog on July 05, 2017, 08:34:36 amThank you.So do you think that making one solid Ground plane and leaving the layout presented can avoid the digital returns interfering with those of the analog part?What supply scheme do you recommend? I have only a 3.7V Lithium so to get the 5V I either need to use a switching or a switch capacitor supply.I can't do diferential signals since this is connected to the sensors with a connector with limited number of conductors. We don't actually need 20bits I meant that 20 bits would be more than enough.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 05, 2017, 08:57:22 am
content: Beware of the PSRR of your ADC - it is specified at DC (see note 4 of the datasheet). Great joke!In practice this means, this chip is very sensitive to its power supply (I've had this experience with some other Sigma/Delta many bits but slow converter). You'll have to provide the analog supply from a good linear regulator to achieve usable results. Obvious way to achieve this from a 3.7V LiPo would be first a step-up (boost) converter to 1V above your analog supply, then do some filtering (L/C or R/C) then use a low-noise LDO to generate your analog supply.Providing the solid ground plane is one thing, don't care too much about the digital return current paths, the path is just underneath the digital signal trace for somewhat higher frequencies (aka the signal edges which have the highest potential to disturb your analog part). You can mitigate these by placing small (33R to 100R) series resistors into these signals at their source (the driving pin).

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 09:06:00 am
content: Quote from: capt bullshot on July 05, 2017, 08:57:22 amAbout the supply I thought so, but my approach I think that will work too is going for a +-2.5V, from the 3.3V I would use a Switched capacitor inverter to -3.3V and then with two linear regulators go to +-2.5V.I have already the 33R resistors for the fast digital lines.For now I will stick to that unless someone else has a better advice.

author: tszaboo
author_rank: Super Contributor
timestamp: July 05, 2017, 09:33:14 am
content: Quote from: capt bullshot on July 05, 2017, 08:57:22 amExacly. Voltage drop on the GND plane because of digital can be a problem, but Mhz+ digital signals dont upset analog measurements if care is taken.Quote from: Twistx77 on July 05, 2017, 09:06:00 amMy main problem with switched cap is the 10s of mVs ripple on the output, and the big output resistance. And it works at some Khz, much more chance to interfere with the measured signals. It requires careful investigation for analog, and usually filtering. And then its just simpler to use a well known boost converter.

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 09:37:38 am
content: Quote from: NANDBlog on July 05, 2017, 08:34:36 amI will solve it with the LDOs I proposed.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 05, 2017, 09:58:36 am
content: Inverting the 3.3V using a charge pump (switching capacitor) and regulating +/- 2.5V using LDOs should work. Just keep the charge pump away (distance wise) from the analog circuitry. You may have a look at the LTC3260 (which isn't suitable for your design because of the minimum input voltage) datasheet for some inspiration.

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 10:05:50 am
content: I wiill go for the scheme in the attached file.Now I remember why I didn't go for this in the first time since I already used it. It was because the sensors worked with positive 3.3V because they have amplifiers on them but I will change the sensors and go for the attached configuration.Thanks.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 05, 2017, 10:17:26 am
content: Just in case - the TPS723xx is a negative LDO, you also have one in the positive part?Otherwise, consider filtering the input of the LDOs instead of their output (place the L/C between the charge pump and the regulators, not at their outputs). And if you use ceramic capacitors for the L/C filters: beware of their high Q in this configuration which is prone to ringing making things worse than without them. Use some kind of damping (e.g. a resistor in series to the inductor or a lossy cap, e.g. tantalum or electrolytic)

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 10:41:33 am
content: Hi,I'm using TPS73225DBVT for +2.5Vand TPS72325DBVT for -2.5V.I will add the L/C to the input of the negative LDO.

author: dmills
author_rank: Super Contributor
timestamp: July 05, 2017, 10:44:20 am
content: Two things spring to mind looking at that board:That 5V regulator and associated doings cross the split in the plane, very, very bad. Nothing crosses the split, and certainly you don't want the ground current loop for that part to go all the way up to the other side of the board before getting to the ADC that seems to be what is happening at present.Also, net tie? think whole row of Vias, or better split plane with honking great copper region joining the two, not some noddy little net tie.Charge pump?? Them things noisy, almost always. Far better to use some kind of ZVS or quasi resonant forward converter, with two secondaries, much less dI/dt. Even a simple two transistor saturating reactor Royer would probably be better.One worthwhile trick with switchers in this situation to synchronise them to an integer multiple of the output rate, leakage into the ADC then aliases into DC offset which is usually better then random tones in the output.I would have laid this out with a single plane, but with all the signals (and power connections) crossing between the two regions in a tight group, then place a slit in the plane so that it effectively necks down to mostly just fill the space under said group, this ensures you still have local return paths for everything while reducing the tendency of current loops not involved in the ADC to couple into the ADC.LC filters are your friends for cleaning up power, they still have PSRR up where it matters, most LDOs (there are exceptions), not so much.Differential analogue is almost always your friend, and being picky about where you reference things can pay big dividends.One of the dirty little secrets of ADCs is that they usually really want the AGND and DGND pins connected to the same ground plane, the AGND and DGND names refer to what they do on the die, and they are separate to avoid common impedance coupling in the bond wires, not to imply they should not go the same plane.Also, routing **ANYTHING** under the ADC, especially on the same side of the board is a bad idea.20 bits takes huge attention to detail to pull off.73 Dan.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 05, 2017, 10:56:49 am
content: OK, now as you pointed it out, I can read the correct numbers in the schematicFiltering the LDOs input is supposed to keep the charge pump noise away from them, so you should filter both LDOs inputs, not only the negative. The charge pump also creates noise on its input voltage, so don't connect the charge pump input directly to the positive LDO input.Filter the positive LDO input, if there's a need to filter the charge pump input depends on the rest of your circuit, e.g. if there's a component that might be sensitive to the noise generated by the charge pump into the +3.3V rail, plain digital circuitry wouldn't require filtering here in most cases.

author: Twistx77
author_rank: Regular Contributor
timestamp: July 05, 2017, 11:05:44 am
content: Quote from: capt bullshot on July 05, 2017, 10:56:49 amI'll do that thanks.For the planes should I have +2.5 and -2.5V internal planes in the analog part as shown in the first picture as AGND? and then the rest GND plane with GND planes also in top and bottom layers? Or should I avoid the +2.5V and -2.5V planes and just go with tracks and a whole GND plane?

author: dmills
author_rank: Super Contributor
timestamp: July 05, 2017, 11:19:24 am
content: Plane, with the power on tracks (Very local decoupling obviously), gets my vote.Regards, Dan.

author: Rerouter
author_rank: Super Contributor
timestamp: July 05, 2017, 12:12:34 pm
content: if your measuring in reference to 0V, then make your ADC reference ground 0V, with some decent via stitching around it. you want the chip and the parts that reference ground like dividers, or amplifiers to share that same patch of ground, next up you will want to make it so digital ground return paths do not cross or approach the analog nets if they are high accuracy or high impedance.It is possible to have a ground plane repect multiple areas, you just need to ensure ground currents from different areas have no reason to cross that area, for DC, arrange your circuit so the high current loads are near the supply pins, and there return path doesnt overlap the sensitive stuff. for digital, you make sure the signal and its ground have a clean path to follow from source to destination with no ground plane splits or breaks under the signal, if you hop a digital signal to another layer, make sure there is a path for the return current to flow, even if its adjacent to it. with higher edge rates the return current will want to follow its signal as closely as possible,On a 4 layer board this also means providing a connection between reference planes when your signal hops to the other external layer. the closer the better.For your supply rails i would have them on external layers, if its a noise sensitive supply, then make sure you leave a gap big enough to run a trace either side of it. you dont have to run traces there, but the increased gap will reduce crosstalk to near 0, and have a few values of decoupling caps around to shunt any noise that gets through your filter. generally i have a 10nf 0402 next to the supply pins, and a 1uf 0805 or 4.7uF 1210 nearby to my analog sections, in general a larger package means less voltage derating in ceramic capacitors.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 05, 2017, 01:31:06 pm
content: Quote from: Twistx77 on July 05, 2017, 11:05:44 amAs far as I understand your circuit, you'd be fine with just tracks for the +/- 2.5V and proper decoupling caps close to the power pins of the ADC.

author: Twistx77
author_rank: Regular Contributor
timestamp: July 06, 2017, 08:58:56 am
content: Thanks to all.I will follow your recomendations.Linear +-2.5V analog supplies with good LC filtering.Big continuous GND plane on internal layer and externals.Analog circuitry away from digital and avoid any return currents from digital to cross analog returns.+-2.5V rails will run in tracks on the top and bottom layers.

author: rbm
author_rank: Regular Contributor
timestamp: August 01, 2017, 11:21:33 pm
content: Hope noone minds that I hijack the thread. My subject is relevant to this discussion.I am designing a mixed signal circuit board for automotive use. Very low power, low frequency stuff. One part is a digital sensor decode and display function, the other an analog signal conditioning function. The signal conditioner takes a low frequency sinusoidal input with a max. frequency of about 6kHz and threshold detects using a LM358 op-amp to create a pulse output. The analog circuitry is powered single-ended. The digital decoder reads the state of a BCD switch and uses a CD4511 bcd display decoder to drive a 7-segment LED display. I use a buck converter to transform +12V nominal on the input to +5V. Maximum current draw on the 5V rail is 110mA with the display attached.I've designed the board with AGND and DGND planes, separated all analog circuitry to one corner of the board and the rest is for the digital parts and power supply. The ground planes are separated and but joined at one point only on the top layer using a ground tie. The ground plane on the top layer is discontiguous so I use vias to sew the top and bottom layers together.Reading this thread, it seems I'm better off using one ground plane, GND, and connecting everything to that plane, but I'm not sure. Is that correct?Below is an image of the PCB at the point where the ground tie bridge occurs. I've used Eagle as the layout tool and Adafruit footprint for a ground tie.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 02, 2017, 03:45:51 am
content: *Loud buzzer sound*If you're going to do split planes, you did everything right......up until you ran traces across the gap at the bottom. Any potential noise currents flowing in the digital side will be coupled in from there.Make a peninsula of common ground plane, necked down (but for god sakes, not to a single trace) around the ADC. NO TRACES CROSS THE GAP BETWEEN PLANES. All traces that are needed on the analog side, must therefore pass alongside the ADC. Those traces could be carrying noise, so make sure they are well filtered to ground, in the same location.The general principle is, if you imagine the ground plane as a flexible shape, and as you mold it, the traces on top and within are molded along with; then, where it's necked down, you could also stretch it out, as long as you like. If you then wrapped it up so the ground plane surrounds the traces, what would you have? A shielded cable! All the currents flowing inside the cable carry image currents against the shield, and are fully contained within the cable. The only way currents could flow on the outside of the cable (and thus introduce voltage drop in the ground plane, and errors in the signals), is if there is another connection wrapping around outside. Never pierce the ground plane, or wrap it into a loop -- only mold it around.Tim

author: Rerouter
author_rank: Super Contributor
timestamp: August 02, 2017, 12:54:14 pm
content: In general single plane causes the least risk of noise emmision or sensitivity, but if you want to remain split plane, all connections to that plane have to pass over the junction point, meaning your ground tie will be a plane neckdown instead, necking down to a little wider than the area all the traces cross over. (if you jump a break the return current makes a loop, which is bad.)Though based on your op amp choice its obvious your both low speed and low accuracy analog, so your requirements are much more relaxed compared to the original poster. however i would strongly suggest you add a small amount of feedback to your threshold op amp to make it act more like a schmitt trigger. otherwise it can oscillate in weird ways when the input is floating.I'm going to guess your product is a digital tachometer, if so, note there are much better ways than a comparitor threshold to handle an analog frequency input, cars can be stupidly noisy, and unless you know its not possible, someone will bolt a 10W UHF radio within 20cm of your device.