hybridfree/eevblog-posts huggingface dataset:
need help from someone in china to download a project file from OSHWHub - Page 1
Forum section: electronics / general

author: Ramone
author_rank: Newbie
timestamp: April 21, 2025, 01:21:28 pm
content: Hello all,I am a member of the JLC/easyEDA/OSHWLab... universe and i like learning from the projects folks post there, and recently i came across one i am really interested in (a USB soundcard based on CT7601). However, the project is in the china version of OSHWLab, called OSHWHub, and it is not possible to download the attachments to the project from a non chinese account.... Well it turns out the firmware for the project is posted as attachment and without it the project is useless.... I have contacted JLC support, but there is nothing they can do, there is nothing wrong with it, and the files are open to download, it is just it works like that.What i am looking for is someone from china that has an JLC account that can help me getting the attachment with the firmware, i would be grateful forever!The project in question is this one:https://oshwhub.com/cykr/ct7601-usb192khz-sheng-kathanks!

author: Ramone
author_rank: Newbie
timestamp: April 22, 2025, 02:47:47 pm
content: problem solved, thanks!

author: Mark Krass
author_rank: Contributor
timestamp: August 07, 2025, 06:37:18 am
content: Same question - can anyone give me a hand here?

author: Mark Krass
author_rank: Contributor
timestamp: August 08, 2025, 05:59:53 am
content: Solved, thanks!
Amplifier using TDA7292 - PCB Layout review + Signal input - Page 1
Forum section: electronics / general

author: bc
author_rank: Newbie
timestamp: August 04, 2025, 05:19:36 am
content: Hi everyone. I am designing an amplifier boarding using the TDA7292 Class AB amplifier IC. This is a full board that will replace an STK 461 in an AKAI AM-U11 stereo amplifier.The power supply is 28V+- in the AKAI.I have followed the application circuit and another example circuit I found that someone used in their project as well.This is my first time drawing a schematic and also first time laying out a PCB. I have tried to keep the signal and power spaced apart - and I also tried to make the layout make sense, but I really have no idea what I am doing.I'd really appreciate any feedback on the design.I'm unsure about the signal out/signal in specifics as there is an existing circuit in the AKAI amp. As far as I can tell I can just use this in it's place, but I don't know about the impedance of the signal output vs the optimal impedance of the input into the TDA chip.Here is the signal and output stage for one channel in the AKAI amp.
need some help mapping a pcb - Page 1
Forum section: electronics / general

author: strykir
author_rank: Contributor
timestamp: July 27, 2025, 09:35:42 pm
content: Hello,Im posting in the thermal camera forums but Im posting here in the hopes of getting some assistance in trying to map this pcb. It came out of a continuous zoom lens. Im being told it can be controlled with a rs 422 adapter. I can see some traces on the pcb but not enough to be able to trace anything. do you have any tips on how I can figure out the wiring on it without causing any damage? attaching some screenshots of the 3d model and some pics of the pcb.

author: strykir
author_rank: Contributor
timestamp: July 27, 2025, 09:37:23 pm
content: additional pictures

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 28, 2025, 02:41:22 am
content: You can ask your local dentist to make some X-ray pictures.Those QFN IC's look intimidating, but apparently they are quite simple 5A motor driver IC's with just a few logic connections.That mostly leaves the small stuff SOT-23 and such. Probably voltage regulator, maybe some opamps. Gather as much datasheets and other info of all IC's and other passives, and then just start puzzling pieces together. A big part can usually already be guessed just from the function of the IC's.You can input the PCB pictures in KiCad, and then place the footprints (and tracks) right on top of it. This helps a lot with keeping track of which part's you've already done, and which parts have still to be done.Having some knowledge of photo manipulation programs such as Gimp also helps. You can undo photo distortion, mirror the back side into a "front" side so it matches the "though the PCB" view.If you can extract the original firmware of the uC, then you can program it with test software to help with figuring out connections.

author: Kean
author_rank: Unknown
timestamp: July 28, 2025, 08:49:57 am
content: I don't think it has RS-422, but rather RS-232. Unless it has both and I'm not seeing any RS-422 driver/receiver IC.U6 marked MP221EC is a Texas Instruments MAX3221E RS-232 driver/receiver IC.If you look at the datasheet , pins 8 and 13 are RIN and DOUT respectively which are the RS-232 level signals and you should be able to use continuity measurement on your DMM to identify the connector pins for these. The are probably on that 10 pin connector with all the PIN_ labels and very dodgy looking fraying wires.You'll also need GND which should be easy, and seems to be the pins marked in black on those connector diagrams.If you don't have access to the hardware documentation, then you probably don't have access to the protocol documentation or software... so knowing this may not be of much help.https://www.ti.com/lit/ds/symlink/max3221e.pdf
Stackup and layout representation for "partially plated through via" - Page 1
Forum section: electronics / general

author: thejournalist
author_rank: Newbie
timestamp: July 21, 2025, 01:32:33 pm
content: Hi everyone!I was wondering if anyone has experience manufacturing this type of stackup, or if it is even possible.(I'm a beginner btw, sorry if I get any terminology wrong, goes without saying but feel free to correct me)General idea (see also image attached):- Top and bottom layers with no copper- mirrored buried vias between two pairs of inner layers- It's in a through hole (with 50 mm ~ 1.9685 in diameter)It is basically two ring electrodes inside the via.My question is:- how can this be manufactured. Backdrill, sequential lamination?- How to specify this in the PCB design (I'm using Altium but I can use others)I tried searching for sequential lamination here in the forum but only found this, which kind of sugests this could be possible?Quote from: free_electron on April 13, 2015, 05:36:40 pmThanks!!

author: asmi
author_rank: Super Contributor
timestamp: July 21, 2025, 03:49:37 pm
content: Yes it can be manufactured, but there will be no through hole at all - internal cores (layers 2-3 and 4-5) are going to be processed first - drilled and plated, after that they will be pressed together with prepreg into the full structure. In your design declare buried vias between layers 2-3 and 4-5 and use them as you normally would vias, just note that they only connect two adjacent layers. Please note that this process is going to incur additional charges as inner cores will need to be drilled and plated independently before pressing them into a final structure - with another round of drilling and plating for "normal" through hole vias to follow. "Talk to your manufacturer" (C) Zack Peterson of Altium
Color Laser printer, printing pcb layout on transparant sheet - Page 1
Forum section: electronics / general

author: MondeoST
author_rank: Newbie
timestamp: July 20, 2025, 01:47:41 pm
content: Hello,I'm ready to replace my printer and want to buy a color laser printer.Since I still design my own prints and want to print them on a transparent sheet for photo pcb exposure,I need a printer that can print black properly, at the highest possible resolution.Does anyone have good experience with a color laser printer, brand or model, that can do this?

author: BradC
author_rank: Super Contributor
timestamp: July 20, 2025, 01:57:16 pm
content: No. I have an additional LaserJet 2200 for just this reason.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: July 20, 2025, 02:02:31 pm
content: Most lasers I've tried are OK for this but I use tracing paper, not transparancies, as toner adhesion is better. Get the heaviest stuff you can find ( at least 90GSM) as the thinner film crinkles in the fuser

author: madires
author_rank: Super Contributor
timestamp: July 20, 2025, 02:21:30 pm
content: Tracing paper works great for me too. And I use Solvent 50 (label remover) as density enhancer.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 20, 2025, 02:55:31 pm
content: I tried this a very long time ago with the laser printer I had back then, but I never got to the etching stage. On bigger surfaces there was not enough toner and they were not uniformly filled. Blackening them with a pen was too big of a nuisance.Historically, some people used glossy magazine paper to print on, and then transferred the toner directly to the PCB with a hot (clothes) iron.I like the idea Marko Reps (on youtube). He once made a video of directly exposing photo sensitive PCB's with an UV laser. Adding a laser pointer to a 3D printer, or a P&P machine head is not very difficult. Directly drawing with an etch resistant pen on a PCB (with a pen plotter) is also an option.
I don't understand what I'm doing wrong with ANSYS Circuit Electronics (Bode ) - Page 1
Forum section: electronics / general

author: rdpdo
author_rank: Contributor
timestamp: June 29, 2025, 11:25:27 am
content: Hello,I've been trying for several days to simulate the frequency response of the circuit below using ANSYS Circuit.First, here's what I get with LTspice:With ANSYS, I have to use ports. For what I understand, but certainely i'm wrong, is when voltage is injected during a LNA, the voltage generator is in serie with the port impedance. If I configure them like this, here is the netlist it gives me. We see in the netlist that port2 impedance is between net PORT2 and ground, like in LTspice.Unfortunately, this doesn't work and I get the following result:Regarding the netlist, it should work no ?? Can someone explain me what is going wrong ??To get the right result, I need to configure port2 with a value of 50 ohm, and referenced to itself. The resistor value need to be the same as the one in port1. For example, if I use Rport1=50, I need to set RPort2=50 to get good result.When looking at the netlist, what I don't understand is why it only work for Rport2=50, because Rport2 is shortcuted regrading the netlist no ?? So any value for Rport2 should work noI think all this is related to S-Parameters I use for tracing Gain Port2/Port1 and both port need to be same impedance to match. Is this the explanation ?Thanks you very much for your help !

author: D2236
author_rank: Regular Contributor
timestamp: June 29, 2025, 03:42:37 pm
content: Use a source and a voltage probe and you should get the same results.

author: RFDx
author_rank: Regular Contributor
timestamp: June 29, 2025, 07:07:55 pm
content: You are plotting power gain instead of voltage gain. Leave the source (50 Ohm) on the load (1 GOhm) port as is and just add another trace that shows voltage gain.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: June 29, 2025, 09:11:39 pm
content: Using a linear frequency axis in spice and a logarithmic frequency in ansys also makes the graphs look differently and much more difficult to compare.
Cadstar conversion from .pcb to .cpa - Page 1
Forum section: electronics / general

author: marcopolo
author_rank: Regular Contributor
timestamp: April 08, 2016, 10:32:43 am
content: Hi,I have a Cadstar pcb file I want to import into Altium Designer.To do this, I need to convert the pcb file (.cpb) to a pcb archive file (.cpa) but without Cadstar, it's a bit difficultCould someone with Cadstar do the conversion for me?Thanks,Marco

author: Mattylad
author_rank: Regular Contributor
timestamp: April 09, 2016, 05:01:21 pm
content: Try the attached.

author: marcopolo
author_rank: Regular Contributor
timestamp: April 09, 2016, 05:37:20 pm
content: Thanks a lot Mattylad, it worked8 layers for this ATMEL AT91SAM9260 BGA evaluation board. Fortunately, a QFP version exists.

author: Dario_Righetto
author_rank: Newbie
timestamp: June 28, 2025, 12:45:00 pm
content: Hy Mayylad,Please can you help me ? I need ascii files of PCB and Schematic to convert in my cad.I attach Binary files , thanks in advance if you can help me !!Dario Righetto
How to use multichannel in altium with harness connector - Page 1
Forum section: electronics / general

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: June 08, 2025, 10:58:04 am
content: HiI have a design that has a harness connector like this, I want to use multichannel (repeat) feature of altium, How should I do it with the harness connector?

author: thm_w
author_rank: Super Contributor
timestamp: June 09, 2025, 09:25:09 pm
content: You can move to the altium section:https://www.eevblog.com/forum/altium/multichannel discussed a few times already:https://www.eevblog.com/forum/altium/unable-to-connect-signals-vias-harness/
Need some help with my PCB - Page 1
Forum section: electronics / general

author: MitchdeHaas
author_rank: Newbie
timestamp: May 30, 2025, 12:49:17 pm
content: Hi all, I am designing a Sim Dashboard and I need some help with my PCB.I already made a very simple scheme but it is my first time designing a PCB and I don't know if this will work and if I need some adjustments.Thank you in advanceBTW I am a complete beginner in PCB design.

author: thm_w
author_rank: Super Contributor
timestamp: May 30, 2025, 08:46:00 pm
content: Looks OK to me, assuming your USB is capable of powering the Vocore screen and the 25x RGB LEDs.You can calculate what total current that is.It may not be enough so you'd want some external 5V input (eghttps://circuitdigest.com/electronic-circuits/diy-hub-port-extender), or a way to negotiate higher current.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: May 31, 2025, 03:34:51 pm
content: Normally all the addressable LED's are put in a single daisy chain.Have you decided on software to design your PCB?I'm a happyhttps://www.kicad.org/user myself. KiCad is fully open source, and it has no deliberate limitations. (No limits on pin counts, copper layers (up to 32 for everybody), gerber creation, "cloud" dependency, etc) It has already become quite popular over the last bunch of years, and it's in active development and improving at a rapid pace too. Each year quite a lot of useful new features are added. Reviews that are more then 5 years old sometimes have some (valid) negative points, but most of those have been fixed already. Such old reviews don't mean much. KiCad also has a big and active user community and a dedicated and responsive user forum.https://forum.kicad.info/There are of course also a lot of other PCB design suites, but I don't have any experience with them.
PCB with CAN bus: how to reach 120Ω impedance in Saturn PCB? - Page 1
Forum section: electronics / general

author: frowin
author_rank: Newbie
timestamp: June 01, 2025, 01:23:05 pm
content: Hi everyone,I'm a CAN bus/differential pair beginner and designing a 4-layer PCB (JLC04161H-3313 stack from JLCPCB) with CAN bus signals. From what I read it is a good approach to place the signal on the L3 layer with L4 as the reference. I don't manage to get some trace widths and spacing without the tools throwing warnings.The JLCPCB calculator indicates warnings and results in trace widths below the production capability (3.3 mil < 3.5 mil for multi layer).Saturn PCB results in a very large conductor spacing of 200 mil for a 3.5 mil trace. No issue with that in particular, it just seems a bit odd to me and Saturn shows warnings in bottom right.I was wondering whether I somehow have to look for a 60Ω "Zdifferential" or something like this. But after some googling I'm quite sure that 120Ω is the correct value to go for.Do you see an error in my assumptions? Am I missing anything obvious?I appreciate your help and thank you in advance

author: ataradov
author_rank: Super Contributor
timestamp: June 01, 2025, 02:03:23 pm
content: You don't need to do any special impedance matching on the PCB for CAN. The length of traces on the PCB is negligible here. All you need to do is place proper termination resistors.
PSIM help. OP AMP circuit - Page 1
Forum section: electronics / general

author: JOJOElectro29
author_rank: Contributor
timestamp: May 24, 2025, 02:15:46 pm
content: I need help with PSim for Fig 4.3 of Experiment. I tested it in real life and it worked but I'm not sure about the PSIM circuit. The value of Vo is correct when pulse is 0V, but when pulse is 5V V0 is almost 3V. according to the pulse graph in Experiment 4 it should be 2V is something wrong with my circuit in PSim?
Altium Adding Stitching Vias  - Page 1
Forum section: electronics / general

author: 2X
author_rank: Frequent Contributor
timestamp: July 03, 2025, 08:59:34 pm
content: Hello,I am trying to fill a 12V track (top-bottom layer) with vias but always I am getting the message "altium unable to locate any suitable locations on net +12V". Also, I tried to fill with vias a top - bottom polygon GND but the same message again.What I am doing wrong (I have never place Stitching Vias)?Adding Via Stitching & Via Shieldinghttps://www.altium.com/documentation/altium-designer/via-stitching-via-shielding-pcb

author: Niklas
author_rank: Frequent Contributor
timestamp: July 03, 2025, 09:33:40 pm
content: "For via stitching to be possible, there must be overlapping regions of copper that are attached to the specified net, on different layers. Supported regions of copper include Fills, Polygons and Power Planes."https://www.altium.com/documentation/altium-designer/via-stitching-via-shielding-pcbSo the stitching via function will not work on traces. I see that the +12V trace that you would like to reinforce is routed around the transistor, but have you considered to rotate the transistor 180 degrees to make that connection shorter instead? The left connector will need a change to the pinout to make it a good fit. It might also be possible to fit the diodes between Drain and the other connector on the top side.
MOVED: TIANMA TM080RDHP06 Tape 40 pins that I should connect to to get the image?  - Page 1
Forum section: electronics / general

author: Goodhot
author_rank: Contributor
timestamp: May 07, 2025, 09:05:19 pm
content: This topic has been moved toOther Equipment & Products.https://www.eevblog.com/forum/index.php?topic=460922.0
USB-C (3.0) Circuit Design Review - Page 1
Forum section: electronics / general

author: VojtechSebek
author_rank: Newbie
timestamp: May 09, 2025, 01:10:06 pm
content: Hello,I previously posted about this design on a forum, but I’ve since realized that my original circuit was completely incorrect. I’ve now reworked the design and would greatly appreciate your feedback.I’m trying to connect an Alfa WiFi adapter as a Downstream Facing Port (DFP – providing both power and data), using USB-C version 3.0. The design operates in GPIO mode, and I’m using the TUSB322 and HD3SS3212 chips.I’ve attached all relevant documentation and schematic images.Could you please let me know whether this revised design would function as intended?Thank you very much in advance for any feedback.Best regards,Vojtěch Šebek.

author: PlainName
author_rank: Super Contributor
timestamp: May 16, 2025, 08:53:00 pm
content: QuoteConnect things with wires rather than labels.You're welcome
Land pattern notation question - Page 1
Forum section: electronics / general

author: P_Doped
author_rank: Contributor
timestamp: May 08, 2025, 10:34:10 pm
content: I'm looking at a C&K momentary SPST tactile switch (gull wing) and the provided pattern has notation I'm not familiar with. See attached.In the vertical (from the point of view of the drawings) direction of the pin, the land pattern uses the notation "4-0.7" and in the footprint it says "4-0.5". What does this mean? All dimension measurements are mm.Thanks.

author: thm_w
author_rank: Super Contributor
timestamp: May 09, 2025, 12:20:26 am
content: 4 locations of 0.5mm for the physical switch4 pads of 0.7mm for the footprint

author: P_Doped
author_rank: Contributor
timestamp: May 09, 2025, 01:13:58 am
content: That makes sense. Thanks!
Gerber file names in PADS Professional - Page 1
Forum section: electronics / general

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: May 02, 2025, 03:10:17 pm
content: Is there a way to include the board's filename automatically in the gerber output filename?Like some kind of internal environment variable like %BOARDNAME% ?The documentation is overwhelming in its amount of PDFs that have obscure names and no relevant information.edit: I know I can just type the names in, or create a batch file to rename the files after, but there has to be a way
[Review Request] Connecting USB-C 3.0 to Raspberry Pi Compute Module 5 - Page 1
Forum section: electronics / general

author: VojtechSebek
author_rank: Newbie
timestamp: April 24, 2025, 05:28:37 pm
content: Hello,I have a question regarding the connection of a Raspberry Pi Compute Module 5 to a USB-C (version 3) connector. I’m attaching my schematic in KiCAD.I’ve read that for both sides of the connector to work, all RX and TX pins must be connected, but since USB-C has a reversible design, it effectively has two sets of these pins.I also learned that this issue can be resolved with the HD3SS3212 chip, which would combine RX1 and RX2 into a single RX (and similarly for TX). If I understand correctly, this chip uses signals from the CC pins to decide which side of the connector to route the signals from.This brings me to another problem related to the SEL (Select) pin. I’ve read that the TUSB320 chip can take the CC1 and CC2 signals and transmit information about the connector orientation to the SEL pin.My question is: would my setup work, or do I need to connect additional pins, or is there something missing in the circuit?Thank you in advance for any feedback.

author: thm_w
author_rank: Super Contributor
timestamp: April 24, 2025, 09:57:52 pm
content: Posted here as well:https://www.reddit.com/r/PrintedCircuitBoard/comments/1k6ujbe/review_request_connecting_usbc_30_to_raspberry_pi/Are you using as upstream, downstream, or dual role?

author: VojtechSebek
author_rank: Newbie
timestamp: April 24, 2025, 10:02:06 pm
content: I would like to connect a network adapter (Alfa) to this connector. From what I’ve read, it should be in dual role mode.
Help with designing a controlled impedance flex ribbon - Page 1
Forum section: electronics / general

author: nergal
author_rank: Contributor
timestamp: March 30, 2025, 10:10:17 am
content: Hello all,Anyone willing to help out a fellow EE. I am designing a dual layer straight flex ribbon cable to pass 4x PCIe signals between two boards and I am having issues with the GND cross hatching pattern.Can anyone with access to Simbeor make a small calculation for me and post the dimensions of the hatch pattern? Software like this is expensive and was not able to find a free version.Target impedance is 100ohm for differential traces. And the stackup is the default jlcpcb dual layer flex. The ribbon is straight 15cm, no bends or anything. I can give you the Kicad brd file if that helps.Any help is higly appreciated.

author: nctnico
author_rank: Super Contributor
timestamp: March 30, 2025, 12:26:57 pm
content: You might be able to simulate with a free version of Sonnet (Sonnet Lite) but I don't know if they still have free version available.

author: nergal
author_rank: Contributor
timestamp: April 04, 2025, 02:27:59 pm
content: Thank you for the reply. I tried Sonnet Lite but unfortunately I cannot upload the Gerber files as that feature is not available on the Lite version. Either I am not using it correctly or the Lite version is not meant to do this.

author: nctnico
author_rank: Super Contributor
timestamp: April 09, 2025, 08:58:22 am
content: You don't upload the gerber files. Simulation would take too long anyway. Instead you draw a portion of the flex pcb and simulate that to check whether you get the widths and height correct.
PADS - overlaying grey "X" marks removal - Page 1
Forum section: electronics / general

author: MicKud
author_rank: Newbie
timestamp: February 17, 2025, 08:39:28 am
content: Hi I tried there, but I was pointed here ;]https://www.eevblog.com/forum/beginners/pads-newbie-question/I can't seem to get rid of the darh grey 'x" marks on my PADS Viewer, can you please let me know if you have any ideas on what to change to be able to see the board without those marks?

author: Kean
author_rank: Unknown
timestamp: February 17, 2025, 10:44:18 am
content: Like someone suggested in the other thread, I would have thought drill drawing was enabled.Maybe try turning off Vias in the top headings?Sorry, I've not used PADS, but this looks just like a drill drawing so I believe it will be linked to drills/holes/vias somehow.

author: Tech_EE
author_rank: Newbie
timestamp: March 25, 2025, 06:05:11 pm
content: @micKudI'm having the same problem with PADS Viewer 2.14.1. Did you find a solution?I read somewhere that an older version of PADS viewer (~v2.1) didn't have this issue, however I can't find a download for such an old version.Thanks!
Redesigning the M4 Mac Mini SSD pcb - Page 1
Forum section: electronics / general

author: ledtester
author_rank: Super Contributor
timestamp: March 27, 2025, 04:44:16 pm
content: Shortly after it came out it was noticed that the M4 MacMini's SSD was on a small pcb which raised the possibility of of upgrading it yourself.The first upgrades involved desoldering the SSD chip and replacing it with a higher capacity one. Now complete replacement pcbs are available from a few different sources.I found this video interesting in that they explain their reverse engineering decisions which resulted in a cheaper and more performant design:We Finally Beat Apple's M4 SSD - Bigger, Faster, Cheaper - iBoff RCChttps://youtu.be/F3CYj37bxDETechnical design discussion starts at 6:30.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 08, 2025, 06:05:18 am
content: It's beyond me why people would even consider buying a PC in which any regular and standard M.2 SSD does not fit.Reverse engineering that thing probably cost weeks, for something that you can buy for EUR 30 in any computer shop.

author: Simmed
author_rank: Frequent Contributor
timestamp: April 08, 2025, 07:01:49 am
content: i have not followed apple tech maps for a long timebut iircdidnt apple have a boot check on all the S/N so that non-apple items will not work ?
Stipling on Board Edge - Page 1
Forum section: electronics / general

author: jnestor481
author_rank: Newbie
timestamp: March 27, 2025, 07:26:53 pm
content: So I'm re-designing a board that has very poor documentation. It's a small circular pcb a little over an inch in diameter. It has some stippling/texture on the edges at 4 equidistant points. How would this be called out, just put it in the notes that you want texture at 4 equidistant points ? Any advice/input would be much appreciated. Thanks.

author: Smokey
author_rank: Super Contributor
timestamp: March 27, 2025, 09:22:24 pm
content: Picture?

author: abeyer
author_rank: Frequent Contributor
timestamp: March 28, 2025, 02:08:55 am
content: Unclear what you're asking, but are you sure this isn't just the leftovers of mouse bites that were broken out of a panel?https://www.allpcb.com/blog/pcb-manufacturing/mouse-bites-pcb.html

author: wraper
author_rank: Unknown
timestamp: March 28, 2025, 02:47:31 am
content: Mouse bites remaining from the break off tabs that were holding it in panel?

author: jnestor481
author_rank: Newbie
timestamp: March 28, 2025, 10:28:46 am
content: Quote from: wraper on March 28, 2025, 02:47:31 amQuote from: abeyer on March 28, 2025, 02:08:55 amAh, I think you guys are both right that's what it is. Thanks for the help !

author: Smokey
author_rank: Super Contributor
timestamp: March 28, 2025, 07:17:11 pm
content: Cool. Now that you know about mousebites, you should look up why they are used and how to implement them if you need to panelize the design. If you get that wrong it will make manufacturing much harder (like the boards won't be rigid enough for reflow, or they will be too rigid and require extra work to depanelize).Some reading:https://cdn.sparkfun.com/assets/home_page_posts/4/4/0/0/Mousebites_Whitepaper_Final.pdf
Would this circuit work? - Page 1
Forum section: electronics / general

author: calvingloster
author_rank: Regular Contributor
timestamp: March 23, 2025, 11:34:37 pm
content: I am generating a fast pulse in the order of 5ns. This pulse travels down a open ended wire and reflects back. Would i be able to switch the return path of the reflection to use on another trigger circuit? as a rough idea i have come up with this rough circuit. The analog switch select pin is triggered by the pulse but is slightly delayed due to the capacitor used. Im guessing that i would need some more logic like a Schmidt trigger to create a clean fast edge on the select pin but would this concept work to divert the reflection?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: March 27, 2025, 04:06:34 am
content: Voltages are always measured as a differential between two points. That is why your DMM has two wires. If you change the switch position, your loose wire end does not have any sort of reference. Apart from that, the switching itself is going to put it's own signal onto the wire.The normal way for time domain reflecto metering is to have both the signal generator and the meter connected at all time, and then just figure out a way to ignore the initial pulse. In your case, a comparator that triggers at around 3V should work.https://en.wikipedia.org/wiki/Time-domain_reflectometer
Falstad Convergence Failures - Page 1
Forum section: electronics / general

author: awesomechapro
author_rank: Contributor
timestamp: March 24, 2025, 11:57:41 am
content: Hi all,I was messing around in Falstad's circuit siumlator today,(https://www.falstad.com/circuit/) and was making a triac based pre-regulator for a linear power supply (just getting some ideas to see what might work.) And everything was going well until I added a rectifier to the output of the pre-regulation stage, where I started getting convergence failure errors. (See pics)I've been banging my head against a wall for an hour over this,and I think it has to do with the ground nodes, but they seem to be required to get the bridge rectifiers to rectify produce the full rectified signal that my circuit needs. Is this something that is easily solvable for my circuit?I'm new to the Falstad simulator, please bear with me.

author: gmariz
author_rank: Newbie
timestamp: March 26, 2025, 01:02:15 am
content: Looks like that by adding the ground symbol on a second position you created a short circuit. Convergence errors in Falstad are usually short circuits. (sorry for the rough drawing)
Thermal pads between thermal pads? - Page 1
Forum section: electronics / general

author: Watth
author_rank: Frequent Contributor
timestamp: March 02, 2025, 03:24:35 pm
content: Hey everyone,Out of curiosity, I am looking at the PCB guidelines for a module such as the ESP32-H2-MINI-1 & MINI-1U (datasheet).On the modules' datasheet, recommandations for the PCB layout footprint thermal vias between thermal pads.(page 38 of datasheet)Note that these are not shown on the modules dimensions, including pads:(page 35 of datasheet)Are these pads to be implemented on the PCB, or are these present on the module?EDIT: I now guess these are blind vias, since thePCB layout design guideadvises for 4 layers PCB, and GND plane to be on the 2d layer.Thanks for reading!

author: Niklas
author_rank: Frequent Contributor
timestamp: March 09, 2025, 07:58:55 am
content: Add the 9 thermal pads in the footprint just as recommended in the datasheet.Make a square copper polygon/copper fill that covers at least the same area as the 9 bottom pads. Connect it to GND and make sure that it is connected directly to SMD pads and vias, no thermal relief connections.Now add ordinary drilled vias, as indicated by the red circles in the datasheet, in the areas covered with solder mask between the solder pads. No need for blind vias. Something between 0.2 and 0.3 mm drill will do. Make sure the vias are set to be tented (covered with solder mask).If you have double sided assembly, then you can move the vias along the solder mask lines if there are clashes with components on the opposite side.

author: Smokey
author_rank: Super Contributor
timestamp: March 13, 2025, 05:20:22 am
content: Quote from: Niklas on March 09, 2025, 07:58:55 amThe pads should be there, but I wouldn't worry too much about the vias in-between the pads. If you were to just put vias on the outside of the grid that would almost certainly be fine. Keep in mind these are system on modules and those pads are coming from their own board, not directly from the source chip. 12 vias on the outside of the pads is plenty of heat transfer, and plenty solid of a ground for a som.
Something wrong with Sprint Layout 6 File and I can't work out what! - Page 1
Forum section: electronics / general

author: Chris56000
author_rank: Frequent Contributor
timestamp: February 27, 2025, 08:50:17 pm
content: . . .I'm trying to upload a set of six PCBs to JLC for an RLC Meter, and whilst four of them look OK in their Gerber Viewer, one of them is all to pot, with silkscreen from another design in one corner and all the rest of the silkscreen all over the place - see screenshot!. . .I've attached the native Sprint Layout File - I've tried copying the tracks, pads, silkscreen and outline into a new Layout File and the same rubbish result is still coming out when I export the Gerbers!. . .Can anyone spot what's wrong please?Chris Williams

author: Niklas
author_rank: Frequent Contributor
timestamp: March 09, 2025, 08:09:33 am
content: I have not checked the zip-file, but from the picture it looks like the export settings for the drilled holes is different compared to the copper, solder mask, outline etc.Are you exporting the drilled holes using Excellon format? If so, then start looking into the settings for origin.- Absolute or relative? Probably want it to be relative to the board outline, not absolute to the ECAD's origin.There are also other settings, like inch/mm, leading/trailing zero suppression, number of digits, but in this case the board size matches with the drilled holes, but with an offset.Another option for export is to use GerberX2 to get all your files in the same export.

author: Messtechniker
author_rank: Frequent Contributor
timestamp: March 09, 2025, 08:50:09 am
content: To avoid such problems I rely a pcb vendor who can use Sprint Layout files natively.

author: Solder_Junkie
author_rank: Frequent Contributor
timestamp: April 03, 2025, 07:01:23 am
content: I don't know if you resolved the matter Chris, I imported your file, created the Gerber and drilling files, zipped them up and uploaded them to JLCPCB. The result looks OK to me. See attachedSJ

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 06, 2025, 09:04:37 pm
content: A bunch of years ago I was searching for a PCB design suite, and Sprint was one of the programs I looked at. I send them a mail to ask if there is an integrated schematic drawing program with it, and that was not available. That resulted in an instant dismissal of that software from my side. It would be a nightmare to use such software for anything but the most trivial designs. In the end I settled on KiCad. Back then it showed promise, but was still quite clunky. And in the last 10 years KiCad has improved enormously, and is now pushing a lot of other (low cost) solutions out of the market, and it's nibbling at the viability of more expensive software suites. Especially for people who do not need the most fanciest features of that software, or are simply fed up with how the commercial company treats their customers. (Independence of cloud / mist is another reason some people and companies switch to KiCad).
Reverse engineering JLCPCB's encrypted multicolor silkscreen files - Page 1
Forum section: electronics / general

author: xerbo
author_rank: Contributor
timestamp: May 26, 2024, 05:57:08 pm
content: https://github.com/Xerbo/JLC-FCTS-REIncredibly simple format that serves more as obscurification than encryption, the actual content is just a glorified SVG. Only done as a exercise, however posting here as it might be useful to someone.

author: Xyphro
author_rank: Regular Contributor
timestamp: March 11, 2025, 01:35:12 pm
content: I talked with JLCPCB today on embedded world. They have 0 plans to support officially other CAD tools for multicolor PCBs for the reason to promote their own easyeda stuff :-(So I'll look into your work next days :-)

author: jpanhalt
author_rank: Super Contributor
timestamp: March 11, 2025, 02:13:01 pm
content: If that's the case, it seems like pretty short-sighted marketing, unless they have a monopoly on PCB manufacturing.

author: Xyphro
author_rank: Regular Contributor
timestamp: March 11, 2025, 03:00:27 pm
content: Though I can understand their decision... it is clearly not making bigger companies bound to tools like Altium use multicolor PCBs or individuals using Kicad make a move to easy eda. The stimulation factor is far too small.At least a Kicad plugin or a website tool to export a template picture and then encrypt the final one to proper format should be made. One of the reasons for me to go with JLCPCB is the great (inofficial) jlcpcbtools creating bom/csv in proper format. Tools make ppl use company services.
Looking for someone to help me with a PCB design with a STM32 and Canbus - Page 1
Forum section: electronics / general

author: chrisgti
author_rank: Newbie
timestamp: January 15, 2025, 09:30:29 pm
content: Looking for someone who can design a PCB for me with an STM32 and Canbus and possibly program it at the same time.

author: Gyro
author_rank: Super Contributor
timestamp: January 15, 2025, 09:50:32 pm
content: Hi,Please use internet translate functions, this is an English language forum. Also please do not double post, this is not permitted.QuoteFrom other post, a bit clearer...Quote

author: chrisgti
author_rank: Newbie
timestamp: January 15, 2025, 09:54:25 pm
content: ok

author: Kean
author_rank: Unknown
timestamp: January 15, 2025, 10:34:21 pm
content: I suggest the best place for this request in future is the Jobs boardhttps://www.eevblog.com/forum/jobs/

author: Simon
author_rank: Unknown
timestamp: January 16, 2025, 06:36:47 pm
content: Quote from: chrisgti on January 15, 2025, 09:30:29 pmSo you want someone to do a project for you but you want to dictate the micro controller? why? I have no experience of STM32 but I have looked at the CAN bus peripheral on some of the cheaper ones and it is awful, only 3 message buffers I can't see how it's good for much.I use a microchip (ex Atmel) micro controller that has 2x bosch designed CAN bus controllers (MTTCAN). Very good, very flexible. This micro controller will also work at 5V which can be useful in some situations. What exactly do you want to achieve?

author: Simon
author_rank: Unknown
timestamp: March 11, 2025, 07:26:54 am
content: Topic locked as it has become a landing pad for spammers.
Convert PCB scan/photo into single colour track diagram? - Page 1
Forum section: electronics / general

author: Chris56000
author_rank: Frequent Contributor
timestamp: February 26, 2025, 07:10:48 pm
content: . . .Can anyone suggest how I can convert this photo of a Farnell Audio Oscillator PCB into a single plain coloured view of the tracks on a white background please?. . .I want to convert the tracks to something like solid black svg as I have a Tutorial explaining how to convert the black track artwork into a coloured drawing of the tracks from a friendly Vintage Radio Forum Member!. . .I want to make the sort of diagram you get in Service Manuals that show the silkscreen and outline in black & the tracks in pink or another colour on a white background!. .I am not conversant with image editors by the way!Chris Williams

author: Chris56000
author_rank: Frequent Contributor
timestamp: February 26, 2025, 07:19:19 pm
content: . . .This a picture of the copper side of the PCB I want to convert!Chris Williams

author: JamesMerry
author_rank: Newbie
timestamp: February 27, 2025, 01:41:07 pm
content: Would a contour tool or edge detect in photoshop work?Ideally you'll get a really clean image with no edge distortion from your camera. Can you place the PCB (gently, so to not scratch the glass) on a flatbed scanner on a printer? Once you have a clean image, any editing tool should be able to fill in the colour differences with whatever you'd like.

author: Chris56000
author_rank: Frequent Contributor
timestamp: February 27, 2025, 06:28:07 pm
content: I'm afraid I don't know how to use Photoshop or have a flatbed scanner I can scan the PCB on I'm afraid!Chris Williams

author: thm_w
author_rank: Super Contributor
timestamp: February 27, 2025, 09:25:16 pm
content: https://www.gimp.org/tutorials/

author: Kean
author_rank: Unknown
timestamp: February 28, 2025, 04:07:43 am
content: I had a quick go with the provided photo in Inkscape, but I couldn't get enough contrast for the trace bitmap function. There is too much contrast on the solder pads, and not enough between the green shades. I didn't want to spend more than a couple of minutes trying.I think to be successful I think you'd need to make another photo with backlighting.
Converting Mentor PADS to PADS ASCII - Page 1
Forum section: electronics / general

author: joule
author_rank: Newbie
timestamp: June 23, 2022, 10:15:49 pm
content: Hello friendsI found this really cool TI reference design, but it's *ancient*https://www.ti.com/tool/TIDM-BIDIR-400-12I have PADS .pcb and .sch files for the design, but they are BIN and not ASCII so I can't open them in a modern program.Does anyone have a version of PADS installed that could export these as ASCII files?-j0ule

author: Doctorandus_P
author_rank: Super Contributor
timestamp: June 23, 2022, 11:01:39 pm
content: I had a quick look at the .pdf of the PCB and it looks fairly simple.KiCad can create a PCB project from a set of gerber files, and although the conversion is not perfect (a lot of info is missing in gerber files), it's still a lot better then a full manual re-creation.There is a quite nice tutorial for doing this on the KiCad forum:https://forum.kicad.info/t/reverse-engineering-kicad-project-from-gerber-files/30903I assume other EDA programs can do something similar and something in that direction seems your best option if you can't manage to do a direct conversion.

author: m.abdelwanis
author_rank: Contributor
timestamp: August 07, 2024, 10:47:10 am
content: In case you still need it, I exported it for you into ASCII, DXF, or ODB++ format.

author: Namter
author_rank: Newbie
timestamp: May 22, 2025, 08:21:20 am
content: Can I please ask you to do the same for me? If it's not too much trouble.
Great chunk of unwanted ground plane around PCB Design in Sprint Layout 6! - Page 1
Forum section: electronics / general

author: Chris56000
author_rank: Frequent Contributor
timestamp: February 27, 2025, 06:37:42 pm
content: Can someone look at this RLC Meter Board for me and explain why there's great chunks of unwanted copper outside the wanted PCB Area in Sprint Layout 6 please? I want the internal (to the outline, not an internal layer) top ground plane on the C1 (top) layer but without these unwanted chunks!Chris Williams

author: thm_w
author_rank: Super Contributor
timestamp: February 27, 2025, 09:27:43 pm
content: Its just fill in unused areas so they don't have to etch away additional copper. Maybe reduce warping or save a few cents.I'm sure you can figure out how to crop the unused areas.https://electronics.stackexchange.com/questions/85633/what-is-copper-thieving-and-why-use-ithttps://electronics.stackexchange.com/questions/621131/ground-pours-or-thieving-for-filling-unused-space-on-pcb-signal-layers

author: Kean
author_rank: Unknown
timestamp: February 28, 2025, 04:34:55 am
content: Never used Sprint Layout, but I've seen something similar happen in Eagle and Altium if the board outline is not properly defined, or has a tiny break in it.You may also be able to modify the ground plane polygon to make it smaller, so it is within the outline clearance.In any case, as long as you provide the correct outline to the manufacturer, they should correctly trim anything outside it. But they may also reject it.
PADS Convert .PCB file to ASCII format? - Page 1
Forum section: electronics / general

author: kaan
author_rank: Newbie
timestamp: February 26, 2025, 11:34:18 am
content: I want to open the .pcb file drawn in the PADS program on Altium, but I can't open it because it is not an ascii file. Altium can only import ascii files. Can someone with a PADS Pro license convert the .pcb file to an ascii file?Thanks,best regards.File url here ---https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/dc2100b-d.html#eb-documentation
Rogers PCB - Page 1
Forum section: electronics / general

author: sdouble
author_rank: Frequent Contributor
timestamp: December 21, 2024, 10:56:20 am
content: Hi Everybody,I hope that all of you are fine in this holiday season.I'm currently after 2 batches of small pcbs (40x30 mm2), 4 layers, Ro4350B+4450f prepreg.Nothing very fancy. 0.15 mm traces, 0.2 mm spacing.I live in europe, so China is probably to best destination for me.Both quality and price matter.Any advice where to have these made during the holiday season ?TIAJulien

author: SonyHe-PCBTOK
author_rank: Newbie
timestamp: May 15, 2025, 09:55:58 am
content: Rogers laminates (e.g. RO4350B, RO4003C) are widely stocked in most PCB factories and are manufactured with essentially the same level of difficulty as standard FR-4 (except for controlled impedance and PTFE treatment). ;)For reliable quotes and production, you can work with [SPAM LINK REMOVED] as a professional PCB manufacturer that stocks Rogers materials and supports RF PCB processes.Modify message
PCB Design Review - Cramming passives onto a small board - Page 1
Forum section: electronics / general

author: JamesMerry
author_rank: Newbie
timestamp: February 27, 2025, 12:31:58 pm
content: Hey all, I'm trying to figure out my first non-trivial PCB design, and I'm looking for some feedback on where and how to fit bypass caps on a small, 2-layer board.For context this is an ATSAMD51 dev board that I'd like to make circuit python compatible to run their wonderful synthio library for modular synthesis. I've included a wire terminal for the output to an amp, but other than that, this is mostly a normal dev board. I've tried to keep the form factor feather-compatible, which should let me use an array of pre-made daughter boards.This is my first dev board with an MCU, and I know bypass caps should be placed as close as possible to the GND and +V pins but I had quite a bit of trouble routing them while still keeping the board reasonably sized and the ground plane intact. This is a 2-layer board because that makes it much easier to prototype with a local PCB manufacturer - Maybe I'd look at more in the future. How much does the exact location matter? Is there a rule of thumb? Is there anything else that could be improved with the routing?

author: asmi
author_rank: Super Contributor
timestamp: February 27, 2025, 04:38:07 pm
content: It would really help if you'd show 3D views of the board.Quote from: JamesMerry on February 27, 2025, 12:31:58 pmThe easiest place for bypass caps is often the bottom side of the board directly under the component being bypassed. It's not always the best place for them, but this is what I tend to do in order to achieve tight placement.Quote from: JamesMerry on February 27, 2025, 12:31:58 pm4 layer PCB now cost almost the same as 2 layer ones, but they provide such numerous advantages so that I don't bother with 2 layer boards anymore - except for the simplest breakouts.

author: JamesMerry
author_rank: Newbie
timestamp: February 27, 2025, 06:13:52 pm
content: Here's a 3D model of the board (except D2 doesn't render for some reason)I know a four layer would be much easier, thanks for the advice. I've also rerouted it to reduce the number of vias.

author: asmi
author_rank: Super Contributor
timestamp: February 27, 2025, 07:12:06 pm
content: Quote from: JamesMerry on February 27, 2025, 06:13:52 pmIt doesn't look crammed at all to me, and it likely work just fine (provided you didn't screw up schematics).

author: thm_w
author_rank: Super Contributor
timestamp: February 27, 2025, 09:33:52 pm
content: Looks good to me too.