JLCPCB Assembly - how to panelize my boards? - Page 1
Forum section: electronics / projects

author: Yansi
author_rank: Super Contributor
timestamp: February 07, 2021, 07:05:27 pm
content: Hello,I would like to have a set of boards made and assembled using the JCLPCB SMT service. The boards are simple and small, 35 x 24 mm in size. The assembly seems to be limited to 50 pcs. Well, I need some more ~200 pcs. So I need to panelize the boards, somehow. Seems also the option "panelize by JLCPCB" can not be used with SMT assembly.What I am not sure how to do is:a) what software tool to use for such thing (does even any free software for that exist?)b) how to then make the PnP file? If I panelize for example 10 boards at a panel, I will get 10 components always with the same ID.c) related to the previous one, the BOM will need to have 10 times more components and probably with unique component IDs?Can anyone please enlighten me how to do this sort of stuff? Never done that before.Many thanks for any hints!Y

author: Zoli
author_rank: Frequent Contributor
timestamp: February 08, 2021, 04:09:35 am
content: Try to make your PCBoard 33.33333333333333333333333333(I've got digititis)X25, and place 12(3X4) on a 100X100mm panel, with edge cuts(or whatever your CAD calls the margins) between, and populate correspondingly. JLCPCB will do a v-score on the the PCB's before the SMT assy(I suppose, since I've never done that - I mean the SMT assy, because the V-score works), and if everything is OK, all you have to do is to snap the boards apart. Now 50 composit boards will give you 50X12=600 real boards... I hope it will work out well, let us know the result. And of course, contact JLCPCB foir details - I'm pretty sure that they will be helpful ...

author: Yansi
author_rank: Super Contributor
timestamp: February 08, 2021, 01:21:13 pm
content: According to an email response I've just got from JLCPCB, V-cut is not supported with the SMT assemnly. Only mousebite availabe. (Whyyy)If I panelize the design it will be difficult to generate new pick n place file, as I would need new sets of unique component IDs for all placements. I do not understand how this stuff should be really done, with a panel. :-ONormally, it is the manufacturer who understands the technology and how to make a panel suitable for their production line.

author: mvs
author_rank: Frequent Contributor
timestamp: February 08, 2021, 03:28:32 pm
content: If you plan to do assembly by JLCPCB, it is better to use their CAD - EasyEDA. It has proper online parts library (prices, availability, basic/extended category) and makes automatic panelization ("Tools" -> "Panelize") if needed.

author: Yansi
author_rank: Super Contributor
timestamp: February 08, 2021, 04:12:08 pm
content: Well the question was not what CAD I should use. What I have is a finished design in gerber file format, together with the PnP file and BOM in appropriate format. All I need is to somehow create a panel, to not pay for the fakin shipping and setup costs 4 times.One option to make my panel is CAM350 - but that is a payed software, so not an option.The only other option I have found so far ishttps://github.com/ThisIsNotRocketScience/GerberTools, unfortunately that stuff does not runy on my PC due to some .NET shitware, that just made its mind to not be possible to install.That way I am quickly running out of options (and time).One thing I still don't understand. Let's say I have a board, that has components R1 to R10, C1 to C10. I have an accompanying PnP file, with the relevant component positions and rotations.Now if I panelize for example two boards on one panel, I will of course get twice the amount of components. But how should I then generate the PnP file? What I don't understand then is how to ID the components on the panel.a) Do I have to make another set of unique IDs for each board in the panel? (like R1..R10 C1..C10 for board 1, R11..R20, C11..C20 for board 2, .. etc.)b) Or should I somehow specify multiple placement locations for R1..R10, C1..C10?The variant a) seems to be pretty annoying, in terms of generating the new PnP file with the extended component IDs. Variant b) is not specified from the manufacturer's side (in this case JLCPCB).

author: mvs
author_rank: Frequent Contributor
timestamp: February 08, 2021, 05:01:19 pm
content: It should be sufficient to panelize only board outline layer and add a note about parameters of your panel (row/column count and spacing, etc).At least EasyEDA panelization works like this.a) no, reference designator in PnP file is not obligatory uniqueb) you can scpecify multiple lines with same designator and different positions and rotations

author: Yansi
author_rank: Super Contributor
timestamp: February 08, 2021, 05:08:37 pm
content: Do you have experience whether the strategy you're describing as "Panelize only board outline layer and add a note about parameters of your panel (row/column count and spacing, etc)" is accepted by JLCPCB? I have quite some doubt here...a) b) now makes more sense, but question is, whether JLCPCB accepts it like that? (With regards to my example above, will they accept and calculate price correctly from a BOM with just 20 components (C1..10 R1..10) and then PnP file with N-times the same 20 IDentifiers?

author: mvs
author_rank: Frequent Contributor
timestamp: February 08, 2021, 05:26:04 pm
content: Quote from: Yansi on February 08, 2021, 05:08:37 pmNo, but that is what i get from their official tool, if i export gerber of a panel.With PnP file you have 2 options in EasyEDA. You can either choose to export it for one sub-board or for a full panel.In the case of a panel, you will get a file with all lines for the first board, then for second, third and so on.PS: You wrote that board is small and simple. Why not just to redraw it quickly and save the time on communication? There is room for an error, if you create bord outline separetly and calculate offsets for PnP file manualy. Without proper CAM tools you may not notice that.

author: Yansi
author_rank: Super Contributor
timestamp: February 08, 2021, 05:31:41 pm
content: Could you show us some screenshot please, how the gerber output looks like?

author: mvs
author_rank: Frequent Contributor
timestamp: February 08, 2021, 06:01:16 pm
content: Hier you go

author: Yansi
author_rank: Super Contributor
timestamp: February 08, 2021, 10:49:26 pm
content: Great, thanks! There is an option later in the process that says "help me copy the data" where you can just upload single PCB BOM and single PnP file, they will fill the panel with it themselves. That indeed is a huge helper!Anyway, I've managed to hack around it this time and just ordered it. I have deleted all component IDs from the silkscreen and just used unique ID for every component in the panel - as that is the only option my CAD allows me to do - at least without significant fight. Don't need component IDs in the silkscreen on simple PCB anyway.Next time, I will do it the way you have showed me - seems absolutely fine and exactly fit for purpose.Many thanks!

author: tszaboo
author_rank: Super Contributor
timestamp: March 26, 2021, 12:47:09 pm
content: Quote from: Yansi on February 08, 2021, 01:21:13 pmJesus Christ on a helicopter!I've just run into this myself. Honestly, there are so many restrictions with this company, I am seriously considering just ignoring it all together in the future. I just been charged extra 17 EUR on a PCB because there is too much milling on it. So a little milling is the same price as 8 other PCBs.I wanted to do assembly. PCB too small. I panelized it. Vcut not supported. So I guess I am supposed to redesign the board now. And a connector that I've selected last week (took me hours because they dont have the genuine JST part and their website is shit) is now gone. Not even on their website anymore. So their offer is to assemble everything themselves except this.What a joke, I cannot take them seriously. Are we supposed to change our designs every time before we order?There is this tool, to give you a better inventory:https://yaqwsx.github.io/jlcparts/#/They have a new library: Every. Single. Day.

author: MarkR42
author_rank: Regular Contributor
timestamp: March 26, 2021, 11:04:07 pm
content: Yes it is super-non obvious.I used jlcpcb with panelised designs in Kicad. I ended up using kicad-util (my own fork) and a custom utility I wrote which renumbers all the reference designators to be unique.So I can then tell jlc the BOM, so e.g. if i have a 1k resistor R1, but I have 8 boards per panel, it gives R1,R101,R201,R301,R401,R501,R601,R701 in the bom file and gives the pnp centre locations of each of the components which were originally R1, but in their new locations.My fork of kicad-util is here:https://gitlab.com/markxr/kicad-utilMy jlc exporter is here:https://github.com/MarkR42/kicad_manufacturingThis is all for kicad 6 (or nightly as 6 is not yet released)Obviously it's a fairly significant pain in the arse, I guess this is what you get for a cheap manufacturer.Other manufacturers are more flexible and will take a bom / pos file which has duplicate designators, as we usually get with panels.

author: yaqwsx
author_rank: Contributor
timestamp: April 29, 2021, 06:07:18 am
content: JLC PCB takes BOM/POS with duplicated entries with no problem. I use it with panels produced byKiKit- I ordered over 60 panels so far with no problems.