AVR vs SAM3S ARM flash data retention (100 vs 10 years?) - Page 1
Forum section: electronics / general

author: nazcalines
author_rank: Contributor
timestamp: November 11, 2014, 11:27:23 am
content: Anyone know what determines the data retention spec on these micros and why they are so far off?For AVR, the data sheet says 100 years at 25 deg Celcius. For Atmel SAM3S (ARM cortex M3), the data sheet simply says Min 10 years. No mention of temperature. Is there some CYA reason why the SAM3S spec is so much lower?

author: dannyf
author_rank: Super Contributor
timestamp: November 11, 2014, 12:23:22 pm
content: Maybe Atmel / ST know a thing or two about that?

author: diyaudio
author_rank: Frequent Contributor
timestamp: November 11, 2014, 01:58:40 pm
content: Quote from: nazcalines on November 11, 2014, 11:27:23 am10 years wow thats low.

author: David Hess
author_rank: Super Contributor
timestamp: November 11, 2014, 04:03:35 pm
content: It may be do to semiconductor process differences or different test methods but the later seems unlikely if they are coming from the same manufacturer. If the AVR parts are built on an older process and the SAM3S ones on a newer denser process which seems likely, then I would believe that difference in retention time.

author: coppice
author_rank: Super Contributor
timestamp: November 11, 2014, 04:35:11 pm
content: If minimum 10 years means across the whole temperature range it might not be that far from 100 years at 25C.

author: David Hess
author_rank: Super Contributor
timestamp: November 11, 2014, 05:38:12 pm
content: Quote from: coppice on November 11, 2014, 04:35:11 pmThere is no way to really know without more data from Atmel. Some of the newer dense floating gate processes really do have retention times that low though.

author: coppice
author_rank: Super Contributor
timestamp: November 11, 2014, 05:45:46 pm
content: Quote from: David Hess on November 11, 2014, 05:38:12 pmSome of the flash processes for dense flash storage have retention times of just a year or two, and need regular automated refresh. Store them too long in the draw and they are dead. They are starting to look like slow DRAMsThese are not the processes used for MCUs. People expect a sense of permanence from their MCUs.

author: paulie
author_rank: Frequent Contributor
timestamp: November 11, 2014, 06:14:47 pm
content: For really strange spec check out STM8's 100 write/erase cycles. 100 not 100 thousand.

author: David Hess
author_rank: Super Contributor
timestamp: November 11, 2014, 07:33:09 pm
content: Quote from: coppice on November 11, 2014, 05:45:46 pmFlash embedded into a microcontroller would normally be NOR flash to provide random access but I am sure there is pressure to make it as dense as possible.I have run across a few embedded designs now where the firmware for the microcontroller is stored in external NAND Flash and read into RAM for execution. If they use cheap high density NAND Flash, at least they will not have to worry about tin whiskers from lead free solder causing a failure.Do the various NAND Flash memories with embedded controllers refresh their contents while powered?Update:The similar Cortex M3 based microcontrollers from ST and Analog Devices specify a 10 year retention at 105C and 85C respectively so I think the lack of a temperature in the specification is just an oversight on Atmel's part and they may by 100 years at 25C.

author: nazcalines
author_rank: Contributor
timestamp: November 11, 2014, 10:09:00 pm
content: Thanks all for the replies. I'm going to ask Atmel and will let you know their response.

author: Jeroen3
author_rank: Super Contributor
timestamp: November 13, 2014, 08:31:17 am
content: Flash data retention is highly depending on the environment.- Temperature- ESD- (Electro)magnetic fields.- Ionizing radiation, chips inside satellites must be very robust for this.That's why it is important to verify flash integrity once in a while if you want a reliable application.Some manufacturers specify a minimum retention for normal house/office conditions. Most of them don't tell you anything.

author: coppice
author_rank: Super Contributor
timestamp: November 13, 2014, 08:49:10 am
content: Quote from: David Hess on November 11, 2014, 07:33:09 pmI don't know of any MCUs which do this automatically, but many MCUs now have marginal read detection facilities, so weak cells can be identified and pumped up by the software.There is an inherent crystal defect problem with flash for MCUs, which means that maybe 1 in 10k devices will have a cell that leaks away rapidly. Flash MCUs for high integrity applications, like portable medical devices, tend to have some form of ECC in their flash arrays these days to help deal with this.

author: David Hess
author_rank: Super Contributor
timestamp: November 13, 2014, 03:16:51 pm
content: Quote from: coppice on November 13, 2014, 08:49:10 amI was asking about NAND Flash memory which includes an interface controller. The MCUs I am familiar with all use NOR Flash and lack any sort of error detection support although I know of some exceptions which have some level of ECC support for at least RAM.