Electronic Load MOSFET balancing - Page 1
Forum section: electronics / projects

author: set
author_rank: Newbie
timestamp: January 08, 2015, 12:10:50 am
content: I am building an electronic load with a similar block diagram as the one describedhere (EEVblog 102), though mine is a little more complicated. I have a single 100 ohm resistor coming out of the 2nd op amp into the gates of 3 MOSFETs that are in parallel. When I apply a 5A load one of the MOSFETs gets significantly hotter than the other two, say 80 C vs 35 C. I understand that this is because the gate threshold voltage is slightly different across the 3 FETs and some are turning on more than others. The common solutions for this problem is either to have separate control circuitry for each MOSFET or to put a resistor between the source of the FETs and the common node above the current sense resistor. My problem is that my electronic load has a wide current and voltage range (10mA - 25A / .5V - 32V). To allow the wide range I have multiple current sense resistors that I switch in and switch out. Only a single current sense resistor path is active at a time. If I duplicate the control loop for each FET I also need to duplicate multiple resistors/switches which makes that solution less than ideal. I also don't want to add additional resistance to the load because some of my loads will need an equivalent resistance of 0.150 ohms while others would need around 15 ohms.Would there be any way that I can balance out the power dissipation between the multiple FETs without significantly adding to my parts list? As a note this load will not be for transients and will be used for set CC loads.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 08, 2015, 12:22:29 am
content: Quote from: set on January 08, 2015, 12:10:50 amYou answered your question.You need to main a separate control loop for each active cell so each current sink is working independently from each other, with this approach you now have a module based active load, where you can chain more "cells" and increase current capability.If you study the tear-down of the BK 8500, there are 2 quad opamps TL084 (I think), 8 * 2 IRFP 250 mosfets and x8 0.05 ohm 8 watt current balancer resistors, just by glazing over the tear-down its obvious they using the same approach.Have you calculated SOA ratings for your fets ?

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: January 08, 2015, 12:26:13 am
content: Hi,In this thread I showed how to use two MOSFETs. This technique can be expanded to as many MOSFETs that are needed to dissipate the power.https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg288313/#msg288313This technique is used by HP and BK and many other manufacturers' electronic loads.Regards,Jay_Diddy_B

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 12:59:54 am
content: QuoteUse a temperature sensor (ntc or ptc, for example) on each of the mosfet. The opamp drives the mosfets via voltage dividers, one of the "resistors" in the dividers is the temperature sensor. Set up the dividers so that when the temperature goes up, the divider generates a lower Vgs on the corresponding mosfet.In the end, all the mosfets will see the same temperature -> assuming identical divider / sensor parameters.One opamp is needed.

author: electros6
author_rank: Regular Contributor
timestamp: January 08, 2015, 06:27:39 am
content: In my electronic load I dsigned it for 20mA to 20A and almost 0 to 80V 150W . I used two two mosfet in parallel total of four mosfet and drive it from 1k resistor from the opamp and its works fine. I used two 0.01 ohm resistor to sense current and use two OP07 to amplifiy the drop across the sense resistor for each branch and add the two result.

author: set
author_rank: Newbie
timestamp: January 08, 2015, 04:28:12 pm
content: Quote from: diyaudio on January 08, 2015, 12:22:29 amIt seems like I may need to go with separate control loops but I was trying to find another solution before going down that path.I'm using theirfp3306pbf. Figure 8 has the SOA. I am in the SOA if I were to only use a single FET however I don't believe I can keep the FETs cool enough with a single FET. I could be using 2 FETs but I decided to use 3 FETs for an additional safety margin. If I do need to use separate control loops for each FET I will likely go back to using 2 FETs again.Quote from: dannyf on January 08, 2015, 12:59:54 amGood idea! I will be giving this a try.Quote from: electros6 on January 08, 2015, 06:27:39 amWhat were the ranges of your OP07 output? How accurate was the current sense? Could you post a schematic? It seems like you didn't have the problems I thought I was going to have and I may have over designed my solution. I am using a 4 channel ADC to measure the drop across each current sense resistor which have been sized so that I am always at least measuring >20mV as I didn't want the ADC to measure down too low.

author: retrolefty
author_rank: Super Contributor
timestamp: January 08, 2015, 04:46:43 pm
content: Seems to me the just selecting a single MOSFET suitable for the load ranges would be a lot simpler (cheaper? less PCB room, etc). Or would that be cheating?

author: set
author_rank: Newbie
timestamp: January 08, 2015, 04:57:35 pm
content: Quote from: retrolefty on January 08, 2015, 04:46:43 pmIf I could find a suitable FET that was cost effective I would go with it. I didn't find any that would let me dissipate the heat I needed to. I ran some basic thermal dissipation calculations and I would have a hard time getting all of the heat out of a single TO-247. It may be possible to use a TO-264 but I didn't see any FETs with a low enough Rdson in that package.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 06:30:19 pm
content: Another way to get it to work, without balancing resistors, is to use lateral mosfets.They are expensive (10x or so than the typical vertical mosfets), and of limited sourcing alternatives.

author: DanielS
author_rank: Frequent Contributor
timestamp: January 08, 2015, 07:17:32 pm
content: I would go with load-balancing resistors between source and sense resistors: simply match your FETs a little better and use the highest value load-balancing shunts your lowest voltage can accommodate at its highest current. With three FETs, the load-balancing should prevent the "worst" one from drawing more than 10A and if you use 2W balancing resistors (possibly in the form of a bunch of SMD parts or a piece of wire), that allows you to use 0.02 ohm shunts and you only need to match FETs within 150mV of Vgs. FETs also usually have a positive thermal coefficient, so they should self-balance themselves reasonably well as long as you do not give them a chance to self-destruct first.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: January 08, 2015, 07:43:51 pm
content: Hi,If you study these graphs on the IRFP3306 MOSFET datasheet:This curve shows that the RDSon increases as a function of junction temperature. It is normalized, to get the actual RDSon you multiple the RDSon at 25C by the coefficient on the vertical axis.Under these conditions the RDSon has a positive temperature coefficient. This only helps sharing if the MOSFETs are being used as a switch and the gate source voltage is high enough to fully enhance the device.In this curve, the transfer characteristics, the Drain current versus VGS is shown for two temperatures. As the temperature increases more current will flow for a given VGS. This is a positive temperature coefficient, but of transconductance. This is the curve that is applicable to an electronic load when the MOSFETs are being operated in the linear region. In the linear region there is the possibility of thermal runaway, because higher junction temperature, leads to more current, leads to a higher temperature etc.The op-amps are cheap compared to cost of the MOSFETs. I would strongly recommend 1 op-amp per MOSFET.I suspect that using an op-amp to servo the case temperature of the MOSFETs, as proposed by Dannyf, may work, it might also be too slow. It would be harder to implement than controlling the current in each MOSFET.Regards,Jay_Diddy_B

author: Pjotr
author_rank: Frequent Contributor
timestamp: January 08, 2015, 08:03:04 pm
content: Good point Jay. I don't know if this is already mentioned, but the same mechanism can lead to hot spots on the chip that leads to premature break down of some cell's. This causes an avalanche of broken cells, and finally the whole chip is broken. Therefore at DC, de-rate the maximum dissipation given for the device, by say a factor of 4 to be on the safe side.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:02:10 pm
content: A quick simulation.Here is basically a circuit as we discussed earlier, no temperature sensor is employeed: R1's value is not influenced by M1's dissipation (power, a proxy for its temperature).As I used purposedly two vastly different mosfet, the current imbalance is great: at 10v, M1 has 8amp going through it and M2 has 2amp going through it.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:05:06 pm
content: Now, the same circuit, the same mosfets, with a ntc in R1: R1's value goes down as power dissipation (again, a proxy for M1's temperature) goes up.The current imbalance still exists but it is much smaller: at 10v, M1 flows 5.4amp and M2 flows 4.5amp, approximately.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:08:43 pm
content: Obviously, you will need to do some analysis in picking the values of the dividers. Ideally, you want to set the dividers so that at full power, they flow roughly the same amount of current -> lower power imbalance doesn't matter as much.The beauty of lateral mosfets is that they have much lower knee point for their tempco so that such an imbalance is taken care of automagically. For vertical mosfets, the transition points are so high that the mosfets are practically destroyed long before.Hope it helps.

author: c4757p
author_rank: Super Contributor
timestamp: January 08, 2015, 09:13:29 pm
content: Surely you don't think that when investigating thermal runaway (which happens quite fast when it gets going) and thermistors attached to the package (rather slow), a simple simulation with no time delay whatsoever hasanyrelation to the real-life performance of the circuit...

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 08, 2015, 09:35:06 pm
content: Question. with the selection of the irfp3306pbf...why use a mosfet primarily designed for switching applications? its rated at 4.2mill ohms RDS(on), @ 60V VDSS... The eload mosfets are functioning in its linear region.(most of the time) this would impose on cost as manufacturing processes with low rds(on) increases in cost. Its better to use something in the ohm region of 0.02 there about, older power mosfet technology is suitable for applications like this.I paid $1 (locally) for an IRFP260 VDSS = 200V, RDS(on) = 0.04 ohm, ID = 50A, where the irfp3306pbf costs $3.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:42:31 pm
content: I was asked that as the current going through the two devices seems to be so un-linear, will the circuit generate a linear output on the load (R3 in my circuit).Here is the simulation, with the load current on R3 plotted in the red trace.Hope it helps.

author: set
author_rank: Newbie
timestamp: January 08, 2015, 09:43:37 pm
content: Quote from: diyaudio on January 08, 2015, 09:35:06 pmMy application requires some of the total equivalent resistance to be around 150 mohms. I am want to minimize the potential on resistance of the FETs in case my system approaches 150 mohms on its own. The IRFP250 looks like it has an on resistance of 85 mohms and even is parallel that is around 1/3 of my total resistance when fully on.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:44:55 pm
content: QuotePractically all of today's mosfets are designed for switching applications, your IRFP260 included.The only known exceptions are the lateral mosfets and power jfets (which are no longer produced).As to why one switching mosfet vs. another: it could be a gazillion (valid) reasons, like availability, .... What cost you $3 apiece could cost someone nothing, and vice versa.

author: dannyf
author_rank: Super Contributor
timestamp: January 08, 2015, 09:46:02 pm
content: QuoteRds(on) has no meaning for linear applications.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 08, 2015, 09:49:42 pm
content: Quote"fully on in saturation mode" the issue im trying to understand is this, the mosfets are in linear operation, so why the focus on a design parameter like "fully on in saturation mode" and its not used ?

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 08, 2015, 09:50:15 pm
content: Quote from: dannyf on January 08, 2015, 09:46:02 pmyou beat me to that one.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: January 08, 2015, 10:23:57 pm
content: Hi,While you guys were busy typing away, I was running simulations of a sharing circuit. I used two very different MOSFETs in the simulation.Here is the LTspice model that I used:And the results from a DC sweep showing that there is perfect matching between the two MOSFETs. In practice there will be a few percent difference resulting from the tolerance of the 0.1 current sense resistors:I also tested the circuit under dynamic conditions. You can see that even with the different MOSFETs there is very good tracking between them:This is several orders of magnitude faster than trying to force sharing by measuring the case temperature of the devices. If you look at the Safe operating for the iRFP3306, under DC conditions the MOSFET is capable of 40W dissipation and 80W for 10ms. This SOA graph shows the thermal instability region, indicated by the breakpoints in the SOA graphs. The heat will not transfer fast enough to force the sharing.You will find this method of forcing the sharing in HP 6060A, 6060B and 6050x series of electronic loads.Regards,Jay_Diddy_B

author: Pjotr
author_rank: Frequent Contributor
timestamp: January 08, 2015, 11:04:13 pm
content: Quote from: Jay_Diddy_B on January 08, 2015, 10:23:57 pmRegarding this, the old style large chip mosfets are in favor. Those have also a lower channel to case R_Th which helps to avoid thermal runaway. Found some good reading about it:http://www.infineon.com/dgdl/Infineon+-+Application+Note+-+PowerMOSFETs+-+OptiMOS%E2%84%A2+-+Linear+Mode+Operation+and+SOA+Power+MOSFETs.pdf?fileId=db3a30433e30e4bf013e3646e9381200And IXYS seems to make special powerfets for linear applications:http://www.ixys.com/Documents/Articles/Article_Linear_Power_MOSFETs.pdf

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: January 08, 2015, 11:29:40 pm
content: Hi,Here is another paper on MOSFET thermal instability:http://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20100014777.pdfThis all started when people noticed that MOSFETs were failing inside their published SOA curves. What happened was the MOSFETs designers were so focused on improving the switching performance and RDSon that they forgot that there are some applications that use the MOSFETs in the linear region.Older parts generally do better in these, linear, applications. The problem is that not all the datasheets have reliable SOA graphs. If the graph looks like the IRFP3306 that I posted early then it is probably reliable. If the graph consist of straight lines, it from the results of calculations and may not include the thermal instability region.This is the SOA curve from the Vishay IRFP250. This is probably based on calculation, not measurement. The limitation is based on transient thermal impedance only. It is an example of an unreliable SOA curve.:Regards,Jay_Diddy_B

author: DanielS
author_rank: Frequent Contributor
timestamp: January 09, 2015, 12:03:41 am
content: Quote from: dannyf on January 08, 2015, 09:46:02 pmIt does enable you to summarily dismiss FETs which have higher ON-resistance than what your linear application requires - you are not going to use FETs with 1 ohm ON resistance in an electronic load that needs to go below 0.1 ohm... unless you want to put 10+ of 'em in parallel.I would say this just about as useful as voltage and current for weeding out the initial device selection for applications where the FETs may need to operate just shy from their ON-region.

author: Kevin.D
author_rank: Frequent Contributor
timestamp: January 09, 2015, 11:47:26 am
content: With regards to mosfet selection and RDS(on) advice ,It's true to say having a low RDS(on) does not have any meaning in linear mode,Though It does play a small role here (e.Load) in that it will determine the minimum resistance that the load can achieve ( minimum Burden Resistance), this then determines the maximum current the load could sink with low input Voltages present. (simple e.g - if we have a Rsense of .1 ohm and a RDS(on) of .1 ohm then the Max current we could possibly sink when input is only 500mV would be .5/.2= 2.5 A ,if you have two of these in parrallel then it would be 5A ).But also when choosing a Mosfet for linear application I would use RDS(on) a filter search critera and choose the power mosfet with the HIGHEST rds(on) I could accomodate to meet my minimum resistance critera.The logic here is that the newer generations of mosfet which have been optimised for switching (so optimised for a really Low RDS(on) and high GM which is good for switch efficiency but not meaningfull for linear operation ,and one of the trade offs (no free lunch as usual) for producing a low RDS(on) high transconductance Fet seems to be that the Vgs Zero temp Co 'ZTC point' (which is the point which if we are below we have to have some extra thermal derating at higher Vds) gets even higher so requiring us to have extra derating .I am not 100% sure why the ZTC point moves up so much with lower rds(on) power mosfets but it will make a large difference to power handling at higher end of Vds .By selecting an older generation or even newer but unoptimised RDS(on) FET that should be giving you a mosfet with higher ZTC point and so will have much less of this extra thermal derating..So filtering by this critea and power dissipation should be a good selection method for this application, no need for expensive ones as the real bottle neck here in this application is Case to Sink Thermal resitance , so if theres no need to skimp on numbers you can use as many cases as required in parrallel to get overall low Case to Sink thermal resistance,also as Mr J.Diddy pointed out opamps are also really cheap so giving each it's own opamp is no big cost.(drive speed is also another reason why it's also beneficial to have each mosfet with it's own opamp for the extra drive current capability you are getting over having one opamp trying to drive multiple large Fets).(I did A quick fet search which turns up examples like the IRFP250 which is only $1.50 a piece and will be much more suitable than your irfp3306 (notice the much higher RDS(on) 85mO compared to the irfp3306 with 6mO and notice there is much less extra derating required on the soa at the right bottom corner ,this one is used in Maynuo load, someone said ) .Also to add another reason for choosing a higher RDS(on) power fet for linear mode operation is that there's also a realtionship between Crss (gate to drain capacitance- Cgd) and RDS(on) . Cgd generally gets larger the lower the RDS(On) is made, and having as little Cgd as possible is important for a stable and fast controll loop, in this application it's value is multiplied (miller effect and low Vds effect) and can appear as much as 1000 times larger as the figure given in the mosfet data sheets. This capacitance has to be dis/charged by the driving opamp so it's best if this is kept small.Regards

author: dannyf
author_rank: Super Contributor
timestamp: January 09, 2015, 12:14:49 pm
content: QuoteIt is structural. Lateral mosfets have its transition points in the 1-200ma range, and vertical mosfets have its transition points typically in the 10 - 20amp range -> for linear applications, the mosfets are destroyed far before you even reach that kind of levels.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 09, 2015, 01:57:09 pm
content: Quote from: Kevin.D on January 09, 2015, 11:47:26 amYup, Kevin is on the money, fully agree!One issue though that wasn't covered is the Qg parameter of the mosfet "gate capacitance channel" and how an operation amplifier deals with driving capacitive loads that may lead to phase shift resulting in self sustained oscillation (feedback from the current sense node) formed by the pole/zero location which is the product of the parasitic gate charge and output impedance of the op-amp forming a RC lag.I recommend this video by Matt Duff, he did a full short series on op-amp stability, one video specifically covering driving capacitative loads.