68HC11F1 setup questions - Page 1
Forum section: electronics / general

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 28, 2022, 12:21:12 pm
content: I would like to hear from those who have used the 68HC11F1 (PLCC68 package), as it seems there are still some erroneous assumptions in my design.First of all, on the hardware side, I currently have the 1MHz oscillator fed into pin 6 (EXTAL) and connected to the other chips needing a clock signal as well; pin 7 (XTAL) has a 10K pull-down; and pin 4 (E) is currently not connected.I see the documentation says that I should be using a crystal 4x the desired frequency?Was I supposed to feed 4MHz into EXTAL and then take the system clock from E?Then going over the internal registers used, it seems that I need to add a few initialization instructions to the startup code.I don't understand what the IRV bit in the HPRIO register does. Do I need to set this or not? (I have the HC11 set to Expanded mode).Also, should I enable the COP watchdog?

author: newbrain
author_rank: Super Contributor
timestamp: July 28, 2022, 01:20:12 pm
content: Note that I only used a 68HC11A8, and many years ago.As you suspect, the quartz/oscillator frequency is internally divided to generate an 4 phase clock for internal needs (e.g. fetch decode execute etc. - though I don't have details).One of these phases is brought out as E.So, with a 1 MHz external clock the actual system/memory clock (E) is 250 kHz.Depending on your needs, this might be what you wanted or not; still, it's E that must be used to e.g. gate memory control signals.Unless you need it for debugging and trouble shooting, I would not set the Internal Read Visibility bit: in Expanded mode there might be bus contentions.What the bit does is driving data read from registers or internal addresses on the data bus - useful with a logic analyser, but otherwise not needed.Having or not an active watchdog is your design choice: if active, it must be periodically kicked by the FW; since you are asking, I suppose you don't need it and would leave it disabled.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 28, 2022, 03:51:23 pm
content: Okay. Oversight on my part then... definitely different than the arrangement on the original CPU..I'll fix the design docs and I will need to do a bit of cut and jumper to mod the current board.So I can just ignore the IRV bit part and go without the COP.Two other questions -I won't be using the 4XOUT pin. Is there any benefit to turning off the pin in software?Last but not least, I don't need the on-board EEPROM, so I would prefer to set it to $Dxxx and turn it off (so it's not in the way of the firmware ROM I plan to locate at $E000).This involves changing the CONFIG register. Can it be done through firmware or do I need something special to change it?

author: coromonadalix
author_rank: Super Contributor
timestamp: July 28, 2022, 04:42:56 pm
content: HC11 reference manualhttps://home.deec.uc.pt/~jlobo/tc/M68HC11_ref_man.pdfhttps://ia800907.us.archive.org/8/items/bitsavers_motorola68ferenceManualRev3_31028881/1991_M68HC11RM_Reference_Manual_Rev3.pdf

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 28, 2022, 05:26:06 pm
content: I have the manuals already. Was hoping for input from someone who has real-world experience with this relatively obsolete chip...

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 05:58:06 pm
content: Code:#define HPRIO $3C ; Highest Priority Interrupt and miscBCLR HPRIO,X %00100000 ; put into single chip mode...BSET HPRIO,X %00100000 ; put into expanded chip mode

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 05:59:30 pm
content: Quote from: metertech58761 on July 28, 2022, 12:21:12 pmonly after setting the interrupt table

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 06:17:57 pm
content: my setup for expanded mode isCode:HPRIO= 0x103c ; Highest Priority I Bit interrupt and misc registerCode:.section .text.textmy_start:reset:sei ; disable interruptlds #stack ; initialize the stack pointerldx #base_io ; load the register base address;; -------------------------------------------------------------------------------start:;; -------------------------------------------------------------------------------;; Put the 'HC11 into expanded mode!ldaa #0x66staa HPRIO;; -------------------------------------------------------------------------------you can look at the source of BUFALO.

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 06:19:04 pm
content: Quote from: metertech58761 on July 28, 2022, 03:51:23 pmYou can configure it with the firmware, and you can program it. There is a special register, that stores the configuration.

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 06:20:10 pm
content: Did you design your board?

author: DiTBho
author_rank: Super Contributor
timestamp: July 28, 2022, 06:26:55 pm
content: Quote from: metertech58761 on July 28, 2022, 12:21:12 pmOn the F1 EVB board made by Motorola in 1995, there is an hardware debugger and it's the only setup I have ever seen with the IRV bit set to 1.Don't set it, because, without the Motorola hw debugger circuit, internal registers and memory locations could be randomly driven out on the data bus, making it a mess.If you need a debugger but you don't have the Motorola debugger, use a software talker in "special serial boot mode".

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 28, 2022, 08:36:25 pm
content: To respond to the previous posts -There is already an interrupt in the firmware (NMI driven by a pulse train from the 6840 PTM), which handles the I/O, so I won't monkey around with that part too much.This HC11 is put in expanded mode by pulling both MODA / MODB pins high.This is a project where I reverse-engineered a piece of equipment then updated it with more modern parts.The original equipment uses a MPU that was a bespoke part developed for industrial applications, and the HC11 is the closest match.

author: Benta
author_rank: Super Contributor
timestamp: July 28, 2022, 10:51:05 pm
content: Quote from: metertech58761 on July 28, 2022, 08:36:25 pmNMI for I/O? Seriously? Also, the 'HC11 doesn't have an NMI. It has an XIRQ, which solves the problems of a traditional NMI.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 29, 2022, 07:02:13 am
content: If it helps, here's a copy of the schematic of the board with the HC11. The 2732 serves as a chip select for the PTM and PIA, the 2764 has the firmware.

author: newbrain
author_rank: Super Contributor
timestamp: July 29, 2022, 02:21:04 pm
content: Quote from: metertech58761 on July 29, 2022, 07:02:13 amMake sure the total access time of two cascaded EPROM is quick enough; they are not the fastest memories, and there are setup and hold times to abide by.Though probably, as the address and data buses are not shared, you have a good margin.I used a couple of flash to run a a 68HC11 at 2 MHz (8 MHz/4), one for address decoding and some other glue logic functions, the other for FW.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 29, 2022, 02:55:29 pm
content: The 2764 holds the actual firmware, while the 2732 handles the chip select (D0 = 2764, D1 = 6840 / 6821, D2 = 8279 on display board)A GAL would be the preferred solution, sure, but I figure that a 1MHz clock should be slow enough that an EPROM would be an acceptable substitute?

author: newbrain
author_rank: Super Contributor
timestamp: July 29, 2022, 05:17:13 pm
content: Quote from: metertech58761 on July 29, 2022, 02:55:29 pmAs said, it's probably OK, depending on the EPROMs (and other peripherals) access times.Checking the datasheets and the needed bus timing will make sure it actually is.In my case, with a multiplexed bus and a 2 MHz clock, it definitely wasn't.EtA: Looks fine, unless you have ultra slow EPROMS. BUT:I do not like the 2764 to have outputs permanently enabled.This can cause bus contention if a write is issued to an EPROM address, and possibly to some other address while the address bus and the 2732 decoder stabilize. Since you already have a /RD signal, you could use it for the 2764 /OEThe schematic uses 74LS series ICs, as the 68HC11 is a CMOS processor, you could safely use HC (or HCT) series logic.

author: DiTBho
author_rank: Super Contributor
timestamp: July 29, 2022, 05:41:12 pm
content: The Motorola M68hc11EVB board (68hc11A or 68hc11E) uses a 27xxx 16Kbyte UV EPROM.

author: newbrain
author_rank: Super Contributor
timestamp: July 29, 2022, 05:54:51 pm
content: Quote from: DiTBho on July 29, 2022, 05:41:12 pmAs decoding logic (poor man PLA)? I'd be surprised!

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 29, 2022, 06:53:39 pm
content: Re: the /OE for the 2764, I was actually wondering about that. I'll see about putting that trace in the layout.And looking at my build notes, the actual ICs on the board are HC and not LS.I'll update the schematic for accuracy.

author: DiTBho
author_rank: Super Contributor
timestamp: July 29, 2022, 07:10:03 pm
content: Quote from: newbrain on July 29, 2022, 05:54:51 pmNo, not as decoding logic! I meant, the simplest solution I have ever seen is on the m68HC11-EVB board, where the /CS of the ROM comes from a 74HCxxx decoder that partitions the address space. I think it's the "poor man" solution ever, which works very well and it's easy to achieve.Some other boards used a GAL or a simple programmable logic device (SPLD) instead of discrete logic ICs for the address decode.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 29, 2022, 11:10:00 pm
content: The specific part for the 2732 is AM2732A-200 and the 2764 is MM27C64Q 200

author: srb1954
author_rank: Super Contributor
timestamp: July 29, 2022, 11:51:44 pm
content: Quote from: metertech58761 on July 29, 2022, 02:55:29 pmOnly if you are using fast EPROMs, 70ns or better. Otherwise your margins on setup and hold times are probably going to be insufficient for reliable operation.The more usual decoder solution is to use a 3-line to 8-line decoder chip like the 74HC138 as its speed is adequate for systems such as this.You really need to do a full timing diagram to check access times to each peripheral device. Particularly check the 8279 access times as this is an old and relatively slow chip.

author: srb1954
author_rank: Super Contributor
timestamp: July 30, 2022, 12:12:21 am
content: Quote from: metertech58761 on July 29, 2022, 07:02:13 amEnsure that all unused input only pins are tied to ground or supply as appropriate so that there are no floating input pins. Unused I/O pins should be programmed as outputs so they don't float.This whole circuit could be simplified considerably if you transfer the timer (6840) and I/O (6821) functions back into the 68HC11F1 leaving only the external EPROM.Using a another 68HC11 family member such as the 68HC711E9 would simplify the circuit even further by moving the program memory on-chip and operating in the single-chip mode. however, this makes program debugging more difficult without having an emulator or a evaluation board to allow easy program changes and external visibility of the program operation to a logic analyser.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 30, 2022, 12:57:27 am
content: The original circuit used several 74xx gates to do partial decoding of the addresses. Trying to work out how to tweak the decoding to accommodate the the change from this bespoke MPU to the HC11 was complicated enough I thought about switching to a GAL, then I recalled working on some other boards in the past that used an EPROM for decoding.I looked through my stash of EPROMs and it seems all of them are glacially slow at 200 or even 250nS. Rats.I noticed the timer section on the HC11, but am not sure of the feasibility of implementing it.The 6840 is set up so Timer 1 is a programmable delay (1/16 second per count), Timer 2 generates a steady 2.439kHz signal (this is fed to the XIRQ line), and Timer 3 generates a switchable 12.5kHz signal (signal carrier).The 6821 has three lines under the interrupt routine's control (PA0-PA2), initialization signal (PA4 - output), contact closure checks (PB0-PB3), mode select (PB6), and keypress pending indication (PB7).

author: srb1954
author_rank: Super Contributor
timestamp: July 30, 2022, 05:55:53 am
content: Quote from: metertech58761 on July 30, 2022, 12:57:27 amJust use the programmable chip selects available from port G of the 68HC11F1. These require a little bit of startup code to set up the various registers controlling the chip selects but they are very versatile and allow clock stretching to cater for slow peripherals such as the 8279. Otherwise, clock stretching is not really feasible with the HC11 family and the only solution is to run the processor at a sufficiently slow speed to interface to the slowest peripheral chip thus causing a penalty to the overall system performance.QuoteThe internal HC11 timer will handle these tasks but the operation of this timer is significantly differently and more flexible than the 6840 timer. The cost of this is that the HC11 timers require a bit of S/W to reset the timer after each output pulse if you are using them to generate a fixed output frequency. You need to study the user manual carefully to understand how the timing system operates.Having interrupts at 2.439kHz is pretty fast for uPs of this vintage and will consume quite a bit of processor time in the interrupt handler. I would recommend increasing the main processor clock to 8MHz to ensure that sufficient processing power is available for the main application S/W. Operating at this higher speed will require faster external EPROMs and decoding logic. This will definitely rule out using an EPROM as a decoding chip.Converting to a chip using internal program memory such as a 68HC711E9 avoids all the timing issues associated with external memory and can be run at full speed with no issues.QuoteIf some of these outputs are controlled in response to a timer interrupt their function might also be able to carried out by the timer subsystem in the HC11 reducing S/W overhead. Again, this requires thorough reading of the user manual to understand the capabilities of the timer system.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 30, 2022, 06:48:25 am
content: I'm beginning to wonder if I took on something well above my pay grade.Just for laughs, here's the original circuits that I started with.

author: DiTBho
author_rank: Super Contributor
timestamp: July 30, 2022, 09:20:26 am
content: just checked, the uv eprom on the evb board is 70ns.

author: newbrain
author_rank: Super Contributor
timestamp: July 30, 2022, 10:49:39 am
content: Quote from: metertech58761 on July 29, 2022, 11:10:00 pmFine at 1 MHz, from a quick check of the timing diagram. Definitely not at 2 MHz.I'll throw in a provocation: have you considered going on a completely different road?How about using an AVR (a 328P might be enough!) or some other 5V (tolerant? STM32?) MCU?The original FW must be rewritten in any case and:A modern MCU has much more power and flexible peripherals.No need to fuss with external memoryInterface to specific peripherals (8279) can be bit banged through a GPIO port.Last, but not least, tools for a modern(ish) MPU are much more pleasant to useThat said, I also like tinker with vintage stuff...

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 30, 2022, 03:03:56 pm
content: I sure would like to 'port' the code to a newer platform, but there are parts that I can't quite get my mind around how to translate to C.These parts involve 8-bit signed arithmetic, carry flag usage, and bit rolls.

author: newbrain
author_rank: Super Contributor
timestamp: July 30, 2022, 03:52:55 pm
content: Quote from: metertech58761 on July 30, 2022, 03:03:56 pmSo the original FW in assembly language is available - that's good.I can understand that going the HW way with a largely similar MCU is appealing.In any case, if you have only a few spots to clarify in ASM->C, eevblog denizens (me included, when possible) are usually more than willing to help - it's your choice.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 30, 2022, 09:00:24 pm
content: I dumped the original EPROMs and used a program that converted the binary to assembly, and after reading through the code umpteen times, I was able to make reasonable guesses as to what a lot of it does.Some sections, like where it converts between binary and BCD, I'm sure could be replaced with standardized code.Okay. Gimme a bit to make sure the dump and my assembly cleanup are legible then I'll start a fresh thread.

author: Benta
author_rank: Super Contributor
timestamp: July 30, 2022, 09:29:34 pm
content: Right.Again, the main issue I have (HW-wise) is using NMI (6801 version) or XIRQ (68HC11 version) for timing. That's a total no-go and always has been. I don't know who designed this, but he/she would never get a job with me.NMI or XIRQ are for catastrophic failures (eg, power fail). IRQ is for smooth, controlled execution.

author: metertech58761
author_rank: Frequent Contributor
timestamp: July 31, 2022, 01:49:20 am
content: I think the reason for using NMI in this case was so the receive / transmit code can run continuously in the background.So if I stayed with the HC11, I would be better off swapping the connections for XIRQ and IRQ?

author: DiTBho
author_rank: Super Contributor
timestamp: July 31, 2022, 09:37:56 am
content: Unbelievable that Motorola didn't release cheap evaluation boards for K* and F*, but only for A* and E*EVBEVBUEVBU2EVS and EVO were expensive, but with an hw debugger.A "poor man" solution used with EVB for single stepping code debugging, useful for studying the HC11 instruction set and program operation, was connecting PA7 and /XIRQ together.

author: newbrain
author_rank: Super Contributor
timestamp: July 31, 2022, 01:27:27 pm
content: Quote from: DiTBho on July 31, 2022, 09:37:56 amAh yes, same as it was done on the 6502 with Sync and NMI (through an inverter, possibly gated not to single step in the NMI routine itself).

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 03, 2022, 08:27:03 pm
content: Quote from: metertech58761 on July 30, 2022, 03:03:56 pmDid you look into Tekmos parts ?https://www.tekmos.com/products/microprocessors/68hc711-microcontrollersIf you have enough volume to port to a newer platform, usually you do not try to clone ASM lines to C lines.I think you have functional ASM code that you can edit ?If you have that, you can move it to a more [library + asm] structure, while keeping functionality you need.Then, those library calls can be simple C operators.You then create a new version, with a focus onfunctionalequivalent in C, rather than line by line equivalent.If you have two working boards, this pathway is predictable.Quote from: metertech58761 on July 30, 2022, 12:57:27 amIf you know what hardware timing you need, you can start a parallel development by doing that on a NEW MCU using C to init those new peripherals.Is there anything here that reallymust be HC11 cycle-identical? (nothing above sounds cycle timing paranoid)

author: newbrain
author_rank: Super Contributor
timestamp: August 04, 2022, 06:40:28 pm
content: DiTBho kindly asked me in PM how did I come to the conclusion that:Quote from: newbrain on July 30, 2022, 10:49:39 amHoping that the answer might be useful to someone else, I'll put it here, instead of a PM to them.First, I got the timing diagram and values for the non multiplexed bus of the F1 fromhere, Appendix A (see Picture1 and 2 attachment).Then I got the same for the EPROMS, see Picture 3 - this is for a 350 ns access time 2716, which is more conservative wrt the OP EPROM (300 ns).Last I checked the 6840 timing, Picture 4.Now I have everything I need.We need to make timing requirements in Picture2 are fulfilled.For reads from the FW EPROM to succeed, I look at the second falling edge of E and work backwards.Setup time (17) is 30 ns at 2 MHz, let's be conservative and use 40 ns (as it seems to decrease when raising the frequency).Hold time (18), 0 ns for all clock frequencies, let's go with that (i.e. no need to check it!)-Now, since I had suggested to qualify the /OE signal with E & R/W, i.e. use the already available RD and as this was a quick check I'll ignore the handful of ns of an HC gate), /OE will become valid (low) when E rises (R/W from the MCU is stable long before).I look in Picture3 to tGLQV, time from /OE low to data out: 120 ns: with 500 ns half cycle, we have a margin of:500 - 120 - 40 = 340 ns, no issue here.Then I checked the time it takes the 2764 to provide a stable output, tELQV: 350 ns.The time needed for the 2732 to give a valid /CS to the 2764, is of course the same.Going backwards from the E falling edge, we need to sum:40 ns setup time350 ns 2764 access time from /OE350 ns 2732 access time (since its /OE and /CS are always active, I use tAVQVin Picture3165 ns Address Delay Time (11 in Picture 1 and 2), 1/8 cycle time + 40 ns-------905 nsAs this is less than our 1000 ns cycle time (and we have about 100 ns margin to add, as I used 350 ns instead of 300), I foresee no issue.The same exercise, mutatis mutandis, can be applied to the 6840 - similar results.So OK for 1 MHz E clock.Not so much for a 2 MHz one, the first check will still be OK, but the second one gives:30 ns setup time at 2 MHz300 ns 2764 access time from /OE300 ns 2732 access time (since its /OE and /CS are always active, I use tAVQVin Picture3103 ns Address Delay Time (11 in Picture 1 and 2), 1/8 cycle time + 40 ns-------733 ns50% greater than our cycle time, so no go.

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 06, 2022, 04:27:26 am
content: I'll check out the HC711 MPUs and see which version etc. to go with - thanks for the link. (edit: that vendor has a 100-piece MOQ)I also posted the section of code I'd tried converting; see if I had been on on the right track.

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 08, 2022, 07:35:25 am
content: QUESTION:In post 26, there are a set of buffers in between the logic and interface boards (74LS241, 74LS244,74LS245).What is the determining factor whether or not to have such buffers on inter-board connections?In the original unit, the two boards are connected via two 18-conductor ribbon cables.Do I assume correctly if the boards were adjacent to each other (i.e., connected by a header instead of ribbon cable), such buffers would not be necessary?What impact do these buffers have in the overall timing scheme?

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 17, 2022, 03:05:25 am
content: Let me just push the crickets and tumbleweeds aside for a few minutes.Supposing I was to swap the EPROM with a GAL - would this be the correct way to hook it up?Also, if I used a TLC7705 instead of the DS1233+ (because it has active-high AND active-low reset outputs), would I be able to use both outputs at the same time or is it better to stick with a single-output device and generate one output with an inverter?

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 30, 2022, 07:51:06 am
content: Anyone out there?So I went back and made some corrections to the design:Added terminating resistors to all unused ports on the 'HC11Moved the receive clock connection from XIRQ to IRQChanged master oscillator to 4MHz and tied it to EXTAL on the 'HC11Moved the master clock (E) source to pin 4 on the 'HC11Replaced the 2732 EPROM with a 16V8 GALReplaced the DS1233 with a TL7705A (as it has both active-high and active-low reset)How's that?

author: srb1954
author_rank: Super Contributor
timestamp: August 30, 2022, 11:36:48 am
content: Quote from: metertech58761 on August 30, 2022, 07:51:06 amYou also need to:Strap the 6840 C1, C2, C3 inputs to ground or supply or via a pull-up resistor.Strap the 6821 CA1, CA2 inputs to ground or supply or via a pull-up resistor.Strap the 16V8 CLK, OE inputs low and all other unused IO lines to ground or supply or via a pull-up resistor if not programmed as outputs.You don't really need the pull-up resistors on the address bus nor on ports PA, PD or PG if the pins on these ports are programmed as outputs. The unused bi-directional ports and control pins (CB1, CB2) on the 6821 also need to be programmed as outputs to prevent static charge build-up on floating inputs.There is a potential issue with obtaining valid logic levels on the processor data bus as you are using a mixture of CMOS and HMOS chips. The 68HC11F1 is a CMOS device and requires a input logic high of minimum 3.5V when reading from peripherals on the data bus. However, the 2764 EPROM, 6840 timer, 6821 PIC and the 8279 KDB interface are all HMOS devices and only guarantee a logic high level of 2.4V when driving the data bus, not sufficient to guarantee the 68HC11F1 to see a valid logic high level. It would be best if you could use all CMOS devices but I am not sure if all the peripheral chips were ever available in CMOS.The pull-up resistors on the data bus help pull the logic high levels up to the 3.5V level but, because of bus capacitance, the rise time from 2.4V to 3.5V can be too slow for the processor to read a valid logic level at the end of a bus cycle. Reducing the pull-resistors can help improve the rise time; I generally would use 3K3 as this corresponds to the maximum rated current, typically 1.6mA, that the peripheral chips can sink when driving the bus. The whole area of the bus logic levels and timing needs careful examination when you build a prototype.All the issues of speed, logic levels, timing etc could be avoided if you were to collapse the whole design onto the 68HC11F1 operating in single chip mode. But this would be at the expense of having to rewrite some of the S/W.

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 30, 2022, 12:31:52 pm
content: With so many ill-fitting moving parts in this, it's no wonder that my attempt to copy the original is so fragile design-wise.On the original, the 6840 had those three pins floating, as well as on another board in a similar application. I'll check the configuration code and then look at adding a pull-up for those.Also, as far as the 6821, CA1 was left floating, CA2 went to what appears to be a watchdog section (but nothing in the firmware handles the watchdog), CB1 had a pull-up but also went to a non-populated connector, and CB2 went to a non-populated section of the board.As for pull-ups, the address bus only had them on A0-A7.Your comment explains why the original used 3.3K pull-ups, and i'll see about making the suggested changes. Thanks!

author: metertech58761
author_rank: Frequent Contributor
timestamp: August 31, 2022, 02:07:20 pm
content: Going through the post from @srb1954Done:6840 C1, C2, C3 pins: Tied together to a single pull-up6821 CA1, CA2, CB1, CB2 pins: each pin tied off to a pull-upAll 10K pull-ups on the HC11 have been changed to 4.7K6821 setup code: DDR values were corrected to set all unused PAx / PBx pins to output mode (as was in original unit)Figured out how to configure and use the chip selects on Port G, permitting elimination of the GAL.To do:Verify whether I should go ahead and remove the pull-ups from A0-A15 (the original had them on A0-A7 only).Review HC11 documentation to try and understand how the timer pins on Port A work in hopes of eliminating the 6840.Determine whether I need to use the HC11's on-board EEPROM as a bootstrap to initialize the internal registers firstWish list:If anyone is familiar with the HC11 timer, here is how the 6840 is set up:Timer 1: Fully internal; used only to provide a programmable delay (looks like 1/16 second per count - can provide assembly code)Timer 2: Output is 'always on' and is routed to the IRQ pin to provide interrupt signal (sampling timer)Timer 3: Output is switched on/off as needed to provide the output carrier frequency (modulated with 6821 PA1 line via XOR gate)

author: metertech58761
author_rank: Frequent Contributor
timestamp: September 02, 2022, 07:36:52 am
content: Current version - eliminated the 6821 in favor of using ports A / G on the HC11.If I understand right, there shouldn't be any problems using PG0-PG3 (am using the chip selects on PG4-PG7 - which should allow me to remove the GAL).As for using Port A, as long as I don't touch any of the timer registers, only Port A data / DDR registers, I should be able to use it for I/O, correct?

author: siliconal
author_rank: Newbie
timestamp: May 29, 2025, 05:21:38 pm
content: I'am revesing a board that drives 3 phases electrical motor for textile machine.the board is connected to a another master card that sends control commands to the board.The microcontroller in the board is etched so thta the reference is removed, but I suspected that it is Motorola 68HC11F1 as the package is a 68 pins PLCC and alos the cristal connection is close to pins 6 and 7 and also the 93c46 Serial EEPROM is close to MOSI, MISO, SCK ans CS pins.My questions are:1- Can 68HC11F1 execute programs from serial external EEPROM?2- How can I read internal EEPROM of the 68HC11F1? can I use an EEPROM reader like TL866II, MiniPro?3- Can I read 68HC11F internal EEPROM using TTL serial adapter and Arduino like cards?

author: shabaz
author_rank: Frequent Contributor
timestamp: May 29, 2025, 05:50:19 pm
content: It's been ages since I used a 68HC11, but, from memory:(1) No, not serial EEPROM(2) No, I doubt an off-the-shelf generic Flash/EEPROM reader will work here(3) Yes, this may be feasible:Your Arduino or PC or whatever would need to send serial data (to the UART) upon boot, which would be up to 256-byte or 512-byte (I can't recall) program which you may have to write yourself (it's not hard, but would need you to be familiar with a few of the machine instructions), or find a ready-made program if one exists, which would then execute, and would then either play out the internal EEPROM out over the serial port, or it would wait on instructions, i.e. it would act like a simple monitor program.If it came to it and you needed to write your own code, I imagine you could do it in a few days, the machine instructions are not too hard to get up to speed with. The Motorola documentation is very easy to follow.

author: DavidAlfa
author_rank: Super Contributor
timestamp: May 29, 2025, 06:21:50 pm
content: Sorry for the offtopic, I have zero knowledgeabout 68xx and it's a really ancient arch...I have a device witrh a 6808 which I'm trying to fix, the CPU data/address buses do really weird things.I have a box full of 68HC11s taking dust,not sure if I read correctly but somehow I understood 68HC are backwards-compatible and should run 680x code fine?Thanks!

author: shabaz
author_rank: Frequent Contributor
timestamp: May 29, 2025, 11:45:01 pm
content: Hi,(all speculation in this comment, since I'm not too sure):I believe the instruction set is compatible, however there might be a few differences such as interrupt vector addresses (I have not checked). Also, the hardware would need some modifications, since the 68HC11 doesn't have enough pins for a full set of address lines (it needs demultiplexing from the data lines). It may be easier to locate a 6808 to be honest, e.g. there's a 6802 board on ebay currently, from which the 6802 could be unsoldered (and I believe it may be more closely compatible to the 6808).

author: srb1954
author_rank: Super Contributor
timestamp: May 29, 2025, 11:51:00 pm
content: Quote from: DavidAlfa on May 29, 2025, 06:21:50 pmPost some details of the "weird things" and we may be able to help getting the original device going again. The 6808 is a pretty simple architecture and is relatively easy to debug.QuoteThe 68HC11 family is partially backwards compatible in that it has a superset of the base 68xx instructions so it is generally reasonably easy to reassemble the source code to run on the newer devices.Just directly running the old binary code from the 6808 would not be successful as the 68HC11 has an extensive set of peripherals and configuration parameters that need to be correctly set up before a program can be successfully run. None of this set-up code would exist in the 6808 program as it has no peripherals and practically no configuration required to run.

author: DavidAlfa
author_rank: Super Contributor
timestamp: May 30, 2025, 05:52:31 pm
content: https://www.eevblog.com/forum/repair/keithley-195-stopped-working-after-a-lightning-strike-near-my-house/

author: Andy Chee
author_rank: Super Contributor
timestamp: May 31, 2025, 04:24:51 am
content: Quote from: siliconal on May 29, 2025, 05:21:38 pmThe F1 variant of the 68HC11 does not have internal EEPROM for the program firmware, it uses external (EE)ROM for firmware (27C256, 28C256 etc.)The tiny internal EEPROM in the F1 is only for storing, what we normally call today, CPU fuse settings.If you have another variant like the 811E2 which does have an internal EEPROM for firmware, then the program to use is JBUG for Windows (or PCBUG under DOSBox). Put simply, you connect the 68HC11 directly to the serial port of the PC.