How to know if a mosfet's SOA is respected - Page 1
Forum section: electronics / projects

author: nihial
author_rank: Regular Contributor
timestamp: May 25, 2021, 12:42:40 pm
content: Hi,I'm trying to figure out if I'm effectively respecting some MOSFET SOA in a given application, SOA graphs are given for a fixed VDS and Idrain but during the switching these are anything but constant.Is there some way to know if it's good ?I'll give my current graphs as an example :I suspect the SOA is not respected here but I don't have any way to prove it, is there a good technique for this ? Also how does one derates for casing temperature ?Thanks in advance for anyone taking time to read this

author: Kleinstein
author_rank: Super Contributor
timestamp: May 25, 2021, 12:54:22 pm
content: The SOA curve looks good, in that it has more than just a power level. So it includes possibly instability.The derating is usually in a way to shift the votlage axis to lower values. However I don't remember the theory / details behind this.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 25, 2021, 01:04:49 pm
content: The pulse is around 120us FWHA, so we'd expect to plot it somewhere around the 7A/40V range, and compare to a 0.1ms curve -- but they don't plot one.You could use pulsed thermal resistance, but that doesn't tell anything of 2nd breakdown.I would suggest choosing a different type, that exhibits less or no 2nd breakdown. This at least frees you to use the thermal resistance curves.You can certainly get an overestimate using say the 10% width (peak power is 200W, so, from 20W to 20W is around 200us?) and assuming a square pulse of peak power. The pulse is roughly triangular so this about doubles the actual energy dissipation, which serves as a safety factor. You may need a larger package to handle the energy (e.g. SOT89 --> SOT223 --> DPAK --> D2PAK --> D3PAK or THTs --> modules), or use multiple in parallel with some means of current sharing.Oh, and mind that SOA curves are given by any point of the die reaching Tjmax; they are correspondingly shorter for elevated ambient or initial temperature.If I may read into these waveforms a bit: if this is like, a semiconductor power switch with slow gate drive to reduce peak dissipation -- be very careful, as it only works in the expected case. Unexpected conditions, like high capacitance or high current, or short circuit, will destroy it. It's a setup for cascading failures, where one small thing causes the next thing up to fail (say a output port, then a regulator, then a power supply, then this switch). A more refined approach may be desirable: for example, a load switch controller IC that limits output current and calculates dissipated power to turn off the switch before SOA is exceeded.Example, if any failure is a failure of the entire assembly, and total failure is not a critical issue, it probably doesn't matter. Such a product can be serviced by whole board replacement, so the number of failed components doesn't much matter, and no one needs to troubleshoot it. And that failure in general isn't a problem, e.g. your laptop shorts out and emits magic smoke, but the data on your hard drive(s) is likely fine, you're only inconvenienced by the thing failing. As opposed to applications where things should fail more softly (maybe the laptop keyboard fails, but in a pinch, you can still use the mouse, or remote desktop, to get work done). Or for critical applications where redundancy also is required. Or even so, it may still be a desirable cost-saving or environmental goal, to design for repair -- you might want failed components to remain localized, so that they can be easily replaced, returning boards to the supply chain instead of the landfill.Tim

author: nihial
author_rank: Regular Contributor
timestamp: May 25, 2021, 03:33:25 pm
content: Quote from: T3sl4co1l on May 25, 2021, 01:04:49 pmWhat I understood from your explanation :- One way to do it is to take the maximum current and voltage of the transition and use the FWHM, I will check how does that compare with a square pulse- Take 90% of the triangular pulse with the maximum current and voltange of the transition and I'll get a safety margin of basically 2 compared to a square pulseThis is a mosfet with a slow gate drive for a heavily inductive load, having the schematics in front of me the person that did the design probably didn't thought of the gate drive and SOA it looks like a copy past from another design

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 25, 2021, 03:35:04 pm
content: Ahh. An inductive load, just put a clamp diode or TVS in there and you're set. No need for ponderously slow switching. Or use a protected FET.Tim

author: nihial
author_rank: Regular Contributor
timestamp: May 25, 2021, 03:56:04 pm
content: Quote from: T3sl4co1l on May 25, 2021, 03:35:04 pmIt's already there, short story, I can only do some bom changes and I'm heavily limited on the gate driver but at least now I have a metric to evaluate if the SOA is ok. Retrospectively thinking about it, it was obvious that I should have use the power dissipation and not focusing on current/voltages of the curves too much. Thank you for your time !

author: nihial
author_rank: Regular Contributor
timestamp: May 25, 2021, 04:48:06 pm
content: Quote from: T3sl4co1l on May 25, 2021, 03:35:04 pmSorry to summon you, for the temperature stuff, do you have a rule to scale ? Some dumb deltaT scaling perhaps ?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 25, 2021, 09:24:52 pm
content: Temperature stuff, what about it?The SOA curve is just measured at 25°C initial (or whatever it is; sometimes you see higher ones too), and the threshold is when Tj reaches Tjmax, or just before destruction, whichever happens sooner.That's the problem with 2nd breakdown. It's, well, another kind of breakdown. And it does depend on voltage, so you're right to be suspicious of it, and it would be useful to be able to somehow plot the waveform against the SOA and know for sure.In short, 2nd breakdown is localized spot heating of the die, due to initially uneven current distribution, combined with a runaway current-hogging process. The exact details may vary (and sometimes you see a name attached to the effect, which I forget..) but that's the gist of it. Power density is proportional to applied voltage, so the effect is simply worse at higher voltages -- it's a term in the exponent of the runaway function.And so this depends on voltage and time, in a way that's not easy to figure, and can't be solved just from a transient thermal model. At least, in devices susceptible to it. Devices that behave themselves, of course, are fine with that method.So, that's why I would suggest a better behaved part, if you need that confidence.Tim

author: PeteH
author_rank: Unknown
timestamp: May 25, 2021, 09:40:15 pm
content: Quote from: T3sl4co1l on May 25, 2021, 09:24:52 pmSpirito effect

author: nihial
author_rank: Regular Contributor
timestamp: May 25, 2021, 10:05:30 pm
content: Quote from: T3sl4co1l on May 25, 2021, 09:24:52 pmSorry I wasn't clear, I was wondering if there was an easy way to scale the SOA graph for a different temperature but looking at your answer it seems that no.I made some research and it seems ltspice might offer a tool to assess if an SOA is respected or not taking into account those effects but I don't know if it works well. It might be a good idea to check if it allows to quickly assess how much margin we have.Again thanks to the people that took the time to read this post, information gathered here was usefull.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 26, 2021, 01:13:11 am
content: Yeah, 2nd breakdown is the dubious part; outside of that, the diagonal line simply shrinks with rising temp, corresponding to RthJC * (Tjmax - Tj).I don't know of any SPICE models that include 2nd breakdown effects; I don't know that it will be all that useful to simulate in that regard. For devices without the effect, yeah that's a good way to solve for Tj, assuming you find a model with a TEMP output -- typically this pin is connected to an RC network representing your heatsink (which, for SMTs, includes board thermals if possible), and the voltage on the pin corresponds to temp in °C or something like that.Or, if you know the transient thermal model, and don't need to model thermal shifts (like because Vgs(th) drops with rising temp, which will skew the curve a little), you can use a normal transistor model (without the TEMP pin) and some power meters to drive the thermal network.Tim