Why is my regulator's transient response so bad? - Page 1
Forum section: electronics / projects

author: mck1117
author_rank: Contributor
timestamp: February 15, 2020, 03:16:34 am
content: I'm having problems with the transient response of the 3.3v regulator on my board (automotive ECU,https://github.com/mck1117/proteus/).The power supply architecture is:Car electrical system (10-15v) -> Buck regulator (5v) -> Linear regulator (3.3v)The only real load on the 3.3v rail is an STM32F767. The trouble is that there's an interrupt that fires reliably at 10khz to do an ADC read and a little bit of work, so the CPU is reliably waking up then going back to sleep after a few us, at 10khz. When transitioning from asleep to awake, the current consumption increases from perhaps 100mA to 160mA, in less than the wakeup time of 13 clock cycles (~60ns).Here's what the transient response looks like. AC coupled probing a test pad on the 3.3v rail.You can see occasional other interrupts waking the CPU up, but they all look the same.Around 70mvpp and 120khz, fourish cycles before it's damped out.I went ahead and measured the 3.3v rail on an STM32F7 discovery board with a BGA version of the same CPU, running the same software as my custom board. Of course the 3.3v rail wasn't perfectly flat, but it looks like what I'd expect: the regulator smoothly stepping between two voltages (slightly lower voltage under more load) with no ringing or funny business.It seems to me like the regulator on my board is marginally stable under these conditions.Here are the differences I can identify between the ST-designed board and mine:Different 3.3v regulator. I have an Infineon TLS205, and ST used an ST LD39050.Slightly different 3.3v rail capacitors. I have all ceramics, and ST used mostly ceramics but a few tantalums, but only for VDDA and VREF+ (but not the cap right next to the regulator - that one's ceramic)Layout. I don't think this is it though, since there's a ~30mm square 3.3v plane underneath the regulator and STM32, with no trace to the power/ground planes longer than around 3mm for any pin, regulator or STM32. It also isn't a local effect: measuring any point on the 3.3v net looks identical. Besides, 120khz is much too slow for an LC resonance somewhere on the board.Any ideas what's going on?Does my choice of regulator suck, or did I do something wrong here?I designed a tiny board to act as an interposer between the SOIC8 footprint on the board, and an LD39050 reg to try the different regulator on my board, so in a few days I'll give that a try.

author: mck1117
author_rank: Contributor
timestamp: February 15, 2020, 03:21:33 am
content: Oh, and here's the relevant section of the schematic:I've tried a range of values for C903, from a few uF up to double stacked 22uF for a total of 44uF. There's also an additional ~8uF worth of decoupling capacitors scattered around the 3.3v plane.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 15, 2020, 03:53:10 am
content: Hmm, layout?Tim

author: mck1117
author_rank: Contributor
timestamp: February 15, 2020, 03:54:31 am
content: Quote from: blueskull on February 15, 2020, 03:39:48 amThe datasheet claims a minimum esr below their ability to measure at 0.06 ohm, but decreasing with increased capacitance. My caps are certainly below that, so that could be it. The datasheetclaimsthat it's stable with ceramic caps, but maybe they define what I'm seeing as stable (which it technically is, I suppose).Looking at this TI doc:http://www.ti.com/lit/an/slva115a/slva115a.pdf,it claims that fewer than 4-ish rings on a load step indicates sufficient phase margin for stability, and I'm seeing...almost exactly 4, so it's pretty borderline.Quote from: blueskull on February 15, 2020, 03:39:48 amAnd I'm not giving it one - the peripherals are still powered in sleep mode. It's dropping perhaps 1/2 to 1/4 of the load.Quote from: blueskull on February 15, 2020, 03:39:48 amCorrect. I care more about power dissipation than power consumption, but anything within the range of a few watts is fine. Current total for the board is only around a watt.

author: mck1117
author_rank: Contributor
timestamp: February 15, 2020, 04:00:09 am
content: Quote from: T3sl4co1l on February 15, 2020, 03:53:10 amHere's a snip of the full area of the 3.3v pour (internal layer, pink outline).The 3.3v net is highlighted. The TLS205 is at the top left, on the back layer (green), and the STM32 is the lqfp144 on the front layer (red).

author: twospoons
author_rank: Frequent Contributor
timestamp: February 15, 2020, 04:24:03 am
content: Just to eliminate the possibility of probe pick-up of a false signal, have you probed directly across the regulator output cap, using a ground spring pin instead of the usual ground wire and clip?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 15, 2020, 05:41:46 am
content: Hm, 4 layers with planes, and I presume the other inner layer is solid ground?Should be adequately low inductance. And I see what looks to be other bypass caps. Doesn't seem to be a size difference actually, where are the 22's? What are the 22s, by the way? Adequate temperature and DC bias characteristics?Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: February 15, 2020, 06:19:44 am
content: yup, where is your 22uF? hmm... 3d render?

author: mck1117
author_rank: Contributor
timestamp: February 15, 2020, 07:34:23 am
content: Quote from: T3sl4co1l on February 15, 2020, 05:41:46 amYep, One inner layer that's part 3.3v and part 5v, and the other is fully ground. The outer layers are also poured with ground and stitched.Quote from: T3sl4co1l on February 15, 2020, 05:41:46 amIt's an 0603 like the smaller value decoupling caps, a Murata ZRB18AR61A226ME01L. it's the cap just southeast of the TLS205, top left corner of that snip, connected to the two bottom right pins (vout and sense).Quote from: twospoons on February 15, 2020, 04:24:03 amI added a ground pin to my scope probe, and hooked up my trusty 54622d.edit: I'm not sure why the polarity is flipped looking at it now vs. on the newer 3014a. I checked the polarity in DC mode, and it's correct...This is captured at the 22uf cap next to the regulator. At the left is a task that took ~30us, and at the right is one of the aforementioned ADC interrupts.Using our onboard performance tracing, looks like the 10khz interrupt only takes ~5us to run, so what I thought was a ring is probably actually just a positive load transient with a corresponding negative only a few microseconds later. I think I just happened to be unlucky that the interrupt time is almost exactly half a period of the regulator's bandwidth, so it actually provokes it worse than normal.I'm less worried about 20mvpp, but probably still worth investigating whether it can be improved. Does this now look normal? It still looks worse than the ST Disco board.

author: twospoons
author_rank: Frequent Contributor
timestamp: February 15, 2020, 08:15:59 am
content: Quote from: mck1117 on February 15, 2020, 07:34:23 amCan it be improved? Almost certainly. Is it worth the effort? Probably not, unless the ringing is causing issues somewhere else.If you really want to, I'd start by looking at the decoupling around the micro - size, type, location, impedance curves. If you can effectively slow down the load step seen by the regulator it should have an easier time.

author: thinkfat
author_rank: Unknown
timestamp: February 15, 2020, 10:04:29 am
content: In other words, add some resistance in front of the controller supply rail and increase the decoupling capacity?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 15, 2020, 07:42:41 pm
content: That exact part doesn't seem to exist, but if ZRB188R61A226ME05 is close enough, it shows a mere 8.9uF at 3.3V, and that will get much worse at elevated temperature (because it's only X5R) and with aging (maybe -20 to -50% over lifetime??). Probably another penalty due to the small voltages we're talking (capacitors are typically measured at 0.5Vrms, deeper into the hysteresis curve, raising the average capacitance that's measured). At 0.05V it's maybe -20%.Personally, I would choose 0805 or 1206 size, X7R, >=10V, for this application.In general, to reduce ripple voltage for a given transient current, you need to reduce the supply network impedance. This means reducing R and L, and increasing C. Dominant R and L are from the regulator's equivalent output impedance. C is from the capacitors of course.You may find it's better to use smaller (1-4.7uF) caps in that size (0603), and X7R, for better stability, and simply using more of them. You don't need piddly bypass caps at all, with the supply planes and a few capsof any sufficient valuedotted around. Can use just 4.7's everywhere, and leave a few DNP besides.Nor does the regulator need one highly localized. It won't notice a couple 5nH of trace inductance, its impedance isn't nearly low enough, nor its bandwidth high enough.Also, the difference due to measurement method seems to imply there's either differences by region (could be, there's different ESL to each capacitor on that plane), or common mode error (perhaps the transient current drawn from the supply is causing an offset voltage in the supply ground?). If CM, that may actually be significant because that can cause emissions problems.Tim

author: bson
author_rank: Unknown
timestamp: February 15, 2020, 08:12:09 pm
content: Maybe it's just me, but it looks like several of the decoupling caps aren't grounded?Do you have an internal ground plane?

author: thinkfat
author_rank: Unknown
timestamp: February 15, 2020, 09:10:11 pm
content: Quote from: mck1117 on February 15, 2020, 07:34:23 amBecause you've set the channel to "Invert" (see the video you posted).

author: schratterulrich
author_rank: Regular Contributor
timestamp: February 15, 2020, 10:09:23 pm
content: Hi,i would like to point out a possible cause - with many uncertaintiesFirst let's look at the impedance of the planes and caps:I have used a tool I have written exactly for this purpose. It is a good test to see if it can be useful. seehttps://leiterplatte.jimdo.com/pdn-sim/Then I have made an equivalent circuit in LTSpice:Then I have included an available LDO regulator - LT1962-3.3 - i really don't know if it has similar characteristics as your LDO. It's just for experimentingBut the result shows similarities to your measurements.So my guess is, that it is the resulting impedance peak shown in this AC simulation:Potential workaround:A bulk capacitor!Best RegardsUlrich

author: mck1117
author_rank: Contributor
timestamp: February 17, 2020, 12:12:30 pm
content: Quote from: schratterulrich on February 15, 2020, 10:09:23 pmThat's an interesting choice - that regulator looks like it might actually be the same thing as the TLS203/205. The datasheets are just too similar to not be the same chip...That's some great analysis though. I think I'll try first swapping out a few of the 100n caps with 4.7uF (better voltage derate, plus "just add more capacitance"), then bodgewiring in a 100uF tantalum or something ("just add more capacitance, part 2"), and see what happens.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 17, 2020, 07:29:37 pm
content: Curious, if it's designed as a 2nd source equivalent (which sales might request internally, or a customer might request to get supplier coverage) it's strange they didn't go all the way and use equivalent packages as well.Tim

author: David Hess
author_rank: Super Contributor
timestamp: February 17, 2020, 09:02:02 pm
content: Quote from: mck1117 on February 15, 2020, 03:16:34 amThese two things are consistent with compromised frequency compensation because of an output capacitor with too low of an ESR.Quote from: mck1117 on February 15, 2020, 03:54:31 amWhether that level of stability is acceptable depends on the application but there is an issue with reliability over time and temperature if the stability is marginal.There might be something else you can do other than adding ESR in series with the output capacitor in the traditional way. Figure 7 in the Infineon datasheet shows the connection for remote load sensing. Add the ESR as Rp as shown in series with the output and connect SENSE as shown to the output capacitor. This connection is commonly used with regulators which implicitly support zero ESR output capacitors whether shown or not. Whether this works or not depends on exactly what the BYPASS connection is doing but figure 8 gives me hope that it is working as a high frequency AC feedback path.