CMOS NOR gates - Page 1
Forum section: electronics / beginners

author: IvoS
author_rank: Frequent Contributor
timestamp: December 06, 2013, 10:11:49 pm
content: I will be using an IC (CD4001B) with quad of NOR gates but I need just one gate to use for my project. What is the good practice to do with the 3 remaining gates I won't use? Can I leave inputs and outputs floating?

author: MatCat
author_rank: Frequent Contributor
timestamp: December 06, 2013, 10:13:21 pm
content: Generally good practice dictates grounding unused pins.

author: IvoS
author_rank: Frequent Contributor
timestamp: December 06, 2013, 10:28:43 pm
content: Does it mean inputs AND outputs as well? Straight to ground or use a resistor?

author: Marco
author_rank: Super Contributor
timestamp: December 06, 2013, 10:29:37 pm
content: Quote from: MatCat on December 06, 2013, 10:13:21 pmThat's going to make his IC run a bit hot.

author: Skimask
author_rank: Super Contributor
timestamp: December 06, 2013, 10:49:30 pm
content: Ground unused inputs thru a 100K.Outputs...Most of the time, I'll push those thru a 100K to ground, but not really necessary.

author: Zero999
author_rank: Super Contributor
timestamp: December 06, 2013, 11:03:42 pm
content: Connect all unused inputs to either +V or 0V, it doesn't matter and leave the outputs unconnected.

author: amyk
author_rank: Super Contributor
timestamp: December 07, 2013, 12:07:32 pm
content: Inputs should be tied to either logic level, outputs can be left "floating" since they'll be internally connected to one of the supplies due to the input levels. The goal is to avoid high-impedance nodes like CMOS inputs from floating somewhere in the middle of the switching range and causing both the upper and lower FETs to partially conduct, wasting power.

author: SeanB
author_rank: Super Contributor
timestamp: December 07, 2013, 02:07:32 pm
content: You can also connect unused inputs to another gate output and it will work. Often I do that as the nearest pin is an output, and the extra load of a CMOS gate input makes no difference to a gate at low frequency. Just do not connect to the same gate input as then you make a very good oscillator/chip heater/smoke generator.

author: free_electron
author_rank: Super Contributor
timestamp: December 07, 2013, 03:21:17 pm
content: Wow. So much bad advice... For something so simple.Unused gate INPUTS should be tied , either directly , or thru a resistor , to VCC(supply)Anything else is less optimalTying to ground: if ttl you have a vampire drain because the inputs can source currentTying to another signal : the gates will follow the signal creating more power consumption (ttl always, more if low, cmos when toggling) and will create more crap in the emi .The more transistors switch the more crapInput tying to vcc thru a resistor gives the advantage that you have access to the gate if you need to rework part of the circuit.Now, if all you need is a single gate : get a singlegate logic chip a 74v1g02 should do fine

author: filip_cro
author_rank: Regular Contributor
timestamp: December 07, 2013, 05:01:08 pm
content: @free_electronNOR gates: if inputs are high, state is low and TTL will use more power.And thread is about CMOS.

author: Zero999
author_rank: Super Contributor
timestamp: December 07, 2013, 06:31:23 pm
content: Quote from: free_electron on December 07, 2013, 03:21:17 pmHow? The inputs are high impedance to DC. The power dissipation in a CMOS gate will close to zero as long as both the inputs are connected to either +V or 0V.

author: SeanB
author_rank: Super Contributor
timestamp: December 07, 2013, 07:14:49 pm
content: He is right as a general rule, works for CMOS and TTL in all cases without exeption. The example I gave was for low frequency ( close to DC or if you like you can read the blinkenlights by eye without problems), and the others are also usable for certain cases, perhaps to get desired inputs on a gate unused in the device but one that does have an effect like an enable or a direction selection.

author: free_electron
author_rank: Super Contributor
timestamp: December 09, 2013, 12:17:59 am
content: Quote from: filip_cro on December 07, 2013, 05:01:08 pmDoesn't matter.You have no control over static output consumption in TTL. Only over input consumption. Tying the inputs high prevents vampire draw.The rules i gave make sure the design will work irrespective if you use CMOS or TTL logic and guarantee the lowest power consumption and least EMI problems while guaranteeing gate re-use.

author: westfw
author_rank: Super Contributor
timestamp: December 09, 2013, 05:58:42 am
content: F_E means "real" TTL, not those newfangled 74yyyxxxx series chips that are actually CMOS.Real TTL actually has current into/outof the inputs, and the current to GND is higher than the current to Vcc.With any modern CMOS-based logic, I don't think it will matter whether you tie the inputs to Vcc or GND.

author: free_electron
author_rank: Super Contributor
timestamp: December 09, 2013, 07:30:48 am
content: Correct. Cmos doesn't care.Real ttl is 74 ,ls,a,as,als,f, and others that are bipolar based.You can draw current from the input. The input is an emitter.That is where fan-in and fan-out comes from.You can only connect x inputs to an output because otherwise you overload the output with the current coming from inputs.