Ethernet trace routing on 8/8 boards - Page 1
Forum section: electronics / projects

author: shadewind
author_rank: Frequent Contributor
timestamp: September 18, 2011, 06:11:21 pm
content: I'm designing a board with an NXP LPC1756 and a Micrel KSZ8041NL Ethernet PHY.In the datasheet for the PHY, other than general differential routing recommendations, there's this:Differential pair (TX+/- or RX+/-) should be routed away from all other signals and close together to use 5-miltrace width and 5-mil trace space in same length as possible with 100 ohms controlled trace.But, iTead which I'm going to use, can only do down to 8/8 reliably, possibly 6/6 but that's pushing it. Is there something I can do to make this work anyway? I have used the LM3S series micros with integrated MACs and PHYs from TI before and just made the traces as short and as parallel as possible and seemed to work fine.I checked with TXLine, calculating a microstrip with 5 mil width on a 1.6 mm and it gave me 152.984 ?. Or should I use an couple microstrip?

author: ejeffrey
author_rank: Super Contributor
timestamp: September 18, 2011, 06:51:38 pm
content: You should be using a coupled microstrip calculator, as the routing is done as a tightly coupled differential pair. Also, the data sheet may be assuming a 4-layer board with a ground plane much closer than 62 mil.

author: shadewind
author_rank: Frequent Contributor
timestamp: September 18, 2011, 09:14:24 pm
content: Allright, so using the tightest spacing possible, this is what I get:http://cl.ly/3e0Y05372s3z3w2n0R2DDoes this seem correct?

author: shadewind
author_rank: Frequent Contributor
timestamp: September 19, 2011, 09:09:25 pm
content: On a related note, the data sheet for the PHY recommends terminating the clock line (REF_CLK) with a 33 ? resistor at the driving source. As far as I can understand, a transmission line should be terminated with a resistor equal to the characteristic impedance which in my case is certainly not 33 ?, more like 130 ? but I can't use a 130 ? resistor, can I?

author: cyberfish
author_rank: Regular Contributor
timestamp: September 20, 2011, 08:24:39 am
content: Quote from: shadewind on September 19, 2011, 09:09:25 pmThis is something I have always been confused about, too. Parallel/series termination at source/receiver.All we learned about in class was, like you said, parallel termination at receiver with the same resistance as characteristic impedance.Maybe it will be covered in a later course (I'm only 3rd year), but it has been confusing me for a very long time.Google is surprisingly unhelpful with this.

author: jahonen
author_rank: Super Contributor
timestamp: September 20, 2011, 08:42:24 am
content: Quote from: shadewind on September 19, 2011, 09:09:25 pmThe driver output impedance is also counted, so driver output impedance plus series resistor should be equal to the trace impedance.One should also note that for most typical logic outputs, the output impedance is not same for 0 and 1 states. That makes it difficult to make perfect matching. But nevertheless, acceptable results are certainly possible.You can see this effect from this scope screenshot. It is a 74AHC1G125 driving 2 meter long RG-58 via series termination.As you can see, the rising edge is quite well matched, but falling edge is clearly not. Since it rings, it means that output impedance of '0'-state is lower (Z0+Rs < Zl) than '1'-state. Long length of the coax makes it easy to see the transmission line effects, and resistive behavior is very clear, but same applies for all transmission lines, including PCB ones.Regards,Janne

author: shadewind
author_rank: Frequent Contributor
timestamp: September 20, 2011, 09:09:21 am
content: But I an calculating this correctly, am I not. A thicker height yields much higher characteristic impedance for the same width. Do the two things I'm wondering about:1. A 100 ohm differential trace at 50 ohm per trace at 1.6 mm two layer board would be about 30 mil wide if the spacing is 8 mil. Correct? It sounds very wide but then again, the height is pretty high as well.2. A 10 mil micro strip on a 1.6 mm height gives approximately Zo = 134 ohms. Correct? This should then be terminated with R = Zo - Zout. Won't this be too high in my case though? Isn't there some drawback to high termination series values? And I can't seem to find anything about the output impedance of my oscillator (TXC 7W).

author: ejeffrey
author_rank: Super Contributor
timestamp: September 20, 2011, 09:12:44 am
content: I don't know what the deal with that particular part, but here goes the story on termination:All that matters for termination is the total impedance at the ends of the line. If it is equal to the transmission lines characteristic impedance, the entire signal will be absorbed or transmitted to the next element in the chain. Receivers are usually high impedance devices, so the way to terminate a receiver is to put a load resistor in parallel. Normally we say the load resistor should be equal to the characteristic impedance, but the real story is that the parallel impedance of the load resistor and the amplifier should match the tx line. The down side here is that it take a fair bit of power to drive a low impedance transmission line, and most of the power is wasted in the load resistor. This is especially true of signals that have a DC offset, such as a logic line that can be 0 or 3.3 volt -- there will be a large DC current flow through the transmission line that does nobody any good. One key thing to remember is that it doesn't matter what the voltage is, only the impedance. You can terminate to an intermediate voltage such as 1.6 volts. As long as your transmitter can both source and sink current equally, it will be fine.But what happens if we get the impedance wrong? Now there will be a reflected signal, which will head back to the source. The source is generally low impedance. In this case, what you want is a resistor in series with the low impedance. Since we said the voltage doesn't matter, only the impedance, it doesn't matter that we are applying signals here: at AC frequencies it is as good as ground, or any fixed voltage signal. This will attenuate the reflected signal again. Even if there is a slight impedance mismatch at both ends, the signal that makes it back to the receiver after two bounces will ordinarily be negligible. This is the best termination system: 50 ohm series at the source, and 50 ohm shunt at the receiver. Remember, that our choice of series and shunt doesn't really depend on source vs. receiver, it has to do with the impedances. Some high speed logic is current steering, and presents a high impedance at the source. In this case, the optimal answer is shunt termination at both ends.The downside of terminating at both ends is that the signal is divided in half. We have a 1:2 voltage divider made out of the source and receiver terminating resistors, so our 3.3 volt logic signal is reduced to a 1.6 volt swing. One thing way to be clever is to now remove the terminator at the receiver. When a pulse is transmitted, what happens is that initially it sees a 1:2 voltage divider made up of the series terminator at the source and the transmission line characteristic impedance. This reduces our signal by half, but when it hits the open circuit at the end, the wave is reflected 100%. The reflected wave is in phase and equal amplitude, so the voltage the receiver sees is double, or back up to the full voltage of the transmitter. The reflected wave propagates back to the source where it is absorbed by the terminator. This reduces the load on the source compared to the shunt termination at the receiver while maintaining the full signal voltage at the receiver, and all signals are absorbed after a single reflection.If you can suffer the voltage divider effect, termination at both ends is the best option. It provides maximum immunity to external interference and reduces the effect of intermediate reflections due to accidental mismatch. If you can only terminate at one end, shunt termination at the receiver usually performs better, but it depends on the circuit which is appropriate.

author: jahonen
author_rank: Super Contributor
timestamp: September 20, 2011, 09:50:22 am
content: Quote from: shadewind on September 20, 2011, 09:09:21 amI think you have calculated it correctly. You have found the reason why the reference plane is very close to signal layers in multilayer boards, the traces would be too wide for most practical applications and signal densities. Those wide traces are practical solutions only in RF where the signal count is low.Using a high impedance is not good thing either, since they tend to have high crosstalk and EMI due to high stray fields. It may also be somewhat a problem to drive pins from such a high impedance, since the transmission line impedance is resistive and pin has lumped capacitance (think of R-C).And of course if you must connect to anything that requires specific impedance with wide bandwidth, you can't use tricks to match the impedance. The traces must have correct impedance.Regards,Janne

author: shadewind
author_rank: Frequent Contributor
timestamp: September 20, 2011, 12:06:10 pm
content: Quote from: jahonen on September 20, 2011, 09:50:22 amYes, I figured that most data sheets assume that you're using a four layer board which I probably should. But that's a bit outside of my budget for hobby project that I'm only trying out. PCBcart wants about $200 for 10 pcs. of 10x7 cm boards which is certainly not a fortune but a lot of money for a prototype.I assume that high resistance would increase the rise time because of the time it would take to charge the capacitance at the input gate of the load? Is that what you mean by R-C?I'm not really feeling any conclusions here but I'll try to draw some myself:Using a two layer board for anything that requires a specific impedance is always a compromise. For Ethernet, using 30 mil traces is not by any means unfeasible since they will most likely be pretty short. But these are coupled microstrips which brings the impedance down quite a bit (from what I can tell).Driving a clock line in this way is not feasible since it will require a very wide trace. My understanding is simply that on a 62 mil board, I'll simply have to live with the reflections here since terminating with a ~ 100 ? ohm resistor would make driving, in this case, two devices (REF_CLK on both the PHY and the MAC) a bit hard on the oscillator. Correct? Is there any point in adding any termination whatsoever here? The datasheet recommends 33 ? but that has no basis in any parameters in my design. Or should I just try to make the traces as short as possible and hope for the best?

author: dopplershift
author_rank: Contributor
timestamp: September 20, 2011, 02:25:38 pm
content: Hey, I only have a very basic understanding of what you're talking about, but I thought I could add something:iTead can do 0.8mm boards, not just 1.6mm. Not sure how much that would help you though. It's also probably worth pointing out that the tolerance on board thickness is only +-10%.Hope that helps.

author: jahonen
author_rank: Super Contributor
timestamp: September 20, 2011, 04:59:14 pm
content: On second thought, simulating with HyperLynx LineSim, 0.2 mm traces on 1.6 mm board might just work if 100 ohm series resistors are used. Of course, the traces are very prone to cause crosstalk on nearby traces (or they can become a crosstalk victim very easily) so be very careful if you decide to go adventurous. I used generic models as I did not bother to dig up real IBIS models for parts in question, but I think it is acceptable approximation for first feasibility check.I recommend shown topology where both termination resistors are near the oscillator, and there is own clock trace for both MAC and PHY. Doing it daisy-chained fashion might cause problems with timing and SI (we are at very dangerous waters here). And of course, ensure that traces are of equal length to both MAC and PHY.Regards,Janne

author: shadewind
author_rank: Frequent Contributor
timestamp: September 20, 2011, 08:32:40 pm
content: Thanks Janne,How bad would the reflections be without the termination? Would it still be able to work if the traces are short but equal in length?

author: jahonen
author_rank: Super Contributor
timestamp: September 21, 2011, 02:18:50 pm
content: Quote from: shadewind on September 20, 2011, 08:32:40 pmIt becomes quite nasty without 100 ohm terminations, I see no reason to leave those out. As shortness depends on driver edge rate, I'd be reluctant to make assumptions about it.Regards,Janne

author: shadewind
author_rank: Frequent Contributor
timestamp: September 21, 2011, 02:54:49 pm
content: Quote from: jahonen on September 21, 2011, 02:18:50 pmYes I will add the resistors. I can always replace them with 0 ? resistors if it turns out to be a problem in any way.Thanks a lot for all the help! You always seem to leave appropriate and thorough answers which is very much appreciated by those of us with an ambition to learn!

author: tnt
author_rank: Regular Contributor
timestamp: September 27, 2011, 11:38:04 am
content: Your simulation fail to take into account that the source is not at all a low impedance driver (or the destination a high impedance for the RX line). Those will be terminated at the magnetics inside the magjack (or external magnetics) and those will also have the appropriate 50/100 ohm networks inside.

author: jahonen
author_rank: Super Contributor
timestamp: September 27, 2011, 07:49:22 pm
content: Quote from: tnt on September 27, 2011, 11:38:04 amThose simulations were intended to be REFCLK distribution simulations, not Ethernet signals.Regards,Janne

author: tnt
author_rank: Regular Contributor
timestamp: September 27, 2011, 08:31:23 pm
content: Ooops, my bad. Sorry for the noise.

author: shadewind
author_rank: Frequent Contributor
timestamp: October 23, 2011, 04:21:21 pm
content: I've decided that using 30 mil tracks is simply too impractical, even on a short distance so I'll try to keep the traces as short as possible instead. Is this viable?Also, some app notes (like this onehttp://www.smsc.com/media/Downloads/Application_Notes/an186.pdf) specify that magnetics (in this case the whole jack) should be placed at least 25 mm away from the PHY. How far away could I place the jack without worrying too much about transmission line effects?

author: shadewind
author_rank: Frequent Contributor
timestamp: November 24, 2011, 05:09:45 pm
content: When I laid out the board, I seem to have used 10 mil (~ 0.254 mm) tracks instead of the 0.2 mm you simulated. Will that make much of a difference? Calculating with TXline shows that in the ideal case, that's actually closer to 100 ohm but since this is real life, there should be a lot of factors making neither 0.2 mm or 0.254 mm a perfect match for 100 ohm.

author: jahonen
author_rank: Super Contributor
timestamp: November 24, 2011, 07:38:10 pm
content: Probably no difference. In fact, it might be very slightly better than simulated.Regards,Janne

author: westfw
author_rank: Super Contributor
timestamp: November 25, 2011, 04:00:04 am
content: QuoteDoesn't "100Mbps ethernet" end up having a signal frequency of 125MHz because of the 4B5B incoding?http://en.wikipedia.org/wiki/Fast_Ethernet#100BASE-TX