GaN HEMT "Dynamic Rdson" - Page 1
Forum section: electronics / projects

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 02, 2021, 09:31:25 am
content: Hi All,I've been reading up on GaN HEMTs and SiC FETs trying to understand the differences between the two for Power converters.So my question is with GaN and the dyanmic Rdson. I've read the following papers:Investigation_of_the_dynamic_on-state_resistance_of_600V_normally-off_and_normally-on_GaN_HEMTs Power_Loss_Characterization_and_Modeling_for_GaN-Based_Hard-Switching_Half-Bridges_Considering_Dynamic_on-State_Resistance And they seem to contradict each other to some degree. Mentions and shows evidence on how the Rdson increases (dynamical) wrt Off state time, Vds, Tmperature, Id and Fsw Mentions that the effect of heat on the dynamic rdson can be split in 3. 1 the static rds on @25, 2 The static rise of rds on @ TJ-25 C, 3 dynamic Rds on due to heat. They than find that portion 3 is relativley independant of temperature. However results from  as seen below shows that it does change temperature.The tests above show a 10A rated GaN HEMT beingtested. According to the image above, portion 2 is seen lablled on the graph with the static rise of Rds on however I don't think it cam be assumed that portion 3 does not change with temperatureFurthermore  doesn't mention any effects of drain current Fsw, etc. As these can have a significant impact on the dynamic Rds on.  then concludes that the dynamic rds on effect is negligable on total converter loss. Which unless i have missed something, is premature without considering the other factors. Usuallypower converters such as drives are being run close to their ma current rating so Id varation of Dynamic Rds on would make a big difference.I'm still getting to grips with these new WBG devices so in the likelyhood that I am missing something, I'd appreciate some feedback,Cheers

author: graybeard
author_rank: Frequent Contributor
timestamp: November 03, 2021, 03:20:37 am
content: I would expect the resistance to increase with temperature due to thermal carrier scattering.I assume the VDSvalues marked on the graphs are the off state bias. Is that correct?Are the devices in the on state driving the same load? If so what is it?The channel conductance GaN HEMTs can be strongly influenced by trapped interface charge. A higher off voltage causes more carriers to tunnel into the interface traps. That is why the RDSis worse at higher off state voltage.When the HEMT is turned on the carriers the GaN/AlGaN interface traps depopulate due to both tunneling and thermal effects. As the interface traps are vacated the channel conductance increases reduces the RDS.My personal experience is with depletion mode RF GaN, not enhancement mode power GaN. I have seen that the density and time constants of the interface traps are very dependent on both how the epitaxial material is grown and subsequent atmospheric exposure and temperature cycling during processing.There is aninteresting paper on the subject for power GaN HEMTs here.

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 03, 2021, 08:49:43 am
content: So the values marked on the graph is the transistor turning from off to on, naturally as it turns on the Rdson goes down to its static datasheet value. (at room temp)The test setup between the two tests is exactly the same, so they should be driving the same load. The paper does not state what the load is.Thanks for your feedback, I'll have a look at the paper.So I would argue from the image that I attached the trapping does change based on temperature. However  found that for their case, it did not change at all. And further iterated that it's effects are negligible when considering total convertor losses. Like you said this may be due to the manufacturing process of the device.