Clocked Transmission Gate passing an enable signal fails - Page 1
Forum section: electronics / beginners

author: mylabpcb
author_rank: Contributor
timestamp: April 24, 2025, 04:30:43 pm
content: Hello, I have an issue with a circuit which have a TG to passing an enable signal. TG ever is passing voltage does not cut off when clock signal change disabling the TG. I post an image with the schematic. I'm using a BSS84 as PMOS and 2N7002 as NMOS. I've reading about substrate connection by tigh source both to VCC and GND, using resistors, respectly, but does not work.Anyone can help me. Thanks

author: jwet
author_rank: Frequent Contributor
timestamp: April 24, 2025, 11:11:55 pm
content: Both of your FET's have a body diode frome to drain. The "inverter" at the left should work but you shouldn't need such a high resistance- real cmos doesn't use resistance here. This is probably ok though as long as speed are low. The real problem is the TG gate. The one body diode points to the right and one to the left. You could reverse source and drain on these FET's. I don't know what Load and EN mean, are they ins or outs. I TG made this way won't be birectional. "Real" TG tie the substrate to the most negative voltage.There are old CMOS building block IC's like the CD4007 that have a structure of dual complimentary pair plus and inverter. They take the substrates to sensibile places and could make your TG.What is wrong with a 4016 etc or one of the many switches made by Maxim or ADI. They make standardard swtiches that will take 44v and exotic ones that go to 200v and have Ron's in the fractions of ohms.Is this just for learning or some real purpose?

author: mylabpcb
author_rank: Contributor
timestamp: April 25, 2025, 08:21:45 am
content: Jwet, Thanks for your answer. I really appreciate it. I did not pay attention to the transistor diode and I've seen in datasheets they are inverted in direction from PMOS to NMOS, I guess is the right.Then I can connect both drains and sources together but D-S ans S-D, right? I connected D-D and S-S because I read that in a book.I put a 3.3k resistor to reduce consume and output voltage to 3.8V but I dont know if that is a common practice. What do you think about it?I'm learning about TG for a hobby project, I've built a CPU on discrete logic ICs and I'm going to built on pure transistors. That schematic block is for the load clocked signal in a 8b register.

author: jwet
author_rank: Frequent Contributor
timestamp: April 25, 2025, 04:07:02 pm
content: You're welcome, use the thanks button.Transmission gates are something that work better in IC's that with discretes. MOSFET's are really a 4 terminal device- this extra terminal is tied to source on "off the shelf MOSFET's". TG's really need control of the substrate connection. You will only be able to approximate their operation discretely- they will conduct through the body diode in one direction. In some circuits, you'll see two FET's in series to foil body diode condcution. This would be two PMOS and two NMOS for your TG. The CD4007 is a good part to experiment with. This circuit is interesting to learn but is not something you'd ever find in a standard logic circuit. Logically, what you're doing is an AND function though TG's have some nice benefits that generally don't matter for logic. If designed correctly, they pass Analog signal bidirectionally. They also have near zero propagation delay because the signal is gated, it just is allowed to pass. For similar reasons, they have some down sides. They don't buffer the signal, they just switch. You might look at "Quick Switches" or "Bus Switches" which are related. They use a single polarity NMOS FET to make fast bus swtiches in standard configs like the '245 - octal.The resistor in your inverter shouldn't be necessary and is not common practice. The magic of CMOS is that there is no totem pole current as in TTL, etc. Either the top PMOS is on or the bottom NMOS is on, there is no through conduction theoretically. Since the next stage is just a CMOS gate (capacitor), there is no static power there either. There will be a brief pulse of charge but then nothing.Good luck with your learning.

author: mylabpcb
author_rank: Contributor
timestamp: April 26, 2025, 08:53:40 am
content: Do you mean that CMOS acting as gate or switch should pass same voltage powered as output? Is that the common behavio in real circuits? And if you want to limit the voltage output put resistor directly on the output line?Thanks

author: jwet
author_rank: Frequent Contributor
timestamp: April 26, 2025, 02:43:49 pm
content: Yes- this is one of things that make CMOS so compelling- its nothing but transistor pairs and output swing rail to rail. Inputs are a Vgs, this usually give you input lows of 1/3 Vcc and 2/3 Vcc with full outputs, this makes for nice noise margin.A good gentle book is Don Lancaster's CMOS Cookbook. A bit dated but good overview.

author: mawyatt
author_rank: Super Contributor
timestamp: April 26, 2025, 03:17:57 pm
content: An interesting thing we discovered long ago when developing the PolyPhase Mixers (N-Path) that an NMOS device outperformed any switch with same area footprint wrt 3rd Order Non-Linearity. This was also confirmed by other researchers at the time. Triple Well NMOS where you can route the "Tub" allowed more flexibility at the IC level if the IC process supported such.Fond memories of using the CD4000 logic when it first came out of RCA, we often used the inverters as analog inverting amplifiers and limiters. CMOS is so elegant and simple, hats off to whoever first conceived CMOSBest

author: jwet
author_rank: Frequent Contributor
timestamp: April 26, 2025, 05:45:13 pm
content: I was curious so I did a little googling- the Wiki for CMOS page is pretty good (history and tech) and credits Frank Wanlass and Chih-Tang Sah of Fairchild from a ISSCC paper in '63. Some of the technical stuff here could be of value to mylabpcb.Link-https://en.wikipedia.org/wiki/CMOSRCA commercialized it with the 4000 series (20 micron!) which is my first memory as a hobbyist teen- I can remember the COS-MOS databook in the early 70's. I built a CMOS stop watch out of MSI 4000 series in early high school (~73?). It drew near zero power with the LED display off. A year later, Intersil integrated the whole function and I couldn't get my hands on that chip for years- the ICM7045- eventually I did the stop watch is buried here somewhere.CMOS is one of the great inventions of all time- elegant is the word.