How do cheap DDS function generators control amplitude and offset digitally? - Page 1
Forum section: electronics / beginners

author: Ghanou
author_rank: Contributor
timestamp: July 24, 2020, 06:43:06 pm
content: Hey guys, i'm new to the forum and i'm not sure if this is the right board for this question but i thought i'd try anyway.so i wanted to build my own function generator since what i found in the market is way above my budget and (it's really hard to get fair priced test gear in my country, even used ones, and also our governement imposes some very strict rules about trade to "improve the country's development" so i can't just buy a cheapy signal generator from china).what is availabe however is those DDS modules (AD9833 for example), so i wanted to build my own.Looking through schematics online i saw ppl mostly use potentioemeters to adjust amplitude and offset, but i want to digitally control them via one rotary encoder like they do in most commercial function generators like the RD JDS6600 or the feeltech fy3200s for ex, and looking through the RD JDS6600 PCB (pictured in this threadhttps://www.eevblog.com/forum/testgear/anybody-know-anything-about-this-signal-generator/) , i could see there's an analog multiplier with an offset input (AD835) but i couldn't determine where the amplitude control + offset signals are coming from , so i'm wondering how to digitally control these two, could it be with a small DAC + voltage controlled amplifier , or what's a good way to do it.PS: it would be better to uses general use ICs , since its hard for me to get some of the "exotic" ICs, especially now during the pandemic.and thank you.

author: MarkF
author_rank: Super Contributor
timestamp: July 24, 2020, 09:47:18 pm
content: Re: Looking for <$50 function generator

author: Ghanou
author_rank: Contributor
timestamp: July 24, 2020, 10:24:52 pm
content: nice and simple , i like it. however i already ordered a bunch of AD9833 modules which they don't have an external reference to control the amplitude

author: rstofer
author_rank: Super Contributor
timestamp: July 25, 2020, 01:15:06 am
content: Here's one site:https://daumemo.com/diy-ad9833-signal-generator-first-steps-part-1/This particular project generates the offset and amplitude values from a pair of PWM pulse streams from the Arduino and it uses a VCA822 variable gain amplifier to do the gain stuff.

author: Ghanou
author_rank: Contributor
timestamp: July 25, 2020, 04:14:09 am
content: Quote from: rstofer on July 25, 2020, 01:15:06 amlooks like just what i need, thanks.they used a LP filter to convert the PWM for voltage and offset control, this implies that the PWM signal will be always present which may cause some output feedthrough of the PWM signal, it would be best i think if i use short pulses of PWM instead, so that i send PWM only when i change gain/offset (it would also free up the micro when there is no amplitude/offset change), do you happen to know how can i achieve that, perhaps using some latching or hold thingy, where the "PWM demodulator" will ouput a DC voltage that corresponds to the pulse width only when an enable signal is ON, when it's OFF , it would ouput the last PWM value present at its input , kinda like how a DAC with a clock signal latches only when clock is enabled, when its disabled it ouputs the last value , anybody have an idea about such a thing?

author: Ghanou
author_rank: Contributor
timestamp: July 25, 2020, 05:11:19 am
content: Quote from: Ghanou on July 25, 2020, 04:14:09 amNvm mind, i found it, the so called sample and hold circuits like the LF398, there's even sample and hold op amps.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 25, 2020, 11:35:35 pm
content: JDS6600 (and similar Chinesium FG's) use an FPGA with a 16-bit ladder dac for each channel.So both amplitude and phase shifts are done in the FPGA.This makes it trivially easy to make for example a stable 1:3 Lissajous figure, and with a slight change of frequency of one of the channels, you can have it "rotating" at a very low speed.The relays are for big range changes.In these cheap FG's you can on some ranges clearly see distortion from mismatches in the ladder DAC's. Unfortunately these resistors are very small. On the picture it's the shitload of tiny specs on the North and East side of the Lattice LCMX02 chip.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 26, 2020, 07:33:46 am
content: With not too high a frequency one could use a multiplying DAC to do the fine adjustment (e.g. up to a factor of 3 or 10) of the amplitude. Coarse would be with relays.

author: Ghanou
author_rank: Contributor
timestamp: July 28, 2020, 01:14:24 am
content: Quote from: Doctorandus_P on July 25, 2020, 11:35:35 pmthe FPGA does the frequency and phase changes since it's a DDS generator, but the amplitude and offset are not done internally in the FPGA, if that was the case you would lose your dynamic range when u change amplitude to small values , i'm talking about the output circuitry/amplifier and how it's controlled by the FPGA or micro to vary the gain, also iam not totally familiar with relay circuits, so i assume the coarse amplitude adjustements are done by switching between some various resistor banks (done by the relays) to achieve multiple gain ranges ,right?btw the DAC is 12 bit at best , not 16. it's some marketing shit... , someone who works for the company confirmed that in the thread that i linked earlier.

author: Ghanou
author_rank: Contributor
timestamp: July 28, 2020, 01:19:25 am
content: Quote from: Kleinstein on July 26, 2020, 07:33:46 amthe AD9833 already gives an anlog signal out , so no need for a DAC , and it ouputs a 12.5MHz max frequency , do u consider that not too high a frequency.also , care to explain how coarse gain adjustement with relays is done?

author: Kleinstein
author_rank: Super Contributor
timestamp: July 28, 2020, 07:14:21 am
content: Coarse gain adjustment, especially the steps to much smaller amplitude can be done with a simple divider or attenuator (3 resistors to keep 50 Ohms impedance at the output). Especially for very small amplitudes (e.g. < -40 dB) it is good to have this directly at the output. This could be steps of some -20 dB (factor 10) and -40 dB. As a cheap solution one can also just have a 2nd output with a smaller amplitude (e.g. -40 dB down) - thus could be handy for the 2 nd channel on the scope anyway.Similar attenuators / dividers could be switched with CMOS switches, especially in front of the output amplifier.A multiplying ADC can be used as a kind of digitally controlled amplifier / attenuator. So the analog signal would be the reference and the digital values controls the gain. Depending on the ADC the upper frequency limit may be in the 100 kHz - 10 MHz range. A lower resistance digital pot can also be used - just keep in mind the limits on the voltage range. So it probably would not work well all the way to the limit of the AD9833.The 12.5 MHz is the absolute theoretical limit - more practical are some 8 MHz (1/3 the clock frequency) if a good (e.g. 7 th order LC filter) reconstruction filter is used. The simpler the filter the lower the cross over should be chosen to keep out aliasing signals. With just simple RC filtering I would not use much more than some 4 MHz and here a DAC may just work with some higher frequency roll off.