Problems with internal temperature sensor - MCP3561 - Page 1
Forum section: electronics / general

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 26, 2021, 10:17:09 am
content: Hi.I'm using a Microchip ADC (their forum is having problems, as I can't even register), MCP3561.The problem should occur in the entire MCP346x and MCP356x family.I need to read the internal temperature sensor. I know that the precision is nothing special, but it is just to get an idea.Current status:At this point I can write correctly and read all the registers.I can get internal readings of "normal" and "inverted" Vref (via MUX) with saturation of the ADC FS as expected.As recommended in the datasheet I have MUX[7:0] = 0xDE.The OSR is high, so that the conversion frequency is low, OSR = 40960.My Vref+ is a 2.5V reference and the Vref- is the AGND.My circuit:Problem:When I read the ADCDATA register, the value changes a lot practically on all new readings (~ 146000 <-> ~150000), like some king of "step/jump".Anyway, even if the value was stable, using thetemperature conversion equationfor a Vref of 2.5V, the value is wrong, as it would be around -119ºC (indoor temp ~25ºC).temp = 0.0013 * (2.5/3.3) * ADCDATA - 267.146 => 0.0013 * (2.5/3.3) * 150000 - 267.146 = -119.4ºCSome help?Is it normal the ADC value, with MUX=0xDE, fluctuating so much?Is the temperature conversion equation really correct?Thanks!

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 26, 2021, 07:37:35 pm
content: As expected, if I use the MUX to connect Vin+ and Vin- to the same point (for example the "Temp diode P"), the ADC converts the value to 0 (zero).So far so good ... but I still have no explanation for the strange effect with Temp Diodes.If I invert the diode connections, the ADC conversion is approximately equal, but negative as expected.So the conversion to IC Temperature continues to fail completely ....

author: MasterT
author_rank: Frequent Contributor
timestamp: April 26, 2021, 10:55:43 pm
content: Setup: confg_reg: 6 : 1101 1110 (0xDE)Readings:0000 0000 0000 0101 0111 1110 1000 0001 (0x00057E81)0000 0000 0000 0101 0111 1110 1000 1001 (0x00057E89)0000 0000 0000 0101 0111 1110 1000 1011 (0x00057E8B)0000 0000 0000 0101 0111 1110 1000 1011 (0x00057E8B)0000 0000 0000 0101 0111 1110 1000 1000 (0x00057E88)0000 0000 0000 0101 0111 1110 1000 1001 (0x00057E89)0000 0000 0000 0101 0111 1110 0111 1010 (0x00057E7A)0000 0000 0000 0101 0111 1110 1001 0000 (0x00057E90)0000 0000 0000 0101 0111 1110 1000 0101 (0x00057E85)0000 0000 0000 0101 0111 1110 1000 1001 (0x00057E89)Formula math:TEMP (C) = 0.00133 * ADCDATA (LSb) – 267.146TEMP (C) = 0.00133 * 360073 * (2.048/3.3) - 267.146 = 30.06 <- seems wrong.But if I use second formula from DS:V(in.mV) = 0.2964 * TEMP (C) + 79.32rearranging:TEMP (C) = (V(in.mV) -79.32) / 0.2964 = (86.616 - 79.32) /0.2964 = 24.6I have correct value.What is going on, is that when I calculate V(IN.mV) I use slope & offset correction factors,double off_mVolt = -0.000242;double slp_mVolt = 0.981872;First formula uses raw hex data w/o correction, and result is off.Ones more:ADCDATA-correct = ((360073 *0.981872) --0.000242);TEMP (C) = 0.00133 *ADCDATA * (2.048/3.3) - 267.146 = 24.67

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 08:45:19 am
content: Thanks for the answer.The big difference between my setup and yours, basically is Vref. I use a 2.5V Vref and you use a 2.048V.However my reading is practically half of yours in mV ...Your setup:raw_adc = 360073mv = (360073*2.048)/2^23 = ~87.9mVMy setup:raw_adc = 150000mv = (150000*2.5)/2^23 = ~44.7mVIt's too perfect to be just a coincidence ...You are using the gain at x1, right?Thank you again!

author: MasterT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 12:18:49 pm
content: Here is confg_reg = 3;reg_bits = 0b10001011;boost = 10; gain = 001, az-mux= 0

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 01:43:41 pm
content: So... you have all in default like me.Very strange indeed.Are you in "Continuous Conversion mode"?

author: MasterT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 04:18:33 pm
content: No, one conversion at a time. Here is a list of config-data I'm setting at start-up, anything else is default.confg_reg = 1;reg_bits = 0b00000010;reciv_16 = transreceive_16(reg_bits, 1);confg_reg = 2;reg_bits = 0b00111000;reciv_16 = transreceive_16(reg_bits, 1);confg_reg = 3;reg_bits = 0b10001011;reciv_16 = transreceive_16(reg_bits, 1);confg_reg = 4;reg_bits = 0b10100000;reciv_16 = transreceive_16(reg_bits, 1);confg_reg = 5;reg_bits = 0b00000010;reciv_16 = transreceive_16(reg_bits, 1);confg_reg = 6;reg_bits = 0b00100011; // (+)CH2 Diffreciv_16 = transreceive_16(reg_bits, 1);It's about right time to ask where did you get your adc from? I had evaluation board with fake IC (Europe located maker, ADC-9). Than I get just adc IC. Fake unit was not able to provide specification at 10MHz+ external clock, same time good IC could operate at 25MHz+, AFAIR

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 04:33:22 pm
content: Thank you very much.I will try to do the same registers setup and see if I get any difference in value.I IC was purchased directly from Digikey and mounted on a PCB designed by me, with the circuit of the previous image.The IRQ pin is generating pulses at the correct frequency, taking into account the OSR and the 20MHz MCLK.Everything indicates that this is an original Microchip IC.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: April 27, 2021, 11:02:03 pm
content: I don't understand your config register 6 (MUX), but I suppose it is another application.Everything seems to be OK with the registers, but in fact the converted value remains very low. By the conclusion of the previous post, the value had to be double this.I just checket my Vref, using my Keysight U128, and the value is 2.501V... so there is no problem with the reference.

author: MasterT
author_rank: Frequent Contributor
timestamp: April 28, 2021, 12:09:14 am
content: My adc is mcp3562, reg-6 defines second diff input pair.edit:BTW, fake IC i find initially was UQFN packaged. Good ADC I get after that is in TSSOP-20

author: Dave_PT
author_rank: Frequent Contributor
timestamp: May 05, 2021, 07:58:01 pm
content: After a lot of debugging work, I activated the ADC's internal clock.Everything started to work perfectly.In other words, the original MCP3561 purchased from digikey, does not support the 20MHz clock that I was injecting.PS: I can work with the ADC's internal prescaller and it seems to work ... keeping the external clock at 20MHz.

author: MasterT
author_rank: Frequent Contributor
timestamp: May 29, 2021, 03:46:35 pm
content: HI, have you any progress with 20MHz ?I get 4 more adc's from mouser last month, marked as mcp561R - according to DS legitimate markings to save space not printing full name mcp3561R.Have same issue initially, adc stops to update converted register results after pushing clock up, than I realized to reconfigure BOOST settings. It has to be 2,Reg-3bit 7-6 BOOST[1:0]: ADC Bias Current Selection11 = ADC channel has current x 210 = ADC channel has current x 1 (default)01 = ADC channel has current x 0.6600 = ADC channel has current x 0.5Even it's working up to 23-25 MHz, I still not satisfied with noise level and (!) linearity. Especially INL, that's about 10x times worse than mcp3550 has. Sampling rate above 1ksps doesn't make any sense to me, since noise level rising above what I can get from internal 12-bits adc stm32G4

author: Dave_PT
author_rank: Frequent Contributor
timestamp: May 31, 2021, 01:36:17 pm
content: I have already replicated all these tests and in fact I also fell far short of expectations.I have a "pure" input signal, resulting from several previous filters, however I can't get the desired sampling rate (10KHz) with an acceptable noise level.Currently, with 2.5V Vref respecting all indications and good practices, I am getting variations of + -25uV, after doing avg of 60values with ~ 1.2KHz sampling (auto conversion).I have almost no advantage in using this ADC ...

author: MasterT
author_rank: Frequent Contributor
timestamp: May 31, 2021, 01:52:58 pm
content: I also tried to Lower frequency from 4.9152 MHz (default) to 1 /4 and even 1 / 8 using internal preselector. Linearity improves significantly, to +-1ppm - same as mcp3550, but since sample rate drops as well, have to lower OSR and consequently get very high noise level. Disappointed.Thinking to get max11270 next month, they promised 130dB, 64kHz, and -122dB THD - well, not all this simultaneously.Price biting, afraid to get fake again, will think over.For today I want to play with ADS8691IPWR

author: Dave_PT
author_rank: Frequent Contributor
timestamp: May 31, 2021, 04:52:36 pm
content: I didn't want to design and produce new PCBsThis ADC is being a complete fail to my expectations ...PS: using the ADC auto-zeroing algorithm, the result suffers little or no improvement ...

author: MasterT
author_rank: Frequent Contributor
timestamp: May 31, 2021, 05:44:00 pm
content: I think microchip failed with MCP356X (& MCP3918 ).What are you designing?I

author: Dave_PT
author_rank: Frequent Contributor
timestamp: June 16, 2021, 06:43:11 pm
content: Sorry for the delay mate.I'm designing a nanoAmp meter... but now I've lost all desire to continue.I will have to reproject using another ADC...

author: MasterT
author_rank: Frequent Contributor
timestamp: June 18, 2021, 02:18:49 am
content: I was busy with TI ads8691 for a couple of weeks, had similar issue with noise. I'm debugging everything on a breadboard and was using TSSOP-20 to DIP-20 adapter board.Making 1 MSPS SAR adc to work is very tricky w/o 4-layers properly designed layout, and even worse - on a breadboard w/o good contacts.But I made it. After I soldered 3x 10uF MLCC just right to the adapter - so contacts quality and 1 cm leads has no effect. SINAD is only 2 dB off compare to DS, -90dB vs -92.This makes me re-think again my strategy for mcp3561R (there is common part - tssop-20 to dip adapter). Today I did same thing - solder 10uF MLCC to AVDD & AGND, another to DVDD & DGND and third one to REF+ and REF-. Reference most important, cap should reside as close to IC as possible.And miracle happened - noise is flashed away.Linearity is also fixed replacing 100 Ohms resistors at the inputs to 10 Ohms. Microchip erroneously recommends high R values, it's may works only below 10 MHz.I have 2.2k in series with clock (17.2 MHz for now) and 470 Ohms in each SPI lines.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: June 23, 2021, 03:57:18 pm
content: I'll try to apply some more filtering as a feature and see if there are any improvements in the conversion.At this point neither speed nor noise level nor resolution seem to be consistent with the datasheet. Microchip support says there is nothing to do...Perhaps these reasons explain why an ADC with similar characteristics costs twice or more than the MCP3561.

author: MasterT
author_rank: Frequent Contributor
timestamp: June 26, 2021, 06:45:56 pm
content: Can't agree on price vs quality comment.I have tested 3 adc in almost the same conditions, microchip mcp3561R vs industry leaders AD & TI. It's not quite correct tests - since 3561R is SD adc, but 2 competitors SAR. It would make sense to compare mcp33131D-10 - just not have time for now.Sampling rate for AD & TI about 500ksps - 1 MSPS. Microchip - 31.25ksps, OSR = 128, clock 14-16 MHz.Approximate SINAD 90dB - means 15 noise-free bits.Linearity talks for itself.

author: MasterT
author_rank: Frequent Contributor
timestamp: July 05, 2021, 03:03:30 am
content: I like mcp356x more and more. Check out this video, see how I installed capacitors and resistors for noise reduction.https://youtu.be/K7W7U3Dg8vg

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 14, 2021, 06:55:42 pm
content: Sorry I haven't said anything yet.But now I'm going to take this more seriously.Let's give it one more chance.My current test conditions are as follows:MCLK = 20MHzPrescaler = 2OSR = 40960 => ~61Hz sample frequencyVref = 2.5V bufferedGain = x1MUX = CH0-CH0, input internaly shortedExpected result:conversion value ideally equal to zero or very close to it.Actual result:conversion value in the order of -1082 (average of 300 measurements), with a maximum variation of 39 ADC counts.With MUX in CH1p-CH1n configuration the conversion result is the same.Do you have a result similar to this one?This is my PCB with the best possible layout.With separate analog and digital power for better noise filtering (you can see the separation of the ground planes next to the refdes "C28" at the bottom.).

author: MasterT
author_rank: Frequent Contributor
timestamp: July 14, 2021, 08:26:36 pm
content: Settings: OSR = 64, 16 MHz, prescaler = 1, data rate = 62.5 ksps, I can't validate for OSR = 40960, as my code runs on block structure, and filling 32768 samples at 60 sps would takes hours.MUX = FF, both input jumped to Internal V CM.This is what I have inside input buffer:*0 -5 -5 -5 -4 -5 -6 -6 -5 -4 -5 -5 -4 -5 -4 -5 -616 -4 -5 -5 -5 -5 -4 -6 -3 -4 -3 -5 -4 -6 -4 -4 -432 -5 -4 -4 -5 -5 -7 -5 -4 -5 -4 -5 -3 -5 -5 -4 -348 -5 -5 -4 -5 -4 -6 -3 -4 -4 -3 -5 -4 -4 -6 -4 -464 -7 -6 -5 -5 -4 -6 -5 -6 -3 -6 -5 -5 -5 -3 -7 -580 -7 -5 -6 -4 -6 -3 -7 -5 -7 -5 -6 -5 -6 -6 -6 -5Data "casting" to get AC:Code:int32_t tempr = adc;tempr &= 0x00FFFFFF;if(tempr & (1L<<23))tempr |= 0xFF000000;tempf = tempr;tempf /= 64.0;fft_r = tempf;//tempr;As you can see there is a division /64 to scale everything down to 18-bits (compatibility with AD & TI tests).So, -5 x 64 = - 320, -> average DC offset (adc was not calibrated);+-1 x 64 -> 64 "counts" - essentially noise, +-2 x 64 -> 128 peak-to-peak noise;What I see from the picture, your hardware design is missing antialising filter at the inputs of the ADC. I have 10nF in between inputs, and 4.7nF each to ground.The name "antialising" is actually misleading, better to call "OPA protector against ADC charge kickback". Microchip's adc's are not so aggressive like TI, but still there is switching capacitor load present.Another possible issue - reference driver mcp6002 may oscillate.

author: uer166
author_rank: Super Contributor
timestamp: July 14, 2021, 08:44:31 pm
content: Quote from: Dave_PT on July 14, 2021, 06:55:42 pmWhy would you expect the offset to be 0? Did you calibrate the ADC? While the drift spec for offset on these Microchip parts is great, the initial offset is something like +- a few thousand counts. If I did the math right, the datasheet claims +- 900uV offset, which would be +-12500 counts or so at 24 bits. I don't see a problem with your measurement given that, and the 39 count variation seems very good also. I've used MCP3914 before and the analog specs are impressive, although the amount of silicon bugs and various garbage requiring ugly workarounds is less than ideal.

author: uer166
author_rank: Super Contributor
timestamp: July 14, 2021, 08:47:17 pm
content: Quote from: Dave_PT on July 14, 2021, 06:55:42 pmThis is generally a really bad idea, keep one and only solid ground plane, and low-pass filter the AVDD for the chip if you want to improve PSRR (which honestly might not be needed, you already get good PSRR as-is, so if your 3V3 is quiet enough as-is you might be better without).

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 14, 2021, 09:40:10 pm
content: Once calibrated, with internal shunt the variation remains at an acceptable noise level (40count -> 11uV).Quote from: MasterT on July 14, 2021, 08:26:36 pmAlthough in the case of this test it is not necessary, the antialiasing filter exists (R41+C32), but I chose to buffer with the opamp for the CH0 input.I can add one more filter to the opamp output, but I don't believe it makes much difference.Quote from: MasterT on July 14, 2021, 08:26:36 pmThe Vref is clean, as it should.The MCP6002 is on a voltage follower setup, as indicated in Figure 7-1 of the datasheet (page 77).Maybe you have to continue to bet on the quality of the signal that arrives at the ADC...The problem is that with an external shunt and after making 60 averages, I still have a noise level of 50uVpp. If it was just 10uVpp it was already acceptable for my application.Quote from: uer166 on July 14, 2021, 08:44:31 pmHi.I think 900uV doesn't match that many ADC counts.I don't know which Vref you used to do the math, but in my case the Vref is 2.5V.(900uV*2^23)/2.5 = ~3020countQuote from: uer166 on July 14, 2021, 08:47:17 pmIt is good practice to separate the powers.All the digital part on one side and the analog part on the other.I also separated the communication lines with 100R resistors to reduce the current peaks that could affect the measurements with the internal stability of the ADC.These are just some practices that I'm used to in other projects, but I don't think they have such a negative impact as you suggest.Deep down this is also corroborated on pages 79/80 of the datasheet.As much as possible I tried to follow the directions as much as possible...Thanks for the answers.I'll go ahead with some more tests and I'll update here.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 14, 2021, 10:31:48 pm
content: I am using the MCP6N16 (U9) to measure the voltage drop across a 20R resistor with a 48X gain.Then the signal goes through an LPF and is buffered to the ADC.At this moment at the sensor resistance (20R) the voltage drop is ~460uV. Power comes from a 3V battery and a series resistor.When the signal is converted by the ADC, it varies between 77237 and 77876, ie ~640 ADC counts, which translates to ~190uVpp.This noise is much higher than expected...Any idea?Signal - ADC RAW

author: MasterT
author_rank: Frequent Contributor
timestamp: July 14, 2021, 10:41:32 pm
content: Quote from: Dave_PT on July 14, 2021, 09:40:10 pmProbably, you are referring to MCP6V91 voltage follower, but there is no capacitive load. I see C29/C30 and it's make difference. What capacitance over there, on Vref, Vdd & Vaa?Also, "clean" - on what scale, there is microVolts and scope is useless at that level.If it's me, I'd prefer BIG capacitor at Vref+, 10+ uF or more, and change circuits to:

author: uer166
author_rank: Super Contributor
timestamp: July 14, 2021, 11:01:41 pm
content: Quote from: Dave_PT on July 14, 2021, 09:40:10 pmFiltering power is fine, what I meant is, splitting theground planesthat are not galvanically isolated is a not fine. This has been discussed ad-nauseam here in other threads, but basically the datasheet here is plain incorrect, you will verifiably get worse performance if you split the ground planes per their recommendation. Maybe it was something an intern wrote that kept being copy/pasted, maybe they just don't bother to fix it or care, but in such a mixed signal system as yours you'd be much better off keeping a solid ground plane, separating the analog/digital signals, ensuring all traces have a reference plane underneath, and filtering AVCC if you wish at the point of load.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 15, 2021, 07:27:53 am
content: Quote from: MasterT on July 14, 2021, 10:41:32 pmI wrote "clean" because the Vref doesn't oscillate like you suggested.The noise level in C33 is in the order of 2mVpp. But in this realm I don't know if I believe in the oscilloscope.Quote from: MasterT on July 14, 2021, 10:41:32 pmVref = 10nF, after the voltage follower and next to the MCP3561 pin. The noise level is ~3mVpp.Vdd = 10uFx1 + 1uFx1 + 100nFx6, as you can see, 1uF and 100nF next to Vdd pins. The noise level is ~6mVpp.Van = 10uFx1 + 1uFx1 + 100nFx5, with 1uF and 100nF next to the IC power pins. The noise level is ~5mVpp.Separe power rails:Quote from: MasterT on July 14, 2021, 10:41:32 pmWell, it's something I can test simply... I'll do it to test.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 15, 2021, 07:35:03 am
content: Quote from: uer166 on July 14, 2021, 11:01:41 pmIt's not worth opening the discussion here too much, but separate plans are recommended by several manufacturers and have their supporters.It's like having a star shaped ground.One example I've worked with recently was TI's ADS1299. A frontend for EEG measurement and the recommendation is also to have separate ground, even following the EVB design.I'm not completely disagreeing with you, I understand what you're saying too, but it makes some sense to me the use of separate grounds.

author: MasterT
author_rank: Frequent Contributor
timestamp: July 15, 2021, 01:15:54 pm
content: Quote from: Dave_PT on July 15, 2021, 07:27:53 amYou can't put a cap at the OPA output, read DS mcp6002 - paragraph 4.3 Capacitive LoadsThis is always a problem, I know only a few specifically designed OPA that may handle 10uF w/o series resistance.Setting series resistance with common OPA creates an error. Probably, offset may be calibrated out for constant sampling rate

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 15, 2021, 02:17:18 pm
content: Quote from: MasterT on July 15, 2021, 01:15:54 pmYes sure.I was going to put an RC of 100R + 10uF, similar to what Microchip has in the voltage ref app note.

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 15, 2021, 09:10:42 pm
content: Quote from: Dave_PT on July 15, 2021, 02:17:18 pmAt first glance it's hard to tell apart, but I would say the end result is slightly worse.Same test condition, result in a noise ADC count of 644.

author: floobydust
author_rank: Super Contributor
timestamp: July 15, 2021, 09:49:34 pm
content: There is theMCP3x6x Rev. B silicon erratawith Data-Ready work around, looks like you're supposed to use the newer MCP3561R

author: Dave_PT
author_rank: Frequent Contributor
timestamp: July 16, 2021, 12:13:22 pm
content: Quote from: floobydust on July 15, 2021, 09:49:34 pmWorth trying.The pinout is the same and it already has the internal Vref.I believe that the changes must not have been just these and that at least the clock problems are also resolved.

author: MasterT
author_rank: Frequent Contributor
timestamp: January 16, 2022, 05:54:06 pm
content: I tested two more adc PCM4202 & MAX11270. Same prototyping technics, similar voltage regulators, decoupling, RC network etc.Short summary:Noise Linearity (HD-2 & HD-3)1. Rate 62.5 kspsMCP3561R -130 -122MAX11270 -124 -122 (SNR flour limit)PCM4202 -115 -1102. Rate 4 kspsMCP3561R -140 -124MAX11270 -130 -128PCM4202 --------------What is interesting, that microchip outperform audio legend from TI PCM4202 with huge difference. Max11270 has impressive linearity data, check it out: