PCB trace inductance - Page 1
Forum section: electronics / beginners

author: king.oslo
author_rank: Frequent Contributor
timestamp: June 09, 2012, 01:54:46 am
content: Hello there,I am designing a small SMPS.I would like to minimize the EM noise radiation and noise pick-up on the board. Which widths and lengths of PCB traces should be avoided in which cases? The datasheet advised me to use wide short tracks for the gate drive, but little copper for the switching node. Makes no sense to me, but I am sure it does to you.Thank you for your time.Kind regards,Marius

author: free_electron
author_rank: Super Contributor
timestamp: June 09, 2012, 06:18:15 am
content: What chip ?

author: Hideki
author_rank: Frequent Contributor
timestamp: June 09, 2012, 08:44:45 am
content: I guess it's still the LM25085.What you need to do is minimize the area of the loops, and not have traces snaking all over the PCB to connect up components placed at random locations.If you study switch regulator layouts you may find that many of them don't actually use line traces for the critical connections -- they use filled polygons. This lets you use more copper for the signals and you can fit the polygons together like a puzzle with some required separation between them.Sometimes the manufacturer will show an example layout in the datasheet. In this case they didn't, but see page 13 of this application note for one possible way to do ithttp://www.ti.com/lit/an/snva375a/snva375a.pdfI have seen cleaner, tighter layouts --still, it's way better than your first attempt. That was one of the weirdest I have seen

author: Short Circuit
author_rank: Frequent Contributor
timestamp: June 09, 2012, 11:43:03 am
content: Switching node also need short wide tracks. Datasheet is probably calling for this to be as small as possible (not as thin as possible), which makes a lot of sense since this node can 'help' emitting a lot of EMI

author: king.oslo
author_rank: Frequent Contributor
timestamp: June 09, 2012, 12:04:13 pm
content: Hideki, yes the ic is the LM25085.Please let me know if the following is correct or incorrect:Wide traces (or wide polygons or whatever) emit the same amount of EM radiation as narrow tracks, however, because the tracks are wider the emitted radiation is lower pr area? Narrow tracks receive less EM because they have smaller area to receive EM radiation.Is the above correct?Thank you for your time.Kind regards,Marius

author: free_electron
author_rank: Super Contributor
timestamp: June 09, 2012, 03:47:51 pm
content: The point is moot. It does no good to speculate over this. You need the correct trace for the current flowing. That is the one thing you cannot change.Keep your loops short. Apply logical current flow theory. Meaning : no sidestubs , multiple vias on caps , no backtracking , and source-buffercap-switch-coil-tankcap-load chain preservation.I don't know you level of experience so some of the thing i say you may already know, but here is an over iew of the troubles and tribularities with step down convertors.What is a switching step down convertor ?Very simplified : it is a power convertor. 5 watt output power means you require 5 watt input power ( forget switching losses and quisecent currents for now, we'll deal with that in a moment )Lets say we make a convertor that will supply 5 volt at 1 ampere. This is output power 5 watt. The input voltage is 50 volts. Since thos 50 volts needs to supply 5 watt the current there is 100mA.Keep in mind the currents are RMS values... Integrated over time. We'll deal with peak current in a moment ....If you grab the datasheet of the lm25085 and look at the first schematic. Cin is the 'buffer capacitor'. This thing delivers electrons to the regulator , together with the source. Cin needs to be adjusted to deal with peak currents ( more later).So we have an energy source. How does this thing work ? We close the switch ( mosfet) and current flows from Cin. , through the mos , through the inductor into Cout and whatever load is attached. This current is pretty large, larger than the output rms current of 1 ampere. How much is hard to say. Depends on value of cout, the coil value , rdson of the mos and other factors. But it is large ( has a large crest factor : peak/ rms)So , while the switch transistor is on there is current from Cin , through the mos , through the inductor through Cout + Zload to ground , back to Cin. This current 'charges' the magnetic field of L1 , and the capacitor Cout. This current is NOT fixed, but rises ( inductors 'fight' changes in current remember ? capacitors 'fight' changes in voltage'..)The feedback node (Cff RFB2 RFb1) senses when the 'storage' cycle can be terminated.This kind of regulator ( like LM25085 ) employs a trick using the capacitor Cff ( C feed forward .. ). As the current through the coil is still changing this is coupled back using Cff to the FB node. during the charge cycle they monitor the current this way ( so they do NOT look at the absolute Vout , but look at Icoil instead ... ) When the coil has enough energy stored ( Di/Dt starts climbing ) , or a fault condition is detected ( coil goes into saturation and the field collapeses makeing the current very large all of a sudden ) they turn off the mosfet.So. what happens next ? we have energy stored in the coil... gow do we 'dump' it ? Simple. the coil becomes the energy supplier. current comes out of the cil , flows into Cout + Zload , into ground , up through D1 back into the coil. in other words : the coil is the 'battery' ! the loop closes htrough D1. Depending on the current draw by the output we simply need tomodulat how fast we 'recharge' the coil'.Now, with this knowledge we can take a look at PCB layout for two things1) currents2) EMICurrent :the current in the trace from Vin to the Source of the mos is large but relatively slow changing ( coils resist current changes , so it takes time to build up the current. Cin should be as close as possible to the drain of the transistor ( and not where it is drawn in the schematic above ! ) because of the repitition rate .The RMS value of this current is low ( power converter..remember ? ) so you don't need big fat traces. Since the rate of change is slow this point will not really 'radiate'.things change after the mosfet ... you have two cycles : charging of the inductor. Here Cout delivers the brunt of the energy to the load. cout acts as a 'storage tank' hence the name tank-capacitor. the tank is being dumped into the load as we are charging the coil. once the coil has enough energy we stop the charging process. the load and Cout are now given energy from the coil... the problem is at 'handover' diode D1 requires some time to turn-on... in tht very short moment there is a large voltage spike that is going to radiate. you can sometimes put a small capacitor there ( few tens of pF ) to fight that .Most of the time current is delivered from the inductor so here you don;t have short peaks with long deadtimes like on Vin. so here oyu need big fat traces. Keep the loop L1-Cout-gnd-D1-back to inducto. as short as possible. this is where current flows most of the time !Use low-esr capacitors in Cin. for Cout you are better ofplacing multiple in parallel than 1 . use multiple via's to connect to ground. via's have an inductance ... get the via's as close as possible the component pads. same for the diode and coil. actually, try to do the layout in such a way that you do not need any via's at all. you can do this fully on top layer. the only 'ground' point is where Cout connects to GND . there you have via's to ground.think of 'Cout' as the element that delivers power to the load.lumped element construction : the load only sees the two terminals of Cout.Cout only sees one terminal of the coil and one terminal of the diode.this stuff is hard to explain in words.. we need drawings.. that makes everytinhg clear.now , feedback ... the chip senses output voltage and coil current between its gnd pin and the FB pin. so the chips GND pin needs to be tacked as close as possible to the GNd terminal of Cout.the FB node needs to be kept away from any stray magnetic field of the inductor ! putting it on the backside does not help ! magnetics are not blocked by copper or pcb material...place Rfb1 , close to the chip. Cff andRfb are placed 'in-line' from FB to the output point.The real 'dirty' point is the point where mos, D1 and coil meet. that is the radiation point , simply because the turn on time of D1...there is other problems like shoot-through. ahen the mos turns back on D1 needs to come out of conduction... so picking D1 is critical , as is picking the coil.

author: king.oslo
author_rank: Frequent Contributor
timestamp: June 11, 2012, 10:56:48 pm
content: Thanks. It took some time to write that.Large current spikes = creates noise: fat trace required?Stable current = low noise: narrow trace possible?Thanks.M

author: Hideki
author_rank: Frequent Contributor
timestamp: June 12, 2012, 09:05:28 pm
content: No.As free_electron says, the minimum trace width is determined by how much current needs to go through it.The exact value of the minimum depends on how much temperature rise, resistance, voltage drop or power loss you will allow. You can always make it wider than the minimum.But even when you make it wide, you don't want it to be longer than necessary, and you want the loops to be small.For more about grounding and loop areas:http://www.analog.com/library/analogdialogue/archives/41-06/ground_bounce.html

author: king.oslo
author_rank: Frequent Contributor
timestamp: June 12, 2012, 09:14:46 pm
content: Thanks.M