STM32F407 TIM1_CH4 one pulse mode - Page 1
Forum section: electronics / general

author: Avi
author_rank: Contributor
timestamp: October 31, 2020, 06:24:36 am
content: I'm using an STM32F4DISCOVERY board, and trying to configure one pulse mode (not using ST's libs/HAL)I've connected an LED to PE14, there's a blue button already on the board connected to PA0ConfigPinOnPort is defined elsewhere and not really important.Using the code below, when the button is pushed, the led quickly flashes, and then goes off (as it should), but at the end of the period, it comes back on!So when you press the button again, you don't notice anything except a slight delay because it was already on, then it goes off for the rest of the period, and then comes back on again.I would like it to remain off at the end of the period (keep the final state the period finished with). It does not seem to follow the OSSR bit.There is a note that says "This bit is used when MOE=1 on channels having a complementary output which are configured as outputs. OSSR is not implemented if no complementary output is implemented in the timer." TIM1_CH4 does not have a TIM1_CH4N, and I don't think this is the right way to do what i'm looking for anyway. I don't need/want a complementary output, and have preference to keeping pin PE14.Anyone knowledgeable on One Pulse Mode know what I'm doing wrong or what can be done?Code:int main(void){ConfigPinOnPort(PORTA,0,'i');//button as input pn PA0InitPWM1Pulse(16800-1, 10000-1);//LED on PE14while(1){while((GPIOA_IDR & 1)==0);//blue buttonTriggerPWM1Pulse(1000);while(IsPWM1PulsePeriodComplete()==0);}}void InitPWM1Pulse(unsigned int prescaler, unsigned int period){ConfigPinOnPort(PORTE,14,'t');//afio 100Mhz on TIM1_CH4 (PE14)SetAFE(14,AF_TIM1);RCC_APB2ENR |= 1;//timer 1 clock enableTIM1_CR1 &= ~(3<<5);//clear center aligned mode configuration bits, Edge-aligned mode. The counter counts up or down depending on the direction bit (DIR).TIM1_CR1 &= ~(1<<4);//Counter used as upcounterTIM1_CR1 |= 1<<3;//one shot mode, Counter stops counting at the next update event (clearing the bit CEN)TIM1_CR1 &= ~(1<<1);//UEV enabled. The Update (UEV) event is generated by one of the following events: Counter overflow/underflow, Setting the UG bit, Update generation through the slave mode controller. Buffered registers are then loaded with their preload values.TIM1_PSC=prescaler;//prescalerTIM1_ARR=period;//set periodTIM1_CCMR2 &= ~(3<<8);//channel is configured as outputTIM1_CCMR2 &= ~(7<<12);//clear mode bitsTIM1_CCMR2 |= 6<<12;//pwm mode 1, channel 1 is active as long as TIMx_CNT<TIMx_CCR1 (use 7 for mode 2, channel 1 is inactive as long as TIMx_CNT<TIMx_CCR1)TIM1_CCER &= ~(1<<13);//OC4 output polarity=active highTIM1_CCER |= 1<<12;//OC4 signal is output on the corresponding output pinTIM1_EGR |= 1;//Re-initialize the counter and generates an update of the registersTIM1_BDTR &= ~(1<<11);//When inactive, OC/OCN outputs are disabled, Off-state selection for Run modeTIM1_BDTR |= 1<<15;//main output enable}void TriggerPWM1Pulse(unsigned int duty){TIM1_CCR4=duty;//set pulse dutyTIM1_EGR |= 1;//Re-initialize the counter and generates an update of the registersTIM1_CR1 |= 1;//counter enabled}unsigned int IsPWM1PulsePeriodComplete(void){return (TIM1_CR1 & 1)^1;//return the inverted counter enabled bit}Adding a pulldown made no differenceCode:GPIOE_PUPDR &= ~(3<<28);GPIOE_PUPDR |= 2<<28;