Smoothing PWM With a Logic Inverter - Page 1
Forum section: electronics / projects

author: mattico
author_rank: Newbie
timestamp: February 18, 2021, 04:25:29 pm
content: I was looking at the schematic of theDCM224 Power Moduleof theEEZ Bench Box 3and this little circuit immediately stuck out. It's inserted into the PWM signal that controls the output current setpoint. I had tosimulate itto figure out what was going on. The obvious thing to do to convert a PWM signal into a voltage is an RC filter. To get it smoother you simply use a "bigger" RC filter. The downside is the time delay and frequency limitations this imposes on your output. This circuit is a simple, cheap way to smooth out PWM with smaller RC filters. The inverter produces a signal that's the opposite of the PWM noise, and AC coupling it to the output ensures it doesn't affect the average (DC) value of the output.Has anyone seen a circuit like this before? Does it have a name?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 19, 2021, 12:21:06 am
content: Yeah, that helps a bit. It's a modified Wien bridge I think -- a kind of notch filter. For analysis purposes, you might consider the inverter as, well, an inverter (gain = -1), and look at the frequency response in that case. (Justifiable, as a NOT gate is an amplifier like any other, just with quantization noise of exactly 1 bit.)Doesn't seem all that worthwhile? Maybe if you have the gates to spare, or the complements already available. If I'm adding a chip to do it, I think I'd rather use a dual op-amp, in a 3-pole active filter -- faster settling for the same ripple, lower harmonics.Tim

author: gnuarm
author_rank: Super Contributor
timestamp: February 19, 2021, 10:05:08 am
content: I saw a web page a few months ago that analyzed this circuit and showed clearly how it produces less ripple with the same component values (but a slower response), or produces a faster settling time with a smaller RC and the same ripple or, of course, something in between. I wish I had that link. It showed either scope images or simulation plots. Very clear. Here is a similar page.https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction/Wait! I found it. Turns out it's not a regular web page, but from a published book. However it is the author who posted this, so permission granted. It's in his dropbox account and will take it down when he wants.https://www.dropbox.com/s/ir4k21hibg7a8z0/4x.25_PWM_ripple.pdf?dl=1Thanks to piglet for pointing me to the thread in sed.I'm working on a design using something similar, a sigma-delta with an RC output that provides the feedback to a comparator to drive a counter. There is negative feedback through the RC and another R is connected to the C from the analog input. The end result is the pulse density of the feedback output is averaged by the RC in combination with the analog input. Since the RC voltage is compared to a fixed voltage the RC voltage is held constant with the average current through feedback balancing the analog input current and so the pulse density matches the analog voltage.i thought about whether this AC coupled inverter could improve this circuit but I don't see how. The ADC sample rate must be slower than the analog input bandwidth. This means the RC can be much longer than the clock rate and so provides very adequate filtering. That is the big advantage of the sigma-delta approach. The clock sample rate is much faster than the ADC output sample rate and so acts as an integrator.I know analogous sigma-delta circuits exist for DAC designs. i don't recall the details, but I don't think it is much more complex than a PWM. It generates a PDM waveform that is easier to filter. You can still apply the same inverter technique as well.