STM32F4 I2C master ignoring clock stretching - Page 1
Forum section: electronics / general

author: exuvo
author_rank: Contributor
timestamp: September 29, 2014, 08:37:43 pm
content: I am tearing my hair out on this problem.I have a STM32F427ZGT6 that is acting as a I2C master on a 400kHz bus and a 100kHz bus. On the 400kHz bus i have an Accel, Gyro and Magnetometer which are all working fine but they don't need any clock stretching. On the 100kHz bus i only have a single ATTiny24A acting as slave with which communication fails.The ATTiny24A has the bare minimum of hardware support required for I2C, but I am quite confident that my code running on the Tiny is working correctly as i tested it before with a LPC1768 as host and everything was fine. The tiny code is fast enough to not need any stretching during the initial addressing but not for subsequent transfers where it needs to strech before the 8 bit transfer and before the acknowledge bit.Master: STM32F427 @168MHz external crystal, I2C bus speed 100kHzSlave: ATTiny24A @8MHz internal RCSalae Logic8 analyzer output captured @2MHz (looks the same @24MHz capture, but simultanuesly sending USB commands to the STM and capturing fails)External link to logic analyzer imagesThe bottom channel2 shows when the Tiny starts and ends the I2C ISR.Debug output from the master: Sees the write as ACK_FAILURE and the read as ARBITRATION_LOST.In the write it ignores the clock stretching at the end and thinks the slave NAKd and ends the transfer.In the read it cleary ignores that the slave is stretching and attempts to do a transmission end even though SCL is still low.I have read the relevant bits of the datasheet and checked the errata but nothing seems wrong.QuoteQuotePCLK1 is 42MHz which results in a TRISE setting of 43, which i've checked is correctly set using a debugger. I've also tried a few other values but the results were the same.Is there anything im overlooking that is supposed to be obvious that explains why the master is seemingly ignoring slave clock stretching?-edit-Electrical connections:The STM has 220 Ohm resistors between its floating I2C pins and SXX2_3V. The ATTiny is connected to SXX2_3V thru a 38cm ribbon cable. Probing was done at the ATTiny end. Unfortunantely I don't have a digital scope to capture the analog waveforms during communication.

author: andyturk
author_rank: Frequent Contributor
timestamp: September 29, 2014, 09:02:49 pm
content: Well, the logic analyzer is seeing an ACK and that (hopefully) means the ATTiny is generating it. Without an oscilloscope, you'll just be guessing about signal integrity issues. Have you tried stronger I2C pullups to see if that changes anything?

author: mikerj
author_rank: Super Contributor
timestamp: September 29, 2014, 09:51:43 pm
content: You really need to measure the actual signal voltages to ensure that the STM32 is seeing a valid logic zero level when the slave is stretching the clock, and you are going to be hard pressed to do this without a scope. Even one of those horrible nano scopes should be fast enough for a 100kbit/s bus.

author: exuvo
author_rank: Contributor
timestamp: September 30, 2014, 01:28:14 pm
content: After some sleep I realized I can actually use my analog scope if I set the STM32 to output a 100kHz square wave on the I2C pins. It seems like the signal is capping out at 1.5V instead of 3.3V as the supply rail is. It also doesn't go all the way down (0.2V) but that is expected with the 220 resistors at the STM32. The rise time for the signal from the STM32 at the end of the ribbon cable is 1µS (0V to 1.5V) and the fall is very sharp. I'll investigate further why it caps at 1.5V but that is at least one major problem that shouldn't be happening.On a related note i ordered a Rigol DS1074Z-S (70MHz 1Gsa/s 12Mpts 4ch, 2ch 25MHz func-gen) for future use. If I'm going to buy a scope I might as well buy a good one.-Edit-Oh silly me i put the square wave loop before the 5V rail is turned on. Ignore that last part about it capping at 1.5V. At the ATTiny end of the ribbon cable the STM32 signals are 0.5-3.3V 1µS risetime.

author: exuvo
author_rank: Contributor
timestamp: September 30, 2014, 02:42:06 pm
content: I found the problem! My I2C_ClearBus() function on the STM32 was not correctly setting the SCL pin mode to Alternate with opendrain after manually clocking 9 cycles with opendrain. Luckily the 220 Ohm resistors kept currents low.