Current Mirror - Page 1
Forum section: electronics / beginners

author: Gregory
author_rank: Regular Contributor
timestamp: March 11, 2013, 06:28:51 am
content: Hello guys! I need to charge a 330p capacitor in 2us from 0 to 5V with a constant current to create a ramp. I wanna use a PNP currentemirror with one side to the capacitor and the other to trimpot to control the reference current. What is a good PNP transistor for this type of operation? I tried with bc5xx and bc3xx ant it get crap, the start of the ramp was not linear. Thanks!

author: amspire
author_rank: Super Contributor
timestamp: March 11, 2013, 07:03:16 am
content: The transistors can do a good job, so we probably need to see your circuit to see why you are not getting a good ramp.How linear do you need? 1% linearity or are you after something very precise.An opamp integrator circuit is often used to make a ramp with a slope proportional to the input DC voltage, but you will need one with a high bandwidth and fast slew rate to make a good 2uS ramp with an opamp.

author: Marco
author_rank: Super Contributor
timestamp: March 11, 2013, 01:15:15 pm
content: BFG31 is a good RF PNP transistor, good current mirrors tend to have more than 1 transistor pair though (ie. some kind of cascode to remove the dependence on output voltage of the current somewhat).At those speeds it's probably better to make the current source constant and then use a differential pair to make it go through the capacitor or the other leg.

author: Gregory
author_rank: Regular Contributor
timestamp: March 12, 2013, 05:44:19 pm
content: Can you give some example of a currente mirror with more than one transistor pair?

author: PSR B1257
author_rank: Frequent Contributor
timestamp: March 12, 2013, 08:06:29 pm
content: What about a dedicated dual-transisotor like the BCV62, or an integrated current source like the LT3092?

author: Gregory
author_rank: Regular Contributor
timestamp: March 13, 2013, 03:13:22 am
content: I read about this LT chip. I need a 0 to 5V ramp, maybe the easiest is a single RC network with 24v at input, at the 0 to 5v range i will get something really close to a linear ramp.

author: amspire
author_rank: Super Contributor
timestamp: March 13, 2013, 03:30:34 am
content: A PNP with an emitter resistor and a constant base voltage or a current mirror do a very decent job, and you still have not posted the circuit you tried to use that was non-linear.You said the start of the ramp was non linear - that means you had something wrong in your circuit.If you are satisfied with the linearity of a current ramp from a resistor to 24V, then you can definitely do much better with the bc5xx and bc3xx transistors you mentioned with a simple circuit. They will be fast enough for a good 2uS ramp.

author: Icarus
author_rank: Regular Contributor
timestamp: March 13, 2013, 06:20:00 am
content: How about a pseudo-current source ?just like this one.

author: Gregory
author_rank: Regular Contributor
timestamp: March 13, 2013, 07:06:50 am
content: This is the circuit I'm designing. It will be a phase-shifted modulator for a new type os tesla coil. You can see the current mirror and the rest of the circuit. The small mosfet shorts the cap to reset the ramp.

author: amspire
author_rank: Super Contributor
timestamp: March 13, 2013, 11:46:45 am
content: A few things. First, the TL3116 is 0 to 2.5V common mode input so you should restrict the voltage on the capacitor to a range of 0 to 2.5V. You may also be allowing the current mirror transistor to saturate, and it cannot get out of saturation until the base storage charge is dissipate, Restricting the voltage on the 300p cap means you can stop the current source transistor from saturating, and it will behave far more perfectly.Thirdly, reducing the maximum voltage on the 330pf cap means you can add emitter resistors in the current mirror, and it will behave far more accurately and predictably.I am not sure why you have added a 1n4148 to the BS170 drain. It will mean the reset voltage on the 300p cap is not constant, and with the significant drain capacitance of the BS170, is will add some non-linearity to the charging curve.So I would eliminate the 1N4148. I would increase the 330p cap to 1nF to triple the charging current to 1mA for a 0 t0 2V in 2usecs. Add 680 ohm resistors to the emitter legs of the current mirror transistors. Add another pnp transistor with its emitter to the top of the 1nF (was 300p) cap, collector to 0v, and base to about 1.6V set by a resistive divider (2k7 and 5k6 possibly). That will prevent the current mirror transistors from ever saturating.I do not know the external input voltage range to the TL3116, but if it goes over 2V, you may need to put a voltage divider on the input. It has a low current input, so that would probably be fine.The emitter resistors couple be increased up to about 1k5 (with the 1nF capacitor) and the bigger the resistor, the more predictable the current mirror behavior. With the emitter resistor, the 2uS ramp may be consistent enough to allow you to replace Rv1 with a fixed resistor (perhaps 3k3 for the 680 ohm emitter resistors).It should now work fine.Richard.

author: fcb
author_rank: Super Contributor
timestamp: March 13, 2013, 11:54:21 am
content: 47R and 100pF on the ramp cap will kill the linearity. Remove them or buffer the ramp.Remove the 4148 in the zero'ing FET's leg. If you want to goto a known level, raise the other side of the FET (you could use a voltage divider with a big bypass on it).As you have the advantage of the current mirror, consider raising the voltage rail to perhaps 12v, even if your target ramp is 1v-3.5v.

author: amspire
author_rank: Super Contributor
timestamp: March 13, 2013, 12:03:49 pm
content: Quote from: fcb on March 13, 2013, 11:54:21 amYes, I was wondering why the 47R and 100P were there. Sometimes the input stages of fast comparators can oscillate if connected directly to a capacitor, and if this is the case, the 47R without the 100p may be needed. But I would try it first without both parts. The comparator datasheet does not specify a minimum slew rate, so I have no idea if the comparator output can switch multiple times at the switching point.As I said above, the TL3116 has a 0 to 2.5V input so if you let the input voltage get to 3.5V, the comparator may behave unpredictably - perhaps the outputs may flip. It is much better to operate from 0 to 2v rather then from a vague 0.4-0.65 V to over 3V.

author: fcb
author_rank: Super Contributor
timestamp: March 13, 2013, 12:26:00 pm
content: If the (fast) comparator oscillates, then add a simple hysteric loop through to the reference input (one resistor from the comparator output to the +Vin, and one resistor in the feed from C5).

author: Gregory
author_rank: Regular Contributor
timestamp: March 13, 2013, 05:42:14 pm
content: The ramp need to have 2us rise time.The datasheet says it has 4v of C-mode input at 25ºCR2 and C3 are there to filter some crap oscilations that happens when the BS shorts de caps, even with a good layout. (I can remove it because this oscilations occurs when the BS it conductin and the output of the comparator don't matter to the circuit)The 1n4148 was there to prevent negative voltages to appear in te capacitor, but I already removed it.I think I don't need the hystersis because the comparator is tied to the HC14 latch and when it goes do 1 the latch will stays until the next ramps starts.

author: amspire
author_rank: Super Contributor
timestamp: March 13, 2013, 10:53:26 pm
content: Quote from: Gregory on March 13, 2013, 05:42:14 pmThe 2nsec was a typo - I have corrected it to 2usec.QuoteIt has a maximum guaranteed range of 0 to 2.5V, and a typical device can go up to 4V if the temperature is above 35 degC. You always design to the guaranteed specs, unless there is an urgent reason to push the limits. I see nothing in your design that requires your ramp goes to 4V instead of 2V, and it will perform better the way I have suggested. I do not think there is anything in the data sheet to say that the device outputs are will behaved if you exceed the common mode voltage range, so it is very good design practice to keep the inputs below 2.5V as I did in my suggestions above. If you exceed that, it may be you will not have a problem, but it may also be you have a problem that may waste hours or days of debugging. One thing you learn the hard way in designing is you don't take risks for no good reason.QuoteThis is where a bit of hysteresis can probably help as fcb suggested. It will clean up the comparator transitions and stop any oscillations.Increase R2 to 1K, remove c3 and add a 100K resistor from the inverted output to the negative input.QuoteIt is usually good to get rid of ugly behaviors. When a comparator can oscillate, it can also mess up the stability of the comparator so the switching point is more erratic.Richard.

author: Gregory
author_rank: Regular Contributor
timestamp: March 14, 2013, 03:06:12 am
content: I thinked on two things to have the ramp going to 4v:1 - the reference will be generated with a atmega (pwm and RC filter) so with 4v I can get more resolution. (I still can use the full resolution with a divider to a maximum of 2.5v)2 - With 4v the things get less suitable to noise (it will be close to a tesla coil!!! hehehehe)I have another design (a hysteresis controlled synchronous buck converter) using the TL3116 as the main comparator and it works good with more than 2.5v of C-mode. But I will take that into consideration, thanks!Here is the design that is mounted on the proboard and is working great. I will make more tests to see if the little exponential effect on the ramp will cause problems (this ramp control the modulation) this thread help me a lot! thanks all guys! I will come back with more doubts.Grégory.

author: Icarus
author_rank: Regular Contributor
timestamp: March 14, 2013, 08:27:00 am
content: Quote from: Gregory on March 13, 2013, 07:06:50 amThat type of current mirror won't work with discrete components because ofthermal and junctionmismatch....For instance, if Q3 is a little tiny bit hotter than Q2, Q2's base current drop to zero. Or Q3 have a little tiny tiny bit more dopped than Q2 again Q2's base current drop to zero.Even integrated circuit, this type of mismatch is serious problem. Lot's designer try to make their circuits that can tolerate "three sigma" variations so %99.95 percent of the product is usable.