4004 without the “cruft” chips? - Page 1
Forum section: electronics / general

author: Howardlong
author_rank: Super Contributor
timestamp: April 15, 2018, 08:40:01 pm
content: I’ve had a 4004 sitting here for a few months, has anyone suggestions for interfacing its old fashioned voltage levels without resorting to the rest of the MCS-4 chipset? It’s the bidirectional lines that I’m looking at providing a solution to which complicates things.Vdd=-10v, Vss=+5vVIL min / max -10 / -0.5VIH min / max 3.5 / 5.3I’ve had a look at using CD4504B (from 4004) and CD40109B (to 4004) for level translation, referencing the rest of the system to -10v, but I’m interested if others have some ideas. The external logic doesn’t need to be bidirectional.

author: David Hess
author_rank: Super Contributor
timestamp: April 16, 2018, 03:50:26 am
content: Tektronix had to do something like this with their 2465 oscilloscope which used an early EEPROM in the form of an ER1400 EAROM which required 35 volt signaling. Their solution was to use an open collector driver with pull-up resistor to drive the IC and then a bipolar transistor level shifter to translate back down to logic levels.Just for simplicity, I think the way to go is to reference all of the other logic to the 4004's -10 volt Vdd so you have a +15 volt regulator (or +12 volts?) to power the 4004 and +5 or +3.3 or whatever for the rest of the logic. I am a little fuzzy on the 4004's pull-down capability though; if it is a problem, then single transistor constant current sources can replace the pull-up resistors.The other way I might do it is to use 4053 analog switches to shift from 5 volt CMOS to +Vss/-Vdd 4004 since the 4053 includes tri-state capability.

author: Howardlong
author_rank: Super Contributor
timestamp: April 16, 2018, 01:21:57 pm
content: Yes, I should've noted the 4004 VOL and VOH parameters too, this is where it's not so good if referencing at the -10V rail, it makes more sense in this direction to reference at 0V and clamp with a resistor and diode.VOL min/max -7V / -1.5VVOH min/max 4.5V / 5.0VI'm now looking into using a simple 10V zener for this direction, and keeping the -10v rail as reference.

author: woodchips
author_rank: Frequent Contributor
timestamp: April 16, 2018, 05:05:11 pm
content: RS232 interface chips?

author: Ian.M
author_rank: Super Contributor
timestamp: April 16, 2018, 07:50:11 pm
content: Its a horrible kludge, but I *THINK* you can bidirectionally convert from 4004 data bus to near-standard 5V 74HC levels with a couple of MOSFETs, (one N and one P channel) similar to the typical I2C level converter circuit. By running the 74HC logic at 5.3V, the 4004 data input levels have 0.6V margin from worst case.You'd need to hand-tune the gate bias voltages to get the levels right without excessive load on the 4004 or protection diode current in the 74HC input, which is a royal PITA unless you can get four closely matched MOSFETs of each type. Low Vgs threshold MOSFETs will help as their threshold tolerances are tighter in absolute terms.Based onhttp://datasheets.chipdb.org/Intel/MCS-4/datashts/MCS4_Data_Sheet_Nov71.pdfwith some guesswork for best case parameters.LTspice sim attached. MOSFET choice for low gate capacitance for sim only.

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 07:27:48 am
content: Quote from: woodchips on April 16, 2018, 05:05:11 pmI'd need tristate driver outputs, are there any devices that offer this?

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 08:03:57 am
content: Quote from: Ian.M on April 16, 2018, 07:50:11 pmNice idea, but yes I'd need to take some care about biasing.Thanks for the reference sheet: it looks like they assume VDD=-15V, VSS=0V in this reference sheet (there is also a GND on the 4004 which would be -5V in this case).The data sheet I've been using is here:http://tinymicros.com/mediawiki/images/b/b9/MCS-4_Users_Manual.pdfwhich specifies VDD=-10V, VSS=+5V, GND=0V on page 103. A case of horses for courses if ever there was one!Very initial indications on the scope with a test circuit taken to the min/max of both VOL and VOH are that a series 10V zener to drop the voltage plus a weak-ish load resistor will work for 5V logic. The zener will also clamp low. For 3.3V, a 12V zener may well work.For the opposite direction (5V logic to 4004 data I/O lines) I'm looking at a CD40109B which is a tristate level shifter.

author: FrankBuss
author_rank: Unknown
timestamp: April 17, 2018, 08:07:22 am
content: I used a 40109 driver for the TTL voltage to high voltage conversion, which has an enable pin, so there is your tri-state, and just some LM339 comparators for the other way. See here:http://www.frank-buss.de/4004/index.html

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 09:08:02 am
content: Quote from: FrankBuss on April 17, 2018, 08:07:22 amI originally discounted comparators because I thought they'd be too slow, I guess I was wrong!I guess we came to the same conclusion regarding to 40109, although I have had some concern over the latency.Like you I am looking to use a PIC for emulation of the other stuff, but including RAM, I am looking at something a bit more beefy than a PIC16.Where did you tie the 4004's GND pin?Well done on your project! That's almost _exactly_ what I'm trying to do, I'm ever so slightly miffed you already did it ;-)

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 09:23:35 am
content: Edit: to add I see it's running at quite a low frequency, I was but off by doing that as I assumed there was something dynamic inside the 4004 as the spec sheet says 1.35us <= Tcy <= 2us. I guess it doesn't matter running it slowly, I was pretty intrigued how you'd managed to update the LCD, and service the device's real time demands with a PIC16F887 running at 20MHz (Fcy=5MHz).Again, well done on that achievement, pretty impressive I must say.

author: bd139
author_rank: Super Contributor
timestamp: April 17, 2018, 09:50:45 am
content: Being a lame capitalist I'd probably sell the 4004 if it works. I've seen just the IC go for £200 or so...

author: Ian.M
author_rank: Super Contributor
timestamp: April 17, 2018, 11:12:20 am
content: Its impressive, but its also sad, because it could just as well be running on an emulated 4004 in the PIC, and you'd need a scope to see the difference. If you don't limit the scope of the PIC to emulating a single MCS-4 part no. IMHO you loose most of the ultra-vintage retro flavour. I'd personally prefer to see a real hardware interface to something like a MCM6288P 16 Kword x4 bit SRAM, with battery backup and write protection on part of it, with the PIC restricted to memory loading (as only a really rabid enthusiast with money to burn would even consider designing and getting custom mask ROM equivalents manufactured by MOSIS) . Ideally, once code is loaded the result would still run with the PIC removed.Back to my horrible MOSFET kludge - here's the waveforms of it translating a 715KHz signal down to CMOS levels, which is then delayed 250ns so the waveform edges don't overlap and translated back up to 4004 levels through the same circuit. There's a total of 250pF of capacitance on the bus - 50pF on the 4004 side and 200pF on the CMOS side - which in combination with my approximations for the 4004 data pin drive circuit and a 74HC output, is why the edges are so sloped.4004 at the top is the original waveform, CMOS in the bottom pane is the result, then CMOS and 4004 back at the top for the reverse translation. Supply rails shown in red and blue, and thresholds shown in cyan and magenta.

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 02:58:20 pm
content: Quote from: Ian.M on April 17, 2018, 11:12:20 amI certainly see exactly where you're coming from, it was something that crossed my mind too. Either way, its real world use is questionable however you do it. ISTR I saw a Nixie clock with a 4004, I guess that's a reasonable use case. And, of course, a calculator, its original raison d'etre. I'm doing it for the challenge, maybe I'll do a small FPGA or CPLD in the future.

author: Howardlong
author_rank: Super Contributor
timestamp: April 17, 2018, 03:56:35 pm
content: Quote from: FrankBuss on April 17, 2018, 08:07:22 amHmm, my LM339 comparators don't seem to be behaving like yours. I achieve a similar rising edge, about 75ns propagation delay with 35ns rise time (open collector, 1k pullup to 5V), but the falling edge is about ten times that, 700ns to start falling and about a 150ns fall time. Voltage in is a square wave 0 to 15V. I'm using a 10k/22k potential divider for the reference, so 10V is the crossover.This is your scope trace of the 339:Here are mine (sorry, on two traces):

author: David Hess
author_rank: Super Contributor
timestamp: April 17, 2018, 04:04:36 pm
content: Quote from: woodchips on April 16, 2018, 05:05:11 pmI think some of the 4004 signal lines are bidirectional so you have to be able to tri-state the drivers. Some RS-232 chips support this but not in a useful way because it is intended as a power saving measure. And while the 4004 is slow, I don't think it is RS-232 slow; the RS-232 specifications include a slew rate limit.There *are* old integrated high voltage tri-state drivers which could be used for this, Signetics made some, but using an old long out of production level shifter is hardly an ideal when one wants to avoid using the 4004 support chips for the same reason.I think the idea here is to find a simple modern integrated solution. A discrete implementation would absolutely work, the mentioned Signetics level shifters could be used as a model, but it could take up as much space as the entire rest of the circuit.Quote from: Howardlong on April 16, 2018, 01:21:57 pmI have seen zener diodes used for this sort of level shifting before but not when tri-state operation was required. To maintain high frequency performance, the zener diode can be bypassed with a capacitor.I looked through an incomplete 4004 datasheet and was not clear on exactly what the input and output voltage levels and drive currents are. I got the feeling that the low levels are rather poorly defined.

author: FrankBuss
author_rank: Unknown
timestamp: April 18, 2018, 10:27:57 am
content: See the link to the schematic on my webpage. Vdd (pin 12) is connected to GND and Vss (pin 15) to 15 V.Falling edge of the LM339 should be faster. Did you power it from the 15 V?And right, the PIC16 is slow, can't run the 4004 with it at full speed. I would probably just use some of the modern ARM microcontrollers nowadays. I think there was a lower limit for the clock frequency when I tested it, when the 4004 didn't respond right, but it was way lower than specified in the datasheet.

author: Howardlong
author_rank: Super Contributor
timestamp: April 18, 2018, 10:54:21 am
content: Quote from: FrankBuss on April 18, 2018, 10:27:57 amYes, that’s exactly how it’s set up, curious! This slow respinse time is precisely why I discounted using comparators at first.I’ve ordered some TLC374 which have ~ 200ns response times, I’ll see how I get on with them.

author: Howardlong
author_rank: Super Contributor
timestamp: April 18, 2018, 06:20:27 pm
content: Well the TLC374 were worse than the LM339, I've manged to improve the LM339, it looks like I had a crappy connection on the breadboard, I have it down to 250ns falling and 135ns rising response times which is OK for now, but I may look at this another time.I'm using a PIC16F18875 which I had in stock instead of the PIC16F887, there were a few minor tweaks to port it but nothing too hard, just changes to the ANSEL registers, the timer and the config bits.I'll look into increasing the speed with a different processor.Very nice David Hess!

author: David Hess
author_rank: Super Contributor
timestamp: April 19, 2018, 03:16:53 pm
content: Quote from: Howardlong on April 18, 2018, 06:20:27 pmDifferential line receivers which can be found in quads make good fast comparators for level translation applications.

author: Howardlong
author_rank: Super Contributor
timestamp: April 20, 2018, 09:01:48 am
content: Quote from: David Hess on April 19, 2018, 03:16:53 pmI stongly suspect that the LM339s will be good enough at full speed, now I’ve gained some practical understanding and experience of the timings.I have a dsPIC33EV256GM002 testing now which I am fairly confident will successfully run at the full 4004 clock speed.This uses a slightly different methodology, I am generating the phi1 and phi2 from two output compares, and selectively interrupting preemptively phase 0 and phase 2 based on cycle count, using two other output compares, all using the same timebase.Although it’s a 70MHz part, the interrupt latency (about 200ns) on the dsPIC33EV has proven unexpectedly bad compared to other Microchip 16 bitters, plus there is additional cycle overhead accessing non-CPU SFRs on this device in bit operations, I am not sure why the architecture is so dramatically different, typical hardware latency on other 16 bitters is 5 op cycles, it’s 14 on the dsPIC33EV. On the plus side it offers full alternate working register automatic context saving, so there’s no time spent doing software context saving. Due to the long interrupt latency, I am having to preemptively fire off the interrupts early.Irrespective, this leaves about 60% of the time inside the main superloop, so plenty of time to service LCDs etc, although due to the reduced pin count I’m having to use I2C.

author: FrankBuss
author_rank: Unknown
timestamp: April 21, 2018, 09:01:35 am
content: Maybe an ARM microcontroller would be faster. A STM32F446 can run with 180 MHz andARM says that interrupt latency is 16 cycles. This would be only 89 ns latency. I guess in a real microcontroller it is longer, because of flash wait cycles etc. And additional problems can be interrupt jitter, even if you fire them preemptively. But might be no problem for the max 740 kHz clock of the 4004.If you want to do it perfect, I would recommend using a FPGA. You can clock it easily with 100 MHz and latency would be 1 cycle, so 10 ns, with no jitter (well, at least less than one cycle). But probably overkill for the application.Another interesting architecture is the PRU unit of a BeagleBone. It runs with 200 MHz and has single cycle access to the GPIOs.

author: Howardlong
author_rank: Super Contributor
timestamp: April 21, 2018, 09:26:38 am
content: I did look at using PIC32, with the PIC32MX174F256B, it’s a 72MHz device but the latency due to software only context saving and other prologue/epilogue code, and no shadow registers, gave worse latency than the dsPIC33EV.. There’s also the issue of prefetch cache hit and the need for three wait states on flash on that device at 72MHz: with such frequent interrupts, you really can’t afford that degree of indeterminism.I do agree hat an FPGA is a more stylish solution, but equally I enjoy investigating tight real time solutions in software.