hybridfree/eevblog-posts huggingface dataset:
Recommended online videos for learning Verilog? - Page 1
Forum section: electronics / general

author: dansan
author_rank: Contributor
timestamp: October 14, 2016, 01:34:15 am
content: Hello,My background is in EE and CompSci, but unfortunately I never got around to learning any HDLs, and would like to learn Verilog. This is mostly for personal interest at this point. I was wondering if anyone could recommend any free online video series with high quality content for learning Verilog. This is what I've found so far that I like:Kirk Weedman - This is a series of video lectures from 2009 that I like the content of, but the audio and video quality problems are a little distracting.https://www.youtube.com/playlist?list=PL7rhOPtT9XotyLsvDPkYw_03RQp5ofQDBBruce Land - A Cornell series from 2011 that's very good, but am looking for a more systematic introduction to the language itself before continuing.https://www.youtube.com/playlist?list=PL2BA78454E71FF0E5EDA Playground - Some good walkthroughs, but not really a complete Verilog course.https://www.youtube.com/playlist?list=PLScWdLzHpkAfbPhzz1NKHDv2clv1SgsMoAny other recommendations are welcome.Thanks,Dan

author: dansan
author_rank: Contributor
timestamp: October 14, 2016, 02:43:44 am
content: Thank you for the response and recommendations, evb149. The MIT site has some excellent courseware pdfs here that I'll definitely be reading:https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-111-introductory-digital-systems-laboratory-spring-2006/I'll check out the Altera and Xilinx sites. I had stopped by the Altera site (I think) but it looked like it wanted to get a whole bunch of personal information from me before letting me see the courseware, so that turned me off. But if they have good material then it might be worth the trouble and spam.I should have mentioned originally that I had already searched the eevblog forums and found many good recommendations for books and websites, but I'm also a video kind of person, and find them useful for learning.

author: ebclr
author_rank: Super Contributor
timestamp: October 14, 2016, 05:59:57 am
content: I loved that eda palyground thankscheck alsohttp://www.doulos.com/knowhow/fpga/

author: ebclr
author_rank: Super Contributor
timestamp: October 14, 2016, 07:11:58 am
content: Another 2 interesting linkshttp://people.ece.cornell.edu/land/courses/ece5760/https://courses.cit.cornell.edu/ece576/FloatingPoint/index.html
MC34063A 10v to 20v 150ma converter - Page 1
Forum section: electronics / general

author: RayMonster
author_rank: Newbie
timestamp: October 14, 2016, 02:50:35 am
content: Hi!i have build a step up converter using the connection in the datasheet.The test with no load is able to produce a 10v input to 20v output, Which is great! And to check whether it is producing the desired output current of 150mA, abt 3w output, resistive loads were used.However after testing under loaded condition by using two 270ohms rated 2w each connected in parallel, the load shorted.i have also tried with two 100 ohms rated 10w which also shorted the load.I tried with 4.7k resistance load and it does work but i am unable to tell whether the circuit can produce 150ma from this load.May i know what other options can i try to test for the current?The used componenents areL: 180uhCo: 220uFrsc:0.5ohmsr1:10k r2 150kCt: 470pFDiode: 1N5819

author: mariush
author_rank: Super Contributor
timestamp: October 14, 2016, 03:15:26 am
content: It looks like you calculated everything using a low frequency. you should redo all formulas aiming for a higher frequency.Download MC34063 universal calculator and play around with the numbers, it will tell you what works :https://sourceforge.net/projects/mc34063uc/Here's an example, with a proper genuine MC34063 you can aim for up to 100khz frequecy, which means smaller inductors... in the example below you can put 4 x 1ohm in parallel for the Rsc giving you ~ 0.25 ohm (which is close enough to 0.27 ohm), you can choose the next standard inductor in value (for example 68uH in our example, but it's important to be capable of the Ipeak current) and all the other values are standard and common. The output capacitor should be chosen a bit higher than minimum recommended (150uF in example) and should have ESR lower or equal to calculated one.. in your case you should go with a 330-470uF 25v rated electrolytic or higher.
SAM D21 Bare Code - Port Pins - Page 1
Forum section: electronics / general

author: Franc
author_rank: Regular Contributor
timestamp: October 12, 2016, 10:31:36 pm
content: Hi all, how are you. I started with ARM some weeks ago.I want to control a High Speed DAC 5447 with my Sam D21 (parallel interface).How I can create a PORT Pin for 12 bits only. I know in PIC is easy, I just need to write to PORTB for example but in Sam I have muxers.If I declare a Pin mask as below is correct?#define DAC_MASK_12Bit (1u << PB00 | 1u << PB01 | 1u << PB02 | 1u << PB03... ) //on Port B, all PBXX defined in board_confi.hSo, I just need to atribute data to my DAC_MASK_12bit. I really want to create a Drive to control this DAC as it is high speed.I also have the R/W, CS , A/B.Regards

author: ataradov
author_rank: Super Contributor
timestamp: October 12, 2016, 11:05:03 pm
content: I'm not sure I fully understand what you want to do, but if you just want to set some value to the lower 12 bits of the port B, then some thing like this will work:Code:PORT->Group.OUT.reg = (PORT->Group.OUT.reg & 0xfffff000) | value;If you want to optimize this a bit, then cache the value of PORT->Group.OUT.reg into a local variable:Code:uint32_t port_b_out_value = 0; // initial value...port_b_out_value = (port_b_out_value & 0xfffff000) | value;PORT->Group.OUT.reg = port_b_out_value;You obviously will have to update port_b_out_value on all writes to PORT->Group.For manipulating individual bits (R/W, CS, A/B), PORT->Group.OUTSET.reg and PORT->Group.OUTCLR.reg may be a better fit.Ans you can't just create a virtual sub-port of only 12-bit. I doubt you can do that with PIC either.
PIC chip bootloader problem - Page 1
Forum section: electronics / general

author: VK3DRB
author_rank: Super Contributor
timestamp: October 13, 2016, 02:39:58 am
content: Hi.I am writing bootloader for the PIC 16F1947 written in C. I have never written a bootloader for the PIC chip. The challenge here is getting the bootloader to changing the instruction pointer to point to a new section of flash. I plan to put the bootloader in upper section of flash, and the application is compiled as per normal with no code offset. Or I can have the bootloader near the start and compile the application to run form a higher section of flash. Does anyone have experience how to do a far jump in C for the PIC mid range, so the bootloader can switch to the application? I am having troubles with the XC8 compiler using in-line assembly code. And the debugger is pretty crappy, using a PICkit/3.Maybe I should go back to the old MPLAB 8 with the Hi-tech C compiler.Any suggestions so I can get started? are there any boot loaders off-the-shelf for the 16F1947?Thanks!

author: VK3DRB
author_rank: Super Contributor
timestamp: October 13, 2016, 07:16:45 am
content: MCC's code generator for the bootloader is seriously stuffed. I cannot get it working and I don't know if anyone else can. I think the easiest is to write my own.Maybe all I need is how to do a longjump in C to an absolute address (the PIC16f1947 Hi-tech C compiler does not support this), or in inline assembly code - either using the crappy XC8 under MPLAB X bloatware, or better still under the old MPLAB 8.x with Hi-Tech C.Its a bloody dogs breakfast. I wish I had used Atmel.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 13, 2016, 08:29:45 am
content: On XC8 it's pretty straightforward but you do need to work round some quirks.Compile your main code with the codeoffset linker setting as required.Here's an example of the vectors in my bootloader for an 16F1823 - this only enters the bootloader on a power-on reset. (One option to enter your main code is to just force a watchdog reset)void bootvecs(void) @0x00{#asmbtfss 3,4 // status, /TOgoto 0x200 // watchdog timeout - go to app codegoto _mainnopMOVLP 2goto 0x204 // int code fixup#endasm}The only issue is forcing the compiler to put the code where you want it - you need to check the assembler listing, as it sometimes ignores the @xxx directive.You need to put the snippet above as the first procedure in the source file, otherwise it will put other code there and ignore the @ directiveYou also need to put a call to the code to prevent the compiler from optimising it out - just set up a call that the compiler can't figure out will never get called.e.g.void main(void) @0x08{..your bootloader} while(1);bootvecs(); // force inclusion of bootvecs - optimised out otherwise}One thing I've never managed to achieve for various obscure reasons is have the main code and bootloader in the same source project. One issue is the @ operator overrides codeoffset but it can get itself confused.
STM32 FSMC/FMC and DS90CR285 - Page 1
Forum section: electronics / general

author: kefir
author_rank: Newbie
timestamp: October 12, 2016, 11:37:24 am
content: Greetings fellow engineers!Before you type something like "use FPGA" let me tell you: I understand that, but...I need to quickly put together a prototype that will relay DCMI data (small resolution camera sensor) to DS90CR285. Here performance doesn't matter that much - later it will be deployed on an FPGA anyway. However before that I wanted to fiddle around with this LVDS driver.So here is my question... In your opinion is it possible to use FSMC/FMC hardware inside STM32F4 series chips to drive DS90CR285 or is it a complete waste of time?The way I see it - the chip can be treated as an LCD display with some customisations on the way.Thanks in advance, have a nice day!DS90CR285 datasheetSTM32F427 datasheet

author: bktemp
author_rank: Super Contributor
timestamp: October 12, 2016, 11:59:27 am
content: I do not fully understand what you are trying to do (camera via DCMI into STM32, processed data via FMC into DS90CR285?)The LVDS serializer needs a constant input clock of at least 20MHz with low jitter. So connecting it to an asynchronouse memory interface, using WR as transmit clock will not work. You need to use a fixed clock for strobing the data (maybe you can use the synchronous memory interface). As long as the clock is constant (or only slowly changing), you can put any data into the serializer.If you want to stream image data, why don't you use the build in LCD controller?

author: kefir
author_rank: Newbie
timestamp: October 12, 2016, 12:33:03 pm
content: Quote from: bktemp on October 12, 2016, 11:59:27 amBasically - yes I need to grab image and send it via DS90CR285 to comply with Camera Link protocol in Base configuration.Quote from: bktemp on October 12, 2016, 11:59:27 amThat's a good suggestion - I'll look into it, thanks.However the LCD controller provides 24-bit transfers and I only require 12-bit.

author: bktemp
author_rank: Super Contributor
timestamp: October 12, 2016, 01:00:46 pm
content: Quote from: kefir on October 12, 2016, 12:33:03 pmThe LVDS transmitter will always send 28bits, so it doesn't care if you use only 8, 12, 16, 24 or the full 28bit.If you want to save memory and pins you can set the LCD controller output and the framebuffer colour format to 16bpp.
Multiple i2c devices that have their own pull ups. - Page 1
Forum section: electronics / general

author: Dan Moos
author_rank: Frequent Contributor
timestamp: October 10, 2016, 03:26:48 am
content: Say I want to use a bunch (6 or more) LCDs with those i2c backpacks that are pretty common. The back packs have their own pull ups. I imagine this puts a limit on how many of these devices I can have on one bus before the parallel resistance of all the pull ups becomes too small. I haven't actually looked to see what value pull ups are on the things.For my idea to work, do I need to ditch the backpacks, and just get the individual expander chips?

author: Mr.B
author_rank: Unknown
timestamp: October 10, 2016, 03:29:30 am
content: Perhaps desolder the pullups on all and add the pullups at your MCU.Typical value is 4K7 but it can vary a bit.Edit: Forgot to say... 6 backpacks? Do they support 6 different I2C addresses...?

author: Dan Moos
author_rank: Frequent Contributor
timestamp: October 10, 2016, 03:39:19 am
content: The pins for setting addresses are brought out on pads. You don't get the full range of addresses that are possible though. I think it's more than six, but I can't remember how many address pins are available. It's definitely a possible limiting factor on my plan.EDIT: three address pins. My math says five combinations. So much for six screens!

author: Mr.B
author_rank: Unknown
timestamp: October 10, 2016, 03:48:46 am
content: 3 bit address.My math says 8 addresses.Thats not to say the device supports all 8.URL for spec sheet?Photo?

author: Mr.B
author_rank: Unknown
timestamp: October 10, 2016, 03:52:11 am
content: Depending upon the device it could be a lot more than 8 - although unlikely for an LCD.Some devices these days are using a sort of tri-state address pin combination.e.g. one pin supports three addresses - High, Low and Floating.

author: Dan Moos
author_rank: Frequent Contributor
timestamp: October 10, 2016, 05:20:37 am
content: Yer right, three makes eight.Pretty sure no tri state. The chip is a pcf8574. The board brings the address pins out on pads. There are also three corresponding pads that are go to either pull ups, or pull downs (can't remember as I sit away from the lab) so you can conveniently bridge different combos to get the address you want. I would assume having low/high/tri state would require a more elaborate setup.

author: Mr.B
author_rank: Unknown
timestamp: October 10, 2016, 06:15:37 am
content: One last piece of advice...Six devices on an I2C bus can be problematic.Keep your bus lengths as short as possible.

author: Neilm
author_rank: Super Contributor
timestamp: October 10, 2016, 06:48:23 pm
content: Quote from: Mr.B on October 10, 2016, 06:15:37 amJust make sure that your rise times are in spec for the chips - this might mean putting the pull up resistors somewhere you didn't didn't expect to. I have had five on a bus that was about 1m long. Fortunately, it went over several boards, so the one in the middle ended up with the pull up resistors.
Digital Panel Meter doesnt work with a power supply. - Page 1
Forum section: electronics / general

author: msngupta
author_rank: Contributor
timestamp: October 10, 2016, 04:46:24 am
content: Hi,I am using a Digital Panel meter (http://www.vellemanusa.com/products/view/?country=us&lang=enu&id=350724) which requires 9V supply, and an input voltage whose value is displayed (connections: V+, V-, 9V+, 9V_GND). The source of the input voltage is from my circuit which is powered using a linear power supply. The panel meter shows the correct reading when I power the panel meter using a 9V battery, but when I connect it to the power supply with 9V(variable power supply which is independent of my circuit) the panel meter starts showing crazy values which doesn't correspond to my input voltage. What is the difference between the power supply and the battery? How is it not working with an independent supply ?The power supply is a variable voltage supply which I am operating in CV mode and which is independent from my rest of the circuit.Things I have tried but failed:1) I connected both V- and 9V_GND, still the problem persists.2) Added a series resistance(100ohm, 1K, 10K, 1M) between supply and the panel meter to limit current but didn't solve the problem.3) Even added a parallel resistor (shunt) but no effect.4) Connecting/Disconnecting V- and 9V_GND not effect5) I even tried to use the power from the supply which powers my rest of the circuit, but no luckSo, why is it working with a 9V battery but not the supply ?Can anyone give me suggestions on whats going wrong here ?Thanks in advance,Sainath.

author: electr_peter
author_rank: Unknown
timestamp: October 10, 2016, 05:07:22 pm
content: Hi,Problem could be that power source for panel meter is not completely isolated. Problems with panel meters that require isolated power were discussed on this forumi-keep-on-blowing-up-panel-meters!Can you describe circuit, circuit power and all connections a bit better or add a schematic? You should check that power supplies are completely isolated (not earth referenced), especially for panel meter.Another problem could be that variable power supply is very noisy or has high leakage current to earth (which causes common mode current). What variable supply do you use? Is it properly grounded?

author: Andy Watson
author_rank: Super Contributor
timestamp: October 10, 2016, 05:30:38 pm
content: The inputs V+ and V- need to be within the common mode range of the meter. A battery is an ideal floating supply - anything else will probably have sufficient leakage to drag the V+ V- inputs outside of the meter's common mode range.These meters are very likely to be based on the 7106 - have a look at these datasheets:http://www.intersil.com/content/dam/intersil/documents/icl7/icl7106-07-07s.pdfhttp://www.intersil.com/content/dam/intersil/documents/an96/an9609.pdf
Qualcomm wants to buy NXP? - Page 1
Forum section: electronics / general

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: October 05, 2016, 03:08:47 pm
content: Is it true? what's happening in this year!?

author: Sal Ammoniac
author_rank: Super Contributor
timestamp: October 05, 2016, 04:08:21 pm
content: Noooooooooooooooooooooo!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

author: JPortici
author_rank: Super Contributor
timestamp: October 05, 2016, 04:51:10 pm
content: >>>> in the general section

author: Jeroen3
author_rank: Super Contributor
timestamp: October 08, 2016, 08:20:43 pm
content: There is already a topic.https://www.eevblog.com/forum/chat/qualcomm-wants-to-buy-nxp/msg1037758/#msg1037758
MSP430G2231 launchpad - Page 1
Forum section: electronics / general

author: dannyf
author_rank: Super Contributor
timestamp: October 07, 2016, 11:30:16 pm
content: The typical MSP430G launchpad from TI is powered by either MSP430G2553 or MSP430G2452, per TI user guide:http://www.ti.com/lit/ug/slau318g/slau318g.pdfWell, I was given a brand new MSP430G launchpad today, in sealed box and the board itself in a sealed anti-static bag. It contains a MSP430G2231! Everything else seems to be identical to the G2553/2452 launchpad.Took me a while to figure that out, as the marking on the chip isn't that visible.So next time you cannot flash your launchpad, check out the MCU.BTW, I could find no reference of this G2231-based launchpad. so maybe what I have is one of a kind?

author: Monkeh
author_rank: Super Contributor
timestamp: October 07, 2016, 11:44:47 pm
content: Congratulations, you've encountered one of the older units!It should say Rev1.4 or less on the PCB.

author: dannyf
author_rank: Super Contributor
timestamp: October 08, 2016, 11:16:09 am
content: thanks for the background info.this thing is made in 2011, if the print on the box is accurate.it has this oddity that if it is plug'd through a usb hub, it wouldn't work. then plug'd directly to the computer, it works like a charm.the chip itself is fairly limited, but has a dma channel for adc.
hobby or grad student MSP430G* design - Page 1
Forum section: electronics / general

author: electrolust
author_rank: Unknown
timestamp: October 07, 2016, 09:26:10 pm
content: I've been getting a little bit deep into MSP430G* development. It has occured to me that these chips are so low featured and with such small instruction set (RISC), certainly nothing sophisticated like branch prediction, etc, that a hobby level or grad student guy could completely design the chip and maybe implement it in an FPGA.I'm sure there's power optimization and other aspects like that which start to get complicated and belie the otherwise simple seeming design, which would in fact need quite a lot of experience to do anything close to what TI has done, so what I really mean is that it's within the realm of a hobbyist to take a first (but working) cut at it.Comments?

author: coppice
author_rank: Super Contributor
timestamp: October 07, 2016, 10:06:52 pm
content: The CPU core is a very small part of an MCU, and the MSP430 core is an especially compact and simple one. I think you might even find existing open source VHDL or verilog for an emulation of the original MSP430 core from the 1xx, 3xx and 4xx devices.

author: electrolust
author_rank: Unknown
timestamp: October 07, 2016, 10:13:49 pm
content: Good point about the CPU core. Perhaps some of the peripherals would be a bit complicated. 12bit ADC and other such stuff.

author: hans
author_rank: Super Contributor
timestamp: October 07, 2016, 10:18:30 pm
content: I remember seeing these 2 projects on opencores:http://opencores.org/project,openmsp430http://opencores.org/project,neo430Not sure if they work or how much work you need to invest to get them going reliably. But it could be an interesting option.In the end a CPU is a device that runs code. Some FPGA projects benefit from a soft core CPU, so if you have a compact & performant one that helps. You do need to write your own peripherals, and of course not all can be emulated (like oscillators, sleep, and FLASH memory), but certainly you could take existing peripheral designs and emulate those, 'improve them' or make up your own.

author: westfw
author_rank: Super Contributor
timestamp: October 08, 2016, 10:34:38 am
content: An MSP430 would generally not be considered "RISC" - variable length, variable time instructions. Even memory to memory operations...
CSM & ECSL modules on  TI concerto family(F28M35) - Page 1
Forum section: electronics / general

author: dizgah
author_rank: Regular Contributor
timestamp: September 27, 2016, 04:36:46 am
content: Hi every oneIs there any one here with experiences in TI concerto series?IN this family there is a security features called CSM & ECSL which protect codes stored in the secure memories from unauthorized access & reverse engineering(Dumping source code) ,As CSM(code security module ) is present to protect these memories ,actually whats function of ECSL?Also is there any complete reference manual from this securing process? when we used and protect secure memory,how CPU is able to execute it's hode ?how this affect to cortex m3 or c28 processor ?With best regards.

author: rsjsouza
author_rank: Super Contributor
timestamp: October 05, 2016, 11:39:45 am
content: I couldn't find a complete reference, but ECSL stands for the Emulation Code Secure Logic - i.e., when stepping through code on a protected device, it will not simply show an error or all zeros (like a regular CSM-protected device does) but instead disconnect the emulator altogether. AFAIK the ECSL cannot be selectively disabled - i.e., a protected device will always have this enabled.

author: dizgah
author_rank: Regular Contributor
timestamp: October 08, 2016, 05:56:07 am
content: thanks for your reply,Can you explain more please?do you mean ECSL disable emulation on a secured device ?or is there any complete reference document about these security issue on TI MCU products?
68HC05C8FN Help - Page 1
Forum section: electronics / general

author: Glenn-WB4UIV
author_rank: Newbie
timestamp: October 07, 2016, 03:41:07 am
content: I am trying to find a bug in the firmware of a radio.The radio uses a 68HC05 that was mask programmed.There are also house programmed OTO 68HC05 chip that were used.This radio is out of support so there should be no major legal issues.I need to get past the security bit, that has been set.The Motorola data sheet for this MPU implies that, with enough nda's they will tell you how to get past the security bit.Can anyone shed some light on how to get the firmware from one of these chips?Motorola no longer makes this chip.Any help in getting past the security bit greatly appreciated/Glenn-WB4UIV

author: stj
author_rank: Super Contributor
timestamp: October 07, 2016, 04:16:40 am
content: ask here:http://forums.bannister.org/ubbthreads.php?ubb=postlist&Board=1&page=1there are a bunch of guys dumping protected 70's and 80's mcu's regularly.

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: October 08, 2016, 12:32:52 am
content: Which radio, and what is the bug?Exactly which version(s) of the 68HC05 do you have access to? Are you willing to risk destroying one to get the firmware out of it?QuoteIf I was a customer relying on that security I would be pissed. So anyone with enough NDAs could hack into my chips? (or worse, tell others how to do it).

author: stj
author_rank: Super Contributor
timestamp: October 08, 2016, 12:53:34 am
content: there are lots of HC05's,a few have never been broken, but some are worthless security-wise.and dont trust HC905 etc.they are used in car dashboards, you should see the programmers and tools you can buy to dump them - a few wires and your in - serial port debug!!
Cascaded shiftregisters VS separate slave-slelect - Page 1
Forum section: electronics / general

author: suku
author_rank: Contributor
timestamp: October 06, 2016, 11:25:25 am
content: I'm designing a circuit with simple I/O extension using 74 series shiftregisters connected to the micro via SPI. Is it better to cascade them and pull all the data in at once, or to give them all their separate slave select (GATE) signals and only shift in the particular data that I'm interested in?(I know both of them have advantages and disadvantages, I guess my question is which technique is more common?)

author: nctnico
author_rank: Super Contributor
timestamp: October 06, 2016, 11:44:03 am
content: I always cascade them because slave select lines tend to be long and thus inconvenient to route on a board.

author: David Hess
author_rank: Super Contributor
timestamp: October 06, 2016, 08:49:28 pm
content: Which way is better just depends on layout and design considerations. If you have a lot of shift registers in series, then eventually you can exceed the fanout of the clock, chip select, and latch signals. You may want to read separate shift register strings in parallel for extra speed. Or maybe you want a separate set of shift registers for galvanically isolation, low noise, or time critical I/O.

author: Ian.M
author_rank: Super Contributor
timestamp: October 06, 2016, 09:34:35 pm
content: Daisy-chain (cascade) them in meaningful groups. I am not aware of any 74xx series PISO shift registers with tristatable or open collector/drain shift out pins so you will need extra logic to parallel them.
Hassle free programmer for Atmel AVR - Fed up with AVR ISP Mk-II - Page 1
Forum section: electronics / general

author: spacejunkie
author_rank: Newbie
timestamp: October 13, 2016, 10:41:13 am
content: I have an original AVR ISP Mk-II bought from Element-14. It is running the latest firmware from Atmel.It fails to be detected by Atmel Studio VERY often. It usually works the first time after reboot if I follow a ritual (connecting the programmer to a powered up target board and then connecting the USB cable after a few seconds). I have followed all the troubleshooting tips provided on Atmel's site as well as on various forums. They don't help.I think I am wasting my time with a poorly built tool. Is there a good reliable drop-in alternative? I would like it to work with Atmel tools and other IDEs. Maybe something that pretends to be AVR ISP Mk-II but works flawlessly.I am using Windows 7 64 bit. The programmer should support Windows 10 too.

author: technix
author_rank: Super Contributor
timestamp: October 13, 2016, 12:34:13 pm
content: So far my AVR ISP mkII clone gave me no issues. I am using Windows 10 Pro amd64 on a Gigabyte GA-Z97M-D3H motherboard with a (slightly) overclocked Intel Xeon E3-1231v3 processor. If you are seeking replacing the ISP you might as well upgrade to the Atmel ICE (no issue on my computer too) which can not only program but also debug your MCU. And if you don't mind spending the time you can create a serial bootloader that speaks STK500v2, so you can skip the ISP entirely except on a fresh board.
Ethernet Implementation Project - Page 1
Forum section: electronics / general

author: shaunm
author_rank: Newbie
timestamp: October 04, 2016, 10:42:57 am
content: Hi Everyone,My name is Shaun and I'm currently in my final year of an engineering course. Part of any final year is an fyp or final year project (dissertation... whatever you want to call it). Anyway my subject is on the implementation of video transmission using 10G Ethernet (FYI Artix-7). After my own research as well as a few meeting with some University lecturers we have come to the conclusion that the best way to start is from the bottom up... that is comparing the OSI model with what is to be done and starting from the physical layer. Now, at the physical layer I know that Ethernet implements PMA/PCS (IEEE standard). My question is what's next, I'm stuck, is there any VHDL code that I can have a look at or can I just jump to the implementation of MAC since PMA/PCS is already found in an IP core. And if I should jump straight into MAC, what would be a good starting point?Any help would be greatly appreciated... I'm still way ahead of schedule for this project so no worries.

author: dmills
author_rank: Super Contributor
timestamp: October 04, 2016, 11:27:48 am
content: IIRC xilinx have a SMPTE 2022-6 core as a stock part of the vivado library, and they have an IP core for 10G-E.https://www.xilinx.com/products/intellectual-property/ef-di-smpte2022-56.htmlI would start here, as SDI to and from 2022-6 should be straightforward, at least for a SDI-3G stream, 12G may be more interesting mostly because getting the serdes to meet timing gets fun up there.Regards, Dan.

author: Scrts
author_rank: Frequent Contributor
timestamp: October 04, 2016, 01:52:03 pm
content: I only did a compressed stream over UDP packets, but in general yes - you begin at MAC level forming the packets from there. You add the IP header, UDP header and the rest of the data.
IP for ZYNQ7000 - Page 1
Forum section: electronics / general

author: gauravmp
author_rank: Regular Contributor
timestamp: June 09, 2016, 03:35:51 pm
content: Hi,I know that an IP called PLLE2_BASE exists for Zynq 7000 as described in one of their user guides but I can't find it under IP catalog in Vivado. Does someone know where I can find it where I can download it from?Any help would be appreciated.Thanks

author: hamster_nz
author_rank: Super Contributor
timestamp: June 09, 2016, 07:23:59 pm
content: I am pretty sure that is a primitive, and not an IP component. (I.e. it is one of the basic building blocks on the FPGA).If you create an IP block with the Clocking Wizard it will most likely have a PLL include d in its internals somewhere.

author: erickrieg
author_rank: Newbie
timestamp: October 02, 2016, 08:14:51 pm
content: I recently loaded the most recent of everything related to Zynq development and I find no such file. I've found the Zynq board frustrating - they obviously put a lot into making the tools and obviously didn't want for it to be so difficult to get started. But as a windows user of it - i have difficulty at every turn using it and also found times where in the manual it tells you to just use something . . . that doesn't exist. People who are not already working on a linux machine and real experienced at embedded linux tools and development should not attempt this platform

author: legacy
author_rank: Super Contributor
timestamp: October 02, 2016, 10:54:39 pm
content: exactly, what is missing ?

author: hamster_nz
author_rank: Super Contributor
timestamp: October 03, 2016, 04:03:40 am
content: Quote from: legacy on October 02, 2016, 10:54:39 pmVivado development is moving quite quick (for EDA tools), and every time I update it some things go missing or new options appear.If you try an old walk-through with the latest Vivado release it is very likely that things will go bad......not that bad that you can't do it, but a bit like "using an Excel tutorial for OpenOffice Calc" sort of bad. The flow is much the same, but the names and locations change :-)

author: rstofer
author_rank: Super Contributor
timestamp: October 03, 2016, 04:49:59 am
content: It's a primitive see page 68http://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdfSee page 317 et seq:http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_2/ug953-vivado-7series-libraries.pdf
Two Arduinos become one - Page 1
Forum section: electronics / general

author: HackedFridgeMagnet
author_rank: Super Contributor
timestamp: October 02, 2016, 01:05:49 am
content: https://blog.arduino.cc/2016/10/01/two-arduinos-become-one-2/Apparently they have resolved their differences.That is lucky, I could never remember who were the goodies and baddies anyway.http://hackaday.com/2016/10/01/arduino-vs-arduino-arduino-won/Some of the hackaday comments are funny.Link to split thread.https://www.eevblog.com/forum/microcontrollers/arduino-vs-arduino/

author: Monkeh
author_rank: Super Contributor
timestamp: October 02, 2016, 01:19:00 am
content: Give them another few years, someone will decide they don't make enough of the money and it'll start again.

author: ataradov
author_rank: Super Contributor
timestamp: October 02, 2016, 01:42:58 am
content: Quote from: Monkeh on October 02, 2016, 01:19:00 amMy thought exactly. Both sides see negative influence of the split, but I doubt they actually resolved any differences. This is pure business and as soon as one party figures a new way to screw the other over, it will happen all over again.Also, forming holdings and foundations is a clear sign of bureaucracy.

author: hamster_nz
author_rank: Super Contributor
timestamp: October 03, 2016, 04:07:42 am
content: Quote from: ataradov on October 02, 2016, 01:42:58 amIt's like "We must be united against the common Open Source Hardware enemy!" (Monty Python reference).
Loongson makes a 64-bit Mips processor that runs x86 and ARM code - Page 1
Forum section: electronics / general

author: legacy
author_rank: Super Contributor
timestamp: October 01, 2016, 05:16:51 pm
content: so,hereit is an interesting article that I came across

author: ataradov
author_rank: Super Contributor
timestamp: October 01, 2016, 06:36:39 pm
content: Quote from: legacy on October 01, 2016, 05:16:51 pmThey overdid Russian Elbrus 2000, which just runs x86 (in addition to its native instruction set).It also look like it is not a native execution, but a run-time binary translation, same as Elbrus.

author: legacy
author_rank: Super Contributor
timestamp: October 02, 2016, 11:27:33 am
content: Quote from: ataradov on October 01, 2016, 06:36:39 pmI don't know Elbrus, I was thinking that probably they added some instructionsthat helps the emulation of x86 and armand I was wondering if it comes from some technology made by IBM(Lenovo-china is ~IBM, ain't it?)

author: elgonzo
author_rank: Unknown
timestamp: October 02, 2016, 11:51:34 am
content: Quote from: legacy on October 02, 2016, 11:27:33 amLenovo bought IBM's PC and later System X server business. Do not confuse this with CPU design+manufacturing.
1 Million endurance Flash chip - Page 1
Forum section: electronics / general

author: jtronix
author_rank: Regular Contributor
timestamp: October 04, 2016, 04:03:04 pm
content: Hello,can anyone suggest flash device which has high erase/program endurance about 1 million or greater??

author: tszaboo
author_rank: Super Contributor
timestamp: October 04, 2016, 04:13:48 pm
content: It is a flash chip, which is ~1000 times larger than the actual size used, and it has proper wear leveling. You will not get 1 million from an EEPROM reliably (*empirical evidence by some hacker does not count), yet alone flash. You might consider FRAM, battery backed SRAM, "cloud storage", and maybe MRAM (if you can buy it).

author: Sal Ammoniac
author_rank: Super Contributor
timestamp: October 04, 2016, 04:14:51 pm
content: What capacity do you need? FRAM has endurance of 10^15 writes and is much faster than flash, but isn't available in large sizes (yet).

author: jtronix
author_rank: Regular Contributor
timestamp: October 04, 2016, 04:33:37 pm
content: FRAM is too costly compared to any flash device in the market..In application note of cypress,microchip and other flash manufacture i saw they have mention endurance from 100000 to 1000000 depending on flash technology so i though it would be better if get high endurance flash chip.basically I'm looking for NOR or NAND flash.

author: Sal Ammoniac
author_rank: Super Contributor
timestamp: October 04, 2016, 04:38:11 pm
content: Quote from: jtronix on October 04, 2016, 04:33:37 pmMore information would be helpful, like how much capacity you need and what your budget is...

author: uer166
author_rank: Super Contributor
timestamp: October 05, 2016, 12:05:27 am
content: ST EEPROMs have 4 million write cycles, e.g. M24M01-RMN6TP (http://www.digikey.com/product-detail/en/stmicroelectronics/M24M01-RMN6TP/497-6351-1-ND/1827929).They're in the hundreds of KBs capacity range.

author: dannyf
author_rank: Super Contributor
timestamp: October 05, 2016, 12:17:42 am
content: Quotetoday's SSD has a guaranteed endurance of 1000 writes. So coupled it with leveling + 1000x of your desired capacity, you have a 1 million endurance flash chip.

author: amyk
author_rank: Super Contributor
timestamp: October 05, 2016, 02:38:04 am
content: Microchip has some serial EEPROMs with 10M endurance and ">100 year" data retention.

author: ebclr
author_rank: Super Contributor
timestamp: October 05, 2016, 04:15:05 am
content: ? High-endurance 100 trillion (1014) read/writes? 151-year data retentionhttp://www.cypress.com/file/209146/download
PIC18Fxx39 using Table Read Post Inc  programming command(Solved) - Page 1
Forum section: electronics / general

author: SuzyC
author_rank: Frequent Contributor
timestamp: September 30, 2016, 03:36:45 am
content: When verifying a program, the TABLE READ POST INCREMENT automatically increments the Table Pointer to the next byte address to be read.Question: This command increments TablePointer Low. When this command is repeated until the increment reaches 256, does the TablePointerLow roll-over back to 0 and a carry propagate to increment TablePointer High?Thanks in advance for your help, the Programming Specsheet is not clear about this.

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: September 30, 2016, 08:34:23 am
content: Quote from: SuzyC on September 30, 2016, 03:36:45 amIt incrementsTBLPTR, which is a21 bitregister. So no, it doesn't wrap around.Operation of TBLRD with post increment (PIC18Fxx39 manual page 249):-Quote

author: SuzyC
author_rank: Frequent Contributor
timestamp: September 30, 2016, 08:54:13 am
content: Thanks Bruce Abbott,I didn't realize that this read-postinc programming-use command was also a runtime instruction that works in the same way and the detailed info about it was right under my nose in the 18Fxx39 SpecSheet instead of the programming Specsheet!What threw me off is that most of the Programming Spec examples manipulating the TABLPTR divide the TABLPTR into Hi, Lo, and Upper bytes and these registers are loaded with address values individually.
PCF8575 - 16 Bit I/O Port Expander - Driver implementation - Page 1
Forum section: electronics / general

author: TJ232
author_rank: Frequent Contributor
timestamp: July 01, 2016, 09:15:16 am
content: Step-by-step Tutorial for programming the new ESP8266 PCF8575 - 16 Bit I/O Port Expander Board.Part 1: Initalisation and Writing data on the 16Bit I/O Port.Related Article :http://www.esp8266-projects.com/2016/06/p1-pcf8575-remote-16-bit-io-expander.html

author: TJ232
author_rank: Frequent Contributor
timestamp: September 29, 2016, 07:10:14 am
content: Made it available also on Tindie:https://www.tindie.com/products/nEXT_EVO1/30v-synchronous-step-down-dc-dc-converter/
STMCubeMX HAL: User Code includes in generated code - Page 1
Forum section: electronics / general

author: Pack34
author_rank: Frequent Contributor
timestamp: September 28, 2016, 03:18:57 pm
content: I'm using System Workbench for STM32 and working with an STM32F7 with the HAL libraries. The CMSIS libraries do not support the F7 line.To generate the initial code, I've been using the STMCube software.The main issue is that I can write additional code files and associate them fine, however, when I add include statements targeting my code from any of the generated code, I get compiler errors that the file cannot be found. However, it's there and all additional code under the User folder compiles fine.All of the generated code is placed under the Project\Src folder.What I'm guessing is happening, is that the compiler just isn't looking into the correct folders. Is there some setting I'm missing in the IDE so I can do this? As it stands, I cannot add a header file to the main.c file...

author: rstofer
author_rank: Super Contributor
timestamp: September 28, 2016, 03:47:14 pm
content: Google has you covered!Yes, you have to add a path to the include fileshttp://www.openstm32.org/forumthread1738
Prefered method for button gesture detection? - Page 1
Forum section: electronics / general

author: jnz
author_rank: Frequent Contributor
timestamp: September 27, 2016, 05:54:23 pm
content: I have a few momentary switches and want to detect the states the user could press: single click / short press, double click, long press, hold, and maybe a wierd one like tic-toc (short press followed by a long press).I'm currently in an RTOS where if I really wanted to I could block this thread, it currently runs at 100ms intervals, but I may need to bump that up to 10-50ms.Had two thoughts, one I could store an array of the states over the time interval I have like . And also thought that I could split this up into something like switch3.pressed=1 switch3.released=1 switch3.idledOut=0. I could also ignore that I'm in a fixed interval and just record the system time and try and evaluate if I'm in a first press or not.Figure there is a good solution for this that you guys might like. Thoughts?
Overclocking memory chips: will it work? - Page 1
Forum section: electronics / general

author: technix
author_rank: Super Contributor
timestamp: September 26, 2016, 01:26:38 pm
content: For an ATmega162 running at 16MHz, the bus operates at 62.5ns time scale. Can I use a 70ns memory chip on it, essentially slightly overclocking it? Will it result in reliability issues?

author: bktemp
author_rank: Super Contributor
timestamp: September 26, 2016, 03:29:25 pm
content: The AVR datasheet specifies "Read Low to Data Valid": 1.0tcl-50ns. At 16MHz this is only 12.5ns.Compare this value with the "Output Enable to Output Valid" time in the SRAM datasheet. Most 55-80ns SRAMs will have a value of 25-50ns. Therefore it can work, but you may have reliability issues.You should also use 74AC573 latches instead of 74HC573 for a better address setup time.But AVRs can insert wait states: When using 1 wait state, the timing is fine for 70ns SRAMs.

author: Someone
author_rank: Super Contributor
timestamp: September 26, 2016, 11:12:32 pm
content: Also the external memory interface has programmable wait states, so you can use a slower memory and have the processor stall while its waiting for the bus transaction.
FPGA evaluation/introduction board suggestions - Page 1
Forum section: electronics / general

author: Towz
author_rank: Contributor
timestamp: September 24, 2016, 05:06:32 am
content: Hi! I'm near the end of my EE undergraduate education and I'd like to get more adquainted with FPGAs since I'm thinking about developing either a quite complex vital signs monitoring system or some other ideas i'm still working on, for my theses. I have come to the conclusion that an fpga would be among the best choices for such projects so I'd like to ask for any recomendations among the numerous developement boards available. I already have some experience with verilog and vhdl.Thanks!

author: TiN
author_rank: Super Contributor
timestamp: September 24, 2016, 06:01:12 am
content: Get DE0-SoC from Terasic. I'm going to buy one this weekIt's awesome little board with both FPGA and hardcore ARM. Can do many things in modern tech with it.

author: daybyter
author_rank: Frequent Contributor
timestamp: September 24, 2016, 07:34:36 pm
content: http://www.ebay.com/itm/ALTERA-FPGA-Cyslonell-EP2C5T144-Minimum-System-Learning-Development-Board-M94-/351494358830?hash=item51d6b2472e:g:z4EAAOSwpDdVUVk3

author: ebclr
author_rank: Super Contributor
timestamp: September 25, 2016, 08:18:55 pm
content: A little expensive but well done, and good documentation, it's the board most used in US universitieshttp://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/

author: Feynman
author_rank: Regular Contributor
timestamp: September 26, 2016, 07:22:18 pm
content: I started with the Arty board (Artix 7 FPGA):http://store.digilentinc.com/arty-board-artix-7-fpga-development-board-for-makers-and-hobbyists/It's decent and comes with a Vivado license (tied to the board).
Adding pseudo-ISP into old 8031 boards... - Page 1
Forum section: electronics / general

author: technix
author_rank: Super Contributor
timestamp: September 26, 2016, 11:12:44 am
content: I have a second-hand oscilloscope that is powered by a 8031 and some external mask ROM. And I found a bug in it. Do you think this being a good idea to fix it:1) Cut the trace to the EA pin on the 8031. Maybe the trace to WR pin on the ROM socket2) Copy the contents of the mask ROM into some kind of EEPROM, Flash memory or FRAM that does not require VPP, for example FM16W08.3) Replace the mask ROM with the storage chip above.4) Write a program that can reprogram the attached storage chip and store it in the one of my AT89C51RC chips.5) Replace the 8031 with AT89C51RC.This results in the EA pin being used as ISP Enable pin. When it is asserted (default on 8031 boards) the AT89C51 ignores its internal Flash entirely and execute the code on the external ROM (or FRAM) chip. When the pin is deasserted (using a jumper wire) it boots into the onboard Flash, which includes a small program that updates the said external storage device.
PORT B - Atmel Sam D21 XplainedPro - Page 1
Forum section: electronics / general

author: Franc
author_rank: Regular Contributor
timestamp: September 24, 2016, 11:13:37 pm
content: Hi all, how are youI am using a Explained Pro Sam D21 .I will control one AD5447 of 12 bits and I would like use the PB00 to PB11 pins.I checked the DS of Sam D21 and discovered that PB04 to PB09 are analog pins, with power source of VDDanalogic, others pins VDDdigital.Here is my doubt, could I use then as digital Pins? So I can define a MASK PB00 to PB11, it will be better to coding.If no possible, I will need create an MASK with PA08 PA09 PA10 PA11 PA20 PA21 PA17 PA18 PA16 PA19 PA27 PA28. In this case my Mask will be confuse.The MASK will have two source different, it can cause any instability?This is a limitation of XplainedPro PCB, I don't have the complete I/O port.Have a nice saturdayPaulo

author: ataradov
author_rank: Super Contributor
timestamp: September 24, 2016, 11:36:02 pm
content: VDD_analog and VDD_digital separation is mostly for your information, since datasheet states that both VDD_analog and VDD_digital must be derived from the same supply (meaning they must have the same level and rise time at all times).Typically VDD_analog is VDD_digital passed though a ferrite bead for noise filtering, but that is not necessary if noise is not an issue or you don't use analog peripherals.So just use ports as usual, no need to do anything special in the software.EDIT: Smaller pin count parts actually have all voltages combined into one pin.

author: Franc
author_rank: Regular Contributor
timestamp: September 25, 2016, 12:01:42 am
content: Thanks Alex!So I can start my Mask in PB00? ok.RegardsPaulo

author: ataradov
author_rank: Super Contributor
timestamp: September 25, 2016, 12:38:10 am
content: Quote from: Franc on September 25, 2016, 12:01:42 amI'm not sure what mask you are talking about, but you can treat PB0 as you would any other pin.

author: Franc
author_rank: Regular Contributor
timestamp: September 25, 2016, 01:12:07 pm
content: I will use PB0 as digital pin and creat a MASK of 12 bits startin in PB0. I was confuse as in DS it is a Analog pin.Regards!