MOSFET switching losses formula - Page 1
Forum section: electronics / beginners

author: Simon
author_rank: Unknown
timestamp: July 14, 2025, 09:07:35 am
content: I'm readinghttps://www.analog.com/media/en/technical-documentation/data-sheets/7801f.pdfon page 19 there is the formula for the switching losses in the two MOSFET's.Now I am not sure if the C_miller is supposed to be a capacitance or charge. I'd say charge as it looks like the formula is calculating the equivalent capacitance using applied voltage to the gate (even taking into account the threshold voltage).The other thing is that I am not sure that the input voltage should be squared in the switching losses part of the formula.

author: Terry Bites
author_rank: Super Contributor
timestamp: July 14, 2025, 12:02:42 pm
content: Its an apparent or effective capacitance.Its proportional(ish) to the mosfet's transconductance.The voltage gain of the mosfet circuit is Av, Av=gmRlCm= Cdg(1+gmRl)Read up on the miller effecthttps://hackaday.com/2025/02/13/understanding-the-miller-effect/

author: Simon
author_rank: Unknown
timestamp: July 14, 2025, 12:39:58 pm
content: Yes I understand that it's not a fixed capacitance but one that varies as the MOSFET turns on. Capacitance is equal to the charge over the voltage across it. Or the charge multiplied by the reciprocal of the voltage. And looking at that formula it looks to me like they are calculating the approximate equivalent capacitance, multiplying it by the gate drive resistance to get the time constant and multiplying that time by the load power to get the power dissipated by each switch cycle and multiplying that by the frequency to get the total switching power.I don't understand why they use the Vin squared, unless this is some sort of approximation to correct for something that is not linear and can't be calculated.

author: Terry Bites
author_rank: Super Contributor
timestamp: July 14, 2025, 03:47:27 pm
content: Here is a more general set of eqns with derivations.

author: Simon
author_rank: Unknown
timestamp: July 14, 2025, 04:05:57 pm
content: Yea, see that says the same thing without over complicating it. Vin is not squared, and Iout is not halved, it is halve for each transition but there are 2 transitions per cycle so just don't halve it.

author: mtwieg
author_rank: Frequent Contributor
timestamp: July 15, 2025, 01:03:56 pm
content: If you look you'll find an infinite variety of equations for calculating switching losses. Most of them are just different representations of the same thing. But there are also cases where using the wrong equation will be way off (for example, depending on if you are hard switching or soft switching).For hard switched circuits, I like using the approach in this article:https://www.eetimes.com/estimating-mosfet-switching-losses-means-higher-performance-buck-converters/.It gives simple equations for different sources of switching loss, rather than combining them all in one gross equation. Usually I create a spreadsheet which calculates all the contributions based on entered parameters. Seeing the separate contributions is useful for device selection, as it tells you which device parameters are most important.Quote from: Simon on July 14, 2025, 09:07:35 amYes, C_miller is some "effective" drain-gate capacitance (ignoring its nonlinearity).QuoteSo let's start with the basic equation for switching loss due to overlap between Ids and Vds, for an inductive load:Esw = 0.5 * Vds * Ids * TswNow let's derive Tsw in terms of other parameters. For a hard-switched circuit, Tsw is the time it spent charging/discharging the gate-drain charge Qgd. If you know Vth (the device threshold voltage), Rdr (the overall gate drive resistance), and Vdrvcc (the driver supply voltage), then you can calculate the charging/discharging gate current Ig. And if you also know Qgd you can calculate Tsw from Tsw = Qgd/IgFor turn-on, Ig = (Vdrvcc-Vth)/Rdr, so Tsw = Qgd*Rdr/(Vdrvcc-Vth)For turn off, Ig = Vth/Rdr, so Tsw = Qgd*Rdr/VthSo the total switching loss per cycle becomes:Esw = 0.5 * Vds * Ids * (Qgd*Rdr/(Vdrvcc-Vth) + Qgd*Rdr/Vth)Or factor things out to get:Esw = 0.5 * Vds * Ids * Qgd*Rdr*(1/(Vdrvcc-Vth) + 1/Vth)Now let's make the assumption that the gate drain capacitance is linear**, and let's call it Cmiller. This means we can replace Qgd with Vds*Cmiller. So then we get:Esw = 0.5 * Vds * Ids * Vds * Cmiller * Rdr(1/(Vdrvcc-Vth) + 1/Vth)Now if we replace Vds with Vin, and calculate average dissipation Psw = Esw*Fsw, we get that part of the equation in the datasheet, with the Vin2:Psw = 0.5 * Vin2* Ids * Cmiller * Rdr * (1/(Vdrvcc-Vth) + 1/Vth)*FswBasically Vin is squared because switching time is also is dependent on Vin.**The assumption of Qgd = Vds*Cgd is quite crude, since Cgd is very nonlinear. It would be better to determine Qgd from the curves in the FET datasheet.Also the starting equation assumed perfectly linear ramps for Ids and Vds. The nonlinearity of Cgd also causes the Vds shape to become nonlinear, which further throws off the result. Accounting for nonlinear capacitances basically requires numerical solutions rather than analytical ones.