H7 anyone? - Page 1
Forum section: electronics / general

author: dannyf
author_rank: Super Contributor
timestamp: October 26, 2016, 01:17:49 pm
content: An interesting chip from st. Just shy of A9. Not sure how big that market is.

author: Kalvin
author_rank: Super Contributor
timestamp: October 26, 2016, 01:31:27 pm
content: Here is the STM32H7 news release:https://community.arm.com/community/arm-partner-directory/partner-stmicroelectronics/blog/2016/10/20/h7-new-stm32-member-with-record-performance-and-secure-services-for-the-iotHere is a link to technical data:http://www.st.com/en/microcontrollers/stm32h7-series.html

author: ataradov
author_rank: Super Contributor
timestamp: October 26, 2016, 07:05:21 pm
content: Quote from: dannyf on October 26, 2016, 01:17:49 pmDefine "shy". It lacks MMU, basically the only difference between MCU and MPU.Quote from: dannyf on October 26, 2016, 01:17:49 pmI'd say pretty big. This thing can reasonably be used on a 2 layer board if you are really careful with the design. For A9 you will need 6 layer board.

author: chickenHeadKnob
author_rank: Super Contributor
timestamp: October 26, 2016, 10:19:50 pm
content: 1 Mbyte of SRAM with a scattered architecture:192 Kbytes of TCM RAM (including 64 Kbytes of ITCM RAM and 128 Kbytes of DTCM RAM for time-critical routines and data), 512 Kbytes, 288 Kbytes and 64 Kbytes of user SRAM, and 4 Kbytes of SRAM in backup domain to keep data in the lowest power modes1 Mbyte good, scattered archetecturebad. I know some the reasons why they implement in this way but it still irritates me.

author: dannyf
author_rank: Super Contributor
timestamp: October 26, 2016, 10:38:06 pm
content: I wonder if they implemented a serial SRAM like gd 32.

author: ataradov
author_rank: Super Contributor
timestamp: October 26, 2016, 10:39:16 pm
content: Quote from: dannyf on October 26, 2016, 10:38:06 pmGD32 has serial Flash, not SRAM. And I highly doubt it.

author: mark03
author_rank: Frequent Contributor
timestamp: October 27, 2016, 04:10:55 pm
content: I believe this is the first ARM Cortex-M fabbed on a 40-nm process (not counting companion cores on Cortex-A SoCs). Previous ST chips were 90 nm and I think the fastest M7 to date (Atmel/Microchip x70) was at 65 nm. It will be interesting to see how the power efficiency compares at various clock speeds with, say, the STM32L4 series, when feeding the ~ 1V core supply from an efficient switcher.H7 also inherits one of my favorite weird peripherals from the L4, the DFSDM (hardware CIC downsampler). And the claimed specs make it sound as if the on-board ADCs may have improved their noise performance... let's hope so.Edit: SPI peripherals unchanged, with shift registers still limited to 16 bits. Makes it difficult to interface a wide range of modern ADCs. Old IP dies hard I guess.

author: dannyf
author_rank: Super Contributor
timestamp: October 27, 2016, 05:25:36 pm
content: "hardware CIC downsampler"I have always wondered where such a beast could be useful.

author: Kalvin
author_rank: Super Contributor
timestamp: October 27, 2016, 05:44:23 pm
content: Quote from: dannyf on October 27, 2016, 05:25:36 pmDownsampling?

author: mark03
author_rank: Frequent Contributor
timestamp: October 27, 2016, 08:31:35 pm
content: Quote from: dannyf on October 27, 2016, 05:25:36 pmToday it's mostly intended for the single-bit stream from digital MEMs microphones, but the same principle could be applied to other sensors too. Alternatively you can DMA multi-bit data in/out from memory, if it comes from the internal ADC or somewhere else. One of these days I want to code up a WWVB receiver to take advantage of NISTs new phase-modulated signal format. Could be done with nothing more than the MCU plus some op-amp stages and 60-kHz crystal filter.

author: dannyf
author_rank: Super Contributor
timestamp: October 27, 2016, 10:11:13 pm
content: That's quite interesting. Thanks.