Circuit for 180 degree phase shift at 100MHz. - Page 1
Forum section: electronics / rf-microwave

author: TeddyPython
author_rank: Contributor
timestamp: March 22, 2020, 12:48:16 pm
content: Hi, I'm trying to do an experiment with interleaved adc sampling. I have come across some adc modules which I would like to use as they are ready built from a previous project. However, I'm having some difficulty deciding how to implement the required phase shift in the clock to a given module. The adc modules I have require an single ended sine wave clock at 100MHz, which is then converted to differential on the board via an rf transformer (adt4-1wt).At present I am contemplating using an emitter follower transistor amplifier with a gain of 1, to provide me with a 180 phase shift for using two adcs. However i was wondering if there is perhaps a more convenient solution,maybe an ic, which would do this or might even allow multiple phase shifts for when I add other modules.I've checked the analogue bandwidth of the adcs (ads5500) would allow interleaving, and it comes to 750Mhz bw, so that would comfortably allow mutliple 100Msps adcs to be used.Thanks in advance.

author: wraper
author_rank: Unknown
timestamp: March 22, 2020, 01:04:26 pm
content: That's not how interleaved sampling works. You should generate ADC clock from higher frequency low jitter clock. And phase shift between ADCs must be extremely accurate, otherwise you will get garbage measurements instead of higher sample rate.

author: TeddyPython
author_rank: Contributor
timestamp: March 22, 2020, 08:31:55 pm
content: I see thanks for that correction.Is there a good resource for learning what i should be building in the clock phase generator here?Circuit/IC etc?Thanks.

author: ejeffrey
author_rank: Super Contributor
timestamp: March 22, 2020, 08:46:07 pm
content: The simplest way is to flip the phase of the differential clock into the ADC. If you can change the module do that. Next best is to use a 180 degree hybrid to split the clock in two.If you use some kind of active circuit try to make your regular and inverted signal paths symmetrical. For instance, use an amplifier with a differential output and take the two signals from that rather than using the input directly. That way you are less sensitive to propagation delay or gain accuracy.

author: dmills
author_rank: Super Contributor
timestamp: March 22, 2020, 10:57:37 pm
content: For a pair of 180 degree single ended inputs, whats wrong with a simple current balun on a small ferrite ring or pigs nose.Fully passive, and about as simple as it gets.Alternatively a PECL/LVDS driver and drive each part from one of the outputs?

author: OwO
author_rank: Super Contributor
timestamp: March 23, 2020, 04:02:20 am
content: The most accurate way is using 3 flipflops running at 200MHz. Use a 74ALVC74 which has complement outputs to generate the 100MHz inverted and noninverted clocks, then use two more flipflops to sample & retime the two clocks to align them.

author: TheUnnamedNewbie
author_rank: Super Contributor
timestamp: March 23, 2020, 09:18:59 am
content: If you just need 180 degree difference between two clock lines, consider a +90 and -90 shift. RC/CR networks can do this pretty decent.Alternative is a phase inverter, which you can make with a single transistor. We use this sometimes at high speeds to generate differential data outputs from single-ended detectors. A buffer with high CMRR can then turn this into a 'true differential' signal, which is 180 degrees out of phase.

author: eliocor
author_rank: Unknown
timestamp: March 23, 2020, 07:54:54 pm
content: SomethinglikeLMK00334?You can find more devices like this one searching for "clock buffers/clock distribution":http://www.ti.com/clocks-timing/buffers/overview.htmlhttps://www.analog.com/en/products/clock-and-timing/clock-generation-distribution/clock-distribution-devices.html....

author: David Hess
author_rank: Super Contributor
timestamp: March 24, 2020, 09:09:04 am
content: Quote from: OwO on March 23, 2020, 04:02:20 amThat is how I have seen it done at these frequencies and would be my first choice but with ECL. The final outputs usually also go through low impedance RC sections with trimmer capacitors to adjust the timing.For only a two phase clock however, I have also seen a balun used.