MOS parallel to antenna - antenna clamp, antenna modulator - Page 1
Forum section: electronics / beginners

author: Tako
author_rank: Newbie
timestamp: December 02, 2015, 02:07:05 pm
content: Hi!I am looking for the information how is the front end of RFID chip (integrated circuits) for antenna designed. Right now, I am interested in an antenna modulator circuit. What I can find are the schematics that simply put NMOS transistor in parallel to antenna as here:1.2.http://images.cnitblog.com/i/268182/201405/111442272295072.jpg3.https://www.youtube.com/watch?v=5DJmp6iA1FE#t=5m46sThe question is: where is the body of the MOS transistor connected?Nodes on the antenna, change voltage values. Takingas the example, once there is a positive voltage on "Data In" node (node 2) and negative on node 3 and after that node 2 is negative and node 3 positive. If the transistor source was connected to the body, for the situation where node 3 is positive and node 2 negative, the body-drain diode would turn on. I think it is rather now what we would like to observe.I looked into books and net, but I cannot find any detailed schematics explaining this issue.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 02, 2015, 08:41:34 pm
content: Well, the first one shows a JFET, so there is no 4th terminal.Effectively, in a symmetrical JFET, the drain pin is whichever end of the channel is more cut off (i.e., more positive with respect to the gate, for N-channel), and the source is the other. For AC signals, this has the functionality alternating, which is why a JFET makes a poor variable resistor, at least when just hanging out there without any help.(Usually, a "variable resistor" is made by grounding the source -- so you at least have some hope of a stable reference voltage for the gate -- and driving the gate from a voltage divider spanning from drain to the control input. This acts to linearize the response, to some extent, but it still suffers due to cutoff and constant current regions, for more than a modest resistance ratio. That is, you can go from perhaps Rds(on) to 4*Rds(on), over a reasonable range of drain currents/voltages; but you aren't really going to achieve 10:1 or more, even with small drain voltages.)Alternately, since the modulation is digital anyway, it might simply be a FET of any type, driven into saturation (i.e., fully 'on', regardless of drain voltage), where Rds(on) is controlled to be the amount required for the modulation depth. Which, in an IC, might be a very long, thin channel (hence, high intrinsic Rds(on)), or a proper (overly large, or even discrete sized) transistor paired with a (more accurate) resistor.The consequences of nonlinearity are unreliable (e.g., level-dependent) modulation depth, distortion of the modulation itself (if analog or multilevel modulation is required), and shifting of resonant frequency (because the load varies during a cycle of the RF wave itself). Using a saturated transistor and (much better -- lower capacitance, linear / ohmic) resistor solves both of those problems (assuming, again, that analog or multilevel modulation isn't required -- though in principle, you could use many switches in parallel, to control a binary series of loading resistors, that would eventually look analog enough if needed).Tim

author: Tako
author_rank: Newbie
timestamp: December 03, 2015, 01:21:25 pm
content: Hi Tim,Thank you for your answer.You're right about JFET. However, in a lot of other papers or resources there is simply MOS transistor as in:->https://www.youtube.com/watch?v=5DJmp6iA1FE#t=5m46s->http://images.cnitblog.com/i/268182/201405/111442272295072.jpgI'm still wondering how it is possible to just put this MOS transistor in parallel to antenna. Is the body-drain diode on for NMOS transistor a desired action? I doubt it is as we tune our circuit out of the resonance frequency for the antenna.

author: PA0PBZ
author_rank: Super Contributor
timestamp: December 03, 2015, 01:58:15 pm
content: I guess one side of LC is grounded and the other side is going to data in and a half wave rectifier (a diode) + cap for power.Then your reference problem for the fet is gone...

author: Tako
author_rank: Newbie
timestamp: December 03, 2015, 02:54:40 pm
content: @PA0PBZFor the picture:http://i.stack.imgur.com/j8EGx.jpg,one side of the antenna cannot be grounded - there would be no current flow then to power capacitor C.But let's say it is grounded. In this situation you still have positive and negative voltages on Data In node. For negative voltages your body-drain diode is on.

author: PA0PBZ
author_rank: Super Contributor
timestamp: December 03, 2015, 03:36:07 pm
content: Quote from: Tako on December 03, 2015, 02:54:40 pmThat's why I said a half wave rectifier.Quote