Design review: Help placing SMPS + Regs + Ref for 16-bit DAC - Page 1
Forum section: electronics / projects

author: ezalys
author_rank: Frequent Contributor
timestamp: April 30, 2021, 11:52:23 pm
content: I'm designing a very simple 16-bit DAC with 8 outputs (two 4-output precision 16-bit DACs). It's fed with 5 volts which then goes through a push-pull module and is then postregulated with a LT3093 and LT3042. The 5V is also regulated down to 3.3V for the MCU by a AP2112K-3.3.I'm just looking for some comments on the way I've laid this board out. I feel a bit like I'm making poor use of space but I'm also not sure how much space to put around the various sections to minimize EMI concerns. I'm also not sure if the LT3093/LT3042 should be closer to the DACs with a longer run of unregulated +/- 15V, or if the way I currently have it is good. Finally I'm not totally sure how to route the return currents for the DACs. I guess there should be a wide net tie where the SPI lines pass over. I also wonder if I'll be shooting myself in the foot with the charlieplexed status LEDs at the bottom inducing some EMI upon switching or something.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 01, 2021, 08:38:54 am
content: Just keep the current paths separate, it's fine.Ground slots are dangerous to use. FYI, the shown location would be an acceptable option, separating currents in the SMPS section from the rest. Obviously, traces crossing that slot would violate that assumption (separate currents) so don't do that.Preferably, everything would line up towards the middle of the board: 5V in and the various supplies, all LC filtered and/or LDO'd to here, with the SMPS-stuff off to the right where it can be noisy without putting any of that noise into on-board supplies or off-board connectors.Specifically, the bypass/filter caps on the supplies, should be returned to one point, and that point will act as an ideal ground -- ideal because it's one potential, and it's one potential because you can't have any voltage dropped across a point. Real boards have some dimension, so this can't be strictly true -- but that doesn't mean it's useless at all.If multi-stage filters are used, I suppose each respective cap (cap 1 in filter 1, cap 1 in filter 2, ...) should be returned to about the same point, and several pointsAnd when I say "returned to point", I don't mean some squiggly ass star ground. You get best filtering with least trace length on capacitors. Cap ground side, short trace and via to ground plane right where it is; other pad, signal side flows through it. So all the filters will end up grouped together, and that makes them, well, more pointlike than being thrown around randomly.Same slot advice applies to the isolated UART. Don't cross the barrier, in this case except to terminate whatever impedance the cable has. Often a small cap (100s pF?) is used here to limit noise voltage (especially ESD) on the cable, with respect to the rest of the circuit. Often with a ferrite bead in series, or an (R+C) in parallel, to provide damping. Or a ferrite bead on the cable, also a common sight.This is especially important with some isolators; 6N136 is especially poor at noise immunity. Today's logic isolators should be fine.Use source termination resistors on the SPI, and the LEDs if possible. CMOS output pin is typically 30-70 ohms, trace impedance typically ~100 ohms. So a 47 ohm resistor will add enough to get good signal quality. This is placed at the driving pin, for every pin driver on the trace.Or if you don't need maximum transition speed, higher resistance gives lower EMI, or using a ferrite bead. FB would be especially suitable for your LEDs, don't need to group all the resistors near the MCU that way.No buffer, not even antialias filter, at the DAC outputs?This thing is going to be diiiiirty... I suppose there might be some reasons to do that, but there are usually better reasons to use it.BTW, mind that those type BNCs have awful CMRR -- they're literally two loose pins connecting to the back end of a coaxial stub. About a whole cm of unshielded, unbalanced wiring up to the cable. So any CM noise coming in on the cable, some fraction of that gets mixed in with the DM signal. The kind with multiple ground pins is better, and preferably the kind with a metal bulkhead fitting so everything can be grounded to the metal enclosure (it will be metal, right?..), shunting external noise around the circuit entirely.Or maybe I'm reading into the BNC too much. We normally use them for sensitive and RF signal applications, not for, what is this even going to be, audio frequency at best..? Anyway, if your load is sensitive to noise, it's not a great fit -- both the noise coupling and the lack of AA filter. YMMV.The VREF: just move it closer. Could cluster all three (DAC, VREF, DAC) closer to the MCU to shorten the SPI bus, less worry from that then. The analog stuff can all be below and to the sides of that cluster. No digital noise crossing the domain.I'm assuming this whole thing is "exploded" as an early placement stage, and will cram together once relative locations are decided.Ground plane: obviously, everything goes on ground plane. This is fine in 2 layers, pour top and bottom and stitch regularly, particularly around trace crossings and peninsulas. One pair of vias every couple cm alongside a trace or bus, should be fine, with higher density expected around components and crossings. Do not run buses parallel on top and bottom: mind the negative space where every component or bus cuts a void in the ground plane. You always want signals over at least one ground plane, and you want areas where both planes are missing, minimal in area, and stitched around for minimal circumference.4 layers, ground is free obviously. Don't be stingy with vias, you can use one per pin easily. (Or multiple even, which can be a good idea for reducing the impedance of bypass capacitors.) Power plane, you can cover with whatever supply is most commonly used, or divide it up by region, that's fine too. Scatter a few bypass caps around the plane, don't worry so much about pin-local bypassing (just place a few up close).Tim

author: ezalys
author_rank: Frequent Contributor
timestamp: May 01, 2021, 01:46:33 pm
content: Wow thank you for the comprehensive commentary! So there’s no AA filter because this thing is basically just run DC. I just use it to sweep back gate biases for a physics experiment on a run-to-run basis, so 100 Hz max with no concern of the step response.Your comments about the isolated USB I’m a bit confused about. It’s totally galvanically isolated, so I’m not sure how common mode currents would make their way over. I was just gonna make it two separate islands connected by the GMR isolators.The grounding and connector stuff I’m particularly worried about. This is a super low noise application. I’m quite concerned about ground loops. My thinking was to use a metal chassis (obviously) and to use a safety ground resistor to short the signal ground on the board to the safety ground of the chassis. Hence the use of isolated BNC connectors. I’m definitely interested in an alternative.I think ideally I’d use a SCSI connector, but our experiment uses a lot of pieces that are modified on the fly. We have a pile of Pomona boxes that have various bias tees and often we have to reconfigure things, so each signal needs to be broken out individually. Honestly I hate BNC connectors but am not sure what’s a sufficiently appealing alternative given our pile of Pomona boxes.

author: ezalys
author_rank: Frequent Contributor
timestamp: May 01, 2021, 01:47:42 pm
content: Also that comment about the CMC I’m a bit confused about. That large block is the switcher.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 01, 2021, 02:30:43 pm
content: There's no such thing as perfect isolation -- consider the reactance of a 100pF cap, or a ferrite bead, at any particular frequency. That's your tip about where it has some effect. Galvanic isolation, that's easy, like who cares; what's going on at 100MHz, now that can get interesting.Your isolator chips are going to have a couple pF themselves, and the island another few to 10pF to main circuit ground. So it's not exactly perfect isolation above say 16MHz (for say, Xc < 1kohm). If you have good (RF) grounding, that can still be fine. Basically it's just a precaution to "take the edge off" whatever might be coming in -- a ferrite bead on the cable adds ~100 ohm at 100MHz, and a cap to GND shunts the other end with a few ohms to GND. You get an impedance divider, from whatever the distant or coupled noise source is, through the ferrite bead and cap, into the circuit. Knocking off a cool 20dB or so at those frequencies is cheap insurance against that noise doing something within the circuit -- which is probably not much between digital signals and not a whole lot else going on (and separation distance, and good grounding, should be good enough for the analog section), but that's still something of value against transient noise -- EFT and ESD for example.ESD is another good reason to use some capacitance. Ethernet for example, is galvanically isolated -- transformer coupled -- but uses 1nF between transformer CT and ground, to limit peak ESD voltage. Instead of say 8kV HBM (from 150pF), the equivalent circuit is a capacitor divider, with only 1.5kV at the transformer -- hence why Ethernet transformers are rated for exactly this.It also serves to shunt noise, so that, at the transformer, common mode voltages are fairly small. This is helped with a common mode choke on the media side, reflecting incident noise.The RF / ESD equivalent, is quite different from the galvanic equivalent circuit. An ESD strike to the end of a 1m long USB cable (which might be currently plugged into your isolated section), will put pretty much full voltage (many kV) at the end of that cable, at the instant of sparking -- and lasting for the couple nanoseconds it takes for the voltage to propagate along the cable.Like I said -- cheap insurance, really the annoying thing is it takes so many words to define (even as imprecisely as I have here), while it's mere minutes to add the relevant components to the design, which cost mere cents.There are, alas, so many things that are worth way,waymore words than they should be... I wish I could explain more simply.Ah, static output, that explains that. Bias tees, should also save some noise as well. Give or take whatever their DC port response is -- presumably you want it clean from DC to whatever the cutoff is, and some range beyond that as well, until attenuation is high enough not to worry.Could you explain a bit more about typical applications? If everything is common ground, you may find it effective to just ground everything, metal chassis and connectors and all. If you're concerned with voltage drops (especially ground loops), you may find a differential system is more practical. Probably this will need an op-amp in the DAC output, either using connector ground as a "sense" lead, or making a balanced output (in which case... XLR might be more accessible than BNC?). Balanced wouldn't necessarily solve anything, but a point-of-use op-amp could in turn be added to get the voltage exactly right, exactly where it's needed. (Give or take if there's, like, vacuum or cryo or whatever, making it at the very least more difficult to place any circuitry inside.)Grounding and EMC are entirely dependent on the system in which a device is placed. It's nearly impossible, in general, to design and build something that is well and truly universal. I guess you're not so pressed on this that you didn't automatically consider individually isolated outputs, but that would be a very effective method. The question, then, is how much can you compromise, and where? And that requires knowing what kinds of things it may connect to.The CMC comment would apply to the 5V input, most likely -- any cable is a source of noise, and adapters are no exception. Typical component might be anywhere from 100 ohms (at 100MHz, little more than a two-line ferrite bead) to some kohms, or some mH. If the source is suspected to be especially noisy, a whole line filter (you could use an actual power entry module, grounded to the enclosure) might be worthwhile.Tim

author: ezalys
author_rank: Frequent Contributor
timestamp: May 01, 2021, 03:34:00 pm
content: What you said about the Y-cap makes total sense. I have quite a lot of experience solving Maxwell's equations but not that much layout experience, so if you had said "you need to make a divider with the parasitics of the isolator" it would have made sense to me. Never would I confuse being able to solve maxwell's equations to being able to make a good layout. ESD though is totally uncharted territory for me, so I appreciate those comments.I would love to go fully differential and use a point-of-use opamp but my use case is exactly what you mentioned -- low temperature physics. You can put quite a lot of electronics in a fridge but nothing that eats as much power as an opamp. Usually just a few HEMTs operated in the triode regime. That said, this DAC is used to bias the back gate of exotic semiconducting van der waals heterostructures (think sandwiches of graphene, monolayer boron nitride, tungsten ditelluride and other monolayer metals.) It's also used to bias up the HEMTs, some of which are nearly pinched off and used as a low-parasitic R in a cold bias tee, and others used as amplifiers. The samples themselves look like 50 fF capacitors and are VERY VERY VERY VERY SENSITIVE TO ESD. Everything this box drives looks like a tiny capacitance or a HEMT at the end of a piece of 10 foot manganin wire or 10 foot 50 ohm stainless coax.The long and short of this is that the circuit being driven is manifestly single-ended and DC coupled. We will not be reconfiguring the circuit at base to be balanced or differentially coupled. These circuits are dead-bug wirebonded on the EDGES of slices of GaAs to avoid making landau levels in the HEMTs at high field. Doubling the number of transistors is not realistic. Introducing additional amplifiers basically anywhere between an instrument and the sample itself is also to be avoided, as if one goes haywire and rails it could destroy the priceless sample. Simplicity here is absolutely key.Now, everything in this setup does indeed have a common ground -- the cryostat itself. I just don't really know how to avoid ground loops in this case. My thinking was that if the DAC had a signal ground that was shared with the cryostat, and the chassis was the safety ground, I'd be reasonably safe.When you say the bias tee has noise, what do you mean? Coupled in or Johnson noise or something else? We always use RC bias tees (to avoid any chance of ringing) with time constants of maybe 10 milliseconds or so. We just take the bias tee to be the AA filter but maybe this is a bad idea. I've hung an unpopulated and R and C off the DAC outputs just as was used in the eval board. Currently we build our DAC boxes out of stacks of eval boards, and this mostly works (modulo ground loops that pop up sometimes) so I've just tried to copy that with minimal changes. Isolating each DAC channel sounds nice but too complex at this point. I might retain the current BNC connectors but add common mode chokes to each output or something and hope for the best. I've also considered these THAT differential line drivers and just driven between BNC shield and center pin, but again, seems a bit complex. I like passives. They can't rail and destroy my sample. Any insight is appreciated, however. I'm open to anything that helps eliminate ground loops and is practical given my setup and constraints.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 01, 2021, 07:04:01 pm
content: Ah, cool -- sounds lovely, now that we're getting good at making monolayers of things, let's throw the Periodic Table at it and see what happens, eh?So this isn't scary frequency like Josephson junctions or quantum computing or anything (well, maybe in part, who knows), basically just DC characterization of weird semiconducting junctions? Or well, the AC path can be whatever, really, but you aren't concerned about that on this side -- just making sure the DC microvolts are where they need to be, huh?Yeah, so first thing is to ensure the cryostat is a ground you can be confident in; keep the voltage drop across it low, or the current flow through it. Cables out of it should be routed together, and strictly following a tree topology -- avoid loops. If you need connections between instruments, preferably they should be isolated, or differential in a similar way, or those connections should be routed into the wiring harness to maintain the tree topology. (This would obviously be impractical if it would bring superfluous wiringintothe cryostat... In that case, one will have to see what the impact is, as far as how much voltage/current will be looped in by taking a shorter path.)Similarly, AC connections should be isolated with CMCs (ferrite beads or better), or transformer coupling. If everything can be shielded, probably RF isn't a concern, or much of one -- and that just leaves low frequency, mains and galvanic voltages/currents to worry about, for which transformer coupling might still be helpful.And that's the main liability left then: DC offsets due to poor equipment design (ground to ground error between connectors), and ambient AC mains induced in loops.If this is the kind of thing that can fit inside an even bigger chamber, with similar degree of shielding -- you can get away with pretty sloppy wiring. YMMV. The cryostat sits inside a dewar, well, you can't exactly get wiring through that except at the top, but if that in turn sits inside some big metal chamber, it's probably fine to treat that as a unipotential shield. Which then becomes a node in your tree, and everything else hangs off that.Oh or, if tree implies multiplicity and direction, then just an ordinary acyclic graph.Tim

author: ezalys
author_rank: Frequent Contributor
timestamp: May 01, 2021, 07:59:38 pm
content: Haha I used to do JJ quantum computing. We just DC blocked everything. Was pretty straight forward.So ok those are good wiring rules in general. I still don’t know what to do for the output. Should I short the BNC shield to the chassis or should I have each shield isolated and use a common mode choke, and have an instrument ground and chassis ground connected by a small resistor.And yes — I just want the micro volts where they need to be with minimal low frequency interference.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 01, 2021, 08:38:32 pm
content: Probably fine putting everything in a metal enclosure (with metal connectors). PCB can be grounded with mounting screws, or PCB+panel mount connectors, whichever is fine.Tim

author: ezalys
author_rank: Frequent Contributor
timestamp: May 03, 2021, 06:27:30 pm
content: Ok, here's what I have so far, with some annotation. I've omitted the ground plane noted above as I've tried to keep my placement and routing such that the currents should all return to the right. The exception are the indicator lights at the bottom. Even though they're charlieplexed s.t. they're all more or less differentially driven, I have the impression that some currents will return through the ground plane, polluting the analog ground. Is there some way to avoid splitting the ground plane? Is there some trick to be played with the board's four layers? I could nearly do anything I want with the remaining 3 layers under the LEDs.How do I think about the SPI return currents here? Do they just make a loop like in the green? Is this not a hazard? Or are the signals slow enough and sufficiently low current to not worry about? Is it possible that they return to the MCU's decoupling caps? I'll stick some resistors on the control signals to try and limit the current and run the bus slow. Do the return currents return backwards up to the MCU, do they return to the right to the supply? Do they just spray everywhere since they're kinda between the low frequency and microstrip limits?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 03, 2021, 07:10:28 pm
content: I wouldn't worry about the lights, or the ground under them (for which, a slot probably makes more liability as a stub / 1/4 wave resonator, than helps isolate from the outputs), just ferrite beads (330R+?) from the driving pins should do.Which can be a bead array if you like.They're driven differentially, but the signals AFAIK are not balanced as that would imply. Different pins go up and down in turn, and others go hi-Z; and the lengths aren't matched.So, easiest to not deal with high frequencies at all -- just filter it.SPI return currents are under the traces. No problem. Yes, the bypass caps do their job, returning VCC currents to GND. You can reinforce that if you like by isolating the supply with a small inductor (taking precautions to dampen the resulting CLC network), but I wouldn't worry about it as the 5V input doesn't need to be particularly clean.Likewise with filtering to the analog supplies, there's nothing coming from that way, there's no closure to make what would be the green loop.Consider: your load has a cutoff of some kHz, so you only need a clean output up to that, plus whatever margin for cutoff level (like -60dB or whatever). With two RCs filtering, that should be low MHz.There is still a possible route for higher frequencies to interfere. If the DACs exhibit rectification, it could be that noise in the 100s to 1000s MHz is detected (amplitude demodulated), and since it's usually impulsive (e.g. ESD) or modulated (audio or digital comm traffic), the detected result adds a variable offset from DC up. Note that frequency modulation is not excluded, as accidental resonances transform frequency variation into amplitude variation.I had the latter, personally, back in college -- the college radio transmitter sits on top of the dorms and, probably assisted by multipath reflections off neighboring apartment buildings, was detected by the handmade audio amplifier I brought with me. Some ferrite beads and ceramic caps put a quick end to that.Probably the most common offending source in a lab, would be the phones (GSM or other) in the techs' pockets. GSM is responsible for the pulsing beeps sometimes heard through poorly designed audio systems:https://youtu.be/8TWXCVbBTcc?t=39A lot of op-amps nowadays carry RFI immunity ratings, which greatly helps this. Compare to ye olde LM358, equipped with diode junctions (BJT B-E junction to be specific) on its input pins -- as with my discrete audio amp, they make excellent RF rectifiers.So, there shouldn't be any noise within the DAC itself, and if you keep RFI away from the REF and OUT pins (and between AGND and DGND -- don't slot the grounds or anything, just virtually section them off, with no digital signals crossing the analog side and vice versa), you're fine.BTW, beware of capacitance loads on op-amps -- including I assume, whatever internal buffer the DAC has? This reduces phase margin and may cause instability, at worst resulting in oscillation. This is usually on the low side (some MHz, comparable to the amp's GBW) so is distinct from like, RFI stuff. Usual strategy is a series resistor, keeping that path lossy and well damped; but this also introduces error due to DC current flow, so ensure your path has high resistance to ground (which should be the case here, but may not be the case in general).If you had a DC load, that would probably be a good reason to add a buffer / line driver amp after the DAC. I still don't like the DAC outputs being relatively naked, but it should also be okay due to the above considerations. (Eh, maybe ESD diodes would be nice, shouldn't really be a big deal unless your techs are all undergrads too.).Tim