How to go about making a signal/tracking gen that covers a few ghz? - Page 1
Forum section: electronics / projects

author: rwgast_lowlevellogicdesin
author_rank: Frequent Contributor
timestamp: November 09, 2016, 08:38:26 pm
content: I have been using an SDR with the noise source on a ham it up board to test filters, antennas, etc. Well I am really having an issues receiving Inmarsat or anything besides Iridium in the 1500/1700mhz part of the spectrum for that matter. Im using some LNA's etc... I am really thinking it may be my air gap patch antenna, I designed it using aluminum and Rogers PCB according to a PastorNeck design calculator, but its the only part of the system I can reasonably test.I built a little gadget using two AD9834's a while back it lets me generate two wave forms square/triangle/sine and adjust the the phase difference, this way I can use it as a Quadrature oscillator etc... It is only able to generate waves up to ~35mhz though. I thought about running its output through a PLL, but I know little about them, im under the impression that PLL's only work with square waves, and do to the fractional nature I wont be able to get a 1Hz or even 1Khz step adjustment? Ive never tried to use a square wave for SNA type measurements, thinking about it now would all the harmonics even matter when you just testing filters and return loss/swr?So I came across thishttps://www.seeedstudio.com/RF-Explorer-Signal-Generator-(RFE6GEN)-p-2074.html#, it will generate CW or sweeps up to 6ghz in 1hz steps. Is there any way to build something similar without using an FPGA? The only way I know to generate waves that high in frequemcy is something fast pushing a sine table at a high speed DAC. If fpga is the only way to do it would something like the 20 dollar IceStick be able to handle it?

author: Someone
author_rank: Super Contributor
timestamp: November 09, 2016, 11:36:32 pm
content: RF Explorer is based around a Maxim PLL:https://www.maximintegrated.com/en/products/comms/wireless-rf/MAX2870.htmlIts not going to provide 1Hz resolution across the range, or even at the bottom end, the specification for the RFE6GEN is 1kHz resolution. Creating stable and tuneable oscillators is non trivial but chains of PLLs can create low jitter clocks with very fine resolution and then you're back to FPGA solutions.

author: rfbroadband
author_rank: Unknown
timestamp: November 10, 2016, 01:34:10 am
content: Look at the ADF4351http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4351.pdfIt supports 35MHz to 4.4GHz and offers Integer and FRAC-N operation. If you can accept the degraded spurious performance in FRAC-N mode you can get very fine step sizes, likely in the Hz range.The datasheet contains a section called " RF Synthesizer - A Worked Example" that describes how the PLL can be configured. The example focuses on wireless standards, so they describe a channel resolution of 200kHz, but you can get much lower than that. The chip also has excellent phase noise performance.

author: nctnico
author_rank: Super Contributor
timestamp: November 10, 2016, 01:39:03 am
content: IIRC the ADF4351 has a minimum step of 500Hz with some trickery but 1kHz steps is pretty easy once you have worked out the math. If you need finer control you'd need to feed it from a variable frequency source.