Capacitors around linear regulators - Page 1
Forum section: electronics / beginners

author: derGoldstein
author_rank: Regular Contributor
timestamp: July 09, 2016, 03:47:08 pm
content: I've been placing capacitors around linear regulators almost out of habit for years now. I remember the typical old "recommended circuit" in the datasheets, and I add to that what I occasionally read about stabilizing the output voltage and preventing spikes/dips. The result is that now my starting point for a design with 2 regulated voltages looks like the attached circuit. That's 2 ICs, 7 ceramic caps, 3 electrolytic caps, and 2 diodes, and I haven't even placed my first component.From what I've googled, the questions regarding this topic are usually "how safe can I make it?", rather than "how many components do I actually need?".From observation and going over a lot of circuits:The minimum starting point with the LM78xx chips seems to be a 1uF cap on the input and 0.1uF cap on the output. When I look at real-world implementations, however, I'll often see one of each (1uF and 0.1uF) on both sides. Most LDOs that I've looked at don't need the 0.1uF on either side, but rather require larger, ~10uF caps (depending on the load) on both sides.With any voltage regulator, you'll see a reservoir cap (electrolytic/tantalum) on the output if the load could ever go over ~50mA. If the input current is coming from anything but a battery which is located within an inch of the circuit, the input will also have a reservoir cap.If there's any chance at all that the input could go lower than the output (primarily if the input is shorted for some reason, but also because of larger reservoir caps on the output) a protection diode will usually be present.Taking the above into account, it seems that the attached circuit is a reasonable starting point, despite the fact that its component count could be higher than the rest of the circuit.I know that the characteristics of the circuit will effect the necessary capacitors around the regulators, but I'm looking for some rules of thumb. How many of the caps can I "safely" omit?

author: rstofer
author_rank: Super Contributor
timestamp: July 09, 2016, 04:01:42 pm
content: Personally, I wouldn't change a thing.You could try some experiments on a real circuit and see how it works out. There will probably be additional 0.1 ufd capacitors at each chip (and dozens around an FPGA). I usually add a 10 ufd at the far end of the board.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 09, 2016, 06:23:06 pm
content: Only the electrolytics are close to necessary.Note the datasheets don't (usually?) insist upon dedicated caps for a given IC, just that one be near enough. You can share as many as you like, as long as the supplied ICs are close enough (plus some increase in C value if the ICs can be expected to act in unison, e.g., a bunch of switching logic on the same clock domain).Of the simplest rules least likely to lead to trouble, "saturate the design with bypass caps" is the best, so that's why they say so.Leaving power supply network design to ignorance, obviously isn't a good idea in general. The network can be analyzed just as any RLC network can, taking suitable estimates for the stray L between nodes, ESL and ESR of caps, and the effective impedance or load of all the devices connected to the supply (which is usually somewhere around resistive or constant current, or pulsed on/off).Tim

author: danadak
author_rank: Super Contributor
timestamp: July 09, 2016, 08:13:43 pm
content: The ceramics are to handle bypass of high frequency noise as they exhibitmuch better Z than standard electrolytics. They also handle noise rejectionas loop G in the regulator falls with F and its noise rejection dives as well.For electrolytics consider tantalum (or even better polymer tantalum) as theyhandle bulk and low frequency stuff.Some regulators have min esr requirements on output bulk caps, electrolytics,so be aware of that.Layout, load types and behavior, lead inductance, ground routing all effectcaps to be used and sizes. So think of datasheets as recommended startingpoints. And read the actual cap datasheet, not all caps of a specific value behavethe same. Pay attention to C vs V, Z vs F, V, T....Also consider the fact that some "newer" regulator designs have much fastercontrol loops, so that impacts C selection. A slow control loop might place more demandson C sizing, whereas a faster control loop might allow a smaller C. All depends onactual design.Regards, Dana.

author: jitter
author_rank: Frequent Contributor
timestamp: July 09, 2016, 08:43:56 pm
content: ^ This.Don't just plonk in capacitors because everyone does so, read the design considerations given by the manufacturer (see page 21 ofthis datasheet).

author: David Hess
author_rank: Super Contributor
timestamp: July 09, 2016, 11:22:52 pm
content: Quote from: T3sl4co1l on July 09, 2016, 06:23:06 pmExactly, and the extra input capacitor is only needed if the regulator is far from the bulk input capacitance. I would always use a small solid tantalum or aluminum electrolytic output capacitor and many regulators, especially low dropout regulators and negative regulators, require it. Ceramic decoupling capacitors should be located close to the loads.I have a word of caution about output capacitors; low dropout regulators and negative regulators like the 337/7905 rely more on their output capacitor for frequency compensation because they use common emitter/source output stages and many will perform poorly or oscillate if its ESR is *too* low. So keep it simple and use solid tantalum or aluminum electrolytic capacitors unless the application notes say otherwise. If you must use a ceramic output capacitor, then a low value series resistance can be used to increase ESR. If a low dropout regulator is specifically designed to use low ESR ceramic capacitors, then its datasheet and application notes will say.High performance regulators (fast ones) may have other decoupling requirements so check their datasheet and application notes.

author: jitter
author_rank: Frequent Contributor
timestamp: July 10, 2016, 08:26:05 am
content: ^ Again, good advice.This is what happens if you get the ESR of the output capacitance wrong on something as common as a LM337:It all boils down to reading the design considerations because every regulator has specific needs that might be different from the others, including the ubiquitous ones. Biggest differences are between old-school "electrolytic stable" LDOs and modern LDOs that were designed to acommodate the increasing use of larger ceramic capacitors. The former seem to need a minimum ESR and the latter a maximum. In both cases disregarding it can lead to oscillations and in the worst case scenario that sticks out like a sore thumb.Also be aware that parallelling low-ESR caps like ceramics to higher ESR caps like tantalums or electrolytics may actually complicate things for old-school LDOs.Symptoms might also not be so clear and linger for many years only to be found with a batch of regulators that has some spec away from the typical (but still within datasheet values). The latter happened to one of our customers' designs using a LM337 (from above image). It took years to surface, but it also meant that everything that appeared OK at first may actually be marginally stable at best (which might lead to ringing and bad transient response, and that does not stick out like a sore thumb).