SDADC inaccuracy - Page 1
Forum section: electronics / projects

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: January 31, 2015, 11:19:53 am
content: Hi everyone ,I have this circuit, wired to an segma-delta adc ( stm32f373 ) and am getting some totally inaccurate reading.adc input impedance is around 500K, Adc reference is 3.3V directly from power rail, R52, R53 and 1% R48 is 0.1%and a not represented resistor ( PT1000 ) is connected between SEM and Ground.Am getting an irregular voltage drop across R52 and R53 ( between 11mV and 17mV)am aware this is a terrible configuration , but any way to correct the reading without modifying the hardware, am not the designer of this circuit so i have no call to change the hardware.My guess is i change those resistor with 0R resistor and attack the ADC directly with the voltage to measure or change their precision to 0.1% any better simple idea . Thanks

author: PChi
author_rank: Frequent Contributor
timestamp: January 31, 2015, 01:00:37 pm
content: The STM32F4 series ADC uses successive approximation (I believe). I guess that the STM32F373 is similar. The first stage is a sample capacitor that the source has to charge. For accuracy it needs a low source impedance. Are you performing many acquisitions/second? Reducing the number of conversions/s reduces the ADC input current.

author: langwadt
author_rank: Super Contributor
timestamp: January 31, 2015, 02:07:34 pm
content: Quote from: PChi on January 31, 2015, 01:00:37 pmbut it won't change the error from the sampling capacitor charging through R53, changing that to zero would help.And ~1.5mA through a PT1000 is alot

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: January 31, 2015, 02:25:05 pm
content: Quote from: langwadt on January 31, 2015, 02:07:34 pmagree, it's 10 time more than it should , self heating will be a problem , but the designer think since the sensor is in contact with water over heat will be dissipated. i don't care much, his problem.He refuse to use any kind of buffering in adc input to adapt impedance to save cost.

author: dannyf
author_rank: Super Contributor
timestamp: January 31, 2015, 03:19:26 pm
content: QuoteSounds like you need a totally accurate solution,Seriously, what are you talking about here? Your "totally inaccurate reading" may not be somebody else's "totally inaccurate reading".Put some numbers / charts there so you can help others help you.

author: tom66
author_rank: Super Contributor
timestamp: January 31, 2015, 03:34:36 pm
content: With some low impedance ADC inputs I've found adding a capacitor immediately across the ADC input and ground helps. The idea being that the capacitor (being much larger, 1~100nF) provides the sampling current needed. This will of course reduce the bandwidth of the circuit and only works for occasional sampling.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: January 31, 2015, 03:56:58 pm
content: Quote from: dannyf on January 31, 2015, 03:19:26 pmno i don't, and you don't need themthe thing is it's over expectation of the ADC input impedance can be enough high to guaranty that the voltage of the sensor is the same as the voltage in ADC input, and that 3.3V is enough stable to guaranty stable measurement, and the last thing ppl who designed the circuit are expecting is that self heating will not be a problem ( still to verify ) ...What am trying to do is to find a way around all of that either by software or by a minor modification in passive component values.Quote from: tom66 on January 31, 2015, 03:34:36 pmwill consider that, i can go as low as 1 sample / second , thanks

author: langwadt
author_rank: Super Contributor
timestamp: January 31, 2015, 04:19:24 pm
content: Quote from: tom66 on January 31, 2015, 03:34:36 pmyou can still same fast, the capacitor just lowpass filter the signal you are sampling. What is needed is longer sampling timeafaict from this(page 26):http://www.st.com/web/en/resource/technical/document/application_note/CD00211314.pdfa 1K source impedance shouldn't be a problem

author: dannyf
author_rank: Super Contributor
timestamp: January 31, 2015, 04:27:09 pm
content: QuoteFairly easy to solve in software.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: January 31, 2015, 04:34:40 pm
content: yap but i have 10 input like this, i think the best way to get over it , is to change the value of the pull up resistor to a higher value , the voltage given by the PT1000 will be minimalistic and the drop across R52 and R53 will be so little , i amplify this voltage with the amplifier in the STM32 and case solved... this my idea , am looking for a way to say to the dump who draw this that it's impossible to do it anyway else

author: Kalvin
author_rank: Super Contributor
timestamp: January 31, 2015, 04:43:38 pm
content: You might also want to measure the 3V power supply voltage used as the PT1000 reference. Averaging a few samples may help with noise filtering. Enabling the 3V used by the PT1000s only when the temperature measurement is needed would reduce self-heating problems.

author: langwadt
author_rank: Super Contributor
timestamp: January 31, 2015, 05:55:20 pm
content: Quote from: hamdi.tn on January 31, 2015, 04:34:40 pmI'd say drop R53 it doesn't serve any purpose, though 1K shouldn't be big issueTry increasing the "sample time register" it gives the internal sampling cap longer time to charge, reducing the effect of R53, if that is really the issue

author: langwadt
author_rank: Super Contributor
timestamp: January 31, 2015, 05:57:37 pm
content: Quote from: Kalvin on January 31, 2015, 04:43:38 pmif the 3V is the same as used for the reference there is no need to measure it, the measured value is the ration between the precision 1K1 resistor and the PT1000 regardless of voltage

author: splin
author_rank: Frequent Contributor
timestamp: January 31, 2015, 06:42:18 pm
content: [EDIT: I got the decimal point in the wrong place input impedance actually < 2.14Mohms so 17mV is not unreasonable]Quote from: hamdi.tn on January 31, 2015, 11:19:53 amThe STM32F373 has 3 16-bit sigma delta ADCs (SDADCs) as well as the usual 12-bit SAR ADC(s). Page 237 of the reference manual (RM0313) states that the input impedance is:Rin = 1/2/Fclk/Cwhere C = .543pF + .152pF * PGA gain (.5 toand Fclk is in the range 500kHz to 6MHz.So to be seeing up to 17mV across R52 and R53 means something is seriously wrong - 17mV implies an input impedance of less than 2.1k!Perhaps you have current flowing through the ADC's input protection diode - are you sure that you're not violating the Analog input signal range, which depends on the PGA gain setting and input mode, as specified in 13.5.13 (page 236) of the reference manual?Is the processor's digital supply (VDD) the same as that connected to the SDADCs, (VDDSDx) and the other analogue supply (VDDA)?Are all the voltage ratings specified in Table 19 (section 6.2) of the datasheet met? In particular:VDD must be <= VDDAVDDSDx must be <= VDDAVREFSD+ must be <= VDDSDxVREF+ must be <= VDDAAnd:All main power (VDD, VDDSD12, VDDSD3 and VDDA) and ground (VSS, VSSSD, and VSSA) pinsmust always be connected to the external power supply, in the permitted range.The following relationship must be respected between VDDA and VDD: VDDA must power onbefore or at the same time as VDD in the power up sequence. VDDA must be greater than orequal to VDD.The following relationship must be respected between VDDA and VDDSD12: VDDA must poweron before or at the same time as VDDSD12 or VDDSD3 in the power up sequence. VDDA mustbe greater than or equal to VDDSD12 or VDDSD3.The following relationship must be respected between VDDSD12 and VDDSD3: VDDSD3 mustpower on before or at the same time as VDDSD12 in the power up sequence.After power up (VDDSD12 > Vrefint = 1.2 V) VDDSD3 can be higher or lower than VDDSD12.The following relationship must be respected between VREFSD+ and VDDSD12, VDDSD3:VREFSD+ must be lower than VDDSD3.The datasheet also specifies the common mode input range:a) In Single ended mode (zero reference) - between Vssa and VREFSD+/gainb) In Single ended offset mode - between Vssa and VREFSD+/(gain * 2)Otherwise perhaps your device is damaged, possibly static damage?QuoteI don't think that either of those is a solution. certainly changing to .1% resistors won't make any difference.Splin

author: PChi
author_rank: Frequent Contributor
timestamp: January 31, 2015, 07:49:12 pm
content: Scrub my first answer I should have read the reference manual.My understanding is that you measured 17 mV across R52 and R52 which gives a current = 17mV/11k = 1.5uA.If the SEM_ADC voltage = 1 V the input Analog input resistance = 1 V/1.5uA = 667 kohm.Section 6.3.25 of the reference manual specifies the analog input impedance = 540 kohm typical, One channel, gain = 0.5, fADC = 1.5 MHz.This looks like it explains the voltage that you measured.

author: dannyf
author_rank: Super Contributor
timestamp: January 31, 2015, 07:57:34 pm
content: QuotePT1000, by its very name, indicates that its nominal resistance is 1Kohm so the joint sits at ~1.6v.The (low) input impedance, if you look at the formula, is caused by charging up / down the sampling capacitor.Once you understand that, the solution is simple.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 01, 2015, 12:38:38 am
content: thanks everyone,@splin , when i put a known voltage directly in the adc input, the reading are stable and most important all input give almost the same reading, so device is fine, the only source of imprecision is due to the gain error of the embedded amplifier.@Pchi , it dothe adc input impedance is about 550K (frequency 1.3M, and capacitor 0.7pF, gain 1) the formula is (1/(2*f*c))so with PT1000 = 1000R ( 0°C ) , the voltage at SEM = 1.571428V and with 550K impedance the voltage in the input should be around 1.540V , 31mV drop !So this is a normal thing to happen, will shunt those resistor and try to read temperature

author: tszaboo
author_rank: Super Contributor
timestamp: February 01, 2015, 10:23:30 am
content: Quote from: hamdi.tn on January 31, 2015, 02:25:05 pmTo save cost. With a PT1000. What a totalmoronis the designer. A PT1000 if designed correctly, can measure 0,1C accurate. It deserves to be correctly driven, with reference voltage, and external ADC.You can forget the imput impedance of an ADC, it doesnt work that way. The ADC has a short sampling period, when it connects a capacitor to its imput, so there is a sudden dip on the input voltage. If it is not driven correctly, this dip will make INL and DNL errors. The input impedance is a totally insignificant number, doesnt mean anything without the sampling time and the number of bits.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 01, 2015, 09:02:24 pm
content: @nandblog, yap i must heard this " to save cost " 1000+ timeconversion time is 360 adc clock cycles (frq 1.3MHz) nbr of bits 16

author: Siwastaja
author_rank: Super Contributor
timestamp: February 02, 2015, 12:20:58 am
content: I can't see any reason to use an opamp to decrease output impedance with a PT1000 or any type of thermistor either. Just use a capacitor that is several orders of magnitude larger than the sampling capacitor. I always use 1µ ceramic and get great, stable, linear results. It provides almost infinitely small impedance, smaller than any opamp ever could, without offset, drift, cost and PCB real estate of an opamp. Of course you completely lose any bandwitdh there was, but who wants to sample a thermometer thousands of times per second? I would enable the power to the PT1000 for 100 ms every second, take a bunch of measurements and average them on CPU. With a 12-bit ADC, I usually just let the DMA take 16 measurements and sum them for a nice 16-bit number. At least for me, it's quite rare that you really use an MCU ADC to measure some really fast changing signals. You can get resolution and even accuracy out of cheap components by sacrificing the bandwidth, and the best thing: it's quite simple. So just lose that extra resistor between the cap and ADC input altogether or reduce it to a very small value.

author: dannyf
author_rank: Super Contributor
timestamp: February 02, 2015, 12:17:49 pm
content: Quote1u may be excessive but I can see people using .1u for availability.The number needed is far lower than that, however. The sampling capacitor is on the order of 5 - 7pf. So something 100x bigger than that, like 1n - 11n would be more than sufficient.The thing you want to minimize is charge transfer from the circuit being sampled to the sampling capacitor. The parallel capacitor satisfies that.It however limits how fast the circuit reacts to a fast changing signal.

author: Siwastaja
author_rank: Super Contributor
timestamp: February 02, 2015, 02:53:40 pm
content: I agree 1µF is overly excessive for just providing low impedance for the ADC. 1µ serves another purpose, however - it averages the signal for noise removal, and by this I mean a wide spectrum of noise, not just over the ADC max Nyquist frequency.Because it's not always practical to read out the ADC all the time and filter in software.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 02, 2015, 05:24:47 pm
content: Thanks everyone, i changed those resistor with 0R and kept the capacitor 100nF, measures are good. will propose that to the designer, i can't see any need for them. but i think everyone here think that this circuit should be redesigned properly.

author: splin
author_rank: Frequent Contributor
timestamp: February 02, 2015, 05:54:36 pm
content: Despite what some here have said the input impedance of the ADC *does* cause serious errors - as you have found. (I assume they don't realise that this is a sigma-delta convertor not an SAR). I calculated that if you were using the ADC to read the wiper voltage of a potentiometer wired between Vref and ground, the pot would have to be< 25 ohmsto keep the error to less than 1/2 1 LSB (with the maximum error occurring at 33% of Vref)!Fortunately the errors are calculable so you can easily correct them in software without changing your hardware at all. In fact I don't think I'd change the design at all - it seems to be pretty much spot on.I've attached a spreadsheet to show the errors. Using a gain of 8 provides the best resolution - over 15bits. It does reduce the input impedance of the ADC by 8 but that doesn't matter if you are going to correct the results anyway.R53 does create a significant part of the error but I wouldn't recommend removing it or reducing its value as I guess it's there for protection - presumably the PT1000 is remote from the PCB?The spreadsheet assumes the ADC is converting continuously, which means that the capacitor has no effect on the DC value at the ADC input. If you want to use single, periodic conversions it gets more complicated because the voltage at the ADC input will drop steadily during the 240us of the conversion as charge is removed from C36. Also the starting voltage on C36 will be (R52 * the average current flowing into the ADC) below the PT1000 voltage. No current flows when not converting - and thus the average current is approx Vin/Rain * on/off duty cycle. In between conversions C36 will recharge through R48 and R52 to replace the charge consumed by the ADC during its conversion.The 'VADC scaled' spreadsheet column shows the remaining error after applying a best fit correction between the 0C and 100C endpoints - ie. multiplying the measured value by a scaling value and adding an offset.The chart shows the remaining error and the polynomial you could use if you want to reduce the error further. That's probably not worth bothering with given the integral linearity error of the ADC is specified as 35 LSBs maximum with the gain set at 8 - that effectively reduces your 16 bit ADC to less than 11 bits accuracy before you account for any other error sources including noise, gain drift with temperature etc! The actual input impedance of the ADC will also vary from part to part and to some extent with the input voltage and temperature, but you'd have to characterise those yourself as they aren't specified.The ADC should be configured in 'single ended zero reference mode'. I would also recommend operating the ADC at 6MHz; although the higher clock reduces the input impedance and reduces the resolution slightly it should significantly reduce the ADC noise (the specs don't show the SNR for 1.5MHz and 6MHz with a PGA gain of 8 but at a gain of 1 it improves by 6dB).The spreadsheet assumes the measured temperature range is 0 to 100 - adjust if not but ensure that the 'VADC after gain (V)' values don't go below 0V or above Vref. If they do you may have to adjust R48, but if that isn't sufficient you will have to reduce the PGA gain and thus lose some resolution.Have fun,Splin

author: dannyf
author_rank: Super Contributor
timestamp: February 02, 2015, 06:54:35 pm
content: With no hardware change, it is fairly easy to calculate what the true voltage on the temperature sensor would have been. Only highschool math is needed.

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 02, 2015, 10:26:42 pm
content: Quote from: dannyf on February 02, 2015, 06:54:35 pmthanks for that dannyi did the high school math , the voltage drop depend of temperature but it depend of the precision of those resistance too so it will help to change them to 0.1% ... i already hear him in my mind saying 0.1% resistor are expensive, but yeah you right@splinwow thanks for all thatbut i can't follow in the gain 8 , with such gain the SDADC will give always 2^15the maximum input voltage should be 3.3/gain, so maximum voltage allowed 0.4125

author: Siwastaja
author_rank: Super Contributor
timestamp: February 03, 2015, 09:18:35 am
content: Quote from: splin on February 02, 2015, 05:54:36 pmHow does R53 provide any protection R52 already doesn't?

author: splin
author_rank: Frequent Contributor
timestamp: February 03, 2015, 08:09:18 pm
content: Quote from: Siwastaja on February 03, 2015, 09:18:35 amIt doesn't - I meant to say R52. Presumably the designer had a reason for it but R53 seems to serve no purpose.Quote from: hamdi.tn on February 02, 2015, 10:26:42 pmOops, my bad - in AN4207 "Getting started with STM32F37x/38x SDADC (Sigma-Delta ADC)", the description of Single ended zero reference mode states: 'This mode injects an input common mode of half scale to the ADC...'I took that to mean that the input was centered around Vref/2 - which is odd since (a) its clearly labelled 'zero reference mode' and (b) I looked at the input range in the datasheet the day before!So to get the best resolution R48 would have to be raised to 9K or more, which would have the added benefit of reducing the PT1000 dissipation (but probably irrelevant if it's immersed in water). Leaving R48 at 1K1, the gain would have to be set to 1x.However, to my previous statement 'In fact I don't think I'd change the design at all - it seems to be pretty much spot on', I ought to add the qualifier 'if cost is paramount and moderate accuracy is acceptable'. Your posts led me to believe that this was the case (might not run to a .1% resistor!!).If accuracy is important then the design isn't ideal as the error due to changes in the ADC input impedance could have been avoided. Since it isn't specified you'd have to characterise it to determine if it is significant compared to changes in R48 - a 1% change in Rain of the ADC causes an error of approx .2C.A 0.1% change in R48 creates a temperature error of approx .3C; it's not easy to get reliable figures for the long term drift of low cost resistors, but Susumo 25ppm .1% RG series precision thin film resistors cost $.06 (Digikey) in quantity and specify 'Resistance drift: less than +/-0.1% after 10000 hour accelerated reliability test'. Increase the budget to $0.43 and you can get 10ppm 0.01% Stackpole RNCF series which specify a maximum change of .01% for various 1000hr tests including humidity, load life etc.Whatever resistors are used, you'll have to calibrate the product given the ADC's 3.1% max gain error.What level of precision and accuracy do you need to achieve? How often will it be calibrated?

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 03, 2015, 11:15:48 pm
content: the most important thing :- The measured temperature need to be coherent 1°C error is acceptable as long as this error is the same for all measured temperature ( 6 of them ) , so same error factor is more important than imprecise reading- The client expect to be able to skip the calibration , means that the board must be precise enough just by itself ( i think this will be impossible due to the gain error of the amplifier)so when i talk about using 0.1% for resistor in series with the adc input, am not looking for precise reading as much am looking for equally erroneous reading where i can apply a simple math to correct it ( currently without any calibration and with 1% resistor i get up to 6°C difference between some channel, way to much)Quotewas surprised by that too , i expected the range 0 to VCC will match (0 to 2^16 ) but no it's centred around vcc/2

author: langwadt
author_rank: Super Contributor
timestamp: February 03, 2015, 11:53:59 pm
content: if you can rely on the channels to match just add an extra channel with a fixed precision resistor instead of the PT1000.One problem I've had with PT1000 inputs is that if you don't measure differentially and the impedance to ground and reference isn't similar it is sensitive to common mode noise

author: splin
author_rank: Frequent Contributor
timestamp: February 04, 2015, 06:16:18 pm
content: Quote from: hamdi.tn on February 03, 2015, 11:15:48 pmFor the best match you'd best use just one of the ADCs for all 6 inputs to avoid differences in gain and integral linearity errors between the convertors - that shouldn't be a problem as I understand that all three ADCs have access to all the analog input pins on the processor. Because of the multiplexing though you would still need to use continuous conversion mode after switching channels but you need to wait 10 to 12ms to allow the voltage on C36 to stabilise before using the readings.The mismatch between channels of the same ADC should be minimal, being caused by the difference in the resistance of the multiplexor switches.QuoteThere's no way to avoid calibrating the gain unless you are prepared to accept up to 18C error! Fortunately that should be easy if you have a spare ADC channel to connect to Vref to allow you to read and correct full scale readings periodically. You could calibrate the gain using a 1.1k/1k resistive divider to match R48 and PT1000 which would avoid most of the integral linearity error of the ADC and the error due to the ADC input impedance, but you'd need to use .1% resistors to achieve a worst case gain error of .2C (* but see below).Surely you actually mean R48 when you say'0.1% for resistor in series with the adc input'? R48 is the principle source of error and as you say 1% error in R48 equates to +/-3C so up to 6C between channels.Reaching an overall accuracy requirement of +/- 1C will be tricky, if not impossible, with the current hardware design - don't forget the tolerance and stability of the PT1000 itself. Class B devices have a .3C tolerance at 0C rising to .8C at 100C when new. Although drift is typically fairly low for these devices, OMEGAFILM elements (approx 1$) for example are specified with long term stability of .4% R0 max - i.e. 1C after 1000 hours at 500C. Who knows what it will be for lower temperature excursions over say 5 years? Drift probably won't be linear with time - more likely a function of the square root of time.And then there is the ADC quantization error. Full scale, 3.3V is 65536 counts so 50.4uV per count; however the integral linearity error is up to 23 LSBs or 1.16mV. Given the input range from 0 to 100C is approx 1.56V to 1.81V or 250mV, the ADC can measure to an accuracy of 1.16/250 * 100C = .46C. Increasing R48 and increasing the PGA gain would reduce this.If you don't calibrate out the ADC input impedance error then you're probably looking at large errors due to device to device differences as well as time and temperature drifts.* Using .1% tolerance resistors only specifies their initial tolerance before you solder them onto the board. Stackpole RNCF .1% precision thin film resistors have a specified maximum shift of .2% due to soldering heat (.05% typical) and a .2% max ( <.2% typical) change in a 1000 hour, 70C load life test.Bourns CRT series precision resistor specs are +/- .2% for soldering and +/- .5% for load life! However .05% tolerance resistors are much better specified at .05% and .05% respectively.Again your guess is as good as mine as to how much the resistors actually drift over say 5 or ten years in an environment of << 70C. (But humidity needs to be avoided as thin film resistors can be badly affected).You can do the calculation to work out the worst case total error... Good luck!Splin

author: hamdi.tn
author_rank: Frequent Contributor
timestamp: February 06, 2015, 09:46:14 pm
content: Quotemisleading datasheet again , no every SDADC has his own input pin , can't be mixed ( i checked that with STMcube) , the datasheet make it seem like all 13 input or what ever number can be used in the same SDADC, no they are divided between the 3 sdadc ( 6 input, 4 input and 3 input ) (can be otherway for the 100 pin chip)QuoteR48 is already 0.1% as i said in the first post, i mean R52 and R53 whereQuoteTrue, tested it got better readingQuoteRight, i suggested that to the designer tooThanksThanks for being so helpful to all of you