Efficiency differences between switching regulator designs/toplogies?  - Page 1
Forum section: electronics / beginners

author: LooseJunkHater
author_rank: Frequent Contributor
timestamp: February 14, 2025, 04:58:39 pm
content: For a long time, I've been on-and-off learning about various switching regulator designs/topoligies, with various advantages/disadvantages and use-cases for each. I'd often go back tothiswonderful chart, showing some comparisons between them all, but also doing some additional research on other sites. I've been thinking more and more about thePL5501chip, and I don't really understand it. It's advertised as a "buck boost controller" (in my inexperienced head, it looks like a full/H-bridge), and somehow advertises an efficiency of 92%+ (page 6).How is this possible? Does this mean that other synchronous designs (buck, boost, SEPIC) can also achieve similar efficiencies, if using the optimal controller I.C, proper use of DCM/CCM modes, optimal routing, and component choices? Additionally, is it common for transformer-design switching regulators to actually achieve 90%+ efficiency, or does that mostly just occur with high input voltages and low output voltages (ex. AC-DC switching topologies)?

author: jwet
author_rank: Frequent Contributor
timestamp: February 14, 2025, 05:32:05 pm
content: Almost all switching power supplies are capable of efficiencies in the 90's. There are a few loss mechanisms but with good design and good parts, they all can be minimized. Here's a few tips-1. Those supplies you show all use diodes vs all FET switching. Diodes have a voltage drop. If you rectify a 3.3v signal with a silicon diode (.7v), you'd take a 20+% efficiency hit, with a Schottky (.25v), this would be <10%. With a synchronous rectifier (a FET switch), the hit could be less than a percent. The power supply IC has to have a gate driver for a synchronous FET. Driving the gate of a FET also burns a bit of energy but at reasonable currents it should be small. As the voltage on a supply goes higher, these diodes don't give you such a hit. At 12v, .7v is a less than 10%.2. Inductors have a bit of resistance. In most topologies, you're charging inductors, this isn't lossless. Low resistance inductors use heavy wire etc and cost more. Capacitors also have a bit of resistance (ESR(. Good caps like ceramics cost more but have very low ESR.3. Parts also have AC losses, inductors have eddy currents and caps have similar losses. Better caps, lower losses.4. A synchronous buck converter with nice fets, good inductors and low esr caps are the highest efficiency topology. The current in the inductor average is the same as the output current. These are the supplies used in notebook pc's etc. Forward converters have similar currents.5. Some topologies mainly boost and flyback, push the inductor current to high peak values to store energy. This is how you get boost. These topologies are somewhat less efficient since the inductors and capacitors have to handle more current and losses are I^2 R. What this mean is that you have to use even better passives- L and C.6. Resonant converters get value out operating transistors, L and C's at very efficient points to minimize losses. Valley current swtiching, etc do this stuff. It let's you get good efficiencies without having to use gold plated passives. They are much harder to design but guys like TI are trying to make it easier.You can make power supplies with 99% efficiencies if you throw enough money and time at it. It becomes kind of diminishing returns and usually power supplies in the low 90's strike a nice balance.Edit- I hadn't looked at the PL5501, that is a fully sychronous buck boost. If you look at the your PS cheat cheat, FET's replace diodes in the buck and boost circuits. This is very efficient. The efficiency curves use different scale, you can see that a HV buck mostly is very efficient.

author: LooseJunkHater
author_rank: Frequent Contributor
timestamp: February 14, 2025, 06:23:30 pm
content: Wow that's an amazing response and even answered some other questions that I was thinking of (ex. why buck is more efficient than boost, and why boosting voltages is rarely done in mobile applications).Quote from: jwet on February 14, 2025, 05:32:05 pmAside from the aspect of price + complexity, is it nearly-always more efficient to use a synchronous design, compared to a non-synchronous design? (I know it also matters how the FET-replacing-diode is driven, timing, and many other aspects that effect efficiency). Would a high voltage low current switching design therefore generally prefer a non-synchronous design?Quote from: jwet on February 14, 2025, 05:32:05 pmHaven't looked into resonant converters at all so I may start looking into it!Thank you so much for the thorough response!

author: jwet
author_rank: Frequent Contributor
timestamp: February 14, 2025, 06:37:18 pm
content: Thank me with the thanks button- its my one joy in life.Keep one thing in mind, the whole reason engineers exist is to improve efficiency, this is measured in dollars. Everything is possible and if you're NASA and you just want the best, you go for it, everyone else is trying to optimize efficiency.Your question-For a low current boost to a high voltage like 12v, a synchronous rectifier wouldn't pay for itself. Early PCMCIA cards needed a 12v 50 mA supply, this was done with a non sync boost with a schottky. .25v/12 is a small hit- 3%. Look at the MAX761- (my old employer). This is designed for this app. Efficiency is in the high 80s' but this supply isn't always used so this was deemed adequate. The lower efficiency in these parts is driven mostly by the FET resistance. On chip FETs take up IC area and that expensive. The comprimise was made to use a 1 ohm FET, this is a near 10 % hit but its what customers wanted to pay for the need. The data sheet goes though a lot of his. At the end of the data sheet, there is die plot, you see how much is FET.A lot of this stuff is in inertia and schooling. Few people know all the ins and out of all this stuff and they take a canned design and plop it down. Chip companies have real experts that design these switchers so you can apply them and they work pretty good most of the time. Everything is kind of a rabbit hole though and you might have a requirement for something that isn't off the shelf. Then you have to crack the books.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 14, 2025, 08:40:18 pm
content: Quote from: LooseJunkHater on February 14, 2025, 04:58:39 pmOh wow, this used to be a poster hanging in the EE lab at university, brings back memories.QuoteSo if you go way back, engineers like Middlebrook laid out three basic power stage topologies: buck, boost, and buck-boost. Decades later, some other engineer realized that two half bridges tied together by an inductor could act as either a buck or a boost converter depending on how the FETs are controlled. This engineer decided to call it a buck-boost (or maybe buckboost), despite the fact that their circuit cannot replicate a "true" buck-boost converter. Unfortunately nobody was around to slap the words out of their mouth. Sometimes this is referred to as a "four switch" buck-boost to clear things up.QuoteIMO it doesn't make sense to compare most of these circuits against each other in terms of power efficiency. Choice of circuit is mostly dictated by the intended input/output voltages, and whether you need isolation. For example comparing the efficiency of a boost vs a buck is silly because they're not interchangeable.Another way of looking at it, in the case of synchronous converters, is that a boost and a buck are the same thing, just sending power in opposite directions. Comparing their efficiency still makes no sense.Quote from: LooseJunkHater on February 14, 2025, 06:23:30 pmIf true, I'd wager it's because most modern mobile electronics make use of lithium batteries (3.7-4.2V), whereas all the circuitry they're powering (except maybe the display) uses lower voltages (1-3.3V). Nothing to do with power efficiency, that's for sure.QuoteIn theory adding a synchronous switch to a catch diode should always result in some nonzero improvement in efficiency. But in practice the added cost, complexity, and extra risk of catastrophic failure makes it a bad tradeoff. There's no hard cutoff for where this happens, but I'd wager that synchronous rectifiers are quite rare with output voltage of 48V or greater.QuoteAnother important topology worth being aware of is the phase shifted full bridge (PSFB), which is often compared to the LLC in that if offers very low switching losses, but isn't really a "resonant" converter.

author: PartialDischarge
author_rank: Super Contributor
timestamp: February 15, 2025, 08:15:44 am
content: An important detail of those efficiencies is that they only apply when the converter is working in continuous mode. In disc mode eff goes down, but sometimes it is necessary to operate in that area due to the low load power requirement

author: LooseJunkHater
author_rank: Frequent Contributor
timestamp: February 15, 2025, 04:59:08 pm
content: Quote from: PartialDischarge on February 15, 2025, 08:15:44 amYeah I noticed that in many switching I.C datasheets, as the current output goes down, the efficiency significantly worsens, sometimes below 50%.There's no practical use-case for me to look into this at this time, but I have been curious about whether there are switching I.C's which remain 80%+ efficiency across a wide current range (ex. 1mA-5A). Maybe this just isn't possible however, due to the associated components of the switching regulator (I'm thinking the inductors + resistors would greatly influence the efficiency at lower currents). Anyway lol

author: jwet
author_rank: Frequent Contributor
timestamp: February 15, 2025, 04:59:29 pm
content: Quote from: LooseJunkHater on February 14, 2025, 06:23:30 pmIf true, I'd wager it's because most modern mobile electronics make use of lithium batteries (3.7-4.2V), whereas all the circuitry they're powering (except maybe the display) uses lower voltages (1-3.3V). Nothing to do with power efficiency, that's for sure.>>>I don't know how far you go back but before we had all this single cell PA stuff, phones ran on a 2S stack or 6 NiCd Stack used bucks. The PA ran off the battery and logic volts were bucked down. These could have used a boost but it was messy. Things like 2 way pagers of the day used boosts but used enormous caps to help send the bursty data when required- almost like a photoflash application. The other problem with boosts is that the filter is harder (cap esr demands). If you're powering a PA, that all turns into AM type noise with ugly sidebands, etc.

author: jwet
author_rank: Frequent Contributor
timestamp: February 15, 2025, 05:12:36 pm
content: Quote from: LooseJunkHater on February 15, 2025, 04:59:08 pmThis is a somewhat rare requirement with some exceptions. The chip companies make whatever customers need. The MAX797 is a third generatioin synch buck that did pretty well in this respect.The exception, eluded to above is when uP's sleep etc. Mentioned elsewhere, modern power supplies often go into PFM or skipping modes to maintain efficiencies at light loads. The difficulty of these non continuous modes is ripple and noise.The other thing to wrap your head around is to realize that efficiency isn't so important at light loads, its in the medium and heavy current regimes of operation. If you're 20% efficient at 1 mA, this is much less important efficiencies much less 90 at heavy loads. Notebooks use a linear regulator in deep sleep modes.(they don't put coin cells in notebooks anymore). Of course, there are exceptions, if your whole life is light load except one mode where you're heavy. In this case, you make the supply to have peak efficiency at lower currents and not do so hot at high outputs. Its all engineerging and optimazation.

author: TheoB
author_rank: Regular Contributor
timestamp: February 15, 2025, 05:29:05 pm
content: Efficiency at low load is extremely important for us. I design DCDC converters for IOT chips (transceiver with BLE/Zigbee communication). In sleep these chips consume between 1 and 20uA depending on the amount of ram retained. This current is reduced by a factor 3 using a DCDC converter with an efficiency of 85%. The converter works in discontinuous current mode. A coil is charged and the charge is dumped into the output capacitor. The speed (the frequency) in which this is done depends on the load. 85% efficiency from 1uA to 20mA is achieved in this way.

author: jwet
author_rank: Frequent Contributor
timestamp: February 15, 2025, 05:46:52 pm
content: Gadgets that run at low currents and very low currents like you mention are common today. The OP was talking about a supply that was flat over 6 decades (1 ma to 5a). You can have about three decades anywhere you want them. Its is very cool that you can buck down a sleep current efficiently enough to get the benefit of a buck. Maxim made a bunch of amazing little power chips like this for guys like Garmin for their watches. Check out the data sheets- real exotica. Some of these have heavy RF needs and how they did that is cool. Check out MAX17227A, MAX17291, MAX38911. Some of these are ultra low quiescent linears that have their place when you do the analysis. The currently shipping customs are truly incredible. Other mfgs make these types of parts too.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 16, 2025, 02:15:03 pm
content: Quote from: jwet on February 15, 2025, 04:59:29 pmAgreed, a boost's output ripple would likely be a challenge, especially if older power semis limit your switching frequency to <100kHz and polymer caps weren't a thing yet. My point was that power efficiency wasn't likely a factor.Quote from: LooseJunkHater on February 15, 2025, 04:59:08 pmSure there are ways to get high efficiency over very wide line/load ranges. One chip I use often, the LTC7103, has a max output current of ~2A and maintains >50% efficiency with loads down to 100uA (verified myself). The trick is to use burst mode/pulse skip operation, which inherently results in larger output ripple at light loads (that is, more ripple than an ideal circuit operating at the same line/load, but without burst/pulse skip mode, but not more ripple than operation at heavy loads).The MAX17227A jwet shared has even better light load efficiency. Seems this is made possible by allowing for extra Vout ripple (2.7% of nominal Vout) at very light loads, and in between bursts it reduces its quiescent current to <1uA. Shows how far you can push things when you tailor the chip to a specific application.

author: coppice
author_rank: Super Contributor
timestamp: February 16, 2025, 03:42:13 pm
content: Quote from: jwet on February 15, 2025, 05:46:52 pmGadgets that require really low consumption for 99.99% of the time, as they sit waiting for a signal to spring into action, and then amps for a short burst as they do their thing are getting pretty common. These need good efficiency in the waiting state, but often don't care much about the high consumption efficiency as the high consumption state is such a short burst.

author: schmitt trigger
author_rank: Super Contributor
timestamp: February 16, 2025, 05:12:26 pm
content: In the lab I worked for in the early 2000s we also had that same chart; probably given to us by an Intersil apps engineer, AFAIK.The keywords in the chart are:Typical Efficiency. Just like the specification on an IC, your mileage may vary, by a lot.One thing to remember is that components have improved significantly in these two decades; for instance SiC semiconductors, although available back then, were either too expensive or how to optimally use them wasn't completely understood. At least for us the unwashed masses.Another of the aspects that hasn't been touched in the posts above are snubbers. It is safe to say that a poor snubber implementation can totally disrupt your efficiency goals. Snubbers are wasted energy plain and simple.The first strategy would thus be to minimize the snubber's requirements, or to put it in another way, reduce the amount of leakage energy to be snubbed. How to minimize it? This is similar to reducing EMI, both require a deep understanding of the physics behind it and some black art. A tight PWB layout and tight magnetic coupling for the transformer-based topologies are crucial.Once that you have reduced the energy, then comes the design of the snubber itself. From the basic RCD circuit to very elaborate schemes which re-utilize the energy, this is a whole topic for another thread.