how many X can I drive with a Y - Page 1
Forum section: electronics / beginners

author: djacobow
author_rank: Super Contributor
timestamp: July 10, 2014, 09:55:46 pm
content: I'm fooling around with designing some LED signage driven by TI TLC5921's. I'd like to drive them directly with output pins on a uC, like an AVR (or maybe something else)As the inputs to the 5921 are all CMOS, there is no steady-state current draw, so the maximum DC current capability of whatever is driving them is not a factor in terms, but drive current is obviously a factor for speed.But I'm looking at the datasheet for the 5921 and don't see anything obvious that says what kind of capacitance to expect on the control pins.So, I'm wondering, how to I go about determining if I can drive the parts directly from my uC or if I need to buffer, and if so, how much?I can't see needing to drive SCLK much over 10's or maybe 100's of kHz, and probably won't be able to manage much better with GPIO anyway, so speed doesn't seem like a big issue.Speaking of buffers, what's a good one for this purpose? I don't need tristate.Regards,Dave J

author: XFDDesign
author_rank: Frequent Contributor
timestamp: July 10, 2014, 10:15:01 pm
content: In reviewing the datasheet for the TLC5921, it looks like they spec its performance characteristics:SCLK single mode operation: 20MHz, cascade: 15MHzThe minimum on time is 10ns, and your rise time cannot be longer than 100ns max.For the serial data, it needs at least 5ns setup, and 20ns hold time, so 25ns between changes.This goes plenty faster than a few hundred kHz.The issue with the datasheet is simply that it's somewhere between incomplete and poorly written. They do actually spec a Cl of 15pF, and you have to extrapolate this to also be reflective of the inputs since the devices since it can be cascaded. For speed, it comes down to the fan-out capability of your uC - how many 15pF loads can it drive? You know that the maximum slew is 100ns rise time, so to be good, figure a 10ns rise time into 15pF load you have 1.5mA current requirement. If your uC can drive 10mA, you can either go 6x faster rise time on a single load, or drive 6 devices for the same rise time.

author: djacobow
author_rank: Super Contributor
timestamp: July 10, 2014, 10:25:05 pm
content: OK, thanks. Yes, I did not see the 15pF, and the question is indeed how many 15pF loads can the processor drive.For example, let's say I want to drive 5 strings of 3 of each of these. Well, the serial ins are not problem, but sclk, lat, blank, will all have 15x15pF = 225 pF. Which seems like a lot. Let's add in another 100pF for traces, too.Since the clock needs to be driven faster than 100ns, that seems to be the main factor. Let's target 50ns. So, assuming 5V changes, that's a current ofC dv/dt =~ 325 pF * 5V / 50 ns =~ 33 mA -- that's actually within the capability of, say, an Atmega328, but not by a lot.But is this the only consideration?

author: XFDDesign
author_rank: Frequent Contributor
timestamp: July 10, 2014, 10:59:26 pm
content: I'd be suspicious of the 100pF spec for the traces, if only for the fact that if they're very long, they'll have a particular inductance to make them transmission lines (which means care in dealing with these frequencies).Depending on the density of the parts, I'd omit that as a number.Beyond that, yeah. That's really all there is to it. The switch in the output of the uC has a finite capacity for current, so you'll slew around until you hit the target. The only concerns that might exist come back to the length of those lines - if they're too long, you'll have reflections and other issues to deal with.

author: djacobow
author_rank: Super Contributor
timestamp: July 10, 2014, 11:10:12 pm
content: Hmm, well, some of those traces will be as much as 30 cm -- this intended to be a largish display, so perhaps transmission line effects will be a factor. I guess the way to deal with that is with resistors to ground on the ends. But those will only increase the drive current.Maybe starting to think that a tree and buffers is important, at least for the clock.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 11, 2014, 12:54:31 am
content: Two factors: First, each CMOS input loads the trace with capacitance. If the inputs are spaced more closely than the edge time (e.g., an average 3.3V CMOS logic output is typically good for ~5ns, so, under 10 or 20cm spacing, say), then the effect is a lumped constant-loaded transmission line, so the characteristic impedance and velocity are just lower. To keep the impedance similar, you could use unusually thin traces over extra-thick dielectric, or remove the groundplane underneath, or even add small inductors between taps.Second, the losses are increased, particularly at high frequencies, so the transitions become slower and more rounded off, especially further down the line. Using thinner traces would make things worse.Normally, CMOS outputs are in the 50-100 ohm range, which is convenient for signal quality for the most part, because it roughly source terminates the connection. But this sucks, especially for inputs near the driver: the voltage transitions only half-way until the reflection returns, some 2*T later (for T = electrical length of the line). Even with Schmitt trigger inputs, that kind of stinks.Load termination would be nice, which would involve using a very beefy driver (say 25 ohms or less -- 74ABT family would be good here), a relatively stiff line (minding the effective impedance of course, but not trying to make it extra-high or extra-lossy), and something like an AC termination (R+C) at the end. The resistor will need to be around the line impedance, while the capacitor will be around the total equivalent line capacitance. There will still be overshoot and reflection, but it won't be nearly as bad, and it won't draw DC for your slow signals.If you need to chain signals between boards, I suggest using ribbon cable, with every other line grounded (which, for an IDC style two-row header, you simply ground one entire row). This gives a reasonable impedance, and keeps crosstalk down.Anything up in the range of, like, 3+ m total length, should use a more robust signaling method like RS422 (and yeah, that uses a DC termination resistor).Ideas:http://www.nxp.com/documents/application_note/AN246.pdfTim

author: djacobow
author_rank: Super Contributor
timestamp: July 11, 2014, 08:58:33 am
content: Thanks. guys. This is helpful. Rather than winging it, I can see that if I want long traces driven fast I need to work this out.I slapped together a quick-and-dirty board that is about 18" long and 6" wide and OSH park wants $473 to build that. That's kinda of a showstopper. :-( Seeed won't even go above 30cm. Will have to shop around some, I guess.EDIT: I checked Itead and they'll do it for $125.