What is the best practice for having digital and analog stuff on the same PCB? - Page 1
Forum section: electronics / general

author: K3mHtH
author_rank: Regular Contributor
timestamp: September 15, 2024, 06:19:51 am
content: Hey everyone,I'm designing a board that will have some analog stuff (dc voltage summing, opamps, audio rate signals, etc.) but also a digital microcontroller and associated parts (power supply, crystal, etc).Is there some best-practices for keeping these things isolated, and stopping any digital noise from getting into my analog signals?My PCB is 2-layer. Top layer has signals + ground pour, bottom layer has power, a few signals + ground pour.I was thinking about doing a separate ground pour for the digital section so it's all on it's own digital-ground, that would then be connected to analog ground at a single point. But curious to hear what others have done in the past..

author: madires
author_rank: Super Contributor
timestamp: September 15, 2024, 08:10:20 am
content: Please search YouTube for 'Rick Hartley' and you'll get plenty of answers.

author: coppercone2
author_rank: Super Contributor
timestamp: September 15, 2024, 08:25:28 am
content: I recommend using two PCB's and to connect them with a cableI think its a insane fad from how much difficulty it can cause, or pushed by cost sensitive bosses that know.. nothing of the sensitivities.The design had a cable harness, it was easy to make revision 2 and no one died or worse went bankrupt because of it.

author: tooki
author_rank: Super Contributor
timestamp: September 15, 2024, 08:33:28 am
content: Using a cable can make it worse.I think the easiest measure is to make sure the digital area, with its potentially very high frequency content (due to fast rise times, regardless of clock rates), isn’t emitting/injecting noise: make sure that every signal has a clean, short, uninterrupted return path.

author: Feynman
author_rank: Regular Contributor
timestamp: September 15, 2024, 09:02:58 am
content: One of the keys is component placement. It's generally good advice to have an analog and a digital section on the board with components placed accordingly.Another key is using a solid ground plane as return path. When using a two-layer board, the bottom side should be ground only with as little interruptions as possible. The key thing is, you neither want the signals nor the return paths of digital and analog signals share the same space.If interference between digital and analog is actually a problem (try to quantify this by measurements) and you are having trouble implementing a solid ground plane on a two-layer board, it's probably worth considering a four-layer board. A stack-up that works well as a default is Sig/Pwr - GND - GND - Sig/Pwr. But this might depend on your application.But using a digital and an analog ground on board level is a bad idea 90% percent of the time.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 15, 2024, 09:53:50 am
content: There is a lot of old bad information about doing single-point grounding.This is partly from historical relevance, and partly from lack of understanding (AC is more complicated), and poor communication (poor explanations, poor availability of them, etc.).Back in the vacuum tube days, you might only be concerned with 10s of kHz of bandwidth in an audio circuit; signals very much "stay confined to wires", and routing really doesn't matter. In an RF circuit, low frequency ground-loop error is largely irrelevant, and grounding issues tend not to show up -- or rather, they are experienced as shielding issues, inadvertent coupling between sections; and subsequently, oscillation, or images or spurs in the receiver response.This seems like ancient history, but information filters down slowly through the decades, and many things that get learned, get repeated -- without knowing what assumptions underlie that advice, or what exceptions they may entail.So it is, we have many otherwise-experienced practitioners to this day building nightmare circuits, and with the ever rising bandwidth of semiconductors, it gets harder and harder to ignore these effects. (The most egregious example of this, I think, is probably in the audiophile community -- one built simultaneously upon tradition and novelty, mining the literature, both old and new, looking for every unturned rock; iterating their designs, incorporating components both old and new, trying to improve the experience. The central conceit, is that we can createobjectively near-perfectamplifiers; the search is therefore subjective, and what's being evaluated is not the electrical system thus designed, but ones' experience of it, not just the sound but the experience, indeed even the story of how a given item came to be.)(And to be clear, while this may sound rather critical, harsh, about one group in particular; I temper that by noting, it's simply the human experience. We all do it, to some extent or another, and even the most focused among us, must fall back on some unchecked assumptions, intuitive or emotional feel, or societal "givens", to handle the sheer number of things we interact with throughout the day. You can find such elements -- subjective experience, superstition even -- in any community, in any topic no matter how technical. Indeed, recognizing this behavior I would say is a key critical-thinking skill.)So where are we really coming from?To be clear: star grounding works perfectly fine at DC, where the voltage drops along wires are evident (proportional to current flow and resistance), and keeping them common to a point limits the voltage drops along any given branch to only the current that flows in that branch. Which will be small for most loads, thus the star point can be used as an effective reference.At AC, the voltage drops along those wire links can be almost arbitrarily high. The impedance of a length of wire rises with frequency, and if you go high enough in frequency (100s MHz, GHz), even a short length (10s cm) can have an impedance of 100s ohms, perhaps even kohms at the peaks.100MHz may seem high, but it's a very ordinary harmonic for digital logic these days, and SMPS regularly teeter into that range (or work actively within it, as is the case for GaN power supplies with single-ns risetimes!). Transistors can easily oscillate in that range, or ICs with insufficient supply bypass.The effect is like trying to choreograph an energetic dance on top of a floor of springs and jello.Clearly, this will not work out in general. We need a more solid ground reference. A reference plane.Foundationally -- as a basic premise -- we want a ground plane under all traces, so that subsequent assumptions remain valid.At high frequencies, a signal current (flowing in a trace), induces an image current in the conductors around it (namely, ground plane). This follows the path* of least impedance (the path under the trace), rather than the path* of least resistance (which is taken at DC).Note that "DC" is a context-dependent concept; for typical PCBs, current flow distributes across the plane for some kHz or below, and so for purposes of current distribution, we might consider frequencies below this cutoff as "DC". Conversely, the inductive path dominates above a MHz or so.*Incidentally, "the path of least resistance" is a historical misnomer at best; it should really say "distributed according to resistance of the respective path"; or alternately we understand that "path" is a superposition of all possible paths current can take, and thus a distribution is formed -- not that *the singular path* with the lowest resistance becomes the exclusive path of current flow, that would be... weird.With ground plane under (or around) all traces, we obtain a transmission line structure, thus we have some well-defined propagation velocity and characteristic impedance for every path on the board. This can be used to our advantage, maintaining signal quality, or even constructing filter circuits (typically used in the GHz).Since image currents flow under the respective signal paths, if we keep signal paths separate, we avoid intersecting current loops, and thus avoid introducing interference between loops.We don't have to completely discard the concept of a "star ground". But we must modify it to be compliant with the above requirements.We can have a star topology where there's a central hub, across which all signals are routed (above GND plane), and the spokes are individual sub-circuits (say, a given IC or group of ICs, and related components), laid out on extensions of that ground plane.DO NOTroute signals directly between spokes: in general, the space around the ground plane is full of nasty EMFs (external noise sources, common-mode interference from other current loops within the circuit), and routing a signal through that space induces those noises directly in series with it.Actually going to the trouble of designing a hub-and-spokes PCB, isn't very convenient, or helpful or even meaningful really, and we can morph the topology into a rounded blob (or perhaps more convenient for manufacturing, a rectangle -- which is still "rounder" than a star shape, you'll agree) without significant impact on the EMC (electromagnetic compliance) and signal quality of the design. Indeed it might even be better, as there aren't spokes acting as antennas; the impedance of a blobby board in space is much lower than would-be spokes (at their resonant frequency(ies)), so it's less likely to couple into ambient fields.For purposes of something like a DAQ system, the analog section can simply be laid out in one region, and supply filtering applied at the regional boundary if necessary; the DAC/ADC placed on the boundary; and digital signals entering/exiting from the other side. Do not route traces across the boundary, unless filtered, to slow enough risetime that the resulting displacement current is small with respect to nearby current loops (thus, minimizing interference even at high frequencies). We thus construct a conceptual boundary, not a real physical one; and ground should be poured solid across the board, including under the boundary.(At least for signal quality purposes, we could gather traces together which cross this boundary, and cut slots where traces are not, with little impact on behavior or performance. We do, however, introduce more resonant modes by cutting slots -- again, a spikier, concave-ier shape has more antenna quality than a bulky circuit. There may be sneak paths that couple between ambient fields and internal currents or signals -- supply ripple, or logic signals, or RF, might radiate or receive interference in this way, and it's generally better to avoid those opportunities, by not slotting the plane.)Tim

author: forrestc
author_rank: Unknown
timestamp: September 15, 2024, 10:12:52 am
content: So my opinion:The single best thing you can do to ensure lower noise is to go to a 4 layer board, and don't bother separating grounds between analog and digital. One solid, contiguous ground across the entire board, as layer 2.The price difference nowadays between a 2 and 4 layer board just isn't worth the hassle.As far as beyond that, read the other posts to this topic - I would add the general advice that laying your components out such that you can keep the analog physically away from the digital parts is a good idea. Too many people seem to want to put components where they make sense visually instead of focusing on signal flow. Most of my designs on a 4 layer board end up having very few signals anywhere other than on layer 1 - many could have been done on a 3 layer board if that was a thing. This is because I focus on moving parts around and being willing to revise my schematic/design to simplify routing. For example, something as simple as changing what output or input you use on a microcontroller, or which opamp you use for what in a quad package can cause drastic differences in how big of a mess your board design is.

author: nctnico
author_rank: Super Contributor
timestamp: September 15, 2024, 04:38:08 pm
content: The most basic concept to keep in mind is that current flows in a circle.So when a digital chip outputs a pulse, it will draw the current from the power supply. So make sure to have decoupling capacitance close to the chip and have a filter (like a ferrite bead) in series with the upstream power supply so the loop in which the HF current flows remains contained.But the digital chip is also outputting that pulse so current will flow between the output of the chip, the power supply and ground. This is not much of a problem if the receiver of the pulse is also a digital chip, but if it goes outside the digital circuit, it is nice to limit the current. A series resistor close to the output is a simple measure. Less current can flow and digital noise into the rest of the circuit will be less. Reducing the edge steepness further using an RC filter is an option (up to where the circuit stops working reliably).A very common crossover from digital to analog are ADCs and DACs. I always put relatively high series resistors in series with the digital lines where the resistor is placed closed to the pin driving the signal in order to reduce HF current going back & forth through ground.

author: Neilm
author_rank: Super Contributor
timestamp: September 15, 2024, 06:20:59 pm
content: Quote from: Feynman on September 15, 2024, 09:02:58 amIf your product requires EMC immunity, splitting the GND plane is a bad idea 99 % of the time. The remaining 1 % is needed for safety reasons.I have an electrometer (resolution of 10 attoamps) with FPGAs and the analogue circuiut on one board with one GND plane. Careful placement during board design was the key. I don't remember if it was 4 or 6 layers

author: K3mHtH
author_rank: Regular Contributor
timestamp: September 16, 2024, 06:06:15 am
content: Quote from: nctnico on September 15, 2024, 04:38:08 pmLots of good info here! But just hoping you could clarify where the ferrite filter goes. I have a small LDO regulator (5V to 3.3V) powering the microcontroller w/ 2.2uF and 3x .1uF caps on the 3.3V output. Where should the ferrite go? at the 5V input to the LDO? at the 3.3V output but before the caps? between the caps? after the caps? Thanks for your help!

author: forrestc
author_rank: Unknown
timestamp: September 16, 2024, 07:25:53 am
content: Quote from: K3mHtH on September 16, 2024, 06:06:15 amFerrites are another component that seems to be going away. A common statement nowadays is "the best time to use a ferrite is never". The reason is that adding a ferrite will often cause more problems than they solve. Seehttps://youtu.be/8qVeey-1oF0for a good summary.This is the biggest problem in low-noise design - what used to be a good idea at lower speeds is now a liability, but these rules of thumb seem to persist far beyond their usefulness.

author: AndyC_772
author_rank: Super Contributor
timestamp: September 16, 2024, 07:26:19 am
content: Quote from: forrestc on September 15, 2024, 10:12:52 amThis.The only suggestion I'd add is: don't "go to" a 4 layer board. Instead, treat 4 layers as the absolute, non-negotiable minimum for any board that will have active components on it.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 16, 2024, 12:54:13 pm
content: Quote from: AndyC_772 on September 16, 2024, 07:26:19 amWell, I certainly wouldn't go that extreme. Even for beginners, there is a plethora of simple and low-density circuits that can be done effectively on 2-layer with one side ground plane (minimial i.e. jumper traces routed on it).As soon as you're doing anything in the 10s of MHz (implied: harmonics to low 100s MHz or higher), the value of 4-layer shows up, and doubly so where space is at a premium.I've laid out some "high speed" 2-layer boards myself, for example one display controller with an SDRAM on it; that's something of an extreme case I would say, but commercial examples also exist (at least a few WiFi + Ethernet routers have been observed in 2-layer design!). As you might guess from the latter example -- this is most important in very high quantities, where the tiny cost of that PCB finally starts to matter in terms of production cost optimization.Conversely, indeed the cost for low production / one-offs is far less than the cost in terms of labor (time spent designing and ordering the board); at least for typical (working) people in the western world. Early optimization is the enemy; figure out what you're doing first, and don't sweat the cost.There's always some one-off cost that is worth worrying about, of course, and maybe a $100 order is too much (far too much, even?) for the hobbyist, but so too, companies have blown millions -- oh who am I kidding, billions easily, maybe trillions -- of dollars on boondoggles, whether fruitlessly, or building on the way to an eventual successful product. Focus on the product, it's not the making-of, it's the finished thing you're after.(Well I mean, not to dismiss the value of "the journey is the reward", for any learning experience, particularly hobby level; but that just means factoring in those experiences just as well. And maybe exploring other, far more labor intensive but *perhaps* less costly methods, like hand carving, etching or CNCing your own PCBs. Or maybe it's more costly, but it's an excuse for more toys (like CNC), and maybe that is practical, maybe it's just fun, it's your money to use as you see fit.)Quote from: forrestc on September 16, 2024, 07:25:53 amSupply filtering fits under the umbrella of PDN (power distribution network) analysis. Where you put the ferrites, on or between what, and what values thereof, and what other components you use with them (hint: rarely if ever just slamming down more ceramic caps!), all depends.Some examples:Ferrite beads act like lossy inductors. They're best at medium radio frequencies (10s, 100s MHz), where the modest impedance matches with cable and  antenna impedances, greatly cutting down the Q factor of those structures, flattening and broadening peaks and valleys in the frequency response of the system.For signal (EMI/RFI) filtering purposes, they're best combined with small capacitors (100s pF to few nF), where the resistance acts to dampen cable/capacitor resonances and the inductance (but mostly resistance) provides effective filtering.At low impedances and frequencies, typical of a PDN, they can have a modest Q (>5?), which can create quite the surprise when bypassing around them with high-Q capacitors (read: ceramics). The attenuation is generally quite modest, so they're best used where say 6-20dB is required, and where bulk capacitors can be placed to provide adequate damping.Ferrites saturate at rather modest currents. A typical 100Ω 1206 chip bead might saturate (-30% impedance) at a couple 100 mA. This can make a surprise when using a "3A" ferrite bead (you'd assume it's good for whatever at 3A) forrequiredfiltering, and lo and behold, in the application, you get almost nothing. Reality check is, the rating is ampacity ONLY, a thermal limit unrelated to device characteristics.Type 2 ceramic capacitors are the same way (for identical reasons): value decreases under DC (voltage) bias. Check characteristics (usually available from mfg database).Tim

author: nctnico
author_rank: Super Contributor
timestamp: September 16, 2024, 01:39:52 pm
content: Quote from: K3mHtH on September 16, 2024, 06:06:15 amFirst imagine a section on the board where all the digital stuff goes. The ferrite bead should be on the border of this section. If the 3.3V powers the digital part only, then putting the ferrite bead in the 5V line makes most sense. Keep in mind though that the LDO will need decoupling on inputs and outputs and also check whether the LDO is stable with ceramic capacitors.BTW: Some of the really cheap LDOs need a slow ramp at the input otherwise the output will overshoot massively.