Split a net?? - Page 1
Forum section: electronics / general

author: Joel_l
author_rank: Frequent Contributor
timestamp: February 27, 2018, 01:19:49 am
content: I was playing with the auto router in CS and I came across a situation I wonder if there's a solution for. I'm able to make a net class and assign a width rule to it which the auto router deals with fine. But lets say I have a case where I want a 25mil trace to go to a power pin on an IC, then I need a 6mil trace to take that same rail to another pin. In CS is there a way to split a net so a segment can have a different net name though they are the same net? In Allegro we use what amounts to a null component that has no footprint to split nets.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 27, 2018, 02:01:35 am
content: I forget, did they get rid of From-Tos? That might do what you're looking for.Could also set SMD neck-down rules, not the prettiest (e.g., fat 25 mil trace comes in, necks down to 6 entering the pad, another 6 leaves the pad, poofs up to 25 then immediately back down to 6 entering the next pad over..) but maybe something easy.Also SMD fanout, depending on if that applies to the relevant component types.If you truly want to alter the netlist, you can add net ties to the schematic. Usually represented as zero-ohm jumpers, with a footprint that contains two pads and shorting copper between them. Note that they will cause errors in subsequent netlist checks (PCB fab netlist verification, possibly flying probe assy test).Tim

author: voltsandjolts
author_rank: Unknown
timestamp: February 27, 2018, 08:30:55 am
content: I thought FromTos were just a guide to help you route a specific net, how do they affect trace width rules?I haven't used the autorouter (aren't they all junk on sub 50K$ PCB editors?) but how does it use the trace width rule - If you set preferred width and min/max, does it always use min width, or only where it needs to?

author: Joel_l
author_rank: Frequent Contributor
timestamp: February 27, 2018, 07:46:54 pm
content: What I'm trying to do is not really a matter of trying to neck down or whether it uses min width as needed. Imagine a row of ICs that use say 5V, you have a fat 5V trace that runs to each. On those ICs there's also a pin that needs to be terminated to the 5V but has no real current requirement, a 6mil trace will do. The router will route the trace as 25mils to both pins on each IC, but that uses up space near the IC better suited to other things. A series resistor would do the trick, it's just not needed otherwise.

author: voltsandjolts
author_rank: Unknown
timestamp: February 27, 2018, 09:01:04 pm
content: Quote from: Joel_l on February 27, 2018, 07:46:54 pmBut all your placement should be done before running the autorouter.

author: Joel_l
author_rank: Frequent Contributor
timestamp: February 28, 2018, 01:57:10 am
content: I should have said space better used for other routing. It's also something that could be handled by pre-routing those areas. It's also not a real project, just something I put together to learn the limitations of the router. So far I'm finding it's not horrible for smaller projects.

author: Joel_l
author_rank: Frequent Contributor
timestamp: March 01, 2018, 05:13:54 pm
content: I haven't tried this yet, but it seems there is a feature called a "net tie". So you make a component the width of your trace, two pads, a short between the pads, and give it a property of net tie. I will see if this really works. If it does, then just build a library of different sizes of net ties as the need arises.