H-Bridge gate driver Channels A-B interchangeable for High Low? - Page 1
Forum section: electronics / beginners

author: Doug-c@live.co.uk
author_rank: Newbie
timestamp: May 18, 2025, 02:36:13 pm
content: Hello!I am working on a simple buck converter that has to operate at high temperatures. A good H-Bridge IC that matches my needs is UCC21551 from TI, I want to use it with the MOSFET BSC118N10NS from Infineon. All great However when I got to the stage of PCB layout I realised there is no good way to arrange the footprints that does not require the drive channels to cross IF i follow the application note which uses channel A as the high side bootstrapped drive.So my question is:Can I use CHB as the bootstraped/High drive side?The data sheet doesnot indicate there is any diffrence between the two channelsI like both the driver and MOSFETs so would rather not change at this point but I am quite concerned about noise and such with the current attached configPWM switching freq 200KHzI cant find anything on this question, not sure what to search and just end up getting generic H-Bridge stuff. I also can't see why I could't swap in this case but then that might be a trap someoe with a bit more knowledge might know better?Any input is much appreciated!Datasheets to the offending objects:https://www.ti.com/lit/ds/symlink/ucc21551.pdf?ts=1747224357717&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FUCC21551%253Futm_source%253Dgoogle%2526utm_medium%253Dcpc%2526utm_campaign%253Dapp-null-null-GPN_EN-cpc-pf-google-ww_en_cons%2526utm_content%253DUCC21551%2526ds_k%253DUCC21551%2526DCM%253Dyes%2526gad_source%253D1%2526gad_campaignid%253D1767856010%2526gclid%253DEAIaIQobChMIyYvp8fWijQMVZJGDBx2EOifHEAAYASAAEgKtBPD_BwE%2526gclsrc%253Daw.dshttps://www.infineon.com/dgdl/Infineon-BSC118N10NS-DS-v01_08-en.pdf?fileId=db3a3043163797a6011647fdc2d4071c

author: Doug-c@live.co.uk
author_rank: Newbie
timestamp: May 18, 2025, 02:38:44 pm
content: Oops, sorry. I did not think the image would be that big..

author: Doctorandus_P
author_rank: Super Contributor
timestamp: May 20, 2025, 11:19:26 am
content: Yeah, this forum is a bit buggy concerning pictures.For your circuit. Swap the locations of RG4, RG5 and RG6 with the other three resistors. That also removes the J track going to the inside of the IC. The gap created by removing pin 12 is for "functional Isolation". It's not for routing tracks.In PCB design, footprint placement is one of the most critical issues. Good footprint placement can make routing easy, while bad footprint placement can make your PCB impossible to route.Edit / Addition:Literally the first sentence on the datasheet:QuoteSo that gives you more options to straighten out the footprint placement and track routing.Also, with 4A peak current layout and decoupling capacitors become quite critical

author: tooki
author_rank: Super Contributor
timestamp: May 21, 2025, 03:54:07 pm
content: Quote from: Doug-c@live.co.uk on May 18, 2025, 02:38:44 pmJust edit the post to remove the image tag:Code:[attachimg=1]Without that, the image will change to the end-of-post expandable thumbnail.

author: tooki
author_rank: Super Contributor
timestamp: May 21, 2025, 05:13:04 pm
content: Quote from: Doug-c@live.co.uk on May 18, 2025, 02:36:13 pmA few thoughts and questions:- please supply the actual schematic ofyourcircuit, not just the datasheet's- please supply the overall board layout so that this subcircuit's context is visible- why do you need them crossing over that way? I don't understand that.- is there a reason to deviate so far from TI's recommendations? They have ample resources for this part: recommended layout in the datasheet; the layout of the evaluation board; and a whole application guide with layout and checklist (Excel file).- based on your MOSFET, you don't really need the isolation slot.- I share your suspicion that the two channels are interchangeable, but can't say it with absolute certainty

author: Doug-c@live.co.uk
author_rank: Newbie
timestamp: May 25, 2025, 01:23:59 pm
content: Sorry for the slow response, I am new to this forum and I was checking "my posts" not this threadThank you for the advice! I will implement your suggestion, that would be a better approachQuote from: Doctorandus_P on May 20, 2025, 11:19:26 amyes you are right. I had read that but was not clear exactly what it meant, my paranoia kicked in, pessimistically : both high-side, both low-side, half bridge CHA High CHB low as possible setups OR optimistically if it meant what I hoped: either output can be high or low irrespective of that the other drive is doing. Now when I think about it with the "functional isolation" the latter seems more likelyTo reinforce this, the evaluation board actually does use CHB as the bootstrapped output... I must have missed this the first time. Sorry for using up your time. your advice was still helpful!I already ordered some boards with the bad layout to just see what would happen. If it is total chaos I will post back here as a cautionary tale that you cant get away with such jankey layout.I will re-design with it straightened out and CHB as high side but as this is the first revison there will be a bunch of other changes so I will hold off and hope it functions well enough to test the other bits of the circuit.Quote from: tooki on May 21, 2025, 05:13:04 pmSure, Just be kind in your judgement! I have not tidied and I am sure there are 100 little bad practices..Also this is just a lab prototype so there are no niceties or protections beyond a fuseI don't want them to cross, it is just physical geometry problem. There is not way to arrange the driver and MOSFETs on the same side of the board for a buck type situation without the channels getting crossed (If CHA is the high side) unless I also put a twist into the main power line but I would rather not.I agree, the recommendations are pretty clear, I was trying to follow them as closely as possible, My post was prompted because geometry was forcing me to deviate. I guess they noticed the same problem on the evaluation board and that's why they use CHB as high side contrary to the suggest layout in the datasheet.Yeah, the isolation is kind of redundant in my design, both from the logic signals and between the outputs. Mostly I picked this driver because of other features like the tunable dead time automatic shoothrough protection, automatic off logic, high operational temperature relatively low price etc.. I might try to make better use of the isolation in the future.Interesting that you say the isolation in not necessary based on mosfet choice. Am I right in thinking that you are just observing the voltage in not that high? or is there something else I am unaware of?Again, Thanks for the help! I am in better place now

author: Doug-c@live.co.uk
author_rank: Newbie
timestamp: May 25, 2025, 01:35:13 pm
content: Hmm my gerber upload failed. Hopefully this screenshot is good enough