Searching modern MCU with a (classic) 8bit I/O bus - Page 1
Forum section: electronics / general

author: DC1MC
author_rank: Super Contributor
timestamp: August 02, 2018, 11:08:28 am
content: Hello, for a project that needs to interface some vintage chips and a bit of SRAM I need a reasonable modern MCU that has an 8bit parallel bus, practically a Z80 on steroids.Sadly the Z80 successors are not doing very well and I was wondering if there is some device cheap and readily available that has such a bus, of course I can implement some crappy bit-banging re-purposed GPIOs, but would prefer something that has this bus memory mapped.Any suggestion is well appreciated.Cheers,DC1MC

author: JPortici
author_rank: Super Contributor
timestamp: August 02, 2018, 11:16:32 am
content: Although i have never used the parallel bus aside from communicating with displays, you can find it on almost any MCU you can think of with more than 40pins, 8 16 or 32 bit

author: newbrain
author_rank: Super Contributor
timestamp: August 02, 2018, 11:26:46 am
content: As JPortici says (ninjaed...), many MCUs include an external memory controller.First to come to mind: LPC43xx from NXP (144 pin and above) and STM32F1, F4 and F7 (possibly others).LPCs are also, IIRC, able to boot from external memory.For STM32Fx, search from FMC or FSMC in the selection charts.EtA: and PSoC, of course, very useful with old stuff, given it can run at 5V!

author: digsys
author_rank: Unknown
timestamp: August 02, 2018, 11:27:34 am
content: As mentioned, most (all?) will do that. My current favourite series , which is C8051 based - similar to the Z80 is -https://www.silabs.com/products/mcu/8-bitNot only have extended addressing, but some have IRQ triggers on the IO - a very handy feature. Plus heaps of other niceties !

author: JPortici
author_rank: Super Contributor
timestamp: August 02, 2018, 11:47:24 am
content: Yes, i haven't mentioned any particular MCU because i'm not sure which one will map the external bus on memory (possibly all? surely STM32 with FSMC and PIC32. In those once you set up the peripheral you should be able to declare variables in the external bus space and perform read/writes as if they were in the internal memory, but i have never had to do it myself)

author: iMo
author_rank: Super Contributor
timestamp: August 02, 2018, 12:08:16 pm
content: I've done it with stm32 (stm32F103ZE, stm32F407ZE, wired to 256k x 16 10ns SRAM) and it works. You get 4 linear memory segments with 256MB space in each.The access to the external memory space is much slower than into the internal memory, however. Also it works best with 16bit data bus, but 8bit is possible as well, imo.STM32 can execute (run the binary) off the external memory wired via FSMC (proven as well).PIC32MX cannot execute off the external memory.PIC32MZ - not sure it can execute off the external memory.Long time back I messed with Dallas (Maxim) DS80Cxxx (8051, 1 clock, 33MHz) and based on the compiler (Keil or IAR) you may address megabytes of the external space (not linear, segmented, complicated).

author: andersm
author_rank: Super Contributor
timestamp: August 02, 2018, 12:29:57 pm
content: Quote from: imo on August 02, 2018, 12:08:16 pmThere's no PIC32MX with an external bus, there's only a parallel memory port (PMP). The PIC32MZ shouldn't have any problems, though performance may suffer.

author: iMo
author_rank: Super Contributor
timestamp: August 02, 2018, 12:37:45 pm
content: QuoteI've got this gadgethttps://majenko.co.uk/product/chipkit-pro-mzso I will try soon.. Never seen a practical example PIC32MZ can execute off the external ram. Btw, there is a PIC32MZ version with xxMB of sdram piggy-backed on the MZ chip (a sandwich). MChip mostly claims it is for data buffering only.

author: iMo
author_rank: Super Contributor
timestamp: August 02, 2018, 12:49:00 pm
content: Quote from: imo on August 02, 2018, 12:08:16 pmFYI - STM32 - when the external memory space is used for Heap, the performance with memory intensive benchmark I did (bubble sort, quick sort) is ~3x slower than with internal sram.When running binary off the external sram, the performance is 8-10x slower.All done with 10ns sram, fastest FSMC settings, 16bit wide data bus.You may extrapolate how will be the performance of 8bit peripherals wired to such an 8bit bus.

author: TassiloH
author_rank: Regular Contributor
timestamp: August 02, 2018, 12:57:31 pm
content: Previous posters have already mentioned the STM32Fxxx ARM controllers and its FMC/FSMC peripheral. Just one caveat: At least for the STM32F4xxx, the memory controller does not provide full flexibility regarding the data setup or hold times (I forgot which one), when writing to an external chip one of these times is basically zero which some external devices might not like.

author: iMo
author_rank: Super Contributor
timestamp: August 02, 2018, 01:08:33 pm
content: With f103 f407 you can set both times none zero.Btw, with retro/vintage peripherals (ie. 8255 6821, and others) you have to set the FSMC speed so slow that any benchmarks above are not applicableMind the clock with the slowest stm32f103 is 13ns and F407 is 6ns. Old 8bit peripherals were with 100-500ns access times..PS: the FSMC bus with stm32 is fully supported with 144pin chip variants only..

author: Dielectric
author_rank: Regular Contributor
timestamp: August 02, 2018, 02:14:48 pm
content: The Cypress FX2LP has a "GPIF" that is basically a configurable memory interface, complete with chip enables, address and data lines, etc. 8051DP inside, and apparently people are using it with SDCC these days instead of the very old and limited Keil compiler in the official SDK. You can ignore the USB subsytem entirely if you don't need it.All of the cheapo logic analyzers use the GPIF as the capture inputs, so for a little bit of money you could prototype with one of those.

author: TassiloH
author_rank: Regular Contributor
timestamp: August 02, 2018, 04:46:52 pm
content: Quote from: imo on August 02, 2018, 01:08:33 pmOops, sorry, my fault, my memory served me wrong. I looked up the old project where this was an issue, and the problem was with the timing of address valid and write signals using a multiplexed bus (no delay between them, whereas an 8051 as a few hundred ns between deasserting ALE and asserting WR).

author: DC1MC
author_rank: Super Contributor
timestamp: August 02, 2018, 04:53:52 pm
content: Thanks all for the suggestions so far, more are welcome.Some clarifications:- Indeed the peripherals are old, so I need a MCU where the bus speed/timing can be set, this is of the utmost importance !!!- As I'm using the external RAM for data storage there is no problem if the access speed is very low compared with the internal memory.- Other peripheral hooked on the bus are also very slow, as someone said, in the 500us range.If any of the above mentioned MCUs fit the bill, please confirm, I already know and use the FX2, but making a bus from his endpoint RAM and GPIF state machine is a pain.Many thanks,DC1MC

author: iMo
author_rank: Super Contributor
timestamp: August 02, 2018, 06:56:33 pm
content: QuoteThe stm32xxxx in 144pin (full FSMC bus supported) can do that, afaik, not sure with your 500us (do you really mean microseconds??, core rope memory??) as the number of waitstates in the FSMC bus settings is limited in sizeYou may review the stm32 refman on this, the external memory space is fully transparent to the code, the external bus architecture seems to be 1:1 with typical peripherals (8b/16b/sram), it does 32bit access as well of course (in two steps automatically). To me it looked fully transparent. Not tested with 8080/6800 like devices.You have to double-check, however

author: westfw
author_rank: Super Contributor
timestamp: August 03, 2018, 07:32:24 pm
content: The larger AVR chips have an external memory bus. You can get 512 kbyte add on cards for your Arduino mega...

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: August 03, 2018, 11:06:46 pm
content: Quote from: DC1MC on August 02, 2018, 11:08:28 amWhat is the project and why does it need external SRAM?

author: DC1MC
author_rank: Super Contributor
timestamp: August 04, 2018, 04:21:52 am
content: I think it will be useful and bring more good ideas if I clarify a bit more the scope of my project, so here it is:- I don't need hook actual SRAM as program or data storage memory, but I want an EMI/EMIF or whatever the marketing is calling now these external memory interfaces to be as close as possible (some glue logic may be needed) to those 6800/Z80 interfaces, practically address bus, bidirectional data bus and some RD/-WR or similar signals. A kind of request/ready signal will also be appreciated, the things I want to drive are really slow.I wish to avoid any kind of demultiplexing or the need to add too much glue logic for the proper implementation.- Why do I need such a bus: I have a lot of vintage and without modern equivalent devices that are designed for such a bus, and while of course I can do bit banging, reprogram the GPIO pins direction and other RPi/Arduino pfuscherai , I find these solutions disgusting and wish to avoid them if possible.- Yes, yes, but what EXACTLY obsolete chips are these, so I can tell you that is all wrong, you don't do this you do it otherwise, "...user asks how to do X, but he actually needs to do Y and he (wrongly) believes he need to do X to get Y,...", we've al seen the lame xkcwhatever lame cartoon...- Still, what are you trying to accomplish, tell us?OK, here it is, I want to rape, plunder and destroy some wonderful vintage (but dead) TE and replace the anemic digital part with a bit less obsolete equivalent, getting rid of some unobtanium stuff in the process.This is one of the main applications that I have in mind along others.So after reading this you can actually recommend a modern MCU that fits the bill and is still average human solderable (no BGA or ultrafine flat pack), please let me know. Some of the proposed MCUs do look good, but more options the merrier.Thanks and cheers,DC1MC

author: DC1MC
author_rank: Super Contributor
timestamp: August 04, 2018, 08:17:44 am
content: Update: after mulling trough the options it seems that ST Micro series with FMC/FSMC is the answer for my quest.I consider ordering a ST NUCLEO-H743ZI that seems to have the necessary MCU on it and the signals for the bus that I want to implement.Some more questions for the experienced STM guys:- What is the best C development environment, eventually one integrated, or that can use, the headers generated by the configuration tool ?- What little OS do you recommend, ChibiOS, Azure, something else ?- Is there a tutorial/AN focusing on 8080/6800 bus implementation, so far I've only seen some LCD panel examples, a bit thin information ?- I've seen the above mentioned boards at real inflated prices at-bay and friends, but Digikey has them in stock for a good price, does anybody in Germany wants to make a shared order to cover for the Digikey shipping costs ?Cheers,DC1MC

author: iMo
author_rank: Super Contributor
timestamp: August 04, 2018, 09:57:05 am
content: There are $12 (postage incl.) boards with stm32F103ZET or F407ZET (144pins chip packages) available, so when you've got no experience with these, do start rather small.. (EDIT: you would need a $2 ST_Link programmer as well). When all works fine then you may switch to a stm32H7, sureThese stm32 (and all ARM/MIPS based MCUs) know the "memory access" only, so all your vintage peripherals will be "memory mapped". Consider this when thinking on actual wiring. (EDIT: it means when we talk about working with an external sram memory, or 8255 PIO, it is the same story..)Important:in case your vintage parts are 5V then you have to double-check whether the MCU's buses are fully "5V tolerant" otherwise you need voltage level translators. All modern MCU's are 3.3V I/O with some pins "5V tolerant".EDIT: 5V tolerance is about MCU's "input", the MCU's output signalling will stay 0/3.3V (EDIT: double-check whether your vintage peripherals are happy with log1=3.3V at their inputs, itmaywork fine).Development tools: that would be a pretty wide topic with a lot of posts, unless you tell us what is your actual experience with sw development in that area..

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 04, 2018, 12:38:05 pm
content: If you are only replacing the CPU inside a device without bus mastering, then most any MCU will do. Drive bus signals from GPIOs -- not nearly as elegant as a single OUT or MOV instruction, sadly, but when all timing is yours, you get to set the pace!If you do have to deal with bus mastering, and WAITs and all that, you may be able to hack in (predict?) delays specific to certain devices. That's more or less how this worked:Which still didn't work out all that well in the end; it could probably be made much better, but this clearly shows the time-value tradeoff to such hacks.Else, you may find it's far more cost effective (in terms of dev time and hair pulled, but probably parts cost or dev kits, too) to use a small FPGA as a bus controller. How you organize the interface side is up to you; it could be a buffered queue of inputs and outputs to be handled by an MCU, or a shared memory space (accessible at the MCU's leisure), or little more than the combinatorial logic necessary to hold up the bus while the MCU collects its thoughts (so to speak). Which could be a conventional GPIO interface from the MCU, or one of those FSMC things (in which case the FPGA simply extends the bus signals and timing as needed).Tim

author: iMo
author_rank: Super Contributor
timestamp: August 04, 2018, 12:55:37 pm
content: QuoteHe could go with much sexier roadmap - a full FPGA road, the cheapest variant - for example - an Spartan6 LX6 or LX15 ($15 boards) with MicroBlaze MCU (32bit MCU, similar to MIPS, 4x32bit gpios, fully integrated C based SDK, all in one in ISE 14.7, yes - EOL, but still works great on Win7).Or, $50 Artix7-35 boards, Vivado, with Microblaze CPU, or any 8/16bitters from last century (OpenCores are full of those 8/16bitter vhdl/verilog sources). Or NIOS with ALtera, etc.To be really "retro/vintage" he may go with PDP-8 (LX6 is ok) or PDP-11/70 (Artix7-35 best, optional FPU fits too, afaik).Still mind the older vintage parts are usually 5Volt devices.

author: DC1MC
author_rank: Super Contributor
timestamp: August 04, 2018, 01:01:16 pm
content: @imo: Why should I start low, the NUCLEO-H743ZI is 21USD at Digikey, the extra power compared with the Fxxx... series is significant and the extra cost is not.Also about the bus levels, there will be no direct connection joy and happiness, sadly I don't have anything, from the things want to drive, that is even close to 3V3, the lowest is 5V and I have weird levels as -15V, +15V, +7V and other oddities imagined by our smart MOS/BIMOS/ECL and other technologies ancestors.So one of the first important tasks is to have an universal level translator "shield", a bit of an issue especially for the bidirectional part, but challenge accepted and suggestions welcome-, opamps included.The fact that all will be memory mapped, if fills me of joy.@Teslacoil - so far, the DMA issue is for the second stage of development, now I have some nice ancient multimeters that don't do DMA AFAIK, it will be my first victim.I would love to have a Z80/6800 like front-end implemented in a small Lattice FPGA or XILINX CPLD, with the whole control signals set as well, the MCU interface could be whatever or even SPIat the speeds involved, sadly I don't know shit about digital design with FPGA and is a bit late to learn, maybe sometimes, somebody, will do such a shield with the proper logic levels to just stick it instead of the CPU, looking at the crap that gets funded on Kickstarter will not be such a bad idea.In the end still wating for your best IDE/Compiler/Pin matrix programmer combo for the STM and suggestions about some 3v3 input to positive or negative logic level shifters.Cheers,DC1MC

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 04, 2018, 01:05:17 pm
content: Quote from: imo on August 04, 2018, 12:55:37 pmYeah, you get a shitton more functionality (>5k gates?), enough to build a softcore -- or just get one with a hardcore alongside -- for just a few bucks more in FPGAland.Bonus, even the dumbest softcores are usually capable of running stupidly faster than their original namesakes. I recall an array of 8051s (as a flow computer I think) running at 170MHz, in one example.Troubles notwithstanding in both Altera and Xilinx tools, of course. Maybe you'd find a familiar MCU easier to work with; but then, you do need to manage the bus between them, and maybe that's easier with an integrated core.But hey, this is a nontrivial problem, it should be no surprise that there is no slam-dunk ready-made solution for it.QuoteOh yeah, good point. 74LS TTL might be okay on a 3.3V platform, but anything with HC CMOS at 5V will blow that away. Maybe not literally, if it's got "5V tolerant" inputs -- but the equipment better have TTL level receivers to read those 3.3V outputs, else you're going to have atonof fun resolving marginal logic-high levels over temperature and aging!If you need true 5V compatibility, that may end up as annoying as the interface itself. Not because of complexity but just because you need thirty of the stupid things.

author: iMo
author_rank: Super Contributor
timestamp: August 04, 2018, 01:26:46 pm
content: I've seen somewhere some "newer" MCUs for automotive, designed for 5Volt. I cannot remember which one. One needs to google.. Freescale?? Renesas??Edit:https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/kinetis-cortex-m-mcus/e-series5v-robustm0-plus-m4:KINETIS_E_SERIESPS: no idea whether they posses an "FSMC-like" bus..

author: mac.6
author_rank: Regular Contributor
timestamp: August 06, 2018, 02:32:28 pm
content: On kinetis family it's called FlexBus (see AN4393).

author: mubes
author_rank: Regular Contributor
timestamp: August 09, 2018, 07:02:07 pm
content: I'd take a look at the IMX-RT stuff from NXP (nee Freescale). Nice M7 CPU, 256K of RAM (if you choose the baby brothers of the range, available in FPGA rather than BGA), decent perhiperals and very flexible memory interfaces...you can run all your code on the new beast and just talk to the old stuff for integration purposes. Your legacy bus is going to be so slow by modern standards that the first thing to check up on datasheet wise is if the external interfaces will slow down enough!RegardsDAVE

author: bingo600
author_rank: Super Contributor
timestamp: August 09, 2018, 08:16:37 pm
content: IMHO ATMega162 in a 40-pin DIP would be the closest Z80 lookalike (5v compatible,DIP etc...)But only 16K internal flash for program , and not possible to use external flash for program code.https://www.microchip.com/wwwproducts/en/atmega162But I'd prob go for an arduino Mega as westfw suggested , primarily due to the extra pins , and more flashBut if you want to be fast or have > 64KB Memory go for ARM/Bingo

author: andersm
author_rank: Super Contributor
timestamp: August 09, 2018, 09:43:54 pm
content: Quote from: bingo600 on August 09, 2018, 08:16:37 pmThe instruction set of Renesas' RL78 series is very close to the Z80, but they do not have an external bus. The do scale from small 1K flash parts all the say up to 512K, and pin counts ranging from 10 to 144.

author: thermistor-guy
author_rank: Frequent Contributor
timestamp: August 10, 2018, 01:05:03 am
content: Quote from: DC1MC on August 02, 2018, 11:08:28 amLike one other poster above, I like the 80C51 family and its many variants.You could look at SiLabs as a source. But there is also Rochester Electronics, which takes over many popular chips after they have reached normal EOL:https://www.rocelec.com/search?searchType=part&q=80c51Rochester has DIP40, PLCC44, and VQFP44 Atmel 80C51s in stock.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 28, 2018, 03:46:29 am
content: Quote from: DC1MC on August 04, 2018, 01:01:16 pmNeeding to have Logic shifters sounds like a pain, on a Data BUS interface.If you do need those, something like SN74LVC8T245, hasdual supplies, so generates a proper, fast logic hi on both sides.An alternative could be a MCU part like STC8F/STC8A series, that's 5V operating, so does not need shifters.https://lcsc.com/products/STC_507.html?q=sTC8fwhich have an ALE/RDN/WRN pins and MOVX opcodes, supporting 64K Bytes of External Memory Map.Data says there are 4 speed choices on ALE/BUS setup/hold of 1/2/4/8 SysClks, so it can go quite slow, but the CPU is faster than a venerable Z80.

author: rstofer
author_rank: Super Contributor
timestamp: August 30, 2018, 09:09:08 pm
content: I don't know why you would overlook the Zilog EZ80. It runs at 50 MHz and can address a ton of external memory. I bought one of the boards and built a daughter card for a Compact Flash and a couple of Serial<->USB ports. I now have a 50 MHz CP/M machine and it really rips.https://zilog.com/index.php?option=com_product&task=product&businessLine=1&id=77&parent_id=77&Itemid=57I used EZ80-F91 which is Ethernet capable. I didn't implement networking.Development Kit (with Miniboard)https://zilog.com/index.php?option=com_product&task=dev_tool_detail&DevToolKit=eZ80F910200KITGThe module itself is $45https://www.mouser.com/ProductDetail/ZiLOG/EZ80F915005MODG?qs=sGAEpiMZZMs64UhKbFbscbRWLT2XOcn84MaByIK211E%3dDatasheet for module:https://www.mouser.com/datasheet/2/450/ps0236-24729.pdfThe development kit is $100https://www.mouser.com/ProductDetail/ZiLOG/EZ80F910200KITG?qs=%2fha2pyFadugetcl9SiKrLhDU5wGisctBoZZrphgvt3YG5MdSkwZeqg%3d%3dDid I mention that this system rips?

author: rsjsouza
author_rank: Super Contributor
timestamp: August 30, 2018, 09:11:30 pm
content: I haven't seen it mentioned here, but some of thelarger TM4C devicesfrom TI have a peripheral calledExternal Peripheral Interface (EPI)which can be used with 8/16/32-bit SRAM, but I have never used it so I can't comment on its implementation details.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: August 31, 2018, 12:39:36 am
content: Quote from: rstofer on August 30, 2018, 09:09:08 pmMaybe this is the reason ?3.3V power supplybut to replace an older Z80 system it does have appeal, even with added level translators

author: thermistor-guy
author_rank: Frequent Contributor
timestamp: August 31, 2018, 12:51:46 am
content: Quote from: rstofer on August 30, 2018, 09:09:08 pmZilog also has an 8051 family, which I wasn't aware of:https://zilog.com/index.php?option=com_product&task=product&businessLine=1&id=164&parent_id=164&Itemid=16002

author: DC1MC
author_rank: Super Contributor
timestamp: September 02, 2018, 01:33:31 pm
content: Hello and thanks for all the valuable contributions, much appreciated.The project isn't abandoned or dead, I'm just waiting for the dev board that I've selected, it's a NUCLEO-H743ZI.Because I want to replace the existing logic boards on some rather old but good DMMs and add a bajillion of new functions, I need a CPU/RAM massively bigger than the original 6800 and friends.I wanted so much to make a 6800/Z80 to SPI bus emulator with a small FPGA/CPLD, but sadly while I can design it, I don't have enough knowledge to do the development of the HDL code.If I've had such a device, with a 25-50MHz (Q)SPI on one side and 5V 6800/Z08 compatible bus on the other (interrupts included), then the <Fruit>Pi devices (or any other Linux dev board) would have been perfect for the job with tons of cool features to be added, like massive logging capacity, LXI network interface, USB/Ethernet/Serial/Bluetooth connectivity, improved algorithms, both for measurement and math ops, functions not available in that specific model (sorting components in given limits, temperature measurement with auto adjusting drift, real big fat linearization/calibration tables, alarms, etc.)But then I don't have it, is just an idea, so I have to try to do with what is available.Cheers,DC1MC

author: technix
author_rank: Super Contributor
timestamp: September 02, 2018, 03:59:00 pm
content: Just to throw it out here: PIC32MZ DA series. If you went with the internal DRAM version and add in some kind of high capacity external storage (e.g. a microSD card on the SDMMC interface) you get what is effectively a Linux box that has an exposed external bus interface. Now you can just program using the regular Linux tools (device memory can be directly accessed through mmap() on /dev/mem) and access it as if it is yet another node on your network.

author: legacy
author_rank: Super Contributor
timestamp: September 02, 2018, 05:24:00 pm
content: Quote from: technix on September 02, 2018, 03:59:00 pmhaven't yet checked the datasheet, what about the TLB (MMU)? is it fully supported?personally, I believe ucOS/2/3 is more appropriate for the embedded stuff than Linux

author: iMo
author_rank: Super Contributor
timestamp: September 02, 2018, 06:30:16 pm
content: Quote from: technix on September 02, 2018, 03:59:00 pmDoes the MZ DA support the execution out of the DRAM??

author: rstofer
author_rank: Super Contributor
timestamp: September 02, 2018, 07:09:18 pm
content: Quote from: DC1MC on September 02, 2018, 01:33:31 pmIt's not that hard! You need to expose a parallel interface and a couple of registers, a bidirectional status register and a bidirectional data register (which don't need to be actually bidirectional inside the CPLD, they just look that way from the outside) and a simple state machine that recognizes that data has been loaded into the data register, sets a status bit to indicate 'busy' and shifts the data out while simultaneously shifting the incoming bits in to the data register.There are a lot of examples on OpenCores. Probably none that are exactly right but they provide a start.As to SPI itself, FTDI makes a device that does USB -> SPI (among other protocols). I'm pretty sure there is a Linux driver for the PI.http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT4222H.pdfThey even have a pre-built cable:http://www.ftdichip.com/Products/Cables/USBMPSSE.htm

author: technix
author_rank: Super Contributor
timestamp: September 02, 2018, 07:21:33 pm
content: Quote from: legacy on September 02, 2018, 05:24:00 pmIt is that TLB MMU that made the PIC32MZ DA series Linux compatible. Microchip has upstreamed the kernel and u-boot, just grab the code, compile using stock Linux MIPS GCC (not XC32) and enjoy. U-boot and its configuration data goes to the internal Flash, and kernel goes to the external storage device. Since that chip also has Ethernet you can also build u-boot to do PXE.Quote from: imo on September 02, 2018, 06:30:16 pmIt does. AFAIK PIC32 always allowed executing from RAM as long as the MPU is set up properly, and on this chip it is the MMU that need to be set up correctly. U-boot bootloader will do that for you, if you used that to boot up Linux kernel. Having only 32MB RAM does make it a tight fit though, although if you went with the BGA288 version you can go with your own DDR2 memory chip, up to 128MB.

author: technix
author_rank: Super Contributor
timestamp: September 02, 2018, 07:37:13 pm
content: If you really dare, there is a chip, CH367, that gives you a 8-bit I/O bus from a PCI-Express x1 interface. Using this chip you can build a CH367 card for your PC, and a external breakout box that gives you the interfaces you need.

author: iMo
author_rank: Super Contributor
timestamp: September 02, 2018, 07:41:07 pm
content: Quote from: technix on September 02, 2018, 07:21:33 pmDouble check that.. Afaik the DRAM in MZDA is intended for buffering the graphics only..Quote

author: technix
author_rank: Super Contributor
timestamp: September 02, 2018, 08:36:45 pm
content: Quote from: imo on September 02, 2018, 07:41:07 pmPage 51 of thedatasheet: there is an MMU on the chip. You just turn on code execution in the MMU and you get DDR code execution.If you still feel dubious, I might trying to request some samples of PIC32MZ2064DAH176, just so I can build a board with the sole intention of running Linux on it.

author: DC1MC
author_rank: Super Contributor
timestamp: September 02, 2018, 09:16:08 pm
content: Quote from: technix on September 02, 2018, 07:37:13 pmWell, I've searched for it and found it, I've even triggered a google warning that I may be a robot, the chip looks really nice and the Aliexpress board is moderatly priced, it emulates nicely an ISA bus.If I really get some old 8-bit ISA card that I need to use, this will be my first choice, it's nice that it exists.Too bad it has only a few bits of address, it would have been a step in the right direction for me.Thanks for the suggestion,DC1MCCheers,DC1MC

author: DC1MC
author_rank: Super Contributor
timestamp: September 02, 2018, 09:34:40 pm
content: Quote from: rstofer on September 02, 2018, 07:09:18 pmYes, for an experienced digital designer it's not an issue, more like of a piece of cake project, the stuff from open cores is good for the MCU interface ( all those bus states and IRQ/NMI stuff) and one has to add the logic that you've described and the ser/des for the SPI.Sadly, I know enough to know that I don't know enough to do it myself, but if there are any takers, I can assist with the concept, schematic design and of course testing suite with whatever fruitPi or even SPI/USB cable for PC usage.This thing should be able to emulate whatever 8 bit MCU from the series, besides doing completely new and unexpected things with the poor bus.Oh well, I don't think I see it on the Kickstarter very soon, and I can only sponsor very marginally the project, with some German beer and tasty sausage stuff but few euros, if anybody wants to work for these peanuts, let me know.Cheers,DC1MC

author: rstofer
author_rank: Super Contributor
timestamp: September 02, 2018, 10:06:40 pm
content: BTW, the T80 project at OpenCores is an excellent Z80 core. I use it for a PacMan game I built a long time back. I used it about 10 years back to build a general purpose CP/M machine. Time flies, it may have been farther back.So, the parallel port interface can be ripped from the T80 core and there are dozens of SPI cores.Yes, you need to know how state machines work.Pretend you had 16 console entry switches on an old IBM 1130 computer (a 16 bit machine now implemented in an FPGA) and suppose you had them hooked up to a Microchip MCP23S17 SPI port expander. You would want to continually scan the switches but to do that you first have to send a command and set up some registers.http://ibm1130.org/hw/cpu/Attached is one approach that is known to work. On the 1130, there is an instruction to read the switches into the accumulator so the interface between the switches and the core is quite simple. Every other device (card reader, typewriter, keyboard, disk, printer and plotter) use a DMA channel. The interface is a little more complex (but duplicated 6 times).See attached CES.txt, a copy of CES.vhd but renamed for the forum.Yes, you need to understand state machines but I always think of them as the game "Simon Says". You can only change state when "Simon Says" and some condition is now true.It isn't that hard! It was, OTOH, a learning experience.It's regrettable that between the forum text handling and the vagaries of the Xilinx ISE editor that things don't line up properly. I did put in the CR/LF chars that are not included with the ISE editor. You can mess around and make the code look pretty if you have an interest.

author: rstofer
author_rank: Super Contributor
timestamp: September 02, 2018, 11:19:41 pm
content: Quote from: DC1MC on September 02, 2018, 09:34:40 pmI was stationed in Mannheim back in '66-'67 and I really like Dinkelacker beer.If you take a step back, you might find that it's time to learn about FPGAs. Not only can you implement known blocks such as CPUs and predefined peripherals, there is no reason you can't add just anything you want.You need to think of the modern FPGA as a virtual dumpster full of logic chips. You can make anything you want as long as it is digital (and that restriction is going away). Sure, it takes time and effort to learn the skills but it really isn't that hard. First you blink an LED and then you implement a CPU - pretty much just like that. Yes, it's helpful if you have a background in logic design but I don't think it is an absolute requirement. There are some excellent texts that take you through the design of a modern CPU like a MIPS or ARM.This book goes from zero to a complete uC - the famous LC-3 project that you can find all over the Internet"Introduction to Computing Systems" by Patt and Patel I really like this project. Among other things the state machine is all laid out, all you have to do is write the code. If you search Google for 'LC-3' or 'LC-3b' you will find all of the required material to implement the CPU and, better yet, the C compiler and assembler. A great learning project!http://highered.mheducation.com/sites/0072467509/student_view0/c_to_lc-3_compiler.htmlHere's the more current document for the 'b' version which adds some 8 bit data handling:http://users.ece.utexas.edu/~patt/09s.360N/handouts/new_byte.pdfHere are two books (one MIPS and one ARM) that have a ton of VHDL and Verilog code. In fact, a complete CPU is completely coded:"Digital Design and Computer Architecture ARM Edition", Harris and Harris"Digital Design and Computer Architecture 2d Edition", Harris and Harris - MIPS centricThen there is a very detailed design of the Z80 CPU by the fellow who designed the Rabbit uP and one of the Z80 upgrades. He uses Excel spreadsheets to lay out all of the instructions and timing. Very clever! Code in Verilog"Microprocessor Design Using Verilog HDL" DalrympleIf you want to play in the Z80 sandbox, this is the book to buy! Just hang a Compact Flash to the project and implement CP/M with all 16 drives. Add whatever peripherals you want. Although I prefer the Nexys DDR because it has a lot of LEDs and switches, the Artix would be a great board:https://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/Either should be able to run a Z80 core at 100 MHz. Guaranteed 50 MHz. The Artix has a lot of BlockRAM so system memory isn't much of a problem and the DDR memory can be made to look static using a memory core provided free by Digilent.And a book on implementing primitive blocks like decoders, muxes, state machines and so on:"HDL Chip Design" Douglas J Smith. This books shows alternate methods for implementing the building blocks. Some methods are better than others.

author: technix
author_rank: Super Contributor
timestamp: September 03, 2018, 04:30:53 am
content: Quote from: DC1MC on September 02, 2018, 09:16:08 pmThen check out the bigger CH368, which has a bigger address bus and the option of going with a 32-bit data bus.

author: andersm
author_rank: Super Contributor
timestamp: September 03, 2018, 05:22:42 am
content: Quote from: imo on September 02, 2018, 07:41:07 pmThat may be the marketing reason for putting the SDRAM in the same package, but it's just RAM. The DDR2 SDRAM memory region is mapped to the KSEG0/1 areas, so there's no MMU setup needed as long as you stick to kernel mode.

author: Berni
author_rank: Super Contributor
timestamp: September 03, 2018, 05:43:24 am
content: Another way of replacing the 68000 CPU could be the FT600 chiphttp://www.ftdichip.com/Products/ICs/FT600.htmlIts just a USB to 16/32bit parallel bus chip. Using some glue logic you can likely interface both the address and data bus of a 68000 to it. The other end can go into a PC or any linux SBC like a raspberry pi.Tho for such a project i think a 32bit ARM is more than good enough. An external memory bus with 16bit data and 24bit address lines is quite common, often address/data multiplexing s supported and you can run it at any timing you want. But with a bit of DMA magic you can do it no problem without a real memory bus controller. These things only run at a few MHz while modern ARM MCUs run in the 100s of MHz

author: legacy
author_rank: Super Contributor
timestamp: September 03, 2018, 06:19:25 am
content: Quote from: andersm on September 03, 2018, 05:22:42 amthis reminds me what SONY did in the 90s with their Playstation1 ...

author: emece67
author_rank: Frequent Contributor
timestamp: September 03, 2018, 08:04:23 am
content: .

author: technix
author_rank: Super Contributor
timestamp: September 03, 2018, 06:34:24 pm
content: Quote from: emece67 on September 03, 2018, 08:04:23 amThis is a bit over the top in my taste.

author: DC1MC
author_rank: Super Contributor
timestamp: September 03, 2018, 09:12:57 pm
content: @rstofer - thanks for all the documentation and the encouraging words, if you ever came back to Mannheim, you can have all the bier and wurstchen/döner that you can drink/eat. Of course I'm aware of and use the concept of finite state machines, I can happily design this with discrete logic, latches and shift registers, also I know a bit about the FPGA'sThe things that I've hate and abhor are the "fiddly bits", the never ending crappy configuration, the incomplete and castrated development environments, the total incompatibility of constrains file and so on, it seem to be a job on itself just to be able to start the design for a specific platform, if you reach simulation and synthesis, it's soon visible that either the simulator needs to be paid, the synthesizer just tells you that you're over the limit of whatever arbitrary shite limit they've defined.And the available development boards that doesn't cost an arm and a leg, but just an arm, are usually made with out of support devices for which you have to hunt some 2013 version of the software (Looking at you Altera).I think the development tools and environment for FPGA design are the most beginner hostile tools EVAR, and I totally don't want to start talking about specialized forums, including vendor ones.Tutorials and books are jumping similar to: "Chapter I - Why do we need VHDL, a history", "Chapter II - My first project, Blinky" to "Chapter III - A highly advanced quad-pipelined design for a DDR6 RAM block with auto-calibration and interfacing with the proprietary Xilinx IPs".No wonder that people asking in vain for "good FPGA design books and tutorials".But now that the rant is over, and if I decide to take again the bull by the horns (and be royally kicked), which of these boards are you suggesting that will fit the bill and be a good start:https://www.ebay.de/itm/Mojo-V3-FPGA-Development-Board-Module-Spartan-6-XC6SLX9-for-Arduino-DIY-DE/122831191265https://www.ebay.de/itm/Waveshare-CoreEP4CE6-ALTERA-Cyclone-IV-EP4CE6E-FPGA-Development-Core-Board/281867406792Cheers,DC1MC

author: NorthGuy
author_rank: Super Contributor
timestamp: September 03, 2018, 11:26:38 pm
content: Quote from: DC1MC on September 03, 2018, 09:12:57 pmYou just do it once, and then you save your blinky project. When you need a new project, you just make a copy of the blinky.I don't think creating a blinky for an FPGA takes more time than for an MCU.Don't start from Spartan-6. Spartan-7 is a better idea.

author: Berni
author_rank: Super Contributor
timestamp: September 04, 2018, 05:33:02 am
content: Probably a more important decision is to decide what FPGA vendor to go with. The chips in the same price range tend to be pretty compatible with each other and code will port reasonably well across them apart from any hardware specific features (Like hard memory controller, PLL, serdes etc).There are basically 3 major vendors to consider. Xilinix or Altera/Intel have the best software tools, its hard to say who is better because one does one thing better while the other does the other thing better. So far i prefer Altera but its mostly just personal taste. Lattice is the 3rd major player and they have worse tools and IP libraries, but the chips are cheaper. As far as the software goes all vendors will try to sell it to you for a >$1000 subscription, but you are often perfectly fine with the free version.Where things get tricky is when you want to use the more fancy IP blocks. A lot of them are not free and actually very expensive, but they will give you a lot of them in the software subscription mentioned above for free. So if you do DDR3, Ethernet, SDI, FFT etc then you can only use the trial versions of those IP blocks (They run for an hour or so on a FPGA before locking up on purpose)On top of it all writing HDL code is slow and annoying as soon as you start doing more complex things and when things don't work they are hard to debug why they don't work. Yes it sure beats by a long shot wiring together a bunch of 74HC chips to do a thing, but writing C code for a MCU is still much easier. So FPGAs usually need a good reason to outweigh there drawbacks, most common reason is that other solutions (Like MCUs) are too slow. But don't forget you can also use a tiny cheap FPGA just to implement glue logic between your MCU and the rest of the system just to save the MCU from some bitbanging.

author: legacy
author_rank: Super Contributor
timestamp: September 04, 2018, 11:36:41 am
content: Quote from: Berni on September 04, 2018, 05:33:02 amI agree. besides, a good methodology is mandatory in this case, as well as a strong modular approach of the design and test bench, and good HDL simulator.

author: legacy
author_rank: Super Contributor
timestamp: September 04, 2018, 11:50:47 am
content: so, all the uncertainty principles and corollary axioms about that are telling us that we'd best use an ASIC CPU chip, attached to an FPGA as peripherical devices, glue logic, and miscellanea rather than a softcore with a bunch of peripherals and logic in the same chip

author: DC1MC
author_rank: Super Contributor
timestamp: September 04, 2018, 05:57:02 pm
content: Quote from: NorthGuy on September 03, 2018, 11:26:38 pmAny 40EUR Spartan7 development boards ?

author: legacy
author_rank: Super Contributor
timestamp: September 04, 2018, 06:57:55 pm
content: Quote from: DC1MC on September 04, 2018, 05:57:02 pmI guess only second hand on eBay.

author: legacy
author_rank: Super Contributor
timestamp: September 04, 2018, 07:08:47 pm
content: anyway, I recommend the old & awesome XILINX Spartan3E FPGA Starter Kit.I have recently bought a stock of 5 cards with an onboard s3-1600 for 100 euro / each from a reseller in UK. It's a very big FPGA, there is also a cheaper version with less logic cells. One board is for me, the other 4 boards are for people in my little team @down the bunker.this board is great because it has a very good documentation and a lot of features:- Xilinx XC3S500E/XC3S1600E Spartan-3E FPGA- Up to 232 user-I/O pins- >> 10K logic cells- Xilinx 4 Mbit Platform Flash configuration PROM- Xilinx 64-macrocell XC2C64A CoolRunner™ CPLD- 64 MByte (512 Mbit) of DDR SDRAM, x16 data interface, 100+ MHz- 16 MByte (128 Mbit) of parallel NOR Flash (Intel StrataFlash)- 2-line, 16-character LCD screen- PS/2 mouse or keyboard port- VGA display port- 10/100 Ethernet PHY (requires Ethernet MAC in FPGA)- Two 9-pin RS-232 ports (DTE- and DCE-style)- On-board USB-based FPGA/CPLD download/debug interface- 50 MHz clock oscillator- SHA-1 1-wire serial EEPROM for bitstream copy protection- Hirose FX2 expansion connector- Three Digilent 6-pin expansion connectors- Four-output, SPI-based Digital-to-Analog Converter (DAC)- Two-input, SPI-based Analog-to-Digital Converter (ADC) with programmable-gain pre-amplifier- Rotary-encoder with push-button shaft- Eight discrete LEDs- Four slide switches- Four push-button switches- SMA clock input- 8-pin DIP socket for auxiliary clock oscillator

author: NorthGuy
author_rank: Super Contributor
timestamp: September 05, 2018, 12:07:34 am
content: Quote from: DC1MC on September 04, 2018, 05:57:02 pm60 perhaps:https://store.digilentinc.com/cmod-s7-breadboardable-spartan-7-fpga-module/Or build your own. Small Spartan-7 costs only $15.

author: Berni
author_rank: Super Contributor
timestamp: September 05, 2018, 06:02:53 am
content: That's a pretty nice looking dev board, but usually what you want to look for is a board that has a ton of IO brought out to easy to solder headers. Tho some LEDs and buttons are nice to have.And you probably don't want to be making your own dev board to start with. FPGAs can be quite complex with how much external crap they need and often come in pain in the ass packages. But it is a good idea to keep the price of the chip in mind for when you want to turn your project into a custom PCB. I seen 500 USD dev boards where the FPGA chip alone on it costs twice that much if a average joe was to buy it in small quantity (They sell the chips to devboard making partners really cheap).

author: NorthGuy
author_rank: Super Contributor
timestamp: September 05, 2018, 01:15:43 pm
content: Quote from: Berni on September 05, 2018, 06:02:53 amI personally prefer breadboardable things - you can easily connect whatever you feel necessary, easily dismantle. Of course, if you go above 200 MHz there will be problems.If you don't like breadboards, you can solder the S7 (or similar) board onto a custom PCB which will have all the LEDs and connectors you want. And it now costs only $5 for decent size 4x4 PCB.

author: legacy
author_rank: Super Contributor
timestamp: September 05, 2018, 01:24:46 pm
content: Quote from: NorthGuy on September 05, 2018, 01:15:43 pmyou mean above 50Mhz

author: NorthGuy
author_rank: Super Contributor
timestamp: September 05, 2018, 01:38:47 pm
content: Quote from: legacy on September 05, 2018, 01:24:46 pmI tested recently (BTW with similar FPGA board). 200 MHz digital signals worked quite well on my breadboard. I didn't have the IBIS model for the breadboard, but simulations with simple RLC models confirm this too. I was going to start a blog, may be presenting real data on my tests is a good topic for my first blog ... when I have time

author: legacy
author_rank: Super Contributor
timestamp: September 05, 2018, 02:35:49 pm
content: Quote from: NorthGuy on September 05, 2018, 01:38:47 pmfrankly, I don't believe it

author: legacy
author_rank: Super Contributor
timestamp: September 05, 2018, 02:41:56 pm
content: we, atDownTheBunkerare rebuilding the php code of the site, and we can offer space in a dedicated formatcurrently, I am not working at this, I am busy with HDL, hence the site looks like a bazaar, which was/is the primary reason for it, but things will change.

author: rstofer
author_rank: Super Contributor
timestamp: September 05, 2018, 02:51:16 pm
content: Quote from: DC1MC on September 03, 2018, 09:12:57 pmTo be honest, I don't like either but I would use the Xilinx chip because that's what I know. I also like Xilinx ISE which I think will work with Spartan 6 (need to confirm that). I'm just coming up to speed with Vivado and it's a process. The big difference, as you point out, is the constraints file. I don't pretend to understand the Vivado incantation.Remember I said "blink an LED then build a CPU"? Copy and Paste, that's the trick. Get something working then expand it. My first projects followed exactly that path: Blink an LED, implement the T80 (Z80) core, make it run CP/M. Nothing in the middle...I think you will find that any of the references I linked are approachable. I'm old and certainly on a downhill slide but I can still keep up with those books. I really like the LC-3 project as a demonstration in the design process.The Xilinx board you linked will work and the price is pretty compelling. But I wouldn't want to use it. Why? Because it doesn't have gadgets. I NEED 7 segment displays, lots of LED, plenty of switches and pushbuttons. Most times these are required for the project and other times they are just helpful for debugging. The obvious problem: price goes through the ceiling. It is difficult to spend a lot of money on boards not knowing if you like the concept. So, to get started, anything will work. I would go with Xilinx only because that's what I have been using for about 15 years.This board has a lot of gadgets, no 7 segment displays but that LCD display is interestinghttps://www.ebay.de/itm/Digilent-Xilinx-Spartan-3E-FPGA-Starter-Board-only/273323417096?hash=item3fa3585e08:g:b6cAAOSwWDBa-eEQThis next board was my all-time favorite when I was starting out. The fact that it has static RAM is a plus. My first incantation of the IBM 1130 ran on this board with a 16 digit 7 segment display hung off the right edge and a compact flash connected to one of the top connectors. I like this board because it has a LOT of IO connections.https://www.ebay.de/itm/digilent-xilinx-spartan-3-starter-board-w-breadboard-1-proto-3-F-3/192240256662?hash=item2cc2698696:g:59EAAOSwjvJZXsPiAlas, it is used. I'm not sure I would take the risk. The fact that it includes the prototype board is pretty nice.Over the years I have bought a bunch of boards. I really don't know how many but a dozen wouldn't surprise me, probably more. The point is, get started with what you can afford, learn the process and then branch out.The Nexys 4 DDR board is my new favorite. It is quite expensive and perhaps not the best place to start. But it has 'gadgets', lots of them. The Arty is a popular board but that Basys 3 is very useful. Maybe later on. All take Vivado because they all use the newer Artix 7 chip.https://store.digilentinc.com/fpga-for-beginners/Here's a German company that builds a variety of boards:https://www.ztex.de/usb-fpga-2/I bought the 2.01 board to help a fellow debug his project which used one:https://www.ztex.de/usb-fpga-2/usb-fpga-2.01.e.htmlThe Debug board is a handy attachmenthttps://www.ztex.de/usb-fpga-2/debug.e.htmlI'm not so happy with the device programming details. I don't recall how it works at the moment but I remember having to diddle with various Windows executables to get it programmed. The FX2 device is pretty slick but working with it seems to be a PITA compared to using Digilent's Adept software.That Mojo-V3 is probably a good place to start. But it's old technology (these days) and seems to be too small to implement the T80 core. As a stepping stone, it should work fine.Everybody starts somewhere and the Mojo is a low cost entry point. Here's the 'blinking LED'https://www.deviceplus.com/how-tos/fpga-tutorial-intro-to-fpgas-with-the-mojo-part-1/

author: NorthGuy
author_rank: Super Contributor
timestamp: September 05, 2018, 03:06:35 pm
content: Quote from: legacy on September 05, 2018, 02:35:49 pmVery good. You conduct your own tests and simulations and you publish them. Then we can compare yours to mine and see where they agree and where they differ and try to understand why. That's how science works.You don't want to say that the 50 MHz figure which you have heard somewhere on the Internet is a representation of the final truth, do you?

author: legacy
author_rank: Super Contributor
timestamp: September 05, 2018, 04:02:20 pm
content: Quote from: NorthGuy on September 05, 2018, 03:06:35 pmOn the internet, there are ... a lot of things ...

author: bingo600
author_rank: Super Contributor
timestamp: September 05, 2018, 07:33:08 pm
content: Quote from: DC1MC on September 02, 2018, 01:33:31 pmI run FLEX (MC6809) on this $12 FPGA board (Add a 512K Ram + misc comps for the Base PCB)http://searle.hostei.com/grant/Multicomp/index.htmlhttps://www.retrobrewcomputers.org/forum/index.php?t=msg&goto=1260&&srch=cyclone#msg_1260I got the "Base PCB" from the guyzz herehttps://www.retrobrewcomputers.org/forum/index.php?t=thread&frm_id=1&/Bingo

author: rstofer
author_rank: Super Contributor
timestamp: September 05, 2018, 09:03:22 pm
content: I said earlier that I like FPGA boards with gadgets. Unfortunately, they come at a price.SPI is the answer! I posted earlier the code to make 16 console entry switches with a Microchip Port Expander. Somewhere I have code to make a 16 digit 7 segment display using a Maxim chip (I believe, haven't looked lately).So, on stripped down development boards, create a couple of SPI interfaces and you're in business. Worst case, it takes 4 pins per interface. Maybe use another port expander to provide LEDs.

author: technix
author_rank: Super Contributor
timestamp: September 05, 2018, 09:22:41 pm
content: Quote from: rstofer on September 05, 2018, 09:03:22 pmMy personal favorite is actually using small STM32 microcontrollers, especially STM32F030. The STM32 UART has a single-pin bidirectional mode, effectively making it a single-ended RS485 equivalent. This gives me two-wire (signal + ground) multi-drop peer to peer networking.

author: legacy
author_rank: Super Contributor
timestamp: September 05, 2018, 10:02:17 pm
content: Quote from: technix on September 05, 2018, 09:22:41 pmtwo weeks ago I saw an interesting project, STM32F + Spartan6, for a portable gaming console.

author: technix
author_rank: Super Contributor
timestamp: September 06, 2018, 03:16:15 pm
content: Quote from: legacy on September 05, 2018, 10:02:17 pmI actually has a sort-of similar project plan: AT91SAM9260-QU + TMS320VC5509A + EP4CE15E22C8N triple-hitter with 256MB DRAM, Wi-Fi and M.2 SATA. That would be either a huge 4-layer board, or a stack of PC104 style boards. The ARM processor is the system master here, I need to cook up something akin to U-Boot + UEFI in the XIP NOR Flash so the actual operating system can be located in the SATA drive. The DSP and the FPGA would boot under control of the ARM core, probably when their respective Linux kernel modules are loaded.

author: legacy
author_rank: Super Contributor
timestamp: September 06, 2018, 03:36:59 pm
content: Quote from: technix on September 06, 2018, 03:16:15 pmit sounds too complex. I was talking about a simple gaming console, as those made in the 90s, and simpler than a SONY Playstation1, whose GTE is full of math and complex circuits, whereas the console I saw only implemented a simple sprite-engine, followed by a simple blitter, and the author said it took a couple of years of work (done during his weekends) make it "ready"

author: emece67
author_rank: Frequent Contributor
timestamp: September 07, 2018, 03:02:54 pm
content: .

author: technix
author_rank: Super Contributor
timestamp: September 07, 2018, 03:55:40 pm
content: Quote from: emece67 on September 07, 2018, 03:02:54 pmThere are even MPU that does the same, MPU that runs stock OS like Linux. There are even interface chips that gives you similar interfaces from PCI-Express and conventional PCI bus, using an add-on card inside your PC.Personally I do prefer the MPU or PCIe card approaches, as they have the lowest software difficult, since the immense complexity of housekeeping is already dealt with in the stock OS.

author: Berni
author_rank: Super Contributor
timestamp: September 07, 2018, 06:43:32 pm
content: Quote from: emece67 on September 07, 2018, 03:02:54 pmYes they do but the memory controllers always act like masters on the bus. I have yet to see one that does the opposite where it acts as a slave to expose internal memory in the chip out to an outside master (Apart from FPGAs with ARM cores, but they have specific reasons to have that feature).

author: technix
author_rank: Super Contributor
timestamp: September 07, 2018, 07:52:09 pm
content: Quote from: Berni on September 07, 2018, 06:43:32 pmIf you want the processor to act as a bus slave, the CH368 in slave mode can be an option: it allows you access the host PC memory using regular PCI bus mastering, message-signaled interrupt and other goodies over a PCIe x1 interface.

author: NorthGuy
author_rank: Super Contributor
timestamp: September 07, 2018, 08:40:51 pm
content: Quote from: Berni on September 07, 2018, 06:43:32 pmHere's an interesting blog post about hacking a scope. If you go forward 10-15 pages, the author has discovered that the sampling FPGA is masquerading as DDR2 memory to connect to the CPU:http://blog.weinigel.se/2016/05/01/sds7102-hacking.html

author: iMo
author_rank: Super Contributor
timestamp: September 08, 2018, 03:53:20 pm
content: Back to the roots: the OP is asking on whether somebody knows about a "modern MCU" with a traditional 8080/6800-like bus. The OP wants to drive various vintage 8bit-era 5V parts out of such a modern MCU..

author: NorthGuy
author_rank: Super Contributor
timestamp: September 08, 2018, 05:58:33 pm
content: Quote from: imo on September 08, 2018, 03:53:20 pmYou're a show-stopper. The thread got so close to recommending Zynq

author: technix
author_rank: Super Contributor
timestamp: September 08, 2018, 07:01:26 pm
content: Quote from: NorthGuy on September 08, 2018, 05:58:33 pmFPGA suggestions are already flying, so I am already waiting for Zynq to show up somewhere. Although I am still standing my my suggestion: PIC32MZ DA, CH367 and CH368. All of which provides that kind of bus and runs some modern operating system (PIC32MZ DA) or inerfaces modern PC using a simple logic interface on the other end (CH367/CH368, which exposes an ISA interface or something similar to a VLB bus over PCIe.)

author: DC1MC
author_rank: Super Contributor
timestamp: September 08, 2018, 07:20:14 pm
content: Just a heads up, indeed the original intention was (and still is) as @imo have said to drive a 5V 6800 (with a Z80 as bonus) compatible bus via some kind of ICE, that emulates totally something elseand can be connected to some powerful modern <fruit>Pi boar or similar via reasonable fast interface la (Q)SPI running 20-50MHz clock.But this thread took some kind of life of its own (and I'm very happy about it) and somehow become a nice information resource about digital design, it even convinced me (to once again) try to look into the FPGA design and I've even started to have a bit of progress. I don't know where will this will led me, I have selected on the page two of this thread some nice STM boards that have this paralel memory interface, that I will use them eventually when I give up the FPGA design, probably by the time I'll figh with the clocks and clock domain crossing.Anyway, if someone is capable to design this stuff as described (for 6800 first) on a CHEAP board, like this mentioned Mojo I will still have my gratitue and some barely limited number of beers and German sausages, and they are really good.But thanks to everybody for the contributions and keep the ideas flowing.Cheers,DC1MC

author: NorthGuy
author_rank: Super Contributor
timestamp: September 08, 2018, 08:26:10 pm
content: Quote from: DC1MC on September 08, 2018, 07:20:14 pmIf not for the task in the original post, FPGAs are still worth exploring. Looks like you have already dealt with MCUs, and you know, they're all roughly the same. FPGAs will give you somethingdifferent... and much more powerful.

author: legacy
author_rank: Super Contributor
timestamp: September 08, 2018, 10:21:04 pm
content: Quote from: NorthGuy on September 08, 2018, 08:26:10 pmusually, people who say that kind of things with too abnormal enthusiasm are of the same level of those claim they can do a different thing like building their own Gundam in the garage

author: legacy
author_rank: Super Contributor
timestamp: September 08, 2018, 10:30:45 pm
content: Quote from: technix on September 08, 2018, 07:01:26 pmThis is interesting, at least for the PCI. Do you happen to have an Application Note, or do you happen by any chance to have already seen a development kit, like a PCI-Card (not ePCI, PCI! or PCI64) with that chip?p.s.speaking about Linux, Alan Cox wrote me an email warning that when a device is PCI-bus-master ... your life is full of troubles, in fact, a couple of drivers for our PCI_SATA controllers are not yet working as they should, not even close to the baseline, sometimes they cause the kernel to crash, and ... fixing it out is not a piece of cake.

author: legacy
author_rank: Super Contributor
timestamp: September 08, 2018, 10:54:31 pm
content: Quote from: DC1MC on September 08, 2018, 07:20:14 pmTwo years ago, I designed a68HC11 board; hc11 is similar to 6800, with a builtin UART, timers, and ADC. Not so expensive, and not complex; the board is loaded with a monitor that works on the serial line with a human interface. On the internet, you can find even simpler boards, some use an NVRAM instead of a UV-ROM, that simplifies the circuit. I am working on a BASIC interpreter integrated with the monitor. I can give you a copy of NOICE-11, that is a way you can download and debug stuff. The other way is BUG11. Both require Windows. Here I am using Windows XP.I have also a prototypal 6809 board, not tested yet. The firmware is very limited, sort of monitor to upload SREC files, other features (like registers dump) are not fully working, and probably the whole core's still bugged. This project is frozen at the moment since I am on 68332EVS(1), where the thing you can appreciate about CPLD and FPGA is the possibility to develop a BDM-to-gdb bridge, where all the timing stuff is done by an HDL circuit(1) Motorola 68332, sort of 68000 with built-in peripherals; the name "EVS" is for an old development board, which offers a built-in BDM hw-debugger able to talk on the RS232 line, hence I also have a way to fully reverse the protocol. It takes a lot of time, anyway, a lot of weekends ...

author: technix
author_rank: Super Contributor
timestamp: September 09, 2018, 03:59:30 am
content: Quote from: legacy on September 08, 2018, 10:30:45 pmI have the datasheet and application notes, but they are all in Chinese. Those chips speak PCI Express to the host system. If you want conventional PCI there is a different chip for that.Quote from: legacy on September 08, 2018, 10:30:45 pmCH367 is not capable of bus mastering. CH368 can, but it is only available in VLB bus slave mode which requires another microcontroller acting as the bus master.

author: legacy
author_rank: Super Contributor
timestamp: September 09, 2018, 10:48:57 am
content: There are also PCI bridge chip used for FPGA interfacing, so that the FPGA designs need only interface to a simple 32bit synchronous local bus. The bridge chip is usually labeled "PLX" (e.g. PLX 9030, 9054) on the top and supports Bus master and DMA transfers to and from system RAM for maximum performance.Developed in USA, with English documentation, and used by Mesa at least in a couple of boards used in our radio-telescope.Potentially it's good, practically it requires a lot of time before it really works.

author: technix
author_rank: Super Contributor
timestamp: September 09, 2018, 04:03:12 pm
content: Quote from: legacy on September 09, 2018, 10:48:57 amThat is why I suggest the CH367/CH368. It gives you a ISA-like or VLB-like interface in master mode (actually they intended that this chip can be used to modify existing ISA/VLB cards using as little effort as possible,) and for CH368 it also has a slave mode that is effectively a PCIe slave to EBI slave bridge allowing interfacing other microcontrollers that has a 32-bit EBI to a PC.

author: legacy
author_rank: Super Contributor
timestamp: September 09, 2018, 04:53:17 pm
content: Quote from: technix on September 09, 2018, 04:03:12 pmthat's very interesting for our next-generation of radio telescopes cards!(yes, we are analyzing radio signals coming to Earth planet from the deep space)can you upload some AN, or example of these CH36x chip onto theDownTheBunker's uploader?