Unipolar single-ended to bipolar differential conversion - Page 1
Forum section: electronics / projects

author: Yomafacio
author_rank: Newbie
timestamp: December 18, 2020, 03:12:58 am
content: HiI'm currently designing a PCB to measure the microvolt level changes in battery voltages (CMV around 4.2V) over a long period of time (~16 days). I'd like to get at least a 10uV resolution, and don't need to sample very often (1Hz sampling would be plenty). I'd also like to test dozens of batteries (~64) at the same time, so I was thinking of using an 8-1 analog mux (such as TMUX1108) to time-multiplex my sampling between a bunch of channels to save on BOM costs. I also don't want this mux to be in my ADC as I would need to make 8x or 10x copies of my signal conditioning into the ADC. Given these requirements, I've been focusing on the AD7175-2 (NFR of up to 24 bits, relatively cheap, etc)I've noticed that the AD7175-2 supports either single-ended signals or differential signals, and either unipolar or bipolar signals. However, if I use a unipolar signal I lose a bit of precision, and if I use single-ended signals I lose some of the INL performance. Therefore, I was thinking of ways to convert my signal to bipolar and configuring my ADC to read differential voltages. However, I'm not sure which way is better or if there's a better way to do this:1) Connect the battery's cathode to Vref, and configure the ADC to measure the anode and cathode. With this configuration, I'm mainly worried about coupling noise between all the channels and into the ADC through Vref, especially since Vref won't be an extremely low impedance reference (compared to using ground as a reference).2) Connect the battery's anode to ground, and use an instrumentation amplifier to shift the cathode voltage down by -2.5V. With this, I'm mainly worried about the offset and drift (and simply added noise) introduced by the amplifier over 16 days.Does anyone have any ideas one which is better? I'm still an undergrad student so my understanding of this might be off.

author: David Hess
author_rank: Super Contributor
timestamp: December 19, 2020, 12:05:28 pm
content: Converting the signal to differential is likely to introduce more error than is saved at the ADC. The solution is to start with a differential signal which is not necessarily balanced.Assuming that you are charging or discharging these battery cells, make a 4-wire connection to each one so that the power and measurement connections are separate. The two signal connections are then the differential signal which goes through the signal conditioning to the ADC. This has the necessary disadvantage of using twice as many multiplexers however if the layout is symmetrical, thermocouple errors through the differential signal conditioning and multiplexers will cancel out.

author: Gibson486
author_rank: Frequent Contributor
timestamp: December 19, 2020, 12:40:17 pm
content: I agree with David on this. I have tried this in the past. For you to take advantage of the gained bit, you need to ensure your reference is VERY stable as well. So yes, it is possible, but your design will be a bit bigger and costlier. Also, at 24 bits....do not plan on getting all 24 bits....once you above 16 bits, the returns start to diminish unless you really work hard and chase out all noise.

author: Yomafacio
author_rank: Newbie
timestamp: December 19, 2020, 08:56:04 pm
content: I'll try searching for some analog multiplexers designed for differential signals then, thanks.I still need to ground the input signal so it's in the common mode voltage range of the inputs (-2.5V to 2.5V) though. What would be the best approach to that if my ideas above (set batt+ to Beef, or set batt- to ground and shift down by 2.5V) aren't optimal?

author: David Hess
author_rank: Super Contributor
timestamp: December 19, 2020, 10:46:57 pm
content: Quote from: Yomafacio on December 19, 2020, 08:56:04 pmIt is not really necessary but double pole multiplexers do exist. Two single pole multiplexers can be used with the same digital inputs.QuoteIf you are still referring to the AD7175-2, then the input voltage range is AVss to AVdd1 which allows the batteries to be directly connected as long as the reference voltage is higher than the battery voltage. So that can yield a 5 volt input range. There is no need to take advantage negative inputs because there is a unipolar mode which allows the differential input to be 0 to +Vref.If the internal reference is good enough, then I might multiply the Vref output to 4.096 volts, or some other convenient value, and feed it back into the Vref input if the battery voltages will be lower than that.

author: Yomafacio
author_rank: Newbie
timestamp: January 19, 2021, 10:31:31 pm
content: Is there any unexpected behavior when chaining multiple analog multiplexers together in series? I was originally going to use 2x 8:1 mux to get an overall 16:1 channel sampling ratio per ADC, and copy this circuit a few times to get even more channels (~128). However, since I don't necessary need to sample very quickly, I was then thinking about multiplexing each input through two external multiplexers (see attached). As far as I can tell, the main problems I might run into is how long it takes for the signals to settle after switching channels, and routing all the traces between the multiplexers. However, this would bring down my BOM costs significantly, as I'd have fewer (or only 1) ADC instead of multiple ADCs.On the topic of routing multiplexers, I'm also a bit unsure of proper mux placement. I plan on partitioning my ground plane between AGND and DGND. While it would be ideal to have these multiplexers span across this partition, so the multiplexed analog signals are over the AGND plane and the digital select lines are over the DGND plane, this also does constrain how I can route the traces and will likely result in many traces all clumped together (between both the top, bottom, and inner layers). Would it be ok to have the entire multiplexer fully in the AGND plane, given that the select lines will only change between sampling?

author: David Hess
author_rank: Super Contributor
timestamp: January 22, 2021, 06:15:34 pm
content: Quote from: Yomafacio on January 19, 2021, 10:31:31 pmThere is no unexpected behavior and it is commonly done but see below about an alternative. The series resistance and parallel capacitance increases of course.Multiplexers often have an output enable so the second stage can be removed and all of the outputs tied in parallel, with only the active multiplexer driving the output. This halves the series resistance but now the one multiplexer has to drive the output capacitance of all of the other multiplexers.