synchronous frequency divider (by 10) - Page 1
Forum section: electronics / rf-microwave

author: markus_Who
author_rank: Newbie
timestamp: September 13, 2024, 08:02:00 am
content: M trying to make a frequency divider with lowest possible phase difference between the input signal and output signal. I have previously made ones using 74x90s and 74x390s, but recently was introduced to synchronous BCD counters such as 74x160/2 and similar ones. Is it possible to make a divide by 10 circuit using synchronous BCD counters if yes, can anyone please point be towards a refence circuit or book i can follow? Will using synchronous BCD counters give me lower phase lag?My knowledge regarding synchronous frequency dividers and counters is non existent at best, looking forward to learn it. Thanks in advance.Application: just trying to make a better divide by 10 network for a selectable ref frequency source, lower phase diff will allow me to play with 2 different synced ref frequencies at the same time. Planning to make a time code generator down the line.

author: bingo600
author_rank: Super Contributor
timestamp: September 13, 2024, 08:20:32 am
content: I have some notesQuoteMaybe herehttps://justanotherelectronicsblog.com/?p=305

author: markus_Who
author_rank: Newbie
timestamp: September 13, 2024, 10:06:04 am
content: I get that part conceptually "no external feedback is necessary to make it work at divide by 5/10". But i am unable to find a reference or a circuit that uses it.What i practically need is the wiring schematic for 74xx160/2 to make it function as a divide by 10 circuit.Thanks for the reply though

author: tggzzz
author_rank: Super Contributor
timestamp: September 13, 2024, 10:13:51 am
content: Quote from: markus_Who on September 13, 2024, 08:02:00 amPlease state the application in which phase lag is important. That may enable alternative solutions.

author: markus_Who
author_rank: Newbie
timestamp: September 13, 2024, 10:35:46 am
content: Made the edit to the main post"Application: just trying to make a better divide by 10 network for a selectable ref frequency source, lower phase diff will allow me to play with 2 different synced ref frequencies at the same time. Planning to make a time code generator down the line."Thanks for the suggestion

author: bingo600
author_rank: Super Contributor
timestamp: September 13, 2024, 11:06:07 am
content: Quote from: markus_Who on September 13, 2024, 10:06:04 amAnd the link i posted ,where someone shows a schematic of a freq counter - Using a bunch of them ??

author: tggzzz
author_rank: Super Contributor
timestamp: September 13, 2024, 11:07:34 am
content: With any simple frequency divider there will always be a phase offset between the input and output. Your application and measurement must take that into account.If you want to compare two different frequency sources then the phase will be continually varying at a speed depending on the frequency difference.If the two sources are nominally locked, then you can compare the frequencies and phases using the oscilloscope Lissajous figures technique or using an exclusive-or and measuring the average voltage output. That could help you form a crude estimate of the relative phase noise. PLL dividers introduce their own artefacts

author: CaptDon
author_rank: Super Contributor
timestamp: September 13, 2024, 01:22:08 pm
content: There must be hundreds of online schematics of how to connect syncronis and ripple counters online. When it comes to divide by ten you generally have the choice of driving the 'divide by two' OR the 'divide by five' stage first. One method is used to generate a BCD binary signal the other method is used to generate a squarewave reference output and all of that is covered in online tutorials about counters. In some divide by ten counters the divide by two stage is designated as the 'input' stage and may have a higher toggle rate to support higher frequency input than what would be available with the divide by 5 stage being used as the input. Ripple counters generate glitches as the states 'rollover' and will cause false triggers in fast digital comparator circuits which is why you tend to find syncronis counters used in frequency synthesizers where a comparator is performing the 'divide by N' function. A ripple counter (7490, 7493) would cause problems. A ripple counter also has a bit of delay instability between the input clock transition and the output transition of the final counter stage if there are several stages in series. Again, all of this rocket science can be found in the datasheets and design guides such as 'The TTL Cookbook'.

author: markus_Who
author_rank: Newbie
timestamp: September 13, 2024, 06:14:52 pm
content: Wo that books is the best TTL reference ever, thanks for suggestion.P.S. Never knew it existed, now i love it.also thanks a lot, i think u solved all my problems

author: markus_Who
author_rank: Newbie
timestamp: September 13, 2024, 06:23:50 pm
content: Quote from: bingo600 on September 13, 2024, 11:06:07 amM so sorry, i totally missed that link, check it out, they have a schematics that might be very very useful. Thanks

author: Andy Chee
author_rank: Super Contributor
timestamp: September 13, 2024, 06:50:28 pm
content: Quote from: markus_Who on September 13, 2024, 06:14:52 pmIf you've never heard of Don Lancaster's TTL Cookbook, then you might want to also read the companion CMOS Cookbook.

author: raftronik
author_rank: Contributor
timestamp: September 15, 2024, 09:22:22 am
content: Hello,Here is part schematic of my synchronous divider which I used in my 10MHz GPSDO reference,maybe it will help somehow.

author: Solder_Junkie
author_rank: Frequent Contributor
timestamp: September 15, 2024, 11:09:53 am
content: I don't know if you have a NanoVNA, the H4 version is easy to convert to a phase frequency analyser (PFA) by loading alternative firmware (and easy to swap back again). There is also a stand alone PFA using the same hardware.With a phase frequency analyser, you can compare the phase difference and jitter between two frequencies. Typically you would use one to compare an off air frequency standard with a rubidium or cesium standard using a software program such as TimeLab (free).While you can observe phase differences with an oscilloscope, being able to plot the results using a low cost PFA gives incredible results with little effort. This image shows the comparison between my home made GPSDO (based on a design covered on these forums) against a Leo Bodnar commercial GPSDO. The reference is a rubidium standard. The green trace is the Leo Bodnar, the red trace is the home made GPSDO.SJ