Sony PVM 3230 CRT vertical foldover (i think?) - Page 1
Forum section: electronics / repair

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 12:22:49 am
content: Can anybody assist in debugging this issue?Here is the service manual:https://archive.org/details/PVM3230ServiceManualI have attached screenshot of what looks like from what I can tell from internet comparisons is vertical foldover. I thought it was a retrace problem and probed the vertical blank output on IC501 and it looks ok. I have already replaced all of electrolytics on the D1 and D2 boards along with reflowing a large part of the vertical output section but the problem still persists. From a waveform standpoint I'm not sure what else to check on the osccilcope as I don't know what causes vertical foldover (if that is the problem). I also checked the vertical drive output transistor (Q523) and the waveform looks exactly like the reference provided in the service manual. However I also don't know if vertical foldover is even easy to see on a oscilloscope.Based off the schematic in the service manual any suggestions on what I can look at next on the scope or part measurement?

author: wasedadoc
author_rank: Super Contributor
timestamp: July 28, 2023, 07:24:33 am
content: Vertical foldover is easy to see on a 'scope but I do not understand why you think it is present. Is it the strangeness at the very top that you are investigating?

author: inse
author_rank: Super Contributor
timestamp: July 28, 2023, 12:51:47 pm
content: Fumble the controls for height and vertical position to get a clear picture (of the fault)

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 04:10:20 pm
content: Quote from: wasedadoc on July 28, 2023, 07:24:33 amYes. It changes but does not go away with vsize. If I max out vsize you can still see the lines. I've attached a screenshot.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 04:12:07 pm
content: Quote from: inse on July 28, 2023, 12:51:47 pmWhen changing h height/pos and v height/pos the failure doesn't really modulate. The line is still there in various ways although. You can push some of it out of the screen with vsize but not completely. You can see it in the screenshot attached above.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 05:38:39 pm
content: Here is a video link on how the line responds to adjust vsize, vpos, and hsize.

author: Uunoctium
author_rank: Frequent Contributor
timestamp: July 28, 2023, 06:08:27 pm
content: what is the exact problem?1 or 2?1 are the standard measuring lines implented in all PVM, BVM series. Looking like one single white line, but in real they are no overlay - they are sequential R;G;B lines at 100% level. Sony uses this to permanetely control the operating points of video output stages and autotunig them during lifetime. In early BVM model the circuit was discrete with S&H, later an custom jungle IC.These lines have to be placed in active phosphor area and mostly covered by bezel.Two failures known: picture tends yellowish -> circuit out of range to correct against. Causation: low emission on blue cathode. CRT-> End of life!2nd same picture tint as above: 100k carbon resistor on CRT plate is open.2. thats a slight convergence error(3) The video shows nonsense! That 'foldover' is due too much picture height adjustment. This is an result of internal reflection of beam at metallic structures in CRT!

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 07:00:17 pm
content: Quote from: Uunoctium on July 28, 2023, 06:08:27 pmSo 1 is intentional in all PVMs and BVMs. I didn't know that. I know there is a convergence issue at the top, which I think is because the convergence pots on the D2 board don't work great. I already ordered replacement pots hopefully that will allow me to tweak it more.But the main issue I'm trying to resolve is what I have circled in the attachment to this post. Even when I adjust vpos and vsize perfectly, (1) in your pic practically goes away (pushed up outside viewable area) however this line remains (the one I have circled). Yes it's that same RGB line at 100% intensity but it is not pushed outside the viewable area as you can see.

author: Uunoctium
author_rank: Frequent Contributor
timestamp: July 28, 2023, 07:16:02 pm
content: looks like the half line at jump from bottom to top is not blanked correctly. I can ask an retired Sony repair specialist if he knows something about that failure, but will take a couple of days

author: wasedadoc
author_rank: Super Contributor
timestamp: July 28, 2023, 07:18:40 pm
content: That one does look like the latter part of vertical retrace not being blanked. Vertical retrace too slow or vertical blanking ending too early.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 07:27:11 pm
content: Playing around with it a bit more, I think the problem has something to do with vsize adjustment maybe. When vsize is at the minimum value, the RGB lines are clearly above the the image. But as I increase vsize, as you can see from the attached pictures, the rgb lines do not move up along with the image when increasing vsize.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 07:35:35 pm
content: Quote from: Uunoctium on July 28, 2023, 07:16:02 pmI would appreciate that thanks. I'm very much a novice in crt repair but I looked at the vblank output from IC501 looks ok (matches the reference waveform in the service manaul, except I have no idea what the pulse width is suppose to be.One funny thing I did notice when probing on the osccilcope is that the vblank input (the RC network on pin 13 on IC501) does not look correct. As in it looks very different than the reference in the service manual. I probe a half triangle when the service manual shows a full triangle. The RC network at pin 13 are good and the 12V rail is good. So I don't know if the service manual is wrong or if this is really a problem.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 07:36:21 pm
content: Quote from: wasedadoc on July 28, 2023, 07:18:40 pmIs this something I can probe and confirm on the osccilcope?

author: wasedadoc
author_rank: Super Contributor
timestamp: July 28, 2023, 10:42:04 pm
content: Quote from: Fusion916 on July 28, 2023, 07:36:21 pmShow the waveform on pin 12 of IC501. Shape, amplitude and duty cycle.

author: Fusion916
author_rank: Regular Contributor
timestamp: July 28, 2023, 11:17:22 pm
content: Quote from: wasedadoc on July 28, 2023, 10:42:04 pm

author: Fusion916
author_rank: Regular Contributor
timestamp: July 30, 2023, 12:16:06 am
content: I fixed the issue, but the problem was with the vblank output from IC503 to the B board.