KiCad ERC error drives me crazy - Page 1
Forum section: electronics / beginners

author: hp3310a
author_rank: Regular Contributor
timestamp: December 25, 2024, 12:37:20 pm
content: Greetings and Happy Holidays everyone,this must be the most written about KiCad ERC error, yet I still fail to understand why:I have a GND pin of a comparator tied to GND, just like for other ICs on the same schematic (see below). For this single instance of connection to GND I get the ERC error "Input Power pin not driven by any Output Power pins". Just this one (red arrow), not the others (blue arrows).I double checked the symbols' pin definitions which is identical to that of the other ICs and marked as "Power input".For testing I removed the GND net symbol from there and the error pops up again on a different connection (second image). I noticed that the usual error indicating arrows or highlights are missing, just the cross hair highlights the error location.What am I doing wrong?

author: Andy Watson
author_rank: Super Contributor
timestamp: December 25, 2024, 01:18:40 pm
content: You need to put an "output" on the net. In my ancient version of Kicad I believe it involves adding a special "power" flag symbol to the net.

author: radiolistener
author_rank: Super Contributor
timestamp: December 25, 2024, 01:20:59 pm
content: Quote from: hp3310a on December 25, 2024, 12:37:20 pmDid you connected VCC port to power source?I'm not sure, but it looks that your net port for VCC looks strange, as I understand it should looks like this:So, probably this is the reason why it cannot see the power source

author: hp3310a
author_rank: Regular Contributor
timestamp: December 25, 2024, 02:11:15 pm
content: Thanks for the tips!Turns out there was a problem with the symbols I imported from snapeda.comFirst, the pins of the IRM_01_05 power supplies (I'm using 2 to get +-5V) were not properly marked as "power input" and "power output", just input and output.Second, the numerous NC pins of the DS32KHZSN temperature-compensated oscillator I'm using - which according to the documentation all need to be connected to GND - were marked as "bidirectional". That caused all kinds of issues because of their connection to GND. Changing those pins to "passive" did remove the odd issue I asked about originally.I now have only one issue left that is caused by me connecting two "power output" pins to create one +-5V power supply. I'm not totally happy with it but it works on my PCB layout and there are not a lot of print supplies available for +-5V/400mA (the RAC04-05DC_230 being the only alternative I found). All my tests using different DCDC converters to create -5V from +5V failed in that the converters created way too much ripple/noise on one or both rails.

author: Benta
author_rank: Super Contributor
timestamp: December 25, 2024, 09:58:12 pm
content: Well, power is no different from other signals. If you have an input, you need an output driving it.GND and VCC symbols are power inputs. Somewhere there needs to be an output driving them.It could be another symbol with a power output, eg, a voltage regulator. If that's not available (eg, power comes from a global label), you'll need to place a PWR_FLAG symbol on that net.You last symbol is interesting: it seems to be a "black hole" with no outputs and only inputs.

author: janoc
author_rank: Super Contributor
timestamp: December 25, 2024, 10:48:43 pm
content: Quote from: hp3310a on December 25, 2024, 02:11:15 pmSave yourself the hassle and draw your own symbols instead of importing the poorly machine generated garbage that SnapEDA has. It really isn't that difficult, esp. for a part like what you have shown there. Drawing that symbol in the symbol editor would likely be faster than even finding it in SnapEDA.

author: PGPG
author_rank: Frequent Contributor
timestamp: December 27, 2024, 10:46:59 pm
content: Quote from: hp3310a on December 25, 2024, 12:37:20 pmYes. I am reading KiCad forum since 2017 and typically once per month (or more often) there is a question about this one error.My solution: I never run ERC so have no such problems ever. But when (for first year or two) I have answered with that whenever I sow the question about this error after some time was told by others that it is not the good advice to beginners. So for next few years I just ignored discussions about that error. But about year ago in some discussion it was said (not by me) that solution of just not running a function making you crazy can be assumed being the same good as others.In your case you have one net (GND) consisting on many power inputs and not driven by any power output. Having no power output at this net is only one error so KiCad reports it as one error. But where at schematic to position arrow showing you a problem that there is not something that KiCad expects should be. KiCad can't know where you will place the needed PWR_FLAG so KiCad selects one of power input pins and says "this pin is power input but is not driven by any power output". If you delete that pin than KiCad shows you other pin at the same net. I don't understand why you're surprised.

author: janoc
author_rank: Super Contributor
timestamp: December 28, 2024, 12:04:23 pm
content: Quote from: PGPG on December 27, 2024, 10:46:59 pmThat function can actually save your ass from accidentally shorting things together that could cause thing go BOOM if you actually assemble that way. I don't understand the attitude of not running the free tool that can prevent you from making such errors - are you also the one that never wears helmets or seat belts because you don't have accidents? Even more so if the reason is that the person can't be bothered to learn what the problem actually is and how to correctly fix it. (meaning the newbies who are given advice to ignore this here).Quote from: PGPG on December 27, 2024, 10:46:59 pmThat's correct. The reason for this error is that the checker can't infer where is the power into the net coming from. If there is something "taking power" from the net (there are pins designated as power inputs connected to it) then something must also feed power on it or you get this error (same as you get an error if you have two power outputs feeding the same net). The way to correctly fix this is to add some component that has pins designated as power outputs.If you don't want to do that (that would typically require editing the component symbol and changing the pin designation unless the symbol is designed sensibly already - tall order for autogenerated 3rdparty crap like SnapEDA!) then there is the PWR_FLAG crutch. It tells the checker to not worry about the power on that rail because it is coming "from somewhere". This is typically used for the original power rails. There you need to add PWR_FLAG to this net somewhere in the corner of the sheet telling KiCAD that the net is powered and the ERC checker will be happy.PWR_FLAG is nothing else but a dummy pin set as power output:

author: PGPG
author_rank: Frequent Contributor
timestamp: December 28, 2024, 05:53:49 pm
content: Quote from: janoc on December 28, 2024, 12:04:23 pmIt is very hard to me to imagine what kind of error you have in mind that then routing PCB I would not notice that I am making stupid connection.Quote from: janoc on December 28, 2024, 12:04:23 pmAll devices I design are simply microcontroller and several inputs/outputs/interfaces. As each microcontroller pin can be input or output than whatever I connect to it ERC have no reason to complain. ERC don't knows how each microcontroller pin will be configured to find that I connected digital gate output to pin also configured as output.Because of this I think that ERC practically can't find me any error.If I were running ERC natural consequence would be to try to satisfy it. The result will be lot of PWR-FLAGs effectively impairing the schematic.Why lot-of?Because ERC don't understand that power goes through fuses, PTCs and ferrite beads and as I power each IC through ferrite bead I would have to add PWR-FLAG at each IC power pin. ICs that have digital and analog supply separated will have to get two PWR-FLAGs. After DCDC I use pi-filter. Even if right DCDC pin will be of type power output ERC will not understand that after pi-filter power is also present. My 2 layer PCB designs are with continuous GND at bottom so I use some 0Rs mainly at VCC tracks. ERC also don't understand that if power is on one 0R side it is also on the other side. Each 0R can generate need to add next PWR-FLAG. Drawing the schematic instead of thinking what is needed by circuit I will be thinking where to add next PWR-FLAG.I just want to have my schematics clear and readable without noise introduced by symbols used only to satisfy ERC.In very small device (pen-drive like) having only microcontroller connected to USB I decided to short all its other pins to GND (I believe that if ESD reach pin directly shorted to GND it will not destroy IC). I didn't checked it but I suppose ERC will not like such connection and to avoid it I would probably have to connect each pin to GND via net-tie. If it is so (I'm not sure as never checked it) then once more actions taken only to satisfy ERC.So my opinion of ERC is that it will not find me any error ever but will make me to do many things only to satisfy it.If ERC would understand that power goes through fuse, PTC, choke, ferryte bead, 0R then satisfying it would be not disturbing your work.

author: Benta
author_rank: Super Contributor
timestamp: December 28, 2024, 10:56:26 pm
content: Quote from: PGPG on December 28, 2024, 05:53:49 pmI agree. In a very limited view of the world, there's no reason to use ERC.But other people design somewhat more complex circuits than just connecting MCU I/Os. AndthereERC is actually very useful.

author: John B
author_rank: Frequent Contributor
timestamp: December 28, 2024, 11:18:13 pm
content: I don't consider my projects hugely complex, and yet I strongly recommend working with the ERC the whole way, from the beginning. Error checking flows through from your schematic to PCB.But you also need to triple check your schematics!

author: janoc
author_rank: Super Contributor
timestamp: December 29, 2024, 12:37:04 pm
content: Quote from: PGPG on December 28, 2024, 05:53:49 pmAs I have said - that's the same argument as why people don't want to wear seat belts or helmets. That you can't imagine it doesn't mean you won't make that mistake. In your case you end up with a scrap board, with the helmet or seat belts you end up dead. The reason is the same, though - the person thought they knew better and it can't happen to them. Until it did one day.Quote from: PGPG on December 28, 2024, 05:53:49 pmYou are totally missing the point of these checks. Or your microcontrollers don't have power supplies, you don't have various driving stages for driving loads, no DC-DC converters, etc. It really isn't meant for GPIOs even though nothing prevents to you designate a GPIO pin as power output in certain situations.Quote from: PGPG on December 28, 2024, 05:53:49 pmSorry, that only means you don't know (and have never bothered) to learn to use it. If you design your symbols correctly you shouldn't need any PWR_FLAGs. And if you do want to use this crutch, you only need it on each power rail. That's all. You specificallydo not needto add the flag after every component, such as a ferrite bead! The ERC checker is smart enough to understand that a component with pins designated as passive will transmit power across. You only need to tell it where the power comesoriginally frombecause it can't read your mind.

author: xvr
author_rank: Frequent Contributor
timestamp: December 29, 2024, 01:19:17 pm
content: QuoteWow! Do you know from which KiCAD version this functionality is available? I remember some discussion about this feature somewhere around start of v8.x, but it was not yet available that time.

author: hp3310a
author_rank: Regular Contributor
timestamp: December 29, 2024, 02:19:46 pm
content: Actually the error I was running into (see top post) had been caused by the symbol for the DS32KHZSbeing incorrect. I previously used the symbol for DS32KHZDIPwhich is the DIP version of this TCXO during design and breadboard testing. Having decided to use the SMD version for the real PCB, I changed the symbol - the pins are arranged differently.However all the 12 NC pins which are defined as "passive" in the DIP version are marked "bidirectional" in the SO version. I didn't ERC after the change.Before that change the design checked OK error free.

author: PGPG
author_rank: Frequent Contributor
timestamp: December 30, 2024, 12:55:06 am
content: Quote from: janoc on December 29, 2024, 12:37:04 pmIt sounds like capacitors having passive pins transmit power across...

author: Benta
author_rank: Super Contributor
timestamp: December 30, 2024, 01:11:00 am
content: Quote from: janoc on December 29, 2024, 12:37:04 pmWow! What version of KiCAD is that? Sounds like it has a built-in crystal ball. I'm 0n 8.0.6 myself and have not seen this functionality for transmitting power through a symbol.

author: PGPG
author_rank: Frequent Contributor
timestamp: December 30, 2024, 01:34:28 am
content: Quote from: Benta on December 30, 2024, 01:11:00 amNot exactly, I think.When 2 or 3 years ago there were discussion on this subject at KiCad forum I suggested that symbols could have a flag informing ERC if element transmit power or not.But as I really don't care I have not make it a feature request.Who knows. May be in V9 (I didn't tried it) they introduced such flag.

author: bson
author_rank: Unknown
timestamp: December 30, 2024, 06:51:07 pm
content: GND on U2 is probably an input or passive, not a power output. So KiCad doesn't see any power output to drive the net.

author: thm_w
author_rank: Super Contributor
timestamp: December 30, 2024, 11:32:27 pm
content: I just ended up adding the flags as suggested above, but, you'd think ground should be defined differently.Kicad pin types: Input, Output, Bidirectional, Tristate, Passive, Free, Unspecified, Power Input, Power Output, Open Collector, Open Emitter, Unconnected.If I look at the Gnd pin on ICs its "power input", and the Gnd symbol is also "power input".Does that make sense? Where would you have a Ground that is "power output", maybe someone can give an example, because I don't see one in the library.Quote from: bson on December 30, 2024, 06:51:07 pmThats how all regulators are in the stock library though. Where do you find power out?

author: PGPG
author_rank: Frequent Contributor
timestamp: December 31, 2024, 12:02:22 am
content: Quote from: thm_w on December 30, 2024, 11:32:27 pmIt is consistent with how ERC works - only one power output at net.

author: Benta
author_rank: Super Contributor
timestamp: December 31, 2024, 01:09:02 am
content: Quote from: thm_w on December 30, 2024, 11:32:27 pmWhy should ground be treated differently to +3.3, +5, -12 V or whatever? Ground is what you decide is your 0 V reference, but it's still a power input to your symbols. A device doesn't generate power by itself (power output), but needs to be powered from somewhere.The "GND", "VCC" etc. symbols are just graphic labels that connect all those inputs together in a readable form.Concerning three-pin regulators in the library. All have the regulated output defined as "power output". So that one's fixed.The active input is "power input" of course.That leaves the ground pin. That's also defined as a power input, because otherwise the regulator wouldn't work. Leaves us with the problem that there are only GND inputs connected together. The PWR_FLAG solves that issue in quite an elegant way by adding an output to the full host of power inputs.I often use a little trick when starting new designs: I add a small hierachical sheet in the lower left corner of the mains schematic (that area is pretty useless anyway) like this:Scratchpad.pdf(30.38 kB - downloaded 28 times.)That takes care of all the power stuff until I decide on how to power the circuit. I can then draw all the power stuff in the sub-sheet to complete the design. Easy, no?Won't work for power supply designers, I realise that. But works well otherwise

author: thm_w
author_rank: Super Contributor
timestamp: December 31, 2024, 01:10:32 am
content: Quote from: PGPG on December 31, 2024, 12:02:22 amSure, but where does that come from in a normal design without adding a flag.I opened one of the demo projects and they have a flag on the input connector, so I guess that is what they expect to be done.

author: thm_w
author_rank: Super Contributor
timestamp: December 31, 2024, 01:16:33 am
content: Quote from: Benta on December 31, 2024, 01:09:02 amYeah looks good.QuoteI don't see it necessarily as being elegant to have to add this flag to Gnd in every single design you create, and probably 99.99% of kicad projects in existence.But I appreciate the explanation and example.

author: Benta
author_rank: Super Contributor
timestamp: December 31, 2024, 01:34:36 am
content: Quote from: thm_w on December 31, 2024, 01:16:33 amThen design your own "master GND" symbol which has the properties of a PWR_FLAG. You'll need one anyway, no matter what. Colour it green or pink to identify it. Place it wherever you like. Issue solved.

author: PGPG
author_rank: Frequent Contributor
timestamp: December 31, 2024, 10:57:04 am
content: Quote from: thm_w on December 31, 2024, 01:16:33 amI also like schematic to be elegant and not have any additional things like PWR_FLAGs in many places or crosses marking all not used uC pins as 'not connected'.May way is to not run ERC ever. I really don't know how many complains it would have for my schematics. For example do the wire ended without connection to anything will fire any complain (in one schematic I used such to show ESD trap I made around PCB).The great thing about KiCad is that everyone can use it however they like.If, for example, KiCad would not allow to Update PCB from Schematic until you run ERC and have schematic error free than it would be "program better than you knows what you want" what I hate the most.

author: Benta
author_rank: Super Contributor
timestamp: December 31, 2024, 07:47:14 pm
content: Quote from: PGPG on December 31, 2024, 10:57:04 amI have a déja-vu feeling from reply #6. Strange.

author: PGPG
author_rank: Frequent Contributor
timestamp: January 01, 2025, 01:52:29 am
content: Quote from: Benta on December 31, 2024, 07:47:14 pmIt is because the schematic being elegant was mentioned by someone not taking a part in thread beginning.A moment ago in response to one of KiCad developers post I have just written few words on this subject:https://forum.kicad.info/t/altium-vs-kicad/57136/42I just don't want to put issue on the subject I have no practical experience with as I would have to make tests to ensure myself that I'm not writing something stupid.Preparing KiCad bug report to be clear and as informative as possible (making example project, several screen-shots) takes me sometimes hours. I believe that thanks to that it happened few times that reported bug was fixed the same day (once it was less then hour). Feature requests are the other subjects waiting sometimes years.