PALS and GALS and flip flops ... Galaga meets IoT - Page 1
Forum section: electronics / general

author: ornea
author_rank: Unknown
timestamp: November 04, 2016, 10:30:22 am
content: I am hoping someone on the forum maybe familiar (perhaps distantly familiar) with GAL/PAL equations for a flip flop.I have sought help on a couple of other forums but so far no help.I am relatively new to GALS (and PALS) and just recently successfully flashed my first GAL16V8A (sourced from the collection of components at the space) using an old EEPROM burner and PALASM as the compiler.I am using it to trigger a data bus read for a given set of addresses. I hacked the equations by looking at examples which seems to work well.Now I am struggling to implement a flip flop which I think should be a trivial task.The output (Z) is required to toggle every time there is an address match. i.e. every time X has a positive going edge.So far I have this for the address matches/X = /WE * /CS * J*/I*/H*/G*F*/E*/D*C*/B*A + ;Addr 225 /WE * /CS * J*/I*/H*/G*F*/E*/D*C*/B*/A +;Addr 224 /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*B*A +;Addr 223 /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*B*/A +;Addr 222 /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*/B*A +;Addr 221 /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*/B*/A ;Addr 220 y = /X;which works well but the following fails to compile.Z = /Z;Z.clkf = X;Hoping someone may be familiar and set me straight.This is for a ESP8266 based project that captures the latest high score as it occurs from the data bus on an original 1980's galaga board set and update a webserver with date, high score and initials.Initial results are promising.More details are herehttps://hackaday.io/project/17936-galaga-meets-iotPALASM Log below.Justingalaga.pdsPALASM4 PARSER - MARKET RELEASE 1.5 (7-10-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992************************************ PALASM PARSER LISTING ************************************LINE # |----+----1----+----2----+----3----+----4----+----5----+----6----+1 |;PALASM Design Description2 |3 |;---------------------------------- Declaration Segment ------------4 |TITLE GALAGA.PDS5 |PATTERN A6 |REVISION 1.07 |AUTHOR J.RICHARDS8 |COMPANY ORNEA9 |DATE 3 Nov 201610 |11 |CHIP DECODER PALCE16V8 ;really a GAL16V8A but PALASM does know GALS12 |13 |;---------------------------------- PIN Declarations ---------------14 |PIN 2 A COMBINATORIAL ; INPUT15 |PIN 3 B COMBINATORIAL ; INPUT16 |PIN 4 C COMBINATORIAL ; INPUT17 |PIN 5 D COMBINATORIAL ; INPUT18 |PIN 6 E COMBINATORIAL ; INPUT19 |PIN 7 F COMBINATORIAL ; INPUT20 |PIN 8 G COMBINATORIAL ; INPUT21 |PIN 9 H COMBINATORIAL ; INPUT22 |PIN 10 GND ; INPUT23 |PIN 12 I COMBINATORIAL ; INPUT24 |PIN 13 J COMBINATORIAL ; INPUT25 |PIN 14 X COMBINATORIAL ; OUTPUT26 |PIN 15 WE COMBINATORIAL ; INPUT27 |PIN 16 CS COMBINATORIAL ; INPUT28 |PIN 17 Y COMBINATORIAL ; OUTPUT29 |PIN 18 Z COMBINATORIAL ; OUTPUT30 |PIN 19 CLK31 |PIN 20 VCC ; INPUT32 |33 |;----------------------------------- Boolean Equation Segment ------34 |EQUATIONS35 |36 |/X = /WE * /CS * J*/I*/H*/G*F*/E*/D*C*/B*A + ;Addr 225 37 | /WE * /CS * J*/I*/H*/G*F*/E*/D*C*/B*/A +;Addr 224 38 | /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*B*A +;Addr 223 39 | /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*B*/A +;Addr 222 40 | /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*/B*A +;Addr 221 41 | /WE * /CS * J*/I*/H*/G*F*/E*/D*/C*/B*/A ;Addr 220 42 |43 |Y = /X;44 |45 |Z = /Z;46 |Z.clkf = X;47 |48 |49 |;-------------------------------------------------------------------%% PARSE %% No errors. No warnings.%% PARSE %% File processed successfully. File: galaga.pdsPALASM4 BPP - MARKET RELEASE 1.5 (7-10-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992EQUATIONS SEGMENTProcessing equation for ====>/XProcessing equation for ====>YProcessing equation for ====>ZProcessing equation for ====>Z.CLKF%% BPP %% Maximum memory allocated was: 22214 bytes.%% BPP %% File Processed Successfully. File: galaga.pds.%% BPP %% ERROR count: 0 WARNING count: 0PALASM4 EXPAND - MARKET RELEASE 1.5 (7-10-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992....%% EXPAND %% Maximum memory allocated was: 12216 bytes.%% EXPAND %% File Processed Successfully. File: galaga.pds.%% EXPAND %% ERROR count: 0 WARNING count: 0PALASM4 BPP - MARKET RELEASE 1.5 (7-10-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992EQUATIONS SEGMENTProcessing equation for ====>/XProcessing equation for ====>YProcessing equation for ====>ZProcessing equation for ====>Z.CLKF%% BPP %% Maximum memory allocated was: 22214 bytes.%% BPP %% File Processed Successfully. File: galaga.pds.%% BPP %% ERROR count: 0 WARNING count: 0PALASM4 MINIMIZE - MARKET RELEASE 1.5 (7-10-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992....|> WARNING L1810 Gate splitting not supported for device PAL16V8.Ignoring -p option.Processing equation ====> Z MINIMIZE_ON (1 pt ---> 1 pt)Processing equation ====> Z.CLKF MINIMIZE_ON (1 pt ---> 1 pt)|> WARNING L1810 Gate splitting not supported for device PAL16V8.Ignoring -p option.Processing equation ====> Y MINIMIZE_ON (1 pt ---> 1 pt)|> WARNING L1810 Gate splitting not supported for device PAL16V8.Ignoring -p option.Processing equation ====> /X MINIMIZE_ON (4 pt ---> 2 pt)%% MINIMIZE %% Maximum memory allocated was: 13266 bytes.%% MINIMIZE %% File Processed Successfully. File: galaga.pds.%% MINIMIZE %% ERROR count: 0 WARNING count: 3PALASM4 PAL ASSEMBLER - MARKET RELEASE 1.5a (8-20-92)(C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992FILE galaga.pdsTITLE GALAGA.PDSEquation being processed for output ==>> Z.CLKF|> ERROR X3300Wrong clock pin X was used for Z.CLKF.Equation being processed for output ==>> /XEquation being processed for output ==>> YEquation being processed for output ==>> ZThe fuse plot is stored in ===>galaga.XPTDid not produce JEDEC output.%% PAL ASSEMBLER %% Maximum memory allocated was: 12672 bytes.%% PAL ASSEMBLER %% File Processing Terminated. File: galaga.pds.%% PAL ASSEMBLER %% ERROR count: 1 WARNING count: 0

author: stj
author_rank: Super Contributor
timestamp: November 04, 2016, 11:52:17 am
content: Z = /Zhow can a pin be an inverted version of itself??

author: Andy Watson
author_rank: Super Contributor
timestamp: November 04, 2016, 01:06:23 pm
content: You need to make the output "registered" (IIRC). I think this requires a colon in the equation, like Z:= !Z

author: ornea
author_rank: Unknown
timestamp: November 04, 2016, 02:45:02 pm
content: I have tried various combinations of registered and combinatorial, with and without the ":" and switching around the pins to no avail.For something I originally thought was trivial ...

author: Kalvin
author_rank: Super Contributor
timestamp: November 04, 2016, 03:13:14 pm
content: Are you sure that you can generate on-chip clock signal? Typically the small PAL/GAL-chips can use only the external clock signal which will be global clock for all registered outputs..

author: Andy Watson
author_rank: Super Contributor
timestamp: November 04, 2016, 03:40:31 pm
content: Quote from: Kalvin on November 04, 2016, 03:13:14 pmI think that's right. The datasheet shows that the clock is hardwired to pin 1.

author: ornea
author_rank: Unknown
timestamp: November 04, 2016, 04:04:25 pm
content: Thanks for the info regarding clock inputs. I think you have put me on the right track. I have been struggling to follow the manuals and have re-read info regarding Combinatorial and Registered inputs and just hoped that it would become clear as I program and experiment.I assumed there may be some trick to use an output as a clock source, but perhaps not. I will experiment with PIN 1 as clock, hard wire X output to pin 1 etc.Thanks again

author: Kalvin
author_rank: Super Contributor
timestamp: November 04, 2016, 04:09:33 pm
content: Quote from: ornea on November 04, 2016, 04:04:25 pmHopefully the X output doesn't have glitches when the input terms (product and sum terms) of the X change. Just check with the scope that you get clean X output. If you get glitches, you should consider a proper synchronous design.

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: November 04, 2016, 09:55:01 pm
content: Quote from: ornea on November 04, 2016, 04:04:25 pmIf your code references a register then the chip should be in 'registered' mode with all registers clocked from pin 1 (which in this mode is connectedonlyto the register clock inputs and cannot be used in logic equations). Pin 11 is dedicated to register output enable. All other pins can be used for combinatorial I/O.QuoteToggling a register is simply a matter of feeding its /Q output into the D input (just like you would with a regular D flip-flop), like this:-Z.d = /Z;Note: 'Z' is the name of the register'soutputpin, and Z.d is its D input.

author: ornea
author_rank: Unknown
timestamp: November 06, 2016, 08:19:02 am
content: I can now achieve what I set out to do with the GAL which is to generate a latch pulse when the range of addresses are matched and toggle a pin on each match so I can distinguish between subsequent writes. However, I have not been able to make use of the internal D type flip flop. Not required but I am curious.I have experimented with a variety of part types in the PDS file but whenever it tries to compile the followingZ.D = /Z or Z.D :=/Zit throws38 |Z.D := /Z;ERROR ---^ (L38/C2)|> ERROR P57 Illegal symbol .D detected.Finally had success withZ.CLKF = CLKbut just cant getZ.D = /Zto compile.I am reasonably certain that the part as specified in the following line does support the D flip -flop featureCHIP exmachina PAL16V8;I am also at a loss to tell PALASM that REGISTERED mode is desired. The instructions say that when creating a new design, F2 should give you all the options but I do not get that dialog box. So I figured there must be a way to manually describe that in the PDS file. But alas without examples I am at a loss. I have been considering that configuring a pin as registered should be sufficient but I am not certain.It seems there are very few examples out there that include using Flip-Flops, so again if any one can set me straight, it would be most welcome.Justin

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: November 06, 2016, 10:41:46 am
content: Sorry I am not familiar with PALASM (assumed it used similar syntax toWinCUPL).I think you have to do the following:-1. Set output pin to registered modeCode:PIN 18 Z REGISTERED2. route signal to D input with ':='Code:Z := /Z

author: ornea
author_rank: Unknown
timestamp: November 06, 2016, 12:18:00 pm
content: Bruce,thank you kindly. I think you have solved the riddle for me.Cheers Justin