Memories, lest we forget - Page 1
Forum section: electronics / general

author: tggzzz
author_rank: Super Contributor
timestamp: May 02, 2020, 01:19:30 pm
content: The first computer I used had an architectural maximum of 8192 words, each with 39 bits. Some machines shipped with 4096 words. You can still see and hear one running, an Elliott 803 at Teh National Museum of Computing.The memory was extremely expensive, since eachbitwashand madeby women ("because they are more dextrous"). I was once offered a job that was something to do with making these memoriies, but the 1kbit DRAMs were clearly the future.So, what did they look like? I recently bought a cheap and nasty sucking red hot poker, so I've finally got around to desoldering one.Here's a 1kbit memory from a1972 Olivetti computer. It was originally mounted on its own circuit board, and a single randomly selected bit could be (destructively) read at a time. Writing it back was a separate operation, just like it is with a modern DRAM.And this is what several bits look like:The horizontal and vertical wires are the row and coumn wires that select a single core for reading or writing. The diagonal green wire is the sense wire that goes though all cores.I'll leave anybody interested in the details to do a little googling; I'm not going to (poorly) repeat good material!

author: bd139
author_rank: Super Contributor
timestamp: May 02, 2020, 01:31:16 pm
content: Thanks for posting thisNice to see some original vintage computing posts

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 02, 2020, 01:54:25 pm
content: What were the typical read and write times?

author: I wanted a rude username
author_rank: Frequent Contributor
timestamp: May 02, 2020, 10:39:45 pm
content: Quote from: SiliconWizard on May 02, 2020, 01:54:25 pm> Early core memory systems had cycle times of about 6 µs, which had fallen to1.2 µs by the early 1970s, and by the mid-70s it was down to 600 ns (0.6 µs). Some designs had substantially higher performance: the CDC 6600 had a memory cycle time of 1.0 µs in 1964, using cores that required a half-select current of 200 mA. Everything possible was done in order to decrease access times and increase data rates (bandwidth), including the simultaneous use of multiple grids of core, each storing one bit of a data word. For instance, a machine might use 32 grids of core with a single bit of the 32-bit word in each one, and the controller could access the entire 32-bit word in a single read/write cycle.(from Wikipedia, of course)Note that, since reading a bit erases its contents, each read must be followed by a re-write if the value is to be maintained. I believe that, at least in the case of computers, this was generally handled by the memory controller and not the CPU ... but I'm not sure if this would be included in the stated cycle time.

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 02, 2020, 10:43:10 pm
content: Still, not too bad actually at the time!

author: schmitt trigger
author_rank: Super Contributor
timestamp: May 02, 2020, 11:25:14 pm
content: You are so lucky!Frame the unit and hang it prominently on your office wall.Along with some smarty pants quote similar to: "Your phone has xx million times this much memory"Quote from: tggzzz on May 02, 2020, 01:19:30 pm

author: magic
author_rank: Super Contributor
timestamp: May 03, 2020, 05:57:04 am
content: Quote from: tggzzz on May 02, 2020, 01:19:30 pmI'm quite sure modern DRAM reads/rewrites more than one bit at a time and probably the same technique could be applied to produce modern high performance core memory with some extra transistors

author: tggzzz
author_rank: Super Contributor
timestamp: May 03, 2020, 07:34:33 am
content: Quote from: magic on May 03, 2020, 05:57:04 amYes and no.That could be and was achieved with core memory: with 39 of the above planes you would have be able to read 39 bits in one cycle. That wasn't done with the 803 since the entire machine was bit serial.If you look inside a DRAM you will see similar replication to get parallelism. Each section can only read/write the charge on one capacitor at a time.

author: magic
author_rank: Super Contributor
timestamp: May 03, 2020, 08:19:49 am
content: One DRAM bank reads a whole row of cells at a time to its internal SRAM cache, where you can play with any of the numerous consecutive bits to your heart's content with relatively low latency (tCAS), before writing all of them back. The interface to the SRAM is also word-based so you read/write multiple consecutive bits per clock cycle. It is a slightly different architecture.Think removing the column lines from core memory, doubling the current in the one row line which will be driven at a time and sensing/writing the whole row simultaneously. And low latency access to any word in the currently active row.

author: MosherIV
author_rank: Super Contributor
timestamp: May 04, 2020, 11:22:00 am
content: Hi TggzzzGlad that you enjoyed your visit to The National Museum of Computing, enough that it inspired you to go out and obtain your own core store.I am sure everyone is aware of the difficult times museums and charities are having during these difficult times.It is because of these difficult times, I am asking EEVBlog forum members to support The National Museum of Computing :https://www.crowdfunder.co.uk/fuelling-the-future-powering-the-past?tk=b26125afe72adc6ed9d367aa05e86964ed1b9641During lock down, the museum has no income from visitors but the rent still has to be paid, so please help - I hope to see some of you after the lock down is lifted.Thank you and keep safe.

author: tggzzz
author_rank: Super Contributor
timestamp: May 05, 2020, 02:45:25 pm
content: Quote from: MosherIV on May 04, 2020, 11:22:00 amOh, but it didn't.I've had that core memory since the early 70s, long before TNMoC was even a gleam in someone's eye. IIRC it came from an Olivetti computer that had been tipped.I also picked up a core plane from the Boston Computer Museum around 1990.Anyway, thanks for your post; donation made.

author: bd139
author_rank: Super Contributor
timestamp: May 05, 2020, 03:05:20 pm
content: Donated as well. I'll try and brow beat my employer and fellow employees to make a donation as well. Went to TNMoC last August and was intending to go again this year.