Measuring a small (slower) signal with giant DC offsets (fast) - Page 1
Forum section: electronics / general

author: Andrew_K
author_rank: Contributor
timestamp: June 14, 2023, 01:25:23 am
content: Hi,I have a measurement I am trying to take involving small (mV) signals that are super-imposed with offsets that are essentially step-functions (600mV max).The step-functions have a width of 50uSec up to 10's of mSec. The small mV signals are slow in time, sub 1kHz. Using a 24-bit sigma-delta with low BW means I get great resolution on the small signal, but when I add the offsets to the mix, they cause giant exponential decays.Using a faster ADC, 2MHz 24-bit SAR, I can remove the step in DSP, decimate down. However, I can't get enough resolution through decimation. I need to maximize BW before removing samples, or I end up with a lot of samples to throw out while things settle, and I can lose significant portions of my signal-of-interest.In a perfect world, I could remove the step-functions perfectly, gain-up the smaller signal, and just use a regular 16-bit ADC.Can a DAC be used to force a signal within the dynamic range of my ADC? Are there implications for SNR and resolution that I'm not thinking of?

author: thermistor-guy
author_rank: Frequent Contributor
timestamp: June 14, 2023, 05:07:31 am
content: Replying here mainly to bookmark. I'm very interested in the answers.It seems to me that the steps are quite distinctive. So some sort of signal cancellation, or basis pursuit,should be possible.I'm grasping, but one idea, using feedback and feed-forward:* detect and estimate the step functions with an ADC optimized for it;* feed back the step via a DAC, into an analog copy of the incoming signal, to cancel most of the step;* detect the copied signal + partially cancelled step with a second ADC optimized for it;* filter the second ADC output, and perform further cancellation of the residual step signal using your estimate of it.

author: Kleinstein
author_rank: Super Contributor
timestamp: June 14, 2023, 07:02:18 am
content: DACs are also not that great and may well have quite some noise. Moder ADC chip can have quite some impressive performance and there is not much one can do by adding / subtracting thing upfront. One aready struggles to get an input amplifier / scaling and reference to no loose too much of the ADC performance.A point that could help is if the signal is periodic or repeatable with a good trigger. In this can one could use a boxcar like averaging to improve on the S/N ratio. So no oversampling with many readings in a row, but averaging over multiple periods. There are some of the modern DSOs that could be sufficient (though a bit expensive).

author: voltsandjolts
author_rank: Unknown
timestamp: June 14, 2023, 08:02:06 am
content: Edge triggered sample and hold?

author: KT88
author_rank: Frequent Contributor
timestamp: June 14, 2023, 09:14:36 am
content: I agree with Kleinstein that a DAC would potentially add too much noise...However, if you feed the DAC signal into a summing node it would be possible to use a DAC with a higher output range and attenuate the output into the summing node. When using a 5V-DAC the noise of the DAC would be attenuated by about 12dB... that might be already sufficient.CheersAndreas

author: trtr6842
author_rank: Regular Contributor
timestamp: June 14, 2023, 02:22:44 pm
content: The AD7768-1 might be interesting to you:https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdfIt's a 256kSps sigma delta ADC with a built-in FIR filter with a super sharp cutoff at 0.4x the sample rate, and at most 11µV RMS of noise at the highest sample rate. If you don't care about latency it could be worth a look.The TI ADS127L11 has similar features, and faster datarates:https://www.ti.com/lit/ds/symlink/ads127l11.pdf?ts=1686752204620&ref_url=https%253A%252F%252Fwww.ti.com%252Fdata-converters%252Fadc-circuit%252Fprecision-adcs%252Fproducts.htmlI'm curious... why would a slow step response to the steps in your signal be bad? It seems like if you know enough about the step functions behavior to feed it out with a DAC you could instead run the raw step function through a digital SINC filter that matches the slower sigma-delta's response and subtract it mathematically instead of in hardware, that way the noise will be limited by your ADC and how well you calculate the subtractive step function.

author: Marco
author_rank: Super Contributor
timestamp: June 16, 2023, 11:17:15 pm
content: I'd try something like a non inverting amplifier with a capacitor to ground in the feedback path. Then when the output is too large, short out feedback divider with an analog switch.