FPGAs programming using AI - Page 1
Forum section: electronics / general

author: zapta
author_rank: Super Contributor
timestamp: June 07, 2025, 06:24:30 am
content: Coding with AI is becoming popular so I decided to test is with ChatGpt and verilog, asking it to create a testbench for a simple blinky module. First I asked it to memorize a set of rulesRule 1: Use $dumpvars() with the testbench module name as an argument.Rule 2: Do not use $dumpfile().Rule 3: Compare expected values to actual values and if they don't match, print an error message and call $fatal to exit.Rule 4: Anytime you call $fatal in the testbench, first test the condition `ifndef INTERACTIVE_SIM, skip $fatal if the condition is false.Rule 5: At the end of the testbench print the message "End of simulation".Rule 6: Create in the testbench a boolean signal called tb_error with the initial value of 0 and the comment "Set to high on first error" and set it to 1 each time an actual value doesn't match the expected value.Then I gave it the verilog moduleCode:module Main #(parameter integer N = 3_000_000) (input CLK, // 12MHz clockoutput [7:0] ROWS, // LED rowsoutput [3:0] COLS // LED columns);reg [31:0] counter = 0;reg toggle = 0;// Rows and columns are active low.assign ROWS = {6'b111111, toggle, ~toggle};assign COLS = 4'b1110;always @(posedge CLK) beginif (counter >= N - 1) begincounter <= 0;toggle <= !toggle;end else begincounter <= counter + 1;endendendmoduleAnd asked it to generate a testbench for the module based on the rule. After a few second it gave me the testbench below which satisfies the requirement and completes successful. One nice feature is that when it give you some code you can ask him to make changes, for example increase the simularion time and assert the values more often.Code:// Generated by ChatGPT using the Apio's Testbench Rules.// Formatted by `apio format`.`default_nettype nonemodule test_Main;reg CLK = 0;wire [7:0] ROWS;wire [3:0] COLS;// Rule 6: Set to high on first errorreg tb_error = 0;Main #(.N(3)) dut (.CLK(CLK),.ROWS(ROWS),.COLS(COLS));// Clock: 10ns period (12MHz is ~83.3ns, simplified for sim)always #5 CLK = ~CLK;initial begin// Rule 1: Use $dumpvars with module name$dumpvars(0, test_Main);#1;if (ROWS !== 8'b11111101 || COLS !== 4'b1110) begin$display("ERROR at t=0: Expected ROWS=11111101, COLS=1110, got ROWS=%b, COLS=%b", ROWS, COLS);tb_error = 1;`ifndef INTERACTIVE_SIM$fatal;`endifend// === Toggle 1 ===repeat (3) @(posedge CLK); #1;if (ROWS !== 8'b11111110) begin$display("ERROR at toggle 1: Expected ROWS=11111110, got ROWS=%b", ROWS);tb_error = 1;`ifndef INTERACTIVE_SIM$fatal;`endifend// === Toggle 2 ===repeat (3) @(posedge CLK); #1;if (ROWS !== 8'b11111101) begin$display("ERROR at toggle 2: Expected ROWS=11111101, got ROWS=%b", ROWS);tb_error = 1;`ifndef INTERACTIVE_SIM$fatal;`endifend// === Toggle 3 ===repeat (3) @(posedge CLK); #1;if (ROWS !== 8'b11111110) begin$display("ERROR at toggle 3: Expected ROWS=11111110, got ROWS=%b", ROWS);tb_error = 1;`ifndef INTERACTIVE_SIM$fatal;`endifend// Rule 5: End of simulation message$display("End of simulation");$finish;endendmodule

author: AndyC_772
author_rank: Super Contributor
timestamp: June 07, 2025, 06:59:25 am
content: Seems like the question being asked of the AI is to determine whether your blinky code does exactly what its source code says it should do - which, of course, it does unless the compiler itself is faulty.How does it know what youintendedthe code to do?

author: zapta
author_rank: Super Contributor
timestamp: June 07, 2025, 07:13:40 am
content: Quote from: AndyC_772 on June 07, 2025, 06:59:25 amMy intention was to have regressions tests. That is, I validate the design once manually and the testbench is then used in automatic tests to detect regressions.However, I just discussed that design with the ChatGpt and it's very interesting. here is the Q&A.https://chatgpt.com/share/6843e653-e194-8000-9b13-499ed2c6dcfa(scroll to the top, my input is on the right).