Just showing off my most recent function generator project - Page 1
Forum section: electronics / general

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 05, 2018, 02:47:20 pm
content: Hi,In this video, I do a condensed demonstration of my homemade function generator. It is in Portuguese, but I hope you like it!This is a function generator based on the AD9834 from Analog Devices. It can go up to 2MHz, sine and triangular wave, without showing a significant performance loss. To demo it, I use an Analog Discovery analyzer from Digilent.To learn more about this project, see this:http://www.bloguetronica.com/2018/07/gerador-de-funcoes-gf2.htmlI'm currently developing a new revision that will feature an improved output stage, amongst other things. It will be capable of generating 8Mz sine waves, but the triangular wave frequency is still limited to 2MHz. If I recall correctly, the issue with the current function generator was discussed somewhere in this forum.Kind regards, Samuel Lourenço

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 10, 2018, 02:03:23 pm
content: Hi,Just uploaded a tear down video (not actually a tear down, I had an unfinished GF2 function generator laying around). I show the PCB and the schematic diagram. Unfortunately, it is in Portuguese and captions are not available yet.P.S.: I hate the sound of my voice. It sounds muffled and the lack of vocal depth is evident.Kind regards, Samuel Lourenço

author: MarkF
author_rank: Super Contributor
timestamp: September 10, 2018, 05:35:27 pm
content: I did something very similar using a PIC18F2550 microcontroller if you would like to compare notes.Output: sine, triangle, square and sweepPicture of the prototype:

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 11, 2018, 12:00:24 am
content: Hi MarkF,Overall, I like your design, and I see that it is very complete and versatile. However, IMHO, you could have done your filtering differently. A higher order filter is necessary, and you could have located it at the output of the AD9834, or buffered it so it is not affected by the load conditions (your design requires a constant 50load).I see that your amplitude control circuitry also has the advantage of using the DAC's full scale. I've seen an application note where the DAC output is directly tied to FS_ADJUST via the resistor (http://www.analog.com/media/en/reference-design-documentation/reference-designs/CN0156.pdf). Why they did that, is beyond me. However, your approach is way more correct. The relationship betweed the DAC's output voltage and the amplitude is, in your case, inverted, but that's not important since your micro-controller "compensates".One thing that brought my attention was your offset control. Simple, yet effective. You are using the TL082 to use the full scale of the DAC, right? The LM7171 is acting both as an adder (adds the offset to the signal coming from IOUT) and a subtractor? It has to be well scaled, but I like it.By the way, how well is your filter working? Didn't expect to see a 3rd order reconstruction filter. Are you doing some kind of pre-filtering with the LM7171? How does your filter behaves without termination load? I see that you've used the same website as I did to calculate the filter. Attached my calculations ("comp" is for standard component values, "eff" is for standard component values + stray capacitance of 4pF, as measured on the PCB and "log" is for logarithmic scale).Anyway, I've uploaded the schematic and attached it to this message. It didn't occurred to me doing so while I was posting the OP, which is a bit of a shame. You'll see that my design has no micro-controller. The control is done by software, via USB. I hope this is useful to you. The design is open-source, so feel free to use it or some aspects of it.Kind regards, Samuel Lourenço

author: MarkF
author_rank: Super Contributor
timestamp: September 11, 2018, 02:28:40 am
content: My output is set for 2Vp-p and the TL082 to add a +/-3V DC offset. Just so I can drive the sine/triangle output all positive or negative.The frequency sweep (sine sweep up or down) is performed in the PIC microcontroller via a 500 Hz interrupt to change the freq.The square wave is the Sign-Bit output from the AD9834 and that output is multiplexed with a sweep start pulse for triggering in the sweep mode.I thought the resistor on the FS-ADJUST pin was to limit the output current. I need to revisit that part of the datasheet.As far as the filter...It was an after thought. The output without it was very clean and I didn't see that it needed much of a filter. Maybe it is all due to my choice of a 32.768 MHz master clock (i.e. an exact power of 2). It solves a lot of jitter issues. I guess you're right that I've forced a 50output impedance. Maybe that's a bad idea. I admit the output is a weak point in my design.

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 11, 2018, 02:54:04 am
content: Hi MarkF,When you say that a 32.768MHz clock solves a lot o jitter issues, what do you mean? Also, mind that 32.768 is an exact power of two, but only in the KHz range. Does that mean that the micro-controller works by ms intervals, or something?Also, I see that the MSBOUT signal from the AD9834 is being fed to the micro-controller. Any reason for that?Kind regards, Samuel Lourenço

author: MarkF
author_rank: Super Contributor
timestamp: September 11, 2018, 03:08:54 am
content: The master clock being a power of 2 means that the divisor to set the frequency is a whole number (no fractional part to cause jitter). The divisor can be exactly represented in a binary number.The SIGN_BITOUT of the AD9834 and a bit from the PIC are both tri-state outputs and tied to SQR/TRIG coax jack. Only one is used at any one time. The SIGN_BITOUT during all modes except the "freq sweep" mode. The PIC generates a pulse only during "freq sweep" mode as a trigger and disabled on all other modes. It's a trick to save the need for a third output jack.

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 11, 2018, 03:59:18 am
content: Hi Mark,I think what you are referring to as "jitter" sounds more like "drift" to me. Your goal was to be able to adjust the frequency by 1Hz frequency steps, instead of some fraction, right? Correct me if I'm wrong, but jitter refers to rapid and slight variations in frequency and/or phase, although the overall frequency as measure within a relatively wide time interval doesn't change.Kind regards, Samuel Lourenço

author: MarkF
author_rank: Super Contributor
timestamp: September 11, 2018, 04:08:32 am
content: No. I'm talking about jitter. Just as you describe it.If your desired frequency requires 1/2 a binary bit, it would need to round down for one cycle and round up for the next cycle. Causing jitter because it can't generate your exact frequency.

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 11, 2018, 04:45:12 am
content: Strange is the need of rounding on a cycle to cycle basis, which you avoided in your case. Normally, in these chips, the frequency is set to a defined value, and left as is. That means that only discrete frequency values are attainable, unless you resort such artifacts. Never seen that technique being applied with a DDS chip such as this.In fact, such technique would require a very fast form of control, which is impossible via SPI. Probably, what you could do if you wished to do so is to program two frequency different but adjacent values using the registers FREQ0 and FREQ1, and then toggle the FSELECT pin following a given duty cycle. And then, yes, the output signal would show lots of jitter.Kind regards, Samuel Lourenço

author: MarkF
author_rank: Super Contributor
timestamp: September 11, 2018, 08:08:57 am
content: I'm not describing this well. The rounding is more of a math description of what I think is taking place. Maybe it's just the digital portion that exhibits the jitter. I've been told several times I would have problems with jitter by using the SIGN-BITOUT instead of using the internal comparator to get the square wave. I have not been able to create the jitter though. I just used the 32.768 MHz because of what I remember from doing digital signal synthesis 25+ years ago. That was before DDS chips existed and I must be remembering the reason wrong.I should try plugging in a different clock without the filtering to see if I can create the jitter. See if it really is my clock selection.Also, take a look here:https://www.eevblog.com/forum/projects/dds-project-76783/msg1067555/#msg1067555

author: bloguetronica
author_rank: Frequent Contributor
timestamp: September 11, 2018, 10:56:30 am
content: Well, relatively to the SBOUT pin, yes, you'll have jitter of the output frequency is not an integer division of the MCLK frequency (e.g. 4.096MHz or 1.024MHz result from integer divisions, in your case). That means that, if you choose a frequency such as 1MHz, for example, you'll have jitter, even to the point of not having a 50% duty cycle. To avoid jitter, you must filter first the analog signals via an high-order LPF, to remove the quantization steps, and then feed back the resulting signal to the comparator (or do as I did, use an external comparator). That way, your square wave signal will show much less jitter. The higher the order of your filter, and the steeper the response (that excludes Bessel filters), the better.By the way, I should mention that the AD9834 doesn't allow triangle output if the OPBITEN bit is set to 1. That is one of the reasons why I've used an external comparator (because, in order to use the internal comparator, you must have the previous bit set to 1, which means you won't have a triangular output, but a sinusoidal one instead).Kind regards, Samuel Lourenço