Various grounds and pours relating to Gigabit Ethernet? - Page 1
Forum section: electronics / general

author: Northy
author_rank: Regular Contributor
timestamp: February 16, 2021, 02:51:35 pm
content: What do people think is best practise for the various grounds and pours relating to Gigabit Ethernet?From what I can see we've got:Chassis GNDBob Smith plane (GND)Digital GNDOn a 4 layer board:TopGNDPowerBottomWould you cut out the Chassis GND under the connector?Do you pour any GND under (and maybe around) the traces from the connector to the magnetics?Do you pour digital GND under (and maybe around) the traces from the magnetics to the Phy?Does the Bob Smith part have a pour?Do you mirror the pours through all four layers?Are there any emptive no-fit components that it would be a good idea to add to smooth EMC/EMI/ESD/Safety testing?Thanks,G

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 16, 2021, 06:49:40 pm
content: I take it this is with discrete transformers and a plain jack?- Orient the PHY's media pins towards the transformer, keep the lines as short as possible. These are stub lengths with respect to the centertap of the transformer, which I'm guessing is bypassed to GND (for most gig PHYs; supplied from AVCC for most 10/100 PHYs). Including bypasses, any termination resistors, and anything else nearby that's too close/important to push aside: this distance will likely be around 1cm. More than a few cm is cause for concern.- I don't worry about a plane for "Bob Smith" termination. They're coming off long wires already, another few mm of trace isn't going to bother them any and they're terminated besides.- Also likely don't worry about plane under the media pairs. Get the impedance about right (edge coupled differential) and keep them short (under say 10cm), between transformer and jack. Because of ESD voltages, you probably want higher clearances here, or ground removal (from mid layer, maybe moving it to back side, or removing entirely), consider that in the impedance calculation of course. Don't beat yourself up if you can't reach 100 ohms, or completely clear ground: that cable has a long way to go, through worse things than you're doing here. It'll be fine. (If you have strict performance standards to meet, to maximize range or whatever, do pay attention to those of course.)ESD diodes I feel are usually optional, do check the PHY rating of course. You can put them in if you like, media or PHY side. There are purpose-made devices, or clamp diodes (H-bridge / gig type driver) or zeners (push-pull / 10/100 type driver) can be used. Mind, these are differential only, no supply, on the media side; on the PHY side, they may be referenced to supply and ground when helpful.The transformer should handle most potential EMC issues, but if you have stringent requirements, shielded connectors and STP may be necessary. In this case, at the very least, heavily RF-bypass the jack's metal can to circuit or chassis ground (whichever is your best, nearest RF ground), if not direct ground (which does carry the hazard of galvanic ground loop). EMI springs are excellent here (a lot of connectors have them built in), of course springs are direct grounding so isolation is not possible in that case. How much isolation is needed, depends; maybe there's a standard for this. As you can see, shielding just makes things harder, so it's nice if you can get away with just UTP.- I don't think there's really anything else to add. CMCs? Already in the transformer. Additional filtering? Almost anything else will corrupt the data (like uh, don't put ferrite beads there, right). I'm not sure what the above two cases (UTP and STP) wouldn't cover, I'd have to see the specific case I think.- I don't worry about pours on all layers. Keep a solid ground under everything, and route VCC and AVCC as best they can (typically the first in a board-wide plane, the second may not be large enough to bother pouring. Enough bypass caps are recommended that you don't need a pour anyway. (Note: it may be worth for a conventional 10/100 output network.)Tim

author: nctnico
author_rank: Super Contributor
timestamp: February 16, 2021, 08:19:53 pm
content: Well... for several 'cheaper' phys I had to insert 10 Ohm @ 100MHz ferrite beads in the signal lines in order to pass EMC. The cheaper phys push out a lot of high frequency content onto the wires. If you dig a little deeper in the appnotes you usually find an example layout with space for series resistors / beads and capacitors to ground. The trick is to find beads which suppress above 125 MHz.

author: Northy
author_rank: Regular Contributor
timestamp: February 16, 2021, 08:54:59 pm
content: Thanks for the repliesYes plain jack and discrete magnetics, I should have said that. Well actually two of each, as I've got two ports connected to a switch.For the magnetics I'm using Pulse H5007NLThttps://www.mouser.co.uk/datasheet/2/336/HC500-220797.pdfThe distance between the Jacks and the magnetics is ~5mm.Between the magnetics and Phy (well actually switch) i've got Littelfuse SP3012-04HTGhttps://www.mouser.co.uk/datasheet/2/240/Littelfuse_TVS_Diode_Array_SP3012_Datasheet.pdf-268239.pdfThe distance between the magnetics and the switch (through the TVSs) is ~20mm for one port, ~30mm for the other port.Magnetics center taps are bypassed to digital GND through 100nF capacitors.The Phy is a switch, Microchip KSZ9477STXI.https://www.mouser.co.uk/datasheet/2/268/00002392A-1102351.pdfSo no pour at all on all four layers under the traces between the jacks and magnetics? Get these as close to 100ohm matched impedance as possible.The jacks are currently connected to Chassis_GND (Earth) and there's a screw mounting hole right next to them.If I have a GND pour on the Phy side, should this start half way under the magnetics or there-abouts?Thanks,G

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 16, 2021, 09:22:13 pm
content: Yeah, that sounds fine. I'd move the transformers closer to the PHY than the connectors. Yeah, ground can be cut out underneath the transformer, the PHY side pads probably should be above ground while the rest doesn't much matter, and the media pads should probably not be above ground.Oh also, since you're removing ground, it's a lot easier to get face-coupled stripline impedances down. Uh, may have trouble finding a calculator for that, i.e. buried or semi-buried differential stripline without ground planes. Does Saturn calculator do that one? Anyway, again, not a huge deal.And I assume by mentioning it, your mounting hole is grounded too? Yeah, nice.Tim

author: Northy
author_rank: Regular Contributor
timestamp: February 16, 2021, 09:47:43 pm
content: I'd probably struggle to get the transformers closer to the PHY tbh, but I'll have a look.Oh, I forgot one thing. I have a 2R2 resistor in each trace from the magnetics to the PHY, I read that was a good idea somewheremaybe it's not.I googled face-coupled stripline, but couldn't find anything. Are they just striplines on internal layers? I've routed all traces between jack -> magnetics and magnetics -> PHY on the top layer without any vias.Yes, the mounting hole is a connection to a metal chassis.Another question just popped in my head, maybe it should be another thread.If you've got a 4 (or maybe more) layer board with the usual stack-up, Top/GND/Power/Bottom, and the GND layer is a solid plane, is there any advantage to pouring the Top and Bottom layers with GND as-well, or can it cause problems? Is it maybe a good idea as islands (for want of a better description) on Top and Bottom (connected with plenty of vias) around things like power supply circuits and around PHYs etc where it would pour between the Ethernet traces?Thanks,G

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 16, 2021, 10:15:35 pm
content: 2.2 ohms isn't enough to do anything, for better or worse, really. I'd use 0 ohm jumpers, just in case the above (FB recommendation) proves useful?Oh, broadside coupled I should say.Outer layer ground pour isn't very useful, for the most part. The edge coupling from traces/pads is small, maybe 20% even for very thin traces and small ground spacing.Which means a few things:- Microstrip traces can be relatively close together without much danger of coupling between them (assuming nice large signals and wide thresholds, like LVCMOS). Convenient for dense parallel buses.- Edge coupled differential pairs aren't really so differential (e.g. LVDS, PCIe, etc.) and the normal or common mode is more significant*.- Also why same-layer edge-coupled differential has a relatively high impedance, even for very wide traces and minimum gap.Indeed, suppose we let "trace width" go to infinity: now it takes infinite time for waves near the gap to reach the edges, so what happens at the edges, doesn't matter. Next suppose we short-circuit the edges -- not that a short circuit around an infinite perimeter is all that meaningful, anyways. Finally, suppose we bring the edges back in from infinity, this time shorted together -- we need to define some geometry for that short, as it has a finite size now; and also waves can propagate to, and reflect off, it, so we'll have some lower cutoff frequency. We've transformed differential stripline into slotline waveguide. And, yeah, the characteristic impedance for this geometry is still relatively high -- as can be seen from this sequence of transformations, which has little effect on the impedance of the propagating mode.*Not to say there's no advantage to differential routing -- the point is to have both traces encounter the same disturbances, at the same distance along each route. So the induced noise is largely common mode, easily rejected by the receiver.*Also, in terms of significance, it's not all that common anyway, to terminate the common mode -- it tends to work out that transmitters have a close enough impedance. Usually an LVDS transmitter is something like, a source follower paired with a current sink (and then a pair of those to realize a full differential H-bridge like thing), and the source follower is what sets the CM voltage and source resistance. The output isn't quite so constant-current as they might lead you to believe, which is fortunate because a true current source wouldn't terminate signals at all, and quite high voltages could build up in the common mode, eventually exceeding the receiver or transmitter CM voltage range, corrupting the differential signal.Anyway, it can be helpful to fill in surface ground, when very low impedances are necessary (e.g., switchers), or extra shielding is necessary (e.g. internal traces, helping out around vias, etc.), or just where that tiny edge (10-20% improvement) is actually worthwhile (precision RF something?).Bringing the grounds up closer to the signals, rather than being just behind them, also grabs that little bit more electric field -- so traces couple less to ambient fields, reducing radiation and susceptibility by that amount. Again, not a big improvement, but if you're in a situation where every little bit counts, it's something.If you happen to have buried vias in a design, of course pouring copper above and below them, fully shields them -- so you still have the hole in the middle planes, but with stitching vias adjacent, and pours over top and bottom, you can patch over that very well.Tim

author: Northy
author_rank: Regular Contributor
timestamp: February 17, 2021, 09:18:13 am
content: ThanksYou lost me a bit with the infinity etc stuff.I think I understood the rest of it thoughThanks,G