Can 768kHz-capable AK449X DACs run at 512kHz? - Page 1
Forum section: electronics / projects

author: phofman
author_rank: Newbie
timestamp: May 30, 2020, 05:46:47 pm
content: Hi,Please would anyone happen to know whether the 768kHz AKM DACs (specifically AK4493EQ, but datasheets of other models look very similar) can run at 512kHz samplerate? The hex mode would be selected manually, with properly down-scaled 64fs = 32,768kHz MCLK, 512kHz LRCK, 2 * 24 * 512 = 24,576kHz BICK. I do not know if the automatic detection of samplerate multiple (16fs or 32fs or 48fs or 64fs for the hex mode) will work correctly for non-768kHz samplerate, the datasheet does not address such eventuality. Unfortunately the multiple cannot be specified manually for AK4493.Thank you very much for any help and suggestions.Best regards,Pavel.

author: moffy
author_rank: Super Contributor
timestamp: June 01, 2020, 02:45:34 am
content: Yes, that should be ok with the appropriate master clock: from datasheet Master Clock:30kHz ~ 32kHz: 1152fs30kHz ~ 54kHz: 512fs or 768fs30kHz ~ 108kHz: 256fs or 384fs108kHz ~ 216kHz: 128fs or 192fs~ 384kHz: 64fs or 128fs~ 768kHz: 64fs

author: SiliconWizard
author_rank: Super Contributor
timestamp: June 01, 2020, 01:23:24 pm
content: Yes, it likely just derives the oversampling factor from the master clock AND LRCK. The absolute frequencies themselves don't matter (how could they unless the chip had an additional, internal frequency reference?) as long as you are within specs. So for 512kHz I wouldn't exceed 64x to be safe (which is what you intended to do.)

author: phofman
author_rank: Newbie
timestamp: June 01, 2020, 02:21:44 pm
content: Gentlemen, thank you for your advice. I was not sure how the fs multiple was being determined. My AK4493 datasheet gives four options:~ 768kHz: 16fs or 32fs or 48fs or 64fsand the corresponding tables further down the datasheet describe all the 4 multiples too. I am glad the detection is based on the MCLK/LRCLK ratio and not on some time/frequency measurements.Please one more question regarding that DAC family, excuse me if it's obvious.At what frequency does the delta-sigma modulator run with respect to the samplerate and the master clock? The datasheet says 256x oversampling, but I assume this applies only to the normal sampling speed. Is this multiple reduced in the higher sampling speed modes (i.e. /2 = 128x in double, /4 = 64x in quad, ... /16 = 16x in hexadecimal)? Does the master clk = 64fs versus e.g. master clk = 16fs have any effect on this oversampling multiple? I am asking because from the datasheet I do not understand if the actual conversion always runs at the same frequency (mclk or its fixed fraction) so that I could use a single cutoff frequency in the external antimirrorring filter for the whole range 48 -> 768 (512) kHz, or if the external LP filter must be switched for each sampling speed mode because the conversion frequency varies too (hence changing the nyquist freq). The ideal plan would be external LPF cutoff at some 260kHz for all the ranges, to not affect the usable 512kHz samplerate range. The datasheet examples suggest only values relevant to 192kHz samplerate (fc 104kHz and 133kHz).Thank you very much for your help.Best regards,Pavel.

author: moffy
author_rank: Super Contributor
timestamp: June 01, 2020, 02:51:51 pm
content: Normally the output antialias filter should be 1/2 the sampling or less frequency, as you suspect. If you are doing just audio then a 20kHz filter is fine. But if you want the extra bandwidth you can increase the maximum frequency up to 1/2 the sample rate. The closer the filter gets to the 1/2 the steeper it needs to be.

author: SiliconWizard
author_rank: Super Contributor
timestamp: June 01, 2020, 03:05:30 pm
content: AFAIK, the modulator usually runs at the master clock frequency. I haven't looked at the DS in details, but I don't think it has an internal PLL allowing it to clock the modulator at a higher frequency than the master clock. Please correct though if I missed it.

author: phofman
author_rank: Newbie
timestamp: June 01, 2020, 03:24:51 pm
content: Quote from: moffy on June 01, 2020, 02:51:51 pmThat is why I am interested in the actual sampling frequency, after digital oversampling in the DAC, to make sure my analog LP filter will have enough attenuation at sampling frequency/2 (the nyquist) while not affecting the usable frequency range (defined by the steep digital filter in the oversampler = slightly below fs/2).Thanks a lot for your patience.Pavel.

author: phofman
author_rank: Newbie
timestamp: June 01, 2020, 03:41:39 pm
content: Quote from: SiliconWizard on June 01, 2020, 03:05:30 pmThat would be good, the planned master clock is in all cases at least 32MHz, giving the analog active LPF enough room between cutoff at 260kHz and nyquist at 16MHz.Thanks,Pavel.

author: SiliconWizard
author_rank: Super Contributor
timestamp: June 01, 2020, 04:15:00 pm
content: Quote from: phofman on June 01, 2020, 03:41:39 pmTo me that's usually how that works. The "fs" factor is the oversampling factor - which itself defines the ratio between the frequency at which the modulator runs, and the sample rate.As you can see (or already know), a typical sigma-delta modulator needs to run at a much higher frequency than the sampling rate to get "good" performance. OTOH, a sigma-delta DAC is pretty much entirely digital - and these days, running @32MHz is not that big a deal. So that's still a very efficient way of implementing DACs.

author: moffy
author_rank: Super Contributor
timestamp: June 02, 2020, 04:55:31 am
content: learnt something about sigma/delta dacs vs SAR.