Stream 10MB/s from PC to GPIO - Page 1
Forum section: electronics / testgear

author: lemontree
author_rank: Newbie
timestamp: July 18, 2023, 08:54:35 am
content: I'm building a switched-mode amplifier that needs a digital bitstream as input. It's a full bridge and - due to the specific switching scheme - needs multiple control signals (say 8 bits in total). The sigma-delta bitstream runs at frequencies up to 10MHz, so I need 10MB/s signals. Although the pattern could be generated in an MCU, it would really be a lot easier if I could use Matlab/Simulink/Python on a PC. So then I need a device with either a very large memory (say 100s * 10MB/s = 1GB), or send it in real-time to the amplifier. In our lab we have very nice equipment with large buffers, but I want something cheaper and more portable, so I'm aiming for streaming now.Does anybody know a 'cheap' (< 1k€) device that can do this?Searching online I seem to end up in 2 directions:1) very expensive testing equipment2) something like FT232H, which is nice, but I'm not sure it reaches the spec and frankly, I don't feel like the datasheet digging, programming, debugging, etc. I might have to - and will - do it eventually, but it would be great if something like this already existed.Any help appreciated!

author: radiolistener
author_rank: Super Contributor
timestamp: July 18, 2023, 09:51:21 pm
content: PC is unable to send such a stream at fixed transfer speed. You're needs some buffer device which can receive data chunks from PC put it into FIFO buffer and then send it to your GPIO at fixed speed. You can do it with FPGA chip + gigabit ethernet PHY. You're needs to implement some UDP stack in hardware, and just push the received data into FIFO and pop it into your GPIO at required sample rate...You can do it on some FPGA evaluation board which has GMII PHY on the board. It will cost you about 50-100 USD. But you're needs to write gateware for it.You can get UDP stack implementation in verilog here:https://github.com/alexforencich/verilog-ethernetIt has examples for different popular FPGA eval boards and can be ported to your own hardware.

author: langwadt
author_rank: Super Contributor
timestamp: July 18, 2023, 10:05:21 pm
content: Quote from: radiolistener on July 18, 2023, 09:51:21 pmFT2232H will do about 40MB/s in sync fifo mode, so it can probably do a 10MB/s stream with buffering

author: DavidAlfa
author_rank: Super Contributor
timestamp: July 18, 2023, 10:31:38 pm
content: I could only think on streaming the data to a fast stm32 with HS USB, which would be running a 10MHz timer controlling DMA transfers from a circular buffer filled by the USB into a GPIO port or perhabs the FSMC peripheral.

author: radiolistener
author_rank: Super Contributor
timestamp: July 18, 2023, 10:42:49 pm
content: Quote from: DavidAlfa on July 18, 2023, 10:31:38 pmI suspect even top performance STM32 with HS mode USB will be unable to handle it. This is a classic task for FPGA, because it requires to do a simple synchronous operations at very high clock speed.

author: langwadt
author_rank: Super Contributor
timestamp: July 18, 2023, 10:42:55 pm
content: Quote from: DavidAlfa on July 18, 2023, 10:31:38 pmmaybe RPI with SMI and DMA?https://iosoft.blog/2020/07/16/raspberry-pi-smi/

author: radiolistener
author_rank: Super Contributor
timestamp: July 18, 2023, 10:45:48 pm
content: Quote from: langwadt on July 18, 2023, 10:42:55 pmRPI is too slow for that. This is a classic task for FPGA.Especially if you're planning to control switched-mode amplifier with that stream, the FPGA is the best solution for that. You can implement even signal processing and automatic control with no need for PC.

author: DavidAlfa
author_rank: Super Contributor
timestamp: July 18, 2023, 10:53:16 pm
content: A 180MHz STM32 will probably do just fine, only requiring buffer tweaking to avoid underrun but also minimize the response delay.

author: langwadt
author_rank: Super Contributor
timestamp: July 18, 2023, 11:32:16 pm
content: Quote from: radiolistener on July 18, 2023, 10:45:48 pmI agree an FPGA is the right solutionbut that's not exactly plug-and-play unless you did it before

author: tmbinc
author_rank: Frequent Contributor
timestamp: July 19, 2023, 12:56:51 pm
content: An FT2232H can _easily_ do 10MByte/s saturated, and if you use it in FIFO mode, it's very easy to do so without additional glue logic; just use a counter as a prescaler for reading out data at the right rate. However, there isn't a lot of buffering. So what can go wrong?1. Host side fails to enqueue sufficient data. This is most often a programming mistake, since - again - 10MByte/s is not a lot. Mistakes can include not properly queueing transfers, or having too-small transfers. (Remember that USB transfers can be huge, they get broken to BULK packets by the host controller). But also, ensure you have more than one transfer active at all times. This may not work e.g. with libusb in sync mode, but it _does_ work in async mode, though there may be nicer ways. OpenVizsla (which uses an FTDI to stream captured USB data in realtime) useshttps://github.com/openvizsla/ov_ftdi/blob/master/software/host/fastftdi.cfor that purpose; see "packetsPerTransfer" and "numTransfers".Of course, it could also just be that the host is insufficiently fast. Especially, don't use an older (pre-4) Raspi since they have a horrible USB controller.2. Host controller fails to read from DRAM sufficiently fast. Honestly, if this happens, your system is very very very _very_ broken.The question though is what happens _when_ a buffer underrun happens. Is it safe if data just stops flowing? Can you build some hardware based on the "FIFO empty" signals that shuts down your amplifier? Or will it explode when exposed to essentially DC?

author: lemontree
author_rank: Newbie
timestamp: July 21, 2023, 06:49:21 am
content: Thanks everyone for your suggestions. I was hoping a device like this already existed, but apparently not (likely) so.I will try my luck with an FT2232H. Or maybe a Raspberry Pi Pico, since its PIO can do autonomous DMA transfers and I can let the main program handle the USB transfers and filling up the memory. I have no HDL skills, so FPGA is out.@tmbinc: good point about what would happen if it data stops. When I AC-couple the loudspeaker, everything should be fine as long as the data is valid in a single byte. As soon as half the bits are off, this might be a problem. But I think both methods that I will try handle all data per byte, so I'm not worried about that.

author: langwadt
author_rank: Super Contributor
timestamp: July 23, 2023, 11:53:46 pm
content: Quote from: lemontree on July 21, 2023, 06:49:21 ama Pico won't do it only has fullspeed USB (12Mbit/s), maybe the PRU on a beaglebone?

author: magic
author_rank: Super Contributor
timestamp: July 24, 2023, 02:03:34 pm
content: For completeness, Cypress EZ-USB FX2 may work too. It is often used in the opposite direction as a poor man's 8-channel 24Msps logic analyzer and boards are readily available.You would need to read some docs, write a little bit of FW for the chip and a PC application to drive it. I suspect that FT2232H may be easier to program, though, as it doesn't need FW upload to work (IIRC).

author: DavidAlfa
author_rank: Super Contributor
timestamp: July 24, 2023, 03:45:45 pm
content: There're several projects controlling parallel outputs,https://github.com/jboecker/fx2-usb-display- I tested this, got a 3.75MHz signal at WR pin, so that's roughly 7MB/s. Probably can be optimized, specially by not using Python?https://github.com/diamondman/fx2-usb-parallel