pure DC voltage delay mechanism question - Page 1
Forum section: electronics / projects

author: john23
author_rank: Frequent Contributor
timestamp: August 27, 2024, 02:25:56 pm
content: Hello, I was given the following circuit, somehow its suppose to open one voltage after the other.I suppose its opening Vd+ later then the others.The inputs are tottaly DC.Somehoe there is RC mechanism which will delays the opening of maybe Q1.probably i am tottaly wrong but this this what its supposed to do.Is there some more practical intuitions regarding how this circuit works?Thanks.

author: PGPG
author_rank: Frequent Contributor
timestamp: August 27, 2024, 04:13:46 pm
content: There are no delay (no capacitors).If there is no -12 than Q1 is not switched on.

author: john23
author_rank: Frequent Contributor
timestamp: August 27, 2024, 06:14:17 pm
content: Hello ,yes I agree that delay is a capacitative property . I was told that this circuit makes a delay between signals . The inputs are pure DC.Maybe you could see the principle behind this circuit?Maybe you could reccomend a similar circuit I could use and simulate to see the logic in simulation ?Thanks .

author: PGPG
author_rank: Frequent Contributor
timestamp: August 27, 2024, 06:47:22 pm
content: Quote from: john23 on August 27, 2024, 06:14:17 pmYou didn't read what I have written?QuoteQuote from: john23 on August 27, 2024, 06:14:17 pmI don't understand what you are looking for. Why you need similar circuit? What is wrong with this one that you are looking for other?

author: john23
author_rank: Frequent Contributor
timestamp: August 28, 2024, 12:33:12 pm
content: Hello ,you said "There are no delay (no capacitors)"So i ask is there a way you could recccomend to change this circuit so it will output one DC signal after the other?Thanks.

author: PGPG
author_rank: Frequent Contributor
timestamp: August 28, 2024, 05:08:15 pm
content: Quote from: john23 on August 28, 2024, 12:33:12 pmFrom your first post I understood that you mainly would like to know how this circuit works.I have just told you that there is no intentional time delay, but that Q1 is switched on when -12 is present.So +12 is switched on after -12. Short after, but after and it seemed like that's what you wanted to achieve.If you slow down this circuit by adding a capacitor somewhere then side effect would be that Q1 will be switched on slower than now. If Q1 is switched off - no power is dissipated in it. If it is switched on - low power is dissipated in it. But during switching high power can be dissipated in it. It strongly depends on load and we know nothing about it. You have to calculate that power and time it is dissipated to then find if it is acceptable for Q1. I have no time to deal with it.You can avoid this problem by inserting a delay that after some time it will have fast switching output to fast switch Q1 form off to on and back. But it is designing a new circuit.

author: john23
author_rank: Frequent Contributor
timestamp: August 28, 2024, 07:25:07 pm
content: UPDATE:Hello, I was told the following, I need to increase garually one of the inputs to see the effect.my load TGA2227 photos of the sequences needed shown in the photos.My inputs are +12 -12 GND What input shouldI increase gradually?Could you say the logic of the different part so I could understand the inner workings logic?Thanks." if the voltage rises slowly, the outputs will switch in sequence. Try a simulation and slowly increase the input voltage to see how the outputs changes.""in MOS amplifiers to ensure the gate voltage is present before the drain voltage or vice versa, depending on the design so the device can't start up at maximum current if voltage on the gate isn't present first"

author: john23
author_rank: Frequent Contributor
timestamp: August 30, 2024, 05:07:28 pm
content: Hello ,After working on this I came to the conclusion that this circuit is just checks the sequence.Its not creating the sequence its just checking that the sequence is correct.This circuit is very faulty so Just need analog logic to build a new one.Suppose first create a lower edge 0 to -2.5V to the gate and then a rising pulse 0 to +8V to the drain as shown below.Suppose I have +12V -12V rails and I put a delay between them.BJT's are Valves ,What is the BJT logic to make it function as a sequence checker?Thanks.