How would you implement FSK digitally? - Page 1
Forum section: electronics / projects

author: hazuki
author_rank: Contributor
timestamp: March 22, 2021, 06:47:51 pm
content: I want to send some 1Mbit digital data over an optical link using FSK at a higher frequency (100MHz). So basically send 110MHz over the link for a '1' and 90MHz over the link for a '0'. Sounds like this may be too fast to do in a microcontroller. How would I go about doing something like this in hardware? Are there signal generator chips that I can simply change the frequency of? How could you time a pulse train like this in hardware at the receiver end?Thanks

author: Benta
author_rank: Super Contributor
timestamp: March 22, 2021, 08:12:16 pm
content: Conceptually simplest would be two oscillators, one at 90, the other at 110 MHz. Switching between the outputs should give the desired result.You'll need some logic for dead time between the two outputs to avoid spurious pulses.A more elegant way would be a PLL frequency synthesizer where you toggle the feedback divider's ratios.

author: Marco
author_rank: Super Contributor
timestamp: March 22, 2021, 08:18:43 pm
content: Why FSK instead of PSK?

author: dmendesf
author_rank: Frequent Contributor
timestamp: March 22, 2021, 08:27:53 pm
content: A DDS chip? AD9851 can do it. If you only need square wave then it's easier, just need a programable clock generator like SI5332 (there Are many others suitable)

author: PartialDischarge
author_rank: Super Contributor
timestamp: March 22, 2021, 08:40:03 pm
content: If it is a fiber optic why not baseband? why the extra complexity?

author: mikerj
author_rank: Super Contributor
timestamp: March 22, 2021, 10:03:28 pm
content: Quote from: MasterTech on March 22, 2021, 08:40:03 pmI was wondering the same, but the OP didn't explicitly say it was fiber, just an optical link. Maybe it's free space comms in which case some kind of modulation scheme is going to be mandatory.

author: AndyC_772
author_rank: Super Contributor
timestamp: March 22, 2021, 10:24:15 pm
content: More than likely I'd end up using an FPGA, just because many of my designs end up having one anyway and it's trivial to do with an internal PLL.In the absence of an FPGA I'd look at a device like the Cypress CY22393F. I'm sure there are cheaper options, but it's a good starting point and would almost certainly do what you're looking for.

author: fourfathom
author_rank: Super Contributor
timestamp: March 23, 2021, 01:08:34 am
content: How will you be generating this 1MHz serial stream of data? Will it be synchronized to your FSK frequencies? I assume you be using some sort of coding that provides for framing ?One way would be to use a Silicon Labs Si5351 to generate the 90 MHz and 100 MHz outputs (it has three outputs that are fairly independent), and use a simple multiplexer to select one or the other. The Si5351 could also generate a slower clock (perhaps 1 or 10 MHz) that could be used to run your data serializer. This SiLabs chip is available very inexpensively on breakout boards from Adafruit and lots of other suppliers. These boards typically have a 25 MHz crystal that drives the chip's PLLs.If you need exactly ninety 90 MHz cycles or one hundred 100 MHz cycles per output bit then the simple mux might not work for you as it will likely give you brief glitches when transitioning between 90 and 100 MHz.FSK isn't the most efficient way to run an optical link, but it can certainly work.

author: Marco
author_rank: Super Contributor
timestamp: March 23, 2021, 10:16:37 pm
content: How I would do it ... use PSK and pretend it's FSK.Generate quadrature clocks with a 200 MHz clock generator and some UHS logic ICs, more UHS logic to switch between them on the edges using the 1 MHz signal. On the receiver also generate quadrature clocks, XOR them with the received signal with some filtering and limiting to get a square wave, low pass filter and sample the results at 1 MHz.

author: hazuki
author_rank: Contributor
timestamp: March 26, 2021, 05:06:52 pm
content: I am open to using PSK instead of FSK as well (110MHz and 90MHz were just examples). Basically I can't use baseband because I am running the signal over LVDS to the optical transceiver and there should be no DC component. Also the optical txvr that I have has a minimum input bandwidth of 20MHz (max bandwidth in the GHz).I'm interested in solutions that don't require an FPGA or a microcontroller. My main concern is propagation delay through a modulator and demodulator. The system that I have already has significant propagation delay in it and I would not want to add more than ~150ns of delay using a modulator and demodulator. Do you know of any reference designs for something like this?The 200MHz quadrature clock idea sounds interesting. I'd like to know more about how that works and what the limitations would be.

author: fourfathom
author_rank: Super Contributor
timestamp: March 26, 2021, 06:53:25 pm
content: Another approach is to enforce the DC balance with encoding. 8b/10b as used in ethernet is pretty simple and there may be chips available to help.

author: Marco
author_rank: Super Contributor
timestamp: March 26, 2021, 09:17:22 pm
content: Quote from: hazuki on March 26, 2021, 05:06:52 pmIn that case simple OOK would work.How much noise and signal strength variation do you expect?

author: hazuki
author_rank: Contributor
timestamp: March 26, 2021, 09:30:00 pm
content: Encoding would work as well. 8b/10b or manchester would work but I still would like to do this at 100MHz+ without having to program a microcontroller or use an FPGA. Is there a hardware solution that I can give a low frequency data stream (1Mbit) and it would sample the data at 100MHz and send it via some encoded method?OOK would not work for me because the inputs to the transceiver need to be AC coupled. In addition I am running this signal (LVDS) between devices and I want to have no DC component since there may be common mode differences between the devices. An AC signal is a must.Thanks

author: geggi1
author_rank: Frequent Contributor
timestamp: March 27, 2021, 11:31:20 am
content: I dont know if you are familiar with TNC (terminal node controller) used in hamradio. Before the internet this where common to set up a data network over RF. I have seen designs that can run up to 1mbit (some german page i think). I recomend that you have a look at how these where buildt because this where done without microprocessors or with very limitid microprocessors.

author: langwadt
author_rank: Super Contributor
timestamp: March 27, 2021, 12:14:40 pm
content: Quote from: hazuki on March 26, 2021, 09:30:00 pmOOK has been used for morse code via air since the dawn of radio, it doesn't get much more AC coupled than that

author: Marco
author_rank: Super Contributor
timestamp: March 27, 2021, 01:39:51 pm
content: Quote from: hazuki on March 26, 2021, 09:30:00 pmOOK means binary amplitude modulation of a carrier, not a simple binary signal.

author: langwadt
author_rank: Super Contributor
timestamp: March 27, 2021, 01:45:32 pm
content: Quote from: Marco on March 27, 2021, 01:39:51 pmsometimes,https://en.wikipedia.org/wiki/On%E2%80%93off_keying"In its simplest form, the presence of a carrier for a specific duration represents a binary one, while its absence for the same duration represents a binary zero. "

author: fourfathom
author_rank: Super Contributor
timestamp: March 27, 2021, 02:17:35 pm
content: True, OOK of a carrier is good, but remember that the OP wants to maintain DC balance on the LVDS connection to/from the optical mod/demod. But to be honest, unless the LVDS signals are transformer or capacitor-coupled I don't see the need to preserve DC balance there.OOK can work well if there is a good signal/noise ratio, but with a variable mark/space ratio (as with morse code) the data slicer threshold setting can be more difficult than it would be with some other modulation methods.

author: Marco
author_rank: Super Contributor
timestamp: March 27, 2021, 03:52:22 pm
content: Quote from: hazuki on March 26, 2021, 05:06:52 pmIt's easy to get quadrature square waves from a squarewave double the frequencywith flipflops.Then on the receiver side you can use analog switches or dual gate MOSFETs or whatever to multiply it with another quadrature clock so you can recover phase (incoherently, so it drifts, but you encode the bit in the shifts, not the absolute phase). If the signal has reliable attenuation and can be reliably squared up to logic levels, you can even simply use XOR gates.Or if you just want to throw money at it, use AD8302.PS. there's gotta be ICs which can do it all for you, I just don't know them.

author: Renate
author_rank: Super Contributor
timestamp: March 27, 2021, 07:46:14 pm
content: I know that we've got plenty of bandwidth here and nobody's paying attention to sidebands, but...I haven't noticed anybody mentioning phase continuity.It's not very clean to just toggle switch between a 90 MHz oscillator and a 100 MHz oscillator.The least you can do is not make any major glitches.For extra credit you could even slew between the two frequencies.