Peak & average current feedback PWM buck - Page 1
Forum section: electronics / projects

author: Whales
author_rank: Super Contributor
timestamp: February 12, 2025, 09:23:24 pm
content: Work might want me to look at a 150W DC-DC buck converter, something higher power than I'm used to, so I am trying to learn more. I have mostly been reading PWM controller datasheets, appnotes and experimenting in a sim.I drew up this discrete peak-current-mode PWM buck controller in QUCS-S (ngspice) and surprisingly it works:A pulse comes from V3 in the lower left, turns the SR latch on, which turns the main mosfet on (T5 at middle top). Current starts flowing through the inductor until it hits a threshold (set by V5 in bottom middle, 1V=1A) which then turns both the SR latch and main mosfet off. Rinse and repeat:Top graph is output voltage, middle graph is output (inductor) current.After a while it becomes a bit unstable, this is because this particular simulation has a duty cycle over 50% and therefore suffers "sub harmonic oscillation". From what I understand there are two ways to fix this: adding "slope compensation" or changing the control loop to be "average current control" rather than "peak current control".My load isn't sensitive and can shrug off bad transients or poor regulation for even a few seconds, but I will want to keep EMI down.Q1. Does sub-harmonic oscillation have a dramatic impact on EMI spectra, or is it mostly just a single fs/2 peak? ie do people happily live with and ship products with this instability, or is it a serious issue? Despite all of the appnotes talking about how to avoid this problem I don't see anyone discussing accepting it, so I feel like I've missed part of the story.Perhaps it very broadband smears the spectra in a way that a single composition of ferrite/CMC can't handle? I assume it doesn't act as a useful form of spread-spectrum but I might be wrong.Q2. Can I take an ordinary cheap voltage-feedback buck/PWM controller IC, lie to it by providing its feedback from a current amplifier + RC filter and reduce its feedback bandwidth a bit to create a perfectly serviceable average-current-mode PWM buck controller? I don't particularly care about voltage regulation, I can put a slow (external) control loop on for voltage if needed. Any gotchas or thoughts?Q3. Has anyone ever rolled their own multi-phase buck, or only ever used dedicated multi-phase control ICs? It looks like I could synchronise some ordinary PWM controllers by sending out-of-phase pulses from a microcontroller to some of their timing pins (or if I'm adventurous: make discrete controllers like my simulation above).I know that multi-phase bucks are probably not useful at my current level, but I still want to have a bit of fun investigating.

author: moffy
author_rank: Super Contributor
timestamp: February 12, 2025, 09:36:24 pm
content: The problem with sub harmonic instability is the loss of output regulation, which is generally undesireable. You could use current as the feedback for a voltage type PWM as long as you have loop stability it should be fine. Some PWM controllers have a synchronisation pin, so it would be possible to feed in phase offset sync signals, but turning the multiple control loops into a single one that equally shares the load would be interesting.

author: Whales
author_rank: Super Contributor
timestamp: February 13, 2025, 02:06:11 am
content: Interesting. Loss of regulation = higher ripple? I suspect the instability is reasonably bounded by the length of each cycle and the inductor rise/fall time, but, I could be very wrong.Quote from: moffy on February 12, 2025, 09:36:24 pmI was under the impression that it is as simple as giving each regulator/phase the same current target.In my application each regulator/phase won't have individual (per-phase) voltage feedback, so there is no worry about that kicking in and causing imbalances.

author: youngda9
author_rank: Regular Contributor
timestamp: February 13, 2025, 12:47:37 pm
content: You aren't regulating the output voltage, since there is no output voltage feedback. The circuit is regulating the peak output current by terminating the duty-cycle once a set maximum inductor current level is reached.I'm not sure all of your components are fast enough to do this. What is preventing U5 from saturating (both low and high) each switching cycle? How fast is it coming out of saturation? This will affect the current limiting.Your topology needs to look more like this.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 13, 2025, 01:32:30 pm
content: Quote from: Whales on February 12, 2025, 09:23:24 pmAll good things to do before tackling such a project.QuoteIn practice subharmonic oscillation doesn't look like it does in textbooks and simulations with just a fs/2 period. It can be quite chaotic and change with line/load conditions. Sure this affects emissions spectra, but whether the effect is good or bad is very application dependent.QuoteYeah I've seen it occur in a lot of DC-DC converter designs under some line/load conditions. Many PWM controllers I use actually aim to implement the slope compensation internally (meaning you can't adjust the slope compensation from the outside), and sometimes it isn't sufficient and you see subharmonic oscillation under some conditions. Very frustrating but not a dealbreaker most of the time.QuoteYeah one could look at it as poor man's spread spectrum dithering, spreading EMI over a wider frequency range, which might be a problem or a plus. Though actually relying on subharmonic oscillation for this purpose is foolish.QuoteSure, I've done this in the past with simple pwm controller chips. It doesn't know what the feedback signal represents, after all.QuoteSure, I've done both. There are also some control chips which support multiple phases by themselves, no need to use multiple control chips (depending on how many phases you need in total). Paralleling separate controllers is extra easy when they are regulating current.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 13, 2025, 01:42:51 pm
content: Quote from: moffy on February 12, 2025, 09:36:24 pmQuote from: Whales on February 13, 2025, 02:06:11 amEh I wouldn't say "Loss of regulation = higher ripple". Need to be careful about what we mean by "regulation".For example, if all you care about regulating is peak inductor current, then subharmonic oscillation isn't an issue at all (though the peak current in each PWM period will not be the same, peak current over long timespans will be the same). This "regulation" isn't very useful though.If what you really want to regulate is average output current, then implementing that with just peak current mode control won't give very good regulation, as average current is related to peak current by ripple current, and ripple current changes with line and load. And subharmonic oscillation also affects ripple, so it will further degrade average current regulation.Best way to tightly regulate average output current is, obviously, with average current mode control. You can actually use peak CMC as an inner loop for both average CMC, same as how it's often used as an inner loop for voltage regulators (though the benefits of doing so are hard to see).

author: Whales
author_rank: Super Contributor
timestamp: February 15, 2025, 05:14:49 am
content: Thankyou everyone for the replies.For fun I have also been designing and simulating some average current mode control (ACMC) PWM buck over the last few days (nights actually, typically to 11PM :| I need a new hobby that is not work related).Some interesting things I have learned:(1) Average-current-mode has the same sub-harmonic oscillation issue as peak-current-mode control. It's just that you already have a triangle wave built into your circuit, so often you already have good-enough slope compensation built in, but not always.The key is to have the rising edge of the triangle waveform (entering the comparator) be steeper than the falling edge of the current measurement waveform (entering the comparator). You can do this in a number of ways, including making your triangle waveform bigger or attenuating high frequencies in the current feedback waveform.Even after doing some tuning you can still trigger this problem again by:- reducing the resistance of your load (increases inductor slope)- increasing the resistance of your load (increases duty cycle)- reducing the size of your inductor (increases inductor slope)(2) During times where the output capacitor is being charged (eg turn on or sudden load resistance changes) you may observe sub-harmonic oscillation because of the high duty cycle AND low output impedance (high inductor current slope) occurring simultaneously. I am not sure if this is a problem to worry about (suggests circuit is marginal?) or not (output caps have VERY low transient impedances).(3) Your triangle wave cannot be a nice symmetric triangle wave. It needs to be an asymmetric sawtooth wave (controlled rise, instant fall). Otherwise you get subharmonic oscillation again, probably because (from the comparator's perspective) the falling side of the symmetric waveform looks like an ever worse version of a slowly rising side(4) If you search up the web too much for current-control-mode PWM buck you end up finding this very forum topic >:"| Some keywords like "feedback" give you scientific papers and some appnotes though.(5) Many appnotes and documents describing current-mode feedback have awful diagrams.U-140 by Unitrodeis interesting, but they reference things in the circuit (like Rp) that simply don't exist in any diagrams in the document. Or any other mention. At all. I struggle to understand the document from that point onwards (page 2).TheAP4143 datasheethas two opamps with their outputs tied together. Huh. A note on their pinout table says the output can only sink current, which means these two opamps are probably open-collector outputs, suddenly making sense of a strange diagram.Another one I saw (TODO find it again) had a R||(R+C) filter wired between the output of an opamp and ground. I assume this means it's a current output opamp (not a voltage output), otherwise it means the filter does absolutely nothing but waste power.Simpler: average-current-mode-control with RC feedbackOne of my goals has been to design something that takes a voltage input to specify the target current output. This can then be supplied from other circuitry (like a microcontroller/DAC) and the same voltage can be given to multiple phases, instructing them to all aim for the same target current. This is much more convenient than having to change resistor values in feedback networks, which tends to be done with digital pots and can cause stability issues (changing resistors in the feedback loop changes the feedback gain).This does not work particularly well but the sim says it _could_ work.PWM is generated by comparing a triangle wave with some measurement of the output current. The output current setpoint is chosen by vertically shifting the triangle wave upwards (see dark blue curve vs light blue) using an external voltage source (circled in green on schematic).The feedback path is nothing but a simple RC filter (middle bottom) that has its voltage dragged upwards slightly by R41 (otherwise this circuit can't regulate down to 0A output). There is not much feedback loop gain (only the current shunt amplifier and also technically the 24V vs 3.3V voltage ratio).This lack of feedback gain causes a problem: the output current has a notable DC offset that depends on the load resistance. Not ideal, but might be workable if you add another external (slow) control loop via a microcontroller. You can increase the feedback gain, but then you run into subharmonic oscillation because it makes the slope of the inductor current look bigger (see notes at top of this post).There is also a problem of oscillation during transients (see the golden/yellow output current trace on graph during turn-on, overshoots by about 200%). Adjusting the RC filter fixes this, but makes the feedback signal look almost as rough as the triangle wave, which I assume will not work stably in real life.Average-current-mode-control with opamp feedback and a more complex filterThis circuit seems much better behaved, no DC offset at the output (the feedback path has high DC gain) and less oscillations due to transients (higher frequencies better attenuated). The input voltage (target output current) is injected at a different location.Using the combination of R||(R+C) for feedback filtering seems to be beneficial. I started with a simple opamp integrator but it still had high frequency stability issues. I wonder if my simulator can find the poles and zeroes (or even just a feedback transfer function) of this circuit for me, that would probably help me understand why this filter combination works better.I am probably going to build this last circuit and see how well it fares in real life. I expect disasterI may have to add an SR latch to the PWM generation to avoid spurious pulses caused by noise, I will have to see.

author: Whales
author_rank: Super Contributor
timestamp: February 15, 2025, 05:25:27 am
content: Quote from: youngda9 on February 13, 2025, 12:47:37 pmYep, my load doesn't really care. I can get away with garbage voltage regulation or adding it to a slower external control loop. As long as it's stable (not EMI hell) then it fulfils what I want.I also really want to learn about and investigate control loops dominated by current feedback, as from what I have read these are easier to keep stable. Even if I don't end up using this at work I'll be happier because of it.QuoteHuh? U5? I do not have a U5 on my diagram, do you mean the high-side mosfet T5?I do not have any part numbers written on that first diagram so I do not know where you are inferring component speed from. Gain numbers on opamps?

author: Someone
author_rank: Super Contributor
timestamp: February 15, 2025, 06:14:35 am
content: Quote from: Whales on February 15, 2025, 05:25:27 amPerhaps better to stick with peak current mode controllers? as mtwieg suggests above you can return a feedback path of whatever signal you like to an existing regulator, and use its peak current mode loop as the "fast" inner loop. When the outer loop doesnt have any serious/significant settling time requirements you can just back off the feedback with plenty of margin for any conceivable load/condition.Have done this for driving power LEDs.Also you'll waste a lot of time if discrete time simulations are the first cut/simulation, usually most of the time tuning is spent testing frequency domain models.

author: Whales
author_rank: Super Contributor
timestamp: February 15, 2025, 06:22:05 am
content: QuoteI would still probably need slope compensation in the peak mode controller. For a discrete design (like I'm playing around with above) this would probably be about the same complexity as an average current mode controller. If using an off the shelf controller chip (with slope comp built in) then yes it would probably be much simpler to do it that wayQuoteCan you point me in the right direction of what you mean by this? Plotting lots of transfer functions, poles and zeroes of discrete designs; or working with simulators in a different domain?(My knowledge of SPICE is very minimal, I've only dabbled with GUI frontends)

author: Someone
author_rank: Super Contributor
timestamp: February 15, 2025, 07:06:12 am
content: Quote from: Whales on February 15, 2025, 06:22:05 amOne of the more readable examples would be "Current-Mode Control: Modeling and its Digital Application":http://hdl.handle.net/10919/27019

author: Siwastaja
author_rank: Super Contributor
timestamp: February 15, 2025, 10:10:21 am
content: Subharmonic oscillation is fundamentally caused by trying to force the triangle ramp generated by the inductance into externally fixed time window.If you don'tneedto synchronize to external f_sw, you can remove even more complexity by letting the converter free-run - i.e., trigger the MOSFETs from current sense directly and let the dI/dt = V/L relationship define f_sw. If you operate in CCM with fairly constant-ish input and output voltages, f_sw will vary only slightly (of course with higher load the inductor loses some inductance and f_sw rises a bit, and so on).Side effect of this simplification is that the whole concept of subharmonic oscillation just goes away.I used that strategy in a bidirectional battery charger/discharger (synchronous buck). Very simple it was. I ditched it and went for well-defined f_sw because I wanted multi-phase and in that case synchronization is a must.In both cases (free-running and later MCU-controlled fixed f_sw version) I used peak current mode control with slower "finetune" feedback sensing average current and making small adjustments (with PI loop) to the peak current setpoint value. IMO this combines good sides of the both, you get the excellent transient response of the peak current mode control e.g. against input/output voltage variations, just that after sudden perturbation the current limit is a little bit inaccurate for some cycles before the feedback loop catches up and adjusts the "finetune".

author: moffy
author_rank: Super Contributor
timestamp: February 15, 2025, 10:32:04 am
content: This might be of interest:https://www.analog.com/en/lp/ltpowercad.html

author: youngda9
author_rank: Regular Contributor
timestamp: February 21, 2025, 01:27:22 pm
content: Please show some load step response performance for this circuit. Perform after the converter gets to steady-state. I'd like to see the effects on the output voltage. How about stepping from 4ohms to 10ohms. Thank you.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 21, 2025, 02:03:57 pm
content: Quote from: Whales on February 15, 2025, 05:14:49 amYep, many years ago I was making a discrete voltage mode controller and actually observed subharmonic oscillation (mainly because my ramp waveform was a symmetric triangle wave). Confused the hell out of me.QuoteYeah as I mentioned previously I often am able to observe subharmonic instability in pwm controllers which boast robust internal compensation (looking at you Linear Tech). Usually it happens under large load transients, as you say. When I ask them why this is happening, their response basically boils down to "use an inductor twice as large as our own datasheet suggests"QuoteUnitrode app notes and white papers are generally excellent, and cover numerous aspects of SMPS (not just control).I also strongly suggest white papers from Venablefound here. IIRC you have to give them contact info to download the documents, but it is absolutely worth it. However they don't get everything right. One of these papers claims that constant-off time control increases RHPZ frequency, which is downright wrong...QuoteCorrect, many chips use OTAs instead of opamps as error amplifiers. Means you only need one pin for the compensation network instead of two. Also means you can directly drive the error amplifier output with an external circuit, which can be very useful in some cases.Quote from: Whales on February 15, 2025, 05:14:49 amThis is definitely a more conventional approach. You compare the measured current/voltage to a reference and take the difference with an error amplifier (with some compensation filter). The error amplifier output is what you compare with the ramp signal.QuoteA simple integrator is often referred to as type I compensation. The "R||(R+C) for feedback" circuit is often called type II compensation. There's also a type III. Their transfer functions are similar (but not equivalent to) that of I, PI, and PID controllers respectively.

author: Whales
author_rank: Super Contributor
timestamp: February 22, 2025, 08:26:44 am
content: Quote from: youngda9 on February 21, 2025, 01:27:22 pmLooks OK.Zooming in on the time axis:Longer run with a 2A (instead of 1A) setpoint:Maybe a bit overdamped? It's far beyond my expectations regardless, I'll just have to see how well it works IRL.

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 24, 2025, 01:12:50 pm
content: Yeah it's overdamped, for those load/line conditions anyways. Load resistance is going to affect stability margins significantly. As load resistance increases, the resonance between the 33uH and 10uF output cap will create significant gain peaking and phase shift, making instability much more likely.LTspice has a feature called the FRA which can allow one to measure bode plots of DCDC converters via transient simulations. Though in the case of a simple buck converter like this, I don't think that's worthwhile, as the behavior can be modelled fairly accurately with purely analytical methods.

author: youngda9
author_rank: Regular Contributor
timestamp: February 24, 2025, 03:03:00 pm
content: Quote from: Whales on February 22, 2025, 08:26:44 amUm...no it doesn't. The output voltage goes from 4V to 20V when you lighten the load. This is because you aren't regulating the output voltage. See my first reply to your post.Quote from: youngda9 on February 13, 2025, 12:47:37 pm

author: mtwieg
author_rank: Frequent Contributor
timestamp: February 24, 2025, 03:07:40 pm
content: Quote from: youngda9 on February 24, 2025, 03:03:00 pmPretty sure their goal at this point is to just regulate current, not voltage.