Sampling High frequency periodic signal - Page 1
Forum section: electronics / projects

author: dreamcatch16
author_rank: Contributor
timestamp: March 13, 2014, 03:41:52 pm
content: I want to sample a periodic sinusoidal signal ranging from 40Hz up to 5Mhz,I need to sample at least 10 samples per cycle so the sampling frequency should be at least 50Mhz if doing a continuous sampling.For you information I am using the PIC18f4550 which is a slow microcontroller and I want to prevent from changing it, also I can have a reference signal that is at the same frequency of the sampled signal.My question is: Is there any techniques for sampling a high frequency periodic signal?Or is there any high speed ADCs (10bits up to 16bits) with a programmable sampling frequency and an internal buffer memory that I can read it after taking the samples?

author: joseph.anand
author_rank: Regular Contributor
timestamp: March 13, 2014, 04:06:42 pm
content: If you can get hold of a digital downconverter or a frequency shifter, then yes. But do not think that is what you want especially since you want 10 samples/cycle.

author: fcb
author_rank: Super Contributor
timestamp: March 13, 2014, 09:06:04 pm
content: You basically need a fast sample & hold circuit, then buffer this and feed it into your PIC - this isn't as difficult as it sounds.Read this thread as some of the principles are the same:https://www.eevblog.com/forum/testgear/10-ghz-usb-oscilloscope-by-darwin-sabanovic/

author: David Hess
author_rank: Super Contributor
timestamp: March 14, 2014, 07:10:25 am
content: Do it the way a sequential sampling oscilloscope does it. You say you have a reference signal so use that to trigger a ramp with a comparator threshold set by the PIC. The comparator can strobe whatever sampling ADC you use. There is no reason you cannot use a high speed sampling ADC with a bandwidth higher than your signal at a low sampling rate.

author: dreamcatch16
author_rank: Contributor
timestamp: March 15, 2014, 07:33:00 am
content: Quote from: David Hess on March 14, 2014, 07:10:25 amI thought about this, but my maim concerne is teh accurancyof the time differrence between the samples, enless having a high resolution DAC to use as a reference,also will it work for high frequency about 5Mhz by comparing and triggering the ADC?

author: fcb
author_rank: Super Contributor
timestamp: March 15, 2014, 01:12:37 pm
content: The whole point of sampling 'scopes is to be able to look at frequencies much higher than the sample rate of the ADC.

author: dreamcatch16
author_rank: Contributor
timestamp: March 15, 2014, 03:03:06 pm
content: thank you all for your answrs, I can see that the sequential equivalent time sampling technique is very intersting, I will try to read about it (I thought about it but I didn' know the name) if you have any good schematic example of how to implement it I will be very happy.

author: ejeffrey
author_rank: Super Contributor
timestamp: March 15, 2014, 04:28:57 pm
content: Quote from: dreamcatch16 on March 13, 2014, 03:41:52 pmIf the signal is literally a sinusoid, and you know the frequency, what are you actually measuring? If the signal is exactly periodic but not exactly sinusoidal, then equivalent time sampling is a good bet. If the signal is not periodic but is narrow-band around the reference frequency, you can down-convert and sample at the lower frequency, although the wide frequency bandwidth may present some problems.

author: johnwill
author_rank: Contributor
timestamp: March 15, 2014, 06:01:43 pm
content: yes you can find many ADC but sampling rate you need to see(sampling theorum). For 5Mhz you must atleast have sampling rate of atleast 10MHz. PIC crystal freq wont be same as ADC sampling frequency. How that ADC(if external) is getting clock will be deciding your output rate. Processor speed will be determing data rate for interface(say you are using SPI).be more specific in asking your question

author: dannyf
author_rank: Super Contributor
timestamp: March 15, 2014, 06:22:38 pm
content: QuoteBetter questions are: why do you want to do that? and if what you want to do is doable with the proposed hardware.

author: David Hess
author_rank: Super Contributor
timestamp: March 15, 2014, 07:54:58 pm
content: Quote from: johnwill on March 15, 2014, 06:01:43 pmHis question is specific enough. The Nyquist limitation as applied to real time sampling does not apply here if the signal is repetative. The only bandwidth limitation will be do to sampling uncertainty, sampling gate width, and analog limitations.I have many equivalent time sampling oscilloscopes that have no issues accurately digitizing bandwidths orders of magnitude higher, almost 6 orders of magnitude in one case, than their Nyquist bandwidths.A 3.5 Msample/sec maximum LTC2355-12 for instance would have no trouble capturing repetitive signals from 0 to 10 MHz at any sampling rate.

author: David Hess
author_rank: Super Contributor
timestamp: March 15, 2014, 08:30:45 pm
content: Quote from: dreamcatch16 on March 15, 2014, 07:33:00 amThe idea here is to accurately know the time between the trigger and each sample point. That time could be either measured or generated. If the signal to be sampled is asynchronous to the processor clock, then I would sample randomly at the fastest speed and measure the time between the trigger and the sample clock with some form of interpolating time delay counter. Using the built in PIC capture timer, even 8 bit interpolation could yield 80 picosecond resolution.I do not have complete specifications for the PIC18F4550 ADC but based on similar PIC processors, its ADC bandwidth will be limited to about 100 kHz because of its long sampling width of greater than 5 microseconds so either an external sample and hold would be needed or an external ADC.

author: dreamcatch16
author_rank: Contributor
timestamp: March 16, 2014, 07:17:29 am
content: what do you suggest as triggering circuitry for the ETS?

author: dreamcatch16
author_rank: Contributor
timestamp: March 16, 2014, 12:16:16 pm
content: Quote from: David Hess on March 15, 2014, 08:30:45 pmby chance (and multiple research on RS components website) I found this ADC THS1206 which is 12bit ADC and 6Msps with 16 word internal FIFO memory, I can not use it for continuous samping but I think I can use it with the ETS technique, what do you think is it a good choice or I have too look for something else?

author: fcb
author_rank: Super Contributor
timestamp: March 16, 2014, 01:03:28 pm
content: Did you read that thread throughly? Do you get the principles involved in the sampling scopes?The issue's aren't the bandwidth of the ADC, you can get very reasonable results with a 1ksps ADC if you want. It's all about the triggering (use a fast comparator - even that doesn't have to be that fast, just has to have a predictable/stable delay), then some sort of mechanism to create an adjustable delay (i'd probably use a fast ramp generator and DAC, to create an adjustable delay - there are many ways to do this bit). Then drive a sample and hold circuit with the variable delayed trigger.

author: David Hess
author_rank: Super Contributor
timestamp: March 16, 2014, 02:57:42 pm
content: Quote from: dreamcatch16 on March 16, 2014, 12:16:16 pmBased on the datasheet it looks like it would work fine. Multiple samples could be accumulated in the internal FIFO for each trigger event and it supports simultaneous sampling of up to 4 single ended or 2 differential inputs. Its input bandwidth is either 54 (singled ended) or 96 MHz (differential). It has a rather restricted input voltage range though.

author: David Hess
author_rank: Super Contributor
timestamp: March 16, 2014, 03:28:55 pm
content: Quote from: dreamcatch16 on March 16, 2014, 07:17:29 amTriggering usually amounts to watching the input or another signal to see when it crosses a specified level using a fast comparator which triggers two different flip-flops depending on the transition direction. One flip-flop arms the other one so there is no race condition where triggering occurs as the trigger flip-flop is armed. Both flip-flops could also watch for the same transition direction with one arming the other in which case after arming both simultaneously, it is the second trigger event that is captured.If I were doing this with the PIC18f4550, I would direct the above trigger to one of the microcontroller capture modules and the relatively slow ADC strobe to the other one. Then after a trigger event, the difference in time between the two is roughly known. The trigger would also be directed to an integrating linear interpolator which measures the time between the trigger and the capture module clock so the time between the trigger and clock can be measured as well. Comparing the two capture registers reveals if the last ADC sample occurred before or after the trigger which allows the signal itself to be used as a trigger while still being able to acquire samples before the signal event. This is the very handy feature of DSOs that allows them to capture a pretrigger record.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 16, 2014, 04:33:25 pm
content: Funny thought, you could take a static type MCU (not sure if PIC counts if it's using an internal multiplier, but most are) and run the clock from a retriggerable clock source. Connect the input trigger to the clock trigger, and to a pin change interrupt. If the ISR is started consistently, then it can be used to begin an ADC conversion with jitter limited only by the clock source (which might be an LC oscillator, somewhat imprecise but not too bad over short periods). Long instructions in the interrupted code would have to be avoided, or perhaps compensated for by checking the interrupted instruction, otherwise jitter magically explodes to one or a few cycles, not pretty.Unfortunately, the internal ADC usually has crap analog bandwidth (crap performance in general, really), and all the external circuitry is more than you should have to bother with (you need all the usual trigger circuitry, plus a synchronizable clock and, if desired for accurate frequency measurements or whatever, a crystal oscillator besides; and a clock mux isn't simply a mux, it has to avoid generating runt pulses). The mux could probably be avoided by using a PLL.Otherwise, conventional approach: fast trigger, trigger and holdoff circuitry, fast-ass S&H, then convert it at your leisure.Tim

author: David Hess
author_rank: Super Contributor
timestamp: March 16, 2014, 05:47:23 pm
content: The PIC can be operate synchronously without the PLL but would still need some type of analog interpolator to generate a delay resolution shorter than the clock period.Fast sample and holds are always fun and surprisingly easy to implement with a current driven diode bridge.

author: dreamcatch16
author_rank: Contributor
timestamp: March 17, 2014, 08:47:24 am
content: Quote from: fcb on March 16, 2014, 01:03:28 pmI have understood the principle of ETS but my concern is the input frequency bandwidth, for example first I was intersted with ADS7818 which is 500Ksps ADC and also it is available with DIP package wich is an advantage for me since I can try the circuitry in a breadboard, however as you can see in the attached graphs from the datasheet, the slop of the THD SINAD & the SFDR after 100khz are decreasing dramatically, so at 5Mhz I could have relatively some errors on the reading because of the internal distortion and noise of the ADC, I do not how much but it will be for sure and I want to avoid this, If you have a better choice it will be very helpful for me.

author: David Hess
author_rank: Super Contributor
timestamp: March 17, 2014, 02:13:28 pm
content: The input bandwidth of the ADS7818 is specified to be 350 kHz which is consistent with the sampling width which would produce a null at about 1.3 MHz so it is indeed unsuitable.

author: fcb
author_rank: Super Contributor
timestamp: March 17, 2014, 05:15:17 pm
content: I'm still not sure you are understanding the principle.You need a to separate the sample&hold from the ADC, that way your bandwidth is independent of your ADC (& hence you can use a slow ADC).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 17, 2014, 06:21:51 pm
content: There are some ADCs with sufficiently fast S&H inside. Most RF ADCs are reasonable examples, with perhaps 100MSa/s units offering analog BW to 1GHz. There's an LT part somewhere that's medium speed (~100kSa/s) but has 20MHz analog BW.But if you need more, you must have an external sampler.Tim

author: David Hess
author_rank: Super Contributor
timestamp: March 18, 2014, 04:42:21 am
content: Like T3sl4co1l says, some sampling ADCs, even low end ones, have bandwidths considerably in excess of their maximum Nyquist frequency.I usually try to distinguish between sampling, integrating, and other ADCs. The other category includes some flash and successive approximation converters, hopefully old ones, which continuously apply their analog input without sampling and therefor suffer extremely low bandwidth compared to their Nyquist frequency. They require an external sample and hold for proper operation. Some differential input successive approximation converters, again hopefully old ones, only sample one input and leave the other continuously connected which can lead to strange results for the unknowing. Luckily these days such aberrations are rare.

author: dreamcatch16
author_rank: Contributor
timestamp: March 18, 2014, 11:25:17 am
content: Quote from: fcb on March 17, 2014, 05:15:17 pmYes you are right but there will be added errors like the offset voltage the droop ... of the track and hold IC, which I am trying to avoid at maximum, for sure there will be because of the upstream stages where I am going to use opamps to buffer and do the signal conditioning (I have difficulties to find the right opamp, I have to do some trade of) any way that is why I am trying to use the ADC's track & hold. thank you for your support