PCIe ground pin count - Page 1
Forum section: electronics / projects

author: argh6543
author_rank: Newbie
timestamp: August 11, 2024, 08:23:15 pm
content: I'm starting a new project where I want to re-use the physical 16x PCIe connector. Since I will also have a lot of differential signals, I looked over the PCIe usage of the pins, and now I'm wondering about the number of ground pins the standard uses. In the higher numbered pins, it is very consistent with ground always opposing signals. For example, A66 and A67 are transmit lane 12 so the opposing B66 and B67 are ground. Then A68 and A69 are ground and B68 and B69 are the receiving lane 12. Transmit lane 13 then takes A70 and A71 with ground on B70 and B71 and so on. On the lower end, the pattern isn't always followed. Transmit Pair 0 takes A14 and A15, but B14 is part of the reference clock pair.Why are the signal pins opposed by ground? I get having a ground pin between the differential pairs on the same side, but wouldn't the inner ground layer of the PCB provide enough isolation between the A and B sides?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 11, 2024, 09:12:35 pm
content: You want grounds around, somewhere or another. You wouldn't put ground between the pairs, that reduces coupling. Grounds beneath or beside the pairs, is good however. The alternating configuration seems ideal as it accomplishes both at once. The lower pairs/lines may've been an oversight in earlier standards, or a compromise given limitations on pin count vs. required functions.Also keep in mind, power supplies count as RF ground too!Tim

author: langwadt
author_rank: Super Contributor
timestamp: August 11, 2024, 09:27:37 pm
content: Quote from: T3sl4co1l on August 11, 2024, 09:12:35 pman some extend also signal pins at a steady state with reasonably low impedance

author: argh6543
author_rank: Newbie
timestamp: August 11, 2024, 11:53:51 pm
content: Quote from: T3sl4co1l on August 11, 2024, 09:12:35 pmYeah, I did a ground pin between a differential pair in college once - every other pin was simply ground. I think that was the lowest scoring (and functioning) project I ever did.I am wondering specifically about the ground on opposing pins of the connector. The PCIe standard seems to be built around the idea of 4 or greater layer PCB. Instead of having the pins alternating ground, couldn't you simply have one of the inner layers be that ground to avoid interference from the A to the B side? That way you can have signal pins on both sides like A66 + A67 be one pair (A65 and A68 being ground to to protect the pair from the next one) and B66 + B67 being another pair. That saves roughly 1/3rd of the pins, while still maintaining ground between differential pairs on the same or the opposing layers?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 12, 2024, 02:23:47 am
content: Oh that'll be no problem: you stick a via in or near each edge connector finger, and that's as good as grounding can get, period.There are connectors with planes/shielding around and between the pin rows, but there's not really any way to tie that in with a planar build where the plane must be buried by outer layers -- you can't extend fingers directly from the inner layers, the whole PCB stackup has to cover everything. Unless you're going to pay for a *very* custom build with milled-out and plated pockets -- it can be done, but do you really need it that bad..?(Even then, connectors are probably hard to find that require such measures?)Tim

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 12, 2024, 04:58:36 am
content: Quote from: T3sl4co1l on August 11, 2024, 09:12:35 pmNot an oversight, hardly a limitation.I never had a look at the pinout of PCI-e before, Wikipedia is pretty clear:https://en.wikipedia.org/wiki/PCI_ExpressEach differential pair has GND pins on the left and right. Side A vs. Side B hardly matters, because PCI-e cards will almost certainly have GND planes on their internal layers. I guess it's more like, Why won't they offset the A and B side? There is no reason to not offset the pairs between the A and B sides.There are also riser cards and flexible cables in existence for PCI-e, maybe offsetting A and B sides helps a bit there, but I do not know how such cables are built internally.

author: argh6543
author_rank: Newbie
timestamp: August 13, 2024, 12:47:29 am
content: Quote from: Doctorandus_P on August 12, 2024, 04:58:36 amI went down that road for a while too, but then the question is, why two ground pins between differential pairs instead of one?

author: argh6543
author_rank: Newbie
timestamp: August 17, 2024, 01:11:19 am
content: So, I've not gotten much further, but OCP 4C connectors can carry the same PCIe signals (voltage, frequency, coding, ...) but uses only one ground pin between pairs and has the transmit and receive lanes exactly opposite...

author: David Hess
author_rank: Super Contributor
timestamp: August 17, 2024, 01:34:34 am
content: Quote from: argh6543 on August 13, 2024, 12:47:29 amThey use two grounds so that no pin of a pair is adjacent to any other pin of a pair.

author: argh6543
author_rank: Newbie
timestamp: August 18, 2024, 05:28:42 pm
content: Quote from: David Hess on August 17, 2024, 01:34:34 amSorry, I don't understand what you mean. Doesn't that apply when you have just one ground pin between pairs instead of two? Wouldn't GND R1+ R1- GND R2+ R2- GND ... do the same?

author: langwadt
author_rank: Super Contributor
timestamp: August 18, 2024, 07:46:45 pm
content: Quote from: argh6543 on August 18, 2024, 05:28:42 pmthen what do you do on the other side of the connector?

author: argh6543
author_rank: Newbie
timestamp: August 19, 2024, 01:10:15 pm
content: Quote from: langwadt on August 18, 2024, 07:46:45 pmGround on an inside layer of the PCB should provide enough shielding. Other connectors like OCP 4C carry the same signals and the opposing sides for receive and transmit. But if that works, then why didn't the original PCIe form factor do that?

author: langwadt
author_rank: Super Contributor
timestamp: August 19, 2024, 04:19:33 pm
content: Quote from: argh6543 on August 19, 2024, 01:10:15 pmpad size and distance with ground on the opposing side with a 1.6mm PCB, results in ~100R differential impedance ?

author: ejeffrey
author_rank: Super Contributor
timestamp: August 19, 2024, 05:21:41 pm
content: Quote from: argh6543 on August 19, 2024, 01:10:15 pmCertainly the PCIe cards I just looked at do not have a ground pour inside the connector region, likely in order to reduce shunt capacitance.Also, PCIe was designed in the early 2000s when high speed serial connections in consumer electronics were brand new, much less sending them through cheap card edge connectors. On the other hand, their goal was to supplant PCI. Even at PCIe 1.0, a tiny 1x connector had over 2x the bandwidth of PCI which a 16x connector was similar side to AGP with over 2x the bandwidth. So the pressure to reduce the pin count of the card connector was probably not that great compared to making sure high volume motherboard and add on card manufacturers were able to meet the signal integrity requirements for the dramatically higher speed signals than they were used to.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: August 22, 2024, 08:43:53 am
content: SATA data cables have 7 conductors. Two data pairs (Rx & Tx) two GND on the outside, and one GND in between.But going back to the original question, If you just want to re-use the connectors, you can assign them in any order you want. I also don't like card edge connectors for DIY. It's too much trouble for the PCB's with the edge plating. and Instead I decided to use simple regular 2.54mm headers.