How to deal with odd SOIC leg length? - Page 1
Forum section: electronics / general

author: Zeyneb
author_rank: Regular Contributor
timestamp: November 17, 2020, 08:40:46 am
content: Hi there,I’ve a little issue with making a PCB footprint for an Analog Devices SOIC part. It is an SOIC 8 pin part with a thermal tab at the bottom for the ADM7155ARDZ-04-R7 low noise LDO.I use Pulsonix as my PCB CAD tool. But I do make the footprints with a separate tool named PCB Library Expert.The issue is shown in attached picture in the red circle. About the leg length, that according to Analog Devices can vary between 0.4 and 1.27mm! While that other length specification is just 1.04mm.I still have entered these dimensions into PCB Library Expert and the footprint does not look that good. The pads almost touch the thermal pad copper area. This due to the odd dimension info from Analog Devices.So, how would you deal with this situation? Given you still want to use my footprint tool.

author: Yansi
author_rank: Super Contributor
timestamp: November 17, 2020, 10:18:10 am
content: Ignore it. It is a standard SOIC. What they are trying to tell you, is that the bent foot that touches the PCB may touch in the length od 1.2 mm, or as little as 0.4 mm.Use standard SOIC8 package and add appropriate exposed pad.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 17, 2020, 01:15:30 pm
content: Looks like standard SOIC to me.Probably that comes from how old the JEDEC standards are; no one actually makes their parts to that standard, in terms of actually hitting every possible corner of it. SMA and friends (actually DO-214AC, AA, AB) likewise have grotesque worst-case dimensions.My theory is, manufacturers continue to refer to the old drawings, because they're industry standard. They could provide updated, accurate and representative dimensions, but then it would no longer be the JEDEC standard, it would be their own in-house standard. (And some do, but then you have the problem of verifying that their drawing still fits your footprint.) The one thing they do provide however (well, when they do), is a footprint drawing, and if they actually produced parts according to the corners of the dimensional drawing, that footprint would be laughably impossible (maybe not to the point of no-connect, but unreliable at least). You could go backwards from the footprint, assuming whatever calculation rule they've used (often IPC High Density), and solve for the actual part dimensions.Of course, such a process carries no guarantee whatsoever, and the dimensional drawing still takes priority. Technically, you're screwed.Tim

author: Zeyneb
author_rank: Regular Contributor
timestamp: November 17, 2020, 04:26:01 pm
content: Alright, thanks.In an example library of PCB Library Expert there was a footprint from an similar 8 pin SOIC part from Renesas that was based on a max. leg length of 0.89 mm. So when I enter this max. leg length of 0.89 mm I do get a footprint that looks a lot more reasonable.

author: Siwastaja
author_rank: Super Contributor
timestamp: November 18, 2020, 01:29:41 pm
content: Yes the tolerance ranges are sometimes absolutely ridiculous, so that an actual part never gets even remotely close to the limits, even if you screen all the parts ever made by the factory.If milk was packaged to the same standards, they would market a jug as "0.3 to 2.5 gallons". Dare to guess how much you'll actually get?It's all OK when they supply you with nominal value: then you can just assume (taking a very theoretical risk) that therealmanufacturing tolerance is some sensible machine tolerance around that nominal value. But when they just tell you the lead length issomethingbetween 0.4mm and 1.27mm, how are you going to know what the real ranges are? The whole process of creating optimum footprint becomes finicky process of understanding all tolerances and arriving at acompromise, when it could be so much better with real-world input values. Yes, we all use computer wizardry to generate compliant footprints, but the results are sometimes strange and require manual adjustments so that real-world components get best possible process yield.I bet an engineer or two have suggested to indicate actual tolerances with some sensible safety margin, but management does not see any benefit in that, only a theoretical risk of liability if the process is severely out-of-control and completely fucked up parts somehow leave the factory.Often, you just need to realize a weird drawing with ridiculous dimensions just represents some very widely used bog standard package, and simply use the typical footprint you have always successfully used. But this isn'talwaysthe case, so be careful doing that.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 18, 2020, 01:53:38 pm
content: Yup. And for complete closure -- the way this is usually handled in industry:- Buy some typical parts, from at least the manufacturer on the BOM.- Run some assemblies and see how they look. Get feedback from DFM, assembly and test, refine the footprint as needed.- Now you're in production.- Later on, VAVE is called upon to reduce cost. Parts are substituted. If they're good, they'll start from the top: check that it's suitable, get buy-in from the other departments, and everyone approves the change. If they're less responsible, problems may arise.This is what separates high quality CMs from the rest.Or if the customer makes these changes themselves, without complete consideration, yields may drop and assembly costs rise. Or worse still, production grinds to a halt because the new part isn't actually compatible at all...Typically the customer owns the design (EDA, fab and assembly files), but often the customer doesn't have engineers on staff to make these careful decisions. So this kind of stuff can indeed happen. That's the risk/cost of running a business, ultimately.Tim