Voltage Spikes on Linear Output in Split Rail SMPS Pre-Regulator (FIXED) - Page 1
Forum section: electronics / projects

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 03:36:34 am
content: has anyone solve such kind of issue? i'm out of trick so far (need a break after solving other issues)... short story... spikes occured on both linear post-regulator +ve and -ve rail VO+ and VO- (with -ve rail being the worse 2-5Vpp spikes) when -ve rail of SMPS pre-regulator (Q19) is switching off. +ve rail SMPS pre-regulator (Q16) doesnt cause such an issue. you can see signal capture in capture1 and capture2 pictures below. and the rest of pictures are for reference, related schematics and PCB layout (4 layers). any suggestions on any related matters are welcomed thanks.

author: TopQuark
author_rank: Frequent Contributor
timestamp: November 01, 2022, 03:57:13 am
content: Switching spikes are very wideband and often the PSRR of the linear post regulator degrades significantly past a few MHz. Try installing ferrite beads between the smps and the post reg. See this app note from Jim Williams for further details (https://www.analog.com/media/en/technical-documentation/application-notes/an101f.pdf).I would also verify the probing setup is not picking up ground loop noise and making the results worse than what it really is, before spending too much time "fixing" the issue.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 04:12:27 am
content: Quote from: TopQuark on November 01, 2022, 03:57:13 amyeah that app note is in my possesion. that will be my last resort on the linear regulator output if nothing else can be done... putting ferrite beads between smps output to linear input is currently impossible as tracks are deeply embedded in pcb. and smps voltages output are fine (no significant spikes)... its just somehow that Q19 switching (-ve rail only) is coupled to the final output (linear post-regulator). i checked ground loop in few places, i think my ground is quite solid. i'll check again when i regain my energy, thanks for advice.ps: i'm using my experimental revolutionary low inductive ground loop probing system as attached fwiw... and 2nd picture is another capture of VSS- (smps voltage -ve rail, blue trace), yellow trace is +ve rail of the pre-regulator VSS+ and the "spikes" (cyan and magenta traces), they seem unrelated.

author: TopQuark
author_rank: Frequent Contributor
timestamp: November 01, 2022, 04:40:01 am
content: Also, where does Vrfs in the pre reg schematic come from?Probably not what's breaking your circuit's performance, but a couple points to look out for in general:Al electrolytic caps does very little to high frequency noise due to ESR and ESL. You probably want some MLCC of mixed values at the smps and post reg output to really filter the outputs. Note that adding low ESR caps at the output and installing ferrite beads will change the loop response of the smps, so you probably want to look out for that as well.I noticed you don't have input caps for the SMPS, that is not good for buck regulators, as the input is where the high di/dt "hot loop" occurs. I'd add 100nF plus some bulk caps right before the smps mosfet., nvm, just spotted C22 and C23.

author: moffy
author_rank: Super Contributor
timestamp: November 01, 2022, 06:13:12 am
content: Sorry to butt in, but are the Post Regulators loaded with a dummy load? I can't see a fixed nominal load connected to the darlington emiters to at least lower the output impedance.P.S. Missed the 10k fb resistor, still it might be a bit to high resistance for a nominal load.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 07:09:27 am
content: Vrfs comes from TL431 and then buffered by another 5532, i'll post schematics when i get back home, i'll take note on buffer capacitor low esr etc i'll see if i can add them to circuit.. there is 1kohm dummy load not shown on each rail, iirc even if i put real load, spikes still there.. btw by imagining from office, my suspect now is the controller U4, i think i need to look closer there.. its a very simple topology that i wish to polish from my psu ver1 in operation from 10 years ago

author: jonpaul
author_rank: Super Contributor
timestamp: November 01, 2022, 08:02:41 am
content: Bonjour, Suspect the probing, your test setup, probes, cables, scope?Photo of probe setup used>1/ Lytic ESR/ESL may cause the spikes.Use 10..100 nF monolythic across 1000 uF SMPS prereg output cap.2/ Use cable>>BNC >>Scope on AC to see true ripple. NO 10x or other probes!j

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 12:26:25 pm
content: attached is how reference is derived (Vadj is the potentiometer where i adjust voltage level), and the post-reg dummy load with current limiter. pre-reg also has similar dummy load. @jonpaul, thanks and noted, esp 2/ thats new to me. i need to take a moment to rest and stretch before i do circuit gymnastic again.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 01, 2022, 01:38:53 pm
content: Am I correct to interpret those spikes as over 2V in amplitude?Apparently they are also at quite long and irregular intervals, So it's not the normal switching noise of an SMPS.And why use the MC34063? It's an 30 year old IC. There is much better stuff around.I also made the mistake of buying some 100+ of these from Ali. That was EUR 3 almost straight to the garbage bin (after wasting time on them).

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 02:57:02 pm
content: Quote from: Doctorandus_P on November 01, 2022, 01:38:53 pmyes you read it correct, just as what i read it, it can reach 5V down, unless there is something wrong with the probe, if it lies, then we both lied to... currently doing further diagnosing. i suspect something going on too...iirc last night i saw U4's output changed reaction during switching period, so it must reacted to something, so here closer look at U4B's output... 1st attachment... when SMPS gate is turned on, U4B's (closed loop controller) output is going down slowly, why? this is yet to be seen why. but then when gate (smps switch) is turned off, VO- will suddenly follow the U4's command (that already down by about 0.5V) and go downhill, and then U4 quickly tried to recover the spike by going uphill, but its too late the VO- already reached more than 3V down and then recovering.to see why this is happening i need to investigate U4B's input both non-invert and inverting, ie how stable GND near it, and how stable Vref near the input (R25)... 2nd attachment is how it looks.. GND near U4 raised by about 8mV when smps turned on, and Vref raised much further about 40mV, so i suspect this is causing the opamp (U4) change of reaction during the switching? and when switched off, large transient occurred try to get balance back to normal, i'm not sure, maybe i try to connect thicker wires between few GND points on pcb? to make it stronger?Quote from: Doctorandus_P on November 01, 2022, 01:38:53 pmi have other smaller and faster smps controller ICs bought from LCSC (me2109F and me2139) they are doing very well on other project, but they are too simplistic, and specialized at boost controller. 34063 has current limit control (although i'm not using in this circuit), frequency user adjustable capacitor and can be configured many smps type (buck boost inverting) its general purpose maybe its drawback ie less efficient on particular smps type, i'm not aware of its modern equivalent, please suggest if you know any... but i think i'm not regretting it, its cheap too. i'm not expecting stellar performance out of it. if you can see in my second reply, smps voltage output is very acceptable to me, and i dont think 34063 has anything to do with spike problem, it just there to give command when to switch on and off, much much better than my earlier controller where i tried to diy my own controller from a bunch of comparator and square generator, used a lot lot of space and time for debugging. the real hard switching occured by AO3400/AO3401 mosfet. but then, there might cause the problem.

author: jonpaul
author_rank: Super Contributor
timestamp: November 01, 2022, 03:01:25 pm
content: Advise you to find the excellent 1980s Hewlett Packard Power supply test application or technical noteRe scope probes, the 1970s Tektronix circuit concepts book Oscilloscope Probe CircuitsMeasurement concepts...Oscilloscope Probe MeasurementsSee TEKWIKIAfter you read and learn, you can easily solve the problem.Bon courageJon

author: jmelson
author_rank: Super Contributor
timestamp: November 01, 2022, 03:40:10 pm
content: Quote from: TopQuark on November 01, 2022, 03:57:13 amYes, the first thing I do when I see something like this is connect the probe ground to the normal place you have connected it to, and then connect the probe tip to the SAME point. If the spikes are still there then it is an artifact of the scope. The spikes might be "real" but they are from currents injected into the scope GROUND across the impedance of the probe ground braid. A really good differential probe could eliminate this. But, a lot of differential probes can't handle the common mode junk a SMPS can put out. This is why some people isolate the scope with an isolation transformer, but there are some pitfalls with that, too.Jon

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 01, 2022, 04:57:07 pm
content: Obligatory: MC34063 well there's your problem.Other things to suspect:- What's VCC bypass? Just a 0.1 each side? Woefully insufficient, buck input gets 100% switching ripple (square pulse shape).- I see a row of big caps but they're all the way across the board, and those big pours (layer 3) having no bypass, likely induce a lot of that switching noise elsewhere (particularly to bottom layer)?- Ah, I see the bypasses, they're not even for the switchers at all, they're hugging the op-amps.- NE5532 is a bipolar amp, without any particular controls for EMI as far as I know. That high frequency blip incapture5.pngmay be coupling into them, getting rectified and injecting a momentary offset. Which then takes a while to recover from.- Why isn't the blip consistent? Does it correspond to peak inductor current? Or zero current? (Or is it ~every cycle and the scope just isn't showing it at this scale?)- That high frequency stuff can perhaps be reduced by putting some R+Cs around the switching MOSFETs, or ferrite beads or other things. If annoying to do on a SOT-23(?).- There are no main power in/out connectors? Just free wires to anywhere on the board? Better to keep connectors grouped along one edge, so that filtering can be co-located, and any switching or other noisy stuff placed distant from it. Wires placed anywhere, will pick up whatever fraction of whatever current loop they're placed near.Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 06:12:34 pm
content: i'm not sure i can understand all your "summary style" short writing, maybe some are out of my head so i wont be able to reply all. btw i was not aware how to bypass smps properly, near the 34063? or near the mosfet? nvm i'll google up. currently on the smps output are just 1000uF elec caps. ceramics caps shown only to bypass 5532. EMI? i'm not sure how to, i thought by doing it on 4 layer board, with almost solid gnd plane on layer 2 (minus those unavoidable through holes) its taken cared of. more things are still out of my head, such as why the trapeziodal shape of the mosfet gate when switching, i think that will not matter.20Vac power comes from connector P1 on bottom left corner of pcb (refer to top layer) and row of caps at the bottom are bulk storage, 2x for VCC+ (20V), 2x for VCC- (-20V), and then go up right to SMPS1 (VSS+) and SMPS2 (VSS-) and then go left to linear regulator, and the output i placed holes to solder wires at various free space at the center, you can spot VR+, VR- holes (linear output) there along with VS+, VS- (pre-reg smps output) holes just in case i need them direct. i need those darlingtons on far left edge so i can put big heatsink next to them, thats why power flow is circling from bottom left, to right, and then up, and go far top left and back to the center top. space is tight, i constrain myself to 10cm x 10cm pcb to get $5 price mark from jlcpcb, i wish i could put more fancy circuit in there. (actually i installed a pair of TIP122 in parallel, and another pair of TIP127 in parallel as working darlingtons, the shown TIP142 and TIP147 in schematics are compatible replacement on the pcb, not actually installed)anybody care to elaborate why 34063 is the problem? it is just a controller, not the "rails puller" right?, i still dont see why, i dont think its non-ideal switching algorithm is that problematic. the 5532 is guaranteed cloned too, but it works better on +ve rail, not so on the -ve rail. i'm not sure which blip you are referring to, but nevermind the ground raised by 20mV, thats my probe ground loop, so i think gnd is ok. i'll need to investigate Vref further and current flow on third layer, still cant figure it out.and whats quite dissapointing is that Q5 and Q6 that suppose to suppress these spikes are pretty useless even though i increased biasing voltage to even greater than 3V at Q25 and Q26's Vce.btw i think i'm out of juice now i need to go to bed, will continue tomorrow, nothing is fixed tonight, just probing and imagining why? and posting carefully typing in forum. attached are opamp + darlington recovery for both +ve and -ve linear output, clearly +ve rail is much better recovery when +ve rail of smps is switching. but when -ve rail of smps is switching, things go heywire for both rails, except +ve post-regulator is still better than -ve post reg as can be seen in 1st post (OP) fwiw...

author: jonpaul
author_rank: Super Contributor
timestamp: November 01, 2022, 06:53:22 pm
content: waiting for your photo/schema of exactly your probing/setup to take the Chinese scope pixJon

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 07:05:41 pm
content: i think i've posted my probing setup in reply #2, and thats not chinese scope, thats my app (VisaDSO) capturing from my DS1054Z... yeah you are right! chinese scopecheers.

author: Vovk_Z
author_rank: Super Contributor
timestamp: November 01, 2022, 07:43:32 pm
content: Low value (10-47 uF) electrolytic caps at the device output together with all other things may help to dampen spikes.

author: jonpaul
author_rank: Super Contributor
timestamp: November 01, 2022, 07:44:01 pm
content: As I suspected, no attention to probe technique, huge Lser of probe returns and clips/wires.You created an inductive pickup loop.Try the same setup and test but SHORT ever probe input to ever probe return.See refs mentioned,Jon

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2022, 09:14:20 pm
content: Quote from: jonpaul on November 01, 2022, 07:44:01 pmmy circuit problem is not affected by it, the spike still exist even if i only probing all low impedance nodes (VSS+, VO+, VO-, VSS-). the spike is real and caused by something else, looks like its not a common one, probably its my brainfart such as using cloned or degraded parts, or simply some other stupid mistake, or maybe there are more advanced smps design technique and pcb layout that i'm missing out. i'll google and figure that out later. cheers.Quote from: jonpaul on November 01, 2022, 07:44:01 pmi cant make out any usefull keyword from it, all i tried in tekwiki returned irrelevant appnote. i know some basic probing technique such as the mentioned inductive pick up, i have abc probe primer from Tek and i know how to design one 1/10X passive probe and its input impedance's effect too. i think i ruled out the possibility that probes are affecting my circuit and i take note the impedances the nodes i'm probing, they are quite low to be affected by probe's loading, thanks.ps: just to rule out brainfart on this, i verified the measurement with short pogo pin connected directly to the probe head and do the hand-not-free probing, spike still the same magnitude whether i use pogo pin or long wire clipper, so its not inductive pickup, fwiw.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 01, 2022, 10:57:27 pm
content: Quote from: Mechatrommer on November 01, 2022, 06:12:34 pmBoth; they're close enough together after all. A 1uF or larger, ceramic, would be a fine start!QuoteYep -- but mostly irrelevant, as that's after the inductor -- the ripple there is triangular, not square.QuoteWell.. it stands to reason, something can always be doneworse. Make a 4-layer board, split it exactly down the middle all layers, and put an oscillator across the halves. It's 4 layers, it's "almost solid GND plane" (well, solid in the respective halves, hah), and it's some manner of flat or "bowtie" (but maybe not very "bowtie"-ey) dipole antenna -- blast out all the radiations!And even with a board-wide ground plane, there are patch antennas, for example.Or for components within the board, any manner of loop or pour may suffice to couple into them, even if done over ground plane; perhaps even if done from between ground planes (as the inner layer pours may).So, a ground plane isn't automatic. It's a great help -- without it, maybe your error would be 100s of mV, or even whole V -- but it still has impedance of its own, and cannot solve the problems caused by poor layout.In particular, the inner pours, and outer traces, all have impedance (and higher than the plane's), and also some coupling (particularly between inner pours and bottom traces).QuoteIt's hardly a "controller" at all. It has something that can charitably be called "current limit", but really it just tweaks the oscillator up a bit. It's more coincidence that it manages to limit current under somewhat typical circumstances. And it's slow and inefficient as hell.There is at least the NCV3063, faster, more efficient, and with an actual (latched) current limit. But it's still hysteretic, so the output ripple will still be messy.Using such a nasty pre-reg in the first place, rather begets the linear post-reg. It's a self-fulfilling prophecy, right?...If you can quantify what level of noise you actuallyneed, I all but guarantee it can be met by an ordinary switching regulator IC, or at worst maybe an average current mode control, and maybe a 5th order filter, with good layout and no need for shields. That describes a design I did some years back, which fell under 1mV RMS in the VHF band, using regular old buck controllers.Many switching regulators aren't as flexible as we might like, and occasionally a from-scratch design is needed. I made one of these some years back as well, with a full digitally programmable CC/CV output characteristic. That design fit two (really kinda three) channels onto a board the same area (10 x 10 cm, give or take), totaling over 1kW of capacity; though it didn't have EMI filtering as the project didn't require it, but that would be easy enough to add with a small board beside it.QuoteIf it's counterfeit, it's probably a relabeled LM358. Check supply current for one; 5532 should be absolutely guzzling (~10mA).Tim

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 02, 2022, 08:14:23 pm
content: further diagnostic tonight. i added mlcc 1uF near Q19's drain (VCC- node) doesnt fix it (previously i added more bypass here and there, same thing) i cut some unused tracks thinking they might become noise/capacitive antenna, same thing. i checked ground loop in various places (gnd lead connected to probe tip and do the probing), i got different profile, so i suspect the ground is waving when current flow through mosfet. this so far narrow me down to few possible culprits...1) poor CMRR of opamp. there are dips in source (unregulated) power supply, a good CMRR opamp output should not be affected by it. changing to better opamp should improve this.2) since ground plane is wavy (power current flowing through it back to the source) i guess my Vref reference circuit is too far (about 5cm away) from the post-reg control opamp (U4). so underneath the Vref circuit is a mix of power and analog ground plane, and ground plane at U4 is bouncing at different level compared to at Vref circuit. the fix is... make new pcbattached are opamp U4 reaction when smps is switched on, observing how the opamp reaction during the "turn on" period (not at the edge) should give some clue something is going on (during current flow in mosfet to smps inductor) i guess its the precursor to what happen next, ie the spike, just after the mosfet is switched off. 3rd attachment is the Vref track from reference source and buffer, to the U4 and VO- voltage divider. fwiw...

author: moffy
author_rank: Super Contributor
timestamp: November 03, 2022, 12:12:47 am
content: "2) since ground plane is wavy (power current flowing through it back to the source) i guess my Vref reference circuit is too far (about 5cm away) from the post-reg control opamp (U4). so underneath the Vref circuit is a mix of power and analog ground plane, and ground plane at U4 is bouncing at different level compared to at Vref circuit. the fix is... make new pcb "Before committing to a new PCB, you could test your theory and cut the track from the current Vref and build a vref right near U4, but I would suggest not to use a TL431, as they sometimes have stability issues, but an LED of suitable voltage, change the colour and the voltage changes from about 1V for infra red up to about 3.5V for blue.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 03, 2022, 12:44:42 am
content: thanks moffy for suggestion. but space is tight i cant create a daughter board without long ground wire on it, i already patched 2x add-on board the size of DIP8 footprint on it, there is no more space. anyway, i figured that out late in the night. with "ground bounce theory" in mind i made a simulation on how to stabilize Vref at U4, it turned out i need like 100uF cap next to the pin, so i patched 2x 36uF MLCC (largest in my stock), the spike improved a little bit, so i searched what other node to stabilize, its the VO- trace just next to voltage divider near U4, with another 36uF patched on it, the spike reduced significantly from 5Vpp to 0.5Vpp, so i consider itSOLVED, next improvement i believe should be moving Vref source right next to the U4 and add proper bypass/stabilizer cap's pads to solder on on the next pcb revision.i think TL431 is very acceptable in this case, i dont want to risk and test another LED based reference, it will need new pcb anyway. so i will just add whats necessary rather than changing whats already work, i may risk another revision if new circuit not working again. attached are the "ground bounce sim" i made last night, the spikes after bypass caps addition to the mentioned nodes and how the board looks now. so the bypass caps advice here is valid, its just not on the output, but very near to the control input. thanks and cheers, fwiw.

author: moffy
author_rank: Super Contributor
timestamp: November 03, 2022, 12:59:18 am
content: Glad to see you are making progress.