Portable battery powered PSU - uSupply inspired - ( critique the design ) - Page 1
Forum section: electronics / projects

author: Asim
author_rank: Regular Contributor
timestamp: December 24, 2015, 10:25:14 pm
content: Hello everyone,after holding off this project for a while, I came back to it last week.My requirements of the power supply are as follows:1. 0-20.48V output2. 0-1A output3. 10mV resolution4. 1mA resolution5. 1% accuracy in voltage & currentSame as Dave's design, I will be using two lithium ion/poly .in the attached schematic, I divided the design into 4 blocksblock 1 : charging circuit for the batteriesblock 2 : 3.3V regulator & the voltage referenceblock 3: DC-DC boost converter ( controlled by Digital pot )block 4 : the linear regulator using a discrete N channel MOSFET with OP AMP for voltage control & current limitblock 5: ?C & the User interface ( this block not added yet).for sensing the output current & the output voltage I will be using INA219 ( high side sensing)which can monitor both the shunt voltage drop and bus supply voltage so I can use it as monitor for the output voltage & currentcomponents are subject to change, feel free to advice as I posted here to learn.Regards,Asim

author: Kleinstein
author_rank: Super Contributor
timestamp: December 25, 2015, 10:01:53 am
content: Using a MOSFET as an power divice needs something like 4-5 V of headroom - so quite a lot of volatge wasted if no separate higher supply is used. Especially in a battery powered divice this is not good. So an extra higher supply mightbe usefull.The shunt at the source side of the MOSFET is not working well with a regulator circuit referenced to the negative side. This makes current sensing rather difficult. The current suggestion is tricky as comon mode errors of the differential amplifier easily causes instability. So one should either use a low side shunt or a shunt on the drain side with regulator referenced to the negative side or a floating regulator with a shunt at the source side. This avoids high comon mode voltage at the shunt. A really good regulator might need a minimum load or 2 quadrant capability to allow the voltage to go down.The preregulator is usually better controlled from the actual output voltage - thats even easier that the digital pot. Something like 1-3 volt over the linear stage could be enough.Adjustung the DAC steps to exactly 10 mV or a similar digit step needs fine adjustment in hardware. Often it's better to have a DAC with higher resolution and do the calibration in software. Good DACs are rather expensive, so one might consider using PWM or using the ADC thats there for measurement anyway to measure the acutal setpoint.

author: dom0
author_rank: Super Contributor
timestamp: December 25, 2015, 10:18:41 am
content: Driving the IRF3709 gate through a 10 k?(!) resistor will force your control loop to be extremely slow, a bandwidth of a few kHz will be the limit.Q1 also has no fast current limit, so the slow control loop might be unable to save it with a dead short on the output or difficult loads. This design would likely not survive the file test.The design of the current control loop is also not good. Trying to force U1.3 output low through D1 is not a good idea. As the control loops, as I mentioned, have to be very slow you could move D1 to U8 Uout and add a small resistor in series to U8 Uout.I also see that you are using many 0.1 % resistors and high end operational amplifiers. This is rather unusual for a power supply, especially one with digital control, were initial accuracy is essentially a do-not-care feature. (For good stability one wants lower tempco than standard, which will usually by 1 % or better still, even when not needed)Overall I'd say it's best to scrap the design of the output stage and associated control loops and start over. This time consider dynamic properties and not only think "statically". For an analog circuit the "statics" must be correct for it to "somehow" work, but one must always consider dynamic properties for a good design.

author: Asim
author_rank: Regular Contributor
timestamp: December 25, 2015, 02:22:17 pm
content: Quote from: Kleinstein on December 25, 2015, 10:01:53 amyea, it would be better if I include maybe a small boost converter to give 25V minimum to supply the OP AMP.Quote from: Kleinstein on December 25, 2015, 10:01:53 amI want to stick to high side sensing, if I understood you correctly the shunt to be moved between the boost converter & the drain , the inverting amplifier input to be connected ( U3.1) to be connected to the source ?Quote from: Kleinstein on December 25, 2015, 10:01:53 amcan be done , will look into itThanks

author: Asim
author_rank: Regular Contributor
timestamp: December 25, 2015, 02:40:58 pm
content: Quote from: dom0 on December 25, 2015, 10:18:41 amwill decreasing the resistor to 1K solve the issue ?Quote from: dom0 on December 25, 2015, 10:18:41 amPulling U8 output low ( hence limiting the current) will not effect the DAC in anyway?Quote from: dom0 on December 25, 2015, 10:18:41 amRoger that.Quote from: dom0 on December 25, 2015, 10:18:41 ammy design is beyond tweaking ?I am trying to avoid using LM317 brothers & I want to go with a discrete MOSFET. any suggestions ?

author: dom0
author_rank: Super Contributor
timestamp: December 25, 2015, 03:40:14 pm
content: Quote from: Asim on December 25, 2015, 02:40:58 pmTo drive such a large FET without adding significant phase lag at higher frequencies, and thereby limiting loop speed <=> transient response, it would be best to drive the gate from a low impedance source.While source / emitter followers in small signal applications sometimes oscillate when driven from low impedance sources, this doesn't happen in supplies due to strong capacitive loading on the source / emitter. Also, a supply isn't really small signal territory.Most op amps are not low impedance sources (important: the closed loop output impedance is irrelevant, the open loop output impedance determines the phase shift at higher frequencies). Adding a simple, small buffer made from BJTs is often a good idea. I applied it in several of my designs, always to good success.Adding series resistance avoids the need for additional buffer, but on the other hand will, as previously described, limit the frequency response of your loop - severely.QuoteProbably not. Series resistance from the DAC output to the input node of the voltage control amplifier should reduce the effect. Depending on the drift, output current limit and output recovery characteristics of the DAC you might be able to observe thermals after recovering from current limit, or a longer than usual settling time to the DAC input value. Check the datasheet, it should have the necessary information.QuoteWhat I meant was that it isn't a matter of adjusting a few resistor values, but more substantial changes, so the new circuit bears little resemblance to the starting point. This is of course a good thing, since you'll learn something by doing it.

author: Asim
author_rank: Regular Contributor
timestamp: December 25, 2015, 05:08:47 pm
content: Thanks for the pointersI modified the circuit1. current sensing moved to the drain2. BJT follower is added to drive the MOSFET gate3. the current limit OP will be driving the DAC low instead of U1.3I believe this will be a good start for refining/changing the design

author: Kleinstein
author_rank: Super Contributor
timestamp: December 25, 2015, 05:39:40 pm
content: The choice of MOSFET is poor - one should have one for lower current and higher voltage, that is resonable capable to work in linear mode. So I would consider something like the old BUZ10 , IRF510 or IRFP240 at most if higher power is needed. With a realtively small FET like the IRF510, its possible to use just an OP with something like 200 Ohms series resistor. If a buffer is used, ist should be fast discharging the gate - no absolute need to be fast the other way around. So it should be an PNP emitterfollower. An additional NPN is optional, possibly not even wanted.For the current loop, one can eliminate the follower - the shunt is allready a low impedance signal source.The controll loops will need capacitors at the OPs to set the speed and make is stable. The current controll part will have a hard time to drive the output all the way to zero. So this needs to be done a littel different if no negative supply is available. The standard way is using 2 diodes for a minimum function after the regulating OPs.

author: prasimix
author_rank: Unknown
timestamp: December 25, 2015, 09:26:01 pm
content: Quote from: Asim on December 25, 2015, 02:40:58 pmWhat's aboutOPA548power op-amp? You have already a pre-regulator so it shouldn't be a problem to stay within SOA while deliver up to 3 amps.

author: Asim
author_rank: Regular Contributor
timestamp: December 26, 2015, 06:10:03 pm
content: Quote from: prasimix on December 25, 2015, 09:26:01 pmWow, I didn't know such a device exist, nice little beast