Long I2C bus with a lot of slaves - Page 1
Forum section: electronics / beginners

author: PinheadBE
author_rank: Regular Contributor
timestamp: March 26, 2025, 08:47:27 pm
content: Hi,I have a project where I'll connect 15 slave devices onto one I2C bus. The total length will be 2 - 3 meters long, way beyond I2C specifications (+- 1 m)I found two possible solutions:Using a PCA9517A (http://www.nxp.com/docs/en/data-sheet/PCA9517A.pdf) at each slave device, and those are then all connected "in series" (the output of one PCA9517A is connected to ONE slave and the input of the next PCA9517A) So the distance between two slaves will never exceed 40 cm, and at each node, the data is buffered and noise is filtered outUsing a PCA9615 (https://www.nxp.com/docs/en/data-sheet/PCA9615.pdf), which converts the I2C on a differential pair (for each signal: SCL and SDA), and on that differential pair, another PCA9615 converts back to regular I2C signals to connect the slave at each node. So, all PCA9615 are connected in parallel on the differential pair, and the "real" length of the I2C part of the connections will never exceed 5 cmBoth of those solution are transparent for the I2C devices, both electrically and in terms of protocol, and there will be only one master on the bus.The bus will run at 400 kHz.The first solution is way less expensive than the second (about 4 times less)What are your thoughts about this ?Are those two solutions equivalent in terms of performances ? (immunity to noise, bus lock-upsThanks for sharing

author: benj38
author_rank: Frequent Contributor
timestamp: March 26, 2025, 09:06:40 pm
content: It does not look like the PCA9517A are meant to be connected in series as you intend. that is, the output of one PCA9517A cannot be used as the input to another. Looking at the datasheet you will see that the maximum low input voltage is 0.3V, whereas the minimum output low voltage is 0.47V.

author: PinheadBE
author_rank: Regular Contributor
timestamp: March 26, 2025, 09:09:28 pm
content: Its datasheet says that: "Multiple PCA9517As canbe connected in series, port A to port B, with no build-up in offset voltage with only time offlight delays to consider."Port A is one side of the repeater, port B is the other

author: benj38
author_rank: Frequent Contributor
timestamp: March 26, 2025, 09:27:19 pm
content: I stand correctedI was too quick and did not notice that for port A the maximum output low voltage is much lower than for port B, being only 0.2V.

author: JoeyG
author_rank: Regular Contributor
timestamp: March 26, 2025, 10:05:46 pm
content: Once built you can checkout the I2C waveform signal integrity with an oscilloscope - to see if it meets the data sheet specifications

author: PinheadBE
author_rank: Regular Contributor
timestamp: March 26, 2025, 10:28:04 pm
content: I have also found that LTC4311 (https://learn.adafruit.com/adafruit-ltc4311-i2c-extender-active-terminator) could offer a solution when placed directly at the beginning of the chain (I suppose that means the master's side).I am now facing three possible choices.One of them (or maybe the combination of LTC4311 with one of the other) should be the winning solution...."Once built"..... yes, but I'm an hobbyist. If I want to have a significant result, I have to build the whole stuff to be in the real conditions. I cannot afford to build 15 versions of each and dump the lesser ones....Especially when PCA9615 costs 27 € + taxes for 10 units.... + the price of the PCB's and the other components of each slave, in each version....Therefore my question here, in case anyone would already have an experience with those chips in this use case

author: JoeyG
author_rank: Regular Contributor
timestamp: April 02, 2025, 02:51:41 am
content: you advise - "If I want to have a significant result, I have to build the whole stuff to be in the real conditions. I cannot afford to build 15 versions of each and dump the lesser ones....".OK then, how you going to verify the design before any effort?Which ever way you choose there will be some effort!The answer may be to1. Obtain the i2c characteristic input/output impedances and logic thresholds from the manufacturer (OR perform some limited tests to get an estimate of the characteristic impedances of each I2C device)2. Obtain the characteristic impedance of the cable being used ( how much LRC per foot/meter " cable lumped inductance"3. Spice model the whole I2C part of the circuit [as close as possible#] (perhaps with varying i2c pull-ups and I2c frequency)(I've done this before when we had multidrop I2C per meter, and we wanted to know how many I2C drops we could get before the logic thresholds and rise time issues)**while the spice modeling will take some effort, once done, changing values and parameters is very quick to see any effect with out any soldering**Here's a 2iC spice threadhttps://electronics.stackexchange.com/questions/259363/how-to-simulate-an-open-drain-output-for-i2c-in-ltspiceOr the the answer may beBuild a small 5 unit section and use and oscilloscope to to see any voltage drops and waveform/rise time issues at each node. And make a deterimation what the voltage drops and waveforms might be with on other 5 units etc.#spice models are only as accurate as the models provided.

author: tooki
author_rank: Super Contributor
timestamp: April 02, 2025, 06:01:10 am
content: Quote from: PinheadBE on March 26, 2025, 08:47:27 pmThe specification doesn’t say that. It specifies maximum bus capacitance, and 2-3m is actually not that hard.

author: mtwieg
author_rank: Frequent Contributor
timestamp: April 02, 2025, 12:02:12 pm
content: PCA9615 is more applicable to cases where there is very strong external interference, or when there's significant "ground bounce" between devices on the bus, not when there are many slaves on a bus.I don't have experience with the PCA9517A, but I have used the LTC4315 extensively in an application where a bus is distributed to several daughterboards, with up to 16 slaves total. But we don't just use a single LTC4315 on the master board, there is also a LTC4315 on each daughterboard as well. This is certainly overkill, would probably be fine with just the LTC4315 on the daughterboards and not on the master.It's also possible that a single LTC4315 on the master might be sufficient from a drive strength and rise/fall perspective. But these chips also serve the purpose of preventing one slave/daughterboard from locking up the entire bus, which can be a huge headache depending on the details of your design. More advanced chips like the LTC4315 can detect a stuck bus and automatically generate SCL pulses to try and recover, which is neat.

author: Peabody
author_rank: Super Contributor
timestamp: April 02, 2025, 03:05:18 pm
content: Are you sure it won't work without any help? I just wonder if careful selection and placement of the pullup resistors wouldn't let it work well enough.Another thought I had was to use an I2C multiplexer like the TCA9548A. A multiplexer could be used to divide the slaves into separate buses, or perhaps run separate buses for the ones that are far away. Of course then you would have a lot more wires to deal with.

author: JustMeHere
author_rank: Frequent Contributor
timestamp: April 02, 2025, 03:55:33 pm
content: The biggest thing you'll run into, I think, are reflections (ringing). You will need to terminate the wires so the reflections will be mitigated. Probably need to worry about impedance matching in the wire too. 40cm between devices might not be an issue though.See Howard Johnson's Highspeed Digital Design (you can find a PDF on the Internet) section 1.3 and 4.1.1.Make sure you found the right book. He has two with very similar names.

author: dietert1
author_rank: Super Contributor
timestamp: April 02, 2025, 04:33:16 pm
content: I think the multiplexer is a good idea in order to resolve address collisions.A 3 m I2C bus is no problem at all, if it is made from shielded cable. Otherwise there is a risk of picking up glitches from ambient (mains switches). A star configuration with the master at the center would be preferable as the bus with its open collector nodes will hardly become a terminated transmission line. Except if you have a single master the clock line might be made into a transmission line.I have been using stereo audio cables with the two shields used for Gnd and Vcc and the two signal wires used for the bus signals. Then one should check and align I2C bus timing and drive strength on the master(s) in order to make proper use of the timing margins.Regards, Dieter