M-LVDS vs LVDS for clock distribution in O&G well-logging tool - Page 1
Forum section: electronics / projects

author: LightBlue
author_rank: Unknown
timestamp: March 06, 2014, 01:41:39 pm
content: Hello everyone,This is my first post on the EEVBlog, please be nice!I am looking for advice on clock distribution for an Oil and Gas well-logging tool that I am working on. It contains 10 PCBs spread over ~2m that do some cool signal processing. I need to distribute a 25MHz clock to all the boards; some of the boards have up to 24 devices that need the clock signal.The topology I have in mind at the moment is to use an M-LVDS backbone with a receiver for each board and then at the board level, local M-LVDS distribution to all the devices. As this is a multidrop (not multipoint) siuation, I'm looking at M-LVDS as I have read conflicting TI documents that state LVDS is both good for multidrop (SLLD009 bottom of page 6-6) andnotgood (SNLA113B bottom of page 3).I haven't used LVDS/M-LVDS before and so I don't have a feel for the solution. I have started evaluating the SN65MLVD200A as a potential M-LVDS driver but when I came to look for other parts there doesn't seem to be much choice if I want to stick with M-LVDS. For example, I assume I would need a repeater/fanout device to connect a spur onto the main backbone. Then there are receivers, not many small devices with legs that I can see.If I look at LVDS parts, there are plenty of choices and nice little receivers in SOT packages.So I would like to know:1) Am I worrying too much about M-LVDS - would LVDS drive <32 multidrop receivers just fine?2) If I stick with M-LVDS drivers, what is the best way to buffer/repeat this on a daughter board?3) Again if I stick with M-LVDS drviers, could I use LVDS receivers? There is a much wider choice of LVDS single/dual receivers in small packages than M-LVDS. Is it common to use LVDS receivers with M-LVDS drivers?I'm going round in circles now and my eyes are hurting from reading application notes. I would like to hear from someone that is familiar with LVDS/M-LVDS to see how close I am to a solution. I'm open to suggestions on parts, topology, anything; all comments are welcome.

author: nctnico
author_rank: Super Contributor
timestamp: March 06, 2014, 02:06:23 pm
content: How much jitter can you tolerate?If you have a backplane you could have a tree like structure which fans out to the number of outputs required. AFAIK there are chips which take 1 input and have multiple outputs.

author: LightBlue
author_rank: Unknown
timestamp: March 06, 2014, 04:41:07 pm
content: Jitter is not a huge concern between boards so I can tolerate quite a bit.The tree structure is what I was thinking about, with a single backbone and branches coming off to each board. Each board would then split the clock again. The tool, and the boards, are very long and thin so they lend themselves to a linear distribution with drop-off points. If I use a fanout chip then I have to route lots of tracks in parallel for a long portion of the board, which isn't ideal on a crowded board.I had a reply from TI.com just now who suggested looking at BLVDS... A third option! I was trying to narrow my options down

author: nctnico
author_rank: Super Contributor
timestamp: March 06, 2014, 05:23:49 pm
content: Another option is to lower the frequency and use an onboard PLL to get to 25MHz. OTOH 25MHz isn't really high nowadays. If you have time for some experiments you may find that taking the clock signal from a single clock pair (terminated at the beginning and end) just works as long as the stubs aren't too long. Slowing down the edges will definitely help.

author: LightBlue
author_rank: Unknown
timestamp: March 06, 2014, 07:14:34 pm
content: The tool is rated to >175degC and so I cannot use a PLL (PLLs don't usually work at high temperature; if they do, they almost certainly won't lock after a power cycle).The clock pair that runs down the tool will need to be buffered at each branch into a daughter board as the boards are typically 300mm long and the clock needs to run the whole length of each daughter board.Currently then I plan to convert the tool's clock output to a differential pair that is terminated at the end of the tool. Where a board is connected to the tool I plan to buffer the signals to give a very short stub length off the main clock pair and drive the local clock pair on the board. The problem is, what kind of differential signals? LVDS, M-LVDS, BLVDS or something else?And my other question was the interoperability of M-LVDS and LVDS drivers and receivers.

author: nctnico
author_rank: Super Contributor
timestamp: March 06, 2014, 11:21:18 pm
content: I'd be inclined to use the LVDS flavour with the largest voltage swing and largest threshold. This will have the largest tolerance to noise. Did you look at RS485 drivers/receivers? Some go to tens of MHZ.

author: LightBlue
author_rank: Unknown
timestamp: March 07, 2014, 08:51:19 am
content: That would be M-LVDS. I agree, I will try that first and see how it works.RS485 drivers use too much power compared to LVDS, which makes life harder at high temperature.Cheers