INL Transmille 8104R - Page 1
Forum section: electronics / general

author: branadic
author_rank: Super Contributor
timestamp: August 06, 2021, 07:39:47 am
content: Hi,TiN kindly performed INL measurements on a Transmille 8104R using a Fluke 5720A as a source.First measurement, 10V range:raw datawith Fluke 5720A in column B and 8104R readings in column CSecond measurement with a 3458A in parallel, 10V range:raw datawith F5720A in column B, 8104R in column C and 3458A in column DThe results are not looking very good, however, I've tryed to improve the results. First of all I calculated the deviation to the Fluke 5720A, not by applying a linear fit, but by calculating the difference between both. The difference and the actual reading of 8104R were then used to search for a mathematical dependency. How I found the function doesn't matter though, but I found one. The function to correct for the difference looks like this:corrected_8104R_reading = -7.83183439271802e-11*8104R_reading - 0.0159154992530412*sin(62.8318530668913*8104R_reading) + 8104R_readingOnce the function was found I used it to check it on both measurements and for some odd reason it does fit too well, so I would like someone else to check and verify it with the raw data given. Hopefully we get some more measurements in the future, so we can check the result even further, like a 1 hour measurement of 10V.Thanks for your contribution and sharing your results here.-branadic-

author: Andreas
author_rank: Super Contributor
timestamp: August 06, 2021, 05:58:28 pm
content: mhm,sine in radiants (2*PI) or in 360 degrees?with best regardsAndreas

author: rigrunner
author_rank: Frequent Contributor
timestamp: August 06, 2021, 06:16:27 pm
content: That shape matches Tin's INL of the 8081.What are the odds it's the same internals with an LCD strapped to the front?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 06, 2021, 06:26:48 pm
content: It is odd to see so much correlation between the INL error and the noise. It there some kind of problem with the math ?Much of the shape is just a square parts. This can happen from things like the resistance of FET switches. So it is not such a surprise.The similarity to the 8081 is surprising with the jump at some 9 V however. So there could be very similar internals (e.g. same ADC module).The relatively slow ADC in the 8081 may need additional time for settling and longer integration to get full lineartiy.

author: chickenHeadKnob
author_rank: Super Contributor
timestamp: August 07, 2021, 02:23:06 am
content: Quote from: Kleinstein on August 06, 2021, 06:26:48 pmWould that not be explained by a circuit where most of the noise is generated before the non-linear amplifier gain?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 07, 2021, 06:07:22 am
content: Noise before an nonlinear part would only give a slightly modified gain for the noise. The local slope would amplify the noise a little. This is a small effect off DNL to modify the noise. The INL error is still way too small to have a noticable effect : it would be a factor of some (1+1ppm) extra to the noise - way below a level to be detectable.There is a chance that idle tone in SD or similar ADC can cause INL and noise.I have more the feeling the calculation of the Sdev may be wrong, like using the set value instead of the average to calculate. This would be a bit like RMS with or without the DC part and naturally seeing the DC part.p.s.:I looked at the raw data and they don't support the shown sdev values. I don't see much change in the noise (just a few points by hand/head).Another suspicious point is that with only 6 values the SDEV will naturally scatter quite a bit.

author: branadic
author_rank: Super Contributor
timestamp: August 07, 2021, 07:03:20 am
content: QuoteSin indegreeradiants please.-branadic-

author: e61_phil
author_rank: Frequent Contributor
timestamp: August 07, 2021, 08:12:41 am
content: Quote from: branadic on August 06, 2021, 07:39:47 amHi André,Thanks, for this interesting idea! As already discussed in our private chat here are my thoughts to discuss further with more people:the first term:~1e-10 * reading -> The readings maximum is ~10V. Therefore, this terms maximum is ~1nV -> should be negligiblethe second term:16e-3 * sin(x)x should be in degree (your wrote it) and will be ~-630° for -10V and ~630° for +10V. That means the sin-function will go through several periods. Therefore, it will reach 1 several time. If the sin is 1 the correction would be 16mV. That is way too much.Did I miss something?Best regardsPhilipp

author: branadic
author_rank: Super Contributor
timestamp: August 07, 2021, 08:51:19 am
content: Hi Philipp,that is exactly what is going on here. Even though the correction appears to be stable, it becomes instable when adding additional substeps, which means, with the measured values feed into it, the residual difference to the set value becomes very small (1e-12 --- 1e-11). The measurement was performed in 100 mV steps. Once I feet the function with artifical data from -10.9 V to +10.9 V in 1mV steps, I can see large ocsillations of +/-16 mV.So it is stable for the measured values, but instable for all possible values. So we can say, the solution is bad. Thanks for this discussion, it is much clearer now and I have to search for a different solution to fit the error curve.Edit: The following solution gives stable results, is higly complex, but can't correct for the jump at +9V:y = 7.03022460688652e-6 + 1.36652705374197e-6*x + 1.75175533881149e-9*x^4 + 8.74846264841192e-11*x^5 + 1.36652705374197e-6*sin(5.23361549244008 - 0.0954242062653589*x^2) + 1.75175533881149e-9*x^3*sin(5.23361549244008 - 0.0954242062653589*x^2) – 2.68565070680313e-7*x^2 +x-branadic-

author: try
author_rank: Regular Contributor
timestamp: August 07, 2021, 11:28:38 am
content: Hello branadic,what exactly is the purpose of the fit?I am asking the question because I would like to know what the limitation is that prevents you from simply doing piece-wise linear interpolation on your measurement table to calculate the so-called true values of your voltage measurement.Besttry

author: dietert1
author_rank: Super Contributor
timestamp: August 07, 2021, 07:49:49 pm
content: MS Excel is useful to fit polynomials. My version does up to 6. degree and i play with the degree to check which contributions are significant. I guess most of the measured deviations get corrected by a parabola.The problem above +9 V or so is also present in some other multimeters and it originates from the input stage and its limitations. For example when i look at the input stage of the Advantest R6581, even with an internal power supply of +27 V it gets tight at +12 V input voltage. This happens due to the source-gate voltage of the input FETs (some volts) and the bootstrap circuit that needs a voltage reserve, too. In the end there are some volts left, but that isn't sufficient for 8 digit accuracy. Recently i noticed a spec in an AD opamp datasheet with +/- 15 V supply with +/- 13.5 output swing but full resp. constant gain only within +/- 10V out. Don't remember now which opamp, maybe ADA4077.On the negative side (at -12V input) it appears to be less difficult, due to sign of the gate-source voltage of the input FETs.Regards, Dieter

author: rigrunner
author_rank: Frequent Contributor
timestamp: August 07, 2021, 08:01:53 pm
content: The input for the 8081 (I'm assuming it will be similar in the 8104) doesn't have FETs or bootstrapping in it.In 10V range the input from the terminals is fed through the front end relay chain into a unity gain LT1150 with a pair of BAV45 diodes across the input for protection. Then into a DG442 MUX and another LT1150 buffer in unity gain. After that it is into the ADC daughter board.Edit: A quick doodle of the front end after the relay chain attached

author: dietert1
author_rank: Super Contributor
timestamp: August 07, 2021, 09:13:38 pm
content: So there we are, that solution is even worse. What is the supply voltage of the LTC1150? Maybe +/- 15 V? The LTC1150 does not have any spec on constant gain output voltage range, at least i didn't see one. Just look at what the LTC1150 input stage does at +/-10V (top left p. 5).An opamp that has 115 dB DC gain under certain conditions and 180 dB under other conditions can cause a little more than 1 ppm inaccuracy.Regards, Dieter

author: e61_phil
author_rank: Frequent Contributor
timestamp: August 07, 2021, 09:36:42 pm
content: Quote from: branadic on August 07, 2021, 08:51:19 amJust for fun I thought about how good or bad a piecewise linear function (look up table) would perform if one allows only for 11 points (same amount as the coefficients in Andrés new formula).During thinking about good ideas using the first and second derivative of the error function (there are way too many possible combinations to brute force the best 11 points for the error function) I found the Ramer-Douglas-Peucker algorithm which seems to work quite nicely to reduce the amount of points needed.

author: rigrunner
author_rank: Frequent Contributor
timestamp: August 08, 2021, 01:51:11 am
content: Quote from: dietert1 on August 07, 2021, 09:13:38 pmYes, Dual 15V rails.The linearity verification check in the 8081 calibration manual is very forgiving.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 08, 2021, 06:23:16 am
content: The mark space ADC (like in the old Solartron DMMs) has a potential for a INL problem at some point, when the reference switching gets close to the switching of the forcing signal. Ideally this should happen outside the normal range (e.g. beyound 10 V), but there are tolerances than can shift that critical point.There are also chances to get such an step like error from the input stage, for different possible reasons. One can be output stage cross over (I have seen this in my design with an OPA145). The ADV6581 has some trouble with the input switching that can cause transisent currents especially near the extremes.Using piecewise linear approximation with variable positions adds additional parameters. So 11 points is more like 20 parameters (the end point voltages are fixed).

author: branadic
author_rank: Super Contributor
timestamp: August 08, 2021, 08:28:40 am
content: QuoteThat is different to what I found Philipp, see attachment (red curve).The Ramer-Douglas-Peucker algorithm looks interesting, will have a closer look into it.-branadic-

author: dietert1
author_rank: Super Contributor
timestamp: August 08, 2021, 08:44:10 am
content: In the calibration table they probably omitted the +/- 10 V input as those are the calibration points and need not be checked again. A nonlinearity diagram should not include a gain error (overall slope).I guess the LTC1150 input stage has two FETs similar to the Advantest R6581T, as its common mode input range includes the negative rail and its input currents are in the pA range. Maybe it can work better with -14 and +18 V supplies. Don't know if that would be a simple mod. It would likely shift the 9,5 V "step" to 12.5 V.Regards, Dieter

author: e61_phil
author_rank: Frequent Contributor
timestamp: August 08, 2021, 01:10:36 pm
content: Quote from: branadic on August 08, 2021, 08:28:40 amHow do you calculate the error curve? I used the csv from the link out of your first post. No matter if I use the "source" or "dutb" (3458A) my curve doesn't look like yours.Best regardsPhilipp

author: rigrunner
author_rank: Frequent Contributor
timestamp: August 08, 2021, 06:44:07 pm
content: Quote from: dietert1 on August 08, 2021, 08:44:10 amBoth of the LT1150 ICs are socketed. Mounting them on a daughter board and creating alternative supplies is do-able. There is enough space above the sockets to put in a complete alternative arrangement. I can experiment when I've finished my replacement ADC board.@branadic Is the 8104 your own? Lids removable?

author: branadic
author_rank: Super Contributor
timestamp: August 08, 2021, 07:27:03 pm
content: QuoteSent you my spreadsheet for verification.QuoteFortunately no-branadic-