Symmetric-ish pulse stretching - Page 1
Forum section: electronics / beginners

author: HwAoRrDk
author_rank: Super Contributor
timestamp: May 20, 2024, 04:58:55 pm
content: I've been trying to figure out a way to do this, but everything I've been able to come up with hasn't been 100% suitable.What I'm trying to do is stretch an active-low pulse to several milliseconds in length (let's say 5ms) such that whatever the length of the input low pulse, the output is always at least 5ms low,andat least 5ms high afterwards. Basically, so that the stretched pulse has symmetrically minimum low and high 'on' and 'off' periods. See attached timing diagram. If the input pulse is longer than the minimum length, then it obviously doesn't need to be stretched, but the minimum 'off' period still needs to be maintained. If multiple short input pulses occur, they should extend (i.e. re-trigger) the stretch period. If an input pulse occurs during the 'off' period, it can probably be ignored (although I'm a little uncertain on that requirement still).I suppose the behaviour I want can be boiled down to the following:- Input falling edge: start output active-low 'on' period.- Subsequent falling edges during 'on' period: re-start output 'on' period.- Output rising edge: start output 'off' period.- Ignore all input falling edges during 'off' period.- Sustained input low level overrides output level.My first thought was to use a D-type flip-flop (e.g. 74xx1G80) fed with a clock signal of approx. 200 Hz (from a simple schmitt-trigger inverter oscillator, e.g. 74xx1G14) and inverted input, but that has the problem that it can miss short input pulses if they're not occurring at the right time (i.e. during rising edge of clock).Then I thought about using a pair of re-triggerable monostable multivibrators (e.g. 74xx123) where the input triggers the first one, the first one's /Q output triggers the second one, and the first's Q and second's /Q outputs are commoned together with diodes to activate an N-ch MOSFET that drives the (open-drain) output. But that has the problem that it doesn't ignore input pulses during the 'off' period given by the second monostable - a pulse then will cause an output 'on' pulse equal in length to the input pulse's offset into the 'off' period.Any suggestions for solutions?

author: Benta
author_rank: Super Contributor
timestamp: May 20, 2024, 08:51:01 pm
content: Use the CD4538/MC14538 or 74HC4538 type instead.Set the first MMV to be retriggerable and the second to non-retriggerable. You'll likely need a bit of gating of the outputs.That would give you:1: negative edge in: start the "on"(L) 5 ms period. Additional negative edges will extend the "on" time accordingly after the last edge.2: when "on" times out, the second MMV will run for 5 ms.Is that what you're looking for?

author: HwAoRrDk
author_rank: Super Contributor
timestamp: May 20, 2024, 09:59:46 pm
content: Quote from: Benta on May 20, 2024, 08:51:01 pmHow do you set a '4538 to non-retriggerable? I'm looking at a datasheet and I don't see any option for that.

author: Benta
author_rank: Super Contributor
timestamp: May 20, 2024, 10:03:48 pm
content: Quote from: HwAoRrDk on May 20, 2024, 09:59:46 pmUse this data sheet:https://www.onsemi.com/pdf/datasheet/mc74hc4538a-d.pdf(page 12)

author: shapirus
author_rank: Super Contributor
timestamp: May 20, 2024, 10:47:03 pm
content: Quote from: Benta on May 20, 2024, 10:03:48 pmBut can't the 123 be made non-retriggerable the same way?I'm reading, re-reading and comparing the datasheets of 4538 and 123 and can't see any difference between them. But it has to exist! What am I missing?

author: Benta
author_rank: Super Contributor
timestamp: May 20, 2024, 11:19:28 pm
content: Quote from: shapirus on May 20, 2024, 10:47:03 pmGood question.But I'm certain that there is a very good explanation as to why the 74HC221 was invented.Without analyzing it in depth, I suspect that setup/hold/delay times play a role (timing race), and that using the HC123 in the same way as the 4538 might cause false retriggering.In short: I don't know for certain.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: May 20, 2024, 11:59:04 pm
content: Quote from: Benta on May 20, 2024, 10:03:48 pmAh, I see. I was looking at a Nexperia datasheet, which doesn't include any info like that at all.In any case, I doubt having the second monostable be non-retriggerable will help, for reasons to do with below.After several hours of playing around with things in thesimulator, I think I have finally got something that works in exactly the way I need:The input goes into the inverting input (/A) of the first monostable for falling edge triggering of the 'on' low period, via /Q output. However, the 'on' output is gated with an AND gate together with the original input, so that the input can override the output pulse duration in the case of a long input pulse. This 'on' low drives directly to the output. The output from the AND gate also goes to the second monostable's non-inverting input (B) for rising edge triggering to produce the 'off' high period. This 'off' high also drives directly to the output, where the two are combined with a NOR gate to produce an inverted drive because I need to make the overall output open-drain with an N-ch MOSFET. Finally, the output 'off' from the second monostable also goes back to the beginning where it gates the input so that any input pulses are ignored during the 'off' period.Does anyone have any suggestions on if this could be simplified any further?(P.S. In case anyone is wondering why the choice of 74LVC1G57 multipurpose gates, it's because this would use OR, AND, and NOR and I can do all three with that chip, which I already have some of.)

author: Terry Bites
author_rank: Super Contributor
timestamp: May 23, 2024, 09:50:28 am
content: T_stretch start and stop synchronous with input edges and keeps original duty cycle?Try this. You can extend the high (or low, invert the input) period as a multiple of the count.Any counter, binary, decimal of any length could be used to obtain the multiplicand.