LM324 electronic load shorted MOSFETs (repair and possible improvements ?) - Page 1
Forum section: electronics / beginners

author: Dannyx
author_rank: Regular Contributor
timestamp: July 24, 2024, 05:11:56 pm
content: Good day folks. A long while ago, I purchased an adjustable load in kit form from Aliexpress. I'm sure everybody has seen this before: it's based on an LM324 and I'm sure the design is ubiquitous, as this exact device is sold in other places, even locally and/or pre-assembled. I pulled the schematic from a random site, since even the part numbers match.The device sat unused for years on end until a couple of days ago when I dusted it off to try and bench test a power supply out of a PoE switch. It's a pretty beefy thing, at 53.3v and a (claimed) 7.5A on the label. I wasn't sure whether the load can take that, so I first checked with the datasheet of the 4 MOSFETs. I can't remember if it came with these exact ones in the kit, or I changed them myself. It currently has 4STP110N8F6on it. The datasheet seems to say they SHOULD take 80v at at least 100a (give or take), so with a bit of trepidation, I connected the supply to the load and powered it up. Nothing went pop, the supply seemed happy to deliver, so it was time to turn that potentiometer and draw some current. At first, it worked as expected: the current started going up, everything seemed to be holding up, so I began pushing it some more until around 4.5A when the supply suddenly shut down. No pop or anything, it just went into OCP.I pulled the rig apart to check what failed and after letting the supply rest for a couple of minutes and power-cycling it, it turned on OK, so that's good news.The bad news is that now my load is dead:: one or more FETs are short-circuited. I didn't take them off to know which one(s) went yet, but this got me thinking about the WHYs of this failure !See, what I think I failed to take into account at the moment of testing was the SOA graph AND the power dissipation of these FETs. Please bear with me as I may be wrong here, which is why I'm seeking advice: at 53v and 4a I was drawing a little over 200 watts - at the upper limit of a single package.......but there are 4 FETs on there in parallel....Does this mean I can draw 800w with this thing ? Let me answer my own question: obviously not ! I just tried it and it failed ! I think even the product pages lists this as a 200w device, which puzzled me for a while, since I was convinced that paralleling MOSFETs is like paralleling resistors and equals more power. Ok, I AM aware that's a stretch, since there are tons of other factors involved, so I kind-of understand why that's not the case. Expecting the power to just add up exponentially like I envisioned it is far from the truth, in practice, so that's probably why the FET(s) gave up on me. The SOA graph for these particular devices doesn't show a DC plot unfortunately, but I assumed I was still in the safe area, so I think what delivered the final blow is still the power aspect !Point #2: I'll now want to fix this thing, so I'll pull off the FETs and replace them, but I was thinking of going bigger.....how big ? Not sure. At first, I took a rather childish approach and foolishly assumed that plonking the biggest, fattest FETs I can find is the answer to all my problems, but that's obviously not true and opens up a whole world of discussions. I then came to my senses and a bit and began analyzing. Check outthese onesfor example: YOU'D THINK that with a power dissipation of 1.6kW SURELY they're indestructible, but looking at the SOA graph (which thankfully DOES include a DC line this time) my test setup could've STILL killed them, because at 53v, the safe area caps off at a modest 3A, despite still being within the power dissipation figure. Correct me if I'm wrong...The whopping 4400pF capacitance may also be a problem....I'm aware of that parameter too, despite not fully knowing how to use that data in design...Sure, I want to beef this thing up pretty good, even though it may not be feasible/possible, but I want to work out what the limits are, at least on paper.This postwas also of great help to learn some more tricks and improvements other people who are far more skilled than me have done to this type of load to improve it. I don't have a scope, so I had no idea it might sub-optimal from the factory...which it probably IS in many ways, some of which can be alleviated and others cannot. Cheers.

author: Dannyx
author_rank: Regular Contributor
timestamp: July 24, 2024, 06:46:51 pm
content: Are the 4 Rsource resistors in your design meant to balance the 4 FETs ?Rsense is the equivalent of R1-R4 ? I assume its value would also need to be changed, as R1-R4 are currently 0.22ohm. Divided by 4, that makes it 0.055ohms.I see you also did away with the TL431 and replaced it with 3 pots instead.

author: MarkF
author_rank: Super Contributor
timestamp: July 24, 2024, 06:55:22 pm
content: Quote from: BillyO on July 24, 2024, 06:25:17 pmThat is the EXACT reason why there is an op-amp for each MOSFET!!! Otherwise the unique temperature coefficient for each MOSFET will end up with unbalanced loading of each MOSFET.Attached is the schematic for the Hewlett Packard 6060 load was done. They actually have two op-amp because the sense resistors where such low values.

author: BillyO
author_rank: Super Contributor
timestamp: July 24, 2024, 07:20:26 pm
content: Sorry, I'm bowing out of this. No desire to get into a pissing contest with some one that believes a hobbyist DC load build on a budget should match the design of high end HP stuff. Talk about apples and oranges.

author: Dannyx
author_rank: Regular Contributor
timestamp: July 24, 2024, 07:36:41 pm
content: Well....that escalated quicklyWhat can I say besides "Let's all get along" and talk about this stuff - hence why I posted in "beginners"

author: Phil1977
author_rank: Frequent Contributor
timestamp: July 24, 2024, 08:22:49 pm
content: What´s up people? Is everybody today crazy if he has not the one and only solution for everything from an electronic load to world peace?Having an independent current control loop per mosfet is not a bad idea, you can absolutely stabely connect independent current sinks in parallel.For the first step I´d just replace all 4 FETs with replacements from a reputable source. Aliexpress is a great marketplace and many things really have good quality, but there´s a lot of junk out there too. And unfortunately many of the power-FETs are fake or used. I would not be very surprised if the FETs in this electronic load have also been second hand, and if you see how these used components are often shipped and obviously handled without any ESD precautions then failure is only a matter of time. ESD damaged partst do not necessarily fail directly after the ESD event, they often are only pre-damaged and later fail under certain load.So, get FET-replacements, desolder the FETs, do a basic check on the LM324 and solder in the new FETs. I don't think it´s worth to use overdimensioned transistors, as long as your heatsink is okay you can easily use them with the specified dissipation.

author: srb1954
author_rank: Super Contributor
timestamp: July 24, 2024, 09:22:28 pm
content: Quote from: Dannyx on July 24, 2024, 05:11:56 pmAND the enormous heatsinking requirements for this level of power dissipation!QuoteThe 200W rating per FET is pretty much a mythical figure under DC conditions. Usually, such figures are specified on the assumption that the device is attached to aninfiniteheatsink or has some form of active cooling to maintain the device case at 25℃.QuoteYou need to draw your own DC dissipation rating line on the SOA graph taking into account the heatsink, device case-to-heatsink and device junction-to-case thermal resistances along with the expected ambient temperature and how high you are prepared to let the junction temperature rise to.Bear in mind that, where you have multiple devices on a single heatsink, the effective thermal resistance seen by each device is at least n x the manufacturer's heatsink thermal resistance rating. There may be an additional spreading thermal resistance that needs to be added for the FETs that are not on the specified measurement point, usually the centre, of the heatsink.

author: Whales
author_rank: Super Contributor
timestamp: July 24, 2024, 10:15:09 pm
content: There is always also the chance that the FETs are fake.Also I've had FETs latchup within their SOA, I think because of too high dV/dt

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 25, 2024, 03:03:13 am
content: Huh, well, okay then...Hi everybody!Let's talk loads, then.Electronic, not the fecal kind!?...I won't exactly run through the complete design process here, but highlight some important points.Beware one simple confusion: MOSFETs in  saturation (Rds(on) dominant), are trivial. Rds(on) has positive tempco, as long as all transistors are firmly on at the same time, or completely off, no issue. There's still dynamic current sharing issues, and switching needs to be synchronized, but that's mostly a short-term problem, and not a big deal to solve.MOSFETs in linear operation (Vds > Rds(on) * Id) ARE NOT trivial, and have a negative tempco. One heats up, draws more current, heats up some more, exceeds ratings... BANG!!Some have already mentioned this, and it can be looked up in detail in appnotes and other threads. Linear operation takes a bit more finesse than switching does.In general, transistors have negative tempco, in that input threshold falls as temperature rises. A strategy is required to use parallel devices in linear operation without runaway failure.The simplest and most common is probably the source/emitter degeneration resistor. This reduces gm of the transistor overall (making Id vs. Vin more linear) and increases Vin with a neutral or positive tempco, so that stable operation results. It might still be NTC overall, but at a slope of 10%, 5%, whatever, a lot less than it would naked.The downside is, you need to drop a lot of voltage for that to be the case. So it's not a popular strategy for low-voltage or wide-range loads.I do use this technique in a high voltage load I built, which handles a 100-500V 4A operating area with just three 200W linear transistors in parallel. (That doesn't add up, of course: the remainder is handled by an array of switched resistors. A clever application of an old converter IC handles the switching.)If low voltage drop is required, then we'll have to grapple with the tempco directly, and other device variation (in general, temperature, Vgs(th) at given temp, and gm, all differ between random devices).The easiest way to do this, is to wrap it in an op-amp, turning it into an ideal current sink -- independent of device parameters. These CCS blocks can then be wired in parallel as required. Hence the one-amp-per-transistor architecture.That covers device operating characteristics, then. What about limits?Quote from: Dannyx on July 24, 2024, 05:11:56 pmNOT AT THE SAME TIME!There is a third rating you missed: Ptot = 200W. Together, all three describe a truncated hyperbolic operating area (or a truncated square on a log-log plot), where operating conditions must respectall three simultaneously!So yeah, you done fuckered it good.Well, maybe. 53V 7.5A is 400W total, and you have more than two transistors in there. But 200W isquite a lotfor a poor little TO-220......And yeah, transistors generally fail shorted. There may be no outward signs of failure (magic smoke, bubbling or cracked package, melted leads..), just a silent death. If sufficient, ah, propulsive energy, is available though, the short circuit can draw enough current to fuse the thing open (usually with attendant shrapnel...BANG!).Note that they tend to go three-way short, so you can get drain voltage (or some fraction thereof) on the gate terminal in the process. The op-amps may well be fried, or questionable now.In this case, the 1k series resistor between S and -IN, and OUT and G, are probably enough protection from the 50V supply; still, wouldn't hurt to check component specs. If it were, say, a 200V supply and load, or more, I'd think further damage very likely.QuoteWarning signs: no DC SOA is no guarantee of failure at DC -- but you just don't know. At the 1ms curve, the die is just coming to temperature, but heat hasn't spread out in such a way as to cause much instability yet, so it's really nothing to go on.Design approach: reject it. Put away the datasheet and look into the next, etc. etc. until one with adequate ratings is found.Since we don't get an example here, I'll mention it outright: most devices (BJT and MOS alike) exhibit 2nd breakdown, where a local region of the die heats up, and guess what, Vgs(th) drops there, so it starts getting hotter, and... See where this is going?Again, all transistors are inherently unstable, it's just a question of when, of how much. You can have an unstable device, but run it at low power so that the conductivity across the die and mounting tab is dominant (silicon is a good thermal conductor, and copper is great), while the amount of power dissipated in that area is small and so too the hot-spotting, and tendancy towards hot-spotting worse. This is expressed on the SOA curve as a steeper slope; usually it's a 1:1 slope (I = P/V, a hyperbola, but on the log-log plot it's a downward-sloping straight line), but near the instability region, it can become 50, 100% steeper, or more, and the maximum power dissipation drops considerably.Some types are more stable than others -- usually older types, with lower power density, higher capacitance for given ratings, are okay with DC up to full ratings -- but also some newer types, despite remarkable power density (SuperJunction types dominate the >300V range), the downside being, they do use smaller dies so the total power dissipation is smaller for the same switching ratings (Vmax * Imax), which may cost more per watt.(Old types can be identified by, heh, well, presence in old databooks for one -- ye olde International Rectifier and other databooks are still good resources, including classic appnotes and such, that often go overlooked or forgotten on the internet today. Otherwise, classic families like HEXFET(R) (IR, now Infineon), or "DMOS" or "planar" something or other, and the various IRF(P)xxx(x) types and second-sourced equivalents, are typically okay. Curiously, current IRFxxx datasheets never give DC SOA, but the old databooks once did. From a design-assurance standpoint, best to avoid them -- but you can test a given sample and qualify them for use, if such testing is acceptable.)SOA is the prerequisite. Thermal resistance is the final test. You must respect Tj(max), or -- various things perhaps, but device failure is greatly accelerated at high temperature, and some phase-change stuff happens like the plastic packaging swelling/weakening that can cause failure much more rapidly.You need enough heatsinking, and good thermal contact, to dissipate the required power.For a load like this, usually the drains will be tied together so a simple greased joint, bolted directly to the heatsink (assuming you don't mind the heatsink is live -- mounting on insulators is required!), will do. This maximizes conductivity between device and sink, and mostly puts the limit on the sink itself. You'll have to monitor sink temperature, and use RthJC and operating power to estimate Tj. Thermal analysis is done just like DC circuit analysis: power is current, temperature is voltage, and resistance is resistance. If we put 100W into a 0.75 K/W device (like the STP-), it should rise 75K. If Tjmax is 175C, Tc must be under 100C, and Ths less still. A limit of 80C on the heatsink might be adequate, assuming no SOA problems, and a total rating of 400W between 4 devices sharing evenly.Against an ambient of say 30C, that's Δ50°C / 400W = 0.125 K/W total required of the heatsink. That's a pretty beefy heatsink, and even then, almost certainly needs a fan.Heatsink can be hotter if lower RthJC is available -- use bigger devices (TO-3P or TO-247?), or use more in parallel (e.g. derate the circuit to 200W and double it up).QuoteYup, IXYS (now Littelfuse) makes some pretty big devices. But you don't want HyperFET or PolarHV or whatever, those are all optimized for switching. The Linear and L2 families are however suitable for this application. This for example,https://www.littelfuse.com/media?resourcetype=datasheets&itemid=77d02c51-2981-4873-a49f-9aa92a37d26a&filename=littelfuse-discrete-mosfets-n-channel-linear-ixt-200n10-datasheetcan consume your entire power supply, given enough heatsinking -- and it will have to be quite good to suck quite that much power out of the still relatively little footprint of that TO-264 (or PLUS247, you mount it with a spring clip, pretty convenient actually). Again, rating goes down reeeeal quick when everything else starts to heat up.But since IRFP240 and etc. are still abundant, I don't know that I would bother.Capacitance, hardly matters for a DC load, but you do need enough compensation (the RC across the opamp) to tame it, and you may want some maximum response time so you can do effective load step testing on power supplies, for example.Tim

author: BillyO
author_rank: Super Contributor
timestamp: July 25, 2024, 03:36:38 am
content: Quote from: T3sl4co1l on July 25, 2024, 03:03:13 amSo, although not well introduced on my part, a lot of what was said here is what I was getting at.Basically, you take a different approach if you have $10 to spend on a load than you do if you have $5000 to spend on a load. In one approach you try to mitigate possible issues by diminishing their effect, in the other you eliminate them with sophistication and precision.Sorry for my sudden exit, but I have been through this too many times lately. Way too many times.Again sorry. I should have explained my approach better.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 25, 2024, 03:53:53 am
content: Yeah... I didn't see the deleted post, but I'm assuming it was something like, just use source resistors. Or you made a basic blunder ("don't do Y, just do X, stupid!" but X and Y got reversed, or their preference negated) and didn't catch it before someone else did (D'oh!).Tim

author: BillyO
author_rank: Super Contributor
timestamp: July 25, 2024, 04:12:14 am
content: Quote from: T3sl4co1l on July 25, 2024, 03:53:53 amSure. Whatever you say.

author: Phil1977
author_rank: Frequent Contributor
timestamp: July 25, 2024, 05:18:22 am
content: The thing is:The separate current regulation of each MOSFET solves the problem that were exceedingly discussed here. Just regulate each FET to a current that´s safe in its SOA and in its dissipative power and your fine!And that´s no feudal magic of old HP devices or whatever. Please stay away with this BS that only expensive devices in backbone breaking housings are the real art.

author: Dannyx
author_rank: Regular Contributor
timestamp: July 25, 2024, 01:49:56 pm
content: Thanks for the replies everyone.Couple of extra info:Although I can't remember the exact origins of the FETs, they are stamped with the ST logo...sure, that's not to say they can't be counterfeit IF they came in the original Ali kit - that's the bit I don't remember for sure. Regardless of what I choose to go with in the end, I WILL get them from a supplier we often work with.I wasn't planning on pushing that 53v supply to its maximum 7A (theoretical) limit. In fact, just about the moment that the load went pop, I was already backing down on the current and wasn't planning on pushing it any further.I identified the FET that popped: only one of them went and it's ironically the one in the picture, the one on the far-left. It's not a direct short to the G terminal as well, but certainly pretty low, with a voltage drop of around 0.2v in diode mode. I don't suspect it took out the corresponding op-amp channel with it, but you never know. I could just toss in a replacement real quick and go again...Heatsink: at the time of building this, when I was just a kid, I scavenged something that fit the whole shape of the project nicely. In fact, here's a full view of it (the dead FET is on the far left). I drilled holes, added thermal compound to the FETs and bolted them on, along with a fan and called it a day. I can probably source something much bigger now, but the limiting factor is probably still going to be the contact patch between the die and the heatsink, so the package will get exceedingly hot before the metal has a chance to draw that heat away. This got me thinking: water-cooling loop perhapsSpeaking of which: how about something likeTHIS? Anybody had any luck with them design-wise ? Does that package look s3xy or what ?

author: Wolfgang
author_rank: Super Contributor
timestamp: July 26, 2024, 12:36:34 pm
content: Main Problems:- Heatsink way too small- Switching MOSFETs instead of linear ones (IXYS). They die like the flies if used outside their FBSOA.

author: Dannyx
author_rank: Regular Contributor
timestamp: July 26, 2024, 12:53:13 pm
content: Is IXYS one of the main players when it comes to "Linear" FETs ? I'm only asking because it greatly simplifies sifting through product lists

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 27, 2024, 12:17:39 am
content: The only one, I think.It's kind of funny, because you're just paying for boutique planar FETs -- not to say they haven't improved them in various ways since the old days, but as far as I know, that's still the same technology; it's been so thoroughly surpassed as to be obsoleted otherwise, but retains its niche in power dissipation. So they re-badged as "linear" and put a humongous sticker price on them.Like I said, you're as well off using older types -- just test and make sure the SOA is really there. IRF(P)xxx are all, AFAIK, planar hex/stripe types, even from 2nd sources. Later generation IRFxxxx however can have the power density to strongly limit SOA (have seen breakpoints as low as 7V) so keep an eye out.Tim

author: BillyO
author_rank: Super Contributor
timestamp: July 27, 2024, 12:23:10 am
content: Quote from: T3sl4co1l on July 27, 2024, 12:17:39 amHow about :https://www.infineon.com/cms/en/product/power/mosfet/n-channel/optimos-and-strongirfet-latest-family-selection-guide/optimos-linear-fet-100v-150v-200v-/

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 27, 2024, 01:37:48 am
content: Huh, hadn't noticed those!Weird, all SMTs, and still not very good, like, considerhttps://www.infineon.com/dgdl/Infineon-IPB110N20N3LF-DS-v02_01-EN.pdf?fileId=5546d46259d9a4bf015a5b256a953c6da 200V device but it 2nd-breakdowns above 40V. Better than traditional trench perhaps, but not *massive*.Mind, SMTs are fine for the eFuses they're suggesting them for. But good luck getting steady power out of them.Tim

author: Dannyx
author_rank: Regular Contributor
timestamp: July 27, 2024, 08:51:01 am
content: Availability of said parts is also of importance, so after digging (or D!CKing, however you want to put it) around TME's website where we get all our stuffz from (those in the EU might be more familiar with it), I narrowed it down to 3 candidates. Everything else is either not in stock, too expensive (that's not to say these are chep) or not easy to mount. There may be others out there too, but sifting through so many individual parts would be ludicrous ! These ones were easy to track down thanks to them specifically mentioning "LINEAR" somewhere in their page, so the search engine fetched all of them in one go.This one: the biggest and most expensive one. Comes in that beefy package which should make mounting easier.This one: cheaper, highest voltage rating, but this also impacts the SOA graph significantly - no way you're drawing 500v AND 15A with this thing - it's either one or the other - and since, to my mind, a load is more likely to need a highercurrentrating than avoltagerating, it's not ideal...not testing EV batteries with this thing after all....Andthis one: cheaper still, higher current rating of 80a, but a more modest voltage rating of 75v.

author: MarkF
author_rank: Super Contributor
timestamp: July 27, 2024, 10:46:14 pm
content: Voltage and current... Voltage and current... Forget them.Although they are both important and you must stay within their limits, the driving factor is power. No transistor can provide both the max voltage and max current at the same time. It's a trade-off. You need to be thinking power level.For a load, you need to be concerned withheat, power dissipation, SOA and RDS(on).Heat is going to be your limiting factor.I see the RDS(on)as a bit of a guide toward the others. The lower the resistance, the less voltage drop across the MOSFET and lower power dissipated.The driving factor in any load is its capability to get rid of the heat. In addition, that would include package size, the heatsink and active cooling. Normally, I would point you toward a TO-247 package. Since a TO-247 is almost twice the size of the TO-220 you are using, there would be no way to mount them onto your PCB.A more realistic upper limit of your load might be 50W per MOSFET. That's right - watts.The HP-6060, I mentioned earlier to illustrate the need of an opamp per MOSFET, is a 300W load. They are using eight MOSFETs for 300W. You can do the math.And forget about transistors in exotic packages. I would not have mentioned it once, let alone twice.

author: LinuxHata
author_rank: Frequent Contributor
timestamp: July 28, 2024, 07:17:56 am
content: I also bought such load PCB, but assembled it by myself.Installed 2nd hand IXTQ82N25Ps, which I bought for cheap from China, and everything works fine - I've gave it long time test at 12V 40 amps and 48V 10 amps (with massive heatsink and aggressive fans) and it works just fine, using it for 5 years already.I also modded another copy, but there I installed high voltage IGBTs from old UPS. (IRGBC something, rated at 55A up to 600V), that was tested for 310VDC @ 2A - worked fine.Just a quick note, when connecting this to the load, you should set the current adjustment pot to zero and then slowly increase the current, otherwise, you will have not so pleasant results.

author: Dannyx
author_rank: Regular Contributor
timestamp: July 28, 2024, 09:47:30 am
content: Quote from: MarkF on July 27, 2024, 10:46:14 pmActually, this particular PCB does have a second set of holes for what looks to be TO-247. They're in front of the 220 ones currently in use, so they're under the heatsink.Quote from: MarkF on July 27, 2024, 10:46:14 pmThose make it easier to mount to a heatsink, since they're off-board parts and I don't have to worry about the board getting in the way somehow.I forgot to mention I watched this video a while ago and really liked what the chap did there. I don't have as big a heatsink on hand sadly....I only have something half that size.

author: Wolfgang
author_rank: Super Contributor
timestamp: July 28, 2024, 10:04:23 am
content: ... more or less yes. They also have a paper on their website explaining the problem of linear MOSFET operation.

author: kevin.gibbs
author_rank: Regular Contributor
timestamp: April 14, 2025, 04:07:45 pm
content: That heatsink looks weak for 200W dissipation, so the transistors are most likely overheated. First, if you want to dissipate more power, replace the heatsink and even add active cooling (at least in the form of a fan).