Verilog or VDHL. - Page 1
Forum section: electronics / general

author: mrpackethead
author_rank: Super Contributor
timestamp: October 05, 2018, 08:46:50 pm
content: I'm about to dive into learning FPGA's. It seems its almost a religous level war, if you choose to use Verilog or VDHL..Any suggestions about a path to follow.

author: ataradov
author_rank: Super Contributor
timestamp: October 05, 2018, 08:51:01 pm
content: Try both, see which one you like most.I personally like Verilog. VHDL is far too verbose for me. On the other hand, VHDL has some nice features that were only added in SystemVerilog. But with SystemVerilog, you basically get all you will realistically need.Just anecdotally, I see more Verilog in the industry.

author: langwadt
author_rank: Super Contributor
timestamp: October 05, 2018, 09:02:10 pm
content: Quote from: ataradov on October 05, 2018, 08:51:01 pmafaict it is also a regional thing, Europe mostly VHDL, USA mostly verilog

author: jmelson
author_rank: Super Contributor
timestamp: October 05, 2018, 10:08:58 pm
content: Quote from: mrpackethead on October 05, 2018, 08:46:50 pmIt ** IS ** a religious war!If you think of FPGA design like coding a program in C (big mistake) Verilog looks real comfortable, but that leads you into a fallacy.Verilog does a lot of type conversions, etc. on the sly, and these can bite you.VHDL requires you to specify any type conversions where there could be unpleasant side effects, but will do certain ones where it is deemed safe.I really have not seen VHDL as being more verbose IN THE THINGS that I tend to do, so it doesn't bother me. I do admit if you are doing numerical algorithms (digital filtering, image manipulation, cipher work, etc.) then Verilog may be much better to express it, but if you are doing state machines, registers, address decoding, etc. then I find VHDL works fine, too.Jon

author: nctnico
author_rank: Super Contributor
timestamp: October 05, 2018, 10:26:05 pm
content: IMHO it is more important to use a HDL to describe what functionality you need instead of thinking in logic and feed that to the synthesizer. Thinking in logic and thus taking over the job from the synthesizer is like using inline assembly in C to create a program. Whatever HDL you use, it will be much harder to work this way. Just like using inline assembly building the logic yourself is only necessary where size and/or speed really matter.Unfortunately there are very few examples floating around that really use the power of an HDL. Most just approach problems in a dumb & very verbose way which ends with writing an endless amount of code with a lot of nearly similar lines being repeated over and over. For fun Google a priority encoder in Verilog or VHDL. 9 out of 10 write a single line for each input conditionLike any programming language a HDL will take time to learn on how to use it's full potential.

author: ataradov
author_rank: Super Contributor
timestamp: October 05, 2018, 10:28:25 pm
content: The reason for this is that HDL tools (at least for FPGA) suck at inferring stuff. And the worst of all, they suck differently for different vendors. So in many cases you have to write strange code that you would not otherwise.This is especially frustrating with memories and trying to get tools to infer BRAMs. Altera is horrible at it.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 05, 2018, 11:28:39 pm
content: Quote from: mrpackethead on October 05, 2018, 08:46:50 pmDoesn't really matter. Try both and see what you like.

author: martinayotte
author_rank: Regular Contributor
timestamp: October 06, 2018, 12:08:30 am
content: Quote from: mrpackethead on October 05, 2018, 08:46:50 pmAs other mentioned, I personally think that Verilog is more concise and more readable, but if you need sometime some opencore included in your project, sometime you can't force original author to publish it in Verilog. So, your project will then need to mixed both ...It is up to you to choose in which language the top level will be ...

author: rstofer
author_rank: Super Contributor
timestamp: October 06, 2018, 12:23:48 am
content: It's kind of like Pascal vs C. Yes, Pascal is relatively verbose but the upside is it won't let you shoot yourself in the foot. C doesn't provide much in the language to prevent mistakes and, instead, relies on the programmer to know what they are doing.I started with VHDL and I'm going to stay with VHDL. Every time I look at Verilog I just get confused. I'm sure the reverse could be true for others.The other side of the deal is that had I started with Verilog, I would probably find VHDL wordy. In the end, you probably need to learn both languages (or substitute SystemVerilog for Verilog) and you should probably alternate between projects. Or even in the same project - it should work!One of the big contributors on this forum is hamster_nz. Look at his wiki for examples of VHDL code.http://hamsterworks.co.nz/mediawiki/index.php/Main_Page

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 04:19:27 am
content: I have some project ideas in mind but am wanting to explore, that will probably require devices that are bigger and more complicated. I saw on crowdsupply.com some EasyFPGA modules, using the LatticeXO-2 IC's, which were very low cost. Thats interesting for another reason as they may be useful for some other projects, but also, its a very low cost investement.What would you recommend if you had a budget of $500 to buy some dev boards / tools etc for starting out.

author: james_s
author_rank: Super Contributor
timestamp: October 06, 2018, 04:38:21 am
content: Try both. I personally prefer VHDL and find Verilog to be a bit to abbreviated looking and hard to follow. In the end it doesn't really matter though, both languages have identical capabilities, you can infer exactly the same logic with either one.If I had $500 to spend, I'd buy a $15 Cyclone II FPGA dev board and USB programming cable and save the other $480 for more advanced stuff once I was proficient. It was a couple years before I was making anything too big to fit in the cheap boards and I still use them in a lot of projects because they're good enough to fit a complete 8 bit ocmputer in the FPGA and they're cheap.Do you know what you want to make?

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 05:06:05 am
content: I've got some LED driver projects, which are quite simple. ( but do not scale well with microprocessors )...But What i want to do, is some projects with SDI video and IP over ethernet.

author: james_s
author_rank: Super Contributor
timestamp: October 06, 2018, 05:08:45 am
content: Video will take a bit more, but you should be able to get a suitable FPGA dev board for <$100 that has HDMI or other LVDS ports on it, many have ethernet too. Either way something cheap will get you started and by the time you run out of resources you'll probably have a pretty good idea of what you need.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 05:40:20 am
content: the lattice XO2 on paper looks attractive, as i dont' need to attach anything next to it, to make it useful.. Thoughts? Lattice, altera? Xilinx?

author: ataradov
author_rank: Super Contributor
timestamp: October 06, 2018, 05:44:20 am
content: Altera MAX10 does not need anything either.

author: james_s
author_rank: Super Contributor
timestamp: October 06, 2018, 05:45:51 am
content: Try the software, that's the important part. Those are the big three FPGA vendors, Lattice is a distant third in terms of hobbyist use/support. They all offer parts with similar capabilities, and in all cases you are stuck with the software package provided by the vendor of the parts you choose to use.Nice thing about HDL is you can write rather platform agnostic code so porting between FPGA vendors/families is quite easy.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 05:49:56 am
content: Quote from: james_s on October 06, 2018, 05:45:51 amDon't intend to be doing this as a hobby. What makes their software third?Quotewhats similar to somethign like an XO2-1200 ( i was lookign at the 32 pin one, in a QFN package )..

author: hamster_nz
author_rank: Super Contributor
timestamp: October 06, 2018, 06:14:18 am
content: Quote from: mrpackethead on October 06, 2018, 05:06:05 amFor SDI at any decent speed you pretty much have to engineer/design own board - you need to use high speed transcievers, add line drivers, and set up the required reference clocks.IP (usually UDP) is relatively easy. TCP/IP requires a lot of resources and is a very complex protocol (e.g. MTU path discovery, slow start, fragmentation, retransmits...). TCP is best left to a (either hard or soft) CPU.

author: martinjaymckee
author_rank: Contributor
timestamp: October 06, 2018, 06:25:01 am
content: If this is just for your own projects, I would absolutely suggest (with everyone else!) that you try them both out. I did that when I was starting out and I am very glad that I did. They both have strengths.Cheers,Martin Jay McKee

author: iMo
author_rank: Super Contributor
timestamp: October 06, 2018, 06:35:05 am
content: My own stuff is written in verilog. As there is a lot of open source VHDL code you have to understand VHDL as well. Soon or later you have to mess with both.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 06:38:39 am
content: Quote from: hamster_nz on October 06, 2018, 06:14:18 amI'm wanting to insert and remove the audio channels that are on the SDI. Semtech make some all in one front ends for the SDI, which look like a good starting point. For most systems the audio will turn up as either AES digital or Line level Audio. What i want to do is take the audio and use it as a Dante ( AoIP ) source. ( or insert dante based audio ).IP (usually UDP) is relatively easy. TCP/IP requires a lot of resources and is a very complex protocol (e.g. MTU path discovery, slow start, fragmentation, retransmits...). TCP is best left to a (either hard or soft) CPU.

author: AG7CK
author_rank: Regular Contributor
timestamp: October 06, 2018, 06:52:46 am
content: This reminds me of the test equipment forum: An amazing amount of people find it necessary to ask which oscilloscope THEY should buy - even if there are hundreds of posts on all instruments already.Here are 100+ posts from 2016: Verilog or VHDL?https://www.eevblog.com/forum/microcontrollers/verilog-or-vhdl/(Easily found by the string "site:https://www.eevblog.com/forum/ verilog vhdl" or similar in a web search field.)

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 08:15:33 am
content: Quote from: AG7CK on October 06, 2018, 06:52:46 amThanks for such a useful post. Strangley enough i'd already read most of those. There have been quite a few folks quite happy to discuss the topic. Your welcome too. Whats your preference verilog or VDHL AG7CK

author: NorthGuy
author_rank: Super Contributor
timestamp: October 06, 2018, 02:36:01 pm
content: Quote from: mrpackethead on October 06, 2018, 05:40:20 amYou can start from software. They're all huge and slow. Install all the tools. Select the one you like the most (or hate the least). There are lots of things you can learn before even buying a board. You can do simulations. You can build example projects and see what size FPGA you may need - it's nearly impossible to figure out before you start.

author: dmills
author_rank: Super Contributor
timestamp: October 06, 2018, 02:58:01 pm
content: So you just want a de-embedder and AoIP output?Dante will cause you problems because Audinate keep some bits closed, but AES67 should be workable (Or ST2110-30, pretty much the same thing), and AES67 will interrop with Dante in at least some Brooklyn II versions.For 3G-SDI stuff something like an Artex-7 is a good fit, having the transceivers you will need, and Yea, Semtech or TI for the line equalisers.The elephant in the room with that project is clocking, because unless the SDI and PTP clocks are locked to the same reference you will need an ASRC core in there to avoid glitches. Also on the subject of clocking make sure you connect a suitable clock generator for the transceivers and SDI processing, 148.5MHz and 148.35MHz are the conventional choices for 274M video, SIlabs parts are the common answer.Regards, Dan.

author: rstofer
author_rank: Super Contributor
timestamp: October 06, 2018, 03:02:07 pm
content: Quote from: NorthGuy on October 06, 2018, 02:36:01 pmMake sure you have a PC of sufficient HP to run the software. I think Vivado set a new standard in slow when compared to the previous incantation, ISE, and it was none too fast.I have only used Altera once and have pretty much settled in with Digilent boards and Xilinx chips. It's just a choice...Over in Beginners there is a thread "Yet another question on scopes" where I get into boards with gadgets as being easier to work with.

author: CM800
author_rank: Frequent Contributor
timestamp: October 06, 2018, 03:06:41 pm
content: I'd look towards Verilog as it's supported readily by icestorm, which is a great platform for getting started. All open source!It's also much faster to compile too, great for learning.

author: james_s
author_rank: Super Contributor
timestamp: October 06, 2018, 05:34:45 pm
content: Quote from: mrpackethead on October 06, 2018, 05:49:56 am

author: james_s
author_rank: Super Contributor
timestamp: October 06, 2018, 05:35:49 pm
content: Quote from: CM800 on October 06, 2018, 03:06:41 pmI haven't noticed any difference in compile time between projects done in Verilog and those in VHDL. Do you have some data to support this? It may be true in some cases but I have not seen it.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 06, 2018, 05:52:31 pm
content: Quote from: mrpackethead on October 05, 2018, 08:46:50 pmDefinitely a bit of both.Digital Design and Computer Architecture: ARM Edition Paperback – 4 Jun 2015 by Sarah Harris was recommended to me here... I liked it (has examples in both).And MHRD game on Steam.

author: rstofer
author_rank: Super Contributor
timestamp: October 06, 2018, 06:45:33 pm
content: Quote from: james_s on October 06, 2018, 05:35:49 pmFirst, it's important to know exactly what Icestorm is doing. It might be important to know for which Lattice chips the software is valid. Then it might be important to know what features those chips bring to the dance. I don't have the answer to any of that...http://www.clifford.at/icestorm/It seems to me that Icestorm is limited to smallish chips with limited internal gadgets. Or so sayeth the article...I'm in the Xilinx camp and, as I am migrating toward the Artix A7, I am also migrating to Vivado from ISE. I will always have a version of ISE running because I have a lot of development boards that Vivado doesn't support. I don't plan to port my projects to newer chips because that just isn't fun. Rather, I will build new projects with new chips and new software.There's a huge difference between ISE and Vivado and their is always a reluctance to change. I have been whining about Vivado since the first install! The fact is, it's really nice. It's different but it's really nice. Ok, it's better...I put together a tower computer with an I7-7700K and 32GB of 4+GHz memory specifically to run Vivado. It all worked out fine. There's no point in having more than 8 cores because the free version of Vivado will only use 8. No point in one of those 20+ core Xeon systems. If there was, I would probably have one!Xilinx is becoming more liberal with their IP cores. Stuff that just wasn't available to the hobbyist using the older chips and ISE is suddenly free with the new chips and Vivado.Make sure your PC has a huge drive because you will ultimately have at least 3 toolchains. And multiple installs of the GCC toolchain to go with the factory uC cores. It's not clear to me that all incantations of GCC support all of the various uC cores.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 06, 2018, 07:55:34 pm
content: Quote from: dmills on October 06, 2018, 02:58:01 pmThanks for this reply. :-) Actually want to embedd and de-embed, AES67 would in fact be a better. Its a real shame that the Pro Audio world has taken so long to get a 'standard' togehter, and Dante has got such a foot hold.. ( differnet topic though ). For the particular application, i could actually get away without using Dante, as it still will have a PC / Windows based server and that could bridge ( if need be ) the audio out.

author: legacy
author_rank: Super Contributor
timestamp: October 06, 2018, 08:32:21 pm
content: Quote from: rstofer on October 06, 2018, 06:45:33 pmJust as a reference, I am using an intel core2 duo @1.2Ghz laptop with 2Gbyte of ram running WindowsXP. Both ModelSim and ISE v11.1 are fine, comfortable to use and only take 6Gbyte of space on the hard drive (which is a 40Gbyte @5400rpm). The second development machine is a remotely rack mounted Pentium4 @ 3Ghz with 4Gbyte of ram running Linux/32bit kernel 32bit userlandThe second HDL simulator (which I have recently ported to HPPA2) runs on a C3600 HP workstation (2005), running Linux 4.16/64bit kernel 32bit userlandJudging by the ratio between Vivado and the spec to run it decently, it sounds we have faster computers, and we need to find strange but compelling reasons to keep them as slow as our old computers,hence the equation of the universe is always balanced A:B = A':B'=const(kidding)

author: rstofer
author_rank: Super Contributor
timestamp: October 06, 2018, 10:35:36 pm
content: Quote from: legacy on October 06, 2018, 08:32:21 pmThere's no kidding about it, software will always expand to use all available resources and continue without bound. Once they invented virtual memory, the gloves were off!I had a pretty much useless tower with ISE and a complete build of a sizable project took about 15 minutes. I bought a fairly decent laptop and the time dropped to 5 minutes. My attention span just won't stretch to 15 minutes.This was 10 or so years ago. I eventually got a decent HP All-In-One and ISE seemed almost reasonable. Vivado took at least twice as long.I built up the new tower for Vivado but it is by no means necessary. I bought as much PC hardware as I could afford and called it good.My 1700 line LC3 project takes 2m35s to finally write the bitstream after an edit. Not blistering fast but as good as I can afford.I really don't have a quantitative way to compare the computers.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 06, 2018, 11:00:06 pm
content: Quote from: rstofer on October 06, 2018, 10:35:36 pmBigger projects will take longer.Eventually, you'll have to leave it overnight and get results in the morning. I remember that's how it was with punch cards some 40 years ago

author: rstofer
author_rank: Super Contributor
timestamp: October 07, 2018, 12:06:36 am
content: Quote from: NorthGuy on October 06, 2018, 11:00:06 pmI wonder if it is exponentially longer?QuoteFortunately, the company I worked for back in the very early '70s has an open shop for 2 IBM-1130s. You just signed up on the board and you essentially 'owned' the machine for the duration. The keypunch room was next door and if you had a 'real' project, there was always somebody available for punching cards. My work wasn't 'real' in the sense of building airplanes so I used one of the 2 or 3 spare keypunch machines to punch my own.We also had a card sorter and an EAM (Electronic Accounting Machine) that was used primarily for listing card decks. I suppose somebody could patch a program but I don't think it was encouraged.I was always an outsider, I had to behave! I was 25, just starting college and had unlimited computer access including the IBM Electronic Circuit Analysis Program. That was just the thing for doing Bode' plots and such. Both computers had plotters. Damn right I behaved! Polite to a fault! Yes sir, no sir, the whole thing!Overnight sucks! Especially when you leave out a semicolon or forget to terminate a comment. The PC has all but eliminated that bottleneck.

author: Mr. Scram
author_rank: Super Contributor
timestamp: October 07, 2018, 12:17:29 am
content: Quote from: NivagSwerdna on October 06, 2018, 05:52:31 pmInteresting game. I can't tell what HDL it uses, or is it a fictional HDL?

author: Wilksey
author_rank: Super Contributor
timestamp: October 07, 2018, 12:25:28 am
content: What I will say about this is that I started off using VHDL as it seemed more intuitive to me, but all of the bloody examples were in Verilog, so I ended up learning both and converting Verilog into VHDL, I ended up converting some early VHDL into Verilog also, I found that helped me to learn both.Although it's been a few years since I've touched either so I'd probably either not remember any of them or get them mixed!

author: asmi
author_rank: Super Contributor
timestamp: October 07, 2018, 12:40:00 am
content: I use SystemVerilog almost exclusively (except in Vivado diagram's top wrappers, which doesn't yet support SV, so I use Verilog for that), but reality is that you will need to learn both at least to the point where you will be able to read and understand the code written in either of those languages.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 01:50:55 am
content: Fortunatly i have a workstation that is quite capable, with lots of CPU/RAM/Drives.. So theres a good chance it will work.I was just doing some browsing in Digikeys catalogue ( good place to find info, not great place to buy but it useful for reletive pricing ).Lattice appears to have the lowest cost FPGAs. Starting at as little was $1.50 or so. Being almost 'compelte' ( with Flash ) and small pin count they become very fesible for replacment of some 'glue' logic and potentially able to do new trickery.From what i read, Lattice has the worst software.the leader appears to be Xilinx? their products start at about $8-10, and you need more glue around them, but they are useful for much bigger jobs. And their softawre seems to be the most developed?

author: NorthGuy
author_rank: Super Contributor
timestamp: October 07, 2018, 02:33:58 am
content: Quote from: rstofer on October 07, 2018, 12:06:36 amIt is not very consistent. A project may take half an hour, but then you change something and it becomes an hour.

author: filssavi
author_rank: Frequent Contributor
timestamp: October 07, 2018, 02:47:23 am
content: I have done SoC development on both altera (cyclone V soc) and Xilinx (Zynq) on the free version of the toolchanis and I can say that vivado is by far the best of the two software.First of all Xilinx doesn’t differentiate the versions on features but on device support (mostly) as opposed to altera free tool that is extremely crippled. For example when working with soc’s the text to bitstream time is usually quite long also for simple projects due to the amba interfaces, Xilinx has partial compilation on by default, so after the first time you recompile just what you actually touched, with altera you have to buy the pro version of the tool (3 to 5k) to do thatVivado is also a lot less buggy, with quartus (18.0) I managed to constantly hit a bug (once or twice a day) that corrupted the project beyond repair. The project would compile fine but then refuse to talk via JTAG to the fpga,on a known working board, so a new project had to be created from scratch and everything recompiled (wasting 20 minutes or more). This bug was also independently discovered and confirmed by a colleague of mine in quartus 16 and 17Now the altera support is not there (I filed a ticket but they told me that I had to buy the pro version)I tryed to go on the forum but they first told me it was a hardware problem, when I told them that it was the DE0 nano dev board and that the example bitstream worked it all went silent

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 03:16:36 am
content: I'm curious if somone could tell me what you get in a $25,000 FPGA? Thats one scary thought to place and solder.

author: filssavi
author_rank: Frequent Contributor
timestamp: October 07, 2018, 04:41:44 am
content: Well silicon wise a 500$ and a 25000$ FPGAs aren’t that different, you just get more of everything, more logic more ram (block ultra and now HBM) more and faster transceivers

author: mac.6
author_rank: Regular Contributor
timestamp: October 07, 2018, 06:49:22 am
content: Quote from: mrpackethead on October 07, 2018, 03:16:36 amWell on a 20k$ fpga board I have at work, there is 2 millions LUT to use (XC7V2000T). 1200 pins, that's quite a challenge for pcb design...

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 07:14:51 am
content: Quote from: mac.6 on October 07, 2018, 06:49:22 amWithout asking you to tell me exactly what you are working on, could you give me an idea of what kind of things you might use such a device for? Anything with compentry that cost, has to run to millions of dollars finsihed costs. yeah, 1200 pins. that is a challenge.

author: hamster_nz
author_rank: Super Contributor
timestamp: October 07, 2018, 08:13:44 am
content: Quote from: mrpackethead on October 07, 2018, 07:14:51 amUsually high-end, very low volume communications equipment.Stuff like this:https://www.metamako.com/products/metaconnect-96.htmlThe top of the line seems to have THREE(!) ￼Xilinx Virtex UltraScale+ VU9P FPGAs - Seehttps://www.metamako.com/developer/fpga-platform.html

author: Mr. Scram
author_rank: Super Contributor
timestamp: October 07, 2018, 08:25:59 am
content: Quote from: hamster_nz on October 07, 2018, 08:13:44 amImpressed ooh. Imagine the Youtube playback experience on one of those.

author: legacy
author_rank: Super Contributor
timestamp: October 07, 2018, 11:29:04 am
content: Quote from: filssavi on October 07, 2018, 02:47:23 amThat is the correct answer. Candies are not for free

author: legacy
author_rank: Super Contributor
timestamp: October 07, 2018, 11:49:31 am
content: Quote from: NorthGuy on October 07, 2018, 02:33:58 amthat's why I have split the project into two FPGAs, and probably I will split it again into three FPGAs. When you have something that works and it's stable, you'd better don't touch it, for a lot of reasons.usually large FPGAs are very problematic and frustrating since the time to complete the synthesis can be of the kind you want to spend more than 1 hour at the break area, while ... the computer is ... still doing its stuff ... and if someone asks what the hell do you have to do in the break area for more than 1 hour per day, you can tell that you are not pausing yourself, but rather practicing at social engineering

author: filssavi
author_rank: Frequent Contributor
timestamp: October 07, 2018, 12:01:16 pm
content: I might be the only one to pay through my fucking nose to get the silicon...Anyway the whole research group switched to Xilinx and we will teach only with Xilinx tools, I hope that not building tools that fucking work was worth it in the end

author: legacy
author_rank: Super Contributor
timestamp: October 07, 2018, 12:42:09 pm
content: Quote from: NorthGuy on October 06, 2018, 11:00:06 pmYup. e.g. in order to speculatively simulate how a couple of black holes can rotate each other until merging into a super black hole, we have to leave a cluster of supercomputers overnight and get results in the evening (if we are lucky).A century ago, Einstein did it with a pen on a couple of paper sheets. They really knew how to party back in those days and the general theory of relativity of Einstein predicted a lot of modern stuff, but they didn't give StarTrek at the cinema as we do nowadays, hence in order to not to make a bad impression with the physics, weneed to do it better, faster, harder and stronger(like in the song byDaft Punk-Technologic-), hence we have to build new engines and new fast computers for our radio-telescopes and large interferometers designed to detect gravitational waves, and now we are thinking about the black matter ... hence we have to invent and build new weird ways to come into the need of new super-supercomputers(1) to handle picosecond detectors (full of strange FPGA parts that cost more than my little car), even with the need to implant strange stuff somewhere around the North Pole and even a cube in the middle of the ocean with 1Km of side to detect God knows what ..."because science" ...(1) I got a phone call to give support with four supercomputers made by SGI-CRAY (now they are HPe) in the 2000s. Old computers got decommissioned, and they paid to have new modern computers, specifically made by IBM with their POWER9 architecture. These computers have PCIe accelerator made by FPGAs, and a lot of glass optical fiber channels and Infiniband high-speed links. I don't know what/where/why. I have only given a hand to decommission and install new computers having my dose of social engineering in the break area, I got told a lot of intriguing tales, like what they were willing to do around the North pole. I also got a proposal: would you like to go there? umm ... no, thanks

author: rstofer
author_rank: Super Contributor
timestamp: October 07, 2018, 02:35:41 pm
content: Quote from: legacy on October 07, 2018, 12:42:09 pmAbsolutely GO! It's science, what could go wrong?Seriously, were I younger, I would definitely sign up. No skills, mind you, but if I got an offer I would start packing.

author: legacy
author_rank: Super Contributor
timestamp: October 07, 2018, 04:11:00 pm
content: Quote from: rstofer on October 07, 2018, 02:35:41 pmwell it's a psychological problem, I have been already engaged in weird missions with military stuff, but in none of them I had to deal with a scientist, just military guys talking about weapons, bombs, terrorists, and ... well not exactly comfortable discussions for a civil but the level was at a level I was able to understand. Plus I have a lot of experience with Mision Tactical Computers, specifically what is used in helicopters.With scientists ... it's very embarrassing. I can't forget an episode. I was taking my coffee with a colleague near to a nice girl with a white lab coat who was complaining about the weather. At some point, my colleague, irritated to hear the girl complaining of the rain, asked me if I had ever completed the algorithm I was doing for a hobby, and when I answered that I was still blocked due to a mathematical problem that I was not able to sort out ... the girl in the lab coat next to us suddenly stopped moaning for not having a sunny day; she had heard my answer and she was so intrigued that she wanted more details ... that is good for social engineering purposes ... unfortunately, once I showed her a piece of paper I had in my pocket with notes about the problem, she disappeared with my notes, and ... fifteen minutes later she went back with the solutionThat was shocking. I had worked on that algorithm for months, and she solved it in fifteen minutes during a coffee break.The algorithm was about an accelerant make a modified BKM series to compute in a finite time without exploding into numerical errors. It was not exactly something that normal people can understand and solve in fifteen minutes, in fact, it took a week to me just to understand how to get started.Can't imagine how inadequate I can be on a scientific mission around the north pole, for sure if the asked me to go, is because they want me to do all the dirty job: like making holes in the ice, installing sensors, fighting with hibernated cables ... maybe be they also need a hand on programming some MPUs and DSPs, but for sure they are light years ahead about everything that I can discuss science

author: james_s
author_rank: Super Contributor
timestamp: October 07, 2018, 05:47:25 pm
content: Quote from: mrpackethead on October 07, 2018, 01:50:55 amWhat kind of glue? Most FPGAs are pretty much standalone parts, although any of them will typically be interfaced to external stuff in order to do something interesting. Most need a configuration ROM to store the bitstream but there are a few parts that have that built in. The FPGA has a little brother called a CPLD which is typically nonvolatile and has the same sort of logic fabric as an FPGA but without any of the built in peripherals like memory, PLLs and multipliers and such. These are typically quite a bit cheaper and are handy for implementing custom logic like address decoding.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 07, 2018, 05:56:24 pm
content: Quote from: james_s on October 07, 2018, 05:47:25 pmIn addition to config flash, you need several power rails, JTAG connector, many decoupling capacitors.

author: rstofer
author_rank: Super Contributor
timestamp: October 07, 2018, 05:58:21 pm
content: Quote from: legacy on October 07, 2018, 04:11:00 pmInadequate? That depends on context.In some situations, knowing how to clean an M4 is worth a lot more than solving differential equations in your head. Range and windage in your head might actually be valuable.When I worked in Singapore, I used to spend the weekends diving around the islands off the east coast of Malaysia. One of the divers was a world class marine biologist hired to design the Singapore Aquarium on Sentosa Island. Of course I was inadequate, in the underwater context! But she knew diddly squat about building a semiconductor plant across the street from her office. That was my playground!It was a giant leap of faith to leave Silicon Valley and venture to a foreign country with no support structure. My hobbies didn't translate, I had to find new ways to stay entertained. It was the greatest adventure of my life! I moved entertainment to totally new highs. It was terrific!Would I sign up for scut work at the North Pole? Absolutely!

author: james_s
author_rank: Super Contributor
timestamp: October 07, 2018, 06:04:19 pm
content: Quote from: NorthGuy on October 07, 2018, 05:56:24 pmEverything is going to take at least one power rail, often two if your IO and core voltages are different. Everything will require decoupling capacitors and a JTAG connector, I don't see any of that as differentiating factors between vendors.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 08:53:48 pm
content: Quote from: james_s on October 07, 2018, 05:47:25 pmI have an old project that has a bunch of 74 series logic attached to a uP, that steers data/clk around the place. theres decoding and FlipFlops ( theres a very odd clocking scheme were both the up and down transistions are used ). Its doing it round robin, and with a FPGA making it work in parrallel would be great. ( i could reduce the effective data rate on each 'wire' which is handy since they are being moved over 10's of meters of wire.. Lower data rate = more relaible, less EMI, etc etc. It looks like one of the small lattice X02 would work fine. I had considered a CPLD but the lack of a register means id still have to use the uP to do quite a bit of work. I'll still need to put some line drivers on the I/O ports.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 09:59:44 pm
content: Quote from: NorthGuy on October 07, 2018, 05:56:24 pmFor the XO-2 I was lookign at, it has the config flash onboard, a single rail supply and a small handfull of caps. It seems it will be big enough to do some "small" tasks.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 07, 2018, 10:33:56 pm
content: Thanks everyone for your help. Have done a stack of reading.. While there is no clear answer, I have decided to make a bit of a jump;(a) I'm going to pursue verilog to start off with; If VDHL makes more sense later, well, i'll just have to go down that track as well. I figure its better to make a decision now, than no decision and do nothign.(b) I'm going to look at using both lattices XO2 Chips, ( and one of their dev boards ), and also Xilinx. This will mean having to get my head around both Lattices Diamond system, and Xilinx ISE.Think i'll get these dev kits to mess with.https://www.artekit.eu/products/devboards/ak-machxo2-7000/http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/MachXO2PicoDevelopmentKitFrom Xilinx, I quite like the Mojo board as somethign to mess around with.And from XilinxA Mojo board

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 01:18:24 am
content: Xilinx Vivado doesn't support the Spartan 6 and ISE is on life support.The Arty board (Artix 7 35T version) isn't much more expensive and it uses he Vivado toolchain for which there will be ongoing support. And Vivado has that Internal Logic Analyzer IP which could be very handy for debugging real hardware (as opposed to simulation).https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/The Spartan 7 version is cheaper but the chip is smaller (25T):https://store.digilentinc.com/arty-s7-spartan-7-fpga-board-for-hobbyists-and-makers/And now they offer the Arty with the 100T chip (for a lot more money) but bigger is always better than smaller. Not recommending it, cost is always a factor, but I wish I had that board versus two of the smaller versions. There is a similar upgrade for the Spartan 7 board. The 25T chip is going to be pretty small.

author: Bassman59
author_rank: Super Contributor
timestamp: October 08, 2018, 01:42:18 am
content: Quote from: mrpackethead on October 07, 2018, 07:14:51 amA friend used a 6U board based on one of big-ass Virtex-7 parts to do radio-astronomy processing. Many big FFTs all running together.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 01:57:04 am
content: Quote from: rstofer on October 08, 2018, 01:18:24 amThanks, i had wondered, but was'tn sure.Quote

author: james_s
author_rank: Super Contributor
timestamp: October 08, 2018, 04:54:35 am
content: ISE works just fine, software doesn't wear out, and unless you're a big volume customer you're not gonna get any support anyway so who cares. You can keep using it indefinitely.I'm curious to hear how the Lattice thing works out, that's the one of the big three that I haven't tried yet. They do have some interesting parts that muddy the boundary between CPLD and FPGA.

author: asmi
author_rank: Super Contributor
timestamp: October 08, 2018, 01:27:54 pm
content: I would strongly suggest you to stick with Vivado and 7series devices as this IDE contains a lot of very useful free IP. Here is just one example of my most recent project:This project streams 800x480 stream from DDR3L memory into "dumb" LCD screen (via 24bit parallel bus). The addon board only contains boost converter for LCD backlight and connectors to connect to the mainboard and display.The point here - believe or not, but to get this to work I've only written a grand total of 20 lines of HDL code (and about as much C code for the Microblaze MCU), all the rest needed blocks are provided for free. See attached hardware diagram if you're curious.No other FPGA vendor provides anything like that for free, so for me as a hobbyist Xilinx is the only choice. Good thing it's a pretty good one!For the boards - as you can see I prefer building my own, and the one used in this example is very simple - it only contains 512 MByes of DDR3L memory onboard and HDMI out (just cause I had spare pins), the main "magic" happens in addon boards for which the board has 2 high speed connector and 19 length matched differential pairs are routed to each connector.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 08, 2018, 02:01:52 pm
content: Thehttp://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/MachXO39400DevBoardis currently a good price (and DigiKey have it)Obviously depends on what you want to do with it. I'm planning alot of interfacing to old TTL, this board has quite alot of I/O on the connectors so might work out.In my, very limited, experience of Lattice you want to try and keep up with relatively recent dev boards otherwise you get left behind... I have a feeling an ice board I bought (bought recently but an old design) isn't actually useable in Win10 for example.

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 02:25:55 pm
content: Quote from: NivagSwerdna on October 08, 2018, 02:01:52 pm5V tolerant FPGAs are getting scarce. The old Xilinx Spartan 2 series was 5V tolerant but it's been obsolete for more than a decade.Other than at the source level, there is no commonality between using ISE and Vivado. The huge difference is in the constraints file. Frankly, the ISE version is easier to deal with. But the problem with ISE is that it will never support the newer devices. Sure, if you have a bunch of older boards, you need to have ISE but there is nothing to be gained by buying obsolete boards just so you can use obsolete software.I struggled somewhat to make the transition between ISE and Vivado, and I grumbled all the way. Everything I knew how to do was pretty much out the window. Yes, I could do equivalent things but I had to discover the new way of doing them.I don't use simulation so the recent availability the simulator in Vivado doesn't interest me. The Internal Logic Analyzer (ILA) is worth the cost of making the transition. Now we're looking at real traces of real signals inside real hardware.Just the free IP that comes with Vivado makes it worth the cost to buy a more modern device.In the end, it's just a choice.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 08, 2018, 02:34:17 pm
content: Quote from: rstofer on October 08, 2018, 02:25:55 pmI think that ship may have sailed. I'm assuming that you have to do the level translation yourself.

author: Ice-Tea
author_rank: Super Contributor
timestamp: October 08, 2018, 02:36:53 pm
content: If you're lookingt into Lattice, don't forget to check out the Lattice ICE40 series. Very small footprint, dirtcheap, quite complete.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 08, 2018, 02:57:25 pm
content: You could always join the party athttps://tinyfpga.com/(the originator was on an amp hour podcast not long ago) but depending on your location, shipping of this is $$, you might find a lattice dev board cheaper.

author: legacy
author_rank: Super Contributor
timestamp: October 08, 2018, 03:09:17 pm
content: Quote from: rstofer on October 08, 2018, 02:25:55 pmGot one with a GBA kit (Nintendo GameBoyAdvance, Arm), but it's impossible to find an evaluation board with a Spartan2 on it, even on eBay there are rare. The only one I have seen is by Avnet.Therefore the solution is placing voltage 3.3V<=>5V level shifter buffers everywhere for everything, which in my case means 8 chips on the PCB(32bit data line -> 4 chips, 24 bit address line -> 3 chip, plus bus control lines -> 1 chip)Quote from: rstofer on October 08, 2018, 02:25:55 pmJudging my professional experiences, the simulator and a lot of test benches have always saved my development time, and, even better, have saved me from communication problems that happen when you have to share your projects with other people. In fact, when asked by colleagues or customers about some defect/bug found on by the testing group, the simulator promptly offered screenshots of the timing and of the behavior, while test benches offered a neat way to check if the problem was on my side, rather then on their side. Which is a neat way to work in a group.The simulator also makes the system integration easier, especially when you are working on a module which needs something that is under development, hence you can you can model the behavior by a virtual module.Here I have spent a lot of time developing virtual modules, e.g. integrating a virtual serial UART to a char block devname (/dev/ttyS* on Linux) of UNIX, the bitplane to the Kernel's framebuffer (/dev/fb0 on Linux), etc.Specifically, these two virtual modules are helping a lot with the development of the VDU.But these points are good for me, and I am speaking about me

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 05:13:04 pm
content: Quote from: legacy on October 08, 2018, 03:09:17 pmI thinkprofessionalis the key. I started playing with FPGAs when I retired so, say, 15 years ago. At the time, WebPack ISE was free but it didn't include a simulator (IIRC). I am just a hobbyist, I can't afford to buy toolchains. I had to come up with other ways to debug and test system integration. I took an approach that worked when I messed around with SBCs using chips like the 8085. Scope, logic analyzer, single-stepping, not-very-clever code, etc. It probably wasn't as productive or maybe it was, I didn't spend time creating test benches which can have as many problems as the VHDL.Some time back, about the time Vivado was released, the simulator became free with WebPack ISE and Vivado. I'm not sure when the simulator was added to WebPack but it has only been in the last very few years. But I have 15 years of doing without the simulator so it's not like I would miss having it.There was/is a Linux oriented simulator but I was never sure it would understand Xilinx primitives. Sure, it would understand bare bones VHDL but probably not the PLLs, DCMs, BlockRAMs and such. In any event, I wasn't sure I would get much benefit so I never bothered.Now, the Vivado ILA, that's a tool! It gets right down to where I like to work. Logic created triggers, actual signal transitions, etc. Alas, it takes some effort to get the constraints file sorted out. It always looks so easy in the tutorials!Even given ILA, I still fall back to lots of LEDs, 7-Segment Displays, single-stepping, breakpoints, the same stuff I used on SBCs starting back in '76. Modern boards don't always have enough IO on headers for a reasonable logic analyzer so I plan to actually learn how to use ILA. Sometime soon...My approach is clearly limited to CPUs with simple memory interfaces. I'm pretty sure it won't work for a DDR3 interface. But it doesn't have to! There is a memory controller core included with Vivado. All I need to figure out is the interface requirements - unless I use the free MicroBlaze IP then everything is sorted. There's a lot of free stuff with Vivado!There's a significant difference between what professionals can use and what struggling retirees can afford.

author: nctnico
author_rank: Super Contributor
timestamp: October 08, 2018, 05:17:19 pm
content: Quote from: rstofer on October 08, 2018, 05:13:04 pmghdl works just fine as a VHDL simulator for smaller chunks. Simulating a huge FPGA design will take too long anyway.

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 05:37:06 pm
content: Quote from: mrpackethead on October 07, 2018, 08:53:48 pmI wasn't sure what you meant by this. CPLDs do have registers, PLAs might not. Some CPLDs are native 5V and some are 5v tolerant although I'll bet they are getting scarce.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 07:44:44 pm
content: Quote from: asmi on October 08, 2018, 01:27:54 pmTHe issue with using Artix-7 parts is that they start at about $23.00. They certainly have a lot of capability, but for some of the things i want to do, that is a massive overkill. and would make a serious dent in the cost of a BOM. This is not saying they are not great, they are just not going to be the right fit for everything i want to do.Does Vivado, not have support for the lower cost devices? ( Even the paid licenced version, which is $3k or so ).

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 07:56:45 pm
content: Quote from: Ice-Tea on October 08, 2018, 02:36:53 pmYes, i saw those, some of them are just 16 pin, and start at $1 or so. However, ( open to be corrected here ) they don't have flash or clocking and need dual power rails, so compared to a XO2 it does'tn quite seem so 'complete'. [ or did i miss somethign ]

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 08:01:25 pm
content: Quote from: NivagSwerdna on October 08, 2018, 02:57:25 pmI like what they have done, however its not a lot more than just sticking a chip on a pcb. By the time you mess around and connect things to it, its a lot easier to just buy the dev board that have a few accessories attached to it. I've alraedy ordered one.

author: Ice-Tea
author_rank: Super Contributor
timestamp: October 08, 2018, 08:02:14 pm
content: The entire family has NVCM (non volatile conf mem), at least the UltraPlus family I'm looking at has a PLL and 48MHz clock source.Dual power rail.. Don't they all? Core voltage and IO voltage?? Anyway, the core consumes jack shit so you can power it with a few cents worth of LDO I guess?

author: NorthGuy
author_rank: Super Contributor
timestamp: October 08, 2018, 08:04:55 pm
content: Quote from: mrpackethead on October 08, 2018, 07:44:44 pmSpartan-7s start from $15 or so. The starting level ones are quite capable. Vivado supports them all for free. The free version is called WebPack - a freaky name, but it just means free. They do insist on spying on your usage patterns (such as how many times you clicked "Run Synthesis" button), and also they collect data for the resource usage when generating bitstreams.Vivado doesn't support older parts, but the older parts may be EOLed while Spartan-7 are just released.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 08:08:17 pm
content: Quote from: Ice-Tea on October 08, 2018, 08:02:14 pmThanks. I'd missed somethign! I was looking at the tinyfpga projects, and the BX board, which has a (ICE40LP8K) has a flash chip and dual rails.. Versus the XO2 board which just has a single rail and no flash.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 08, 2018, 08:13:43 pm
content: Quote from: james_s on October 06, 2018, 05:35:49 pmPlace and Route is usually the dominant factor in compile time for nontrivial designs, which is done from the RTL that the HDL synthesisers output, so the source language has little effect.

author: CM800
author_rank: Frequent Contributor
timestamp: October 08, 2018, 08:24:21 pm
content: Quote from: james_s on October 06, 2018, 05:35:49 pmHi James,I'm referring to the compile time with IceStorm, (which is Verilog only)It's MUCH faster then the lattice supplied toolchain as there is so much less clutter.

author: asmi
author_rank: Super Contributor
timestamp: October 08, 2018, 08:25:12 pm
content: Quote from: mrpackethead on October 08, 2018, 07:44:44 pmAs said above, Spartan-7 is fully supported by free version as well, and they start at $13 for the smallest part - though you really need to make sure that your project is going to fit in such small part. Paid version only unlocks higher-end parts, but there is a fair bit of UltraScale/UltraScale+ parts (and Zynq UltraScale+ MPSoCs) which are also supported by free version, and some of those parts cost about as much as paid Vivado license.With that said, you have to remember that these FPGAs require some external components to work, which also cost money. At the very minimum, you will need a DC-DC converter to provide 1.0 V for the core power (Vccint), and another one for the 1.8 V (Vccaux and ADC power Vccadc, though for smaller parts you might be able to get away with an LDO if you don't care about efficiency), plus whatever voltage(s) you're going to use for IO pins. You will also need QSPI Flash chip to store the bitstream - at least these are quite cheap nowadays, and you don't need a particularly large capacity unless you want to store your application data/code there as well. Also if you want to use built-in ADC, you will need to provide accurate 1.25 V reference for it (I use REF3012 part). The important thing to remember here is even if you aren't using ADC explicitly, some of IPs you use might use it behind-the-scene. The typical example of such IP is DDR3 memory controller - it uses ADC to measure chip temperature so that it can compensate for the temperature drift.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 08, 2018, 08:34:47 pm
content: Some random comments :Lattice XO2 is a low-ish end part, and as mentioned can be used pretty much like an MCU in that it needs no external core voltage regulators or config memory, just a 3.3v supply. It even has an internal oscillator, though not super-accurate ( about 5% from memory) . It has a couple of unusual low-pin count package options like QFN32 and a tiny CSP BGA, as well as some power-saving functionality.Ice40 is cheap but something that's not immediately obvious from a speed-read of the datasheet is that the onboard config memory is one-time programmable, so for most applications you'll probably want external SPI flash for config. Fortunately that's very cheap nowadays.It is easy to use existing VHDL modules in Verilog designs and vice versa while knowing next to nothing about one of them, so that's much less of an issue that, say, choosing which programming language to learn. HDL modules are just like electronic components - black boxes with wires at the edges.I learned VHDL as consensus was it was harder to write code that would compile but not run as expected.Xilinx ISE and Lattice Diamond are extremely similar. No experience of Altera.Definitely start with a devboard of some sort, preferably with plenty of LEDs, buttons etc. for intiial tinkering. Also get one with a moderately large device, as place & route will be faster on a device with low utilisation as it doesn't have to work so hard to fit.QuoteI've never really understood why you would want a tool to infer your intentions when you can state them explicitly. I'd much rather explicitly tell it, for example, that I want a specific shape & size of BRAM with particular characteristics than figure out how to ask for it via generic HDL code. Most tools have IP generators to generate blocks like this based on simple GUI inputs to generate exactly what you need.I can understand arguments about portability, and maybe designs where you want to do some parameterisation of designs ( though most HDLs suck at that sort of thing generally), but I'd say that unless you really need to, it's probably just easier to instantiate blocks explicitly than try to work out how to hint to the synthesiser what you mean. More so for a newbie.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 08, 2018, 08:37:30 pm
content: Quote from: NorthGuy on October 08, 2018, 08:04:55 pmWhat about spartan3 parts? are they supported in Vivado?

author: NorthGuy
author_rank: Super Contributor
timestamp: October 08, 2018, 08:48:13 pm
content: Quote from: mrpackethead on October 08, 2018, 08:37:30 pmNope. Nothing earlier than 7-series.

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 09:02:40 pm
content: Quote from: mrpackethead on October 08, 2018, 08:37:30 pmUnfortunately, no. I have a bunch of Spartan 3 boards of various configurations (all Digilent) so I have to keep ISE alive and well.If I have it right, Vivado starts with Artix 7 and Spartan 7 and makes no attempt to cover earlier devices.It's time to move on! It's easier if you aren't already heavily invested in Spartan 2 and Spartan 3.I have often wondered if I should port my Spartan 3 projects to the Artix 7 device. It would give me a chance to clean up the code. Alas, it would just be grunt work so I probably won't do it. The system is working fine in the Spartan 3.Some Spartan 3 boards have static RAM and the Digilent Nexys 4 DDR (Artix 7) board comes with a component that makes SDRAM look like the CellularRAM used on earlier Nexys boards. This is really important if you don't want to mess with SDRAM.Quotehttps://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/

author: jmelson
author_rank: Super Contributor
timestamp: October 08, 2018, 09:03:27 pm
content: Quote from: mrpackethead on October 08, 2018, 07:44:44 pmFor really small projects, Xilinx has the 9500XL series. Not an FPGA, but a descendant of the old PLD devices. But, in some cases it is ideal, it has 36-input gates, so if there is a lot of comparison between fields of bits, these work very well. They are as cheap as $1 in small quantity. Xilinx also has the CoolRunner II, more like an FPGA in internal architecture, and the smaller ones start around $2. The Spartan 3A is still in production, and seems like it will be for some time to come. The small one is $10, and $13 if you want the configuration SPROM internal. That has "50K gates" using Xilinx's method of equivalent gates.Oh, and the 9500XL needs ONLY a single 3.3 V supply, and is 5V tolerable.I use ise to do the design on these parts, that is still downloadable from Xilinx.Jon

author: rstofer
author_rank: Super Contributor
timestamp: October 08, 2018, 10:39:21 pm
content: Device cost and board cost can be a really big deal if you plan to manufacture something. Those costs are totally insignificant for the hobbyist as long as the board makes it easier to get something working.I don't plan to ever buy an FPGA - I don't have any way of working with BGA packages so I'll just have to build attachment boards for various peripherals and tie them into a manufactured board.There are many boards that simply break out the pins to headers. I don't prefer these for development but they are surely adequate for a finished toy. I use 'stamp' style boards for embedded projects all the time. Arduino Nano or the original LPC1768 mbed board. I use put some headers on a daughter card and plug the stamp board in.When it comes time to justify cost related decisions, I charge my time at $100/hr. Will this board, costing nearly $300, really save me 3 hours on this new project. The usual answer: Absolutely! Now, I realize that nobody would ever pay me anywhere near that much but I simply have to pick a number. I'm not going to pick $10/hr!With my scheme, I can justify just about anything and that keeps the wife from getting involved.

author: apblog
author_rank: Regular Contributor
timestamp: October 08, 2018, 11:38:58 pm
content: Quote from: rstofer on October 08, 2018, 10:39:21 pmI just wanted to mention that Lattice is good about making low pin count parts available in QFP packages.

author: james_s
author_rank: Super Contributor
timestamp: October 09, 2018, 12:42:46 am
content: Don't stress too much about the platform decision early on. Play with several and decide what you like. I learned ISE and Quartus concurrently and did a lot of porting projects from one to the other, it's no big deal. All of the software packages have advantages and disadvantages, there is no clear winner.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 01:38:54 am
content: Quote from: rstofer on October 08, 2018, 10:39:21 pmThe only things you need to work with BGAs (excluding super-small ones with pitch of 0.4 and less) are a toaster oven (cheap-ass one from Walmart will do), a multimeter with thermocouple that can survive 260°C, and a cheap-ass stencil. All other tools just add convenience, but are in no way required to get the job done.There is a popular misconception in a hobbyist community that working with BGA is hard, but the reality is exactly opposite. And you can prove it to yourself by just buying a few cheap QSPI memory chips in BGA package (I bought a few $2 apiece), building a simple 2 layer breakout board for it (these chips can be easily routed out on 2 layers since not all balls are actually used), ordering a cheap stencil from any Chinese fab, and giving it all a try. This is how I started working with BGAs, and - believe or not - but I'm yet to encounter a problem soldering these packages. QFNs give me more grief than BGAsQuote from: rstofer on October 08, 2018, 10:39:21 pmPutting a price tag on something you're going for fun and emotions is fundamentally misleading and pointless. And there is an easy way to prove it - what's the price tag on your time spent having sex?No money can buy emotions you experience when you turn on the board for the very first time after hours upon hours spent assembling it - the suspense right before you flick the switch, seeing it coming to life, first tests, etc. This is priceless, and this is exactly why I love this hobby like no other!

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 03:45:53 am
content: So,Looks like i have two things to work with..I will go and play with the small FPGAS that lattice makes, they should be useful for some small projects.I probably should now also get a Xilinx dev kit that starts with a 7 series chip, and start with Vivado. for use in my more complicated project ideas.

author: Mr. Scram
author_rank: Super Contributor
timestamp: October 09, 2018, 04:54:22 am
content: Quote from: rstofer on October 08, 2018, 10:39:21 pmThere are plenty of non BGA FPGAs out there. Most are QFP, I don't think I've seen many QFNs but they surely exist.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 04:59:16 am
content: Quote from: Mr. Scram on October 09, 2018, 04:54:22 amDigikey only lists 227 QFN FPGA's. QFNS' are so much easier than QFP's as well.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 09, 2018, 09:09:29 am
content: Quote from: mrpackethead on October 09, 2018, 04:59:16 amI have concluded that to get enough LUTs you tend to need the BGA devices (and to a similar extent.... to get enough I/Os...).The MachXO3 dev board is very very cheap at $39 so this is what I am working on and will worry about how to get it manufactured later. If I can squeeze it later to be a QFN.... if not....

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 09:11:07 am
content: Whats the difference between XO2 and XO3?

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 10:06:55 am
content: Quote from: mrpackethead on October 09, 2018, 09:11:07 amXO3 is mostly in stupidly small packages - 144QFP is the only non BGA type package

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 09, 2018, 10:50:15 am
content: Quote from: mrpackethead on October 09, 2018, 09:11:07 amhttps://www.eevblog.com/forum/microcontrollers/difference-between-machxo2-and-machxo3/MachXO2-640U which is available as TQFP is the biggest LUT count of the TQFP form factor at 640 LUTs.I guess it depends on your requirements.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 12:08:06 pm
content: Quote from: NivagSwerdna on October 09, 2018, 10:50:15 amYou mean XO3 - that's the only QFP option for XO3.All XO2 sizes are available in QFP (100/144), up to 7000(ish) LUTs, as well as a few small packages ( QFN32,QFN48 and 25-WLCSP)

author: legacy
author_rank: Super Contributor
timestamp: October 09, 2018, 12:13:49 pm
content: Don't you happen, guys, to have a spartan2 board for sale? or to know where to get one?Eight voltage level shifters to interface a spartan3/6 FPGA with a 5V microprocessor bus is ... annoying for me.edit:The same applies to PCI-5V. The PCI-3.3V should better for FPGAs, but unfortunately, my PowerMac-G4 is only PCI-5V. About that, the only good PCI-FPGA kit I have ever found is by MESA.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: October 09, 2018, 12:59:49 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 12:08:06 pmI don't think I was concentrating.... sorry. According to the XO3 Family guide I just downloaded (Jan 2018) the XO3 is WLCSP or BGA. I stand corrected on XO2... 144-pin TQFP XO2-7000 buys you 6864 LUTs or a XO2-4000 which 84 QFN gets you 4320 LUTS and 68 I/Os. That last part could be quite handy. (The QN84 footprint actually has two rows of pins so might be challenging for hand assembly... looks more feasible than BGA though)Sorry for the confusion.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 01:56:32 pm
content: I think 1mm (or 0.8 mm for that matter) BGA package may give you better yield than 0.5mm TQFP. I don't have PnP, but the placement accuracy should depend mostly on the pitch not on the geometry of pins/balls.BGAs are also the easiest for prototyping. I just apply flux, place the BGA and apply heat. You only need an oven or an air gun with wide enough nozzle. This is much easier than dealing with QFNs.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 02:41:53 pm
content: Quote from: NorthGuy on October 09, 2018, 01:56:32 pmI totally agree! I've never had any soldering issues with BGAs, while QFNs still give me grief every once in a while. And two-row QFNs seems like even worse than regular QFN, though I haven't tried using them yet.

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 09, 2018, 03:19:28 pm
content: QFNs are awful for hand-soldering in terms of yield. For sure.But QFPs? Never had any problem with them at 0.5mm pitch. Obviously while soldering you'll get some bridges that you remove with solder wick and you're done. The big plus is that you can visually inspect them, and when in doubt, again you can use solder wick. With QFNs it's already much harder to visually inspect, and harder to remove excess solder especially when it's trapped behind the pads. When they have a central thermal pad (which most of them have), it's a PITA. It makes it very hard to keep the QFN flat and then makes it hard to have good contact with all pads.I have honestly never tried hand-soldering BGAs, except very low-pin count ones. Many people say that BGAs are easy to solder, and I'm willing to believe that, but I'll have to try one of these days. The real issue I see with them is again visual inspection. Apart from the outter balls row, you just have to cross fingers.

author: Fred27
author_rank: Unknown
timestamp: October 09, 2018, 03:49:15 pm
content: I like QFP. I struggle with QFN. I've been too scared to even try BGA! I'm just looking at getting into FPGAs and solderability is one of my priorities. More so than performance as I'm likely to be doing very basic things with one.Verilog or VHDL? I like the feel of Verilog better so far, but will probably give both a proper try out.

author: james_s
author_rank: Super Contributor
timestamp: October 09, 2018, 04:00:37 pm
content: I really do need to try a BGA one of these days, I have an xray machine I could use to inspect it. The limiting factor for me has been that most BGAs require a multilayer board which until fairly recently has been very expensive.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 04:17:16 pm
content: Quote from: james_s on October 09, 2018, 04:00:37 pmTry getting some QSPI flash chips in BGA package (like S25FL116K0XBHI030, which are EOL, but still are available at about $0.50 apiece). These are in 1 mm pitch BGA-24 package, but the pinout is such that you can route out SPI on 2 layer board, and you can use FTDI's MPSSE 3.3V cable to talk to these chips using SPI (QSPI chips support regular SPI as well) to verify that soldering went well. This way you can practice BGA soldering on cheap - get a dozen or so of these chips, design a simple 2 layer breakout for it, order boards at Chinese fab of your choice, order cheapest frameless stencil at the same fab (most of Chiness fabs also offer cheap stencils) - and give it a try! This whole exercise will cost you less than $50 for everything, and provide you ample practice to see by yourself that BGA are not nearly as hard as some people (most of whom never actually tried!) make it out.As for multilayer boards - my recent order at WellPCB for 10 6-layer boards 10x10 cm with custom stackup and impedance control on all signal layers was only $195 with shipping included in this price. I think it's a bargain as the same board in US would cost over $1000!

author: james_s
author_rank: Super Contributor
timestamp: October 09, 2018, 04:22:04 pm
content: Yeah multilayer boards have really come down in price, but they're still relatively expensive. That same size board in single layer double sided would be 1/10th the cost.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 04:30:05 pm
content: Quote from: Fred27 on October 09, 2018, 03:49:15 pmI'm actually contemplating designing a simple 4 layer breakout board for cheapest Spartan-7 FPGA and sharing it here so people can just take my Gerbers, order boards (4 layer boards are cheap nowadays!) and build boards themselves. This way they can get known-working board design and make some useful breakouts for them to play with, so at least this will eliminate board-related issues, and known-good schematics will give them a jump start designing their own boards knowing that basic critical connections are already made and working as they should. I know I would've benefited from such design back in a day when I was designing my very first Artix-7 board, as it took me 2 revisions to get my FPGA to be recognized by the programmer.I've built a bit more advanced breakout for Artix-7 FPGAs, but it's a 6-layer board so I imagine fewer people would be interested in it, unless I mass-order boards (since tooling cost is already paid by me, additional orders would be much cheaper than what I've paid for the first run) and mail them out.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 04:37:22 pm
content: Quote from: james_s on October 09, 2018, 04:22:04 pmTrue but this is not really a fair comparison as 6 layer board allows you to do much more than you can ever do with 2 layer one.More importantly - unless you need to have high-speed things like DDR3 on your board, you can get away with regular 4 layer boards, which are only $32 at JLCPCB. For example, Spartan-7 is available in 1 mm pitch BGA-196 package which was specifically designed to be fully routed out on 4 layer board, and you can do quite a bit using these FPGAs (pretty much everything you can do with Artix-7, except when you need a lot of DSP tiles, or MGT transceivers, but latter will require impedance control anyways).

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 09, 2018, 04:50:24 pm
content: @asmi: sorry to hijack the thread (and I think we already have quite a bit), but since you have experience with the Spartan-7, would you happen to have some kind of fair comparison between the -7 and the Spartan-6? I'm still using the -6 in some of my designs but I've been considering the -7 line. Was just under the impression that the Artix-7 was a closer match, but unfortunately more expensive.

author: iMo
author_rank: Super Contributor
timestamp: October 09, 2018, 05:00:08 pm
content: FYI - I got a couple oftheseboards - actually a little bit newer revision (with FT230X and jtag buffers), 4 layers pcb for $30 incl. shipping each. Thus 4 layers are doable cheap, it seems..PS: "9k Logic cells" in Spartan6 LX9 mean 1430 slices, 1 slice = 4LUTs with 8FFs.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 05:09:20 pm
content: Quote from: SiliconWizard on October 09, 2018, 04:50:24 pmISE supports few Artixes such as A7100T, so you can change the chip and run your designs and see the differences. Then you can get the same design to Vivado, which also supports A7100T, port your project (you will have to re-write constraints and pin assignments), and see how it compares to ISE for you, perhaps compare the results.

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 09, 2018, 05:21:33 pm
content: Quote from: NorthGuy on October 09, 2018, 05:09:20 pmActually I didn't realize that! Thought ISE would not support the -7 line at all. Just checked ISE and you're right.ISE supports the XC7A100T and 200T and Kintex-7 70T and 160T.I happen to have a board with an XC7A35T which unfortunately is not supported.Anyway, I'm more interested in comparing with the Spartan-7. The Artix-7 is very capable compared to a Spartan-6 but much more expensive. An XC7A35T is currently $49 at Digikey and a 100T at $176 !!

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 05:45:16 pm
content: Quote from: SiliconWizard on October 09, 2018, 05:21:33 pmSpartan-7 is exactly the same as Artix-7 except that it doesn't have MG transceivers and the pinouts are more user-friendly, however it doesn't have -3 speed grade. None of Spartan-7 are supported by ISE.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 06:04:35 pm
content: Quote from: SiliconWizard on October 09, 2018, 04:50:24 pmI don't (yet) have any practical experience with S7 as I'm still designing my first S7 board (to drive 64x32 LED panel, as Artix seems like an overkill for this task, and all boards I've designed so far have Artixes), but you can easily compare them by looking at their datasheets. Essentially Artix-7 is a replacement for S6-LXT and S7 is a replacement for S6-LX. Advantages of 7 series (compared to S6) are:1. the size of BRAM is doubled to 36k, it supports up to x72 data width (compared to 18k and x36 respectively in S6)2. BRAM is about twice as fast in 7 series (Fmax is 297.5 MHz on speed grade 1 in ECC mode vs 150 MHz).3. BRAM is 7 series can be configured as FIFO with no external logic required, and Fmax in this configuration is 388 MHz for SG1.4. DSP blocks in 7 series are about twice as fast (Fmax is 464 MHz vs 213 MHz)5. Global clock buffers (BUFGs) are also almost twice faster (Fmax is 464 MHz vs 250 MHz).6. S6 has dedicated DDR memory controller blocks, while 7 series does not - instead DDR2/3/3L controller is implemented in fabric, which has it's own pros' and cons'.7. S7 doesn't have any MGT transceivers as this functionality is only available in Artix, though A7's MGT support up to 6Gbps while S6-LXT only goes up to 3Gbps).8. SERDES are also about twice as fast on 7 series.But the most important advantage of 7 series IMHO is 100% vertical compatibility which allows you to migrate the same design up and down along S7-A7-K7-V7 families as needed, because all HW blocks are identical all across families, with exception of MGTs of course.

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 09, 2018, 06:57:06 pm
content: Thanks.Spartan-7's are still significantly more expensive than the 6's for an equivalent number of logic elements. Of course 6's are still available as of now, but for how long? I'll certainly miss them. The 7's prices are probably going to decrease over time though, I suppose.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 07:06:01 pm
content: Quote from: SiliconWizard on October 09, 2018, 06:57:06 pmPlenty of spartan 2 parts are still shown as active at Digikey.FPGAs are long-lifetime products,so I wouldn't worry too much, though the odd specific part may be obsoleted if there is little demand.And older parts may get more expensive.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 07:19:00 pm
content: Quote from: SiliconWizard on October 09, 2018, 06:57:06 pmI just checked Digikey, and it seems that they are not. XC7S6-1FTGB196C (6k gates) is $19.2 CAD while XC6SLX4-2TQG144C is $17.12 CAD (3840 gates). So I'd say they are even. On a high end - XC6SLX100-2FGG484C is $184.99 CAD, while equivalent S7 XC7S100-1FGGA484I is $163.73 CAD - so S7 is even cheaper, despite it's being faster and wider temperatures range.So I'm not sure where did you see S7's being "significantly" more expensive. From what I see they are priced more-or-less on par with each other. By undercutting themselves it seems that Xilinx really wants their customers to move onto 7 series devices.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 07:26:32 pm
content: If you go to higher speed grades (-2) of Spartan-7 and Artix-7, the clock can go up to 625 MHz (even to 680 MHz with BUFIO), so you can do really fast LVDS.

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 09, 2018, 07:41:34 pm
content: Quote from: asmi on October 09, 2018, 07:19:00 pmOh, right. I probably still had the Artix-7 prices in mind. Seems like the price gap is even larger on the bigger ones (in favor of the 7).

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 07:41:51 pm
content: Quote from: NorthGuy on October 09, 2018, 07:26:32 pmBut unfortunately still not fast enough for 1080p HDMIAt least not officially - I know there is a way to make it work, but it's kind of hacky

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 07:45:02 pm
content: Quote from: SiliconWizard on October 09, 2018, 07:41:34 pmDon't forget that Digikey prices for FPGAs bear little resemblence to actual prices,even at lowish volumes, once you get into the whole "supported pricing" wierdness.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 07:47:38 pm
content: Quote from: SiliconWizard on October 09, 2018, 07:41:34 pmArtix-7 is more appropriate to compare with S6-LXT (as both (can) have MGTs), and here things are again in favor of 7 series: XC6SLX45T-2FGG484C $120.48 CAD vs XC7A50T-1FGG484C $115.05 CAD.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 07:50:33 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 07:45:02 pmWell I'm just a hobbyist, so buying chips at the likes of DK is the only choice for me as I doubt Xilinx would agree to directly sell me, say, 5 or 10 chips, while I have no use for "90 minimum" even if I could afford that.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 08:03:38 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 07:45:02 pmDK is the conveience store / gas stop of the electronics industry. Great for when you need somethign in a hurry, or can't be bothered hunting around for it. Its easy, but you pay for the convience. Having said that, sometimes they have some bargins.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 08:13:33 pm
content: Quote from: mrpackethead on October 09, 2018, 08:03:38 pmFree overnight shipping and all customs fees paid by DigiKey is also worth something.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 08:17:28 pm
content: So, after all this, i've got my head into a space that i'll get Arty-7 Dev board from Digilent ( its the artix7 ). Question is shoudl i buy the one with the bigger (100T)? part or the smaller part ( 35T ). i have a $500 budget to spend.. I do like that its got an ethernet port as thats somethign i'm always interestd in..

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 08:19:14 pm
content: Quote from: mrpackethead on October 09, 2018, 08:03:38 pmYes, but FPGAs in particular seem to be treated wierdly compared to similar products like MCUs - note only 1x prices are listed. It's a while since I bought FPGAs in volume,but even then it was only low hundreds of low-end Lattice parts, but the price from a franchised disti was less than half the Digikey price - you don't often see that with more run-of-the-mill devices.I have no idea if this is still the case - maybe others have some data points.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 08:20:19 pm
content: Quote from: mrpackethead on October 09, 2018, 08:17:28 pmBigger, because place & route should be faster as it has less work to do

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 08:23:48 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 08:19:14 pmI buy a good number of TI parts, direct from TI, thats the best pricing i can get. Microchip parts direct from Microchip. They are not that hard to get decent pricing from. I'm buying ( *verifyed genuine* ) passives from LCSC in china, ( along with a few other misc parts ).. Procurrement optimizaton takes time, but can save a lot of coin.

author: mrpackethead
author_rank: Super Contributor
timestamp: October 09, 2018, 08:26:39 pm
content: So, i have another question for you all.When you get an IP core from somewhere.. ( particularly a commercial one ), do those come as some kind of 'prebuilt' file, that you can't poke around with, or does it have to be all open. If people are selling them, presumably, they will have some interest in protecting their IP?

author: nctnico
author_rank: Super Contributor
timestamp: October 09, 2018, 08:27:06 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 08:20:19 pmThat depends... If the FPGA is very large then the routing delays between the logic and the pins on the outside may become big causing timing not to be met. This sounds funny but I have a project where this is the case (using a Virtex6 240LXT). If I turn optimisation on then all the logic will be compressed to occupy a small portion in the center of the FPGA and timing towards the pins cannot be met.

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 08:34:57 pm
content: Quote from: mrpackethead on October 09, 2018, 08:17:28 pmThey have some Spartan-7 boards too.As for the Ethernet, you can always connect an external PHY.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 08:35:14 pm
content: Quote from: mrpackethead on October 09, 2018, 08:26:39 pmIt's either netlist file (that P&R will incorporate into your design), or encrypted HDL. Latter is usually used for simulation models. Built-in Vivado Simulator supports encrypted HDL modules as some of Xilinx' own IPs are delivered as such.That said, a lot of free Xilinx IPs are distributed as open source - though rarely readable as in most cases it is a generated code not meant to be read by a human being.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 08:36:18 pm
content: Quote from: NorthGuy on October 09, 2018, 08:34:57 pmNot for Arty family as they only have low-speed connectors. 100 Mbit might be possible, but 1G is a definite no.

author: nctnico
author_rank: Super Contributor
timestamp: October 09, 2018, 08:39:03 pm
content: Quote from: asmi on October 09, 2018, 08:36:18 pmAFAIK 1G MAC interfaces run on 125MHz DDR. A modern FPGA shouldn't have a problem with that to interface with an external PHY.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 08:44:00 pm
content: Quote from: nctnico on October 09, 2018, 08:39:03 pmIt's not a problem with FPGA, but with routing. You need length-matched traces with right impedance for that kind of frequency, and AFAIK none of PMOD connectors on Arty are length-matched.The lack of good high-speed connectors is the biggest problem with Arty family as whole, and this is exactly what once sent me on a journey to build my own boards...

author: langwadt
author_rank: Super Contributor
timestamp: October 09, 2018, 08:47:29 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 08:19:14 pmI think it has got to do with all the NRE that goes into designing an FPGA and the complex SW tools for them means there is a more room for discounts

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: October 09, 2018, 08:57:35 pm
content: Quote from: mrpackethead on October 09, 2018, 08:23:48 pmWhat is the typical improvement over Digikey pricing at similar volumes ?

author: NorthGuy
author_rank: Super Contributor
timestamp: October 09, 2018, 09:16:01 pm
content: Quote from: asmi on October 09, 2018, 08:44:00 pmAt 125 MHz, the time between edges is 4 ns. If you match the length within 2 inches (doesn't sound hard to do), you lose only 350 ns, which is not a problem at all.Of course, if you use long wires, you may get SI problems, but there shouldn't be a problem with a neat connector.

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 09:42:35 pm
content: Quote from: NorthGuy on October 09, 2018, 09:16:01 pmHave you actually tried that? There are no published trace specs for Arty, so for all we know there might be half a meter difference in traces length. And RGMII protocol is very sensitive to traces mismatch, even to the point when clock trace is intentionally made longer for older PHY chips who didn't have on-chip clock skew compensation. Modern PHY ICs usually include configurable clock delay, but this can't compensate for different data traces' length.

author: jmelson
author_rank: Super Contributor
timestamp: October 09, 2018, 09:49:13 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 08:19:14 pmXilinx has ONLY TWO franchised distributors, Digi-Key and Avnet. Their prices are about the same, and no volume discount, as far as I remember.Jon

author: jmelson
author_rank: Super Contributor
timestamp: October 09, 2018, 09:58:37 pm
content: Quote from: mikeselectricstuff on October 09, 2018, 08:57:35 pmI don't buy any semis from manufacturer's reps, but I have been buying On Shore Tech. connectors (3.81 and 2.5 mm screw-terminal 2-part connectors)and they are HALF the Digi-Key price when I buy 50 or 100 pieces! Yes, HALF!I mostly don't buy enough of any particular semi at one time to make it worth trying to get various semis direct, although at the price of FPGAs and a few Analog Devices parts, I really ought to look into it. I have NO IDEA how to even contact anybody about buying direct from Xilinx, however. They have NOTHING on their web site indicating where to go for that.Jon

author: asmi
author_rank: Super Contributor
timestamp: October 09, 2018, 10:11:27 pm
content: Quote from: jmelson on October 09, 2018, 09:58:37 pmHerehttps://www.xilinx.com/about/contact/sales-reps.htmland here:https://www.xilinx.com/about/contact/sales-offices.htmlI've contacted them a couple times (but not regarding IC purchases) and they responded quite quickly and got my questions answered.

author: Cerebus
author_rank: Super Contributor
timestamp: October 09, 2018, 10:48:25 pm
content: Quote from: jmelson on October 09, 2018, 09:49:13 pmSigh, I do wish that folks would sometimes check their facts before posting such DEFINITE statements.Xilinx Authorized Distributors List on their websiteThere are FIVE for the Americas alone, considerably more if you include the whole world.

author: jmelson
author_rank: Super Contributor
timestamp: October 10, 2018, 09:12:41 pm
content: Quote from: Cerebus on October 09, 2018, 10:48:25 pmWOW, that is interesting! There was a press release some years ago where Xilinx officially stated they were only going to have those two distributors, and were terminating all relationships with the others (Mouser, Newark, Allied, Arrow, etc.) This was REALLY true at one time, but it has probably been at least 5, maybe 10 years.So, I stand corrected!Jon

author: jmelson
author_rank: Super Contributor
timestamp: October 10, 2018, 09:22:47 pm
content: Quote from: Cerebus on October 09, 2018, 10:48:25 pmWell, just a quick check. Newark DOES have a discount schedule, but on the one part I checked, their price at 250 pieces was still 23% HIGHER than Digi-Key's (or Avnet's) one-piece price. Also, the part I checked had zero stock, they are expecting some in JUST before the end of 2018. Another part was 4X the Digi-Key price, no discount schedule, and no stock in the US. So, I'm not really sure they are serious about carrying Xilinx.Port Electronics does not seem to have any online catalog, just a line card.And, Spirit seems to be selling through Avnet, according to the Xilinx listing you posted.So, this really isn't that MUCH of a change from what I said.Jon

author: mrpackethead
author_rank: Super Contributor
timestamp: October 22, 2018, 09:12:48 am
content: Thanks everyone for your advice.. I got an Arty S7 and a lattice XO2 Pico dev board. Now i am no expert but after a week i've been able to get some things done.Xilinx's Vivado is 10x easier to use than Diamond Lattice.. I'm making some good progress with Verilog. Interestingly i've finding it conceptually much simpler than writing 'code'.

author: Sal Ammoniac
author_rank: Super Contributor
timestamp: October 23, 2018, 05:54:03 pm
content: I'm late to this party, but I'll chime in anyway.My advice is to learn both. You'll eventually decide you like one better than the other and then you can choose to follow that path.You didn't say (or perhaps I missed it) whether you're learning FPGAs for professional or hobby reasons. If for professional reasons, that's even more reason to learn both as you'll often find yourself in situations where you have to use both.

author: james_s
author_rank: Super Contributor
timestamp: October 24, 2018, 01:28:41 am
content: Learning both is certainly not a bad idea. You can even use both at the same time in the same project, so even if you only become proficient in one, you should learn how to instantiate modules written in the other.