Ringing in a DCDC Buck converter at higher output loads - Page 1
Forum section: electronics / projects

author: StephanR
author_rank: Newbie
timestamp: January 27, 2023, 03:49:20 pm
content: I am currently working on a synchronous DCDC Converter which converts 1 500 W at 300 V into a lower voltage to feed a 12 Ω resistive (heater) load.The schematic and the layout are attached (the MOSFETs are mounted on the bottom side of the PCB and connected to a heatsink).The problem is that the switch node starts ringing like crazy at lower output resistances (aka higher load).From what I have observed, the gate->source voltage (measured with the ground spring and an isolated power supply) of the high MOSFET has some oscillation even with light loads (before the switch node rings).So I think that this might be the root cause of the problem. With higher and higher loads the two "stages" of the switch node turn on phase get closer to each other. The ringing of the switch node starts as soon as both "stages" "meet". I understand that the gate driver uses a charge pump to drive the higher MOSFET, but I don't understand the delay between the "stages".In the attachments are two screenshots. Both show the switch node (SW to GND) and the MOSFET gate (Gate to Source) from individual measurements each (to prevent a short via the probe ground). One before the switch node rings (60 Vin, 20 Ω load, 10 % duty cycle), the other one while the switch node rings (60 Vin, 13 Ω load, 10 % duty cycle).

author: Slh
author_rank: Regular Contributor
timestamp: January 27, 2023, 05:14:44 pm
content: You want your input and output capacitance to be as close as possible to the half bridge. That's probably not helping you.I presume that's the gate driver on the right? It's just an SO8 package? It doesn't look like it's got adequate spacing between the top and bottom drivers for 300V.The variable delay is probably due to the fixed deadtime in the gate driver and the variable length of time it takes to charge the MOSFET output capacitance whic is quicker when the current is higher ( I = C dV/DT ).

author: ConnorGames
author_rank: Regular Contributor
timestamp: January 27, 2023, 05:34:55 pm
content: Your driver has an internal 100ns dead-time, and it looks like your switching may be slower than that. Do you have a way of limiting cross-conduction (MCU generated dead time)? This kind of gate ringing almost always couples in from the drain via the gate-drain capacitance. If your drain is ringing like crazy due to cross-conduction, so will your gate. As stated by the previous poster, your switching dynamics will change depending on load current as well: All, part, or none of the charging of the FET output capacitance (and thus required change in the switch node voltage) may be handled by your inductor current instead of FET turn-on (soft vs hard switching). This will depend on the sign and magnitude of the inductor current at the moment of switching, and the system dead-time. Reverse-recovery of the FET body diodes can also get wrapped up in this, but your scope-shots don't seem to show this happening for you. The capacitor location mentioned in the previous post is a fix you definitely should make. I would also re-route the SW trace to the drive chip be connected directly to the high FET source to reduce common-source inductance, and make the SW(to driver), LO, and HO traces wider.

author: Wolfram
author_rank: Frequent Contributor
timestamp: January 27, 2023, 06:12:38 pm
content: Something looks off on the scope shots, it seems like there's a time shift between the two traces.Looking at the switching node in the first shot, the lower device Vds starts rising around - 650 ns as the upper device turns off. dv/dt is given by the inductor current at the time of switching (ripple + load current), and it curves upwards as the non-linear MOSFET Cds falls with applied voltage. Then at T = 480 ns the upper device turns on, slewing the switching node voltage quickly up to the rail. I'd expect this to more or less coincide with the rise of upper device Vgs rising, and the ringing on Vgs is induced by the fast slewing of Vds here. You mention that Vgs is captured separately, so the two traces in your waveform are not time-synchronized, making the Vgs measuement in the scope shot a bit meaningless. I would recommend getting a differential probe to measure Vgs synchronously with Vds, to make a more meaningful reading. You can also look at the low-side Vgs and the low side Vds to avoid the need for a floating gate voltage measurement.For the second scope shot, could it be that you are entering discontinous current mode during the dead-time? At some point the switching node voltage stops changing, around 375 ns, which suggests that the inductor current goes to zero here. If you have a way to measure inductor current at the same time? This can give some insight into what's happening here.With non-isolated high side drivers, you can get unexpected behavior due to exceeding the driver CMTI rating, and also due to switching node voltage undershoot which brings the gate drive IC Vs below GND. I'd recommend going with fully isolated drivers to exclude this possibility, they are much more forgiving when it comes to ringing caused by device and layout parasitics.

author: StephanR
author_rank: Newbie
timestamp: January 27, 2023, 09:21:48 pm
content: Quote from: Slh on January 27, 2023, 05:14:44 pmFor a quick test I added 3*10 µF, 100 V ceramic capacitors (actual capacitance at 60 V is probably quite a bit smaller) directly between the legs of the MOSFETs (Vin, GND).This actually improves the overall situation quite a bit, especially looking at the current (in the attached comparison screenshot). But it feels like there is something else wrong...Quote from: Slh on January 27, 2023, 05:14:44 pmYes, the package is SO8. The part is rated for up to 600 V, so I assumed that the spacing is fine. I tried to spread the traces as soon as they leave the IC.Quote from: Slh on January 27, 2023, 05:14:44 pmI would have assumed, that the internal deadtime will be applied "once" (before even starting to turn the high MOSFET on).Coming from a computer science background instead of an electrical engineering background I probably misunderstood your answer.Just to illustrate my confusion about the "stage delay" I attached a gif where the load increases on every step. The new screenshots also include both gate voltages (without ground connection, measured on the MOSFET legs), the switch node (with ground spring) and the inductor current (I raised the inductor a couple of cm to be able to clamp on a Hantek CC-65).Quote from: ConnorGames on January 27, 2023, 05:34:55 pmYes, the microcontroller generates a user selectable deadtime. The new screenshots (waveforms are now in sync) hopefully capture this better. I think the delay is long enough so that there is no cross conduction (the MOSFETs have typically 23 ns turn-on and 79 ns turn-off delay), but correct me if I am wrong or if I miss something.Quote from: ConnorGames on January 27, 2023, 05:34:55 pmI will try to bring the capacitors closer (they are very bulky and I have some mechanical constraints) or at least add smaller (ceramic) capacitors closer to the h bridge. (see the screenshot with the added 30 µF)So you would rather route the SW trace from the boost capacitor under the high side gate resistor (on the bottom layer)?The traces are currently 0.5 mm wide. What width would you suggest? I think 1 mm is possible under the IC and 1.5 - 2.0 mm should be possible once I have no more pads nearby.Quote from: Wolfram on January 27, 2023, 06:12:38 pmYes, they were captured separately, now all waveform are time-synchronised (assuming there is no delay in the current probe). I have a Micsig DP10013 100 MHz differential probe on hand, but I assumed that it is unable to capture the very fast events, because of the long leads of the probe.Quote from: Wolfram on January 27, 2023, 06:12:38 pmI have added the inductor current to the measurements. The input PWM waveform to the gate driver is constant no matter what, so if the power stage works in a different mode, it is not on purpose.Quote from: Wolfram on January 27, 2023, 06:12:38 pmDo you have a specific recommendation for a fully isolated driver. My main concern are space and ease of use (I have never worked with these before).@all thank you very much for your time and recommendations.Edit: The gif does not seem to play once I upload it, so here it (hopefully) is in action:https://gifyu.com/image/SmQDN

author: Benta
author_rank: Super Contributor
timestamp: January 27, 2023, 11:34:09 pm
content: Why are you using a driver with dead-time? That's asking for serious trouble with a synchronous rectifier.I suppose your +13 V is for the VCC? That's OK.The high-frequency ringing happens when your inductor is starved of DC current (=dead-time); then inter-winding capacitance will turn it into a resonant tank circuit.The somewhat weird waveforms you see are because the reverse diode in the rectifier MOSFET tries to save the situation (but is too slow).Try replacing the synchronous rectifier with a simple ultrafast rectifier (just for experimentation purposes) and see how the circuit runs. Then you can start working with the synchronous rectification part.

author: StephanR
author_rank: Newbie
timestamp: January 28, 2023, 11:24:27 pm
content: Quote from: Benta on January 27, 2023, 11:34:09 pmThe dead time of the driver was chosen to prevent "most of the shoot through" in case the microcontroller generates a wrong signal (due to a bug or a hardware defect).Quote from: Benta on January 27, 2023, 11:34:09 pmI replaced the lower MOSFET with an ultra fast diode (RFN2LAM4STR, 22 ns reverse recovery), the new screenshot is attached to this post.Now the voltage ringing basically disappeared so my control signals are probably waaaay off. (I initially left the MCU generated dead time fairly long, thinking the body diode of the lower MOSFET can handle the task at light loads until I tuned the timing correctly, but it can't with 254 ns of typical reverse recovery time)The only thing ringing is the inductor current, but I am not sure if it is actually present or just noise that the Hantek current probe picks up.I am leaning towards classifying this as noise, since the voltages look fairly clean and the probe is very cheap.

author: StephanR
author_rank: Newbie
timestamp: January 29, 2023, 12:46:58 am
content: Quote from: StephanR on January 28, 2023, 11:24:27 pmI was a bit quick to blame the probe. Looking closer revealed that there is still some voltage ringing which I could get rid off (for now) by significantly increasing the upper MOSFETs gate resistance.Quote from: ConnorGames on January 27, 2023, 05:34:55 pmGetting back to this problem, I measured the voltage across the SW plane from the high MOSFETs source leg to the point where the boost capacitor is charged from. In an ideal world this should be 0 V, I expected a few mV, but actually there are a few Volts of difference. This certainly explains the ringing I saw on the high MOSFETs gate to source voltage.

author: StephanR
author_rank: Newbie
timestamp: February 12, 2023, 09:07:17 pm
content: After some measurements I finally found the root cause of my problem.As soon as the lower (synchronous) MOSFET is in the circuit (even if I only connect the drain and source legs and short the gate to keep it disabled and thus let the ultra fast rectifier handle the job) the ringing appears. So I measured its drain to source capacitance which is around 25.5 nF.If I replace this device with an IGBT (collector to emitter capacitance of only 0.5 nF) the buck converter works synchronously without ringing.So now (aside from a little voltage undershoot) the voltage waveform looks very clean (see attachment).Thanks again to everyone who helped to identify the problems of the design.Hopefully this will help others to solve similar problems in the future.

author: moffy
author_rank: Super Contributor
timestamp: February 12, 2023, 10:01:46 pm
content: That was an interesting and unexpected outcome, will keep it in mind.