What's 50 fF? - Page 1
Forum section: electronics / projects

author: ezalys
author_rank: Frequent Contributor
timestamp: January 26, 2022, 10:17:29 pm
content: I'm working on an amplifier that needs 50 fF of input capacitance -- which is an easy number to write on paper but extremely difficult to achieve in practice. In the interest of not spoiling the input characteristics of my FET -- what's 50 fF look like? If I take a 2 mm metal sphere, that's (4*pi*e0)*(1 mm)=100 fF, but I don't know how to extrapolate a sphere to a wire bond or what have you. Just looking for your experience!

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: January 26, 2022, 10:27:20 pm
content: It would like about half of one of thesehttps://www.digikey.ca/en/products/detail/murata-electronics/GCQ1555C1HR10BB01D/7803156I'm only kinda kidding, I don't have a good idea of what capacitance "means" outside of a physical part on a board, you know?But this sounds like some Ka stuff. This is where you need Southwest Microwave connectors that need screwing down to the board because the quality of the solder joint from the SMA to a microstrip determines the return loss so just don't put solder.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 26, 2022, 10:29:15 pm
content: Nothing achievable over any kind of size, that's for sure.Is this going to be a bootstrap application? (Sounds like it!)Tim

author: ezalys
author_rank: Frequent Contributor
timestamp: January 26, 2022, 10:34:29 pm
content: It's not. It's a HEMT or JFET being wire bonded directly onto the island whose charge I'm trying to sense -- it should all fit inside a few square mm.

author: ezalys
author_rank: Frequent Contributor
timestamp: January 26, 2022, 10:37:11 pm
content: And that capacitor is a bit funny. I believe there's 0.1 pF between the two leads, it's just that I imagine the self capacitance of each is probably a bit bigger -- but I don't know.

author: MK14
author_rank: Super Contributor
timestamp: January 26, 2022, 11:08:37 pm
content: Quote from: T3sl4co1l on January 26, 2022, 10:29:15 pmWhat exactly do you mean bybootstrap application, in this case ?Do you mean, allow the device to start running, by creating an initial voltage or something ?

author: TimFox
author_rank: Super Contributor
timestamp: January 26, 2022, 11:29:13 pm
content: "Bootstrapping" is careful application of positive feedback to a guard node or similar to effectively remove some capacitance from the circuit.

author: inse
author_rank: Super Contributor
timestamp: January 27, 2022, 05:34:59 am
content: What's 50 fF?Not much!Sorry, could not resist

author: ejeffrey
author_rank: Super Contributor
timestamp: January 27, 2022, 05:47:44 am
content: 50 femtofarad looks like 1.5 mm of 100 ohm transmission line. A wirebond of that length will have enough a significant fraction of your capacitance. It will also have inductance you probably can't ignore.50 fF is a pretty easy capacitance to produce on chip, islands of with sizes in the ~100 of um on a side will have capacitance to ground in the ~10s of fF (depending on a lot of factors), and for series capacitance you can use interdigitated capacitors to get similar values relatively easily.These are just approximate scales to get a starting point, if you want something accurate you probably need to simulate it.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 27, 2022, 09:57:05 am
content: Quote from: MK14 on January 26, 2022, 11:08:37 pmBootstrapping can drive parts of the circuit (e.g. the fet drain or some shields) to approximately the level of the input. This can reduce the effectice capacitance. So there is still a physical capacitance from the input to the driven parts, but it is not longer effective as the potential moves in parallel.It depends on the application if this trick helps: it helps when it comes to the frequency response, e.g. from a very high impedance source, but it does not really help with some noise effects.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 27, 2022, 10:05:27 am
content: Phil Hobbs had an application something like that, as I recall, for a wideband wafer probe sort of thing. So, a probe head that hovers over the target, and needs minuscule capacitance to avoid loading the target (which being in the middle of a chip, isn't low impedance). He used a bootstrapped JFET source follower, so that both drain is bootstrapped (coupled to same as output AC voltage), and guards/shields around the input (gate). I forget if that was using ordinary parts (e.g. BF862) or some combination of PHEMT and HBT. (The two are apparently a great combination, because one has quite high output conductance -- thus getting extra value from the drain bootstrap -- while the other has poor noise at low frequencies, or something like that. So, also good when the signal is taken from the collector of the stack, i.e., regular cascode.)(Note that a bootstrapped-drain source follower, is the same circuit as a cascode, except the source is allowed to move (CCS for bias, output taken from here), the drain/collector is grounded, and the cascode transistor is (at least) AC-coupled to the output. Whereas if the source is (AC-)grounded, the bootstrap voltage is also zero so we don't have to worry about any other changes there, and just add a load resistor and output connection at the top (+V end).)Tim

author: MK14
author_rank: Super Contributor
timestamp: January 27, 2022, 10:26:19 am
content: Thanks for all the explanations, about bootstraping (application).It's making a reasonable amount of sense to me now. As I see it, the transistors involved, are able to perform at incredibly high frequencies (>>GHz), but the laws of Physics, would still leave an immovable (but small amount of) capacitance at the 'input' (gate or whatever). So by introducing positive feedback, from the appropriate part of the circuit ('output'). It is making the ultra fast transistor, actually considerably remove the 'input' capacitance (effects/drag), and hence allow much high bandwidths (by virtually removing much of the inputs capacitance).It reminds me of how car power steering systems work, for removing the efforts of steering the wheels manually. Where the drag/friction/stiction/mass of the steering/wheels are analogous to a capacitance.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 27, 2022, 12:30:13 pm
content: Note that TANSTAAFL; you're improving the input, at expense to output loading, and eventually, stability (at some length [of the input structure], the input and bootstrap/shield will look like a 1/4 wave open stub transmission line, and you have an oscillator). A similar phenomenon is attempting to use active negative capacitance elements to improve a circuit: as it turns out, the impedance converter just can't run as fast as you want, and the problem ultimately reduces to any old peaking / feedback solution, with respect to the ultimate limits of node impedance and device capability.So, you can extend the envelope, maybe increasing bandwidth (at same input loading, flatness, etc.), or maybe you dramatically reduce input loading but sacrifice BW to do it (IIRC, Dr. Hobbs' example rolled off around 100MHz, despite using either low-GHz, or 10s-GHz, transistors -- depending on which thing I'm remembering, alas).Tim

author: MK14
author_rank: Super Contributor
timestamp: January 27, 2022, 01:59:37 pm
content: Quote from: T3sl4co1l on January 27, 2022, 12:30:13 pmWhile I was digesting your lovely post, I kept a reminder in my head to look up the technical term, which I'd never (remembered) hearing before 'TANSTAAFL', but it makes a lot of sense, now I looked it up.These explanations, have explained a number of puzzles I've had over a long period of time, as to why certain things couldn't/didn't exist in practice. I've sometimes seen these amazing looking transistors (a while ago, many seemed to have 4 leads coming out at 90 degrees between the leads). These days, especially (ignoring component shortages), mouthwatering specifications, such as 35GHz, yet not too expensive, perhaps $0.40 to $1.25 or so, depending on the exact part, and the quantity, bought.So, why the heck can't we go and make cheap/small, discrete part, 2GHz NE555 timers, comparators, and so forth. But as I can see from your post, and the other explanations. Some circuits, can practicably made, such as microwave amplifiers, radar detectors (as used in cheap person detectors, e.g. burglar alarms), and certain other microwave things. But, the other things I listed, (presumably/intuitively now I understand it better), can't realistically be made at such high frequencies.So, it is like going into an electronics lab, and them saying diagnose this very high frequency circuit for us. Feel free to use the 40GHz Oscilloscope on the bench, but we can only let you use this old/battered 50MHz probe with it, sorry.So on the one hand, I'd be excited by the 40GHz Oscilloscope, but the 50MHz scope probe, with its (highly likely), very significant probe capacitance, would mean that I would have a job, using the scope beyond, 20MHz or so (ignoring trick question cheats).So these 35GHz (or whatever they are these days) transistors are so tempting, yet would probably struggle to even reach the speeds of a normal (relatively slow) bjt, in most normal circuits. Apart from where those circuits which do allow extreme performance from them are used, along with the appropriate construction techniques, to go with it.Even with ECL logic, many of which can do ridiculously high speeds, compared to stuff like TTL/HC and faster logic series (discrete), with some exceptions. The very vast bulk of the time, no one, uses ECL for very high speed logic. They usually stick to 74LS/74S (in the past, somewhat obsolete now), and some of the later, and sometimes faster logic series. Because of all the (rumored and probably true really), difficulties with making transmission lines all over the place, relative incompatibility with normal logic voltages, tricky power supply requirements and other possible difficulties.So, the rare exceptions when ECL was used were things like very high frequency meters (a long time ago, higher freq meters used mixers/rf technology, to get into the many GHz bands, even if the ECL counters can't get anywhere near that high a freq, at that time), in the early divider stages, super high speed computers (e.g. Cray1), when that was the best/fastest technology available, in its day. But not really much else.So these amazing 35GHz (or whatever) transistors, seem such a waste, if they can only be used in so few applications, and even then, it is very tricky to design with them, it seems. Otherwise, we could be using 10GHz or 20GHz single thread cpus, by now.

author: fcb
author_rank: Super Contributor
timestamp: January 27, 2022, 02:10:26 pm
content: Quote from: Alex Eisenhut on January 26, 2022, 10:27:20 pm0.1pF +/- 0.1pF

author: MK14
author_rank: Super Contributor
timestamp: January 27, 2022, 02:24:01 pm
content: Quote from: fcb on January 27, 2022, 02:10:26 pmIt's easy. Just bin the value on the production line, and then unchangingly fix/freeze, the other parameters, such as the weather, humidity, precise temperature, stop all aging, use magic to fix drift and always keep it orientated in exactly the same place.

author: mawyatt
author_rank: Super Contributor
timestamp: January 27, 2022, 02:58:06 pm
content: Quote from: T3sl4co1l on January 27, 2022, 12:30:13 pmWe did some work awhile back with Non-Foster Networks and using NICs to create negative capacitances, also had the benefit of the key research principles behind this employed within the same company (their company was acquired, like ours). Anyway, we had the benefit of fractional THz SiGe transistors, which let us push this much higher than was open published, the main use was for very broadband physically small antennas.Interesting stuff indeed!!!Best,

author: mawyatt
author_rank: Super Contributor
timestamp: January 27, 2022, 03:46:38 pm
content: Quote from: MK14 on January 27, 2022, 01:59:37 pmThe problem with very high speed packaged transistors is the package almost dictates the ultimate performance. Here's where an IC solution allows much better performance because of the physical dimensions involved.QuoteOne could indeed make a 555 with some fast transistors, however the performance would be limited by the package, and with other methods to achieve nanosecond or faster pulses likely not of much practical use. However, this would be an interesting project of a EE student!!QuoteYes ECL and CML (also SCL) is a pain to work with, unless you really need the speed. CMOS 74AC and ACT logic is pretty easy to use for moderately high speeds and a good replacement for the older 74LS and S Logic.An interesting story behind the development of Silicon Germanium HBT bipolar technology goes back to IBM in the 80s, they wanted to get a faster IBM360 Mainframe which was done with ECL and CML, thus wanted a faster bipolar device. Drs Bernard Meyerson and David Harame were tasked with developing a faster bipolar transistor, and they developed the UHVCD technique for depositing the Ge implants in a Si process, thus creating a SiGe HBT. These SiGe devices were considerably faster than equivalent Si devices, but IBM had decided to go with a parallel CMOS CPU solution rather than a single fast CPU and thus looked for another market for these very fast HBT devices. That market turned out to be in the RF/MW/MMW and other very fast analog uses, as well as the orginial intended ECL/CML use. Various flavors of the BiCMOS SiGe process evolved over the decades producing HBT devices with ~500GHz Ft.Long ago we began taking advantage of faster devices employing older analog techniques with newer faster transistors. DARPA picked up on this and funded the development of an InP 100GHz Op-Amp where one could use active filter techniques at GHz frequencies and so on. We utilized the old vacuum tube technology Cherry-Hooper amplifier topology in various flavors of SiGe and InP HBTs and also the 1970s Caprio Cell for ultra-low distortion use, combining both in InP with a new type mixer with a simulated ~50dBm OIP.So lots of interest in employing these fast HBTs devices in some of the older techniques, if one can get around the package limitations where an integrated solution benefits!!Best,

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 27, 2022, 04:20:52 pm
content: Quote from: MK14 on January 27, 2022, 01:59:37 pmKeep in mind, what's possible is far broader than what's available. What's available, is possible, AND has been developed into a product, AND is a commercially successful product (at least, more or less, depending on how much investment or loss-leading the manufacturer might be using with that product/line..). If you want just the first one, pick up some time at a research lab, and bright a hearty budget; the second, move it out of the research lab into a commercial development lab; only the last one is available from suppliers, and at that, not necessarily at any kind of affordable cost still. There's a lot of hurdles to pass before something winds up on Digi-Key!So, 2GHz 555s are perfectly feasible, I'm pretty sure -- but no one wants them. You can get close right now, with an equivalent made from ECL or what have you -- check out what kinds of timers, one-shots, etc. are available. I don't know much about ECL families; I'm guessing there are some?I know, it was just an example of course. But, that said, it can be interesting to do a design experiment like that -- follow through and see how close you can actually get, off-the-shelf, and what the performance specs would be. (For my part, I've designed a current-limiting switch using discrete transistors, with about 3 times lower power consumption than any building-block solution -- trouble is, the sheer parts count means it costs more. It's not that such a function is impossible in IC, it would trivially do 10x better than my version; there just doesn't happen to be a commercial offering of it!)And there's lots of reasons besides profitability:- Such a fast timer is a liability, not an asset, in most applications -- you need to manage the sub-100ps risetime, somehow not letting it radiate, while also hopefully getting all your timing components close enough to the poor chip that stray inductances (transmission line lengths, really) don't completely smash the response, making it some mixture of LC oscillator rather than just the RC that was intended.- The operating voltage must be quite low, or the power dissipation will be extraordinary (I'd guess most such circuits run at 2.5V or below, if CMOS, and ECL a bit higher). If you wanted say 5V of output swing, or even 15V, at 2GHz -- you'll be paying for it with a whole chain of power amplifiers!- And again, it's about transmission lines -- their use is an unavoidable necessity. You can't drive a net and wait for it to settle, like you can with CMOS or TTL. Practical nets are some cm long, while the 1/4 wave is some mm (depending on whether you're counting just the edge (harmonics), or the whole waveform as such). It's always waves in flight. So you can't make an assumption like, "this pin will draw some current during the edge, but it'll eventually settle down, so we don't need to waste much space on power dissipation for these output transistors" -- instead, those waves need to dump into a (termination) resistor eventually, lest they come back around and dirty up the signal.- And who needs an RC timer? Most applications up there are radio-related, so, very precise frequency control is required. (Not all of them; spread spectrum might be a virtue for CPU clocking for example!) You're only going to do that with a quartz reference and PLL multiplier.But outside board-level components -- there are applications on-chip. Most PLLs, AFAIK, are some form of this. Greatly simplified, since they don't need the versatile trigger/threshold function, but in the general sense that it's an RC circuit, yeah. Typical example is a ring oscillator, where the resistance is some combination of device transconductance and Rds(on), and capacitance is node / body C. By varying the bias current into the amp stages / inverters, the frequency is controlled. Hook that to an error amp and phase detector, and you've got yourself a PLL.So, in a sense, you're not wrong, about thinking about something like that -- it's just not something you'll see in catalogs, but very much out of sight, tossed in a boring corner of many ICs, just another piece of invisible fabric supporting a vastly more complex whole.Regarding clock speeds in general -- fT can be seen as an upper limit for edge rates or propagation delays; only the simplest circuits can run at some fraction of fT, or indeed above it (usually using distributed amplifiers). CPUs have to run a small fraction of this rate, due to the complexity of the gate chains, and bus lengths, used to implement them. Only very simple CPUs could run that fast (sub-100GHz say), and they'd be utterly useless for any kind of real work (an 8051 running this fast, is absolutely no competition against a modern 64-bit machine at 4GHz).Kind of a small example of this, and heh, a bit less useless, actually a practical example. Compare PIC to AVR for example: PIC is an ancient 8-bit (give or take extensions) architecture, based on a 4-clock (mostly?) instruction cycle. AVR is (mostly) single-cycle. A lot of PICs run up to 64MHz, for 16MIPS performance; a lot of AVRs run up to 20MHz, for ~20MIPS performance. Both are 8-bit, both have various peripherals, memory (and give or take penalties for accessing certain memory spaces, or competing with DMA bus access, etc.), and, they're fairly close, considering. Mind, these are 3.3-5V fabbed parts.Or compare further to non-pipelined ARMs (Cortex M0 something or other). Typically topping out at 30-60MHz, 3.3V operation. A bit finer fab scale, but much wider buses, far more powerful as a result. (Adding in pipelines and caches, operation blasts up to 200MHz or so; although some/most of these may be internal low-voltage core designs, I'm not sure.)Or taking things in yet another direction -- there was a fairly reasonable op-amp I was looking at some years ago, I forget what part, something Analog Devices. Somewhat over 20MHz GBW, precision inputs, RRIO, 16V supply limit or something like that, I think -- competitive price too. The hook is this: supply current is just a bit lower than everyone else's, oh and by the way they're using their proprietary SiGe process to do it (XFCB I think?). Bwha!? Yes indeed, using seemingly RF-geared tech just to get a higher figure of merit (namely GBW/Iq: in most things, opamps, comparators, etc., you pay for bandwidth with bias current) than its conventional relatives. And unlike CMOS which has to run at lower voltages for greater speed (there are indeed many fantastic <=5V or <=3.3V amps, comparators, etc. out there in CMOS), HBTs (SiGe) are perfectly comfortable mixed with conventional BiCMOS designs.So they can sneak in that high technology, right under your nose, in other ways too.QuoteYeah -- the probe itself wouldn't be necessarily a problem for sheer frequency response, but flatness along with it, good luck. That's why e.g. 500MHz probes have smaller ground leads and tips, and pretty much anything above that you need either a special probe, or just route the damn signal into a coax connector and view it directly.And, again about feasibility: 40GHz scopes do indeed exist; they're very complex to make, and though there isn't much demand for them -- that's paid for by the serious need customers have for such equipment. And yeah, you're definitely using the right hardware to hook up one of those beasts, probes are irrelevant up there.Also, oh good, mawyatt's joined the thread. Definitely take his real IC experience over my mere suppositions of the market.Tim

author: Bud
author_rank: Super Contributor
timestamp: January 27, 2022, 04:53:18 pm
content: 50 fF is close to fringing capacitance of an open SMA connector. Do not know how easy that value of capacitance can be realized on a chip.

author: mawyatt
author_rank: Super Contributor
timestamp: January 27, 2022, 05:02:58 pm
content: Another important aspect of dealing with higher speed devices is the model. For SiGe HBT this started out with VBIC which proved inadequate in representing the device at high current densities at high speeds, MEXTRAM and HICUM HBT models have better fidelity under these conditions. For CMOS the BSIM4 model had a fatal flaw in the channel conductance, and later Berkley developed the BSIM6 model to address this.Was told by some IBM folks that a good SiGe HBT device model in their BiCMOS process cost ~$1M to develop, so actual usage must be high to support this model investment. Keysight wasn't satisfied with the standard HBT device model with their InP process, so they developed a custom HBT model. You can only imagine how much investment this required.Best,

author: mawyatt
author_rank: Super Contributor
timestamp: January 27, 2022, 05:04:40 pm
content: Quote from: Bud on January 27, 2022, 04:53:18 pmOn chip this can be easily achieved, the issue is getting on/off the chip, even flip-chip with ball bonds.Best,

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 27, 2022, 05:49:01 pm
content: Yep. But what kind of application would require such a low capacitance *off-chip*?

author: ezalys
author_rank: Frequent Contributor
timestamp: January 27, 2022, 09:56:53 pm
content: This is for research on van der waals heterostructures. I can’t put transistors on the chip containing the sample. Whatever I make has to be on the tip of a probe, or glued on top of the sample I’m provided.

author: ezalys
author_rank: Frequent Contributor
timestamp: January 27, 2022, 10:01:23 pm
content: And yes, we’ve considered bump bonding. It’s just that I don’t know where I can get discrete transistors that have been bumped. We also have particular HEMTs we like. We might try an SET, which we can make and bump.

author: ejeffrey
author_rank: Super Contributor
timestamp: January 27, 2022, 10:29:43 pm
content: How big is the structure you are measuring? What is it's self capacitance? If that is over 50 fF then there isn't much you can do.How broad band do you need the match? If you are OK with narrowband performance you can fix almost anything.Do you have access to HFSS? Honestly that's probably the best way to figure it out. Simulate a structure you think you can build and see what the capacitance is and how close you are to what you need and whether you can get there by tweaking or if you need to find a different transistor.

author: ezalys
author_rank: Frequent Contributor
timestamp: January 27, 2022, 11:42:13 pm
content: Yeah we have HFSS, maxwell, sonnet, all the fun stuff. Sometimes you just want some intuition before you open the software.

author: MK14
author_rank: Super Contributor
timestamp: January 28, 2022, 10:03:01 pm
content: Quote from: mawyatt on January 27, 2022, 03:46:38 pmI see, that makes a lot of sense. I assume, one of the reasons why high frequency MCUs/FPGAs (e.g. 500MHz internal clock), have much lower external frequencies, such as (perhaps) 50MHz external port frequency (maximum port toggle rates), and maybe 16MHz external Quartz clock frequencies. With appropriate PLLs and internal clock dividers, to compensate. It probably also reduces the power consumption, as well.Quote from: mawyatt on January 27, 2022, 03:46:38 pmAlso, unlike a normal NE555/LMC555, which can be designed with, even by beginners of electronics. Just needing a few passives and simple connection techniques. A 2GHz version, would probably need specialist external parts, highly specialized PCB design/construction, and very significant electronics design skill indeed, unless using the standard application note circuits (which would probably exist, if such a part is possible/practicable).Some parts of it, could probably use techniques, a bit like in my paragraph above. E.g. consider the timing rate adjusting resistor (very rough approximation of how a 555 works). It might be possible for it to simply adjust an internal high quality/performance constant current generator, so externally the timing control resistor is running at almost DC (frequency), but internally, the constant current generator, could be connected to 2GHz sections. Solutions around NOT having a high frequency external capacitor are also probably possible. Such as an internal switchable selection of a few different values, and binary divider modes, for slower frequencies.It might be possible (when it is an oscillator), to use PLL and/or DDS techniques (internally), to make it controllable externally via very low frequncies, potentially more stable, and other possible benefitsSuch modules or ICs already exist, such as the AD9956, which seems to claim 2.7GHz. It is NOT a 555 as such, but maybe could be modified to be more like it.https://www.analog.com/media/en/technical-documentation/data-sheets/AD9956.pdfSimilarly, perhaps external logic level signals, could change the internal configuration, between monostable, One-Shot or retriggerable, oscillator, PWM and perhaps other modes. But the final output (possibly differential, which could/maybe help), would still be problematic, and perhaps cause big current/power consumption.Quote from: mawyatt on January 27, 2022, 03:46:38 pmTrue. I incorrectly (when first reading your post), thought CML was another description of ECL. But no, Current Mode Logic, is something different, again. Interesting as well, as it can give very low power consumption. Despite very high maximum speeds.Quote from: mawyatt on January 27, 2022, 03:46:38 pmThanks, that was very interesting, and really amazing!So, something originally intended, for high speed (computer) logic, ironically ended up helping make very high performance analogue stuff!As regards Drs Bernard Meyerson and David Harame. I have heard that much of the integrated circuit development, really comes from excellent quality (inventive/innovative) Process Engineers, who really do at times, most/some of the work. But often get little or no recognition, for their immense work. E.g.https://en.wikipedia.org/wiki/Bob_Widlarwho created some useful analogue stuff, including op-amps, a long time ago, and is partly well known in electronics circles. But David Talbert, was also a very important player (possibly incorrect information by me and/or subjective), as the process engineer, yet David Talbert, is probably a lot less well known. Also, I've heard similar criticism, because the bosses/leaders are famous for such things, but it is really the people below them that did all the work, and developed the stuff.It is tricky. In some cases the leaders were the motivation/innovating force, and deserve the credits they got. But in other cases, they were simply the boss, and didn't really participate in the invention(s).A long while ago, things/people often seemed to say that Gallium devices would replace Silicon parts in computers, and would make Silicon become obsolete. Clearly that hasn't happened (although I'm typing this, with my LED lighting/monitors/TVs/torches which are Gallium (compound) LED powered, so they were not completely wrong. I also seem to remember that some Gallium semiconductor/IC devices, did appear at some points in time (maybe they still exist).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 28, 2022, 10:36:03 pm
content: Yeah, there was a Cray (Cray-1?) made with GaAs NMOS. Which like Si NMOS, was an absolute pig on power dissipation. GaAs CMOS isn't a thing: hole mobility is a tiny fraction of electron mobility, so the Rds(on)*Cg figure of merit is atrocious. So it's all just NMOS (which perform, what is it, 2-3x better than Si?) with passive pullup resistors. And Idunno probably some source followers and the other usual trickery that makes NMOS a little better, but this is largely how NMOS is done, just pullups and open-drain NMOS wired up.Nowadays, GaAs FETs aren't so important anymore I think, and GaN is the way to go? It's mature enough that power devices up to (over? I forget) 600V are available; still rather fragile to use, not to mentionscreamingfast, but when you want the absolute best in efficiency and power density, you can go out and do it today with standard products.And indeed, GaN is in mainstream production for LEDs, quite nice.There's also InP which, I forget how the properties compare to GaAs and GaN, or why it's so popular for random monolithic builds exactly, but there's a bunch of crazy stuff like THz distributed amplifiers made on it.Tim

author: mawyatt
author_rank: Super Contributor
timestamp: January 28, 2022, 11:58:49 pm
content: Quote from: T3sl4co1l on January 28, 2022, 10:36:03 pmFunny you mention that!! I argued that very Solid State Physics fact in 80s about hole/electron mobility against a GaAs CMOS that Honeywell was developing. They wanted to have a process that would produce a Rad-Hard Space Computer that was also very fast, and even got a bunch of USG funding!! I lost this argument on a number of occasions, and basically was told to "go away, you don't know anything about GaAs!!". They did end up getting it to work, but had to make the P channel devices something like 6~10X the size of the N channel, then it had to work only on negative edge logic because of the weaker and high capacitance P channel (too slow rising edge) and it wasn't fast and very power hungry. Recall the Silicon on Insulator CMOS out performed the GaAs CMOS in almost every way, so after dumping ~$1B into the GaAs CMOS fab process & designs it was abandoned, and nobody remembered those earlier discussions about hole mobility in GaAsOne good thing did come out of this doomed endeavor tho, the GaAs N Channel devices were used in a new very high frequency Switchmode power converter employing a new planar transformer that GE had developed. This ended up in various avionics systems to supply the DC power for the electronics, and saved considerable size and weight. Much later these GaAs N Channel devices were replaced with GaN with even better performance.Best,

author: mawyatt
author_rank: Super Contributor
timestamp: January 29, 2022, 12:14:15 am
content: Quote from: MK14 on January 28, 2022, 10:03:01 pmThe first we heard of this new IBM SiGe BiCMOS technology was by means of a 12 Bit 1GSPS DAC back in early 90s that I think Analog Devices had designed. IBM made well over 2B SiGe Power Amplifiers for cell phones, the SiGe replaced the GaAs PAs. We ended up first using it in the first RF System on Chip (RFSoC) back in 2000 which had an entire MW Transceiver, a few CPUs, an FPGA and a bunch of memory.Best,Edit: BTW almost all advanced CMOS silicon processes today are developed to support digital, analog is just an afterthought. As an analog/RF/MW IC designer in advanced CMOS, you just have to use what the digital folks give you.

author: MK14
author_rank: Super Contributor
timestamp: January 29, 2022, 12:29:52 am
content: Thanks for the interesting post, Tim! (the one I'm replying to, here)Quote from: T3sl4co1l on January 27, 2022, 04:20:52 pmYes. The Intel 4004 is on record for being the first (1971) commercially available, single chip microprocessor. but it was not only possible, to do these before then. They actually did (for a US fighter jet, it even hard built in hardware floating point, which is quite amazing for the time). But it was both secret (military) and not commercially available, so is not usually considered first, even though it was around and in use, before the Intel 4004. Also, at a much later point, someone claiming (it probably was them) to be the inventor of that military air-craft, rather advanced cpu. Actually complaining on this very forum, about their lack of recognition, for inventing an earlier microprocessor.https://www.eevblog.com/forum/chat/first-microprocessor-mp-944-and-the-f-14-cadc/msg1600678/#msg1600678Invented by: Ray Holthttps://en.wikipedia.org/wiki/Ray_HoltQuote from: T3sl4co1l on January 27, 2022, 04:20:52 pmI'm very tempted, and hoping to have time/motivation, to do it. Initially, via simulation, and see what I can come up with (LTSpice). Simulation will largely eliminate the difficulties of putting together, >2GHz circuits, and save phenomenal amounts of time/cost. I've forgotten the exact price on huge tens of GHz oscilloscopes, but I can remember it had way, way too many zeros, on the right hand side of the asking price!Similarly, I don't know the price of suitable probes (or whatever is needed) at those kinds of frequencies, but that would also probably be very large as well, I assume.Quote from: T3sl4co1l on January 27, 2022, 04:20:52 pmI sometimes wonder, as surface mount components, get smaller and smaller. Especially when they are so tiny, hand assembly is considered not practicable/possible, by most people. But could that mean, as/when they get small enough, having them assembled onto a suitable PCB. Would result in something having extremely high/fast speed characteristics. I.e. would be like a large features (i.e. old technology), IC process. But without the huge cost, big delays to getting the prototypes made (like months), and other hassles/inconveniences of having prototype ICs made.For example; One could design an circuit, which is similar to the worlds first microprocessor, the Intel 4004 . Using a 1,000 or 1,500, and more if necessary, of the smallest available SMD transistors, to create an IC like, tiny PCB. For fun, and maybe boasting privileges.A while ago, someone made a 6502 microprocessor, out of discrete mosfets, on a PCB, which was something like 2 or so feet, in both directions (square). I.e. rather big, but it worked well (but a fair bit slower than the original, which probably goes to show how good, even ancient chips are, at reducing stray capacitance/inductance and other effects, which allows the ICs to perform at much better speeds, than typical physical PCB discrete component designs. Especially since the original 6502s 1MHz clock frequency, sounds so low/slow by today's standards.Quote from: T3sl4co1l on January 27, 2022, 04:20:52 pmWell, I'm not so sure about that bit. You are basically, completely right. But some big/fast CPUs, have already started including, potentially very fast, tiny/small CPU cores as well as the big, fast and powerful main cores. Examples we seem to see today, are where the I/O block(s), have one or more, very fast, very tiny CPU core or cores. Which allow very short/simple programs, to allow simpler I/O functions, to occur rapidly in real-time, relatively independently of the main CPU core(s). With no main CPU core(s) interrupt latency time needed, either.Alternatively, they can carry on running at rather low frequencies, while the main CPU core(s) are powered down (sleep mode or similar). Hence using tiny amounts of power, while waiting for a keypress, or sensor signal etc.Recent examples are ESP32-S3 (these cpus, can be so simple, they are called FSM and/or can be switched between being a Finite State Machine or cpu (small RISCV) like functionality, which the ESP32-S3 allows.Also the Raspberry PI PICO RP2040, with what it calls its 'PIO' state machines.N.B. An FSM is NOT a cpu, strictly speaking. But it follows the concept of having a tiny CPU core, inside a big CPU core. Anyway, the ESP32-S3, at least one very small RISCV cpu, which counts, even though it runs at a much lower frequency, currently (for huge power saving benefits, to give it limited software capabilities, while only using relatively tiny amounts of power. E.g. logging sensor history, even while the device is supposedly switched off, such as room temperature trends).In fairness to yourself, they are not necessarily higher clock frequency than the main CPU. But it might happen in the future. E.g. The Raspberry PI PICO's, PIO feature is so fast and flexible, it can be programmed to be a fast video chip. and continually output images equivalent of the old classic BBC Microcomputer, while leaving the main CPUs, to do other things, as regards processing loads.

author: mawyatt
author_rank: Super Contributor
timestamp: January 29, 2022, 12:47:37 am
content: The speed limitation with todays small featured CMOS processors is not the device speed but thermal limitations, it' been that way for some time now.Best,

author: MK14
author_rank: Super Contributor
timestamp: January 29, 2022, 12:54:35 am
content: Quote from: mawyatt on January 29, 2022, 12:14:15 amHow the heck they can get the 12th (least significant bit), to settle at the right voltage, in such a relatively tiny amount of time (a nanosecond), despite a degree of capacitance. Can hurt my head. You can have 12 resistors, with each one double the next ones value, but the 12th one becomes such a large value, it intuitively will take ages, to settle the capacitance involved voltage, to the correct 12th bit. Off-hand, I'd need to look up R .. 2R ladders, and things like that, to better understand it.Presumably/maybe they are really just super fast analogue to digital converters, as those can be configured in some circuits (I think it was the art of electronics books, where I found it), to act as a DAC, via the very fast A2D converters. I vaguely remember op-amps, in the middle of such circuits. So I suppose, that makes sense, as the op-amp would force the capacitance involved to become the correct voltage (loop closed by A2D converters), rather than waiting for huge setting times, if it was resistor ladder based.Quote from: mawyatt on January 29, 2022, 12:14:15 amYes, I heard a lot about that. Apparently, Tektronix (oscilloscopes), quite a long time ago. Had huge difficulties, getting hold of companies, who could/would make the necessary analogue ICs, for Tektronix's, continually improving oscilloscopes. So, eventually they decided to build their own integrated circuit, plant. Just to make their very own analogue integrated circuits. As they didn't have to play second Fiddle to digital IC production, and could optimize it just for analogue, to their liking.I think the wafers, were around 2 to 2.5 inches, at that time.There were also some Tektronix custom digital ICs, for things like drawing characters on oscilloscope screens. I'm not sure if the custom digital chips, were made in that facility, or farmed out to another company.To my huge surprise, somewhat early IC production, didn't use (expensive) clean rooms. Clean rooms weren't used until smaller feature sizes, came into play. So, some early IC manufacturing, was not that difficult, or uncommon, a very long time ago.I wonder if, sooner of later, perhaps in China. Amazingly affordable custom IC manufacturing will become available. FPGAs (in my view), already give what is essentially a full high speed, custom digital IC, to all intenses and purposes, even if it is more expensive, slower, and technically speaking NOT a real custom IC part.

author: mawyatt
author_rank: Super Contributor
timestamp: January 29, 2022, 01:15:18 am
content: Recall the SiGe DAC was a classic R-2R ladder and a switchable current source. If you search the IEEE SSJ, you can find many references on DACs. On particular SiGe DAC was developed by Keysight that employed a classic binary weighted 8 bit DAC with a 6 bit DAC for the upper bits in a 14 bit segmented architecture. This utilized a Dynamic Element Matching technique for the upper bits to achieve -90dBc SFDR at 12GPSPS, they published the predecessor to the DAC in the SSJ around ~2007 I recall. At the time we were briefed (actually saw this at the MTT in 2009) they were well on their way to another DAC that had targets of better than -100dBc SFDR at >20GSPS.Here's a picture from way back of the 12GSPS DAC called Griffin (actually much faster than that).Best,

author: MK14
author_rank: Super Contributor
timestamp: January 29, 2022, 01:16:44 am
content: Quote from: mawyatt on January 29, 2022, 12:47:37 amAssuming you were referring to my post(s). The upper frequencies, are no higher, than the fastest frequencies already in the cpus I was talking about. But the relatively large number of logic delays needed, in order for the big main processor, to calculate powerful things, such as floating point. Are not needed in a tiny CPU or FSM, with a tiny and very simple instruction set, it needs (potentially) few logic delays, per clock cycle. So can run at far higher frequencies, while still keep the IC transistors at the same frequency, as the main processor(s).I.e. If each transistor stage (logic gate), takes 100ps, and there are 20 logic gates worth of delay, for the main cpu (per pipeline stage). It can run at 20 x 100ps = 500MHz. Ignoring safety margins and other real life practicalities.But if a tiny CPU or FSM, only needs 5 logic gates worth of delays, with the same 100ps per transistor/gate stage. Then it can run at 100 x 5 = 500ps = 2GHz.If I remember correctly, there is some internal trickery, which allows the 2GHz section, to effectively run at 2GHz, despite actually running at a lower physical frequency (1GHz ?). Which is some technique (I've forgotten), like double edge clock triggering, or very advanced, clock phase distribution. Whereby the clock is kept at 500MHz, distributed to where it needs to be, then double edge clocking and/or local PLL and/or phased clock techniques (whatever its called), allow it to effectively perform at 2GHz worth of operations, while not consuming the huge amount of power it might/would, if it reached the true GHz needed for a simple, one phase clock.

author: MK14
author_rank: Super Contributor
timestamp: January 29, 2022, 01:57:37 am
content: Quote from: mawyatt on January 28, 2022, 11:58:49 pmThat's sad. A pity they didn't listen to you.I've encountered that sort of situation myself. What can be even more annoying, is that nobody remembers the original discussions, except the person, who pointed out the serious problems, long before things went horribly wrong.In all fairness to everyone, it is difficult to accurately predict the future. Sometimes things seem virtually impossible to get right. Nethertheless, it does eventually get sorted out and invented.For a long time, most people thought computers would never beat humans at Chess, or at least not for another 50 or 100 years. But the huge pace of ever faster CPUs, ended that argument.Computer Speech recognition, was also considered a hurdle, that would take a very long time to master. Yet we now have Amazons Alexa, and other speech recognition devices.I suppose the current argument, would be when/if we will have self-driving cars, in a big way, in most road systems round the world. Will it be now, 5, 10, 25, 50 or even 100 years into the future ?

author: mawyatt
author_rank: Super Contributor
timestamp: January 29, 2022, 02:12:31 am
content: QuoteVery interesting, didn't know that history. Thanks!!Best,Edit: Back in those days the the military and various USG agencies led the advanced silicon developments, but after the advent of the PC the tide began to shift towards commercial and mostly CMOS. After the arrival of cell phone, the acceleration rate in commercial CMOS completely outpaced any government investment and quickly became the flagship technology we see today.

author: MK14
author_rank: Super Contributor
timestamp: January 29, 2022, 04:29:23 pm
content: Quote from: mawyatt on January 29, 2022, 02:12:31 amThe big, almost certainly confirmed rumor (expanding on what you just said), is that around the late 1950s, and early 1960s, they (US), were extremely worried about the Cold War, especially if it went nuclear. The electronics of the time, would have meant (for precise navigation and location calculations and things) strapping a massive, multi-cabinet Mainframe computer, on top of a ballistic missile. Maybe not impossible as a payload, but highly impracticable, and would be difficult to power and there would be many other problems, like surviving the G-forces, at times, during the flight.So, the US Government, poured a ridiculously (normally impracticable) amount of money, into getting, what ended up being the TTL 7400 Integrated Circuits. Which could be turned into, (relatively) much more compact units (computers), for fitting to ballistic missiles. Hence the TTL 7400, helped launch the modern computer technology.There were also, partly competing (or earlier), logic IC types, such as Resistor Transistor Logic (RTL), and Diode Transistor Logic (DTL). But I recently read, that Fairchild, had developed, the best Logic Gates of the time (effectively the first good TTL or similar technology).So, Texas Instruments (TI), realized how good they were, and tried VERY hard to buy a licence to make them, from Fairchild. But they refused to make a deal (they later acknowledged it was a big mistake on their part), so TI, made their own versions of the chips, anyway (I'm not sure of the right terminology for that time, but it was something like 'clone', 'copy but changed enough to NOT go to court', or similar versions). Hence the (US/TI) TTL 7400 logic devices were born, and the military spec'd/cased versions, were used in the applicable military projects.The 74181 (ALU), could with suitable surrounding TTL chips, be made into a reasonably compact and powerful, computer. Suitable for going somewhere inside a ballistic missile, and with not too unreasonable power requirements. Perhaps compact suitcase sized, depending on its specifications and the 74 packages used.Off-hand, I'm not sure of the various internet source(s), I read, somewhat recently about it. But I just had a quick look, and found this:https://computerhistory.org/blog/the-rise-of-ttl-how-fairchild-won-a-battle-but-lost-the-war/EDIT: I mentioned UK (Fairchild), but the source doesn't (it says US), so I removed references to the UK from my post.