30V 3A power supply oscillating - Page 1
Forum section: electronics / beginners

author: polis93
author_rank: Newbie
timestamp: April 10, 2016, 11:37:11 am
content: Hello,newbie here. I've built this power supply:http://www.electronics-lab.com/project/0-30-vdc-stabilized-power-supply-with-current-control-0-002-3-a/It works, but it starts to oscillate when current reaches aprox. 0.5A. I tried add small capacitor to the output, but it didn't help at all.Please, has anyone idea how to fix this?Thaks

author: danadak
author_rank: Super Contributor
timestamp: April 10, 2016, 11:53:27 am
content: The TL081 is a fairly fast OpAmp, and datasheet does not discuss effects of C loading.A quick test is to switch a load, say at a 1 Khz rate, with a MOSFET and look attransient response. If you see a lot of ringing the control loop phase margin istoo low. Instead of lod switching you can attach a load, and inject into controlloop a transient as stimulus.http://www.planetanalog.com/author.asp?section_id=3117&doc_id=560860Any caps associate with OpAmp wired mistakenly to ground at one of the inputs ? Or fdbk Rwrong value.Regards, Dana.

author: Andy Watson
author_rank: Super Contributor
timestamp: April 10, 2016, 12:21:29 pm
content: Oh dear, not this design again! It keeps coming back like a bad penny.Can you determine which control loop is being unstable, i.e. is it the current or the voltage loop? The relatively low current would lead me to guess the voltage loop - but that is just a guess. Have you constructed it exactly as specified in the circuit diagram - exactly the same components, etc.?Is R7 non-inductive?If you are certain that your construction is correct I would use a SPICE program to simulate the control loops (much cheaper than blowing-up stuff!) In particular I would look at increasing the value of C9 for the voltage control and C8 for the current control.

author: danadak
author_rank: Super Contributor
timestamp: April 10, 2016, 12:51:33 pm
content: I also do not see any byapssing at OpAmp power supply pins. "Normally" that isa bulk cap and a cermamic disk, .01 and .1 uF, all 3 paralleled. Both power pins,V+ and V-What is the osc frequency ?The Q1 clamp is not exactly the best approach, as it discharges significant charge from C1,not sure that is the best way of handling sequencing problem.Regards, Dana.

author: polis93
author_rank: Newbie
timestamp: April 10, 2016, 01:13:47 pm
content: Frequency is 28.5kHz. I icreased capacity of C8 and C9, added bypass capacitors to all 3 OP amps, but everything is the same.

author: mikerj
author_rank: Super Contributor
timestamp: April 10, 2016, 04:38:51 pm
content: What are you trying to power, a simple restive load or some kind of active or inductive load?

author: mij59
author_rank: Frequent Contributor
timestamp: April 10, 2016, 05:05:42 pm
content: Could also be a layout problem, please post a photo of the setup, pcb .

author: smkb
author_rank: Contributor
timestamp: April 10, 2016, 07:16:15 pm
content: My 2 cents regarding schematics:TL081 is 36V rated (absolute ratings) so there is very thin margin for mains (230) fluctuation or even there is no margin at all.Thus U2, U3 can be broken and it is highly possible.I would replace them with LM741 or 741A but C. These are old, good, industrial well known opamps with 44V supply range (means good enough for this application).They are even better with Voffset if compared to TL081.Input currents are much worse obviosuly but who cares if feedback resistors are several tenths of kOhms - it does not matter.this is just supply unit but reference voltage/current source.I dislike Q1 collector connected to U2 output. Shorting opamp output is simply daft despite of that outputs are protected (at some degree) - still daft I say.This could be rectified if R15 was split into two resistors ca 500 + 500R and Q1.C should be connected in the middle of them. exact value of R15 does not matter.Regarding C8 and C9 - these are for local opamp "hi(gher) frq" stability but more important is C6 which is a part of volatge closed loop.I will not be surprised if change to its capacitance will result in change of frequency.I reckon that overall current gain of Q2 and Q4 can be too high. I would look for 2N2219 replacement with lowest possible h21e.If you have a scope (poss you have thus you read out frq) you may check which opamp does not work stable (check output for AC signal) : is it U2 or U3 ?I can make a bet that it is U2 thus C6 and current gain of darlington Q2+Q4 may be root of the issue.U3."+" input is connected to cable.Unshielded cable and similar wirings are prone to various cap/magn. couplings which depend on cables length (shorter means less troubles)and way they are layed down with respect to each other.

author: danadak
author_rank: Super Contributor
timestamp: April 10, 2016, 08:26:10 pm
content: I spiced the output V control loop. seems OK with 2219/3055combo. It is operating as a follower so beta influence maybenot an issue. Maybe you could break the current control loopat top of V control pot, connect top of pot to + rail, and see ifosc goes away.Regards, Dana.

author: polis93
author_rank: Newbie
timestamp: April 11, 2016, 06:55:11 am
content: Thanks for all suggestions, I will try them in the afternoon.The lower is the output voltage, the sooner supply starts to oscillate (with 2V output at aprox. 300mA and with aprox. 8V output at 700mA).I will focus to the voltage control.

author: smkb
author_rank: Contributor
timestamp: April 11, 2016, 06:18:01 pm
content: I can't figure out still if you use a load that switches the supply unit into constant current mode.Yet another strange thing with the design schematic is current ontrol loop. I looked at it closer atand my thoughts are like this:If the U3, R7, R21, R17, R18 circuit was redrawn as a model for spice simuation then it would be seen that:the Verr volatge = IoR7 is added to both inputs of U3 with regard to absolute gnd placed at C1.The reference volatge is placed at "floating gnd" i.e. "4" which is at gnd + Verr levelso the R18 is driven from gnd + Verr + Vref and R21 is driven from gnd + Verr,finally U3 works with its open loop DC gain ca 10^6 and integrates the difference between k*(Verr + Vref) - Verr,where k is in range of 0 < k < 1/6.6well, I reckon now that the schematic results from yet another engineering approximation which is not good.It would be better if U3."+" was applied a k*Vref2 which means yet another Vref like e.g. TL431and possibly phase shift of U3 + U2 + darlington Q2,4 and such large gain of U3 can be enough to start oscillations.Let's presume the voltage control loop does not oscillate by itself thus oscillate U2 and U3 both. (U3 drives U2)If this assumtion is true then I will try to reduce gain of U3 as well by adding e.g. 1M resistor in parallel with C8 thus Avdc will be reduced to -100and then do some more "try and see" tests regarding gain of U3 in a few points of Uo and Ioyet another though on Vref (U1) is that zener diodes tend to have large leakage currents and it was not specified which one should be used.More power zener diode can dissipate worse its leakage current is and its U(I) function is more far away from expected for small I.Break down voltage is far lower than nominal Vbr for small currents like e.g. 1mA and lessAgain TL431 could be far better choice with even similar 1mA bias current instead of such circut like U1 + some zener.

author: Audioguru
author_rank: Super Contributor
timestamp: April 12, 2016, 12:18:52 am
content: The original project was a kit in Greece 12 years ago and today there is a copy of the kit from China. It had and still has many overloaded parts that failed making it unreliable so I fixed it in the forum at Electronics-Lab. The transformer, opamps, driver and outout transistors (I used two output transistors to share the heat) and many resistors were improved.

author: polis93
author_rank: Newbie
timestamp: April 12, 2016, 05:02:05 am
content: I've got electronic dummy load- basicly Dave's design, but I also tried only load resistor. Oscillations occur before current limitation. When it's in current mode, it behaves correctly.I will try to lower the gain of U3, but maybe some other design might be better...

author: smkb
author_rank: Contributor
timestamp: April 12, 2016, 01:55:27 pm
content: okay, so then:1) do tests with simple resistive load, the PSU must behave well, if it does not then it is pointless to try something more advanced like dynamic loads2) if you are sure that PSU works in constant voltage mode, then you can even pull out the U3 from socket (or remove D9) and thus be sure that current loop will not disturb testing voltage control loop.Voltage should be stable across defined PSU operation area : voltages, currents with resistive load.And I belive that voltage control loop may not be stable.I did interesting simulation of a circuit I would use if I wanted to build similar PSU.Conclusion is that the spice simulation shows how important is current gain of darlington in this case.Let's consider original design. Current gain is slightly less than ca. (Q2.h21e + 1)*(Q4.h21e+1) (because of R in parallel with BE of Q4) and what one can do with such gain (5000 .. 15k) ? Nothing, find parts with small h21e only.And the darlington is not used to share power disspation but for reducing current sourced from opamp. Single hi-power Q has real dc h21e of 20 .. 50 thus Io=3A stands for 60mA (best case) base current. No small signal opamp is able to deliver such current.Okay, mine design differs in that I do have an ability to fine tune current gain of that PNP-NPN pair and the gain is: Io abt Q2.h21e * g* Q6.Ub,gnd where g stands for 1/R1. For simplicity I skipped Q6.be voltage drop. Needless to say the design has more advantages.And simulation results are: if R1=33R means PNP-NPN has higher current gain, the voltage regulator starts oscillating at some load exactly like it happens to real (and different) solution and no matter if feedback capacitor C2 is 100p or 10n. Loop works "stable" only when there is no C2. However this stability may be edge stability.If R1=300R then current gain is less obviously and output voltage is well kept within reasonbale error range (3mV) and no matter if C2 is 10nF or 100pF or 0pF.See included pdf files and compare them. For real PSU I would use different components anyway my idea works.You can enjoy how Q6 emitter current follows variable load change and compensates Vinput 100Hz sine component. (8001 pdf)

author: polis93
author_rank: Newbie
timestamp: April 12, 2016, 06:30:13 pm
content: Thanks for your amazing answer! I tried some of advices. First I tried disconnect diode D9, but problem is still the same- almost sine oscillations with amplitude cca 300mVpp (changing values of capacitors does't change frequency). Also I tried to use LM741 instead of TL081. I even tried select Q2 with h21e only 11 to decrease current gain.Nothing helped... In this point I leave this circuit behind and try to find something more stable.Does anyone has some reliable circuit? It doesn't even has to be 30V 3A supply... 20V 2A max would be great for me.Anyway I am very grateful for every advice I got here

author: smkb
author_rank: Contributor
timestamp: April 12, 2016, 07:47:36 pm
content: Regarding D9, it didn't change anything because as you noticed, voltage control loop is not stable.You can be only sure that current loop will not influence voltage regulation if D9 is disconnected.LM741: this proves that TL081 was not damaged despite of that it could be.Right, seems that it is weird case.One day you can try a solution like z5b1 pdf. Use TIP2955 instead of BDX54 and 2N2219 can be still good for BC817. TL032 is more precise version of these TL08x, 7x and so on.TL081 will be ok still.One thing you will need to find is value of R1 which will likely lower than 300R because TIP2955 has lower h21e than BDX54.My model of BDX54 uses smaller than smallest gain of typical BDX54. (750 @ Ic=3A)If it is not difficult to you to assemble new psu from scratch then it will be good to see working this in real world also.Hope you will know how to deal with these various voltage sources I used for simulation.Constant current mode circuit can be added later.

author: exe
author_rank: Unknown
timestamp: April 12, 2016, 08:36:58 pm
content: Quote from: polis93 on April 12, 2016, 05:02:05 amStick with resistors. Dummy load can cause oscillations (happened to me). I had to compensate mine with a cap between negative input and output.Concerning your scheme. I think it is this one:http://www.banggood.com/0-30V-2mA-3A-Adjustable-DC-Regulated-Power-Supply-DIY-Kit-p-958308.html. I worked fine for me (although I didn't check it thoroughly). So, you can compare parts/values with yours.

author: danadak
author_rank: Super Contributor
timestamp: April 12, 2016, 09:22:57 pm
content: I did a simulation of V control loop and found no evidence of instability.The output darlington is a NPN-NPN cascade, acting as an emitter follower,so am I mistaken compound beta almost irrelevant ? Given that its V loopG is < 1 ?Regards, Dana.

author: exe
author_rank: Unknown
timestamp: April 12, 2016, 09:53:35 pm
content: You can also try to increase C9. Also check reference voltage (on non-inverting input on U2), in some rare cases opamp may oscillate, especially if its supply is not bypassed.

author: Andy Watson
author_rank: Super Contributor
timestamp: April 12, 2016, 11:19:27 pm
content: Quote from: danadak on April 12, 2016, 09:22:57 pmI have tried substituting ON-Semi model of the 2N3055 for the generic npn spice model and it introduces a considerable phase shift at approximately 50kHz.http://www.onsemi.com/pub_link/Collateral/2N3055H.LIB

author: danadak
author_rank: Super Contributor
timestamp: April 13, 2016, 12:09:21 pm
content: Interesting, the model I have does not show the vendor. So I hung C to ground offthe darlington base after the series 1K ohm from opamp. It took .1 uF to start toshow phase margin issues.So much for spice.......Regards, Dana.

author: smkb
author_rank: Contributor
timestamp: April 13, 2016, 12:23:46 pm
content: my thoughts are:re 2N3055, yes that's possible because its gain-bandwidth is 1MHz and maybe this is why Chinese kit which uses 2SD1047 works because that Q has bandwidth of 20MHz,let's have a look at @N3055 data sheet, so it turns out that it has significant storage and delay times which correspond to bandwith. (they must have to)re follower: ideal follower agree however this follower is darlington pair which stands that it is driven by current, worse for small AC dynamic resistance of B-E diodes should be considered, so more precise model of such follower is, that it has rather small imput imp. (thus draws current) and intrinsic dynamic resistance at input which varies according to operation point Idc in. Very high composite current gain stands for very small input current which makes that dynamic resistance important (dV/dI is large at that point).re danadak's simualtion.1 word: oversimplified. (or even too oversimplied)The schematic was removed important components: Cout = 10uF, Rshunt=0.47R and maybe that 1n4148 protecting Q1,2 from excessive reverse BE voltage.Lack of Rshunt results in no common voltage to opampCout takes important role in opamp feedback's H(s).Other constraints are: simple load, while one can use e.g. spice's PWL voltage sources. I enjoy that load I designed which draws from 0 to 3.2A and then returns to 0 rapidly from psu under test. The load is as simple as R=5R, D, and PWL volatge source - this is something hard to get on real test bed.was there transitional analysis performed or just op. point DC ? we can't see any plots, are there any ?what was step time for that transitinal simulation ? I meant that some simulations look good unless step is decresed and then results are much worse .. e.g. these oscillations appear. I use 2us for the duration of 190ms and good simulation takes abt 8secs while bad lasts abt 300.and last word:here is a claim from one who has real oscillating device. here is my claim regarding my simulation: I can change value of R1 and make the control loop unstable or solid stable no matter how many pF capacitors will add to voltage divider. Moreover my simulation is realistic because power Q is supplied from DC 33V + AC (8Vpp, 100Hz) compound voltage and load is dynamic.while another one claims that the loop is stable because he made "simulation" which is just incomplete. (I thought "stupid")Question: how much such claim is worth ?regarding simulations, device models and "simulations" I suggest to see (and understand) this thread:http://www.diyaudio.com/forums/solid-state/5493-pspice-models-2955-3055-a-2.htmlit was not an accident that for simulation I used these components which I used. I can rely on models for these devices. (verified "in the field")

author: danadak
author_rank: Super Contributor
timestamp: April 13, 2016, 01:02:51 pm
content: I added diode, 10 uF load C, .47 in ground return, 1 uS step time, no difference.While still leaving the .1 uF on darlington base to ground to introduce phaseshift.I introduced transient stim into loop in the form of a step current source.Yes sim is simplified, thats what a spice sim is when using vendor models whichare simplified.I will switch load in another sim, lets see what that does.On another design(s) I have done essentially same design for V control loop usingvery slow OpAmps, to date no issues.Regards, Dana.

author: danadak
author_rank: Super Contributor
timestamp: April 13, 2016, 01:16:33 pm
content: Tried it with 1000 uF load, .1 uF base to ground darlington, just begin to seereduced phase margin.100 nS step time.Regards, Dana.

author: Kleinstein
author_rank: Super Contributor
timestamp: April 13, 2016, 01:33:06 pm
content: One way to check for stability is to use a current sink (spice element) as a load and look at the AC analysis. This directly gives the output impedance - so one can also compare performance.One still should do the pulse response test - it is possible to have is stable at small signal level but oscillating after large disturbance due to nonlinear effects.

author: smkb
author_rank: Contributor
timestamp: April 13, 2016, 04:37:38 pm
content: Thanks, perfect tip. Funny is that it started from simple opamp + darlington and it is going to end up with network analyzers.Danadak, did you add a resistor in series with Cout ? I added 0.1R for 10u and ESR of 0.1R for capacitors like 10u is far too optimistic.if you didn't then try to use Cout of 10u in series with e.g. 1R.Passive elements in spice are (nearly) ideal ones and thus capacitors have no ESR, ESL (any ac current does not heat them also do not break under too high voltage )- where one can buy such ?the irony is that one tries to stop oscillations while someone other does as many as possible to make simulation unstable.both can'tIsn't it ?

author: polis93
author_rank: Newbie
timestamp: April 13, 2016, 06:16:11 pm
content: I see I started very interesting debateToday I sat to breadboard and build own circuit based on my first link. After some changes I have now stable power supply. I finished few minutes ago, so there is many measurements left. I selected NPN-NPN darligton pair with low h21e and with resistive load there is no oscillation...

author: danadak
author_rank: Super Contributor
timestamp: April 13, 2016, 09:47:15 pm
content: Here is a another sim. No matter the series R with Load C, even 100X load C,I can't get it to osc. I can by increasing the darlington base C load, but as you cansee with .1 uF output still stable with an indication that phase margin is indeedreduced. But load C, ESR, does not significantly impact loop.Ignore the 1K ESR R, I used both .1 and 1 ohm in sims, no effect.This sim switches full load on/off.Regards, Dana.

author: smkb
author_rank: Contributor
timestamp: April 14, 2016, 05:11:35 pm
content: good to know that the psu works.I saw that schematic for simulation differs from circuit schematic still so I found a model could be used instead of 2n2219 and gave a try.Results are that simulation runs without oscillations for wide range of in-series Cout resistance I tried.However damped oscillations happen for Iout transition load-> no load.Maybe 2n3055 model is too simple.

author: Kleinstein
author_rank: Super Contributor
timestamp: April 15, 2016, 02:49:15 pm
content: The simulation shows a very poorly working regulator. Even without a critical load, there is quite some ringing when going from load to no load and very slow reaching of the final value when turning the load on.For the simulation one needs to include the output capacitor. Also the load change is much better done by a spice current source element instead of simulating a switched load with a FET.

author: danadak
author_rank: Super Contributor
timestamp: April 15, 2016, 03:09:16 pm
content: I did it both ways, still no osc in my sim.Regards, Dana.

author: mikerj
author_rank: Super Contributor
timestamp: April 16, 2016, 07:57:59 am
content: OP are you using the correct mains transformer to power the regulator? If you try to power this circuit with DC to test it it won't work correctly.