Help with slicer/limiter design needed - Page 1
Forum section: electronics / projects

author: wholder
author_rank: Regular Contributor
timestamp: May 02, 2018, 11:00:22 pm
content: I'm working on a project that needs to take an capacitively-coupled Manchester data steam and feed it though a slicer/limiter type circuit that will connect to an AVR series micro and use a pin change interrupt to process and decode the Manchester data steam. The design requirements, in order of importance are:1. *Must Do* the circuit should not generate a transition that might trigger the pin change interrupt unless a signal meeting requirement #2's characteristics is present. That is, if nothing is connected to the input jack, the output from the circuit should be stable and unchanging and should not trigger a pin change interrupt.2. the circuit needs to handle input signals that will typically range from perhaps 300mVpp to 4Vpp, but should, ideally protect against damage, or latch up that might result from higher input levels.3. be as simple and as compact as possible, as space is limited on the PCB.4. If possible, make use of the comparator built into the AVR micro, as this seems to be a standard feature.I've looked at a lot of designs intended for conditioning and squaring up a Manchester data steam, but I've yet to find one that I think can reliably meet all my requirements, especially my #1 requirement. Can anyone else suggest an approach that might work?Wayne

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 03, 2018, 04:45:35 pm
content: A couple questions before we dive in. What's the data rate of your Manchester stream? Is it 3.3V or 5V? And is the data rate variable or will it be fixed?

author: wholder
author_rank: Regular Contributor
timestamp: May 03, 2018, 11:51:42 pm
content: Thanks for replying! The output from the slicer should be 5 volt logic level signal and the input can vary from 300 millivolts peak to peak to 4 volts peak to peak. The bit rate of the Manchester-Biphase input signal can vary from 1,900 to 2400 bits/second, for a stream of all zeros, to twice that rate for a stream of all ones.Wayne

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 04, 2018, 12:23:54 am
content: A conventional bit-slicer (basically a comparator which compares the incoming signal with its average value, the latter with most often an RC low-pass filter) works fine when dealing with amplitude-modulated signals that have varying DC offset and amplitude.But in your case, rejecting low-level signals (under 300 mV) would require at least an additional comparator and would still be hard to "tame": meaning that you would have a hard time not getting spurious output flipping. You probably figured that.So what I suggest is the following. A simple comparator with a reference voltage. Only incoming voltage (after some attenuation) over this ref voltage will give an output of "1". The bad about this simple structure is that it's sensitive to rise and fall times, and will distort the duty cycle depending on the input signal amplitude. But if the rise and fall times are negligible compared to the pulses duration, you won't get any significant pulse width distortion. Given that you are dealing with pretty low data rates, this should be fine.It has capacitive coupling, input protection, low power and will work up to a few MHz, depending on the comparator.Schematics and LTSpice file attached.

author: wholder
author_rank: Regular Contributor
timestamp: May 04, 2018, 01:36:18 am
content: Thanks very much! I'll breadboard it up and give it a try.Wayne

author: wholder
author_rank: Regular Contributor
timestamp: May 04, 2018, 11:18:11 pm
content: I built up the circuit using an MCP6541 as the comparator and 1N4148 diodes (what I had on hand) and found that it seems to work well as a slicer (no significant pulse with distortion) and also does not chatter in the absence of an input signal. So, it's almost perfect. However, it seems to cutout at input signal level of about 1.2 volts peak to peak rather than 300 millivolts even though I measure about 350 millivolts at the minus input to the comparator. Is there something I can adjust to change this, or is this due to my substitution of the MCP6541 instead of an LTC6702 as the comparator, or perhaps the 1N4148 Diodes?And, of course, thanks in advance for your help.Wayne

author: Marco
author_rank: Super Contributor
timestamp: May 04, 2018, 11:29:28 pm
content: Quote from: wholder on May 02, 2018, 11:00:22 pmNot specific enough, XMEGA has hysteresis and window mode, others don't.

author: wholder
author_rank: Regular Contributor
timestamp: May 04, 2018, 11:49:53 pm
content: >> Not specific enough, XMEGA has hysteresis and window mode, others don't.Probably an ATTiny84, but perhaps an ATMega328P, or an ATTiny with more pins (if I need more I/O pins.)Wayne

author: Marco
author_rank: Super Contributor
timestamp: May 05, 2018, 12:21:52 am
content: A TQFP-32 XMEGA will be smaller than a SOIC-14 ATTiny even ignoring the extra comparator which the XMEGA won't need.PS. do the math what kind of waveform you would need to drive a 20 mA current through a 10k resistor and a 100 nF capacitor ... the internal protection diodes can handle it.

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 05, 2018, 02:45:22 pm
content: Quote from: wholder on May 04, 2018, 11:18:11 pmThere may be some tweaking to do because of the attenuation due to the input stage, depending on the characteristics of your input signal.In my example, the values given for the divider (threshold voltage) should give about 263 mV, which was fine to get an effective threshold of slightly under 300 mV at the input, with the given series capacitor and an ideal voltage source. (You shouldn't get 350 mV at the + input, but maybe you didn't have those resistor values available .)You should look at the signal across R2 to see the real attenuation you get in your case and set the voltage threshold accordingly by tweaking R5 & R6. The effective attenuation depends on C2, R3, R2 and the output impedance of your signal source. What's the series capacitance in your design (since the signal is capacitively coupled)? I modeled it with a 100 nF capacitor, but maybe it's much lower in your design which would attenuate the signal a lot?

author: wholder
author_rank: Regular Contributor
timestamp: May 05, 2018, 09:25:25 pm
content: I think I figured it out. Since I'm looking for a 300 millivolt AC input signal to generate an output, I need the threshold to be 1/2 that value because only the positive half of the excursion above the average volts will cross the threshold set by R6 and R5.Wayne