Schematic Net Naming Conventions - Page 1
Forum section: electronics / general

author: gnuarm
author_rank: Super Contributor
timestamp: April 18, 2021, 06:23:02 pm
content: I'm sure this has been discussed a number of times, but why not once more?I'm working on a project with a number of schematic editors (I mean people, not tools). We seem to have no consensus on net naming conventions. Some use mixed case, some use all upper case. Some use '-' to separate words, some use '_', some use caps. Some use 'N' at the beginning of a signal name to indicate low true logic, some use '_n' at the end, some use nothing. Some use fully spelled out words, some use shorted words, some use initials. Power supply names are all over the map with V added seemingly randomly in the name, sometimes more than once.I'm wondering if there is anything remotely like a convention that many use and would be understood by a large fraction of engineers without explanation?Ultimately this design will be turned over to a company for final design and manufacturing. The outfit has not been picked and they have no input to the design at this point.

author: ataradov
author_rank: Super Contributor
timestamp: April 18, 2021, 07:28:37 pm
content: I don't have specific recommendations, but for my job I have to read and review a lot of customer schematics, and I have seen things I did not think were possible.For me personally the easiest to read are: net names all capital, separated with '_'. Naming as short as possible as long as it is not totally cryptic. I prefer "DISP_MOSI" to "DISPLAY_SPI_MOSI". Voltages are named as "3V3". Periods are tiny and hard to read. Location of the "_N" or "N_" does not matter to me personally. "_N" reads a bit easier, may be.Another thing to keep in mind is naming of essentially the same signals, but broken by inline elements, like series termination resistors, filters or level shifters. Use consistent names on both sides. "MCU_SRAM_WE" on the MCU side and "SRAM_WE" on the SRAM side of the termination resistor is much better than "PA15" and "SRAM_WE".And one biggest downer is when people use huge empty rectangle for ICs with a lot of pins. It is fine if they use actual pin locations on the package for the pin on the schematic, that can be somewhat justified. But otherwise - just use banks. Nobody benefits from a mostly empty page and things crammed around the edges of a huge rectangle. When you look at the schematic in details, that forces a lot of unnecessary scrolling. And with empty space, it is very easy to lose your orientation on the page.

author: gnuarm
author_rank: Super Contributor
timestamp: April 18, 2021, 07:57:08 pm
content: Your point about the large blocks for components, I noticed some time back that schematics for digital logic have become largely graphical net lists. By that I mean the pin names are in a column on one side of the package outline, the pin numbers are on the other side of the part outline by the pin line and the net name is in a label "thing" (varies between packages) on the net next to the pin number. Often the net is not drawn to connect to anything. The reader has to search around for the other points of the net which may be on other pages.This information could just as easily be provided in a well organized and pretty print formatted net list. Schematics are more effective for smaller devices like passives and discrete semiconductors, analog devices like op amps and comparators and even smaller logic devices. But once you get to an 8 bit register or buffer you are back to it working mostly like a net list.I have a schematic for a class D amplifier that is really just a box to hold the pin names and numbers of the nets with the connections to the digital driver, a rather few passives and the speaker connectors being the net name column. It's hard to get anyone to consider using such a net list though. Maybe the fact that the tables are presented graphically makes them easier to retain and reference. Images are very powerful in GUIs for sure.

author: ataradov
author_rank: Super Contributor
timestamp: April 18, 2021, 08:25:49 pm
content: Yes, in many cases simple netlists would work much better. The issues come up with small "analog" circuits that may still be attached to those mostly digital buses. I thought about it for a bit, and I'm not sure if netlists are actually good. But there should be a better way to annotate buses on graphical schematics, for sure.

author: Benta
author_rank: Super Contributor
timestamp: April 18, 2021, 09:08:15 pm
content: This is not a naming problem, this is a management problem.Do you even have a project manager? It's her/his job to define this kind of thing.Why wasn't this defined in a styles/dictionary list before the project started?And, and, and,,

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 18, 2021, 09:33:33 pm
content: Quote from: Benta on April 18, 2021, 09:08:15 pmThis. If there's no style convention, then literally anything and everything goes, or it's whoever wants to be a big enough asshole about it to bully the rest into line.For my part, I prefer short (admittedly, often terse, abbreviated or sequential) names, as they take up less space on both SCH and PCB (in Altium, often lengthy net names will overflow the pads they show on, adding visual noise; or hide on traces until zoomed in very close, even more useless).I don't have a problem with simply numbering nets; maybe that's a bad habit of having grown up with Multisim/Ultiboard (we used it in college). Not everything needs to be meaningfully named, I think it's reasonable to do that when it's just a chain of, like, resistors or inductors or fuse or whatever in some common path, and the function of that path hasn't changed, it's just a bunch of nodes along and off to the side; so I'll give them a related base name and number them from there.Or I'll name certain easy things like a 'RC' suffix for a Zobel, or 'SNUB' or 'SN' for a snubber (maybe including an RC, but more commonly the RCD type).I use underscore for separation, and allcaps.Here's an example I didn't name:https://www.seventransistorlabs.com/Images/Diode_Recovery_Tester.pdfwhen it's an unimportant one-off, or schematic only (as in this case), I just don't have any reason to. Note the use of off-sheet connectors though, which also serve as net names, as do power symbols.Heh oh, I just realized something about that schematic, I used a hex inverter (HC14) in the build (hand-carved copper clad as usual), but 3G14s on the schematic -- probably because it was handy in my library? *Checks* no, I have HC14, or, at least, I do now? Though one has the schmitt trigger graphic in the middle and the other doesn't, I should rectify that; so I probably chose the 3G for the better looking symbol? Hah...Hmmmmm... I don't seem to have any schematics public and handy (unless they's some on my main site and I'm not remembering what; which is likely) that have net names shown, d'oh!Also something of note, Altium's default placement of labels bothers me to no end, and I always take the time to position them tastefully, including center justification as needed. Tedious and fragile (positions reset on rotate/flip) but dammit it has to look right!Tim

author: gnuarm
author_rank: Super Contributor
timestamp: April 18, 2021, 10:49:47 pm
content: Quote from: Benta on April 18, 2021, 09:08:15 pmNot every project is run as a top down managerial hierarchy. This is an all volunteer project working with consensus rather than everything being dictated from the top down. Many aspects that would have been established in a company operating over many projects have been left undesignated. At this point several of the more experienced designers have moved on to other things like moving to Taiwan. lol.