ATTINY85, CTC mode only works by if I defy the datasheet?? - Page 1
Forum section: electronics / general

author: Rick Law
author_rank: Super Contributor
timestamp: January 11, 2016, 10:24:42 pm
content: I have someATTINY85code using CTC timer flipping output working usingPB0/oc0a. I moved it toPB1/oc0b, it didn’t work. So I decided to reduce the code to just the CTC timer flipping code to see if the timer code is working right. The flipping generates a square wave. From that, I found the issue and made it work: usingocr0aforoc0boutput. This conflicts with the datasheet. It confuses me.In, summary:- Section 11.7.2’s CTC description usesoc0aoutput withocr0amatch-counter as example.- Section 11.9.6 said forocr0bis the register foroc0boutput.- Real life test showoc0b PWMoutput works withocr0b- BUT: Real life test showsoc0b CTC output flippingworks withocr0ainstead.While the example usesocr0a/oc0aas example, no where in the datasheet said in CTC modeocr0ais the match register foroc0b. Whereas, the datasheet clearly sayocr0bis the match register foroc0boutput - which doesn’t work in CTC mode.I can also see that while therecurringcount match isocr0a,ocr0bseem to have an impact onoc0b: It shifts the subsequent pulse forward. Ifocr0bishalfocr0a, it shifts the square waveabout 1/4cycle forward. So, it looks like the first time it usesocr0bthen subsequent count usesocr0a.I am confused. That doesn’t make sense to me. It isvery unlikely the datasheet is wrongwith something this simple. Can any one shed some light on this? I appreciate it.This is my very simple test code:DDRB |= (1 << PB1) ; // turn on oc0b outputTCCR0A = (1<<COM0B0) | (1<<WGM01) ; // set to just CTC flip outputTCCR0B = 0x05; // everything including WGM02=0 and clk/1024OCR0B = 0x00; // this should be the match register for pb1/oc0bOCR0A = 49; // but instead this one do matching for pb1/oc0b!?ThanksRick

author: dannyf
author_rank: Super Contributor
timestamp: January 11, 2016, 11:01:45 pm
content: You may want to figure out if you are flipping the pin in the overflow interrupt or via compare match. Two different mechanisms.

author: Rick Law
author_rank: Super Contributor
timestamp: January 11, 2016, 11:19:14 pm
content: Quote from: dannyf on January 11, 2016, 11:01:45 pmInteresting thought. I will try setting those two registers again. I did that earlier to ensure I was not setting a timer interrupt, but possible I might have done it wrong.

author: mikerj
author_rank: Super Contributor
timestamp: January 14, 2016, 06:48:06 pm
content: The only "TOP" register for CTC mode is OCR0A. The datasheet implies this since only OCRA is shown in the waveform generators table, but it definitely could/should be more explicit about this.It's been ages since I've used an ATTiny, but I think the OCR0B register will control the count at which the pin toggles, e.g. it varies the phase, but the frequency is always set by OCR0A. Would this explain what you are seeing?

author: Rick Law
author_rank: Super Contributor
timestamp: January 15, 2016, 01:40:03 am
content: Quote from: mikerj on January 14, 2016, 06:48:06 pmThanks for the clarification! As a novice, the datasheet is my bible as well as my instruction book.The OCR0A in this case doesn't have any other use anyhow, so it is merely a matter of changing a character in the code.My bigger concern was that I was misunderstand something bigger - being only a student with the datasheet as my teacher.Again, thanks for the clarification!

author: dannyf
author_rank: Super Contributor
timestamp: January 16, 2016, 12:28:56 pm
content: QuoteIt is the same, even for an experienced embedded engineer.To put it in an extreme way, embedded engineering is built on one's willingness and ability to read and comprehend datasheets. There is really no other way around it.In this case, you will have to ask yourself what you are trying to do. You can flip a pin through an interrupt (generally through overflow or compare match); or through the hardware compare / match. In the first case, an ISR is called periodically; In the 2nd case, it is set-and-forget, as the hardware does it all. You cannot mix and match the two approaches.That's basically true for all timer/counter peripherals.

author: mikerj
author_rank: Super Contributor
timestamp: January 16, 2016, 06:26:01 pm
content: Quote from: dannyf on January 16, 2016, 12:28:56 pmThe issue here is that there are two compare units, and almost everything you can do with one you can do with the other. The CTC mode is an exception, but the datasheet is a little coy about stating this clearly. It doesn't even mention the effect of register OCR0B in CTC mode.

author: Rick Law
author_rank: Super Contributor
timestamp: January 16, 2016, 08:52:42 pm
content: Quote from: mikerj on January 16, 2016, 06:26:01 pmSince both OCR0B and OCR0A are acting on the same timer TCNT0 , it is not as if OCR0A has any other use under CTC mode. That it TCNT0 re-copy from OCR0B or OCR0A really makes no difference for the user.Had they not been "a little coy"... I would not be worrying that I was missing something or misunderstanding something big time. Lesson is, I should not expect datasheet to be more perfect than they are.Side note: I recalled merely a month or so ago there was a post here on "what do you use a scope for..." If I didn't have a scope, I would have a harder time finding out how to make that work. Putting both OC0A and OC0B on the scope, I spotted it almost right the way that both were CTC'ing using OCR0A.

author: dannyf
author_rank: Super Contributor
timestamp: January 17, 2016, 10:05:18 pm
content: The beauty of the Atmel timer is that you can output TWO different frequencies from the same timer/counter unit. Try that with your PIC timers,

author: dannyf
author_rank: Super Contributor
timestamp: January 17, 2016, 11:24:02 pm
content: QuoteI spoke too soon - it can be done with PIC as well -> example below used CCPR1/CCPR2 + TIMER1 to generate two output frequencies. All done in the isr so it is set-and-forget type.Not as elegantly implemented as on the avr but nonetheless, it can be done.