HEF4013 flip flop question - Page 1
Forum section: electronics / beginners

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 19, 2019, 09:58:52 pm
content: I have been bread boarding a circuit and have seen that for a given input signal level of about 2.2V p to p at around 950kHz I cannot use a Vdd for the HEF4013 above a certain level or the output stops. I see this is correct in the spec sheet, but I am curious as to why Vdd is linked to the drive level required. Do all flip flops have this trait? Thanks.

author: Audioguru
author_rank: Super Contributor
timestamp: May 19, 2019, 11:57:27 pm
content: It is on the datasheet.A HEF4013 is old Cmos logic that works with a supply that is 3V to 18V. A Cmos logic output driving the input of another Cmos logic produces an output swing the same as the entire power supply voltage so they make an input work when the input voltage swing is 0.3 times the supply voltage or less for a logic low and 0.7 times the supply voltage or more for a logic high, so that noise does not affect it much.

author: Zero999
author_rank: Super Contributor
timestamp: May 20, 2019, 08:55:09 am
content: Yes, nearly all CMOS ICs have this characteristic: the logic thresholds scale with the supply voltage.Look at the schematic of a NOT gate. It output won't properly go from high to low, until the lower N-MOSFET is on and the upper P-MOSFET is off. For a MOSFET to turn on, the gate voltage must be a couple of volts above (N-channel) or below (P-channel) the source. At higher supply voltages, the sources will also be at higher voltages, so the gate will need to swing closer to the supply rails for them to turn on properly. Applying voltages between the logic levels, isn't good, because both transistors will turn on, causing excessive power consumption.https://en.wikipedia.org/wiki/CMOS

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 20, 2019, 10:27:58 am
content: Thanks Zero999If I did not want use a separate 6V supply for the HEF4013 in order for it to divide a low level input signal of around 950kHz could I bias the input so a low level input will still wok yet have it run off the rest of the circuit's 12V supply?

author: Zero999
author_rank: Super Contributor
timestamp: May 20, 2019, 10:03:41 pm
content: Unfortunately, it's not that simple. Some sort of level shifter would be required to boost the voltage.Common base configuration is probably best suited to this because it's non-inverting and is fast. Here's an example. It will probably need some tweaking to suit your application.Another possiblty is a level shifter IC such as the CD4504 but it's probably not worth it for one channel.

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 20, 2019, 11:13:46 pm
content: Quote from: Zero999 on May 20, 2019, 10:03:41 pmI feared my simplistic idea would have "issues", easier to have a circa 6V supply to the HEF4013 I think... unless a none CMOS IC running 12V is a possibility? I got the idea of a divider on the input from this MF amp using a 4013.http://www.g0mrf.com/630m.htmThanks again!

author: Liam
author_rank: Newbie
timestamp: May 21, 2019, 05:34:31 am
content: Quote from: Audioguru on May 19, 2019, 11:57:27 pmUnder what conditions will noise be a serious problem? Or did you mean any noise?

author: Zero999
author_rank: Super Contributor
timestamp: May 21, 2019, 08:04:54 am
content: Quote from: Chris Wilson on May 20, 2019, 11:13:46 pmThat's not really a class D amplifier, since it doesn't do any PWM.Regarding the CD4013's threshold levels, refer to the data sheet. When VDD = 10V, input high voltage >7V, input low voltage <3V, a difference of 4V, so you'd need a 4V p-p signal to trigger it. 12V isn't specified, but it'll be a bit worse. Another issue is it might not always be as bad as the data sheet suggests, which can mean intermittent operation.http://www.ti.com/lit/ds/symlink/cd4013b.pdf

author: David Hess
author_rank: Super Contributor
timestamp: May 21, 2019, 09:47:21 pm
content: Audioguru basically answered it. For CMOS, the input logic levels depend on both supply voltages and specifically, the input level for the high side p-channel MOSFET follows the positive supply voltage so if the positive supply voltage is too high or the input is never high enough, then the p-channel MOSFET can never turn off.Not all logic families work like this. TTL for instance always has an input threshold between 0.8 and 2.0 volts. ECL logic only depends on a reference from its positive supply. Injection logic always has a threshold voltage of 1 Vbe.

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 22, 2019, 11:52:31 am
content: Quote from: David Hess on May 21, 2019, 09:47:21 pmThank you David, a very helpful reply. Do you think I should stick with the HEF4013 as it appears to breadboard fine, or go to a faster TTL IC? I don't suppose there's a pin compatible TTL flip flop I could just substitute and observe the results, is there....? Having a variable voltage supply for the 4013 means I can supply 5V instead for a TTL IC.

author: Zero999
author_rank: Super Contributor
timestamp: May 22, 2019, 12:32:23 pm
content: I can't see anyone recommending TTL for anything nowadays. You could go with LS, but raw TTL is obsolete and many parts are unobtainable or expensive.There's the 74LS74 or the HCMOS equivalents 74HC(T)74, but they're not pin compatible with the 4013.https://assets.nexperia.com/documents/data-sheet/74HC_HCT74.pdfhttps://assets.nexperia.com/documents/data-sheet/HEF4013B.pdf

author: David Hess
author_rank: Super Contributor
timestamp: May 23, 2019, 03:36:55 am
content: Quote from: Chris Wilson on May 22, 2019, 11:52:31 amI suspect it would be easier to just add a level shifter using a single bipolar transistor.QuoteI am not aware of a TTL direct replacement for the 4013. The common 7474 uses a completely different pinout.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 23, 2019, 04:24:29 am
content: If this is directly the circuit you've been playing with over the years, it's because the drive is AC coupled like it's an RF amplifier, but it's not, it's going from logic to logic. It makes no damn sense, and should simply be connected straight through (with a comparator if necessary, to boost it to proper logic level).Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 23, 2019, 11:21:52 am
content: Quote from: T3sl4co1l on May 23, 2019, 04:24:29 amHi Tim, thanks for the reply. it is and it isn't the sameIt's an MF version of the LF one that works fine, but the FET driver didn't like the higher frequency and gets damned hot. So I converted to an HEF4013 to halve and give a Q / Not Q out to two separate, higher speed, high power FET driver IC's. The exciter uses a Si5351A which uses its CLK0 pin output direct to provide the X2 input capacitively coupled with a 220 nF poly cap to the HEF4013. That in turn outputs to the FET driver its inverted and none inverted signals at the desired frequency (around 475.750 kHz) via another 220nF cap on each output direct to the FET drivers input pins. If I do not capacitively couple to the FET driver IC's it will put one FET into permanent conduction with no input signal so I am afraid i don't understand when you say it should be connected straight through. All similar amps do this or use transformer coupling. Sorry to be dense, it's the way I am....The exciter is this circuit withot the three BS170's, as I say, just using the output from CLK0 via 220nF to the HEF4013 input. Attached is the scope pattern from CLKOThanks again

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 23, 2019, 03:31:55 pm
content: Yeah, bingo. Si5351 is a 3.3V device. You need a logic level converter from 3.3V to 12V.Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 27, 2019, 01:18:32 pm
content: Quote from: T3sl4co1l on May 23, 2019, 03:31:55 pmOK, thanks Tim, so what i am seeing is the Si5351a is generating just enough t fire the 4013 but it's far from ideal or reliable. What about using a logic level flip flop like a 74HCT74? That should correctly trigger from the Si, right?The other thing I am seeing is unlike the ultra reliable, perfect FET gate and drain waveforms on the similar LF amp, the MF one shows one fairly decent gate and drain waveform on one pair of FET's, but the other pair show incredibly spiky drain waveforms and poor gate waveforms when power to the FET's is applied, intoma good Bird water colled dummy load or the antenna system. I have tried changing the FET driver IC's over, tried replacing the driver IC's and the FET's even to expensive ultra low gate capacitance ones, and tried swapping the gate leads from the drivers to the FET's over but the same "side" of the output shows bad waveforms. I also swapped out the 1500pF and 10 Ohm R1, R2, C3 and C4 components, and still the same side shows bad waveforms. the transformer wiring is symmetrical, I even changed the whole transformer T1 out to a newly wound one on on a different core,https://www.buerklin.com/en/Products/Passive-Components/Inductors/Ferrites/Ring-core%2C-outer-%C3%98-x-inner-%C3%98-x-height-%3D-63-x-38-x-25-mm%2C-N30/p/84D258but still the same side has bad waveforms... I can't see why this should be... The circuit is as below in regard to after the FET driver. I was using an HEF4013 flip flop and a pair of IXD_614 FET driver IC's. The interconnections are pretty short. The FET driver to FET gate wires are short and symmetrical.www.ixysic.com/home/pdfs.nsf/www/IXD_614.pdf

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 27, 2019, 05:38:35 pm
content: Need layout pictures.Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 27, 2019, 06:01:45 pm
content: Quote from: T3sl4co1l on May 27, 2019, 05:38:35 pmHow embarrassing, but OK, will have to be in the morning as one of our old dogs died peacefully today and burying her (she was a BIG dog) has fair knackered me as I had to get through a load of tree roots, before making progress with a big 4 foot deep hole. Age, alcohol and generally unfitness has taken its toll of me these days! I am in bed looking forward to a pint of frothy medicine later in the week. Thanks Tim! Will update later with some photos.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 27, 2019, 07:04:11 pm
content: My condolences. Take your time!Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 28, 2019, 11:45:56 am
content: Quote from: T3sl4co1l on May 27, 2019, 07:04:11 pmThanks Tim, an old dog, but she had a good life.Here are some photos, zipped up.http://www.chriswilson.tv/1kw.zip

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 28, 2019, 07:06:01 pm
content: Hmm, so you changed several things:1. I see IXDN614PI instead of IR2110. These do not have an enable, so the output is always-on, no keying.2. No twisted pairs. These should actually be more like, laminated (flex), or lots of twists in parallel, to go any distance. The '614 is capable of adozen amperesin a short hurry and if you expect to use any of that, you must have a low inductance path!I have highlighted the present ground path (as best I can tell) in red:It spreads out over the ground plane of the top board, necks down to the ground/support (dotted lines indicate path obscured by the top board), then flows around the opening where the transistors sit.Blue shows the recommended short path, or using twisted pair (preferably star quad) instead of single-wire links.Also, 1N4148 isn't rated for that kind of abuse; I'd recommend MBR240 or something like that.The transformer: this looks like about half a meter of wire for the primary, is that right?With the roughly bifilar construction, we can expect a transmission line impedance around 100 ohms, so an inductivity around 0.3 uH/m, or a total inductance (leakage between both ends of the primary) of 0.15uH. Add on another maybe 40nH for the large loop area between transistors and the center tap.When one transistor turns on, it yanks down on its end, and this is communicated to the other side through transformer action, in series with this leakage inductance, and into its drain capacitance and snubber impedance.Conversely when one transistor turns off, its load current instantly has nowhere to go, until communicated to the other side; the energy stored in the same inductance (i.e., drain current (at instant of turn-off) carried through the leakage inductance) must be dissipated by the transistor and snubber.The snubber itself has some inductance, on the order of 20nH I would guess. I've never seen those capacitors before, but I'm guessing they're ceramic, and have ESL of essentially body length. The killer here is that the body is on long leads, sticking way up over the ground plane. Low inductance would be a bunch of ceramic chips in parallel, across a very wide trace (copper pour), and similarly for the resistors (which are leaded TO-220, so contribute about 5-10nH by their leads).The snubber is still about 10nH away from the transistor itself, because the transistor's lead length is significant as well.In total, you can draw an equivalent circuit where each transistor has ESL, then the parallel combination of them has R+L+C to ground (the snubber), then the parallel combination has leakage inductance to the opposite side transistors (which repeat the same structure), through a 1:1 transformer (the CT primary).How much does this matter?The transformer ratio implies a drain load around 2 ohms. The primary TLT impedance is around 100 ohms. This is a big mismatch. It may not be bad, in and of itself -- it's only a mismatch as such, at frequencies on the order of the electrical length of the primary. But this also implies we need active frequencies to be well below 100/2 times the electrical length of the primary. So, (100/2) * 0.5m = 25m electrical length, or at the speed of light in bifilar pair, about 10ns (full wave mode), or about 40ns (quarter wave mode).By "active frequencies", I don't mean the switching frequency -- I mean the harmonics present due to switchingcommutation. In other words, if the rise/fall time is around 40ns, you're likely to have problems.Are your transistors actually 34N20? Whose "34N20"? ON Semi makes a FQ?34N20(L) but not in TO-247 package. (The FQA version is TO-3P, but that's not what's pictured.)With optimal gate drive and values as shown, and assuming FQA34N20s, I would expect around 50ns turn-on and 10ns turn-off. This is very much in the danger zone, compared to primary leakage inductance.We can also complete the resonant circuit between transistors -- drain capacitance rings with leakage. This is tricky because Coss varies wildly with Vds. What most likely happens is: one transistor turns off nanoseconds before the other turns on; in that time, its drain voltage hasn't risen much (because Coss is ~nF at low voltage), and the other transistor turns on, charging up the leakage inductance. Eventually, the drain voltage rises, Coss tanks (to maybe 300pF) and the drain voltage resonates at the corresponding frequency (i.e., 300pF and 190nH, or 21MHz). But because extra time is spent at low voltages, the inductance is overcharged, and this causes the peak drain voltage to be many times its linear value (if the circuit were linear (constant C), the peak would be exactly equal or less than twice the supply voltage). This will easily destroy a transistor.One more catch on the original circuit, IR2110 pin 11 has no pull-down. So, that's not good.I also don't get a feel for the purpose of RFC1 being so large, and C5 being so small. Is the CT intended to swing? Resonate even? That makes things even more awkward, because more voltage here means more drain voltage is possible, and that 200V rating can disappear right quickly, even with leakage and stray inductances under control.So, I would recommend adding the ground strap indicated above, and recommend replacing the primary with a lower inductance construction, such as a star quad winding.Star quad is a twisted quad, where opposite corners of the diamond are connected together. This gives much lower impedance (and therefore leakage) than pair does. In fact it's around half the impedance of two pairs in parallel, so it's a good synergy!Start with 4 x 16AWG wires, preferably in two colors. Holding these in a square bundle, number them, say, 1-4 clockwise. You then have star quad connection by tying together 1 and 3, and 2 and 4. Twist about half a meter of this, and wind it around the transformer in the same four turn primary. Tie the start 1/3 to one transistor drain, the end 1/3 and the start 2/4 to the CT, and the end 2/4 to the other transistor drain.Make this connection in the smallest length and area possible.The transistor drains themselves should be flat plates, over ground plane (this can be constructed with layers of polyester and copper foil tape, or with plates of FR-4 glued/soldered down), keeping the area minimal all the way up to the transistors. With the drain connections extended out to the CT tie point in this way, you should be able to keep loop inductance down adequately.This should then give about 1/4th the leakage, and more like 10-20 instead of 40-60nH of stray, for a total under 60nH, a peak resonant frequency around 37MHz, and less ringing in general due to the better match. Also consider using resistors alone, for gate drive (no diode), and, a 12A driver chip isn't necessary, just a few amps will be adequate (TC4420 comes to mind; same pinout I think?). Not that that matters, since you already have the drivers, they'll just be overrated for the application.Cheers,Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 28, 2019, 09:00:48 pm
content: Wow, an incredibly in depth answer for which I am very grateful indeed Tim, thank you. The turns ratio is straight from the designers build notes. It seems comparable to other similar amps on these frequencies. The FET's, although specced as 34N20 these are very hard to find these days. In the LF version and this MF one , I and others have been using FQA34N20L devices. In a quest to see if we could improve the waveforms we swapped them out for some of my "special occasion" very low gate capacitance Cree Wolfspeed ones. These have allowed me to really wind up the volts on the LF one, and show very clean waveforms indeed on the low frequency amp. Unfortunately a pair blew up in the MF one, very soon after giving them some proper voltage... Not the pair exhibiting the bad waveforms, either. These are what you see in the photos Tim. They are C3M0065090D devices.The 1500pF caps in the snubbers are glass Russian silver mica caps, same as in the LF one. During our tinkering we tried some poly caps here of much greater capacitance, 12nF I think, and the waveforms improved a good bit.I will sort some copper flashing for the improved ground routing, and rewind both types of T1 ferrites with your suggested star quad primary. Would you consider using quality enamelled copper wire with no additional insulation OK for this winding, or should I use Teflon or PVC covered multi strand wires? The secondary is single core UK mains house wiring, rated 15 Amp, designed to run in conduit. The primary fine stranded pure copper speaker cable, both as used successfully on the LF version. I am assuming roughly three times the frequency has shown the deficiencies in the build layout?Again, your in depth reply is remarkably generous, I'll see what transpires when I follow your guidelines as best I can. A quick yes or no re using enameled 1.2 mm OD copper wire to form the star bundle for T1 primary would be very helpful, thank you Tim! I can wrap the core in Kaptan tape if needed.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 28, 2019, 10:27:39 pm
content: OHHH!Well, SiC is very different!You need negative off gate voltage. The gate capacitance is much lower, and the swing much higher. The voltage rating of the '614 helps, but then you need 18-20V supply and a 4V offset between the driver ground and the source pin.Which also means you need a level shifter between the driver and the signal source.Those transistors are good for many kW, if you crank up the supply voltage to say 300V (and increase the load impedance accordingly). They aren't worth any more power than the FQAs at low voltage, they're really just wasted money.Because the capacitance is smaller, the switching will be much faster. (The gate drive current is accordingly lower, so the grounding won't make as big a difference.) You may not be running into the peak voltage ratings, just because it's so high. Most likely you're not fully turning off the transistors, because of the need for -4V Vg(off), and they're cooking during turn-off "drool" or straight up DC current draw. Which is probably a runaway condition, because Vgs(th) drops as it heats up, drawing more current and...Transformer -- enameled is fine, preferably Litz at this frequency. The shorter distance between wires is advantageous. If it's getting hot under load, you'll know; if not, it's fine.Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 29, 2019, 11:52:22 pm
content: OK, although in fairness the spec sheet for the Cree devices states that a negative gate voltage is not essentialI'll not try and run before I can toddle / stagger, back to the conventional, cheap FET's. Next plan is use some of my gifted vintage Litz wire that needs molten caustic soda to strip the enamel to follow your post to change the T1 windings , and also try and create a more direct ground path.Another idea is to create a more direct path to the gates of the FET pairings which would entail only one 10 Ohm resistor to each pair, of gates rather than one to each FET gate, is that good or bad? The OE circuit used just one FET driver, so using a gate resistor per FET may have had that scenario more in mind than me using two FET drivers, one per pair?Is there any merit in isolating the 5V and 12V supplies and their grounds from the circa 50V FET supply? I spent an unsocial few hours at the pub tonight, reading via Google that a toroidal wound transformer is far more efficient than an EI cored transformer, despite someone very respected saying I should consider a pot core for T1Damned Google!Thank you Tim!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 30, 2019, 12:09:05 am
content: Toroid vs pot core doesn't matter much for efficiency, as long as Bmax is appropriate for the core material and the wire is appropriate for the current and frequency.Pot cores do use less wire, however, which makes them very nice for high frequency transformers.You want one resistor per gate -- tying them together makes them both transition at the slowest of the two, increasing switching loss in one of them. Separate resistors are more likely to transition at the same time despite differences.Common ground is fine.Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 31, 2019, 10:02:20 pm
content: Thanks again Tim!I have wound the primary as you suggested, but I see very little change, I am sorry to say. I have added a SN74AHCT125N buffer as a level converter between the si5351a and the HEF4013, but before I did this, and after I am seeing something I do not understand, maybe you can explain? I have an adjustable 5V regulator off the main 12V supply for the HEF4013. next to it on my little board, and by chance, I found that as I lower the voltage to the HEF4013 the drain waveforms clean up, and just before the 4013 shuts down they are relatively good. I'll attach scope shots. I have also found increasing the cap values for C3 and C4 on the amp make the drain wavefoms a lot less spiky, but I am using much greater values, I stopped at 6nF ones. The schematic shows 1500pF. I have the driver board grounded right by the driver IC ground points to as near the FET source pins as the layout will allow. Before I go further (and to be honest, I am getting a headache from the damned thing...) But for now I would like to know why reducing the voltage to the 4013 improves things! I also see the gate waveforms go negative when the FET's have power to them, without voltage applied they are perfectly square. You can see this effect in the screenshots.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 31, 2019, 10:31:19 pm
content: Seems to be something about changing the timing between Q and /Q.If you have a 5V supply, why not use a 74HCT74 in the first place? What's the point of using a CD4000 anything at all?Tim

author: Chris Wilson
author_rank: Super Contributor
timestamp: May 31, 2019, 10:46:26 pm
content: I am hoping some will arrive tomorrow, the postman is terrified of dogs so he left a note saying he could hear barking and had made a hasty retreat todayI'll have to tell him the one he had reason to fear has died and and he can now rest easyI just used what I had initially, point taken! Thanks Tim. I'll persevere.

author: Chris Wilson
author_rank: Super Contributor
timestamp: June 10, 2019, 03:36:19 pm
content: Thanks to the patient help here I am now getting pretty good traces and the amp is working well. For completeness:Used a CD74HCT74 flip flop, used a pair of TC4420 Mosfet driver IC's, made everything on the output side of the driver IC's as wide and short as possible, used fast Schottky diodes instead of 1N4146's. I found occasionally applying voltage to the FET's with no drive applied at all saw a pair conducting. Adding a pair of 15k pull down resistors on the input pins of the FET drivers sorted that. Also added 4.7k pull down resistors on each gate pin. Things were a lot better, but whether this is good or bad practice i don't know, but I experimented with the 1500pF glass mica csnubber caps and ended up with high voltage poly caps of 6.6nF as the snubber caps into the 10 Ohm film resistors adding these made a remarkable difference. using Tim's transformer winding advice was less successful, I used Litz wire and basically it didn't (got MAD hot and terrible drain waveforms0, this may well be some error on my part. Whatever, I am now seeing the waveforms below at 52V on the FET's, and it has run cool for 12 hours and got my pal into the USA a few times from here in the UK on 475 kHz.Many many thanks!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 10, 2019, 06:27:51 pm
content: Nice! Cheers,Tim