OLD thread update:Please let me know if my very-high-power load has a fatal flaw - Page 1
Forum section: electronics / projects

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 19, 2020, 04:30:32 pm
content: I put an update in the last comment. tl;dr: I blew it up and rebuilt itAttached is the schematic. I have started building this but before I get too far down the road I would like some input from the community. It works in LTSpice but I haven't run it yet IRL. I am using some DIP-specific perfboard for the small signal bits and I know there may be some concern with oscillation but that will have to be discovered when I actually get her all put together and under test. There will obviously be some heat coming off this especially at high voltages, but I have about 17lbs. of heatsink for that and I can easily go bigger. I usually won't be putting high power through for very long, and it will be fan-cooled so I *may* be ok with heatsinking.R33 is for current sensing, pulled from a defunct Agilent power supply. To be used with a digital panel meter for live indication of current inputThere will be a bipolar +/-15V supply for the opamps, and I intend to take my reference from that. R34 eats most of the voltage, R35 and R36 are coarse and fine current adjustment potentiometers.The current goal for current is about 8 amps per FET, limited by the 3 Watt 0.05 ohms sense resistors between each 47N60C3 and ground. I think that should be enough current for most of my needs (!) but the FETs can go quite a lot higher.Opamps I think will work are LT1007https://www.analog.com/media/en/technical-documentation/data-sheets/LT1007-LT1037.pdfNice low offset for use at the very low voltages required for control at low currentThe MOSFETs are 8 pieces of 47N60C3https://pdf1.alldatasheet.com/datasheet-pdf/view/428753/INFINEON/47N60C3.htmlTO-247 650V, 30A @ Tc 100ºC, 415WThe polarity protection diode is 300UR60Ahttp://www.vishay.com/docs/93508/vs-300urseries.pdfGiant stud mount, 600V 300AI ran 80 amps through this and it got warm but not hot, maybe 55ish C on the case, so I may not heat sink this.

author: Gyro
author_rank: Super Contributor
timestamp: May 19, 2020, 05:58:00 pm
content: QuoteYou will probably want to put the 150R resistors directly on the Mosfet gate pins - or better still, split them into two resistors, one at the opamp output, one at the Mosfet, to prevent the opamps seeing too much capacitive load too.You haven't said what the source voltage is going to be (although you have mentioned plenty of high voltage parts). You need to keep a close eye on the 47N60C3 SOA graph to make sure they don't suffer breakdown when operating in linear mode (they look like to be optimised as fast switching fets).

author: Yansi
author_rank: Super Contributor
timestamp: May 19, 2020, 06:08:03 pm
content: You better put a cap from the inverting input to the OPAmp's output, rather then splitting the gate resistor in two, which I'd say is very likely not necessary.

author: Vovk_Z
author_rank: Super Contributor
timestamp: May 19, 2020, 06:26:12 pm
content: 47N60C3 have to be ok for linear mode. And yes - a 2.2nF..4.7nF cap have to be from output to inv. input.And consider much more powerful FDL100N50 (but not too expencive) - it may need less transistor cases than with 47N60. It costs only a little more then 47n60 but can withstand up to 1000W per case.With lt1007/1037 don't forget to use Vos trim circuits for every opamp to adjust its input offset (or some transistors will be partially open with zero control voltage).

author: schmitt trigger
author_rank: Super Contributor
timestamp: May 19, 2020, 06:51:29 pm
content: Your basic circuit looks ok.My only comment would be that your control voltage to be derived from a proper reference IC.Even the inexpensive and ubiquitous TL431 will provide a significant set-point improvement.And start thinking about the protection circuits. Fuses, voltage clamps, thermal shutdowns.

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 19, 2020, 07:01:14 pm
content: @ Gyro I will have to keep an eye on things. The layout is going to be fairly tight (for veroboard) but I may end up having to do something else with gate resistors. The voltage is going to be possibly even over 100V in to this. I have another active load but it is only good for a fraction of an ampere at 100V which is a bother testing high voltage supplies. I get heebie-jeebies thinking about playing with higher voltages but it's nice to know most of my parts won't turn to smoke at expected voltages.@ Yansi that's another possible avenue to pursue. We'll see how necessary it ends up being but thanks for the idea!@ Vovk_Z the transistors were selected mostly due to their being the highest-power MOSFETs I have on hand for $0, which is currently the cost of this build to date with all parts already acquired! Having never seriously dealt with trimmable opamps, I was under the impression that I could leave the trim connections open. I can't measure microvolts and these are guaranteed to have microvolt-level input offsets, so I don't know how I would go about measuring or correcting it at that level. Do you have any good tips for that?@ Schmitt trigger the control voltage does not have to be precise for my application. As long as the reference is something like stable it will be good-enough even if it needs tweaking during use. If I were controlling this with a microcontroller I would *definitely* agree that a known-stable voltage was present from which to derive a reference! Protection circuits may or may not be coming. I am thinking about a thermal overload that will at least pull the gate drive away from all the FETs if I somehow get distracted and things get too warm. I'll think about fuses, but I don't even know what I might do with a voltage clamp, what do you mean by that?Thanks all for your consideration!

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 19, 2020, 07:10:24 pm
content: As far as heatsinking goes, just consider all the use cases. Depending on the load, @8A, each transistor may have to dissipate a lot of power. Not completely sure about what you intend to do with this though.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: May 19, 2020, 07:21:41 pm
content: To the OP,I would add a capacitor around 1nF between the non-inverting input and the output of each op-amp.This will be the dominant pole that controls the loop stability.You should also add a RC snubber on the input probably 2.2uF and 1.If you want to know all about loop stability in constant current loads read this threads:https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/Loadsof information in this thread.Regards,Jay_Diddy_B

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: May 19, 2020, 07:30:36 pm
content: Hi,This SOA graph from the datasheet:Is probablynotreliable information.reference:https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20100014777.pdfThese look like calculated curves. Measured curves show a thermal instability region at high voltage and low current.I would test one or two MOSFETs in the linear region.What is the specifications you are aiming for?Jay_Diddy_B

author: Kleinstein
author_rank: Super Contributor
timestamp: May 19, 2020, 07:51:54 pm
content: The MOSFETs are quite large and would this need quite some capacitance at the OPs to slow them down.So one may not really get full speed from the LT1007. Even larger MOSFETs would make things even worse.I would no use so much voltage for the OPs - 10 V would be plenty and less risk to overly stress the gates.Power ratings for MOSFETs tend to be specified too high to be real - to avoid to much effort with cooling, I would consider more like 100 W the maximum useful limit per TO247 case.The SOA graph looks suspicious, though Infineon usually is honest with the SOA graphs. IT still looks really good - maybe to good to be true.For the shunts, one should not use the full nominal power, as this would lead to quite some heating and thus drift. So I would consider more the 3-4 A the useful maximum for 0.05 Ohms 3 W shunts.This would be only some 150-200 mV, so the dynamic range to lower currents is somewhat limited.I would consider using only 1 or 2 channels for lower current ranges.For the current sharing also take care about the interconnections near the shunts - these should be balanced. This can also add to the current. For higher accuracy consider 4 wire connections to the shunts, even if only 2 wire parts.A nasty case to consider is that it takes some time for the MOSFETs to turn down, when the electronic load is turned on before the external supply is connected. This would especially a problem with a high supply. Ideally one would have some protective circuit to turn off the load, once the voltage drops below some 1 V. Another countermeasure would be limiting the OP / gate voltage to a level not much higher than actually needed - this may need an adjustment. Chances are some 4 V would be enough.

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 19, 2020, 08:17:37 pm
content: @ SiliconWizard, I am anticipating blowing off nearly a kilowatt on this at high voltage and high current inputs. That is ok with me.@ Jay_Diddy_B I will have a look at the linked information, thanks for that. I know the SOA looks like a calculated one, but I hope most of the potentially-unstable region on the very top is going to be outside my intended use range anyway. I don't have a specific set of desired input parameters, just "as much as I can reasonably sink without blowing up". The idea is to characterize it after assembly by giving it increasing static input levels and seeing what the temperatures do. If it only gives me "a whole lot" instead of "crazy level" input power I'll likely be happy.@ Kleinstein Speed is not my concern, these are to be adjusted by hand and I think they should be "close enough" during my anticipated normal operation. How worried should I be about the gates? They are looking to be run well under their maximum ratings, possibly well under half. The 0.05 ohms resistors are heatsinked also, but I will run current through them to see how warm they get before making a final call on how much power I can get from them. In the worst case I can just use higher power resistors. For lower current I have a nice Kikusui load which is fully self-protecting and more convenient to use in any event. I am trying my best to make sure the conductors are similar lengths, and the 'ground' references taken from the same place. Please elaborate on the 'nasty case', I am not sure what you mean about turning down the mosfets. The way I have been using my loads to to make sure everybody is at minimal voltage and current settings, power supplies and loads, before connecting and powering on (and when shutting down). Also this load is for use with self-limited power supplies, so I think presenting a very heavy load at turn-on should be somewhat less dangerous than otherwise

author: Zero999
author_rank: Super Contributor
timestamp: May 19, 2020, 10:41:39 pm
content: What's the minimum load voltage required for this to work? Can you burn more power in resistors, rather than transistors?Oh and if you're interested in simulating a potentiometer using LTSpice, I did a tutorial awhile back which you might find useful, even if it isn't for this project.https://www.eevblog.com/forum/beginners/simulating-potentiometers-using-ltspice/msg2358510/#msg2358510

author: magic
author_rank: Super Contributor
timestamp: May 20, 2020, 08:42:28 am
content: The marketing "power dissipation" numbers are quite irrelevant, particularly for high power parts. Instead, look at thermal resistance and permissible junction temperature and do the math.Don't forget about case-to-sink resistance, which appears to be the primary limiting factor with very large FETs, assuming that those "typical" numbers I collected from various appnotes but never really tested myself are anything to go by:Code:TO264 .15 K/WTO247 .21 K/WTO220 .40 K/WThe above table really cooled my enthusiasm for 2kW devices with .0x K/W specs.Regarding offset voltage, it really depends if it's positive or negative. If at least one opamp ends up regulating its IN- to slightly higher than its IN+, you will never be able to get the current down to absolute zero. A simple solution to that is to allow the IN+ voltage to go slightly below ground. Furthermore, between any two sections, current imbalance will be equal the difference of their opamps' offset voltages divided by 50mΩ.editQuote from: Davidwasalreadytaken on May 19, 2020, 08:17:37 pmIt's simple. If the load is set for 1mA current but there is no PSU and therefore 0mA current, the opamps will apply full 15V to the gates. There will be a high inrush current until the opamps recover from saturation and discharge the gates down to the linear region. If the PSU has too much output capacitance perhaps the FETs may blow up, if its short circuit protection isn't as good as you think perhaps the PSU may blow upSo far I have had luck operating such unprotected load myself. It is, however, naturally limited to some 150~200% nominal current by base resistor and beta droop of the power BJT.

author: Vovk_Z
author_rank: Super Contributor
timestamp: May 20, 2020, 09:25:29 am
content: In any case, there has to be an offset correction circuit. It depends only on opamps TS will use - precision with dual supply or usual with a single supply.

author: David Hess
author_rank: Super Contributor
timestamp: May 20, 2020, 11:13:34 am
content: High currents through the low side returns between the current sense resistors and ground point is going to add errors and with so many sections in parallel, symmetrical wiring will be difficult. An alternate configuration where each operational amplifier is connected deferentially to its current sense resistor will remove the effects of the circuit wiring. Think of how it could be done with 4-wire current sense resistors.Quote from: Davidwasalreadytaken on May 19, 2020, 04:30:32 pmA slower part like the LT1001 would be more suitable. The least expensive single precision part is the OP-07 and the LT1013 and LT1014 are the least expensive precision dual and quad parts because they are multiply sourced.Even with a slower part, some external frequency compensation may be required for best performance. If expense is not an issue, then I might use a precision part which supports overcompensation like the LT1012 or LT1097.A higher performance design will require buffers between the operational amplifiers and MOSFET gates to better drive their input capacitance.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: May 20, 2020, 11:43:01 am
content: Quote from: David Hess on May 20, 2020, 11:13:34 amHi<1+This is how HP did it their high power loads:Schematic provided by forum member MarkF in this thread:https://www.eevblog.com/forum/projects/yet-another-diy-electronic-load/msg2460276/#msg2460276Regards,Jay_Diddy_B

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 20, 2020, 01:38:39 pm
content: @ Zero999 there is no minimum load voltage specification really. 5V is probably as low as I would use it, but it has been simulated ok down to 2V. IDK how it would do at low voltage on the bench. Thanks for the tips on making a potentiometer, but I find for myself it is instructive to be changing resistor values or voltages directly. It helps me to think more clearly about the circuit.@ magic if I don't get absolute zero current input that will be ok for my intended purpose. Even a large fraction of an ampere would be fine but I would like to be "close" to zero. The 'nasty case' . . . that's potentially pretty bad! The voices tell me I should be able to switch something to ground before turn-on to make sure everybody is on the same page. I will have to think about this a bit . . . the method HP used on the schematic linked by Jay_Diddy_B seems pretty clever.@ David Hess the low side of the sense resistors are the 'star' grounding point and the sense wires come from immediately on the other side of the body of the sense resistors. I don't know how much closer I could get than that. Symmetrical wiring is one of the aesthetic design goals, and it seems pretty elegant that it is also a functional goal! The only 4-wire sense resistors I have handy in quantity are 0.01 ohms and I am not sure I want to go that low. They are rated for much more power but I don't think I will need that. The choice of opamps was dictated by parts on-hand as I am currently at $0 of my $0 budget for this item, so I am going to have to make them work but thank you very much for the suggestions. If I end up with instability I will try the above suggestions to cure it first, but adding a pre-driver stage of amplifiers is now on the list so thanks for that too.@ Jay_Diddy_B that is fascinating, thank you. I was wondering how the others were thinking to get a 4-wire measurement and that explains it nicely. That is something like double the complexity of my current idea and with David Hess' idea I'm heading on up to 3x complexity! If I can get by with my simpler circuit I will do but if I find it doesn't work as expected you guys are definitely giving me lots to consider. Using that sense circuit seems like it would make things more reliable if I wanted to use my 4-wire 0.001 ohms resistors. The TurnOn circuit is interesting and seems to obviate the 'nasty case' magic was talking about. If I read this correctly, the gate drive is low enough to keep the FETs off until the diode is biased out of the way. Is that right? Blessing be on that color-highlighted schematic!The service manual with explanations is herehttps://www.keysight.com/en/pd-1000001519%3Aepsg%3Apro-pn-6060B/300-watt-dc-electronic-load?pm=PL&nid=-536902299.536880312&cc=US&lc=engfor anyone may want that

author: Vovk_Z
author_rank: Super Contributor
timestamp: May 20, 2020, 03:42:14 pm
content: Quote from: Davidwasalreadytaken on May 20, 2020, 01:38:39 pm- It isn't very ok, because it will turn transistors fully on if there isn't a connected DUT power supply. Then if you connect it live - you'll have a sparks and can weld wires. So it is better to have a comparator or something which will turn the load off (automatically or not).I used a comparator, look at my attachment (but there is no need in VT2).

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 20, 2020, 07:48:07 pm
content: Is that driving the outputs of the opamps low in the absense of a current signal? I could sit down and figure it but a hand-wave overview in a sentence would be welcome! I wonder what you think of the scheme used by HP as posted above by Jay_Diddy_B as an alternative?

author: David Hess
author_rank: Super Contributor
timestamp: May 20, 2020, 08:27:06 pm
content: Quote from: Jay_Diddy_B on May 20, 2020, 11:43:01 amWow, they used an instrumentation amplifier for each sense resistor. That is sure one way to do it.What I might do is generate a positive compliance reference current for each section (1) and use this to drive a precision resistor tied to the negative side of each 4-wire current sense resistor producing the reference voltage for that section. Now when high current through the ground return raises the low side of the sense resistor, it raises the low side of the reference resistor by the same amount.(1) This is easier and cheaper to do than it may first appear. The impedance of the current source only has to be higher than the resistance of the high current return wiring to provide error cancellation so a voltage source driving multiple precision resistors to make a divider with the reference resistor is sufficient. So it requires half of the resistors of the instrumentation amplifier implementation and no operational amplifiers or maybe one.

author: coppercone2
author_rank: Super Contributor
timestamp: May 20, 2020, 08:29:08 pm
content: test it in a steel boxMaybe a used PC tower that you put hinges onall the analysis does is save you money, the test is going to be critical

author: David Hess
author_rank: Super Contributor
timestamp: May 20, 2020, 08:32:39 pm
content: Quote from: Davidwasalreadytaken on May 20, 2020, 01:38:39 pmIt seems that you have it well in hand then. The remaining problem with the wiring is that the 600ppm/C temperature coefficient of the copper wiring degrades the precision of the current sense resistors.QuoteIt is easy enough to add a feedback capacitor from the output to inverting input of each operational amplifier to limit bandwidth if that is necessary. Gate drivers would be required to support higher bandwidth.

author: Kleinstein
author_rank: Super Contributor
timestamp: May 20, 2020, 09:10:46 pm
content: The turn off part in the HP schematics seem to hard turn down the gate drive. This looks like brute force, driving the OP into there maximum output current. The actual control (e.g. comparator) is still not shown.One way to avoid driving the gate all the way to saturation would be to add a limit to the effective resistance. So the current set signal should not be larger than a fraction of the MOSFET drain voltage. This would effectively make a kind of the constant resistance more that takes over ones the voltage gets to low. Practically one would likely have a divider for the set point signal and clamp the voltage before at a slightly larger level (e.g. some 2-5 V full scale).In addition there should be some offset so that 0 current can actually be reached.

author: Vovk_Z
author_rank: Super Contributor
timestamp: May 20, 2020, 11:40:51 pm
content: Quote from: Davidwasalreadytaken on May 20, 2020, 07:48:07 pmYes, I'm about that.Quote from: Davidwasalreadytaken on May 20, 2020, 07:48:07 pm- it's a pro way. I've seen that. If you need something very durable and can afford some complexity and have physically enough space - of cause it is better. My circuit is for a small simple low-power (50-200 W) device with an ATX-case size.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: May 21, 2020, 12:12:34 am
content: Hi,I measured the input current on an HP60501A, essentially the same circuit.Reproduced from this thread:https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg2725614/#msg2725614Let me start with a little benchmarking. I will display the test results for an HP 60501A (150W) load module in a 6050A mainframe. The load is set to the 3A range and 1A constant current mode.The current was measured with a Tektronix TCP202A DC current probe.The power supply used for the testing HP665A set for 5V and 2A limit.Test 1This is using the ON/OFF button on the power supply.Test 2This is 'hot-plugging' the power supply into the load.Note:the current scaling was changed from 200mA to 500mA/divIt would be interesting to see the results for testing other popular electronic loads for example B&K, Rigol, Maynuo etc.. I don't have any of these.Jay_Diddy_B

author: schmitt trigger
author_rank: Super Contributor
timestamp: May 21, 2020, 03:01:33 pm
content: Quote from: Davidwasalreadytaken on May 19, 2020, 07:01:14 pmYou must be familiar with Murphy's law.In colloquial English it says: Sh!t happens.Include at the very least some fuses.

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 21, 2020, 03:05:09 pm
content: @ Kleinstein I simulated a diode from the gate drive to ground and sure enough the opamp is trying its (feeble) best but the gate never gets enough juice to turn on. Brute force indeed, but it looks like a simple and effective way to implement a system to switch the load off. I modeled it and the mosfet was passing nanoamperes of current, which is effectively zero for my purpose! The LT1007 is rated for continuous short-circuit so . . . it's not very elegant and I don't fancy driving a part at the maximum output even if it can take it . . . but I anticipate not using it for very long. I suppose I can call that a good-enough way to solve this particular problem.I think it would be a good idea to run a diode from each gate drive to ground, interrupted by a single switch. Unless I have taken too many crazy pills today, that would be an effective hard OFF switch.@ Vovk_Z thanks for the confirmation. Space is definitely available in this case!@ Jay_Diddy_B on that thread I saw the scheme proposed by MarkF, here:https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg2725130/#msg2725130using a separate circuit to supply a small amount of current to give some current through the sense resistors. The way I use my loads, they are always turned down at the first, so that would also work for me I think. I'll scratch my head about this over the weekend.@ scmitt trigger you will be happy to know I have added fuse holders for the source connections of each mosfet, which uglies up the design a little in practice but should prevent something really nasty happening in the event of unforseen circumstance. I am still toying with the idea of adding fuses on the gate drives but we'll see how that goes.Thanks again to all for your consideration and valuable contributions

author: free_electron
author_rank: Super Contributor
timestamp: May 21, 2020, 04:01:34 pm
content: if you are going to build that HP schematic: that opamp driving the fets has some weird characteristics. i built a number of these hp clones. i never could get it to work properly without using that exact opamp ..

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: May 21, 2020, 06:47:31 pm
content: The main thing I got from that is the technique to keep the opamps from swinging to maximum output with no current flowing, due to opamp input offsets. But thanks for the heads-up that must be super duper frustrating!

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: September 05, 2023, 06:56:57 pm
content: Very late-hit followup post to give some of you a good laugh. I built it, and have been using this for the last many years to test various power supplies that come through my shop. It works, and it works well. Usually. Except for today, when the mains cables for the volt meter came loose and gave wacky readings. Since the side panels were off for repairs, I figured I may as well show my work.Yes, this was built in the case of an ancient Tektronix oscilloscope. The pop-up/off side panels are extremely handy. The front and rear are old ventilated covers from some Hewlett Packard and ... whoknowswhat branded equipment that were retired. The sensing element came from a high power something or other, possibly an uninterruptible power supply? I forget, but it's basically a giant angle of metal. Internal wiring is ... not as tidy as humanly possible.Surprisingly, it all works well enough with everything on protoboard! The only thing that isn't on a board is the instrumentation amplifier, which is dead-bug on a socket with long legs, and I think a couple spots of hot glue. Before the wiring was installed, I was proud of my tidy and symmetrical PCB work. At least the wires are all in screw-tightened connectors, which made for very easy installation!I added a switch to cut the drive to the transistors, marked Enable. There is a coarse and a fine current adjustment, which are both very useful. The current under load sometimes drifts for various reasons including but not limited to heating of wires attached to sources, so a little babysitting of the fine current knob is sometimes necessary. The 4.5 digit meters are perhaps excessively precise but they're nice to have. Calibration was a little tricky for the current meter, but it works great and matches indications on power supplies this is used with, so that's close enough for horse shoes.The unlabeled front panel switch is for the fans, which have their own power source. They are 2U server fans and sound rather loud when running. I mostly only run them when I know I am going to be pumping over 400 or 500 watts into this, for extended periods - or over a kilowatt for any length of time.The input cables are extremely flexible, I think 8AWG very fine-stranded. The cable assembly had sensing wires built in, and wire loom outside, when I got it. The Heyco white cable clamps were in spares, which made me unreasonably happy. I ran the sense wires to banana jacks just in case I wanted a sanity check on voltage. All outputs are fused individually. On one occasion I managed to blow all the fuses. I was annoyed at how inaccessible some of them are, but VERY glad they were present!There are a selection of random capacitors on the input, and a couple of very big clamp-on inductors. These were experimentally selected, to (mostly) eliminate *audible ringing* of the circuitry (!). Sometimes when current changes rapidly, the inductors will chirp or make grinding noises.The "can't draw more than" label was experimentally derived with the help of a Xantrex supply that could easily give 130 Amps into a few millivolts! I think the max. input numbers are based on a slightly conservative reading of the SOA graphs times eight, and I haven't tried those. These are scary power levels for me, so I have only rarely used this unit to sink much over a kilowatt.Total budget was observed, $0 as all of this came from scraps and spares on-hand. Thanks again to all who offered advice!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 05, 2023, 10:01:45 pm
content: Quote from: Jay_Diddy_B on May 19, 2020, 07:30:36 pmThis is a poor document, for a couple of reasons, but the primary one is the assumption of fixed Vg, which any reasonable analog engineer knows is not how you operate a transistor. It's the correct assumption for beginning a model of spot runaway, but they stop short of actually considering what the lateral thermal conductivity of a die is; which depends on chip thickness, die attach thickness/quality, and baseplate thickness. They note possible nonuniformities, but not what effects might compensate for them; and they miss out on the boundary conditions that are necessarily present in every device: there's power dissipation in the middle of the chip, and none somewhere near the edges; in the middle, there's plenty of chip, and at the edge, there's no more chip (no lateral conductivity)! So their argument reduces to: why can't we use multiple whole devices in parallel, and that's something any engineer already knows, they don't thermally track.The more impressive conclusion, then, may be the converse. There necessarily exists a stable region where, even without thermally coupling together parallel transistors, they will indeed share power; as long as they have similar Vgs(th), yfs and RthJA overall of course. And, given these parameters, one can calculate whether that's a meaningfully usable range; which I suppose even if it's a few watts, could be worth saving the opamp(s) in the rare case where matched transistors are available but common heatsinks (or just bigger heatsink for one, lmao) is possible. Well okay, emphasis on "rare".Tim

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: September 06, 2023, 03:25:17 pm
content: That's interesting, thanks for sharing. It reads like a student's research paper looking at what to them is a new problem with fresh eyes. I imagine what the literal rocket scientists miss, the papers from 1997+ in the automotive and other literature is likely to have covered, but for those of us not working on a thesis on topic, this paper hints at fascinating levels of geekery that have gone into the problem.Revisiting my maths, it looks like I marked maximum current capacities on the low side, by a factor which probably made sense at the time, vs. the SOA limits shown at all voltages. As the runaway failure mode mentioned in the linked paper creeps in from the high voltage side of things and I'm operating mostly WAY under 1/5 of the rated voltage here, and as I haven't killed it yet (LOL) I think I'm okay, but I'll have to bear the concept in mind going forward.

author: nctnico
author_rank: Super Contributor
timestamp: September 06, 2023, 03:42:06 pm
content: Quote from: Kleinstein on May 19, 2020, 07:51:54 pmEven that is high. In quality commercial DC loads you typically see these are designed to dissipate 40W to 50W per transistor. My 1500W DC-load from TDI uses no less than 32 MOSFETs in a TO3 case which comes down to 47W per MOSFET. The Korad load I bought recently, sits at 38W per MOSFET.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 06, 2023, 05:05:33 pm
content: I built a load some years back, using 3 x FQA9N90C, which runs them -- I forget what the peak was, 100 or 200W max? Overall operating range up to 4A, 100-500V. (How is that possible? Tons of ballast resistors. It's a switched-resistor bank first, a power DAC if you will, and the linear sink fills in the gaps. Saves greatly on heatsink area.) In that time, I've cooked them up to design ratings, and, yeah everything works just fine. I have actually had two device failures, which I can potentially attribute to thermal cycling or poor mounting (one, the grease under it seemed to separate..?!), but have no reason to suspect the device SOA is false.FQA9N90C are Fairchild QFET process (now obsolete), which I *think* is a conventional planar process; compare IRF740 (classic HEXFET), give or take subsequent optimizations. Of course it's not a "HEX"FET, but that's probably what they mean by "stripe", it's rows of transistors instead of a hex mesh of them -- whatever.There isn't really an equivalent to them today; the nearest-rated cheap part current stocked at DK is Toshiba TK10J80E,S1E, which despite being the superior Superjunction process (they don't say so, or, you'd have to look up what "π-MOSVIII" means, but it's evident from the step change* in Coss and Crss), is only about a factor of 2 improvement in Qg*Rds(on). It doesn't have full SOA, but does have 2nd breakdown starting at a modest 200V, and usable power (40W or so?) up to 400V, so that's not awful.There are SJ MOSFETs with full DC SOA out there; they're just lower power, or higher cost. Or the few surviving planar families -- IXYS is still making a few PolarHV types, which I think are planar. But IXYS is expensive, and you might as well use their linear-rated families if you're going to pay most of the price anyway.*They actually show it as a step change! Most mfgs measure this parameter at a rapid Vds sweep rate where the step change is blurred out -- there's an RC time constant effect internal to the structure -- and yes that contributes switching losses -- with the result that you get a smoother curve but it's unrealistic, you'll never measure the same thing in the circuit. They also show the rising edge, which overestimates capacitance oddly enough, but critically it's not the same measurement rising vs. falling, which is to say there's a hysteresis loop in the capacitance measurement -- which is to say further: a loss element. But here, Toshiba measured it slowly enough that the step change is evident. It really does "switch" capacitance; it's actually even scarier than that (capacitance is undefined, or a multivalued function of Vds (including very large positive and negative values) in the transition region), but, nevermind that.And yes I'm proud of that "discovery" and want to make it known as widely as possible. It took me ages to finally find all the information to put that together, including my own measurements. The manufacturers sure as hell don't tell you about it!Tim

author: coppercone2
author_rank: Super Contributor
timestamp: September 08, 2023, 12:42:50 am
content: really trying to push mosfets down everyones throat with deceptive advertising!apparently RF filter manufacturers play the same sweep/smoothing game with performance too.Kinda funny how the manufacture of these MOSFETS is one of the most expensive common processes (compared to say making bolts) but their use is so poorly documented. you would think it would be the most documented and tested thing available on earth given the resources put into making them.it reminds me of the old accounting trick where you 'spread' the documentation of purchases through the quarters so there is no spike! (why I don't know but I know its done)it ends up being kind of like averaging the height of a telephone pole into the slope of a hill (based on the surface area of the telephone pole top) in the path of an air plane.for some reason it makes me think of like seedy corporate behavior involving large projects in general. like failing campus, specialty district, etc. seems that there is an assortment of standard 'deceptive' practices you need to 'install' in your business to 'mitigate' problems

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: September 08, 2023, 01:32:18 pm
content: Perhaps that is a little too unkind to the engineers (sales weasels are a different question). Hanlon's razor always applies, and I think engineers can be excused for not rigorously testing their switching FETs for edge-case failure modes when they are used in ways never intended. Perhaps the reply to "why didn't you test for this failure mode and characterize your device properly" would sound something like "why didn't you use the right part in your application?"

author: coppercone2
author_rank: Super Contributor
timestamp: September 09, 2023, 03:23:29 am
content: you can bet the data sheet was HIGHLY redacted by salesif an engineers were behind it, it would be a text book of different graphs. whats easier figuring out whats 'good' data or just posting all your recordings ? at work typically you make recordings all damn day. what did you do today? *hands boss a wad of recordings*its great, shows how much work you did too. all those graphs and tables. you put hard work into making all those measurementsand you get credit for the 0.1% that make it into the sales brochure/project cover sheet.the data does exist because the figure heads need to be confident in being able to vouch. people throw em curve balls. there has got to be tomes of ityou think no one thought for all these years to be able to sell a part for MORE then just switching? more APPLICATIONS = MORE SALES.you know that the real reason was "well we don't want to confuse the customer!"

author: p.larner
author_rank: Frequent Contributor
timestamp: September 28, 2023, 07:14:56 am
content: looks like running fets in linear mode is just a bad idea,i think bjt's would be better but current driven so more complex drive methods needed.

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: September 28, 2023, 01:14:13 pm
content: Thanks for commenting. I made one with BJT power devices as well, haha! I like this FET one better for its higher voltage and power capacities.I did this:https://forum.allaboutcircuits.com/threads/a-high-power-active-load-for-dc-power-supply-testing.168850/

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: September 30, 2024, 07:56:46 pm
content: Everyone be amused/facepalm/take caution from my example!I had to switch out all the FETs today, because I blew them all up. I kept not blowing up this load at increasing power levels, and did not take a hint from blown fuses at 35V 60A input. Twice.Soooooo I was happy to have a handful of APT 30M85BNFR, which is a 300V 40A 0.085 omhs RDSon TO-247, in place of the 47N60C3, which are 650V 47A 0.07 ohms device. It's got a lower current rating at DC at high voltage, and it always made me cringe to draw much over 1kV, so I'm gonna derate my load and tell myself not to draw more than about 1200 Watts. Anyway, 5 hours later, it's up and running againupdate: it blew up again.time to get some higher power FETs so I can blow it up again i guess

author: PCB.Wiz
author_rank: Super Contributor
timestamp: September 30, 2024, 09:19:10 pm
content: Quote from: Davidwasalreadytaken on September 30, 2024, 07:56:46 pmThere is no over voltage/spike measures in #1 ? Also adding gate-source clamp zeners would help protect against long wire effects.You need to decide if it is going unstable, or a SOAR failure.It is common to add a cap from the opamp output to -ve in, when driving high C loads which helps control overshoot.If all fets fail together, that suggests an over voltage effect.

author: Davidwasalreadytaken
author_rank: Contributor
timestamp: October 01, 2024, 02:56:02 pm
content: It would not surprise me a bit if the device was unstable, but I was pushing over 150W each DC through these replacements at relatively low voltage, without so much as a finger-thermometer to keep an eye on temperature. VERY careless of me, I know. They also did not fail simultaneously, but the last ones failed as I was increasing current again to see what would happen(spoilers, they popped). Apparently they were not sharing current at all evenlyThanks for your ideas, I will research them for v1.2 when this load gets rebuilt.