Ideas for switching an I2C bus? - Page 1
Forum section: electronics / projects

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 10:41:07 am
content: I need to interrupt the SDA & SCL lines on an I2C bus.Let's say VDD1 powers the master and two slave devices and VDD2 powers the other slave devices which need to be disconnected.When power is applied VDD2 rises faster than VDD1. The switch should be closed when VDD1 rises a fixed level.When power is removed VDD2 falls faster than VDD1 and the SDA & SCL lines should be interrupted so the other slaves don't get powered through the SDA or SCL lines via the input protection diodes.In other words the switch should act like a DPST relay and I have a MCU, which is the bus master, at my disposal.How do I do this?

author: tatus1969
author_rank: Super Contributor
timestamp: November 27, 2016, 10:52:12 am
content: NXP and others have a range of I2C switches and hubs, have a look there.

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 10:56:04 am
content: I did look but I don't know what to pick.

author: Rerouter
author_rank: Super Contributor
timestamp: November 27, 2016, 11:03:42 am
content: For i2c devices you only need to interrupt the clock line to isolate a device, how I did it in the past was a level shifter powered off the switched vcc. I'll dig up a schematic if it's not clear.However in my case I already needed a level shifter, so I cannot say if it would be any cheaper

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 11:08:24 am
content: In my case I'll have to interrupt both the data and clock lines because the other slaves (VDD2) won't be powered and I'll have the pull-up resistors on the master side (VDD1). Also, the slaves on VDD2 are powered up before the master.

author: tatus1969
author_rank: Super Contributor
timestamp: November 27, 2016, 11:28:31 am
content: PCA9512 should suit your needs.

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 11:39:35 am
content: Nice! It works like an I2C digital isolator except without the isolation.As a side note, I really hate NXP's product selection pages.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 27, 2016, 11:41:32 am
content: They won't self-power*.*If they are compliant to true I2C specs. Check the I2C spec yourself, and compare with the input pin specs on the parts in question.Tim

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 12:20:24 pm
content: Could I get away with an analog switch like the 74LVC2G66? It's cheap.Switching the power between VDD1 and VDD2 shouldn't be too difficult as I already have some power switching circuitry in place and the enable input is active high...

author: tatus1969
author_rank: Super Contributor
timestamp: November 27, 2016, 05:22:20 pm
content: Quote from: T3sl4co1l on November 27, 2016, 11:41:32 amwhat do you mean by that?

author: void_error
author_rank: Frequent Contributor
timestamp: November 27, 2016, 05:35:46 pm
content: Quote from: tatus1969 on November 27, 2016, 05:22:20 pmBe powered through the inputs via the input protection diodes for example.

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 06:26:44 am
content: It turns out that it's possible to use an analog switch as describedin this application note from maxim. For the 74LVG2G66 the off-state leakage current is up to 1uA but I don't think that's a problem. However I'd need 3 analog switches because I also need to disconnect the MCU's comparator input from a voltage divider. Time to look for a SPST analog switch.

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 07:01:50 am
content: This should work...EN is tied to a microcontroller digital output.CMP goes to a microcontroller analog input.I2C goes to the micro and 2 slaves while I2C_EXT goes to an off-board connector containing other slave devices which are powered from +3V3. I2C_EXT has pull-ups to +3V3_SW.

author: Jeroen3
author_rank: Super Contributor
timestamp: November 28, 2016, 07:29:29 am
content: Quote from: void_error on November 27, 2016, 10:41:07 amSearching for a i2chot swapcontroller perhaps. SMbus is also i2c, and is used on various pc cards, which could be hotswap.Try it there.

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 07:48:48 am
content: I don't need it to be hot-swappable since nothing needs to be plugged or unplugged from the bus during operation.I needed to switch the bus when power is removed so I can save the data to an EEPROM powered by the capacitor bank shown above, it's ten of them because I have a height limit.This means in this case I can get away with an analog multiplexer.

author: tatus1969
author_rank: Super Contributor
timestamp: November 28, 2016, 10:08:54 am
content: Quote from: void_error on November 28, 2016, 07:01:50 amLVC1G66's datasheet states an input clamping current at VI > VCC+0.5V, which indicates that it has symmetrical input protection and would be parasitically supplied from its inputs when VCC is not present. I would better check that on a sample. If that is the case, then it would prevent I2C comms when +3V3_SW is not present.But I'm not sure if I get your circuit right. You were talking about VDD1 / VDD2 in your first post. Is VDD2 relating to '+3V3', supplying 'I2C' connected stuff, and VDD1 relating to 'VDD' in your circuit, supplying 'I2C_EXT' connected circuitry? Why are your pullups then connected to VDD, and not to +3V3?

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 10:30:40 am
content: VDD1 and VDD2 were used as an example.Now, let me make things clear...+3V3 is the main supply, coming from a switchmode regulator. That's the only supply input, +3V3_SW and VDD were used for convenience as labels only, it makes drawing/reading the schematic a lot easier.With the whole thing powered from +3V3, at power-on +3V3_SW will be a diode drop below +3V3 and the capacitor bank on VDD starts charging through the 33 ohm resistor which is there to limit current. Before VDD reaches the power-on reset threshold of the micro EN & CMP are in hi-Z state and pulled to GND by resistors. After the threshold is reached, the micro starts running the code and pulls EN high.When power is removed from the regulator's input the output will drop and the micro will sense that and pull EN low, disconnecting itself from the +3V3 rail and the external I2C and save the data to an EEPROM.The analog switch will be powered if there is a voltage present on +3V3 or VDD.On second thought it might be better to monitor the switching regulator's input voltage rather than its output...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 28, 2016, 12:36:40 pm
content: So what are youactuallydoing here? Is this an X-Y problem?http://xyproblem.info/Because I already answered your OP,Quote from: void_error on November 27, 2016, 10:41:07 amThe answer lies in the datasheets. Read them:Quote from: T3sl4co1l on November 27, 2016, 11:41:32 amIf you're tacitly admitting that you're too lazy to look up these freely available documents, then please, stop wasting our time.If you already did, and theywillself-power, then you have two options:1. Add diodes, or some kind of interface device, so they don't2. Don't buy the chip that violates I2C spec. Don't encourage them. Find an alternative with the same functionality but I2C-compliant pins.There's no need or point in beating around the bush here.Tim

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 04:19:13 pm
content: My bad. Got it backwards. It's not the slave devices which would self-power but the microcontroller, the bus master, via the input protection diodes before the pins are configured as I2C pins. It's in the micro's datasheet. At power-on the pins are analog inputs by default, before the MSSP module is configured.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 28, 2016, 04:23:48 pm
content: Ah, okay...Are you sure of that? ESD protection diodes aren't something that can be disabled by software... it could be that the voltage ranges vary with pin state (so if it's configured for, say, 3.3V LVCMOS I/O, it has a transistor+diode which clamps lesser currents to the rail, but excessive surges will still exceed that voltage and be handled by the normal ESD protection circuitry).I must say, I don't like the generally poor documentation most MCU manufacturers provide on their physical interfaces... things that could answer questions like this fairly easily.Tim

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 04:29:55 pm
content: http://ww1.microchip.com/downloads/en/DeviceDoc/40001825A.pdfpages 198 & 277.Not sure about the case where one of the off-board slaves is another PIC.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 28, 2016, 04:50:32 pm
content: Fig 12-1 shows unconditional diodes to VDD... so does the other one.The important line is on p.602, all other pins max VDD+0.3V.No mention of "5V tolerant" pins or anything like that.So, yep, you need a bridge. Which is what the standard recommends (because, of course they would..).http://www.nxp.com/documents/user_manual/UM10204.pdfTim

author: void_error
author_rank: Frequent Contributor
timestamp: November 28, 2016, 05:11:39 pm
content: I did read that pdf before you linked it.There's some info on page 11 at the bottom of the table which says "If their supply voltage has been switched off, SDAH and SCLH I/Ostages of Hs-mode slave devices must have floating outputs. Due to the current-source output circuit, which normally has a clipping diode to VDD, this requirement is not mandatory for the SCLH or the SDAH I/O stage of Hs-mode master devices. This means that thesupply voltage of Hs-mode master devices cannot be switched off without affecting the SDAH and SCLH lines."According to the micro's datasheet only standard and full speed modes are supported so that's 400kHz max.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 28, 2016, 05:45:10 pm
content: Yeah, and that clause is there because the Hs mode drive is different -- it's not just open drain like the low speed modes are.Tim