PCB layout comments and suggestions - Page 1
Forum section: electronics / general

author: RiverTown
author_rank: Regular Contributor
timestamp: August 01, 2014, 03:39:52 pm
content: Hi,I have finished pcb layout for ESR meter project described in this topic:https://www.eevblog.com/forum/beginners/yet-another-esr-meter-project/msg481104/#msg481104Please post your comments about schematic and PCB layout.Would and what would you change? What is your overall opinion about design?Thinnest track 12 mil, and smallest spacing 7 mil.Board dimensions are 80x 50 mm.I still didn't check return current path, I've just randomly put vias where it thought there are needed.Does anyone have experience with PCB with slots and Itead Studio?Blue rectangle should be routed out, there are also some slots in pot and DC jack pads. Should I make separate layer for slots, or just draw them in the board outline layer?SchematicPCB- Planes ONPCB- Planes OFFI know that is hard to see everything from the images, so there are eagle file in attachment if someone wants to take a closer look.

author: jakeypoo
author_rank: Regular Contributor
timestamp: August 01, 2014, 04:22:11 pm
content: QuoteI think inside cutouts are okay at itead. Just remember, there's no such thing as a square router. The cutouts will have a radius in the corners. It's better to specify that, rather than find out the square boss in the case you want to put it in doesn't fit. Same goes for that cutout next to the dc barrel jack. I usually account for a 0.5mm radius. so you might need to make your cutouts bigger if something is going to be fit in there.

author: RiverTown
author_rank: Regular Contributor
timestamp: August 02, 2014, 12:45:23 pm
content: Yes, I know that. I've made cutouts slightly bigger than they need be.

author: RiverTown
author_rank: Regular Contributor
timestamp: August 05, 2014, 11:33:29 pm
content: Me again.Judging from the response it looks like that this topic is quite boring for most of the forum users.I've made some small changes in the PCB, and experimented with importing images in PCB design. Updated files are in attachment.Also I've decided to use Smart prototyping for PCB production instead Itead. They offer better price and better lead time.Yesterday I had little play with 3d gerber viewer from this site:http://piratery.net/grbv/Nice tool. These are the results:

author: Precipice
author_rank: Frequent Contributor
timestamp: August 05, 2014, 11:47:52 pm
content: A quick (and probably too late) suggestion -When you short adjacent pins together (like you do on IC5, IC6, IC1, IC4), you might want to do it with a loop of track, rather than going straight from pin to pin.It just makes it easier to inspect the assembled board, your eye will tend to be drawn to that bit of copper (and, if the solder mask isn't present because there's not room), there may be solder. It looks like a problem, but isn't. It's just annoying - they stand out, and sometimes you end up chasing and fixing problems that aren't real.Some of your IC pin 1 markings are also hidden by the chips. Again, no big deal, just a pain if you're inspecting the board, looking for problems.Also, your IC3 ident touches the pads.Looks OK, though, from a quick check. Probably not worth generating another set of gerbers? I've shipped far worse

author: tautech
author_rank: Super Contributor
timestamp: August 06, 2014, 12:03:43 am
content: I am never in a hurry to call a design finished!Look, look and study your PCB.Other than that already mentioned, increase the TH pad sizes for easy soldering.I always make diode cathode pads and pin 1 of IC's square or rectangular. Or add a dot of copper to show pin 1.Then for DIY PCB's you can minimize the amount of info needed on the overlay.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 06, 2014, 02:31:48 am
content: Signal levels aren't very much (fractional volt?), though impedances are kind of low around the test part. So it makes sense to have some ground stitching around there, but one via every mm or less is unnecessary -- this isn't 20GHz! Instead, heavier traces will do more benefit, reducing the ESL of the path. (A proper ~10 ohm transmission line would be huge, probably 1cm+ wide, so you wouldn't even be able to implement that here. Anything smaller will show up as inductive, so that's pretty much what you're limited to.)So the parts of the sense trace that are within the planes aren't terrible, they'll be inductive, but maybe that's not a problem. But then you have them leave the ground plane altogether, as if at line potential! You have many times more inductance in the gap between traces there than you do along the carefully stitched paths. There's no such thing as line voltage here (or ESD or EMC, for that matter), so no need to pull back the plane and make things worse.Some of the routes are funny looking, like C19 to C6: why does the trace dip under, just to pop back up a few hundred mil later? Might as well help minimize the routing -- you can always add more stitching vias later.ESD, EMC: I guess C15 is intended to block DC into the circuit, but are you intending that this thing be able to test an accidentally charged capacitor? That's pretty nasty. IC5, IC6, R14, even D1/D2 are probably all toast after such a transient. Same for ESD, beyond the 4kV the LTC6244 is rated for (and depending on internal diodes is risky at best).Likewise, any external noise (EMC, RFI, etc.) will be rectified and sensed as reduced ESR. The general susceptibility shouldn't be too bad (nearby electric fields, for example, won't have a very easy time pulling around <1k loaded traces), but a cable of the right length plus a nice little radio source (it could be a powerful radiotransmitter, or a handheld, or even a damned GSM cellphone -- blip blip blip!) and your measurement is bad.Also, I expect you aren't interested much in ESR below 3 ohms, since that's about what C15 limits things to (by reactance, not resistance).More stitching: it's applied inconsistently. As long as there's no floating patches, this probably doesn't even matter, but it looks odd. The trace from R16 to D3 for example has several, while the power trace near SL2, or the traces between IC1 and R3-R5, have little or none.For general use, my feeling is, use a 12 mil i.d. via, spaced every 400 mil or so, along a group of traces. Traces of similar purpose are grouped as buses to minimize space and stitching. (Of course, some traces you don't want together, and should be routed separately.) At the intersection of two such traces/buses on different layers, try to make the intersection 90 degrees if possible, and place stitching vias in the inside corners around the crossing. Finally, inspect the negative space that is the ground pour itself: anywhere a peninsula is hanging out, either reshape it to a bulkier outline (by moving around nearby traces), or tack it down with a via. Example: the patch between R4 and R5, where the trace to R5 hooks up and away from the others a little sooner. Those traces could be routed tighter until the last possible place (the trace to R4 could even enter the pad sideways, and the trace to R5, hugging tightly on its way up), or another via added near the point where the traces diverge (the divergence could even be exaggerated, by pulling back the R5 trace even further, enough to place a via in that crotch between the R4 and R5 traces).Similarly, the gap near SL2 is ugly, and could be filled in simply by pulling that fat trace over (it doesn't have to leave the polygon at C3 in the middle, it could hug the side).There are also some voids near components, such as D3 (ground doesn't fill between the pads?), R12, R10 and a few others. In those instances, I like to have the traces hug as closely as possible to minimize the excluded area, but they should be able to fill from the polygon anyway (why are the footprint pads so close together?).Regarding the power supply, why use two 2.5V regulators? Why not invert the 2.5 the first time? You'll also get longer battery life using a switching controller, which need not be fancy: you can get small, quiet, low power (and low quiescent) chips for the purpose. Or if it's always a 5.0V source, who even needs that, just use a divide-by-two style charge pump IC! Or who needs ground at all, better still: add a virtual ground and connect the input to +2.5 and -2.5V! (Even with the battery controller and all, you can still do this, it'll just be returned to -2.5V instead of "GND".)The supplies appear to be quite well bypassed -- all the caps are about as close to 'point of use' as possible, and the routes enter the cap first (kinda-sorta shielding noise from the IC).I will add a note: anywhere you have two or more ceramic caps separated by a trace, you have a series LC resonant circuit (remember, the Cs act in series, so the effective capacitance that resonates is smaller than either individual cap). You can estimate the trace inductance and capacitor ESR, and after some waving of hands, come up with a reasonable guess at the damping characteristics. Guessing here, it's probably fine. The traces are short, and the capacitors are reasonable values, so the resonant impedance should be small, comparable to the ESR. It's not like there's much noise here (the charge pump I think will dominate), let alone much sensitivity to it (the sensed signal is relatively large, 10s of mV or more I think?).So, all in all, not terrible. I don't see any glaring dumb mistakes -- it will work as advertised, at least away from radio transmitters, and electrolytics with excessive residual charge.Many of these notes are somewhere between "well, so what" (e.g., outside of RF, who really cares how well ground is stitched?), and outright personal preference (as long as the trace gets there in a timely manner, who cares how it's routed?). So, despite the quantity written above, don't read into them very much!Tim

author: RiverTown
author_rank: Regular Contributor
timestamp: August 06, 2014, 02:08:14 pm
content: Wow guys, thank you very much for great responses. You were very helpful.There are always some overlooks that are easy to spot by others, so other opinions are very important to me.Quote from: Precipice on August 05, 2014, 11:47:52 pmYes I was in dilemma how to connect that pins. It is a simple board so I decided to connect them straight forward. On more complex board I would definitely follow yours advice.Quote from: Precipice on August 05, 2014, 11:47:52 pmBloody built in library, I was too lazy to draw my own part. But yes, that can be very inconvenient when troubleshooting, so I added additional pin 1 markings outside of IC areaQuote from: Precipice on August 05, 2014, 11:47:52 pmAlready fixed...Quote from: tautech on August 06, 2014, 12:03:43 amI've already made all TH pads bigger, except for LEDs because they are looking clumsy when they are big.Eagle really have terrible TH pads on their components. They are ridiculously small. It's ok for manufactured PCB but for DIY they are pain in the arse.@T3sl4co1l thanks. I've made some changes on via stitching, and I've expanded ground plane.Quote from: T3sl4co1l on August 06, 2014, 02:31:48 amYeah I know that it looks funny. There was a lot of space on bottom layer so I decided to route IC supply lines completely on bottom layer. I could route these few millimeters on top layer but I thought that is better to left top ground plane connected than to use more via stitches.Maybe i should change that?Quote from: T3sl4co1l on August 06, 2014, 02:31:48 amI've assumed that frequency of oscillator will be pretty much constant. Another assumption is that because of constant frequency reactance is also constant, so its effect can be compensated by the gain of the amplifier.You can see some simulation results on the topic linked in the first post.A know that this isn't best practice, but it's just ESR meter. I don't have to be very precise.Quote from: T3sl4co1l on August 06, 2014, 02:31:48 amI've added via stitches randomly, so yes it looks weird.Quote from: T3sl4co1l on August 06, 2014, 02:31:48 amThat are eagles default footprints, I don't know why they have made them that way.Quote from: T3sl4co1l on August 06, 2014, 02:31:48 amWhen device is powered by a battery voltage can go low as 2,8V. So I couldn't just use virtual ground because voltage is to low.Step up converter or charge pump were only solutions.I decided to use charge pump and LDOs, mostly because ripple. I wasn't sure how much ripple would have negative effect on measuring circuit and I wasn't willing to risk.I' used charge pump that works on 250kHz. Also negative LDO is used so that ripple is additional attenuated (I know that LDO can't filter HF but it helped).Quote from: T3sl4co1l on August 06, 2014, 02:31:48 am100mVppQuote from: T3sl4co1l on August 06, 2014, 02:31:48 amI am aware or RFI problem but I don't know how solve it effectively.I must say that you shocked me a little with effect of transients on circuit.I've thought that that diodes will protect circuit from this short transients spikes. I know that 1N40XX are quite slowish, and that they aren't very strong but I assumed that they deal with it.What do you suggest that I should do to improve transient and ESD protection?Later on I will upload pictures of changed PCB.

author: RiverTown
author_rank: Regular Contributor
timestamp: August 07, 2014, 11:11:05 am
content: This is final layout..

author: Precipice
author_rank: Frequent Contributor
timestamp: August 07, 2014, 11:47:31 am
content: Not worth a board revision, but...Write the supply voltage and polarity near the connector on your next board.And, now I come to think of it, somewhere to reliably clip a scope probe's ground is always appreciated, when you're chasing bugs...and...and...Nah, ship it!

author: RiverTown
author_rank: Regular Contributor
timestamp: August 07, 2014, 09:57:01 pm
content: The circuit is already prototyped, so there shouldn't be too much of troubleshooting. Just some "just in case" measurement.In case that circuit hasn't been prototyped than I would definitely put some test pads on critical places with silkscreen markings.As for the oscilloscope ground clip...Resistor marked R200 is there in case that used battery don't have NTC. Than 10k resistor should be soldered or battery circuit won't work.In my case I have battery with NTC so I can solder piece of wire on the ground side of that resistor and clip oscilloscope probe on that.

author: tautech
author_rank: Super Contributor
timestamp: August 07, 2014, 10:29:34 pm
content: I like to use something like these:https://www.google.co.nz/search?q=0805+smd+test+point&rlz=1C1ASUM_enNZ497NZ497&espv=2&tbm=isch&tbo=u&source=univ&sa=X&ei=9fzjU6X1Lpbg8AWk2IDoBQ&ved=0CBoQsAQ&biw=1022&bih=751#facrc=_&imgdii=_&imgrc=IP5iBU8WB1YLuM%253A%3BLDKhSGBicj2eJM%3Bhttps%253A%252F%252Fd2t1xqejof9utc.cloudfront.net%252Fscreenshots%252Fpics%252Fa3009a3531c49e171c8737e9f87e2436%252Fmedium.jpg%3Bhttp%253A%252F%252Fgrabcad.com%252Flibrary%252Ftest-points-smd-1%3B704%3B469Sorry for the looong link.Probe reference lead or the hook end will grab them nicely.

author: RiverTown
author_rank: Regular Contributor
timestamp: August 08, 2014, 07:56:59 am
content: These hooks are nice. I didn't even know that they exist.

author: tautech
author_rank: Super Contributor
timestamp: August 08, 2014, 08:28:21 am
content: Quote from: RiverTown on August 08, 2014, 07:56:59 amFor a development or prototype PCB it is good to have a few test points at critical points IMO.There is some real classy stuff out there, but the price.This type makes for easy connections, can be placed nearly anywhere, relatively cheap and the bit I like....reused.My searches for similar found a few variants, but we went with 0805 for convenience when working with scope probe hooks.I think a mate and I shared a lot of 100 which was a much better price and some of those I got have been used 3 times. Needless to say even my 50 will last a while.Datasheet attached.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 08, 2014, 09:24:56 am
content: These ones are pretty popular:http://www.digikey.com/product-detail/en/5015/5015KCT-ND/278886A bit bigger than 0805 but plenty to get a scope probe or alligator clip around.Tim

author: RiverTown
author_rank: Regular Contributor
timestamp: August 26, 2014, 03:55:57 pm
content: PCBs arrived yesterday.Price for ten 5x10 cm PCBs and ENIG was 27.90 USD. Shipping was 8.24 USD via Deutsche Post with tracking number.Total: 36.14 USD.I' ve placed an order on August 7, production was over on Aug 12 and boards received on Aug 25.Total lead time was 18 days.Silk screen quality is ok, looks better than silk screen form Itead.One of the PCBs arrived defective. There is short between one track and ground plane, as shown on picture. They have 100% E-Test but marks from needles aren't visible. They probably just perform optical testing.It look like that solder mask between 0,5mm pin pitch components pads (QFN, MSOP) is too much for them, pictures included in attachment. Mask between pads was drawn, and I've followed their DRC file for solder mask expansion.Everything else seems fine.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2014, 11:25:45 pm
content: Pretty crappy "optical inspection" if that's what they even did...Solder mask should be in their rules, as far as minimum sliver width and pad oversize clearance. Soldermask between pads on QFNs, TSSOPs and so on are pretty normal even for big-buck houses; NSMD (non-soldermask defined) pads are also SOP for assembling those parts. I don't think there's anything wrong with that; it's not like you were going to squeeze a trace between those pads anyway. It does mean you should avoid metal between pads whenever possible, like those paired pads on the QFN. That's not going to solder as pretty, and makes inspection tricky.The silk registration is terribleTim