Amplitude modulation of AD9834 DDS - failed, but why? - Page 1
Forum section: electronics / projects

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 12:03:18 am
content: Hello,I've been experimenting with amplitude modulation of AD9834, but I have rather failed but don't know why.Based on this application note for a similar DDS:https://www.analog.com/media/en/technical-documentation/application-notes/AN-423.pdfand based on the datasheet of AD9834 directly, I have concluded the FSADJ pin leads to some kind of a current mirror, which sets the DAC FS current, but 18 times smaller. (the DAC full scale current is 18*1.15V/Rset)So what I've done was enhanced the circuit from that AN-423 with some precision. However the result was quite not expected. The DDS can not be fully modulated and it does weird sh!t.Below is the schematic of my experiment, below that a DSO capture of the voltage when the required modulation depth is small ) - the voltage on FSADJ does not change much (which is expected), the source voltage copies the input one well.When I try to apply more modulation, the FSADJ pin starts to go to GND, then to normal, then to AVDD (+5V) - what the hell is going on there? In such case, the output is not much modulated and modulation envelope is fairly distorted. I can get a maximum of about 20% modulation depth.I even should not be exceeding the maximum FSADJ current. Max DAC current is 4mA, which is 4/18 = 220uA FSADJ current. Scope shows about 400mV peak at R7, equaling 180uA peak current (or 3.24mA respectively).(FSADJ pin yellow, source of the 2N7002 in blue).Tnx for any hits with this.

author: MarkF
author_rank: Super Contributor
timestamp: April 07, 2019, 01:55:28 am
content: I used this App Note to drive the FSADJ from 0V to 1.2V to control the amplitude of my AD9834.I'm just driving REFOUT with a DAC and a resistor voltage divider.The only difference is I only have a capacitor connected to REFOUT. I would disconnect your op-amp from REFOUT and see what you get.

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 08:12:06 am
content: You wanted to probably say you are driving FSADJ with a DAC, not REFOUT. REFOUT can not be driven as far as I can tell, but can be legitimately used as a reference voltage source, which is exactly what I used it for.Why should I disconnect my circuit from REFOUT? I am just using it as a source of precise voltage, sinking about 21uA from the pin. I think that is well within its capabilities. The reference pin is rock solid during all test, providing correct voltage of 1.2V.The mosfet modulator from the appnote is unusable with its ill-defined behavior (Vgsth spread, temp. sensitivity, etc). Hence I have tried improving it.Your circuit probably uses this trick:https://www.analog.com/en/design-center/reference-designs/hardware-reference-design/circuits-from-the-lab/cn0156.html#rd-descriptionBoth circuits work with the same idea - modulating current from the FSADJ pin. FSADJ should sit slightly lower than the reference voltage (guessing a current mirror must lie somewhere inside the chip).It should work the same way, whether I use voltage controlled current sink, or change voltage on the other end of resistor connected to the FSADJ pin. (In the latter case there will likely be high non-linearity when the amplitude approches zero magnitude).So why it ain't working in my case?

author: iMo
author_rank: Super Contributor
timestamp: April 07, 2019, 09:08:49 am
content: Try to put 7002's drain at fixed 1.2V and measure its Ids current vs control voltage.

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 10:12:57 am
content: Yes, I am going to test that, but from the measured waveforms, it is kind of obvious, the problem is not in the voltage controlled sink.But yes, will verify that anyway.

author: iMo
author_rank: Super Contributor
timestamp: April 07, 2019, 11:02:46 am
content: A simulation..

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 07, 2019, 11:29:46 am
content: According to the datasheet FS Adjust should be connected with a resistor to GND. It does not say this pin has a constant voltage nor a constant current. And instead of tying it to a resistor, you've made a current sink like circuit to that pin.The circuit MarkF posted also has a resistor on FS Adjust, but instead of sinking the signal to GND, it connects it to some adjustable voltage, which means that whatever sort of signal is on that pin (probably proportional to the momentary output voltage of the DDS chip) is modulated much more alike as when tied to GND.It was some time ago, but I've had nice 100% modulation (or even more ?) with an AD9850 (or was it AD9851?)First thing you should do is to build the standard circuit, (FS Adjust with a resistor to GND), and them measure the signal on it.

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 11:54:54 am
content: Quote from: imo on April 07, 2019, 11:02:46 amSo it works completely fine even in the simulation.Not sure, what have you been trying in the first image though, the maximum amplitude at the non-inverting node is 0.25V (with that 0.25V offset).Quote from: Doctorandus_P on April 07, 2019, 11:29:46 amWorked with 6k8 (3mA Full Scale current) absolutely fine. Voltage at the FSADJ pin was constant 1.15V, slightly below the VREF, as expected.//EDIT: Typos.//EDIT2: So I will try 2 things now: a) repeat the test as like the simulation (drain fixed at stable 1.2V supply) and b) I will put a trimpot at the FSADJ pin to see what is happening above 3mA fullscale current. It is supposed to work up to 4mA!

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 07, 2019, 12:30:22 pm
content: Another simple thing to try on a breadboard is to make an adjustable DC voltage with a potentiometer. Buffer it with an opamp, and then connect with a series resistor to FS_Adjust.

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 12:41:45 pm
content: So testing the current sink with fixed drain voltage at 3.3V = pass. Testing with fixed 1.2V = pass too. Nice, clean undistorted sine-wave at the source node of T1, with the maximum of ca 500mVpp, when licking the 0V (no current, full mod.) level .Testing the DDS with 5k6 Rset resistor (3.7mA or thereabout of full scale current) also passed. Voltage at FSADJ pin at that time also constant, at 1.115V.So what the hell is wrong then?!

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 01:08:00 pm
content: So to make things bit more interesting - it works for low frequencies. At 50Hz mod., I can obtain what I came for. A very nice full-depth modulation, see picture below.But when if I switch to 1kHz, while keeping the mod. level, this happens: The FSADJ pin voltage becomes unstable and keeps changing states between proper 1.15V, 0V and 4V, producing severe distortion of the envelope and the modulation is only minute, not full.Just pure W T F !

author: iMo
author_rank: Super Contributor
timestamp: April 07, 2019, 01:28:10 pm
content: When you sweep the modulation slowly from say 50Hz to 10kHz - do you see a changing pattern at the FSADJ pin?I would also disconnect the R11 from the REFout and feed the opamp bias 1.2V from an external source, it could be there is a parasitic feedback via Refout and it oscillates (C11 - add 100nF ceramics in parallel).

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 01:51:06 pm
content: Yes, the higher the frequency, the shallower modulation is obtainable, then the same happens- FSADJ voltage starts going crazy from 1.2V to 0 then to 4V and again, see the image in the first post.It seems the FSADJ pin circuitry is somehow unstable internally. Makes me wondering, what effect would a cap to ground make? There is even one drawn in the AD9850 application note in the AN-423, meh. Let's try adding one.//EDIT: cap is doing nothing helpful here really.//EDIT2: Adding a damping resistor of 1k in series with FSADJ also changes nothing (apart from lowering the compliance range of the current sink).

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 02:04:21 pm
content: Quote from: imo on April 07, 2019, 01:28:10 pmNot possible. REFOUT is rock solid all the time. Oscillation would be more likely at lower frequency, where the attenuation of R9-C11 is much less. (it is a 0.4Hz low pass filter!) Attenuation at 1kHz is like what, 60dB?

author: Yansi
author_rank: Super Contributor
timestamp: April 07, 2019, 02:17:10 pm
content: One last thing to try, before calling shit and crap on that IC: As suggested - using a 6k8 Rset resistor from FSADJ, but instead of grounded, fed from the bottom end from a signal source.Originally, I didn't like this idea, because that would lead to significant distortion when the modulation voltage will approach the VREF voltage. I thought using a current sink like this, I would be always able to set the current precisely as needed.

author: Yansi
author_rank: Super Contributor
timestamp: April 08, 2019, 02:39:26 pm
content: Update: I have tried modulating using the 6k8 resistor fed from the bottom. Well, guess what! It didn't work either!After a bit of thinking and poking around with a probe, I have noticed the COMP pin voltage is slighthly following the modulation current from FSADJ.I have tried deliberately increasing the COMP pin decoupling capacitor and guess what - it has stopped working correctly even at 100Hz, where it has worked before.I may be onto something here!Sad thing is the documentation of what the COMP pin is used for, is only vague at best. But it definitely seems to set a corner frequency for the rate of change of the bias current.Strange is, many designs seem to omit this capacitor entirely - but why? There isn't any info available on the purpose of the cap, other than "DAC Bias Pin. This pin is used for decoupling the DAC bias voltage.". Can I omit it then to have the modulation possible? Or can't it be omitted? This is starting to seem more like a question for Analog Devices.Including your design, RES! Why don't you have a cap at the COMP pin?//EDIT: I have written question to the ADI Support. Let's see where that'll bring us...

author: OwO
author_rank: Super Contributor
timestamp: April 08, 2019, 03:08:19 pm
content: Quote from: Yansi on April 08, 2019, 02:39:26 pmThat is a pretty big hint. In a DDS any noise on the DAC reference/bias source results in AM noise at the output, so this is usually brought out to a pin where it can be bypassed with a big cap. In your case you want AM so you can omit the cap.

author: Yansi
author_rank: Super Contributor
timestamp: April 08, 2019, 03:10:59 pm
content: I guess so, but I'd rather have that confirmed. Also I'd be interested how to estimate value of the cap to set a specific corner frequency. (you do not want to let it modulate all crap from above, if you just need a couple kHz BW).

author: OwO
author_rank: Super Contributor
timestamp: April 08, 2019, 03:19:21 pm
content: Well, it's not a simple RC filter, since you already saw that increasing frequency results in nonlinear behavior. I would guess it's more like a (possibly asymmetric) current limited source driving the cap, which results in slew rate limits. I would either omit the cap or see about driving the bias pin directly.

author: Yansi
author_rank: Super Contributor
timestamp: April 08, 2019, 03:27:15 pm
content: I have not taken an image from the scope and do not remember xactly, but for low frequency modulation, the cap voltage varied only slightly, say 5 to 10% of its steady DC voltage, with full modulation applied.

author: iMo
author_rank: Super Contributor
timestamp: April 08, 2019, 04:44:34 pm
content: 9851: DAC Bypass Connection. This is the DAC voltage reference bypass connection normally NC (NOCONNECT) for optimum SFDR performance.9951: DAC Band Gap Decoupling Pin. A 0.1 μF capacitor to AGND is recommended9831/32/35: COMP: Compensation Pin. This is a compensation pin for the internal reference amplifier. A 10 nF decoupling ceramic capacitor should be connected between COMP and AVDD9833/34/37/38: COMP: DAC Bias Pin. This pin is used for decoupling the DAC bias voltage.FSADJ pin modulation:https://ez.analog.com/dds/f/q-a/29200/amplitude-modulation-on-ad9838Quote

author: Yansi
author_rank: Super Contributor
timestamp: April 08, 2019, 05:57:59 pm
content: To explain why I am trying this all: Using any kind of external amplitude varying circuitry like VGA, multiplier, gilbert cell completely voids the point of using DDS in the first place - because of high harmonic content generated that way. Making a good linear multiplier that can work with high modulation depths and wide range of frequencies costs MONEY.I have already experimented with various kinds of modulators, and all of them are bad when used for wide range of RF, because of harmonic content generated. Directly modulated DDS is probably the lowest cost of them all, with best results achievable. (well... if it happens to work correctly)

author: iMo
author_rank: Super Contributor
timestamp: April 08, 2019, 06:57:24 pm
content: It looks like the various 98xx DDS differ in how the Rset/FSADJ is internally handled.The 9851 appnote shows the fet modulation instead Rset, claiming it works fine up to 50KHz.The 9838 (similar to 34) AM issue in the above link ended up with "no go advice" while the OP there had some progress with removing the COMP cap.

author: Yansi
author_rank: Super Contributor
timestamp: April 08, 2019, 07:21:46 pm
content: I can also confirm, that by omitting the COMP pin cap on that AD9834, it proceeds to work stable and being able to fully modulate up to 10kHz (haven't tested further, not interested there).Am thinking right now, if the former solution with the precision programmable sink will work now, when the cap was removed from there.

author: OwO
author_rank: Super Contributor
timestamp: April 09, 2019, 03:21:31 am
content: I think it's just a shame these DDS chips don't allow digitally modulating the output. However last time I checked a FPGA+DAC solution is already competitive with DDS chips on price, so maybe that could be an option?

author: Dhanushka
author_rank: Regular Contributor
timestamp: April 19, 2019, 03:14:21 pm
content: Thank you for all comments.Also,Could you please give me a comparison between AD9833 and AD9850/51?Thank you.

author: Yansi
author_rank: Super Contributor
timestamp: April 19, 2019, 05:10:52 pm
content: Do not steal my thread!Please try comparing using the datasheets first.https://www.analog.com/media/en/technical-documentation/data-sheets/ad9833.pdfhttps://www.analog.com/media/en/technical-documentation/data-sheets/AD9850.pdfSome of their base differences are visible from the first page of the datasheets.