250V 10A + MCU PCB layout - Page 1
Forum section: electronics / projects

author: oschonrock
author_rank: Regular Contributor
timestamp: August 23, 2020, 11:16:22 am
content: Wanted to share a half finished draft of a PCB layout I am working on for this project:https://www.eevblog.com/forum/projects/mains-switching-research-break-out/msg3170280I want to focus on the PCB layout and system issues here, not the application / schematic (current HV part of schematic is attached), which has been discussed elsewhere. Suffice to say the application is to switch 110-230VAC @ 10A (peak and more typically 3-4A) using power MOSFETs triggered by an MCU. The approximate anticipated power dissipation is 20-30W max (basically 2x Ron x I^2 - because only 2 of 4 MOSFETs conduct at one time + switching losses up to 10-20kHz).Mains voltage, so a secure, servicable enclosure required (intended usage is in a power electronics Lab). I spent some time researching this, since I am not super experienced at choosing cases fort this sort of thing. In the end I chose this Hammond heat dissipating extruded case (bit expensive) -- better ideas welcome!https://www.hammfg.com/files/parts/pdf/1455NHD1201BK.pdfI also spent some time experimenting with designs around SMT (probably D2PAK) MOSFETs vs TO220 style packages. I ended up concluding that for this sort of power, trying to get rid of the heat through the board with thermal vias etc, was not a great idea. So I went for TO220FP style package (the plastic wrapped 2.5kV isolated tab), and bolting them to the floor of that case on the provided channels. The "FP" package has a higher termal resistance, but avoids need for silpad/laird. So the TO220FP MOSFETs arebelowthe board with holes in board to access the mounting bolts. -- if there are good ways to do this SMT, please let me know.I kept the HV side all THT and the LV side will be ~100% SMT for compactness. Power entry and exit is via Bugin PCB IEC connectors (male and female pair -- note that the 3d model for the near side / female one is wrong (not available) in the screenshots, the footprint is correct).Other considerations were:Carrying the 10A - I went for "zonal island" style tracks for the high current areas - I did some calcs and I am anticipating less than 1W of heat in all high current tracks combined at 10A. That's at 1oz copper; no need to go to 2oz?Creepage / clearance -- Weakest link on AC side are the TO220 legs / pads -- but we have isolating slots in board to protect LV side of the opto isolators/SMPS/DC/DCconvertersInitially considered having a separate 2nd board for MCU, but decided I have space and might actually have less noise on signals with short tracks vs interboard cables. I "may" still have a tiny daughter board in the top of the case to mount the control elements (rotary encoder POTs / switches + indicators, possibly an LCD - but concerned about noise on the board-to-board interconnect)The SMT LV MCU side is not done/shown. This is the "easy" part for me. This is more about the HV side, layout, the isolation and system / heat choices I made.Screenshots / schematic belowAny comments much appreciated. Any obvious blunders? Thanks

author: uer166
author_rank: Super Contributor
timestamp: August 23, 2020, 07:19:30 pm
content: Looks like you're shorting out phase and neutral on J1 if you were to turn all the FETs on, I can't see how that is safe if intentional.

author: oschonrock
author_rank: Regular Contributor
timestamp: August 23, 2020, 07:23:56 pm
content: Quote from: uer166 on August 23, 2020, 07:19:30 pmThanks.Yup, that's intentional. Necessary for flywheeling of inductive loads.And you're right that it requires care. It is the same problem as "shoot-through" on a half/full bridge motor driver.I have been debating if I should interlock this in hardware, eg drive the LV side of the 2 optocouplers with a single signal and its (hardware) inversion.This may end up being the final solution, but I lose control of the precise timing then.