How to measure a differential signal in presence of 1500V common mode signal - Page 1
Forum section: electronics / projects

author: rbola35618
author_rank: Frequent Contributor
timestamp: May 04, 2017, 07:52:28 pm
content: Hi EEvbloggers,I am building a high voltage pulser that switches from 0 to 1500V in 50ns. I have stacked four GAN fets to source into a 100pF load and four stacked GAN fets to sink the charge in the 100pf to ground. I am trying to measure the gate to source voltage of all of my fets. The gate-source voltage is 4V. I have tried using a Pico Technology 100MHz high voltage probes TA042. But I do not feel confident in the measurement that I am getting using the Pico Technology probes; I do not think they have good enough CMRR at the higher frequencies.I therefore bought an isolated Siglent handheld scope (SHS1102) so that I could can take the measure straight across the gate-source. However, some of the literate state that the probe's shield which has inductance of about 1mH and the parasitic capacitance of the SHS1102 to earth ground will introduce a resonace frequency that might turn into different mode and therefore skew my measurement. An application note that I found suggested that I use an EMC split cores to make the shield (ground probe) a higher impedance. I have attached several cores to my 10X probe. I then wrapped copper foil on the outer shield to form a feedthru capacitor and grounded (to shunt the common mode signal) the copper foil to my bench's ground. When I ground the foil, the differential signal cleans up quite a bit.Have anybody made similar measurement and do you thing that how I have added the EMC cores and grounding the foil a good or bad idea. I am worried that I might be fooling myself. Does anybody have a better way of making these measurement

author: bktemp
author_rank: Super Contributor
timestamp: May 04, 2017, 08:02:06 pm
content: That sounds like the perfect application for one of those:http://www.tek.com/blog/innovation-tek-new-optically-isolated-probe-overcomes-difficult-measurement-challenges

author: rbola35618
author_rank: Frequent Contributor
timestamp: May 04, 2017, 08:18:08 pm
content: Yes, I agree. This would be the best tool. However, its cost starts at 12000 dollars. I have inquired about renting one for a month to verify the measurements that I am getting with the setup.

author: David Hess
author_rank: Super Contributor
timestamp: May 04, 2017, 09:18:36 pm
content: As a test of the common mode rejection ratio, connect both probes to the same FET source pin. Then the measured differential signal should be zero and anything you see is do to mismatch.

author: rbola35618
author_rank: Frequent Contributor
timestamp: May 04, 2017, 10:07:41 pm
content: Hi David,That is a good tip. I will try that and quantify the error. I can that without the EMC/filter and with EMC/filter see if there is a difference.Thanks,Robert

author: MagicSmoker
author_rank: Super Contributor
timestamp: May 04, 2017, 10:47:09 pm
content: This is a tough measurement to make accurately due to the extremely high dV/dt; 1500V in 50ns means even 1pF of stray coupling capacitance will allow a 30mA pulse through. How about a Gigabit networking fiber optic transmitter/receiver pair with a short length of fiber coupling them?

author: David Hess
author_rank: Super Contributor
timestamp: May 04, 2017, 10:53:46 pm
content: I should have also mentioned that that test is not perfect because the impedance at the gate is not the same as the impedance at the source but if the probes have a high enough input impedance and the difference in impedance at the gate and the source small, then the error should be small. Presumably the gate is being driven from a low impedance source so this will be the case.This is a common problem with differential probes; their common mode rejection is degraded by unmatched source impedances. The solution is to use differential probes with as high an input impedance as possible. At high frequencies, this means low capacitance at the probe tips.The above is also why modern high voltage differential probes do not work quite as well as the old style differential probes which used standard but matched x10, x100, or x1000 oscilloscope probes. The later have the input divider resistors at the probe tips minimizing tip capacitance. Modern high voltage differential probes are intended to be used for switching power supply design where the source impedances are all low.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 05, 2017, 02:11:43 am
content: Quote from: rbola35618 on May 04, 2017, 07:52:28 pmwhy do you think a general purpose floating scope will do any better than a dedicated differential probe? matched input is a specialized arena by itself usually implemented in greater focus in dedicated differential probe unit. assuming the pico tech has the same spec as the dave's diff.. probe...https://www.eevblog.com/product/hvp70/-40dB @ 10MHz, you'll be lucky if you can get this figure on SHS1102 in sub MHz range. even low end price dedicated diff probe like those 2 is stuggling with the CMRR spec on higher freq, i believe for the HVP70, the CMR will drop rapidly in log scale up to 100MHz, i suspect same applies to the pico tech diff probe.... in order to get good cmrr at 100MHz, you'll need sub 5 figure (or 5 figure) dollar device.

author: David Hess
author_rank: Super Contributor
timestamp: May 05, 2017, 03:23:02 am
content: Quote from: Mechatrommer on May 05, 2017, 02:11:43 amThe Siglent SHS1102 is more than just a floating oscilloscope. The individual channels are galvanically isolated from the oscilloscope, each other, and the multimeter channel. So the common mode capacitance (1) is limited to the capacitive coupling between the input channel and the rest of the oscilloscope and environment. The Tektronix TPS series has the same kind of isolation.QuoteThe point is an isolated channel is that it does not provide a matched differential input. The shield side of the probe has a relatively low impedance because of capacitive coupling to the oscilloscope and environment. The probe tip however is only coupled to the shield by the standard tip input capacitance associated with a passive probe. So as long as the shield is driven from a low impedance source, the probe tip can make a high impedance measurement relative to that source. The specification for the Siglent SHS1102 says 60dB typical CMRR at 50MHz.Attaching the isolated channel to rbola35618's circuit is going to add significant capacitance to his existing 100pF load but maybe that is not a problem. The gate to source voltage will still be measurable.(1) Unfortunately Siglent does not specify the capacitive coupling. My guess is that it is between 100 and 200 picofarads.

author: rbola35618
author_rank: Frequent Contributor
timestamp: May 05, 2017, 03:54:11 am
content: Hi David, you are correct. I am only using one channel. The Siglent has less loading effects than the Pico Technology. I have not measured the capacitance of the Siglent ground shield to the earth ground. I have noticed that if I lay the scope on the bench, I have more noise on my measurement. So I placed a box between the bench and the Siglent in order to reduce the parasitic capacitance.The real problem is that the GAN fets have a maximum gate-source voltage of 7volts. I am running at 4 volts to have enough margin and not pop the gates. Keep in mind that I added TVS across the gates for protection (SMF3.3). They are suppose to clamp at about 5 volts. However, when I measure the gates, I am getting a leading spike of about 6 Volta at the gate. I would assume that the TVS would clamp it but I am not seeing that. I am trying to figure out if the spike is real or is it due to the common mode signal since it is transitioning 1500 volts. The GAN fest that I am using is the gang systems GS66502b. They are rated at 650 volts. I have install three TVS that clamp at 130 volts. So they should hold the drain source to about 390 volts. So I am sure that my drain source is protected. So that is why I am focusing on the gates. I also need to make sure that I don't have cross conduction between the top and bottom stack.

author: oldway
author_rank: Super Contributor
timestamp: May 05, 2017, 11:00:21 am
content: In my opinion, there is a fundamental problem in your question: you impose the solution and you do not leave room for other possible solutions.You should provide the circuit diagram.There are sometimes alternatives such as:- Grounding or near ground potential of the source of the FET you want to measure- Measure the source/gate pulses without presence of high voltage (I know it is not exactly the same waveform, but it help)But without schema, it is impossible to say whether alternative solutions are possible or not.

author: rbola35618
author_rank: Frequent Contributor
timestamp: May 05, 2017, 01:53:27 pm
content: Yes, I will post a simplified schematic of the pulser later on today.