Hex inverter oscillator, where is the current draw going? - Page 1
Forum section: electronics / beginners

author: Infraviolet
author_rank: Super Contributor
timestamp: June 29, 2023, 05:49:37 pm
content: I've set up a hex inverter chip (74HCU04, but principle applies when 74HC04 or 74AC14 are used instead) using 3 gates and a fourth one to produce a square wave outputting (3MHz) oscillator inspired by one of the designs in Horowitz and Hill. The first three make the oscillator, the fourth buffers it, to prevent any effects in the load from distorting the wave signal within the oscillator's feedback loop, before outputting the signal. The load has a resistance of 1K in series before any other resistive or capacitiative effects are found. It works to give a pretty clean square wave of the right frequency, but seems to be using a lot more current (about 22mA total) than expected, given a 5V supply and the sizes of resistors which are present I can't see how it should take that much. Can anyone suggest why it doing this? Where is all that extra current going given that the resistors from the outputs of the gates can't account for it?I made sure the two unused gates have their inputs tied to either 5V or Gnd so they can't randomly switch, the current draw was higher still before this was done. Adding extra resistances of a few hundred ohms between the first gate of the chain and the second and between the second and the third did not reduce current draw.Thanks

author: wasedadoc
author_rank: Super Contributor
timestamp: June 29, 2023, 06:04:23 pm
content: Charging and discharging capacitors. Inherent internal ones and external strays.

author: kml183
author_rank: Contributor
timestamp: June 29, 2023, 06:19:19 pm
content: Quote from: Infraviolet on June 29, 2023, 05:49:37 pmThis would make sense as the input impedance for a CMOS device like this is really high.There are a few current loops here:- The output of ic3c to ground through R32, R33, the 100pF cap and R36,- The output of ic3b to ground through R35 and R36.

author: TimFox
author_rank: Super Contributor
timestamp: June 29, 2023, 07:37:53 pm
content: With CMOS gates driving each other's capacitance and possible external capacitance, the draw current increases with switching frequency, since the same charge is conducted through the gate on each switching cycle.

author: langwadt
author_rank: Super Contributor
timestamp: June 29, 2023, 07:51:39 pm
content: https://assets.nexperia.com/documents/data-sheet/74HCU04.pdffigure 8,9,10

author: srb1954
author_rank: Super Contributor
timestamp: June 29, 2023, 08:33:16 pm
content: Quote from: edavid on June 29, 2023, 07:33:13 pmSchmitt trigger devices still draw appreciable supply current when subject to input voltages in the middle of their input voltage range between the rated VILand VIH.

author: MathWizard
author_rank: Super Contributor
timestamp: June 29, 2023, 08:37:47 pm
content: So I'm just studying AC power equations, so if you were to add inductance, to increase the power factor, what would that do to the loop gain of the oscillator ? Can you add enough inductance to make it worth while, without stopping the osc, or getting unwanted oscillations ??

author: TimFox
author_rank: Super Contributor
timestamp: June 29, 2023, 08:56:41 pm
content: Quote from: srb1954 on June 29, 2023, 08:33:16 pmYou can bias a CMOS inverter for analog use by connecting a large resistor from output to input.The device will stabilize withVout=Vin, approximately equal toVdd/ 2.At that bias point, a large current is passing through the channel fromVddtoVss= 0, and the device may well heat up.In normal binary switching, where the device is switching fast enough that it does not dwell in the "linear" region between states, the average DC draw depends on switching the charge in and out of load capacitance as I stated above.

author: srb1954
author_rank: Super Contributor
timestamp: June 30, 2023, 05:43:46 am
content: Quote from: edavid on June 29, 2023, 09:11:36 pmI still call that appreciable current for CMOS. If you are designing a circuit for battery operation an unexpected extra 300uA current drain can really wreck your battery life.The problem was much worse for the old 4000 CMOS series, especially when run off higher supply voltages than 5V. These could draw several mA of quiescent supply current per gate if the input voltage was in the intermediate range between the standard input voltage levels.

author: Infraviolet
author_rank: Super Contributor
timestamp: June 30, 2023, 09:27:11 pm
content: I'll give another go with the schmit version and see how that does, the thinking here is that it is mostly a matter of how the gates behave when an intermediate voltage level is on the input pin which is responsible for most of this current draw? At lower frequencies I guess that intermediate level would exist for a shorter fraction of the total waveform period so time averaged (I was just using the mA setting on a typical handheld multimeter to get my quoted figures, I assume they do time average or any waveform which does not cross zero and have current reverse for part of a cycle?) current would be less?I'm not in desperate need to get to really low current draw, but getting down to half of the present figure would be nice, even if still above what one would expect from considering the sums of currents possible in the different paths to ground.

author: BillyO
author_rank: Super Contributor
timestamp: June 30, 2023, 09:47:05 pm
content: For a Schmitt version you need only 1 inverter, 1 capacitor and 1 resistor.I would hazard a guess that a lot of the current is consumed in switching the CMOS outputs.

author: jpanhalt
author_rank: Super Contributor
timestamp: June 30, 2023, 10:00:16 pm
content: This ap note is apparently no longer available on Onsemi's site. It may be helpful.

author: Zero999
author_rank: Super Contributor
timestamp: June 30, 2023, 10:00:47 pm
content: The three gate oscillator should use less power than the Schmitt trigger variant, because the input voltage doesn't spend as long in the linear region. I'll post a simulation later, if there's still enough interest in the subject.

author: Infraviolet
author_rank: Super Contributor
timestamp: July 01, 2023, 01:20:11 pm
content: Horowitz and Hill has a warning that single gate oscillators aren't inherently guaranteed to oscillate, doesn't this mean the 3 gate version should always be preferred? Similar to AN-118's warning about the two gate oscillator?

author: BillyO
author_rank: Super Contributor
timestamp: July 01, 2023, 02:07:17 pm
content: A single gate Schmitt oscillator will always start.

author: Zero999
author_rank: Super Contributor
timestamp: July 01, 2023, 02:32:56 pm
content: Yes, a CMOS Schmitt trigger oscillator will always start. A single gate inverter oscillator might not reliably start, due to insufficient gain.Going back to my previous post. I've simulated a three gate inverter and a Schmitt trigger oscillator. Note the input voltage of the Schmitt trigger oscillator spends all of the time in the linear region, where all transistors are biased on a bit, where as with the three inverters it spends much longer with the transistors either on or off.EDIT:I'm having trouble with uploading attachments.EDIT: The problem was CMOS Oscillator.asc so I've included it in this post. Copy it, paste it into a text editor, save it with an .asc extension and open it in LTSpice.Code:Version 4SHEET 1 1232 680WIRE 144 16 -96 16WIRE 288 16 144 16WIRE 528 16 288 16WIRE 848 16 528 16WIRE 144 48 144 16WIRE 288 48 288 16WIRE 304 48 288 48WIRE 528 48 528 16WIRE 544 48 528 48WIRE 848 48 848 16WIRE 864 48 848 48WIRE 240 64 208 64WIRE 480 64 448 64WIRE 800 64 768 64WIRE 304 96 304 48WIRE 304 96 288 96WIRE 544 96 544 48WIRE 544 96 528 96WIRE 864 96 864 48WIRE 864 96 848 96WIRE 336 128 320 128WIRE 592 128 576 128WIRE 1008 128 992 128WIRE 144 144 144 112WIRE 208 144 208 64WIRE 208 144 144 144WIRE 144 160 144 144WIRE 144 160 32 160WIRE 288 160 288 144WIRE 320 160 320 128WIRE 320 160 288 160WIRE 448 160 448 64WIRE 448 160 320 160WIRE 528 160 528 144WIRE 576 160 576 128WIRE 576 160 528 160WIRE 688 160 576 160WIRE 768 160 768 64WIRE 768 160 688 160WIRE 848 160 848 144WIRE 992 160 992 128WIRE 992 160 848 160WIRE 288 176 288 160WIRE 528 176 528 160WIRE 848 176 848 160WIRE -96 192 -96 16WIRE 32 208 32 160WIRE 144 208 144 160WIRE 688 208 688 160WIRE 992 208 992 160WIRE 304 224 288 224WIRE 544 224 528 224WIRE 864 224 848 224WIRE 208 256 208 144WIRE 240 256 208 256WIRE 448 256 448 160WIRE 480 256 448 256WIRE 768 256 768 160WIRE 800 256 768 256WIRE 304 272 304 224WIRE 304 272 288 272WIRE 544 272 544 224WIRE 544 272 528 272WIRE 864 272 864 224WIRE 864 272 848 272WIRE 144 304 144 272WIRE 288 304 288 272WIRE 528 304 528 272WIRE 848 304 848 272WIRE -96 336 -96 272WIRE 32 336 32 288WIRE 688 336 688 272WIRE 688 336 32 336WIRE 992 336 992 288WIRE 992 336 688 336FLAG 288 304 0FLAG -96 336 0FLAG 144 304 0FLAG 848 304 0FLAG 1008 128 output3IOPIN 1008 128 OutFLAG 528 304 0FLAG 32 160 inputIOPIN 32 160 InFLAG 592 128 output2IOPIN 592 128 OutFLAG 336 128 output1IOPIN 336 128 OutSYMBOL pmos4 240 144 M180WINDOW 3 67 72 Left 2SYMATTR Value hef4007_pSYMATTR InstName M1SYMBOL nmos4 240 176 R0WINDOW 3 67 72 Left 2SYMATTR Value hef4007_nSYMATTR InstName M2SYMBOL voltage -96 176 R0WINDOW 123 0 0 Left 0WINDOW 39 0 0 Left 0SYMATTR InstName V1SYMATTR Value 5VSYMBOL diode 160 112 R180WINDOW 0 24 64 Left 2WINDOW 3 24 0 Left 2SYMATTR InstName D1SYMBOL diode 160 272 R180WINDOW 0 24 64 Left 2WINDOW 3 24 0 Left 2SYMATTR InstName D2SYMBOL pmos4 800 144 M180WINDOW 3 67 72 Left 2SYMATTR Value hef4007_pSYMATTR InstName M5SYMBOL nmos4 800 176 R0WINDOW 3 67 72 Left 2SYMATTR Value hef4007_nSYMATTR InstName M6SYMBOL Misc\\EuropeanResistor 16 192 R0SYMATTR InstName R1SYMATTR Value 1MegSYMBOL Misc\\EuropeanResistor 976 192 R0SYMATTR InstName R2SYMATTR Value 1MegSYMBOL cap 672 208 R0SYMATTR InstName C1SYMATTR Value 100nFSYMBOL pmos4 480 144 M180WINDOW 3 67 72 Left 2SYMATTR Value hef4007_pSYMATTR InstName M3SYMBOL nmos4 480 176 R0WINDOW 3 67 72 Left 2SYMATTR Value hef4007_nSYMATTR InstName M4TEXT -632 168 Left 0 !.model hef4007_n NMOS\n\n+LEVEL = 3\n\n+KP = 42u\n\n+VTO = 1.5\n\n+TOX = 55n\n\n+NSUB = 3.3E16\n\n+GAMMA = 2\n\n+PHI = 0.65\n\n+VMAX = 150E3\n\n+RS = 40\n\n+RD = 40\n\n+XJ = 1.5u\n\n+LD = 1.2u\n\n+Theta=0.1\n\n+ETA = 4\n\n\n.model hef4007_p PMOS\n\n+LEVEL = 3\n\n+KP = 25u\n\n+VTO = -1.6\n\n+TOX = 55n\n\n+NSUB = 2.8E15\n\n+GAMMA = 1.\n\n+PHI = 0.65\n\n+VMAX = 970E3\n\n+RS = 80\n\n+RD = 80\n\n+XJ = 1.25u\n\n+LD = 1u\n\n+Theta=0.15\n\n+ETA =7TEXT -632 528 Left 2 !.tran 0 501m 1m uic

author: Infraviolet
author_rank: Super Contributor
timestamp: July 01, 2023, 03:45:24 pm
content: Just tested the same 3 gates (plus one) setup for a schmitt triggered inverter again as vs my present inverter, only 1 mA less current. 21mA vs 22mA. Schmitt doesn't seem to make much difference?

author: Zero999
author_rank: Super Contributor
timestamp: July 01, 2023, 04:38:56 pm
content: Quote from: Infraviolet on July 01, 2023, 03:45:24 pmThe frequency of your oscillator is several orders of magnitude higher than mine, so it's to be expected. I chose a low frequency, with high value resistors, to illustrate the difference in power consumption between the two topologies.Have you tried an LC oscillator?

author: BillyO
author_rank: Super Contributor
timestamp: July 01, 2023, 05:16:20 pm
content: Quote from: Infraviolet on July 01, 2023, 03:45:24 pmWhy are you using 4 inverters? You only need one.

author: BillyO
author_rank: Super Contributor
timestamp: July 01, 2023, 05:19:26 pm
content: Quote from: Zero999 on July 01, 2023, 02:32:56 pmIn 46 years I have never seen a single Schmitt inverter relaxation oscillator not start. I've used them hundreds of times.

author: Zero999
author_rank: Super Contributor
timestamp: July 01, 2023, 09:54:56 pm
content: Quote from: BillyO on July 01, 2023, 05:19:26 pmYou appear to have confused a plain inverter, with Schmitt trigger. Read my post again.Quote from: BillyO on July 01, 2023, 05:16:20 pmAgain, you're confusing plain inverters, with Schmitt triggers.Although it's possible to build a phase shift oscillator with a single inverter, it's not 100% reliable. Two gates is much better, but not as reliable as three. The advantage of using plain old inverters, over a Schmitt trigger is lower power dissipation. Again, myexplains why.

author: Infraviolet
author_rank: Super Contributor
timestamp: July 01, 2023, 10:25:46 pm
content: So my triple normal inverter setup should already be less power hungry than what I'd get with a single schmitt inverter?

author: BillyO
author_rank: Super Contributor
timestamp: July 02, 2023, 12:25:13 am
content: Quote from: Zero999 on July 01, 2023, 09:54:56 pmOn this one yes, most likely.Quote from: Zero999 on July 01, 2023, 09:54:56 pmNot here. Read what Infraviolet wrote.Quote from: Zero999 on July 01, 2023, 09:54:56 pmAgreed, but I was only talking about Schmitt trigger inverters.

author: BillyO
author_rank: Super Contributor
timestamp: July 02, 2023, 12:25:49 am
content: Quote from: Infraviolet on July 01, 2023, 10:25:46 pmTry it. Will only cost you a few minutes of your time.

author: Zero999
author_rank: Super Contributor
timestamp: July 02, 2023, 09:19:37 am
content: The reason for 4 gates, rather than 3 is to add a buffer, so it's less susceptible to loading and gives a nicer squarewave. Most inverter packages have six gates, so it makes sense to put the spare ones to use.Did you try the LC oscillator?CMOS LC oscillator.asc

author: jfiresto
author_rank: Frequent Contributor
timestamp: July 02, 2023, 10:01:24 am
content: Quote from: srb1954 on June 30, 2023, 05:43:46 amThe typical shoot through current of a CD4093 is no more than a milliamp, even at a 15V VDD(from the Intersil CD4093BMS datasheet, file number 3330, after an original from RCA)

author: srb1954
author_rank: Super Contributor
timestamp: July 02, 2023, 10:30:22 am
content: Quote from: jfiresto on July 02, 2023, 10:01:24 amReading from an original CD4093B RCA datasheet (File 836 1974 databook) the peak current per gate is specified at 1.5mA. Intersil may have made some later improvements on their design to reduce the shoot through current.Other gates in the earlier 4000A series were even worse with peak shoot through currents sometimes exceeding 10mA when operating off a 15V supply.

author: jfiresto
author_rank: Frequent Contributor
timestamp: July 02, 2023, 11:32:07 am
content: Sorry, I read ca. 1.4mA and managed to forget that while I searched for and found Intersil's much cleaner, redrawn (and rescaled) figure. I see that Intersil did not transfer the peak currents at 5V, which if I squint at the points the right way appear to be around 300µA, a bit less than the peak currents at 4.5V for an Nexperia 74HC132, a part the OP might be considering.EDIT: After further squinting, what looked to me like current dots for 5V could be severely smudged arrows. I seem to remember a plot with shoot through currents at 5V, but where? I need to get more sleep.

author: Infraviolet
author_rank: Super Contributor
timestamp: July 07, 2023, 09:42:12 pm
content: I did a few breadboard experiments, here's what I found:74AC14, schmitt hex inverter, single gate oscillator with one extra gate as output buffer, powering a 1K ohm load, other 4 inputs grounded: 8mA, reducing to 6mA drawn when resistor is changed to reduce output frequency from 3.2MHz to 450KHz.74AC14, schmitt hex inverter, 3 gate oscillator with one extra gate as a buffer, 1K load, 2 spare inputs grounded: 10mA at 3.2MHz74HCU04, plain inverter, 3 gate osc with an extra gate as buffer, 1K load, 3.1MHz, 16mA, and much cleaner edges with less rining than any of the setups with the schmitt inverter (singly or in triple gate arrangement). Also found this drew 8mA if resistor varied to give 250KHz output, and 28mA if resistor made smaller to give 20MHz out. If the resistor was entirely removed so oscillation stopped (R ≈ "infinity" from the third gate's output to the first's input) then 5mA was still drawn, guess this is from putting current in to the 1K load at the buffering gate's output.All types had the frequency vary somewhat if the suply voltage were canged, for example from 2.9Mhz at 4.6V to 3.15MHz at 5.3V.Frequencies differed between the tests as I kept the same cap in place and just varied the timing controlling resistor to change frequency, picking whatever was closest to 3MHz from resistor values to hand, plus doing some slower and faster tests to get a feel for current consumption vs frequency.So it seems the single gate inverter can be more efficient, and schmitt triple is more efficient than doing the triple with normal inverters, and any inverter gets more current hungry at higher frequencies. Still, the lack of ringing on the edges of the triple gate plain inverter version is pretty desirable, guess I'll be putting up with 16mA or so of current as the price of this over the schmitt inverter's ringing.

author: BillyO
author_rank: Super Contributor
timestamp: July 07, 2023, 09:58:51 pm
content: Quote from: Infraviolet on July 07, 2023, 09:42:12 pmNice experiment and good results.The reduction in power consumption with frequency is to be expected as the predominant current draw is while the gate output is changing state.A lot of that ringing is due to how fast an AC gate switches. They can change state in around 1ns. Keeping the traces coming off the output as short and wide as possible will go along way to helping with this. As will having some resistance in series between the oscillator output and whatever it's driving.However, all that said the ringing you are seeing may well be the result of a long ground lead in your probing or a high impedance ground in the power supply to the chip.The image below is a buffered 74AC14 oscillator. It has a rise time of < 1.1ns when the scope rise time is taken into account. The overshoot is minimal and the ringing lasts about 2ns.Edit (again) : BTW, for this circuit all 6 inverters are used. 1 for the oscillator, 1 as a buffer and 4 as drivers to get a 50 ohm output. The total current draw at this frequency and driving into a 50 ohm load is just under 12mA.