Reduce PWM ripple - Page 1
Forum section: electronics / projects

author: Terry Bites
author_rank: Super Contributor
timestamp: January 21, 2022, 05:58:04 pm
content: Want to reduce PWM ripple? RC LP filters will only get you so far, active filters need opamps. What about this idea... Ripple plus antirippleUntitled.pdf(241.25 kB - downloaded 256 times.)

author: ledtester
author_rank: Super Contributor
timestamp: January 21, 2022, 06:28:02 pm
content: Are X1 and X2 standard CMOS inverters -- 74HC04/CD4049?

author: moffy
author_rank: Super Contributor
timestamp: January 21, 2022, 11:28:21 pm
content: If you use a sample and hold synchronised to the PWM frequency, after filtering, you can almost completely eliminate the ripple.

author: Cerebus
author_rank: Super Contributor
timestamp: January 22, 2022, 12:44:23 am
content: There's a full write up of how to do this trick of reducing ripple using what's effectively a differentiator capacitor in "The Art of Electronics The X Chapters". pp 383-385. You can trade off between reduction of ripple and settling time.I've simulated the AoE scheme (which only uses first order passive filters) in LTSpice with a ±9V, 20kHz PWM square wave settling to a ripple of 22 uV pp (a little over 1 ppm) in 200 ms for a 90% duty cycle and with a worst case ripple 62uV pp (3.5 ppm) with a 50% duty cycle (also 200 ms settling time). Quite impressive. something on the order of 18 ENOB.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 22, 2022, 01:22:50 am
content: Yes, that's been done:https://www.edn.com/cancel-pwm-dac-ripple-with-analog-subtraction/It provides slightly better performance than a 2nd order of similar spec, IIRC?You can still get faster settling with a higher order active filter, of course; and a 3rd order active only needs one op-amp, which may or may not be preferable to two inverters and one less RC. YMMV.Tim

author: Terry Bites
author_rank: Super Contributor
timestamp: January 22, 2022, 09:29:18 am
content: It works fine with HC04s, but any inverting CMOS gate will work.It cheap and dirty. If you're not in a hurry its pretty good.

author: Siwastaja
author_rank: Super Contributor
timestamp: January 22, 2022, 10:25:57 am
content: Quote from: T3sl4co1l on January 22, 2022, 01:22:50 amThis solution is especially appealing if the microcontroller PWM offers the negated output (with deadtime set to 0) in a separate pin, simplifying the BOM by getting rid of that inverter (and also its delay; the two PWM outputs are likely well matched).

author: Cerebus
author_rank: Super Contributor
timestamp: January 22, 2022, 02:52:46 pm
content: You could also use any bit of little logic with complementary outputs: a flip flop, a differential bus driver, and so on.If you're looking to use a better reference voltage than simply taking whatever a CMOS gate tied to a digital logic supply rail will give you then something like a 74x4053 analog switch with two switches wired in complementary fashion would do the trick. (If the non-linearity of the switching element RDSonwith voltage bothers you it can be largely eliminated by placing it at an op amp virtual earth summing point.)

author: macaba
author_rank: Regular Contributor
timestamp: January 25, 2022, 02:22:07 pm
content: I think it's worth pointing out that this ripple cancellation technique has exactly the same response as a normal 2nd order passive filter with the same values. Where it might be beneficial is if you have an output load - the ripple cancellation technique will suffer less drop.Things get even more interesting when combining with multi-phase PWM... simulation attached. I've picked 25% duty cycle because that is the worse case ripple in this 2-phase PWM example. If it was 50%, there would be near-zero ripple.