Been developing a logic sim - Page 1
Forum section: electronics / general

author: MatCat
author_rank: Frequent Contributor
timestamp: March 08, 2021, 09:39:28 pm
content: I have been developing a logic sim, it is still very early in development but you can see it herehttps://www.logic.partsand it is opensource @https://mygit.space/MatCat.OpenSource/BrowserLogic/. I started it sort of as an experiment in messing with doing a full fledged JS canvas based project, and it has turned into a full on project lol. I am at a development stage where it is close to usable, and I plan to build up the website itself with the standard community sharing features etc. So I would love if some people curious would bug test, report any issues, etc. I have a ton of features I plan to do, one of the reasons I went this direction was because of a computer architecture I designed a few years ago, built out mostly in minecraft, have a version of it in verilog, but I wanted something more interactive to play with and experiment with it, so I came up with this. Any feedback is certainly appreciated! Thanks

author: retiredfeline
author_rank: Frequent Contributor
timestamp: March 08, 2021, 10:09:14 pm
content: Probably shouldn't start in simulation mode as this causes Firefox's JS engine to max out and make the UI unresponsive and the browser has to be killed. Chrome survives only because it throttles CPU chewing JS, but UI flashing can still be seen.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 08, 2021, 11:41:36 pm
content: It uses the standard JS requestAnimationFrame(), so it will only run as fast as your browsers actual redraw rate, most browsers default to a vsync (usually 60Hz), though most you can disable browser vsync with a cli option. Should have 0 effect on UI responsiveness unless you actually put a bunch of stuff down for it to draw during that redraw call.

author: retiredfeline
author_rank: Frequent Contributor
timestamp: March 08, 2021, 11:44:31 pm
content: Unfortunately Firefox doesn't behave well when it's drawing to a remote canvas through an X connection and UI events will be held up. This is a common failing of many JS apps, not just yours.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 08, 2021, 11:49:11 pm
content: Ah yeah, over an x connection I can see that being an issueAs it does essentially rely on modern 2d canvas control, which is generally HW accelerated on most modern machines, of course streaming that over something is going to degrade any performance that may give on a local client.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 08, 2021, 11:52:24 pm
content: One of my major design limitations I set to myself on this project is 0 libraries, only pure browser ES6 JS, CSS, and HTML. I don't want bloat all those crappy JS libraries bring in.

author: retiredfeline
author_rank: Frequent Contributor
timestamp: March 08, 2021, 11:56:19 pm
content: The Lushprojects JS implementation of the Falstad circuit simulator does it well.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 09, 2021, 01:01:49 am
content: Cool! Looks to be a good, 3kLOC or so? No small feat!There are some oddities:- There's no pan or zoom? Nothing immediately discoverable at least (right or middle drag, SHIFT, button).- Weird that signal generators have inputs; I see these are actually gated or triggered parts. This is unfamiliar, but probably just a symptom of being an early version; standard SPICE and other logic parts can be finished later.- Are labels supposed to be connectable? (Click on a label twice, it's acting as an output I think?)- Are multiple outputs supposed to be connectable to a single input?- No binary indicator outputs. Kind of unnecessary with the R/G output bubbles I suppose, but helps with organization?- Hah, recursion check for feedback networks, nice. I take it, you don't have a solution for this, so it just prohibits it entirely? (I wonder how reliable the check is, can it be tricked..?)This isn't so accidental, as XSPICE doesn't even behave right, most of the time IIRC. It's event driven, with gate delays implemented by strict delays creating a new event and so on; so, you can't make stable flip-flops from gates.- Which, I wonder what you're doing here -- I guess given the real-time simulation scale, there isn't much point in simulating propagation delays; but then what, is it implicit just, propagating values along until a stable solution is found (and if not, error), or is it actually event driven? If event driven, this could be very powerful indeed, and, I might suggest looking into XSPICE, since it's free and open? -- though I don't have a clue how accessible its code base is, in terms of complexity, and tightness of integration with the SPICE core.- The menus are very basic, I take it, manually implemented like everything else? A delayed mouseover following root (or submenu if applicable) would be nice, again something that can be added on.- Also I can right-click the menus, which doesn't seem relevant-Ahh I keep clicking away, hitting something on my bookmark bar -- an "are you sure you want to leave?" dialog, or something to remember previous state (local storage / cookie? something about form state, I don't know how browsers remember fields between forward/back??) might be nice.- It bothers me that parts don't snap to the grid in any obvious way. Center? Coordinate reference, typically a corner of the bounding box or something? Pins? Pins rarely line up, at least.- The double ellipse connecting lines are... uncouth to say the least, I guess; but honestly they're not a bad solution, considering the more proper alternative is some horrible rectilinear pathing algorithm, which also needs to run real-time while dragging a part(!) and inevitably finds the most awful paths anyway (Multisim, I'm looking at you). They do bunch up when a number of routes are nearly parallel, which doesn't look great. The colors could maybe be randomized to give better contrast.- Oh yeah, speaking of red and green -- fine just for testing but don't make a habit of it, make them dissimilar intensity too! Red-green ambiguity is incredibly common (err, 5 or 10% of men?), and we color-sighted folk so easily forget this!A number of these also highlight things I need to consider for my own long term simulator project,https://www.seventransistorlabs.com/Calc/Filter1~.html, which is also very poorly documented...Tim

author: MatCat
author_rank: Frequent Contributor
timestamp: March 09, 2021, 03:20:40 am
content: Quote from: T3sl4co1l on March 09, 2021, 01:01:49 amPan: hold ctrl while left click dragging, this will improve, no zoom yet, but I do plan to bring it inSignal generators can be enable / disabled, that is why they have an input, at first they where enabled by default but a changeup in how logic high / lows propagate basically made is so it MUST have a high input to be considered high.No labels shouldn't be connectable, there is a known bug that it will detect an output if you click on one would be if it had one to make a link, I need to fix that.I assume that you are saying you connected multiple outputs from one device to to a single input of another? there is no explicit prevention of doing so, only explicit prevention is one parts output back to its own input, which can be overcome using a buffer (not a an electrical style buffer, but a recursion prevention buffer realistically).Which goes into recursion, yes there is a hard cut (1000 recursions), before it stops it from looping, which is why there is a buffer part, it breaks the event chain via the shortest possible timer you can have in JS (most browsers that will be 4ms), before propagating the signal.I am not trying to go for true electrical simulation, just proper logic simulation. I wanted something that is a little bit more capable then your typical educational logic sim, ultimately I guess it still falls into the 'educational' category, but I just want to experiment with logic designs in a way I can visualize, for example I could build the same things in verilog a lot easier ultimately but thats just a programming language, and sure I can make a fancy interface to interface to it to interact with simulated design in verilog, it's not quite the same as a graphical toggle switch or some such. My PRIMARY purpose is ultimately to design and build CPU's and run them virtually basically.It IS an event driven system, so logic is completely detached from rendering, if say, you flip a switch to HIGH from LOW, it will go out and tell everything its connected to HEY, go HIGH, and it will evaluate itself if it needs to change any outputs, and if so go ahead and recursively go along until either there is no more state change, or it his recursion limit. At first I had it JUST like this, but then I quickly realized I didn't want to have to many fancy bus element for multiple connections to a single point, so now each element will call its container that holds it, if ANYTHING ELSE is sending a high signal to that input before it goes from high to low, so in this case it will properly handle multiple inputs and act like an OR at the input basically. The draw loop just draws thats it.Yes everything on this project is completely made from scratch including the menu. I am still quite early on in UI, but getting close to a point where its OK and usable, hence why I am finally reaching out on here to find beta testers basically.Persistence is coming! I am going to use the local storage mechanism for at least personal settings, design saves can get pretty large if fairly complex, so saving designs to local storage isn't really feasible (5mb max on some browsers), but I still plan to offer it anyway and will just let people know their storage use (I will lzh compress the json data), but I do soon plan to build in a server based storage mechanism including design sharing, etc.As far as grid alignment, there is work to be done to improve it, but currently it is the absolute top left corner of the element (not always visible), if you select by clicking on an element it will have a transparent bg outline, you will see that aligns perfectly to the grid.I agree connections could be improved, currently it is just 2 quadratic curves with the control points each centered on the x and y axis between each element (connection points), since connections are drawn every frame I don't want to get too complicated with them, but I am open to ideas on improvements. But one thing that is there at least in the view menu is the ability to either have them drawn above, below, or not drawn at all.As far as colors go, I plan to make that user configurable, both default on/off colors, as well as individual outputs will eventually be colorable via properties window that pops up.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 09, 2021, 05:12:12 am
content: I just pushed 0.4.3, brings multiple-selection! cut / copy / paste is probably my next big feature target, might be small updates before that. For those that are interested just to know how I tend to do my dev cycle, currently in early development a minor x.M.x version number will usually signify the introduction of a major new feature, and or a direction flow change in current development targets. revision version x.x.R will be incremented for any release to the public (git master branch). When I get to 0.5 that will be Alpha, 0.7 is Beta, 1.0.0 is official release. The current 0.4.x run is focused primarily on core UI (panning, zooming, copy / paste, undo / redo, menus, etc). There is a roadmap:https://mygit.space/MatCat.OpenSource/BrowserLogic/wiki/RoadmapEDIT: I just pushed 0.4.4, fixed 2 bugs found with 0.4.3.

author: Berni
author_rank: Super Contributor
timestamp: March 09, 2021, 06:43:37 am
content: I have looked into digital simulation before and the trick for solving the recursion problem is to introduce propagation delay.It is understandable that it does not like an inverter wired back into itself, but it should definitely be able to handle a flip flop built out of NAND or NOR gates. Such a configuration does collapse into a stable steady state. Okay there is an actual flip flop block to use instead of it, but i get the feeling that this is a sign that a lot of other perfectly fine digital circuits might throw a recursion error.The easy way of introducing propagation delay is to buffer the update events on the inputs. So instead of reacting to the event instantly, it is instead put in a buffer. On the next time step these buffers are read back and the gates outputs updated. Some real life digital circuitry does actually depend on the propagation delays in order to function correctly.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 09, 2021, 07:06:24 am
content: Quote from: Berni on March 09, 2021, 06:43:37 amYes you can most certainly make a JK FlipFlop, I specifically have special elements to handle that, mainly the buffer element, it breaks recursion by delaying the output by the shortest possible JavaScript time (4ms on some browsers, 1ms on others, 10ms on some rare ones), the only other buffered element are IC input and outputs, they work just like a buffer element on signal changes. I have infact built JK with nands and it will just oscillate away until you put the clock low. The built in flip-flops are really just for efficiency sake since they are such common elements in logic designs.

author: tautech
author_rank: Super Contributor
timestamp: March 09, 2021, 07:42:02 am
content: Used to use this all the time but for some reason haven't been able to get Java to play nice with W10:https://tams.informatik.uni-hamburg.de/applets/hades/webdemos/10-gates/00-gates/chapter.html

author: MatCat
author_rank: Frequent Contributor
timestamp: March 09, 2021, 07:43:48 am
content: Quote from: tautech on March 09, 2021, 07:42:02 amJava is considered high risk now, you can only run it if you give the domain its being run from a java security exemption in the java settings.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 09, 2021, 08:07:04 am
content: Quote from: MatCat on March 09, 2021, 07:06:24 amIt sounds like a big limitation of your design is tying everything to real-time events -- contingent on platform-specific properties like browser timestep!A way around that might be, queue up a load of state changes (or timesteps, or timestamps as the case may be), then play them back as an animation (you might even be able to render whole canvas frames and play them back, I wonder?!). And then what's awesome is, you can have the timesteps be arbitrarily anything you want, you can simulate nanoseconds and scale them to seconds if you like -- and with some controls, and time plots, you can potentially do everything a full technical simulation does, without detracting from your goal of real-as-in-real-time simulation, indeed making it smoother and more portable. And to allow for arbitrary inputs like switch/button presses, you could just discard whatever's buffered after the timestamp corresponding to that press, and rebuild it, no big deal wasting CPU cycles on basic logic eh?Quote from: Berni on March 09, 2021, 06:43:37 amThe last thing that's missing is bandwidth -- real devices can only switch so often, yet an event system can allow arbitrarily many edges to propagate through a gate at a given time. This is a problem that befalls XSPICE too -- it's not at all a unique problem! It would be nice to be able to say, if there was an event within so-and-so time, then just.. kinda smoosh them together, or maybe, do a running average over the propagation delay window and make a, mmm, *points* transition there---kind of thing?There still isn't really a good way to do this, right off the bat -- consider real logic gates, they can do this too. You can buy buffered and unbuffered logic (buffered = more internal gates = more possible propagating transitions), and you can wire them up with arbitrary lengths of wire (transmission lines, with good signal quality, have arbitrarily high bandwidth). Some combination of those elements can create the same problem in real life (most obviously, ring oscillators). So, to get an accurate simulation, this is another parameter that needs to be measured for your models.Not that I'm recommending the OP do that work, of course.It would be lovely if XSPICE had such considerations, and parameters. There's a whole zoo of proprietary digital simulators out there (Multisim has its own, Altium has its own..), I'm sure some must do something like this, but how common, well known and accessible are they?Tim

author: Fredderic
author_rank: Regular Contributor
timestamp: March 09, 2021, 08:27:00 am
content: Sweet… I put together a digital simulator of my own a bit ago… Though mine has at most averyrudimentry UI — yours is much too fancy. But I get the feeling this kind of thing is almost Hello World for programmers trying to get into the hardware world… while you're waiting for your soldering skills to develop so you can tackle those pesky SMT parts, program yourself a digital simulator to practice on. (Generally not the soldering part, the burn marks are hard to get out of your monitor.)One of the first things I tried to make, was a good ol' R-S Latch… Recursion limit splat. Which was a huge disappoint. It wasn't obvious to me, either, what the buffer was for… Good to know itispossible…!You absolutely have to add high-impedance, though… That and the ability to place arbitrary wires for making busses… I made my simulator because I wanted to mess with a toy processor design… worked pretty well, except that it had a stability problem with feedback that I never managed to solve… Avoided it by dropping in a magic just-works D Latch component, but I was never happy with that — nor would I have been with a hack like your buffers there… I had gate delays (ripped from the very first datasheet Google gave me), weak signalling, and of course, the ever-important high-impedance for those busses… was kinda fun, till it got bothersome, and the UI felt like a hack, mostly being that itwasa hack…Anyhow…Delays… A high gets delayed just fine. A low usually gets delayed for several seconds. That was weird. Configurable independent rise and fall times might be interesting, but just having them be the same (or at least more samey than not) would be better than… whatever they were doing (which didn't even seem totally consistent).What's the intended use of the Fn keys on the keypad…? They have this weird reset and latch effect… I was trying to build a simple 2-digit adder; enter first digit, F1 to latch, enter second digit, F2 to latch, with F3 being carry in… It worked by reversing it… Select the digit(s) to set, enter the digit, clear. But that is… really awkward. Personally, I think a "digit pressed" momentary output, and instead of that weird reset thing, add a pair of reset input pins — one for the digit keys, and one for the Fn keys. Then you can wire up the reset however you want yourself. Looping the digit pressed signal back into the two reset inputs via an inverter would give the functionality I was originally wanting — digit, latch, digit, latch… Swap Clr for an F4 key, and maybe make the Fn keys configurable text… Anyhow, now I know what buffers are for, I have my 1-banger with D Latches (rather than D FF's configured as latches) working… fun times…!Having to disconnect a part to fix a wiring mistake is a rite PITA, though… and somewhat more problematic, it seems to just stop passing signals down wires at some point. My little 1-banger calculator was working fine, until the wires from the 4-bit Latch IC's to the 4-bit Adder IC decided they weren't going to carry a signal any more (one end of the wire was changing, the other end wasn't). Had to disconnect and re-wire a part every so often. Still, I expanded it to an 8-bit adder, using F3 to latch the first two 4-bit buffers into the second two… And then (at least) one of the 4-bit Latch IC's just stopped working completely (I presume that same issue had crept inside?), and fun time was over.It'd also be very nice if I could have more than one tab open, so I can have my main design in one, and be creating IC's in the other… (Actual browser tabs would be better, but just tabs within the page would do.) And, being able to edit/delete an IC… I forgot the carry out on my 4-bit adder the first time, and had to redo it. And not even going to try putting together an actual ALU…!The ability to add wire joins would fix the wiring going everywhere issue… also being able to place arbitrary wire joins and run wires between them would be useful for doing busses (with that high-impedance stuff), maybe multi-wire bus lines too (and associated input/output pins)…And not having to select a component to right-click on it… ESPECIALLY for disconnect and delete… accidentally deleted the wrong component twice.[Edit: Oh, and shortly after that yesterday, I fumble-fingered the right-click menu, and hit New, and…]But all in all… rather snazzy…

author: Berni
author_rank: Super Contributor
timestamp: March 09, 2021, 08:56:32 am
content: Digital simulators often take shortcuts in order to run faster.I don't think a digital simulator should try to simulate every fine nuance of a gates behavior. This sort of thing is what analog spice is for. As long as a gate is simulated accurately enough for the circuit to be functional that is good enough, so id say as long as the gate has a propagation delay that is good enough. This is about the level of accuracy that FPGA simulators take, you punch in the operating conditions such as voltage and temperature and it looks up the typical propagation delay of a block.I don't know what method of doing the propagation delay simulators use. You could just delay the update events by that amount or wait for a input to be in the new high or new low state for a given amount of time before actually doing the update. The 2nd method sounds better to me overall since it might help extinguish feedback oscillations and makes for less required updates.The simulation i was toying with way on the level of transistors. Same things apply there except that you no longer have a clear "input" and "output" on a gate. What i had was capable of running a NOT gate feedback oscillator at about 1MHz in real time on a single core of a modern PC (multicore is difficult to do here).

author: MatCat
author_rank: Frequent Contributor
timestamp: March 10, 2021, 04:19:27 pm
content: Quote from: Fredderic on March 09, 2021, 08:27:00 amI am not simulating any real concept of impedance, just 'high' and 'low'. BUT Low works 'like' a high Z, as in if a device has ANY high inputs, it will stay high, so there is no true pull down, only pull up, which effectively emulates the concept of High Z connections. So as long as you know 2 or more circuits outputs will never be on at the same time, you can happily connect them to a single output to emulate a bus concept.There is a timing bug in the delay block, the way it works (supposed to work) is that any signal that comes in, will be delayed for the time of the delay, then put back out for the same exact period it came in at, any pulses that come into the delay while its still high, will buffer up and it will replay them back out until they are done.The keypad actually got an update after you posted this I believe, the Fn keys are just there for user convivence, they can either be set to switch, or button mode. I also added an output to the Clr button (it will output a 100ms pulse), it's not there yet but I do plan to add a Clr input as well to the peypad, so that you could have it self-clear itself on clocking in an input or whatever.Any bugs you find with signal propagations please do let me know, save it to a save file and submit it as a bug with details to the Issue Tracker of the GIT.Improvements to IC editing is coming, soon there will be a button on an IC to edit it. Technically you could have it open in other tabs just fine, but you would have to save whatever you are doing and load it to the other to get any changes in. That will improve once I have server persistent storage going.A wire join is an interesting idea, I mean you could do the same with OR (not buffered) or a buffer to do the same thing, but It is an interesting idea to have just an element that acts as a wire joining mechanism. Dedicated Busses are something I do plan to do in the future.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 10, 2021, 04:23:54 pm
content: Quote from: Berni on March 09, 2021, 08:56:32 amTechnically there is no given propagation delay, when an element goes 'high' it just sends an event to any element that its connected to on that line, and that element will in turn send out any events if any of its outputs changes as a result. Technically you could say the time it takes for JS to execute at each node is a 'delay' but not really since its all in a single code loop. There are buffered elements with time delays (like the buffer, various clocks, etc), but for the most part signals are allowed to propagate as fast as possible. I did this intentionally because I want logic to run as fast as JS can let it, breaking it only when a recursion loop is detected (using a buffer or timed element would in fact break recursion and allow oscillations anyway).

author: themadhippy
author_rank: Super Contributor
timestamp: March 10, 2021, 04:43:17 pm
content: QuoteThat was one thing i was cursing the lack of,along with not being able to delete a single wire.the other issue,which maybe a user/browser problem was right clicking is only momentary,as soon as i release the mouse button the menu disappears.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 10, 2021, 04:54:15 pm
content: Quote from: themadhippy on March 10, 2021, 04:43:17 pmYou can delete a single link, just go to make the link again and it will delete it.Can you tell me what browser and OS? Because I cannot recreate your momentary menu issue on Windows (any browser).

author: themadhippy
author_rank: Super Contributor
timestamp: March 10, 2021, 05:07:16 pm
content: QuoteDoh! simple when you know howQuotefirefox 86.0 64 bit running on ubuntu

author: MatCat
author_rank: Frequent Contributor
timestamp: March 10, 2021, 05:12:05 pm
content: Quote from: themadhippy on March 10, 2021, 05:07:16 pmCool, I will boot up an ubuntu vm later and see if I can reproduce.

author: Fredderic
author_rank: Regular Contributor
timestamp: March 11, 2021, 05:29:16 am
content: Quote from: MatCat on March 10, 2021, 04:19:27 pmYes. I realised that on a do'h moment shortly after posting… You're doing quite literal wired-OR logic… Could have skipped a whole bunch of OR gates in some of the IC's I'd put together. Certainly greatly simplifies the simulator logic…That's three things now you kind of need to make more obvious… Wires can be removed by re-doing them, it uses wired-OR logic, and the buffers thing…On the downside, that and the buffers thing also instantly made me feel like it's very much a toy simulator, tacked on the side of a fancy UI — more to give the UI a purpose than to actually be a simulator. I think at least the 3 basic logic levels is the very lowest bar on a "possibly useful digital simulator"… meh… Maybe I'm just not part of your intended audience… still gonna try make some portion of my pet imaginary processor in it, though… but itdoesinstantly tank my first impression. (Though that could be mostly because I've made one myself, and so have a better idea of just what goes into it all.)Quote from: MatCat on March 10, 2021, 04:19:27 pmI'll have to give that another try… Could I suggest doing the keypad reset on the trailing edge of the Clr output pulse…? That would allow the current output to be captured before the reset happens, and I can't think of any downsides. Though I personally still think a "digit pressed" output signal would be the more useful.Quote from: MatCat on March 10, 2021, 04:19:27 pmI think I'd prefer client persistent personally, maybe with the option later on to push it up to the server for storage, or if you want to share your design… Client persistent also opens the possibility of letting it run offline by aggressively caching all your pages — give the kids something to do on a long trip outside of cellular coverage areas — browsers have provisions for that kind of thing. But also, still keep the ability to save and load the design locally, and add the ability to do that on a per-IC basis, also, so someone could have their own private parts folder."Server persistent storage" sounds a lot like making an account… not gonna happen for a toy simulator… If you step the simulator up to the basic 5 signal levels, a vague representation of chip delays, and a library of "realistic" built-in IC's to play with like a good slice of the 7400 series gates (can still have a separate panel of ideal/easy IC counterparts also), then maybe — that's the bare minimum I was aiming for myself. As it is though, the moment an account is required, or any public visibility of my self-amusement dirt scratching designs, it'll be just a flat out nope.Quote from: MatCat on March 10, 2021, 04:19:27 pmThe main point I was going for there, is that wire joins would also function as routing, so you can bring the wires around other logic, rather than stomping right over top, and in a way that makes it easier to keep track of your design. Your wires also do straight lines just fine, and a little smarts would allow you to do both pretty well (indicating a curved corner vs. a 45° diagonal corner, I'm not sure how to achieve, though two chess-knight steps could quite easily be recognised and trigger a bezier curve). And it would be an easy way to throw in a makeshift bus in the meantime. (Even with busses, if I'm running a four wire bus, I'd rather have the wires separated for easier and clearer joining, and reserve an actual bus lines for 6-width and up, or where the design is getting a little on the tight side.) Net labels as was brought up earlier, also comes into play here. Also, some basic drawing primitives that aren't electrically active… Being able to draw a dotted line separating parts of the design would be really nice.My main issue here, though, is I simply wanted a set of straight bus lines right down the centre of the design, onto which I could hook the IC's as I put them together. The design will still work as it is, but, it's a horrible gruesome mess that's seriously hard to take in any way seriously. (Also, bidirectional pins.) If you can split the UI wires from the internal representation — assuming you're not already doing this — you can take all those wire joins, and flatten them into a single "star connection" to simplify the simulation (also, prevent recursion problems with wire loops)… Also, bi-directional pins…[Edit: And it's still waaaay too easy to accidentally wipe out your entire design with an accidental miss-click… Not sure what I did, but, it's all gone, and gotta go back to my last save.]

author: MatCat
author_rank: Frequent Contributor
timestamp: March 11, 2021, 05:45:58 am
content: Quote from: Fredderic on March 11, 2021, 05:29:16 amMaking CPU's IS my intended purpose for making this, not UI. I just want a nice UI to use in my endeavors. To that effect everything needed to do so will eventually get added. A bus element is planned, I have also put some thought into bi-directionality, realistically its not absolutely necessary at a logic level, but it does at IC level, so will probably end up in as an IC pin option.

author: Berni
author_rank: Super Contributor
timestamp: March 11, 2021, 06:23:04 am
content: Yeah tristates are mostly used for implementing buses without a predefined directionality.Since a lot of older CPUs share and reuse as much internal resources as possible means that the buses inside can actually be quite spread out. One of these internal buses might have the capability to be driven from the external data bus, from any of the CPU registers, from the ALU output, from program counter...etc so this sort of architecture of every possible "bus master" simply having a tristate buffer driving the bus lines is convenient to implement on hardware and makes it easy to add extra masters by simply connecting them onto the same bus lines.If you implement the bus as a ORed together MUX you need to get a wider set of OR gates every time you want to add a mus master. Works fine, its just messy looking as a big pile of buses converges onto the mountain of OR gates. But it is the way buses are done inside FPGAs since they also typically don't have any internal tristate capability. For the same reason RAM in FPGAs always has 2 data buses, one for write, one for read, since that removes the need for tristate, but makes the bus twice as wide.But for the case of your simulator i can see how not having tristate makes things a lot simpler since an input can only be driven by a single output, making the wire connection a simple object pointer for "check your logic state here"

author: MatCat
author_rank: Frequent Contributor
timestamp: March 11, 2021, 06:35:45 am
content: Quote from: Berni on March 11, 2021, 06:23:04 amActually you can put more then one output to a single input, if ANY incoming connection is high it will stay high even if someone connected to it goes low, so High Z IS doable as it is via line level ORing

author: Berni
author_rank: Super Contributor
timestamp: March 11, 2021, 06:40:05 am
content: Quote from: MatCat on March 11, 2021, 06:35:45 amAh that is a pretty good solution to it then. The end result even looks a lot like a tristate bus

author: MatCat
author_rank: Frequent Contributor
timestamp: March 11, 2021, 06:47:19 am
content: Quote from: Fredderic on March 11, 2021, 05:29:16 amYes, there will be user accounts, however it will not be mandatory, in fact this entire project is designed from the ground up to run as is standalone, and will remain that way, I will make hooks into the engine to integrate into my own web solution, but the git project as cloned will ALWAYS work as it standalone. Very soon the engine will support using localStorage so there will be persistence of files and the same exact management UI as will eventually be used for the accounts feature and sharing of designs, only the engine will support handling saves either as local actual files, localStorage, or server side, choice is users. Only designs that are published to server side as public share would be visible to anyone else even if stored server side.

author: MatCat
author_rank: Frequent Contributor
timestamp: March 14, 2021, 08:35:37 am
content: Added some pretty big features since I last posted, copy and paste, various improvements, optimizations to the draw routine, etc.