What are CPLDs, do they still play a role, how to program them? - Page 1
Forum section: electronics / general

author: soFPG
author_rank: Frequent Contributor
timestamp: May 25, 2020, 08:25:19 pm
content: I search online shops who sell electronic components quite often and sometimes I find components called "CPLDs". What I understand is that they are much simpler than FPGAs and because of that aren't really that capable, or are they?Are they still used today? And if so, for what reason? How are they programmed? Does it make sense for a hobbyist-person to get into CPLDs?

author: ataradov
author_rank: Super Contributor
timestamp: May 25, 2020, 09:07:16 pm
content: CPLDs are useful for very simple logic, and more importantly to simplify board layout. You can put a CPLD and essentially do the complex routing on the inside. CPLDs generally have lower propagation delays, which also makes them attractive.There are not many uses for hobbyists. CPLDs with reasonable resources cost a lot more than FPGAs.They are programmed just like any other programmable logic - though HDLs.

author: filssavi
author_rank: Frequent Contributor
timestamp: May 25, 2020, 09:44:28 pm
content: Once upon a time CPLDs were a middle step between PLA/PAL type devices (basically a bunch of or/and gates with n inputs and outputs, that could be connected more or less at will) and FPGAs....They had the same high level structure as an FPGA but used The AND/OR matrices as a base for the logic block, as opposed to Look up tables.The biggest difference between the two classes of devices (still somewhat relevant today) is that FPGAs are practically always volatile, requiring bitstream load at each boot from an external memory, while CPLDs are non volatile, and once programmed they start immediatelyNowadays the demarcation line is is blurring quite a bit, usually the modern “CPLDs” (intel Max 10 are just very small FPGAs with an internal flash memory (it can even be a separate die in low end chinese stuff); off the common manufacturers, Xilinx discontinued all non FPGA products, intel has the max line on FPGAs in disguise (max II max V and max 10). Lattice semi has both non volatile FPGAs and true CPLDs(isp4000) and both are referred genetically as CPLDs.As for the speed advantage,I am not sure it is so relevant with current devices as FPGAs can support frequencies in excess of 400 MHz (I guess CPLDs now seem faster as what you can fit in them are tiny in comparison even with the smallest spartan 7EDIT: As an example, you can cram a pwm generator for an NPC inverter in a max 5 cpld(the biggest) if you Squeeze hard enough and do not go crazy with features (such as multiple counters for phase shifted carriers)

author: ebclr
author_rank: Super Contributor
timestamp: May 25, 2020, 10:47:06 pm
content: CPLD means you can have your own IC factory, for a lot of logic IC, It's quite useful, especially for low volume productionIt's more simple and easier to handle than Fpga, But more limited, But don't underestimate the power, Are some actuals CPLDS who you can even implement your own microprocessor core

author: rstofer
author_rank: Super Contributor
timestamp: May 26, 2020, 05:41:07 pm
content: Just think of uP address decoding to select peripherals in a memory mapped system. Maybe there are 3 or 4 UARTs, console switches, disk controller, <whatever>. Chip select lines can be decoded in discrete chips or with a CPLD. The CPLD will use less board area.

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 29, 2020, 04:28:34 pm
content: A lot of the recent ICs that are still classified as "CPLD" these days are nothing more than small FPGAs, and can do a lot more than what you could with the PALs and GALs of old days.As filssavi said, they often come with embedded non-volatile configuration - for ease of integration, and almost "instant-on" availability, but other than that, they are basically FPGAs.I'd be curious to see *recent* CPLDs that can't effectively be classified (and used) as FPGAs.

author: 0db
author_rank: Frequent Contributor
timestamp: May 29, 2020, 05:26:36 pm
content: Quote from: SiliconWizard on May 29, 2020, 04:28:34 pmno

author: ataradov
author_rank: Super Contributor
timestamp: May 29, 2020, 05:33:48 pm
content: Quote from: 0db on May 29, 2020, 05:26:36 pmWow. Care to elaborate? Because SiliconWizard is right. Modern CPLDa are essentially FPGAs.

author: 0db
author_rank: Frequent Contributor
timestamp: May 29, 2020, 05:52:22 pm
content: Quote from: ataradov on May 29, 2020, 05:33:48 pmCPLDs have different voltage tolerance.They are much more stronger with I/O pins current.They require only one Vcore voltage. FPGAs require many.CPLDs have No PLL. No BRAM. No DSP slice. No CPU slice.And they have a completely different logic cell topology.etc.A kangaroo is mammal. A dog is also mammal, but kangaroos are not dogs.An FPGA is HDL device. A CPLD is also HDL device, but FPGAs are not CPLDs.

author: 0db
author_rank: Frequent Contributor
timestamp: May 29, 2020, 05:58:57 pm
content: Otherwise, Xilinx would have called them "tiny FPGAs" rather than "CPLDs with more cells"

author: asmi
author_rank: Super Contributor
timestamp: May 29, 2020, 06:11:30 pm
content: As far as I know, the fundamental difference is how configuration is performed. FPGAs configuration bits are stored in volatile SRAM cells, so there is always a "boot" stage (even flash-based FPGAs have it, they just boot from internal flash instead of external one, so it's usually faster), while in CPLDs these configuration bits are stored in non-volatile cells. This means that CPLDs are true instant-on devices, unlike FPGAs (even though some of them are marketed as such, but cue the fine print).

author: Bassman59
author_rank: Super Contributor
timestamp: May 29, 2020, 06:44:37 pm
content: Quote from: asmi on May 29, 2020, 06:11:30 pmMicrochip/MicroSemi/Actel FPGAs (except for their OTP rad-hard things) are all flash-based and do not have a "boot stage" where the configuration is transferred from flash to SRAM bits. Like a CPLD the configuration exists only in the flash. The parts are alive as soon as the power rails reach certain thresholds. By "alive" I mean the core logic is valid and the I/Os are enabled. It's all documented in their reference manuals, and on ProASIC-3E I measured this timing.Now the ProASIC-3 fabric is not like other FPGAs which have logic slices consisting of lookup tables and registers. It has registers and fine-grained logic elements. This means there's more routing to make connections. But it's not like a CPLD, which is just a large PAL.

author: 0db
author_rank: Frequent Contributor
timestamp: May 30, 2020, 11:08:51 am
content: Quote from: Bassman59 on May 29, 2020, 06:44:37 pmI own a very old Xilinx fpga with a glass window similar to the one used with UV-PROM. Probably in the past Xilinx though about producing UV-erasable-PROM fpgas, but then for some reason they abandoned the idea.

author: dietert1
author_rank: Super Contributor
timestamp: May 30, 2020, 01:35:28 pm
content: About fifteen years ago i wanted to stop using 74... logic for prototypes/experiments and got a stack of NOS Xilinx CPLDs. Then i put some of them on 0.1'' raster adapters. Most parts are still there because i can reuse them. As said before: They are 5 V pin compatible, fast and easy to use (built-in configuration). Development support (IDE) was free at the time. I just had to get some USB-JTAG adapters.I also used Spartan 3AN and Lattice MachXO2 FPGAs with on-chip configuration. But FPGA work is much more tricky. While a simple CPLD can be ready within some hours, anything with FPGA will more likely take a week or longer, especially when integrating IP from others.Digikey still lists XILINX CPLDs with 102 on-stock entries. That means they are being used.Regards, Dieter

author: Bassman59
author_rank: Super Contributor
timestamp: May 30, 2020, 05:46:57 pm
content: Quote from: dietert1 on May 30, 2020, 01:35:28 pmThe reason for that is your CPLDdesignis much simpler than an FPGA design, simply because the FPGA allows for a much larger design. Design complexity, and not target device, determines design time.But, that said, not long ago I put together a MachXO2 design for something (it actually replaced a microcontroller!) and it was done in a day, once I abandoned the Lattice Mico-8 nonsense and did the design in VHDL.

author: nctnico
author_rank: Super Contributor
timestamp: June 07, 2020, 12:19:24 am
content: Quote from: ataradov on May 25, 2020, 09:07:16 pmI disagree. IMHO CPLDs are ideal for hobbyists because they are more simple and thus easier to get started with programmable logic. Also CPLDs typically have a single supply voltage and internal flash which minimises the amount of external circuitry. I use CPLDs for their sheer simplicity every now and then.