Motorola m68k question: is it possible to replace mc68020 with mc68030? - Page 1
Forum section: electronics / general

author: legacy
author_rank: Super Contributor
timestamp: October 28, 2017, 03:26:18 pm
content: so, I googled but ... internet is overflowed of tons and tons of things which have made more confused, and I have the feeling that I'd best ask to whom I am sure have already tried it: is it possible to replace a mc68020-RC25 chip in ceramic package, clocked at 25Mhz, with an mc68030-RC50 (able to run up to 50Mhz) chip in the same package?thanks guys

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 03:41:28 pm
content: 20 seconds on Google found something that may be helpful......."The 68030 can be used with the 68020 bus, in which case its performance is similar to 68020 that it was derived from. However, the 68030 provides an additional synchronous bus interface which, if used, accelerates memory accesses up to 33% compared to an equally clocked 68020. The finer manufacturing process allowed Motorola to scale the full-version processor to 50 MHz. The EC variety topped out at 40 MHz."See here:https://en.wikipedia.org/wiki/Motorola_68030You need to consider clocks and bus speeds when upgrading a processors speed though. If you change nothing but the processor I suspect you will just get the same speed as with the 020-25 fitted.Fraser

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 03:49:21 pm
content: Or how about this from the venerable NXP....."The MC68030 provides a code-compatible upgrade path to the MC68020. It offers enhanced performance through additional cache, a memory management unit, and a bursting data bus.The MC68EC030 offers a lower cost embedded solution by removing the memory management unit."from here:https://www.nxp.com/products/no-longer-manufactured/enhanced-32-bit-processor:MC68030Just Google "MC68020 upgrade to MC68030" and you should find all you needFraser

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 03:56:35 pm
content: Take a look at pages relating to the AMIGA 2500 and 3000 computers as some used the 020 and the upgraded machines used the 030. The schematics may be available for these as well.This page is in German but translates well on my laptop using the Google translator......https://pl.wikipedia.org/wiki/Amiga_2500Fraser

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 04:04:40 pm
content: Oh dear,I found a thread for you which seems to answer your question.http://www.amiga.org/forums/showthread.php?t=50203The 030 is NOT a drop in replacement for the 020 according to that threadCode compatible in this case does not mean physically compatible it seems.Fraser

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 04:10:34 pm
content: Well it seems there may be just physical pinout issues to resolve for a 030 upgrade ... take a look here:https://www.sun3arc.org/hardpatches/3.60-tuning/cpu.phtmlThe clock crystal still has to be replaced for higher speed though.Fraser

author: Fraser
author_rank: Super Contributor
timestamp: October 28, 2017, 04:16:14 pm
content: This book download looks interesting as it overs the 020 and 030 as well asothers. I am not encouraging you to download a pirate book. If you find the information useful, you should purchase the book IMHOhttp://read.pudn.com/downloads158/ebook/707037/Embedded%20Systems%20Design%20-%202ed%20-%200750655461.pdfFraser

author: legacy
author_rank: Super Contributor
timestamp: October 28, 2017, 05:44:31 pm
content: I am on a smartphoneas well as I can see from datasheetsthe pin-layout is differentthus you need to make a smalladapter board with a socket for the 68030and a connector to fit in the 68020 socket

author: macboy
author_rank: Super Contributor
timestamp: October 31, 2017, 04:01:50 pm
content: The Applications section of the 68030 User Manual has information about replacing 020 with 030. They are not pin compatible, but that is the single biggest hurdle.One thing that either makes this easier or much harder is the asynchronous bus of the 020. The 030 fully supports this async mode (its faster synchronous mode won't be used in this case, without hardware change). If the board designers did their job "right" and asserted the DTACK (Data Transfer ACKnowledge) signals with the appropriate delay in all cases, then increasing the CPU clock is of no consequence. However, if they simply assert DTACK immediately and then depend upon the inherent delay in the bus cycle timing to allow enough time for devices (RAM, ROM, whatever) to work correctly, then you will have issues. The increased CPU speed means that the bus cycle will go faster. If the DTACK delay is explicit, then the faster 030 may (or may not) simply need to wait a cycle or two for the bus cycle, and all is good. If the delay is implicit, then the faster 030 may read invalid data too early, or terminate a write cycle prematurely.Note of course that without specific code support for the 030, the data cache will not be enabled, and therefore the performance benefit of it is not realized. This becomes even more important at a higher clock speed, as the 030 will need to wait longer (in cycles) for RAM access than the 020 needed to do. Fortunately, the 020 also has an instruction cache and I assume this should continue to work with the 030 (though I'd definitely compare the cache control registers to make sure!). Simply turning on the data cache isn't sufficient, as ALL bus accesses will be cached unless either: the hardware asserts the cache inhibit line during the bus access, or, the MMU is configured to mark a memory region as non-cacheable. One or the other must be done for (e.g.) all I/O accesses to hardware where the same memory addresses (devices registers) are read repeatedly to capture new data. If this memory is cached, you get old data from cache instead of new data from hardware.

author: legacy
author_rank: Super Contributor
timestamp: November 01, 2017, 09:36:39 pm
content: thanks for your clear explanation

author: @rt
author_rank: Super Contributor
timestamp: November 02, 2017, 04:47:01 pm
content: In terms of implementation, here’s an accelerator schema with 020/030 optional:http://www.amigawiki.de/dnl/schematics/A3630.pdf

author: westfw
author_rank: Super Contributor
timestamp: November 03, 2017, 04:51:51 am
content: There were "upgrades" for some of the 68020-based Macs, as well.http://www.shobaffum.com/iici/upgrades.html

author: helius
author_rank: Super Contributor
timestamp: November 03, 2017, 07:12:25 am
content: The only Macs with a 68020 were the original Mac II and the original Mac LC.Not many accelerators were made for the Mac II, as it did not have a PDS ("processor direct slot" which could take control from the CPU). The only way to upgrade them was to remove the chips from the CPU and MMU sockets and use an adapter that brought out those pins to a rectangular connector. The LC did have a PDS, and several accelerators work on it (although memory access is much slower on these "crippled" machines which had only 16-bit bus on the main board).The 68851 MMU that Motorola made for the 68020 was more complicated and not compatible with the 68030's built-in MMU. I can't confirm that any operating systems actually used its features, however. In the case of the Macintosh, System 7 virtual memory and A/UX both worked on the 68030 and its successors, as well as with the 68851.

author: legacy
author_rank: Super Contributor
timestamp: November 04, 2017, 11:17:40 am
content: Ironically several years ago I bought a 68030 accelerator for my home-built 68000-boardit's 68000 socket, and this accelerator worked fine.Now I'm evaluating what to do, but probably I will made a 68020 board.anyway I am in the process of repairing a 020-evaluation board, the cpu is friedalready have ordered a replacement chip, MC68020RC25

author: Benta
author_rank: Super Contributor
timestamp: November 05, 2017, 05:48:30 pm
content: The brilliant thing about the 68010 and upwards is that they are are 100% upwards software compatible when running in User mode. Supervisor mode (which should be restricted to BIOS and OS) has differences which relate both to HW and SW. Exception handlers in BIOS/OS should take care of this.