PIC32 timer interrupts will not work - Page 1
Forum section: electronics / general

author: mapexmbirch
author_rank: Contributor
timestamp: March 03, 2017, 10:17:39 am
content: HelloI have a PIC32MZ1024EFG064 and I am programming in C++. I haven't done much C++ before, but I have done a fair amount of C before. The compiler is saying no errors, everything looks ok. I can get code to work in the main, just the timer2 interrupt will not work. Here is much code:Code:#include "p32mz1024efg064.h"#include <xc.h>#include <stdio.h>#include <stdlib.h>#include <sys/attribs.h>#include <stdint.h> /* For uint32_t definition */#include <stdbool.h> /* For true/false definition */// PIC32MZ1024EFG064 Configuration Bit Settings// 'C' source line config statements// DEVCFG3// USERID = No Setting#pragma config FMIIEN = OFF // Ethernet RMII/MII Enable (MII Enabled)#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)#pragma config PGL1WAY = OFF // Permission Group Lock One Way Configuration (Allow only one reconfiguration)#pragma config PMDL1WAY = ON // Peripheral Module Disable Configuration (Allow only one reconfiguration)#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration (Allow only one reconfiguration)#pragma config FUSBIDIO = OFF // USB USBID Selection (Controlled by the USB Module)// DEVCFG2#pragma config FPLLIDIV = DIV_1 // System PLL Input Divider (1x Divider)#pragma config FPLLRNG = RANGE_8_16_MHZ // System PLL Input Range (8-16 MHz Input)#pragma config FPLLICLK = PLL_FRC // System PLL Input Clock Selection (POSC is input to the System PLL)#pragma config FPLLMULT = MUL_8 // System PLL Multiplier (PLL Multiply by 8)#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (2x Divider)#pragma config UPLLFSEL = FREQ_24MHZ // USB PLL Input Frequency Selection (USB PLL input is 24 MHz)// DEVCFG1#pragma config FNOSC = FRCDIV // Oscillator Selection Bits (Primary Osc (HS,EC))#pragma config DMTINTV = WIN_127_128 // DMT Count Window Interval (Window/Interval value is 127/128 counter value)#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disable SOSC)#pragma config IESO = OFF // Internal/External Switch Over (Enabled)#pragma config POSCMOD = HS // Primary Oscillator Configuration (HS osc mode)#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Enabled, FSCM Enabled)#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)#pragma config WDTSPGM = STOP // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)#pragma config WINDIS = NORMAL // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled)#pragma config FWDTWINSZ = WINSZ_25 // Watchdog Timer Window Size (Window size is 25%)#pragma config DMTCNT = DMT31 // Deadman Timer Count Selection (2^31 (2147483648))#pragma config FDMTEN = OFF // Deadman Timer Enable (Deadman Timer is disabled)// DEVCFG0#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)#pragma config TRCEN = ON // Trace Enable (Trace features in the CPU are enabled)#pragma config BOOTISA = MIPS32 // Boot ISA Selection (Boot code and Exception code is MIPS32)#pragma config FECCCON = OFF_UNLOCKED // Dynamic Flash ECC Configuration (ECC and Dynamic ECC are disabled (ECCCON bits are writable))#pragma config FSLEEP = OFF // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)#pragma config DBGPER = PG_ALL // Debug Mode CPU Access Permission (Allow CPU access to all permission regions)#pragma config SMCLR = MCLR_NORM // Soft Master Clear Enable bit (MCLR pin generates a normal system Reset)#pragma config SOSCGAIN = GAIN_2X // Secondary Oscillator Gain Control bits (2x gain setting)#pragma config SOSCBOOST = OFF // Secondary Oscillator Boost Kick Start Enable bit (Normal start of the oscillator)#pragma config POSCGAIN = GAIN_1X // Primary Oscillator Gain Control bits (2x gain setting)#pragma config POSCBOOST = ON // Primary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)#pragma config EJTAGBEN = NORMAL // EJTAG Boot (Normal EJTAG functionality)// DEVCP0#pragma config CP = OFFunsigned int i = 0;unsigned int a = 0;using namespace std;extern "C"void __ISR_AT_VECTOR (_TIMER_2_VECTOR, IPL2SOFT) T2Interrupt(void){IFS0bits.T2IF=0; //Clear the flagLATB=LATB^0x2000; //Flip the output}int main(void){//Osc config//OSCCON = 0x21100; //system PLL//SPLLCON = 0x30004; //PLL Multiply by 4, 21-42MHz range (32MHz)PB2DIV = 0x8003; //Clock div for UART clock, Div = 4, CLK = 8MHzPB3DIV = 0x8000; //Bus for timersTRISB=0;//Timer 2PR2 =1000;//TMR2 = 0;T2CON = 0x8000;//Timer onIPC2bits.T2IP=2; //Priority 2IEC0bits.T2IE=1; //Enable interrupIFS0bits.T2IF=0; //Clear the flagwhile(1){}}There is so little help online. Why aren't there more code examples online!?!?!?This is the sample code which comes with MPLAP X, I don't know what half of it is doing:Code:/#include <xc.h>#include <cp0defs.h>#include <sys/attribs.h>#include <iostream>// Configuration Bit settings// SYSCLK = 80 MHz (8MHz Crystal/ FPLLIDIV * FPLLMUL / FPLLODIV)// PBCLK = 40 MHz// Primary Osc w/PLL (XT+,HS+,EC+PLL)// WDT OFF// Other options are don't care//#pragma config FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FPLLODIV = DIV_1, FWDTEN = OFF#pragma config POSCMOD = HS, FNOSC = PRIPLL, FPBDIV = DIV_1#define CORE_TICK_RATE 1000000uusing namespace std;volatile unsigned long my_count = 0;// An ISR must be in the "C" namespace.extern "C"void __ISR(_CORE_TIMER_VECTOR, IPL2SOFT) CoreTimerHandler(void){unsigned long old_count, period;old_count = _CP0_GET_COUNT();// clear the interrupt flagIFS0CLR = _IFS0_CTIF_MASK;// .. things to docout << "Executing CoreTimerHandler #" << my_count++ << endl;// update the periodperiod = CORE_TICK_RATE;period += old_count;_CP0_SET_COMPARE(period);}int __attribute__((nomips16)) main (void){unsigned int cause_val;//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~// Add code to configure cache, wait states, and peripheral bus clock// See http://www.microchip.com/mplabharmony// Set stdout to go to UART 1 instead of UART 2__XC_UART=1;cout << "Beginning " __FILE__ " test" << endl;//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~// Configure the core timer// clear the count reg_CP0_SET_COUNT(0);// set up the period in the compare reg_CP0_SET_COMPARE(CORE_TICK_RATE);// The Core timer should halt when we are halted at a debug breakpoint._CP0_BIC_DEBUG(_CP0_DEBUG_COUNTDM_MASK);// set up the core timer interrupt with a prioirty of 2 and zero sub-priorityIFS0CLR = _IFS0_CTIF_MASK;IPC0CLR = _IPC0_CTIP_MASK;IPC0SET = (2 << _IPC0_CTIP_POSITION);IPC0CLR = _IPC0_CTIS_MASK;IPC0SET = (0 << _IPC0_CTIS_POSITION);IEC0CLR = _IEC0_CTIE_MASK;IEC0SET = (1 << _IEC0_CTIE_POSITION);// enable multi-vector interrupts// set the CP0 cause IV bit highcause_val = _CP0_GET_CAUSE();cause_val |= _CP0_CAUSE_IV_MASK;_CP0_SET_CAUSE(cause_val);INTCONSET = _INTCON_MVEC_MASK;// set the CP0 status IE bit high to turn on interrupts__asm__ volatile ("ei");while(1) {__asm__ volatile ("nop");}}Any insight as to why it isn't working would be much appreciated!

author: Lunasix
author_rank: Regular Contributor
timestamp: March 03, 2017, 10:37:32 am
content: In your main, at the beginning, you can try to add these lines :asm("ei");//Int multi-vectorINTCONbits.MVEC = 1;

author: mapexmbirch
author_rank: Contributor
timestamp: March 03, 2017, 10:40:29 am
content: Thank you so much! That worked! I am eternally grateful!