How thick is via plating ? - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: October 30, 2013, 11:55:03 am
content: I'm designing a board that needs some low resistance tracks (wide ones) and i need to connect some vias through the board. How "thick" are vias when manufactured ? do hole diameters make much difference ? (other than wall area to be plated).

author: KJDS
author_rank: Super Contributor
timestamp: October 30, 2013, 12:02:42 pm
content: From memory, not very thick, typically half the surface thickness. Very small vias will be a little worse. If you're really pushing a lot of current then I'd be tempted to either go for filled vias which are expensive or else solder some pins in which will add to the production cost.Having said that, I've also just used multiple vias in place on 20A tracks without issue.

author: Simon
author_rank: Unknown
timestamp: October 30, 2013, 12:24:36 pm
content: ok, well it's not got to take much current but for pulses so I wanted to keep pathways resistance down. I have 5 caps, 3 one side and 2 the other of the board and need to link the 2 to the 3, this way they are all closer together rather than a long line.

author: kayvee
author_rank: Regular Contributor
timestamp: October 30, 2013, 12:38:24 pm
content: If you make the vias larger and leave them untented you can always let the wave solder process fill them with solder making a nice low resistance path, or if you are hand soldering the boards, manually fill the untented vias up with solder afterwards.

author: Simon
author_rank: Unknown
timestamp: October 30, 2013, 12:41:21 pm
content: any standard sizes I should stick to ? this is a one off so building complications are not s huge problem

author: kayvee
author_rank: Regular Contributor
timestamp: October 30, 2013, 12:48:40 pm
content: I am not sure what track widths you are talking about but I would go with a size which you have used commonly on the rest if the board, so it does not incur an additional drill change during PCB manufacture.Something like a 1.2mm pad diameter with a 0.7mm hole diameter. Just select a drill size that you already are using elsewhere on the board.

author: Simon
author_rank: Unknown
timestamp: October 30, 2013, 12:57:49 pm
content: ok well tracks that have to be low impedence are 3 or 5mm wide do no problem for via size, I'll just drop a couple in for each cap pin

author: Kjelt
author_rank: Super Contributor
timestamp: October 30, 2013, 01:15:03 pm
content: Quote from: KJDS on October 30, 2013, 12:02:42 pmAs far as I know sometimes via fills arenot conductive.Check your board manufacturer,(see example below where soldermask is used as filler).

author: Simon
author_rank: Unknown
timestamp: October 30, 2013, 01:22:02 pm
content: Well won't hurt to just put some wires through. I need 1A continuous and will be "dumping" 40V on a 24V circuit for 50mS (for testing purposes see my "spike generator" thread) from what is supposed to be a <20mR source so just looking to make sure my battery of 5 capacitors are nicely joined up.

author: Neilm
author_rank: Super Contributor
timestamp: October 30, 2013, 07:20:45 pm
content: Have you seenhttp://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator? I use it to get a general idea then add a couple more for luck, especially if it is high currents at a steady state. For only 1A, I would probably use 3 vias.

author: Smokey
author_rank: Super Contributor
timestamp: October 30, 2013, 10:04:46 pm
content: The via copper thickness depends on the size of the hole and the weight of the plating on the outer layers.Just for reference:0.5 OZ Copper = 0.7mil1 OZ Copper = 1.4mil2 OZ Copper = 2.8milOur power boards are always 2oz outer layers with 15-20mil vias, and we used to have notes on our layouts that read "1oz minimum via plating" but the board houses were complaining they could not guarantee that with 2oz outer so we asked what they could guarantee and changed the note to "1mil minimum via plating" and we added more vias when needed. Because of the plating process, the vias are not usually uniform thickness either so keep that in mind.Just some rough calculations:Assuming 2oz outer layers and 20mil vias at 1mil plating, that is 2*pi*r = 2*3.14*10 = 62.8 mil of copper in the via.Treating that like an inner layer (which is probably too restrictive) 62.8mil trace width at 1mil thickness and a 25C temp rise can conduct 1.97A. That pretty much agrees with the via current calculator.It would probably be best to ask the board house what they guarantee for via plating if they don't have that spec published. We also usually get cut away production samples with new boards where they slice the board and actually show you they are doing what they said they would do as far as plating thickness. You probably aren't going to get that for a small order through.

author: free_electron
author_rank: Super Contributor
timestamp: October 30, 2013, 11:55:34 pm
content: Quote from: kayvee on October 30, 2013, 12:38:24 pmthat doesn't do anything ... it is still the circumference of the plated wall multiplied by the thickness of the copper on the plane it is connecting to that defines the resistance... you have that bottleneck where you leave the plane and where you connect the plane.if your outer layer copper is 30 micron and the hole is 1mm then the connecting stub from hole wall to trace is diameter * pi wide , and 30 micron tall. that is the cross section the current has to weasel through.so if you have a trace that needs to be 1mm wide at 30 micron thick copper for current carrying capability then the hole in the via cannot be smaller than 1/pi.for a 0.3 mm diameter drill you will end up with a circumference of 0.3 times pi = 1mm which is equal to your track width.so if you need a 75 mil trace and you plonk in a via that is smaller than 75 / pi ( 25 mils ) you have a resistance discontinuity.now, the discontinuity in the wall itself comes form the fact that the copper there is only half that. so that hole diameter should be at least (2/pi) times the trace width to maintain cross section.current capability of a wire is given be cross section.a wire that is 2 mil thick and 5 mils wide can carry the same current as one that is 1 mil thick and 10 mil wide. it is length * width.hopping from a trace to a via you have the cross section given by copper thickness * via circumferencein the via itself the equation is still (copper thickness * via circumference) but in the via itself copper is only 1/2 size thickand exiting the via on the other layer you are again faced with copper thickness * via circumference.so you need to calculate for worst case :2 x trace width ( the two is to compensate for the half thickness in the holes ) / PI to get the drill diameter.Now, this is ONLY valid if your plated thickness is 1/2 that of your outer layer copper !the real formula is more complicated.(trace width * trace height) = (cirumference of hole * trace height) for the trace to via handoff(trace width * trace height) = (cirumference of the hole * thickness of the via plating itself ).you will find that the latter equation is the one that is dominant ( unless you get into whacky aspect ratios with very small currents)filling via' only solves the latter equation. if the circumference is still too small you will fry the trace to via handoff interconnects at the demand current.

author: walshms
author_rank: Regular Contributor
timestamp: October 31, 2013, 02:37:27 am
content: If it's for a few one-offs, there's a simple solution that works perfectly, but requires some hand work: Z-wires.Was part of the Air Force WS-6536 wiring spec. You take a component lead that you'd trimmed, bend a small part of the end of it to 90 degrees and solder it to one side with the wire through the hole. On the other side, you trim it, bend it over, and solder it there too. Problem solved.

author: poorchava
author_rank: Super Contributor
timestamp: October 31, 2013, 06:07:13 am
content: I've seen some fab houses, that amongst their design rules have "plating process will decrease holes by 0.1mm. Please take that into account in your design". I suppose that's a good hint.

author: EEVblog
author_rank: Unknown
timestamp: October 31, 2013, 06:26:37 am
content: The rough rule of thumb is 0.5A capacity per via for a typical plating thickness for reasonable heat rise and drop. Halve that value as a starting point for safe side design practice.

author: Simon
author_rank: Unknown
timestamp: October 31, 2013, 10:17:43 am
content: Well i have put in via's with 1.5mm holes so I can easily solder a wire through.

author: EEVblog
author_rank: Unknown
timestamp: October 31, 2013, 10:45:14 am
content: Quote from: free_electron on October 30, 2013, 11:55:34 pmIt will, just not a huge amount. Similar to what Mike and I measured in our testing of solder coated tracks.

author: EEVblog
author_rank: Unknown
timestamp: November 02, 2013, 03:38:20 am
content: I've just created this chart for current capacity

author: Simon
author_rank: Unknown
timestamp: November 02, 2013, 12:33:11 pm
content: Thanks Dave, seems 1.5mm is on the right track and I'll solder a wire through for good measure