What is this and why is it used?  - Page 1
Forum section: electronics / beginners

author: FotatoPotato
author_rank: Regular Contributor
timestamp: April 12, 2018, 06:07:01 pm
content: Hi all,I have been in the process of making my own FPGA nixie clock and I decided to have an FPGA chip directly on the board instead of using my dev board attached by some header pins. Anyway while designing it i decided to just copy the design of my dev board because it seems pretty “simple” and it wasn’t too expensive to buy all the parts ($40 instead of the $90 of the dev board). I’m just a bit confused on some of the parts used in the schematic. It shows the use of an FTDI F245Rl USB to FIFO chip and I was wondering what FIFO stands for and why it’s used instead of something like serial, Uart or Jtag. The other thing I saw was the use of a 2Mb SPI flash chip (AT45DB021D) which was connected between the FPGA and the FTDI Chip and I’m not sure why it’s there. Is it used for the FIFO communication or something else?Schematic:https://static1.squarespace.com/static/545510f7e4b034f1f6ee64b3/t/54554d38e4b0c260545df6ef/1414876472673/mercury_schematic.pdfThanks!

author: james_s
author_rank: Super Contributor
timestamp: April 12, 2018, 06:13:19 pm
content: FIFO stands for First-In, First-Out, typically it refers to a buffer.$90 seems like an expensive dev board to use for a clock, one of those $14 Cyclone II boards would be overkill, a CPLD would probably be plenty.I encourage you to try to understand what you're building, don't just blindly copy something.

author: FotatoPotato
author_rank: Regular Contributor
timestamp: April 12, 2018, 06:21:24 pm
content: I know the fpga is wayyyyyy overkill and I could easily do the same with a cheap micro controller. The point is to just learn how to program an FPGA. The only reason I’m copying the design is because I already have one of the FPGA chips lying around from annother project so I thought I would just use the same design as the one on my dev board because I know it works. Ill definately be looking into wiring up an FPGA more becuase I want to make my own dev board, so ill get pleny of understanding from that. Also whats the point of adding a buffer? And why not jsut use JTAG or some other form of comunication?

author: james_s
author_rank: Super Contributor
timestamp: April 12, 2018, 09:44:33 pm
content: Well I don't know about that particular board, but generally the buffer is there so that the computer can send the data in one lump and not care whether the device on the other end is ready for it. It's possible that your board uses that same IC to bit-bang the JTAG port on the FPGA, I don't know. If you look up the datasheet for the IC in question it will tell you what all it can do.

author: ataradov
author_rank: Super Contributor
timestamp: April 13, 2018, 11:34:51 am
content: USB FIFO is there as a programming interface. Spartan3 FPGA does not have internal configuration memory, so you have external flash, and USB interface to program it. Typically you don't need this USB interface in the final product, you just use a programming cable to program the flash.

author: TomS_
author_rank: Frequent Contributor
timestamp: April 13, 2018, 02:32:19 pm
content: Quote from: FotatoPotato on April 12, 2018, 06:07:01 pmAs already mentioned, FIFO = first in first out. Think of it like a queue of people. The first person to enter the queue will be the first person to exit the queue at the other side (in a civilised world, anyway).Serial/UART hardware would likely already implement a FIFO queue, if it is decent enough hardware (some low end microcontrollers may only have a single byte of buffer space for receive and transmit). This works essentially the same way. When characters are received they are queued in a FIFO buffer so that when you read the buffer the first byte you read is the first one to have arrived, followed by the second and so on. Important stuff when you are trying to transmit a message as you dont want it coming out in reverse. Same for transmit - you write characters to the FIFO buffer, and the hardware will transmit them in the order that you wrote them.Reverse would be a LIFO buffer - last in first out. This is how a "stack" works in a processor (think PUSH and POP instructions), and can be thought of like a pile of plates, or books or maybe your pile of dirty laundry. You place plates/books/clothes on the top of the stack, and when removing items you take them from the top as well. The only way to get to the very bottom item is to remove all other items from top first.