Via thermals - How to remove them? - Page 1
Forum section: electronics / general

author: SolarSunrise
author_rank: Regular Contributor
timestamp: April 04, 2014, 06:04:09 pm
content: Alright I am new to Altium Designer and I was routing a small "high density" PCB when I noticed "image in the attachment"How do I remove the thermals ONLY on vias connected to GND plane? I tried playing around with the DRC and priorities but no luck... This may be a trivial question but since I'm new to Altium, I'm a newbie!Any help? Thanks as always!EDIT: Also, do you know how to reduce the silk screen size? It is little bit too big for my design so I was hoping this expensive tool would have font reduction...

author: toohec
author_rank: Contributor
timestamp: April 04, 2014, 09:34:25 pm
content: Your via thermals are defined in the design rules, under Plane > Polycon Connect Style. You will need to add a new rule in that section that defines all GND vias as having a direct connect style to polygons (i.e. your GND polygon flood)Your first object query in the rule will likely be...IsVia AND InNet('GND')Leave the second object query as "All", and change the connect style at the bottom to 'direct connect'. If you have any other polygon connect rules, you may wish to increase the via connect rule to priority number 1. Once you have that rule added, repour your polygons and the thermals should be gone on the vias. Be aware that you probably don't need the "AND InNet('GND')" portion in the first query. Applying the direct connect style to all vias in any net will probably work ok for your board. This rule only applys to polygon connections and not the general track connections to vias.If you have any internal GND plane layers, you may want to verify that the plane connect style is set to 'direct connect' as well. (Look under Plane > Power Plane Connect Style). You likely already have a general "All" plane connect style set as direct connect, but you should verify it.For the second question about silk size, just select all silk text using the PCB filter "IsDesignator". Then while all the designators are selected, use the PCB Inspector to adjust the Text Height and Text Width accordingly. Your changes will be applied to all the silkscreen objects selected.Edit: added plane connect style info as well.

author: SolarSunrise
author_rank: Regular Contributor
timestamp: April 05, 2014, 03:26:17 pm
content: Thanks toohec for the silk screen tip!Note - for the others having the same problem: Add a rule"IsVia AND InNet('GND')"with the connection setting as direct. If you leave it just like that then the pads will also be directly connected. So add:"IsPad AND InNet('GND')"and set the connection setting to thermals for the pads which aren't vias. This will make the component pads thermals while the bias are directly connected to the plane.Below is a picture of the setting. Note that the pad of the capacitor C6 has thermal relief while the GND via is directly connected.

author: toohec
author_rank: Contributor
timestamp: April 05, 2014, 09:19:54 pm
content: The 'IsVia' rule should not have any effect on your pad connection style, so the second 'IsPad' rule should not be necessary. If you have only the following two polygon connect style rules, the result should only have the vias as direct connect. All other objects that are not vias will be subjected to the global All/All rule (rule 2 below).Rule 1: (Priority 1)First query: IsVia2nd query: AllConnection Type: Direct ConnectRule 2: (Priority 2)First query: All2nd query: AllConnection Type: Thermal (standard)Did you have a second global "all" type rule? How many polygon connect style rules do you have in total? If you did not have a second rule to capture all other object types, that may have resulted in the pads being connected. I've never tested that scenario to see how Altium responds.If you list all your polygon connect style rules here in their order of priority, I may be able to help you identify the culprit (assuming it's not the "all/all" case that I mentioned above). You might still want an IsPad rules depending on the complexity of your polygon connect requirements, but the point is that the IsVia rule should not have any effect on your pads. The two rules above would direct connect all vias and leave all other objects including pads as thermal connections.