"NU180" - A U180 drop-in replacement for the 3458A.  - Page 1
Forum section: electronics / general

author: Zondar
author_rank: Regular Contributor
timestamp: August 20, 2025, 09:02:18 pm
content: “NU180” is a project to create a drop-in replacement for the "U180" hybrid in the HPAK 3458A 8.5 digit DVM.As many here know, the 3458A’s “A3” ADC board contains a custom hybrid, "U180," that is often found to have problems with excessive drift, eventually leading to the DVM's failure. It's a plague! New A3 boards are not available, and an official repair, if available, currently costs over $6,000. Something must be done!U180 is a hybrid designed by HP in the 1980’s. In one package, it includes a custom current-steering chip and a custom resistor array. People on this forum and elsewhere have analyzed U180 to the point that a reverse-engineered replacement is conceivable. Would a “NU180” have the same performance? It would not be easy, but the bright and experienced people here can give it their best!The parts needed include a small amount of control logic, analog switches for current-steering, and a set of high-precision matched resistors. One particular point that received a lot of attention and discussion was the matching between the 50k resistor and the four 80k resistors that are used for higher-precision measurements. Unfortunately, 80k is not a common value, but semi-custom high-precision versions are available with 50 times better rated TCR than the best in-stock. These are expensive, but the resulting matching between the 50k and 80k's should be <=0.02% absolute and <=0.4 ppm/degree-C TCR tracking. These numbers are close to the requirements that NU180 must meet within the 3458A.October 17 Update:NU180 installed!IT WORKS!!!A photo of it mounted on the A3 board is shown below. This is a "functionality" prototype that uses less expensive resistors. As such, it's not expected to be super accurate or have zero drift. It's for studying how well things work and to make any corrections or improvements that are found to be needed (some no-doubt will show up). But still, a 10V reference measured about 10V +/-40 uV. That's promising!The 3465A would require recalibration to adapt to the U180 substitute before final accuracy can be tested. However, that will need to wait until the "performance" version is prepared. That revision will use custom low TCR resistors where critical, and should be ready in about 3 weeks.October 11 Update:A prototype NU180 board has been finished. A schematic, board layout and a photo of a completed board is shown below. The photo shows the NU180 board mounted in a small "motherboard" for initial testing. The design has left enough room to use 2512 footprints for the high precision 50k and 80k resistors, but the currently-fabricated version uses 1206's so that less-expensive resistors can be used for initial tests.Important:Do you have a spare working A3 board (with a bad U180) that you can use for this or donate to the cause? Do you have a 3458A that you can experiment with? If you have a machine that has, or can have, a socketed U180, and want to participate in testing, please contact me privately or join in the discussion. In any event, please provide any feedback, corrections or improvements that you may have.Thank you for your interest and any contributions you can make!

author: Kleinstein
author_rank: Super Contributor
timestamp: August 20, 2025, 10:38:53 pm
content: With the resistors it is not really about abolute accuracy and super precise matching in the ratios. So no need for 0.01 % parts. It would be more about TC matching and maybe thermal coupling. So more the choice of 1 ppm/K or 2 ppm/K parts.There are a few parts that don't need much matching relative to each other:1) the reference scaling for the +- 12 V2) the ADC resistors, for the slower precision mode (50 K resistors for the input, 4 x 80 K resistors are the reference)3) the resistors for the fast mode (4 x 20 K - the 10 K for the input are externally on A3 and thus really good matching difficult4) the 5 V ref and the ladder partThe ref. scaling part is relevant for the overall TC. This are mainly 2 resistors in an odd ratio. The inverter part is replatively easy as matched equal reistor pairs are common and many choices there. The accuracy of the ratio should not be critical.The fast mode part is not very high performance anyway (external input resistor and LF411 Buffer). So I would not worry that much here. This would also apply to the switches.The ladder part and 5 V are for the minor slopes and don't need to be super low TC. Here separate SMD resistors seem very sensible. With the HCT14 in series one should get away with 0.1% parts here.The tricky part are the resistors for the slow ADC mode. Here value matching is not super critical, but TC matching is, as it sets offset and gain drift. The 50 K resistors would also need to be very linear with little effect of self heating. The 4 x 50 K resistors from U180 are used as a unit and only may replace them directly with 1 really good resistor. The tricky part would be getting really good TC tracking from the 50 K and 80 K resistors.I had rather good experiance with ORN type reisistor arrays. The problem is however that standard parts are not 40 K but 20 K, 50 K or 100 K.As it is only about the ref. currents one should be able to replace the 12 V and 80 K with 15 V and 100 K. AFAIK the +-12 V ref. voltages are only used on the A3 board, for the ADC itself. The only other external part to change would be in the generation of the modulated 5 V supply for the input switch. So one more resistor on A3 would need a change. The scaling from 7 V to 12 V is part of U180 anyway. With the +-15 V ref. case one could than use resistor arrays with 100 K or 50 K for the precision ADC part. e.g. the 50 K as 2 x 100 K in parallel or 100 K for the references as 2 x 50 K in series. Both solution would need 12 equal resistors. As they are used in groups these could also be split over 2 or 4 chips and would not all need to be in one chip.Another side effect of changing to +-15 V ref. voltage would be that the switches for the reference and input could also be matched, with 2 of the ref. switches in parallel for the input. This way there is less need for low R_on with the switches.I would consider the change to a +-15 V ref. a real option to consider.I don't see an absolute need for a negative supply for the switches. The main point for this would not be a slightly negative voltage for the signals - CMOS switches can handle that. The point could be the leakage current. With a voltage more in the middle the currents to the positive an negative side can compensate in part. It is still the question if it is worth the complications.For the logic I would suggest to still have the flip flops (at least the 4x80 K ref. switches for the precision mode) with external flip-flops. An CPLD/FPGA can have internal delay modulation that can cause INL errors. For the other signals, chances are one could get away with flip flops inside the CPLD.

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 01:24:42 am
content: Thank you Kleinstein for your extensive response.On using +/- 15V: These aren't supplied on U180, are they? I see your point, but unless it's critical or can't be done any other way, I'd prefer to stick to the "drop-in" plan for now (i.e., no bodge wires to A3). We can reassess later if no suitable alternatives seem available.On how the digital logic should be executed: With a quick count, U180 contains about 14x inverters, 16x 2-input NORs, 5x 3-input NOR's, 1x 2-input NAND, 1x 3-input NAND, 2x buffers (not needed here), and 18x flip-flops to be implemented. From my 74xx day's memory, that would require at least 13-16 packages. This is very little for an FPGA, but compared to the analog section it's quite a lot if done in discrete parts. Also, an FPGA has the advantage of being easily reprogrammed. Of course, a mix is possible too. Personally, for better timing I'd take an FPGA over a mess of packages and board wiring. Anyway, this too can be debated further, especially if data becomes available.I'll think more about the negative voltages. My thought is that it's available and it should be better, so why not use it unless something prevents that. About the only concern is checking where the logic level thresholds are.A related question: At what potential is Vdd2? I haven't measured it, but it looks like it should be about 4.4V. Is that right?I've heard that custom monolithic arrays can be made at a cost of a few hundred dollars (I think). Is this a realistic option?

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 03:08:31 am
content: I decided that picking resistors can be done in reverse: Just find the best-performing options for each resistor, and note any resistor arrays that are available. I'll come up with a table a little later.Anyway, 80k is very hard to find with fancy specs. But it turns out that 20k resistors can be had easily, e.g. by Vishay, claiming 0.01% tolerance and 0.2 ppm/C. We could interlace the four resistors for better temperature uniformity. Since a number of 80k's are needed, the size and expense would grow rapidly.The best in-stock single 50k resistor is 0.01% and 0.2 ppm/C. Five 10k resistors at 0.01% and 0.2 ppm/C should do a little better too, but it's getting a bit crazy.

author: coppercone2
author_rank: Super Contributor
timestamp: August 21, 2025, 03:18:18 am
content: how many layers does this board need? Could it work with only 2 layers?

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 03:25:14 am
content: Four is inexpensive and offers many advantages. It's a no-brainer.I made a few measurements concerning the allowable board size:* There's about 20mm from the top of the A3 PCB to the bottom of the cover.* There's almost no useful horizontal room to grow the PCB beyond the shape of U180 unless it's elevated. There's probably room for a row or two of resistors, though.* The size of the board can grow significantly if it's elevated and if the board thickness is kept to about 10mm or less.

author: coppercone2
author_rank: Super Contributor
timestamp: August 21, 2025, 03:46:58 am
content: Well, I was thinking of an aluminum nitride PCB if you can do two layers. Its actually some what strait forward so long its flat and only two layers.

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 03:49:15 am
content: Oh, that's interesting about the conductivity! But to lose the benefits of 4 layers, wow, that would hurt! I won't say it's impossible, but you're looking at Apollo-age design.I was thinking of putting thermal pads or paste and a nice, big slab of copper on top. That should do pretty well.

author: coppercone2
author_rank: Super Contributor
timestamp: August 21, 2025, 03:51:16 am
content: I think 4 layers would be very difficult if they are true (monolith)but if you just have custom hybrids for the resistors on a little PCB of their own it might put it into the realm of HP performance?I have been saving a little plate of AlN for a while. Of course its probobly not the best grade, but I have been meaning to see how well silver sinters to it.The problem with hard anodized aluminum substrate is that you need low temp ceramic inks (proprietary), because the aluminum would melt at sintering temps that are DIYable. There may be enough info online for a well equipped glassier to do it, but I checked out when it says to ball mill your own custom glass firts, and I am not going to go and learn how to sieve things... not a chincilla . For aluminum plating copper so that it can be anodized you needveryexpensive ionic plating baths (liquid salts)But regular AlN still blows most stuff out of water.And electroless copper works OK even DIY (the tin salt being oxidized is the biggest problem). I thought about trying to electroless and electroplate a hard anodized aluminum part to make a PCB that does not require the oven at all..... it would beat out AlN by a factor of 2 or more I think. But I suspect it would be rather fragile and could not be too hot because having a metal core is high expansion. Strain error might be worse. One day I will find out.Of course, there is also thick film resistor inks. I do wonder how good the match would be, even if the absolute tempco might be 50ppm, since the material is well linked and of the same type. If its all fired from the same batch. But I doubt it would be that easy. But the inks are way harder then silver conductor, I have gottenzeropossitive results there. The silver conductors work OK though, on flat surfaces, pretty easy. If you try your own silver PCB, if your diligent I expect success at 1st or 2nd try. With DIY film resistors I doubt you will get it at the 10th try

author: Hydron
author_rank: Super Contributor
timestamp: August 21, 2025, 07:59:25 am
content: As much as I love AlN, in the realms of standard PCB processes maybe worth considering going beyond 4 layers? Not for routing (you'll end up limited by vias) but to get more copper into it, especially if you can do a stack up with a thick core and the layers near the surface. 6 layers is pretty affordable now thinking of costs, but given the size and criticality of this board going to something more exotic and expensive (e.g. some thicker copper on shallow internal layers) can probably be justified.I'm guessing you'll also need to be careful about thermal connections to resistor pads etc - having some resistors with lower thermal impedance due to traces and vias than others might not be good for matching! Lots to think about, sounds like a fun project!I would consider bodge wires to A3 as something acceptable in this context if it helps solve performance issues - someone fixing their 3458A with a U180 replacement isn't going to blink about adding a couple of wires to get 15V onto there!

author: Kleinstein
author_rank: Super Contributor
timestamp: August 21, 2025, 08:36:58 am
content: For using a +-15 V reference there is no need to have the higher supply at U180. One would only need to change the resistors (part of U180 anyway) for the 7 V to 12 V gain step. The LT1001 on the A3 board that is originally doing the 7 to 12 V step would than do 7 to 15 V instead. With a 18 V supply for the OP-amps this should still work.AFAIK the only change needed on the A3 board would be changing R176. Depending on the supply for the switches one may want to adjust that resistor anyway to adjust the supply to the input switch.For the logic reporgramming should not be needed. With quite some logic a programmable logic chips looks reaonable. One may be able to get a slightly simplified logic (AFAIK a few parts are unused - only 13 FF should really be needed), but it would still be quite some 74xxx chips. To be on the safe side I would still consider the 4 most critical FF external (e.g. 1 x 74AC175), as FPGAs may not give super low jitter as they tend to be power optimized and interactions can cause delay modulation (one output pin state effecting the delay of others).A point to check with the FPGA would be the power consumption - a lot of heat would be an issue.I don't see a logic ouput from U180. So a lower voltage level at the FPGA may work and would only need 5 V tolerant inputs.Size wise I don't think one would get away with only the U180 outline. The pins to fit in a socket tend to be THT and would thus block much of the area on both sides. Even with quite some unused pins that could be skipped it would not leave much area.

author: TERRA Operative
author_rank: Super Contributor
timestamp: August 21, 2025, 08:58:38 am
content: I have a 3458A that has no drift problems which I think I could swap in a board if needed without too much trouble.I have upgraded the NVRAM to FRAM, so it would be trivial to make another FRAM to use with the replacement board so I can preserve my current FRAM with its cal constants.I also have a few Yokogawa 2792 standard resistors (including a 10Kohm model) and a Fluke 731A 10V voltage standard, as well as various other volt/current generators in AC and DC, so testing various things can be done.The details of actual design work at this level besides PCB layout etc may be beyond me, but I don't mind opening the cover on my 3458A if it will help.That's all assuming I din't have to touch my existing A3 board with a soldering iron of course....

author: iMo
author_rank: Super Contributor
timestamp: August 21, 2025, 09:11:07 am
content: Quote from: Kleinstein on August 21, 2025, 08:36:58 amAs I wrote once re this - the XC9536XL would be a great candidate - it is fast, small number of LUTs and FFs (36) therefore lower jitter, no external bitstream flash needed, 5V tolerant I/O, 44pin small flatpack easy to solder, power consumption - it depends on the clock speed, when not run at 150MHz low (as well as it is a 3.3V device), development in verilog, VHDL or schematic capture (with beefy 74xxx symbols libraries), all via the free ISE14.7, cost $1 each some 8y back..

author: Kleinstein
author_rank: Super Contributor
timestamp: August 21, 2025, 09:32:27 am
content: it looks like the XC9536XL is already obsolete and hardly available anymore.So a nice part 8 years back, but not longer today.

author: iMo
author_rank: Super Contributor
timestamp: August 21, 2025, 09:40:59 am
content: Yep, but you may still get it, provided you are not sourcing 10000 parts (so still good for initial experiments).Yes, it is obsolete (and I still wonder why Xilinx discontinued this series)..CPLDs:Then perhaps XC2C64A, XC2C128 (not sure all I/Os are 5V tolerant), MAX7000S (like EPM7032S, EPM7064S), MAX II (like EPM240, EPM570) from Altera - but you have to check the 5V tolerances, or the ispMACH4064, ispMACH4128 from Lattice (again needs to be evaluated).FPGAs:The smallest FPGA I worked with is the ice40LP384, low power, smallish package, 384LUTs/FFs, needs an external bitstream flash when you want reprogram it (otherwise OTP), but I think it is rather slowish and not sure 5V tolerant.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 21, 2025, 10:03:40 am
content: The ATF150 series is rather high power (like some 60 mA at 5 V), which is not good.At a first quick glance the ISPMACH4000 family could be an option. This would be 3.3 V powered with 5 V tolerant inputs.

author: Kofen
author_rank: Regular Contributor
timestamp: August 21, 2025, 02:25:21 pm
content: Great initiative!Regarding stack up, first viable stack-up is 6 layers, you need your gnd planes intact, no split planes so you have S G P/S P/S G S, there is no point in attempting this on 2 layer and there is zero benefit of alu pcb.When it comes to outline, I agree with Kleinstein, it will be impossible, but it does not matter, there is quite a bit of space so I would not worry about this.When it comes to the resistors it is very important to remember it is the ratio stability that matters, this will be hard if not impossible to do with single resistors unless you have very deep pockets, but even simple TDP/NOMCA will most likely function well as they are on the same die, and they are cheap!For FPGA, don’t limit the choices to extern output, level shifters are for that job. So 3.3v logic FPGA is fine, personally I would look at one of the tiny MAX10, but that is just because I am biased and use them myself.But as I wrote in the 3458a thread, I think we should break it down, first try to make a 8.5 digit ADC with necessary speed for DC(10 nplc should be a goal at least), then translate to U180.Resolution, INL and noise is the real challenge here, and if one can’t reach that at 10 nplc, I consider it waste of time and better to sell meter and get a nice 7.5 digit meter.But flip the negativity, if we do succeed, the platform for a new meter is very much in place and rest is “easy” in comparison so it would really be a great milestone for DIY 8.5 digit. There are ways to do that now as well, with off the self ADCs and oversampling, but it is not easy and requires great care/temp control. But there has already been a lot of work done on DIY MS ADC(Look at kleinstein), if we move this over, improve ratio stability and switch driving(moving from jitter prone MCU to FPGA), we can get quite good results on off the shelf parts. If it can exceed the U180? Probably not, it has the benefit of resistor network and switches in same packages, but if we trade speed to resolution, I think we can.

author: exe
author_rank: Unknown
timestamp: August 21, 2025, 03:03:48 pm
content: > simple TDP/NOMCA will most likely function well as they are on the same die, and they are cheap!Idk, datasheet for NOMCA says "Low TCR tracking ± 5 ppm":https://www.vishay.com/docs/60117/nomca.pdf. Also stability is meh, imo: "Stability: Ratio ΔR ± 0.015 % (1000 h at +125 °C)". I think the original U180 can do much better than this, or a special DMM-grade resistor arrays from fluke.

author: Kofen
author_rank: Regular Contributor
timestamp: August 21, 2025, 03:10:38 pm
content: True, they can and probably will, but in practice, the NOMCA networks tracks a lot better than datasheet numbers. Proof will be in testing, best test is to run them in a thermal chamber and check the ratio stability, several times. One can always order a custom bmf network from Vishay, but we are talking 10k USD figures to start so better start with something cheaper that I suspect will do the job just fine.As stated, I don't belivie you can replace the U180 with discrete parts easily, but flip it, can you make a relative fast 8.5 digit ADC(10 nplc)? Yes, I think we can.

author: coromonadalix
author_rank: Super Contributor
timestamp: August 21, 2025, 03:50:33 pm
content: i have some 9572xp and some 9536 loll somewhere atf 1504 and 1508 where good replacements for the 9572xl, i/o compatiblesas for the new black 3458, we never saw any teardown on how the logic evolved or got simplified with more recent technologies, fpga's cpld or else ..

author: Kleinstein
author_rank: Super Contributor
timestamp: August 21, 2025, 04:02:12 pm
content: The specs for the resistor arrays are for the whole range of resistor values. This includes relatively low values that have some contribution from the bond wires and high values that are a bit sensitive to leakage. The values in question here are 50 K or 100 K which are more easier values, though more on the high side.I am using ORN / NOMCT type arrays in my ADCs and the overall gain TC that I get for the 3 units is in the 0.1 to 0.5 ppm/K range, though with one unit going up with temperature and more like 1 ppm/K at 30 C. The gain factor include 1 resistor compared to 2 and 4 resistors used as a gain of 4 and also a few other parts with a little effect.So I would say the resistor networks have a good chance to work, despite of the loose specs. At that performance level it is hard and expensive to find guranteed specs that tight.Depending on the use of the array one would average over multiple resistors (like 4 for the references and 8 for the input) and this tends to improve matching. The version I have in mind (with +-15 V ref.) would use 12 resistors from 2 x NOMCT or 4 x ORN / LT5400 with 100 K each for the precision part. Using more resistors for the input path spreads out the heat to get good linearity from the resistor. U180 already uses 4 x 50 K for the input.For the arrays defintely avoid TaN parts, even though HP in the Journal article says that they use TaN in the U180. The TaN parts like NOMCA showed quite some excess noise, about doubling the ADC noise (at 1 PLC, AFAIR worse at 4 PLC) in my case and I would expect a similar effect for the 3458.One could also use LT5400 arrays (e.g. 100 K), though these may have an issue with the insulation between the resistors. They are iternaly interleaved in sections to get the very good matching performance.There are some photos around from the black eddition: the logic is similar to the gate array replacement PCBs with a large FPGA and level shifters and what looks like still a separate 8051 type µC. Just the comparators are replaces with voltage clamping and Ti parts with a +-5 V supply.

author: Kofen
author_rank: Regular Contributor
timestamp: August 21, 2025, 04:10:08 pm
content: Generally agree on all of this.I do realise I made a mistake with naming wrong part, I meant TOMC, not NOMCA, Ref:https://www.mdpi.com/1424-8220/23/3/1107And it is a very valid point, and also supported by testing, I think as well the spec is for the entire range, but for the higher value resistor, the resistor die and construction mastter, and by effect it match closer.

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 04:54:35 pm
content: Catching up:A stand-alone ADC project and this U180 replacement project share many synergies, especially since the ADC discussions appear to be closely following in the 3468A's footsteps anyway. This is is great for both.Yes, a 6 layer board is fine too. Besides, with some of those resistors easily costing $20 or more each, the blank board cost will quickly seem unimportant.Concerning 3.3V FPGA's: That wouldn't just need a few level converters, but also 5V to 3.3V voltage regulation, right? In comparison, the 5V CPLD needs nothing extra, and it's main down-side is just the physically-larger package. But if a 3.3V FPGA is used, then the current-steering switches can probably also use 3.3V.On the other hand, it's entirely possible that the A3's FPGA, if that's what U180's digital outputs go to, would be OK receiving 3.3V logic levels, since most 5V chips are designed to be tolerant of TTL levels anyway (high logic threshold is usually about 2.7V). I wish I could confirm that, though. Does anyone know what FPGA the A3's one is?After measuring the space available as noted above, I think it's practical to include some through-hole parts, including smaller ones such as Vishay Z-Foil resistors or taller ones if you are willing to bend the leads.Even if a larger board area is available, e.g. after adding height, it remains important to keep stray capacitance as low as possible, and that still means tightly packing the critical parts and paths in and around the socket anyway. The FPGA and any power regulation, etc., could easily be off in a corner, though.I am not aware of machined pins that would cleanly add height. The pins I've previously used for board-into-socket mounting only provide normal IC pin height.I agree that the 80k resistors and a few others are sufficiently problematic that more extreme solutions might be necessary. I still wonder if a semi-custom monolithic array is possible at not too high a cost?

author: Kofen
author_rank: Regular Contributor
timestamp: August 21, 2025, 05:41:11 pm
content: Addressing each point:Yes, a U180 and standalone share so much similarity that the goal should first make that. Even if you choose the U180 footprint and add the analog part on an EVB.3.3v fgpa will need a power, but so would almost all since modern parts that are not NRND require lower core voltage, that is the least of the concerns here (but will be once this moves forward due to noise).If you can run the switches at the lower 3.3v, that is in fact an advantage due to less charge injection, depending on chosen switch.I would not bet on the FPGA on A3 to trigger reliable on 3.3v, most of the times logic is set to high when VDD*0.7 is met = 3.5v, way too close to comfort.Problem on the FPGA/CPLD on the A3 is that there are several revisions so you can’t really rely on that.I am not too concerned about stray capacitance if you do the layout right and get the timing right, using at least 6 l board means you get proper signal lines / transmissions lines if you need the rise time to avoid problems, but it is extremely important to series terminate those to avoid problems.High socket extenders exist, I’ll try to link when I find it, but nothing wrong with a pcb and tinned copper pins.Creating a simple two resistor network is expensive, and MOQ of 25, a larger one, a LOT more expensive (still MOQ of 25), so you are looking at 5-10k USD regardless.But again, don’t dismiss TOMC, they can be parallelled and series for required resistance and are good in the range.I really don’t see a good way to make this, unless one first commits to make a standalone ADC with the required spec, but then again, that really helps further development of DIY high resolution accusation.

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 06:59:06 pm
content: Ok, I'll agree that it's too risky to depend on 3.3V outputs working with 5V inputs, and apparently semi-custom solutions are a non-starter too.This has been endlessly debated elsewhere, but what do the experts here say: does putting 4 resistors in series improve anything? My gut says that each doubling, whether in parallel or series, should reduce tolerance (as in standard deviation) by root-2. I'm not sure what the situation is for matching TC's, though - that may be more complex.Another question I have is how absolute TC relates to tracking TC's. Perhaps there's none at all despite being thermally coupled, but there should be some. For example, you have two "identical" resistors, e.g. Vishay P2TC, with absolute TC's of 2ppm, compared with TOMC's absolute of 25ppm. That's a huge difference! Can anything be said about the expected tracking between two P2TC's 2ppm absolute parts (with decent thermal coupling)?Kofen, you prefer to do a whole ADC first? That's great, but I haven't seen a public effort along those lines. Is there one? If not, do start one! I'd find that an exciting project too! However, there is a big difference between them: A U180 replacement is highly defined and tightly constrained, exactly because it must fit into a particular socket and must directly replace relatively well-understood circuitry. A from-scratch 8.5 digit ADC is relatively unconstrained and undefined, with many potential directions being possible, and of course it's more involved over-all. A U180 replacement may not fully succeed (and neither may an 8.5 digit ADC), but the path to a prototype isfarmore clear. Anyway, there is so much overlap between the two, and room for both.Edit: Thinking about parasitic capacitance, when steering current, modest stray capacitance may not be too harmful. That does beg the question of why HP made a fancy hybrid instead of just having a separate resistor array. I had assumed a goal was to achieve those short bond-wires instead of board traces. But perhaps thermal coupling between resistors and switches was the main reason.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 21, 2025, 07:50:17 pm
content: A standalone ADC could use simpler switching than the 3458. My ADC version is already a good step toward 8 digit performance with only 3 switches from a single SN74LV4053. I don't think the switches are an issue.It is still not perfect: the noise is good (slightly better than the 3458), but the INL is not yet that good, though already hard to test.I am anyway considering a new PCB for a version with a different front end.For better performance it could make sense to include the gate voltage modulation like with the 3458 (and thus a 2nd switch chip) and combine a few resistor arrays for the input. So maybe I could test how multiple off the shelf arrays (e.g. ORN or NOMCT) perform.Because of the easier layout, my favorite was however more 2 or 3 x 20 K in series and not 2 x 100 K in parallel.Testing the resistor array is still subject to the performance scattering beween samples - so more anecdotal results only.A test-platform close to the 3458 ADC would be a bit more complex (more switches and the finer slopes). The control part would likely need some FPGA, even without the fast mode part, that could be skiped for the start. Chances are one could simplify the integrator to 2 OP-amps (an OPA140 for the precision can replace 2 ) and get away with a lower voltage comparator like with the new black edition. The Z-glitch part could be skiped or be realized different - it does not need a fast comparator, just the latch function. Looking at the performance near true zero would more help for checking the ADC, as this is the worst case area for the DA related error and some other issues. The 3458 avoids this area by adding some +-200 mV depending on the sign just before the start.A parallel / series combination can help a little with value matching. However exact value matching should not be an issue. A similar point applies to TC matching - essentially in the same way. With a gradient across the chip, there can be even more improvement with resistors in the same chip interleaved. This is how the LT5400 gets the superb matching. Another point for combining multiple resistors is to spread out the heat and this way reduce thermal INL. This can be an issue for the the 50 K resistor for the input. HP claims they want a very good absolute TC, but with good thermal coupling aready good matching would be enough.

author: Zondar
author_rank: Regular Contributor
timestamp: August 21, 2025, 08:14:27 pm
content: Vishay has a number of arrays that have tracking TC's to 1 or 2ppm/C, but normally only in a few values that would be of use to us such as 10k, 100k, and sometimes 20k and/or 50k, sometimes just in pairs, and so on. But at least a few of the most critical resistors, such 50k and the 80k's, can be built from them.However, the best ones (i.e., better than 5ppm TC tracking) seem to be non-stocked or not even listed at the usual places like Mouser. I'll have to broaden my search. I wonder how responsive Vishay would be directly?Edit: Vishay VTF158UF is in stock at Mouser. It consists of an array of 4 independent 10k resistors with +/-2ppm TC tracking, 10ppm absolute, 0.1% tolerance and 0.02% ratio tolerance. That's not too bad, and the 10, 20 and 80k resistors could be built out of these.Vishay's VTF214UF is a 2-resistor 50k version (three pin, so one pin is common), also in-stock, and also 2ppm tracking (but is that needed here?). Two of these could be used for U180's 50k resistor network, but there may still be better options.

author: iMo
author_rank: Super Contributor
timestamp: August 22, 2025, 04:33:26 am
content: As I can remember MAXIM (now ADI) offers custom values of their 1ppm/C resistor dividers MAX5490. Not sure it is of some use here as those are only 2 resistors in the package, however.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 22, 2025, 07:28:39 am
content: The maxim resistor pairs have a linited use. If a suitable ration is available it may be OK for the 7 to 12 (or alternative 7 to 15 V) and the 12 to 5 V step.The maxim parts I remember are relatively high resistance however. There are anyway plenty of choices for 2 resistor pairs.One has to take the specs with a grain of salt. They are often for a range of resistor values and the TC may be the box method value for a rather large temperature range, while the actual use would care about the slope for a smaller range, like 30 - 50 C. Another point is that specs may be choosen to confirm to mil standards. So the specs in the DS and the actual typical performace can be quite different - especially significantly better than in the specs.If size is an issue one could consider the relativel small form factor arrays like LT5400, MORN or OSOP.

author: Mickle T.
author_rank: Frequent Contributor
timestamp: August 22, 2025, 09:19:42 am
content: As far as I remember, ~10 years ago the community of the bbs.38hot.net forum was engaged in reversing and reproducing the HP 3458A ADC. After the forum crashed, this topic can no longer be found, but I still have a photo of the prototype (posted by a participant with the nickname "forester").

author: iMo
author_rank: Super Contributor
timestamp: August 22, 2025, 10:06:16 am
content: Re 38hot - you may still see and readthe Multimeter sectionthere (pretty interesting stuff there, indeed)..With forester's thoughts on 34410 and 3458 ADC nuances -https://bbs.38hot.net/thread-137008-1-1.htmlfor example..

author: wanghar
author_rank: Contributor
timestamp: August 22, 2025, 10:41:10 am
content: Speaking of making a standalone ADC module, I upgraded Kleinstein's μC (AVR Atmega48) version to a CPLD-based controller MS-ADC. Due to limited conditions, some key performance tests haven’t been completed yet. During the testing process, I also made some design improvements.The current hardware uses a 12-bit MCP3201 for residual voltage detection and a TI TLV3501 as the comparator. These two components were chosen mainly to balance 3.3V level matching and performance. Compared to the μC version, programming flexibility has been greatly improved.This was my first time programming in Verilog. The runup, rundown, and MCP3201 read/write processes went relatively smoothly, but calibration and communication took quite a long time. Based on the current test results, the overall performance is likely slightly better than the μC version.INL testing hasn’t been going smoothly either—unstable ambient temperature and interference from surrounding signals often cause slight jitter in the measurements. It’s almost certain that the INL is below 0.2 ppm, but I’m not entirely sure whether it can consistently stay below 0.1 ppm. However, there’s a good chance it can stabilize within that range. Sometimes I get very stable measurements, but other times there are slight deviations that push it beyond 0.1 ppm.Testing and debugging are still ongoing. Attached are photos of the PCB. I still need some time to tidy up the schematic.Schematics added：

author: KT88
author_rank: Frequent Contributor
timestamp: August 22, 2025, 04:36:39 pm
content: BTW. the ADG786 requires >2.4V for Vinh and <0.8V for Vinl - an FPGA with 3.3V I/O shouldn't pose a problem...

author: Zondar
author_rank: Regular Contributor
timestamp: August 22, 2025, 08:01:45 pm
content: Those are some nice looking boards!Yes, those switches, and several others like the previous TI ones, are convenient because the analog signal range is substantially independent of the digital logic levels.I've been going in circles looking at resistor arrays:*Vishay's PRA series looks quite good: TOL 0.1% Abs, 0.01% Ratio, TCR 10ppm/C Abs, 2ppm/C Track, PCR not quoted. About $9 for 2x 10k resistors in 10+ quantity (~$4.50 per resistor). They are space-efficient, but except for 10k 2R, they seem very difficult to find in stock. Without more values and configurations available, these seem to be a poor choice (it would take 4 packages per 80k resistor, etc.).* Vishay's VTF series (e.g. VTF158) have the same performance numbers, but are in larger SIP packages. They are available in 4x10k and 2x50k. Cost is $6-10 in 10+ quantity (~$2-3 per resistor). It would take 2 packages per 80k resistor, etc., which is not great.* The NOMC arrays aren't as good as the above options (5ppm/C tracking) but contain 8 resistors and are easily available, including the important 10, 20 and 50k values. They are also relatively inexpensive (~$4 in 10+ quantity, $0.50 per resistor) and of reasonable size. One package would deliver 2x 80k resistors, which is a significant improvement.* The TOMC arrays are almost identical to NOMC, but are in a slightly wider package.There are others, but am I missing another obvious option that is actually available?Sooner rather than later, decisions, including some compromises, have to be made. One is how much to invest in the cost and potential awkwardness of superior resistor choices in a first prototype. In principle, we should hold out for something better, but the NOMC arrays are available in 10, 20 and 50k with 8 resistors per package, they are relatively inexpensive, and are of reasonable size. We would also be putting some of them in series (e.g. 80k=4x20k), which may help. So perhaps these are a reasonable choice for TC tracking resistors for a first prototype? If that's not sufficient for everything, perhaps the PRA or VTF's will do in a place or two. (If things look good, a second prototype could go wild with uber-resistors.)Thoughts?I re-read Kleinstein's early post about which resistors are important in which ways, but admit I'm confused about exactly which ones were being discussed at times. I need to make up a table of which R will be which type before I can attack the board layout, and for future discussions I ask for more explicitly ID'ed resistors, i.e. using the resistor labels in my schematic. Lacking that, I'll try to compile a table of tentative part assignments so that others can review it and comment.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 23, 2025, 08:45:37 am
content: For the resistors the 50 K to the input is the most critical resistor. It needs good linearity / power coefficient and good TCR matching to the "80 K" resistors.If resistor arrays are used one would want to use multiple resistors combined, similar to the 4 in the U180 with the external links. This would likely be split over multiple arrays.The 80 K resistors should be resonable matched between the positive side and negative side. Matching between the 2 groups for the same polarity is not as important.The fast ADC mode (20 K ref. resistors) is largely separate and less critical. The need for value matching to the 80 K would only be on the 0.5% level.Overall the value matching and this tolerances should be not cricital. Some 0.1 % matching between the positive and negative reference paths may help, but one could likely get away with more difference.So when using 20 K resistors from arrays as a building block on would need 4 x 4 for the 80 K resisors and some mix (like 2 x 5 in series). 4 resistors as 20+20+10 would be a bit on the low side of resitors used. The mix across the array would also matter: so the arrays used to make up the 50 K should also be used somewhat evenly for the 80 K. This can make the layout quite messy. With 4 x 8 resistors one would use have the resistors in each array for the 80 K, spready over all 4 or at least 2 of opposite polarity. The resistors for the "50 k" should be evenly spread aross the 4 arrays.I would still consider the bit unconventional version with a +-15 V reference. This way one would have 100 K instead of the tricky 80 K and get a matching switch resistance to series resistor ratio, which allows to use higher resistance switches (up to some 100 ohms should work).As extra modifications it would only need 2 resitors to be adjusted on the A3 board (R154 for the ladder offset and R176 for the modulated supply, that may want a change anyway). As a side effect the version with +-15 V ref. could get slighty (like 5-10%) lower noise than the original U180.One could use something like 2 x NOMC 100 K as 4 x for the reference paths and 8 x to get the 50 K input resistance.Switches could be SN74LV405 with 2 chips for the references and 2 less critical use cases (e.g. ladder part and reset). The input path would use a seprate switch because of the extra supply and 2 switches in parallel for the input. The 3rd switch is available for something less critical like the 10 K to ground.The fast part is less accurate anyway and would need lower resistance switches, like the 2 x ADG733 or similar. With the input 10 K resistor anyway external it is only matching between now 4 x 25 K resistors (e.g. 1 x NOMC 50 K). Chances are 2 switches in paralel for the input would also be good.There is a somewhat tricky point with the supply: many switches and CMOS logic chips can take extra supply current when driven with a logic signal that is well less than the supply. This would not be ideal. With a 3.3 V CPLD one may want to reduce the supply for the switch chips and AC175 flip-flops to maybe some 4 V to avoid the extra supply current that can cause ground bounce effects. If really needed the switches could still see a slight negative supply (like -0.5 V). The supplies would be a point to tweak with.The extra AC175 would especially make sense for the 4 switches for the "80 K" ref. signals. The rest could get away with a FF in the CPLD.For the resistor arrays there is the OSOP series: similar resistors to the NOMC series, but usually 10 resistors in a smaller case. Availability is a bit more limited, but a few values are there.With 4 resistors in a case there are ORN, MORN and LT5400.I would avoid the AORN and TaN version NOMCA - they are noisy.So far my experiance with NOMC and ORN resistor arrays (5 K / 10 K / 50 K) point to a TC matching that is well better than the 5 ppm/K typical specs - more like < 0.5 ppm/K. More resistors combined would give an extra improvement. The bit unknown is the power/ voltage coefficient - with 2 arrays combined this may be OK.

author: iMo
author_rank: Super Contributor
timestamp: August 23, 2025, 09:32:30 am
content: @Kleinstein: and what about those ferrite beads around the 4053 grounds (ie the past exercises)?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 23, 2025, 10:55:34 am
content: The ferrite beads are likely there to keep the very high frequencies (e.g. > 100 MHz) from the switching spikes away from the integrator and reduce interaction between the switches. The ferrites are on the A3 PCB and thus not really a thing for the U180 replacement. With the rather fast amplifier in the integrator of the 3458 the ferrites could also decouple the switch capacitance a little from the integrator. However the integrator has capacitance to ground anyway - so likely not an issue with capacitance to ground.Similar ferrites are also found in the 34401 and Keithley 2002 DMMs.I have tested my ADC version with and without ferrite beads and saw essentially no difference (at least not enough to tell if they make things better or worse).The 34401 has an extra ferrite in the supply - I tested it in my similar build ADC and again no significant effect visible in either direction.

author: Zondar
author_rank: Regular Contributor
timestamp: August 23, 2025, 02:35:21 pm
content: Thanks Kleinstein for the extra explanations.I do see the point about 15V. However, I'd like to stick with +/-12 for the sake of compatibility and to avoid potentially-confounding differences, at least for now.I haven't been able to settle my mind on a stupidly-basic issue: What effect does parallel and series resistors have on errors? For example, if you put 10x 1% resistors in series, the net tolerance is expected to still be 1% of the 10x larger value, right? The same applies to parallel resistors. Yet, the "average" error should decrease (standard deviation becomes narrower)? What does this mean in this circuit, which is not "average" (the "average" inaccuracy would be zero, after all), but consists of randomly distributed yet particular net values - is there an actual advantage to parallel or series resistors in this circuit?The other question that I wonder about is whethergeneral-purposearrays (vs. specialized precision ratios) provide a real advantage over better-specified individual resistors. So NOMC is 25ppm absolute, 5ppm tracking, vs. 2ppm absolute for many SMD resistors, never-mind the 0.05ppm of the fancy foil ones. Are we actually losing by trusting that resistors that are merely in the same plastic package will be better than better-spec'd alternatives?If I did not believe that arrays such as NOMC will necessarily do better, then I note that Digikey has 10, 20, 50 and 80k 0.01%, 2ppm Vishay P2TC resistors in stock.Edit: I see that Vishay MORN series can be found in-stock in 10 and 50k (also 100k), but 20k is not currently in stock anywhere. These are 4x resistors with 0.05% Abs, 0.01% ratio, 25ppm absolute, 1 ppm tracking TCR, which appears to be better than NOMC.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 23, 2025, 04:07:17 pm
content: With a combination of resistors (does not matter if series or parallel) one can get some improvements in the tolerances and a bit more with matching, if done right. There is still the issue that the errors are parially correlated.The "averaging" helps with the random error part, but not the correlated part. In many of the examples it is more about getting suitable values / ratios from arrays. The absolute accuracy is not that important anyway. I don't see an issue there and 0.5% would be good enough in essentially all cases.The selection of resistors is to a large partabout the TC matching (for good gain TC) and with single resistors also low overall TC for the 50 K for good linearity. In an array good matching can help too.Another point is the 50 K input resistor. Here it is about getting less nonlinearity. Multiple resistors can help, especially if spreading the heat over multiple packages. Arrays still have the tight thermal coupling and less relevance of the absolute TC.The other resistors don't care about a power effect, as the ref. currents are essentially constant and the ladder part is low power and not that relevant for the final result.Part of the point for the arrays is that the specs are very conservative and one has a very good chance to get way better matching than the 5 pmm/K from the datasheet.On the other side also single resistors from the same batch have good chance to show quite some matching. This would be especially the 2nd order TC part that is anyway not that relevant, as we only care about a more limited temerature range (like 30-50 C). So also with single resistor chances are to get better matching than the simple specs suggest. I initially also tried some single resistors in my ADC. In many cases the matching was still pretty good between parts from 1 series, even with 25 ppm/K parts. Some single resistors are also noisy - I had issues with some ACROL THT parts that where about as bad as the TaN NOMCA.For a first test, single resistors could be an options.Especially the fast part with the 20 K to reference paths could get away with simpler (higher TC) resistors. It is not super stable anyway.For the 80 K and 50 K one could try 80 K SMD resistors and than use 8 equal resistors as 3P+3P with 2S in parallel for approximately 49.5 K.80 K are also not that common as TF SMD parts. Spreading the power over even more resistors could be an option using mass instead of low TC to improve the linearity.The software side would not see a difference with the +-15 V way. It is only a different way to get the +-150 µA ref. currents.

author: Zondar
author_rank: Regular Contributor
timestamp: August 23, 2025, 04:26:13 pm
content: Ok, I'll think a little more about 15V.If we want the 80k's and the 50k to track, then another problem with arrays is thatbetweenpackages we default back to the absolute TCR, which is 10 times worse than that of available individual resistors. It turns out to be difficult (impossible?) to arrange the 80k's plus the 50k while staying within the tracking TCR if only 4 resistors per package are available (e.g. MORN). I'm not sure what the minimum is, but it's probably a lot more than what's available.Maybe, as you suggest, the first prototype can get by with the 2ppm resistors. Proving functionality would already be progress, as would getting a feeling for performance.

author: bdunham7
author_rank: Super Contributor
timestamp: August 23, 2025, 05:23:11 pm
content: Quote from: Zondar on August 23, 2025, 02:35:21 pmThis is actually an occasionally discussed issue on EEVBlog. The shortest and simplest answer (and therefore wrong to a degree, I suppose) is that if the resistor values were a standard distribution then putting them in series would give you a new distribution related to the invidual ones by RMS. IOW, if you made a bunch of resistors using two resistors in series that came from a group that had a standard deviation of 2%, you'd expect the group of composite resistors to have a standard deviation of 1.414%. However appealing this may seem, it is almost always negated by the fact that batches of resistors dont typically have a standard distribution so there is no nice standard deviation correlated with the stated tolerance. As to whether there is an advantage, I think the anwer is a maybe-to-yes. Ultra-high precision resistance standards commonly do use parallel or parallel-series combinations. One issue with series combinations at low values is that the temperature coefficient of the interconnecting circuitry becomes an issue.I would wait until you get a prototype of some sort that actually functions, but if you get to that point and want to improve resistor performance you might contact Texas Components and see what they can make.https://www.texascomponents.com/store/VishayFoilResistors.aspb/t/w, have you seen or does anyone have a photo of the resistor array with the goop removed from it?

author: Kofen
author_rank: Regular Contributor
timestamp: August 23, 2025, 05:39:49 pm
content: Frist I echo Kleinstein on the resistor arrays, use NOMC or similar, note eariler info written that the ratio will be better than datasheet on higher values due to it being more limited influence of bondwires and legs. Expect around at least 0.5ppm ratio stability over time.Not a photo, but rather nice drawing of the resistor array, hosted on xDevs, cortesy of ExtraSolar:https://xdevs.com/doc/HP_Agilent_Keysight/3458X/u180/IMG-20240220-WA0002.jpgHere it is very clear where they took extra care for ratio stability and not, but that just echoes Kleinstein I think.Also well worth to look at the entire articlehttps://xdevs.com/guide/life_with_3458/Zondar:I probably was not clear enough previously, I dont want to make an ADC with 8.5 digit resolution, but I suggest you take your replacement design in steps.First make a prototype/EVB so you can test it with most components on one side with test points. This also facilliate that you can drive it your self so you dont get trapped in 3458a FW throwing error due to timing constraints and others. Then it is VERY easy to connect that function prototype to the 3458a to sort of FW bugs.There is not many analog compoents from the A3 you need to replicate. And also, alot more easy to tack in hw fixes in a larger pcb than a super compact u180 footprint.The resistor array is bonded in the same package in U180, most likely due to convenice, if the trace is 1cm or 4cm should not matter at these speeds.So my intentions where never free for all 8.5 digit adc without constraint, but rather a platform constrained to the U180 / A3 adc design to facillitate development.

author: Zondar
author_rank: Regular Contributor
timestamp: August 23, 2025, 06:02:40 pm
content: Quote from: Kofen on August 23, 2025, 05:39:49 pmThank you. But what about my concern that you can't rely on TCR matching between packages, only within them? Between packages the TCR of NOMC, for example, is far worse than other options (25ppm), and it's seemingly impossible to get the 80k's and the 50k to all track due to the small number of resistors per package.Also, yes, a fear is that I wouldn't be able to test it within the 3458A because it may throw codes and refuse to digitize. Hard to predict. I haven't looked at what else would be needed to do useful tests outside the 3458A, but it feels a bit daunting. Maybe you can outline what that might look like?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 23, 2025, 07:27:51 pm
content: The TCR matching between packages would not be good. If more resistors are needed, one can still mix the resistors, between packages. As an example A series combination of resistors from 2 packages still tracks a parallel combination from the same packages. Mixing across arrays still complicates the layout and limits to choices.For the ADC the average of the 4 reference paths is the main relevant part, not so much the 4 resistors individually. The matching between the positive and negative sign effects the offset drift for the ADC. Here the AZ mode does correct that effect.It is still inconvenient to have the matching between the 80 K and 50 K.The idea with the +-15 V ref. variant is to make it easier to get matching for the precision part. It helps with both the switches and resistors.I see no real compatibility isssues. Changing 2 not so special resistor values on the A3 PCB is not that much extra effort. One anyway has to do quite some soldering to remove U180 and add a socket. With a reduced switch supply one may have to change one of the resistors anyway, also with a +-12 V ref. as the original.A simple voltmeter / ADC to test the U180 replacement separately could indeed be a nice idea. This way one could test it without having a 3458 and allow for a few additional test cases (e.g. check the ratios or use different frequency to check for jitter plus capacitance contribution to the noise). I don't expect much issues with delays in the original A3 board, as the timing would be from the FF and a relatively fast (some 5 - 20 ns) switch chip. Speed wise one would more have issues with the DIY ADC in the rundown, as one would likely use different OP-amps and comperators - quite some original parts are obsolete. Initially one may skip the fast ADC mode (less FPGA code and partially populated U180 replacement). More delay at the comparator would make the ADC slower (more time for the run-down) and need a bit more counter length, but should still work. For much of the tests one should get away without a super fine tune of the integrator and comparator for speed. The integrator still effects how critical the charge injection spikes are. A JFET part instead of the LT1001 may be more tolerant.Not sure how much FPGA would be needed - I have no experiance in this area.Overall it may not be that super complicated of large a project. The U180 interface is kind of fixed - so while 2 new PCBs, the 2 parts would be largely independent.

author: Zondar
author_rank: Regular Contributor
timestamp: August 23, 2025, 08:50:17 pm
content: Quote from: Kleinstein on August 23, 2025, 07:27:51 pmMatching all four 80k's is easy enough. For example, 8x MORN 10k can make all four 80k's track by using one resistor in each MORN per 80k. It's getting them all to also simultaneously track the 50k that's the problem, and I don't see a clean way to do this.Does going to 100k solve this? Not with only 4 resistors per package. I think the minimum would be 6, and the 50k would need to be structured as a single 50k, not 4x as in U180 (otherwise many more is needed). So for this, I think NOMC would work, though it has worse tracking than MORN. The 20k's would not track the 50k in that case.Why do you say "with a reduced switch supply" a resistor might have to be changed? Honestly, I'm not sure I'm up for developing a whole ADC at this time, at least on my own.You are right that desoldering U180 would be a delicate task. I do have a desoldering gun, but even so, doing such violence to my A3 board is not an easy step to take.

author: julian1
author_rank: Frequent Contributor
timestamp: August 23, 2025, 09:08:34 pm
content: U180 looks to take a xtal clock (xck20 p33) which is likely used to synchronize (d flip-flop) the output.Have the interface (lines RUR, RUS, RUZ, ) been mapped, and is it understood what lines control what switches/output currents?

author: Zondar
author_rank: Regular Contributor
timestamp: August 23, 2025, 09:16:05 pm
content: Quote from: julian1 on August 23, 2025, 09:08:34 pmYes, the entire chip is fairly well traced out and understood. My schematic doesn't take care of every detail yet, but that's because of the still-open discussion about resistors and voltages, etc.Maybe I'll make two boards, one with 100k's via NOMC, and one with 80k's via SMD's. They should be quite small and inexpensive anyway.

author: bdunham7
author_rank: Super Contributor
timestamp: August 23, 2025, 09:42:54 pm
content: Quote from: Kofen on August 23, 2025, 05:39:49 pmThanks. What I'm wondering about is the process--they appear be laser trimmed, but are/were they trimmed and then hermetically sealed or did they use a clear glass cover and trim them after sealing? IIRC the latter process was introduced somewhere in the same timeframe as these meters were designed.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 23, 2025, 10:05:10 pm
content: The voltage to control the gates at the input switch (50 K) has it's own supply via the lm358 OP-amp on the A4 board. The supply is derived from the -12 V and gets rougthly half the voltage from the drop over an allways on dummy switch (u180 - pin 30) added.With a 3.3 V CPLD in the U180 replacement an easy way to avoid extra level shifters is to power the switch chips with some 4 V and not some 5 V - 1 diode drop as in the original U180. With the modern switch chips this should be enough voltage. This would need to change the voltage also for the input switch and thus an external resistor. Similar the resistor would need to change if the -12 V changes to -15 V.The 4 x 50 K inside U180 for the input path are only used as a combination. So no real need to have them separate. The parallel / series combination could be done similar or possibly different in the U180 replacement. For the case with 100 K reference paths one can get the 50 K for the input relatively easy:e.g. use 100 K arrays and than use 2 x 100 K in parallel to get 50 K and than use 4x50K like in the original U180. The 4 resistor still average OK.This would than be 8 x 100 K to make up the input path resistor.If wanted (e.g. LT5400 or MORN arrays there could be 4 separate arrays using only 1 resistor each for the ref. inputs. So the 100 K would not be matched, but this matching would be less critical and only effecting the offset, not the gain.I think 2 x NOMC or TOMC would be sufficient, at least for a first test. This would have pairs of 100 K from the same array with little effect from the residual mismatch.The main tricky part for the whole ADC part would be the FPGA. Overall it could be somewhat similar to the board that wanghar just showed herehttps://www.eevblog.com/forum/metrology/nu180-a-u180-drop-in-project-for-the-3468a-dvm/msg6019107/#msg6019107Replace the LV4053, FF and the 3 small 8 pin res. arrays and auxiliary ADC with the U180 replacement and obviously different code for the FPGA and more control lines.

author: Zondar
author_rank: Regular Contributor
timestamp: August 24, 2025, 02:53:33 pm
content: Is there a schematic for that board, or along those lines, that I could review?It is indeed a good idea to have some means of testing the board outside the 3458A. Aside from building an ADC with it and around it, I wonder what sort of simple tests are possible and what support circuitry would be needed to facilitate them?I'd like to keep the momentum high, which for me means producing something to test sooner rather than later, even if it involves compromises in the short term. So I'm thinking that a "functional" replacement might come first, making the fewest deviations from U180's approach. This means a 5V CPLD and 5V switches (even using the -0.6V Vss), +/-12V, and accept a few compromises such with the 80k resistors. It may not perform well enough, but a lot would be learned from it.While building and testing that, more time can be taken to produce a "performance" version. This would be an extended-area board (the MORN parts, etc., are relatively huge) modified to include any and all of the suggestions that people here have been discussing (voltage changes, tracking, etc.), along with any corrections or improvements found using the "functional" board.

author: Zondar
author_rank: Regular Contributor
timestamp: August 24, 2025, 06:04:19 pm
content: A minor update:U180's two digital outputs go to XSUA (Pin 39) and XSUB (Pin 41). These are unused by the A3 board, and hence can be ignored. This means that the CPLD/FPGA output logic levels are not important except for being tolerant of 5V inputs, and for properly controlling the switches.I'm updating the schematics now. About the only thing I have left to figure out is how MOD_SENSE1 (Pin 30), MOD_IN1 (PIN 28) and MOD_IN2 (Pin 29) are handled inside U180.I also played with the board layout a little more, and it's pretty clear that my earlier psuedo-layout was too optimistic in terms of space used. Even the simplest design will probably require being raised up above the socket.If anyone has a lead on 64/65 pin PGA sockets (with a minimal frame), please let me know. I cannot find any in stock for sale thus far.

author: bdunham7
author_rank: Super Contributor
timestamp: August 24, 2025, 06:23:44 pm
content: Quote from: Zondar on August 24, 2025, 06:04:19 pmDon't you actually need a 68-72 pin 11x11 socket like this? (I know, the frame isn't "minimal" but could be filed if you find nothing else)https://www.digikey.com/en/products/detail/mill-max-manufacturing-corp/510-91-068-11-061001/474727Edit: I found this on eBay...https://www.ebay.com/itm/134879558036?chn=ps&mkevt=1&mkcid=28&google_free_listing_action=view_item&srsltid=AfmBOoqJS70PV8Vz8YmRWREbHaIgsdubcF5oaQMvsP8jRg7ceY0W9jSsWFMHe has 6 total at $6.00 each.

author: Zondar
author_rank: Regular Contributor
timestamp: August 24, 2025, 06:26:04 pm
content: Quote from: bdunham7 on August 24, 2025, 06:23:44 pmYes! Thank you.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 24, 2025, 07:59:30 pm
content: Pin 30 (mod_sense1) should go to a dummy switch that is always on and ideally part of the same chip as the input switche(s) for the main input (via 50 K).Depending on the switches (e.g. 1 x for mod_sense and 2 x in parallel for the input) used one may want to adjust R171 on A3. The original resistors look they are made for the same switch resistance the the sense as for the ref. path.Pins 28 and 29 would be supply to the switch chip for the input switching. Likely one would add a little decoupling (e.g. 100 pF to 1nF) and a clamping zener to the U180 replacement board. Not sure if the LM358 would also need a series resitor to isolate the capacitance from the OP-amp to than use more capacitance. This would be one of the points that may need some experimenting for final performance.For the test platform one would likely want to copy most of the ADC parts of the A3 PCB around U180. One could simplify the integrator to a 2 OP-amp solution and use a different comparator. Even a LM311 may do and would result mainly in a slower run_down from more overshoot. One can skip the Zero glitch jump part (U181 on A3).It would make sense to also include a good input buffer (e.g. OPA145 with bootstrapped supply, alternatively maybe an OPA189 or similar) and CMOS MUX in front as a very basic voltmeter front end with AZ switching. For some INL tests 2 inputs would make sense and one mux input should go to the raw reference voltage.Also a reference (e.g. ADR1399 as a start) could be directly included.Of cause one would also need some supply and control logic (likely some FPGA / CPLD). One could likely get away with 3.3 V levels - so no (or just a few) level converters.For testing one part would be to make it an ADC much like in the 3458 and check for noise, gain drift (read the reference) and DNL and INL (can get tricky !). Much of the ADC funktion and especially the run_down part could also be used for other tests. One could likely limit the ADC to some 1 PLC and maybe another short integration (like 0.1 ms) case with some extra waiting in between conversions.One could also run a few special test cases instead of the normal run_up: e.g. extra fast or slower modulation, extra tests to check the slow slopes (set them as active inputs during run_up).

author: julian1
author_rank: Frequent Contributor
timestamp: August 24, 2025, 08:33:20 pm
content: Perhaps the community design ADC + calibrator developed in the forum thread on dmm front-ends deserves a mention in this context.This has -- a working fpga based multislope adc based on Kleinstein/3458a design (latching residual rundown comparator like 3458a).- familiar and easy spi interface to the multislope adc - like using a modern TI or AD SD part, with a spi writable register bank for control, and interrupts on sample conversion.- a builtin calibrator - and a fully automated approach to INL and noise tests (like a unit/integration test suite) to experiment/iterate on design/parameters fast.- reasonably modular and independent software and hardware sections so parts can be ignored as needed.For the adc part -- The VDD drive of the ref-current switch/synchronizer/ fpga vccio bank, is adjustable to test/control switch charge-injection.- there are configurable series/parallel combinations of resistor arrays for adc ref-currents (orn,morn,lt5400 have all been tried), and footprints for z-foil used to be maintained.Development is active, but got bogged down in CAD and power-supply stuff.But this is not very interesting, if the focus is on implementing a select portion of the 3458a hardware interface - enough to provide a viable path to u180 replacement?.Demonstrating a minimal working prototype that can pass 3458a self-tests is more important - while optimization around resistor etc. choices would be the second step.Perhaps the calibrator part could run in a standalone fashion as part of a test environment - I will try to post a cleaned-up schematic soon.For the fpga, having a dedicated header to plug directly into a logic analyzer/MSO scope is a valuable diagnostic tool, to see/ project/ trigger on any control detail.But for the U180 replacement there may not be enough board space.

author: Zondar
author_rank: Regular Contributor
timestamp: August 25, 2025, 12:00:48 am
content: Quote from: Kleinstein on August 24, 2025, 07:59:30 pmAlthough some areas are hard to read, here's what I think is going on in that section:* The "dummy switch," as you call it, has its gate connected to Vdd2 (so yes, always "on"). The S/D terminals are Mod_sense1 and Mod_Gnd.* There's a second transistor that is larger. The gate is also Vdd2, and the S/D terminals are Mod_sense2 and Mod_Gnd. However, Mod_sense2 is not used. It's a little disturbing that it's left floating, but I guess it's OK. I can't see a purpose for it, so if I leave it out that concern is moot.* Mod_in1 and Mod_in2 look like they act as Vdd for the final stages (large inverters) of the switch control section, regulating the gate voltages for the switches controlling RUSN2 and RUSN1. This may pose a bit of a complication.Can you please explain the purpose of the FET modulation section? Is this a low-frequency modulation, like nearly DC? What voltage would be typical for Mod_in, and what range might it include?Thank you.

author: wanghar
author_rank: Contributor
timestamp: August 25, 2025, 03:04:08 am
content: Agree with this point. First, create a most basic version of the prototype board that can pass the 3458A's self-test and ACAL. Based on this foundation, we can then experiment with improving the TC performance of the resistor array and the characteristics of the switches, as well as enhancing and optimizing the INL. This can proceed in several steps.@ZondarI've ordered a couple of these 68-pin sockets from Taobao. They should arrive the day after tomorrow. They seem to be the right size, but since the price is a bit too good to be true (RMB 6.0 each, less than 1 USD), I'll check the quality once they arrive to see if they're suitable for this test.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 25, 2025, 08:40:43 am
content: The idea behind the gate voltage modulation is that the On resistance of FET switches is slightly nonlinear. The effective gate voltage is reduced by about 1/2 the DS voltage drop. To compensate for this, 1/2 the DS voltage drop is added to the gate voltage. This is what the circuit around U170 is doing, with the dummy switch sensing an equivalent voltage drop and sending about the same current through it as the input current.The gate voltage is not changing much (like some 5-10 mV at most), but the modulation changes with the input voltage. So it is mainly DC with a little AC on top.There is no absolute need for matching the dummy switch to the actual input switch. If needed one could adjust a resitor around U170 to compensate for different resistance, especially 1 switch dummy and 2 in parallel for the input.With rather low resistance switches (e.g. < 5 ohm range and 2 in parallel to get approximate match to the ref. swiches at the 80 K) one could even skip this part as the expected INL error from the gate modulation would be well less than 0.1 ppm FS.It looks like the mod_sense2 part is for the fast mode. So ideally there would be a separate version of the circuit around U170 for the fast 10 K input path. The HP A3 seems to not use it. The fast part is less accurate anyway and the higher frequency content can cause issues.I would consider to give the 10 K channel (RUSN3) switches the full supply and not the voltage via U170. The RUSN2 part should anyway be non critical. Having the gate modulation for RUSN2 would not make much sense.The U180 replacement has quite some parts and it could be tricky to use a prototype board. One would likely still need a PCB for the first test.Especially the CPLD part would be tricky as they usually come in fine pitch cases.The question could be if the logic part could be done with an ATF22. It might be just enough or need a little extra (e.g. external FFs)To avoid the tricky 80 K resistors, one might consider scaling up the resistors by a factor of 1.25. So 100 K for the references and 60 K instead of 50 K for the input. The 60 K would want a mix of more resistors anyway and it is only 1 resistor. A single OSOP resistor array (12 x 100 K) could provide most of the 80 K + 50 K part. If need an extra resistor with reduced sensitivity could do the gain fine trim. 25 K for the fast part would still be easy. The ladder part could use just an extra 10 K in series at the switch and keep the ladder at 50 K impedance. It would result in slightly higher noise, but not very much (e.g. 5% range).

author: Zondar
author_rank: Regular Contributor
timestamp: August 25, 2025, 07:34:55 pm
content: Kleinstein: OK, so one choice is to wire up a similar dummy switch, but since you say it's non-critical, the other is to simply not modulate those two switches at all, i.e. just connect them like the others. That's easy!If I do the latter, then the entire external (A3) modulation circuitry has no purpose. It looks like Mod_sense1, Mod_in1 and 2 can all be left floating, or else the Mod_sense1 pin can be grounded within NU180. Either is also dead easy, naturally.There are still a few important questions left. One is whether to move to a 3.3V FPGA. People suggested a part or two, which I'll look at. I'm not sure there's a huge advantage to a change here except maybe for a smaller package. I did look at the ATF22, but it looks like it's short a needed output or two.People have also suggested using some discrete digital parts such as the latches. I'd really prefer to either do it all in discrete logic, or all in a CPLD/FPGA. My prior estimate of the number of discrete parts needed to do the entire decoding was too high, since 7 out of 18 sections are not used at all. I'll reassess this a little.Another thought that people have had is reducing the switch voltage range, e.g. for lower charge injection. This frequently does drop as you lower the gate voltage swing. However, that's mostly true if the switching is very fast. If the gate swing is slower, the charge injection is mostly limited to only the swing from the threshold voltage to ground, which doesn't really change based on supply voltage. The reason is that injected charge has time to migrate and clear itself prior to hitting the threshold voltage.For the selected switches, on-resistance and resistance flatness are both improved with higher voltages, e.g. 5V is better than 3V, while the charge injection is quoted as being the same (3 pC), consistent with the above. In conclusion, I think we should stick with 5V for the better on-resistance and flatness.Then, one of the remaining questions is whether to use Vdd2 and GND2 as the switch's analog range, as in U180. These are level shifted downward to -0.6V (measured) and I think about +4.4V (haven't measured this yet). I'm leaning towards using GND2 for the sake of compatibility (whether that matters or not), but haven't quite decided on VDD2 or plain 5V. Either of the latter should be fine.(I absolutely will be making a PCB for this, of course. Also, 100:60 is not the same ratio as 80:50.)

author: Kleinstein
author_rank: Super Contributor
timestamp: August 25, 2025, 08:19:22 pm
content: If one skips the gate voltage modulation, one would add some U² type INL. How much depends on the R_on of the swiches and how much R_on changes with the supply voltage. Depending on the switches the error could be acceptable. For my ADC I use the same 50 K at the input and with SN74LV4053 switches with a 5 V supply I get some 4 µV INL or 0.4 ppm FS error at 10 V. With 2 such switches in parallel (would make sense to get a bit better ratio matching) the switch nonlinerity error is 1/4 of this.With lower R switches (e.g. max4619, ADG733) one could likely get away without gate modulation.One could get approximately the right gate modulation, by having a simple resistor instead of the dummy switch. This would be approximate and without correcting the the slight temperature dependence. Mod sense should not be left floating, more like tied to ground, maybe via a resistor.With the modulated supply, the other 1 or 2 switches from a 3 / 4 fold switch chip could still be used, e.g. for the dummy in mod_sense, the reset or the 10 K to ground. These 3 switches should not be critical with the supply.Reducing the switch voltage is not so much about the charge injection. It is more a way to cope with a 3.3 V signal. Some switches can have nasty supply extra current (and related ground bounce) when use with a 3.3 V input signal and 5 V supply. CMOS logic tends to have extra input current when the input is near the middle. Attached is a curve to show and example from max4619 data-sheet.The charge injection given in most datasheets is the turn off part only. What is actually relevent here is more the charge spike at the COM terminal when switching over from NO to NC and back. This is somewhat related to the charge injection in the DS, but no exactly the same. The charge injection also depends on the DC voltage level. Here we would be at 0 V or if the negative -0.6 V are used than 0.6 V from the switch supply. For many switches the 0 to 0.6 V range is where the charge injection is small. The DS usually give the charge injection for 1 side of the switch - not always the same.Which supply to use depends on the switches and logic level. One may want some room for experimenting here. This may be point best to try out in real HW.

author: Zondar
author_rank: Regular Contributor
timestamp: August 25, 2025, 08:37:59 pm
content: Kleinstein: OK, so that chart shows "short circuit" power consumption as you sweep the digital control signal input voltage. It's not clear if that's per signal or for all 4 at once (probably all 4?). Either way, the peak is not a trivial amount of current.All I can say is that the spec sheet for the chosen switch (by the same company) does not show a similar chart, nor any data about the issue. I'll take that as being encouraging, and I still think the lower resistance and flatness improvement (it becomesquiteflat at 5V) is worth the risk. And, of course, decoupling caps are used to help mitigate these sorts of issues.On the other hand, the "3pC" charge injection seems to be quoted as an average, or at the voltage midpoint, or something, and a chart further down shows the real situation, which isn't as good, but it isn't radically different at 5V than at 3V.In the end, there is no ideal, andsomethingmust be chosen and implemented as well as one reasonably can. I haven't found a switch that is clearly better, and still think lower resistance and better flatness is to be preferred.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 25, 2025, 10:04:08 pm
content: Flattness of the resistance (that is resistance vs voltage relative to ground) is not directly relevant. The switches are used at a rather fixed voltage, like a few mV from ground. The more relevant parameter could be how much the resistance changes with the supply voltage or the slope the resistance VS voltage curve starting at zero. With a switch resistance below 5 ohms the resistance change and also the supply modulation should no longer be that relevant.It does not really matter if the current is per channel or for the whole chip. One best avoid such extra current,as it can effect the supply voltage.It is not just lower resistance to look for. Also the capacitance and charge spike can matter. Both tend to go up if the resistance gets smaller. Another point A reasonable fast switch can also help as it gives good chances to get low jitter.

author: Zondar
author_rank: Regular Contributor
timestamp: August 25, 2025, 11:25:59 pm
content: Every device will demonstrate that problem to some degree, including HP's own U180. It's got some truly massive inverters in it switching the switches. Again, that's what decoupling is for.During my career, many choices were based on assumption or superstition or gut feelings, because real data wasn't available until the circuit was up and running (or not). With the switches you used, at least you had that chart to look at. I don't have any info on mine.I'll think about it some more, but for a first "functional" version, my default approach is to replicate U180 as closely as I can, including by sticking with its resistance values and voltage levels. Partly this is just to avoid having to second-guess things later ("is this problem because I made that change!?"). But if it works at all, a lot of information and experience will be gained, and a second "performance" version can go nuts with improvements.(The resistance does go down modestly as the supply voltage goes up, but not enough to be a big factor.)

author: Kleinstein
author_rank: Super Contributor
timestamp: August 26, 2025, 06:55:55 am
content: It is normal to have current spikes from CMOS gates switching. This is one reason to have good decoupling. However the extra current from in the middle signals is a different issue. It depends on the signal level that is present and this can depend on the ref. PWM ratio and thus the conversion result. If this loads and effects the supply it can cause INL errors. The switching spikes are kind of fixed for the fixed frequency modulation in the 3458. So this would not so much effect the supply voltage. There is still a point to reduce the effect: there are switches for both the positive side and negative side. Usually one gets a high and one gets a low and they just swap the roles. So the extra current would only move from one chip to the other.One could get an idea of the switch resistance by measuring the voltage at the mod_sense pin with a relatively large voltage at the input (like 10 V in the 10 V range - does not have to be accurate). This would give an idea about the approximate resistance of the swiches. Lower resistance has some advantages, but also disadvantages. Positive is less contribution to the TC and thus less need to have ratio matching to the resistors. Even with not so good ratio matching to the 50 K / 80 K resistors one would still hardly need less than 10 ohms (for the 80 K) to get low TC.With the R_on 5000 times lower than the resistor the switch would only contribute some 1 ppm/K to the resistance TC and a good part is still compensating with the other switches, even if not perfect. The gate voltage modulation would compensate most of the nonlinearity in the R_on.Even without the supply voltage modulation one would hardly need less than 5 ohm for the input path (50 K).With the supply modulation considerably higher R_on (like 100ohm) should be acceptable.The down sides of low R_on is more switch capacitance. The switch capacitance at the refrence resisistors is connceted / disconnected to the integrator many times and this adds kTC reset noise and also pumps some charge from the small voltage difference between the integrator input and ground used for the switches. Noise wise some 15 pF for C_off would be about the point where it would start to get noticible.The charge pumping and voltage difference might be the larger issue with the 3458: The ADC uses ZR_low for the integrator and a different ground path at the switches. With ground bounce and variations this can contribute to the INL.The other issue is that low R_on switches also tend to have a stronger switching pulse, both on the supplies and the switched side.A lesser issue should be higher leakage that often comes with low R_on switches, especially those switches that are made to also work with very low supply (thus need very low threshold MOSFETs and these do leak).

author: julian1
author_rank: Frequent Contributor
timestamp: August 26, 2025, 09:13:51 am
content: Quote from: Kleinstein on August 25, 2025, 08:40:43 amThe gate voltage modulation corrects the slight non-linear resistance of FET switches due to changing VS from the divider formed between switch RDS_on the current resistor.This non-linearity gets reflected across the input voltage range.Since the non-linear contribution is constant for each input voltage value (and has some regularity), compensation could probably be done numerically (given control over firmware).To try to understand the analog approach -The current (from the sample input) is sent through the always-on dummy switch and then sensed as a small voltage by U170 ?And then the gate modulation offset is applied based on that (U170A looks like a diff-amp).Could this scheme even work if analog switches are used for switching?VDD could be manipulated (to indirectly keep at least VGS of the nmos part of the switch constant).But if all channels are on the same analog switch, then changing VDD affects the ref-current switches RDS_on as well.While separate switches for independent control will not work due to loss of TC matching.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 26, 2025, 12:25:03 pm
content: Modulation of the gate voltage should only be done for the switch at the input (with the 50K in series).The gate voltage correction will also work with CMOS switch chips, with a separate chip for the input channel that "needs" the modulation and use the other switches in the chip for other, non critical uses like the dummy switch or the reset path, where the resistance does not matter.It is good that the input is only switched rarely and other side effects on charge injection or the switching speed is not as relevant. This also makes the decoupling at the switches with modulated supply less critical.The reference switches would than use separate chips of the same type.

author: julian1
author_rank: Frequent Contributor
timestamp: August 26, 2025, 08:54:13 pm
content: When a 3-channel 4053 switch is used to implement an integrator with a reset, then two 4053 parts are already needed, with the second handling the extra reset short.This means there is a second switch available with two spare channels.The dummy switch, and a VDD/gate compensated input could probably added to this second switch, because compensation does not matter for the reset.This is nice because it becomes possible to test both configurations in parallel with just a few jumpers ie.- As usual with all three switches (2x ref, 1x sig) on one 4053 part - with better TC matching, but no compensation.- Or with the first 4053 used just for the ref-currents, and the gate-compensated part used for the sig on the second switch.But I am not sure how well compensation by manipulating VDD would work for cmos analog switches that have both nmos/and pmos channels.Even if the switch input is around 0V, which is where one thinks that the nmos part is most active, the pmos channel will still also conduct/ and contribute to RDS_on.Would you still prefer to see cmos analog switches used if a gate-compensation scheme was being followed - versus switching to eg. a high-speed analog fet array like SD5000?An advantage of the SD5000 is that with 4 fets, everything can be put back on one part again, with better TC matching.The bad part - is that charge-injection for the fet array, and probably some other parameters are not well characterized, and basic TC over input is probably worse.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 26, 2025, 10:31:00 pm
content: The 3458 has double the number of references. So 2 positive and 2 negative already for the precision part. They likely use 1 positive and 1 negative together for zero effective ref. current, but still the 40 K impedance like with 2 ref. path active.With 4053 type switches it would already need 3 switch chips for the precsion part with 2 switches for the input in parallel.The SD5000 or similar FETs would need additional logic for some breake before make logic and this would add quite some effort.With overall some 13 switches it would be a bit much of an effort for an U180 replacement. A new build ADC with fewer switches could consider them.The point with the p-MOS part is valid. Near zero the P-mos part should be essentially off. AFAIK the p-channel part usually does not use a driven substrate and there should be very little effect from the p channel part.The switch resistance is already quite small compared to the resistor. So no need for accurate matching between the switches from the same chip. Alteady parts from the same batch are usually Ok matched. With the 40 K/50 K mix of reistors one has anyway an extra issue here. It still gives a 4/5 compensation - with not too higher an R_on should get away without the accurate 4/5 R_on ratio. It gives a little extra TC and the choice of slightly positive or slightly negative ( ~ 0.5 ppm/k range) depending on using 1 or 2 switches for the input.

author: wanghar
author_rank: Contributor
timestamp: August 27, 2025, 07:23:00 am
content: Here's my understanding of gate voltage modulation using 2 LV4053s and one 4x50K resistor array. Is this theoretically feasible? What factors should be considered for practical applications?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 27, 2025, 09:20:47 am
content: The switch ad the modulated supply can likely get away with less decoupling capacitance to make it easier on the driving OP-amp. More like 10 nF and 50 ohms.I would use on of the switches with the variable supply for sensing the gate gate modulation, as these switches have limited use anyway.The resistor for the drop at the switch does not have to be very accurate and thus no need to be from the resistor array . it would only be if there is a left over resistor that I would consider the array. The 3458 use a rather normal 51 K resistor.In U180 the reference currents are split in 2 groups and thus 2 x 80 K from +12 V and 2 x 80 K from -12 V. There are also additional one for the reset and ladder part. So it would need more switches, like 3 x LV4053 for the slow part alone.

author: wanghar
author_rank: Contributor
timestamp: August 27, 2025, 09:52:51 am
content: Don't fully understand the internal structure of U180 yet. Gotta figure out the working mechanism of gate voltage modulation first, then we can extend it to U180. Modified the demo circuit as follows, but one question: if using switches with the variable supply to sense the gate modulation, would that cause oscillation?

author: Zondar
author_rank: Regular Contributor
timestamp: August 27, 2025, 03:15:32 pm
content: Catching up with Kleinstein:I'm not 100% sure about your concern about the current spikes, etc. In case you are worried about control input voltage beingheldat an intermediate voltage (as opposed to swinging through it momentarily), then fear not: I am using 5V supplies (plus Vss at -0.6V) and 5V control logic. Therefore, there will not be any DC current due to this.If you are worried abouttransientspikes, as one changes logic levels from off to on, etc., that is inevitable to some degree, and at the moment I'm not doing anything special to mitigate that beyond the usual decoupling.But one thing to note is that the current spike will only be on the digital side, and the effect on the analog signal will be due to a tiny transient change in the switch's gate voltage level. This will AC couple to the analog signal through gate to source and drain capacitance, which is not desired.But how important is this effect? Not very, sinceit will happen exactly at the moment the switch is switching anyway,and at no other time. The AC coupling mentioned above will beon top ofa full 5V (actually 5.6V) swing, and only apparent in themiddleof the transition, not at its end. So what you have is only a slight distortion of the control signal during the middle of the switching, on a signal that is quite non-linear anyway. I just don't see this as a fatal problem, or even one to be particularly concerned about.It's true that lower on-resistance, all else being equal, does have downsides, including higher parasitic capacitance and higher charge injection. We discussed parasitic capacitance (mostly extra capacitance from the chip's packaging and board wiring) a while back and concluded that it is probably not a major issue.Higher gate capacitance from larger switches leads to higher charge injection, which is not good. But since the switches are operated in alternately-switched identical pairs, essentially the same injected charge will be removed again a few ns later.If we were designing a custom CMOS chip, the switches could be made any size, and scaled on a per-switch basis, etc. But we don't have that luxury here. I did just change the part I am using, but only to a different package (the IC itself appears to be identical), since the original "chip scale" package was giving me headaches while routing. I'll stick with this one for this version, and reassess for the "performance" version.Repeating data by MiDi, who had measured some of the switches:"U180 switch resistance:rusn1 ~14Ωrusn2 ~3.5Ωrusn3 ~9Ωladsn ~12Ωzero ~30Ωall measured to sum"The ones I am using are ~2.5 Ohms or a little less.

author: Zondar
author_rank: Regular Contributor
timestamp: August 27, 2025, 03:34:06 pm
content: Next, catching up on the "dummy switch" topic:From Kleinstein's earlier post, I take this to be an attempt to correct for varying switch channel resistance.In the real U180, only N-channel switches are used, and so the channel resistance will vary quite substantially with the source voltage. In NU180, the switches are complimentary, the channel resistance is very low, it will vary only slightly across the whole analog range, and especially so with the 5V supply I'm using. So, is this correction circuit actually still needed? (At the moment, I have not implemented anything for this.)About potential problems in general: The problems that I really fear are those that could lead to the 3458A refusing to digitize altogether. What scenarios might most likely lead to total failure to digitize?

author: Zondar
author_rank: Regular Contributor
timestamp: August 27, 2025, 03:49:19 pm
content: A general progress update:I remeasured the area around U180 and think that, once a socket is soldered in U180's place, the ~4-5mm extra height is almost exactly the amount needed to allow the board to extend a little horizontally, at least in one direction.I've routed the entire circuit except for a few details concerning the CPLD (JTAG pins, etc.). It was a tight squeeze, but everything except the CPLD fits within the area of U180. The CPLD could be placed on the bottom of the board so the entire board fits withing U180's profile, but at present I have it hanging off to one side. That's partly because I want to add a lot of test pins anyway, and those take up a lot of space.Things I have to check: Handling of the analog ground lines, all the really stupid (yet surprisingly likely) mistakes like rotating/mirroring/flipping the U180 pins incorrectly, any last additions like the "dummy switch" and test pins, and so on.It's my first time using KiCad, and I made some early errors setting up things like trace widths. So since it's 80% finished, I only have another 80% to go.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 27, 2025, 04:43:56 pm
content: Quote from: wanghar on August 27, 2025, 09:52:51 amThe modulation of the supply is only smal, like some 10 mV range. So no danger of oscillatoin from so little feedback.With only 2.5 ohm switches one may not really need the supply modulation. There can be a little more than just the lower R_on: with lower thereshold FETs in the modern low R switches the dependence of R_on on the gate voltage additionally tends to be smaller. So chances are one might just get away without the supply modulation. The result would be a slight U² contribution to the INL. In may ADC with LV4053 switches (some 20 ohms R_on and 50 K for the input) I get some 4 µV from the U² contribution with 10 V input. With lower R_on expect this effect to go down like 1/ R². So 2 switches in parallel (to get slightly better ratio match) for the input would give 1/4 the error.So expect only some 40 nV of error with 2 ohm switches. On the other side, the amplifier part for the gate modulation is already on the A3 board. As simplification one could consider a small resistor instead of the dummy switch. This would one could get approximate compensation, mainly missing out on the temperature dependence of the small U² part and maybe selecting the resistor suitable to the switches.Some of the capacitance at the switches may matter. It would be the nodes where the 80 K resistors connect to the switches. Capacitance there can add a bit to the noise and can couple a little of the residual voltage at the A2 ground to the result. So these node may want short traces and some protection from capacitive coupling to the control signals.

author: Zondar
author_rank: Regular Contributor
timestamp: August 27, 2025, 05:36:10 pm
content: Oh no! Oh no! Oh no!I used the wrong footprint for the switches (0.5mm pad spacing instead of 0.65). There is no room left for adjustment, so my entire layout is trash.Starting over. Sigh. I can reconsider whatever might be recommended before diving in again. In particular, if someone cares to review the available switch options, I'm open to reconsider that. (What I'd like is SPDT with a split supply covering +/- 2.5-2.75, or optionally 0 to 5-5.5V, with individual control over each switch.)Edit: I changed to the chip-scale package, which is smaller and fit ok with some juggling. The layout is a bit messy due to all the changes, but it's OK for a first prototype. I still have to finish the same things I mentioned a post or two ago.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 27, 2025, 06:50:13 pm
content: The SN74LV4053 switches are available in a 0.5 mm pitch QFN16 and 0.4 mm pitch TVSOP, at least in the DS I have. Chances are however that would want 2 channels in parallel for the input. The fast part (20 K ref. would still want a lower resistance switch).

author: Kleinstein
author_rank: Super Contributor
timestamp: August 27, 2025, 07:26:08 pm
content: Quote from: Zondar on August 27, 2025, 03:34:06 pmThe main issues to cause the rundown convergance error would be reference currents that are off, so that the fine slopes are no longer correctly spaced.The most sensitive point to resistor drift should be an error be an error in the balance between 2 of the 80 K channels. Most likely 2 of the 80 K resistors are used to get a net zero current with still the 40 K impedance also for the rundown. An error in the 80 K resistors or +-12 V balance (10 K resistors at pins 8-10) would add some net current for the sum that should be near zero. It would need an error of some 0.4 % to get stronger than the finest slope (1/256). A little less error could already be enough that it takes to long to reach zero.In principle the ladder part (or the 5 V ref.) could also have erros, but here the tolerances are already not as tight (like 4 x less critical).One may even have a slight change to compensate for a slightly bad U180, e.g. by adjusting the value of R154, the resistor used to add an offset to the ladder part. For some time this has a chance to clear the convergence error message.Poor matching in the switches or too high a capacitance or charge injection could cause INL/DNL errors, but the conversion should still finish.Way too much capacitance could upset the integrator, but there are already 200 pF as a capacitor. So I would expect that some 100-200 pF as extra capacitance should still be OK. Worst case one might have to reduce C128 if the capacitance is really much higher than with the origianl U180.The error message about convergence error is not very specific, which suggests that there is no extra test mode to really check U180 in more detail. An extra test could be more specific with the error (e.g. leakage, ref. inbalance, ladder DAC issues) and give an error aready when larger DNL errors are expected and not just when the rundown fails totally.

author: Zondar
author_rank: Regular Contributor
timestamp: August 28, 2025, 05:13:37 pm
content: I redid the layout from scratch.I think it's mostly done. One compromise that I had to make was to use AGND3 for GND. These are supposed to be connected on the board. The problem was that the PGA package pins are so large that power and ground planes could not pass between the pins. The solution was to use AGND3 for GND, since that pin is on the inside perimeter of the PGA package.EDIT: See below for updated schematic and layout.

author: aronake
author_rank: Frequent Contributor
timestamp: August 28, 2025, 06:01:44 pm
content: Quote from: Zondar on August 28, 2025, 05:13:37 pmRespect! What an awesome piece of work!

author: bnz
author_rank: Regular Contributor
timestamp: August 28, 2025, 06:13:29 pm
content: Quote from: Zondar on August 28, 2025, 05:13:37 pmAre there any objections to lower the settings for these planes in the zone manager such that they can pass between the pins?

author: iMo
author_rank: Super Contributor
timestamp: August 28, 2025, 06:19:27 pm
content: Decrease the isolation distances/clearance and the ground planes will fit between the pads..Also the clearance around the vias is huge, imho..Sometimes the pads for the pin headers have large inner diameter too, you may gain a bit space there as well (here be careful as there will come the copper inside the holes)..PS: also you have to pass the DRC check with your PCB manufacturer..

author: Kleinstein
author_rank: Super Contributor
timestamp: August 28, 2025, 06:45:42 pm
content: The different ground pins can be important. However GND3 seems to be not that critical for the input paths. The reset path (pin 51) could be an issue. Current from there can effect the ground and this way maybe the timing at the PLD. So the U3 pin 7 may want a seprate path (maybe pin37 or 60) to ground. There are quite some more extra pins that are unused with U180 and supposed to be connected to ground.

author: Zondar
author_rank: Regular Contributor
timestamp: August 28, 2025, 08:16:05 pm
content: I corrected the via to fill spacing, and I added AGND3 back in. Here are the updated schematics and layout.

author: iMo
author_rank: Super Contributor
timestamp: August 29, 2025, 05:25:09 am
content: Perhaps the upper/lower corner right might allow for a small hole like M2 - M3 for a mechanical support during measurements (ie. a small plastic post glued to the A3 board, or something like that) - you will need a mechanical stability, as I mentioned in the first thread..

author: Zondar
author_rank: Regular Contributor
timestamp: August 30, 2025, 05:01:52 pm
content: I've expressed concern that going straight to a U180 replacement means that I would learn very little if the 3458A refuses to accept it, and desoldering U180 just for things to fail to work would be painful. Furthermore, the discussion about TCR matching, etc., is very scary, and it's quite unclear that the required fractional-ppm tracking over-all can be achieved with stock resistors.Therefore, I've been thinking that it might be good to start with a simplified test board containing a few switches and resistors, controlled by an external AWG rather than a CPLD, and so on. I can use the little board to examine things like switch resistance alone, charge injection, resistor matching, at least crude temperature variation measurements, etc. So the board might contain:* One or two switches alone (no added resistance) for direct switch measurements.* A high-precision 10k resistor, e.g. 0.01%, 0.2ppm, alone (unswitched) as a stand-in for the 50k when doing ratio measurements, etc. (It's probably easier if everything is 10k rather than mixing values.)* A few individual switched resistor options, e.g. of high or low precision.* Maybe a separate test of arrays, e.g. within package vs. between packages.* Maybe a separate test of an array in parallel/series formations vs. single resistors, e.g. to see if any improvement in accuracy or matching can be obtained. However, I'm not sure that this sort of test would provide much useful information, since it probably requires accumulating statistics rather than looking at an individual case or two.To recap what's available: The best individual surface mount resistor options (for limited values like 10k) are 0.01% with 0.2ppm TCR. The "best bad" ones (e.g. for 80k's) would be 0.1% and 10ppm, though I'd probably get 10k's from that series for apples-to-apples comparisons. A few convenient array options like TOMC are also available in 10k per resistor, with 25ppm absolute TCR and 5ppm tracking.So are there any suggestions or recommendations for how to configure options like the above for tests? I have a 10V 0.001% reference on loan (a "Ref10-001" which perhaps can provide 1mA without too much stress), a KS 34465A 6.5 digit DVM and a decent scope, but no other fancy metrology instruments.Thank you.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 30, 2025, 09:12:31 pm
content: The charge injection at switches depends on the circuit around it - probably need to test somewhat close to the later use with resistors and current steering. One may even want some kind of integrator. Not sure if a single switching event would be enough for a visibel effect.The test circuit may end up a simple ADC (e.g. a bit like my solution with 3 SPDT switches, 2 OP-amp integrator and µC control).I don't see the switches causing the ADC not work at all. The points (jitter, charge injection, capacitance, nonlinear R_on) are more a performance issue.A possible issue that could make the ADC fail could be an issue with the logic speed. So insuffcient setup time for the flip flops and thus some switching a whole cycle late. For this it may help to do a few measurements at the real 3458 to see the timing of the control signals and clock.Similar the TC- matching would be a performance issue. It could still make it hardly usable. Some testing upfront is a good idea, as the datasheet values may not be specific enough (e.g. TC for a quite large range with possibly the box method). For the ORN resistor arrays in 5 K / 10 K and 50 K I can tell you that with my tests they performed quite a bit better than the 5 ppm/K matching specs. For may samples more like 0.5 ppm/K or a bit better. So these would be likely usable / good enough.For the single resistors I would also expect matching quite a bit better than the absolute specs.A resistor test could be simpler than a full ADC, like some bridge circuit.For the ADC to fail it would likely be a resistor ratio that is too far off, so that the run-up no longer reaches zero fast enough. Likely this would be last or maybe 2nd last step. The fine steps don't even use the switch chips actively, but are swiched via the HCT14. Likely some offset from the coarser parts would add to much background, so that one of the last steps gets way to small.It could make sense to look at how the conversion actually fails at what step and how the integrator voltage looks like.It could be challanging part to get a good trigger on a scope.If one is lucky one could adjust the background (e.g. via the 604 K resistor in the ladder part) and this way get the ADC working again, though likely only for a short time and not very well (drift and DNL).It could make s

author: Zondar
author_rank: Regular Contributor
timestamp: August 30, 2025, 11:01:21 pm
content: "Hardly usable" is OK in the sense that operation can then at least be observed and measured so improvements can be made.I wish I had full access to U180's signals. I've been debating partially extracting and operating the A3 board while its back is exposed. It looks like it can hinge up from one side with all connections intact. Maybe I can 3d print a bracket or something to hold it securely.I am not sure what the fastest analog switching speed is, a few hundred kHz? But anyway, with a 20 MHz clock on the FPGA responsible for controlling them, the minimum setup time would be 25-50ns, which I feel is adequate. That kind of issue, should it pop up, is very solvable.For charge injection, I'd put something like a 1% 330pF capacitor to ground at the pole of interest, probe it with a low-capacitance active probe (I have one) while applying a square wave to the switch control, and sweeping an input voltage across the other side. This is more about curiosity than concern.One of the main goals of a preliminary test board would be to compare individual resistors with arrays. I don't think a bridge is needed for this. Even at 0.2 ppm/C, only about a mOhm resolution is necessary, and my meter should be good for 50 uOhms on the 10k scale. The 2-10 ppm ones should be reasonably easy to sort, even. I guess all that's needed for that is to array them and add pins for easy probing.I was also thinking of how to simplistically-mimic some of U180's functions. One idea is to add a larger capacitor to the output of a SPDT switch, and repetitively charging/discharging it between the 10V reference and ground. Or else I have power supply that is pretty accurate down to mV and mA. I could array switches using a number of different types and quality resistors. That could reveal a surprise or two.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 12:16:35 am
content: Here's a puzzle for anyone who is interested:You have up to 8 resistor array packages, each containing 8x independent 10k Ohm resistors (total 64 resistors, but you don't have to use them all). Within a package, the TCR tracking is 5x better than between packages (e.g. 5ppm/C vs. 25ppm/C), which you want to take advantage of.Your job is to make 4x 80k resistors and 1x 50k resistor from the 10k's, arranged so that you achieve the best tracking between the 50k and all four 80k's. How would you arrange them?Extra credit: Now do the same 5 net resistors with only 4 resistors per package.My answer: You only get the single-die advange (e.g. 5 ppm/C vs. 25 ppm/C as above) if you stay entirely within one die. The moment you cross a die boundary, including with any parallel or series arrangements, you generally default to the between-die value, e.g. 25 ppm/C in the above case.This means that the TCR of a 50k with 0.2 ppm/C in ratio with an 80k at 10 ppm/C results in a net ratio slightly worse than 10 ppm/C.

author: wanghar
author_rank: Contributor
timestamp: August 31, 2025, 03:44:43 am
content: The Vishay OSOPC series is a 12-resistor array. If that's the case, it is actually possible to tuck the input 50K and the two ref 80K resistors all into a single array. Just a heads up, this specific part number isn't in stock on Mouser at the moment.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 31, 2025, 09:23:01 am
content: AFAIK the cycle time in the runup is around 3 µs. So the 4 switches at the 80 K resistors (or 20 K for the fast mode) would be switching at some 330 kHz.The number of switching cycles is constant and thus only the changes to the net charge pumping part would matter.The speed can matter for the fast part of the rundon. So the time to switch of a pair of 80 K resistors (likely one on and another off) just before doing the slow rundown. The fine slope part is with the HCT14 and thus not going through U180 switches.Likely the setup time available for U180 is in the 25 ns range, so half a cycle of the 20 MHz clock. A nasty point could be that it could be different between the original gate array and the newer replacement board with FPGA and levelshifters.Which version of the ATF150 to use could make a difference. The 20 or 25 ns speed grade could be a bit on the slow side.Using many 10 K resistors to make up the 80 K may work but is not really practical. There is just too much routing and parasitic coupling / leakage.If one wants the matching from arrays, the change to 100 K instead of 80 K would however be practical. In the minimalistic version 4 x 100 K for the reference and 2 x 100 K for the input. This solution may suffer from the power handling coefficient at the input. There is not absolute need to get matching to each of the 80 K, only the average with some symmetry. This way one could also use 4 arrays with 4 resistors, especially LT5400.To get the same ref. currents one would need higher ref. voltages (+-15 V instead of +-12 V). The switches are current steering and thus don't really care how the +-150 µA ref. currents are generated. The ref. amplifier part on the A3 PCB should also be capably of generating +-15 V instead and the gain setting resistors are part of U180 anyway. There are 3 resistors on the A3 baord that use the -12 V ref and these would need a change for the higher voltage: the modualted supply, the zero jump avoidance (may get away without a change as this part is not at all critical with tolerance) and the 604 K offset to the ladder part. Given that one would have to unsolder U180, the addition change to 3 not so critical resistors would not be that bad if it simplifies the U180 replacement board. The changes for the fast mode (e.g. 25 K instead of 20 K) would also be relatively easy and inside the U180 replacement.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 01:42:22 pm
content: Wanghar: Nice! But I think the 50 needs to track all 4x 80's at once, not just two.Kleinstein: I agree that large arrays aren't very practical. Indeed, the point of my last post was that it would not help anyway since multiple packages must be used, which immediately degrades ppm's. In most cases there are individual resistors with better TCR anyway.I also agree that moving to 100k instead of 80k would help a lot, given that 100k resistors are available with 0.2 ppm TCR. The 50k made out of 2x 100k's would also have 0.2 ppm/C, netting 0.4 ppm total for the two. That's somewhere close to the required spec.Now, 80k resistorsarelisted as supposedly made with 0.2 ppm/C. See here:https://www.digikey.com/en/products/detail/vpg-foil-resistors/Y402780K0000A9R/21835681Lead time indicates sometime in November. Um, but you have to order 50 of them. Group buy!Another idea: The 10ppm 80k resistors are relatively inexpensive. Perhaps it's possible to select resistors from among a batch of them.I'm not scared of 25ns. It should be OK, and if it's not, it will quickly be recognized and fixed one way or another.

author: wanghar
author_rank: Contributor
timestamp: August 31, 2025, 02:40:43 pm
content: Sorry, I didn't realize that four 80K resistors were needed. This does seem a bit complicated. If changing Vref to ±15V and using 100K resistors, the OSOPA1003A could be considered. It provides ten 100K resistors in one array, which can be used to form 4x100K and 50K resistors. It may not be perfect, but it could be a feasible solution to try—especially since it's in stock.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 03:29:55 pm
content: Quote from: wanghar on August 31, 2025, 02:40:43 pmThat one is interesting. It's in stock and inexpensive, too. But the tracking TCR (5ppm) is considerably worse than the absolute TCR of other options (e.g. 0.2 ppm).One semi-realistic option is to order 25 of these for about $600:https://www.digikey.com/en/products/detail/vpg-foil-resistors/Y174680K0000T9L/4232515Specs are 0.01% value and 0.2% TCR. That matches what's in stock for a 50k.If you only need 4, that's quite expensive (the best 50k's are about $40), but if you rationalize it as costing less than a custom order of 4, it can make sense. The second problem is the lead time: February of next year.If that's all that kept us from success, I'd go for it.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 03:45:07 pm
content: I think the option of buying 80k's with 0.2ppm, albeit at a cost, makes the project much more viable.But I should ask Kleinstein: What would it take to get +/-15V references? Would you have to change values on the A3 board? Tap the +/-18 and regulate it separately? What would be your strategy?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 31, 2025, 04:31:58 pm
content: The resistor array specs are for a large range of values. The higher resistance ones are usually quite a lot better. I found the the ORN networks with also 5 ppm matching specs to be more in the 0.2 or 0.5 ppm/K range. So most of the resistor array are actually quite a bit better than the specs.I would expect similar performance with NOMCT and OSOPA.One the other side the vishay metal foil resistors are known for not always (just most of them) making there typical only specs.The minimal solution only need 6 of the 100 K resistors: 4 for the references and 2 for the 50 K input. Using 12 resistors gets slight better spreading for the input. So still 4 for the references and 8 to make up the 50 K for the input. The weak point with the simpler arrays is not the matching, that should be good enough at least for the start and worst case may want testing a 2nd unit. The weak point is more the power/voltage coefficient.If one really wants one could use 2 x LT5400. This would not give perfect matching with all the 100 K resistors, but still in pairs of a positive and negative where it matters. The main point is the average of all 4 ref. resistors that effects the gain TC. Matching between the positive and negative side would effect the ADC offset that could be somewhat relevant in the non AZ mode.The actual gain change to +-15 V references would be from changing the 6 K and 4.14K from the reference gain (to like 5 K and 5.5K). Depending on the values one would also want to change R168 for the current compensation. The other point is changing the -12 V to 5 V step from 24 K to 30 K.The OP-amps on the A3 board should still be OK to also provide +-15 V. They should still have 17 V supply and just enough headroom to get 15 V out.With the +-15 V ref. one would need to change a few resitors on the A3 board, where the -12 V are used:1) R154 , 604 K for the offset for the ladder. Should change to 750 K.2) R185 , 3 M for part of the zero jump part. Would be nominally 3.75 M, likely 3.9 M as the value is not at all critcial. One may even get away without a change.3) R176, as to generate the modulated 5 V for the gate drive. One may also not to change a 2nd resistor like R171 or 172 with this to get the gain right.Changing R171 to a larger values could also make sense when using a higher resistance dummy resistor for sense.If the supply voltage modulation is not used, than no change at R176 would be needed.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 06:16:56 pm
content: Kleinstein: OK, thanks. I understand that you measured better than the specs, but that's still anecdotal experience that I'd want to verify.I did look at the LT5400 earlier. It's very nice for balancing 100k's. The problem is its huge absolute tolerance (+/- 7.5% for A grade ones), which means that the gain may wind up being off.Anyway, since I don't think I'm up for modifying my A3 board beyond putting in a socket, I will stick with the 80k plan for now. I'll spend the money to get better 80k resistors if and when that's necessary. If someoneelsewants to try 100k's, I'll happily support that.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 06:19:59 pm
content: I designed a tiny board to test switches and resistors. I'll plan on trying a few grades, namely 0.2 ppm TCR ones and the equivalent of 80ks (10k, but otherwise the same), etc. I can still add things or make changes depending on suggestions or requests. I could include an array that makes sense for compatibility with the 80k plan, for example.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 31, 2025, 07:37:39 pm
content: It is not me who found quite good performance with resistor arrays. It would make sense to do some tests yourself.From just the PCB layout it is hard to see what the test circuit does. One would at least need a schematics.For a large part testing resistor matching and testing switches would be 2 separate circuits. Resistor testing would in most part be better done without the switches.The large absolute tolerance of the LT5400 is indeed a no go. It would srew up the other slopes from the fast mode and the small slopes.The main concern with the ADG788 switches is in my oppinion the capacity. There are 4 reference switches with some 23 pF (for the com terminal ~ C_on - C_off).Switching at 330 kHz 4 x 23 pf would correspong to some 200 K. This would couple residual voltage between the grounds for the integrator and the ground used at the switches to the integrator. This part could really effect the linearity.There is not really a need to test the switches the capacitance is reasonable known. The unknown part is more how good the ground (A2) at U180 is.

author: Zondar
author_rank: Regular Contributor
timestamp: August 31, 2025, 09:30:12 pm
content: My idea is to crudely simulate a small portion of U180's circuitry. Two "identical" resistors (e.g. 10k) would be repetitively switching +/- references, which could be +/- 12, but probably a lot less for safety. A capacitor is added to the output to integrate the incoming charge. Then I'd attempt to adjust the duty cycle until the output is balanced. My function generator has quite fine control over this. The degree of asymmetry in the duty cycle should be related to mis-matches between resistors and switches in a way that is somewhat similar to how the 3468A works. Or what might be a better idea along these lines?I also included one bare resistor, but it's true that more should really be added. I guess I'm reluctant to buy too many $30-40 resistors just to trash them on a test board, but I could at least add some more of the cheaper ones.I'm not sure what "200k" refers to, but I thought you said that the capacitance shouldn't be an important issue since it's a current that's being switched? Anyway, these are similar to the SNx4LV4053A that you mentioned earlier and the TMUX6234 that I initially considered too.We could go up to around 10 Ohms instead of 2.5, such as with the TS3A5018 for example (but this does not have the required switch control arrangement). This one is promoted as having "low capacitance" of 9 pF off and 16 on. I'm just not sure 4x the resistance is worth 1/2 the capacitance. One of the unproven hopes is that an especially low on-resistance might make the matching of switches less of an issue.We also need to remember that U180 contains very large switches too. Probably the only fundamental difference is that there are no package pins between the output of some switches and their resistors, saving some parasitic capacitance.

author: Rax
author_rank: Super Contributor
timestamp: August 31, 2025, 11:17:04 pm
content: Quote from: Zondar on August 31, 2025, 03:29:55 pmZondar: bdunham7 already mentioned going tohttps://webdirect.texascomponents.com/SearchResults.asp?Cat=1844.I've worked with them, they're very flexible to make custom resistors (literally any value to a couple of decimals) at .2ppm in very small runs (literally one if you must) and in very little time. They essentially print these to your spec, so I believe their cost is very low. It's, surprisingly, a little know source in the US of exceptional resistors and for not a high price. It may be ideal for what you're looking for.If you're looking for the best TC (bar none) non-array, through hole or smd, resistors to be ordered in small runs and in short time, TCC is an unreal opportunity. I don't know the impact of tariffs and whatnot on their business - it's been a few many months since I last ordered from them - but they seem to cater to exactly this type of customer as we are.

author: Zondar
author_rank: Regular Contributor
timestamp: September 01, 2025, 01:01:22 am
content: Hi Rax,I'll be calling them on Tuesday. I'd have called already if it wasn't the holiday weekend. I'm very interested in hearing about their capabilities.Thanks.

author: aronake
author_rank: Frequent Contributor
timestamp: September 01, 2025, 01:58:56 am
content: Quote from: Zondar on August 31, 2025, 12:16:35 amI made TC measurements on around 20 tdp16031002. The resistors in each IC are indeed tracking well. 6 closest out of the 8 resistors within 2 ppm/c. But from IC to IC there is huge variations. So probably a good idea to buy 3 times the number of arrays needed and do TC scans and selection.

author: Zondar
author_rank: Regular Contributor
timestamp: September 01, 2025, 05:50:11 am
content: Quote from: aronake on September 01, 2025, 01:58:56 amSorting can work. For fun I'm tracking a $0.01 10k resistor right now. It's doing very well, with nicely under 0.1ppm/C so far.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 01, 2025, 08:47:34 am
content: I don't think one would really need to test the expensive 0.2 ppm/K resistors upfront. It may make sense to do some tests with simpler (e.g. 5 ppm/K grades) resistors if one can get enough matching from parts from the same batch and maybe even sort / select them.A test may be possible with a good DMM and temperature modulation or in a kind of bridge circuit to see just relative changes. With 80 K and 100 K one may get away without 4 wire sensing at the bridge.It makes relatively little sense to check the resistors together with the switches. The switches would add noise and uncertainty, especially if the temperature changes.

author: Zondar
author_rank: Regular Contributor
timestamp: September 01, 2025, 03:49:48 pm
content: OK, I guess you are right about premium resistors being a waste while looking at the switches.A major focus needs to be on solving the 80k problem. I'll call that outfit in Texas tomorrow, or else I can spend the $600 and order 25 parts.Before that, or meanwhile, a look at the easily available 80k's seems warranted. The best in-stock 80k's are Vishay thin-film, 0.1% and 10ppm/C, costing about $0.50 or so each in small quantities. I had wanted to compare them to their 0.2ppm counterparts, so I thought I'd try equivalent parts in 10 or 20k. But instead or in addition, I can array a bunch of 80k's (I sure wish I had a scanner card).I don't know how I'd "sort" surface mount resistors without soldering them, though. I can't imagine that soldering, desoldering and resoldering them is good for their health.I don't think that testing the switches alone will result in any big revelations (I'll certainly look, though). I had really wanted to observe them dynamically in conjunction with resistors. In other words, I wanted to test a partial circuit in a way that is similar to how U180 works, but without making a whole ADC. Any ideas?Hmm, I think I'll add a charge-integrating amplifier to a switch-pair output, e.g. with 80k resistors. If I remember, the 3458A uses a 330 pF integration capacitor, right? Maybe an op-amp with around 50MHz bandwidth would do?

author: Kleinstein
author_rank: Super Contributor
timestamp: September 01, 2025, 06:57:59 pm
content: A partial system to test the switches would be a kind of simple ADC. My ADC version uses only 3 SPDT switches and would be a reasonable test platform for switches. It is slightly different from the 3458, but still not too much. I have 50 K resistors to some +-14 V reference and the input.I could even consider soldering up a SMD to DIP adapter (or even dead bug) and use my old board that has a DIP socket for the switches.It would need a lot of leakage current for the switches to cause the ADC really fail. The switches would mainly be a performance thing, hardly a point to make the ADC not work at all.I anyway will likely test a max4619 that is available also in DIP.I did my initial ADC tests with separate resistors, some even only specified for 100 ppm/K (even better than one set of 15 ppm/K resistors). I don't remember big issues with drift. For an initial test the 10 ppm/K resitors should be OK. To get some matching to the 50 K at the input I would consider having 2x80 K in parallel and 10 K in series as an alternative to just 1 good 50 K resistor. 8 x 80 K could get ~ 49.5 K with reasonable spread of power.0.1% accuracy for the resistors should be good enough. The finest slope is only 1/256 and an 0.1% accurate ratio would be only 1/4 LSB DNL and better than needed. In many cases the last bit is anyway rather noisy. That last bit would be mainly a thing for short integration like <=100 µs.The ladder part (37.5 K and 16.7 K ) does not need super low TC and 0.1% should be OK and even 0.5% may be acceptable. For the right slope ratio it should be 16.666 K with some 60 ohm already from the HCT14 output. 16.7 K is a standard value, while 16.6 K would need a mix of 2 resistors ( e.g. 2.7 M in parallel to 16.7 K) . It might be worth to have that option for the first fine slope bit - one could still worst case stack 2 resistors.

author: wanghar
author_rank: Contributor
timestamp: September 02, 2025, 01:24:51 am
content: Made a test on the on-resistance of the switch based on the 74LV4053. The test graph, schematic, and data are in the attachment. When Vi exceeds 1.0V, it basically stabilizes at around 14Ω, with the maximum Vgatesense voltage around only 2.8mV. After connecting the two channels in parallel, both Ron and Vgatesense were basically halved.

author: wanghar
author_rank: Contributor
timestamp: September 02, 2025, 06:10:22 am
content: Another test: Ran the 74LV4053, TMUX1133, and ADG733 respectively on the CPLD-based MS_ADC board, primarily for an initial noise performance comparison. After each chip replacement, both slope ratio and ADC ration calibrations were performed again. The original board was designed for SO-16 package, so a small adapter board was made to enable testing of these switches in TSSOP-16 packages. All tests were conducted with input shorted at 1PLC, with the last column showing noise_rms values in mV:74LV4053:Code:0 1759.838 1760.244 -0.405 -0.0009 -8 0.000630 1759.843 1760.239 -0.383 -0.0005 10 0.000840 1759.840 1760.237 -0.367 -0.0005 4 0.000760 1759.843 1760.241 -0.403 -0.0005 2 0.000610 1759.843 1760.249 -0.416 -0.0008 33 0.000660 1759.847 1760.249 -0.400 -0.0007 16 0.000720 1759.845 1760.247 -0.412 -0.0007 2 0.000710 1759.853 1760.248 -0.393 -0.0004 -36 0.000710 1759.849 1760.253 -0.428 -0.0008 -18 0.000820 1759.852 1760.255 -0.416 -0.0007 -12 0.00060ADG733:Code:0 1775.494 1775.705 -0.233 0.0073 2 0.000780 1775.492 1775.713 -0.212 0.0069 -17 0.000920 1775.506 1775.716 -0.193 0.0073 -33 0.000840 1775.508 1775.723 -0.247 0.0072 -24 0.000960 1775.507 1775.728 -0.198 0.0069 0 0.000920 1775.509 1775.728 -0.270 0.0070 -22 0.000910 1775.505 1775.718 -0.212 0.0072 14 0.000840 1775.517 1775.729 -0.224 0.0072 26 0.000780 1775.508 1775.728 -0.235 0.0069 38 0.000880 1775.511 1775.728 -0.193 0.0071 16 0.00080TMUX1133:Code:0 1827.979 1828.525 -0.585 -0.0066 32 0.003760 1828.026 1828.566 -0.433 -0.0064 0 0.004340 1828.168 1828.666 -0.578 -0.0047 -18 0.004710 1828.024 1828.571 -0.579 -0.0068 5 0.004140 1828.010 1828.564 -0.750 -0.0070 34 0.003190 1828.056 1828.588 -0.368 -0.0063 34 0.003580 1828.132 1828.659 -0.556 -0.0058 50 0.004030 1828.225 1828.768 -0.566 -0.0067 -1 0.003390 1828.125 1828.661 -0.568 -0.0062 -12 0.004160 1828.144 1828.671 -0.559 -0.0059 -4 0.00315Conclusion: On this test board, the 74LV4053 still demonstrated the best noise performance. The ADG733 was decent but slightly worse than the 74LV4053 (the 220pF capacitor before the integrator had to be removed to test the ADG733). The TMUX1133 exhibited significant noise.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 02, 2025, 08:26:16 am
content: How is the RMS noise measured ? So how many readings and is it directly single values or the AZ mode difference of 2 conversions ?A point for the effect of the switch depends on the frequency of the modulation during run-up. The higher the frequency the more important the switches get.

author: iMo
author_rank: Super Contributor
timestamp: September 02, 2025, 08:37:09 am
content: @wanghar: perhaps a little bit off topic - while looking at your board I see no resistors around your FPGA - people usually put there in the i/o lines small resistors, like 22-33ohm (when interfacing analog-like circuitry). What is your experience with that?

author: wanghar
author_rank: Contributor
timestamp: September 02, 2025, 08:57:36 am
content: The rms calculated as this function:Code:def Checkrms(): # sum up and check if ready for outputglobal outcnt, sumdu, sumq, sumu1, sumu2, avdu, rms, u1m, u2moutcnt = outcnt + 1;sumdu = sumdu+du;sumq = sumq + (du-avdu) ** 2;sumu1 = sumu1 + u1;sumu2 = sumu2 + u2;if outcnt == m:outcnt = 0checkrms = Trueavduold = avduavdu = sumdu/mrms = sqrt((sumq - (avdu-avduold) ** 2) / (m-1))u1m = sumu1/mu2m = sumu2/msumu1 = 0sumu2 = 0sumdu = 0sumq = 0else:Checkrms = Falsereturn CheckrmsThe data in above post , m=50. ADC runs at 1PLC, AZ mode.if m=2, the data jumping alot looks like as:Code:0 1566.935 1567.547 -0.613 -0.0026 12 0.001250 1566.951 1567.540 -0.589 -0.0017 20 0.000900 1566.958 1567.544 -0.585 -0.0012 6 0.000550 1566.955 1567.550 -0.595 -0.0019 11 0.000680 1566.926 1567.534 -0.609 -0.0027 6 0.000840 1566.939 1567.518 -0.579 -0.0012 12 0.001420 1566.949 1567.518 -0.569 -0.0007 6 0.000600 1566.947 1567.518 -0.571 -0.0009 12 0.000280 1566.923 1567.525 -0.602 -0.0019 -26 0.001020 1566.914 1567.530 -0.616 -0.0028 4 0.000960 1566.918 1567.518 -0.601 -0.0022 -9 0.000650 1566.918 1567.514 -0.595 -0.0018 10 0.000410 1566.911 1567.520 -0.609 -0.0023 5 0.000550 1566.940 1567.524 -0.584 -0.0014 4 0.000980 1566.946 1567.537 -0.591 -0.0014 9 0.000370 1566.945 1567.532 -0.587 -0.0019 12 0.000690 1566.953 1567.528 -0.575 -0.0007 15 0.001230 1566.947 1567.537 -0.589 -0.0017 -1 0.000980 1566.938 1567.533 -0.595 -0.0018 -2 0.000110 1566.945 1567.532 -0.587 -0.0015 1 0.00026

author: wanghar
author_rank: Contributor
timestamp: September 02, 2025, 09:15:36 am
content: @iMo Yes the small value res should be there and close to CPLD chip. I've placed them on some I/Os, but not all — for example, the MUX0-2 pins. I'll probably add them in the next revision.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 02, 2025, 04:29:40 pm
content: The OP-amps are connected as voltage followers. To be closer to the integrator it should be more as a slowed down inverting amplifier.As a second point the switches are all working between 2 voltages and not with one input at ground. So the conditions for the switches would be quite different than in the NU180.I would at least connect one, maybe 2 connected more as current steering and the amplifier as inverting amplifier.

author: Zondar
author_rank: Regular Contributor
timestamp: September 02, 2025, 04:50:22 pm
content: Actually, the op-amps are intended to act as charge-integrating amplifiers. The resistor is to be 1M Ohms or larger, just to provide weak DC feedback for low-frequency stabilization.The switches are operated between VDD and VSS, where VSS is intended to be -0.6V as in A3 (i.e., via Pin 52, "GND2"). However, VSS can be connected to normal ground if desired (or even +/- 2.5V).I'm not sure it will work, but the idea is to operate the switch via a waveform generator and alternately integrate charge towards VDD and VSS. The duty cycle can then be adjusted to achieve balance.Edit: I did have the op-amps hooked up wrong! Thanks for catching that. Here it is again:

author: Zondar
author_rank: Regular Contributor
timestamp: September 02, 2025, 09:13:29 pm
content: I heard back from Texas Components. They do seem very responsive.Three different Vishay part numbers, some through-hole and some surface mount (Z201, VSM2010, FRSM2512), were offered for 80k resistors (0.01%, 0.2ppm). Prices varied a little, but let's say that 10-12 parts costs the same as 25 of the "maybe in 6 months" parts.I also inquired about a 9 resistor network (1x 50, 4x 80, 4x 20), but it will take a little longer to work out if that's practical.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 02, 2025, 09:45:18 pm
content: To get some charge integration the input signal must go to the inverting input. So the OP-amp part needs a change.As shown the switches would see quite different conditions as in the 3458. The voltage at the switch pins would change quite a bit. In the 3458 all 3 pins from the switches would still stay close to ground.If one wants some +-references (like +-5 V or +-7 V) one should consider including the inverter for the reference.One may even get away with zero voltage as input.For testing the resistors, a set of 4 resitors in a ring would be a minimalistic bridge. Just the resistors connected to one point would help relatively little.The 20 K resistors for the fast part would be far less critical. They would only effect the really fast part and this already depends on the external 5 ppm/K TC resistor R181 and 2 rel. simple OP-amps.

author: Zondar
author_rank: Regular Contributor
timestamp: September 02, 2025, 11:30:19 pm
content: I did correct the schematic and layout, or is there some other error in it still? Also, I know it's not the same. I just wanted something a little dynamic to look at.Since 0.2 ppm/C 80k's are available after all (at a price), I don't think there's much purpose left in trying to sort 10ppm resistors. I'll certainly use cheaper resistors for the first trials, though.My focus will be back on the NU180 board now, since I have to redo it from scratch yet again (resistor footprints have to be made larger, which messes everything up).I noted the noise tests by wanghar, which are a little startling. I wonder which parameters in the spec sheets, if any, reflect noise? I suppose bandwidth differences are a possibility. The TMUX version he tried quotes 200 MHz under certain conditions. The ADG version quotes 160 MHz, -3dB. The 74LV4053 doesn't seem to list that, but its on-resistance is far higher, so one presumes that the bandwidth is lower. It's not clear to me what the bandwidth needs to be, but when using multi-kilo-Ohm resistors, it can't be too high. What other parameters might indicate noisy vs. quiet switches?The 74LV4053 isn't as appropriate for this project since the control scheme is different, the on-resistance is higher than any of U180's switches, and 4 channels would be better if possible. I'm still open to suggestions, including a little higher on-resistance ones if there are other benefits. I had a quick look at the TS3A5018 10-Ω chip, for example. It has higher on-resistance but other parameters are a little better.

author: Zondar
author_rank: Regular Contributor
timestamp: September 03, 2025, 12:11:52 am
content: More questions for the experts:* Any soldering has to be brutal on finely-tuned resistors. So for best ability to move resistors from one board to another without damage, which is preferred, through-hole or SMD?* Vishay's VSM and FRSM line of resistors have virtually identical specs, yet are distinctly different. Any experience or recommendations?Thanks.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 03, 2025, 06:03:22 am
content: The TS3A5018 does not work at all: the 4 switches have a common control signal. So not 4 x SPDT but 1 x 4PDT.For the test board the amplifier part looks OK, but the swiches are still a different configuration and thus testing different parameters.I see 4 ways the switches contribute to the noise:1) Jitter or timing noise2) the capacitance at the COM pin. This capacitane is connected and disconnected from the integrator many times during run up. This gives so called reset noise, which is kind of the equvalent to the Johnson resistor noise but for a swit ched capacitor circuit. So here the capacitance is the relevent parameter. This part can be calculated - I still miss the frequency of Wanghar's test, but I don't think this part would explain the whole difference.This noise contribution is proportional to the square root of the capacitance.3) the same capacitance also works as a charge pump. It causes extra charge from residual voltage at the integrator vs ground for the switches. Here the added noise depends on the noise in the residual voltage. In addition to noise, this mechanism may also contribute to the INL.This noise contribution is proportional to the capacitance.4) The net charge injection of a switching cycle can depend on the supply voltage and CM voltage at the switch. This gives some coupling from supply voltage noise and again possible INL contributions from variations in the supply the correlate with the signal. I have tested the supply sensitivity with my ADC and it is not a big factor. The charge injection quoted in the datasheets in the turn off part and this is different from the sum over the on/off cycle.Most of the parameters are not given in the datasheets. It is mainly the capacitance that is usually noted at least for some cases. What matters is the off state capacitance for the COM terminal, that may not be conventional measurable for the SPDT switches without an enable. In addition one could argue to add some of the gate capacitance. The BW reflects the R_on to capacitance ratio but would not be directly relevant. It can be a first hint on the capacitance.The R_on of the LV4053 is not that far off from the U180 original. The meaured resistance was 14 ohms for the input path and the ref. paths should be 8/5 of this or 22.4 ohm. Thus just at the typical 23 ohm for the LV4053. For slightly better (still not ideal, but acceptable) matching one would have 2 switches in parallel for the input. Because of the higher resistance the LV4053 would however want the supply voltage modulation as in the original U180. One might still get way with a selected resistor instead of a dummy switch. Without a change in the resistors on the A3 bord one would need 2 of the LV4053 switches for the dummy.The LV4053 has 3 switches per chip, but the configuartion is suiteable (just the unused enable pin).One would likely need 3 x LV4053 and 2 lower resitance switches (e.g. ADG733/734) for the fast part.

author: wanghar
author_rank: Contributor
timestamp: September 03, 2025, 07:01:38 am
content: @Kleinstein One my board（2.2nF integ. Capacitor）the Vrefs input should be switched at the frequency of 45.9KHz. This frequency is much slower compared to the 3458A's 330KHz.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 03, 2025, 08:24:28 am
content: One could do a noise test also with a 2nd higher modulation frequency. There is no need to change the integrator capacitor for this (larger capacitor is OK, just a missed opportunity to get even less final charge noise, which is anyway small).The comparison of 2 (maybe 3) frequencies could tell how much of the noise is frequency dependent and maybe even decide between a more ~f or ~ sqrt(f) part.If the switch noise is already visible with 50 kHz modulation it would be quite a bit worse in the 3458 with 330 kHz . Double the active switches for the references makes things worse for the capacitive parts but it helps with the jitter with a faktor sqrt(1/2).I also did a few tests with different switches (HC4053 from Ti and ST) and max4053. These have less / comparable capacitance and still showed more noise. The extra noise there is very likely from jitter.

author: wanghar
author_rank: Contributor
timestamp: September 03, 2025, 01:29:38 pm
content: Quick test result @ 153.8KHz modulation frequency, observed a noticeable jump in noise. The last column is noise_rms values in mV:74LV4053：Code:0 184933.967 184934.778 -0.831 -0.0178 58 0.000960 184933.975 184934.789 -0.755 -0.0179 -63 0.001020 184933.963 184934.774 -0.841 -0.0178 85 0.001050 184933.951 184934.763 -0.790 -0.0179 -62 0.001120 184933.956 184934.765 -0.838 -0.0177 62 0.000940 184933.970 184934.778 -0.760 -0.0177 -46 0.001040 184933.959 184934.768 -0.792 -0.0177 26 0.001040 184933.959 184934.774 -0.816 -0.0180 -36 0.001040 184933.960 184934.776 -0.807 -0.0180 20 0.000850 184933.956 184934.772 -0.777 -0.0180 -10 0.00103ADG733:Code:0 314516.297 314516.542 -0.277 0.0059 -20 0.001300 314516.290 314516.549 -0.213 0.0052 12 0.001340 314516.294 314516.541 -0.269 0.0058 15 0.001300 314516.290 314516.549 -0.242 0.0053 -9 0.001140 314516.299 314516.555 -0.260 0.0054 10 0.001130 314516.298 314516.552 -0.254 0.0055 -21 0.001450 314516.308 314516.567 -0.276 0.0053 24 0.001460 314516.301 314516.568 -0.271 0.0049 -60 0.001310 314516.313 314516.572 -0.242 0.0053 76 0.001040 314516.311 314516.571 -0.329 0.0052 60 0.00139With a 2.2nF integrating cap @ 153.8KHz, the Vpp on the cap is only 1.3V. The integrator's efficiency is way too low . Try a 330pF or 470pF C0G tomorrow.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 03, 2025, 05:06:28 pm
content: The low voltage at the integrator output should not be an issue. 1.3 V are still not that little. The rundown part is uneffected by how fast the modulation during run-up is. I have done my test with higher frequencies (AFAIR up to some 350 kHz) also with a 2.2 nF integration capacitor. A smaller capacitor should not make a difference.The quite a bit higher noise with 150 kHz moduation suggests that there is still some kind of jitter or switching related issue.This not necessary only the switches but can also be the clock of FF with it's supply / decoupling.Normal jitter and the anvoidable capacitive part should only go up like the square root of the frequency.Some 400 nV of noise are expected for the non switch related sources. With the LV4053 at 50 kHz this would leave some 570 nV for the switch part. Multiplyed with square root 3 this would be around 1000 nV and together with 400 nV from the rest some 1070 nV, which is a bit more than observed, but still in the ballpark. Normally there should be less switching related noise with the LV4053.

author: miro123
author_rank: Frequent Contributor
timestamp: September 03, 2025, 09:15:05 pm
content: Quote from: wanghar on August 22, 2025, 10:41:10 amThe design look like lift up to more modern design.Few thinks still bother me1. The slope amplifier output generates voltages at TP4 within the range of (-0.6....+1.2V) - the comparator is powered at 0...3V3. Kleinstein is doing the same. Do I miss something?2. Is there a better switches choice than 4053? - Does somebody tried some modern low leakage low charge injection SDPTs from TI or AD?3. Does NE5534 look like thermonuclear reactor on FLIR images - there are plenty of other options - e.g I have some OPA209 at my shelf. They cost $1.4855 for single pcs. and $1.355 for 10+ at lcsc.com

author: Kleinstein
author_rank: Super Contributor
timestamp: September 03, 2025, 10:08:53 pm
content: For the comparator I have a simple voltage divider towards 5 V or 3.3 V to shift the voltage a little up. So the voltage that reaches the comparator is no linger -0.6 to 1.2 V but more like 0.2 V to 1.2 V.The NE5534 is indeed running a bit hot. With the resistor at the input there is actually no need for super low noise or the high speed. In the newer version with STM32 I have an OPA197 with more moderate power consumption.The 74LV4053 switches so far work quite well. In my tests it was better than the old Cd4053 and HC4053 (not really a surprize) and max4053A.Wanghar's tests are with ADG733 and mux1133 and these 2 types don't seem to work that well.Low charge injection is somewhat desirable, but not the only parameter to look at.The targets are about (lower is better, but one tends to need a compromise):C_COM_off < ~ 25 pF for the NU180 better < 15 pF as the frequency is higher and double the active ref. switchesJitter < 1.5 ps (random jitter), this is rarely specified - expected to come with high speedCharge injection < ~ 5 pC ? a bit unclear, the DS values are only for the off part.Leakage < ~1 nA , maybe a bit more critical with 3458 because of more switchesR_on <~ 30 ohm, with the supply modulation as in the 3458 even 50 ohms may be OK, with better matching (15 V ref. case) even more

author: wanghar
author_rank: Contributor
timestamp: September 04, 2025, 02:06:54 am
content: modulation frequency of runup @330KHz, still 2.2nF integrator cap and 74LV4053. Not very good but not too bad.Code:0 246351.762 246354.581 -2.863 -0.0947 -8 0.001200 246351.766 246354.580 -2.861 -0.0945 9 0.001120 246351.766 246354.578 -2.841 -0.0943 12 0.001380 246351.774 246354.596 -2.806 -0.0948 -4 0.001280 246351.782 246354.609 -2.821 -0.0949 2 0.000800 246351.775 246354.599 -2.782 -0.0949 12 0.001450 246351.788 246354.605 -2.782 -0.0946 2 0.001320 246351.789 246354.611 -2.817 -0.0948 -10 0.001280 246351.796 246354.615 -2.810 -0.0947 -8 0.001010 246351.799 246354.624 -2.827 -0.0949 -8 0.001200 246351.815 246354.635 -2.825 -0.0947 4 0.00116

author: wanghar
author_rank: Contributor
timestamp: September 04, 2025, 08:07:37 am
content: @miro1231. On the comparator's voltage threshold:The signal from the slope amplifier is not only sent to the comparator it also goes to the amplifier circuit for the auxiliary ADC. To keep the ADC readings within a usable range, the allowable values for the voltage threshold are actually restricted. This is the reason for the variable resistor (trimpot) D27 there. On the actual board, this voltage sits at around 0.1-0.2V.2. Looking for a better switch than the LV4053:Especially for applications like the 3458A(NU180) with its 330KHz modulation frequency, still searching for a better alternative. So far, aside from the MAX4619 (not available and tested yet), none of the other options I've tried have performed better than the LV4053, even though their specs look superior on paper. Of course, it's also possible that the board layout I'm using for testing has its own limitations.3. Using the NE5534 as the slope amplifier:The NE5534 does an okay job here. It does run a bit warm with its 4mA quiescent current. Replacing it with an OPA197 or OPA209 would definitely work, but the OPA209 feels a bit overkill for this.

author: Zondar
author_rank: Regular Contributor
timestamp: September 04, 2025, 02:58:27 pm
content: Two things:* I changed the earlier ADG734 test board to better reflect U180's approach, and submitted it for fab.* Because of the recent discussion, I submitted a second test board based on the 74LV4053, as seen below.I don't think either board will help much with measurements or decisions. They are more to have something on hand to play with in case that's desired.I'm still a believer in low on-resistance for a number of reasons, and feel the 4053's is too high. In addition, I'm very much not in favor of putting switches in parallel, and I also dislike how 3 switches per package throws parts of the layout off. However, real data is valuable, and I'm watching that with great interest.I spent some time on a new NU180 layout. The precision resistors are fairly large. I can just barely squeeze the most important resistors and their switches in the center of the PGA, where they typically have shorter traces, etc. The rest has to hang off to the side, with some awkward wires running across everything.I'd strongly prefer to settle on which switches should be used before finishing a 5th revision.Edit: Another problem with the 4053 is that it's a 0-5V type part that doesn't seem to allow for split supplies. I have tried to use U180's voltages as-is to the fullest degree possible. In particular, I use GND2 as in U180 for the switch's lower rail instead of GND (as the 4053 would seem to require). My presumption is that HP wanted that rail to be at least a little below ground (about -0.6V) so that signal ground isn't right against the rail. I approve of that choice and prefer to keep it.

author: Zondar
author_rank: Regular Contributor
timestamp: September 04, 2025, 10:31:09 pm
content: I did yet another layout of NU180 using ADG734's. It can be redone with others like the 4053's if desired. The latter comes in a smaller package and may fit in the same general space. I'm not completely happy with the layout, as there was some struggle to fit everything, but it's essentially ready to be fabriacated.The 5 largest resistors (2010 English) inside the PGA are the 50k and the 80k's. These are the smallest that can be had with 0.2 ppm/C with these values (80k's being custom-made). The 7 medium sized ones (1206), also inside of the PGA are the 10k's and 20k's, which are also available in-stock with 0.2 ppm/C. The small ones (805) in the lower middle are the other main ones (24k, 4.14k, 6k, 37.5k, 16.7k), which are not available with 0.2 ppm unless custom-ordered, and are generally in the 10 to 25 ppm range. I did also add resistors in series with the switch controls as people advocate.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 05, 2025, 05:08:10 am
content: The signal at the switches should not go much below ground. This should only be less than some 50 mV (one should get a reasonable guess from a simulation) from the integrator input settling. CMOS switches have no issue with this. It is only at some -300 mV when the "didoes" to the supply kick in and cause leakage. The slightly negative voltage in the 3458 is likely there not because the signal excursions, but to get better blocking / off the the N channel fets. If really needed, one could also use the slightly negative voltage to supply the switches (may than need to remove the same diode drop from the top). The slight shift would still give an acceptible logic signal at the input. This could still be a point testing upfront, as the sifted supply can cause extra jitter and complicate decoupling.The supplies would be a thing that may want a few options for tests. Extra decoupling for the dual supply would also make sense, at least as an option to test.The down side of the dual supply switch chips is that they need an extra level shifter stage and this adds a little to the jitter.The 20 K reistors should not need super low TC. They work together with a 10 K 5 ppm/K resistor on the A3 board. A little better than 5 ppm/K could help with the zero drift for the super fast conversion. For the matching to the 80 K part there is anyway the R_on of the switches that limits things here. This also applies to the gain if only 1 switch is used for the input. With 2.5 ohm switch resistance and 20 K this would be some -0.5 ppm/K for the gain TC as a starting point. This would be still well OK for the fast mode. With much higher resistance switches doubled switched for the fast input would be a good idea. The 6K/4.14 K part should be reasonable stable as they effect the overall gain. With cheaper resistors I would consider the same series 6 K and a parallel resistor for the 4.14 K to get a bit better matching. The 37.5 K / 16.7 K are not as critical and 25 ppm/K parts should be Ok there. Similar the 24 K and related 10 K for the 5 V smaller ref. are not that critical.To allow using the same PCB also with lower grade smaller resistors (e.g. first test) it would make sense to have alternative footprints to the 2010 size.

author: Zondar
author_rank: Regular Contributor
timestamp: September 05, 2025, 02:23:24 pm
content: I understand that the voltage levels shouldn't drop much below ground, but I prefer to stick with HP's choice to provide about -0.6V headroom there. I also don't want to play games with CMOS thresholds, etc., so I want to use switches that properly allow a split supply. I'm also not going to get stressed out about jitter right now.I am willing to make a version using 4053's (or others) if that turns out to be necessary or beneficial. But unless help with testing is available, I'll probably start with the ADG's or any better one with a split supply.These resistors are available in-stock with 0.2ppm TCR: 50k, 20k, 10k.This is available in stock with 2ppm: 24k.This is available in stock with 5ppm: 6k.The remainder are available with 10ppm: 80k, 37.5, 16.7, 4.14.Of course, we are discussing buying custom-ordered 80k's with 0.2ppm.Except for the 0.2 ppm resistors, these are mostly inexpensive enough that you might as well use the best ones available. The real question is whether any of the others also need custom levels of ppm's. So is 5ppm for the 6k and 10 for the 4.14 good enough? Would you care to review them resistor by resistor and comment explicitly on any that need more attention?Yes, a few of the footprints need to be changed to use cheap versions of the 80's and 50k, which I will definitely do to start with, but that is less than 5 minutes of work to change.Unfortunately, I will probably have to redo the layout yet again, because I may need to go to the next size up still for the 80's and 50's. (It seems that higher resistances need larger areas to meet all specs, or else with the foil ones there just isn't enough range in a smaller package.)If so, I probably won't be able to fit any switches inside the PGA area. Instead, I'll try to fit all the resistors inside the PGA area, and all switches outside. The problem is that the only room is to the right, and just a little to the left, with a cut-out needed to avoid an annoyingly-placed test point. (Then I started fantasizing that maybe all the resistors should be on their own tiny "hybrid" daughter-card. Hmm, maybe not.)It's funny: When I look at the red and blue top and bottom metal in KiCad, what my brain incorrectly "sees" is polysilicon and metal1 in a CMOS circuit. And I keep using the (wrong) hot-keys from the CAD software I used 20 years ago. It drives me nuts!

author: iMo
author_rank: Super Contributor
timestamp: September 05, 2025, 03:50:36 pm
content: Perhaps a fully OT idea at this stage (as there will be a lot of iterations of that board, imho) - when all the resistors will be placed inside the NU180 pinout, you may, for example, put a heater from the bottom side, including a temperature regulation (like keeping them all at say 50C). Then some cutouts on the pcb at the right hand side may help - isolating the switches and FPGA thermally a little bit..

author: Kleinstein
author_rank: Super Contributor
timestamp: September 05, 2025, 04:24:41 pm
content: For the ADC only the slow mode (via 50 K input resistor) is really critical and needs low TC. The fast mode (e.g. for AC) is though the external 10 K resistor anyway and thus a higher TC. So I would not care that much about this part.The 50 K and 80 K resistors are the most critical ones. The 50 K in additional also effects linearity, not just the gain TC.The 20 K resistors for the reference should get away with 5 ppm/K resistors as they are relative to another 5 ppm/K.They should still match to some 0.2 to 0.5% or so to the 80 KThe 6K + 4.14 K effect the gain TC, with roughly 40% sensitivity. So a bit less critical than the 50K/80 K.With 6 K + 13.3 K for the 4.14 K one could get away with 5 ppm/K resistors. Accuracy for the ratio is not that important (e.g. 2 % off could be OK)The absolute value should not be that critical. One could also use slightly larger values here, like 7.5 K and 5.1 K or maybe even 5 K and 7.5 K from a 4 x 5 K array (e.g. MORN) with a slight change that the SW would complain with too low a ref. voltage.For the 10K+10K for the 12 to -12 V step the matching should be good, like 0.1%. I would consider an array like Susumu RM3216 or MPMT.... with good matching tolerance. The absolute value does not matter at all (e.g. +-50%)The 24 K and relate 10 K for the -12 to 5 V step should not be too critical, like 0.2% maybe 0.5% and a TC of 10 ppm/K maybe 25 ppm/K.Similar are the 37.5 K and 16.7 K. Here the right value may be more like 16.6 K instead of 16.7 V though with some 0.2 to 0.5% tolerance this may not matter. If needed on could add some 2.7 M in parallel to the 16.7 K at pin 19. The 37K and 16.7 K connected to pins 21 and 23 are even less critical (e.g. 1% would be OK) and no need to worry about the details there.For the reference resistors (80 K and 20 K) the nodes to the switches should be not too much capacitance. So ideally have these connections no too long. The other parts should be less critical.Instead of a heater, one may consider trimming the gain TC with a suitable resistor in the 6 K / 4.14 K pair. So build up first with a mix of resistors and than exchange one resistor with a suitable TC.

author: Zondar
author_rank: Regular Contributor
timestamp: September 05, 2025, 11:43:03 pm
content: I did another layout, this time with the main resistors within the PGA. This was more difficult than the prior version, and yet the earlier version is slightly tighter. However, this one accomodates 2512 resistors, whereas the prior one topped out at 2010.I put the 50k Ohm and the 80k's in a centroid fashion. The 20's somewhat also.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 06, 2025, 08:17:23 am
content: With the really good resistors the symmetry of the resistors in the layout should be less of an issue. The tricky parts are more decoupling and ground for the switches (to get low jitter and similar). I would definitely test the PCB first with simpler resitors to check if the layout and the switches are acceptable (no too much extra noise and INL from delay modulation).

author: Zondar
author_rank: Regular Contributor
timestamp: September 06, 2025, 03:22:45 pm
content: I wasn't very happy with the prior version (squeezing everything in got too chaotic and messy), so I started over again. This time I began by planning out one of the worst problems: getting so many tracks from one end of the board to the other while having to snake in-between the PGA pins. The result is much cleaner. I also committed to 2512-sized resistors for the 50k and 80k's, as there are more high-valued foil resistor options in this size.This version finally feels like it's worthy of a real prototype, and I'll put it into fabrication soon.

author: Zondar
author_rank: Regular Contributor
timestamp: September 06, 2025, 11:29:23 pm
content: My next task is to design a small "motherboard" to plug the NU180 into. At a minimum, I want stable and convenient access to its pins for power, references, clock, control signals, resistors, etc.So aside from breaking the pins out, are there any suggestions for inclusion? Also consider that the genuine U180 could be plugged in for measurements too.Thank you.

author: coppercone2
author_rank: Super Contributor
timestamp: September 06, 2025, 11:43:50 pm
content: yeah maybe current shunts, so you can probe itand probobly local high frequency decoupling

author: Kleinstein
author_rank: Super Contributor
timestamp: September 07, 2025, 06:59:03 am
content: For the U180 testing board, one could consider some kind of relatively simple ADC. So a bit like the board from Wanghar and the U180 replacing the 4053 type switch and precision resistors.So supply regulators for some +-15 V and 5 V , a voltage reference (likely LM399/1N829 or similar), some CPLD or µC for the control, an input buffer (could be a bit simpler with a single OP-amp - an OPA182 / LTC2057 should be pretty linear) and MUX for the input.Compared to the original A3 board one should get away with a 2 OP-amp integrator and a LM311 comparator. No need for the Zjump part.p.s.:It would make sense to test points also accessible with the NU180 installed.Chances are good that one can get away with a 2 layer PCB.

author: Zondar
author_rank: Regular Contributor
timestamp: September 08, 2025, 09:02:02 pm
content: I submitted a version of NU180 with size 1206 resistors for the 50 and 80k's instead of 2506 for better availability, and ordered parts for it.Here is the breakdown of the resistor values purchased. Note that these parts are for a functionality-test prototype using less expensive resistors. The proper version should have 0.2 ppm/C resistors for the most critical components, and better parts elsewhere if available too.50k: 0.01%, 2 ppm/C80k: 0.1%, 10 ppm/C (best available in any size)20k: 0.01%, 2 ppm/C10k: 0.01%, 2 ppm/C24k: 0.05%, 10 ppm/C37.4: 0.1%, 10 ppm/C *16.7: 0.1%, 25 ppm/C4.12: 0.1%, 10 ppm/C *5.97: 0.05%, 5 ppm/C ** closest available resistance values.I'm still working on the NU180 test "motherboard" since I'm still figuring out what I want to do with it. It will probably be bare-bones, though.I think I'm going to custom order the 50k along with the 80k's. I don't think the price of the 50 will be too different from what's available in stock (>$40 each), and the hope is that matching might be better given that all 5 parts should be from the same batch.(Oh, and I found and corrected an error in the schematic and board: one of the switches had its power and ground reversed - yikes!)

author: coppercone2
author_rank: Super Contributor
timestamp: September 08, 2025, 09:05:01 pm
content: you can build a drift matcher with a light bulb in a styrofoam shipping box and a thermocouple.I wonder if anyone built a characterizer that is more compact & fast yet, for small resistors

author: Zondar
author_rank: Regular Contributor
timestamp: September 20, 2025, 02:42:02 am
content: I received the NU180 boards back. I had half expected a comedy of errors, and unfortunately that turned out to be the case: I used the wrong footprint for the switches. Darn! I have to respin the boards. The proper footprint is larger, but my latest design had put the switches outside the PGA, where they can take up a little more room without too much trouble. (Also, DigiKey messed up my order, and still hasn't fixed it.)Since I have little else to report so far, here's a review of OSHPark, which I tried for the first time:They are super smooth to work with if you use KiCad. You just upload your project, and they do the rest. They present clear images of all layers for you to check out before confirming your order, which adds confidence. Ordering stencils is similarly easy. The boards and stencils are made in the USA.For small boards of a few square inches, the cost is quite reasonable, but for larger boards the cost will be higher than some of the other usual outfits. The 6 layer NU180 board cost $15 per square inch, for a total of $48 for three parts including free shipping by U.S. mail (faster options available).I'd say they are a little slow relative to some alternatives, taking 2-3 weeks including time in the mail. But out of the four boards I've ordered so far, they put two on their higher-cost "swift" service without charge, which saves a week or so.It's a matter of taste, but I don't like the purple finish that's your only option for most boards. The boards also come back with a few annoying sharp points along each edge, but they are trivial to sand off.I'll probably get a corrected version out to fab by Monday.

author: IanJ
author_rank: Unknown
timestamp: September 20, 2025, 07:55:54 am
content: Quote from: Zondar on September 20, 2025, 02:42:02 amTry PcbWay next time, the repeatability of quality is higher IMHO.Ian.

author: Zondar
author_rank: Regular Contributor
timestamp: September 20, 2025, 12:50:04 pm
content: Quote from: IanJ on September 20, 2025, 07:55:54 amI wanted to try a US manufacturer this time. Who else is left here? Who elsewillbe left? Anyway, I think OSH is fine for the hobbyist-scale projects that are their niche, and I didn't see any quality problems aside from the pointy panelization remnants. And like I said, the process wasverysmooth.

author: MiDi
author_rank: Frequent Contributor
timestamp: September 20, 2025, 03:23:48 pm
content: Which Dev-Software and Programmer do you use to program CPLD ATF1502AS?

author: Zondar
author_rank: Regular Contributor
timestamp: September 20, 2025, 05:15:17 pm
content: Quote from: MiDi on September 20, 2025, 03:23:48 pmI went with the ATF1502 because it's about the only part in current production that is 5V compatible.* But I haven't used them before and so I'm just now trying to figure that out.From Atmel, the standard free software would be the ancient "WinCUPL." I note that they have just now come out with "WinCUPL 2", but it's in Beta with no documentation. Since the task is very simple, I can probably get by with WinCUPL.My experience with FPGA's has been exclusively in the Xilinx ecosystem, and I can probably find one of their programmers around somewhere if that will work. Otherwise, I'm uncertain about which will do and what software will operate it. There are a lot of ~$20 programmers out there, but I don't have experience with them.If anyone has recommendations, please let me know. Thank you!Edit: Atmel provides support for programming the ATF1500 series via part ATDH1150USB and the ATMISP program. The device is a bit expensive at ~$100 given that it (officially) supports only those devices. I suspect there isn't anything special about it vs. other JTAG programmers, but at least there's some confidence that it will work.The good news is that the faulty NU180 board is still useful to test programming and running the CPLD, and so I've soldered that up. If I can find my old Xilinx programmer, I'll try that with the ATMISP program, and if that doesn't work, I'll order the ATDH part.* Having 5V outputs turned out to not be necessary after all (no digital signals are sent to the A3 board), but I'll use this part for now anyway.

author: MiDi
author_rank: Frequent Contributor
timestamp: September 21, 2025, 10:53:49 am
content: A cheap way might be:- dev with WinCUPL (or manually with editor & compile with CUPL)- convert JED to SVF with ATMISP or fuseconv.py- FT232H as JTAG programmer- ISP over JTAG with OpenOCD or AfterburnerSources:https://www.hackup.net/2020/01/erasing-and-programming-the-atf1504-cpld/https://github.com/peterzieba/5Vpld

author: voltsandjolts
author_rank: Unknown
timestamp: September 21, 2025, 11:49:52 am
content: If high propogation delays of 'a few us' could be tolerated, an mcu might function as the control logic at much less power than these PLDs consume/emit.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 21, 2025, 12:32:19 pm
content: For the U180 replacement there is not much spare time for delays. It's a 20 MHz clock and for the sync flip flops and thus less then 50 ns, likely more in the 20-30 ns range of setup time. So already the slow version of the ATF150 may not be enough, but the faster one should be OK.A µC may be an option for the control of an ADC circuit to test the U180 replacement, though it could still be a bit tricky in parts.

author: Zondar
author_rank: Regular Contributor
timestamp: September 21, 2025, 02:21:26 pm
content: Right, the timing demands are too tight for a uC, except for testing.The CPLD isn't doing more than decoding inputs and latching outputs. I have uC's such as Arduino's in my parts bin, but a dual-output function generator will do to prove functionality and measure propagation delays. That is, one ARB output to control an input line, and one as a clock (with the other inputs tied to power or ground).Yes, the basic JTAG programmers are really just fancy USB to serial converters, e.g. via an FTDI chip. This "multi-protocol" version, for example, should work:https://www.adafruit.com/product/2264But rather than spend time figuring out problems (there arealwaysproblems!), I'm OK with spending money for an official programmer. This was never going to be a spare-change project.I've been thinking of making a simple interposer board that can sit between the A3 socket and the genuine U180. Without something like that, it's impossible to see the signals too and from the A3 board unless you have access to the bottom of A3 (which I won't). I expect to have to compare the NU180 functioning against the genuine U180 at some point.

author: MiDi
author_rank: Frequent Contributor
timestamp: September 21, 2025, 06:04:57 pm
content: Just noticed that the ADG734 shows the switch states for input high (switch A on, B off).So forthis schematicthe switch states are inverted - not a big deal, but needs to be addressed in CPLD program.

author: Zondar
author_rank: Regular Contributor
timestamp: September 21, 2025, 07:06:31 pm
content: Thank you MiDi.That schematic also contains at least one serious error (reversed power and ground on one switch), which I found and fixed later. Also, although I used the incorrect footprint for the switches in the NU180 board, I used the correct one in my little switch test board. I will look at that sometime soon, as well as comparing it to the TI chip that people here championed.I certainly do need to check and confirm these sorts of details before attempting to run it in my machine!

author: MiDi
author_rank: Frequent Contributor
timestamp: September 21, 2025, 07:37:36 pm
content: CUPL code (untested):Code:Name U180 logic ;PartNo U180 ;Date 21.06.2025 ;Revision 01 ;Designer MiDi ;Company ;Assembly ;Location ;Device f1502tqfp44 ;/* *************** INPUT PINS ******************** */PIN 10 = ENR; /* */PIN 2 = ENS; /* */PIN 8 = SLA; /* */PIN 6 = SLB; /* */PIN 11 = RUR; /* */PIN 3 = RUZ; /* */PIN 12 = RUS; /* */PIN 37 = CLK; /* GCLK1 //* *************** OUTPUT PINS ******************** */PIN 13 = RUSN3; /* S0: 13 AC_AD */PIN 14 = RUSN2; /* S1: 14 AGND */PIN 18 = RUSN1; /* S2: 18 DC_AD */PIN 15 = LADSN; /* S3: 15 rundown ladder sum node */PIN 23 = NS2; /* S4: 23 negative RU speed ref2 */PIN 22 = NR2; /* S5: 22 negative RU resol ref2 */PIN 21 = NS1; /* S6: 21 negative RU speed ref1 */PIN 27 = NR1; /* S7: 27 negative RU resol ref1 */PIN 30 = PS2; /* S8: 30 positive RU speed ref2 */PIN 25 = PR2; /* S9: 25 positive RU resol ref2 */PIN 28 = PS1; /* S10: 28 positive RU speed ref1 */PIN 31 = PR1; /* S11: 31 positive RU resol ref1 */PIN 20 = ZERO; /* S17: 20 zero integrator *//* PIN = NENR; /* inverted ENR - not connected *//* PIN = NENS; /* inverted ENS - not connected *//* *************** CLOCK NET D-FF **************** */RUSN3.CK = !CLK;RUSN2.CK = !CLK;RUSN1.CK = !CLK;LADSN.CK = !CLK;NS2.CK = !CLK;NR2.CK = !CLK;NS1.CK = !CLK;NR1.CK = !CLK;PS2.CK = !CLK;PR2.CK = !CLK;PS1.CK = !CLK;PR1.CK = !CLK;ZERO.CK = !CLK;/* *************** DECODER LOGIC ***************** */RUSN3.D = !RUR & !RUZ & RUS;RUSN2.D = !RUR & RUZ & !RUS;RUSN1.D = RUR & !RUZ & !RUS;LADSN.D = (RUR & RUZ & RUS) # (RUR & RUZ & !RUS) # (RUR & !RUZ & RUS) # (!RUR & RUZ & RUS);NS2.D = ENS & !SLB;NR2.D = ENR & !SLB;NS1.D = ENS & !SLA;NR1.D = ENR & !SLA;PS2.D = ENS & SLB;PR2.D = ENR & SLB;PS1.D = ENS & SLA;PR1.D = ENR & SLA;ZERO.D = !ENR & !ENS & !RUR & !RUZ & !RUS;

author: Zondar
author_rank: Regular Contributor
timestamp: September 21, 2025, 08:50:59 pm
content: MiDi: Wow, awesome! Thank you for that!I'm going to order that programmer tomorrow so I can get the CPLD up and running. DigiKey has them in stock.It goes without saying, but this project wouldn't be possible without the work of yourself and others here and elsewhere. Thank you all.

author: Zondar
author_rank: Regular Contributor
timestamp: September 22, 2025, 02:15:38 am
content: I measured the ON resistance and OFF leakage current of the ADG734, using VDD=5V and either ground or -0.6V for Vss.ON = 2.33 Ohms with Vss=0V. This is quite close to what the specifications show. When VSS=-0.6V (per GND2), the ON resistance drops by about 0.1 Ohm.0FF = 80 pA leakage (12.5 G-Ohm equivalent). This is higher than the specified "typical" value of 10 pA, but lower than the "maximum" of 100 pA. It was difficult to detect a change in leakage between VSS=0V and -0.6V due to the level of noise in these measurements. Note that I did not clean the flux residue before measuring.

author: MiDi
author_rank: Frequent Contributor
timestamp: September 22, 2025, 05:50:02 am
content: Quote from: MiDi on September 21, 2025, 07:37:36 pmThe logic expression of ladsn can be simplified:LADSN.D = (RUR & RUZ) # (RUR & RUS) # (RUZ & RUS);

author: Kleinstein
author_rank: Super Contributor
timestamp: September 22, 2025, 07:34:35 am
content: The DS leakage is not that critical. In the ADC operation the switches see only a rather small voltage ( < 50 mV) between the switch sides.Also leakage would mainly cause some offset to the ADC, that is not that important. There is already input current of the LT1001 as a source of extra current to cause some offset.Even with the simplification, the decoding logic is still quite complicated and a bit much for implementation with seprate logic chips.

author: Zondar
author_rank: Regular Contributor
timestamp: September 22, 2025, 03:33:34 pm
content: I knew the leakage shouldn't be bad, but I was looking out for any surprises. And yes, I recognized early on that doing the logic in 74xx-style parts would be a bit much, hence the CPLD. The latter has 7.5 ns maximum pin-to-pin propagation delay, plus the minimal logic in the middle, so compared to the 50 ns minimum clock period (the latches are edge-triggered), I think it should be OK.I also looked at the ADG734's control to switch throughput delay time, i.e. using the control input to switch the analog output from 0V to 5V and back. The result is in line with the spec sheet (~15-20 ns), which I feel is slower than it should be, but it should also be OK. Surprisingly, TI does not have a specification for this timing for their 74LV4053, only for output enable delay, which is not pertinent to this project. I tried to look at it as well, but it turns out that I used the wrong footprint on that board too! Anyway, I'll continue with the ADG switches.I ordered the programmer this morning, so I should be able to look at the CPLD by this coming weekend.Also, thank you again MiDi, I really appreciate your help.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 22, 2025, 05:14:29 pm
content: The delay from the actual switches should not so super ciritical. The delay would have an effect somewhat similar to the comparator delay. It would effect the overshoot in the rundown and this way the actual time needed.The LV4053 DS seems to indeed miss specs for the normal swich control inputs. From the logic the speed should be similar to the INH input.From my understanding the relevant delay for the switches would be for the off part and thus 7 ns typ for the ADG734 with 5 V supply. This would be relevant also for the reference turn on. When the linkt to ground is separated, the reference current flows to the capacitance at the switch node. Some 20 pF of switch capacitance are enough to store the charge for the 15-30 ns that it takes to turn the other switch part on. So the reference effectively is already enabled once the ground like is separated.

author: Zondar
author_rank: Regular Contributor
timestamp: September 24, 2025, 11:24:59 pm
content: I have updated the NU180 board to correct the switch footprints. Corrections of this nature tends to make the layout messier, and so at some point I may do it over from scratch yet again. However, this "0.1" version should be good enough for functionality tests.I've created a Github repository for the design files. I have never used Github before, so please let me know if you have any issues with it. You can find it here:https://github.com/NuZondar/NU180This version uses 2512 footprints for the 80 and 50k's. You may want to change that to 1206's, etc., depending on what is available to you. You should be able to find parts for the others, as-is, without difficulty.Please provide feedback, corrections or improvements. Thank you.

author: iMo
author_rank: Super Contributor
timestamp: September 25, 2025, 09:43:48 am
content: QuoteHPAK ??PS: what I always did before sending the pcb files to the manufacturer I printed out the bottom and top sides on the paper 1:1 and placed all the parts on it in order to doublecheck all the part's pads fit fine..

author: Zondar
author_rank: Regular Contributor
timestamp: September 25, 2025, 02:52:48 pm
content: Quote from: iMo on September 25, 2025, 09:43:48 amCorrected, thanks.I was ordering the boards and parts at the same time, so I didn't have the opportunity to do something like that. Also, a lot of the footprints available in KiCad seem to be generic, quoting basic sizes instead of JEDEC "var" designations. This was my first KiCad project, so I'm still learning the finer details. But then, I've made mistakes even when ordering parts. Like the 33 Ohm resistors were somehow ordered in 0203 size instead of 0603.I'll order the new boards this morning.

author: MiDi
author_rank: Frequent Contributor
timestamp: September 25, 2025, 06:58:20 pm
content: Quote from: Zondar on September 24, 2025, 11:24:59 pmHopefully you have not ordered them, there are a couple of errors left:

author: Zondar
author_rank: Regular Contributor
timestamp: September 25, 2025, 07:57:54 pm
content: Thank you for the corrections. I cancelled the order and will resubmit a little later.1) Mixing up pins 25-27 was a terribly-obvious but quite serious error. Thank you for spotting it. The fixes were simple, and I've corrected the schematic and layout (not yet uploaded to Github).2) I don't think grounding the NC pins on the ADG's would have caused any problems, but I disconnected them. I consider anything floating to be bad by default, and so I do routinely ground NC's, though I did not risk doing so for the U180's NC pins.3) I should correct the "flips", however when I tried I found there many, many errors to be corrected, many of which were nightmarish. I'd really have to start nearly from scratch to fix all of them. So aside from causing confusion, the question is whether the "flips" are important given that the CPLD's control can be inverted at will, or if the errors are somehow more serious. You had pointed out those reversals earlier, and I think your CUPL code already took that into account? I could still make these corrections, but it will take another day or two of effort. What do you recommend?Another possible source of catastrophic errors that I'm paranoid about is the PGA pin arrangement. For that, I did the best I could using photos and a diagram I found on xdevs.org, but as I have not yet taken my A3 board out, I can't check anything personally.Thanks again.

author: coppercone2
author_rank: Super Contributor
timestamp: September 25, 2025, 09:20:31 pm
content: put jumper points for uncertain ground connections if possible. Then you can solder on them to see what happens. I found for tiny ones, its easier to solder wire then to mess about with a 0 ohm jumper.Also for probing you might wanna put a ground clip on part some where if you can fit it. For oscilloscope grabber. Its nice to have it on top instead of having some micro grabber attached to a pin going off into the PCB under it. I noticed with my PCB that I am not sure if they will work, having a solid grounding anchor point is very useful and cuts down on the nonsense.Last time I was probing a riser board on my keithley 2001 it was making me very frustrated, even with the best possible grounding clips. If they just had a pad on top that you can solder a ground test point it would be so much easier. You can solder loops of solid wire to a big capacitor or something, but its dodgy and makes me worried about the component. I used a micrograbber on the ground lead from the riser board, and while it seemed secure, it disconnected itself once or twice leading to confusion and wasted time. Those micrograbber need to be on the same direction as your probe, if they are shooting off to the side while you probe the top of the board they get disconnected easily.And you have two grounds, making it even more confusing

author: MiDi
author_rank: Frequent Contributor
timestamp: September 25, 2025, 10:37:12 pm
content: Quote from: Zondar on September 25, 2025, 07:57:54 pm1) & 3) are not that bad, as they can be fixed in CPLD logic, but 3) needs inverted logic for the outputs, 1) only needs different output pin assignments + renaming in schematics (both are not implemented in my CUPL code)I checked the pinout of U180, ADG734, CPLD and all resistor values & assignments - found no errors.The unconnected CPLD pins need to be set in "Pin-keeper Option", do not know if the compiler does that automatically.So besides mentally inverting the outputs of CPLD while probing, it should work - if there are no errors in pcb layout - did not check that.

author: Zondar
author_rank: Regular Contributor
timestamp: September 26, 2025, 01:46:24 am
content: I made all the suggested changes. I'm attaching the revised schematic and a screenshot below. This version uses 1206 resistor footprints, as that fits the less expensive resistors I ordered. Also, the two flags are harmless warnings.MiDi: Thank you for checking. But I am not sure I understand your comment about the switches being "shown in the ON position." Did you just mean the "flip"?Yes, I included one Vdd pin (the programmer needs one to set the right voltage) and one GND pin. I do have room for another one or two if desired. In the future, I'd recommend going to surface mount pins (the underside is exposed to the A3's electronics). But a good pair of flush-cutters and some Kapton tape will do for now.What else should be considered? Even if "pin keeper" is used, I'd suggest grounding the unused pins.

author: Zondar
author_rank: Regular Contributor
timestamp: September 27, 2025, 02:01:33 am
content: I submitted the updated NU180 board (see the above schematic) for fabrication.It probably won't enter production before Monday in case any more changes are needed or suggested.It's in fab now.I am finding Github to be baffling. I managed to upload the new version, but I don't know why the old one remains front and center on the project page. As it contains errors, I would wish it to be deleted, replaced or at least demoted.In other news, I received the programmer and my little support "motherboard," so I will hopefully get to test the CPLD this weekend.

author: Zondar
author_rank: Regular Contributor
timestamp: September 28, 2025, 08:54:58 pm
content: Despite Atmel's prehistoric programs and their trash documentation, I managed to program the CPLD (it was easy in the end). I just used MiDi's code to test programming it so far. The next step will be to update the code where necessary due to my last changes, build my little "motherboard," and verify the updated code's correctness.The new board will take 2-3 weeks to arrive still. I could take out my A3 board, solder in a socket, and check that it still runs with the genuine U180 back in it, but I'd rather have the new board fully built and tested first.

author: IanJ
author_rank: Unknown
timestamp: September 29, 2025, 07:08:35 am
content: Hi,Great work……looking forward to seeing this project progress.One observation on the Pcb, any reason some of the tracks are hugging some of the pads very closely? Within Pcb spec I’d guess but they are very, very close and could cause issues.Ian

author: Zondar
author_rank: Regular Contributor
timestamp: September 29, 2025, 02:34:39 pm
content: Ian: Thanks. The biggest headache with this layout was the need to get signals past U180's PGA pins, and to fit it in the A3 board while dodging nearby components, leading to the use of thin, crowded, "hugging" tracks. More room could be used if the board is elevated higher above the neighboring parts, though that doesn't help the PGA problem. Anyway, I acknowledge that it's not ideal. I probably did not take best advantage of the 6 layers I used, and I'm sure there are many details that could have been done better.This version is for functionality tests, and I'm sure after things are learned from it (no doubt the hard way!), the layout can be substantially improved. If there is a super expert here, I'm happy for them to give it a try, too.

author: Zondar
author_rank: Regular Contributor
timestamp: September 30, 2025, 12:08:46 am
content: I've been testing the CPLD's logic. I haven't checked every possible input combination yet, but so far things are looking good.

author: Zondar
author_rank: Regular Contributor
timestamp: October 01, 2025, 02:47:34 am
content: I measured the speed of the CPLD:Clock (falling edge) to output H to L delay = 6ns.Clock (falling edge) to output L to H delay = 7ns.Output rise time = 3.3 ns.Output fall time = 2.2 ns.I'd say that's pretty good!

author: iMo
author_rank: Super Contributor
timestamp: October 01, 2025, 07:30:20 am
content: BTW., did somebody try to write verilog code for those ATF150x in the Quartus II ? For example -people sayit is "compatible" with the EPM70xx series from Altera, what is needed in addition is to use the POF2JED tool (you may download it from the MCHP page) at the end. I've fired up my oldie Quartus 9.1 (afaik free) and I can see the chips there..PS: also yosys with atf2jed may work too..

author: Zondar
author_rank: Regular Contributor
timestamp: October 01, 2025, 03:05:50 pm
content: About the "pin keeper" function that MiDi mentioned: In the ATF1502, this is programmable. There is no information on how to turn this on or off in the Wincupl manual. However, I found this in an example, to be added immediately following the header block:PROPERTY ATMEL {PIN_KEEP = ON};I don't know what the default is, but I've seen many code examples that left it out while clearly having floating pins (in the code, at least). The pin-keeper function only places a 100k resistor in a feedback path to the pins, presumably including all of them if the above line is included (I haven't seen any way to turn it on individually). This should not interfere with normal I/O operations. Therefore, I would hope that the default is ON, but who knows.I haven't reprogrammed it with this in the code yet, but when I probe a "floating" node, I see 0V. That doesn't necessarily mean that pin-keeper is on, but I haven't seen any ill effects.With a 100kHz clock, the power consumption is 23 mA at 5V. With a 20 MHz clock, it's 25 mA.

author: Zondar
author_rank: Regular Contributor
timestamp: October 01, 2025, 07:46:01 pm
content: I'm trying to confirm my understanding of the CPLD's output characteristics: As seen in the screenshot below (blue=clock, red=output), outputs rise rapidly to about 4V, and then slowly the rest of the way to 5V.V_OH is quoted as "Output High Voltage (TTL)" being 2.4V Minimum with Vcc (the power supply) at "Min". Minimum Vcc is quoted as "5V+/- 10%" and on page 14 it's quoted as 4.75V. The minimum output level is obviously low, but it's for the case of a load to ground of 12 mA.The behavior would be expected if the output's pull-up transistor is N-channel, and if the "pin-keeper" defaults to ON (which I now believe it does). In the pin-keeper discussion, the output circuit is indeed shown with an N-channel pull-up. The pin-keeper circuit, on the other hand, appears to use a P-channel pull-up, albeit with a non-standard symbol. The net result should be a fast rise to Vcc-Vtn via the N-channel pull-up, and then the "pin keeper" circuit would slowly drag it up to 5V through its 100k resistor. That 100k and say 20 pF capacitance would result in a time constant of ~2 us, which does look about right for the gradual rise portion as seen in the snapshot. Is there agreement?Anyway, this is not ideal, but I think it's OK. The switch control inputs list 2.4V minimum for V_INH. There's also a general claim that the inputs are "TTL and CMOS compatible."

author: Zondar
author_rank: Regular Contributor
timestamp: October 02, 2025, 10:29:38 pm
content: I wanted to check if the CPLD's V_OH level might affect the on-resistance of the switch:The answer is no. The on-resistance of the switch remains essentially constant with a control voltage of 4V vs. 5V (about 2.4 Ohms). It does start to increase slightly, by ~0.1 Ohm, as the control voltage approaches the logic threshold, but that won't happen.The power consumption is also nearly unchanged. If anything, it goes down very slightly with the control voltage at 4V vs. 5V while clocked at 100 kHz. The chip uses very little power anyway, consuming perhaps 40 nA with a 100 kHz clock at 5V. (Spec sheet says 1 nA with a 3.3V DC control input and 3.3V supply.)Unless people have something to suggest, I think I'm done with preliminary tests until the new board arrives in a week or two.

author: wanghar
author_rank: Contributor
timestamp: October 06, 2025, 01:27:30 pm
content: Noticing that JLC has a considerable stock of LFCSP-packaged ADG788 (functionally equivalent to ADG734), I redesigned a PCB based on Zondor's schematic using this package. In addition to the switch package, the following minor modifications were made:The power supply for the rusn1/rusn2/rusn3 switches is connected to mod_in1. Voltage modulation might not play a significant role here, but having an independent power supply is certainly harmless.A high-voltage pathway for unlocking the JTAG is reserved on pin 38 of the ATF1502. This is because I encountered JTAG lock-up issues several times while programming the ATF1502 with OpenOCD on the experimental board.All resistors with precision requirements use the 0805 package, which is beneficial for PCB layout, though individual components need to be selected through sorting.Schematics is attached, please let me know if any issue is found. The PCB was designed using LCEDA. If anyone needs the complete project files, just let me know and I'll publish the PCB project. However, this version hasn't been tested yet.

author: Zondar
author_rank: Regular Contributor
timestamp: October 06, 2025, 03:46:15 pm
content: Awesome!!!I'm so happy to see others give this a go! With the participation of knowledgeable and experienced folk such as yourself and MiDi, I think these developments have a realistic chance of success.I had originally intended to use the ADG788's too, back when I was hoping to include everything inside the PGA outline, and a few of my earlier layouts incorporated them. However, since there really wasn't enough room for that, and since I'm doing the surface-mount soldering myself, I switched to the easier to solder packages. Using JLC to mount the 788's will give you a good head-start.I suspect that you will want or most likely need to use larger resistor packages eventually, but for a prototype the 0805's should do.It was wise to include the higher-voltage supply for the CPLD. I had a scare myself when I first tried programming it and got an error message about JTAG being disabled, but it turned out to be a false alarm.Your (top layer) layout looks good, and I'd like to see more, as I'm not completely happy with my own layout. However, links to information about lceda aren't working for me at the moment. I'll look into it more later.Again, it's so great to see people jumping in with their own attempts!

author: Kleinstein
author_rank: Super Contributor
timestamp: October 06, 2025, 05:21:07 pm
content: It does not make much sense to send the RUSN3 path also through the switch with the modulated supply. The modulation would be from the wrong signal.It would make more sense (though still not making a big difference) to have 2 switches in parallel here to have better TC compensation for the AC input.The unused switch with the modulated supply could be used for the dummy as modulation sense. Here matching to the RUSN1 switch would make some sense, though not absolutely required.When using separate resistors it could make sense to use some of the 80 K resistors to make up the main part of the 50 K. This way one could use the matching effect of resistors from the same series. 1 resistor in prallel with 2 in series is already pretty close (53.33 K ) and a parallel resistor could than be used for the fine trim. Also the simple 2 x 80 K in parallel and an extra 10 K would make sense.No sure if 37.5 K are readily available. One may consider a pair of more common resistor values as used with the new A3 version for the 37.5 K on the PCB.

author: Zondar
author_rank: Regular Contributor
timestamp: October 06, 2025, 06:55:35 pm
content: I don't think it's necessary to mimic every minor feature of U180. I'm sure H.P. had the best people available working on it, but they still made choices based on compromises and intuition that may not be as pertinent today as it was ~40 years ago.For example, reducing the on-resistance of switches is a valid (partial?) substitute for switch voltage modulation. After all, if the on-resistance could be reduced to zero, then there is nothing to modulate. The ~2.4 Ohms of the 734/788's is roughly 1/4 of even the lowest switch resistance in U180.Similarly, that ~2.4 Ohm resistance reduces the need to place switches in parallel, since the delta between 1 vs. 2 or 4 switches in parallel at 2.4 Ohms per switch is considerably smaller than the delta of doing so with 9-30 Ohm switches.That said, is there still more benefit to be gained? Certainly, and the notion of scaling switch resistance to the resistance being switched, for example, remains seductive. There are spare switches available, so explorations such as implementing modulation anyway should be informative.Also, it's been discussed before, but I've concluded that the best % R's and TCR ppms, e.g. 0.01% and 0.2 ppm, and hence matching between them, are found in individual foil resistors rather than off-the-shelf arrays, etc. That's somewhat costly for the 80k's, but so be it.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 06, 2025, 09:26:31 pm
content: With low switch resistance the modulation is no longer needed. It could still make sense to have 2 switches in parallel for the input to have a lower resistance, if there are spare switches. Added capacitance from 2 switches would be no issue for the input path.The low resitance matching between the input and reference switching part is also less critical.2.5 ohm would be 1/20000 of the 50 K resistor at the input. With some 5000 ppm/K for the switch resistance this would be only 0.25 ppm/K for the overall TC. Partial compensation would reduce the residual TC contribution further even if the ratio is not perfect.The somewhat unknown point is the jitter of the switches and the noise that comes with it. This it makes some sense to do a test with cheaper resistors first. The higher capacitance also comes with a little extra noise, but I think this could still be acceptable.

author: Zondar
author_rank: Regular Contributor
timestamp: October 07, 2025, 12:47:32 am
content: The jitter will substantially originate in the A3's FPGA. Nothing after that will reduce the jitter, and hence that will create a floor on jitter-related noise.After that, the CPLD will contribute a small amount. I suspect it would be higher than the digital logic in U180, which is more streamlined.After that, the switch's control logic will contribute some. I would think that it should be minimal, but the control logic is a bit slow relative to what could be implemented. Then again, it only uses ~200 nano-W at 100 kHz. I could take a stab at measuring it, but I'd wish I had a better signal generator before trying.Finally, throw in a tiny bit more because one extra layer of I/O is involved. Added in quadrature, some of these will be unimportant.Over-all, I think it should be within root-2 of U180, but also that it may well be insignificant when operated within A3 given all the other moving parts in play.

author: wanghar
author_rank: Contributor
timestamp: October 07, 2025, 04:32:15 am
content: Alright, following Kleinstein's suggestion, the modulation sense will be moving to the dummy channel of U10, and the RUSN3 path will be re-allocated into U8. There happens to be a spare channel on U8 that can be used as an optional parallel configuration. Implementing these changes on the current PCB shouldn't be too difficult—I just need some time to get it done and then I'll upload.Regarding resistor selection, I noticed that the 37.5K value on the new A3 board is achieved using a 36K + 1.5K combination. We may need to rethink this setup on this board. Luckily, there's still space on the board to place additional resistors (they can be mounted on the bottom side).

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2025, 07:38:57 am
content: Quote from: Zondar on October 07, 2025, 12:47:32 amThe flip flops inside U180 or the ATF15xx in the replacement resynchronize to the clock. So the jitter from the FPGA and logic in betwee would not matter. The jitter is from the clock, the flip-flops and the switches itself. Here the unknown part are the switches. The versions with the extra negative supply would have an extra level shifter stage, that may add some extra jitter. I would not be so worried about the jitter, it adds a little noise, but likely not very much. I could still see a difference in the noise (already with slower modulation than in the 3458) between 74LV4053, HC4053 and max4053, likely from the jitter part.The higher capacitance adds some noise. It shoud be sqrt( 8*kT*C*f_mod)*R_in. The factor 8 in the roor is because of 4 switches and charge uncertainty with both turning on and off. With some 20 pF for the COM node this would be some 23 nV/sqrt(Hz), compared to some 100 nV/sqrt(Hz) of noise for the 3458 ADC (non AZ mode, 10 PLC). This would be somewhat noticable (if one could compare different modulation frequencies), but not jet a deal breaker.

author: Zondar
author_rank: Regular Contributor
timestamp: October 07, 2025, 01:41:37 pm
content: Quote from: Kleinstein link=topic=468755.msg6060673#msg6060673[/quoteThe "resynchronization" (I wouldn't call it that) is controlled by the FPGA's output clock to the CPLD/U180. It's the jitter in that output clock that I'm referring to. It's not likely to be small, and it will directly transfer to the CPLD's output. I certainly would not lay all blame for jitter on the switch's control logic - far from it.I don't think the jitter in the FPGA's output clock has been measured, nor the CPLD's, nor the switch's control logic, and so little can be projected. I suppose I could probe the delay between the FPGA's external oscillator (which of course will produce jitter too) to U180's input clock, for example. I also could try to measure the switch on my little test board. But my budget AWG has 10 ns rise/fall times and 200 ps jitter RMS, which I expect is too much. That was just a stop-gap purchase, and I've been meaning to get a better one, but there's a very expensive pulse generator that I could access in a pinch.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2025, 01:53:57 pm
content: U180 get the clock directly from the crystal oscillator. So there is no additional jitter.To get low noise the overall noise should be in the < 5 ps range, ideally more like 1 ps.

author: Zondar
author_rank: Regular Contributor
timestamp: October 07, 2025, 02:20:34 pm
content: OK, that's better. But that 5V oscillator probably does have ~5ps+ jitter. Anyway, we don't know since we haven't measured it, or anything following it. It's not an actionable topic until we do.

author: wanghar
author_rank: Contributor
timestamp: October 07, 2025, 03:01:55 pm
content: A quick update on the revised sch and PCB. I don't remember LCEDA has ever released a non-Chinese version. If you can't open the files, the Gerber files should be viewable.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2025, 03:27:48 pm
content: Many of the better, but still standard oscillator have jitter specs of some 1 ps_rms. To reach the observed noise level of the 3458 the additional jitter from the flip-flops and switched inside U180 has to be better than about 3 to 5 ps (for the 2 ref. channels individualy and uncorrelated). So low jitter is really needed for the switches to keep the noise low. I see this the main unknow about the switches. It may be even woth doing an extra test just for the jitter.A way to test could similar to the ADC, with 2 pairs of ref. signals to a positive and negative side. At any time one positive and one negative ref. would be used and switching would be between the 2 sets. An integrator with a large fb resistor would than filter out the lower frequency noise. The higher the switching frequency, the more effect from jitter. This would also include change injection effects similar to the 3458 ADC, so not just jitter. It would still be a good test for the switches.

author: Zondar
author_rank: Regular Contributor
timestamp: October 07, 2025, 04:01:06 pm
content: Wanghar: Yes, the only links I found were in Chinese, and even those were unreachable for me. Thank you for the Gerbers. I'll look at them a little later.I keep toying with approaches to the layout, and have been thinking about another do-over. I started with small resistors too (naively, on my part), but I soon found that only larger ones have any hope of reaching the required TCR's (i.e., <=0.2 ppm):* 80k: 2512 for Vishay's VSMP series (possibly 2010 in other series), in special-order production only.* 50k: 2010 is available in-stock at a vendor or two. But because they cost almost as much as a special order, I'm probably going to order in 2512 VSMP too, with the hope that using the same batch for the 50 and 80's might lead to better matching.* 20k and other critical ones: 1206 are the smallest, in-stock only for common values.* I dropped to 0805's for the less-critical ones and one or two whose values were only available in that size.Unfortunately, the larger sizes compromises the layout, e.g. forcing more components outside the PGA footprint, leading to routing complications. An improvement would be to make a double-sided board, which should allow all critical resistors plus all switches to reside within the PGA's footprint, thereby maintaining more optimal routing. That should be physically possible using the right socket and/or with slightly taller pins to the socket. It's something to think about.Edit:It seems Vishay's VSMP series is now deemed obsolete as of a few days ago. Replacements are "FSRM" and "TSRM." I'm seeking more information now.Also, I see that special-orders with 0.2 ppm TCR can be made at a fair price (e.g., ~$15 for 0805's and ~$20 for 1206) for some of the important values that can't be found in stock with that level of performance.Kleinstein: I'll review your prior comments, but can you please offer a simple list the values that you believe would require or benefit from that, or which ones not to bother with? Or, correct me here: I'm thinking all but the 37.4k and 16.7's. Would you agree? Thank you.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2025, 05:53:30 pm
content: The 20 K resistors are for the fast / AC mode. This part also uses an external 10 K resistor (likely 5 ppm/K). So the gain stability for this mode is limited anyway. So there is no real need for super quality resistors here. The very fast conversions are just not that stable and low INL. So the priority there is not that high.The 5 V ref. level from the 24K/10 K pair is used for the ladder part and thus the fine step. So the 24 K /10K can be similar grades as the 37.5 K and 16.7 K. The ladder has the finest steps of 1/256 of the coarse steps (via 80 K resistors). The last quatization steps are already somewhat in the noise and may not need to be fully accurate. This would suggest to want <0.4% tolerance and thus 25 ppm/K (maybe 10 ppm/K) here. The 24 K and 10K should be easy relatively easy to get good ones so 0.1% and 10 ppm/K may make sense here. The 37.5 K and 16.7 K could than be 0.25% / 0.5 or even 1% parts.A point that still puzzels me is that they have 16.7 K and not 16.6 K (as 16.666 K minus some 66 ohms for the HC14 output) what the math gives as the correct value to get the 1:4 steps. This would mainly be for the first 1 or 2 steps - the later ones (one the PCB) get less critical by extra factors of 4. So there it does no longer matter.

author: Zondar
author_rank: Regular Contributor
timestamp: October 08, 2025, 03:16:04 am
content: Well, darn! I was quoted prices for the special-ordered resistors that are quite a bit higher than what was shown on their website. A full set of the 2512's and 1206's (but not the 0805's) would be over $500. Maybe "no minimum" meant "sure, but you will pay extra for that!" It's irritating, but a little understandable, since their web-site prices seemedtoogood compared to the few values in stock at Digikey, etc.In other news, the new boards are finished and were shipped out today. Exciting!

author: wanghar
author_rank: Contributor
timestamp: October 08, 2025, 08:28:51 am
content: Having custom-made individual resistors with a TCR of 0.2ppm might still be too expensive. Would it be more feasible to order a resistor array with matched TCR of 0.2ppm instead? If we could get a custom resistor array containing four 50K and four 80K resistors with matching TCR of 0.5 or even 0.2ppm, that would essentially meet or come very close to the requirements.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 08, 2025, 08:55:07 am
content: A custom array with mixed 50 K / 80 K would be hard to get and only with larger quantity. The specs for matching are also more like 5 ppm/K or maybe 2 ppm/K, though actual performace tends to be better for the higher to medium resistor values (e.g. 10-100 K).A reasonable option could still be to change to 50K/100 K with +-15 V ref and accept a few resistor changes to the A3 board. This could than use 100 K arrays (e.g. 8+8 or 12 resistors with 8 of those making up the 50 K). So matching would somewhat improve by statistical averaging. How good the actual quality would be is a bit unclear. So far for the 50 K resistor arrays I got an overall TC matching of some 0.1 / 0.5 / 0.5 ppm/K for the 3 units that I have build. So the off the self arrays may or may not give very good TCR matching and thus linearity of the 50 K. The connection between TCR matching and linearity is anyway not that direct - there are a few additional details that can have an effect.The 20 K part for the fast mode would not need super good resistors. Here a resistor array could be good enough when including the 10 K that are now still external.

author: wanghar
author_rank: Contributor
timestamp: October 08, 2025, 12:35:58 pm
content: If the Ref is changed to ±15V, the resistors that need adjustment on the A3 board are R154 and R185, while R176 and R177 are optional. The changes are actually quite minimal, so it's definitely feasible.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 08, 2025, 01:34:15 pm
content: The adjustment of R176 or 177 is not optional. Otherwise one would get to high a voltage for the switches. Ideally also R171, R172 or R173 would want an adjustment to get the same voltage modulation. Here one may just get away without.It is more the change to R185 that is optional (it would shift the zero, but should not make a big difference).

author: wanghar
author_rank: Contributor
timestamp: October 08, 2025, 02:03:07 pm
content: In Zondar's design, voltage modulation isn't used, so R176 and R177 can just be left as they are. For my design, these two resistors need to be rematched to achieve a voltage very close to +5V. As for R171, R172, and R173, since Ron varies significantly, fine-tuning is required, but this isn't closely related to the Vref change. Regarding R185, it's better to adjust it anyway. On the ZJUMP side, it is either 5V or 0V, and maintaining symmetrical ±200mV corresponding to -4μA and +4μA might still be harmless.Keinstein, for resistor arrays how do you perform matched TCR testing? Which specific resistor array model did you use in the tests mentioned above?

author: Zondar
author_rank: Regular Contributor
timestamp: October 08, 2025, 02:42:16 pm
content: I think their (Texas Components) prices for custom values are still fair, especially since I'm not aware of any other place that will do this in single unit quantities. I doubt Vishay themselves would be interested below some larger quantity like 100 or even 1000 each.Digikey is the only place I've found that has the 50k in stock at 0.2 ppm, and it's for the same price anyway (~$40), which is fine. And 80k simply isn't available at better than 10 ppm anywhere, so $41 each (as quoted) for 0.2 ppm makes the difference between failure and possible success, so I'm grateful that option exists at all!Thankfully, I can afford the cost if that's what I want to do, and $500 or so to resurrect a dead 3458A would be well worth it. But we aren't there yet; this is still experimental.I want to stick with the "drop in" nature of the project, and want to avoid modifying the A3 board more than necessary, so I'm not pursuing +/-15V. I'd also rather just pay extra than build resistors from combinations as have been suggested. But as Kleinstein says, only some resistors need to be that precise.The components I've bought for the basic functionality prototype are specified back in page 6. I'll at least add the 0.2 ppm ones for the critical 80k's and 50k for the first "real" prototype.A side topic: Kleinstein did also point out that a resistor or two in the A3 board (like a 10k one) is possibly holding back matching, and could be substituted with better ones. That makes sense to do later if beneficial. I guess people have tried that? Was any improvement seen?

author: Kleinstein
author_rank: Super Contributor
timestamp: October 08, 2025, 03:39:21 pm
content: The 10 K resistor for the AC / fast input path is on A3. However his is only for the fast part and this part is usually not that critical. The resistor on A3 seems to be a 5 ppm/K thin film type. The problem would be getting matching to the U180 internal 20 K resistors. So with the original U180 there is not that much improvement possible. As the external resistor is likely a NiCr part and U180 uses TaN the matching there may likely not be that good. So thin film NiCr may already be an improvement here.The really critical resistors are the 50 K and 80 K resistors - 5 of the higher value resistors that should track each other.Another pair of resistors are 6 K and 4.14 K. Here it's only matching not the absolute TC that matters.The 2 resistors of 10 K for the inverter also only need to match each other. For 2 equal resistors there are many ready made pairs, like LT5400 and others. So these could use a cheaper solution than 2 foil resistors.So I see 7 ciritial resistors where 0.2 or 0.5 ppm/K parts could make sense.Others like the 24 K/10 K for the 5 V are already less critical and should get away with simpler (standard thin film, e.g. 10 ppm/K) parts.It would still be more than $300 with the custom foil parts for 80 K / 50 K and 6 K / 4 KFirst one would need to test if the ADG733 or ADG788 switches are suitable - too much jitter could still be a deal breaker, causing too much noise.So a test with simpler resistors makes absolute sense. Not so good resistor matching causes higher gain TC. A higher TC for the 50 K tends to come with some U³ type INL. It could still be somewhat usable.

author: iMo
author_rank: Super Contributor
timestamp: October 08, 2025, 04:55:13 pm
content: I doubt those 0.2 or 0.5ppm/K resistors are "specially manufactured" for that TC. They simply take a 5ppm/K (or similar) and select the ones with such low TC. You pay for the manual selection process (with some automation of course). Doable at home too, imho..PS: the Q: what is the probability you will find X resistors with 0.2ppm/K (in the 40-50C range) in a set of XXXpcs. 5ppm/K resistors?..

author: Kleinstein
author_rank: Super Contributor
timestamp: October 08, 2025, 05:35:52 pm
content: The super low TC foil resistors are a different alloy, not just selected units from the higher TC ones.Vishay has different types (alloys C, Z,K ) with different typical curves and amount of 2nd order TC. The Z alloy is used for the 0.2 and 0.5 ppm/K types.Much of the difference is with the 2nd order TC and the TC matching between resistors of the same type can still be quite good even with the 5 ppm/K resistors.Vishay gives "typical" TC that is more like differential TC.Many other datasheets give box TC as from the deviation at min temperature, 20 C and maximum temperature. With a large part from 2nd order TC this can give significant higher numbers than the differential TC near room temperature. So the numbers are not necessary comparable.

author: Zondar
author_rank: Regular Contributor
timestamp: October 08, 2025, 06:00:01 pm
content: Assuming that the critical resistors worthy of special orders include the 80k's, the 50k, and then the 6k and 4.12k, and adding in reasonable choices for the others, we get something like this:Custom orders:80k, 0.01%, 0.2 ppm, 2512, $41 each.50k, 0.01%, 0.2 ppm, 2512, $41 (2010 version in stock for $40).6k, 0.01%, 0.2 ppm, 1206, $34 (Best stock alternate: 5.97k, 0.05%, 5 ppm, $3).4.12k, 0.01%, 0.2 ppm, 1206, $34 (Best stock alternate: 0.1%, 10 ppm, $0.75).(All other 1206's are also $34.)What I bought for basic functionality tests, which were the best available in stock except for any 0.2 ppm options. All are 1206 except 0805 for the 37 and 16k's.50k: 0.01%, 2 ppm/C, $20 (5 ppm about $5 - I also bought one of these).80k: 0.1%, 10 ppm/C, <$1 (best available in any size)20k: 0.01%, 2 ppm/C, ~$2 (0.2 ppm in stock for ~28)10k: 0.01%, 2 ppm/C, ~$5 (0.2 ppm in stock for ~$15)24k: 0.05%, 10 ppm/C, <$137.4k: 0.1%, 10 ppm/C, <$1 *16.7k: 0.1%, 25 ppm/C, <$116.5k: 0.1%, 10 ppm.C, <$1 (possible alternate to 16.7k)4.12k: 0.1%, 10 ppm/C, <$1 *5.97k: 0.05%, 5 ppm/C, ~$3. ** Closest available values.Kleinstein: I know you have questioned whether a few of the values should be slightly different. Please advise especially for the 4.12k, which could be adjusted slightly if custom ordered.Also, I know switch-related jitter keeps being brought up and that it's a risk, but I don't have a good way to measure this at the moment. I don't feel it's an actionable topic until it is. Also, do we know anything about the jitter in U180's switches, or compared to any other alternative?Edit: It was my understanding as well that sorting is insufficient, and also that obtaining suitable performance at higher resistances requires larger SMD packages. I'm a little nervous about soldering several hundred dollars worth of resistors, especially if moving them between boards becomes necessary (minimum 3 heating cycles). Leaded resistors such as in that video can be used too, at least if one allows bending the leads (there isn't very much room in height). It's possible that this would even make the layout a little easier, and perhaps slightly better performance can be had too.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 08, 2025, 07:24:03 pm
content: The slightly different values would apply to the 37.5 K and 16.7 K. Ideally these should be 3/4 and 1/3 of the 50 K ladder resistance. So the ratio would be 9/4 to 1. The 34.4 and 16.5 K combination should be about as good as the original 37.5 and 16.7, just on the other side of ideal. For the highest bit one would still want 37.5 K and could than get away with 37.4 and 16.5 K for the rest.For the 6 K and 4.12 K it is about the ratio only. The nominal ratio should be right. One would only consider changing the absolute value a little. This would ideally want an adjustment (R168) on A3 to compensate the ground current. A slight difference should not be that bad, as it would be a constant current.For the cheap version one may get away with 4.7 K and 6.8 K as parts that are available in 5 ppm/K and 2 ppm/K (0805 size at least).For the 2 x 10 K resistors there are quite some options for matches pairs, small arrays.Data for Jitter are rare. To reach the observed noise level the switching in U180 should be better than some 3 to 5 ps of RMS jitter. That is about as good as 74HC logic is. 74 AC logic is supposedly about 1 ps_RMS jitter, similar to the usual crystal oscillators.Measuring the jitter could be done in a test setup, maybe the nu180. Use the 4 +- ref. channels to have 2 x positive and 2 negative and swap the 2 sets regularly. With some low pass filter the noise would depend on the jitter and the ref. inverter noise. With tests at a low and high frequency (e.g. 10 kHz and 1 MHz) one could separate the amplifier part (fixed) and jitter + switch capacitance part ( ~ sqrt(frequency).One may also just test in the 3458 and look at the noise. The capacitive part can be roughly calculated.

author: julian1
author_rank: Frequent Contributor
timestamp: October 08, 2025, 09:29:46 pm
content: Did you test 74AC logic versus LV/LVC logic for jitter?A comment from TI suggests that AUC ( ie. SN74AUC2G79) is the fastest logic, which may correlate with improved jitter performance.https://e2e.ti.com/support/logic-group/logic/f/logic-forum/594284/74ac11074-about-low-jitter-triggerPerhaps more than one flip-flop could also be paralleled (with ouptut resistors)?Something similar to an external re-synchronizer might be possible with a fpga/cpld by hiding/breaking the clk relationship from the synthesis tool.If a separate dedicated clk input pin was defined, then it is at least open to the tool/synthesis to emit a single DFF output synchronization primitive (no sram lookup), independent of the normal clock domain logic.To complete the circuit, the extra package pin would connect to the xtal oscillator with a separate pcb-trace.Edit,Ok, the DS actually show vastly better performance, of AUC versus LV. Eg. for positive clk-edge flip-flopssn74lv175. 4x FFtpd 7.9ns typ. 16.6ns max. fmax 105MHz. 2.5V. Cl=15pF. 25C.sn74auc2g80 2x FF .tpd. 0.3ns typ 1.3ns max fmax 275MHz. 2.5V. Cl=15pF

author: Zondar
author_rank: Regular Contributor
timestamp: October 09, 2025, 03:25:45 am
content: If you are interested in the topic of jitter in this circuit, I would suggest starting with the switches and working backwards. As a proxy for jitter, which is hard to find specs for and hard to measure, you can first look for fast control switching, say <=2-3 ns on/off switching speed.Unfortunately, those switches usually have other downsides. For example, it's easier to get high on/off switching speeds if the switched transistors have smaller gates, which then leads to higher on-resistance.The ideal switches would have:* SPDT switches, preferably multiple per package.* Low on-resistance.* Low charge injection.* Low analog I/O capacitance.* Good analog flatness, especially near ground.* Includes a negative supply rail for higher performance near ground.* Fast on/off times.* Operation with or tolerance of 5V control signals, and more...Unfortunately, many of these parameters conflict with each other. For example, lower on-resistance often means higher capacitance and charge injection.The ADG734/788's have all the desired features and were selected for their lower on-resistance plus being good-all-around in other specs, but there may still be better choices. You can even consider making your own switches starting with individual FET's, but I'd consider that only after exhausting other options.Of course, even a 1ns on/off time is huge compared to Kleinstein's target of <=5ps jitter, so merely looking for high on/off speed could be a weak or ultimately useless metric. It's best to develop a reliable way of measuring jitter first.

author: Zondar
author_rank: Regular Contributor
timestamp: October 11, 2025, 01:13:51 am
content: Two updates:I received the new boards and built one using the functionality-grade resistors. The photo below shows it sitting in it's little test "motherboard." I'll spend a few days programming it and checking it out. Assuming it looks good, I'll then have to work up the courage to hack my A3 board and socket the U180 hybrid. Yikes!I also bought a set of resistors for the "real" version. It's perhaps a little premature, but they honored their (erroneous?) on-line prices "this one time" so I figured I should jump on it.It's getting closer to a real test!

author: Zondar
author_rank: Regular Contributor
timestamp: October 12, 2025, 04:02:18 pm
content: I'm having a problem with the new board. First, sharper eyes than mine (apparently) may have noticed that the CPLD was installed incorrectly in the above photo (rotated -90 degrees), which obviously wouldn't work. I rotated it into the correct position, and it still didn't work. It was using virtually zero power (should be ~20 mA) and would not accept programming. I checked every power and ground pin, and they are all correct.I swapped in the CPLD from the previous board (already programmed and known-good), and that behaved the same - zero power use, non-operational. I swapped the suspect one onto the old board, and it's operating correctly there. So the chip was not damaged due to being rotated.It would seem that there's some pertinent difference between the boards? But although the layout changed between the two board iterations, the CPLD's connectivity was identical. And since the power and ground pins all tested correct, I just don't see how the power consumption should be approximately zero. The "approximate" could just be due to the switches, which use a tiny amount of power. These are not the "L" version CPLDs, which have a low-power stand-by function, by the way.Further checks: All CPLD pins look correct. Applying a 10 MHz clock does change the power consumption, but only by 10 uA (should be several mA). I'm sure this will wind up being something stupidly obvious once I figure it out, but so far ... clueless.Maybe I'll load the new, unprogrammed CPLD (currently on the old board) into a new board, alone, and see how it does there. I think I'll order some more "functionality grade" parts, too.Any other ideas? Thanks.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 12, 2025, 06:28:58 pm
content: Not beeing able to program makes me suspect a missing supply (e.g. broken trace/via). Another point could be entering a JATG debug mode.

author: wraper
author_rank: Unknown
timestamp: October 12, 2025, 06:53:34 pm
content: QuoteDid you actually measure that there is VDD present on the IC and GND pins are actually connected to GND on the connector?

author: wanghar
author_rank: Contributor
timestamp: October 13, 2025, 01:10:33 am
content: Need to check if pins 9, 17, 29, and 41 of ATF1502 have 5V to GND, and whether pins 4, 16, 24, and 36 are all reliably connected to the GND net.

author: Zondar
author_rank: Regular Contributor
timestamp: October 13, 2025, 02:38:40 am
content: Yes, I checked that all 4 power pins and all 4 ground pins are connected properly. I measured resistance to the supply inputs (normal) as well as checking voltage levels (normal). I probed right on the chip's pins themselves, not just the tracks they are connected too, etc. Unless I'm absolutely blind, I'm also certain that it's in the correct orientation now, and that it's in the same orientation as on the older working board, too.It's not that the chip couldn't be programmed, it's that it wasn't recognized by the programmer as being there at all, which is consistent with the lack of power consumption. Even if it's not programmed, it should be using about 20 mA.Tomorrow I'll move one to another new board, this time by itself, and see if it behaves any differently. I only have two CPLD's right now, but I'll order some more parts tomorrow as well.Thanks.

author: iMo
author_rank: Super Contributor
timestamp: October 13, 2025, 08:57:32 am
content: When starting with the new board - do solder the cpld chip only onto it, no any other parts.. Then do check the programming and basic functionality of the cpld..

author: Zondar
author_rank: Regular Contributor
timestamp: October 13, 2025, 03:45:34 pm
content: I hand-soldered the unprogrammed CPLD into a fresh (updated version) board, with no other components, and it draws the appropriate amount of current. I haven't programmed it yet, but I'm pretty sure it is functional.I remain baffled. I've checked over and over, and there is no difference in the CPLD's connectivity between the two boards. The additional components attached to the CPLD consists of decoupling capacitors, 33 Ohm resistors on its outputs, programming pins, and the switch's hi-Z control inputs. None of that should cause any problems in principle.I've wondered if my using a stencil and hot-plate (peaking at ~230 C for standard tin/lead solder paste) damaged the board or any parts, but that shouldn't be likely. The connections all seem good anyway, and the extracted CPLD seems fine too.I don't have enough parts to populate the rest of the board unless I transfer some of them over from the built board. I guess I should do that. Perhaps I'll start by removing the switches one by one and see if anything changes.I did order more "functionality grade" parts this morning, which should hopefully come in 2-3 days. I have one clean board left, which I'd want to save for fresh components, to be built using the stencil.The custom precision resistors should arrive in about 2 weeks. I'ddefinitelywant to be fully confident that a board will be good before using them. But that needs to wait until I test a "functionality-grade" board in my 3458A, and also make updated boards with 2512 footprints for the 50 and 80k's.Edit: It occurred to me that I can remove the 33 Ohm series resistors from the CPLD's output path, and that would disconnect it from the switches. I might do that first. I'm still puzzled, though, and mostly don't think any of that will help.

author: MiDi
author_rank: Frequent Contributor
timestamp: October 14, 2025, 03:06:26 pm
content: Quote from: Zondar on October 01, 2025, 03:05:50 pmThat will only set the keeper function for declared inputs, undeclared are unaffected.So either declare all unused pins with e.g. = 0 or electrically connect to GND/VCC (CUPL does not allow to set pin keeper individually AFAIK).Quote from: Zondar on October 02, 2025, 10:29:38 pmThat is the expected behaviour as the switches have a driver built-in that decouples the input, but good to have that checked.Unexpected is the change in Rdson when approaching the logic threshold.I assume that the supply voltage is kept constant and only the logic input voltage is changed, changing the supply voltage will definitely change Rdson and other parameters.

author: MiDi
author_rank: Frequent Contributor
timestamp: October 14, 2025, 05:16:51 pm
content: My PoC version of the U180 replacement:https://github.com/EleDes/3458A_U180_replacement_PoC

author: Zondar
author_rank: Regular Contributor
timestamp: October 14, 2025, 06:42:09 pm
content: Looks good!Yes, I expected that switch behavior as well, but I did want to check to be sure. The "slight increase" when the control voltage is near the threshold could be explained by the switch's gate voltage dropping slightly due to a sag in the control circuit's output. It's nothing to worry about, though, it was just an observation.I'm continuing to be driven insane by the erratic working/non-working behavior of the CPLD's. For my last attempt, the power consumption was normal, but it refused to be programmed. The error was "Hardware and software settings miss-match." I don't think I was doing anything differently, though.If you have any ideas about why the CPLD, programmed or not, would change from using ~20 mA to ~0,pleaselet me know!I have more parts including more CPLD's coming tomorrow.

author: iMo
author_rank: Super Contributor
timestamp: October 14, 2025, 07:04:21 pm
content: Except an hw error the erratic behavior could be caused by the faulty bitstream and/or faulty programmer.. I do not know how you test the cpld, but the easiest way is to program an activity (ie. an N-bit counter) clocked by the clock and watch the outputs. The unused inputs should not float while testing - all inputs have to be defined as 1 or 0 (otherwise may cause the erratic behavior too)..PS: to be "driven insane" is a rather standard situation when working with cplds/fpgas

author: Zondar
author_rank: Regular Contributor
timestamp: October 15, 2025, 01:12:23 am
content: My first and biggest problem is that the CPLD's have sometimes appeared dead:* My first try was a hand-soldered CPLD-only test, which was successfully programmed and tested without drama.* Next, a fully-populated board (fancy resistors and all), made using a stencil and hotplate, used no meaningful power and could not be programmed. It just appeared dead.* Next, I made a partially-populated board (all electronics except U180 resistors) via hot-air and hand touch-ups. This showed normal power consumption, but an error while trying to program it.* I moved a programmed, working CPLD to a different board, and it stopped working.I ordered another 4 CPLD's, but maybe 10 would have been better!Edit: I also ordered 3 more boards. I wanted to reuse the same stencil, so only a few changes were made: I added a few more power/ground pins, and I grounded all unused CPLD I/O pins.

author: Zondar
author_rank: Regular Contributor
timestamp: October 16, 2025, 09:18:51 pm
content: After days of stress trying to get the CPLD to run, it turns out everything was (mostly?) OK. I still don't fully understand why some CPLD's started out life at 1 mA vs. 20 mA, or why I had trouble programming them earlier. But ~1 mA prior to programming is OK after all, and during my last attempt, one like that on a fully populated board was successfully programmed without any issue at all.Onward! The next step is to shake down the fully populated board.

author: Zondar
author_rank: Regular Contributor
timestamp: October 18, 2025 04:44:55 pm
content: I've tested most of the functionality of the fully-populated board (not all 128 possible control signal combinations). So far everything seems good.One curiosity was that the 16.7/37.5k ladder was not measurable with any certainty, since no matter which taps were probed, the value would drift upward. The other resistors held steady. The 50k (0.01%), for example, measured 49,999.7 +/-0.2 Ohms over a few hours via a 34465A.Do people have any questions or suggested tests that I should perform? Otherwise, I'm near the point where I have to hack my A3 board.

author: Zondar
author_rank: Regular Contributor
timestamp: October 18, 2025 09:37:48 pm
content: Removing U180 was not very easy. It took over an hour and a lot of patience. However, here it is with the replacement installed.IT WORKS!!!I have a 10V ("10.00000", i.e. supposedly good to ~10 uV) voltage source on loan. A new full calibration would be required at this point, but after an ACAL, it has been reading about 10V +/-40 uV, slowly wandering (covers not on). My original U180, by contrast, was readingvastlyworse at an awful 9.946V(!), visibly drifted as you watched, and would usually fail completely after a few minutes.It's not free from problems: A DAC convergence error popped up after ACAL ALL, but not after ACAL DCV. After several hours of operation, I got one error: Multislope rundown convergence, but it's back to running fine now. I wonder how much the precision resistors and a proper recalibration would help?So, there's some work left to do, but the "functionality-grade" NU180 is already performing significantly better than my original U180!

author: bdunham7
author_rank: Super Contributor
timestamp: «Reply #223 on:Todayat 12:58:56 am »
content: Quote from: Zondar onYesterdayat 09:37:48 pmI would assume lower tempco resistors will help a LOT! The acid test will be assessing the unit's linearity. You could do a very rough check by measuring the VREF-10 on the 100V range.

author: aronake
author_rank: Frequent Contributor
timestamp: «Reply #224 on:Todayat 01:39:59 am »
content: Quote from: Zondar onYesterdayat 09:37:48 pmAbsolutely magic work! May not be 8.5 digit grade yet, but just getting here is absolutely awesome!A good solder gun helps for the U180.

author: iMo
author_rank: Super Contributor
timestamp: «Reply #225 on:Todayat 06:08:05 am »
content: You have passed the easier part of your journey, imho..

author: Kleinstein
author_rank: Super Contributor
timestamp: «Reply #226 on:Todayat 07:47:17 am »
content: The main point to cause a run-down convergence problem would be the ladder part, especially the offset to the smallest slope.It could be the accuracy of the ladder part (including the issue with 16.7 K vs 16.6 K) to cause the smallest ref setting to be way too small. Here it is R154 (604K) from the A3 baord that shifts the ladder part to also get the negative currents. For a test one could have a pot between the +-12 V references with a high resistor (like 3 or 10 M) to inject a little current to pin 24.A relatively high level of hum due to the missung cover may also cause an occasional issue with the ADC. So maybe first check with a cover.The AC ACAL part would use the ADC in high speed mode and may not wait as long for convergence. Compared to DC there are likely also way more convesions due to the higher speed.A main point would be checking the linearity. The accuracy of the ladder part would effect the DNL (short range linearity). The resistor quality and switches could also effect the INL / long range part. Relatively easy tests would be the turn over error (U² part and thus a switch issue) and looking at the DNL from histograms (e.g. 1 PLC and rather high speed mode that uses the fast path via the 10 K).Much of the effect of replacing U180 should be corrected by ACAL. The other cal constants should not change (only marginal from may slightly different ground current).

author: voltsandjolts
author_rank: Unknown
timestamp: «Reply #227 on:Todayat 10:37:07 am »
content: Very interesting, this is nice progress.I have no precision credentials, but just a thought on thermal gradients across the new board...What is the power consumption of the new board?Maybe a heatsink on top of the pld would divert some mW away from the board, to the air.Maybe a thermal pad placed across all precision resistors would be a (poor man's) isothermal block and keep air draughts away from them.

author: IanJ
author_rank: Unknown
timestamp: «Reply #228 on:Todayat 11:56:46 am »
content: Well done!I've got no doubt Keysight are watching this thread......potential of taking away some of their replacement board sales revenue......and especially if off the back of this somebody starts up a postal "A3 Board Drift Repair Service".......LOL!Again, well done!Ian.