Embedded SDR DSP, MultiCore ARM CPU's, FGPA's or DSP chips? - Page 1
Forum section: electronics / general

author: rwgast_lowlevellogicdesin
author_rank: Frequent Contributor
timestamp: July 19, 2016, 07:48:46 pm
content: So I have this idea to use a 2.8 inch touch screen with a custom RF front end, H-Mode mixing combined with tayloe detector. I want to start small.. Basically I want a portable SDR for DC-500Khz. I figure itd be a box you could hold in your hand with a 5-10 ft fiber glass whip that has a small E-Feild probe on top. So basically were looking at doing DSP and sampling of 500Khz with a way to store files.I dont have DSP experience, only hardware filtering. It will be a long road and thats why I feel like the SDR side of this is about as simple as you could get! What I want to know is the best route to take especially if I want to move farther up the chain in to microwaves later. Modern SDR all rely on either your PC's CPU to do the DSP or an FPGA. So lets say we used an appropriate ADC and took care of most non DSP functionality using a micro, would something like a pi3 be able to handle DSP on this scale, basically FTT, demodulation, BP/LP/HP filtering? Now I know this isnt a good idea for higher frequency but it may be a comfortable place to learn DSP since I know C and assembly.I would like to go the FPGA route but im intimidated, people say it takes years to get good with FPGAs, if I went that route would an SDR this small be able to be handled by a CPLD? If I went the FPGA/CPLD route I would want to use the FPGA to sample the signals not an ADC.

author: hamster_nz
author_rank: Super Contributor
timestamp: July 19, 2016, 09:12:04 pm
content: Quote from: rwgast_lowlevellogicdesin on July 19, 2016, 07:48:46 pmFPGAs are not usually the best place to sample signals... most on-chip ADCs are just about good enough for power monitoring and that is about it. An off-chip ADC is usually a better idea.Something like ahttp://www.ti.com/lit/ds/symlink/ads8330.pdfl(16-bit, 1MS/s, SPI) looks pretty promising for your use case (although you might want something a little faster for receiving 500kHz).I haven't touched CPLDsat all, but I think they lack multiplier blocks. It that is the case it makes them useful for interfacing, but not very useful for processing SDR streams.

author: rwgast_lowlevellogicdesin
author_rank: Frequent Contributor
timestamp: July 19, 2016, 10:17:03 pm
content: Well the reason for not using a PC is portability. I have a chip tssop coming which I think well be perfect for 2m/70cm IQ demod... Atsome point I could see throwing an IQ modulator or DSP software that builds a signal then mixes it with a carryer to make a full on dual band SDT HT.I think something like the parallela would be perfect but its kind of spendy to just throw it in to something you may make a lot of... I just thought that FPGAs would be the #1 best solution, I mean I have no problem with a zynq board like snickerdoodle but that still goes back to learning to use an FPGA. As of now this may be a one of or maybe a 50 of I sell on tindie... but as time goes on I would like to design more SDR's I thought I was really in to robots and lidar, then I started reading Greg Charvats book on the cantenna radar system and got an SDR dongle and just realized what a tool an SDR acually is, its everything from ham radio to a security tool and a spectrum analyzer. I mean the SDR# guy and Mike Ossman have both made SDR's based on micros which work very well for specific areas of radio. Things like Ettus and Blade are super powerful and expensive the FPGAs allow them to stand alone and do things like run a GSM base station with no PC around. I think you could scale those radios down a bit and build a sub 300 dollar SDR that has mimo and could do things like GNU radio on the fly. A zynq would be a good choice I think.Every time you learn something new it takes practice... Sure learning C and Assembly isnt a 2 week ordeal but in 6 months you can do usefull things and keeo researching to get bigger ideas done. I hear things all the time like youll never do anything with an FPGA besides slap togather some peripherals like i2c in about 5 years.I agree though plugging a box box that contains a super fast 16bit ADC attached to an antenna, in to your 16gig of ram ssd raid octocore computer with CUDA support is probably the easiest way to go but thats not embedded #1 and #2 I have a nice ATI card so I dont even get to play with cuda!!

author: rwgast_lowlevellogicdesin
author_rank: Frequent Contributor
timestamp: July 20, 2016, 06:26:58 am
content: Well when I get to the point where I would be doing very hi bandwidth stuff in the microwaves I brought up parallela becuase its such a crazy platform! Yes it has FPGA fabric around a quad core arm, I think it may acually use zynq.. the thing is the 16 core ephinay or whatever. It seems like an awesome way to bring hi level C DSP in to the realm of FPGA parallelism. I really enjoy propeller micros, there 80mhz (but 4 instruction per cycle) 8 core chips, its like a software defined FPGA each core can do its own peripheral and it may work well for a VLF SDR. Ive seen projects using it counters as mixers to make an AM receiver etc.. The prop scope is just a propeller with a fast ADC/DAC chip from LT to get about 2mhz worth of bandwidth. I also love the PSOC because of all there flexibility I had thought of just using an SI5351 to tune a soft rock lite connected to a PSOC5 you could pump in about 250Khz of bandwidth at a time, the chip even has a DSP block thats not very well documented.I guess I am just thinking in to the future of wanting to work in this RF DSP mixed signal domain and if maybe I should incorporate some kind of FPGA or DSP stuff now. Not really to base the whole system on it but to start learning so when its time to step up im not clueless! As far as learning DSP stuff I plan on doing some major altercations to the RTL SDR drivers on the PC so they can do some system wide stuff, and I got a few books that are theory but not math heavy to begin with.I had no idea buying a canned boared like a parallela or snicker doodle would be cheaper than rolling your own PCB if you only want a smal 10 or 20 quantity thats kind of nuts!I have to admit I just veriboard point to point everything or now I use Manhattan stlye, I have recently gotten my process down to do home etching and get the board done it 20 minutes or less with no flaws, its time I learned a PCB package. This is something im struggling with I want to build EM Planar PCB based filters and I have expensive software that does that but im not sure how you get those filters in to a cad package. Im also torn I want to learn KiCad, I have an older copy of diptrace everyone on the parallax forums loves it thinks its super intuitive, but all the damn stuff out there is for eagle... which doesnt help the open source community to much especially once you get in to 4 layer boards that may be a little bigger. DipTrace isnt premium either and as far as I can tell there free 500 hole version is gone, but its suppose to be quick and easy to use. I took 4 years of Autocad I have no idea why im procrastinating so much on picking a damn EDA package, I can etch a board at home quicker than I can do a nice point to point or a bunch of Mahnhattan style clad cutting and lead bending.

author: hamster_nz
author_rank: Super Contributor
timestamp: July 20, 2016, 06:45:41 am
content: Although not exactly what you are after, have a look aroundhttp://kiwisdr.com/kiwisdr/as it has lots of tidbits that might inspire. The design review document is very imteresting....

author: cezar
author_rank: Contributor
timestamp: July 20, 2016, 09:26:45 am
content: http://armradio.weaksignals.com/they use STM DISCOVERY board with internal ADC of STM32F429Looks like they are able to handle up to 800KHz

author: Kalvin
author_rank: Super Contributor
timestamp: July 20, 2016, 09:53:49 am
content: XMOS xCORE device may also be used as they are very inexpensive per MIPS, has DSP capability and designed for parallel operations. Some chips have 12-bit / 1Msps ADC, which may or may not be suitable for your application. For a faster sampling one can use an external ADC which is controlled by one of the cores and the samples are passed to other cores for actual processing. Sample rates higher than 1Msps might be a bit challenging, though as each core operates at 50-60 MIPS**. With a careful design higher than 1Msps sampling rates may be usable.** Each core will be running at 50 - 60 MIPS, but there can be 8 - 32 cores in one device, all cores running in parallel at this 50 - 60MIPS each, so the total throughput can be very high. The interprocess / inter-core communication is implemented in hardware, so the interprocess communication is *very* efficient.