Importance of Transfer Vias - Page 1
Forum section: electronics / general

author: kaevee
author_rank: Regular Contributor
timestamp: September 20, 2023, 04:16:57 am
content: Lot's of PCB design tutorials say we need to add transfer vias for uninterrupted reference plane.On the other hand, I see many reference designs and PCB layouts suggested by manufacturers not using transfer vias in their designs.How important are transfer vias? What are the implications of not having them?Can we skimp on them if we are routing SPI and GPIO signals?

author: ataradov
author_rank: Super Contributor
timestamp: September 20, 2023, 04:24:58 am
content: You can get away with a lot of stuff. The question is - why? Reasonable amount of vias is free and in any case there is no downside to having them at all.

author: kaevee
author_rank: Regular Contributor
timestamp: September 20, 2023, 06:50:34 am
content: Quote from: ataradov on September 20, 2023, 04:24:58 amI am following the guidelines and adding the transfer vias when changing layers.I was wondering, when laying out in very tight areas, if I can get way by skimping on them as minimum via size low cost PCB manufacturers is about 0.3mm/0.5mm.The video in the link answered the questions in my mind. Thank you very much.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 20, 2023, 11:49:37 am
content: If you are using a 4 layer stackup with signal layers on both outside layers, and a GND and a Power layer on the 3 inner layers, then it helps to put decoupling capacitors between the power planes at location of the via's.The distributed capacitance is an advantage of such a stackup, but I think it is considered a (moderately) bad layer stackup. From what I remember it's better to use two GND planes and route the power as fat low resistance tracks (With decoupling caps of course).Something else I found remarkable is the difference between 1 and 6 stitching via's @15:20 The red (high current density) does not change much, but the lower stray currents (green) almost disappears and turns blue. So why does Robert Feranec say the difference is small?

author: kaevee
author_rank: Regular Contributor
timestamp: September 20, 2023, 12:23:51 pm
content: Quote from: Doctorandus_P on September 20, 2023, 11:49:37 amIn 4 layer stackup signal/ground/power/signal, can we route on layer 3 without transfer vias as there is no change in reference plane (layer 2)?EspressIf hardware design guidelines suggest above stackup and asks us to route the SPI lines on layer 3, which is power layer.

author: Bud
author_rank: Super Contributor
timestamp: September 20, 2023, 01:07:06 pm
content: Quote from: ataradov on September 20, 2023, 04:24:58 amThe keyword is 'Reasonable". Too many vias may affect the dielectric constant of the board material. Think about removing fiberglass and staffing holes with copper. Now the material is a mix. This may only be a consideration where e is important.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 21, 2023, 01:20:43 pm
content: Quote from: kaevee on September 20, 2023, 12:23:51 pmSure, as long as you are not designing very critical systems (such as DDR3, DDR4 or those multi gigabit serial signals (USB3, PCIexpress etc) then having a single continuous GND plane is usually sufficient. For the GND plane there should be no big discontinuities. If there a lot of via's in some area, then make small groups of them, so the GND plane connects to itself in between the via's. The other thing that should be abundantly clear from Robert Feranec's video is that the return current follows the path of least impedance, (above a few kHz signal content) and not the path of lowest DC resistance. For any signals above a few kHz, the impedance is determined by the enclosed area. Big enclosed area's work as loop antenna's. Just look at the pictures from the link below:https://duckduckgo.com/?hps=1&q=loop+antenna&iax=images&ia=imagesThose loop antenna's are good at radiating energy and at catching external electromagnetic fields, and this is exactly the opposite you want on a PCB. To minimize the loop area, think about the return current of each signal, and what is the closes path though the GND layer for each signal. Also think of this during the fan-out from IC's.As for the other layers. You can pretty much change the routing for both power and signals on whatever layer fits best. On an ESP8266, the most critical you will encounter is probably a quad SPI channel to a uSD card. It's probably best to keep this routing on the signal layer that is closest to GND. Routing around crystals is also a bit of a special case.And in the end, it depends a lot of what your intentions are. If you want to make a few DIY PCB's for home projects, they will probably still work if make an atrocious PCB. Hand wired Matrix board has been used for many years and those don't have a GND plane at all. (But I have noticed they are quite sensitive for picking up interference from for example switching the ballasts of nearby Fluorescent ligtning, or the transformers from halogen lights).If you are designing commercial products and have to verify and test your PCB's for EMC compliance, it's a whole different story. It's still the same rules, but you have to apply the rules far more rigorously.Also, any connection to the outside world (including the power wires!) need special attention to prevent them from working as antenna's, but that is another part of PCB design and a whole chapter in itself.

author: kaevee
author_rank: Regular Contributor
timestamp: September 21, 2023, 06:51:48 pm
content: Quote from: Doctorandus_P on September 21, 2023, 01:20:43 pmI am designing for a commercial product. I don't want to make compromises. I wanted to understand under what circumstances, I can do without transfer vias.The video and posts in this thread helped me to understand lot more about transfer vias.Quote from: Doctorandus_P on September 21, 2023, 01:20:43 pmI am powering my board using an AC-DC converter module. I would like very much to know what to watch out for while designing my board.