And Gate Time Delay - Page 1
Forum section: electronics / projects

author: warf135
author_rank: Contributor
timestamp: April 04, 2014, 05:26:19 am
content: Hello All, Hopefully I've posted this in the correct section.What I want to do:I want to use an And Gate to switch on a transistor or activate a relay. Pretty simple, But, I want the switch to stay active for maybe 5 seconds and not instantly turn off when the And Gate inputs drop.(timing not critical, anything above 3 seconds should be ok)I thought about just adding a capacitor between the And Gate output and ground, but the on time of the gate may not be enough time to fully charge the cap.The And Gate chip will have some unused gates, so maybe they can be used for some kind of capacitor charge circuit? I'd like to keep it as basic as possible.What it's for:A ham radio is connected to a computer and uses the RTS pin of the serial port to make the radio transmit. The DTR pin is used for another function, but RTS and DTR are never used together. When the computer is restarted, both the RTS and DTR pins of the serial port switch on and off together several times whilst windows is booting.I want to use the period when they both go high together, to restart the radio. They switch on and off a few times within a short period as windows is starting, so the need is that after the initial switch on, the transistor/relay needs to stay active until the RTS and DTR pins stop switching (maybe 3-5 seconds depending on computer).All Ideas Welcomed, Thanks Guys and Girls!

author: ve7xen
author_rank: Super Contributor
timestamp: April 04, 2014, 05:39:21 am
content: What you want is often referred to as a monostable (multivibrator), 'one shot' or pulse stretcher. I'm not sure if it can be done with AND gates, but definitely with NOR, or a single transistor. Googling those terms should find you some good material.

author: warf135
author_rank: Contributor
timestamp: April 04, 2014, 06:49:17 am
content: Thanks ve7xen!A monostable circuit seems to be just what I need... I have looked at several monostable circuits that use 555 timer and all are activated by pulling pin 2 lo. I figure the And Gate chip could trigger a 2n2222 transistor to activate the 555 monostable circuitIts a little more complex than I had first planned, but not too bad, and should do the required job perfectly! (I attach quick diagram of planned circuit)

author: David Hess
author_rank: Super Contributor
timestamp: April 05, 2014, 01:15:22 am
content: I would add a pair of transistors to either turn a pair of AND gates into NAND gates or just build a monostable multivibrator.

author: warf135
author_rank: Contributor
timestamp: April 05, 2014, 11:19:27 am
content: Thanks for your reply David,In my last post I have included a quick sketch of an AND Gate powered Monostable Multivibrator, which I think will do the job. Please take a look and let me know if you think its any good

author: dannyf
author_rank: Super Contributor
timestamp: April 05, 2014, 11:34:21 am
content: QuoteUse two gates: the first gate will charge up a capacitor + parallel resistor via a diode. and the 2nd gate will outout the logic state on that capacitor. The first gate will charge up the capacitor but unable to bleed it. So the capacitor will hold the charge until it is bled by the resistor -> achieving the desired "delay".

author: PA0PBZ
author_rank: Super Contributor
timestamp: April 05, 2014, 01:20:19 pm
content: This will do what you want with one DIP:- input 4 volt so that the graphics don't overlap.- 2 pulses, just for fun.

author: warf135
author_rank: Contributor
timestamp: April 05, 2014, 01:47:01 pm
content: Thanks dannyf and PA0PBZ,If I'm correct, you both offer similar solutions. That is a lot simpler than using the 555 monostable circuit

author: Zero999
author_rank: Super Contributor
timestamp: April 05, 2014, 07:28:02 pm
content: What sort of logic are you using?The schematic with logic gates works well with CMOS (4000 series, HC, AC etc.) but for TTL (old 7400 series or LS) lower value resistors and high value capacitors are required.

author: warf135
author_rank: Contributor
timestamp: April 06, 2014, 12:42:53 am
content: Hello Hero999, I just planned to follow PA0PBZ's Schematic and use 74HCT00 as that seems to do what I want

author: GK
author_rank: Super Contributor
timestamp: April 06, 2014, 01:25:45 am
content: Quote from: PA0PBZ on April 05, 2014, 01:20:19 pmClassic design error here. When OUT goes low the after charge on the 4.7uF reaches the threshold voltage, the 4.7uF will want to pull the input of the lower NAND gate negative. This will cause a brief but large current surge as the 4.7uF discharges through the NAND gates internal input protection diode from the input to ground. A resistor in series with the input could be added to limit the peak current to a safe value.

author: warf135
author_rank: Contributor
timestamp: April 06, 2014, 03:34:31 am
content: Thankyou for your input GK,When you say "A resistor in series with the input could be added to limit the peak current to a safe value", This is the input from the capacitor to the lower gate? And I assume the series resistor would go after the 560K junction or it would affect the capacitors charge rate?Or maybe dannyf's solution is better:Quote from: dannyf on April 05, 2014, 11:34:21 am

author: dannyf
author_rank: Super Contributor
timestamp: April 06, 2014, 03:12:38 pm
content: It's a non-issue. I wouldn't worry much about it. Both circuits can be made to work, each with its pluses and minuses.Try them out.

author: warf135
author_rank: Contributor
timestamp: April 06, 2014, 03:28:44 pm
content: Thanks dannyf, I guess its time to get breadboard out and start playing

author: GK
author_rank: Super Contributor
timestamp: April 07, 2014, 01:39:34 am
content: Quote from: warf135 on April 06, 2014, 03:34:31 amYes, the lower gate. Just connect the input to the junction of the 560k resistor and the 4.7uF capacitor via a suitable value resistor. That's how it "should" be done. Something very simple like this will likely run perfectly forever without any such precaution, but designing logic circuits like this that put large surge currents through the ground pins by intermittently driving inputs negative is generally a no-no.I've had the displeasure of debugging more than one system with such design bugs where ground bus voltage spikes induced by the surge currents caused miss-triggers and erattic/intermittent operation in other parts of the logic circuitry. It's just a little design issue to be aware of.

author: warf135
author_rank: Contributor
timestamp: April 07, 2014, 02:48:42 am
content: Thanks GK, thats useful information.

author: danfo098
author_rank: Contributor
timestamp: April 07, 2014, 05:27:45 pm
content: Here is another way to do it. R1 and C1 time constant set the turn off delay time.

author: warf135
author_rank: Contributor
timestamp: April 07, 2014, 07:42:19 pm
content: Thankyou danfo098, it seems there are many ways to achieve what i wish to doUpdate: Looking at the datasheet for the 74HCT00 I realise the inputs for each of the gates should only (at maximum) be equal to the supply voltage (around 5v). Both the RTS and DTR lines on the computers serial port are +12v in high state and -12v in lo state.I've modified PA0PBZ's Schematic to include a couple of 6v8 zener diodes to bring RTS and DTR down to 5.2v, and also added the resistor that GK suggested. I think my additions are correct, but I often make mistakesso please don't hesitate to correct me!