PCB design practise - Page 1
Forum section: electronics / projects

author: silvestron
author_rank: Newbie
timestamp: August 06, 2020, 12:11:27 pm
content: Hey folks! I've recently found that I absolutely love doing PCB design since it's like a video game puzzle but in the end I can actually make something that does something!For poops and gigs and since I don't have any active projects on my mind, I decided to take a stab at making a drop-in 7805 replacement switch-mode regulator using the cheapest appropriate buck converter I could find in a few minutes of searching, the AP65211A.I don't really have much experience with buck converters, so decided to just start with their typical application circuit and component values, and then enjoying the challenge of shoehorning all that onto one side of a 10x16mm board.Anyway, now that I've got it down on paper, just wondering if anyone had any thoughts on my design and layout? I'll post the schematic and screenshot from kicad here, and will have them in a github repo that I can share if anyone wants to take a full look. Happy to answer any questions and take any feedback, even negative!Cheers!

author: doktor pyta
author_rank: Frequent Contributor
timestamp: August 06, 2020, 12:50:00 pm
content: Welcome silvestron!Just some thoughts:1. I'd suggest to remove the hole for the heat sink. It will give You more space for optimal layout.U1 does not have thermal pad and has relatively high thermal resistance to PCB. So I think the heat sink won't help a lot.2. I'd start with laying out group [C1, U1, L1, C4] optimized for possibly shortest tracks and smallest current loops.

author: silvestron
author_rank: Newbie
timestamp: August 06, 2020, 01:01:27 pm
content: You're definitely right re: point 1, this wouldn't need a heatsink and it really is just getting in the way - esp since I realised after posting that I hadn't updated the track width to match the current rating and trying to squeeze everything in with .78mm tracks is TIGHT!Thanks for the tip on the group to start with. I tried to keep them as close as possible to where their power was used, ie C1 is input cap, so closest to U1 and C4 is output so closest to OUT pin, but I can definitely see that L1 is facing the wrong way. Back to the drawing board!

author: doktor pyta
author_rank: Frequent Contributor
timestamp: August 06, 2020, 01:50:52 pm
content: 3. please take some time to consider how the three pins will be attached to the PCB.Metalized holes + wires ? SMT pad + extra vias to prevent delamination + wires ?

author: silvestron
author_rank: Newbie
timestamp: August 06, 2020, 11:40:27 pm
content: I had originally used 2.54mm right angle pin headers, but much like the mounting hole I kinda wanted to keep full compatibility with the OG 7805 and have the back flush mountable to whatever, even if it doesn't really need to be, hence the SMT pads which I would plan on soldering standards straight pin headers to.Good point about delamination though! How do extra vias help prevent that? That's a new concept for me.

author: tooki
author_rank: Super Contributor
timestamp: August 07, 2020, 12:00:15 am
content: Quote from: silvestron on August 06, 2020, 12:11:27 pmWhile it’s compact and attractive, it’s not a good layout. Consider currents: which nets will have the highest currents? It’s gonna be ground, 5V, and 12V, in descending order. But you’ve given routing priority to 12V, even though it’s lower current and less critical, and 5V is kinda meandering all over the place, while being more critical to layout.Read the layout recommendations in the datasheet. Note that their sample layout fits in just an 8x10mm rectangle, connectors not included.Quote from: silvestron on August 06, 2020, 11:40:27 pmWhat happens when you solder an area with vias in it? What’s on the other side of the via? What is a via displacing? Which is stronger?FYI, they do make SMD header pins, too, as well as IC pins specifically for board mounting.

author: silvestron
author_rank: Newbie
timestamp: August 07, 2020, 03:12:33 am
content: Quote from: tooki on August 07, 2020, 12:00:15 amI basically expected it to be bad - I don't yet have the experience to make it good, so I just shoot for pretty and hope it works. Only one way to learn though!Great feedback and I really appreciate the time - I've taken another stab at it with all this in mind, and after properly reading the board recommendations in the datasheet. I do note in their board image they appear to be using tiny components and the smallest I'm willing to go personally (for now) is 0603, so that adds it's own complexities.Quote from: tooki on August 07, 2020, 12:00:15 amI've always generally tried putting vias away from pads so that's never really occurred to me, but I did some research and found things like via-in-pad and what not. Hopefully I've implemented it correctly?Anyway, have attached another two tries at the design. Thanks again!

author: BrianHG
author_rank: Super Contributor
timestamp: August 07, 2020, 03:30:54 am
content: Consider the amount of current going through wire (Net - C3 -xxx) in your design. If it is a low current circuit, you should route it inbetween R2 & C3 to get to R1 pad 2.This way, tightening the bolt or nut on the heat-sink hole for your V3 of the design wont have a signal trace so close to it that it may get scratched, or penetrated and shorted out.This may be the same for the bottom trace going to component C2. If you are making a 78xx regulator simulator, the goal would be that the bottom on that PCB would be nothing but GND in an effort to prevent a short if the device was wired to an aluminum heat-sink which may share a GND or FG connection.Same goes for pin 5 of U1. If pin 5 isn't a power pin, but an 'enable', a fine trace feeding it wont make any difference meaning there may be a clear route on top of your PCB getting rid of all vias except for GND which the entire bottom is reserved for and you do not need to worry about any shorts to the heatsink.I also seriously question the practice of placing vias directly underneath SMD pads, especially for such a simple design and especially when sourcing cheap economic PCBs with their larger drill hole diameters. With the same layout as V3 and getting rid of those few bottom traces, you have the spare room and it is not needed at all.

author: silvestron
author_rank: Newbie
timestamp: August 07, 2020, 03:45:15 am
content: Quote from: BrianHG on August 07, 2020, 03:30:54 amI had considered the tightening of a bolt or nut on the hole - the inner cut is the M3 drill hole and the outer line is the dia of an M3 screw and I tried to keep traces and components away from that where possible, but non power tracks and inner routing makes additional sense. Thanks!Quote from: BrianHG on August 07, 2020, 03:30:54 amIn regard to pin 5 of U1 it is indeed an enable pin, but I don't quite know how to have it on a different track width than the other pins as they share the same net. Same thing goes for NET (C2-Pad1) which is the other large trace on the bottom layer.Maybe I'm missing something in kicad?

author: BrianHG
author_rank: Super Contributor
timestamp: August 07, 2020, 03:50:42 am
content: Quote from: silvestron on August 07, 2020, 03:45:15 amThis should be a manual route job anyways. It is easy enough in KiCad to cut a part of a tread and manual route one. For this PCB, I would target a minimum width of 10-12mil as the PCB manufacturer can easily do 5-6mil on the cheapest junk.The thick traces you have for power, gnd and decoupling those are fine, keep them fat.Don't forget about my VIA comment I just added/edited in my above post.

author: silvestron
author_rank: Newbie
timestamp: August 07, 2020, 04:27:56 am
content: Quote from: BrianHG on August 07, 2020, 03:50:42 amFigured out a way to get it sorted and have routed as such. Thanks for your feedback Brian, it's been invaluable!Quote from: BrianHG on August 07, 2020, 03:30:54 amAs noted earlier, I've typically steered away from it too, but was rethinking from a previous commenter. Just looking up I've noticed that my fab of choice (JLCPCB) won't do via-in-pad anyway, so I went back to having the GND vias separated. Have been able to route everything except GND on the top layer!

author: BrianHG
author_rank: Super Contributor
timestamp: August 07, 2020, 04:40:50 am
content: Ok, just center the trace under R3.Since you will be soldering a pin or wires, 4 vias for the GND pin #2 is fine.To add structural support for the Vin and 5v Vout, paint in a big huge rectangle of copper horizontally and vertically, yet still leave a reasonable amount of clearance. You do not need to go too close to adjacent tracks. In fact, the best structural support would be not 2 or 4 vias, but a pad hole big enough to accommodate something like a .1 inch space sip connector pins.The rest is fine.maybe also move up R3 ever so slightly so the feedback pin with it's 75k impedance isn't right up against the switching side of the inductor.