XC9500XL slow clock - Page 1
Forum section: electronics / general

author: dietert1
author_rank: Super Contributor
timestamp: November 08, 2019, 09:29:12 am
content: Need a slow clock, like 1 KHz and tried to implement an RC generator using two pins as an asynchronous inverter. The input hysteresis mentioned in the manuals doesn't seem to work, it generates nasty ringing near the edges - several 10 nsec pulses. Anyone solved this before?Regards, Dieter

author: iMo
author_rank: Super Contributor
timestamp: November 08, 2019, 10:25:47 am
content: I never did with RC, but spent a lot of time with Xtal, with no luck.Mind the 9500XL is pretty fast.. With slow edges it may generate crap..A ring oscillator with a divider usually works, you would need to spend a lot of logic for it, however..PS: a 3 inverters ring oscillator gave me around 170MHz, as I can remember..

author: ogden
author_rank: Super Contributor
timestamp: November 08, 2019, 10:44:13 am
content: Quote from: dietert1 on November 08, 2019, 09:29:12 amYes. By using solution that have chances of working. Use external crystal oscillator, then divide it. There are 32.768KHz oscillators for example

author: dietert1
author_rank: Super Contributor
timestamp: November 08, 2019, 12:19:49 pm
content: Thanks for your support. Meanwhile i found a good solution here:https://www.edn.com/design/power-management/4322215/Add-a-Schmitt-trigger-function-to-CPLDs-FPGAs-and-applicationsCircuit in Figure 2 worked right from the start. I am using R = R2 = 2K2, R1 = 10K. With C = 470 nF output signal is 670 Hz and has a 1(high) : 2(low) asymmetry, but that doesn't matter for the application.Regards, Dieter

author: ogden
author_rank: Super Contributor
timestamp: November 08, 2019, 02:38:30 pm
content: Quote from: dietert1 on November 08, 2019, 12:19:49 pmYou can easily solve that by running RC oscillator on 2x higher frequency, then divide by 2 using flip-flop.

author: langwadt
author_rank: Super Contributor
timestamp: November 08, 2019, 02:57:40 pm
content: http://www.pldworld.com/_xilinx/html/tip/sixeasypieces.htm

author: jmelson
author_rank: Super Contributor
timestamp: November 11, 2019, 01:42:53 am
content: Quote from: dietert1 on November 08, 2019, 09:29:12 amThe 9500XL has a weak keeper on every input. This is a non-inverting buffer that loops back the input state to itself with a 50 K series resistor. This makes it really hard to implement RC circuits on the 9500XL family.Anyway, hooking up signals with slow transitions across the logic threshold will not work well. Using a higher frequency and dividing down will work much better.Jon

author: dietert1
author_rank: Super Contributor
timestamp: November 11, 2019, 11:39:49 am
content: The positive feedback gate proposed in the EDN circuit i linked produces a very steep and clean response. This happens through parasitic capacitive feedback from output to input, while the negative feedback gate i had before worked as an oscillator near the switching point for the same reason.There is a reason why it needs to be an RC oscillator. It will be a metrology grade multiplexer with bistable relays and the whole circuit should be "dead" during the measurements. The XC9500XL was chosen because it directly drives the 5 V relay coils. The whole Mux will be in a thermally isolated box, so it needs to run with some mW.Regards, Dieter