Building your own voltage reference - the JVR - Page 1
Forum section: electronics / general

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 10:20:38 am
content: With so many discussions and data on precision voltage references, I've decided to resurrect my old (about 1993) idea of building my own voltage reference from scratch. At the time I had no means to measure it performance accurately, and even now, my two Keithley 2015 are struggling. The circuit I've built yesterday on my bench is deceptively simple, essentially one JFET and one resistor. I've used one half of U440 dual FET with a rather high (about 4V) cut-off voltage, connected a multi-turn W/W pot in place or R1 and adjusted the pot for a near-zero tempco of Vref output by heating the JFET with a soldering iron and looking at the voltage changes as it cools down back to room temperature. Then I've measured the resistance of the pot and replaced it with a couple of metal film resistors (standard type, 100ppm/C, nothing special). The beauty of this circuit is that the resistor changes reflect on the output voltage at about 1/100 of a value, i.e. 100ppm change in the resistance only creates about 1ppm change in the voltage - and the same applies to the supply voltage, about 1/90 ratio I've measured. I've used LH0070 as the supply regulator to avoid a possible supply influence though. The reference voltage for this particular sample of U440 is 3.75308V at 23C.I did not "tune" the reference further and the circuit was just sitting on the bench overnight. I've recorded the reference voltage for over 12 hours and for about 5C temperature change the voltage changed from 3.75308V down to 3.75301 at the lowest point and came back to 3.75308 again after the room warmed up back to 23C (making the tempco about 4ppm/C, nicely linear, so it can be tuned better). I've tried to see a thermal hysteresis by first freezing the JFET with a freezer spray and then heating it with a soldering iron for about 5 sec, however the voltage recovered nicely back to 3.75308V after the device cooled down.So here it is. If somebody with a better than mine measuring capabilities can have a go at this simple arrangement, I will be happy to see the results. I can see one serious problem with this circuit - the voltage reference point would be unique for each JFET sample , so it is difficult to use such a circuit in a production equipment. I will eventially build a proper boxed version with a scaling buffer to get, say, exactly 10V out of it. When I'll do it I'll post an update here.CheersAlex

author: TiN
author_rank: Super Contributor
timestamp: October 04, 2015, 10:52:30 am
content: Voltage on LM399/LTZ's are also unique, but that's zero problems, as it's calibrated out in software/processing.Unlucky to me, I don't have LH0070 or U440 to test your circuit idea though.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 10:58:21 am
content: Quote from: TiN on October 04, 2015, 10:52:30 amI've just used what was available in my lab. You don't need specifically LH0070 - "any" voltage regulator with a better than 100ppm/C tempco will do nicely, and U440 I've chosen for the metal case, again, "any" JFET has a "zero tempco" point, it is just reasonable to use ones with a higher cut-off voltage, i.e J112 may work well for example, though it is in a plastic case.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 11:31:30 am
content: Here is the JVR reference output voltage recorded by Keithley 2015 over ~6.5 hours from 10PM till about 4:30AM, the temperature dropped from 23C to 20C over that time with the heating switched off at midnight. Vertical scale is 2ppm/div.CheersAlex

author: poorchava
author_rank: Super Contributor
timestamp: October 04, 2015, 11:52:55 am
content: This thing begs for an ovenWys?ane z mojego HTC One M8s przy u?yciu Tapatalka

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 11:56:01 am
content: Quote from: poorchava on October 04, 2015, 11:52:55 amThe tempco is easily adjustable to near-zero at a particular temperature. With a dual JFET like U440 I've used, the second FET's junction can be used as a temperature sensor.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 12:15:51 pm
content: Here is a 30 min time span "zoomed-in" at the flat part of the graph, with 1ppm/div vertical scale. This is on the bench in open-air, so the "slow" variations easily can be due to thermal effects. Even a simple enclosure may make it better. On the other hand my Keithley 2015 noise at 10V 10NPLC is about 0.6ppm p-p from 10V, or ~1.5ppm p-p at 3.75V, so a large part of variations could be the 2015.CheersAlexP.S. I need HP3458A

author: Andreas
author_rank: Super Contributor
timestamp: October 04, 2015, 04:02:42 pm
content: Quote from: Alex Nikitin on October 04, 2015, 10:20:38 amHello,interesting finding.I already had the idea to use a BF245C as "zero quiescent current 5V" voltage regulator (e.g. for a real time clock IC) but never as voltage reference.The other "problem" is that you will need a output buffer.Every draw of current will change tempco + output voltage.with best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 04, 2015, 06:00:14 pm
content: Quote from: Andreas on October 04, 2015, 04:02:42 pmHi Andreas,A buffer is required but it is not a difficult task to make one with a chopper opamp and, say, a foil potentiometer. These are just usual design details. What I like about that reference is that the tempco is adjusted "internally" to zero, and there is only one JFET makes the reference, the influence of other parts on the Vref output is easily manageable. The reference can be bootstrapped to the buffer output like in the circuit below (it is a simplified circuit, as one may need a start-up circuit to get this arrangement to work reliably on a single supply).CheersAlex

author: ralphd
author_rank: Frequent Contributor
timestamp: October 04, 2015, 10:49:03 pm
content: Quote from: Andreas on October 04, 2015, 04:02:42 pmThat sounds interesting too. Do you have a schematic?

author: Marco
author_rank: Super Contributor
timestamp: October 05, 2015, 12:04:01 am
content: Quote from: DiligentMinds.com on October 04, 2015, 04:52:19 pmXFET voltage references on the other hand have had some outlandish long term stability claims in the past, they are no longer present in the current datasheets ... but I'm not so sure they were too far off the mark.Look atthis complaintfrom Linear about the claimed performance. Yes, without burn in they measured quite a bit of drift. After 400 hours though it became pretty flat, except for the large amount of 1/f noise which they intentionally didn't remove. Pity there aren't any hermetic XFET references.

author: Andreas
author_rank: Super Contributor
timestamp: October 05, 2015, 05:37:37 am
content: Quote from: ralphd on October 04, 2015, 10:49:03 pmHello, (sorry for off topic)nothing special, I am using the pinch off voltage of the gate as voltage reference.Drain is input source is output.Gate is tied to GND.As the cirquit is very high impedant you will need 2*100nF for stability.A diode against reverse polarity.And a protection resistor against transients; thats all.Schematic + simulation is for 2N4119.With a BF245C I typically get around 4.0V idle and 2.8-3V with a 1K resistor as load.But usually a clock only draws some microamps.Input voltage is up to 25V. (30V).With best regardsAndreas

author: Marco
author_rank: Super Contributor
timestamp: October 05, 2015, 05:39:23 pm
content: Would some foam and mylar be able to isolate the FETs well enough to use the second FET as the heating element? (If so you could just bias it with a source resistor and put a current limited voltage on the drain, it will have a single temperature equilibrium).

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 05, 2015, 05:47:15 pm
content: Quote from: Marco on October 05, 2015, 05:39:23 pmYes, I've looked at that option, however it is only possible for devices with a high enough drain current - not all of them are good in that respect. At the moment I would like to go further with the main reference circuit, the thermal stabilisation would come next. Today I've found an easy (and reasonably cheap) way to get standard voltages (5V and/or 10V) from this circuit. 10V is preferable because the output can be used to supply the reference. I'll test this idea soon and will update the thread with the results.CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: October 05, 2015, 06:05:12 pm
content: Quote from: Alex Nikitin on October 05, 2015, 05:47:15 pmNo need to use Vg=0 here, a bit of drift from a resistor divider for the temperature setting isn't that critical, so IDSS isn't a limiting factor.

author: ralphd
author_rank: Frequent Contributor
timestamp: October 05, 2015, 06:54:35 pm
content: Quote from: Andreas on October 05, 2015, 05:37:37 amThanks. So the regulated voltage really depends on the current and varies from part to part?After looking at the prices for jfets (~20c ea), it seems like more of a curiosity than a practical application since LDOs like the AMS1117 and Torex 662K cost 3-5c ea.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 05, 2015, 09:07:25 pm
content: So, to scale the voltage up is easy, just needs one quality resistor in series with the reference JFET, like this:The FET's current is as stable, as the reference Vgs voltage and it just scales up. R2 should have a low tempco though.Here is the first 30min run's results (vertical scale is0.5ppm/div):One important change from the first prototype. This circuit is still hard-wired and in open air on my bench, however I've used <10ppm/C precision resistors for R1 and R2. From the start I did not expect to get into single ppm/C digits so I've used cheap resistors. However I've found that if I tune the circuit accurately, the largest drift component comes from the resistors! Now I'll leave the circuit on overnight and record the voltage for 7-8 hours.CheersAlexP.S. - it also lookls like a lot of LF noise was coming from the resistor. Now the noise on the graph is dominated by the noise of the Keithley 2015 I use to measure the voltage.

author: Marco
author_rank: Super Contributor
timestamp: October 05, 2015, 09:56:57 pm
content: Alex, but now you are back to having the resistor drift having an unattenuated effect on your output voltage again. Goodbye potential long term stability.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 05, 2015, 10:27:09 pm
content: Quote from: Marco on October 05, 2015, 09:56:57 pmI am not planning to design a replacement for the LTZ1000. And if you need a certain standard voltage you have to use some resistors. At least here it is only one really stable resistor required (and an opamp buffer, but that is not a problem).CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 07:27:23 am
content: Here is the overnight data, the vertical scale is 2ppm/div. For about the same three degrees C temperature drop the voltage change was ~12ppm, or ~4ppm/C, at 5V with the additional scaling resistor. I may yet try to tune it a bit better.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 03:09:29 pm
content: As U440 is not easily available, I've also tried a different (and very cheap) JFET - J112. The sample I've used has a near-zero tempco point at ~3.25mA drain current, ~1.75V Vgs. I've scaled it up to 5V with standard 100ppm/C metal film resistors and it again looks like these resistors are the main source of temperature-related voltage variations. The resulting drift, I would estimate at about 20-30ppm/C. Here is the result for a 30 min run in open air (2ppm/div vertical scale).CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: October 06, 2015, 03:15:29 pm
content: Supposedly zero tempco for a JFET is near the pinch off voltage plus 0.63V.

author: Kalvin
author_rank: Super Contributor
timestamp: October 06, 2015, 03:28:20 pm
content: Would placing a few J112-based voltage references in parallel give better results, what do you think?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 03:33:05 pm
content: Quote from: Kalvin on October 06, 2015, 03:28:20 pmI think it would be more sensible just to use good low tempco resistors, and, if you need the best stability, a temperature control. By the way, a single device with the same chip inside as the U440 isJ211, still made by Fairchild Semi (and available from DigiKey at 15p each).CheersAlex

author: Bud
author_rank: Super Contributor
timestamp: October 06, 2015, 04:44:25 pm
content: By a coincidence i just went through "The art of electronics" 3rd edition reading on JFETs. The autors do not recommend using JFETs at high source-drain voltage (which your circuit is) because above a few volts gate current raises dramatically, by several orders of magnitude. I'd imagine this may have effect on this circuit out V drift, and make it dependent on the primary regulator output voltage which is the JFET input. But im not good enough with JFETs yet to say for sure. Anyway, something you may need to have a look at and perhaps to test.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 05:01:51 pm
content: Quote from: Bud on October 06, 2015, 04:44:25 pmBy a coincidence, I knew about that nuance of JFETs probably before the first edition of "The Art of Electronics" was published (was it what, 1980? - yes, I am that ancient). Also (not by a coincidence this time, but as a normal design practice), I tend to look at datasheets of devices I plan to use before actually using them. And in the datasheet for the U440 you may find the following diagram:And I also have in my library an old catalogue from Siliconix where one can find the same graph for the J112 device (and the gate current for it starts to increase substantially only for Vds over 15V .CheersAlexP.S. for 1ppm effect you would need the gate current at about 1-3nA ( for 1-3mA drain current), by the way. Look at the graphs. Even at 125C and 10V the gate current does not reach that level.

author: Kalvin
author_rank: Super Contributor
timestamp: October 06, 2015, 05:13:22 pm
content: How well this simple and very affordable JFet-based voltage reference compares to the LM399? Let's assume that one creates a simple "oven" by gluing an appropriate resistor to the J112 as an heater element and places tho whole thing into a styrofoam or similar insulator? Let's assume the constant current through the heater resistor will be good enough to keep the temperature within 1 degree of Celcius. Any educated guesses?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 05:27:42 pm
content: Quote from: Kalvin on October 06, 2015, 05:13:22 pm1) The main question would be the long time stability. It is an unknown. My guess would be that unless the junction is damaged by a static discharge, the stability of the JFET itself (especially in a metal can) should be very good to excellent. After all we are looking at a simple single structure, not a complex one as in the LM399 or any other IC reference.2) It is reasonably easy to create a temperature control down to 0.1 degree, especially for a small device like that, using something like LM35 for a temperature sensing.I am not sure that it is sensible to look at this circuit as a replacement for the LM399 before some long-term tests are done on it. My aim was to show a simple way of making a voltage reference in a rather unorthodox way, and frankly I am surprised at the level of performance actually available from this circuit.CheersAlex

author: 6581
author_rank: Unknown
timestamp: October 06, 2015, 05:39:13 pm
content: C

author: Gyro
author_rank: Super Contributor
timestamp: October 06, 2015, 06:04:04 pm
content: I'm beginning to wonder if there is too much emphasis to oven implementations rather than temperature compensation / characterized predictable temperature coefficient in all of these references.Surely long term drift in the oven temperature controller is as much of an error contribution as drift in the reference itself - particularly in a reference as simple as this one (as opposed to LM399 syndrome as Alex hinted). It just seems a bit 'brute force'.Wouldn't putting the whole thing in an isothermal metal box, insulated to limit rate of temperature change and avoid thermal stresses work better in a home lab environment? Putting the effort into characterization and compensation instead.

author: Bud
author_rank: Super Contributor
timestamp: October 06, 2015, 06:19:46 pm
content: Quote from: Kalvin on October 06, 2015, 05:13:22 pmPerhaps the dealbreaker is in repeatability. For mass production you throw an integrated IC with tight tolerances and no worries every single unit of the product will be as good as the prototype. Whereas JFETs characteristics differ largely between manufacturers and even within the same batch. The datasheet for J112 says cutoff voltage can be anywhere from 1 to 5v. Having said that this circuit operates at near cut-off voltage on the gate, chances are each unit will need to be individually adjusted for the specified output voltage.But if you only need one off for personal use then not a problem.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 06:27:29 pm
content: Quote from: Bud on October 06, 2015, 06:19:46 pmExactly. If, however, the long term stability happens to be in the range of few ppm per year (and I have a sneaky suspicion that it might, given a metal case and a good attention to the construction and the resistors used), than it is a different ball game altogether. For that one may even select the most suitable FETs out of a large batch (I've just bought 100 of J211 from DigiKey - it cost me less than one LTZ1000 would, even including UPS delivery from the US). But we would know that only in a year or so. Or at least in a 1kh after I'll get my hands on the HP3458A.CheersAlex

author: Gyro
author_rank: Super Contributor
timestamp: October 06, 2015, 06:59:15 pm
content: QuoteHowever neither of the 'superstars' ie. LTZ1000 and LM399 is tight initial tolerance. The have quite a large variation requiring adjustments on an individual basis. Stabilty and long term drift are excellent but initial tolerance is poor.

author: branadic
author_rank: Super Contributor
timestamp: October 06, 2015, 07:01:25 pm
content: I might be wrong, but I found J112 to be TO92 and SOT23-3 only, no metal can. So humidity sensitivity can cause a big influence, right? A big advantage of your U440.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 07:08:40 pm
content: Quote from: branadic on October 06, 2015, 07:01:25 pmYes, that is correct. However the humidity sensitivity is usually due to the resistors on the chip, here we don't have any. It is possible that for a JFET even in a plastic case it should not be a problem.Now I need an environmental chamber as well!CheersAlex

author: Kalvin
author_rank: Super Contributor
timestamp: October 06, 2015, 07:23:11 pm
content: Quote from: Alex Nikitin on October 06, 2015, 07:08:40 pmI guess it is still not too late the sell those 100 J211s and forget the whole project, and buy the LTZ1000

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 07:25:53 pm
content: Quote from: Kalvin on October 06, 2015, 07:23:11 pmNah, that would be too easy. I am looking for fun, not for gain.CheersAlexP.S. - on the other hand, the LTZ needs a very good board layout and a lot of expensive supporting electronics. Sort of fun too, but it is already a known road.

author: branadic
author_rank: Super Contributor
timestamp: October 06, 2015, 08:02:12 pm
content: QuoteAre you sure about that? What about the Source-Drain-channel, not some kind of a resistor though? Not sensitive to mechanical stress?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 08:10:21 pm
content: Quote from: branadic on October 06, 2015, 08:02:12 pmThe only way to be reasonably sure is to test thoroughly. I have no data on a single JFET package sensitivity in that respect. On the other hand, everything is sensitive to everything, the only question is to what degree.CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: October 06, 2015, 08:15:21 pm
content: Quote from: branadic on October 06, 2015, 08:02:12 pmDoes a metal can maintain constant air pressure?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 06, 2015, 08:19:36 pm
content: Quote from: Marco on October 06, 2015, 08:15:21 pmAFAIK, strictly speaking, no, as it is though a metal package is hermetic, but not evacuated, and the internal gas pressure should change with temperature.CheersAlex

author: codeboy2k
author_rank: Super Contributor
timestamp: October 07, 2015, 03:23:08 am
content: Quote from: Marco on October 06, 2015, 03:15:29 pmThere is a 1973 US patent (long expired now)3,760,199that details a manner for determining a compensating voltage for biasing any JFET into it's 0-tempco region. The goal of the design in the patent was to determine Vp, the pinchoff voltage, at any temperature, and a compensating voltage Vc, such that Vgsz, the gate-source voltage needed to bias the JFET at its 0-tempco region was Vgsz = Vp + Vc. Since Vp, the pinchoff voltage is temperature dependent, then he develops Vc = 0.64 + a temperature dependent part opposing the tempco of Vp. With proper placement of some PN junctions and some BJTs and resistors, and a little bit of KVL, the inventor develops a voltage loop involving Vp, Vc and 0.64 and places the second JFET's gate-source across the point where those voltages are summed, yielding Vgs = Vp + Vc + 0.64, without ever knowing what Vp was (so it can vary with the standard process variations). The second JFET will now have this temperature compensated bias voltage applied to it's gate wrt source and develop a nearly constant drain current that is, for the most part, temperature independent. Very Cool!It's an easy patent to read and a good one too. I think it was intended for use at chip scale, so that all the elements are matched and isothermic. It might not work with discrete parts if someone were to try it out.

author: ralphd
author_rank: Frequent Contributor
timestamp: October 07, 2015, 04:26:16 am
content: Quote from: branadic on October 06, 2015, 07:01:25 pmImmerse it in mineral oil in a tictac container. No humidity effect and more temperature stability.

author: jwm_
author_rank: Frequent Contributor
timestamp: October 07, 2015, 04:44:36 am
content: Now that I have my scavenged cryocooler getting to temperatures it can liquify air () and keep high temp superconductors superconducting indefinitely, I thought a neat trick would be to be the ultimate volt-nut and combine it with my rubidium standard to make a Josephson junction voltage reference. First step is to get a SQUID working, it would at least show the effect is reproducible with my setup. I think it is unlikely I will succeed on my allotted budget, but I am sure it will be a fun ride anyway.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 08, 2015, 07:09:46 pm
content: Well, my 100 of J211 arrived from DigiKey and I've measured the cut-off voltage on the lot at 5V Vgd. Actually, a very consistent batch for JFETs, it looks like the processing did improve since 1980s. All hundred measured between 2.75V and 3.35V at ~3uA current (10M of Keithley 2015 on 100V range between the source and gate). My "experimental" U440 measures 4.6V in the same setup (and the zero tempco point is at ~3.74V, so the "theory" about 0.63 or 0.64V is not working). One obvious bad point about plastic casing - there is some photo-sensitivity, so the device should not be exposed to light when used as a reference. Not much of a problem though. I am nearly finalised a complete reference circuit, which would take 12-24V supply and provide 10V output with up to 10mA current available and would contain only two FETs, an opamp and few resistors. Not temperature regulated - that would be the next step.CheersAlex

author: BravoV
author_rank: Super Contributor
timestamp: October 08, 2015, 07:18:31 pm
content: Quote from: Alex Nikitin on October 08, 2015, 07:09:46 pm

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 08, 2015, 07:43:14 pm
content: Quote from: BravoV on October 08, 2015, 07:18:31 pmI am not going to publish a complete circuit any time soon, only measurement results. I plan to include a temperature sweep from 0 to 40C and a 1000h stability test against LM399 (I don't have LTZ1000).CheersAlex

author: Bud
author_rank: Super Contributor
timestamp: October 08, 2015, 08:13:14 pm
content: ......

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 11, 2015, 02:37:55 pm
content: OK, let's not get all this popcorn wasted.I've decided to try a very simple circuit to get 10V output and to use the J211 transistor as a reference. This is a "budget" solution, as it requires only two good quality resistors (R1 and R2 and I've used 15ppm metal film for that, "padded" to the required value by some standard 100ppm/C resistors, so I should not expect much better performance than this value), cheap J211 JFET and an inexpensive INA133 chip connected as a gain 2 buffer with low tempco (~2ppm/C). Altogether is less than £10 in parts (resistors R3-R6 are internal for the INA133).Here is the circuit which I've assembled on an old piece of a pcb:And here is a 30-min run on the bench (vertical scale is 1ppm/div):My estimate is that the temco around 23C is indeed about 10-15ppm/C. The power supply voltage variations from 12V to 28V create less than 2ppm/V change. The load regulation is better than 0.5ppm/mA (a conservative estimate, as a load current up to 5mA, sink or source, creates less than 1ppm voltage change). The supply current is about 2mA.First R1 is selected for the lowest tempco and then R2 for 10V output voltage.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 11, 2015, 06:53:15 pm
content: Quote from: EmmanuelFaure on October 11, 2015, 06:49:44 pmThank you, I always thought that it was used before but couldn't find a confirmation!CheersAlexP.S. - would be interesting to find if that circuit was used somewhere in practice!P.P.S. - The 2N4118 has a very low drain current (around 100uA for near-zero tempco) - it should make it good for low power but fairly noisy as a reference. A higher current device would make it a very low noise option - much quieter than ~1ppm p-p LF noise of the LM399.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 15, 2015, 09:22:04 pm
content: Well, my two prototypes (5V with U440 and 10V with J211) are running nicely and manage to stay inside +/-10ppm range at a somewhat varying room temperature, without any obvious drift. I am waiting for some high stability wire-wound and bulk foil resistors to be delivered so I can start building a "superstable" version, where all influences except that only of a JFET itself would be below 1ppm/C. The aim is to get a stability better than +/-10ppm in 20-30C temperature range (or better than 2ppm/C) without temperature stabilisation and then check the long-term drift for 1000h with a temperature log.CheersAlexP.S. - here is a 30min run on the bench of a somewhat "fine tuned" version on J211 device. Vertical scale 1ppm/div, Keithley 2015 works with a 10x averaging filter at NPLC10 to reduce the noise.

author: Marco
author_rank: Super Contributor
timestamp: October 16, 2015, 05:38:02 am
content: Might it be possible to get a low chosen voltage (say 2.5V) at near zero tempco by using an opamp based "constant" current sink in parallel with the source resistor?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 16, 2015, 06:47:49 am
content: Overnight (from 12am till 6am, in open air), 1ppm/div:CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 16, 2015, 07:16:31 am
content: Quote from: Marco on October 16, 2015, 05:38:02 amIt is not difficult to get lower voltages - just by choosing a different JFET. The sample of J211 I'm using right now has the reference voltage around 2.6V and J112 I've tried earlier - even lower, about 1.7V. I suspect however that it could be better to have this voltage as high as possible for a low noise and better stability.CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: October 16, 2015, 08:11:07 am
content: The point wasn't to get a lower voltage, the point was to get a given voltage. It would be nice to have the elegance of the first circuit (where variations from everything but the JFET on output voltage are highly attenuated) but at a specific voltage. If you have 2.5V you can make 5v out of it with a switched capacitor circuit.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 16, 2015, 10:13:53 am
content: Quote from: Marco on October 16, 2015, 08:11:07 amWell, in that case an additional current source should also have a very high stability (means at least some top quality resistors) and would complicate things. An additional resistor gives you the required voltage above the reference, nothing more is required.CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: October 16, 2015, 11:07:33 am
content: I'd have to the math to be sure, but as far as I can see drift in the current source has an attenuated effect due to transconductance just like variation in the source resistor (but NOT the second resistor you are adding in your current circuits).PS. doing even a small bit of math in my head showed me I was wrong, I was overestimating transconductance by many orders of magnitude.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 16, 2015, 11:13:39 am
content: Quote from: Marco on October 16, 2015, 11:07:33 amYes, however there is only one reference voltage point and you can not move it by adding a current, you only can adjust the voltage to that point by an external current if the source resistor has not quite correct value. It is easier IMHO, just to get the resistor right in the first place (or to use a trimmer to get the last 100ppm).CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 16, 2015, 07:22:06 pm
content: OK, Friday night - a torture night. As the J211 version runs rather well and I am still waiting for the bits to build a controlled temperature chamber, I've decided to torture the JVR on record, first with a freezer spray for 10sec (about -50C or 70 degrees drop), then with a soldering iron for 20 seconds flat on the plastic case of JFET (I would estimate it as at least 70 degrees rise). Unlike the U440 in a metal case, some hysteresis is clearly visible, about +20ppm after the cold session and about -30ppm after the hot one. Here I have to note that the freezer session was not the first and on the first session I didn't freeze the FET so deeply, however the hysteresis was more - about 50ppm. Clearly for a stable reference a metal case is much better. (A note - the "wave" on the second graph after 400 samples is just me adjusting the voltage back to 10.00000 Volts).Otherwise it is clear from the graphs that in both cases the voltage drops about 0.2-0.25% or 2000-2500ppm for 70-75 degrees change, so at 23C the reference sits nicely on the very top of the curve and has the lowest possible tempco. With a metal case and the temperature stabilised around, say, 45-50C (and the tempco adjusted for zero at that temperature), the stability should be very good.CheersAlexEach record is about 6min long:

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 17, 2015, 02:03:10 pm
content: A quick estimate - the temperature coefficient for this version (10V with J211 and INA133) is about 5ppm/C with few degrees change near 23C and up to 30-40ppm/C at temperature extremes.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 17, 2015, 05:21:30 pm
content: To compare my results with a quality band-gap reference, I've decided to repeat my torture tests on LT1019-2.5 in DIL8 I had in the lab (with a stated 5ppm/C typical and 20ppm/C maximum tempco). This chip did show however a lot of hysteresis - about +600ppm after a freeze and -400ppm after a soldering iron application, leaving a total permanent shift about +200ppm. Ouch!CheersAlex

author: Messtechniker
author_rank: Frequent Contributor
timestamp: October 18, 2015, 11:16:12 am
content: Since I am new to this game please bear with me.Simply as a first test, I built your circuit without the amplifier and with the components at hand. FET was BF 246 C and 2N 3819 new old stock resting for some 40 years in the box. Resistors were all standard metal film ¼ W, 1%, 50 ppm. Stability of these FETs was pretty awful +/- 300 to 500 ppm over 1 hour. So I had a look at the power supply. This was a LM 317 set to 24 V (to power the amplifier at some later date). Load was 10 mA approx. (dropping resistor and LED) and fed with 30 V from a benchtop power supply. Surprisingly drift was around +/- 5 ppm at room temperature.Then to investigate further I changed the output to around 10 V. Feed voltage now being 20 V. What I then got is for you to see.At the beginning it’s the test rig without me in the room. The droop before the peak is me entering the room whereby the “air blast” seemed to cool the LM 317 a little. The big peak is due to the soldering iron placed at the LM 317 for a short while. Then left the LM 317 to settle with some hysteresis being apparent. 25 ppm approx.So I’ll probably follow this route and put the thing in a metal box and heat it to some temperature. Since the TO-220 casing is flat, I plan to attach flush one BD 139 (TO 126) as the temperature sensor and two further BD 139s on the outsides as heaters bolted together as a single compact pack. Hope this makes for a fair voltage reference, and this with standard components only.Yours Messtechniker.P.S: This is great fun.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 20, 2015, 03:13:08 pm
content: Quote from: Messtechniker on October 18, 2015, 11:16:12 amOh, yes!I've just bought the Fluke 731B and a lot of precision wire-wound resistors. I would like at least match the stability on the Fluke (and, as a side point, to be able to calibrate in-house the DC parameters of my two Keithley 2015).CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 21, 2015, 06:20:29 pm
content: While I am waiting for the Fluke and resistors, here is a 21 hours run of the same 10V version using J211. The Keithley 2015 runs with 40 averaging, vertical scale is 1ppm/div. I've noted the room temperature at some time points. It looks like the TC around 23C is ~2ppm/C.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: October 22, 2015, 04:42:05 am
content: Quote from: Alex Nikitin on October 21, 2015, 06:20:29 pmThe TC of the Keithley (according to datasheet) or of the JVR?With best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 22, 2015, 07:31:13 am
content: Quote from: Andreas on October 22, 2015, 04:42:05 amHi Andreas,Your guess is as good as mine - the Keithley TC, noise and drift all included! The only possible clue is that the "fast" changes are more likely to be that of the JVR itself due to the air movements. As you may see there are variations in the evening when I was moving around the lab and in the morning hour when I was preparing to go to work, while at night and during the day there was very little air movement and the changes are more gradual and uniform. I hope that the Fluke 731B will provide me with a more stable reference than the 2015s (I'm running two in parallel though recording only one - and the difference between two 2015 varies from 4 to 6ppm). I plan to record the Fluke against 2015s after a good warm-up and then record the difference between the Fluke and the JVR. I also plan to build the "ultimate" 10V JVR using U440 and a Vishay Foil resistor divider for the 5 to 10V step up.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: October 22, 2015, 09:26:23 pm
content: Quote from: Alex Nikitin on October 22, 2015, 07:31:13 amHello Alex,air movements?or changes by parasytic capacitance?have you checked what happens when your hand moves over the cirquit or touch the power supply and voltage output lines?My "zero quiescent current voltage regulators" were very sensitive in this regard.(several volts output change without blocking capacitors).I had to use the blocking capacitors to keep the noise away from the gate diode.With best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 22, 2015, 09:40:53 pm
content: Quote from: Andreas on October 22, 2015, 09:26:23 pmHi Andreas,No, these "fast" changes are actually quite slow - minutes. And the reference is not sensitive to the external interference or capacitive coupling. I can touch it, move it, shake it and, as long as I don't transfer any heat from my hand to the circuit, it stays rock solid. I am now building a 0.1Hz-10Hz filter-amplifier, with the gain 10000 and self-noise around 100-150nV p-p in the pass-band, so I can accurately observe and measure the LF noise.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 27, 2015, 08:09:45 pm
content: Well, the Fluke 731B arrived yesterday (no battery though, so I've disconnected R30 to avoid the indicator overload and added noise). It was last calibrated by Fluke in 2009 and agrees with both of my Keithley 2015s within 10ppm on the 10V output. I've run it overnight and it did show about -1ppm/C TC - see the graph below, taken with NPLC10 and averaging over 100 samples. On the previous night I did run my 10V JVR with J211 using the same settings on the 2015. Below both graphs using the same scale. Again, I've noted the room temperature at some points. Next step would be to put the JVR in a suitable enclosure as the "faster" variations are most likely due to the air movements in the room.CheersAlex

author: Messtechniker
author_rank: Frequent Contributor
timestamp: October 28, 2015, 08:08:56 am
content: Well, here now the next development step of my poor man’s 10 V reference based on the venerable LM 317 with its internal bandgap reference. The LM 317 is now heated by two BD 139 trannies on each side with a third BD 139 serving as a temperature sensor sandwiched in between making a single compact block bolted together with a M3 bolt. The arrangement is now insensitive to air movements although not yet contained in a metal box.The next development steps will be:1.) Replace the metal M3 bolt and nut of the block with a plastic M3 bolt and nut.2.) Put the LM 317 block with the heating circuit on an new and clean hole dot matrix epoxy pcb. (instead of the currently used hard paper hole dot matrix pcb. material and avoiding flux residues) in a small metal box.3.) Provide separate power supplies for the LM 317 block (+15 V) and the heater (+15 V, -15 V and - 5 V)4.) Do some extended burning-in and subsequent ppm measurements. Watch this space.By the way, my Keysight 34465A DMM set to the 10 V range and with its input shorted produces an output fluctuating at about 0.2 ppm (as measured over 1 hour). So my measurement limit, i.e the contribution from the 34465A in the enclosed graph will be about 10 times that at 2 ppm re. 10 V.My aim is to produce a voltage reference circuit specc’d for around +/- 10 ppm (20 ppm total) perhaps, using cheap off-the-shelf components only.What do you think?Yours – MesstechnikerP.S. Still having fun with this.

author: BravoV
author_rank: Super Contributor
timestamp: October 28, 2015, 12:01:11 pm
content: Messtechniker, schematic and photos please, tia.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 28, 2015, 12:05:31 pm
content: Quote from: Messtechniker on October 28, 2015, 08:08:56 amHi,Where are the voltage setting resistors placed? You need to keep these at a stable temperature too if you are looking at <20ppm stability.CheersAlex

author: Messtechniker
author_rank: Frequent Contributor
timestamp: October 28, 2015, 01:25:02 pm
content: Quote from: BravoV on October 28, 2015, 12:01:11 pmCircuit is still at a very early stage (see remark below). Will provide it as soon as I (hopefully) get improved results.Quote from: Alex Nikitin on October 28, 2015, 12:05:31 pmThe voltage setting resistors are currently placed close to the heated LM 317 but horizontally on the pcb. Based on your remark I'll put them upright and against each side of the LM 317 in thermal contact. Will look messy, but will probably be more effective. Thanks for the hint.Yours - Messtechniker

author: Andreas
author_rank: Super Contributor
timestamp: October 28, 2015, 09:12:19 pm
content: Quote from: Messtechniker on October 28, 2015, 08:08:56 amI think you could get better results when using a LM723.the LM317 has alone a "typical" noise of 30 ppm RMS = 2mVpp.with some clever design you could use the current limiting transistoras chip temperature sensing diode for the oven.with best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 28, 2015, 11:25:31 pm
content: Two more graphs, taken at NPLC1, no filtering, for 30 minutes. The room temperature was about 24.5C, the JVR is still in open air on the bench. I was hoping to compare the noise, however the noise in the graphs is completely dominated by the noise of Keithley 2015.CheersAlex

author: TiN
author_rank: Super Contributor
timestamp: October 29, 2015, 01:16:36 am
content: Why NPLC1? Run NPLC5.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 29, 2015, 09:53:06 am
content: Quote from: TiN on October 29, 2015, 01:16:36 amOK, I'll try. I am building an amplifier with 0.1-10Hz filter to measure the p-p noise on a scope, that should give a much more accurate result.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: October 29, 2015, 08:52:37 pm
content: Quote from: Alex Nikitin on October 29, 2015, 09:53:06 amWhich of the cirquits / application notes do you use for this?With best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 29, 2015, 11:00:50 pm
content: Quote from: Andreas on October 29, 2015, 08:52:37 pmI took the response graph from the OP27 datasheet and simulated a suitable circuit using the OPA2227 opamp with a couple of 9v batteries for the P/S.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: October 30, 2015, 08:08:15 am
content: Quote from: Alex Nikitin on October 29, 2015, 11:00:50 pmHello,we are talking of figure 31 in the AD datasheet?http://www.analog.com/media/en/technical-documentation/data-sheets/OP27.pdfWith this cirquit the input impedance is 10 Ohms.The DUT has to be below 0.1 Ohms without having too much errors.(And the output voltage has to be very close to 0 Volts without saturation).A standard Zener has around 10 Ohms. Your cirquit will have several 10s of Ohms.Have a look on AN124http://cds.linear.com/docs/en/application-note/an124f.pdfSimilar results can be get by a 2 stage design with LT1037 and LT1012 + selected (low leakage current)standard electrolytic capacitors.And dont forget the (metal) cookies box (when using LT Parts) or the (metal) paint can (when using TI parts).With best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 30, 2015, 08:42:04 am
content: Quote from: Andreas on October 30, 2015, 08:08:15 amHi Andreas,I only took the graph as a reference, the circuit there is not suitable. I also have an option to adapt one of my FET phono stages circuits for this filter-amplifier, the simulation shows that I can get a gain of 1000 with the right frequency response, however I am not sure how quiet the input FET will be at 0.1-10Hz. I'll probably try it anyway, as I have plenty of nice pcbs with an excellent low signal level behaviour and even some good 24V DC power supplies (including some rechargeable batteries) left from the time I was building and selling these plus these fit perfectly into an aluminium Hammond enclosure. If I can get <100nV p-p self-noise, I'll be quite happy.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 31, 2015, 09:10:45 pm
content: I've received some Vishay Bulk Foil 5K+5K resistor dividers - I plan to use these for 5V to 10V amplifier in the "ultimate" version of the JVR. I've decided to check how accurate they are. With 0.05% stated tolerance I was not expecting a much better performance, however the measurements show that the resistor pairs are matched very closely - the worst one out of ten is about 15ppm off, and the best two were good to 1ppm or less, as that was the limit how accurate I could measure the error of the divider in my simple improvised DC bridge, using Keithley 2015 as a null-meter (the inconsistency in the results with plugging/unplugging the resistors and repeated measurements were about 1ppm).CheersAlex

author: BravoV
author_rank: Super Contributor
timestamp: November 13, 2015, 07:48:00 am
content: Will 2N4392 TO-18 (datasheet) work decently ? Our local store carries it.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 13, 2015, 08:48:50 am
content: Quote from: BravoV on November 13, 2015, 07:48:00 amYes, it looks like a very suitable device, with a good Vgs(off) between 2 and 5V., and a metal case. Another possible option available is 2N4857A/2N4856A.CheersAlexP.S. I've ordered some of 2N4392 and 2N4391 from Mouser, it looks like the cheapest TO-18 metal can JFET available new right now. Thank you for the pointer.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 17, 2015, 10:22:27 am
content: 1) I've received 2N4391 and 2N4392. The 4391 devices look really interesting, as the zero tempco point is very high (from 6V to 8V) and the current at that point is low (1-1.5mA), that makes for a very low internal dissipation (only 2 to 6mW with 10V supply) and very good stability. The gate is connected to the case and is grounded in the circuit, which is also good. I will build one JVR sample with the 2N4391 now, it looks very promising.2) I've done a small mod on the Fluke 731B. As I am running it without a battery, the needle meter on the front panel is essentially useless. I've installed a temperature sensor (LM35) and wired the meter so it shows the temperature of the internal screen around the reference board. It did not require any significant changes, only a cut in one of the power supply board tracks and a couple of resistors. Now I have an accurate internal thermometer with the scale roughly from 18C to 27C (the green sector is from 20C to 24C) which gives me a very good idea of the output voltage deviation.CheersAlex

author: ltz2000
author_rank: Regular Contributor
timestamp: November 17, 2015, 01:24:09 pm
content: Quote from: Alex Nikitin on November 17, 2015, 10:22:27 amAnother mofication worth doing, which actually improves the stability, is replacing the crappy pre-regulator. I used the good (enough) old LM723.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 20, 2015, 09:03:25 pm
content: I've built the first 10V prototype with the 2N4391. The reference voltage was around 7.228V, so I've used OPA227 and some wire-wound resistors to scale it up to 10V, the same type wire wound resistors were used for the reference source as well. Without much tuning I've got around 2ppm/C and very low noise level. This is the first time I've measured the JVR against the Fluke 731B, using Keithley 2015 on 100mV range. The variations are around 1ppm, the noise is well below 1ppm p-p.This is a step towards a properly built reference - I've used a good aluminium case, good resistors and Tellurium Copper terminals, though the circuit is built on a prototyping board.CheersAlex10V JVR on 2N4391 measured for 30 min against the Fluke 731B by Keithley 2015, 100mV range, NPLC1, no filtering, 1ppm per division:

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 21, 2015, 10:45:10 pm
content: Here is another graph of the 2N4391 JVR v Fluke 731B. This time I've used a better cable (a screened pure copper twisted pair with copper plugs which I've just received), a foam cup on the 2N4391 FET and NPLC10 on the Keithley 2015. 30min run, 1ppm per division.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: November 21, 2015, 11:11:12 pm
content: Hello,ist the lesser noise mainly from NPLC10 or also from the additional shielding?with best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 21, 2015, 11:19:15 pm
content: Quote from: Andreas on November 21, 2015, 11:11:12 pmThe noise is less because of NPLC10, however the slow voltage variations are less due most likely to smaller thermal effects from pure copper cabling and connectors. I've used just standard cables previously and at least some of the drift was due to thermoelectric effects.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 22, 2015, 10:53:49 am
content: Here is another graph, this time for an overnight measurement, where the lab temperature varied from 22.5C in the evening down to 19C early in the morning before the heating was switched on. Vertical scale is 1ppm/div, so the tempco is about 1ppm/C, on par with the Fluke 731B. I may try to tweak it a bit more to get even lower figures. The circuit allows for a two pot trimming, one for the tempco and another for the voltage, without affecting the tempco, however as there are drifts in the other parts of the circuit, some iterations are required to get closer to zero in a 5-6 degrees C range. I may try to do it later today.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 24, 2015, 08:54:38 pm
content: It looks like I've got the tempco under 1ppm/C, though it is still positive and combined with a bit over 1ppm/C negative from the Fluke 731B the tempco of the differential voltage between two units is about 2ppm/C, on the first graph. The combined noise is, however, very low, a small fraction of a ppm, as visible on the first 24h graph (2ppm/division). On the second 24h graph the JVR is measured by Keithley 2015 and the noise of the meter dominates, however the tempco is just under 1ppm/C. The 2N4391 costs about $2 from mouser.com and probably the cheapest new metal can JFET you can buy - and quite suitable to use in the JVR. A very simple and cheap reference with potentially a good long-term stability, plus low and adjustable tempco can be built with this JFET, a quality opamp (i.e. OP27) and few good resistors (actually, you only need three resistors with the right values, but as JFETs parameters have a large spread it is necessary to build up the right values from several standard ones).CheersAlex

author: Macbeth
author_rank: Super Contributor
timestamp: November 24, 2015, 10:22:25 pm
content: 731B? meh, we need a 734A at least when measuring a cheap FET standard, providing a JJA is not immediately at hand(ignore me, just bookmarking!)

author: uski
author_rank: Frequent Contributor
timestamp: November 25, 2015, 12:14:47 am
content: keep going, I've been looking for a cheap reference good enough to roughly calibrate my 5 1/2 digits multimeter

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 27, 2015, 10:48:02 pm
content: The weather was warmer today and I've pushed the room temperature up to 24-25C. Interestingly, it looks like my current version of the JVR with 2N4391 has a near-zero tempco between 22C and 24C - the voltage changes are less than 1ppm in that range, and at 25C the voltage starts to drop, so the tempco changes to negative. The Fluke 731B voltage changes about 4ppm in the same 3 degrees range, still negative.CheersAlexP.S. - this version runs untouched for about 150 hours and there is no voltage change at the same room temperature I can reliably detect (~below 2ppm).

author: Alex Nikitin
author_rank: Super Contributor
timestamp: January 12, 2016, 10:11:59 pm
content: Here is a graph of the JVR voltage v room temperature over one month (from 12th of December till today). As I've recorded the voltage mostly from the display of Kethley 2015, there is at least 1ppm uncertainty of that readout. When the display did flicker between two points, I've recorded a half-ppm point. It looks like the JVR + Keithley combination drifted not more than 2-3ppm over that month. Either both are quite stable or there is a remarkable similarity in the drift character of two units.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: February 19, 2016, 04:53:45 pm
content: I've measured the same 10V JVR unit with HP3458A over three and half hours today. The temperature in the lab was between 21-22C all that time. Vertical scale is 0.5ppm/div .CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: February 24, 2016, 04:34:11 pm
content: More measurements with HP3458A - this time for 29 hours. At night time temperature in the lab drops steadily to about 18C in the morning, and during the day the temperature is mostly reasonably stable around 21-23C. The day to day stability looks very good, even with the unit travelling with me and so experiencing a much colder conditions (around 3-7C). 1ppm/div vertical scale.CheersAlex

author: Kleinstein
author_rank: Super Contributor
timestamp: February 24, 2016, 05:24:40 pm
content: For such a low current reference the performance looks really good.With the HP3458 measurements there might also be some contribution from it's internal drift. With changing temperature you are supposed to use ACAL routine from time to time.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: February 24, 2016, 06:09:22 pm
content: Quote from: Kleinstein on February 24, 2016, 05:24:40 pmThank you. I've just left the setup running unattended. The HP3458 has option 002 though, so I hope the internal drift (especially on 10V range) should be minimal (ACAL gave me a difference below 0.5ppm when I've run it at different temperatures, i.e 18C and 23C.CheersAlex

author: Vgkid
author_rank: Super Contributor
timestamp: February 24, 2016, 06:22:20 pm
content: Thanks for the updates, especially the drift performance.

author: Cerebus
author_rank: Super Contributor
timestamp: February 27, 2016, 03:27:59 pm
content: Odd bit of synchronicity here. This thread came back to life a few days ago and today I was hunting around for an old microphone preamp design of mine. In the process I tripped across the circuit for the AKG C451E microphone's internal preamp. This is phantom powered and lurking inside it is a JFET acting as a voltage reference for the on-board voltage regulator. It's T5 in the diagram below. Note that R15 is marked as select-on-test.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: February 29, 2016, 10:36:30 am
content: That is one of the best 12h runs I've had with this reference. It was taken on Saturday with the room closed and no heating, so the temperature was about 18C all day from 7:30 till 19:30. Vertical scale is 0.5ppm/div.CheersAlex

author: zlymex
author_rank: Frequent Contributor
timestamp: March 05, 2016, 03:48:05 am
content: Anyone heard of the related story? Here is goes.1. For a very long time, only LT's LTZ1000 claims to have 2uV drift @1kHr(@65C, roughly 0.3ppm @1kHr)2. In late 90's, Analog annouced its XFET based ADR293 5V Vref claimed to have drift of only 0.2ppm @1kHr @25C (better than LTZ1000!)http://pdf1.alldatasheet.com/datasheet-pdf/view/48847/AD/ADR293.html3. There are people, without extended test, written an article in 1999 introducing this 'remarkable' device.http://www.ti.com/lit/an/slyt183/slyt183.pdf4. LT were getting mad at this and written a design note in 2000 to criticize this using phrase like 'THIS IS A DELIBERATE LIE!'http://cds.linear.com/docs/en/design-note/dn229f.pdf5. Analog made modifications to the datasheet from 0.2ppm to 50ppm, test conditions also modifiedhttp://www.analog.com/media/en/technical-documentation/data-sheets/ADR293.pdf6. Although this ADR293 is still in production, its not recommended for new design. Rather, Analog gives an alternative ADR3450, which is CMOS based and with much larger noise.http://www.analog.com/media/en/technical-documentation/data-sheets/ADR3412_ADR3420_ADR3425_ADR3430_ADR3433_ADR3440_ADR3450.pdf

author: Macbeth
author_rank: Super Contributor
timestamp: March 05, 2016, 04:59:14 am
content: @zlymex - Thanks for that.So the XFET based ADR293 has a 1000 hour long term stability of just 0.2ppm @ 25C - but the latest datasheet has it at 50ppm @ 125C !!? ... and they recommend this for battery powered devices? Did they really burn this in at 125C? why?ETA: Design Note 229 explains it!

author: zlymex
author_rank: Frequent Contributor
timestamp: March 05, 2016, 08:05:56 am
content: Quote from: Macbeth on March 05, 2016, 04:59:14 amThat's right. Analog must have tested some devices at 125 deg C for 1000hrs that they typically show 50 ppm drift. And they derived at first that the drift at 25 deg C to be 0.2ppm @1000hrs.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 07, 2016, 12:19:52 pm
content: Well, back to the topic. Here are the measurements on HP3458A for my 10V JVR unit for two weeks combined, 1ppm/division and with some room temperature markers. There are some gaps in the timeline.CheersAlex

author: Squantor
author_rank: Contributor
timestamp: March 08, 2016, 07:51:37 am
content: Just to share my experience.When I was matching BF862's on VGS using the setup of gate connected to source and measuring the voltage drop at a certain current. The Vgs usually climbs as the device is heating up, this was prevalent on the higher side of the IDSS current range (10 to 25mA). But I noticed that devices around 15mA did not have this effect at all, and below this current it actually was the opposite.When I have some time I will perform some tests with the BF862. Problem is that these are SMT devices and interchanging is not as easy. I do have a socket from my old matching setup that I can reuse, but dont know about the thermal EMF quality of this socket

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 14, 2016, 04:51:47 pm
content: I've checked the load regulation on the 10V unit today. 10K (1mA) load directly on the output connectors drops the voltage by 2uV or 0.2ppm, so the output impedance is about 2mOhm. There is no visible additional voltage shift for over 30min under that load.CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: March 14, 2016, 10:05:36 pm
content: Quote from: Alex Nikitin on March 14, 2016, 04:51:47 pmHello Alex,that is unbelievable for me.I would expect a impedance at least 3 orders of magnitude higer (> 2-20 Ohms).Are you shure that the cirquit is not oscillating?(I had some problems with my FET voltage regulator until I put some bypass capacitors on input+output).With best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 14, 2016, 10:42:44 pm
content: Quote from: Andreas on March 14, 2016, 10:05:36 pmWith correctly designed output stage it is not difficult to get very low output impedance (at DC) and good stability. I have 220nF capacitor connected across the output and the circuit is completely stable. Here is the "live" recording of the loading experiment (unfortunately, at the usual NPLC100). You can see the points where the load connected and disconnected by the transient "spikes".CheersAlex

author: Andreas
author_rank: Super Contributor
timestamp: March 15, 2016, 05:22:38 am
content: Hello,so its the (modified?) cirquit variant with the INA133 buffer from page 2measured at the output of the INA and not directly at the FET?with best regardsAndreas

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 15, 2016, 11:07:30 am
content: Quote from: Andreas on March 15, 2016, 05:22:38 amHi Andreas,No, all my latest data are forthe version with 2N4391 JFET and Ultrohm resistors, from the end of November 2015. I've used OPA227 (actually, a dual OPA2227) for the 7V to 10V amplifier and output buffer. So the output impedance is for the buffer stage.CheersAlex

author: The Soulman
author_rank: Super Contributor
timestamp: March 21, 2016, 10:26:17 pm
content: Quote from: Alex Nikitin on March 15, 2016, 11:07:30 amHi Alex, did you or maybe someone else did measurements on the relationship between vgs(off) and the current (and therefore resistor) required for optimum (as close to zero) tempco?Could do it the hard (on the device..) way as in the first post using temperature extremes and a variable pot but would prefer a more scientific approach, at least to get in the ballpark.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 22, 2016, 11:52:01 am
content: Quote from: The Soulman on March 21, 2016, 10:26:17 pmThere is no single formulae - the position of the zero tempco point depends on the JFET geometry, junction temperature and the Vds, so it is possible to make a rough prediction where that point should be only for a particular type/make JFET . For the lowest tempco at a certain temperature you need to adjust it at that temperature +/- few degrees. I will collect some data for 2N4391 but don't have any real statistics yet.One really attractive point of the JVR is that the tempco can be adjusted directly for the main reference device and so tempcos of the rest of the circuit can be largely compensated for, around the temperature of interest - or even used to "flatten" the curve in 5-10 degrees range.CheersAlex

author: amspire
author_rank: Super Contributor
timestamp: March 23, 2016, 06:44:54 am
content: The old Natsemi Discrete semiconductor book is pretty useful - it has diagrams of the chip layout and characteristic data for each family of device.http://www.introni.it/pdf/NatSemi%20-%20Discrete%20Databook%201978.pdfThe 2N4391 is a type 51 process.This layout changed between the 1974 version of this data book and the 1978 version, so there may be different versions of the 2N4391 that behave sightly differently.I wonder if a type 58 process FET would be lower noise - it has a much bigger area and lower resistance.The 2N5432 (Type 58) has a pinch-off between 4 and 10V and a channel resistance 6 times lower then then the 2N4391. The package is a TO52 that is similar to the TO5 metal can.A bit harder to get and more expensive. More likely to find them at a smaller distributor or on Aliexpress then the major distributors. I can get them for about US$6 here in Australia.Richard

author: zlymex
author_rank: Frequent Contributor
timestamp: April 07, 2016, 07:35:34 am
content: Quote from: The Soulman on March 21, 2016, 10:26:17 pmI have an old 491-page Chinese book(in pdf) called "High Stability Power Supply"where on page 121 the author derived a formula:Vg0=Vp-0.66Vwhich means the zero tempco Vg is the Vp(Vgs off) minus 0.66V. And the corresponding current isId0 = Idss * (0.66/Vp)^2I applied this to my DIY 100V voltage reference and it works fine.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: April 11, 2016, 09:13:31 pm
content: Quote from: zlymex on April 07, 2016, 07:35:34 amIt is not a very accurate formula, even on the same make and type of JFETs the voltage difference between the cut-off voltage and "zero tempco" voltage varies according to my measurements (at the same temperature) and on top of that the cut-off voltage does vary with temperature, so this difference is temperature dependent as well!CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: April 11, 2016, 09:33:49 pm
content: I am struggling to measure the drift on this sample of the JVR. In three months it is less than I can reliably measure with the HP3458A (opt 002) and Fluke 731B as the second reference. The difference between the Fluke and JVR stays about the same for the same temperature (at 24C it is about 90-110 uV) and it is the same absolute value (+/- 1ppm) when measured with the HP after auto-cal over these three months (at the same room temperature), despite several moves between my home lab and my work lab. Here are today's measurements at home of the difference between the JVR and the Fluke, done by the Keithley 2015 with the upgraded input opamp used as a null meter at 100mV range and NPLC 10 with 10 averages.CheersAlex

author: The Soulman
author_rank: Super Contributor
timestamp: April 11, 2016, 10:04:27 pm
content: Quote from: Alex Nikitin on April 11, 2016, 09:13:31 pmIn the Vishay journal AN103 (http://www.vishay.com/docs/70596/70596.pdf) they use nearly the same number 0.65volt (VGS(0TC)  VGS(off) – 0.65 V) that would probably get one in the ballpark,however what Alex is saying does make sense and testing and trimming is the way to go for optimum thermal stability.I need to get some parts ordered and start building one!

author: quarks
author_rank: Frequent Contributor
timestamp: April 12, 2016, 04:52:41 am
content: Very interesting.Now bookmarked.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: April 19, 2016, 10:28:54 am
content: Another update, this time ~200 hours run in my home lab, with the top temperature about 24C and some night time drops. The Keithley 2015 measures the difference between 10V JVR and Fluke 731B, 100mV range, 10NPLC + 10 averages, so the 100NPLC equivalent. 1ppm/div vertical scale. Again, this JVR build is quite stable in time.CheersAlex

author: amspire
author_rank: Super Contributor
timestamp: April 26, 2016, 08:22:19 am
content: I finally got around to a few tests myself. I had some MPF102 (plastic) so I decided to test them. The zero temp coefficient point was only 1.2V at 1mA, but this can be useful if you need a reference that can run from 5V.The voltage sensitivity with a 5V supply was 0.003V/Vsupply. At 15V it reduced to 0.0013V/Vsupply. I am pretty happy with both numbers. As long as you maintain the voltage across the reference fet to 100mV, the voltage sensitivity even with a 5V supply is negligible.Resistance sensivity is worse. For both 5V supply and 15V supply, the output varied by about 1/3 the resistor variation. This does not include the fact that as the resistor drifts, the FET current drifts and so it gets a temperature coefficient. The TO92 package is not good for temperature tests as you can get a positive or negative change depending on where the heat is applied to the package.There are a number of 3ppm to 5ppm reference ICs for around $3. To equal this, I will need 10-15ppm resistors.So on this score, it may not be worth the effort.The other issue is the long term stability and temperature hysteresis. For reference ICs, it is not unusual to see a 50ppm drift spec for 1st 1000 hour drift and another 50ppm drift if the chip is temperature cycled from 25degC to the min and max temperatures and back to 25 deg C. It would be interesting to know what kind of drifts and temp hysteresis you get with the JVR reference. It is certainly cheaper and easier getting a hermetically sealed JFET then getting a hermetically sealed voltage reference IC, but of course, the resistor needed for the JVR is probably not going to be hermetically sealed.If it turns out the JVR is low drift/low hysteresis, it is interesting for custom jobs, especially if the JVR is put in an oven.Anyone have some suggestions for economical and stable resistors in the 5ppm to 15ppm range?

author: Cerebus
author_rank: Super Contributor
timestamp: April 26, 2016, 03:43:13 pm
content: Quote from: amspire on April 26, 2016, 08:22:19 amFor surface mount, the Panasonic ERA series has 10 and 15ppm resistors at relatively low cost. They' range from 20p to a pound (GBP) each in small quantities [RS pricing, packs of 5 or packs of 100, 10k ohms 0.05% 10ppm to 0.1% 15ppm, 0603 and 0805 sizes].

author: Vgkid
author_rank: Super Contributor
timestamp: April 26, 2016, 04:51:55 pm
content: Quote from: amspire on April 26, 2016, 08:22:19 amFor through hole, TE Connectivity Neohm- YR1 series offer 15ppm tc, and are cheap.

author: bingo600
author_rank: Super Contributor
timestamp: April 26, 2016, 05:34:43 pm
content: Quote from: Vgkid on April 26, 2016, 04:51:55 pmAsk Edwin for a quote -https://www.eevblog.com/forum/profile/?u=96921/Bingo

author: Alex Nikitin
author_rank: Super Contributor
timestamp: April 26, 2016, 07:24:46 pm
content: Quote from: bingo600 on April 26, 2016, 05:34:43 pmThat is the best suggestion. With his resistors and using a JFET in a metal case with high Vgs (like the 2N4391 in my current prototype) it should be possible to make a reference with less than 1ppm/C tempco in 5-6 degrees range and a very good long term stability (my sample has drifted less than 5ppm for last 3 months - at least that is the limit I can measure it against HP3458A Opt002 and Fluke 731B) .CheersAlex

author: amspire
author_rank: Super Contributor
timestamp: April 26, 2016, 11:53:14 pm
content: Alex, have you done any thermal hysteresis tests? I am really interested in that one. It seems to be the test that affects the IC's signifigantly. Sayroom temp ->70degC -> 0 deg C (whatever your refrigerator freezer does) -> room temp.If the JRV does not have hysteresis, it becomes very interesting.

author: amspire
author_rank: Super Contributor
timestamp: April 27, 2016, 12:18:28 am
content: Quote from: Vgkid on April 26, 2016, 04:51:55 pmMouser stock these - around about 25c a resistor. Not bad. The specs do not mention 1000hr drift, so that needs testing.http://www.mouser.com/ds/2/418/NG_DS_1773265_A-722435.pdfNot sure about the higher voltage zero-TC FETS, but the 1.2V MPF102 I tested (it was the one I had) would get 5ppm/C with a 15ppm/C resistor. I guess you could find the zero TC point of the resistor and FET combined and get a lower TC over a limited range. Get a combined tempco of 1ppm, and then put it in an oven with 0.1 degC stability and it should be a nice reference.

author: Kleinstein
author_rank: Super Contributor
timestamp: April 27, 2016, 01:35:56 pm
content: The TC of the resistor might not be such a big problem, as one could find the point for combined zero TC. The trouble is that you need a different resistor value for each FET. So individual matching / adjustment is needed. So when a pot / digi-pot is used for adjustment two resistors are needed. Otherwise you may need odd individual values - e.g. specially made for the FET or combinations of 2 or more.The more important point than TC is stability of the resistor and possibly the FET also. If stable, even a high TC might be acceptable - though I would not go for a PT1000.

author: Squantor
author_rank: Contributor
timestamp: May 17, 2016, 09:51:38 am
content: Hello All, I am a member of the tekscopes group and I read this interesting bit of information on finding the zero tempco point of a JFET with a curve tracer:The 577 D1 also allows you to find the ideal bias point (zero temperaturecoefficient) of a FET. You can do this with a 7CT1N and a storage 7000 scopeas well. Just display a set of curves and apply heat and/or cold to the caseof the FET. The curves above the ideal bias point will drift up (and getstored as a smear). The curves below the ideal bias point will move down(and also get stored as a smear). The ideal bias point curve will not moveso there will be no smear. It pops right out at you.Original post here:https://groups.yahoo.com/neo/groups/TekScopes/conversations/messages/129217It has a few nice curvetracer tricks.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: August 02, 2016, 09:22:38 am
content: Just a quick update, I've re-measured the JVR after 4 month with the same HP3458A opt 002 (ACAL DCV done in all cases just before measurements) and the result is about -4...-5ppm over that time at the same temperature (24C). As it is in the ballpark of the meter stability, I've checked also the JVR against my Fluke 731B at the same temperature and it shows about -3ppm drift and the Fluke's drift over the same period of time, measured on the HP3458A is about -1ppm at the same 24C. So it all sort of adds up nicely (whatever the real drift is in all three). I might now do a hysteresis test to, say, +60C unpowered (we have an oven that runs at that temperature) and back to 24C.CheersAlex

author: CJay
author_rank: Super Contributor
timestamp: August 02, 2016, 11:36:52 am
content: Quote from: Alex Nikitin on October 08, 2015, 07:09:46 pmLight sensitive?now there's interesting, I wonder if it would be possible to build a 'photonic oven' to compensate for temperature drift by exposing it to varying intensity light....Or I may just be nuts...

author: Alex Nikitin
author_rank: Super Contributor
timestamp: August 02, 2016, 11:55:03 am
content: First results on the hysteresis (from 24C up to 60C for an hour, then back to 25C - in that hour the temperature in the lab gone up 1 degree) - about +1.5ppm and even that is likely to be mostly a temperature change effect. That result is for the complete unit, including the 7 to 10V amplifier and buffers. The shift at ~54C was about -2mV or -200ppm, indicating the tempco of about -7ppm/C box. Near 25C the tempco is about 1ppm/C .CheersAlexP.S. - the voltage measurements graph is added - 1ppm per vertical division scale. While the JVR was in the oven, the Fluke 731B was connected and slowly drifted down with the lab temperature increase.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: August 02, 2016, 05:46:17 pm
content: Here is the graph of the hysteresis after 60 min in a fridge (temperature of the unit went down to about 12C) . There was quite a bit of condensation on the unit what I've got it back to the lab. I left for home while the voltage was still rising so the complete data will be available only tomorrow. Here is what I have so far (the "shelf" at 9.999974 is again the Fluke connected in place of the JVR while it was in the fridge):It looks like the voltage should be back within 2ppm at least.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: August 03, 2016, 09:20:26 am
content: Here is the complete graph. It looks like between 12C and 60C I can not reliably detect the hysteresis - if it is there, it is below 2ppm.CheersAlex

author: Marco
author_rank: Super Contributor
timestamp: August 03, 2016, 10:51:57 am
content: Quote from: amspire on April 26, 2016, 08:22:19 amSusumu RG for less than 15 ppm and Stackpole RNCS for 15 ppm? Both passivated with an inorganic layer instead of the usual resin.

author: montemcguire
author_rank: Regular Contributor
timestamp: August 03, 2016, 06:27:54 pm
content: Agreed - the Susumu resistors are really nice, far better than typical NiCr resistors. They're also trimmed by laser through the glass layer, after it has been deposited, so there's a lot less mechanical strain left on the part to cause drift. The only issue is that they're tiny SMD chips, but they can be attached to larger thermal masses easily.Edit: The RG series are nice, but the new URG series are even higher precision, along with a higher price.

author: montemcguire
author_rank: Regular Contributor
timestamp: August 07, 2016, 05:00:13 pm
content: The drawback to foil is when you're using the resistors with low frequency AC signals. The low TC of a foil resistor is done by bonding the foil to an engineered ceramic that has a complementary expansion coefficient. For DC, the current induced foil heating and the substrate will stabilize thermally, and the resulting TC is low. For very high frequencies, there's also no problem, since the waveform changes so quickly that the foil heating is constant over all parts of the waveform.However, with low frequencies, the foil and the substrate will not heat uniformly over the entire waveform, and the foil can expand and contract differently at different parts of the waveform, causing the resistance to modulate with the signal voltage. What's worse is that the thermal time constants can cause the substrate to expand and contract out of phase with the foil, actually worsening the thermal effects of the signal current foil heating. This creates third harmonic distortion, and at just the wrong frequency, the effect is worse than simply using a 'normal' higher TC resistor that doesn't try to cancel its TC with an engineered ceramic substrate.So, for audio or other LF AC uses where distortion is important, foil resistors can perform worse than traditional NiCr films like the Susumus, and can generate more distortion than the amplifiers around them. As far as I know, the Susumus have a low TC by tweaking the alloy and the processing, and not by using a trick substrate ceramic, so they'll have better LF distortion performance than a foil.

author: guenthert
author_rank: Frequent Contributor
timestamp: August 15, 2016, 06:44:50 am
content: Quote from: Alex Nikitin on October 11, 2015, 06:53:15 pmNot a practical application, but the idea (as far as I understand it) is also discussed here:http://www.analog.com/media/en/training-seminars/tutorials/MT-087.pdf(p. 9). Which is not to say that it wouldn't be worthwhile to explore this further.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: August 15, 2016, 04:14:36 pm
content: Quote from: DiligentMinds.com on August 15, 2016, 03:02:14 pmIt is an old paper (and not really relevant to the topic, as these XFET references use a "band-gap" type 2-FET structure). A single JFET reference would not have that good tempco over a wide temperature range, but can be adjusted for a near-zero tempco at a particular temperature and appears (providing a metal can device is used) very stable in time.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 14, 2016, 11:37:00 pm
content: Another measurements before I take the JVR to the newly calibrated HP3458A. Taken with two Keithley 2015 and Keithley 617 as a thermometer (measuring the output of LM35D, 200mV = 20C, 10mV/degree, right scale). So far both JVR and Fluke 731B drifted less than 5ppm over the last year (even with all my attempts to measure a hysteresis). Interesting that the JVR has a low tempco between 22 and 26CCheersAlex

author: TiN
author_rank: Super Contributor
timestamp: November 15, 2016, 02:39:30 am
content: It is tempco of 2015, -0.9ppm/K?It's very high out of spec for 731B alone.EDIT: I was thinking about 732B, sorry.

author: David Hess
author_rank: Super Contributor
timestamp: November 15, 2016, 08:36:02 am
content: Quote from: DiligentMinds.com on August 15, 2016, 03:02:14 pmAnalog Devices has neatly solved this problem by buying Linear Technology.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 15, 2016, 11:45:43 am
content: Well, the result from the JVR measured by HP3458A at 25C lab temperature (after 1.5 hours in my backpack and 3 hours warm-up in the lab) is essentially the same as three and half months ago (see my posts from the 2nd/3rd of August) - 10.000055V with about 0.5 ppm variations. The unit was almost continously powered up all this time (except when it was transported from my home lab to my work lab and back).CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: June 08, 2017, 11:37:32 am
content: As the HP3458A just came back from a repair and calibration at Keysight UK, I've brought the 10V JVR unit back to the lab and measured it after a good warm-up. Here is the result for 1 hour, at NPLC100 , combined with the similar one hour measurements at the same 25C temperature in August and December last year. I need to build few more of these and get some statistics.CheersAlex

author: TiN
author_rank: Super Contributor
timestamp: June 08, 2017, 01:11:35 pm
content: I wish I'd have backpack big enough for the 3458AQuote

author: Alex Nikitin
author_rank: Super Contributor
timestamp: June 08, 2017, 01:15:23 pm
content: Quote from: TiN on June 08, 2017, 01:11:35 pmI wish I'd have my own HP3458A. I would find a backpack large enough to put it in, no problem.CheersAlex

author: guenthert
author_rank: Frequent Contributor
timestamp: June 20, 2017, 10:13:59 am
content: Quote from: Alex Nikitin on June 08, 2017, 11:37:32 amThat looks very promising. Buildmanymore and sell them and thereby distribute the work of collecting statistics!

author: Ash
author_rank: Regular Contributor
timestamp: June 20, 2017, 10:36:16 am
content: Just wanted to mention that I'm planning on building a few of these as well. I have some of the parts, still waiting on others. I'm also in the middle of setting up my meters and fixing some scanners so I can automate measuring of everything.Looking forward to it having some fun!Ash.

author: Vtile
author_rank: Super Contributor
timestamp: June 20, 2017, 07:00:33 pm
content: Quote from: Marco on October 05, 2015, 06:05:12 pmHave anyone used the temp.co difference in the divider resistors to cancel out the reference tempco?? In theory (as two brain cycles without math) it should work.PS. How is the long term spability now or is the prototybe trashed along the years.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: June 20, 2017, 07:23:58 pm
content: Quote from: Vtile on June 20, 2017, 07:00:33 pmLook on the previous page. Essentially the voltage is quite stable, using the 3458A meter the difference is few ppm over about a year, certainly less than 20ppm drift for a complete reference including the 7 to 10 volts amplifier stage.CheersAlex

author: Vtile
author_rank: Super Contributor
timestamp: June 20, 2017, 07:25:29 pm
content: Sounds nice.. Silly me I'm still on page 4, it seems also that the resistor? zero tempco point is discussed there.

author: zhtoor
author_rank: Frequent Contributor
timestamp: June 20, 2017, 07:27:20 pm
content: Quote from: Alex Nikitin on June 20, 2017, 07:23:58 pmvery good results. have you tried cascading the fet's like in the 3-fet design paper?regards and keep up the good work.

author: IconicPCB
author_rank: Super Contributor
timestamp: June 21, 2017, 10:09:13 pm
content: 3 FET design?

author: zhtoor
author_rank: Frequent Contributor
timestamp: June 21, 2017, 10:16:25 pm
content: Quote from: IconicPCB on June 21, 2017, 10:09:13 pmthis one.regards.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: June 22, 2017, 07:44:30 am
content: Quote from: zhtoor on June 20, 2017, 07:27:20 pmThank you. For a voltage reference it is not necessary, as long as the supply voltage is steady enough (in my unit it is bootstrapped from the reference voltage, so no problems there). Introducing the second and the third FETs helps to increase the current source output impedance but in turn, adds new temperature dependencies of the second and the third order, so the FETs should be thermally coupled and ideally temperature stabilized as in the paper you've found.CheersAlex

author: Ash
author_rank: Regular Contributor
timestamp: June 29, 2017, 12:07:35 pm
content: Hi Everyone,I just did a run to characterise the 2N4391 JFETs I have. They are all from Central Semiconductor with a date code of 1620.I lashed up a circuit with a resistance decade box as the resistor between S and G / GND, and supplied 10V from an Aglient E3640A power supply. I measured the voltage at the source pin on my 6.5 digit Keithley 2015 (uncalibrated). Note that the resistance box is not hugely accurate, but it is sufficient to get me in the ballpark and I'll trim the operating point of each circuit from these values.Basic process was to put the device in to a machine pin socket at room temperature (about 23.5C), and adjust the resistance box so that grabbing the metal can with my fingers, increasing the temperature didn't move the last digit of the voltage much (at most 1 or 2 counts).FETResistanceVoltageA87708.17287B76007.71515C86508.10104D78707.83454E83007.97806F77007.77651G69007.37061H83708.06369I65507.20610J104008.56925So the I(ds)at the 0 TC point for room temperature is floating around the 1mA point.I'm also planning on testing these same FETs at an elevated temperature (say 50C) as I want to build ovenised references to combat the temperature swings in my office. In Brisbane it can get to 40C on bad days in summer... I'll add a precision OpAmp as a buffer, also in the oven. I'm then considering my options for 10V generation. I'm leaning towards PWM + another OpAmp with a 2x gain and a filter... Then it is programmable..Ash.

author: Marco
author_rank: Super Contributor
timestamp: June 29, 2017, 02:32:37 pm
content: If you go the PWM route then given the negligible hysteresis wouldn't it make more sense to digitally compensate for temperature than ovenise?

author: MK
author_rank: Regular Contributor
timestamp: June 29, 2017, 04:29:39 pm
content: http://shop.kuhne-electronic.de/kuhne/en/shop/amateur-radio/accessoires/crystal-heater/Precision+crystal+heater+40%C2%B0+QH40A/?card=724That might help stabilise the JVR, as it is quite small.

author: Ash
author_rank: Regular Contributor
timestamp: June 30, 2017, 01:16:37 am
content: Quote from: Marco on June 29, 2017, 02:32:37 pmHi Marco,The thought did cross my mind and I've done similar software based temperature compensation for things before, but I had access to a temperature chamber then and I don't nowMaybe in the future, but for the initial version, I'll probably ovenise the critical sections, possibly the whole lot. I'll then perturb the oven temperature (say +/-5 deg C) and use that to determine and set the overall system 0 TC point as I should be able to (at least to first order) use the JFET to offset any other system TC.I haven't yet put much thought into the 10V generation, and it may prove too much trouble, but I'd like to be able to generate an arbitrary voltage in a range (0-12V?), basically like a calibrator. Will have to see how that plays out also with the overall temperature compensation as well. However first I have to get some confidence and understanding of the reference itself. I'll also have to think about the noise implications as well...I'm also going for something that can be built and calibrated with minimum of equipment (basically a good DMM and/or null against a +10v reference). I'm not making any quantity so I'm happy to spend the time tweaking the TC of each unit. I should be able to do this by setting up PWM for approximately 10V, then monitoring the output voltage as I slew the oven temperature. Once the TC is tamed, then I would allow the over the settle mid-range for a while and then calibrate the 10V PWM against a suitable reference.Quote from: MK on June 29, 2017, 04:29:39 pmHi MK, thanks for the link. Interesting. I'll probably end up with a bit larger of an oven than that is for. But saved for future reference - thanks!Ash.

author: 0.01C
author_rank: Regular Contributor
timestamp: June 30, 2017, 01:52:35 am
content: Hi MK, thanks for the link. Interesting. I'll probably end up with a bit larger of an oven than that is for. But saved for future reference - thanks!Ash.A Chinese forum bbs.38hot.net ,some people selling their diy oven and reference board , just CNY 200+

author: Marco
author_rank: Super Contributor
timestamp: June 30, 2017, 02:59:13 pm
content: Quote from: Ash on June 30, 2017, 01:16:37 amEven without temperature control you still want all the critical components to be in a predictable environment which quickly gets to steady state, which is to say inside a high thermal conductivity housing. The same as with an oven, it just doesn't need insulation. Put some high wattage resistors on it and make your own temperature chamber.

author: alm
author_rank: Super Contributor
timestamp: July 05, 2017, 03:42:05 pm
content: Would a heater without any insulation not result in a large temperature gradients, something even worse than temperature fluctuations?

author: 1001
author_rank: Contributor
timestamp: August 30, 2017, 04:16:46 pm
content: Quote from: Alex Nikitin on November 14, 2016, 11:37:00 pmUsing the same jfet in plastic (to-92) case how worse could be the TC and long-term stability?Could be a good idea to consider power jfet with lower on resistance then small jfet?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 30, 2017, 04:31:24 pm
content: A plastic case JFET can have much higher long time drift due the humidity in the plastics. As this reference also needs a rather stable (and thus maybe more expensive than the FET) resistor, I see little sense in saving a little one the FET. The 2N4391-3 are still available in TO18 case.A higher power FET could result in lower noise, just like using several in parallel.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: October 03, 2017, 10:28:01 am
content: Tomorrow will be two years since I've started this thread. The 10V JVR unit is back in the lab and connected to the HP3458A. The reference was not powered for two weeks in September when I was away for a holiday in Canadian Rockies and Vancouver. It was not affected much (if at all) over this time and came back to the exactly the same voltage as it was before the power interruption. The measured voltage today after 2h warm-up is 10.00008 V at 24C (previous measurements were taken at 25C). Overall, the drift of a complete reference (including the 7V to 10V amplifier part) appears to be less than 5ppm per year (+ whatever the meters uncertainty and drift is, so in total probably better than 10ppm/year ), measured by HP3458A Opt 002 and also compared with the Fluke 731B which looks very stable.CheersAlex

author: BNElecEng
author_rank: Regular Contributor
timestamp: November 02, 2017, 05:20:51 pm
content: Hi Alex,I've read through the entire thread of this topic. You've got an excellent low-cost voltage reference design by the looks of it. I'm hunting down the parts to make my own now.I was curious if you had had the time to make multiple copies of the same design to use as references against each other, or are you only using your fluke 731B for this purpose?Thanks in advance

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 02, 2017, 05:30:00 pm
content: Quote from: BNElecEng on November 02, 2017, 05:20:51 pmI'm using 731B, HP3458A and an LTZ1000 based reference for cross-checks. The HP3458A Opt 002 (4ppm/year) was calibrated in May this year.I plan to make a proper pcb which would accept either a JFET or LM399 or LTZ1000, and will slide in a standard Hammond case.CheersAlex

author: RandallMcRee
author_rank: Frequent Contributor
timestamp: November 02, 2017, 05:44:22 pm
content: Sounds like a winning pcb. I've been following this too, and have some jfets ready to go. Can you make the pcb available on (for example) osh?Per the ltz1000 I think you should stick to the datasheet circuit as opposed to the more elaborate KX one (my vote--obviously do what you like).Thanks!

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 02, 2017, 06:11:42 pm
content: Quote from: RandallMcRee on November 02, 2017, 05:44:22 pmI have my own ideas.CheersAlex

author: iainwhite
author_rank: Unknown
timestamp: November 06, 2017, 07:40:15 pm
content: Is the schematic for the latest reference the same as the one in Reply #49 on Page 2, except with a 2N4391 JFET and an OPA227 OpAmp?I would like to try building it.Thanks for an interesting thread.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 06, 2017, 10:17:20 pm
content: Here is the latest schematics (for the unit running for 2 years now). R1 is selected for the zero tempco point, R5 and R6 for 10V output.CheersAlex

author: BNElecEng
author_rank: Regular Contributor
timestamp: November 06, 2017, 10:26:22 pm
content: Hi Alex,Is J2 used to start up the circuit? I'm assuming it pulls up the input of the op amp when power is applied, in order to generate a voltage to allow J1 to begin regulating.Thanks in advance

author: Alex Nikitin
author_rank: Super Contributor
timestamp: November 06, 2017, 10:32:08 pm
content: Quote from: BNElecEng on November 06, 2017, 10:26:22 pmYes.CheersAlex

author: Cerebus
author_rank: Super Contributor
timestamp: November 06, 2017, 10:46:35 pm
content: Quote from: BNElecEng on November 06, 2017, 10:26:22 pmHa! You beat me to it. I was just about to type out the very same question.

author: BNElecEng
author_rank: Regular Contributor
timestamp: November 06, 2017, 10:48:14 pm
content: you know what they say about great minds

author: iainwhite
author_rank: Unknown
timestamp: November 07, 2017, 02:44:53 pm
content: Quote from: Alex Nikitin on November 06, 2017, 10:17:20 pmI appreciate you making this available - Thank you.

author: Cerebus
author_rank: Super Contributor
timestamp: November 07, 2017, 03:02:09 pm
content: Quote from: BNElecEng on November 06, 2017, 10:48:14 pmYeah, and also, sadly, about fools.

author: vindoline
author_rank: Unknown
timestamp: March 09, 2018, 02:33:27 pm
content: Quote from: Alex Nikitin on November 06, 2017, 10:17:20 pmHi Alex, thanks for posting your schematic. I'm thinking of building one up and I have a question. R3 on the output is marked "k12" I'm assuming this is a typo and it should be 1k2? Thanks!

author: Alex Nikitin
author_rank: Super Contributor
timestamp: March 09, 2018, 02:38:24 pm
content: Quote from: vindoline on March 09, 2018, 02:33:27 pmR3 is 120 Ohm .CheersAlex

author: stijena1973
author_rank: Newbie
timestamp: January 05, 2020, 04:37:20 pm
content: Quote from: Alex Nikitin on March 09, 2018, 02:38:24 pmAny new developments? Statistics maybe?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: January 06, 2020, 10:10:54 am
content: Quote from: stijena1973 on January 05, 2020, 04:37:20 pmNot much , the unit is still running 24/7 and didn't drift more than 5ppm over last four years.CheersAlex

author: BravoV
author_rank: Super Contributor
timestamp: January 06, 2020, 12:13:38 pm
content: Quote from: Alex Nikitin on January 06, 2020, 10:10:54 amLooking at the price/performace, I call it boringly good.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 06, 2020, 03:05:43 pm
content: Quote from: BravoV on January 06, 2020, 12:13:38 pmThe long time performance very much depends on the stability of the source side resistor. A very high stability resistors can be quite expensive.In addition to being stable the resistor value has to be right for the given FET. So it may take more than just 1 resistor.If it just comes to short time stability / noise the JFET version can still be good and cheap.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: January 06, 2020, 03:27:26 pm
content: Quote from: Kleinstein on January 06, 2020, 03:05:43 pmThe changes in the source resistor are attenuated by a factor of ~30, so a 100ppm change in the resistor value creates ~3ppm change in the output voltage, essentially even a quality metal film like RC55 series may be sufficient as a source resistor. As usual, the main problem is with the 7V to 10V amplifier, as resistor changes are not attenuated much. In my prototype old wire-wound resistors are used and holding surprisingly well as the <5ppm change in 4 years is for the 10V output (the change looks smaller but 5ppm is the reasonable limit that I can measure it to).CheersAlex

author: guenthert
author_rank: Frequent Contributor
timestamp: January 06, 2020, 04:49:16 pm
content: Quote from: Alex Nikitin on January 06, 2020, 03:27:26 pmWhile it might not be nearly as tolerant as a LM399 (with its impressive 0.1Ohm dynamic resistance), contrasting this with, say, an old temperature stabilized Zener like the 1N829 with r=15Ohm, fed from self-referenced 10V supply via a ~515Ohm resistor at about 7.5mA for which a 100ppm change in the current setting resistor value causes a voltage change of about 10ppm, I'd say that's a very good value.So, when can we buy it?

author: Alex Nikitin
author_rank: Super Contributor
timestamp: January 08, 2020, 03:12:54 pm
content: Quote from: guenthert on January 06, 2020, 04:49:16 pmI have no intention to produce it for sale. As the thread title says: build your own. It is not that difficult.CheersAlex

author: TERRA Operative
author_rank: Super Contributor
timestamp: December 26, 2020, 02:17:21 pm
content: Have the schematics been taken down? I can't see them anywhere.

author: jaromir
author_rank: Unknown
timestamp: December 26, 2020, 04:20:54 pm
content: This one?https://www.eevblog.com/forum/metrology/building-your-own-voltage-reference-the-jvr/msg775190/#msg775190

author: Kleinstein
author_rank: Super Contributor
timestamp: December 26, 2020, 05:03:09 pm
content: The circuit with the better choice 2N4391 is just some 12 post before:https://www.eevblog.com/forum/metrology/building-your-own-voltage-reference-the-jvr/msg1343014/#msg1343014Jaromir linked the old one with an J211.

author: TERRA Operative
author_rank: Super Contributor
timestamp: December 26, 2020, 06:00:02 pm
content: Hmm, well that's weird. I can't see any attachments at all...I'll see what's up with my browser etc. Dove into the HTML stuffs and found the link. Got it now, all good.

author: BravoV
author_rank: Super Contributor
timestamp: December 26, 2020, 06:10:54 pm
content: No problem here what so ever, all images are fine at Firefox.

author: exe
author_rank: Unknown
timestamp: December 26, 2020, 06:31:24 pm
content: I don't see the image. Inspecting the element, I see computed image width and height are both zero. I suspect onload="pagespeed.CriticalImages.checkImageForCriticality(this);" for some reason doesn't work. May be it doesn't interract well with one of my browser extensions (disabling uBlock Origin didn't help).

author: TERRA Operative
author_rank: Super Contributor
timestamp: December 27, 2020, 01:07:04 am
content: I figured out the issue in my case, if I disable the HTTPS-Only mode if Firefox settings, the images work.Seems like the OP doesn't have any form of HTTPS enabled on his website so Firefox just says a big nope to any crosslinks from there if HTTPS-Only mode is enabled.Here's a direct link to the schematic on the website.http://www.ant-audio.co.uk/Test_Gear/10JVR_2N4391_001.gif(R3 = 120 ohm)

author: SilverSolder
author_rank: Super Contributor
timestamp: December 27, 2020, 01:52:14 am
content: Reposted circuit as a local image, to reduce dependencies:

author: Kleinstein
author_rank: Super Contributor
timestamp: December 27, 2020, 09:33:53 am
content: For a practical implementation the resistor R1 would likely be a combination of a few resistors, like 4.7 K in series with 300 Ohms and than maybe some larger ones in parallel to the 300 Ohms to do the fine trim. This way the resistors for the fine trim don't need to be highest stability and one does not need to order a highly stable resistor at a specific value (it may be practical in cases - e.g. custom wire would ones)The OPs can be lower grade: for a start the good old OP07 should be OK.

author: exe
author_rank: Unknown
timestamp: December 27, 2020, 11:24:01 am
content: As I understand, J1 is the jfet that generates reference current. What is the purpose of J2?

author: Gyro
author_rank: Super Contributor
timestamp: December 27, 2020, 12:55:08 pm
content: Quote from: exe on December 27, 2020, 11:24:01 amTo provide bias for reliable startup (J1 is biased from the opamp output).

author: exe
author_rank: Unknown
timestamp: December 27, 2020, 01:25:21 pm
content: Ah, got it, it stops conducting when the circuit is active.

author: TERRA Operative
author_rank: Super Contributor
timestamp: December 27, 2020, 04:22:05 pm
content: What's the significance of the asterisks alongside R1, R5 and R6?

author: exe
author_rank: Unknown
timestamp: December 27, 2020, 04:49:01 pm
content: Quote from: TERRA Operative on December 27, 2020, 04:22:05 pmThese resistors need to be adjusted. R1 needs to be trimmed for zero tempco, R5 and R6 define voltage gain. We need to adjust gain because voltage reference J1 has loose tolerance.I'd myself wouldn't try to trim all three resistors and once. I'd first figured out the value of R1, and supplied J1 with the desired final output voltage (what we expect to have at U2 out, typically 10V). After adjustment of R1 is done, I'd trim R5 and R6 (I think only one of them needs to be trimmed) so that final output matches what we expect.

author: Kleinstein
author_rank: Super Contributor
timestamp: December 27, 2020, 06:23:57 pm
content: R1 needs to be trimmed for a low TC. I have not checked the numbers very accurate, but expect some 1-10ppm/K of TC for 1% deviation of the value. The initial trim part, down to some 50 ppm/K is relatively easy, the fine tuning can take quite some time, as one than starts to get the square part of the temperature dependence too. So one needs to wait for the JFET too cool down - not to get a low TC at the wrong temperature. It really helps to have a good DMM (e.g. 6 digits, ideally with a graph) for the adjustment, ideally also a temperature sensor at the reference.The final voltage setting with R5 and R6 should not effect the TC very much.The voltage can vary quite a bit (e.g. some 4 - 9.5 V for the 2N4391). So the value for R1 can also vary quite a bit (even a little more, as low voltage FETs also tend to like more current). So one may want to first do a test with lower grade resistors and check for noise and only than order the final resistors, with still a little room for a fine tune.I did a quick test with a J111 (essentially the TO92 case version of the 2N4391): it kind of works OK on the bread board and the low frequency noise looks promising, e.g slightly better than LM329.

author: dietert1
author_rank: Super Contributor
timestamp: December 28, 2020, 10:37:03 am
content: I checked ten J105 parts left from a previous repair and found pinch-off voltages between 6.8 and 7.5 V at 10 V input. This was at about 1 uA source current (DVM input impedance = 10 MOhm). Then i used two different source resistors 4K7 and 4K7+6K8=11K5 to measure output impedance to be between 84 and 113 Ohm. Source resistor attenuation would be 60- to 80-fold.With one of the FETs the pinch-off voltage was 7.35 V. Tried to find a low TC point starting with 4K7 as source resistor and stopped after trying various values down to 1.3 KOhm, always with strong positive TC. In the end the FET had more than 5 mA of source current and was operating well below the recommended gate voltage = pinch-off - 0.65 V.Then i tried TC compensation with a thermistor in the source circuit. I used two 4K7 MF resistors in series and the 10K thermistor parallel to one of them. Now source current and TC are both small. Output voltage is 6.905 V - similar to a TC compensated zener reference. Next step would be fine tuning in the oven, but before that i will get and try a TO18 2N4391 as recommended above.Regards, Dieter

author: dietert1
author_rank: Super Contributor
timestamp: January 06, 2021, 08:25:29 pm
content: Meanwhile i got 10x 2N4391 and found a pair of them that gives 10.041 V at 1 mA when stacked upon each other. That appears to work very well and is much easier than finding a 2N4391 with 10 V pinch off voltage. The maximum i found was 7.1 V and it dropped to 6.3 V at 1 mA. So better combine two of them.I think this is a way to make an excellent metrology reference:- TC of this 10 V reference is positive and about 12 times less than the usual 6.2 V zener, so you don't compensate 300 ppm/K but 25 ppm/K down to a fraction of a ppm/K. A very similar compensation scheme can be used: based on a fraction of a pn junction CTAT.- Noise is also expected to be lower (no zener noise, no gain stage with voltage divider).- In a divider from 10.041 to 10 V we only need precision for 41 mV. No problem with TC of some ppm, it will be attenuated a factor 200.- If you think about the long term stability of wire bonds the small current through the reference appears an advantage.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 07, 2021, 08:34:39 am
content: For trimming the TC, the obvious way is to trim the current. With the right resistance value the linear TC can be trimmed to near zero - a little like it was done with the old 1N829 compensated Zeners. It is not very convenient for mass production, but for a single unit as a hobby project this is very feasible. One should get below 5 ppm/K without too much effort.Ideally one would have some kind of simple oven and temperature reading, to aid in the adjustment, especially at the fine end.A simple oven regulation would also be effective against the higher order TC and with a well trimmed linear TC the demand on the oven is no longer that high.A difficulty is the large scattering in the voltages. Chances are a batch of fets would be relatively close - so one may not have much to choose from and ordering 10 or 20 pieces from a single source would not extend the voltage range a lot. Getting 2 FETs to give close to 10 V is more like a lucky find - I would not count on this.As far as the data-sheets tell, the zero TC current would change a little with voltage. So stacking 2 FETs with significant different voltage would likely result in slightly positive TC for one fet and a slightly negative TC for the other. So temperature differences could cause an error. A resistor in parallel to the lower FET (with higher threshold) could compensate, but is extra effort.

author: dietert1
author_rank: Super Contributor
timestamp: January 07, 2021, 10:52:42 am
content: The reason why i am not using current to compensate TC is in one of your previous posts: The difficulty to adjust, since the source resistor should be a precision resistor. In my test setup i am using a 5K UPW50 that we had. The lower JFET gives 5.46 V of which i am using 0.55 V for the diode, so i get almost exactly 1 mA. Parallel to the diode i have a voltage divider to drive the lower FET gate with the small compensation signal. I think that divider can be made with standard MF resistors.To keep temperature differences between the two FETs and the diode as small as possible, i soldered them one next to each other into a small raster board. Thermal coupling can be improved by potting that part of the board and finally using an aluminum enclosure as oven. Or use plastic FETs that can be glued into a common piece of copper.Concerning the "lucky find" objection: Of the ten JFETs i had two got destroyed during experimentation (pinout confusion). From the remaining eight i found that pair with 10.041 V, but there are 3 pairs between 10 and 10.3 V. Statistics helps if you start with 100 parts.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 07, 2021, 12:28:08 pm
content: Using a diode in series with the resistor will change the TC, even if not tapping of a part of the diode. It should shift the zero TC current more towards a lower current. In addition it would effect the 2nd order temperature effect , though I don't know if it would make things better or worse.For adjusting the resistor, there is still the option to combine a precision resistor with an smaller series one or larger parallel one. If the good resistor is not too far off, the additional resistor would be not as critical. Not sure if the combination with a diode and resistors for a trim is more stable. It probably depends on how good the initial guess is.When starting with a bag of JFETs near 5 V it is easy to find a pair for 10 V. However it is well possible to have bag of 100 FETs all higher than 6 V. Variations inside a batch can be limited. Still even with 2 x 6 V = 12 V or with some 7.5 V from one Fet one would have a better start for a transfer to 10 V than from the usual 6.9-7.2 V. 7 V is about as bad as it can be: 2 in series and a divider down is about as bad as the direct amplification. So every thing away from 7 V would be an improvement for scaling to 10 V.

author: dietert1
author_rank: Super Contributor
timestamp: January 07, 2021, 04:36:25 pm
content: An incubator test 20 °C to 40°C to see whether the diode compensation signal is linear was done before, but that was using a single JFET and a HP 3478A meter. In that test deviations from linear were within resolution = 20 ppm, with no indication of a nonlinear term. From that test i learned that for perfect compensation one has to take into account the source follower gain which is slightly less than one.Will repeat that with a more complete circuit including reference buffer and 10 V to 15 V gain stage as intermediate supply. And with more precision to look at ppms and below. Maybe using 14 V as intermediate supply it can work with the 15 V supplies we have.Regards, DieterPS: The 2N4391 are Motorola NOS and i already ordered another batch from somewhere else.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 08, 2021, 05:12:14 pm
content: I did a quite test for the temperature dependence with an 2N4391. In my case the voltage is at around 6.8 V - so kind of comparable with the classical 7 V ref. I currently have a combination of simple resistors, but heating the JFET only. As a funtion of temperature the voltage shows a maximum.Having a diode as part of the source resistor would increse the current with higher temperature this would cause a more downward slope. So the diode would increase the 2nd order effect.The split in the up/down part is likely due to not so good thermal coupling to the sensor (diode).

author: dietert1
author_rank: Super Contributor
timestamp: January 08, 2021, 06:54:46 pm
content: Today arrived another batch of 10x 2N4391 (mixed Motorola and Philips) and now i got six pairs with 10.024 V, 10.041 V, 10.041 V, 10.054 V, 10.088 V and 10.195 V, a nice result. For both batches i spent about as much money as one LTZ1000ACH - plus several hours of characterization and selection. Until now a bit of try and error.Kleinstein, i observed that 2N4391 source voltage TC at 1mA and room temperature is positive and lower for higher pinch-off voltage parts. The part you are using probably has a pinch-off of about 7.6 V. The test i mentioned above was with a 2N4391 at 1 mA and 5.5 V Ugs. It showed positive TC up to 40 °C .Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 08, 2021, 08:48:38 pm
content: One gets a positive TC with a resistor that is larger than optimal. I get about 15 µV/K more for another 100 Ohms extra. So to get the TC down to 1 ppm/K one would need to adjust the resistor to some 50 Ohms.The Drain voltage has quite some effect on the voltage and suitable resistor. So it absolutely makes sense to get this from the amplified ref voltage. If this voltage is only used for the supply, one could do the fine trim of the TC also here, at least for a small range. To avoid extra 1/f noise one usually wants a relatively low drain- source voltage (e.g. < 5 V).The 2nd order TC at some -0.19 ppm/K² seems to be comparable to what one gets with compensated zeners. So for a really stable reference one would need either a stable temperature or a compensation for the 2nd order effect.

author: dietert1
author_rank: Super Contributor
timestamp: January 09, 2021, 02:25:33 pm
content: In a first determination of curvature for one of the JFET pairs i also got a flat max of the temperature curve, with -0.054 ppm/K² curvature. Since i compensate the linear term, the max temperature is in the middle of the temperature sweep (20 °C .. 40 °C). You can also see that this time i need 0,36 of the diode correction signal.Next i need to improve and automate my setup to look at it below ppm level.Regards, Dieter

author: SilverSolder
author_rank: Super Contributor
timestamp: January 09, 2021, 04:23:27 pm
content: I have a question on temperature correction: Is the temperature dependence repeatable? - e.g. so if you know the temperature, you also know the offset?I'm thinking, you could measure the specific device and create a lookup table in a small micro that compensates the reference (either mathematically after the fact, or via a D/A converter feedback to the output voltage). Workable?

author: Kleinstein
author_rank: Super Contributor
timestamp: January 09, 2021, 05:00:20 pm
content: The temperature dependece is rather repeatable. The slope depends on the current / resistor used , but for give device it should be rather stable.A feedback from a DA may be possible. It may still be good idea to first adjust the lineat TC to a low value (e.g. bring the temperature of the maximum to something like 10 - 40 C), so that the deviation range is small and thus not too much correction term. To keep the low noise level I would expect that DA steps would have to be a little below 100 nV - so some 10-11 Bit to corret up too 100 µV.The alternaive would be a temerature regulation to a litte above normal operating temperature. With a well trimmed linear TC the redulation would not have to be so accurate.

author: Cerebus
author_rank: Super Contributor
timestamp: January 09, 2021, 05:03:37 pm
content: Quote from: SilverSolder on January 09, 2021, 04:23:27 pmReasonably predictable. The temperature dependence curve is subject to hysteresis, so you have to know the temperature history, it isn't just a straight temperature lookup. The amount of hysteresis is also dependent on how far out the temperature has wandered. So, it isn't simple. The more history you have, the better a temperature dependence model you can build, but it's a model you need, not just a simple lookup table.

author: dietert1
author_rank: Super Contributor
timestamp: January 09, 2021, 06:01:44 pm
content: We have two LTFLU references that run in hermetic TEC ovens at about 17.4 °C and 27.7 °C and i can tell that no significant shifts (more than 0.03 ppm) have been observed after temperature cycles. Those were accidental oven shutdowns or during reconfiguration. I'd suspect that temperature hysteresis is more relevant for high temperature ovens like the LM399 or the LTZ1000, but not at lower temperature. As far as i know most of the experts here do not implement the Pickering anti-hysteris cycling in their LTZ1000 references.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 09, 2021, 06:15:27 pm
content: Hystersis is more a thing of larger excursions, much less of small excursions. The absolute temperature would not make that much of a difference - this more like changes the time scale for thermally activated effects.When the temperature is set relatively close to room temperature there are usually no large excursions. The ref. chips are build to have low hysteris - we don't yet know how bad it is with the JFETs that are not specially made to have low hysteresis.I did see a little hysteresis, but not much and this could very well be from the not so ideally places temperature sensor and from contacts (I still have the FET in a socket).

author: dietert1
author_rank: Super Contributor
timestamp: January 09, 2021, 07:22:36 pm
content: No, you didn't see hysteresis. You don't know what you saw.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 11, 2021, 12:22:09 pm
content: I did a quick test on the noise levl of the JRV refernce. As the noise is relatively low, this is not so easy.The main idea is to build kind of 2 JRV type reference (2N4391 + 6.18K + stable drain voltage) and measure the amplified difference.For the amplification one of the references is modified, so that the gate is used for feedback. So the circuit is the same as the old days combination of 2 JFETs as source follower before an BJT based OP.The drain voltge is stabilized from the 1st unmodified ref. part.Attached is the first test, so there is still quite some temperature rise with time - which is kind of positive.The resistors are such that the idividual temperature drift is relativly small, though not perfectly. For the differnce one has a temperature dirft of some 20 µV/K - so not good for an amplifier, but not so bad for a crude hacked togetger reference at some 7.1 V.The curve shows the change in voltage difference over some 12 minutes plotted versus a diode voltage to measure the temperature change. The temperature rise is still relatively linear in time.The noise is surprisingly low with some slight signs of pop-corn like jumps. Some of the noise may still be from the crude setup and simple resistors (may still be thick film, though not sure). So there is a chance to get a really low noise refernce.edit: add circuit diagram for the test

author: Kleinstein
author_rank: Super Contributor
timestamp: January 11, 2021, 03:09:12 pm
content: I just realized the drain voltgate part was not really working - so some of the noise / drift could be from that end.I repeated the part with working drain voltage part and changing the amplier OP to an OP27 (much of the higher frequency noise was from the OP07 - and the OP27 still conributes).The plot is this time versus time and not "temperature" and a little more zoomed in.So it looks like the 10 seconds peap to peak noise can reach the 1 µV region - so about comparable with LTZ1000 / LTFLU.

author: exe
author_rank: Unknown
timestamp: January 11, 2021, 03:26:41 pm
content: Kleinstein, on your schematic both Q1 and Q2 have same source resistor. It means that at least one of them not trimmed for zero tempco. So, can be part of change in voltage difference is due to temperature change?

author: Kleinstein
author_rank: Super Contributor
timestamp: January 11, 2021, 04:48:01 pm
content: The tempco is not trimmed very well, but the residual TC for the difference is also not so large (20 µV/K range). For 1 of the JETs the TC is reasonable well trimmed. The general slope in the plot versus temperature is very likely the temperature effect. The noise may be a littel better with better adjusted resistors, but I would not expect that much improvement.The noise part is more like small jumps of some 0.5 µV - this is definitely not a temperature effect. The short time noise bewteen the jumps has parts from the OP, especially in the first curve.The points are 20 ms integration and thus 25 Hz noise BW. The data are 1 point about every 81 ms. The "missing" points are not expect to contribute much to the noise. So the data from 10s windows should about reflect the 0.1 Hz to some 10 Hz noise. The exact upper end of the frequency band does not make much of a difference in this case, as there is little noise between some 5 and 25 Hz.

author: dietert1
author_rank: Super Contributor
timestamp: January 14, 2021, 09:47:10 pm
content: Meanwhile i automated my dual JFET reference setup. I am using 2x Fluke 8502A (A and B). To check for hysteresis i tested temperature dependence at various fixed temperatures - no scan because of sensor lag. This test shows no indication of hysteresis above a limit of maybe 0.5 ppm. Only the first point at about 20 °C shows more deviation, but i know that the DVMs drift a little in the morning while warming up after the night.This time the diode voltage is a bit higher, since i omitted the 1K resistor parallel to the diode (placeholder for TC divider). I was hoping that curvature would reduce. But results are the same as before (-0.060 ppm/K²).Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 14, 2021, 10:08:48 pm
content: If I understand it right, a diode in series with the source resistor would add to the curvatutre, though not very much. With increasing temperature the current for the reference could go up, and a high current gives a more negative TC. So the curvature gets larger.A diode at the drain side could help a little to reduce the curvature: lower drain voltage reduces the reference voltage and current. The ideal zero TC current would also drop a little, but not as much. So one could get a little compensation for the curvature. However from my estimates the effect would be rather small. So I don't think it would be practical to fully compensate the curvature this way. With the 2 JFET version the diodes could be between the FETs: the DS voltage should ideally not be very large (e.g > 5 V) anyway.

author: dietert1
author_rank: Super Contributor
timestamp: January 14, 2021, 10:47:15 pm
content: Yes, the TC of a diode in the drain path arrives at the reference output with some attenuation, which is very interesting. In order to get the required fraction of 0.36 i would need several diodes, maybe 5 or 10. To get the TC sign correct, the diodes will not be in the drain path, but in the intermediate supply divider. Will try that later.Regards, Dieter

author: DeltaSigmaD
author_rank: Contributor
timestamp: January 26, 2021, 12:12:39 pm
content: The JVR reference circuit is known at least since early 70s, but it wasn't used in measurement equipment because its initial reference voltage has huge tolerances. However, it is reported in this forum that the stability of the JVR can be amazingly good. The pressure to find better references is high, so the JVR should be analysed as low power, low noise reference in this new light of stability.Kleinstein and dietert1 discussed the temperature dependency of the JVR. I performed some simulation experiments with LTSpice. The first diagram Fig.1 shows a temperature compensation for a JVR, so that the residual drift has a forth order shape. The reference voltage deviates less than 4 ppm from -20°C to 57°C. It is possible to move the minima closer together in order to get an optimally flat zone, see Fig.2. However, this theoretical result is too good to be true: as the precision of R1 and R2 shows, a perfect matching of the characteristics of J1 and Q1 is essential to obtain this low temperature dependency. I assume that such tight matching can be hardly realised in practical circuits, or it will need days or weeks of work. Assuming this adjustment can be obtained, it will be complicated to ensure that J1 and Q1 chips have a temperature tracking better than 3 mK. The reference voltage is defined by the combination of 3 large currents, and good long term stability cannot be expected therefore. Other simulated circuits with third order residuals are not better in this aspect.If the allowable working temperature range is not too large (f.e. with battery-operated hardware), the temperature of the reference JFET can be measured and its drift is corrected by software, so that drift compensation by analog hardware can be omitted. Long-term stability is the remaining problem. Fig.3 shows two 10V JVR reference circuits without compensation. The lower circuit uses an OP amplifier to get the 10V value, while the upper circuit uses JFET J3 for amplification and the OP only as buffer. The simulation shows that the noise of the reference alone is much lower than the noise of the OP. Therefore, the upper ref should be applied for low noise, even if its adjustment (drift maximum and voltage) is more complicated. C4 reduces the high fequency noise to the noise value without amplification.Assuming the LTSpice JFET models are correct, the JFET reference has very low noise. The buried Zener references have a sharp break-down, while the JVR has a soft working point, even softer than of bandgap references. The depletion zone of the JFET has a large volume, while a Zener reference relies on a limited set of hard punctual microplasmas, which must be very sensitive to interstitials, voids, impurity clusters etc.. Please see Zener microplasma action at Richi's Lab - unbelievable microscope pictures there.The essential point of the circuit Fig.3 top is that only 2 parts must have utmost precision. Since no heater is applied, there will be no temperature hysteresis with power failure and the temperature gradients around the reference JFET can be kept very low (Kovar feed-throughs at hermetic case!). Is it possible to obtain long-term stability with a soft working point? How large is the temperature hysteresis of different JFET types? The next step is testing of real JVR hardware, which includes the JFET case temperature measurement.

author: Cerebus
author_rank: Super Contributor
timestamp: January 26, 2021, 01:14:40 pm
content: Quote from: DeltaSigmaD on January 26, 2021, 12:12:39 pmSadly this isn't the case. It isn'tLTSpice, or evenspicein general that is to blame, it's the models. I don't think I've yet encountered a single BJT or JFET model that actually properly populates the model parameters that allowspiceto model \$\frac{1}{f}\$ noise properly. With those parameters at their defaults you always get optimistically good results for \$\frac{1}{f}\$ noise.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 26, 2021, 01:40:26 pm
content: The 2 nd order TC is relatively large. So the numerical correction for the square part is not that easy, if the range gets larger.The analog compensation is tricky, as this often also give quite some linear contribution and thus needs to be quite stable.I compared J111 (similar to 2n4391) and J113 (similar to 2N4393) they both showed a comparable 2nd order effect at around 3 µV/K². So inprinciple one could use 2 similar JFETs with different theshold and only use the difference - so kind of a discrete version of what AD called the XREF referencce. The drain voltage seems to have some effect also one the 2nd order TC, though not enough for a full compensation.For ultimate stability, temperature stabilization is likely the way to go. Even only a crude temperature stabilization is quite effective against the square effect. Trimming the linear TC to some 5 ppm/K is not that difficult, so that the requirements for the oven can be moderate.Trimming the 2 nd order compensation can be quite trick, it can be done, as shown with the Solartron 7071 , but it is quite some effort.The large scattering in voltage level is a problem. Using resistor gain is tricky, if the adjstment range is larger. This does not get much better when the adjustment is done like in Fig3 combined with the Ref. itself. It saves 1 resistor, but the demand on the resistor that needs adjustment also goes up.For a DMM or high resolution ADC a variable reference votlage to start with may not be that bad. Some designs measure the ref. voltage directly by the ADC to adjust / check the ADC gain factor anyway. This step can tolerat a large range, as long as it is well within the ADC range. It would be only 1 gain stage to set the working ref. voltage to the ADC. I am actually considering a JRV ref. for my ADC circuit - availabilty of LM399 and LTZ1000 is currently not the best.The simulated noise is not especially accurate, epsecially not for the 1/f part.However the measured noise also looked good, at least for the 2N4391 and J111 that I checked.

author: dietert1
author_rank: Super Contributor
timestamp: January 26, 2021, 05:10:44 pm
content: Here a little report of my recent tests with a JFET pair prototype.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 26, 2021, 06:15:16 pm
content: The circuit looks a little odd at 2 details: the capacitor C3 is quite some capacitive loading to the OP IC1 this does not look right.The ouput amplifier looks like it can tolerate some capacitance, but having already 10 µF (C11) allready looks like pushing it close to the limit.In my test I see very little higher frequency noise - so there is likely no need for most of the caps, at least not that large. The datasheets also suggest vers little higher frequency noise.The OPA140 is a really good JFET OP, but it can still have quite some 1/f noise by itself. The more suitable choice for the amplifier would be more like precison BJT baded ones. So more like the classic OP27 or OP07. Modern higher performance ones (e.g. OPA207 or AD8676) are also possible, but likely not needed.The ouput impendace (some 150 Ohms+R2) should be low enough to drive a BJT based OP with no problem.

author: dietert1
author_rank: Super Contributor
timestamp: January 26, 2021, 06:32:22 pm
content: Yes, there is a more complete schematic as well. The schematic i showed is "schematic" and was meant to show my variant in contrast to the above LTSPICE models. Not meant for copy-kids. Meanwhile i think i will make a board and then use a chopper amplifier like OPA2189. Also the diode signal should not be brought out on a wire, but with a buffer with some gain (bridge circuit).Regards, DieterPS: The divider for the TC correction signal can be made temperature sensitive, e.g. by using one resistor with a certain TC. That becomes a multiplier for the TC correction signal to generate a second order correction term. Just an idea.

author: IconicPCB
author_rank: Super Contributor
timestamp: January 29, 2021, 11:20:23 pm
content: Dieter,Thank You for the report.For some reason I am under the impression that in the two fet cascode like structure the fets should have different pinch off voltage ratings.Specifically the upper fet should have pinch off voltage which is typically twice the pinch off voltage of the bottom fet.Expected device selection upper fet 2N4391 lower fet 2n4392.Please consider

author: dietert1
author_rank: Super Contributor
timestamp: January 30, 2021, 07:56:19 am
content: Yes, it appears like a cascode, but the upper JFET has an elevated gate voltage. In my prototype the lower FET runs at Ugs = -5.6 V and Uds = 4.4 V. The upper JFET runs at Ugs = -4.4 V and Uds = 3.3 V. If i exchange them it should still work, except with lower current.This proposal was meant as method to overcome the large uncertainty in pinch-off voltages by selecting pairs of JFETs. Think of two 5 V zeners. Imagine you could only get bad zeners with a specification of 5 +/- 2 V. Then you could combine a 4 V one with a 6 V one to get 10 V without throwing away zeners.Somewhere in this thread Kleinstein proposed to search for JFETs with 10 V or near 10 V pinch-off, but i haven't found any. I even ordered a batch of BF247C which are specified for up to 14 V pinch-off, but again nothing like 10 V.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: January 30, 2021, 09:42:41 am
content: The circuit is essentially 2 of the JRV references in series. 2 in series give more choices with the voltage.The more unusul part is the diode use to compensate the residual TC - the usual way is by adjusting the resistor to set the current. The diode may give a little more flexibility with the voltage, though also a high 2nd order TC.One could combine 2N4391 and 2n4392 to get a special target votlage like 10 V, though there is a tendency that the 2N4392 would need a little more current to get near zero TC. So one may want some extra resistor to get both FETs in the range of low TC.10 V from a single FET would be rather extreme - this would be more like a possible target if special fets would be designed for this purpose. The largest I have found so far is one J111 with a little over 8 V. The voltage can vary between batches and also somewhat (e.g. +-500 mV) inside a batch.

author: dietert1
author_rank: Super Contributor
timestamp: January 30, 2021, 11:09:47 am
content: No, 8 V may the pinch-off voltage, but if you increase current to get near zero TC, you will have more like 6 or 7 V. Getting 10 V with one JFET was fantasy.I am using a diode for TC compensation because for me adjusting TC by JFET current didn't work. Above i reported my experiments with J105 JFETs that did not reach zero TC at more than 5 mA. And from my discrete bandgap reference experiments with diode chains i learned that currents in reference elements should be small. Otherwise there will be the bond wire weakness. If you assume that a bond wire is 10 milliOhm, then 1 mA contributes 1 ppm. A common 1 mil bond wire has about 50 milliohm per mm of length. Recently i found a 2N3055 with redundant bond wires to the emitter - both completely open.Kleinsteins statement about "high second order TC" is fantasy as well. Please look up the numbers and diagrams above. The temperature sweep in my little report shows less than 1 ppm curvature between 20 and 28 °C. So this is as good as any temperature compensated zener, except with a much smaller linear compensation in case of the JFET.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: February 03, 2021, 10:11:36 pm
content: Finally got a step further with an oven for the JRV reference. At least at the sensor used for regulation the temperature is quite stable (some 10 mK_pp).The oven is some 32x32x20 mm with 2 mm (0.6 mm one side) aluminum at the outside, where the heater is attached. There is some isolation with bubble-warp, just for the first tests.The set temperature is relatively low, at some 30 C or so. I may want a little more isolation and a slightly higher set temperature.The curve shows the measurend voltage and heater current (15 V voltage). At some 2300 s the whole oven is covered with some paper - this likely caused the power slowly going down.The noise and medium time stability looks good - as far as one can tell in comparison to a LM399 ref.A little of the higher frequency noise is from the ADC (some 1 µV_pp for average over 12 conversions at 1 PLC). The pop-corn like jumps (~2 µV) are larger than with the 2 JRV ref. test before (~0.5 µV). Still not sure if they are from the LM399, as the jumps there often looked larger (e.g. 4 µV). Still the overall noise looks good, given that it includes an LM399 (filtered to some 5 Hz - but this should not help very much).

author: Kleinstein
author_rank: Super Contributor
timestamp: February 07, 2021, 05:32:01 pm
content: Comparing the JRV to a meter with LM399 reference is not really sufficient to judge the noise at this level. So I added a 2 nd JRV type reference to the same ofen (found just enough space to fit) using the same drain voltage and without buffer.The curve shows the voltage of the 2 reference measured in parallel with the same ADC / ref. The points in the curve are for the average of 24 conversions at 1PLC in a fast sequence. So not exactly at the same time but very close and overlapping. Each point represents about 2 seconds.In the initial part the temperature is likely not yet full stabilized.The curve shows the noise from JRV reference plus the LM399 (seems to be a rather low noise one with only rare large popocon type jumps) at the ADC. There is some correlation in the noise, but only partially. Much of the noise seems to come from the JRV references and not the ADC or LM399. The ADC contribution should be essentially white noise of some 0.8 µV_pp.The noise of the 2 curves looks a little different from what I saw in the direct difference on the bread board. So I checked for excess noise of the resistor type (Susumu RR - thin film 0805 size 25, ppm/K specs) used for th source resistors and the amplification for the drain voltage. The test showed low noise (better than -50 dBi noise index, which is about the limit for my simple test setup - DC bridge with NiCd batterie for floating bridge drive and AZ OP for amplification). So there should be essentially no excess noise from the resistors. It would take rather noisy resistors (e.g. -10 dBi range) to see the resistor excess noise at the JRV output as the resisor noise is attenuated about 30 times.

author: dietert1
author_rank: Super Contributor
timestamp: February 07, 2021, 07:33:23 pm
content: Would you tell at what source currents the JFETs run and the temperature of your oven? Can you run a difference measurement, so the LM399 noise is out?Until now i have only one ovenized JVR and my estimate would be about 2 uVpp. Will also make a prototype with two JVRs to get the difference measurement. Also with two of them, the average should have less noise..Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: February 07, 2021, 08:20:18 pm
content: Both FETs use a source resistor of 6.191 K nominally. For both this is a resonable good trim to low TC, though I still need to measure the voltage versus temperature curve.So the current is at 1.1 mA resp. 1.13 mA. The drain voltage is at 4/3 of 6827 mV thus 9.1 V.The temperature schould be at around 25-30 C, so a little above room temperaure, but not very much. The temperature is stable and like with the curve before there is no real correlation between heater current and ref. voltage. For the initial tests on the bread board I also had a noise level more like 2 µV_pp, though for a shorter time frame.A direct difference reading is a good idea. I can at least plot the difference from the same data file (see atachment). So still both conversions, but at least without much of the lower frequencey noise of the LM399. At the ADC there is some low pass filtering (2.2 Hz cross over) for the LM399 reference, so the higher frequency part of the LM399 noise is suppressed quite a bit. A direct difference measurement would be slightly better, but needs a new run. For the resistor noise measurement I have a difference amplifier anyway - so this would be relatively easy, just needs time, so maybe tomorrow.edit : had the wrong curves with difference to LM399.There seems to be something slightly wrong with the scale factor of one of the curves. The 2nd ref should be more like 6927 and not 6977 mV. It does not change much with the dift or noise.The noise is still a little higher - but given the relatively long time (some 3 hours) the difference is not that large. The timescale for the curves is a bit longer than the usual 0.1 - 10 Hz windown often shown in data-sheets.

author: SilverSolder
author_rank: Super Contributor
timestamp: February 08, 2021, 02:16:46 am
content: How does the noise compare to LTZ1000?

author: Kleinstein
author_rank: Super Contributor
timestamp: February 08, 2021, 08:56:41 am
content: Quote from: SilverSolder on February 08, 2021, 02:16:46 amOver short times (e.g. 10-100 s windows) I would consider the noise comparable to the LTZ 1000, for the white noise part the noise is even considerably lower (some 5 nV compared to 40 nV). However for the longer run (e.g. 1 hour) / lower frequencies there is higher noise (some 3-4 µV_pp compared to maybe 1.5 to 2 µV für the LTZ).For most refrence applications the longer time scale is relevant, not so much the very short time. So the usual 0.1 - 10 Hz (or peak to peak noise over a 10 s window) specs for low frequency noise are more like convenient to measure and not that close to real world use. For real world it would be more like 0.1 -10 mHz.For the long time scale I am still not sure if the oven is good enough, but chances are it is. The LTZ starts with a relatively high TC (some 50 ppm/K) and thus need a very stable temperature control. The JRV can be adjusted to a low TC like 1 ppm/ K range to start with and than get away with a less stable oven. So different from the LTZ the set point for the oven is not so critial - it is the resistor at the source that is critical for the long term drift. Also the amplification for the drain voltage seems to need good resistors - my inital crude meassurements do no match up the datashett numbers as I understand them. This could be in part because the Fets are really high threshold ones, not the more average ones.

author: Kleinstein
author_rank: Super Contributor
timestamp: February 08, 2021, 07:59:28 pm
content: I did the test with a direct difference measurement. The difference signal is amplified by an AZ amplifier in a way that the ADC switches between +21.8 times the signal and -21.8 times the signal. This gives an AZ mode with near 100% sampling and 2 PLC data with 25 reading per second. I used the same amplifier for resistors noise testing an it was low noise and low drift there. So the ADC and amplifier noise should be only a very small part. The buffered reference is use for the "ground (low impedance terminal of the amplifier)" the other ref. is not buffered and has some 68 pF+100ohms for filtering at the AZ OP.It took quite some time for warm up - so that curve starts at 4000 seconds. It seems the TC adjustment is not that good as I thought.The initial data look good, but later there is quite some nasty up and down. It still looks more like Popcorn type noise with relatively fast jumps, not really like a more slow drift or smooth variations as expected for a thermal effect. So at least one of the 2 reference is not behaving well. Over some short parts it still looks OK, but as a whole this does not look good. The shorter term part is still comparable to the indirect difference measurement reading both voltage separate. So it does not like the amplifier or oven is the problem.

author: DeltaSigmaD
author_rank: Contributor
timestamp: February 23, 2021, 02:10:30 pm
content: The 3rd order compensation of the temperature dependency of a JVR (as described Jan 26th) was verified in hardware. The compensation circuit was largely improved. A first prototype yielded a 5V voltage with 3.5ppm stability from 20°C to 32°C, see attached diagram. The 1 day drift is also within a 3.5 ppm box. More details can be found in the attached paper. Next, the stability over longer time will be measured. Note: the Keysight 34470A is used for reference voltage measurement.

author: dietert1
author_rank: Super Contributor
timestamp: February 23, 2021, 03:49:09 pm
content: Nice experiment, thanks for the report. As far as i understand the transistor circuit works similar to a bridge circuit that allows control of the curvature of the base-emitter diode temperature curve. I mean the real temperature sensor is the base-emitter diode of Q1. Is that correct?Did you think about giving Q1 a Miller capacitor to calm down it's operation point?Also it appears to me that your FET is running at about 2.5 V of Ugs. The gain inherent in R7 R19 R8 should be a little less than 2. Did you try to find a FET with a higher Ugs? This would also help with noise.Regards, Dieter

author: DeltaSigmaD
author_rank: Contributor
timestamp: February 24, 2021, 07:23:15 am
content: The base-emitter diode of the bipolar transistor is working as nonlinear temperature sensor. The zero TC working point of the JFET is shifted to a particular position so that an agreement of 1st, 2nd, and 3rd order can be obtained at the working temperature. That is the reason why there is a power-on drift of the reference voltage.The miller capacitor may improve the high frequency noise. But, if two capacitors --> lowpasses are in the feedback loop, there might be oscillation. The cap values must differ by more than one order of magnitude. I will place a Miller cap next time.There is no free choice of Vgs, I could not order the JFETs I would prefer. The reference voltage gain by R7 R19 R8 has no effect on noise above about 10 Hz. Of course, a higher Vgs would be better. Stacking of JFETs is questionable: stacking is better if we are in the white noise region, but this noise contribution is filtered out anyway. If we have 1/f-noise or even random telegraph noise, stacking is not helpful since noise is added (sum, not sqrt(sum)) - correct me if this is wrong.

author: Kleinstein
author_rank: Super Contributor
timestamp: February 24, 2021, 09:05:16 am
content: Even with RTN type noise using more FETs helps. The jumps are non correlated and with "averaging" the individual contributions one gets an even linear reduction in the step size. So with 2 refs in series the jumps don't get larger, just more frequent. So using more FETs would also help in the RTN regime range. For a certain time range the peak to peak noise may not go down, but the RMS noise still should give the the normal square root N reduction in noise, as the parts are uncorrelated. More frequent smaller steps may be even preferred over rare large steps.Stacking can make the TC compensation more tricky though.The fets have quite some scattering ( I got 2N4391 with around 7 V ref voltage, while Dietert got some more around 5V), but there is still a choice in the types. The 2N4391 should be mainly be in the 4-8 V range. 2N4392 would be more like 2-5 (have not checked the exact numbers). So one has some choice.The 2N4416 is a more lower threshold fet and also lower current and thus maybe better for battery operation.It is also one of the few more affordable ones in a hermetic case.It may be possible that the TC correction does not work as well with a high threshold FET. At least the rather high (7 V range) threshold fets may behave a bid different from the usual models. There may be also a slight different between different types: the process 50 of the 4416 is more like made for RF use, while the process 51 for the 2n4391 is more made for switches. These types may differ in series resistance in addition to the actual FET and this can be part of the temperature dependence.There may be even some advantage in not having too high a voltage per FET: at least for the normal amplifier operation there are curves in data-sheets that show that the low frequency noise goes up if the drain source voltage goes up, especially higher than some 5 V. For me it is not clear if the drain source or maybe he drain gate voltage is the relevant voltage. In my test I have not seen a large difference between J113 and J111 / 2N4391 , but RTN noise is not that reproducible and can vary between units.

author: IconicPCB
author_rank: Super Contributor
timestamp: February 24, 2021, 10:53:46 am
content: I think process 52 is better suited to the JVR needs.

author: dietert1
author_rank: Super Contributor
timestamp: February 24, 2021, 01:00:27 pm
content: Can you tell us how you arrived at this opinion?Just found this description of a JFET selection setup and results:http://www.geofex.com/Article_Folders/fetmatch/fetmatch.htmI think he is correct in not looking at the pinch-off voltage, but at a useful operation point.@Kleinstein: I looked at four 10x batches of JFETs: J105, 2 batches of 2N4391 from different sources and a batch of BF247C.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: February 24, 2021, 02:08:53 pm
content: The process 52 looks good, as it is used for relatively low noise audio use. So one can expect a low noise. The other important paramterer is the current range where to expect low TC.From the typical graphs in Fairchild AN6609 one would expect them to get low TC at some 0.2 to 0.5 mA , though it is not accurate to tell from the graph. There is also more than just the mask - the doping can also effect the properties.The problem may however be to get suitable ones with a not too low Ugs, especially if one wants a hermetic case.The process 51 (e.g. 2N4391) can also provide low noise, though at a higher current. Still some 1-1.3 mA is not that bad. It may not be the best choice for battery operation, but higher current helps with low noise. The nice thing is that the 2N4391 is readily avialable at a relatively good price.Higher current fets (e.g. J105) may need to run at so much current that self heating gets a real problem.For amplifier use there seem to be a preference for a relatively low threshold at some 0.5 to 1 V. So especially the lower noise types are usually not a vailable with a higher threshold more useful for JVR.

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 02:22:19 pm
content: Quote from: Kleinstein on February 24, 2021, 09:05:16 amI just did "run to order a affordable hermetic FET" to get a few before they all are obsolete -> 5.5€ to 11€are these hermetic packages hand made by grey bearded virgins. they are so expensive, cheapest cellphones are almost on that price range.How this JVR actually differs from the old constant current FET arrangement. The resistor is obviously hand-picked and low ppm variety? Also how this is different from 1N829A based solution, it is doing basically the same feeding a constant current through a selected component and voltage is used as reference. Is it for better aging (hypothetical) or noise or both?

author: SilverSolder
author_rank: Super Contributor
timestamp: February 24, 2021, 02:36:32 pm
content: You can get a current regulating FET "diode", e.g. 1N5297 for 1mA. They have quite a hefty temperature coefficient though, and I'm not sure about other parameters e.g. noise.

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 02:41:46 pm
content: Quote from: SilverSolder on February 24, 2021, 02:36:32 pmI did refer to this arrangement seen here and there for "ages", dubbed just as 'FET current limiter' etc.https://www.vishay.com/docs/70596/70596.pdf

author: dietert1
author_rank: Super Contributor
timestamp: February 24, 2021, 02:53:22 pm
content: In the end the idea is using the nonlinear FET behaviour as a low noise alternative to a zener diode. Zener diodes are inherently more noisy, there is enough literature to explain about the avalanche process. Forum member noopy showed those nice images of light emission from the processes in a zener diode.Of course a FET is much more of an artifact than for example the pn junctions of a bandgap reference. Diode forward voltage relies on physical properties that change very little, so normal silicon diodes all exhibit very similar forward voltage. Yet the near zero temperature drift of the FET reference is a big advantage and a good reason to look closer.Regards, Dieter

author: Cerebus
author_rank: Super Contributor
timestamp: February 24, 2021, 03:05:54 pm
content: Quote from: dietert1 on February 24, 2021, 02:53:22 pmThere are two senses in which one can use the word "artifact" in English, one of which is always formulated "artifact of <something>" and the other just means "made by man". Neither of them make sense in that sentence. Translation issues?Quote from: dictionary

author: SilverSolder
author_rank: Super Contributor
timestamp: February 24, 2021, 03:07:23 pm
content: There are some 8.5 digit multimeters using 1N829A, so they must be "not bad". They are not all the same, though. I tested a few different ones for upgrading an EDC voltage standard - it took a few of them before I got one that behaved well in terms of noise. The one I liked, that I bought in desperation, cost $15... and came with a ton of military type documentation. I'm pretty sure it must have been hand tested and selected. It is a beautiful part, though, almost no noise or temperature coefficient at the right current. It made a big different to the performance of the EDC!Bottom line, I think you have to pay for the nicest "classic" analog parts - I'm beginning to think of them like fine wines, or something like that!

author: dietert1
author_rank: Super Contributor
timestamp: February 24, 2021, 03:23:57 pm
content: @ cerebus:In a pn junction the forward voltage depends mostly on the physical properties of silicon and the elements used as dopants. This comes close to what a metrologist really wants (not artifact but physical constants). In a JFET the pinch-off voltage depends on the geometry inside the device. That's the reason why FETs vary so much. This is less desirable as it leads to considerations about aging, drift of dopants and the like. This is what i meant.Using a zener for a high resolution DVM means acquisition times like 20 to 50 seconds to get the noise down.The best zeners can do it within some seconds. There is research for better alternatives.Regards, Dieter

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 03:32:58 pm
content: Quote from: SilverSolder on February 24, 2021, 03:07:23 pmYes you can say that something like OPA111 in a canned form with golden legs and teflon stand-off is almost an art itself (any TO-99).

author: Cerebus
author_rank: Super Contributor
timestamp: February 24, 2021, 04:18:08 pm
content: Quote from: dietert1 on February 24, 2021, 03:23:57 pmYeah, I know how it works, I just couldn't figure out what you were trying tosay. All the devices you talk aboutareartefacts (man made), and you haven't described the artefactofthe measurement process that is the other usage of "artefact", so I assumed you were grabbing an English word that is a "false cousin" of some German word that carried the meaning that you were trying to get across. Not meaning to be rude, but I suggest you avoid the word as your most recent usage of it still isn't idiomatic and, while I can figure out what you mean in your most recent use of the word, it still wasn't clear at first reading. A better usage in your original sentence would have been something like: "FET parameters are much more of anartifact ofthe semiconductor manufacturing process than for example the pn junctions of a bandgap reference". I hope that's clear now.

author: dietert1
author_rank: Super Contributor
timestamp: February 24, 2021, 04:25:14 pm
content: What is your contribution besides being picky? This isn't an language course but a discussion of electronics devices.

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 04:33:29 pm
content: No fighting please, I was interested the differences as I'm not that deep on the electronics or physics behind the devices.

author: Kleinstein
author_rank: Super Contributor
timestamp: February 24, 2021, 04:34:04 pm
content: The TO18 parts got pretty expensive. In part this can be caused by RoHs: some of the older hermetic cases used lead solder and also the glas at the seals may have contained lead or similar. The is not that much demand for those metal cases any more. It is not just the JFETs that got expensice: also normal 2N2222 got relative expensive.The JFETs may react relatively sensitive to dopant diffusion, but so can zener diodes. Like with a burried zener the relavant part of the JFET should be away from the surface, so there is a chance to to get away from surface effects, like defects at the oxide interface. Not so sure that drift is more of a problem with the JFETs than with a zener diode. At least classical planar zeners have additional surface effects and the choice of burried zeners is limited.The higher frequency noise looks really good with the JFets, it is just the not so nice popcorn noise, that is a problem. In this respect they are somewhat similar to some of the zeners. An interestuing point could be that there are some modern fets with rather good low frequency noise - so in principle there would be a chance for really good noise performance. Detailed noise specs for the FETs are rare and I would not take them to serious. Especially the popcorn noise may vary between units and modern processes got cleaner. Some JFET based OPs can provider good LF noise - so in principle it could be possible to find really low noise JFETs.With the TC the JFET solution is a bit similar to the compensated zeners: one can use the current to adjust the TC. The 1N829 seem to be special in that they can also have a relatively low higher order TC, though at the price of a rather high current (7.5 mA). With selected samples and individually adjusted current one can get a low TC over a reasonable large range. Still with the now relatively high price this can also get pricy to select for both low noise and low higher order TC. With the relatively high power, an oven for the zener would also need relatively high power (e.g. something like 2 times the power). The chinese 2DW232 may be powe noise, but also relatively high 2nd order TC and large scattering (e.g. more like 1N821). So this also needs some luck (a good batch), selection and likely an oven with relatively high power or a tricky compensation circuit.I have not tested a 1N82x, so not sure about their typical noise level. The reports a scattering a lot.

author: Cerebus
author_rank: Super Contributor
timestamp: February 24, 2021, 05:01:07 pm
content: Quote from: dietert1 on February 24, 2021, 04:25:14 pmSorry, just trying to be helpful. It most certainly isn't a language course, but it helps if we can all communicate clearly so that we understand each other. I've had to try to contribute to technical conversations in Germany, so I hope I appreciate the difficulties of trying to do it the other way around.

author: guenthert
author_rank: Frequent Contributor
timestamp: February 24, 2021, 05:24:31 pm
content: Quote from: dietert1 on February 24, 2021, 04:25:14 pmWe don't understand you either, so if a native speaker offers some help in improving your clarity in expressing yourself in the lingua franca of a technical forum on the Internet, then for the benefit of the rest of us, please take it.

author: SilverSolder
author_rank: Super Contributor
timestamp: February 24, 2021, 06:18:09 pm
content: Quote from: Kleinstein on February 24, 2021, 04:34:04 pmMy "golden example" behaves like a gentle kitten at around 4.2mA, in terms of both noise and TC. I found a pile more 1N829 that I have yet to test - I suspect that there are "golden examples" of most devices that, through sheer luck, perform well above average. I also think these "golden examples" are picked out at the factory and sold at exorbitant prices to high end customers (like the military). (Do not confuse this with the fact that even average performing specimens are ALSO sold at high prices!). - bottom line, I think it is unlikely to find a "golden" example out of a batch of cheap devices, but it isn't going to stop me trying!

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 08:21:06 pm
content: Is the popcorn noise temperature dependent, one could assume that normal noise at least is. When aproaching 0K noise would decrease.Oh, must resist from upgrading from 5.5 digits to 8.5

author: Kleinstein
author_rank: Super Contributor
timestamp: February 24, 2021, 08:46:14 pm
content: The temperature dependence of the popcorn noise is a good point. There is the general tendency for charged states to have a longer life time at lower temperature. So a lower temperature may not be that desirable. The hight of the jumps should not change that much with temperature.Popcorn noise may be less trouble if faster - the part above some 1-10 Hz is not such a serious problem as the very slow part. This idea may also be behind the relatively high set temperature in the LM399.I have not tested this for the JFETs - it may be worth a try to set the oven to a higher temperaure, like some 50 C.

author: Vtile
author_rank: Super Contributor
timestamp: February 24, 2021, 09:06:03 pm
content: That what I was starting to crasp about that things get worse on popcorn noise since quantum things... Also found some papers . .interesting stuff.Have anyone implemented high temperature ovens with controlled ramp up/down to prevent shock and give time of internal relaxation of substrate, thermal shocks are at least for jewel grade silica minerals (speaking hundrets of degrees here, for ie. color manipulation) not a good thing at all. Same with many other manerials like glass.

author: guenthert
author_rank: Frequent Contributor
timestamp: February 24, 2021, 10:10:59 pm
content: iirc, the noise of a 1N829(A) isn't specified, just the tempo (with the A version a bit better). I read several times, that the 1N829A is expensive, yet the 1N829 can be had pretty cheap, e.g.https://anchor-electronics.com/price-list.pdf. I wonder, whether finding a 'golden' zener is just more work when testing 1N829 instead of 1N829A or whether they are actually produced differently.

author: Andreas
author_rank: Super Contributor
timestamp: February 24, 2021, 10:27:56 pm
content: Hello,the noise I measured is actually quite different from device to device and especially from manufacturer to manufacturer:(stray between 1.7uVpp to 22 uVpp as 1/f noise between 0.1 and 10 Hz)https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg1137519/#msg1137519The difference is only specification of T.C. (and differential resistance) at a nominal 7.5 mA current.Usually you have to test for the "real" zero T.C. current anyway.So you can also take cheaper 1N825 or 1N827 and select them for noise and zero T.C. current.(after some kHrs of pre-ageing).With best regardsAndreas

author: IconicPCB
author_rank: Super Contributor
timestamp: February 24, 2021, 10:30:55 pm
content: Dietert1,Please see the attached files.These two files are scans from National semiconductor '77 FET manual.

author: dietert1
author_rank: Super Contributor
timestamp: February 25, 2021, 08:02:58 am
content: OK, this is a DC application aiming for low noise. When i look for low noise at low frequency, 50 and 51 JFETS are marked "Secondary choice" and 52 isn't marked. What was your criterion?Regards, Dieter

author: kleiner Rainer
author_rank: Regular Contributor
timestamp: February 25, 2021, 10:28:05 am
content: Good morning,concerning good application notes, I found that the Siliconix data books contained lots of information about JFETs. As a matter of fact, Siliconix was founded as a manufacturer of (J)FETS.Considering noise behaviour of JFETs, the 1986 FET Data Book contains a very thorough appnote: section 7, page 39 to 46, "Audio-Frequency Noise Characteristics of Junction FETs" by Bruce Watson. Page 45 shows the noise behaviour of several geometries. Bottom Line: "A second way to achieve low eN is to use a device with a large gate area. Empirically, eN is inversely proportional to the square of the gate area (eN 0: I/AG2), independent of gfs' This large gate area philosophy has been followed in the design of the Siliconix 2N4867A FET, and noise performance of the device is discussed later in this Application Note. A major advantage of this type of design is that eN is significantly lowered and lN also remains at a low value" (page 40).Link to the databook:http://www.bitsavers.org/components/siliconix/_dataBooks/1986_Siliconix_FET_Databook.pdfAnother good read about FET basics:http://www.bitsavers.org/components/siliconix/Designing_With_Field_Effect_Transistors_1981.pdfChapter 2.6 (page 38) describes the noise characteristics, 3.12 (page 122) repeats the above mentioned application note.Cross-referencing JFET geometries between Siliconix and National is easy. Simply look up a part number and note the geometry.Example: J113 Siliconix geometry NCB, National geometry 51. BTW the J111/112/113 is specced as a chopper, but I have seen its use as a low noise audio preamp. Looking at the die drawing, it seems that the required large gate area is a given here. Luckily I scored 75 J113A at ham radio fair Friedrichshafen for a few cents, still on paper tape (complete with ESD protection). Maybe I should give it a try as a reference.Greetings,Rainer

author: IconicPCB
author_rank: Super Contributor
timestamp: February 25, 2021, 11:05:30 am
content: While this is indeed a notionally DC application it is in fact a current source application.Process 53 is designated as primary choice for this application.Why?Gate geometry providing high internal impedance current source.Please googleCurrent sources and voltage references Linden T Harrison pdf downloadChapter 6 may helpI nave contacted Interrfet with the view to obtaining a recomendation on a more readily available less costly option.In the course of discussion i have been presented with some interesting informatio i intend to share with You tomorrow morning.Work and other demands on my time during the day prevented me from doing so today.So just like the chinese zener diode we could spend some time and energy to identify a device and perhaps do a group buy.I can source some metal can FETS in the USD0.50 per piece again part number of the morning.

author: DeltaSigmaD
author_rank: Contributor
timestamp: February 25, 2021, 03:15:36 pm
content: @Kleinstein: I fully agree that the 2N4416A is not the best choise. I will assemble references with different JFET types. As a consequence of my bad experience with humidity diffusing into plastic packages, I prefer the TO-18 case. By the way, I observed random telegraph noise of the 2N4416 which is most intensive at a particular temperature, while there are temperatures free of RTN. The JFETs don't have a stress reducing layer below the chip, as it can be seen at some references. It seems that you can't get JFETs in an optimum case.Possibly someone is interested on my reasons for testing JFET references:Zener diode references base on a controlled avalanche breakdown. My understanding of avalanche break-down is as follows: after ignition of a microplasma, its current drain is limited by the doping concentrations in the n and p layers (roughly a resistive feedback, the current density is limited). There is a competition of microplasmas: the microplasmas with the lowest break-down voltages determine the reference voltage, since the total diode current is well controlled. Richie made excellent pictures of this avalanche break-down in the LTZ1000, where a limited number of bright points is visible in the depletion zone. Now, microplasmas are switched on at any imperfections of the Si crystal. A microplasma is a locally very restricted process, and it will always be extremely sensitive to any modification. Zener references are very stable if a high number of microplasmas determines the reference voltage, what can be obtained with a high zener current. The LT1236 has the lowest possible current consumption for a Zener. Therefore, only a limited number of microplasmas determines the reference voltage. I made experiments with static magnetic fields in the chip plane of the LT1236, and switching of different microplasmas can be oberved when the orientation of the magnetic field is rotated. For instance, the RTN is largely modified with rotating the field (besides a weak Hall effect). Unfortunately, these effects are not stable. The instability cannot be reliably improved by magnetic fields. LT1236 advantages were: low consumption, good short term noise, hermetic package; disadvantage: temperature drift demands temperature control. As consequence, the LT1236 project was interrupted, and JFET references are tested now. Preliminary result: good candidate, but the compensated JFET reference will always be a very expensive solution, since its adjustment needs many hours of laboratory work.

author: SilverSolder
author_rank: Super Contributor
timestamp: February 25, 2021, 03:34:32 pm
content: If the design of the JFET reference is standardized, it might be possible to automate the tuning of it? There could be digital pots on the board to facilitate this, for example.

author: Kleinstein
author_rank: Super Contributor
timestamp: February 25, 2021, 04:29:55 pm
content: For the simple Fet based refrence tuning 1 resistor is not that difficult. From the FET data books just linked a few posts before there is a approximate formular for the TC as a function of the fet current: TC =~ 2.2 mV/K * (1 - sqrt(I/I_0)) , with I_0 the looked for current for zero TC. Chances are one can find a good resistor with only a few iterative steps.With just a simple adjustment, one may need a kind of crude oven to get a low TC over a larger temperature range.For the multi point adjustment, to also compensate higher order TC things get more tricky. The part around the BJT should reasonable well follow the usual spice models, so one might get away with a crude resistor choice and then a temperature run in an oven to than calculate suitable resistors for the remaining 3 resistors that may be accurate enough. digipots are OK as a divider, but often not good as a variable resistor. With not too large a temperature range, one could get away with less trim (e.g. only the 2 nd order), or possibly the same resistors for a whole batch of similar fets. The higher order TC part may not scatter that much as the voltage. Chances are actually good that it is relatively constant for a given type of fet.Another weak point with the JVR is that one never knows up front which voltage to get. So one may also need to adjust the gain, or select FETs with the right voltage.Some 4 - 8 V is quite a large range for a single type of FET (2N4391).The 2N4416 may not be that bad a choice for battery operation, as the current is relatively low, maybe allready too low to get really low noise.The 2N4391 is also not ideal - also has a relatively short channel and thus a relatively high sensitivity to the drain voltage. It is acceptable, but still also needs good resistors to generate the drain voltage.The observation about the temperature is interesting. I had a similar observation on cool down of the oven from elevated temperature, that confused me. Attached is a graph showing the voltage change of my reference in the oven. The jumps of up to some 15 µV look bad, especiall compared to the rest of the noise. The readings are relative to a relatively low noise LM399 - so some of the noise (specially the higher frequency part) is from the LM399 and also from the ADC.

author: MK
author_rank: Regular Contributor
timestamp: February 25, 2021, 09:30:51 pm
content: Another source of noise that is batch dependant is G-R (generation-recombination) noise caused by trace amounts of other elements, the GR noise comes and goes at different temperatures depandant upon which stay element is causing the issue.

author: IconicPCB
author_rank: Super Contributor
timestamp: February 26, 2021, 02:36:28 am
content: As mentioned in the earlier post I had contacted interfet with the view tosourcing less expensive options.The response from Interfet sales eng is as follows:"...Interesting project. We Have 2N4391 in stock at mouser if needed to prototype.https://www.mouser.com/ProductDetail/InterFET/2N4391/?qs=M%252BdZJzgoW%2FVlkPfqcj1FRA%3D%3DNice app note for biasing to zero drift.https://www.interfet.com/jfet-datasheets/jfet-an-107-interfet.r00.pdfWe can customize matched pair solutions and steer you toward some more of our higher volume parts. The IF1320 and IF4500 are more higher volume parts. And they are in the ballpark of the 2N4391-3, J111-3, and J108, J109 parts...."He had also included the plot Variation of Vgs with temperature at zero TC bias.It is beyond belief ... or at the very least my comprehension.

author: IconicPCB
author_rank: Super Contributor
timestamp: February 26, 2021, 02:42:40 am
content: National SemiconductorNOS2N3684N-JFETLow Noise AMP,V(BR)GSS=-50V(min),VGS(off)=-2V to -5V at VDS=20V,IDSS=2.5mA to 7.5mA at VDS=20V,rDS(ON)<=600 OHM at VDS<=0Vin TO-72 PKGBulk buy US$0.52 per piece.Interest invited

author: dietert1
author_rank: Super Contributor
timestamp: February 26, 2021, 08:53:27 am
content: I'm getting a bit lost. You proposed to operate the JFET as a constant current device (in the saturation region). In that mode Ugs is small and the control potential is hidden inside the device. Saturation current for a 2N4391 is 50 .. 150 mA and i understand that you propose a different JFET with higher channel resistance.Now that TC compensation is a different story. It means operating the JFET close to Ugs,threshold. Or can we get TC compensation in the saturation region? Should we control Uds?Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: February 26, 2021, 09:20:52 am
content: The 2N3684 seems to be a small fet (process 52) maybe a little similar to the J203. My crude estimate for the zero drift curent would be some 200 µA (typical Idss for the low threshold brother 2N3687). The datasheet I found is a bit confusing, as it gives IDss of 0.1 - 0.5 mA, but also Gm > 0.5 mS, which would suggset a higher current. Noise specs are more on the high side.So it would be something for a low power reference, not so much a very noise version, though the relatively large input capacitance may help.There is also a risk to get a relatively low votlage - chances are a batch can be all similar. So Bulk buy is some risc.IF1320 and IF4500 are low threshold devices and thus not really suitable for a JVR. They may be nice amplifiers. The choice of high threshold devices is not that large, as low noise amplifier more like prefer low threshold and with improving manufacturing precision, there is a chance to get fewer batches with lower than intended threshold.In an Phillips DS I found an interesting graph, showing Ids versus temperature. There it looks like the 2nd order effect changes quite a bit with current. So version for Dietert with the diode an the low side may not be so bad after all and may even reduce the 2nd order effect, by operting the FET at a slightly lower current.

author: dietert1
author_rank: Super Contributor
timestamp: March 03, 2021, 09:43:27 pm
content: After reading some of the documents linked above, i think i was trapped with wrong assumptions and results before. As i did not yet have the recommended 2N4391 when i started experiments, i used a batch of J105 we had left from repairs. The result was a positive TC up to drain currents of more than 5 mA. Also there was the remark of Kleinstein, that we should try to find a solution without the requirement to fine tune the precision resistor in the source path. That made me go away from the original proposal.I learned that zero TC operation of a JFET involves compensation of a -2.2 mV/K TC, which is of the same magnitude as in the compensated zener reference.Some days ago i tried the zero TC adjustment again with a 2N4391 and - surprise - it arrived near zero at about 2 mA. Perfect. TC also depends on the drain voltage: The lower the drain voltage, the lower TC. This way one can adjust the same 2N4391 to zero TC at 1 mA drain current. Then the zero happens at Uds around 0.3 V. At 2 mA the zero happens at Uds = 2 V, at 2.5 mA at Uds=7 V. Of course, these numbers will be different with another 2N4391.The JFET will be in saturation anyway (near cutoff). Measured feed through for small voltage variations from drain to source was 0.14 at Uds = 0.3 V. Running the JFET with a small "detection" voltage along the channel may be a good solution.Will report some measurements later. Datasheet curves are of little use due to lack of precision. This application is very special and nobody does the TC characterization to ppm level. It's a setup that supports drain current variation, Uds variation and temperature variation and precision measurement of each parameter. How can one measure the JFET chip temperature? Maybe using the gate diode in forward mode..Regards, Dieter

author: IconicPCB
author_rank: Super Contributor
timestamp: March 04, 2021, 01:55:57 am
content: On JFET noise; I am under the impression that the noise sources in a JFET increase with drain current.Should we therefore not look for devices in the lower "portable equipment" range of drain current?

author: Kleinstein
author_rank: Super Contributor
timestamp: March 04, 2021, 09:03:12 am
content: Normally the noise goes down with larger devices, as they are internally a bit like many small ones in parallel.For the JRV use the current density is kind of fixed to get a zero TC without much extra compensation.One can do small changes via the DS voltage, but this should not be very much, unless one would go down very much (like the 0.1 V range). I am already a bit surprised that the shift that Dietert reported for the 2N4391 is so large (1 mA at 0.3 V to 2.5 mA at 7 V).There are curves in some FET data-sheets that show that the noise goes up the DS voltage higher than some 5 V, though not much effect below 5 V. However I am not so sure how reliable those graphs are - they looked too smooth to be actual measured values.For testing some lower current devices may have an advantage, as they have more noise and thus make the testing easier. There is also a larger chance to find a defect free device with smaller ones, though not sure if this is in reach at all.The problem with higher current devices like the J105 is that the heat dissipation gets quite large - not so much in the FET, but for the resistor and the overall circuit. The drain source voltage can be kept relatively low (e.g. 1-2 V range), so that the fet itself does not see that much power dissipation.

author: IconicPCB
author_rank: Super Contributor
timestamp: March 05, 2021, 12:23:08 am
content: Opinions sought on suitability of 2N4091 devices. A process 51 ( National Semiconductors ) device.

author: dietert1
author_rank: Super Contributor
timestamp: March 05, 2021, 09:49:45 am
content: The Interfet datasheet says cutoff voltage is 5 to 10 V. A Microsemi datasheet found on the web says Rdson = 30 Ohm at 1 mA. So it appears to be similar to the 2N4391 and suitable as a JVR. Maybe same process and same selection category means "another name for the same".Regards, Dieter

author: IconicPCB
author_rank: Super Contributor
timestamp: March 05, 2021, 10:21:24 am
content: Yes... both come from the same process family.Available for a sub USD1.00 in reasonable quantity( tens of pieces not hundreds).

author: Kleinstein
author_rank: Super Contributor
timestamp: March 05, 2021, 10:24:48 am
content: For practical purpose the 2N4091 is identical to 2N4391. The specs are essentially the same with slightly stricter upper limits for the 4391, but this could be just different test limits.The J111 is also essentially the same (though usually TO92). I have seen a DS for the 4391 that tells to look at J111 for the typical curves.Chances are die difference can be larger between parts from different manufacturers.At least some of the 1/f noise is supposed to be due to impurities and these can be different depending on the source.For the now obsolete BF862 there were reports on differences between 2 different Phillips fabs.

author: DeltaSigmaD
author_rank: Contributor
timestamp: May 05, 2021, 02:34:34 pm
content: More results of my JREF project, please see Reply#243 at this topic. The results are somewhat mixed.Results of analog compensation technique1. A number of temperature-compensated JREFs were assembled and tested. The spacial separation of JFET and BJT (temperature sensor) induces a 0.8 ppm position dependency of the compensation and therefore also of the reference voltage. The output stability and noise is analysed by the calculating the Allan deviation of the reference voltage. Fig.1 shows the Allan deviation of a 10V reference with a 2N4391 JFET measured by a Keysight 34470A (after an 1 day warm-up) before final adjustment. The classical Allan deviation is green, AVAR is red, and MVAR is blue. A yellow slope in the double-logarithmic scale can be added to show the exponential law of deviation. The JRef noise is close to the K34470A noise at about 5s. The circuit also shows a linear drift (slope +1 at right end indicated by a disappearing distance of AVAR and MVAR) even while it is temperature-stabilised at the zero TC point. This drift is caused here by the very slow relaxation of the 2N4391 after a thermal 20 K step. Fig.2 shows the Allan deviation of a 2N4416 5V reference (Siliconix, 39 years old) in a non-stabilised room environment. The noise of a RF JFET is higher, but the complete circuit had +2 ppm drift within 2 months (measured by the K34470A, caution: specification +/-14 ppm in 2 months) and no significant hysteresis. The reference voltage is within 2 ppm about 5 minutes after power on, and within 0.4 ppm after 4 hours. Unfortunately, the JFET was selected not carefully enough: it shows some random telegraph noise (RTN) of 1 ppm, see Fig3.2. The third and forth order compensation of the temperature dependency of a JREF reference by an analog circuit is possible, very stable, and it doesn't add significant noise. Within a 18°C to 35°C range, a temperature dependency of <0.2 ppm/K can be obtained. But, the adjustment of the analog compensation is difficult. In practice it is very complicated (if not impossible) to distinguish thermal hysteresis, drift of components such as resistors and trimmers, and circuit temperature gradients from the real thermal drift of the JFET reference voltage. The essential point is that modifications of hardware are required to adjust the compensation, but the thermal conditions are changed when you are performing these modifications. If you change a trimmer position, you have to wait about 1 hour before you can measure its effect precisely. Then you have to measure the reference voltage at >=5 temperatures. The available working time limits the number of different JFET types which can be tested. I have no realistic idea how to automise the adjustment. The adjustment is so much work that the analog adjustment technique is refused even while it is working well in a limited temperature range.3. Several different JFETs were tested for low frequency noise by measuring the Allan deviation of a suitable reference circuit. No JFET was found which had only pure white and 1/f-noise. Even parts of the same type, manufacturer, and lot differ extremely with regard to low frequency noise like Random Telegraph noise (RTN). Concluding, all JFETs must be selected for minimum low frequency noise. According to my experience, <5% of JFETs are suitable as reference. Unfortunately, the RTN depends on temperature, working point, thermal history, and so on. A JFET selected for low noise might have high noise at a differing working point. You need luck. Even zener refs are not better in this point (potentially excluding the LTZ1000).4. Some 4391 and 4392 JFETs of different manufacturers were analysed (Central Semi and dsi with lower noise, other m. were not available at this time). These JFETs had relatively low 1/f-noise superposed by a varying amount of RTN. However, the tested devices had a thermal hysteresis >5 ppm with 10 K steps and a relaxation time constant of many hours, which property prevents the application as reference. Please consider that 439x JFETs of other manufacturers might be better. The tested 2N4416 JFETs (original Motorola, 30 years old, and Siliconix, 39 years old) had a thermal hysteresis <1 ppm. RF-JFETs, which have separate pins for gate and case (4 pin JFETs as the 2N4416), must have any isolation layer between gate (mostly the JFET die) and case. The long-term stability of the Siliconix 2N4416 reference seems to be very good. It is an obvious guess that this layer reduces the thermally induced mechanical stress on the JFET die. It would be very interesting to know more about this subject.Current status of the projectA new battery-operated JREF circuit will be tested soon (new PCBs are already delivered), which uses a digital compensation technique of the JFET reference voltage drift. The reference voltage is adjusted at several temperatures by generating an adjustment voltage. It is planned to use a third order interpolation parabola or spline between the temperature points. The JFET sees identical surrounding conditions at adjustment and normal operation except the surrounding temperature. It is interesting that the REF70 of Texas Instrument also uses a certain kind of digital compensation of the reference drift, however, it seems that the REF70 uses a completely different technique.

author: Vtile
author_rank: Super Contributor
timestamp: May 06, 2021, 07:13:50 am
content: Could it be possible to find "extra pure" samples by deep freeze the samples? If the RTN etc. are increasing at low temperatures one would assume that testing the samples at low temperatures could be beneficial.Also have one tried (or come across of public information) effects of cryogenic bath for JFETs , ie. liquid nitrogen (~77Kelvins). I have a few possible outcomes in my mind. First it must be destructive for big percentage of components because of (micro/macro)mechanical stresses and shock, but what happens to those that would survive, would they be the best samples (as randomly manufactured) of lot. Assuming the RTN are partly from mechanical flaws of die. Would it possibly permanently change the silicon (assuming this is doping related) micro structure. Would the resulting samples be garbage.Just random thoughts without (any) knowledge.

author: DeltaSigmaD
author_rank: Contributor
timestamp: May 06, 2021, 09:47:16 am
content: JRef: Comparing noise of references by measurement of Allan deviationThe temperature dependency of JFET noise was analysed in the paper of J.W. Haslett, E.J.M. Kendall: "Temperature dependency of Low-Frequency Excess Noise in Junction-Gate FETs", IEEE Transactions on Electron Devices, Vol.ED-19, No.8, August 1972. Even if this paper might be outdated in some points, it is very helpful to understand the JFET operation better. A coarse estimation leads to the guess that a single trap in the depletion zone is sufficient to be a source of RTN with 1 ppm amplitude. In this light it is obvious that you cannot expect common rules to select JFETs, for instance the measurement at one temperature to derive the expected noise at another temp.It is interesting to compare the noise of bandgap, zener, and JFET references. Modern Bandgap references such as LT6655 have low noise, but relatively high long-term drift. Even good buried zener refs such as LT1236-5 show RTN, see Fig.4, the corresponding Allan deviation shows Fig.5 (linear drift was removed). The RTN noise is almost hidden here in higher frequency noise, if no additional lowpass is applied. One could argue that the LT1236 already gives better noise than the JRefs, hence why using JRefs?According to my measurements of Allan deviation, the noise contributions of references can be distinguished in the following components:1. white noise: no problem, can be filtered out, low enough. Note: Allan dev. exponent -0.5.2. 1/f-noise: if this noise is filtered, you have a constant uncertainty indepedent on averaging time. This noise is low enough with many references.3. a region with a +0.25 exponent in Allan deviation: this noise region is produced by the superposition of a larger number of weak RTN sources, see f.i. the paper above. The longer you are filtering, the higher uncertainty you get. This noise must be minimised e.g. by selection. Even good zener refs have a wide spread of this noise within the same lot and type (my experience).4. random walk: this noise is generated by the integration of "white" noise over time. The random walk is the most important characteristic for the long-term stability. The "long-term drift" of many references looks like random walk, for instance LT1236 or Ref70, where an additional relaxation is superposed. Refs cannot be selected for this noise due to the extremely long duration of selection. Note: Allan dev. exponent +0.5.Datasheets of references only talk about white noise (e.g. 0.1 to 10 Hz noise), sometimes even about 1/f-noise. But I never have seen specifications or measurements of the most important contributions, noise 3. and 4. You have to measure it yourself. The fine thing with Allan deviation is that you can distinguish these 4 noise contributions by analysing the slopes of the Allan deviation you measure. Additionally to the noise above, we also have exponential and linear drift of references. Both contributions are indicated by a +1 exponent slope of Allan deviation. In this region the difference between AVAR and MVAR disappears or changes its sign slightly.Now the essential point: I have the impression that the JRefs have a lower Random walk component than zeners or bandgaps. If true, this would be reason enough to use JRefs. I urgently hope that this first impression (only 4 months) can be verified in future. We will see.

author: Kleinstein
author_rank: Super Contributor
timestamp: May 06, 2021, 12:13:36 pm
content: If the noise changes with temperature (more than just a normal ~ T or sqrt(T) behaviour), than higher order TC compensation may not be a real option for lowest noise. So one may have to use an oven for a stable temperature to operate the reference in a sweet spot region. The temperature stabilization would than be more than just for the TC, but also to avoid higher noise, to keep the FET operating more at a sweet spot.Beside the temperature the drain source voltage would be a 2 nd parameter to choose for the operation point. One has at least some freedom there. So far I have not seen an obvious advantage of larger ( ~5 V) or small (~0.5 V) voltages.A different temperature or different DS voltage will shift the region that has a very high effect, so that single long lived electron states could cause strong RTN noise. So the same FET may work well at 1 temperatur and be noisy at another.For the JFETs the white noise is no problem, but I am not so sure about the 1/f noise.With the test from the difference of 2 JFETs even what looks like 1/f noise seems to be the superposition of many RTN sources, just with rather small size (200-300 nV).

author: SigurdR
author_rank: Contributor
timestamp: May 06, 2021, 03:35:58 pm
content: No, en goes down with higher Id.en ~sqrt(sqrt(Id))so only to the 4th powerI run my JFETs as close to Idss as possible without increasing Pd too much as heat is a JFET "enemy". Low Vds is thus often used.But capacitances go up with lower Vds.Gate current goes up a lot with temp, and gate current we do not want.JFETs are great for low noise applications - especially above 10Hz.I have used them for decades for low noise phono amplifiers. Especially the Toshiba types (that now are discontinued) or the BF862 (disc.) or the ones from Linear SYstems (2nd source to some TOshiba types).Researchers seem to like the IF3601/2 for their ultra low noise even below 10Hz.Quote from: IconicPCB on March 04, 2021, 01:55:57 am

author: Kleinstein
author_rank: Super Contributor
timestamp: May 06, 2021, 05:23:01 pm
content: For use a a reference the drain current for a given FET can not be changed much, as this effects the temperature coefficient. So the current is fixed be the need to get near zero TC.To get a useful reference we also want a FET with a reasonable high threshold, like 4-8 V, as the noise is kind of relative to the threshold voltage minus some 0.6 V or so.The JFETs used for the low noise amplifiers are usually rather low threshold, e.g. in the 0.5-1.5 V range and thus not useful as a voltage reference.Increasing the current helps a little with the white noise, but even less with 1/f and other LF noise. So for very low frequency amplification one more like wants a rather low current to limit the heating and thus reduce thermal effects. It is more about using large area FETs or multiple in parallel and than less current per FET.One can use some results from amplifier, but even here the data often do not extend much below 10 Hz and for a reference we care about the lower frequencies only. At 10 Hz the JVR is usually very good, the tricky part is the long time scale of hours and more. Even the usual 0.1-10 Hz range is also still good. My estimate for the 2N4391 I have tested is somewhere in the 1 µV_pp range as a typical number.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: September 16, 2021, 01:09:36 pm
content: It is good to see so much work done on the JVR, looks very interesting. I was more or less off the forum for almost a year and a half, however now I am planning to be more active and can only add that my original JVR unit is still running 24/7 and I can not see a substantial drift (still below 5ppm compared with my 731B and several calibrated meters, including 3458A Option 002) .CheersAlex

author: d-smes
author_rank: Regular Contributor
timestamp: September 22, 2021, 05:17:03 pm
content: @Alex,Welcome back! It seems all your attachments before Post 102 (and some after) have disappeared. Would you be so kind as to re-post your original circuit and some of your more interesting trend data? Thanks!

author: H202
author_rank: Contributor
timestamp: October 04, 2021, 06:16:21 pm
content: docs1

author: H202
author_rank: Contributor
timestamp: October 04, 2021, 06:30:43 pm
content: docs2https://www.scribd.com/document/529788436/ED-DC-Amp-Design-With-FETs-Zero-TChttps://www.scribd.com/document/529788585/ED-Stabilize-T-to-1e-5-Deg-With-Linear-DC-feedback

author: dietert1
author_rank: Super Contributor
timestamp: October 05, 2021, 07:03:42 am
content: Seems like in 1966 a TEC was an available part and called "Frigistor".Yes, back to the roots. Yet there has been some progress. While those inventors had good ideas, they did not have the means to fully explore them. Today even hobbyists can make automated, all digital curve tracer setups that work to 1 ppm or below.My logs of a dual JFET 10 V reference i made early this year (see above) exhibits a steady drift of 130 nV per day (4.75 ppm/year), without any indication of relaxing. Deviations of the daily averages from linear drift ("noise") are 430 nVrms (0.043 ppm), while the setup is good for 100 nV or better.Regards, Dieter

author: MegaVolt
author_rank: Frequent Contributor
timestamp: October 05, 2021, 10:17:35 am
content: Quote from: dietert1 on October 05, 2021, 07:03:42 amTo which scheme do these values apply?

author: dietert1
author_rank: Super Contributor
timestamp: October 05, 2021, 11:15:14 am
content: That was made in January and has been running since then in a TEC "oven".https://www.eevblog.com/forum/metrology/building-your-own-voltage-reference-the-jvr/msg3433032/#msg3433032.The circuit was unusual in that it used a diode for TC compensation. Later i also got the original proposal working to adjust TC by drain current and/or source drain voltage. Maybe i can try a JVR as a low noise external reference for an ADS1263 ADC i am experimenting with. In that case anything between 2.5 V and 5 V will work.Regards, Dieter

author: dietert1
author_rank: Super Contributor
timestamp: November 02, 2021, 12:27:10 pm
content: Since July i have the JVR i made in January in a MUX setup together with two DIY LTFLU references and now after nine months of continuous drift it appears to settle. Nine months of patience with no signs of relaxation. It drifted about 4 ppm in total. Appears to be a good build. The rms noise of the daily averages is 0.04 ppm. It runs in a TEC oven at 24.5 °C.Maybe a bit early to say, but this observation looks completely different from the LTFLUs that settled in a slow exponentional relaxation with a time constant of about 4800 h.Regards, Dieter

author: iMo
author_rank: Super Contributor
timestamp: September 21, 2022, 09:50:58 pm
content: Hi, let me refresh this page a little bit - I've found in my junkbox several jfets (at least i think so)DN349 (dual in metal, Siliconix?)NF510 (single in metal)Both types with 73 date code (50y old next year!)I cannot find any datasheet.. No idea whether they are suitable for experiments with jvr, however..Any hint on it?

author: Messtechniker
author_rank: Frequent Contributor
timestamp: September 22, 2022, 06:48:10 am
content: Quick look around yielded:DN 347 was used in the B&K 2607. Probably something specially selected by B&K.The NF 510 is probably equivalent to Linear Systems LC 4393 and 2N 4393.as taken from DSA00411750.pdf and LSM_LS4393_SOT-23.pdf

author: Kleinstein
author_rank: Super Contributor
timestamp: September 22, 2022, 07:03:39 am
content: The duals are usually low threshold types and are thus not that suitable for a JVR. The 2N4393 is also a more low threshold type. With the inherent scattering of the parameters one may still get some 2 V.These types are more suitable for an amplifier or switch.

author: iMo
author_rank: Super Contributor
timestamp: September 22, 2022, 10:14:33 am
content: Thanks guys! I've been just measuring the group of NF510s - the voltage at the resistor (a trimmer I play with) for a group of samples varies from 4.6V to 5.8V while playing with the drain currents from 150uA to 1.3mA. First experiments with heating up and cooling down show pretty stable currents, like with a sample (trimmer set to the 1.3mA current)24C 1.307mA80-100C (burned my finger) 1.310mAPS: with 3k9 25ppm resistor therm isolated and away of the transistor24C 1.493mA>100C (heated up 7secs with iron) 1.495mAand returns back with zero "visible" hysteresis..Now, how to find the zero TC..

author: iMo
author_rank: Super Contributor
timestamp: September 25, 2022, 06:11:32 pm
content: Hmm, when trying to find the NF510's zero TC I get this curve.. Why this shape??Measured via 34401A (100PLC) and 10T 5k Bourns WW as the resistor, heating up by "finger" method, powered by an epoxy LT1021-10..Also I tried to look at a longer run with the Bourns set to "zero TC" (difficult to find the zero, indeed) and I got 13uV/C (2.3ppm/C).The noise I saw at the level of the dmm noise (450-550nV rms in quiet periods), the lowest I've ever seen here..

author: Kleinstein
author_rank: Super Contributor
timestamp: September 25, 2022, 06:41:07 pm
content: The trimmer resistor is a bit suspect. It would be a good idea to have at least the main part of the resistance / current from a reasonable stable fixed resistor.Getting to 13 µV/K for the drift is not that bad, given that one usually gets a kind of parabola shape. So a maximum in the voltage at some temperature and quite some 2nd order TC.The +8 C step may bring you from one side to the other for quite some temperature range. The heating with the fingers may not be good enough to handle the TC that changes with temperature.The drain voltage also has some effect. Depending on the part and voltage the suppression of DS voltage variations is not that great. It could help to generate the drain voltage from the source votlage with a little gain (like x 1.2 or x 1.33) with also reasonable stable (e.g. 50 ppm/K or better) resistors. With the extra reference for the drain voltage one kind of gets the difference of the 2 ref votlages to enter.

author: iMo
author_rank: Super Contributor
timestamp: September 25, 2022, 06:49:02 pm
content: I did a longer run with the WW pot replaced by a mix of three 15/25/50ppm resistors such I got them close to the WW resistance (WW=3116ohm, resistors=3090ohm) and I got 24uV/C. In both cases the the stuff closed into a box with foam inside during the run. I will repeat the run with WW trimpot and different voltage setting this night with a bigger temp difference..

author: Kleinstein
author_rank: Super Contributor
timestamp: September 25, 2022, 08:10:56 pm
content: I think it would really help to approximately record the temperature and thus get voltage versus temperature curves and just the difference between 2 temperature points.A larger temperature difference for the voltage difference makes is more tricky to keep the average temperature fixed. The 2nd oder TC is quite significant, so the TC depends on the temperature.So far I have not done test with many different resistors usually just an iterative process to come close to zero TC. My fast tests for this were more with small temperature changes, but this may not work with the 34401.

author: iMo
author_rank: Super Contributor
timestamp: September 26, 2022, 06:30:40 am
content: Yep, the previous finger method was jumping around the max thus I got weird numbers, the 8C jump is too much.. Below the max at aprox 27C when scanning with temp. The box TC there is (from 24 to 28.5C) 14.5uV/4.5C=3.2uV/C, or 0.56ppm/C.

author: iMo
author_rank: Super Contributor
timestamp: September 27, 2022, 06:32:07 am
content: And finally a longer run of the NF510 jfet with 3100ohm (3x1k+100, 50ppm), at room temperature, schematics as above.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 27, 2022, 06:43:41 am
content: Much of the noise in the curve can be from the 34401 DMM. The LM399 reference alone usually has quite some noise (especially popcorn type jumps by some 4 µV) and the ADC of the 34401 adds some more white noise to this. With so many points, it looks like the measurement was done quite slow. With rather new parts and a new soldered circuit there is also the possiblitiy of drift for the JFET and the resistors and maybe also the DMM.

author: iMo
author_rank: Super Contributor
timestamp: September 27, 2022, 07:04:29 am
content: Yes, the most noise comes from the dmm, sure. Below the running standard deviation made upon 100 last samples during that measurement. The peaks are most probably popcorn shots from the 399, or EMI or EMF of connectors. With JVR_DUT you would need a much better setup.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 27, 2022, 07:17:43 am
content: There is a way to look at the JVR noise with better resolution when using the difference of 2 similar references. This allows to use a lower range (e.g. 100 mV) at the DMM an maybe an extra amplifier, so that the main noise is 2 x the JVR. One still does not know which one is causing the noise, but it is mainly reference noise.

author: iMo
author_rank: Super Contributor
timestamp: September 29, 2022, 09:32:21 am
content: The same NF510 sample bootstrapped with an OP07 creating its Vdrain. TC0 set to aprox 25C. Below a scan around 25C (up and down), 34401A 100NPLC, the data processed via a moving median filter (n=11).The max looks sharper than with the LT1021 source, could be the resistors around the OP07 play the role as well (125ppm one).

author: Kleinstein
author_rank: Super Contributor
timestamp: September 29, 2022, 11:44:39 am
content: The measurements are really stretching the 34401 performance. Especially when relatively slow and measured only for such a small range there are many parts that can contribute.With the limited meter it would make more sense to measure over a larger temperature range, like 15 to 30 C. This gives more change in the voltage and eaier interpolation.I would not expect the resistors to have much effect of the form of the maximum. At least in my tests (with 2N4391) I saw not much difference in the 2nd order TC part (factor before T²) with different drain voltage. A linear TC in the gain would mainly add some linear term to the reference and thus shift the position of the maximum, but not make it steeper.The resistors (the 2 for the voltage gain and the one to set the reference current) do effect the voltage. AFAIR the 2 resistors for the gain were a little less (but not very much) critical than the one for the current.

author: miro123
author_rank: Frequent Contributor
timestamp: September 30, 2022, 10:24:30 am
content: Hello Voltnuts experts,I've read this interesting thread. I have one beginner questions.How those discrete JVR scores against monilitics from lets say Analog Devices ADR44x series.I have no experiance with ADR44x but1. datasheet is promising2. They are automotive certified - mostly means that datasheets is met for all devices3. D grade has already excellent long term stabilityBRMiro

author: Kleinstein
author_rank: Super Contributor
timestamp: September 30, 2022, 11:08:51 am
content: The ADR44x use a similar reference inside, but with 2 FETs. This could allow to reduce the 2nd order effect. So the TC can be low over an extended temperature and not just in a small range.The JVR performance depends quite a bit on the resistors and likely some luck with the JFET choise. There is no real need for close temperatur coupling between the parts - so no real need for a monolytic solution. The discrete JVR needs additional effort for trimming to low TC and the absolute output votlage is scattering quite a lot (e.g. 2N4391 may range from some 4 to 8 V). The large scattering between JFETs also means an individually matched resistor - so nothing to buy the parts for, solder and done. Noise wise the 2N4391 based solution seems to be a bit lower noise than the ADR44x, when looking at the voltage noise relative to the absolute voltage.For the long term drift there is quite some uncertainty though the test so far look good for the JVR. The plastic case of ADR44x make them likely sensitive to humidity and could be the reason for not that great drift specs (50 ppm /1000h and 70 ppm hysteresis). JFETs are still availabe in a metal case. It can still be expenside to get hermetic sealed resistors.The really low drift vesion is the ADR45xxD and this one seem to be available next year.

author: iMo
author_rank: Super Contributor
timestamp: September 30, 2022, 11:12:32 am
content: Not a voltnut here, but I spent some time messing with references in epoxy packages (around 70 pieces incl ADR431 REF50xx LT1021-x here). Not worth of spending a single cent when targeting something with "voltnut" in mind.. The hysteresis makes them almost unusable for something like >=5digits..PS: as I reported in a different thread, my epoxy 2xLT1021-10+OP07buff shows <1ppm/C short term TC (2 chips selected for an opposite TC), but the hysteresis after a month powered-off is something like 60ppm..

author: dietert1
author_rank: Super Contributor
timestamp: October 07, 2022, 06:48:09 am
content: Looking once more into how to make a zero TC JVR with Ids < 1 mA and low Uds. The schematic shows a variant i am testing right now with good results.After some tuning steps for the Uds voltage generator as shown in the table i got a flat top at 23.1 °C with +/- 1 ppm in 18 .. 28 °C interval.Noise as measured by a K2700 in a temperature chamber is about 400 nV RMS, i.e. sub-ppm.After a four day log there is no indication of drift. Limit would be about +/- 15 ppm/a right now (will improve rapidly).Regards, Dieter

author: iMo
author_rank: Super Contributor
timestamp: October 07, 2022, 10:55:07 am
content: What if I use the second jfet (in a dual package) instead of the 1N4148?PS: there is a missing dot at Vref (to the opamp's output) in your schematics, imho.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2022, 11:23:10 am
content: A diode connected JFET could work instead of the 1N4148. However most of the dual JFETs are low threshold, as they are made for use as an amplifier. There are a few higher threshold types (e.g. the 3456 uses a pair in it's input amplifier for bootstrapping), but they are rare.The diode instead of a resistor shift the TC to a more negative value and allows to work with a small current for the FET. I would not consider some 1-1.5 mA for the 2N4391 too high. The question for me is more if it helps agains the curvature in the curve.What does the curvature parameter in the table mean ?

author: dietert1
author_rank: Super Contributor
timestamp: October 07, 2022, 11:34:20 am
content: Yes, it's great to use the second JFET for TC adjustment (on-chip sensor). What would be the reference voltage?No, there is no connection. The OpAmp does not output the reference voltage but the drain voltage of the FET. I am just showing how i connected the K2700.But your question contains a good proposal: Will also try to adjust the circuit for zero TC on the drain node. Then the OpAmp can already serve as buffer.A curvature of 2 ppm means that on the extremes the output voltage deviates -2 ppm from the maximum, so one can spec Vref +/- 1 ppm within the 18 to 28 °C range.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2022, 11:45:26 am
content: One still needs the OP-amp to do some amplification of the source voltage. So one would either use the amplified votlage from OP-amp or the source votlage without gain, but a bit higher impedance ( the resistor and some 150 ohms (1/gfs) from the FET.So far I found the compensation of the 2nd order effect tricky and prone to add drift. So my preferred way is a regulated temperature.

author: iMo
author_rank: Super Contributor
timestamp: October 07, 2022, 12:19:17 pm
content: Quote from: dietert1 on October 07, 2022, 11:34:20 amI've just tried with my dual jfet DGN349 (bootstrapped by an OP07, standard wiring) and I get around 0.75V at 0.4mA Ids.. (max 0.86V with 5k resistor).

author: dietert1
author_rank: Super Contributor
timestamp: October 07, 2022, 02:23:39 pm
content: That low reference voltage is a disadvantage for many applications. In my case i want to add a 10 V gain stage, to make it into a 10 V lab reference.Regards, Dieter

author: EC8010
author_rank: Frequent Contributor
timestamp: July 03, 2023, 10:16:53 am
content: I discovered this thread yesterday and read all of it. A few thoughts:The reference holds a constant voltage across a resistor. Therefore, the reference circuit is a constant current source, even if MacHattie didn't say so. That being the case, if you want a larger reference voltage (perhaps 10V) all you need do is add another resistor to 0V below the junction between gate and source resistor. Obviously, it needs to be a resistor with minimal drift. You still need a buffer to avoid loading, but it can be unity gain. You save one precision resistor.I have measured J112 noise at 1.65mA. White noise is 1.4nV/root Hz, with 1/f noise corner at 13Hz. It's quite quiet. BF256B/2N4416 (at the same current) is rather noisier; 3.3nV/root Hz.I flashed up cascode circuit using two J112 and decade resistance box. Measured current for minimum temperature coefficient is dependent on VTO as others have suggested from theory. With VTO = -3.55V (average value from my batch of J112), current for minimum tempco was 2.975mA using the two FET cascode circuit. Smaller VTOs had larger currents for minimum temperature coefficient.SPICE simulations of the cascode circuit will be poor because SPICE models the transition from resistive region to saturation region too sharply. Let alone whether the SPICE model vaguely matches the particular FET you test.I monitored cascode reference voltage on 34470A (7 digit DMM). Once circuit had settled, voltage was quite stable but trend plot showed popcorn noise (voltage steps typically of 1uV). I have not yet tested to see if that's an isolated example or whether all my J112 suffer.Despite all the previous caveats, the JVR looks to be worthy of further investigation.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 03, 2023, 11:01:13 am
content: 1 µV steps for the popcorn noise look quite large - not sure how the use of 2 fets is effecting this. In my tests I had steps more like 0.25 µV for J111,J112 and 2N4391. The noise (especially the 1/f cross over and frequency of the popcorn jumps) may vary between units / manufacturers.With relatively similar noise for the J111 and J112 it makes relatively little sense to use 2 x J112 in series, as a single J111 would give a comparable voltage, but with than less noise than the 2 FETs combined.The 2N4391 is attractive as it is available in a metal case.A point to watch is that there is often still quite some 2nd order TC. So one has a low TC only over a limited temperature range.

author: ch_scr
author_rank: Frequent Contributor
timestamp: July 03, 2023, 12:27:44 pm
content: I've stumbled across a "historic" reference (well, 1980) to the idea, only downside: it's in German. I've also attached a rough-n-ready translation that should hopefully be enough to get the gist of it.

author: dietert1
author_rank: Super Contributor
timestamp: July 03, 2023, 01:08:08 pm
content: After an observation period between April 2nd and May 8th i calculated these noise levels comparing hourly to 24h averages (all 10 V references):LTFLU1 0.13 uVrmsDual JVR 0.37 uVrms (in oven as shown above)ADR1399 0.28 uVrmsThe LTFLU1 has half the noise of the ADR1399 as it is a 4x array.Considering parts cost the JVR is a very interesting solution and probably its noise could be reduced reviewing my original setup. Don't know whether the dual JVR should be considered an array. I think its noise is less than that of a LM399.Regards, Dieter

author: EC8010
author_rank: Frequent Contributor
timestamp: July 04, 2023, 02:06:32 pm
content: I wouldn't have thought that operating as a cascode would affect noise of the voltage across the source resistor but I will experiment. (And grab some screenshots of popcorn noise.) Over the last few days I've been working to improve my measurement capabilities:I used an eight decade 0.1% resistance box to determine resistance for minimum JVR tempco, but it was a modern one using metal film resistors over ten ohm and the switches aren't wonderful (might be producing popcorn noise). I have a much older 0.1% four decade box that uses only wirewound manganin resistors (minimal excess noise) and wonderful switches with multiple wipers onto brass studs, but (being wooden) it's unscreened. I've just made and fitted a foil liner that folds over the top edges of the wooden box to make electrical contact all round with the metal fascia, to give a screened enclosure (minimises hum). I'd have replaced its terminals with BNCs (as I did on other box) but that would require too more metalwork for this box than I'm prepared to do.I monitored JVR current, but the standard deviation of the current measurement was much higher than expected from the standard deviation of the voltage measurement, suggesting that the low current ranges of 344xx series DMMs are a bit noisy. Next job is to make a transimpedance amplifier using; OPA1641, wirewound feedback resistors, and LT1010 buffer to minimise heating in the op-amp. Using 1k, 10k, and 100k current conversion resistors, I can have 10mA, 1mA, and 0.1mA FSD on the 344xx's basic range of 10V. Should be quieter and allow better measurements. And have negligible voltage burden.I will power JVR from 12V 2Ah lead-acid battery to eliminate mains-borne interference. Also, lead-acid battery is much quieter than bench supplies.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 04, 2023, 06:02:31 pm
content: The HP34401 noise is in most ranges higher than a J111 / 2N4391 base JVR reference. This definitely effects the current range, but even the 10 V range may well be higher noise. From my tests the noise if the 2N4391 is somewhat comparable to the LM399 ref used in the 34401 or similar meters, though a bit different shape in the time domain (LM399 has white noise plus relatively rare but large popcorn noise jumps between 2 levels, the 2N4319 is lower white noise, but more, smaller jumps with also more steps). So even with a perfect TIA one would not be able to really see the JRV noise directly with the 34401. The best chance to look at the noise would be having 2 JVRs and looking at the difference in the voltage in the 100 mV range (maybe 1 V range could work).

author: EC8010
author_rank: Frequent Contributor
timestamp: July 05, 2023, 07:24:23 am
content: I have a dedicated low noise (<1nV/root Hz) set-up for measuring noise, so I'm not worried about the basic noise of the the 344xx. It's just that I've discovered the current measurement weakness and can do something about it. A year ago, I experimented with a REF102 10V reference and logged it over >1000hrs. It had a little popcorn noise <-120dB, which was observable on the 34470A's 10V range on a trend chart and also on my noise measuring set-up. Yes, I've used the technique of looking between two voltage references to give a 3dB increase in signal to noise. For the moment, I'm just using the DMMs to see low frequency trends. Once I'm happy the set-up is good, I'll bring the big guns to bear. I'm interested in the circuit more as a low noise two-terminal CCS than as a voltage source. But observations as a voltage source are a convenient way to start.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 05, 2023, 08:26:24 am
content: The current from the JFET depends on the drain voltage. Especially with FETs with a high threshold the drain voltage has quite some effort. This is why the reference is nomally used with a bootstrapped voltage for the drain. As a minimum solution one would have something like a J112 as the main reference to set the current and a J111 (higher threshold) to get a stable drain voltage in a cascode like circuit.

author: magic
author_rank: Super Contributor
timestamp: July 05, 2023, 08:45:10 am
content: Quote from: Kleinstein on July 05, 2023, 08:26:24 amYou could use any random FET with the gate bootstrapped to the source of the reference FET.If the cascode FET is matched to the reference FET, you will even get some stability against temperature for all the same reasons as why the reference is stable.Note that reference drain voltage ripple/drift will only decrease by the ratio of the common source voltage gain of the cascode FET. And I seem to recall from Horowitz&Hill that it tends to be maybe a few hundred tops for typical JFETs. It will surely decrease if there isn't enough drain-source voltage across the top FET, for whatever value of "enough" is enough.editThe same "a few hundred tops" limit also applies to PSRR of the reference itself.

author: dietert1
author_rank: Super Contributor
timestamp: July 05, 2023, 04:11:08 pm
content: Can you say "a few hundred tops" in other words? For those who did not study the AOE. Thanks.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 05, 2023, 04:31:59 pm
content: Quote from: Kleinstein on July 05, 2023, 08:26:24 amSurprisingly, a higher threshold deviceisn'tthe best choice for the upper FET. You'd have thought it would be because it ensures that the lower FET is clear of the resistive region. But I measured source impedance of two-FET cascodes with high and low VTO devices and found that the highest source impedance came from using a pair of low VTO devices. It seems that rdfalls faster than gmrises as VTO rises. My initial tests were with a cascode using J112 from the same VTO bin for exactly the reason that magic stated.But I think I disagree with your common source voltage gain argument. Given that we don't have an explicit load resistance, it's better to treat the circuit as a CCS. Even with J112 (in a two-FET cascode) it is possible to achieve an internal resistance of 1M, so that gives a rejection of 1,000,000/1,000 = 1000. Adding another FET on top (as per MacHattie) makes it even better. But even an attenuation of 1000 might not be enough, and that's why I'm looking to improve my experimental set-up.

author: magic
author_rank: Super Contributor
timestamp: July 05, 2023, 09:39:32 pm
content: Quote from: dietert1 on July 05, 2023, 04:11:08 pmLess than one thousandI looked it up, it's table 3.7 in the 3rd edition, parameters of some common JFETs. It includes maximum attainable common source gain, presumably measured by the authors, analogous to μ of vacuum tubes. They call it "Gmax" and it's a 3 digit number for all listed types, 100 for J112.Gmax they define as: Gmax=gm/gos, the maximum grounded-source voltage gain into a current source as drain load; Gmax is proportional to VDS (tabulated values are at VDS=5V), and for most JFETs Gmax is relatively constant over varying ID.Where gm is, of course, the transconductance and gos is the output conductance of the drain.My logic as to how this is relevant is simple: 1V change in drain voltage results in gos change in drain current. This must be countered by gos/gm change in gate-source voltage to maintain the same or approximately the same drain current. Hence the change appears at the source divided by μ a.k.a. Gmax, provided that the circuit between the source and gate has reasonably high output impedance on its own.I would therefore expect each cascode layer to increase output impedance by the factor of μ.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 06, 2023, 11:44:55 am
content: Quote from: magic on July 05, 2023, 09:39:32 pmAnd so would I. I hadn't measured μ for J112 - 100 is disappointingly low. But itwasoriginally intended as an analogue switch. Still, add enough layers and it will be fine.As a general comment, AoE 3rd Ed. is superb. And "The X Chapters" is even better. Anyone who finds AoE 2nd Ed. useful will love them.Low noise transimpedance amplifier is on the schedule for today.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 10, 2023, 03:25:57 pm
content: As I suspected, my previous test setup wasn't brilliant. Source resistance is now all wirewound resistor decade box (negligible excess noise). Power is 12V 7Ah lead-acid battery, and the popcorn noise has disappeared. Source resistance is super-critical for minimum drift; presently set to 1k116. Although the two J112 are from the same VTO bin (-3.5V to -3.6V), they weren't matched. It's quite possible that lower thermal drift would be achieved by matching VTO.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 10, 2023, 07:05:44 pm
content: Most of the JFETs also show quite some square part in the votlage vs temperature curve. Trimming the source resistor only trims the linear TC and thus the TC over a rather small temperature range.To get a really stable voltage one would need either additional square law trim (which is tricky) or some temperature regulation.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 10, 2023, 08:31:32 pm
content: I fear you are absolutely right. Leaving it running, its drift spans 33uV, or 10ppm. And it was really finicky to get it to that level.

author: iMo
author_rank: Super Contributor
timestamp: July 10, 2023, 08:41:01 pm
content: That drift might have come from your decade box..

author: EC8010
author_rank: Frequent Contributor
timestamp: July 11, 2023, 06:28:00 am
content: Yes, although my box is 0.1% tolerance, that would be enough. 15 hour drift now spans almost 0.1mV. A 0.01% metal foil resistor would be better, but a 1k 0.01% main resistor would need a 110R 0.1% resistor in series, plus a 1% to trim the last bit of current. I'll have a look at the noise later, but considerable improvement would be needed before it could really be deemed to be a voltage reference. Looks like J112 is not a suitable choice for JVR.

author: iMo
author_rank: Super Contributor
timestamp: July 11, 2023, 06:42:20 am
content: Try to made your ~1k1 resistor of couple of ser/par resistors with lower TC, like <25ppm, and then finetune the final value of the "resistor" such you compensate for the TC of the jfets "including the resistors" as well.The jfet's TC shape allows to compensate out the TC of the resistors too..

author: Kleinstein
author_rank: Super Contributor
timestamp: July 11, 2023, 06:46:01 am
content: There is no need for low tolerance lke 0.01% resistors. The point is getting low noise (little excess noise) and low drift (versus time). Already the resistor TC is less critical as one would trim the combination of resistor and JFET for a low linear TC. I got good results with the Susumu RR SMD resistors with low excess noise to a level (some 45 dBi) - well good enough for the reference.The usualy way is anyway to have the main part of the resistance from 1 - 3 stable resistors and than have additonal less critical trim resistors. The final one to choose for the trim can be about any type as it has little effect.The J112 is not that bad, mainly limited with the plastic case that can make is susceptible to humudity effects. So far my favorite is the 2N4391, as one of the cheaper ones in a metal case and relatively well available. The current (1-1.5 mA) and voltage (around 5-8 V depending on the batch) are reasonable.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 11, 2023, 11:48:44 am
content: At the moment, my resistor is a decade box 200mm away from the JFET, and therefore at a different temperature, which won't help matters. Now that I know roughly what resistance is needed, I could put smaller fixed resistors adjacent to the FET, reducing the temperature difference, and maybe cancel one tempco with the other. Maybe. On the bright side, although the J112 reference drifts, itislow noise. Sufficiently low noise that a 5nV/root Hz pre-amplifier isn't quiet enough to measure it and I need to finish the tidy version of my 0.8nV/root Hz x5000 pre-amplifier.I looked up 2N4391 and it looks to be a metal can version of the J111-3 series, but way more expensive. Fiddly and needing selection to work, I can perhaps accept, but not fiddly and expensive.

author: dietert1
author_rank: Super Contributor
timestamp: July 11, 2023, 12:49:13 pm
content: Our dual JFET reference runs inside a pretty cheap IP66 aluminum enclosure that also serves as an oven (RS PRO 190-1860). With a used desiccant bag inside, relative humidity settles to a near constant value after some days. Don't start with dry desiccant, though! I saw variations less than +/- 0.2 %RH. In that ambient the J111 with its plastic case performs like a 2N4391 with its metal can. Same with resistors: No need for metal can resistors.I used a flat cable with epoxy to make a (near) hermetic cable feed, seehttps://www.eevblog.com/forum/metrology/the-ltflu-(aka-sza263)-reference-zener-diode-circuit/msg2637174/#msg2637174. The Peltier element is outside of the bottom (invisible). Later i glued an NTC into the aluminum cover of the flat cable.Regards, Dieter

author: EC8010
author_rank: Frequent Contributor
timestamp: July 11, 2023, 04:30:16 pm
content: Perfectly happy to make an oven - I've previously immersed components in oil. (Top tip: Use silicone sealant intended for engine assembly or oil seeps through tight threads.) I have plenty of J111, so I'll bin some for VTO to find a reasonable pair for the cascode. Been wanting to make a Peltier device do something useful for some time. Previous experience is that they need a huge heatsink to be effective.Surprised that humidity should be a problem with epoxy packages, but if you've measured it... And absolutely mystified by your used rather than new desiccant recommendation! Please explain.I thought I remembered something about JFET references in AoE 3rd Ed. So I looked it up (p680). This is where the IC manufacturers have a serious advantage. AoE describes a two FET reference where the voltage difference between two FETs of identical geometry but slightly different doping is measured by an op-amp, thereby reducing the tempco.

author: dietert1
author_rank: Super Contributor
timestamp: July 11, 2023, 05:29:53 pm
content: Last automn i put dry desiccant into a glas with rubber seal, together with two NOMC resistor arrays (plastic package to test) and a meter. Until february the meter showed 0 %RH (out of range). Now it reads 2 %RH. To get equilibrium near 50 % one may have to wait many years. If you use "invalid" desiccant instead, the humidity difference between inside and outside will be less. With a difference of 10% instead of 50 % the expected drift within a year would be a fraction of 1 %RH.Regards, Dieter

author: Kleinstein
author_rank: Super Contributor
timestamp: July 11, 2023, 06:29:17 pm
content: The peltier elements need a large heat sink only for cooling. For heating they are perfectly OK with a relatively small heat sink, though a reasonable large one still helps.For the relatively small and low power JFET based reference a simple oven based on heating alone is fine, especially if a more moereate temperature like 40-50 C is used.With the linear TC reasonable trimmed the oven does not have to be that accurate or stable. Against the square part even a rather crude oven is quite effective.

author: iMo
author_rank: Super Contributor
timestamp: July 11, 2023, 06:30:00 pm
content: Is that The "Special Reserve Kaluga Huso Hybrid Caviar" or the "Beluga Hybrid Caviar" in that jar?

author: dietert1
author_rank: Super Contributor
timestamp: July 11, 2023, 07:01:17 pm
content: No caviar here. The desiccant (orange when fresh, green when invalid) turned black when drying in the oven. The theory with "invalid" desiccant is to have a buffer that absorbs and yields humidity.Regards, Dieter

author: EC8010
author_rank: Frequent Contributor
timestamp: July 11, 2023, 07:11:48 pm
content: Used desiccant obvious once stated. Now all I have to do is to find some. I'd rather gently heat a small oven using a TO220 resistor. In fact, I'll just make it a bit of 6mm thick aluminium with some 4.8mm holes for the JFETs, epoxied in place and an NTC buried in a little hole with more epoxy. With only a little mass, not much power will be needed. I've just measured rather a lot of J111 for VTO at 20nA. Looks like -8.2V to -8.4V is the most popular bin, and I saw quite a few -8.25V devices. Tomorrow, I'll look for matches within that bin. Because the VTO is so high, they won't have a particularly high mu, but that can be surmounted by making a triple cascode. Probably need 24V rather than 12V to power it.

author: Kleinstein
author_rank: Super Contributor
timestamp: July 11, 2023, 07:51:59 pm
content: For a cascode I would consider lower threeshold devices on top. As an extra bonus one also looses less voltage. The upper one may be better outside, so the variable power from a variable votlage does not cause to much variable heat. For a voltage reference the cascode part would be to get a higher voltage, like references in series. The drain voltage is from an amplified voltage (e.g. 1.25 x or 1.5 x).For the oven it is not only the size that matters, but also the power of the parts in the oven. With high power there, the isolation can not be that good as one would otherwise like. For the oven design it really helps if the sensor reacts fast to the heater, possibly even faster then the actual reference part. To avoid stress to the transistor it may not be such a good idea to glue it to the aluminum block.

author: magic
author_rank: Super Contributor
timestamp: July 11, 2023, 08:39:49 pm
content: FYI, a potential approach to combine opamp scaling with high impedance constant current output.You would replace M1 with the JFET reference and derive VBfrom its source voltage.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 12, 2023, 08:28:12 am
content: Point taken about outer device and its variable heating. I had noted that the drain voltage came from amplified reference in the same way that many linear regulators power their reference from their output.Yes, I'm aware that the sensor needs low thermal mass and good coupling so that it accurately reflects what is going on. Also about size and power. Ultimately, there's a thermal mass whose temperature you want to change by heating, so the lower the mass, the less power needed. At the same time, there are losses to the environment, and although it would seem sensible to minimise them, they are actually needed to help in stabilising temperature, because if you apply too much heat, you want the system to cool quickly (ideally with the same time constant as for heating). Subconscious wondered about mechanical stress to the JFETs and gluing in block. I'll think about that one some more.Later edit: Conscious has thought about it and decided that gluing JFETs into a block held at constant temperature is fine. What wouldn't be fine would be gluing them into a block that changes its temperature and has a different coefficient of expansion to the epoxy containing the silicon die, thereby applying variable stress to the silicon as temperature changes.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 13, 2023, 09:48:58 am
content: Quote from: Kleinstein on July 11, 2023, 06:46:01 amKleinstein, could you expand on your epoxy humidity comment, please? What are you suggesting, surface leakage or bulk leakage?

author: Kleinstein
author_rank: Super Contributor
timestamp: July 13, 2023, 10:34:00 am
content: The weak point with a plastic case is an effect of humidity. Epoxy and many other plastics slowly take up some humidity from the air and this leads to swelling and thus a change in the mechanical stress to the part inside. The mechanical stress can effect semiconductor parts and resistors, e.g. with a change in the voltage or current. The humidity effect is usually slow, like a few days to weeks to stabilize.Heating the parts makes the effect faster and with a higher temperature compared to the environment the rel. humidity is reduced (like half for every 10 K). For a part used intemittendly in a more humid climate this means some humidity drift after turn on.

author: EC8010
author_rank: Frequent Contributor
timestamp: July 13, 2023, 10:54:28 am
content: Thanks for that. I'm aware that plastics absorb water (it's why you can't make accurately dimensioned nylon parts), and the asymmetric shape of a TO92 case will apply changing stress with different absorption. Interesting. I was thinking in terms of direct electrical leakage rather than a mechanical effect. And that has an interesting knock-on...I have previously thermally bonded TO92 devices by drilling a 4.8mm hole in 5mm thick aluminium clamped to a piece of sacrificial aluminium so that when separated, and the device is inserted, the TO92 flat face very slightly protrudes from the face. I then clamp that piece of aluminium to another and achieve a good thermal bond all round the device. But from what you've said, a better solution for long-term stability is to simply drill a complete 4.8mm hole and fill the gap with epoxy. It might not be exactly the same kind of epoxy as used by the semiconductor manufacturer, but it's a much closer humidity absorption match than aluminium. If you look at a TO92 device, the legs (and presumably die) are on the diameter of the perimeter, so returning the epoxy to a cylinder would reduce mechanical stress from absorbed humidity.Thanks again.

author: Alex Nikitin
author_rank: Super Contributor
timestamp: May 24, 2024, 09:00:00 pm
content: For various reasons I didn't do regular measurements onmy JVR unit, however it was working 24x7 all these years and now thatI have a new voltmeter - HIOKI DM7275- , here are some fresh measurements. I don't have calibration data on the HIOKI however it agrees with my other meters (two Keithley 2015 and HP3456A) and my Fluke 731B voltage reference to less than 3ppm.Last measurements made in 2016/17 at 24/25C are here in the thread. I've repeated the conditions as much as I could, with a stable 25C ambient (less than 0.2 degrees C variations). Assuming the HIOKI is reasonably accurate it appears that the JVR didn't drift much over these 7 years.CheersAlex

author: Alex Nikitin
author_rank: Super Contributor
timestamp: May 28, 2024, 11:44:44 am
content: Here is my attempt to plot the tempco for the JVR using my smallreptile box"temperature chamber" and the HIOKI DM7275. The apparent "hysteresis" is just the time lag as the speed of the temperature change is not controlled. The temperature measured on the JVR case however internally the unit is hard-wired on a perforated board and various bits warm up and cool down with different speeds. I am planning now to build an updated unit on a proper board and possibly with a temperature control and/or a parabolic temperature compensation. From the graph below it looks like the tempco can be improved several times with a good temperature sensor and a parabolic convertor. If I can flatten the curve down to, say, 0.2ppm/C (+/-2ppm over 15-35C ambient range), it would be a nice reference which would have a very low current consumption and would require very little warm-up time.Alex

author: IconicPCB
author_rank: Super Contributor
timestamp: September 26, 2024, 11:31:36 pm
content: Alex ,There is a new development which could improve on the JVR idea.Please see the attached document.

author: ivo
author_rank: Regular Contributor
timestamp: September 27, 2024, 10:10:20 am
content: If I'm mathing right, the 120mA diode went from 117.5 to 115mA over 25C to 75C, so 0.05mA/C, or in relative terms -400ppm. Is that really zero? I also kinda wanted to see a tempco spec column, if thats the big feature on the product title... 25mA is also a lot of current for smaller applications

author: Kleinstein
author_rank: Super Contributor
timestamp: September 27, 2024, 02:31:01 pm
content: The constant current diodes are for LED lights and similar. So low TC is relative - good for a light appliction, but not useful as a reference - not even competing with a TL431.Still nice to have somewhat fine graded parts with not so much tolerance in the current. Still a bit on the high side for many uses. These may internally be depl. mode MOSFETs with an integrated resistor.

author: iMo
author_rank: Super Contributor
timestamp: September 27, 2024, 06:05:28 pm
content: There is the Vishay Siliconix CR240 (2.4mA) current source (a jfet with a resistor) claiming typ 0ppm/K. All other CRxxx are plus minus hundreds of ppm/K..