What is the fastest power diode you know? - Page 1
Forum section: electronics / general

author: doesi
author_rank: Contributor
timestamp: August 24, 2021, 08:39:26 am
content: Hi guys,I am currently working on a buck converter using GaN FETs (EPC2103) as power switches. With my current setup I can archieve a switchnode rise time of about 1ns without parasitic ringing.So far so good but there is one issue with GaN FETs: They don't have a body diode and therefore the switchnode voltage goes down do -3V during the delay time, where both the high side and the low side switch are turned off. The buck controller chip (MIC2127A) does not like this at all, which is why I installed a Schottky diode in parallel to the low side switch do limit the switchnode voltage to -1V. This diode (PMEG10010) is not fast enough and at around 10A output current, the voltage got so low that it destroyed the controller. So my quention is the following: What is the fastest power diode you know? Minimum requirements: If=1A, Ur=75VI attached two pictures, one shows the switchnode voltageand the other picture shows a closeup of the switchnode voltage where you can see the negative voltage (orange and yellow) as well as the low side gate voltage (blue).

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 24, 2021, 09:51:43 am
content: Not sure if it may help, but a good source of diodes are the body diodes in other mosfets

author: Circlotron
author_rank: Super Contributor
timestamp: August 24, 2021, 10:27:53 am
content: Quote from: MasterTech on August 24, 2021, 09:51:43 amI believe that mosfet body diodes can experience current crowding during reverse recovery, sometimes leading to destruction. That is to say, different parts of the die recover at different rates, and the slowest areas are eventually left with the entire reverse recovery current. This is especially so if the gate was turned on after the body has begun to conduct fully. That was 20 years ago, might not be an issue nowadays.

author: fourtytwo42
author_rank: Super Contributor
timestamp: August 24, 2021, 10:35:30 am
content: Why did you change the design to use Gan FETS ?I cannot see the point in your risetimes, they just cause trouble as you have discovered.

author: doesi
author_rank: Contributor
timestamp: August 24, 2021, 11:54:29 am
content: QuoteThese FETs have lower switching losses because they are faster, lower losses due to a lower output capacity, lower driving losses due to lower gate capacity, no reverse recovery losses, lower parasitic inductances...QuoteThe high rise times with the low switching losses enable a higher switching frequency and therefore a smaller PCB design. Only a few percent points higher efficiency can make the difference between having to use a heat sink or not. High rise times in itself do not cause problems for me, as you can see there is no ringing.Quotein that case I could replace the low side GaN FET with a Si FET but as explained above I want to avoid that.I am looking for a fast Schottky diode, maybe on the basis of GaAs, InP, do you know any such component?

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 24, 2021, 12:14:15 pm
content: Quote from: doesi on August 24, 2021, 11:54:29 amNot the same, by using the body diode of a mosfet whose Vgs=0 you are using just the diode and maintaning the switching characteristics of a GaN.In a certain application I did the same because body diodes can have a favorable forward recovery characteristic.

author: doesi
author_rank: Contributor
timestamp: August 24, 2021, 12:35:55 pm
content: QuoteThat's interesting, can you explain the application you used a body diode and do you have any resources on body diode behaviour? Where did you learn that and what FETs would you recommend?

author: Kleinstein
author_rank: Super Contributor
timestamp: August 24, 2021, 01:03:27 pm
content: The quated speed of diodes is normally the time for turning off. The time to turn on is more determined by parasitic inductance and thus the layout and phsical size. There is some forward recovery, but mainly is noticable with PIN diodes made for high voltage, as they have additional votlage drop from the low doped zone. This can lead to a higher forward voltage for the initial time until an equilibrium carrier concentration has build up.With a high current the voltage drop at the diode may just get to high. So it may need a larger diode or more of the small ones in parallel.There are fast SiC based diodes, but I am afraid there forward voltage drop may be too high.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 24, 2021, 03:02:10 pm
content: There is no faster diode than schottky. The GaN itself behaves as a schottky with Vf ~ Vgs(th) + Vgs(off). Both are minority carrier devices, and suffer no recovery or time delay other than that given by their dimensions, RLC equivalent circuit, whatever.These waveforms are on a time scale of single nanoseconds. It would seem the better question is: what diode can you even wire in parallel with the low side, that will provide the required properties -- namely, stray inductance in the diode-FET loop, and junction capacitance.In other words, speed is limited by small-signal bandwidth, which is wholly dependent on layout geometry and switching impedance.Have you considered:- Using a GaN-specific controller?- External gate driver?- Those GaN-driver-and-inverter-in-a-chip parts?You may not be completely screwed, with this combination (the controller plus GaN). A possibility is putting the series gate resistor in the negative (PGND?) path between controller and bridge, so that the negative swing can be clamped by a (smaller) diode, without upsetting the controller. Whether this is feasible given other limitations (e.g. permissible AGND/PGND voltage, whether the controller itself needs to be referenced to a global GND e.g. because of a programmable voltage setpoint or something, etc.), you'll have to figure out.Tim

author: sandalcandal
author_rank: Unknown
timestamp: August 24, 2021, 03:23:22 pm
content: As per Tim's advice, you can't really get faster than a Schottky or the reverse recovery characteristic of the GaN HEMT.If I am reading correctly, the problem caused by the negative voltage swing here is the damage to your controller, not excess reverse conduction loss. My suggestion is that instead of trying to reduce the reverse voltage across the power switch using a power diode, you try to reduce the reverse voltage across the controller using a smaller (faster) signal diode. You can likely find some small signal diode (maybe an RF diode worst case) that you could put in reverse parallel (or something else) to your controller in order to clamp the reverse voltage there.

author: Marco
author_rank: Super Contributor
timestamp: August 24, 2021, 03:51:43 pm
content: If it's wirebond inductance, maybe CFP Schottky's would help? They are clip bonded. You can get them in Silicon flavour ... but you can also get them in SiGe. I'm going to guess that if these don't help, you're shit out of luck :https://www.nexperia.com/products/diodes/silicon-germanium-sige-rectifiers

author: doesi
author_rank: Contributor
timestamp: August 24, 2021, 04:27:03 pm
content: QuoteThe Schottky diode is placed on the bottom side of the PCB, exactly below the EPC2103 with 5 vias each connecting it. I am aware that the inductance is critical but there is no better way. I simulated the whole circuit and adjusted the diode inductance in the simulation until the result matched the measured curve, when the low side FET turns off and the high side FET turns on. You can see, that the voltage dips into the negative and returns to about -1V which is the Vf of the Schottky at load current. In the simulation I get the same dip when I insert an inductance of 100pH which is already quite low.The strange thing is that when the high side FET turns off, the diode does not seem to do its job because the voltage drops way too low. The only difference to the previous case is that the diode has a reverse bias now before turning on. I don't know why it does that. It seems like it doesn't even turn on at all. Do you know why that could be?QuoteYes, I would really like to and if you know one pleas tell me but to my knowledge there is no GaN specific buck controller going up to 75V. The MIC2127A is listed on EPC's website as a suitable controller which is ironic because it clearly doesn't work and I already had a long video call with the chip developers from Microchip discussing this issue. They also have no better suggestion.Quotemaybe possible but buck controllers of this kind have a current sense feature for which the switchnode voltage has to be connected to the controller independent of the gate driver.QuoteSomething simular was suggested by the Microchip developers but after thinking about that for a long time and simulating it I am pretty sure this would destroy the IC because it messes with the voltage reference for the gate path. If you are really interested I can show you a detailed analysis of this...Quotemade my daylooks interesting, I will look into it tomorrowThanks for all the helpful responses

author: David Hess
author_rank: Super Contributor
timestamp: August 24, 2021, 09:24:48 pm
content: Quote from: MasterTech on August 24, 2021, 09:51:43 amThe MOSFET body diode is formed from the base-collector junction of the parasitic bipolar transistor and not particularly fast.Quote from: Circlotron on August 24, 2021, 10:27:53 amIt can be current crowding, but not of the body diode. The parasitic bipolar transistor can operate in inverse mode if the body diode snaps off and dV/dT is high enough, resulting in avalanche breakdown or secondary breakdown of the parasitic bipolar transistor. This may appear as a second recovery time waveform after the body diode's recovery time waveform. Newer power MOSFETs are more resistant to this.

author: David Hess
author_rank: Super Contributor
timestamp: August 24, 2021, 09:44:06 pm
content: Quote from: Kleinstein on August 24, 2021, 01:03:27 pmThat is my thought as well. I do not see how it could matter, but at that high a current density, the parasitic PN junction in the Schottky diode is being forward biased normal PN reverse recovery applies.Multiple diodes in parallel will also lower the total parasitic inductance.

author: doesi
author_rank: Contributor
timestamp: August 25, 2021, 08:02:17 am
content: QuoteJep, had a look at a few MOSFETS datasheets and the body diodes are not particularly fastQuoteI am now pretty confident this might be the issue, I am going to try simular diodes without guard ring structure and let you know...

author: Marco
author_rank: Super Contributor
timestamp: August 25, 2021, 12:23:59 pm
content: At turn off of the high side MOSFET, the free wheeling diode goes from reverse bias to forward bias, how exactly can reverse recovery be relevant there?Do you mean normal PN forward recovery will apply in the high current regime?

author: doesi
author_rank: Contributor
timestamp: August 25, 2021, 12:28:15 pm
content: QuoteYes I suspect.

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 25, 2021, 04:06:52 pm
content: The forward recovery voltage of PN junction rectifiers is often incorrectly assumed to be an "inductive" effect, and it is a conductivity modulation effect.It is a mistake to assume that if reverse recovery is large then forward is going to be also large and viceversa.My application was with voltages >100V and if the lowest possible forward recovery voltage was required then the body-drain diode of a MOSFET was the best available. The peak forward recovery voltage with near instantaneous current application is limited by the resistance of the drift region, which is the ON resistance of a HV MOSFET, and this is carefully minimized by design.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 25, 2021, 05:58:42 pm
content: Well, it can't be any less than the drop due to Rs, that's certainly true. What about peak, though?Curiously (or perhaps not, I'm not real clear on the mechanisms of forward recovery myself), all my testing has shown little if any forward recovery (transient peak voltage above Vf) in MOSFETs. And by that I mean, less than Vgs(th) would allow, because that is an ultimate limit (at Vgs = 0, Vds << 0 will simply enhance the channel and conduct majority carriers instead, same effect as the GaN FETs above).I suspect my relative ignorance is no accident, as forward recovery can vary wildly from part to part, at least when it's poorly or uncontrolled. Suggesting it's not well understood by those in the business even...Tim

author: Marco
author_rank: Super Contributor
timestamp: August 25, 2021, 06:17:53 pm
content: Quote from: MasterTech on August 25, 2021, 04:06:52 pmWhat MOSFET package has <100 pH source inductance though? These edges are ridiculously fast.On second thought ... what single package could ever get to <100 pH except something similar to the EPC MOSFETs in the first place? Wide, short, dozens of bumps.

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 25, 2021, 07:36:17 pm
content: Quote from: T3sl4co1l on August 25, 2021, 05:58:42 pmYes. Eventually whenever you need a spec optimized you need to test, test and test a lot of parts. Either the conventional wisdom is wrong, or the test conditions of the datasheet do not apply, or no one knows.

author: Circlotron
author_rank: Super Contributor
timestamp: August 26, 2021, 01:41:37 am
content: Quote from: MasterTech on August 25, 2021, 04:06:52 pmBack in 2004 I was part of the design team of a 3kW SMPS for telecoms usage, in particular the PFC boost converter at I think 100kHz. It had a 450VDC buss and we were having all kinds of fun and games keeping the PFC mosfet drain voltage from overshooting too much at full load and low AC in, 160V. No SiC schottkys big enough in those days so we had a normal ultrafast diode and all sorts of inductors and caps and smaller diodes between the main diode and the big electros to look after reverse recovery, so the drain voltage wasn't clamped to buss voltage as well as it could be. Anyway, while looking at the specs of various diodes that we might be able to use in the PFC stage I do remember seeing the datasheet of some particular mosfet at the time that actually specified the forward recovery time of the body diode and it was astonishingly low. I can't actually remember what the device or the figure was. I can't actually add anything to the discussion here, just that I too have seen a body diode forward recovery spec that was outstanding.-----Having flashbacks of winding the big variac down and down while watching the peak drain voltage as the isolation tranny and variac hum more and more and the CRT screen of the HP DSO got more and more wavy from the magnetic field of the tranny and variac, hoping the whole thing wouldn't blow up.

author: trobbins
author_rank: Frequent Contributor
timestamp: August 26, 2021, 03:54:21 am
content: doesi, have you been able to modify the FET gate voltage waveform to slow the Vds rise time of the FET turning off, just enough for the buck inductor not to cause grief? I note you have discussed gate drive resistance and where that is located. Is that a balancing act you have characterised (destruction versus additional switching loss)? I recall some controllers/drivers had a specialised gate drive characteristic that suppressed the EMI outcome from the switching transition - have you checked what other controllers have similar capabilities to the MIC2127A ?

author: boB
author_rank: Frequent Contributor
timestamp: August 26, 2021, 04:46:16 am
content: I would try adding a Schottky diode right at the controller itself where it is electrically and physically farther from the EPC GaN FET itself and can clamp directly to the controller's Vss or Vdd, whichever you are having trouble with. Or both

author: doesi
author_rank: Contributor
timestamp: August 26, 2021, 06:17:23 am
content: QuoteUnfortunately there are two reasons why this would not work:The whole load current switches between the high side, the diode and the low side FET and therefore these three components should be close. Any added parasitic inductance leads to massive ringing.If the diode only clamps the controller, there is a voltage gradient of ~2V between the switchnode and the controller for a short time. Because this connection is also the current path for the high side gate and the threshold voltage is 1,3V, this leads to an unwanted turn on of the high side -> boomI already thought these scenareos through and did some simulations because the guys from Microchip suggested something simular.

author: Marco
author_rank: Super Contributor
timestamp: August 26, 2021, 08:42:20 am
content: I just don't see how any single diode could ever have low enough inductance, find the one in the smallest package with enough Vrr and low enough Vf and cram in as many as fit beneath the mosfet, in two rows.

author: doesi
author_rank: Contributor
timestamp: August 26, 2021, 09:40:32 am
content: QuoteYes I did that, by adding rediculously big resistors like 47Ohms at the gate, I can slow the switchnode down from 1ns to 5ns. This improves the situation noticably but my switching losses...I would prefer avoiding that.QuoteThere are not many GaN specific drivers out there, The whole thing is too young. On EPC's webpage you can see the controllers they list as GaN suited, if you want a 75V input voltage controller, there is no other option (except for its little brother, the MIC2128). I did not find any alternative 75V GaN suiteble buck controller from any manufacturer.QuoteDoes this also apply for Schottky junctions? I thought that the Schottky turn on is mostly limited by parasitics with other effects being neglectable.QuoteWhere do you know this from, would be interested to learn more about that.QuoteThat sounds plausible but in my case, reverse recovery (when the switchnode goes high) is just as important as forward recovery. As I know reverse recovery values for power MOSFETS are in the range of tens of ns.I suspect that the problem in my case comes from the guard ring structure of the Schottky junction, where a parasitic pn junction with all its nasty dynamic properties goes into a conducting state. Therefore I ordered a few Schottky diodes without that structure to try them out. Does anyone have experience with this kind of behaviour?Does anyone have more detailed resources on the dynamic behaviour of Schottky diodes and pn diodes? I find it is quite frustrating that for such a "simple" two pin device I cannot find such information.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2021, 11:24:51 am
content: Quote from: doesi on August 26, 2021, 06:17:23 amYup, it would work if it were (non-logic-level) Si, though it would work anyway for obvious reasons.Actually it's still not very obvious because the controller says -0.3V with no further DC or transient rating that I can see, and it seems like it's just completely cursed from the get-go...Still maybe not completely screwed though. How about mutual inductance, a common mode choke shouldn't need to be too big at that pulse width? Just a couple turns of twisted pair on a #43 bead should do, I'd bet.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2021, 11:42:59 am
content: Quote from: doesi on August 26, 2021, 09:40:32 amRight, this is a non-sequitur for the schottky -- at least as long as its transient Vf isn't also turning on the guard ring. Which, since it's dimensioned large enough to handle DC, that's unlikely, and the measured overshoot is entirely due to inductance.The effect does indeed look similar to inductance, the catch is, you don't get the energy back at turn-off. Similarly for recovery charge, it looks like nonlinear capacitance but you don't get the energy back. But yeah, schottky don't suffer from either of these effects, only the plain linear parasitics (at least for Vf < Vf(guardring)).QuoteTypically the guard ring only pulls in above rated current. Which makes schottky generally not great for pulsed or surge operation -- for snubbers it can be here or there; I've certainly had snubbers where a PN diode burned up from recovery loss, it depends on conditions. For like inrush current, it's not a good idea: in particular, SiC schottky have such high resistance that they typically cannot handle full inrush, say in a boost circuit (often PFC), so a bypass diode is required.I doubt you're going to find any data on guard ring recovery; it's beyond normal operating current so why bother, right. It's hard enough to tell when it pulls in, though some datasheets do show the extended range -- for example some (Infineon? Cree? I forget) datasheets show SiC diodes up over 5V forward, and the curve is obviously double-kinked, with negative temperature dependence -- the guard ring doing work. Si schottky tend to be closer together, and not plotted to such high currents anyway, so the guard ring is less evident on the curves.So, just make sure it's rated for enough current. Which, it sounds like your first try was, so that's about as good as you can do.Interestingly enough, there are some "schottky" with definite reverse recovery and not just capacitance, like this,https://www.diodes.com/assets/Datasheets/SBR20A200.pdfit doesn't depend much on dI/dt (based on my measurements) and the recovery charge and associated losses are much smaller than PN types. Though at your time scales, I don't think this would still be enough. But anyway, more conventional parts are available in the <= 100V range so it's fine.Tim

author: trobbins
author_rank: Frequent Contributor
timestamp: August 26, 2021, 12:16:39 pm
content: Have you assessed if an active snubber could (for example) switch a capacitor on to the fet mid-point at the time the fet gate was turned off/on - with inductor current mainly diverting in to the capacitor for circa 25ns rather than forcing a path through the FET and being clamped by the controller.

author: doesi
author_rank: Contributor
timestamp: August 26, 2021, 01:36:51 pm
content: QuoteTim, this is brilliant, just simulated the circuit with a common mode choke (20nH), one coil between swichnode and controller pin and the other coil in front of the high side gate. The voltage drop between the switchnode and the controller, which would normally turn on the high side gate, is now countered by the voltage at the coil in front of the gate. This way the diode can clamp the voltage directly at the controller without having to conduct the whole load current.QuoteQuoteI used a 1A diode in a buck with 10A output current, this is no issue thermally because the 10A pulses are only about 2 x 20ns at 800kHz but I don't know at which point the guard ring kicks in. The PMEG10010 datasheet gives a maximum pulse current of 50A for an 8ms rectangular pulse but I guess this only tells me something about the thermal durability and not when the guard ring starts conducting. I can only assume that the guard ring acts as a "normal" pn junction which starts conducting at about 0,7V - 0,8V. If I look at the If vs. Vf curve in the datasheet this is the case between 1A and 10A depending on Tj. You may ask why I don't use a 10A diode but one other objective is to keep the diode physically small and to keep the capacity low. Each pF adds to the Coss losses which are then dissipated in the GaN FETs. Therefore I am trying different diodes with the hope of finding one without guard ring. At least I ordered only ones where it is not listed as a feature. On Monday I will find out...QuoteThis would need timing with sub ns accuracy, the exact time when to switch is also load dependent so it would need some kind of analog control circuit to adjust for that. I already simulated a circuit which does something simular but it gets complicated...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2021, 02:32:25 pm
content: Arguably better than trying to active clamp, would be turning down dead time to zero, plus or minus a bit. This is acceptable when the switching loop inductance is known, and the peak voltage can be clamped.And, not that this can be done, at least in any effective way. Controllers rarely if ever have a control for dead time, and most of them are disgustingly generous with it (like LM25119 I recall is 60ns, very hard to optimize its switching loss).Specifically what happens is, when both devices turn on, the switching loop charges up at Vin / Ls = dI/dt. It's not at all the fatality it's made out to be by most sources. (And indeed is necessary for certain topologies: a current-fed inverter is everything upside-down from a voltage-fed, including dead time being negative in the normal case and positive in the dangerous case!) The trouble then follows when one device is left on, and the voltage flies back across the other. So the loop needs to be clamped, or damped, somehow; and this suffers the same problem as any other loop modification: you simply can't put anything in there, with any less inductance than the two transistors and bypass cap, back-to-back-to-back, already have. Or without adding entirely too much capacitance in parallel with one or both transistors; or all of the above. That is, say your loop is 3nH to begin with; the best you can hope for is a diode off to the side, adding like 5nH. Say you stretch the loop to 10nH, to reduce the dI/dt a bit, permitting some overlap. (Which isn't very much really, at 100V and 10nH that's still a whopping 10A/ns...) Now your diode is able to clamp a full 67% of its loop inductance (10n loop + 5n of its own). Not really all that impressive...Note we can consider the impedance of the inverter, as a reactive network itself (if a nonlinear / dependent one, i.e. it's always switching back and forth). Between switching states, it has Coss capacitance and Ls inductance, thus an impedance of sqrt(L/C) of those. And that impedance corresponds to the peak overshoot when excited by a switching edge faster than its cutoff frequency; and a cutoff frequency of Fc = 1/(2 pi sqrt(LC)), for which we prefer Fc much higher than 1/t_sw so that it isn't excited by switching, and we simply don't have to worry about this dynamic.Well, at these rates, it's hard to ignore. So we might consider a less restrictive condition, with Zo on the order of Zsw = Vpk / Ipk say. Probably lesser than, so that peak voltage is modest (overshoot ~= Zo/Zsw), and we'll just have to deal with peak current (if we don't add extra capacitance, then we're limited by Coss no matter what we do).So, 75V/10A = 7.5 ohm, and Coss = 500pF, we have Ls < 28nH (and corresponding Fc > 42MHz, or 1/4 wave of 6ns).Which should be pretty reasonable actually. And so, give or take how you've got board layout (inner layers, vias, bypass caps), that should be easy enough, and indeed the waveforms look quite clean, dead time aside.But this again proves the difficulty of putting anything with it, with Ls being just so small to begin with.Tim

author: David Hess
author_rank: Super Contributor
timestamp: August 26, 2021, 06:11:43 pm
content: Quote from: T3sl4co1l on August 25, 2021, 05:58:42 pmIn his book Troubleshooting Analog Circuits, Robert Pease reported finding a batches of 1N914 and 1N4148 switching diodes which displayed a forward recovery of 10s of nanoseconds at low repetition rates. This apparently had something to do with the diffusions.I have never seen this behavior in a Schottky diode, but I have also never looked for it.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2021, 06:28:43 pm
content: Yes, exactly.It should be that the effect doesn't occur in schottky diodes. I suppose there could still be effects like conductivity modulation of the drift region or bulk, but those should be pretty small. If present, the effect should track with voltage rating (higher voltage --> wider, lighter doped drift region).Tim

author: exe
author_rank: Unknown
timestamp: August 26, 2021, 06:40:09 pm
content: 1ns rise time, wow, that's fast. I didn't know such smps exist...I don't understand why adding 47 ohm resistor slowed it down just to 5ns. With gate capacitance of 730pf and gate resistor of 47 Ohm I calculate corner frequency to be just 4.64Mhz (not to mention Miller capacitance). I'd expect rise time to be much more than 5ns.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 27, 2021, 12:13:21 am
content: Transconductance is rather high, and Crss is rather low. The ratio of drain rise/fall to gate fall/rise can be quite large!Tim

author: Marco
author_rank: Super Contributor
timestamp: August 27, 2021, 12:41:18 am
content: How about making the gate and SW to source connections to the top MOSFET out of coupled lines with some cleared ground plane? (Next to each other, or on top of each other.) Intentionally making the traces high inductance for non differential current. Then put an extra free wheeling diode at SW with maybe a tiny bit of parallel capacitance. MOSFET switching is unimpeded, yet the SW connection is protected from the worst of the current pulse during the dead time due to added inductance.I don't do RF so I have no intuitive understanding if the magnitudes of effect of this can be sufficient, but with 1ns switching time and 20ns dead time I do know it's all RF.

author: doesi
author_rank: Contributor
timestamp: August 27, 2021, 06:28:15 am
content: QuoteThe simple formulas you find in every book to calculate the rise time show a linear relationship between rise time and gate resistance but certain assumptions made in these calculations don't apply when using GaN: The well known formula assumes a perfectly square shaped gate drive voltage with the gate current only limited by the gate resistor. Since the gate driver in my case has a rise time of 10ns and the gate capacity is an order of magnitude lower compared to Si, the gate current is primarily limited by rise time (Ig=Cg*dU/dt). If you do the analytical calculation with more realistic assumptions you end with a formula where the turn on time is proportunal to the square root of Rg. I tried different gate resistors and could nicely verify my formula.Furthermore, as Tim mentioned, the output rise time is much higher than the gate rise time: The voltage transition at the switchnode is (at least mostly) done in the time it takes to shove QGD (gate drain charge) into the gate and QGD is only a fraction of QG.QuoteJust as Tim previously mentioned this would be basically a common mode choke. I simulated this scenareo and it seems this should be feasable in the layout without adding a component. 20nH for each coil, coupled in neighbouring layers should me more than sufficient. Something to remember for the new prototype version...QuoteYes, often makes it difficult distinguishing the real signals from artefacts like reflections, RF pickup, limitations of scope and probe... when measuring. Routing becomes a challenge.

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 27, 2021, 08:57:52 am
content: Quote from: David Hess on August 26, 2021, 06:11:43 pmYes, and it doesn't even look that bad, could be worse. The reason is the carrier lifetime techniques used to reduce reverse recovery actually worsen the forward recovery. Don't know if those are double diffused diodes or diodes with epitaxial drift region, but lifetime killing methods always hurt other things.Carrier lifetime altering methods are mentioned herehttps://www.powerguru.org/charge-carrier-lifetime-in-semiconductors/Doesi, I'd say you're pushing the limits and your only way is to spend a lot of hours in the lab to test different solutions.

author: exe
author_rank: Unknown
timestamp: August 27, 2021, 11:46:01 am
content: How much efficiency did you lost when rise time was 5ns?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 27, 2021, 12:10:27 pm
content: Quote from: doesi on August 27, 2021, 06:28:15 amI would be leery about that exact arrangement, I think the coupling is still pretty poor (0.6 at a guess*), and the inductance isn't very large so there's still a lot of peak current flow.*I don't know any handy formulas for this geometry, but a hand-waving approximation could compare the transmission line impedance of the pair in free space, versus their impedance to nearby ground, which might be say 50 vs. 200 ohms. And then, however these values are combined: if subtractive then the ratio is 1 - 50/150 or 67%, if like a current divider, then 1 - 50/250 or 80%. I'd have to think about it a bit to figure what formula applies. I'd just as well set up the geometry in a simulator and calculate it directly ...if I had one.But this is easily solved by carving holes in the board, around the trace pair, and clamping a split ferrite core around it.You could, uh, I guess get lucky splitting a ferrite bead or toroid just in half, that's large enough to fit around the web of PCB; otherwise, as far as proper planar cores, I don't think they make two-leg types that would be optimal here, mostly being some variation of 'E'; basically for the "production" version you might as well use a proper planar core footprint, and just route the pair around, as you would any other windings. Might as well pick up a few extra cores for the converter too and make the whole thing super low profile.And other otherwise, a bit of twisted pair around a ferrite bead, as an extra component, should be easy enough to work in regardless. (May even be able to carve up the protoboard and test it now?) It's probably a custom part, I don't think you'll find small ferrite beads with good coupling -- at best they use two parallel lines loosely inside a common core opening, not much better than the bare-PCB case, albeit at higher inductance. And I think those tend to be the bigger power-beads that you wouldn't want to use here.Tim

author: Marco
author_rank: Super Contributor
timestamp: August 27, 2021, 03:02:56 pm
content: I was kinda underestimating what modern chip common mode chokes can do. With chip common mode chokes designed for modern high frequency serial cable transmissions it doesn't seem worth messing around with PCB coupled inductors, with planar cores or otherwise, or self wound chokes.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 27, 2021, 04:09:13 pm
content: Oh right, they make those in just a few hundred ohms, don't they? And if the Zo / winding length is too high (they're made for twisted pair after all) you can always put more in parallel to keep the impedance down.For some reason the 1k+ like CANbus kinds only came to mind?Tim

author: doesi
author_rank: Contributor
timestamp: August 31, 2021, 07:10:16 am
content: I have interesting news!As suggested I spent some time in the lab and tested different diodes. All the Schottky diodes behaved similarly, as an example I attached the scope pictures: Both turn on and turn off were measured using a 50R coax cable with a 450R restistor in series (1:10) and 50R terminated at the scope. In this case, 11A of load current were drawn at 12V output voltage and 61V supply voltage. In the first picture you can see that the voltage goes down to -1.77V in the lowest point and in the second picture it goes down to -1.46V ("up" cursor marks the point where the low side FET is fully turned on, the voltage rise on the right of the cursor is most likely a measurement artefact from zooming into a 61V high step).This is not sufficient for the MIC2127A to operate safely, it died only a short time after saving the pictures. Since no diode was able to clamp the voltage sufficiently, I tried inserting the transducer into the switchnode- and high side gate path (see third picture). In the fourth and fifth pictures you can see that the voltage is clamped to -0.65V and 0.46V respectively, at 6A output current, where the previous designs already showed voltages of about -1.5V. The only downside I can see so far is the extra overshoot generated at the MIC pin but this is most likely due to the unknown parasitics from the loosely wired modifications. So far I am amazed that this even works. In the last picture you can see the circuit I simulated to proof the concept. The next step is to get measurements of the high side gate voltage to make sure that the transducer will not destroy the FET.

author: PartialDischarge
author_rank: Super Contributor
timestamp: August 31, 2021, 08:21:34 am
content: How do you plan to measure the high side? by substracting channels?

author: doesi
author_rank: Contributor
timestamp: August 31, 2021, 09:02:57 am
content: Yes, I am subtracting channels but when you have fast signals with a high common mode voltage it is a challenge: each probe and channel has to be identical, if one cable is just a few cm longer than the other you get a time offset which ruins the result. You also have to average the signal to get rid of the noise. I attached a picture where you can see 4 signals: C1: Switchnode at the MIC2127A, C2: Switchnode at the GaN FET, C3: High side gate Math: averaged high side gate voltage with reference to the switchnode.When the dead time starts, you can see that C2 and C3 sink to ~-3V whereas C1 stays close to zero, which is what I want. Without the transducer, this voltage difference of >2V would be at the high side gate, but the gate voltage stays close to zero, which means that it works. When the switchnode voltage starts rising, it introduces parasitic ringing in the gate circuit. This is due to my poor setup with a manually wound coil on an unknown core. I can reproduce the ringing qualitatively in the simulation by adding parasitics. At this point I can only improve the situation by ordering a new prototype...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 31, 2021, 03:08:29 pm
content: Oh, some ESR may be desirable (in the SW node winding) to limit maximum current, keeping it from drawing too much current in case the low side happens to drop more than Vf. (Kind of a design option, your voltage drop is about low enough not to matter, but it also doesn't take much more, right?)And some resistance in parallel with either winding (or the core itself) is probably an alright way to dampen the ringing. Or an R+C across MIC SW to GND.I wonder what capacitance the MIC's SW pin has; more than just an input, it's got the bootstrap stuff hanging off it. Never seen a spec for that on anything, heh.Tim

author: doesi
author_rank: Contributor
timestamp: September 01, 2021, 07:37:34 am
content: For that reason I have the 2.2R resistor in parallel to the switchnode winding. I prefer the parallel resistor because the voltage across an ESR would be seen by the gate. I guess at this point it is not worth trying to add more passive components because they would only treat the symptoms and not the cause of the ringing: I need a proper redesign where the transducer is inside the PCB. This way the parasitic inductances, where the transducer and resistor is mounted to the PCB at the moment, which I know are quite large, can be reduced. The diode at the switchnode pin is way to big for the job, has more capacity than necessary and it now only carries 1/10 of the load current at most.This means that my next step is to calculate/simulate the pcb traces to get what I want.