Unbuffered Opamp design - Page 1
Forum section: electronics / beginners

author: romhunter
author_rank: Regular Contributor
timestamp: November 20, 2018, 03:23:49 pm
content: Hello, I'm having a homework about designing an unbuffered opamp using the following design (analog IC design):I've been given the following specification:Gain: >2000 V/VVDD: 1.8VVSS: -1.8VGain bandwidth: >5MHzSlew rate: >5V/usPhase margin: >60 degreeOutput swing: plus to minus 1.4VICMR: plus to minus 1VPower: <2mWI have finished designing the first stage, but I'm having a few problem in the second stage. First of all, to increase the slew rate I thought of increasing M6 size (since Id ~ W). It didn't work so I tried increasing the size of M7, which again was a bad choice since increasing it drag the Q point (no signal input point) to -VSS. So I'm kinda stuck there for a bit of time now.Next was the phase margin and UGB. Currently I haven't finished the second stage so I have no idea what to expect. Any help would be appreciate.BTW I'm designing it on LTSpice, using tsmc 180nm process with BSIM3 models. It's just a small project so no biggie, I just need it to work on the simulator, not real chip.

author: xavier60
author_rank: Super Contributor
timestamp: November 20, 2018, 09:55:52 pm
content: I made a small amplifier with MOSFETs and BJTs but works by the same principles.Cc is a Miller integrator capacitor. To change its voltage more quickly you need to decrease its size or increase the bias current of the first stage.

author: David Hess
author_rank: Super Contributor
timestamp: November 21, 2018, 03:15:53 pm
content: Quote from: xavier60 on November 20, 2018, 09:55:52 pmIncreasing the bias current to the differential stage increases the drive current to the Miller integration capacitor to increases the slew rate but also lowers the phase margin so more capacitance is required defeating this method.In order to get around this problem, the transconductance of the first stage can be lowered (Gm reduction). One common and simple way to achieve this is to add source/emitter degeneration resistors to the differential pair so the tail current can be increased without increasing the transconductance or the Miller integration capacitance can be lowered or both.

author: xavier60
author_rank: Super Contributor
timestamp: December 02, 2018, 08:21:54 am
content: Quote from: David Hess on November 21, 2018, 03:15:53 pmAlthough I have seen Emitter degradation resistors, I didn't realize what they did.My project is a X10 power amplifier for my function generator for when higher current is needed mainly for testing inductors and temporary PWM drive for power transistors.Adding 49Ω resistors to the the Emitters of the differential pair made a huge improvement to the achievable speed and stability.I have left it set to 50v/us for now although it can go faster.

author: David Hess
author_rank: Super Contributor
timestamp: December 02, 2018, 01:59:30 pm
content: Quote from: xavier60 on December 02, 2018, 08:21:54 amA good example where emitter degeneration is used is "video" type operational amplifiers and discrete audio amplifiers. You can see the resistors in the LM318 schematic which was the first "fast" operational amplifier. FETs have lower transconductance than bipolar transistors so they have a natural advantage here.The disadvantage is that emitter degeneration adds directly to the input noise so low noise designs use other ways to lower input stage transconductance. National published a great application note on this subject which gets into some of the details:AN-A The Monolithic Operational Amplifier: A Tutorial StudyBob Cordell's book "Designing Audio Power Amplifiers" also has a good discussion.I have not tried it yet in your sort of application but another way to improve performance is to configure a voltage feedback amplifier as a current feedback amplifier as shown below were the output load controls transconductance.