PCB design Rules of thumb. - Page 1
Forum section: electronics / beginners

author: Dave Turner
author_rank: Frequent Contributor
timestamp: August 03, 2014, 10:28:10 pm
content: In the past I've designed through hole boards, wire-wrap etc. but never surface mount.Anything I may do will be hobbyist only therefore up to 5 double sided boards maximum (unless I have a serious brainwave) so I'm looking at hand soldering with a rework station - hot air and iron only - no re-flow oven.I think that 0603 is the smallest component that I can practically work with.So for my actual questions:-a) What separation between components is considered a reasonable minimum? I've read that 50 mil is a standard minimum?b) What is the closest that a component or track should come to the edge of the PCB?c) What advice does the forum have about connecting tracks to solder lands?d) Given that I've specified very low volume hand construction how would your advice change if the expected volume was to on a commercial basis?I'm really looking for rules of thumb rather than erudite treatises.

author: hamster_nz
author_rank: Super Contributor
timestamp: August 03, 2014, 11:20:27 pm
content: I am no expert having made only a dozen or so boards, and no BGA.If you can, use the DRC rules that match your your PCB house - it makes it a lot easier if you feel that the board in't up to scratch. I use Seeed Fusion, and the Eagle rules are herehttp://www.seeedstudio.com/document/rar/SeeedStudio_2layer_DRU_no_angle_20140221.rar) and have not had a problem.Most of my assembly issues are due to too much paste and devices not sitting flush - they work, fine but look ugly. It might be due to me being a cheapskate and using HASL finish, where maybe I could get away with a bit of flux. For pasives I now just put on the smallest blob paste that I can see with my unaided eyes. BTW: Seehttp://dcchapters.ipc.org/assets/pnw/presentations/20030925_Finishes.pdfif you want to know more on the different types of finish.Where I have had problems it has been with the solder mask not being exactly aligned, and exposing a near-by track. This happens mostly if there is a 45 degree bend in a trace to get around a decoupling cap, so I now put the angles a little bit further away from the pad. Once again, the less solder the better.A reflow oven is a fun project. I would even go as far as suggestion getting the cheapest toaster oven you can find (may sure it has a tray), a thermocouple and then you can and control it manual to just bake on the 0603 parts - I find them the least fun to solder by hand.

author: zekin
author_rank: Newbie
timestamp: August 03, 2014, 11:24:04 pm
content: I've only really glanced at it, so I'm not sure if this is covered in it; but Dave L Jones has an older guide on PCB design that might interest you.http://itsp.stab-iitb.org/resource/PCBDesignTutorialRevA.pdf

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 03, 2014, 11:39:35 pm
content: There are a lot more considerations than just those, but for general purposes, I like to do:- Component spacing >= 30 mil (measured from nearest edge of pads); more can be better for probing and hand soldering / rework (think of it this way... if it looks easy to you, by hand and by eye and by iron, it's probably fine with others as well!)- Trace width, spacing: >= 10 mil- Smallest via 12 mil i.d., 25 mil pad- Annular ring >= 10 mil (I usually scale pad o.d. with hole i.d., to give a meaty solder fillet on bigger pins)- Copper (traces, polygons) >= 20 mil from board edge, components >= 30 mil (for best results in automatic placement and test, components and test pads usually have to be even farther in, like 100 mil+)- My preference: start with IPC medium density footprints, then add extra 0.2mm or more pad length in the "soldering iron" direction. So, chip resistors, etc. get a longer footprint (nominal pad inside gap, stretched pad outside length, nominal pad width), gull wing (SOIC, TSSOP, etc.) get the same (but stretched along the pin axis, obviously, not the chip axis), flat type packages (SOD-123F, SOT-89, etc.) get stretched or remain nominal.- DFNs, QFNs and BGAs avoided if at all possible- Track entrance: I've heard it from one assembly expert, keep it symmetrical. This minimizes skew and tombstoning. It's most important on chip components (resistors, etc.), especially small ones. Components with many pads (ICs, etc.) aren't as likely to have this problem (at least, you're unlikely to have a layout where a majority of pads are twisting the part in a bad direction).Basic idea is, since the soldermask is pulled back (usually 3-4 mil) from the pad, the pad is effective wider / longer in the direction of the connection, and tends to pull the component in that direction.Don't worry about it much for 0805+ size components. It's a moderate concern with 0603, and is pretty important on 0402, 0201 and so on.With hand soldering, you have a lot of freedom, since you can hold the part in place with tweezers or a needle and solder it down, without surface tension pulling on it. But you won't lose anything by following DFM (design for manufacturing) guidelines, and if it ever goes into production, you won't have to frustrate your assembler (added costs) then spin the board (even more cost!).- Via in pad: avoid if possible. This is a bigger problem for reflow than for hand soldering, because the vias may wick solder away, and there's only so much solder paste applied to the joint.For hand soldering, you may even use this to your advantage, as you can fill large vias with a lot more solder than copper, and get far better thermal performance. If you want to follow this approach (it's not bad for D/D2PAKs and whatnot), use 20-30 mil i.d. vias, no soldermask tenting, and on the PCB assembly drawing, add the instruction that the vias should partially or fully fill with solder. On your mechanical assembly, allow for some variation in height due to the solder bumping out the back side (e.g., use flexible rubber insulators over thin or rigid types). You can easily sink >10W through the board in this way, whereas a naked board (just heat-spreading polys, no outside heatsinking) will be lucky to do 2W from such a device (and take up much more copper area).- Board thickness 0.062" (1.6mm) unless otherwise required (take your pick, use it to your advantage if you can), copper 1oz for signal level circuitry, 2oz (or even more) for power circuitry. (Mind that heavier copper requires greater width/spacing rules; check with your manufacturer to be sure.) Vias should be plated to half the copper surface thickness.- Generally avoid slots (plated or not), castellated holes/pads (i.e., elements on the edge that get routed through in a later step to create edge connections) and non-PTH holes. Sometimes you'll get them, sometimes you won't, but they usually add extra steps (and cost), or may not be available for a "proto" run. Better to avoid just in case, to be sure you're getting something closer to what you wanted. Then, you have something easier to produce, and if you still don't like it, you can add the fancy features later (and, talk with your manufacturer to see what they're capable of, and at what cost).Idunno, was this a treatise? It's still rules of thumb... though more than just a few... and often with more explanations than fit on most thumbs... If it's still too erudite, feel free to ignore...Tim

author: Dave Turner
author_rank: Frequent Contributor
timestamp: August 04, 2014, 11:36:46 am
content: Thank you all. I had read Dave's 'booklet'.T3sl4co1l I'm aware that the subject is nigh on endless especially if considering higher frequencies. I've read a number of reports but couldn't find much in the way of basic rules as a starting point. Hence my questions nicely answered by yourself.