Design advice: Clock/pulse generator output circuit - Page 1
Forum section: electronics / projects

author: ProtonFox
author_rank: Contributor
timestamp: March 27, 2024, 10:39:24 am
content: Hi, I'm currently designing a simple clock generator using an STM32 and an Si5351. I actually don't really want to spend months on this project; this is why I chose parts I had laying around and could wire together on a breadboard. I managed to have a decent prototype which I am happy with. I only plan to use this project to have a somehow accurate clock generator to drive more elaborate pulse generators, test some RF mixers, trigger oscilloscopes, and testing digital circuits where my function generators are simply too slow. As a bonus having three independent outputs should be more than enough to cover my needs. Doesn't seem to be a big deal, right ?That's all for the context! Now comes the part I need some advice. I want my outputs to be amplified and/or buffered so my device would have the standard 50outputs and some level adjustment features. Nothing really fancy or accurate, maybe 1V, 3.3V and 5V peak-peak.Here are the different solutions I had in mind:1. use a broadband (DC to ~300 MHz or more) op-amp based circuit to perform this function. As some gain will be needed the op-amp GBW would be even higher. I first thought about this solution because I originally wanted to have a continuously adjustable level, but how to perform that? Not digital potentiometers (their bandwidth is not high enough), I would probably try to use a JFET as a voltage controlled resistor.2. If I don't want to go fancy and use 2 or 3 fixed output levels, I would use some high speed logic gates to route the clock signals through different resistive attenuators. The result would be sent into a buffer/amplifier circuit (from solution 1 maybe). Looks probably easier to implement, but I'm concerned about gates output impedances and the extra propagation delays.3. use the clock signal to drive a switching circuit, built from MOSFETs or an analog multiplexer. The switching circuit would "chop" a continuous voltage (which is easy to adjust) thus the output level would be adjustable. Problem: I haven't find yet an analog multiplexer fast enough with a small parasitic resistance. Maybe the discrete MOSFET solution would be enough (did some quick simulation tests with a 2N7002A with promising results ... but I need to have a P-channel complementary to have a true switch).I'm also open for new ideas, that's also the reason I'm posting here today. So... in your opinion, what would be the best option or which downsides I haven't think of?Finally, here are the specifications I try to achieve:- output frequency: 10 kHz (if needed I'm ready to start at 100kHz or even 1MHz) to 100 MHz (I can accept to go a bit lower, such as 80 or even 60 MHz if the signal gets to distorted).- rise/fall times: less than 4ns. According to the Si5351 datasheet (okay... some people say it's not always reliable) I should have rise/fall times less than 1.5ns, but it looks like it will be difficult to gain some extra nanoseconds.- output impedance: 50Thanks in advance!

author: shapirus
author_rank: Super Contributor
timestamp: March 27, 2024, 10:57:36 am
content: Quote from: ProtonFox on March 27, 2024, 10:39:24 amWell, a possible candidate may be currently discussed right there in the neighboring topic:SN74LVC1G3157. Fast (sub-ns), but only SPDT. You could cascade a few, though, if you need to switch between more than two outputs.

author: ProtonFox
author_rank: Contributor
timestamp: March 27, 2024, 01:00:29 pm
content: Oh, that part looks like a good candidate for this function! It also seem to be dirt cheap and readily available.To be honest I don't care about switching between several outputs, because I plan every clock output to have its independant analog output stage, so having a SPDT switch is not a problem.

author: MasterT
author_rank: Frequent Contributor
timestamp: March 27, 2024, 01:42:57 pm
content: I 'd think about option 3 "in reverse", when not to use analog switches (high calacitance) but "clip" output waveform to adjustable high / low level using RF or schottky diodes.

author: ProtonFox
author_rank: Contributor
timestamp: March 27, 2024, 02:04:03 pm
content: That's a smart idea. Obviously I'd drive this clipping circuit with an amplified signal so I can have my 5V output level, but this seems feasible. It is also easier to simulate (no "black box" or encrypted models from TI I can't use) so I can try this out quickly.

author: ProtonFox
author_rank: Contributor
timestamp: March 28, 2024, 10:23:06 am
content: Okay, so after playing around with NgSpice testing these two solutions, here are my conclusions:Using an analog switch such as the suggested SN74LVC1G3157 could work if capacitance between inputs and outputs is kept in the order of tens of pF. This needs to be taken carefully though, because I got these results from a really crude model (a switch with internal on resistance in parallel with a parasitic capacitance) because I could not get an actual model of the IC.Trying to clip the output works as long as the diode threshold voltage is low enough and parasitic capacitance is negligible, which is actually pretty easy with RF schottky diodes. I managed to get an output range of 0.8V to 5V, open-circuited output, assuming a 5V output square wave from an amplifier. That level tuning is not linear but it was expected with diodes. Output seems to be more distorted especially at lower levels when adding a properly terminated transmission line.I didn't do some serious engineering, I did that mostly to figure out which idea works the best. I'm rather happy with the two options, so now what do I plan ?From a design perspective, the diode clipper is a bit more complicated to design and expensive to build: the clock signal needs to be amplified, the tuning voltage needs to be generated whether by fixed preset values or a DAC, and of course the diode clipping circuit. The analog switch circuit would need directly driven by the clock signal and chop the output of a DAC (with some proper filtering/decoupling circuits of course).To be fair, I want to prototype the analog switch circuit because I want to see how well they perform at high frequencies. If I can get interesting results from them, it would be something interesting for RF projects, for example. If I'm not happy with the result, I'd spend more time designing a proper diode clipping circuit afterwards.Sounds like it's gonna be a longer journey than I thought, after all.

author: shapirus
author_rank: Super Contributor
timestamp: March 28, 2024, 10:55:25 am
content: How do you implement variable level with diode clipping?

author: ch_scr
author_rank: Frequent Contributor
timestamp: March 28, 2024, 11:01:16 am
content: You could get the continuously variable output level with a logic gate (buffer or inverter) supplied from a variable voltage.It's output impedance might change with supply level, but tiny gates (single inverter like 74lvc1g04) can tolerate higher drive than the supply no problem.This in combination with (analog switch selected) attenuators could give a wide range of continuously variable output levels. Maybe no need to chain the analog switches, then.Don't think the gate delay is of much relevance here? To drive transmission lines, you want a good match to 50R to make the square edges look clean.This can be done by always having some minimal attenuation to improve match.

author: David Hess
author_rank: Super Contributor
timestamp: March 28, 2024, 11:40:14 am
content: Quote from: ProtonFox on March 27, 2024, 10:39:24 amInstead of MOSFETs and voltage switching, use bipolar transistors and current switching, or fast diodes and current switching. The output level is then set by the easy to control DC current source driving the emitters of the differential pair, or driving the diodes.

author: ProtonFox
author_rank: Contributor
timestamp: March 28, 2024, 01:49:53 pm
content: Thanks for the other suggestions ch_scr and David Hess,Quote from: shapirus on March 28, 2024, 10:55:25 amIt's actually pretty easy to have a basic variable diode clipping by changing the reverse bias of a diode. I attached the schematic I made to test this idea, which was probably what MasterT had in mind.Quote from: ch_scr on March 28, 2024, 11:01:16 amWell, that's basically what the analog switch circuit does, except it is one of the inputs of the switch which is supplied by a variable voltage.Quote from: ch_scr on March 28, 2024, 11:01:16 amThat's true, one of my biggest priority is to have a nice 50match to avoid reflection problems and stuff. I'm concerned about having a nice, controlled output impedance. Output impedance of logic gates is almost never mentionned in datasheet, as they seem to be targeted to digital engineers; parasitic resistance of analog switches is given but I don't know if it is actually consistent between batches or even chips themselves. But having some attenuation at the output might be a way to be more confident about output matching.Quote from: David Hess on March 28, 2024, 11:40:14 amThat's an interesting approach, it also looks like it was used in some pulse generators such as the Philips PM5715, which I borrowed the idea of chained attenuators in the output circuit. I may try it too.

author: fourfathom
author_rank: Super Contributor
timestamp: March 28, 2024, 04:48:33 pm
content: Here's the output stage I did for a triple-output Si5351 design. I wanted 0-3.3V open circuit output, and 50 Ohm output resistance (0-1.6V output when terminated). This design also has selectable AC-coupling on the output. This schematic shows two buffers, this lets me use two different footprints depending on which package is available. I do *not* install both parts.The frequency response is reasonably good up to 100 MHz. In the KHz range there is a bit of droop caused by the ferrite choke in the supply line, but the 10uF bypass cap works well enough here.

author: shapirus
author_rank: Super Contributor
timestamp: March 28, 2024, 05:28:43 pm
content: What's that AQY2B25X part? Is there a typo? Google returns literally nothing when doing exact match search.(it's clear that it's some optical switch, I wanted to find its datasheet)

author: fourfathom
author_rank: Super Contributor
timestamp: March 28, 2024, 06:54:01 pm
content: Quote from: shapirus on March 28, 2024, 05:28:43 pmThat an AQY282SX from Panasonic (the schematic text is hard to read). They call it a "PhotoMOS Relay". There are a few variants, some with higher on-resistance and lower capacitance (I use these in High-Z circuits) The one here has a lower on-resistance and of higher in/out capacitance (which doesn't matter here). The isolation voltage is 1500V and the switch max voltage is 60V or better. Useful parts and LCSC usually has them in stock!

author: PCB.Wiz
author_rank: Super Contributor
timestamp: March 28, 2024, 09:45:34 pm
content: Quote from: ProtonFox on March 27, 2024, 10:39:24 amThat's looking the best approach.It is a trade off, and there are many Analog Switches that head into sub-ohms territory, but they have large capacitance.When looking into this trade-off not long ago, I found the USB switches were good at reasonably low resistance without killer parasitics.Most are 3v3, so I'd suggest a LVC buffer pair as above for a fastest / dedicated 5V output, and then USB switches like Toshiba TC7USB40FT or TC7USB42FT in TSSOP14 etc for your adjustable outputTC7USB40FT claimSupply voltage: VCC = 2.3 to 4.3 VSwitch terminal ON-capacitance: CI/O = 5 pF Switch ON (typ.) @VCC = 3.3 VON-resistance: RON = 4.5 Ω (typ.) @VCC = 3 V, VIS = 0 VRON flatness: RON(flat) = 1.3 Ω (typ.)@VCC = 3 VBW RT = 50 Ω, CL = 0 pF, 1500MHzOr parts like NX3DV221 come in XQFN10 HVSON10, which claim 5.5V analog levels,6 Ohms (maximum) ON resistance6 pF (typical) ON-state capacitanceHigh bandwidth (1.0 GHz typical)That x221 series looks to be multi sourced, and claims a charge pump so they can use a single N-FET for lower parasitic C.I did not see typical changeover times, so you may need to experiment.Addit: I see the OnSemi FSUSB42MUX looks a good fit. Specs typical ton/toff of 12,13ns (3V) so has low skew, and is 3.9 Ohms, 3.7pF, 720MHzRECOMMENDED OPERATING CONDITIONS VCC Supply Voltage 2.4 ~ 4.4 V VSW Switch I/O Voltage −0.5 ~ 4.5 VAnother candidate would be 74CB3Q3257PW - has higher Con, but does spec a faster sel tpd so you could try that to see what bites first : Con or Tpd ?It looks to run the charge pump all the time, other parts gate the charge pump on OE. It also specs 5V Analog path switch from 3v3 VccQuoteYou should be able to have the full Si5351A register range, ~3kHz to ~225 MHz

author: David Hess
author_rank: Super Contributor
timestamp: March 29, 2024, 12:36:03 am
content: Quote from: ProtonFox on March 28, 2024, 01:49:53 pmTektronix used it on most of their pulse generators. They used the diode version for vertical channel switching in oscilloscopes which gives some idea of the potential performance.

author: ProtonFox
author_rank: Contributor
timestamp: March 29, 2024, 11:04:12 am
content: Didn't expect so many replies, thanks everyone. It's good to know many approaches as I struggled finding interesting solutions when doing my research.I don't think I can achieve an adjustable output level using your method fourfathom, but maybe I'll borrow your schematic if I can't reach this goal. I sometimes wonder if it's actually worth the hassle to have an adjustable output anyway. Well, TTL high level is 5V so 3.3V may be a bit too low. On the other hand I don't want to fry low voltage CMOS circuits (even if I'm more of an analog/RF guy so I don't encounter that kind of stuff very often). So I'll keep trying to have a somewhat working adjustable level, even if the level range is narrow nor accurate.Right now I'm still on the analog switch method (schematic attached) using SN74LVC1G3157 but I may look at the references suggested by PCB.Wiz. By the way, will the switch mess up the op-amps output or something like that?Quote from: David Hess on March 29, 2024, 12:36:03 amHave you got any schematic? I don't know Tektronix products very well apart from their oscilloscopes so I don't know where to search.Edit: nevermind, I found everything I needed on TekWiki.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: March 29, 2024, 07:27:00 pm
content: Quote from: ProtonFox on March 29, 2024, 11:04:12 amYes, the opamp output impedance increases with frequency, whilst you need a very low impedance source up to 100's MHz.The LM324 is a also a bit light for current source, if you want full swing at low frequencies, the peak current needs to come from the driver.The LM324 will also not do rail-rail output, but you may be ok with less ?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: March 31, 2024, 12:04:48 am
content: Quote from: ProtonFox on March 29, 2024, 11:04:12 amIt's an interesting problem, so I did a quick check.You are basically building a programmable power supply, that needs to tolerate large transient load swings, say 5-50mAThe LM324 fails in at least 3 areas - current is too low, and it is not Rail to Rail IOa) You can get opamps with enough drive, but they need decoupling capacitance on the regulated rail, so you need high-C-load R/R/C type output design.b) A discrete NPN diff + PNP output works quite well, the gain is low enough it can be stable at uF loads. The single large C-Load gives a single pole.However, the simplest design only works down to ~ 700mV.A change to PNP Diff + Current Mirrors + PNP output managed close to GND~4.2V input, thus a gain of 1.25 can give 5V output swing from 4V input.After the range is expanded, you are up to 3 matched pairs SOT26 and a PNP, so the BOM creep here probably make this less attractive.c) Since you have a DAC, small adjustable LDOs could be used instead.They are designed and spec'd for ADJ power, and are single package and cheap.The better ones are spec'd for fast transient response, tho you have one-per output so are more tolerant of load step response.

author: ProtonFox
author_rank: Contributor
timestamp: March 31, 2024, 08:31:29 am
content: Ah yes, did not think about the transient currents which can be quite high in this case. I first used the LM358/LM324 because I assumed it would be able to deliver enough DC current and I actually don't care about the accuracy of my levels, so I thought I could just slap a jellybean op-amp. Also turns out that it's on the "sensitive path" of fast transients.It doesn't look like it's worth using better op-amps to perform this function, so I'm gonna dig further the idea of the simple discrete BJT output circuit. I don't want my output level range ot be wide nor accurate; I'll use a more sophisticated pulse generator (I do have one already) driven by this circuit if I have special needs anyway. If I can achieve some control between ~1V up to 5V, mostly to cover most basic needs in the lab. I could maybe even ditch the DAC and use a more minimalistic approach, but this will be determined later.I don't know much about LDOs and I'm kind of concerned about their output impedance/capacitance at high frequencies.

author: ProtonFox
author_rank: Contributor
timestamp: March 31, 2024, 09:44:57 am
content: Thinking more about how I'm going to use this project and how much time I actually want to spend working on it, I begin to believe it's a bit overkill to make an elaborate output circuit with an adjustable output level. Especially if I don't want it to be really accurate or having a wide output level range. I'll mostly use 2, maybe 3 outputs levels anyway. So this brings back the option 2 from my first post.I'd prefer to have two buffers, let's say one that can output 3.3V and one that can output 5V. Their outputs would go into an analog switch and route the buffered/amplified signal to a BNC output (well, through a series resistance for output impedance matching). I'll then focus on designing a proper output stage without having to bear the hassle of having more design considerations. Even routing the signals properly, selecting the best components to perform this function, won't be trivial.I'll see if I need a more complicated output stage in the future; all your design ideas will still be useful, especially to other people building pulse generators. That's the beauty of forums.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: March 31, 2024, 09:20:14 pm
content: Quote from: ProtonFox on March 31, 2024, 08:31:29 amI looked into a simple level shift + modest gain, applied to a NPN diff + PNP BJT design and it is likely 'good enough'.It is well behaved with impulse current loads, and output impedance about 0.4 ohms.Gives 123.43mV to 4.912V OUT range DC average. You can see the ripple increases at the extremes as it hits saturation.Quote from: ProtonFox on March 31, 2024, 08:31:29 amA benefit of a well behaved BJT design, is you get clean edges on the square wave, so you can use it to check impulse ringing on equipment.LDOs tend to have some impulse spikes, as their lower output impedance eventually corrects.With 3 outputs from Si5351A, you could have buffers as one fixed at 5V, one fixed at 3v3, and one adjustable.

author: fourfathom
author_rank: Super Contributor
timestamp: April 01, 2024, 12:32:06 am
content: Since you want a square-wave output, is there any reason not to use the NL27WZ17, as I showed a few posts above, or the similar-performance SN74LVC2G04 Dual Inverter Gate? Feed the Vdd pin from a variable or selectable voltage (1.8V to 5V) and you get the square-wave amplitude you want. Add a series resistor to establish the 50 Ohm output impedance (I paralleled two buffers and output resistors to reduce the effect that any gate impedance variability had on output Z. I assume that the gate output Z will vary somewhat with Vdd, but unless you need high precision a compromise resistor value should work.If you are driving the gate directly from the 3.3V Si5351 output you will want to add a buffer / translator to jack that signal level up to +5V before driving the NL27WZ17 (if that will be operating at +5V). The NL27WZ17 can accept +5V logic-level inputs even when running at Vdd = 1.6V.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: April 01, 2024, 02:19:17 am
content: Quote from: fourfathom on April 01, 2024, 12:32:06 amYes, that can work for higher fixed supplies. As you mention, the lower Vcc drops the drive.An Analog Switch generated square wave does not suffer from drive droop at lower voltage, meaning it can work < 2V and even <1VQuote from: fourfathom on April 01, 2024, 12:32:06 amA purist might use a 'T' translating device for split Vcc work, but some vendors (Diodes,Nexperia) do offer a 74LVC2G34, that specs VIH of 2V at 3.6V Vcc, (55.5%) rather than the lazier 70% from decades ago.That shifted threshold translates to 2.85V max, on a 5V operating part.

author: ProtonFox
author_rank: Contributor
timestamp: April 03, 2024, 08:31:51 pm
content: Sorry for the late reply, I didn't had time to reply or work on this project.QuoteI'm not a fan of this method because I don't find it really proper. Output impedance and slew rates tend to vary quite drastically when changing the supply voltage of these chips as you said.After some additional thinking, I decided to give a last chance to the analog switch method by setting up a more serious simulation. Moreover PCB.Wiz gave some useful hints I want to try, and I'm not against a little transistor circuit design exercise.I'll show results in the next days if I can achieve something nice from it. Otherwise I'll just go back to the simplified design.

author: shapirus
author_rank: Super Contributor
timestamp: April 03, 2024, 09:18:21 pm
content: Quote from: ProtonFox on April 03, 2024, 08:31:51 pmSlew rates, maybe. Output impedance... I wouldn't be so sure before testing it in actual hardware.

author: fourfathom
author_rank: Super Contributor
timestamp: April 03, 2024, 11:29:39 pm
content: Quote from: shapirus on April 03, 2024, 09:18:21 pmCould be, on the output impedance. The specs show VoH and VoL vs load current, which I am using as an indicator of output impedance (and it matches up reasonably well with my measurements), and this does vary with supply voltage. I've only used this method with a fixed 3.3V supply so I've never checked it with varying voltages. One thing I did was to drive multiple buffers in parallel (each with their own output series resistor). This reduced the effect of variable buffer output impedance, as the fixed resistors dominated.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: April 03, 2024, 11:47:54 pm
content: Yes, buffers and parallel buffers will work ok for 3v3 and 5V, but the OP wanted to reduce power supply over a wider range.Down at 1V ballparks a simple buffer will run out of gate drive, but a SPDT Analog Switch, which uses the full logic supply for the mosfet transmission gates, will be fine down to 0V.

author: fourfathom
author_rank: Super Contributor
timestamp: April 04, 2024, 12:39:44 am
content: Quote from: PCB.Wiz on April 03, 2024, 11:47:54 pmAgreed! In my defense, the original requirements were a bit flexible.

author: shapirus
author_rank: Super Contributor
timestamp: April 04, 2024, 10:03:14 am
content: Quote from: fourfathom on April 03, 2024, 11:29:39 pmAnd I actually measured it, but at a fixed 5V: for a few SN74LVC1G04 in SOT-23-5 it was ~12-12.5 Ohm, which turned out to be ~30% higher than the value which could be derived from the datasheet IIRC.That's actually interesting, I think I have some soldered to a breakout adapter board, maybe will test again with a varying voltage when I have time.

author: ProtonFox
author_rank: Contributor
timestamp: April 04, 2024, 08:10:14 pm
content: I see there is a little debate regarding the output impedance. Never measured it IRL in fact, that's what I saw in the datasheets. I'd be interested as well to see the actual measurements, if someone does this. I'm away from my lab for a few months (hence my extra time for simulations) and apart from generic, slower and older CMOS/TTL inverters I don't have comparable parts yet.Going back to my main subject, I'd like to have your opinion on my simulation model." alt="" class="bbc_img" />I redrew the concept of my behavioral model of the switch on KiCad so it looks less messy. I took the NX3DV221 switch as a reference, which claims to have a maximum 6ON resistance and a parasitic capacitance of around 5-6 pF parasitic capacitance which actually varies between the state. It is not as accurate as an actual model, but it can allow me to have a rough idea of the part's flaws. Is this circuit not too far from the reality ? I used this Analog Device's application note:https://www.analog.com/media/en/training-seminars/tutorials/MT-088.pdfto be sure about the parasitic elements but it's only about SPST switches." alt="" class="bbc_img" />This is a simplified schematic of how I wired the switch, where it should switch between the adjustable voltage and 0V. The actual simulation schematic is attached for information. The 2 ports subcircuit is the transistor voltage regulator circuit I borrowed from PCB.Wiz. Don't pay too much attention to the filtering cap; I just slapped it without calculation, but I know a combination of capacitors will be needed so the ripple is kept low enough on both high and low frequencies. It gave somewhat acceptable results on the simulation anyway." alt="" class="bbc_img" />And finally, here are the simulation results. It looks decent but has some little quirks. As you can see the risetime is pretty fast so it seems to perform well, but the falltime is longer, just as if parasitic capacitance take longer time to discharge. It's still within my specifications (~ 2 ns) but I wonder if something's wrong with my model.Edit: damnit, how do you add pictures?

author: ProtonFox
author_rank: Contributor
timestamp: April 04, 2024, 08:15:57 pm
content: Pictures attached, as my previous post didn't turned out how I expected.

author: ProtonFox
author_rank: Contributor
timestamp: April 11, 2024, 05:14:01 pm
content: I continued to work and experiment with this simulation.I added some slight parasitic elements to the switch's model : bonding wires inductance and leakage currents. Did not change anything apart from slight overshoots/ringing, but I may have overistimated these parasitic elements so I'd take them with a grain of salt.I checked the current waveform at SUB2's output (the voltage regulator), I get ~60 mA spikes when the load is matched and output at max level.I'm now working at making a proper filter between the voltage regulator and the switch, and taking passive component's flaws at high frequencies, capacitors Q factors and such. It's a bit of work, I fell into the rabbit hole of capacitors dielectrics, and came to the conclusion I needed C0G / NP0 capacitors. Afterwards, I had enough information to model a somewhat realistic capacitor.When playing around with this filter, I tried to add some kind of RF choke (a somewhat high value inductor) between the voltage regulator output and the filtering capacitor. The results were almost identical, so no problem. Maybe using a programmable LDO to perform this function is not that bad, after all. They would at a first glance fit well this purpose.