Learning project with SFP - Page 1
Forum section: electronics / general

author: ajar171
author_rank: Regular Contributor
timestamp: June 08, 2025, 06:45:37 am
content: Hi everyone,I am using FPGAs somewhat regularly for low-ish speed (100MHz max), but real-time tasks in industrial stuff (encoder interfacing, TFT display driver, etc.) and would like to try myself with something faster.I have some 1Gb/s fiber-optic SFP modules lying around, and was thinking about designing a simple board with an SFP cage and an affordable FPGA, so they can talk to each otherNow my question is, which FPGA to choose for this purpose (I have experience with Gowin and Xilinx)? It should be hand solderable (so no BGA, Xilinx is already out) and somewhat affordable, this is just a project for learning something new, I don’t want to spend a fortune on it. MachXO3 looks like a good candidate, but the serdes IP is not free?If I understand SFP correctly, LVDS with series 100nF capacitors is enough to use it?Again, this is not a student project or anything work related, I just want to learn something new

author: asmi
author_rank: Super Contributor
timestamp: June 08, 2025, 04:21:10 pm
content: No BGA == no high speed. Sorry. Welcome to the real world.

author: ajar171
author_rank: Regular Contributor
timestamp: June 08, 2025, 07:01:29 pm
content: Yes, I know, was just hoping for a different answer.Spending the last 20 years with industrial electronics really made me lazy I guess...I just don't really trust myself of soldering a BGA chip. I am more than happy to solder 0402 parts, but BGA, I don't know...Maybe I will go the module route.What is the minimum speed needed to the have reliable clock recovery of a 1-1.25Gb/s serial signal? I know, that I need multiple times oversampling to recover the clock. What I don't understand from the datasheet of the FPGA, if it is able to recover the clock of the maximum RX LVDS speed? As example the Gowin GW5A has a maximum LVDS RX speed of 1.6Gb/s, but can it also recover the clock of that signal (same question for the Xilinx parts)?Am I correct with the assumption, that if I choose a Xilinx FPGA, I will need at least an Artix7 part?

author: asmi
author_rank: Super Contributor
timestamp: June 09, 2025, 03:00:22 am
content: Quote from: ajar171 on June 08, 2025, 07:01:29 pmSoldering BGA is fairly easy unless it's 1) super-large, or 2) has fine-pitch balls (0.5 mm and below). All you need is a hot air gun and a little bit of practice. Reflow oven is even better, but not strictly required.Using modules is also a good way, but you will have to deal with compromises that brings about, and some module manufacturers have taken up the Apple's handbook when it comes to upgraded memory - so might end up over-paying for solution compared to a single-board design, and also often these modules contains some peripherals which you may or may not need for a particular project.Quote from: ajar171 on June 08, 2025, 07:01:29 pmTake a look at Xilinx appnote XAPP523, it explains how to receive 1.25 Gbps stream using two phase-shifted 625 MHz clocks + their inverted versions and 4 flip flops. Basically each of those flip-flops is clocked by different variation of the clock (0°, 45°, 90°, 135°), so that you can find the best sampling point among those four samples.

author: ajar171
author_rank: Regular Contributor
timestamp: June 09, 2025, 06:26:04 am
content: Thank you so much!Now I have to do some reading first, then do some PCB and HDL designing. I really hope, that it is possible to simulate this in Vivado

author: ajar171
author_rank: Regular Contributor
timestamp: June 10, 2025, 07:34:41 am
content: I did not expect this rabbit hole to be this deep (and expensive).Had the idea of checking the design with an external serdes chip from TI (to save some money on the FPGA) that also does the K28.5 synchronization on it own (TLK1221) on the RX side. This way the humble Gowin FPGA only has to do the 8b10b encoding/decoding, some buffering and a simple state machine. Now it is already on the limit of meeting timing at the full bandwidth and the HDL design is not even close to be finished.The Artix-7 chips in a “friendly” BGA package don’t have any GTPsSmall Spartan-7 in an FTGB196 package are of course not available from Mouser (XC7S50 being the smallest on stock)Edit: the Spartan-7 speedgrade 2 should be able to do the serdes and is available at Farnell and costs the same as the Gowin chip

author: asmi
author_rank: Super Contributor
timestamp: June 10, 2025, 01:38:59 pm
content: Quote from: ajar171 on June 10, 2025, 07:34:41 amWell there are CSG325 packages, which are perfectly suitable for hand soldering at 0.8 mm pitch, and even FGG484, which has more IO and larger 1 mm pitch.Quote from: ajar171 on June 10, 2025, 07:34:41 amYeah, any 7 series device with speed grade of 2 and above should be able to deal with 1.25 Gbps stream on any of it's differential pairs. XAPP523 I mentioned above comes with a source code which can be integrated into your project. The question is - what are you going to do with all that data? If you need to buffer it, you will likely need some kind of external memory, because there isn't much of internal one in those devices.