Proportional LED Ring Driver Circuit (Op-Amp Configuration & Current Control) - Page 1
Forum section: electronics / projects

author: DigitalDesigner
author_rank: Contributor
timestamp: May 11, 2025, 02:47:06 am
content: Hi all,I've designed the attached circuit to drive an 8-LED ring light for a microscope application.It is not for classic dimming but for an experimental setup for optical lab experiments. It is to replicate a fully analogue input signal optically (for video analysis of exposed samples), it is not digital-type signal like PWM. And accuracy of input voltage to LED intensity is very important, that is the whole point of this circuit.And the goal is for the LED brightness to track an input signal that ranges from 5 Hz to 18.5 kHz.The design requirement is for each LED to conduct 3 mA at the minimum input signal, and up to 10 mA at the maximum.The PCB only provides a 3.3V supply.The 8 LEDs are in parallel, each with a typical forward voltage of 3V. It is for low volumes so we can ensure the voltage drop is 3V max.Could someone please let me know:1. Is the op-amp configuration and gain correctly implemented for this application and the wide frequency range?2. Given the 3.3V rail and the 3V forward voltage at 10 mA, are the current-sense and LED resistors sized appropriately?3. Are there any concerns regarding voltage headroom or linearity at higher currents?Thanks in advance for your help!

author: Whales
author_rank: Super Contributor
timestamp: May 11, 2025, 08:45:01 am
content: Can you provide more information about the input signal? What is its shape? (And why are you using variable frequency to control dimming?)

author: DigitalDesigner
author_rank: Contributor
timestamp: May 11, 2025, 05:00:56 pm
content: The input signal is a complex always-changing (i.e. non-repetitive) AC waveform with a peak voltage of 5V.It is not to control the light intensity for dimming purposes but to replicate the input signal in optically for video analysis of exposed samples (I just updated the OP).Thank you

author: PCB.Wiz
author_rank: Super Contributor
timestamp: May 11, 2025, 07:53:45 pm
content: Quote from: DigitalDesigner on May 11, 2025, 02:47:06 am10mA at 10 ohms is not 140mV ?How important is even illumination? The current is not high, but the headroom at 3v3 is quite lowDid you measure a set of candidate LEDS to get a VF spread ?The data often gives (eg) 2.6-3.2V @ 5mA , but they will mark reels with a BIN code, so parts from the same reel are better matched.If the spread is too large, you may need a current regulator per LED.

author: DigitalDesigner
author_rank: Contributor
timestamp: May 12, 2025, 09:23:00 pm
content: Yes I measured a set of LEDs and for the units I'm making I can select the LEDs by hand to make sure they are as close as possible to 3V.I was wondering if there was anything incorrect in the circuit itself. Any feedback or improvement suggestions in general?Many thanks

author: PCB.Wiz
author_rank: Super Contributor
timestamp: May 12, 2025, 09:43:05 pm
content: Quote from: DigitalDesigner on May 12, 2025, 09:23:00 pmIf you want accurate pulse following, with less ringing, you may need some bypass feedback from the opamp output.Example :https://blog.mbedded.ninja/_astro/lt1492-voltage-controlled-current-sink.BkHs07pG.png

author: DigitalDesigner
author_rank: Contributor
timestamp: May 13, 2025, 02:19:03 am
content: My analog background is not that great, so when I read "pulse following" I think of square waves. Is that what you meant?The signal is actually much more similar to audio/music than pulses. Does that still apply? If so how do I calculate the Rs and C values?Thank you

author: PCB.Wiz
author_rank: Super Contributor
timestamp: May 13, 2025, 03:33:30 am
content: Quote from: DigitalDesigner on May 13, 2025, 02:19:03 amYou can use Spice to get a feel and then use a scope to get best settling on a test square wave.Using the circuit I linked above and a generic opamp like 6002 with a moderate 2nC/170mO PMOS, gives 100/1k/56pF for good pulse shape.Rise time ~ 500ns and overshoot ~ 1%

author: DigitalDesigner
author_rank: Contributor
timestamp: May 13, 2025, 04:30:11 am
content: I updated the schematic (attached here) as per your suggestion by adding R48, R49 and C29.Is that correct that way or do R43 and R44 also affect the values you suggested?Thank you

author: PCB.Wiz
author_rank: Super Contributor
timestamp: May 13, 2025, 05:16:32 am
content: Quote from: DigitalDesigner on May 13, 2025, 04:30:11 amYou can also do this with one opamp, as the offset error is set by the first opamp anyway. Two just complicates things more.Instead of x10 on the sense, you divide the Vin by 10Using a lower offset opamp can reduce the zero-offset effect.

author: DigitalDesigner
author_rank: Contributor
timestamp: May 13, 2025, 05:58:17 am
content: Like in the (attached) updated schematic (i.e. exactly like your previously shared screenshot)?The reason why I added the second op-amp was because I thought the voltage across Rsense was too low at 50mA. Is there no advantage whatsoever to have the second opamp as in my original schematic?Finally, in some scenarios, I might need to turn the LEDs off even if there is input signal. I added a pulldown mosfet at the opamp input and a high-value series resistor R55 in front of it to minimise the current when shorted to GND. Just a couple of questions about this part of the circuit:1. does that R55 value affect the op-amp/circuit performance?2. If so how do I choose its value appropriately?Thank you again for all the feedback.

author: PCB.Wiz
author_rank: Super Contributor
timestamp: May 13, 2025, 09:09:05 am
content: Quote from: DigitalDesigner on May 13, 2025, 05:58:17 amNot really, in fact extra gain there is a problem, not an asset, and the offset error occurs at the lowest voltage node anywayQuote from: DigitalDesigner on May 13, 2025, 05:58:17 amYou do not need R55 at all, the sub 1 Ohm mosfet will easily pull down the input signal.You do not want too high an impedance driving the FET clamp as the FET capacitance will act as a roll off.A 10k source gives roughly 1us rise time, with a 200mO FET, that's ok for your 8KHzA 1 Ohm fet clamping a 10k source, will reduce 1volt swing to 100uV

author: DigitalDesigner
author_rank: Contributor
timestamp: May 13, 2025, 09:15:46 am
content: Thank you @PCB.Wiz

author: ajb
author_rank: Super Contributor
timestamp: May 13, 2025, 03:01:21 pm
content: Quote from: PCB.Wiz on May 13, 2025, 09:09:05 amIn addition, high impedance at the drain can allow a fast rise time at the gate to be coupled into the clamped node via the FET's reverse transfer capacitance. This can cause the input signal -- and therefore current -- to *increase* briefly before it's shut down, as the Crss-coupled pulse intersects with the decreasing resistance of the FET channel.

author: DigitalDesigner
author_rank: Contributor
timestamp: May 13, 2025, 08:22:08 pm
content: Thank you ajb