Keeping signal up for some time - Page 1
Forum section: electronics / projects

author: Oaklander
author_rank: Regular Contributor
timestamp: April 17, 2017, 03:37:16 pm
content: I want to achieve what I have illustrated in the picture. Horizontal division is 50µs and vertical 2V.My circuit will receive signal shown in green and blue is what I want as output. When the input signal rises above certain level (shown in red) I want digital output to go high and stay there for some time regardless of the input signal level. Output should stay high for a millisecond or so. The response time needs to be very fast and consistent.I'm not exactly sure how to do this. I've thought of using a comparator but I clearly need some additional circuitry but I have no idea what would be the right approach. Any thoughts?

author: FlyingHacker
author_rank: Frequent Contributor
timestamp: April 17, 2017, 03:47:54 pm
content: Search here and google for Peak Detector.W2AEW has a good video or two on Peak Detectors on YouTube. They are pretty straightforward to build.If you need it really squared off then a Peak detector into a Schmitt Trigger might be one method.Alternately, perhaps all you need is a monotstable multivibrator. This could be as simple as a 555 timer in "one shot" mode.Compare and contrast those two options to see which one will suit your needs. It may actually be the latter.

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 04:31:41 pm
content: easy way is a comparator, with a diode connected so that once the output goes high, it latches. pencil and paper and 10 minutes should get you close.

author: Ian.M
author_rank: Super Contributor
timestamp: April 17, 2017, 04:34:32 pm
content: Why would you want a peak detector? There's no requirement to determine the peak level. Its closer to a pulse stretcher, but that's not exactly what the O.P. has asked for.What's actually needed is a fast comparator with a 3.66V reference level (at least that's what the red line looks like its at), feeding a 1ms monostable.Some clarification is needed on what should happen at the end of the 1ms period if the signal is still above the threshold. Should the output go low until the signal dips below and back above the threshold or should it blip low and immediately start another 1ms pulse or should it just extend the pulse until it goes back below the threshold. You've already ruled out a simple pulse stretcher that extends the pulse for 1ms from the last moment the input was above the threshold, as you said to ignore the input during the pulse:"When the input signal rises above certain level (shown in red) I want digital output to go high and stay there for some timeregardless of the input signal level."That also rules out the semi-latching comparator idea - without a lot of extra complexity, it wont ignore the input signal during its 1ms period.

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 05:06:23 pm
content: ok, I missed the monostable part. Something like this? (You would probably have to tweak the CR values a bit - could use a preset.)

author: Oaklander
author_rank: Regular Contributor
timestamp: April 17, 2017, 06:11:56 pm
content: I'm now trying to understand how the circuit in danmcb's schematic works. To my understanding it's something like this:When input rises above threshold the comparator output gets high. The capacitor is charged and keeps input high but discharges through the resistor. Once the capacitor discharges enough, comparator goes low again.I hope I understood it right.Looks like that's the solution. I'm just amazed how simple the circuit is.

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 06:31:02 pm
content: Yes. The cap just passes a pulse back to the input, to hold it over threshold for some vague time constant which is a function of C, R and threshold. Once it discharges enough, the thing resets (as long as the input has dropped enough).

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 06:41:11 pm
content: This kind of timing circuit, often based around 4000 series CMOS, used to be quite common in sensitive analogue gear where you didn't want to risk clocked circuits contaminating all the low noise stuff, but needed timing and logic functions for control purposes. A lot of old 80's British audio mixing consoles are full of it. I guess it is not so often seen these days, but it can be quite useful.

author: Ian.M
author_rank: Super Contributor
timestamp: April 17, 2017, 06:45:04 pm
content: Quote from: Oaklander on April 17, 2017, 06:11:56 pmIt doesn't - see below.Quote from: Oaklander on April 17, 2017, 06:11:56 pmNot quite. Assume the input is below the threshold, and the threshold pot is set to one diode drop (into a 100K load) below the actual threshold), and that the cap is initially discharged.As a result the output is initially low, and stays low till the +in goes higher than the -in. The output then slams high, taking the +in to one diode drop below the rail. The cap then charges (left plate becoming more negative) through the 100K resistor, and as long as the input has gone back below the threshold, eventually +in goes below -in and the output slams low. So far so good. However the capacitor is now charged to the difference between the threshold and the rail, left end negative, so the next time the input goes above the threshold, the cap barely has any affect and the circuit doesn't significantly extend the pulse.The only way for the capacitor to discharge is its own leakage or leakage through the diode, so if you wait long enough it will probably work again for another pulse.Quote from: Oaklander on April 17, 2017, 06:11:56 pmToo simple and not a solution. Trying to do the threshold and the pulse timing in one stage is asking for trouble and even if you try to fix its deficiencies,(e.g. by adding a diode from ground to the junction of the existing diode and the cap, cathode toward the cap to give it a discharge path, and sticking a 1K resistor in series with the cap so that the cap discharging doesn't slow down the output going low), the pulse timing will depend both on the threshold voltage and the recent signal history.Quote from: danmcb on April 17, 2017, 06:41:11 pmHairy asynchronous 'logic' with diode gates and RC delays is frowned upon for good reasons. . . . .There are CMOS monostables that CAN safely be used for timing, and getting a compatible pulse to drive them from an analog signal passing a threshold just needs a comparator, but of course that costs money. If you see this sort of circuit in a commercial design its a sign its either been Muntzed or the designer forgot something critical and was desperate to delay a signal edge slightly to 'cure' a race condition, or just didn't give a flying f--k about future reliability and maintainability as components aged.Sometimes when only a very small delay is needed, or unit cost is the most critical constraint and the specification for pulse width, threshold tolerance and rearming time has a lot of slack in it, its excusable as the least evil cheap choice. . . .What's the cost of an hour's breadboarding? $50 minimum for a new gradate engineer by the time you've figured in overheads. Muntzing a one-off or even something you are going to build ten of just doesn't pay.

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 06:51:00 pm
content: Ian is right. Another diode to stop the LHS of the going below ground might be a fix (which should make the comparator o/p discharge the cap quickly as soon as it resets), or perhaps it is indeed better to split it across two stages. Always best to breadboard this kind of thing.

author: danmcb
author_rank: Regular Contributor
timestamp: April 17, 2017, 06:54:31 pm
content: As for the style of design - I don't see the issue once you get it debugged and working properly, if it suits your design goals. For instance, the ability of the circuit to recover after operating may or may not be an issue - it just depends on the application. Something like this can be perfectly reliable, so long as you think it through and test it properly - just like any circuit, really.

author: johnkenyon
author_rank: Regular Contributor
timestamp: April 17, 2017, 07:06:47 pm
content: Quote from: danmcb on April 17, 2017, 06:54:31 pmYou could get it working with 4 different breadboard layouts, and when you came to build the prototype it probably won't work.Comparator and a 4538 monostable every time. (t=RC)

author: FlyingHacker
author_rank: Frequent Contributor
timestamp: April 18, 2017, 12:03:27 am
content: Obviously, OP didn't need a peak detector, but why not just use a one-shot 555? Cheap, easy, reliable, likely in stock.http://555-timer-circuits.uk/operation/one-shot.htmlOr any number of 555 calculators out there...

author: Oaklander
author_rank: Regular Contributor
timestamp: April 18, 2017, 01:20:07 pm
content: I designed this circuit. Does it look OK?

author: Ian.M
author_rank: Super Contributor
timestamp: April 18, 2017, 05:24:59 pm
content: Not quite.The LM319 output is open-collector. You need a pullup resistor.Also it should *NOT* connect to the 4098 output - that will conflict and probably burn out the 4098.Its probably worth rearranging it to move the reference voltage to the LM319 -in and to use the -TR input of the 4098, as that will let you add a high value resistor from LM319 out to -in, to set the hysterisis and stop it 'chattering' if the input is very near the threshold.

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 19, 2017, 07:23:47 am
content: as an addition to extensive analog tuning, do it in micro.... comparator output to uC input, once interrupted (comparator out HI), uC will toggle another output pin as HI for some "to your heart content's timing", once timed out, restart the interrupt routine again. 3 components.. threshold trimpot, comparator and the uC... like sot23 pic10f200, and then forget about it, tuning is done in software only.

author: Zero999
author_rank: Super Contributor
timestamp: April 19, 2017, 12:55:19 pm
content: Quote from: Ian.M on April 18, 2017, 05:24:59 pmI doubt there's any need for hysteresis, since the monostable will just trigger on the first pulse, then the input can chatter away, yet the output will become stable. The CD2098 will need to be configured in non-retriggerable mode, so any further pulses have no effect on the delay. If you're using +TR then -TR (pin 5) should be connected to Q' (pin 7). If the other section is not being used, then pins 11 should go to VDD and 12 and 13 should go to 0V.http://www.ti.com/lit/ds/symlink/cd4098b-mil.pdf

author: Oaklander
author_rank: Regular Contributor
timestamp: April 20, 2017, 05:33:27 pm
content: Actually it turned out that I only need the comparator. I can igonore the subsequent rising edges in software.I built this circuit which works. I put a 10k potentiometer as pull-up resistor on output to find out the best value for it.I found some strange behavior when I played with the pot.The larger the resistance the longer rise time I get. But when I reduce the resistance some oscillations appear. Horizontal division in graphs is 200ns.The datasheet promised 80ns response time, which seems to be true for last graph. But where do the oscillations come from? Do I need hysteresis to my comparator?

author: danmcb
author_rank: Regular Contributor
timestamp: April 20, 2017, 05:36:16 pm
content: well, there is somewhere some capacitance, which forms a CR with the resistance, so of course it gets quicker with less resistance. but if you drop it too far and exceed max o/p current, strange things can happen ...