9S08PA16 continually resetting - config problem? - Page 1
Forum section: electronics / general

author: Circlotron
author_rank: Super Contributor
timestamp: April 14, 2019, 11:38:09 am
content: Trying to get my first bit of .asm code running on a 9S08PA16. Kinda getting there. Currently it's just a loop flashing a LED.. The thing is, the reset pin continually pulses low for 4uS every 7.07mS. Running off a 20MHz xtal. Interrupt bit is set, timer is stopped. Watchdog timer is stopped. LVD disabled. Just thinking something is timing out somewhere. There is just a ridiculous amount of config registers in this thing...

author: jaromir
author_rank: Unknown
timestamp: April 14, 2019, 02:05:20 pm
content: I believe the watchdog is still running.Show us the code. At least the hardware initialization portion, but since it's just LED flasher, probably whole source code will be OK, too.

author: Circlotron
author_rank: Super Contributor
timestamp: April 14, 2019, 02:16:33 pm
content: Okay, here it is. Tabs spaces are being a bit silly...Code:*****************************************$BASE 10TPORTA EQU $00PORTAIEEQU$30B8PORTAOEEQU$30B0PORTB EQU $01PORTBIEEQU$30B9PORTBOEEQU$30B1PORTCEQU $02PORTCIEEQU$30BAPORTCOEEQU$30B2PORTD EQU $03PORTDIEEQU$30BBPORTDOEEQU$30B3PORTE EQU $04PORTEIEEQU$30BCPORTEOEEQU$30B4ADC_SC1EQU$10;Status and Control Register 1 page 466ADC_SC2EQU$11;Status and Control Register 2ADC_SC3EQU$12;Status and Control Register 3ADC_SC4EQU$13;Status and Control Register 4ADC_RHEQU$14;Conversion Result High RegisterADC_RLEQU$15;Conversion Result Low RegisterADC_CVHEQU$16;Compare Value High RegisterADC_CVLEQU$17;Compare Value Low RegisterADC_APCTL1EQU$30AC;Pin Control 1 RegisterADC_APCTL2EQU$30AD;Pin Control 2 RegisterWDOG_CS1EQU$3030;Watchdog Control and Status Register 1 page 517TSCEQU$20;pageTCNTHEQU$21;pageTCNTLEQU$22;pageTMODHEQU$23;pageTMODLEQU$24;pageTSC0EQU$25;page 277TCH0HEQU$26;page 280TCH0LEQU$27;page 281TSC1EQU$28;page 277TCH1HEQU$29;pageTCH1LEQU$2A;pageACMPEQU$2C;page 499analog comparator S/C;internal clock sourcesICS_C1EQU$3038 ;ICS Control Register 1 page 191ICS_C2EQU$3039 ;ICS Control Register 2 page 192ICS_C3EQU$303A ;ICS Control Register 3 page 193ICS_C4EQU$303B ;ICS Control Register 4 page 193ICS_SEQU$303C ;ICS Status Registerpage 194ICS_OSCSCEQU$303E ;OSC Status and Control page 195PMC_SPMSC1EQU$3040;sys pwr management page 52;VectorStart EQU $FFB0;page 56**********************************;2048 bytes RAM starts at $0040EXAMPLE_MSB EQU $40;example********************************************************************************TRSTEQU4;timer resetTSTOPEQU5;timer stopTOFEQU7;timer overflow********************************************************************************ORG $C000; <--- new flash startSTARTBSETTSTOP,TSC;stop timerSEI;no interruptsLDA#%00000000STAWDOG_CS1;watchdog timer off, bit 7;set or clear outputs before changing any DDR bits to 1MOV #%00000000,PORTAMOV #%00000000,PORTB;MOV #%00000000,PORTD;DDRsLDA#%00000000STAPORTAIELDA#%00000000STAPORTAOELDA#%00000000STAPORTBIELDA#%00000000STAPORTBOELDA#%00000000STAPORTCIELDA#%00000000STAPORTCOELDA#%00000000STAPORTDIELDA#%00000001STAPORTDOE;LDA#%00000000;STAPORTEIE;LDA#%00000000;STAPORTEOELDA#$96; = #10010110STAICS_OSCSCLDA#$80; = #10000000 BDIV = 0, prescaler = 1STAICS_C1LDA#$00STAICS_C2LDA#$00STAPMC_SPMSC1CLCRSPCLRXCLRA*******************************************************************************TOPBSET0,PORTD;LED onLDHX#1000;1000 = 400uSTOPLOOPAIX#-1;2 8 cycCPHX#0;3 400nS per loop, 2.5MHzBNETOPLOOP;3 400nS/8 = 50nS per cyc @ 20 meg xtal; buss = xtalBCLR0,PORTD;LED offLDHX#1000BOTLOOPAIX#-1CPHX#0BNEBOTLOOPJMPTOP*******************************************************************************ORG $FFFE;ResetFDB START*******************************************************************************

author: Circlotron
author_rank: Super Contributor
timestamp: April 14, 2019, 02:32:10 pm
content: Actually the LED is somewhat more than flashing. With the current code it is 400uS on, 400uS off, but a bit jittery because of the constant resets.

author: jaromir
author_rank: Unknown
timestamp: April 14, 2019, 03:13:36 pm
content: Manipulating the watchdog is a bit more complicated than just writing to WDOG_CS1 straight.Take a look at section 21.3.2 of reference manualhttps://www.nxp.com/docs/en/reference-manual/MC9S08PA16RM_Rev.1.pdfWatchdog is enabled after POR, to reconfigure it, all watchdog registers - except of CNTH/CNTL - must be written.This is how I disable the watchdog - in C, but you get the idea -Code:WDOG_TOVALL = 0x00;WDOG_TOVALH = 0x10;WDOG_CS2 = 0x01;WDOG_CS1 = 0x20;

author: Circlotron
author_rank: Super Contributor
timestamp: April 15, 2019, 02:01:32 am
content: jaromir, you da man!It says there "The new configuration takes effect only after *all* registers except WDOG_CNTH:L are written once after reset. Otherwise, the WDOG uses the reset values by default.So I put the following and it works. I'm sure there will be other questions as I proceed.Code:;For watchdog setting to take effect, all regs must be written to;even if it the same as their default reset values!!!LDA#$20STAWDOG_CS1;watchdog timer offLDA$01STAWDOG_CS2LDA#$10STAWDOG_TOVALHLDA#$00STAWDOG_TOVALl