Sample & Hold Circuits - Page 1
Forum section: electronics / beginners

author: TheSchilk
author_rank: Contributor
timestamp: October 07, 2020, 07:58:12 am
content: Dear All!I have been getting interested in Successive-Approximation ADCs and(after taking an FPGA course at UNI) thought it would be fun to builda completely discrete Audio ADC controlled by an FPGA.The specs I am targeting:Somewhere around 44kHz sample rate44.1kHz would of course be best,but this is not really linked to anything except maybe a discrete DAC,so any sample-rate fast enough for audio is ok12bitsShould be enough for a demonstration and keeps the LSB voltage difference manageableI think I can design and build the DACs, design and build the FPGA interface, and finda schmick comparator IC to handle those specs no problem.Right now I am planning to amplify to a 2.5V max amplitude and bias up by 2.5V, so my DAC and Comparator can work in the 0-5V range.The reasoning here was that those ranges are no problem for DACs and Comparators, plus I am keeping my LSB somewhere in the mV: 5V/(2^12) = 1.2mV.If any of that sounds absolutely bonkers please do curb my enthusiasm before Ibuy any expensive componentsThere is one part I am a little stumped on: The Sample/Track and hold.Looking at the specs above, if I want to sample at 44.1-sh kHz, that gives me a total period in the order of 22us.So I guess I am looking at something like 5-10us of Sample max, and 10-15us of Hold.I does not need to be the most accurate thing. LSB is greater than 1 mV, so as long as accuracy/droop over hold period stayssomewhat under that. (Back-of-the-envelope: 1mV droop on a 10nF capacitor over 15uS would be a leakage current of around 600nA,so that seams manageable)My first though was to use something like the LF398 Sample-and-hold amplifier (Datasheet).But that still leaves the matter of Capacitor choice. The best recource I could find on the matter is the LF398 datasheet.That datasheet recommends Polystyrene or Polypropylene for their 'dielectric absorbtion' causing better hysteris characterisitcs and avoidjumps in voltage. But there are no actual numbers given as to what to specifically look for in a capacitor.I was looking through Mouser at those kinds of capacitors, and was only able to find physically relative large Through-hole components.But because I don't have any specific specs I am looking for in a capacitor (short of 'low leakage' and 'good dielectric absorbtion'. What even is good? high absorbtion? low absorbition?)I can't really look at a capacitor spec sheet and decided if it is fit for this application? Does anybody have any guidance?(Sample CI really would love it if there was a smaller (SMD) capacitor.Does anybody have any resources on this? Guidance?But to be quite honest, the LF398 would be the only functional block of my design where I would rely on a 'single solution IC'. It would be much more funto also build a discrete Sample and Hold circuit.I can track down a OpAmp that is fit for the application, but I am stuck on how to design the solid-state 'switch' that disconnects the hold capacitorfrom the input voltage.It should be fairly low leakage, and be relatively fast.Most designs I see only simply have a single N-MOS or JFet, but wouldn't the intrinsic body diode allow the capacitor to dis-charge if the input swings far below the hold voltage?Is that an unlikely concern while looking at the slew rate of an audio signal?Am i making my own life difficult by sample-and-holding after I amplify and bias my input? I thought it would be easier to sample-and-hold a larger voltage?Again, does anybody have any ideas for reference-designs or resources?Sorry for the long postIf I am doing something stupid here, please point it out. This is very much a learning project.

author: Jan Audio
author_rank: Frequent Contributor
timestamp: October 07, 2020, 03:26:55 pm
content: Poly-Propylene (PP)

author: Kleinstein
author_rank: Super Contributor
timestamp: October 07, 2020, 03:48:36 pm
content: For the hold capacitor one can use C0G ceramic SMD capacitor. For the relatively short times and thus capacitor in the nF range (maybe even less) this no problem. Essentially any C0G should be good enough. I found the TDK brand SMD caps with very low absorption (about 20% of PP or PS caps) with still moderate costs.For the switches I would consider CMOS switch chips. For just 5 V operation there is lots of choices. Something like 74LVT4066 may be good enough and could be controlled from a 3 V signal.S&H may get a little easier after amplification, but not very much. It is more like amplification is easier before S&H as it can be slower. The amplifier driving the S&H stage may have to provide a bit of current - so one may want some amplification or at least a buffer.If it is just for learning, I would start a bit slow so that there is sufficient time for the approximation steps, more like 2 µs per step, maybe a little more for the beginning, when the jumps are large and thus more settling time needed.The more theoretical implementation is with resistors and a voltage output DAC. The more practical implementation inside chips use charge, capacitors and more switches. Here the S&H is part of the DAC and less amplifiers are needed.

author: magic
author_rank: Super Contributor
timestamp: October 07, 2020, 03:59:35 pm
content: Concerning dielectric absorption, I have seen recommendation for Evox Rifa (now Kemet) SMR5-series polyphenylene sulfide capacitors in one dual slope ADC datasheet.I bought one to try in my DMM for fun and it really works; gain error went down one count compared to some random (also Kemet) polypropylene capacitor that I tested too and a few counts compared to the polyester cap originally there.

author: Benta
author_rank: Super Contributor
timestamp: October 07, 2020, 06:31:31 pm
content: Quote from: TheSchilk on October 07, 2020, 07:58:12 amFor audio, I'd say that a sigma-delta (some call it a delta-sigma) ADC would be much more appropriate.The analogue part is not very complicated (but needs to be fast and precise), and the opportunities for making optimizations in the FPGA with regard to decimation and filtering are really interesting for a student.Just an idea.