Waveform Generator Project - Page 1
Forum section: electronics / projects

author: void_error
author_rank: Frequent Contributor
timestamp: August 22, 2015, 11:46:11 am
content: Yes, I know, another one of these...Anyway, here's the idea:Parts to be used:AD9833waveform generator IC(the cheapest I could find, not one of those ebay modules)PIC16F1XXX (TBD, depending on certain things)LCD Display (character or graphical 128x64)Rotary Encoder (for adjusting the frequency)Menu buttonsOutput filter (No idea here)Offset adjustment via DACOutput Attenuator (how?)Output buffer OpAmp (fast one)Questions:1. Is the 8-bit DAC like the one in aPIC16F1707good enough for DC offset adjustment?2. Any output filter suggestions? The max output frequency for sinewave is 12.5MHz for a 25MHz clock but it's not really going to be a sinewave, right? 1MHz should be good enough.3. How can I make an output attenuator that works for the frequencies involved? One way to do it would be small relays but I'd like a semiconductor based solution if that's possible.The closest thing I've found to what I'm trying to do isthis.

author: Unknown
author_rank: Unknown
timestamp: August 22, 2015, 12:44:44 pm
content: 1) Depends how accurate / fine you want the offset to be2) Have play with the DDS simulator on the AD site, including the filtering options. I use the AD9833 as a VFO in a couple of projects, & I've found the simulator is remarkably accurate w.r.t. waveshape, amplitude, spurious noise, etc. If you're aiming at only 1MHz with a 25Mhz clock then you can practically get away with a simple first-order LC low pass, but I'd go for a low order Chebyshev or similar.3) At 1MHz you can make an AGC amp out of practically jellybean parts and do at least some of your level control there by adjusting the gain. And again, at 1MHz you can get get away with simple constant impedance resistive attenuators & switching them in / out with just a rotary switch.Myself, I'd aim a bit higher - 2MHz will be just about as easy, and 5MHz or more is certainly do-able with reasonable care.For a 50ohm output buffer have a look at some of the line drivers & current feedback op-amps from TI, LT, etc. I haven't used any in anger myself yet, but I've got some THS3201's for when I get around to it.

author: Kintekobo
author_rank: Regular Contributor
timestamp: August 22, 2015, 01:41:25 pm
content: Tac Eht Xilef2) Have play with the DDS simulator on the AD site, including the filtering options. I use the AD9833 as a VFO in a couple of projects, & I've found the simulator is remarkably accurate w.r.t. waveshape, amplitude, spurious noise, etc. If you're aiming at only 1MHz withYou know I learn something new just about every time I read this boardThat's a really useful resource that I didn't know about when I was building my audio sweep generator with an AD9850.

author: void_error
author_rank: Frequent Contributor
timestamp: August 22, 2015, 02:46:17 pm
content: Quote from: Tac Eht Xilef on August 22, 2015, 12:44:44 pmHmm... I was asking because a DAC can cost more than a PIC micro, I'll have to take a closer look at the specs for both. I won't need more than 8 bits.QuoteYou meanthis. At 25 MHz clock a 1.25 MHz the sinewave looks almost like a sinewave so very little filtering will be required. At 2.5 MHz the sinewave still looks decent. Gotta start studying filters again... AD sim says 2nd order Chebyshev is enough.QuoteI read that the VOUTof the AD9833 is +/- 0.6VP-Pand centered around 0.3V which means I could simply amplify it to bring it up to 2VP-Pand add the offset using another op amp. Add a constant impedance resistive attenuator and I'm done... well, sort of. I'll dig deeper into this.Quote2.5 MHz looks pretty easy to deal with according to the simulator.Haven't worked with any high frequency analog stuff so this will be a bit of a challenge for me.I'll be squaring the signal using a fast comparator / schmitt trigger and only output sine/triangle with the AD9833. This way I'll have two outputs.Thanks for the reply!More suggestions are always welcome.

author: MarkF
author_rank: Super Contributor
timestamp: August 22, 2015, 07:14:00 pm
content: QuoteI'm currently building a function generator too with the AD9834, PIC16F876, small OLED display and a rotary encoder.The D/A functionality in the PIC can supply almost NO current.You will need to buffer it with an op-amp. I intend to use it to control the signal amplitude instead of the DC offset. It uses the FS_Adjust pin on the AD9834 which is totally internal on the AD9833.You only get 4 bits (16 levels) of amplitude control. That doesn't seem like a very fine adjustment.A Microchip MCP4802 8-bit DAC with a SPI interface would be a better choice. They are only $1.62 atMouser. The MCP4822 is a 12-bit version for $3.16

author: Kleinstein
author_rank: Super Contributor
timestamp: August 22, 2015, 08:32:05 pm
content: The output filter is not that easy: normaly the sine wave would like a steep filter, like a 7 th Order chauer filter -sounds complicated but can be done as a passive LC filter. This is about standard with DDS chips. This way sine wave might work up to about 8 MHz, with slight reduction in amplitude at the higher end. Even if only used for generating the rectangular signal, this still might be usefull.The triangle would like something like a Bessel filter, that is a rather slow roll-off with constant propergation delay. Still triangle will not be very good at higher frequencies, e.g. more than 500 kHz. One should do a simulation if it's worth adding a second filter just for a not so good triangle - some commercial units do that.Usually 8 Bit for the Offset is not that bad. Still better than a normal pot can do. DACs like MCP482x MCP492x are rather cheap as 10 and 12 Bit DACs.Amplitude setting via the DDS current range will shift the offst a little, so some (analog) compensation would help. Still this is no more than fine tuning (e.g. 1:2). Fine setting of the amplitude is not that simple other ways - low impedance digi Pots may still work at 1-5 MHz though.Course setting is often done through a passive divider after the amplifier - though this would interfere with a offset, unless the GND output is shifted. However this makes the second output for the rectangular signal a little tricky.The µC might output a PWM Signal as well, as a second, possibly faster source for rectangular signals and PWM Signals as well.

author: void_error
author_rank: Frequent Contributor
timestamp: August 23, 2015, 08:30:51 am
content: Quote from: Kleinstein on August 22, 2015, 08:32:05 pmHaving two independent filters, one for sine and one for triangle should get around this problem. I'd only need two DPDT relays to switch between them.I'm not planning to go too high in frequency for the triangle anyway.QuoteI haven't decided if I want fine amplitude adjustment yet but if it's too complicated I'll stick to dividers switched using relays.As far as digital pots are concerned, I foundthis document.The square wave will be 0-5V only.QuotePlanning to use the PWM output as well for variable duty cycle or use the triangle output with a DAC and a comparator to do the same thing.Quote from: AcHmed99 on August 22, 2015, 11:04:12 pmNot trying to build anything extremely precise here, if I ware to do that the cost of the whole thing will start snowballing .QuoteThat's a pretty neat and cheap solution. 4.096V reference divided by 1,2,4, 8 or 16 down to around 0.256V will give me down to around 1mV theoretically (8 bit DAC) but I don't think I'm going to need to go that low.QuoteSorry, copied typo.QuoteThanks! I haven't looked into all the suitable micros for this. I can get the 1716 for about $2 fromTME, pretty cheap for what it's capable of.EDIT: Found a filter calculator, AD againhttp://www.analog.com/designtools/en/filterwizard/#/type

author: void_error
author_rank: Frequent Contributor
timestamp: August 29, 2015, 07:43:43 am
content: Found some suitable op amps -AD8066- not so cheap but not ridiculously expensive either, two per package, MSOP-8 case - nice and tiny. Their only drawback is the Input Common-Mode Voltage Range: -5 to +1.7V for a +/-5V supply but that's not that bad.PWM output will be made using the triangle output and DAC fed into a comparator, 0-5V output only, so no PWM available if sine is selected for the DDS output .I'm currently stuck at how to adjust the output voltage.One way to do it is a constant impedance divider at the output but that will probably screw with me if I add DC offset to the output voltage before the output buffer op amp. AC + 500mV DC on 50 ohms is in excess of 10mA. I should probably be thinking about a different output op amp.Another way would be to use a digital potentiometer before the output buffer but it has frequency limitations so it's pretty much useless at anything above a few hundred kHz. Well it's still going to work but I don't want extra attenuation at higher frequencies now do I?This leaves me with one more option: switchable resistive divider, again, before the output buffer. Using relays would work but it would bulky and rather expensive unless I can get my hands on cheap small relays. Analog switches/multiplexers are dirt cheap but they have higher parasitic capacitance and switch resistance than relays.How should I adjust the amplitude?EDIT:LMH6612seems to be another candidate for the op amps.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 29, 2015, 10:21:38 am
content: For amplitude control there are essentially 2 options:1) Use a special varible gain amplifier / muliplier, like AD831 or AD603. Possible 1 more coarse stage via relaisAs a low cost version a mixer like MC1496 could be used, but is not really temperature stable.2) Use the ref. current of the DDS to do fine adjustment (e.g. 0... 6 dB) and a switched attenuator with somthing like 5 dB steps.So this needs a few relais, but not that dramatical many, e,g, stages with 5 + 10 + 20 + 20 dB.As for the DC offset, there is the option to shift the output ground. So the AC amplifier is allways running with 0 DC offset, but the ground of the Output connector is shifter by a certain voltage from a low frequency stage. The good thing is, that this still allows the full AC Amplitude independet of DC level. Also the Attenuator might be at the output.The bad thing is, that this ony works well for one Output. So the extra sync output or PWM output would need some kind of isolation or bootstrapped output stage. For just a few digital outputs this OK and might even be used for an isolated output. Also the Amplifier has to be able to drive the full power, as there can be additional DC current. So good cooling of the output amp may be needed. So this might require 2-3 OPs in SO8 for the output, depending on the supply.

author: void_error
author_rank: Frequent Contributor
timestamp: August 29, 2015, 12:40:06 pm
content: AD603 looks like a good option... gotta figure out how to use it first.I'll have to find a way to deal with the extra current caused by the DC offset, but I'm not planning on shifting the output ground.

author: void_error
author_rank: Frequent Contributor
timestamp: August 30, 2015, 07:42:19 am
content: One more question:So I decided to switch from the AD9833 to the more versatileAD9832...Is it a good idea to AC couple the signal from the AD9832 output (R & C across it like in the datasheet) with a 47u MLCC & ~100k (bias, IN+ to GND) to an op amp buffer driving the active low-pass filter(s)? Cutoff frequency is below 0.1Hz with all the MLCC quirks taken into account. If anyone is wondering schematic is still work in progress.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 30, 2015, 09:42:44 am
content: Ac Coupling of the DDS Signal makes Adjustment easy, but there is a low frequency limit and it takes time at power on so settle. So a 0.1 Hz lower frequency limit it may take 1 minute to after power on to settle, if not special provisions are taken, to speed up. So a very low lower bound may not be so practical. Slight reduction in amplitide can be compensated by software. So even if the filter is at 1 Hz, the output might be still useful to 1-2 Hz.The alternative to AC coupling would be adjusting the DC level with a trimmer or two (if DAC ref. voltage is variable).At least the filter for the sine wave should be a LC filter. At somthing like 1-10 MHz, an aktive filter is rather complicated. The LC filter in contrast is rather easy at this higher frequency, as inductors are small (e.g. size 0805) enough. The typical LC filter (7th or 9th order) consists of only something like 3 or 4 induktors, 7 or 9 capacitors and 1 or 2 resistors. Also tolerances are less critical compared to a steep (high Q) active filter. The usuall way is to have the LC fitler directly driven from the DDS Chip and a buffer / amplifier after that.

author: SaabFAN
author_rank: Frequent Contributor
timestamp: August 30, 2015, 03:04:17 pm
content: To adjust the output-amplitude, I would suggest some sort of automatic gain control.I did some research into that area when I tried making a Waveform-Generator myself - abandoned it because I didn't have the time to do all the software.Here is what I came up with: Use a DAC or filtered PWM to generate a reference-voltage, feed that into an OpAmp, and then use a Precision Peak Detector to get the amplitude to feed the other input of the OpAmp, which in turn controls either a variabale Gain Amp, or a variable Attenuator (JFET or PIN-Diode Attenuator). This Attenuator is then followed by the DC-Offset Stage, consisting of a fast OpAmp (THS3092 for example), followed by the output-stage (The second Amp inside the THS3092 or a dedicated Output-Amplifier).This is roughly how the AGC and Output-Stages of Philips Function-Generators were designed and also borrows some ideas from cheap Signal-Gens you can find on ebay.

author: void_error
author_rank: Frequent Contributor
timestamp: August 30, 2015, 09:11:16 pm
content: Quote from: Kleinstein on August 30, 2015, 09:42:44 amDC offset adjustment to 0 after the filters would be an option...QuoteWhy is an active filter complicated at those frequencies? Parasitic capacitance/inductance? AD has a nice filter design tool but most of the values for R or C it spews out are not standard.To be honest I've never used LC filters... Which one would be better in my case? A T or a Pi? Completely clueless here. I could simply copy/modify a filter from another DDS waveform generator but I wouldn't be learning anything, would I?The AD9832 outputs a current which is then converted to a voltage via an external resistor (for AD9833 it's 200 ohm and inside the chip). How would attaching a filter directly to that affect the amplitude?Quote from: SaabFAN on August 30, 2015, 03:04:17 pmAlready found a way, not so cheap but easy to implement, using an AD603.

author: Kleinstein
author_rank: Super Contributor
timestamp: August 30, 2015, 09:59:24 pm
content: The 200 Ohms output load impedance seems typical for the DDS chips. So you can quite easily convert designs from other chips like 9850.The typical filter is higher order, more like a chain of Pi type: The basic shape is just a chain of lets say 3 inductors and 4 caps to GND, one at each end of the inductors. The output has the 200 Ohms termination to GND. Usally the filter for a DDS has addtional zeros (Cauer type filter) so parallel to each inductor there is another cap. Though the filter looks very simple, the amplitude vs. frequency curve can be quite good, as the sensitivity to component values is not very high. The caps parallel to the inductors and there self resonance only determine the position of the extra zeros - so not critical to the passband, but only details of the stop band.There are also filter design tools for this kind and other LC filters. There are also ready made tables to get the right values. So in this respect it't not that much different from active filters. Component value may also be non standard so that something like 2 parallel caps are often used. Here it also helps that the caps don't need to be as accurate as in an active filter.Steep, high Q active filters are difficult, as the caps need to be rather exact. Erros in values can result in passband ripple. At high frequencies the OPs need to be quite fast: usually something like 10*Q * f_max or even 10*Q²*f_max is needed. Also parasitics and inter stage coupling get important. So think about 100-500 MHz OPs, 1% (or better) caps and shielding between the stages if you really want to go active.An active filter might be an option for the triangel part, as this uses lower Q and slightly lower frequency. I still would look at the LC version for comparison.

author: SundayProgrammer
author_rank: Contributor
timestamp: August 31, 2015, 06:48:20 am
content: Like many other hobbyist I also made MCU based generator using 9833. After 5MHz or so the wave shape becomes quite ugly. I checked the output of the simulator and it is pretty close what you get from an actual chip. MCU controlled amplitude control caused some headache to me but the result is decent. I'm sure much more sophisticated analog circuit would give better result. I used VCA810+AD847+AD8001.Axel.

author: void_error
author_rank: Frequent Contributor
timestamp: September 01, 2015, 05:54:08 pm
content: How will the elliptic (Cauer) filter affect the triangle wave? Should I try to design it with FCas high as possible? Something like 10+MHz?

author: SaabFAN
author_rank: Frequent Contributor
timestamp: September 01, 2015, 11:40:35 pm
content: Quote from: void_error on August 30, 2015, 09:11:16 pmI would suggest the LMH6505. It is cheaper (5,27€ vs. 9,81€) and also a lot faster (1500V/µs vs. 275V/µs) than the AD603.To filter the DDS-Output, I think a Cauer-Filter might be the best idea: The 12Mhz max. Frequency is rather close to the 25Mhz Master Clock, as well as the MCU-Clock (I guess 16 Mhz). So you need a sharp filter.Unless I missed something about creating the triangle-wave, the best way is most likely a Schmitt-Trigger (74HCT14 or 74AC14) to create a Square-Wave that is then integrated by several stages that come online in different frequency-ranges.This method presents you with the problem of frequency dependent amplitude of the triangle-wave, however. Requiring again some sort of automatic gain control to get the amplitude right.If you control the variable gain Amp directly from the MCU, you can use the ADC of the MCU to measure the voltage from a peak-detector to close the control-loop in the digital domain.I would prefer the analog way though, because I don't like programming that much

author: Kleinstein
author_rank: Super Contributor
timestamp: September 02, 2015, 07:43:32 am
content: I would suggest a rather high filter cur off frequency, though not more than 10 MHz, but more like 8-10 MHz. The closer one is to the theoretical llimit of 12.5 MHz, the more critical the filter gets.I don't know how much the filter will effect the triangle. However one can relatively easy check that in a spice simulation. Low frequencies like less than 100 kHz schould be still acceptable with the filter in place.The trouble is phase shift in the higher frequncy componets. High frequency triangle will not not be good anyway, as no filter can extrapolate missing the peaks. So for a good trinagle at more than about 100 kHz, analog integration of a rectangle signal may be the best option anyway. A similar solution would be a PLL with a triangular VCO - here one could copy from old analog generators. If there already is a VCA the integration method might be easier though.

author: branadic
author_rank: Super Contributor
timestamp: September 02, 2015, 09:58:05 am
content: There has been a project "DDS based function generator with AD5930" and a corresponding wiki on how to design the reconstruction filter etc.http://www.mikrocontroller.net/topic/168134#1606968It uses an elliptic filter followed by a sinc-filter to compensate for frequency response, one of the most important parts to get nearly flat output characteristics of the amplitude.www.hit.bme.hu/~papay/edu/Conv/pdf/FlatResponse.pdfAn amp stage is also available in this thread.The board is controlled via FT232 and a small program called "Siggy" with a computer.AD593x was chosen because it includes sweep functionality.

author: void_error
author_rank: Frequent Contributor
timestamp: September 03, 2015, 07:16:09 pm
content: Quote from: Kleinstein on September 02, 2015, 07:43:32 amUsed a program I found using google (Elsie) to get the exact values for the circuit, then I rounded them up or down to the closest standard values. The results are in:The Cauer filter was a bit of a pain in the arse to get the right response out of for standard component values but it was doable. The Butterworth filter is much simpler in that respect. All filter components are available in 0603 size.QuoteIt should be able to go to up to 200-250kHz. At 500kHz the edges go blunt and there's some phase shift but it could still be usable since the attenuation is not very high.Not much difference between Cauer and Butterworth either, they both affect the triangle input the same way.Please excuse the inconsistency of the screenshot sizes, I forgot I was on my second monitor...Oh, and inductors and capacitors are ideal, will add the parasitics later.(because I forgot...I think I should sleep more)Triangle @ 100kHz:Triangle @ 500kHz:Hopefully whoever looks at this thread finds this useful...Quote from: branadic on September 02, 2015, 09:58:05 amSinc filter... never heard of it, looked it up and seen what it does. I'll most likely skip that for my first DDS waveform generator.QuoteI'll take a look at that as well. Thanks for the info!EDIT: It's probably not a good idea to take the triangle above 250kHz which corresponds to 100 discrete steps at 25MHz clock.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 03, 2015, 08:25:09 pm
content: The filter to keep the triangle in shape would be a bessel type filter. But I am not sure its really worth it, because of the limited number of sample in the triangle. At odd frequencies this will cause some kind of jitter, as from the DDS not all periodes will look the same. A filter might also help at the very low frequencies (e.g. < 10 kHz), to avoid the discrete step appearance - though 10 Bits is allready quite high resolution. This filter could than likely be a active filter with OPs.With the elliptc filter, the first zero should be somewhere near 12,5 MHz - so 10 MHz Limit might be a little high.The sinc filter is a correction for the normal sin(f)/f fall of a sampled signal. It might help, but amplitude setting by the µC could compensate for this as well. The corrective filter may not be that complicated possibly just part of an amplification stage - so I would keep it in mind. the Link provides by brandic is really good an this.

author: SaabFAN
author_rank: Frequent Contributor
timestamp: September 04, 2015, 02:12:00 am
content: Have you thought about using an FPGA like the Altera MAX 10 instead of the AD9832?The cheapest one can be found for 6,46€ on Digikey in quantities of 1.Configured as a fast 4Kbyte RAM + Address-Counter and using the internal PLL to make the Output-Clock Variable, these FPGAs would add full arbitrary waveform capability to your design. With 2000 Logic-Elements, the cheapest MAX 10 should also be able to generate Sine, Square, Triangle and Sawtooth from mathematical formulas in real-time.The output of the signal could be a simple Resistor-Ladder, which effectively would give you a DAC that can run at about 400MS/s!With a half-decent analog part, this system could easily beat these cheap chinese signal-generators you can find on ebay. Maybe not in terms of price, but definitely in terms of qualityThe disadvantages though: These devices come in 144pin TQFP-Packages, which basically can only be reflow soldered (A 20€ Pizza-Oven, Multimeter Temperature-Sensor and some solder-paste can take care of that), and their configuration has to be developed and programmed.

author: SundayProgrammer
author_rank: Contributor
timestamp: September 04, 2015, 08:23:07 am
content: Quote from: SaabFAN on September 04, 2015, 02:12:00 amI have been pre-designing the next generator release based on FPA. Are you aware how many datapoints are typically used for example sinewave? Adjusting PLL based on target frequency it means that for example 10 datapoints per wave means 100MHz if target freq is 10MHz. I assume that commercial devices have several wave maps (?)I have used solder friendly boards like this for FPGA projects:http://www.ebay.com/itm/XC3S500E-XILINX-Spartan-3E-FPGA-JTAG-Dev-Core-Board-XCF04S-FLASH-Module-Kit-/271309942384?hash=item3f2b552e70Cheaper ones can be found - this was the first hit of a quick search.Axel.

author: SaabFAN
author_rank: Frequent Contributor
timestamp: September 04, 2015, 02:51:49 pm
content: I can only speak from my experiences with the MHS-5200A (12Mhz Model): It uses 1K-Point Maps for the arbitrary Waveforms at a samplerate of 250MS/s max. With that, the most expensive version can produce up to 25Mhz Sine-Wave. Other waveforms are available too, but beyond 3 to 4 Mhz they begin to look more and more like sine-waves because of the shortcomings in the analog part.The 250Mhz Master-Clock for the DAC is most likely generated by an internal PLL that derives this clock from the Main Clock (There is only 1 Crystal on the PCB).To generate several waveforms, the MHS-5200A has 5 Preinstalled Waveforms, as well as 15 save-slots that can be used to store custom waveforms uploaded via USB. These are stored inside the Lattice Mach X02 CPLD (has to be, there is no RAM/ROM attached to it).My guess is that the 4 standard waveforms (Sine, Square, Triangle, Sawtooth, Reverse Sawtooth) are created by an algorithm configured into the CPLD-Hardware, and the arbitrary waveforms are generated by directly connecting the Memory-Output Port to the 8 Pin-Drivers that form the DAC with the R2R-Ladder attached to them.As I said, I don't know about the design of more expensive units, but I guess they are rather similar: MCU handles User-Interface, USB-Communication, configuration of Waveforms, Frequency, DC-Offset, Amplitude, etc. And the FPGA handles the actual creation of the waveform. Either by using an R2R-Ladder or a dedicated parallel Input DAC with a high Sample-Rate. The way the FPGA gets the Waveform-Data might be different though: On a less capable unit the Waveform is most likely stored inside the FPGA, while more expensive units use DDR2/DDR3-RAM to allow huge amounts of Samplepoints to be stored.That little board you posted looks interesting btw. Hopefully there is something similar for Altera Devices, as I'm already familiar with their Software and have the USB-Blaster cable available here.Once I'm done with University-Stuff for this year (early October), I'll do some experiments with the MAX V I have bought a while ago.

author: void_error
author_rank: Frequent Contributor
timestamp: September 04, 2015, 02:56:57 pm
content: Quote from: Kleinstein on September 03, 2015, 08:25:09 pmThat's why I didn't bother to simulate a Bessel filter.Are you suggesting a separate filter only to be switched in for low frequencies?QuoteIt does indeed need some tweaking. I'll do it this weekend.Quote from: SaabFAN on September 04, 2015, 02:12:00 amGoing FPGA is definately not an option, given the fact that I know close to nothing about them and the time it takes to learn to use one. I need the waveform generator working within roughly a month so I could test other projects I'm working on. It's not a big rush but I don't want to waste time either.

author: SundayProgrammer
author_rank: Contributor
timestamp: September 04, 2015, 03:13:42 pm
content: Quote from: void_error on September 04, 2015, 02:56:57 pmYou are probably aware of this but I I'll link it anyway:http://alternatezone.com/electronics/dds.htmIt might give you some design ideas (I used this circuit as a starting point for mine).Low quality image of my latest func gen attached - if anyone interested.Axel.

author: SundayProgrammer
author_rank: Contributor
timestamp: September 04, 2015, 03:45:15 pm
content: Quote from: AcHmed99 on September 04, 2015, 03:24:13 pmWhat a beast!

author: Kleinstein
author_rank: Super Contributor
timestamp: September 04, 2015, 04:09:32 pm
content: Using a FPGA todo DDS is an option if you need arbitrary waveform as well. But you likely still need a resonable qualitiy (>=10 Bit) DAC - that may not be much cheaper than the DDS chip. The sine Wave will normally be DDS stype, so with adder for the phase and a resonabel size Sin - table, not just stupid counter and table. With an arbitrary generator, one might even need an auxillary DDS, just to make the variable clock that controls the arbitray generator - here DDS inside an FPGA might be an adequate solution as a 6 Bit R2R ladder might be good enough.At the low end, there migh be the option to use a small ARM µC, to do DDS in software. Some even have a resonable DAC included. This like a skaled up version of the cheap AVR based sowftware DDS. Even than you need a low pass filter for resoanable performance.

author: Deathwish
author_rank: Unknown
timestamp: September 04, 2015, 04:29:36 pm
content: Quote from: SundayProgrammer on September 04, 2015, 03:45:15 pmgo to the uk farnell / element 14 site and its way more expensive and they have an eagle footprint for it which the one linked here doesn't. I dont get why there is such a price difference or why they haven't put the eagle footprint on the newegg site.http://uk.farnell.com/analog-devices/ad9106bcpz/dac-quad-12bit-180msps-32lfcsp/dp/2254929?jsValue=http%3A%2F%2Fwww.farnell.com%2Fcad%2F1713215.zip&jsAction=cad&skipCache=true

author: void_error
author_rank: Frequent Contributor
timestamp: September 04, 2015, 05:18:14 pm
content: Tweaked the filter. Each cap is two identical value caps in parallel. Is it better now?

author: void_error
author_rank: Frequent Contributor
timestamp: September 06, 2015, 08:54:32 am
content: Quote from: void_error on September 04, 2015, 05:18:14 pm... and stupid me designed the filter for 200 ohms instead of 300 and realized that after clicking the post button so he re-tweaked it and here it is:First zero is at 12.5MHz in theory, that'll vary with component tolerances.Ran into another small issue: I'm currently using a trimmer to cancel the DC offset after the filter at the DDS output but I'd like to automate that, so no tweaking is required, the MCU would handle the offset removal at power-on.I suppose I could use a precision rectifier and set the DDS to output 1kHz, get the offset value (minimum value of the rectified signal) using the on-board ADC then null the offset with a DAC.Using the circuit shown in Figure 3 ofthis document, the first op amp being the DAC's output buffer op amp.Does anyone see any drawbacks in using this?

author: void_error
author_rank: Frequent Contributor
timestamp: September 06, 2015, 05:37:05 pm
content: Quote from: void_error on September 06, 2015, 08:54:32 amReally stupid and expensive idea. Got a better one.Set the DDS to 10-100Hz triangle. Get the minimum and maximum amplitude of the triangle using the ADC. Average them to get the offset. Set a DAC output to null the offset then measure offset again and adjust the DAC output accordingly. Schematic coming as soon as it's complete.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 06, 2015, 07:46:06 pm
content: Correcting DC does not need a special test signal: there are 3 cases to handle:1) at high output frequencies (e.g. > 100 Hz) a simple low pass filter can be used to separate the DC offset from the output. The µC internal ADC could than measure it. The at the lower end the µC might use a digital filter (e.g. averaging over whoule periods) to improve.2) at rather low frequencies (e.g. < 10-100 Hz), the low pass filter is likely not sufficient. So the ADC should do the sampling of the rather slow signal and calculate the DC Offset from min/max values or averages.3) if the Frequency is very low (e.g. < 1 Hz), or as an initial value, the old DC offset is likely the best bet, as there is no measured new DC values available. So at startup a short test Signal might help, if no old value is saved.For amplitude control, some kind of rectifier / amplitude measurement might be helpful.

author: void_error
author_rank: Frequent Contributor
timestamp: September 06, 2015, 08:30:48 pm
content: Quote from: Kleinstein on September 06, 2015, 07:46:06 pmThe DC offset will be removed between the Cauer filter at the DDS output and the AD603. Not sure if those inductors like DC current through them...I'm assuming the removal of the offset just after the whole thing has powered on will be enough, I don't think it will vary much with frequency. There will be an option in software to recalibrate using the low frequency (10-100Hz) test signal as the offset will probably drift with temperature.I'm currently planning to use the PIC's on-board reference which is +/-4% over the -40C to +125C temperature range when set to 2.048V with some MCP4911 DACs. Another option would be a more stable 2.5V reference with a resistive divider, 220ohm & 1k gives 2.049V which is close enough but resistor tolerance and temperature coefficient will affect that.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 07, 2015, 08:27:02 am
content: Unless the inductors are extemly small form factor and even lagrer values, a small DC current is not a problem. It't rather hard to reach saturation at something like 1 mA. DC current is not more than AC peak current. Compensation before the filter is difficult anyway, as the DDS chip would then see negative voltages. Even passive adding at the filter output might be tricky - a little attenuation helps here. However as the AD603 seems to need a rather low input level, it should work.One will likely need DC adjustment before the VGA (e.g. AD603) to bring the DC level to 0 - here even a manual trimmer might be enough, as DC precission of the AD603 is not very good anyway.An intentional DC offset at the output would be a different thing, as this should be added after Amplitude adjustment. So it's difficult to use a single DAC to set output Offset and compensate the offset before the VGA. The offest will not change with frequency, but is might change a little with amplitude setting. So the DAC after the AD603 might be used to compensate DC errors from the AD0603 and maybe drift errors from the DDS.The MCP4911 and similar DACs are not very precise. So there is no real need to adjust the LSB steps to something like exactly 1 mV.

author: void_error
author_rank: Frequent Contributor
timestamp: September 07, 2015, 03:49:12 pm
content: Quote from: Kleinstein on September 07, 2015, 08:27:02 amI'm using theDL0603and according to the graph it'll do just fine at 1-2mA.QuoteThat's what the first DAC is for along with a suitable frequency op amp used as a buffer to adapt the filter's output impedance to the AD603's 100ohm input impedance. A second DAC is used to set the gain of the AD0603.QuoteIt'll be added after the AD0603. Since modern PICs have a lot of ADC inputs I can do a second calibration to remove the offset of the AD0603 just like I do it after the LC filter and this is where the third DAC comes in, removing the offset at the output of the VGA as well as adding the intentional DC offset.QuoteI know they're not that precise, but they're still better than the 8-bit DAC inside the MCU and they're quite cheap.A fourth DAC will be used to set the threshold of the comparator which turns the triangle into PWM and sends it out through a different output.So the first output will be capable of sine and triangle while the second one square and PWM (0-5V amplitude or maybe adjustable in steps like 0-2.5V and 0-3.3V), 10bit PWM being a bit overkill I think... might use the 8-bit DAC inside the PIC.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 07, 2015, 06:08:16 pm
content: The input of the AD603 is 100 Ohms, but there is no need to use a high input level. So there is no absolute need for an extra buffer between filter and the AD603. As far as I see it, one might even need an attenuator to reduce the amplitude if one wants to use the full range of the AD603. The DDS Chip can also drive a 100 Ohms filter - just at reduced voltage.A buffer will of cause help to isolate the DDS chip from the offset adjustment.For more DAC outputs, there is a dual outut version MCP4921.

author: void_error
author_rank: Frequent Contributor
timestamp: September 07, 2015, 08:23:56 pm
content: Quote from: Kleinstein on September 07, 2015, 06:08:16 pmI didn't pay attention to the output buffer gain - it's about 36 minimum which means I need to attenuate the DDS output more, 50 ohm instead of 200 maybe? Pretty easy to do since the DDS output is current not voltage. I'm planning to have a 2VPPmax signal at the AD603 output. Some math needs to be done here.QuoteYou mean MCP4912. Using three single output DACs instead of a dual and a single costs a bit more but simplifies the software and PCB layout a bit. One extra MCU pin for chip select isn't that big of a deal. For setting the duty cycle 8 bits should be enough - using the PIC16F1709 internal DAC buffered via one of the PIC's op amps.

author: void_error
author_rank: Frequent Contributor
timestamp: September 28, 2015, 08:15:58 pm
content: Apparently I haven't been able to do much with this project recently due to various reasons so it's gonna take me a while to finish it (I'm hoping this year).However, I've got this far:Changed the DDS chip again, now using an AD9835 because I want to go up to 10MHz.Still have to recalculate the DDS output filter for 66 ohms & 12MHz, that is to have a low enough input into the AD603 configured for minimum gain to get 4VPPoutput into 1k at 1V gain control voltage.Changed the MCP4911 DAC army for a singleAD5314quad 10-bit DAC.Using a REF191 as voltage reference for the PIC (2.048V) as well as DDS (divided down to 1.21V using 2k7 & 3k9 resistors).The output is driven by a whole AD8052 (both op amps) like it's suggested inthis application note, with a 100 ohm resistor at each output.Am I doing anything completely wrong here?By the looks of it there's very little chance I'm going to fit everything onto one PCB so I might split it, keeping the fast analog signals on one board. That LeCroy scope teardown gave me a few ideas.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 29, 2015, 04:35:44 pm
content: I don't think the AD8052 is such a good choice for the output. I would preferr a SO8 case and possibly higher supply voltage. With the output amplifier, it may not be such a good idea to use a dual OP, as power dissipation may be the limiting factor, at least at higher supply voltages. So cooling the chip can get important.Also the way of combining the signals is even simpler than in the application note: its two independent identical amplifiers with 100 Ohms each to give 50 Ohms output impedance. The signal for amplitude control and possibly DC control could be from two separate higher value resistors.

author: void_error
author_rank: Frequent Contributor
timestamp: September 29, 2015, 05:03:19 pm
content: Quote from: Kleinstein on September 29, 2015, 04:35:44 pmHaven't done the thermal calculations yet but that MSOP-8 package loaded with two op amps will probably not cut it at maximum output voltage & maximum offset. Two single op amps in SO-8 packages will probably be enough but I have to do the math first.If I want 20VPPat the output I'll need a +/-15V supply, won't need rail-to-rail (within a few tens of milivolts) output amplifiers but the power dissipated will be higher so that's why I'll stick with 5VPPand maybe +/-7.5V supply. Output offset will be adjustable between +2.5V and -2.5V when the output is up to 5VPPand fixed to 0 for anything higher, up to 10VPP. Regular output stage op amps should be within limits.EDIT: FoundAD826as a potential output driver. There's also theTHS4082but that's pretty expensive and theTHS4062in a MSOP-8 with an exposed pad which will help with getting the heat away from the die and into the PCB at a slightly higher price than the AD826, all of these are available atTME. I'm trying to avoid Farnell or RS Components because although they stock more types of parts the prices are higher than TME.I don't see any application where I might need more than 5VPPwith offset.QuoteHow would that DC control look like?

author: Kleinstein
author_rank: Super Contributor
timestamp: September 29, 2015, 06:20:19 pm
content: With the amplitude you have to consider that with a terminated cable you loose halve the voltage. So 5 Vpp would be on a high impedance only. So it might allready be difficult to get a valid TTL (or even 5 V CMOS) level on a 50 ohms terminated line with only +-5 V supply.

author: void_error
author_rank: Frequent Contributor
timestamp: September 29, 2015, 07:14:25 pm
content: Quote from: Kleinstein on September 29, 2015, 06:20:19 pmHow did I manage to overlook that?!Hmm... this makes everything more complicated. I will have to detect whether the load is high impedance or a terminated cable. Any thoughts on how to do that automatically (using the MCU)?

author: void_error
author_rank: Frequent Contributor
timestamp: September 30, 2015, 01:29:43 pm
content: Quote from: AcHmed99 on September 29, 2015, 10:53:11 pmIf that's the industry standard then I'm sticking with it, no reason to overcomplicate things.QuoteThe only need to limit the amplitude is at the TTL/CMOS output, which is basically the signal coming out of the DDS chip squared using a comparator. If I use a terminator it'll basically halve the voltage at the end so for a 0-5V signal at the terminator I'd need a 0-10V signal at the comparator (which has a 50ohm series resistor between its output and the BNC output connector). If I remove the terminator I will release the magic smoke. Sorry, I'm still almost completely clueless here...

author: Kleinstein
author_rank: Super Contributor
timestamp: September 30, 2015, 05:34:56 pm
content: Normally generators give the amplitude at a proper terminated output. Thus half of the open circuit voltage is given. Often there is the option to set / show open circuit volatage instead. If termination is different this is a problem for the user.If you want to drive a TTL / CMOS input from the FG there are mainly two options:1) use an unterminated line - so the open circuit signal should be something like 0.5 V / 3 V.2) use thermination at the input of the circuit board. This usually wil be a soldered resistor of about 47-70 Ohms. In this case loaded output should be the correct level. If termination is lost, this might get a problem to the circuit.Anyway detecting the real output level will likely not be fast enough to protect a simple logaic gate in all cases. Though logic circuits are often quite forgiving. Otherwise an unterminated line would allready cause trouble. At least extra protection of the output is not commonly found in FGs.So there is the option to monitor the output after the termination resistor - thus having some kind of SWR meter / impedance bridge at the output. It may be of some use, but I don't know a FGen with that feature.My main reason to mention termination is because this means the AD8052 will deliver no more than about 4.7 V_pp at the load, including DC offset.

author: void_error
author_rank: Frequent Contributor
timestamp: October 01, 2015, 06:06:04 pm
content: Quote from: Kleinstein on September 30, 2015, 05:34:56 pmYou probably missed this. I switched from the AD8052. It won't be used as an output driver anymore.Quote from: void_error on September 29, 2015, 05:03:19 pmThe THS4062 is tempting and there's also theLM6172.Not sure which of the above to use...

author: void_error
author_rank: Frequent Contributor
timestamp: October 10, 2015, 05:39:14 pm
content: Had half a day to work on the sine/triangle output stage. Some tweaking may be required and I might have done some things wrong so please point them out.Here's a simulation with some LT op amps similar (as close as I could find in LTspice IV) to what I found as candidates for the output stage. No bandwidth vs gain calculations have been done yet so I'm using a 5MHz input signal (at least 10x smaller than the bandwidth of the LT1363).

author: Kleinstein
author_rank: Super Contributor
timestamp: October 10, 2015, 07:52:20 pm
content: At high frequencies, it is not a good idea to have feedback over 2 OPs. I don't think there is need for an extra amplification stage.The way to get a 50 Ohms output signal from more OPs in parallel, is to combine the signal from equal amplifiers with resistors of 100 Ohm (for to amplifiers) or 150 Ohms (for 3 units). There is no feedback from the direct output, so the 100 / 150 Ohms resistors are part of the output impedance. Its also a good idea to have some amplification (e.g 2 times) at the output stage, as this usually gives a better stability.Usually 2 or 3 OPs should be enough for a 50 Ohms output signal.

author: void_error
author_rank: Frequent Contributor
timestamp: October 10, 2015, 09:38:23 pm
content: Quote from: Kleinstein on October 10, 2015, 07:52:20 pmThanks, I didn't know that, although I suspected there would be some issues with it...QuoteThat's what I thought about first, then decided to post this instead to get some feedback to whether it's a good idea or not. The number of output op amps will depend on how much power they can dissipate with maximum output swing into a short circuit with the 50ohm times number of op amps resistors in place of course.U1 will still need to be there for the offset to work, while U3 - U7 will have a gain of about 2.5 and the rest needs to be tweaked.And another question: Is it better to use the op amps in an inverting or non-inverting configuration?Oh, and thanks again Kleinstein

author: void_error
author_rank: Frequent Contributor
timestamp: October 11, 2015, 07:33:20 am
content: Quote from: AcHmed99 on October 10, 2015, 11:01:33 pmI thought it would be simpler to use op amps stability-wise. I found a few op amp current boosting circuits in thisapp note.QuoteHaven't built any waveform generators before (except a few op amp triangle/sine wave oscillators and 555 based things but nothing adjustable) so this is my first go at one.Initially I wanted to make something fairly simple but then as I began looking into DDS-based solutions I ended up adding several features which remove the requirement of tweaking trimmers with the tongue at the right angleand it got a bit complicated and at some point I was in a bit over my head.In the end it's not going to be under $50, it's going towards $150 but the stuff I learn in the process of designing this might be worth a lot more than that.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 11, 2015, 04:35:08 pm
content: The extra driver stage is easy at low frequencies, but gets difficult at higher frequencies. Tt's still possibly, though not that easy as the basic LF circuit.If the output current is not that large, so you can get away with 2 - 4 OPs in parallel, this is likely the easier way.Some commercial generators also chosse the way of having something like 4 OPs in parallel.There is also the option to buy a more beefy OP, like LT1206 / LT1210.

author: void_error
author_rank: Frequent Contributor
timestamp: October 11, 2015, 05:24:17 pm
content: Quote from: AcHmed99 on October 11, 2015, 04:49:43 pm10V into 50 ohms is 200mA which would make the BUF634 the perfect choice.Quote from: Kleinstein on October 11, 2015, 04:35:08 pmIf 2x THS4062 can handle the heat then we have a winner.I've also been doing some simulations with an op amp with its output current boosted by a 2N2222A/2N2907A pair and it seems to work well up to 10MHz which is the highest I want to go.

author: void_error
author_rank: Frequent Contributor
timestamp: October 11, 2015, 07:16:23 pm
content: Quote from: void_error on October 11, 2015, 05:24:17 pmFound something cheaper:LMH6321

author: void_error
author_rank: Frequent Contributor
timestamp: October 17, 2015, 12:12:16 pm
content: Finally, I have an almost complete schematic for the analog part, excluding the power suppliesAny suggestions, pointing out of mistakes and/or questions are welcome.EDIT: I may have accidentally left out some decoupling caps...

author: Kleinstein
author_rank: Super Contributor
timestamp: October 17, 2015, 04:20:37 pm
content: The comparator used for the square signal is rather slow. I would at least use something as fast as a LM311. Also the hystereses part is rather high impedance and thus slow.The digital output circuit might also like a small output resistor - just as an extra level of protection and to dampen refelctions if the IC internal diodes get active.I don't think separate comparators for PWM and square are needed - just adjust the PWM level to 50% to get the square wave. It might help to get some feedback one the actual PWM level to the µc. For low frequency square am extra divider (e.g. by 2 or 256) might be an option - this also ensures more acurate 50% on/off ratio than the simple comparator.The output of the LM317 / supply of digital output szage will need decoupling.Likely one can get away without the two amps U4.1 and U4.2, by just adding the bias to the output of the filter through a resistor. It slightly depends one the comparator used, as the comparator might be a significant nonlinear load.The output of U8.3 might want extra filtering (e.g. 100 Ohms+10 nF) to give a low impedance signal to the following fast OP.

author: void_error
author_rank: Frequent Contributor
timestamp: October 17, 2015, 06:18:45 pm
content: U8.3?! Damn you DipTrace, that's U8.2 and U8.2 is U8.1AD8611is a fast comparator but it's a bit pricey at $5... but I will use a LM311 if fast enough.For making sure the square wave output is square was planning at some point to add a D-type flip-flop to divide the frequency by 2, reducing the maximum frequency from 10MHz to 5MHz. No more separate comparators for square and PWM. However, I'll still have to switch between the comparator output and the flip-flop output.U4.2 is needed there for removing the offset from the filtered DDS output and U4.1 is a leftover used as a buffer.Noticed I screwed up the PWM comparator part... it shouldn't be receiving anything below GND. Using U4.1 as a DC amplifier to bring the DDS_OUT level into the 0...5V range should fix that.R4, R5, R6 & R17 will be tweaked so the input voltage of the AD603 stays the same, around 50mVP-P.Just saw I also forgot the decoupling for the LMH6321... will 10u MLCC || 10n MLCC do the job?

author: Kleinstein
author_rank: Super Contributor
timestamp: October 17, 2015, 07:26:30 pm
content: In my memory the LM311 was faster - the MCP6562 is allready faster. So it might not be fast enough, especially with such a small input level. So if there is an left over amplifier, the comperator should get somthing like a 1 V amplitude signal.the critical part will be short PWM pulses, which are difficult anyway, because there will be no clean fast trigangle.The MCP6562 has internal hystereses so the expernal circuit can be simpler.So if possible I would at least keep the option to upgrade to a faster comparator.There is no real need for an amplifier just to add the offset before the AD603. This can be done purely passive at the low level. Just the controll signal needs to deliver somthing like 1 mA.Aus für choosing the source of the digital output, I would consider a MUX chip - this would allow for 2 more sources, like PWM from the µC or divided square for even lower frequencies. Using the comparator at less than kHz range might not give very good results, as the slope is rather slow and thus jitter may be higher than needed.

author: void_error
author_rank: Frequent Contributor
timestamp: October 17, 2015, 08:39:30 pm
content: Quote from: Kleinstein on October 17, 2015, 07:26:30 pmHow? I need to remove the DC offset before the AD603 which is what U4.2 is for.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 18, 2015, 09:18:15 am
content: To get rid of the offset, one can just add a negative 1 mA current to the DDS output by a resistor and negative voltage (ideally derived from Vref of the DSS chip). R3 needs to get a little larger than. So one might still need an OP to generate the suitable negative voltage, but this one is essentially DC. I would not expect much drift here, so one might not need to controll the offset via DAC/ADC. A small residual offset could be compensated after the AD603. The down side is that the DDS chip will see a small negative voltage sometimes negative part of wave, but this is not a problem with a low impedance filter and thus low amplitide (e.g. 100 mV).Looking at the amplitude, I am not shure the resistor values are correct: at 2 mA peak and effectively 50 Ohm impedance (at least DC / LF), I would not expect 100 mV peak/peak on both sides of the filter.Alternatively the offset could also be compensate directly at the AD603 input with a divider, R17 and an additional resistor to a negative voltage.

author: void_error
author_rank: Frequent Contributor
timestamp: October 18, 2015, 09:54:43 am
content: Quote from: Kleinstein on October 18, 2015, 09:18:15 amI'd rather not have the DDS IOUTswing below GND, that's why I used an op amp. Removing U4.1 is not a good idea either because the low input impedance of the next stage (U4.2) will influence the voltage at DDS_OUT.QuoteI goofed that one up too, used 100ohm instead of 50ohm in one place. That means DDS_OUT will swing from almost 0 to about 193.910mV.QuoteThe AD603 has a 100R resistor at the input, between VINP & COMM, not sure how that will affect the operation of the divider.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 18, 2015, 11:01:31 am
content: At low frequency the DDS output will see the resistors at both sides of the filter in parallel. So with 100 Ohms at both sides there will be a 50 Ohm impedance. A proper dsigned filter schould keep the same amplitude also in the rest of the pass band.The low input impedance of the amplifier around U4.2 is not a problem. One can just see this as a part of the terminating impedance of the filter. So one has to reduce R4 acordingly that R4 in parallel with the input impedance of the following stage would give the 100 Ohms. This could go so far as having the differential amplifier with 100 Ohms at the input and no resistor where R4 is. Because of the limited bandwith of the amplifier it's likely still a good idea to have R4 and a higher input resistor for the amplifier.The input resistance of the AD603 will not chance anything on a divider used to compensate the offset. At zero offset there will be not DC current to ground. The input impedance just reduces the amplitude and the size of any uncompensated offset.

author: void_error
author_rank: Frequent Contributor
timestamp: October 20, 2015, 08:15:15 pm
content: Just to make sure I don't screw up the gain calculations I made a spreadsheet in OpenOffice.It calculates the output voltage of the DDS, AD603 and the LM6172 + LMH6321 output stage gain.I'll be tweaking the offset part towards the end of this week.

author: void_error
author_rank: Frequent Contributor
timestamp: November 03, 2015, 06:53:13 pm
content: The signal generation and power supply parts are almost done. The Cauer filter has been redesigned yet again. What's left would be to start working on the microcontroller part and writing some firmware for it.I still have no idea what to do about U22's output in case of short circuit. Add more gates in parallel each with its own current limiting resistor?Anyway, here's what it looks like now:

author: vinicius.jlantunes
author_rank: Regular Contributor
timestamp: December 15, 2015, 04:41:38 pm
content: Subscribed.

author: Kalvin
author_rank: Super Contributor
timestamp: December 15, 2015, 04:45:49 pm
content: Quote from: void_error on November 03, 2015, 06:53:13 pmYou may want to add a 50 ohm series resistor to the U22's output so that the output impedance will match 50 ohms. Thus, you will also get at least some current limiting functionality.

author: Howardlong
author_rank: Super Contributor
timestamp: December 15, 2015, 05:04:24 pm
content: Edit, sorry I appear to have necroposted, apologies/Quote from: AcHmed99 on August 22, 2015, 11:04:12 pmI've been there with PIC DACs, _and_ using the onboard opamps. In short, neither the DACs themselves nor the slew rates of the opamps are enough to do a sampling rate of anything much over few hundred kHz.The best I achieved was with a PIC24FV16KM202 which has dual 8 bit DACs, and as has been stated, loading on the DACs must be minimised or the waveforms is severely distorted.I did get a reasonably good scope clock and asteroids running on it though, ISTR I had to limit the sampling rate to about 100kSa/s or the probe capacitive loading led to smearing.

author: Howardlong
author_rank: Super Contributor
timestamp: December 16, 2015, 07:21:41 am
content: Apologies, as mentioned in the edit at the head of the post, I realised soon after the post that the conversation I was referring to was old and had moved on.

author: void_error
author_rank: Frequent Contributor
timestamp: December 18, 2015, 08:05:10 pm
content: Quote from: Howardlong on December 15, 2015, 05:04:24 pmNecroposting? My apologies for not keeping this thread alive as I was busy with work... and also the last schematic I posted is a bit outdated...Anyway, nice vid!I still haven't decided what MCU I'll use but it's definitely going to be one with USB. Haven't abandoned the project but I'm a bit busy with other things at the moment. If it has a DAC it'll be used to set the current limit for the LMH6321.

author: void_error
author_rank: Frequent Contributor
timestamp: April 25, 2016, 04:50:55 pm
content: Back to this project again...The Square Wave / PWM output will no longer use the signal from the DDS, going to use the a PWM output from the micro that's going to control the User Interface (LCD/Buttons/Encoders, which will be shared by a few projects like a Modular DC Electronic Load , a Lab Power Supply and maybe others), which will be a separate board. An ADC will be used to provide the UI micro with the voltage offset feedback (OFFSET_FB) as well as the actual DC offset at the input of the VCA (NULL_FB) via SPI.To reduce the number of Chip Select lines on the connector going to the UI board I'll be using a MCP23S08 which will also handle the EF signal from the LMH6321 and set the Square Wave / PWM output level via Q1 & Q2.USB will be added some time later in the form of a PIC16F1454 running some code based on the CDC example from the Microchip Libraries for Applications.Am I biting off more than I can chew?

author: grants225
author_rank: Newbie
timestamp: April 29, 2016, 12:11:14 pm
content: Quote from: void_error on April 25, 2016, 04:50:55 pmI am not familiar with PICs, but run into problems with Atmega doing that. It will be quite hard to run programm code to check buttons, encoders, update lcd and avoid conflicts with PWM rutines. I would sugest to go for separate small micro (kind of attiny 20MHz or PIC equivalent) for PWM. I also whould suggest to add fast pulse out on that micro (changes OC1A pin), which can provide fout up to Clock / 2 MHz.

author: Kleinstein
author_rank: Super Contributor
timestamp: April 29, 2016, 01:09:50 pm
content: The PWM output from the µC can run in the background as long as you stay within the 16 bit range of the hardware timers. If you need extended resolution it can get tricky.However the output from the DDS and comparator is still different and sometimes superior, as it can give fine frequency adjustment, just as for the sine wave. The PWM output from the CPU has only coarse resolution at high frequencies - so it is not a full replacement.

author: void_error
author_rank: Frequent Contributor
timestamp: April 30, 2016, 03:02:45 pm
content: Quote from: grants225 on April 29, 2016, 12:11:14 pmMost of the code will be interrupt driven. ThePIC16F18855(or its bigger brothers) which I'll most likely be using has a ton of core-independent peripherals so there won't be too much coding. It also has a NCO (Numerically Controlled Oscillator) module which I will probably use for the square wave once I fully understand how it works (not that difficult).Another nice feature of this micro is the PPS module which allows assigning different peripheral inputs or outputs to I/O pins which will allow me to switch between NCO output and PWM output on the same I/O pin.Going to start a topic on the User Interface Project at some point in the near future, after I get most things figured out.Quote from: Kleinstein on April 29, 2016, 01:09:50 pmI'm aware of that but decided I don't need very high resolution for frequency or duty cycle and I don't need continuous frequency adjustment either, preset values will do.PWM modules start at 10bit resolution which goes down as you increase the frequency.For Fosc = 32MHz the PWM module's minimum output frequency would be slightly below 2kHz for the older PICs because of the limited Timer2 clock prescaler values (1, 4, or 16). However the one I'll be using has prescaler options ranging from 1 to 128 which means I can have the PWM output down to 250Hz. That'll do. I'm also ok with 1% steps for duty cycle.