EEVblog #1193 - KiCAD PCB 4 Layer Swapping & Stackup - Page 1
Forum section: electronics / general

author: EEVblog
author_rank: Unknown
timestamp: March 23, 2019, 09:56:33 pm
content: More on the Gigatron 4 layer PCB for EMC compliance testing. Swapping the inner and outer plane layers, experimenting with KiCAD and investigating several issues with the tool.Talk on gerber generation, PCB checklists, PCB design for manufacture, PCB stackup, and uploading to JLCPCB for 4 layer manufacture.

author: ales22
author_rank: Contributor
timestamp: March 24, 2019, 02:45:36 am
content: Hello. What's going on? Why is the video unavailable?

author: Brumby
author_rank: Unknown
timestamp: March 24, 2019, 02:48:58 am
content: This happens occasionally... Dave finds something in the video he wants to fix, so it is taken down and will be re-uploaded when he's done.Could take a couple of hours to a day or so ... but it will come back.

author: ales22
author_rank: Contributor
timestamp: March 24, 2019, 03:41:34 am
content: Ah. Thank you.

author: LapTop006
author_rank: Unknown
timestamp: March 24, 2019, 05:17:35 am
content: As I mentioned on a youtube comment my guess about the unconnected pad is that the zone doesn't go through the center of the the pad so isn't considered connected.When this has happened to me I just run an extra trace just in case.

author: EEVblog
author_rank: Unknown
timestamp: March 24, 2019, 05:19:05 am
content: Quote from: Brumby on March 24, 2019, 02:48:58 amNot this time.It never finished processing after a day, still only 360p. Pointless watching in 360p only. Something weird is going on with Youtube, reports of similar issues with other creators.Reuploading to try and fix it.

author: LapTop006
author_rank: Unknown
timestamp: March 24, 2019, 05:27:14 am
content: Quote from: EEVblog on March 24, 2019, 05:19:05 amWas playing at 720p for me last night?

author: EEVblog
author_rank: Unknown
timestamp: March 24, 2019, 08:53:49 am
content: Re-uploaded and now processed fine, new video embedded above.

author: EEVblog
author_rank: Unknown
timestamp: March 24, 2019, 08:54:52 am
content: Quote from: LapTop006 on March 24, 2019, 05:27:14 amA few others reported also seeing processed version, but most couldn't and Youtube video manager never showed it as not processed yet.

author: Barny
author_rank: Frequent Contributor
timestamp: March 24, 2019, 03:08:20 pm
content: Is this video not listed on purpose?

author: EEVblog
author_rank: Unknown
timestamp: March 24, 2019, 11:43:57 pm
content: Quote from: Barny on March 24, 2019, 03:08:20 pmYoutube screwed up and would not process it, I had to reupload.

author: EMC
author_rank: Contributor
timestamp: March 25, 2019, 12:05:05 am
content: I once heard that emissions reduce by 6dB for every 2 layers added. Really looking forward to see if this is similar. However, more than half the fails I see are from common mode radiation from cables and cable shields. I hope the design of the EMI test takes this into account; and, reveals good ways to avoid these fails.Swapping continous internal power layers to top & bottom may be impractical. But, if a clock oscillator has a high frequency harmonic EMI fail, perhaps this could be done locally just at the xtal?

author: langwadt
author_rank: Super Contributor
timestamp: March 26, 2019, 12:13:43 am
content: I see you are starting to warm up to Kicad

author: EEVblog
author_rank: Unknown
timestamp: March 26, 2019, 01:21:24 am
content: Quote from: johnlsenchak on March 25, 2019, 04:13:33 am2nd warning John, I have asked you to stop this, it is getting very tiring.

author: wilfred
author_rank: Super Contributor
timestamp: March 26, 2019, 02:30:54 am
content: Quote from: langwadt on March 26, 2019, 12:13:43 amI was having the same thought.If the developers are watching they might get terrific feedback from someone with credible experience. There can't be many Kicad users coming to Kicad from a dominant industry package direction.

author: Brumby
author_rank: Unknown
timestamp: March 26, 2019, 03:05:52 am
content: Quote from: johnlsenchak on March 25, 2019, 04:13:33 amIf you don't like it then don't watch it - and feel free to keep it to yourself. You aren't likely to influence Dave on his subject matter, style or content by being negative. Youarelikely to piss him off more and more for no good reason.Dave doesn't need to know your personal opinion about particular videos. Everything he needs to know is encompassed in the stats he gets. If, for some reason, he wants to know more information, I'm surehe will ask(as he has in the past). At the time of writing, by just looking at the like/dislike ratio ofthisvideo, for every 1 person who did not like it, there were75whoDID.

author: Heartbreaker
author_rank: Unknown
timestamp: March 26, 2019, 10:32:29 am
content: I really enjoy watching videos that are the result of a "What if ...?" question. They often answers basic questions that we all ask, but no one gets around to actually test.If this board ever get to a EMC test-house and an A to B comparison to the other board will be made, my guess is that some of the dominant radiated frequencies will be attenuated.But I see a weakness in swapping the layer order. The edge is still open and even though making a fill on the top layer and stitching it to the button layer have addressed this there is still a slot between the two fills. This slot is very much comparable in size and shape to the opening on the board edge, so my guess is that this is where the board will radiate from. Luckily this can easily be circumvented with the changes Dave made. In an ideal world, the two power planes can be (AC) shorted by multiple small capacitors preferably each placed close to a via and at the same rate as the via stitching. This deviates somewhat from "just swapping the layer order", though.Just my $0.02/Sverre

author: luma
author_rank: Regular Contributor
timestamp: March 26, 2019, 02:43:33 pm
content: I really enjoyed this video as a neophyte PCB designer who is reasonably familiar w/ KiCad. Watching Dave, who is an expert on PCB design but is still learning KiCad, has taught me quite a bit about the sorts of workflow patterns that an expert would expect to be using and how to get things done in KiCad. Great video!

author: Tantalum
author_rank: Regular Contributor
timestamp: March 26, 2019, 04:35:41 pm
content: mmh where is the link to the previous video you mention at the beginning???edit:oh, ok video #1176

author: nctnico
author_rank: Super Contributor
timestamp: March 26, 2019, 04:43:25 pm
content: Quote from: EMC on March 25, 2019, 12:05:05 amI've never heard of getting 6dB attenuation for adding extra layers. It is all about the currents flowing through the layers. If you have a high speed signal running on the top layer and a ground plane on layer 2 then the HF return current will run through the ground layer along the trace. So in theory it shouldn't matter whether the ground plane is on the outside or the signal is at the outside. The magnetic field you pick up from the signal should be in the same ballpark. For shielding to work it should be connected at points of the circuit which have no current running between them.

author: Daixiwen
author_rank: Frequent Contributor
timestamp: March 27, 2019, 08:41:04 am
content: I've never used Kicad, but that last DRC failure that won't go away, couldn't it be because the center of the pad is slightly outside the polygon, and that makes Kicad think that it is not connected to the plane?

author: wilfred
author_rank: Super Contributor
timestamp: March 27, 2019, 09:07:32 am
content: Quote from: Daixiwen on March 27, 2019, 08:41:04 amI'm certainly no KiCad expert but I had a look at 36:08 where you get a view of the entire edge with connectors. There's no exception to contradict your theory. It's certainly consistent with the changes Dave was making pulling back the plane from the edge. It shouldn't be too hard to test it.If Dave doesn't confirm it, how confident are you?

author: GreggD
author_rank: Regular Contributor
timestamp: March 27, 2019, 04:17:00 pm
content: If the ic pins have the same pad size on all four layers then all that is needed is to rename the gerbers. Done.

author: EMC
author_rank: Contributor
timestamp: March 28, 2019, 12:28:05 am
content: I think its credible for radiated emissions to go down where the emission is radiating from an unintended current loop on top or bottom. Moving them to inner layers effectively shields the current loop. Down side is that conducted emissions on power lines or attached cable shields may go up. The proof will be in the test result.

author: mrpackethead
author_rank: Super Contributor
timestamp: May 01, 2019, 12:02:30 am
content: Thishttps://www.rtl-sdr.com/using-an-rtl-sdr-and-opencv-to-create-an-emi-heatmap-of-circuit-boards/is pretty interesting.. Takes the DAve model and then combines it with some video/software mapping to create heatmaps.

author: Tantalum
author_rank: Regular Contributor
timestamp: July 15, 2020, 07:01:26 pm
content: HelloHas Dave finally done the radiation measurements with this PCB with signal traces in the inner layers of the PCB???I'm curious to see the results but I can't find the video :S

author: EEVblog
author_rank: Unknown
timestamp: July 16, 2020, 12:33:13 pm
content: Quote from: Tantalum on July 15, 2020, 07:01:26 pmNo, but just today I organised something quite exciting on this front. Happening possibly as early as next week. I'll be getting access to a really interesting bit of test kit.