Simple questions about buck converter design - Page 1
Forum section: electronics / general

author: zphaze
author_rank: Contributor
timestamp: January 01, 2020, 08:08:07 am
content: Hi,I want to start a new design with a Sitara AM437x MCU, and I need to power the MCU with a buck to step down say 12V to 5V, 3.3V and 1.8V.I'd like to hear your comments on how to do it properly as I'm relatively new to this (PSU design). I want to do it right basically, because I care.I chose what seems to be a good regulator IC (AOZ1284), cheap price. If anybody has suggestions for a better one by the way, tell me!1)What I wonder is, since SMPS converters by definition are noisy at PWM generator harmonics, should I filter it with a dampened (butterworth response) RLC filter? Do you think it's worth the time, effort, money to do that for a digital MCU?2)Again, for the digital (MCU) part, I wonder what you think about what's the best pratice for stepping down 12V to 5V 3.3V 1.8V. Would you just chain the bucks one after the other (perhaps even use a LDO on the 3.3V to get the 1.8V?),or would you go for 3 separated bucks stepping down the 12V to their respective voltages? What is the standard practice here? What's the most easiest-yet-well-done way?3)Say one wants to do a filter regardless (because beside the digital part, MCU part, I have other isolated-from-digital PSUs to create (with SMD transformers) for more pricision-critical stuff with OP-amps and sigma-delta converters).I read one can do a filter by putting it inside the regulator's control loop (i.e. just before the feedback path and the output) in order to eliminate the effects of the resistance R, so that voltage does not drop as load current increases.Only problem is... you change the regulators transfer function and it can affect stability, which could be problematic (I understand it can still be unlikely but I like to know where I'm going).Besides, I don't have the transfer function of the buck IC so I wonder... are there any standard practices for designing such filters (in-loop)? Would you think it matters much or do you think the stability margins are enough?Basically I wonder if anybody has experience with that and could guide me a bit.Thanks for any helpNo need to answer all 3 questions btw if you dont know all of them, any help actually helps

author: MagicSmoker
author_rank: Super Contributor
timestamp: January 01, 2020, 12:21:32 pm
content: Quote from: zphaze on January 01, 2020, 08:08:07 amNo, you definitely don't want to use a >2nd order filter in a switcher - that's a recipe for oscillations if under-damped, or terrible efficiency if critically damped to over-damped. Furthermore, the buck has a generally quiet output already because the inductor comes after the switch (it does reflect quite a bit of noise back to the source, however). Additionally, MCU's - even those with an internal ADC - don't need particularly quiet power supplies, anyway. If you need to use the internal ADC and are concerned about noise/accuracy then the best solution is to supply the reference input pin with ultra-clean 5.00V (or whatever) via a precision reference like the LM4040 series or the like.Quote from: zphaze on January 01, 2020, 08:08:07 amDaisy-chaining switchers together is a great way to make an oscillator as a result of running afoul of both the Middlebrook and Nyquist stability criteria (basically, Zout and loop bandwidth of the upstream converter need to be higher than those of the downstream one, respectively). These criteria can be violated with some care, but with the inevitable consequence that the resulting system is metastable.Unless you are drawing meaningful current from each rail voltage - by this I mean more than 1A or so - then a safer scheme is to use one buck to drop 12V down to 5V then use standard or LDO linear regulators to derive the other rails from the 5V one. If one or more rails besides the 5V one requires significant current then a separate buck operating in parallel might be safer, but then you have to contend with unwanted resonances between the inputs which might require parallel damping (ie - a resistor in series with a DC blocking capacitor across the input rails).There are other possible solutions, of course, but nothing I'd recommend for a first-time smps designer.Quote from: zphaze on January 01, 2020, 08:08:07 amSee above about using a separate precision (understood to be linear) regulator IC to supply the analog/mixed-signal parts of the MCU.The question about the transfer function of a buck is getting a bit ahead of things. First figure out what rails need the most current then decide on a strategy to generate them then worry about closing feedback loops.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 01, 2020, 02:55:59 pm
content: Quote from: MagicSmoker on January 01, 2020, 12:21:32 pmCome on, man, I do this all the time!But yeah, 2nd order is generally adequate for digital stuff.Don't forget input filtering! The input is noisier, in the sense that it gets 100% current interruption. The output gets 100% voltage interruption, but is filtered by an LC. Do pay attention to layout: keep capacitor ESL low and avoid crossing the switching loop ground path with other signals. (Effectively, these tips preserve/extend the frequency range where the lowpass filter can still be expected to lowpass; cap ESL and ESR, ground loop and stray induction, effectively put zeroes in the transfer function, feeding forward noise at frequencies well above Fc.)QuoteWell, don't make it sound like it's hopeless and only idiots do it. (I've done it numerous times, though my idiocy is yet to be seen.)As for supplies, if efficiency isn't a big deal (say, an extra watt or two dissipated?), and the current draws add up, I'd suggest a 5V buck, 3.3V LDO, and 1.8V buck or LDO.Heat dissipation depends on board area and heatsinking; if you're limited on either, go for efficiency.Pay attention to the startup sequence between all three. A lot of devices these days are easy to use, so that you don't have to mind sequence (start up in any order), but always check to be sure.If for example 1.8 has to be simultaneous or after 3.3, then cascading the 1.8V regulator off of 3.3V can be a good idea. And if it's all of like 10mA, who cares (which, battery life might care, for example). You can also use regulators with PGOOD outputs chained to EN or SS inputs, to get the same operation without needing direct cascading.If this is high efficiency (long battery life, or high current demand), all buck, from the common 12V supply. This is the power network used in most laptops: a common higher-voltage rail supplies everything (typically 14-19V in their case), and local regs with enables are set up (and sequenced) as needed. That ranges from 5 and 12V at a few amperes for peripherals (drives, audio amp probably, etc.) to the 1V 50A+ needed for the CPU (typically a multiphase buck).Or again, making the 5V rail first, and deriving the others from it, can still be a good deal. Regulators with 5-7V max. input can be quite fast and efficient, and that could potentially save over independent channels (whereas, at least naively, you'd expect cascaded stages to be very inefficient, because you're basically squaring the losses).Don't neglect issues of input voltage range, transients, and so on. If this is automotive 12V, for example, you may or may not need to continue operation at 6V (cranking voltage), or withstand momentary excursions to -12V (reversed jumping) or +24V (jumping from 28V system) or load dump (swell to 50V with lots of amps available).If internal battery, of course you get a much more comfortable environment than that; subject to the whims of the charger, of course. Good idea to have that internal as well, so that everything is well known. That leaves only the charging input as subject to questionable external voltages, a much easier and less critical (and less priority to efficiency?) proposition.Tim

author: MagicSmoker
author_rank: Super Contributor
timestamp: January 01, 2020, 05:20:53 pm
content: Quote from: T3sl4co1l on January 01, 2020, 02:55:59 pmyeahbut... you aren't, "relatively new to PSU design," like the OP!Still, if you find you need a 4th order filter to clean up your switcher then it might be worth considering a resonant topology. Of course, that brings in its own set of complications...Quote from: T3sl4co1l on January 01, 2020, 02:55:59 pmSure, this is done all the time - pretty much every SMPS with a PFC front end, for a notable example - but, again, I'm keeping in mind the OP's experience level. Daisy-chaining a 1.8V buck off a 3.3V buck off a 5V buck is just asking for trouble. Not just oscillations/instability but also problems with downstream converters pulling too much current from the upstream ones during startup. It can get to be a real headache, and a questionable endeavor regardless of ones skill level if it only saves a few watts.

author: zphaze
author_rank: Contributor
timestamp: January 03, 2020, 04:09:12 pm
content: Thanks you for taking the time to answer, appreciated. This is essentially a PCB design used for relay transformers with Rogowski coils (so we'll do current sensing with high precision sigma delta modulators and voltage sensing).Essentially this system is connected to high power lines (through a special alimentation). It's for a end-of-major project with a real company. So now thinking about it, I don't think indeed I need a buck for 3.3 or 1.8 because I'll save a few watts thatbasically don't matter but still I just want to do things well.Quote from: MagicSmoker on January 01, 2020, 12:21:32 pmI'm surprised about this. For example this filter here:AFAIK it's a common topology in use with bucks.Shouldn't the efficiency be already good regardless since the capacitor will be open circuit in DC? Normally I'd just use a filter design table and solve for butterworth given the transfer function. Of course, the Middlebrook criterion forces to have Zout(f) < Zin(f), which I shall insure. But besides that, wouldn't that be enough?Quote from: T3sl4co1l on January 01, 2020, 02:55:59 pmWould you recommend more a filter at the input? (I suppose adding a filter at the input increases Zin its safer for the Middlebrook criterion?)If you do it often, would you mind perhaps sharing an example of what you usually do hereQuote from: T3sl4co1l on January 01, 2020, 02:55:59 pmWould adding RC circuits in between the bucks to affect startup sequence sufficient? I recall talking to an engineer who was doing that at a past internship.Mind, at this point I'm asking more for the sake of my own comprehension (given your answers, I simply don't think I'd need that to filter much finally, after all what's a few W more power consumption in a relay transformer?). I like understanding what I do, simply put.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 03, 2020, 06:38:43 pm
content: The keys to a power supply filter are: adequate attenuation, and stability.Attenuation is not tightly constrained. For example, limits might be set by the susceptibility of upstream or downstream systems, or EMI limits, and the expected emission level of the switcher.Stability has a number of facets. As mentioned, impedance within the SMPS loop bandwidth must be low; it should also be low in general, so that switching transients, and transient changes, do not violate the output regulation requirements.The converter impedance can be quite high or low, which makes terminating a filter difficult. It is often useful to introduce resistance, typically in the form of damped capacitors or inductors.As a consequence, traditional filter types aren't terrifically important (or easily synthesized, for that matter, given the uncertain impedances).You might tend to avoid high-Q filters like Chebyshev, because the peak impedance in the transition band can be poorly behaved; but a softer version, terminated with an R+C say, might be more tolerant of errors while delivering a sharp cutoff needed to meet a tight limit (such a limit in turn being motivated by maximum attenuation with a minimum filter size or value, say).Butterworth has the interesting property that it's self-dual, making flat crossovers (diplexers) possible. Not terrifically useful to power supplies but useful when it is.Bessel-like filters have low Qs, the transition band is wide -- so they are very tolerant of errors.Because we aren't filtering to preserve signal quality, we can design filters without care for flatness or group delay. Other priorities, like size and cost, can dominate. A typical example might be a bulk filter C to absorb a nominal amount of ripple (at Fsw and low harmonics); its ESL and ESR transmit some high frequencies however (zeroes in the transfer function), for which we might add a small LC to "take the edge off". Effectively, a filter with a low pole/pair, and a really high pole pair.General network analysis theory is helpful, which doesn't need to be the full heavy-weight theory; a hand-waving approximation will do. Awareness that there exist filter types with one unterminated port (open or short), and damping them in an arbitrary-impedance environment by using R+C or R||L elements in appropriate locations.Understanding common mode and differential pathways is particularly important in general supply application -- isolated and AC-DC supplies in particular. Simple common-ground DC-DCs aren't so hard to work with, but ground loop can still be a problem in that case.Tim

author: MagicSmoker
author_rank: Super Contributor
timestamp: January 03, 2020, 11:32:59 pm
content: Quote from: zphaze on January 03, 2020, 04:09:12 pmSure, parallel damping is commonly used (even if you don't realize it - the ESR of the typical elko forms a stealth parallel damper), but note that what is shown in the circuit you linked to is a bog-standard LC (2nd order) filter, not a 4th order Butterworth or whatever.I see T3sl4co1l has already touched on this (in his inimitably erudite yet oblique way) but suffice it to say that without a well defined input and output impedance you can't really ensure a particular transfer function. Hence no one ever designs a Butterworth or Bessel or whatever filter for an SMPS. In fact, 99% of the time you just use a straight LC filter, often with the L participating in the switchmode conversion process (ie - acting as both energy storage and filter element). The other 1% of the time the main LC filter will be followed by another LC filter but with a 10x or higher cutoff frequency to better attenuate the higher frequency artifacts that might make it past the main LC filter's relatively high parasitic capacitance (of the L) and inductance (of the C).Quote from: zphaze on January 03, 2020, 04:09:12 pmDamping is, by definition, a dissipative process, so if there is significant ringing that needs to be damped then efficiency might be very poor, indeed (strongly pointing towards fixing the problem rather than plastering over it with a damping network). The capacitor in the parallel damping network is, indeed, just there to block DC - otherwise the damping resistor would inevitably draw more power than the load itself! - but again, significant power can still be lost in the damping resistor if a lot of AC current flows through as a result of poor layout or the like causing lots of ringing. It probably should be emphasized at this point that parallel damping is mostly used to tame oscillations occurring at a much higher frequency than the switching (usually) or to suppress interaction between paralleled converters, and not to reduce the normal switching ripple.