DC/DC Buck Boost Layout - Page 1
Forum section: electronics / beginners

author: beastmanrage
author_rank: Newbie
timestamp: November 12, 2012, 12:17:53 am
content: Hi EEVBlog,I'm having trouble properly isolating the TPS63031 Buck Boost IC:http://www.ti.com/product/tps63031The Datasheet states on page 17, "Use a common ground node for power ground and a different one for control ground to minimize the effects ofground noise. Connect these ground nodes at any place close to one of the ground pins of the IC."The GERBER files for multiple evaluation modules are helpful but I'm not sure how they would apply to my layout, please see attached.It is a 4 layer design with stack: SIG GND PWR SIG

author: titam
author_rank: Contributor
timestamp: November 14, 2012, 02:51:05 am
content: I believe they're trying to tell you to keep high switching currents from the power side of the IC away from the control side. The control side will be sensitive, and the high switching currents from the inductor side can disrupt the operation.It worries me a bit that GND, PS/SYNC and PGND are all tied to only the single point under the package. It seems to be asking power ground current to affect the control ground pins.After looking at it for a bit, I would be inclined to keep PGND connected to the DFN under-pad, but disconnect GND and PS/SYNC from that pad. Pour a top-layer plane that encompasses the input and output capacitor grounds and the DFN thermal pad, but not the GND or PS/SYNC pins. Call it "power ground".Expand the "power ground" flood as much as reasonable. Fire a lot of vias into it, including around the input/output capacitor ground pads on the left and right and maybe even inside the inductor footprint at the bottom. Place as many vias as you can - try for super-low-impedance ground on those bottom 5 pins plus the heatsink pad.Then move whatever that top-side component is - a resistor jumper? - and bring GND and PS/SYNC up on short tracks ending in vias to the ground plane. You will have to move that component a bit, that is OK. Grounding them "separately" should help keep switching-side currents from affecting them.Also flood your bottom layer with ground plane, if you have not already done.If you do all that I'd say you have a pretty good chance of having a good solid ground even if you don't really have separated "planes".You also want to be careful about putting five vias under the DFN. It may compromise the solderability of the package, as vias tend to wick the solder away. (Same goes for U1.)It would be more certain to move the vias out from under the DFN and place nearby, in order to maximize the soldering of the DFN heatsink pad and maximize thermal performance. This is easy to do once you have your "power ground" plane in place - the plane should cover the DFN under-package pad as well as the ground pads for all three power caps. The plane and vias will help pull heat off the DFN.Your board stuffer may say that the five vias under each DFN is OK. If so, then all right, but YMMV. You can't inspect those joints after placement unless you have X-ray.To do all of this will require some shoving of your other layout sections, but not too bad. You have space."Power ground" and "control ground" will only be concepts in your mind - your EDA package will not know to separate the netlists. But I'm sure you can manage.Just my $0.02.