ESD protection in IC - Page 1
Forum section: electronics / beginners

author: loop123
author_rank: Frequent Contributor
timestamp: February 11, 2024, 11:21:17 pm
content: I saw the INA114 amp as having +-1500V ESD protection. What is the maximum possible voltage of an electrostatic discharge? If it is +-1500 protected. Does it mean you no longer have to use ESD Mat and wrist band.Btw.. what is the real purpose of ESD wrist band. It has a 1 megaohm resistor inside it. I always have to wear it when holding any circuit. What does the wrist band really do? Why has it got a resistor inside?Also if ESD it can reach say +-5000V, then those ICs with +-1500V ESD rating won't be protected?What is the highest ESD rating you have seen in a chip? Like is there 10kV ESD protection for example?I saw also ICs without protection. How many percentage of amps have ESD protection and not. Thank you.

author: ataradov
author_rank: Super Contributor
timestamp: February 11, 2024, 11:41:29 pm
content: You can see that there is a model (CDM or HBM) specified. This is a specific type of test setup. You can look up the specific circuit used for the test discharge.You have to use ESD protection, since your body can produce much higher discharge.The minimum specification is typically ~500 V (for CDM). And the maximum is usually 2000-4000 V (for HBM).And usually the simpler the device, the higher the protection because they can afford larger die area. So you will see highest levels on bus transceivers, for example. I just looked at a couple USB transceivers and they specify 8 kV HBM. It also helps that device is being exposed to the outside, so better protection is required.All CMOS ICs will have this protection, they may not specify it in the datasheet, but they all will have it.1 M is enough to drain the charge (or rather prevent build up), but it is high enough that it would not conduct meaningful current if you touch the live wire while wearing the strap.

author: MarkT
author_rank: Frequent Contributor
timestamp: February 11, 2024, 11:59:51 pm
content: Quote from: loop123 on February 11, 2024, 11:21:17 pmWorse case 15kV or more if you have nylon carpets and the air is dry? No chip can protect against that which is why ESD handling precautions should be used routinely if you want reliability.

author: Jwillis
author_rank: Super Contributor
timestamp: February 12, 2024, 12:04:37 am
content: Walking across a carpet can develop as much as 35000V in a human body, like a capacitor, and can remain there until discharged to a lower potential like ground.. The ESD mat and wrist strap puts the component and human body at the the same potential usually ground.Instantaneous discharge is what destroys components. A 1Meg resistor can pass very high voltages but very low current. So it slows a discharge.ESD ratings fall into several classes. Yous is a class 1C but class 3B has a voltage rage over 8000V. You can find class 3B in very high voltage, aerospace and military applications but not necessarily exclusive to those applications.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 12, 2024, 12:51:42 am
content: 15/8kV (air/contact discharge) is a typical upper limit, not that higher can't be done, but that commercial purposes rarely require more. See IEC 61000-4-2 for example.ESD is not simply a voltage, but a type rating which includes a typical waveform, and the network that delivers it, thus both voltage and current are well described. The voltage is the initial charge voltage. The pulse is quite short, <1ns rise, ~50ns width, and the energy fairly modest (10s mJ), enough to get zapped by, but when microscopic elements like semiconductors are subjected to it, it's easily enough current (10A+) to vaporize tiny metal contacts, voltage to break down insulators (nm's of SiO2, etc.), and energy to melt semiconductor junctions into short circuits.1kV or so, is a fairly typical minimum rating. It may be due to JEDEC standards concerning ICs, but I have no idea as they aren't publicly available. 1kV is enough that exceptional precautions are not needed, but basic precautions such as dissipative containers, ESD mats, wrist straps, etc. are desirable.ESD is due to the sudden discharge of built-up static. Usually from triboelectric sources like walking over floors, shifting around in office chairs, etc. With low humidity, voltages of several kV are common, with 10kV being possible, usually with "unlucky" materials, or extra effortESD only depends upon the voltage difference between objects before discharge. Equalize that, before contact, and you eliminate ESD.So, you can touch the chassis of equipment you're working on, or the dissipative bags that parts come in, to discharge to something save (the enclosure/container), before touching sensitive parts.The only reason for grounding, is it's a universal reference. Put equipment on ground, and parts, work surface, and personnel, and by the transitive property, voltage differences go away.Tim

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 01:36:29 am
content: I have assembled many computer motherboards and peripherals without any ESD protection. But how come none of them got damaged? How many of you actually encountered ESD damages?Also say if there is an electrostatic discharge coming from your fingertips, it is supposed to go to the computer motherboard and zap all of the hundreds of components at once or is it only one chip that can be damaged.. usually?

author: ataradov
author_rank: Super Contributor
timestamp: February 12, 2024, 01:57:15 am
content: Quote from: loop123 on February 12, 2024, 01:36:29 amFirst of all, fully assembled boards are way less sensitive than standalone components. And assemblies have separate ESD ratings.And then "damage" does not mean "dead and does not work". ESD can cause damage that is not immediately observable, but may affect characteristics of the device.I've seen plenty of failure analysis reports on ICs that have ESD damage (you can see "craters" on the SEM scans), but not completely failed. They may have higher leakage current, or shifted voltage levels, or a lot of other failure modes.In fact, you can pretty much assume that there is some level of degradation on the ICs you have handled with bare hands while outside of the PCB. It does not matter most of the time, but if you are doing something with 0.1 uA standby current consumption, you actually need to care.

author: Jwillis
author_rank: Super Contributor
timestamp: February 12, 2024, 02:12:46 am
content: Quote from: loop123 on February 12, 2024, 01:36:29 amDepends on where you live. In very dry locations electrostatic build up is greater than very humid locations. Average home can range from 30 to 40% humidity and higher in summer.When assembling computers you may have just lucked out or have been discharged without even knowing it. Simply by touching something that has a lower potential can lower your own static build up to a level that may not be damaging. But that's a gamble. A proper recognized procedures to reduce electrostatic build up guarantees that your components are safe.

author: amyk
author_rank: Super Contributor
timestamp: February 12, 2024, 02:38:50 am
content: Quote from: MarkT on February 11, 2024, 11:59:51 pmI've seen (and felt!) a >5mm static spark on an unusually dry day, so taking the 3kV/mm usual dielectric strength of air as a reference, >15kV is definitely possible.

author: twospoons
author_rank: Frequent Contributor
timestamp: February 12, 2024, 04:28:02 am
content: One of the worst offenders is sticky tape. You can easily hit 25kV or more unrolling that stuff. Which explains why it has a mind of its own when you try to stick it down.We do ESD tests on our products not only to check for permanent damage but also to check for temporary malfunctions, especially in our firmware. You can get some very weird things happening sometimes.

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 06:01:22 am
content: So if your fingers with higher electrostatic discharge touch the V+ rail n the board, the spark will conduct in the entire V+ rail and destroy all chips connected to it? Or would it only travel to 3 or 4 chips and destroy them with the current getting weaker further away? What ESD voltage when it can zap the entire V+ rail of say a hundred components in a board? Just to get an idea. Thanks.

author: ataradov
author_rank: Super Contributor
timestamp: February 12, 2024, 06:08:04 am
content: V+ rail will have enough stuff connected to it to not care. ESD is mostly an issue for I/O pins, especially I/O pins not connected to other pins.

author: Berni
author_rank: Super Contributor
timestamp: February 12, 2024, 07:09:26 am
content: The more stuff connected to the pin the better it can handle a static discharge because the energy of the static discharge is spread across more components.This is why supply rails are very resilient to ESD, not only are there a lot of chips on it, but you also have lots of capacitors on those for smoothing the power, so with a sharp spike of ESD on those will divert a lot of the current into ground.IO pins usually have less things connected. They might only go to 1 other chip, or just to a connector. So those are the most delicate. The 15kV ESD rating in the datasheet is a industry standard test where they charge up a specific capacitor to that voltage and then touch it to a pin. The "human model" just means the capacitors capacitance,resistance..etc is tuned to approximate the ESD discharge you would get from a average person charged up to that voltage.These ratings are mostly to prove how resilient chips are to avoid them getting blown up in handling (both assembly onto PCBs and then the PCBs being installed in a product). In the old days of the 70s and 80s the chips used to be very sensitive to being killed by static, so as chip manufacturers started making chips more resilient they needed a measure of how resilient it is, this is what that '15kV human body' rating is. This has gotten so good that it is quite hard to actually kill modern chips with static.If you are connecting your chip to the outside world (like a external connector, surfaces touchable by the user etc.) then it is always a good idea to add your own ESD protection onto those lines instead of relying on the chips built in ones. The external ESD protection devices can handle a lot more abuse and can be sized appropriately for how much of a overload you want to survive (Like high speed stuff can't handle the loading of large ESD protectors). For external connectors you might also keep in mind that user error or cable damage could send a power supply voltage into a pin. So if you have 12V on a connector, you might want to consider what happens if that 12V gets shorted to one of the signal pins.EDIT:The ESD protector also usually sacrifices itself by going into a short on huge overloads, saving the chip after it, so you only get a dead signal pin rather than a dead chip (or even multiple chips)

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 08:24:36 am
content: Since 6 years ago. My house has been 100% protected by Siemens GFCI circuit breakers that can trip when 5mA is leaked out. So when there is strong rain and one of the wire contacts moisture in the concrete wall, it trips.So Im familiar with MOV and how the part can become 0V during surge and makes full current contact to flush it to ground.The concept of protection from ESD is 100% similar to surges? So I'd know how to relate the two?Btw.. I didn't read this clearly before. If your house is protected by Siemens GFCI circuit breakers that can trip at 5mA. It means you can't be electrocuted even if you touch the live wire and ground because the moment there is leakage of current to your body, the breakers can trip? But I still rememver some instances I got shock but the breakers didn't trip. So kindly clear up this aspect so it can be clear once and for all. Thank you.

author: MarkT
author_rank: Frequent Contributor
timestamp: February 12, 2024, 08:57:08 am
content: Quote from: loop123 on February 12, 2024, 08:24:36 amWell at very different scales... The few nm of gate oxide in a CMOS FET might only need 10V to zap it, at sub-mJ level, mains protection is about kV levels of pulse at high currents, and joules of energy.They are both rapid events though, so the power dissipation involved can be large (which is why the chip blows a small crater in its metallization visible in the microscope).With CMOS you can over-volt the pins by touching without any static electricity too - for instance if you are picking up mains hum on your body at 20V or so (easy to do if you are not grounded), and you touch an unprotected pin in a circuit that is grounded. However the protection diodes will conduct this happily for many devices.Some devices have no protection diodes (discrete MOSFETs are a good example, and exotic RF chips and transistors), and they are often damaged by incorrect handling - the best approach is always take precautions then you don't have to worry - even if you live in a humid climate(!)Commercially when making big PCBs with 100's of active devices, you want the chance of each component failing to be as small as possible - one component failure costs an entire board, and if the damage is partial it can lead to failures in the field (which are much more costly) - so full ESD precautions are mandatory.

author: Berni
author_rank: Super Contributor
timestamp: February 12, 2024, 09:03:25 am
content: MOVs are indeed a popular kind of overvoltage protection device for mains voltage.There are many ways to skin a cat. There are MOVs, Gas discharge tubes, spark gaps, TVS diodes, zenner diodes, SCR crowbars, Diacs etc... They all work by diverting the damaging current trough themselves in order to save the sensitive device from getting blown up by it. Each one has different benefits and drawbacks, so choosing the most appropriate one depends on the application.GFCI breakers are indeed a good idea, but it does NOT mean they magically make it safe to touch 220V. You can still get a fairly painful zap with less than 5mA, also the breakers have a certain reaction time. So if you are unlucky enough to come in contact with mains voltage using a metal tool you are holding in sweaty hands while leaning against a grounded appliance.... you will not enjoy the experience. You will get one hell of a zap while having literal Amps of current flowing trough you for a brief moment before the breaker trips and saves you. Without a GFCI it is likely you would die, with a GFCI it is going to hurt like hell, but you will most likely be fine afterwards (Tho if you have a heart condition this could still have a significant chance of killing you)In practice when working with 220V mains just make sure you are familiar with your path to earth. Only touch stuff with one hand while avoiding being in contact with large grounded objects (especially when the path between your hand and grounded object would lead trough your chest). That way if you do get zapped it is just a tingle. Or if you do manage to put your finger across L and N the current only flows trough the finger and not up your arm. It will hurt like hell, but won't kill you.

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 09:31:38 am
content: Thanks. So what is the best ESD protection device that can survive maximum ESD voltage where you can put it in the pins? Let's say the pin is connected to input that you touch with your skin, like electrodes for ECG or EEG that is directly connected to the I/O pins and hence unprotected? It must be like a module, so the idea is to put the mini MOV between the device and ground. Should it be real ground? But if lightning strikes and hit ground. Won't you be unprotected by putting the ESD protective device to ground?

author: Andy Chee
author_rank: Super Contributor
timestamp: February 12, 2024, 09:40:54 am
content: Quote from: loop123 on February 12, 2024, 09:31:38 amUse diode protection, like this diagram:

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 09:57:55 am
content: Quote from: Andy Chee on February 12, 2024, 09:40:54 amWhat does it exactly do? I've been trying to understand it for 2 weeks!

author: Andy Chee
author_rank: Super Contributor
timestamp: February 12, 2024, 10:03:36 am
content: Quote from: loop123 on February 12, 2024, 09:57:55 amIf the input voltage is greater than +/-0.6V (depends on the diode specification datasheet) then the input signal is shorted to ground, thus protecting the input of the INA114 from ESD.

author: Gyro
author_rank: Super Contributor
timestamp: February 12, 2024, 10:15:56 am
content: Quote from: loop123 on February 12, 2024, 06:01:22 amIt's probably easiest if you understand the HBM and CDM (models) that IC datasheets refer to...The HBM:This is normally defined as a 100pF capacitor (representing the capacitance of your body to ground) in series with a 1.5k resistor (which represents the typical resistance in the loop from the grounded device, through your body to your fingertip). The 100pF capacitor is charged to the figure stated in the datasheet.Now if you touch the V+ rail on a board, in addition to the devices, there is probably several hundred uF of capacitors. If you look at it as a voltage divider, your little 100pF capacitance isn't going to shift the V+ rail by any significant amount. If you were unlucky enough to manage to touch a single signal input pin without touching something chunky on the board first, you have a chance of damaging it, if you exceeded its ESD rating. In practice, you'd need to deliberately use a fine tipped probe to do it.Now take the example of a single IC on the bench. Its input capacitance is typically around 5pF. Your same 100pF is now massive in comparison. Without the protection diodes on the input, the pin would shoot up to several kV and kill the internal FET gate, transistor or whatever. Now those protection diodes can only clamp a certain level of current before they short out (again effectively killing the input). That's where the 1.5k in the HBM comes in. The spec voltage is the maximum current + time that the protection diodes can survive discharging the 100pF though the 1.5K resistor. Devices without protection can have tiny ESD ratings.Now the CDM:This is more industrial. It covers static charge buildup while the IC or part is going through automatic feeders and handling equipment. In these cases the ESD discharge is probably going to be a direct metal-metal contact, so the series resistance is practically non-existent (1R), but the capacitance (the device itself) is also much smaller. This results in a much shorter but sharper discharge waveform. Much less likely to heat up the protection diode over time, but the peak current is also much higher (no series resistance) so can still kill it stone dead. Here's a good reference...https://www.electronicdesign.com/technologies/power/power-supply/power-electronics-systems/article/21197258/charged-device-model-cdm-esd-testing-getting-a-clearer-pictureNow at home, You're much more likely to run into HBM type situations, but CDM can come it - that's why antistatic foam and bags is resistive, you shouldn't package ICs in metal foil (danger of low resistance discharge), walking across the room with an IC and dropping it onto a bare metal surface etc.The ESD strap and Mat, even though they are connected via 1M series safety resistors (in case to touch mains for instance), are enough to continuously drain away static, so that you don't build up the charge differential in the first place. Even so, don't shuffle your feet on a Nylon carpet as you are handling things, the 1M resistor can still allow a brief buildup, which is why professional environments have esd flooring, resistive shoe straps etc.Finally, as ataradov says, ESD damage doesn't have to be instantly fatal, it can weaken parts, change parameters, and lead to lousy final product reliability.

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 10:20:50 am
content: Quote from: Andy Chee on February 12, 2024, 10:03:36 amI see. Never thought it was for ESD. But the INA114 has already ESD protection up to +1 1500V. See original message above. How much ESD voltage can the diodes protect from?How does it differ to this?https://assets.nexperia.com/documents/data-sheet/PESD7V0L1BSL.pdfI need all already in package and just connecting in and out. Know any? Thanks.

author: shapirus
author_rank: Super Contributor
timestamp: February 12, 2024, 10:31:12 am
content: Quote from: loop123 on February 12, 2024, 01:36:29 amHave a read:http://hparchive.com/Bench_Briefs/HP-Bench-Briefs-1983-03-05.pdf

author: Berni
author_rank: Super Contributor
timestamp: February 12, 2024, 01:55:02 pm
content: Quote from: loop123 on February 12, 2024, 10:20:50 amIt all depends on how much protection you want/need.You can get a "ESD gun" for testing if your product satisfies the level of ESD protection according to any standard you want to be compatible with. This is one of those "ESD human model" in a box that can charge it up to the voltage you select. Zap the product with the gun and if it works afterwards it passes.In a lot of cases the internal ESD protection on the chip pins is enough to get you to pass the test (Some chips that are designed to be outside world facing have particularly strong internal ESD protections that are designed to survive more violent events).But in general even small weak external TVS diodes are more robust than the internal protections in the majority of chips. They are designed for that job exclusively so they are made with a fab process specific for them. You also tend to get a much more detailed datasheet on ESD diodes about how much exactly can it survive so you can design in the level of protection you want. Introducing some series resistors also helps with making overloads more survivable (especially for cases where a 12 or 24V or something supply is shorted to a signal wire).

author: loop123
author_rank: Frequent Contributor
timestamp: February 12, 2024, 02:51:01 pm
content: About the diodes shorting to ground. It will work if the ground is floating, let's say from inside a protected isolated DC-DC converter ground? The logic being the area of the PCB of ground is large area? But what if the ground is only as little area like a single chip pcb where the ground is just a line around it?

author: coppice
author_rank: Super Contributor
timestamp: February 12, 2024, 03:06:19 pm
content: Quote from: loop123 on February 12, 2024, 01:36:29 amWhen a semiconductor maker's customer complains of a high failure rate in an IC, the commonest cause is EOS - electrical over stress - visibly damaging the die. Some ICs have better ESD protection than others, but the main cause of EOS failures is poor static control in the production area. We may get away with a lot, especially if living in a humid location, but EOS is a huge issue for the electronics industry. Once things are assembled they become a lot more robust, as a static hit spreads its energy over a bigger area, and is less intense at any one spot. When the IC is on its own, its quite vulnerable. Any special pins on semiconductors, which have no pin protection inside the device, normally have those pins electrically bonded to a ground pin, and the bond needs to be removed after board assembly. A lot of semiconductor design effort goes into getting the pins really robust, without introducing a whole bunch of quirks, like SCR type lockups in the protection circuitry when in normal opertion. It gets harder as the process geometries shrink, but it also gets harder as power rail voltages fall, and more and more devices have pins operating at several voltages. You can't just use a traditional protection diode to the main power rail in those cases. It gets really messy.

author: wraper
author_rank: Unknown
timestamp: February 12, 2024, 03:38:02 pm
content: Quote from: coppice on February 12, 2024, 03:06:19 pmVery flawed logic. It all depends on the circuit and what is exposed. IC by itself is way more robust compared to the same IC mounted on the board with its I/O exposed with no additional protection. There is very little capacitance between a bare IC and whatever is around it. So static discharge on it will have little energy in it and most likely won't happen to begin with. Unless you hold part of its terminals (thus adding capacitance) and walk around touching things with the rest of its terminals. Once it's in the circuit, there is way more capacitance and current return paths added, discharge energy will increase dramatically.

author: coppice
author_rank: Super Contributor
timestamp: February 12, 2024, 03:43:56 pm
content: Quote from: wraper on February 12, 2024, 03:38:02 pmVery flawed logic. Once things are assembled, if the ESD sensitive parts are still exposed to ESD that the external terminals of the case can't protect the internals against, then design is badly broken. The vast majority of ICs damaged by static are damaged before the product is complete. After that your big problem is not damage but crashing. A LOT of products crash a lot in the field due to modest discharges which make things like MCUs hiccup and crash.

author: wraper
author_rank: Unknown
timestamp: February 12, 2024, 03:52:22 pm
content: Quote from: coppice on February 12, 2024, 03:43:56 pmBadly broken as many devices, such as Arduino, Raspberry Pi and similar with I/O exposed and no protection. And I actually seen dozens of Raspberry Pi with one or more dead GPIO or HDMI lines (and even more completely dead SoC fried through them). Heck even laptops often have USB lines going directly into CPU with no protection added. As one may guess it's one of the most common ways how CPU gets fried.

author: golden_labels
author_rank: Super Contributor
timestamp: February 12, 2024, 04:03:50 pm
content: I believe loop123 wants to know, what this ESD protection characteristics tell to them, as a circuit designer or a hobbyist handling ICs. And to that the right answer would be different. To be specific, the answer would be: it tells very little.What these specs say is, more or less, that the assembly/testing line handling the chips should meet particular level of ESD safety.In other words table 5.2 says: if your production/testing line is not designed to fit HBM/CDM models (as defined by the standards) at the level of 1500 V, then Texas Instruments disclaims any responsibility for the chips getting damaged.Other than suggesting tiny protection diodes on I/O pins, it says little about the chips themselves or what you can expect from them in operation. These are meant to establish common ground between many entities involved in producting the final device (or testing/repairing it).

author: coppice
author_rank: Super Contributor
timestamp: February 12, 2024, 04:15:42 pm
content: Quote from: wraper on February 12, 2024, 03:52:22 pmOh, a troll. Those aren't end user products. They come with clear warnings about static sensitivity. They are supplied in static dissipative bags. However, they are a LOT less sensitive than bare ICs. You presented some bizarre logic about that. Damage almost always happens through an arc or direct contact with something highly charged. More capacitance always helps to dampen the surge of a discharge, and minimise the maximum voltage it achieves at the sensitive points.

author: wraper
author_rank: Unknown
timestamp: February 12, 2024, 04:49:39 pm
content: Quote from: coppice on February 12, 2024, 04:15:42 pmLaptops are certainly end user, and general consumer products. Also please don't tell me that Raspberry Pi and Arduino are not end user products either. Also there are GPU, motherboards, RAM and other PC components sold directly to consumers. Guess what, it's not rare they get PCI-E lines and other things get destroyed while handling them, despite components already mounted on PCB.QuoteIt's your logic that is bizarre. That just mounting a part on a PCB magically shall make it more robust while in fact is adds capacitance and more paths to be hit by ESD. Mounting on PCB by itself makes them less robust. To increase robustness, ESD mitigation measures shall be taken.QuoteYou have no idea what you're talking about. It's not capacitance between component terminals but capacitance that provides discharge energy I'm talking about.Now go compare CDM and MM ESD test voltages and guess which test has more capacitance with resistance equal.

author: wraper
author_rank: Unknown
timestamp: February 12, 2024, 05:07:39 pm
content: For analogy, imagine there are two small springs (components), both with a rope attached on one end and an iron cube (capacitance) on other end. One cube weights 1 oz (bare component), another cube weights 1 lb (connected to PCB GND and Vcc). Which spring do you think will have more chances of surviving is you pull the rope rapidly (ESD) (without bypassing this spring by other components).

author: tooki
author_rank: Super Contributor
timestamp: February 12, 2024, 05:09:30 pm
content: Quote from: loop123 on February 12, 2024, 01:36:29 amYou don't know that they weren't.ESD damage is not always immediately noticeable, in that the device still works now, but its performance and/or lifespan have been reduced.Because proving ESD damage requires destructive testing and a scanning electron microscope, the proof that ESD is the cause is often circumstantial, for example, a factory's product failure rate plummeting after implementing proper ESD measures.Consequently, it's best to just implement proper ESD countermeasures preventively, since proving (or disproving) ESD damage is happening is impractical for practically all situations.

author: tooki
author_rank: Super Contributor
timestamp: February 12, 2024, 05:11:57 pm
content: Quote from: ataradov on February 12, 2024, 01:57:15 amInterestingly, I've seen diametrically opposed claims about this.I have often heard the "assemblies are less sensitive" claim, but recently I was reading an old issue of an industry magazine (probably 1970s) and it said that assemblies aremoresensitive than individual components. (I forget who authored the article, but it was a major company, not a hobbyist or something.)

author: coppice
author_rank: Super Contributor
timestamp: February 12, 2024, 06:05:01 pm
content: Quote from: wraper on February 12, 2024, 04:49:39 pmOf course the internal capacitance of the source of the discharge increases the energy, and makes it more dangerous. We have no control over that. The source is what it is. The discussion is about how sensitive to such a discharge source a component, a board, or a complete product might be.The impedance of the outputs connected to the sensitive inputs, and any other connected impedances dampen a discharge, and help a device's inputs tolerate a discharge. We don't leave unused inputs unconnected, as that leaves them a lot more sensitive to a discharge. If we have inputs to an IC connected to the outside world we tend to add additional protection devices, like the ones on USB ports. That's because we expect an end user to take no precautions about static, so end equipment has to be very robust. All the steps we take between bare components and end user products steadily increase robustness. Not the other way around.

author: coppice
author_rank: Super Contributor
timestamp: February 12, 2024, 06:10:00 pm
content: Quote from: tooki on February 12, 2024, 05:11:57 pmThings were very different in the 1970s. Many devices had little or no internal protection. Even when they had protection diodes they were often not fast enough to turn on before damage was done. Even then, it was quite a stretch to claim that on a board, where most sensitive inputs are connected to an output which can dampen a static hit, devices were more susceptible off a board than on it.

author: wraper
author_rank: Unknown
timestamp: February 12, 2024, 10:12:14 pm
content: Quote from: coppice on February 12, 2024, 06:05:01 pmIs said ESD source's current return path always connected it IC GND terminal through a wire so conditions do not matter whatsoever? Or is there often no current return path other than capacitance in air? Why do you think separate HBM, CDM and MM ESD models even exist?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 13, 2024, 02:42:59 am
content: Quote from: coppice on February 12, 2024, 06:10:00 pmCould still be correct if what was meant was the worst case, i.e. inputs without anything else loading them, exposed on an edge connector for example. The capacitance of the board greatly increases the ESD exposure of such inputs, compared to a chip alone.Good practice nowadays, in lieu of other controls/practices or limitations, is to put TVS diodes or other suitable protection on every IC pin routed more-or-less directly to a connector (so, ignoring series dropping or divider resistors for example, which just arc over during an ESD hit anyway). And with ICs for pretty much every function imaginable, less and less analog interface is required, and ever more often it is, that you're wiring IC pins to connectors (give or take some dropping, filtering or protection network).Tim

author: Berni
author_rank: Super Contributor
timestamp: February 13, 2024, 07:15:02 am
content: The reasoning behind an assembly being more robust is that most of it tends to be covered by ground and power nets, those are the most robust against ESD. So if it does get a ESD hit it will likely hit that. But yes when it does hit a signal pin the whole assembly can't just float up to the high voltage like a tiny chip on a desk can.The ESD tests take care of this by giving the ESD gun a ground clip so that it can be grounded to the device under test, so the device under test can't just get charged up to HV and sit there, it gets a full on hit from all the energy in the ESD guns caps.But as said before chips have become a LOT more robust since the 1970s. You typically need a ESD zap intense enough for you to feel a shock from before you destroy typical chips. So just grab something grounded before working on stuff and you are fine. At least for the common consumer chips you see on a regular basis (special fancy RF chips and such are different, they are still very delicate).That being said all these paranoid ESD precautions with grounding and ESD straps and all are still a good idea in industrial production. In large volumes a few chips are bound to get damaged, potentially cause issues down the production line, maybe result in faulty or near faulty products out the door etc.. Just takes a careless production line worker to take off a particularly static prone synthetic sweater and then grab a PCB.Outwards facing ports should have some ESD protections on the PCB, but some chips are robust enough to pass the required test without them, and never underestimate the level of penny pinching when you get to production volumes in the milions. Saving a buck on the BOM means an extra >1 000 000$ in profit.