Latching a protection signal - Page 1
Forum section: electronics / projects

author: Siwastaja
author_rank: Super Contributor
timestamp: April 28, 2018, 02:08:02 pm
content: Hi,The case:Hysteretic synchronous buck converter, with current feedback only, charging a battery. Software manages constant voltage by adjusting the current setpoint, which is normally a very slow feedback.What I need: both input and output overvoltage protection, for sudden disconnection of either the battery (in which case the output voltage would start to rise quickly), or for any accidental reverse boost operation, where the input voltage would rise, since there is no sinking capability on the input supply.Since low cost and simplicity is important, I'm most likely implementing output OV protection with an extra channel on an existing comparator, and input OV protection with just a zener to the base of NPN since it doens't need to be accurate. With these signals, just pull the gate driver enable input low (normally driven high with a series resistor).But, since these are rare fault conditions, and I don't want to risk accidentally creating a voltage-mode hysteretic constant voltage converter with a huge voltage ripple (turning on-off-on-off...), I just want to shut down until power is cycled.I'd need to react to the fault signals with about 100us max delay. Any mechanism to pull down the gate driver enable input is then OK. Open-collector NPN would do, I just need it to latch permanently to the conducting state until the circuit loses power. A thyristor would theoretically work if they were cheaply available as small SMD versions with minimal hold currents.I'm looking for the lowest cost / lowest part count / preferably jellybean solution for this latching, I'm posting because of the feeling that I'm just not seeing some obvious super trivial two transistor solution here and don't want to overcomplicate the things. I know I could do it for example with an SR latch and some glue logic, but am looking for something even simpler. I can use the gate driver's +10V supply for this part, or a 3V3 logic supply as well.Any ideas?

author: CopperCone
author_rank: Super Contributor
timestamp: April 28, 2018, 04:28:48 pm
content: when I did this for over temperature protection, I used a SCR that was triggered by a comparator. I thought it would be reliable.I read alot abour SCR/Thyristors though, they have their quirks.You can also make a comparator circuit that latches if you play around with the values but it becomes nonlinear so you can't really just use a trimpot to trigger it, plus it will rely on power rail voltages and stuff. I think my analysis showed that the SCR was pretty much easier to design in and would tolerate more failure modes (obviously in a complex circuit you have multiple failure modes and you need to do a failure chain analysis to see what will happen) then any other method.You don't wanna use some part that has sensitive rails to do this job.Also the gate count is low for a SCR circuit, so you can sleep sounder about getting a good part for an interlock. Harder to mess up the manufacturing process for them I think.

author: IconicPCB
author_rank: Super Contributor
timestamp: April 29, 2018, 01:15:41 pm
content: A two transistor latching equivalent SCR function will trip and latch and reset only after power is removed.You can investigate the trip voltage and dimension the circuit to latch at the required point.Circuit would consist of four to five resistors and a couple of transistors.

author: Wolfram
author_rank: Frequent Contributor
timestamp: April 29, 2018, 06:38:16 pm
content: I've used the 74LVC1G175 as a protection latch in several designs.

author: slugrustle
author_rank: Frequent Contributor
timestamp: April 29, 2018, 07:06:23 pm
content: Here's a possible transistor-based latch. With a nominal 15V zener, it triggers at 16.34V.Edit: D1, the 1N4148, is probably not necessary if the 10V gate driver supply derives from the input voltage that you're checking for overvoltage.Circuits based on TL431 (or similar) are also good for this kind of thing.

author: Siwastaja
author_rank: Super Contributor
timestamp: May 01, 2018, 07:07:13 am
content: Thanks for the ideas, especially slugrustle for the circuit simulation effort!D flipflop could work, protection signal driving the CLK to detect rising edge, D hardwired high, with RC soft start in nRST pin to make sure it resets to '0' in normal power up. Didn't think about this earlier. It'd still need an output transistor to pull the gate enable low in case Q goes high.I simulated some two-transistor equivalent SCR circuits and they seem to require quite some resistor value trimming to work reliably, so the "different BOM lines" count is hard to get below about 5-6. This could still be it.