8-bit retrocomputer:  MMU + VIA from a PLD: ATF2500C-20PU? - Page 1
Forum section: electronics / general

author: Pugbutt
author_rank: Contributor
timestamp: February 25, 2022, 06:35:27 am
content: Hi Guys.I'm designing a CPU bus card with an HD63C09P CPU (8-bits data, 16-bit address)but anachronistically. I also want to add 512K SRAM, 512K ROM, and an ATF2500C-PU.Being a complete noob to reconfigurable logic, I just made the part in EAGLE andnamed all the pins with hope in my heart. (Attached)I think It's clear what I'm hoping to do. Want to expand the address bus by three bits,and use the CPLD on the bus in the manner of the old MOS CIA Complex InterfaceAdaptor, having internal function registers and selecting 8K(?) memory pages.Is it easily doable, leaving room for timers and an interrupt controller, or wouldexpectations need to be quashed?So far, I named all the pins in horrible WinCupl and did some simple combinatorial ones.I hope to get at least four bytes of registers from 48 flip-flops, and don't know ifthey must be write-only or not.Thanks for reading.

author: Ted/KC9LKE
author_rank: Contributor
timestamp: February 25, 2022, 04:45:56 pm
content: Hi PugI know this doesn't answer your question, just my $0.02. If your planning on an operating system in the future, like OS-9, then 4k pages would be wise.I believe what your lookin to do in the CPLD is a simple dual port ram, a Dynamic Address Translator of sorts.GIMIX and SWTPC 6809 systems used dual port rams for expanding the address bus.Nice projectBestTed

author: Pugbutt
author_rank: Contributor
timestamp: February 25, 2022, 06:06:44 pm
content: Thanks Ted, that gives me some good leads to follow.Re 4K pages, I was worried if there were too many pages, then there wouldn't be enough flip flops in the CPLD to make all the page-selection registers... but dual port RAM would certainly sidestep that limitation!There would still need to be some logic, at least to do some chip-selects... but maybe instead of a fat 40 pin DIP PLD, it could just be a couple 74-series jellybeans and the ram chip. Definitely going to experiment with the idea.Thanks,Craig

author: SiliconWizard
author_rank: Super Contributor
timestamp: February 25, 2022, 06:16:16 pm
content: The Tandy Coco 3 had 8KB pages IIRC, and could address up to 2MB of RAM through expansion (IIRC, but the official max was 512KB), so what you want to achieve is not that anachronistic at all.You may find its service manual interesting:https://colorcomputerarchive.com/repo/Documents/Manuals/Hardware/Color%20Computer%203%20Service%20Manual%20%28Tandy%29.pdf

author: Ted/KC9LKE
author_rank: Contributor
timestamp: February 25, 2022, 06:58:59 pm
content: Craig,First ill say that I am just tossing out ideas, I am not a seasoned designer just a noob, hopefully others will add their expertise.This is without knowing the size of the CPLD. Typically you describe your logic in, lets say VHDL, then choose a device that is capable.Also it also looks like the device needs to be 5V compatible, or use level shifters.I see you want a CIA like device, one serial, two parallel and some timers with an additional DAT. The DAT could be described as a dual port ram along with the other parts of the CIA.For starters take a look at system09 on the opencores site. It has a 6850 serial, 2 parallel ports, some timers a DAT plus other stuff. Its in VHDL, and you can look at the sections to see what's involved in writing your CIA plus DAT. Word of caution, you can not just simply cut and paste the VHDL, its too intertwined, and its almost certain not to be timing correct for the 6309 buss. However it will give you an idea of what you'll need for a CIA w/ DAT in VHDL for your CPLD, or possibly a small FPGA. Your really not asking for that much.Yes Coco 3, 8k pages, thanks SiliconWizard I forgot. And that brings up another point. The SWTPC uses a simple DAT that needs to be rewritten every time you want to switch pages. The GIMIX and Coco 3 use task registers, so once the DAT is configured you simply write to the task register once and the whole memory map changes.BestTed

author: Pugbutt
author_rank: Contributor
timestamp: February 25, 2022, 07:35:46 pm
content: Thanks for the spot-on references, guys. Got a full spectrum of approaches to consider, from the FPGA kitchen-sink, to borrowing a neat ASIC from a CoCo 3, to using discrete logic.The original choice of going with the ATF2500C was mostly for its sweet DIP-40 package, +5V Vcc, and opportunity to learn PLD fundamentals. I think I'll keep it for now and start small. Maybe have fixed 32K RAM, followed by fixed 32K ROM, /CS0 and /CS1. After that, if I can get even one programmable IO line, I'm making progress.Thanks again.

author: TomS_
author_rank: Frequent Contributor
timestamp: March 07, 2022, 05:04:43 pm
content: I dont know what development tools are available for the ATF2500 series (maybe WinCUPL?), but you may consider the ATF150xAS range of CPLDs instead (note: not the ATF1500). They are PLCC, but through hole sockets are readibly available in a 2.54mm/0.1" grid for easy soldering.The ATF150xAS parts have the advantage of a tool called "pof2jed" which allows you to develop your logic for an equivalent Altera EPM7xxxS part using Quartus in either VHDL or Verilog, and then convert the Quartus .pof output to a .jed file to program into the Atmel CPLD.The Altera parts can be hard to come by or may need to come from questionable sources, whereas the Atmel parts are still manufactured today and are generally as available as anything else right now. At the very least, you can choose between equivalent Altera and Atmel parts based on availability (they are pin for pin compatible).Ive recently implemented a text mode video card using an ATF1508AS by targeting an EPM7128 in Quartus.Both the Atmel and Altera CPLDs are JTAG programmable with relatively inexpensive tools, but I dont know what will program one of the ATF2500's, presumably some kind of parallel programmer (maybe a Minipro?).WinCUPL is alright, I dont mind it, but it and WinSIM do have some bugs that you need to learn to work with and recognise when they are causing things to act up. And just keep clicking the Save icon, thats about all I can say for that lol.Given 24 macrocells and 2 FFs per macrocell, I think plural of anything will be somewhat of a stretch in one of these. I imagine that a single 8 or maybe 16 bit timer might fit, but there wont be much room for anything else.

author: Beta_vulgaris
author_rank: Regular Contributor
timestamp: March 10, 2022, 10:33:15 am
content: Quote from: TomS_ on March 07, 2022, 05:04:43 pmEPM7xxxS series are NOT compatible with ATF15xx series, but the reverse is true. Output enable controls and macrocell feedbacks in ATF15xx differ from EPM7xxxS, as the diagram shown highlighted below.

author: TomS_
author_rank: Frequent Contributor
timestamp: March 20, 2022, 07:22:23 am
content: Quote from: Beta_vulgaris on March 10, 2022, 10:33:15 amSorry, not sure what you are getting at there?I feel I was quite clear that you can translate an Altera design to work on an Atmel, but I never mentioned anything about going the other way.