Comments on first PCB layout? - Page 1
Forum section: electronics / projects

author: klr5205
author_rank: Regular Contributor
timestamp: November 17, 2014, 04:11:40 pm
content: Would anybody care to comment on the layout of a toy I'm making for myself? I most interested in whether the DC-DC layout is adequate but since this is my first board I'm open to any and all suggestions for improvement.About the device:The primary purpose is to drive 3 or 4 meters of WS2812b leds (aka neopixels) so that they may be used as a decoration under the awning of an RV. I have no intention of driving them at full brightness as white at max brightness can draw 3+ amps per meter. The board accepts a DC input so that the leds can be used when the RV is "dry camping" aka running on batteries. User interface will be through the encoder as well as a serial display and possibly pushbuttons which will come in on the expansion header.I also have some beefy open drain outputs that could drive your standard issue common-anode led strips or drive relays or whatever else you might want. I want this board to be easily repurposed for other projects I might have in the future.Notes:The LDO may or may not end up being populated. I'm mostly including it as a backup in case something goes horribly wrong with my DC-DC layout, but I could potentially add another amp or so of current capacity by putting a TO-220 switching module and either diode or-ing the output or just throwing a 0.1 ohm resistor for any difference in output voltage to drop across. Also, in lower power applications of this board, I could non-pop the DC-DC and just use the much simpler LDO.I realize its odd to have the DC-DC default to off but I wanted the micro to have control of it, and I could keep 12V away from the GPIO and avoid an extra transistor by doing it like that. The regulator only needs a voltage greater than 0.8V on the shutdown pin to turn on.Anyway, thanks for taking a look!

author: ivan747
author_rank: Super Contributor
timestamp: November 17, 2014, 04:33:49 pm
content: You could make the 5V traces a bit thicker,especially if they are going to power the LED strip.

author: Unknown
author_rank: Unknown
timestamp: November 17, 2014, 04:56:39 pm
content: Why do you have a pullup (R6, R19, R21) on an the gate of the three n-channel mosfet (Q1, Q2, Q3) ?Instead of using traces for the 5V that powers the leds use a solid plane.Try keeping on the bottom layer a solid ground plane and most of the traces on the top layer.

author: klr5205
author_rank: Regular Contributor
timestamp: November 17, 2014, 05:46:11 pm
content: Quote from: exapod on November 17, 2014, 04:56:39 pmI suppose because I also picked an n-channel logic level transistor to drive it and you typically use those as low side drivers.Also (grasping at straws) the output of Q1 matches the logic state of the gate of the transistor driving it. Now that you bring it up, I guess I have some soul searching to do to decide if I want to leave it that way or not.Quote from: ivan747 on November 17, 2014, 04:33:49 pmQuote from: exapod on November 17, 2014, 04:56:39 pmPoint taken. I do have a plane for the 5V that powers the neopixel strip (near P3) but I certainly see your point for the the 5V wire holes near Q1, Q2, and Q3.Quote from: exapod on November 17, 2014, 04:56:39 pmI started out that way, but I guess I began using the bottom layer as a crutch. Near the power supply the bottom layer ground plane is mostly unbroken though and I also have a fairly thick pour on top so I thought I'd be ok there. Everything else is pretty slow, signal wise.Thanks for the input so far.

author: Paul Moir
author_rank: Frequent Contributor
timestamp: November 17, 2014, 06:39:42 pm
content: Just a couple of comments from someone who's looked at many boards but designed very few: is the location of the connectors very important? It seems like for example P1 would do a lot better over by the MOSFETs. Also I see a few acute angles on the 5V line underneath L1 and next to R3, and just above pin 1. Not the biggest deal in the world I guess (google "pcb acid trap" to learn more) but there's no need for them.

author: klr5205
author_rank: Regular Contributor
timestamp: November 17, 2014, 07:32:50 pm
content: Thanks for pointing out the acute angles - that's an easy fix that I'll definitely do.As for P1, it actually used to be over by the MOSFETS, but then I decided I wanted to leave my options open for an encoder that had an RGB illuminated shaft on it. In that case, the encoder would be panel mounted and have flying leads going into the board so the exact footprint isn't important, but I wanted the nets to be in that area for ease of wiring.

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: November 17, 2014, 07:48:04 pm
content: Lots of floating and dangling copper.Increase spacing around mounting holes.

author: klr5205
author_rank: Regular Contributor
timestamp: November 17, 2014, 09:23:25 pm
content: I could see dangling copper causing issues from an EMI perspective if there was any decent switching on it.Does the floating copper inherently cause problems or is it simply best practice to eliminate it?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 17, 2014, 09:35:51 pm
content: Looks like a good start!The blocky through-hole thing in the middle needs a refdes.Stitch *everything*.You have two polygons on top and one on bottom flooding around things, leaving large slots in the pour (e.g., the trace from R2 to, whatever the big box thing is, pin 7?), or orphaning copper altogether (e.g., the section south of R5, or the sliver by U3).Islands can be removed by setting the "remove copper under x" property on the polygon. Larger sections should be removed (by preventing copper pouring there, or modifying the polygon outline to exclude that area), modified (move the surrounding traces to shrink the area until it no longer forms, or grow the area until it is big enough to connect with surrounding copper or with vias), or stitched.Stitching rules: I like to place via pairs every 500 mil or so along traces, and at the ends of peninsulas, or in the centroids of smaller overlapping regions.Use closer spacing, or multiple vias, around high current or high dissipation areas.Traces should be grouped (within reason; similar signals can be bused together, while high power signals for example should be kept well away), which follows from the island rule above.Where traces intersect on opposite layers, use three or more vias to stitch across the intersection. Try to minimize overlapping area by making the traces cross at right angles. A 45 degree is fine too, but just try to minimize area. The underlying emphasis is, ensure that any given trace is never more than a little distance from the nearest grounded copper. This ensures a convenient and expected path for the image current, which keeps crosstalk and susceptibility to a minimum.Vias produced by these rules can be grouped when convenient; think of the underlying element as the centroid of overlapping ground areas. If the overlapping region is small and it's more convenient to place one or a few vias there, rather than following the above definitions strictly, go for it!Preferably, an island (not removed by the above rules) should be large enough that it can hold two or more vias (and therefore some current can flow through it, as a shield), or it should be excluded by the above rules. If it's still unavoidable, at least use one via, to ground it, to avoid floating copper.All of these are illustrated in this example:It's also a manufacturing tip to ensure even copper on both sides -- otherwise, warpage can result. It's not usually a big deal, but it's more important for two layer boards (that are more flexible) and very fine pitch components (especially QFNs, LGAs, etc.). Pouring ground (or whatever) over the entire board is an easy way to ensure that; with the added bonus that your electrical performance can be nearly as good as a 4 layer board, without the expense.Tim

author: free_electron
author_rank: Super Contributor
timestamp: November 17, 2014, 10:13:20 pm
content: I question your choice of inductor for the switcher.. looks like one of those damn chokes to me ..

author: Tinkerer
author_rank: Frequent Contributor
timestamp: November 18, 2014, 12:08:44 am
content: I think traces from P4 can be grouped and routed together near the end of P5. Like mentioned earlier, grouping things is a good idea.

author: amc184
author_rank: Regular Contributor
timestamp: November 18, 2014, 04:50:26 am
content: First off, this looks okay for a first PCB layout, I've seen much worse. A few comments;- Be very careful about the layout around the switching regulator. These have very specific requirements and need to be very tight. Some datasheets provide example layouts, unfortunately the LM2678's doesn't. Maybe you should browse through a few more switcher datasheets to get an idea of how it needs to be done (try LT1374).- Some of your heat relief traces look a bit too thick. I'd halve their width.- Check the hole to pad diameter ratio of your through hole patterns. Most look okay, but some like L1 and S1 look a bit lean, and will be hard to solder.- The ground plane you've got won't be very effective. You should be routing every trace apart from ground on the top layer as much as possible, don't be afraid to use vias. Traces like those from the Teensy to R2 and to U3 are particularly bad. You've also got a single trace connecting S1, C12, C13, R11, C11, R22 and U6 to ground. This is a very bad idea, these should each have it's own low impedance connection to the ground plane (a short trace and via). Same with the trace for C9, C10, R18, R20, U4 and U5, as well as any like it.- The correct designator for the Teensy would be A1, A for sub-Assembly.I've attached a PCB I did recently that's a little similar. It's not perfect, but it worked okay. Note the relatively clear ground plane and the individual via(s) grounding each surface mount pad.

author: klr5205
author_rank: Regular Contributor
timestamp: November 19, 2014, 01:14:28 pm
content: Thanks guys, these are all exactly the type of reply I was hoping to get!@amc184: What is a rule of thumb hole to pad ratio for through hole patterns?Regarding the switcher, I did reference the datasheet's suggestions for which traces must remain short as short as possible (Cin, Cout, Catch Diode) but they don't really define what "short" is. I will take a look at some sample layouts.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 19, 2014, 03:51:27 pm
content: Annular ring is usually required 5 mil absolute minimum (pad dia = hole dia + 10 mil), and 10 is a more practical minimum (including hole centering error, hole finish dia error, and copper print registration error).Somewhat large pads are generally better for hand soldering, say 15-20 ring. I'll normally do THT parts like resistors and transistors as 30 mil hole, 60 mil pad, and 100 mil pitch or grid (when acceptable). At 100 mil pitch, you can go up to 90 mil pad before design rules start being a problem (10 clearance is a good and loose starting point, though most board fabs do 6 or 7 mil width/spacing as standard), unless you have other requirements of course (high voltage).I like to use proportionally larger pads for thicker pins, so that the solder fillet is approximately similar.Tim

author: amc184
author_rank: Regular Contributor
timestamp: November 20, 2014, 08:24:54 am
content: Usually I use 2:1, a pad diameter twice the hole diameter. I vary that for some components; when I want to increase the clearance between pins I might make each pad oval, increasing the length and reducing the width, leaving the area roughly the same. I also use a minimum pad diameter (1.5mm) for through hole components, no matter the hole diameter. I developed these rules after building many PCBs I've designed, and they work well for me.

author: tautech
author_rank: Super Contributor
timestamp: November 20, 2014, 08:55:09 am
content: Quote from: amc184 on November 20, 2014, 08:24:54 amQuote from: T3sl4co1l on November 19, 2014, 03:51:27 pmTry to keep TH pads at 100 mil and for headers the same, but make them oval, say 100 by 60.Then you will have good clearances and the hand soldering will be a breeze.Set a 25 mil hole size for drill centering only, then you can drill any size you need.For the initial PCB there is often some tweaking needed and thin/fine annular rings often suffer from any rework, you will find 100 mil is small enough.When you have the prototype sorted then you can fine things down a bit but I never do.Good designers think about the poor guy that may have to fix the thing they have built.