CMOS Crystal Oscillator duty cycle - Page 1
Forum section: electronics / projects

author: fabiodl
author_rank: Frequent Contributor
timestamp: October 31, 2018, 10:38:59 am
content: Hello,I am trying to get a 10.7386 Mhz oscillator, 50% duty cycle.I used the schematic in section "CMOS Crystal Oscillator" ofhttps://www.electronics-tutorials.ws/oscillator/crystal.htmlI used a 10.7386 Mhz crystal, 62p for the capacitors, R1 = 10M and R2=2k2. The inverter is a SN74HCT04PWRI measured a duty cycle of about 30% (at the output of the first gate). How can I make it closer to 50? I need to bring it into the range 45 to 55.I suspect the asymmetry is due to the difference between low (0.8-0) and high (5-2) voltage ranges, but I don't know the best/standard/simplest way to adjust the duty cycle

author: Circlotron
author_rank: Super Contributor
timestamp: October 31, 2018, 11:24:27 am
content: Have a crystal at double the requited frequency then shove it through a flipflop? Exact 50/50 duty cycle guaranteed.

author: RoGeorge
author_rank: Super Contributor
timestamp: October 31, 2018, 11:59:21 am
content: Use a XOR gate to double the frequency, then a flip-flop to divide by 2. The resulting output from the flip-flop will be 50% duty cycle.

author: Benta
author_rank: Super Contributor
timestamp: October 31, 2018, 12:08:17 pm
content: Use 74HC instead of HCT. The HCT is not symmetrical, as it's laid out for TTL levels.

author: Ian.M
author_rank: Super Contributor
timestamp: October 31, 2018, 01:11:36 pm
content: Quote from: RoGeorge on October 31, 2018, 11:59:21 amNo it wont, as the XOR circuit will produce pulses starting at the edges of the original asymmetric signal, so you'll get a pair of pulses closer together, then a longer interval then another close pair and so on.Circlotron's suggestion of staring with a crystal of double the frequency and dividing it down is the best one.If you *must* use the existing crystal, after replacing the 74HCT04 with a74HCU04to get near symmetric thresholds, and a cleaner, more sinusoidal waveform at the driven side of the crystal, if the symmetry isn't good enough, any remaining asymmetry can be trimmed out by capacitively coupling the input of the buffer gate and biassing it via a 1Meg resistor fed from a 10K potentiometer across its supply rails. Due to the lower gain of the 74HCU04 gates, running the buffer output through an additional one to further buffer it and sharpen the edges would be advisable.Its also possible to use low pass filtered high resistance negative feedback to bias the first buffer gate so it actively maintains a 50% duty cycle over temperature or supply voltage variation, but that gets more complex, and can produce a very asymmetric duty cycle during startup.

author: schmitt trigger
author_rank: Super Contributor
timestamp: October 31, 2018, 02:08:56 pm
content: "..with a 74HCU04 to get near symmetric thresholds, and a cleaner, more sinusoidal waveform at the driven side of the crystal, if the symmetry isn't good enough, any remaining asymmetry can be trimmed out by capacitively coupling the input of the buffer gate and biassing it via a 1Meg resistor fed from a 10K potentiometer across its supply rails..."Excellent tip!

author: RoGeorge
author_rank: Super Contributor
timestamp: October 31, 2018, 06:39:13 pm
content: Quote from: Ian.M on October 31, 2018, 01:11:36 pmMy mistake, thank you for pointing that out.

author: fabiodl
author_rank: Frequent Contributor
timestamp: November 02, 2018, 10:51:40 am
content: Thank you very much for everybody. I think I will use a double freq crystal (although it is a bit difficult to find. For instance, it is not available at RS).As for the alternative you propose, is this schematic correct?https://imgur.com/a/wkRrW4TBy the way, if I already have an IC that can make the quartz oscillate, can I buffer it by connecting a gate to one of the crystal's pins or will the added capacitance lead to problems?

author: Ian.M
author_rank: Super Contributor
timestamp: November 02, 2018, 01:28:32 pm
content: Not quite. Here are my and Circlotron's proposals. (attached)N.B you may need to tweak R1 and R2 when you change inverters.Quote from: fabiodl on November 02, 2018, 10:51:40 amAs long as you tap directly from the Output of the gate in the oscillator, not from the crystal if there is a series resistor, then yes you can buffer it that way. However if its got an internal resistor in the IC, then it may or may not work - the gate must be CMOS, must be connected to the driven (output pin) side of the crystal, you need to keep the extra track length as short as possible, and you may need to reduce the load capacitor on that side of the crystal to compensate.

author: fabiodl
author_rank: Frequent Contributor
timestamp: November 05, 2018, 09:32:03 am
content: Thank you, I see, you first let the duty cycle be asymmetrical, and fix it later!

author: Ian.M
author_rank: Super Contributor
timestamp: November 05, 2018, 10:01:11 am
content: Quote from: fabiodl on November 05, 2018, 09:32:03 amYes, but that only works well if you use an UNBUFFERED CMOS gate (or discrete transistor etc.) for the oscillator, otherwise, with the much higher gain of a buffered gate, its output is likely to be too 'square' to have enough adjustment range. Also it should have symmetrical input logic thresholds to keep the oscillator section as undistorted as possible, so don't use 74HCT etc. You may also need to attenuate the oscillator output by reducing the coupling cap, or tapping down on the output with a potential divider, otherwise foward conduction of the buffer gate's input protection diodes will tend to force the bias point to half way between peaks, which may not be close enough to the 50% duty cycle symmetry point.All in its a total PITA, so I strongly recommend Circlotron's suggestion of starting from twice the desired frequency and dividing that by two using a flipflop, which is in fact the standard way to get an inherently accurate 50% duty cycle clock signal, that's reasonably stable with respect to temperature and supply variations.

author: schmitt trigger
author_rank: Super Contributor
timestamp: November 05, 2018, 05:39:31 pm
content: What I am going to describe is an overkill, I know, I know.... But I am still going to suggest it for completeness sake.If you cannot find a crystal with twice the required frequency, you can feed its output to a74HC4046 PLL. Its output is a 50% duty cycle. Configured as a straight 1:1 ratio.Please note, the "standard"CD4046 cannot run that high a frequency.

author: iMo
author_rank: Super Contributor
timestamp: November 05, 2018, 06:16:22 pm
content: Another trick worth trying: take the 30/70 signal, pass it via an LC tuned to the 10.73 frequency and feed it then back to a 74HC04 biased gate - that may create 50/50 too..

author: Benta
author_rank: Super Contributor
timestamp: November 05, 2018, 07:23:03 pm
content: Quote from: schmitt trigger on November 05, 2018, 05:39:31 pmNeither can the 74HC4046. Don't even think about it.

author: David Hess
author_rank: Super Contributor
timestamp: November 06, 2018, 04:28:08 am
content: Another way when you cannot modify the source is to RC couple it into a comparator and then use feedback from a rail-to-rail output to set the average voltage of the output to 50% of the supply voltage by controlling the comparator's trip point. The comparator can be replaced with a gate as shown. This is not quite as good as dividing by 2 but it can get within 1% without any adjustments.

author: schmitt trigger
author_rank: Super Contributor
timestamp: November 06, 2018, 02:13:17 pm
content: Benta;I like to come to this forums to learn, and to correct any incorrect knowledge which I may have. I won't be offended if I am shown my errors.In the attached datasheet, page 10, it shows that a maximum VCO frequency of 24 Mhz, whereas the OP only requires in the vicinity of 10 Mhz.... Why wouldn't it work in a straight 1:1 mode?

author: Benta
author_rank: Super Contributor
timestamp: November 06, 2018, 04:47:00 pm
content: Quote from: schmitt trigger on November 06, 2018, 02:13:17 pmThe VCO is not the issue here, although it's marginal. The maximum frequency of the VCO is not that interesting, but the center frequency is, which in this case would be 12 MHz (fMAX/2).The limiting factor is the PFD. There is no stated maximum frequency in the data sheet, but if you start adding up the propagation delays, you'll quickly see that maximum input frequency is a couple of MHz. It's not an issue for frequency synthesizers, where the VCO frequency is much higher than the reference frequency, but in a 1:1 configuration it won't work.Hope this helps.

author: iMo
author_rank: Super Contributor
timestamp: November 06, 2018, 08:59:07 pm
content: Another idea: you may try with NE602 - Xtal oscillator and a freq doubler on a single chip. Add an LC tank tuned to 21.4MHz (at the Ne602 outputs pins 4-5), a 74AHC04 shaper and the 74AHC74 divider by 2 and you get your 50/50..http://www.b-kainka.de/Daten/HF/NE602Xtal.pdfhttp://www.n4iqt.com/BillRiley/multi/8x.JPGYou may try without the LC, not sure the fundamental 10.7MHz will not mess with the doubled freq..