Using 4046-Type PLLs Successfully - Page 1
Forum section: electronics / projects

author: Benta
author_rank: Super Contributor
timestamp: March 19, 2018, 10:07:03 pm
content: Driven by frustration over the miserable 4046 data sheets and application notes, those actually landing some EE-design acquaintances in trouble, a friend of mine wrote this paper on how to use 4046 PLLs in practice.I think it's great, but will leave judgement to you.AbstractQuoteComments, suggestions and corrections are always welcome.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 19, 2018, 10:33:53 pm
content: Now, first wrinkle -- and, a fatal one I think, as, at a glance, I don't see this enumerated in the article -- CD4046 is the "original and still best", and 74HC4046, and 7046 and 9046, are the knock-off substitutes. Perhaps that is where the confusion has arisen?You would think they could simply port them over from metal to silicon gate CMOS and be done with it, but no; they absolutely ruined them (so I understand it). The oscillator is terribly inconsistent (part-to-part variation), and nonlinear. The type 2 phase detector has a terrible dead band. (Whereas the CD4046 had slight overlap, so that it could lock on the margin with very high gain and no dead band.)The others are improved versions, but as I've heard it, none of them are as capable as the original, they're only faster and operate at lower voltage.Tim

author: Benta
author_rank: Super Contributor
timestamp: March 19, 2018, 10:44:57 pm
content: You've lost me completely, but I'll pass it on...

author: Gyro
author_rank: Super Contributor
timestamp: March 20, 2018, 06:00:17 pm
content: Quote from: T3sl4co1l on March 19, 2018, 10:33:53 pmThat's an interesting wrinkle Tim. Did this 'no dead band' performance apply to any particular CD4046 manufacturer? I remember that HEF4xxx were always faster but presumably they were still metal gate. Just curious (having experienced poor HC4046 comparator performance).Chris.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 20, 2018, 08:51:19 pm
content: AFAIK, CD4046 are fine, 74HC4046 are crummy.Tim

author: Benta
author_rank: Super Contributor
timestamp: March 20, 2018, 09:08:58 pm
content: I'm somewhat sad that this thread immediately degenerated into anecdotes and waffle about the performance of different flavors of 4046s.The intent was to help first-time users get a PLL running, despite the misinformation in the 4046 data sheets and application notes on how to design a loop controller (aka loop filter).Disappointing.

author: Bud
author_rank: Super Contributor
timestamp: March 20, 2018, 09:18:11 pm
content: The first time users may be trying to get a PLL running until cows come home and never succeed, because of the limitations Tim pointed out. To me Tim provided valuable information and you may need to pass it over to your friend.

author: Gyro
author_rank: Super Contributor
timestamp: March 20, 2018, 09:26:55 pm
content: @Benta: It seems to me that, as your friend's paperspecificallyfocuses on use of Phase detector II, differences in its behavior between different logic family variants would beveryrelevant. Please forgive me for seeking clarification!

author: Karel
author_rank: Super Contributor
timestamp: March 20, 2018, 09:27:09 pm
content: Here's what "The Art of Electronics" says about it:QuoteMy advice: forget the 4046 and use the 74HCT9046 instead. Still not perfect but much more stable and reproducible.

author: Benta
author_rank: Super Contributor
timestamp: March 20, 2018, 09:27:35 pm
content: Quote from: Bud on March 20, 2018, 09:18:11 pmYou may be right. I read "so I understand it", "but as I've heard it" etc.My friend has made dozens of projects using 4046-type PLLs, I trust that a bit more than the waffle.If you take the trouble to read the paper, he actively discourages people from using the "two resistor" VCO circuit. And he also points out the spread.The main point is how to build the loop controller, where the data sheet gives misinformation.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 20, 2018, 09:50:10 pm
content: Waffle is necessary, as I don't have much experience with them myself -- I know people that do, I can provide contact if you like.Also don't have enough experience to talk about loop compensation, but that is always a thing to look out for. If you don't allow some hours to test component values during bring-up, you're going to have a bad time. A particularly insidious case when the datasheet claims to know the way!Tim

author: Benta
author_rank: Super Contributor
timestamp: March 20, 2018, 09:53:30 pm
content: Quote from: T3sl4co1l on March 20, 2018, 09:50:10 pmSo why on earth did you derail this thread right away? But I'm glad you 'fessed up. Hats off to you, Sir!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 20, 2018, 10:00:32 pm
content: Quote from: Benta on March 20, 2018, 09:53:30 pmBecause that's how forums work, you post a thought and people reply with whatever comes to mind. Alas, we all suffer this frustration. You can't say you didn't get what you paid for.Tim

author: Benta
author_rank: Super Contributor
timestamp: March 20, 2018, 10:36:10 pm
content: Quote from: T3sl4co1l on March 20, 2018, 10:00:32 pmThe other option is to refrain from posting, when it's a subject you know very little about.That'smystyle.

author: chris_leyson
author_rank: Super Contributor
timestamp: March 20, 2018, 11:59:29 pm
content: I've used CD4046 and HEF4046 without any problems and then it would have been either Fairchild or Motorola CD4046 running at 15V, back then a lot if not most of the Fairchild 4000 series was also specified for 18V operation. T3sl4co1l has a good point about the 74HC series, there is probably a lot of "logic" that just doesn't translate from an 18V CMOS to 5V CMOS process so fully characterize any parts before you use them. Thanks for the link to the paper, I will keep a copy stashed away for future reference.

author: moffy
author_rank: Super Contributor
timestamp: March 21, 2018, 01:10:33 am
content: I am happy to hear T3sl4co1l's comments about the HC version, first I heard about the problems and quite a gotcha. Also delighted to hear about the 74HCT9046, definitely the choice for higher frequencies.

author: KE5FX
author_rank: Super Contributor
timestamp: March 21, 2018, 01:27:51 am
content: Next up: a direct digital synthesizer built from 12SQ7s.These 4046-family chips are all genuine antiques, and should be considered to be primarily of historical interest. Too many nicer parts out there that actually work well.For the record, the CD4046isthe part that had the dead-band problem, as originally documented by W. Egan and E. Clark in 1978 (according to Rohde). The most common fix, again documented by Ulrich Rohde, is to use a 1M resistor to ground at the output of the charge pump. This has the effect of biasing the operating point to a nonzero offset.As Karel says, the74HCT9046Aseems to be the latest of several generations, and its data sheet says there's no dead zone. It would probably be the best one to use if you want to experiment with a 4046-type part. No DIP package, unfortunately...

author: edavid
author_rank: Super Contributor
timestamp: March 21, 2018, 02:01:01 am
content: Quote from: KE5FX on March 21, 2018, 01:27:51 amWhat are your favorites, especially for 1kHz to 1MHz frequencies?Quote74HCT9046AN is obsolete, but available from eBay or utsource.net

author: KE5FX
author_rank: Super Contributor
timestamp: March 21, 2018, 03:04:31 am
content: Quote from: edavid on March 21, 2018, 02:01:01 amA DDS chip.But that really is derailing the thread.Failing that, I'd consider whether the application really needs a phase-frequency detector at all, or if it can get by with a mixer or XOR gate. I can't think of many use cases for a 4046 at this point, other than perhaps ones driven solely by cost. Anyone have any good examples?Assuming there's already a CPU sitting around, my natural inclination would be to tackle low-frequency synchronization and synthesis problems entirely in the digital domain.

author: Karel
author_rank: Super Contributor
timestamp: March 21, 2018, 07:38:54 am
content: Quote from: edavid on March 21, 2018, 02:01:01 amThat's why you should use the 74HCT9046AD.

author: capt bullshot
author_rank: Super Contributor
timestamp: March 21, 2018, 08:55:18 am
content: Quote from: T3sl4co1l on March 20, 2018, 08:51:19 pmWell, that depends ...As a general rule: One cannot easily replace a x4046 with a same type number but other manufacturer in most cases.From my experience this is common with HC4046 (must stick with the orignal manufaturer, sometimes even tuning the circuit does not help), and happened at least once to me with a CD4046 variant.The HC4046 can do higher VCO frequencies, so if you need this, you cannot go back to the CD4046. But HC4046 oscillators behave very different between manufacturers, and if your circuit work, hopefully your chosen manufacturer doesn't do chip shrinks or revisions, then you're screwed again.If you need a reliable and long term manufacturably stable PLL circuit, go for other chips.

author: sourcecharge
author_rank: Regular Contributor
timestamp: March 23, 2018, 12:47:46 pm
content: The most important thing I found using PLLs is basically how fast can something relieably lock in, and hold, while allowing a wide lock in range.This really all has to do with the Low pass filter and the VCO ability.I was going to use this with a series LC type induction heater setup but have since found they are very inefficient and have no more need for the PLL so I really haven't worked more on it.What I did do though is try to find the root cause of why the 4046 has such a low lock in range by making simulations using the edge triggered phase detector using CMOS D flip flops, some logic, and a half bridge.I found that the 555 use as a VCO was very limited, but I had some XR2209 VCO laying around and found they had a 1:1000 Hz sweep range so, here is what I have so far.Keep in mind that the XR2209 operates better with a + and - voltage input, and that it actually has a negative voltage feedback to frequency with the VCO instead of a positive voltage feedback to frequency. If you want a positive feedback, you have to change the logic, I have prototyped this and it works good.BTW. some notes:the AND gate is on the reset of both those DFF.The logic input and output is from +/- 10V (there are logic grounds and normal grounds in B2 spice that look the same)The filter and voltage sources for the charge pump all have normal groundsThe Black Box/triangle 2 terminal parts represent xspice square/triangle wave VCOs that can be internally changed for all variablesI have this setup to do a FM input square wave for a simulated frequency sweep that the PLL follows..The NAND logic on the charge pump can be substituted with an AND gate and then use another Nch mosfet with a resistor on the drain to drive the Pch mosfet at the top.1 DFF, 1 AND, 2 Nch, 3 resistors, 1 capacitor, 1 Pch, 1 VCO, 1 Input frequencyIf you want to multiple the frequency, a divider can be put between the VCO and the DFF but the VCO has to be setup for the higher frequency.So If your simulators don't have edge triggered Phase Detectors (4046 type, type 2 PD, or type 2 PLL), there you go..Hope that helps

author: G0HZU
author_rank: Super Contributor
timestamp: March 23, 2018, 02:32:28 pm
content: QuoteI did a lot of PLL design from about 1990 onwards using this type of PFD and back in those days there was obviously no internet and you just had the classic PLL books from Gardner, Rohde and Manassewitsch and a string of dodgy application notes to work with.The app notes weren't nice to work with and from memory it didn't seem to matter which app note or technical reference you turned to there was always something missing or there were typos or mistakes in the practical examples. Very frustrating!We ended up developing our own design tools to design the loop filter and predict the PLL performance. Back then the primary interest was to design high performance local oscillator signals for use in receivers and these typically ran up into the GHz region. So a typical PLL had a VCO, prescaler, DM prescaler and a PLL chip with a divider and PFD. There was so many design traps to fall into in those days.I remember balancing lock time, divider noise, PFD frequency, DM prescaler ratio (and associated setup delay time), synth steps size, reference sideband levels and VCO noise to try and get the best performance across a wide tuning range. It really was state of the art stuff and we ended up developing our own 'post PFD' current sink/source circuit using BJTs that could run at 28V. So no need for a noisy and slow op amp in the loop filter and the noise and sideband suppression was very good.So I would agree that there is a place for a 4046 article like this because the app notes still seem to be poor and the worked examples in the app notes (for various chips that use this type of PFD) are still dodgy.... or they were the last time I looked. I think this "Using 4046-Type PLLs Successfully" guide needs a bit of work though, especially if you want to help a total newbie.

author: C
author_rank: Super Contributor
timestamp: March 23, 2018, 03:45:53 pm
content: Back in the 70's there were some receivers that needed very fast frequency change capability over a very wide frequency range.In place of one PLL, many were used. Was a bunch of mixers and PLL's that did the job.Some went so far as digital store & restore of AGC to get needed speed.

author: Benta
author_rank: Super Contributor
timestamp: March 23, 2018, 05:16:33 pm
content: Sourcecharge and G0HZU, thank you for your helpful and constructive remarks.We've read them through with interest.The author says:My reference #1 when writing the note was Floyd M. Gardner, he is the absolute expert in this field.He states:- A Type 2 PLL must have a at least a second-order transfer function.- To achieve a second-order transfer function with a "normal" PFD, an active loop controller/filter is needed.This is what my note tries to describe.A different situation exists when using a charge-pump PFD. The schematic shown by sourcecharge is a charge-pump PFD and will work with a passive filter, G0HZU also mentions a "'post PFD' current sink/source circuit".Unfortunately, the 4046 is not suited for charge-pump operation, having only one (three-state) output and so we are left with the active loop controller/filter.With a lot of goodwill, you might argue that the 4046 data sheet shows a passive filter that can be used if the PFD output is interpreted as a charge pump (current limiting in the PFD output transistors). But eventhenthe data sheet would be wrong!Gardner proposes this passive filter for a charge-pump PFD:

author: C
author_rank: Super Contributor
timestamp: March 23, 2018, 05:39:16 pm
content: Might think of a passive filter network that does more the just make steady output.You have steady when in narrow working range.You could have rate of change creating a forward feedback & a negative feed back that when in narrow working range cancel.

author: G0HZU
author_rank: Super Contributor
timestamp: March 23, 2018, 10:08:56 pm
content: QuoteYes, I should have made it clearer that I applied the sink source circuit to a similar phase detector found in Motorola PLL chips and these have V and R PD outputs. I also dabbled with the Plessey range of PLL chips that used a PFD and a sample/hold phase detector together as a coarse and fine PD. The aim was to get better reference sideband rejection once locked. But the Plessey parts weren't suitable as the lock time was compromised too much with the dual PD operation.I entered your example data into an old excel spreadsheet for the 4046 type PFD. See below. This obviously wasn't the tool I used back in 1990 and everything was DOS based back in those days. I think I only used the excel spreadsheet once or twice for revision purposes but it seems to agree with your paper. I can't remember where the equations or pictures came from. Probably Gardner.

author: Benta
author_rank: Super Contributor
timestamp: March 23, 2018, 10:27:34 pm
content: G0HZU, interesting. Independent verification is always nice.Thank You for sharing.

author: sourcecharge
author_rank: Regular Contributor
timestamp: March 27, 2018, 06:04:40 am
content: I've got a question to all you professional electronics engineers...The analog PLL really is limited by the VCO.Has anyone made a digital VCO?Not a DCO, but a VCO that was programed by a DC voltage input accurate to the micro-volt.Seems simple enough, but I have not done DCOs, DACs, FPGAs, Microprocessors, etc, etc...If a digital VCO was made that could have a linear micro-voltage to frequency sweep of like, (1,000,000 : 1), the PLL would be propelled forward to having almost an instantaneous, unbreakable lock, with no jitter using active filters.The only problem with active filters that I found was that even though they decrease the lock in time and create less jitter, the range of the PLL lock in is greatly decreased.Just a thought...BTW, I actually did alot of research on digital frequency multiplication, forgot what I was going to use it for...If anyone is interested, make a thread and post what you got already, and maybe I can help.