Tight GND plane Pros and Cons - Page 1
Forum section: electronics / general

author: RasberryCedarPickle
author_rank: Newbie
timestamp: November 05, 2023, 01:10:15 am
content: Imagine a typical 2Oz/1Oz, 4 layer PCB with a stack-up, Sig/Pwr, GND, GND, Sig/Pwr. Your typical trace width/space would be 0.2mm/0.2mm, and a prepreg Dk of ~4, ignore the Core. Fastest signal on the board is highspeed USB.These are the two stack-up up dimensions to consider.Stack-Up A------SIG/PWR===Prepreg [0.09mm]-----GND===Core-----GND===PrePreg[0.09mm]-----SIG/PWRStack-Up B------SIG/PWR===Prepreg [0.2mm]-----GND===Core-----GND===PrePreg[0.2mm]-----SIG/PWR|I understand that brining the GND layer closer to the SIG/PWR can help mitigate crosstalk by increasing the interplane capacitance. I also understand this interplane capacitance can also make hitting target impedances difficult, due to manufacturing constraints. Last I checked to hit 90Ohm diff impedance the trace width/space would need to be in the range of 0.15mm/0.2mm. These are two of the pros and cons I know about.What are some other potential advantages and disadvantages to placing your GND plane close to you SIG/PWR layer; when compared to the standard 0.2mm SIG/PWR clearance.I posted this Question on StackOverflow as wellhttps://electronics.stackexchange.com/questions/687846/tight-gnd-plane-pros-and-cons, as I said there I understand, the answer is "it depends". I want to hear about peoples failure and successes that I haven't had a change to make yet. Your design/situation will not be the same as mine but there may be cross over.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 05, 2023, 04:31:53 am
content: Additional discussion here:https://electronics.stackexchange.com/questions/687846/tight-gnd-plane-pros-and-consTim

author: Psi
author_rank: Super Contributor
timestamp: November 05, 2023, 06:50:13 am
content: This is the kind of question that will take way more time/money trying to answer in theory than it will just ordering both PCBs and testing them.(Assuming you have the equipment to test them.)

author: tggzzz
author_rank: Super Contributor
timestamp: November 05, 2023, 08:39:51 am
content: Just for fun and to provoke discussion, I'll propose a different stackup:gndprepregpowercoresignalprepregsignalWhy? To improve decoupling, by using the prepreg as a the dielectric in a distributed capacitor. The thinner the prepreg, the better.Possible applicability: simple circuit with only a few short signal tracks, driving a power-gnd voltage swing into a 50ohm load, and with a requirement that the transition is as clean as possible.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 05, 2023, 09:52:52 am
content: Quote from: Psi on November 05, 2023, 06:50:13 amWorse: you'll derive erroneous conclusions from insufficient degrees of freedom!For example, differences in supply impedance, or coupling ratios to connectors, etc.Tim

author: RasberryCedarPickle
author_rank: Newbie
timestamp: November 05, 2023, 05:59:35 pm
content: QuoteI don't see the benefit in this one, placing the signal layers directly over one and other seems like a good way to increase noise no? The original stack would achieve the distributive coupling effect your talking about.

author: RasberryCedarPickle
author_rank: Newbie
timestamp: November 05, 2023, 06:13:26 pm
content: I do appreciate the feedback from everyone, and I'm not looking for a silver bullet here just a conversation. I get it there are so many unknowns, but what are some of those unknowns (you don't know what you don't know).The question is kind of like asking how much clearance should I give my traces, the answer is "it depends". But 8/10 you'll recommend more spacing, more is better. That's kind of what I'm asking here. Is it a similar situation where 8/10 its a better to place your GND as close to the SIG/PWR layer as physically possible?What's a situation where you might not want to, for example I would imagine the space between the layers would create a wave guide which would create a resonance cavity for a particular frequency.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 06, 2023, 04:57:54 am
content: Quote from: RasberryCedarPickle on November 05, 2023, 05:59:35 pmYou cropped the relevant part. It would be nonsense, but for...Quote from: tggzzz on November 05, 2023, 08:39:51 am"few" "short" signals, covers crosstalk and emissions. Or maybe emissions isn't a concern at all because it's in an enclosure, or test equipment that is exempt.One could also use a double-core build, with the outer layers being much more distant from each other than the middle pair spacing; this would still perform slightly poorer in comparison to the above proposal, in that the trace widths have to be wider for given impedance, and vias are longer (taller).Important to keep in mind that these are very small differences for the most part, for example the added trace+via length of supply/GND stubs, but we're talking <1mm difference, in comparison to like using 0805 vs. 0402 components where body length alone is a solid 1mm difference, and give or take assembly difficulty maybe components can be crammed together (minimal courtyard clearance, or even overlapping pads), are far more profitable places to look, instead of concocting some bespoke custom stackup.Also keep in mind, stackups of this scale (0.1-0.8mm laminate) are perfectly fine up to 10s of GHz; up there, impedance networks are used to get whatever matching is needed. You can't just make arbitrarily short (low) impedances, but with clever use of couplings and resonances, you can do everything you need. Note that, for resonant stubs for example, the via length adds to the trace length, so it's simply factored out and height isn't an important consideration.Tim

author: tggzzz
author_rank: Super Contributor
timestamp: November 06, 2023, 09:05:09 am
content: Quote from: RasberryCedarPickle on November 05, 2023, 05:59:35 pmThey have to go somewhere, and those are the places availableBeing more distant from the power planes means impedance matched traces can be wider, with corresponding advantages and disadvantages.Your stackexchange thread actually contains some useful info; thanks T3sl4co1l for pointing it out. I found the videowas, unusually, worth watching - despite being 2hours long.Why: it contains solid theory, practical implementation of theory, and measurements.T3sl4co1l also nails why I specifically mentioned "short" and "few"

author: RasberryCedarPickle
author_rank: Newbie
timestamp: November 06, 2023, 06:19:21 pm
content: QuoteI'm still not convinced by the example, at best you'd get similar performance to the original proposed stack-up (0.09mm prepreg), at worst you're potentially dealing with plane discontinuities. If you were to swap PWR and GND planes then you'd give your self a better chance. but it still doesn't seem better solution, for argument sake of course.

author: tszaboo
author_rank: Super Contributor
timestamp: November 06, 2023, 07:31:08 pm
content: I usually go with this 4 layer board:Signal / RF with GND copper pourGNDPower planeSignal plane with GND copper pourWorks with 2.4GHz or LTE traces, passes EMC and RED tests, tracks are not wider than an 0402 component with coplanar waveguide. For high speed signals there is little difference between GND and power. I use planes, or split planes in case there are multiple power domains. I really don't see a reason why you would want to deviate from this, rather switch to 6 or 8 layer if necessary.

author: tggzzz
author_rank: Super Contributor
timestamp: November 06, 2023, 07:42:12 pm
content: Quote from: RasberryCedarPickle on November 06, 2023, 06:19:21 pmWhat plane discontinuities? (Or alternatively at what risetimes would any plane discontinuities become an issue?)I wouldn't argue about swapping power and ground planes, but the video indicates why it isn't a major issue. In a two power plane PCB, that power plane would have to be the power to the device generating the signal, not a power plane for other devices.As for comparing it with the original stackup, the effectiveness of a combined signal/power plane would depend on the proportion of the plane devoted to power, and how that was connected to the devices and the ground plane.I very rarely say this since I strongly dislike most videos, butdo take the time to watch the video; it contains useful and "surprising" info. It starts with a revealing anecdote...Thevery experiencedauthor had given a presentation on PCB layout, and Ralph Morrison was in the audience. Afterwards Morrison said he liked the presentation but would like to have dinner with the author. During that dinner Morrison asked a fewvery simplequestions that the author found he couldn't answer. After more prodding plus a key concept from Morrison,the author completely changed his understandingof what is happening and why. Revelations like that are rare, and to be cherished.Key questions: what is carrying the power from the source to the destination? Is it the current or voltage?

author: nctnico
author_rank: Super Contributor
timestamp: November 06, 2023, 07:59:56 pm
content: Quote from: RasberryCedarPickle on November 05, 2023, 01:10:15 amStackup A is one you typically use for HDI designs which have high speed (UBS3.0, LVDS, PCIe express, DDR memory) traces on a board with track width / space <= 0.1mm. You can create 90 Ohm and 100 Ohm differential pairs with high densities easely.Stackup B is suitable for simpler designs with lower speeds.

author: nctnico
author_rank: Super Contributor
timestamp: November 06, 2023, 08:39:55 pm
content: Quote from: tggzzz on November 05, 2023, 08:39:51 amThat won't do you any good. Any large piece of copper floating over a ground plane is a resonator. The capacitance between power / ground planes is highly overrated and the inductance of a power plane is underrated. So having the power and ground planes on the inner layer is better and the power plane needs to be AC coupled to the ground plane. That at least provides isolation (less crosstalk) and a good reference plane to the signals. If you want to route high speed signals over such a 4 layer board, you'll need to add decoupling capacitors at places where you go from top to bottom (=from ground plane as the reference to the power plane as the reference) to carry the return currents that move along with the high speed signals.

author: tggzzz
author_rank: Super Contributor
timestamp: November 06, 2023, 09:37:38 pm
content: Quote from: nctnico on November 06, 2023, 08:39:55 pmTrying to understand things in terms of lumped components progressively runs out of puff at multi GHz frequencies.Do have a look at that video. There were many things in it which surprised me, but which coincided with some topics I've avoided getting to grips with. Things involving div, grad, and curl, and similarMany times, possibly too many times, I've said I loathe most yootoob vids. That's an exception that proves the rule.

author: nctnico
author_rank: Super Contributor
timestamp: November 06, 2023, 10:24:58 pm
content: Quote from: tggzzz on November 06, 2023, 09:37:38 pmActually not. Capacitance and inductance are basic physical properties which don't change regardless of frequency. You can not change the laws of physics. Simulating these kind of structures using an EM field solver like Sonnet is extremely insightfull. 15 years (or so) ago some guy in SED (who appeared to be considered knowledgable by the other inhabitants) claimed that connecting top and bottom RF ground planes using 1 via would be enough and capacitive coupling would do the rest. So I put that to the test and build a simple LC filter using SMD components (around 700MHz IIRC) on a double sided board. Long story short: the filter didn't work at all until I added way more vias to stitch the top & bottom grounds together. To verify I simulated the same structure using Sonnet and it quickly became obvious that the top & bottom ground planes behaved like resonators when not stitched together properly. And this happened at several hundred MHz!

author: thm_w
author_rank: Super Contributor
timestamp: November 06, 2023, 11:02:34 pm
content: Rick points out multiple times in the video to avoid the signal/signal stackup...As OP we requested we are talking about rules of thumb, or things that are applicable 80% of the time. So its not really relevant to this discussion.

author: tggzzz
author_rank: Super Contributor
timestamp: November 06, 2023, 11:14:46 pm
content: Quote from: nctnico on November 06, 2023, 10:24:58 pmNo, capacitance and inductance are not fundamental. Electric and magnetic fields are fundamental.What we term capacitance and inductance are a simplistic description of some of the interactions between those fields.

author: tggzzz
author_rank: Super Contributor
timestamp: November 06, 2023, 11:23:06 pm
content: Quote from: thm_w on November 06, 2023, 11:02:34 pmThat's only part of what he says; he also gives examples of how it can be made to work. Note his principal focus is EMI/EMC.As for rules of thumb, make sure you take account ofBogotin's rule of thumb number zero.Bogotin is a useful resource for signal integrity, but no one source is good for all purposes.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 07, 2023, 03:59:03 am
content: Quote from: nctnico on November 06, 2023, 08:39:55 pmWho said anything about "large piece of copper"?If you mean the fact that there's two planes at all (then, I guess, advocating routed power over plane?), simply spreading around some bypasses (chosen appropriately so that ESR dampens ESL * plane capacitance) handles that effectively. Which can be easier said than done when you're stuck with ceramic capacitors and no room (in terms of ESL) to add a resistor, but, in principle anyway.Or given the proposed application, not much plane area might be needed anyway, more just to get some room between active device(s) and bypasses. Or excessive plane area might indeed be discouraged so as to avoid subtle bouncing of a desired very-flat square pulse.Quote from: nctnico on November 06, 2023, 10:24:58 pmIt's right and wrong, depending on perspective. It's clearly wrong for the wideband case. It's right above cutoff. Or... has the greatest chance of being right above cutoff. I mean, there is termination required, the plane plus via looks like a 2D shorted stub and you get all the modes between them (plus radiation off the edges like an open waveguide), and that all needs to be bypassed or dampened out to get a flat impedance. But the impedance is also very low (some ohms, for close plane spacing and wide dimensions), so even with resonances, the peak impedance might be low enough (say at some given via pair anywhere on the plane pair), that you can get away with, say, bandpass microwave structures on top, in the 50-100 ohm ballpark. It's not going to be a good design... but just to say, it might work.The better reading of such advice is, it was woefully over-general, for something that is a very special case, with a lot of provisios that might've been assumed rather than indicated (like the necessity of bypasses or termination). From which we can conclude, the person proposing such, is either not as smart as they claim to be, or is more popular / seemingly trustworthy, for political rather than technical reasons (always an important consideration in any community).Quote from: tggzzz on November 06, 2023, 11:14:46 pmI mean, you can keep using L and C, and Kirchoff, on differential elements within the field. But that's just FEA with extra steps, and relegating them to lower-frequency or narrow-band lumped-equivalent modeling, is probably the more responsible application.Tim

author: tggzzz
author_rank: Super Contributor
timestamp: November 07, 2023, 12:18:17 pm
content: Quote from: T3sl4co1l on November 07, 2023, 03:59:03 amYes, in general simpler is better, but of course "too simple" is worse.That requires a knowledge of why & when "simple" is sufficient, and hence of the grey boundary where "simple" gradually runs out of puff.Butyouknow that.

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 08, 2023, 07:01:43 am
content: Quote from: tszaboo on November 06, 2023, 07:31:08 pmSame stackup here 99% of the time.