hybridfree/eevblog-posts huggingface dataset:
KiCAD - Problem in routing Differential Traces - Page 1
Forum section: electronics / general

author: Arsh ahmad
author_rank: Regular Contributor
timestamp: November 09, 2024, 07:41:34 pm
content: Hi,I am having some problems with routing differential traces in KiCAD, by using P and N notations I am able to route them like a normal single ended trace, but then how to drag them as they are dragged like a single ended trace.Is there any work-around for this?

author: jduncan
author_rank: Regular Contributor
timestamp: November 09, 2024, 09:06:20 pm
content: nope

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 10, 2024, 03:27:21 pm
content: This is also one of the oldies. It is tracked in:https://gitlab.com/kicad/code/kicad/-/issues/2005And no, it's not from 2005, but from 2016, which is also plenty old. KiCad development is a bit chaotic. There is some leadership and and direction, but most of the developers are volunteers, and they are free to work on any section that interests them most. And with 1500 open issues on gitlab, some of the older issues do get behind a bit, but they are not forgotten.

author: phil from seattle
author_rank: Super Contributor
timestamp: November 10, 2024, 06:43:54 pm
content: You don't give much info but differential traces in Kicad are very fussy and give you no feedback as to what is happening - either it works or it doesn't. There are a number of settings that affect it (from memory: board setup predefined sizes and netclasses, filled zone rules, ...) Keep playing with it. Same thing with length tuning. Once you get a feel for how it works, it's not too bad though.Often the traces look really weird when routing the starting or ending points. I sometimes fix the really ugly ones individually and then length tune when done. For length tuning, try to have lots of uncluttered space available. I usually do it very early in the layout process because of that.

author: Arsh ahmad
author_rank: Regular Contributor
timestamp: November 11, 2024, 07:25:07 am
content: Most of the interfaces are fine for length matching, but DDR routing requires lot of dragging and that takes lot of time, If there is any tutorial or any session for routing DDR in KiCAD it will be very helpful.For company use I use Allegro that has very sweat length and Delay tuning utility built it into it. This is the reason whenever I have a SoC design I am not able to use KiCAD and I have a to go for Cadence(Which has advanced features but interface is worse compared to KiCAD since it is a cluttered mess).
Tantulum Capacitor silkscreen  - Page 1
Forum section: electronics / general

author: TankSparks
author_rank: Contributor
timestamp: November 07, 2024, 02:44:19 am
content: There is a U shape silkscreen around the tantulum capacitor, which end should be positive? I thought the open end of the U should be positive. Notice kicad 3d view put the stripe at the top indicating the Positive. I added + on the silkscreen, thats where I want it. It bugs me that the silkscreen seems backwards though. I googled for a long time but found no answer as to how the silkscreen should be. footprint and symbol are stock from Kicad library.There is also 2 leds with U shapes around then, with the open end being Anode (+)

author: Kim Christensen
author_rank: Super Contributor
timestamp: November 07, 2024, 03:06:26 am
content: I don't like many of KiCad's default silkscreens either. The diodes make a bit more sense if you think of the bottom of the squarish U as the cathode "line"...You can download alternate KiCad footprint libraries or just edit the ones you use most often and save them.Just an example. I haven't tried this version:https://alternatekicadlibrary.com/

author: Uky
author_rank: Regular Contributor
timestamp: November 07, 2024, 12:04:44 pm
content: Quite a few symbol & footprint services that offers scripts for the creation of footprints,creates footprints with non useable (ugly!) silk screens. Way to thick apperture, silk screen underneath thefootprint, etc. Even some built-in wizards does this (Like Cadence. Have not tried 24.1 yet though)Unless there is plenty of space available, I always use minimum apperture for silk (0.1mm/4 mil),add ONLY a pin or polarity indicator for discrete components. And I always place the polarityindicatoroutsidethe foot print.For thru hole components (still used?) I always use a square pad for pin #1, cathode (diodes), + on electrolythic capacitors.Some professional customers I have, only orders the first batch with silk screen for debug before mass productionusing TOP layer for board name, revision, a few texts. Nothing else. Having polarity/pin indicators in the copperlayer makes repairing easier.As previously pointed out, I do not like silk underneath the componentsbut there are other tips worth reading below:https://cdn.weka-fachmedien.de/whitepaper/files/mentorpaper_86309.pdf

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 07, 2024, 02:02:10 pm
content: I suggest you try out the "Alternative KiCad Library" which can be installed via the "Plugin & Content Manager".I attached an example:
QFN pad confusion for F.Paste selection - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: November 05, 2024, 04:43:52 pm
content: I have this footprint for a MP8765 buck converter IC (came from Ultra Librarian) where pads 8, 9 have the F.Paste on, but not pads 15, 16, all of these belong to the same net. There's also a polygon/filled shape below pad 15 with F.Paste turned on.Shouldn't all these pads have F.Paste turned on, and what's the deal with the "extra polygon" with F.Paste turned on?I have this stencil in production and they're not sure how I want this polygon to be cut (f.paste or solder paste). I think it has to be cut on the f.paste. But now I start to wonder about pads 15, 16 as well.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 05, 2024, 11:20:52 pm
content: F.Paste is KiCad's name for the solder paste layer for the front side of the PCB, so I'm not sure what the question is.I have not looked at the datasheet of your MP8765. It is relatively common that the footprints for IC's get modified in some way.I also would not trust a footprint from UltraLibrarian (nor SnapEDA, nor Samacsys nor PCB Libraries or any of the other "footprint collector sites". With big center pads, the cutout in the solder stencil is often much smaller then the exposed pad or the copper on the PCB. If it was the same size, there would be far too much solder on the pad, and the IC would float on the center pad, without the pads on the circumference getting soldered.

author: newtekuser
author_rank: Frequent Contributor
timestamp: November 06, 2024, 04:56:09 pm
content: Quote from: Doctorandus_P on November 05, 2024, 11:20:52 pmIs there a better place to source these footprints, or is the best practice to DIY them?
Can't route traces or pour copper to connect MP8765 IC - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: November 03, 2024, 06:13:38 am
content: The MP8765 datasheet suggests a nice layout consisting of copper pours and traces for connecting this IC to the rest of the circuit, but as it turns out the footprint I have doesn't allow me to do either (I've downloaded it from Ultra Librarian via Digikey).Copper doesn't pour to any of the pads and even the default trace width of 0.25mm will not fit. Dropping VIAs won't work either for the same reason.Any suggestions what to try?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 03, 2024, 12:32:42 pm
content: To connect to a pad, both the track and the clearance around it has to fit in between the adjacent tracks. With your color settings, the light grey areas are the clearances between the pads and the tracks. These clearances can overlap with each other, but they may not overlap with copper from another net. And in your case it does not fit. You can change this in the board setup. The quickest way is probably to simply change the settings of the "Default" netclass, but overall, net classes are a quite nice and useful method to manage different track and clearance widths for different purposes and you should invest some time into what net classes are and how they work.

author: newtekuser
author_rank: Frequent Contributor
timestamp: November 04, 2024, 01:42:17 am
content: Quote from: Doctorandus_P on November 03, 2024, 12:32:42 pmI re-adjusted clearances and added another smaller pre-defined track size (both still within the limits of my manufacturer) and now the pour and tracks go where I want
8.0.5 broke the intersheet references... - Page 1
Forum section: electronics / general

author: ajawamnet
author_rank: Regular Contributor
timestamp: October 20, 2024, 11:55:16 pm
content: See vid here:

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 22, 2024, 01:55:58 am
content: Yes, there are some weird issues with page numbering & ordering (on which those references rely), But why do you make a video about that for V8.0.5 now, while V8.0.6 was released a week earlier.Posting a video here also won't help. If you want (to) help, then start by looking up the issues about page numbering and sheet references on gitlab, where KiCad's developers put all their things together.https://gitlab.com/kicad
Kicad 8 on windows 10 opengpl problem - Page 1
Forum section: electronics / general

author: sonielkraf
author_rank: Contributor
timestamp: October 14, 2024, 01:50:01 am
content: heloo everybody, i was install kicad 8 on my windows 10, but any trouble if i show on 3d view, the opengpl is not support, any solving? thanks

author: abeyer
author_rank: Frequent Contributor
timestamp: October 14, 2024, 04:55:57 am
content: This is a configuration issue with your graphics card/software. Common culprits are the GPU is too old and doesn't actually support the required opengl version, the GPU driver package is out of date and needs to be updated, or the GPU driver package unbundles opengl support and some support component for it needs to be installed/upgraded separately. If you can't get it to work that way, you may be able to use the "Fallback Graphics" mode in kicad to bypass hardware acceleration

author: Georgy.Moshkin
author_rank: Frequent Contributor
timestamp: October 14, 2024, 05:16:51 am
content: You can try mesa3d software rendering opengl dll. I haven't tested it with kicad, but it made csxcad (from openEMS) work with remote desktop. For some reason, an ancient graphics card opengl driver refused to work in win10 when executed remotely. Of course it's better to find and fix the issue, maybe reinstalling graphics drivers would be enough.p.s. I downloaded mesa3d here:https://fdossena.com/?p=mesa/index.frag

author: sonielkraf
author_rank: Contributor
timestamp: October 14, 2024, 10:18:57 am
content: ok, thank you so much, i will try

author: golden_labels
author_rank: Super Contributor
timestamp: October 14, 2024, 11:59:37 am
content: I can’t help with Windows, but I may provide a hint on what to search for, if Georgy.Moshkin’s suggestion doesn’t work.KiCad uses wxWidgets as its UI toolkit, and wxGLCanvas is used for 3D rendering. So the bug is somewhere on the line between wxGLCanvas and whatever it uses as its graphics backend on Windows, almost certainly out of KiCad’s influence.On Linux-based systems Mesa may be set to use software rendering.(1)But I have no idea, if that works on Windows. OTOH Dossena’s version claims to already be using software rendering by default.(1)GALLIUM_DRIVER=llvmpipe LIBGL_ALWAYS_SOFTWARE=true kicad— other software renderers maye be named inGALLIUM_DRIVER, but llvmpipe is both supposed to be faster and it “just works” for me.
KiCad 8 simulator plot settings - Page 1
Forum section: electronics / general

author: radiolistener
author_rank: Super Contributor
timestamp: October 09, 2024, 10:51:10 pm
content: I installed KiCad 8.0.5 on Linux and trying to use it's simulator. As a test, I'm trying to simulate a simple bandpass filter.Could you please advise how to set up the plot so that the frequency scale will be linear instead of logarithmic?

author: radiolistener
author_rank: Super Contributor
timestamp: October 10, 2024, 01:08:30 pm
content: It seems there are still no such settings, here is the issue regarding this:https://gitlab.com/kicad/code/kicad/-/issues/17815Maybe someone knows if it’s possible to open the simulation script and set this in the script?
"The routing start point violates DRC" error when routing differential pair - Page 1
Forum section: electronics / general

author: JJalling
author_rank: Unknown
timestamp: September 24, 2024, 02:07:05 pm
content: Hi all,I'm designing a board for the RPi CM4/CM5 module in KiCad. I have some differential pair traces that I want to route from the module, to a connector. With my current layer stack, the differential pair is .12mm trace, .2mm gap and .4mm clearance. When I try to start routing the differential pair, I get the error "The routing start point violates DRC", which it does because of the spacing on the connector for the RPi module.Is there a way to ignore constraints locally on a board, ie. on the RPi connector, so I can get the PCIe lanes routed?Thanks in advance,BR Jonas

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 24, 2024, 03:38:09 pm
content: Yes, you can for example make a custom rule to modify or ignore parameters inside a rule area, or simply inside the courtyard of a footprint. But there are (minor) bugs in this area that interact with how the interactive router works. The final DRC check is reliable though

author: JJalling
author_rank: Unknown
timestamp: September 25, 2024, 05:55:41 am
content: Excellent! Thanks for pointing me in the right direction.BR Jonas
Unlocking footprints in 8.0.4? - Page 1
Forum section: electronics / general

author: bson
author_rank: Unknown
timestamp: August 13, 2024, 10:52:39 pm
content: How do you unlock a footprint? It seems if I lock it with the L key (which toggles the lock), it becomes impossible to select and so can't ever be toggled off?

author: selcuk
author_rank: Frequent Contributor
timestamp: August 14, 2024, 06:20:26 am
content: You need to check the "locked items" check box in the "selection filter" window to select them.

author: bson
author_rank: Unknown
timestamp: August 16, 2024, 01:40:53 am
content: What selection filter window? If it's locked and deselected you can't right click and filter.The only ways I've found to select a locked part is with the Find (ctrl-f or cmd-f), but it behaves a little erratically. Sometimes you can't use it to select the part if you have recently and need to click "Restart Search" to find it. Or, select it in the schematic. This is just silly, why can't it be directly selected? It can still be locked; making it non-selectable doesn't add anything at all. If making things non-selectable is a desirable feature, then it should really be set separately.

author: Kim Christensen
author_rank: Super Contributor
timestamp: August 16, 2024, 02:13:12 am
content: Quote from: bson on August 16, 2024, 01:40:53 amIt's in the lower righthand side of the screen:

author: bson
author_rank: Unknown
timestamp: August 17, 2024, 10:13:32 pm
content: Oh, I don't keep the layer list open so I totally missed that! That explains it.
ibom with 8.0.4? - Page 1
Forum section: electronics / general

author: bson
author_rank: Unknown
timestamp: July 24, 2024, 07:47:26 pm
content: I can download ibom using the plugin and package manager in 8.0.4. But I can't seem to figure out how to run it? In the past it used to add an icon to the command bars, but it no longer does this. Also, there is nothing in the menus... anyone know? Clearly it supports 8.0.4 if it's downloadable from the server? I tried a few others, they also seem to offer no way to run them that I can find. Am I missing something obvious here?This is on OSX, haven't tried Win11.

author: bson
author_rank: Unknown
timestamp: July 24, 2024, 09:44:38 pm
content: Never mind. After a number of quits and restarts the buttons now appear in the PCB editor toolbar...
Cutting filled zone into smaller ones in KiCad's PCB layout editor? - Page 1
Forum section: electronics / general

author: NightMoth
author_rank: Contributor
timestamp: October 27, 2024, 03:52:18 pm
content: Hello all!Hope it is correct place for my question.Sorry, English is not my native language, also it looks that I'm trying to formulate this questionusing incorrect technical thermins, so I can't find answer by googling and on this forum.My question is regarding drawing of filled zones in KiCad's PCB layout editor.If I have some pads that belongs to same net, and their placement forms something like "islands" (pads grouped together and there isno pads from other nets between them), I can connect such pads with filled zone.But if geometry of such "islands" is complicated, it is very hard to edit form of such filled zone.Is it possible in KiCad's PCB layout editor make something like this:-First fill all layer with copper (<no net>), so there is one big filled area;-Second somehow "cut-out" "islands" of pads of same net by drawing cut lines or "borders" of new smaller zones using mouse;-Finally, assign net name for each of new smaller zones?In other words: cut one big filled zone into smaller ones, instead of place many smaller zones one by one?I found "Add zone cut-off" tool, but it just cuts some geometric figure from filled zone, and I can't cut it into new smaller zoneswith this tool.

author: Zoli
author_rank: Frequent Contributor
timestamp: October 27, 2024, 04:13:06 pm
content: Is under the "area rules"; Image1 shows the location on the toolbar(and implemented example) and Image2 shows the rule configuration.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 28, 2024, 08:08:19 am
content: You can create rule areas as Zoli suggest, and you can also draw graphic items on the margin layer (There will be no zone drawing in those areas) but that does not cut a zone into multiple zones. It will still be one zone, connected to one net. You will have to draw a separate zone for each unique net you want to connect it too.

author: selcuk
author_rank: Frequent Contributor
timestamp: October 28, 2024, 09:33:18 am
content: You can use keepouts to draw the unfilled areas between copper fills. Additionally, there is a "Zone priority level" property of copper pours. You can set a higher property for a particular zone and then it removes the lower priority zones under it.
Why does KiCad keep inserting / at the start of a net name? - Page 1
Forum section: electronics / general

author: Jonathon_Doran
author_rank: Regular Contributor
timestamp: July 07, 2024, 03:11:33 am
content: The net names are fine in the schematic editor. But they seem to be inverted in the PCB editor. What is going on here?For example, "USB_D+" becomes "/USB_D+". I took out the "_" but the net is still renamed.Edit: I think it is because I am using hierarchical sheets. The "/" seems to be referring to nets on the main page. I am just used to seeing signals beginning with "/" as active low. I see that KiCad is using ~ for this.

author: Slh
author_rank: Regular Contributor
timestamp: July 07, 2024, 05:46:21 am
content: The / is for local nets (only accessible on one page). Hierarchical or global nets won't have the /.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: July 07, 2024, 09:40:21 am
content: The actual names have not changed, but recently there was a change in how KiCad displays net names. KiCad now shows full "pathnames" (i.e. inclusive the hierarchical sheet name) for local nets. KiCad also shows these long names on tracks in the PCB editor.

author: Jonathon_Doran
author_rank: Regular Contributor
timestamp: July 07, 2024, 07:20:37 pm
content: That's fine. I am just used to using a leading / to negate symbols... /RESET for example. Things just read wrong to me, but I'll get used to it.Edit: If I were implementing paths, I would prefix them with the sheet names. Root/Reset is not likely to be misread. But a minor issue.
8.0.4 BOM crash - Page 1
Forum section: electronics / general

author: bson
author_rank: Unknown
timestamp: August 13, 2024, 10:51:36 pm
content: Anyone else run into this?It seems if in project A I generate a bom from the schematic editor into bom/foo.csv and tell it to use a path relative to the project, then when I go to project B, which doesn't have a 'bom' subdir, and try to generate a bom it either crashes on start or generates nothing...
Why does KiCad change my track width? - Page 1
Forum section: electronics / general

author: Jonathon_Doran
author_rank: Regular Contributor
timestamp: July 07, 2024, 10:58:12 pm
content: Another thing that has me puzzled. I am laying out traces and decided that the row/column lines in this matrix should be 0.5mm (19.69mil). This is a bit overkill for low speed signal traces, but I have the space and I was having trouble reading the net names on these long traces.I set the track width to a preset. I draw the trace. It appears as 0.2mm! I can manually change the track width back. But why?I see there is some sort of DRC violation when I try to connect to a pad on the same net. I can get close, but then the trace stops. I am not worrying about DRC just yet, I want a rough layout and then I'll clean it up.If I switch the track width to 0.3mm, then it places. I double-click on the track and see that it has changed the width to 0.2mm.I might understand if I was using too small of a trace, but too big?Edit: Looking at the DRC, I see there is a hole clearance violation. This is easily avoided by moving the trace to the side. When I was drawing, KiCad was the one who decided to go that close to the damn hole.I am connecting to key switch pads if that makes a difference.Edit: Nevermind. I see that a 0.2mm track was brought into a pad and it is forcing everything on the net to be the same size. I got rid of the small trace and turned off the option that says to use the existing width.
footprint editor,editing connector on board,Saving will the update theboard only - Page 1
Forum section: electronics / general

author: ttzo
author_rank: Newbie
timestamp: May 12, 2024, 09:13:54 pm
content: hello, i need update after edit the component to library NOT THE BOARD ONLY (footprint editor,editing connector on board,Saving will the update the board only)please help me how to do?

author: shapirus
author_rank: Super Contributor
timestamp: May 12, 2024, 09:42:30 pm
content: Quote from: ttzo on May 12, 2024, 09:13:54 pmIf I understand you correctly, then you need to edit the library footprint, not the on-board footprint. There's a button in the footprint properties edit dialog window:

author: selcuk
author_rank: Frequent Contributor
timestamp: May 12, 2024, 09:43:19 pm
content: On PCB editor, you need to select the component with a mouse click, press "e" (or right click -> properties), then on the "footprint properties" dialog, click "edit library footprint" button.What is you KiCad version?

author: JMK
author_rank: Contributor
timestamp: May 13, 2024, 02:59:32 am
content: Quote from: ttzo on May 12, 2024, 09:13:54 pmKicad libraries areread onlyYou need to save a modified footprint to a Personal Global Footprint Library; then use this modified footprint from your personal library for your layout.

author: ttzo
author_rank: Newbie
timestamp: May 13, 2024, 07:18:09 pm
content: kicad 8.0.2thanks you all

author: Kim Christensen
author_rank: Super Contributor
timestamp: May 13, 2024, 10:10:09 pm
content: You need to export the footprint to a folder. This folder must have the ".pretty" extension. Create it before attempting to export.Example path from my PC for where I keep my custom connectors. Your root path will vary from mine:F:\Users\Kim\Documents\KiCad\footprints\_Connectors.prettyThen you have to add that folder to the library search list:
Neonden YY1: Kicad place file for PnP and PCB origin - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: May 01, 2024, 12:16:37 am
content: I tried to use the Kicad place file for my PCB to populate boards with my Neoden YY1 instead of manually inputting component locations via the pnp touch-screen but the coordinates are way off. Upon contacting Neoden support I'm told that the YY1 does not deal with negative coordinates. I need to change the board origin from top left corner to top bottom left corner to match the origin of the YY1 but not sure how.Does anyone know where to change this in Kicad?

author: abeyer
author_rank: Frequent Contributor
timestamp: May 01, 2024, 05:47:12 am
content: https://docs.kicad.org/8.0/id/pcbnew/pcbnew.html#origin_axes

author: Doctorandus_P
author_rank: Super Contributor
timestamp: May 01, 2024, 07:04:35 am
content: Quote from: abeyer on May 01, 2024, 05:47:12 amThat part of the manual mostly deals with displaying on screen coordinates. With theDrill / Place File Originyou can set any location on your PCB that is treated as (0, 0) for Gerber and placement file output.

author: newtekuser
author_rank: Frequent Contributor
timestamp: May 01, 2024, 03:35:09 pm
content: Quote from: Doctorandus_P on May 01, 2024, 07:04:35 amThank you very much!
Exclude multiple components from board - Page 1
Forum section: electronics / general

author: loistvan
author_rank: Newbie
timestamp: March 29, 2024, 11:32:57 am
content: Hi,I'd like to "disable" a certain part of the schematics, i.e. I just want it to be not included into the board, without actually deleting it from the design.I'm aware of the "Exclude from board" option of individual components -- is there a way to apply this option to multiple components at the same time?Thanks!

author: shapirus
author_rank: Super Contributor
timestamp: March 29, 2024, 11:36:05 am
content: Quote from: loistvan on March 29, 2024, 11:32:57 amselect multiple -> right click -> attributes -> exclude from board.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 29, 2024, 08:31:08 pm
content: Quote from: shapirus on March 29, 2024, 11:36:05 amI suppose this is in KiCad v8? Because in v7, you can't do that.

author: shapirus
author_rank: Super Contributor
timestamp: March 29, 2024, 08:34:52 pm
content: Quote from: SiliconWizard on March 29, 2024, 08:31:08 pmYeah, I assumed v8.
KiCad 8.0.4 didn't catch swapped power pins - Page 1
Forum section: electronics / general

author: davep238
author_rank: Contributor
timestamp: September 09, 2024, 02:07:36 am
content: In the schematic editor, I accidentally connected the VCC pin of a part to GND, and the GND pin to VCC. I ran ERC, and KiCad didn't flag that as an error. I even tried it with a KiCad library part (74x04), instead of my own. No error. I'm an idiot for not seeing my error, but I'm disappointed that ERC was OK with it.Long ago, I used EAGLE, and I sort of recall that EAGLE asked if I wanted to connect a part's VCC pin to a 5 volt net. But, I'm guessing that KiCad is OK with connecting a part's power input pin to any power output pin.Other than having other people look over my designs before I send them to a board house, is there anything that I can do to keep me from doing this again? I did find 2 other bugs that I made, plus changes I want to make, so I need to respin the board again, anyway.Thanks-Dave Pollum

author: ataradov
author_rank: Super Contributor
timestamp: September 09, 2024, 02:35:52 am
content: There is no distinction between power types. This does not even make sense in all cases. Opamp power pins can have all sorts of voltage level combinations. And for negative logic, your "ground", may have higher potential than the power.And you can have arbitrary number of power rails in general. There is no sane way to check for this.

author: djsb
author_rank: Super Contributor
timestamp: September 09, 2024, 06:04:55 am
content: You should get a ERC error, "Error:Both GND and VCC are attached to the same items; GND will be used in the netlist". Maybe this should alert you to a possible problem, unless this is your intention?I'm running 8.05, so maybe there was a bug in the earlier Kicad versions. Have you checked?

author: davep238
author_rank: Contributor
timestamp: September 09, 2024, 10:55:17 am
content: Quote from: djsb on September 09, 2024, 06:04:55 amDavid,It was a multi-gate part, so there was a separate power symbol, which I had upside down. I had the GND pin connected to VCC, and the VCC pin connected to GND, so they weren't connected to the same net.Thanks.-Dave Pollum

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 09, 2024, 01:34:28 pm
content: Such mistakes are easy to make, especially with all those different names for power pnis of symbols, Vee, Vdd, Vss, Vdd, etc. But I don't know how KiCad can prevent this. In one of my projects I used an LM7905 and an Atmega to build a light dimmer, because of the 3 quadrant thing of most triac's. There is not anything special about "GND". For ERC it is exactly the same as any other power net.

author: bson
author_rank: Unknown
timestamp: September 12, 2024, 09:39:03 pm
content: KiCad has no way of knowing what power net each power input should be connected to and there is no real way to generalize this. It's not even aware that +3.3V is at higher potential than GND; those are just alphanumeric labels assigned to the power symbols. You can easily create your own and call it MY3V and KiCad will be perfectly happy to let you do that.
kicad vids - Page 1
Forum section: electronics / general

author: p.larner
author_rank: Frequent Contributor
timestamp: March 20, 2024, 11:37:15 am
content: can a list of links be posted to the best kicad training vids from beginer to expert in that order?

author: tggzzz
author_rank: Super Contributor
timestamp: March 20, 2024, 12:20:26 pm
content: Quote from: p.larner on March 20, 2024, 11:37:15 amYes it can.Use gurgle.

author: ppTRN
author_rank: Regular Contributor
timestamp: March 21, 2024, 04:15:52 pm
content: You can take a look to the whole Phil's lab youtube channel. Not only he will teach you via examples KiCad, but also other tools and electronics in general.https://www.youtube.com/@PhilsLab

author: ebastler
author_rank: Super Contributor
timestamp: March 21, 2024, 05:38:46 pm
content: Quote from: p.larner on March 20, 2024, 11:37:15 amDid you have a deadline in mind too?Any contractual penalties if the videos don't pass muster?
[Solved] How to remove the Not Connected "X" on a pin - Page 1
Forum section: electronics / general

author: kristakis
author_rank: Contributor
timestamp: March 11, 2024, 07:39:37 am
content: I've marked an unused pin on a µC as Not Connected (with Q) and it put a lovely little "X" there. Now I want to use that pin and I used the Wire tool to connect it to something but the "X" is still there and I can't find a way to remove it.I'm sure it's simple and obvious but I haven not been able to find anything in the menus or google.edit: Click on the arms of the X rather than the centre, or use the various selection techniques.

author: selcuk
author_rank: Frequent Contributor
timestamp: March 11, 2024, 07:52:48 am
content: Did you click on the red X and press delete?

author: kristakis
author_rank: Contributor
timestamp: March 11, 2024, 08:11:41 am
content: The "X" is blue. I can select the pin and the track but I can't select the "X"Pin 12 is not connectedPin 31 is connected as normalPin 32 was not connected but I now want it to be connected(sorry about the image size, I should have zoomed out a bit)

author: Doctorandus_P
author_rank: Super Contributor
timestamp: March 11, 2024, 08:24:55 am
content: Small things are sometimes a bit hard to select. To fix this, KiCad has implemented a "Long Click". (keep mouse button depressed for around 1s) This long click pops up a context menu which lists all items on that location. So then you can unambiguously select the "No connect" flag and delete it.Another option is to drag a small box around the no connect flag from left to right. Dragging a box from left to right only selects fully enclosed objects, while dragging a selection box from right to left also includes object that cross the box boundaries.

author: selcuk
author_rank: Frequent Contributor
timestamp: March 11, 2024, 08:27:32 am
content: The color depends on the active theme. I switched to default color theme, placed the blue X with "Q" and was able to delete it. Right click + Delete and Edit Menu + Interactive Delete Tool are also working. KiCAD version is 6.0.5-a6ca702e91~116~ubuntu20.04.1.

author: kristakis
author_rank: Contributor
timestamp: March 11, 2024, 08:34:06 am
content: Ha! Thank you!I had been clicking the centre of the X to select it. Clicking on one of the arms did the trick.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 11, 2024, 08:43:35 am
content: Yes, selecting it is a bit finicky.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: March 11, 2024, 08:48:25 am
content: Experiment a bit with those other options I mentioned. It's always good to have (and be familiar) with your options.
[v7.09 ] new symbol: how to change description - Page 1
Forum section: electronics / general

author: Karel
author_rank: Super Contributor
timestamp: March 05, 2024, 01:57:16 pm
content: I copied a power symbol "+3V0" from KiCad's library to a new (project) library and changed the value and pinname to "3V0" (I removed the '+').The description of the symbol however still says: "Power symbol creates a global label with name +3V0".How do I edit/change the description? I can use a texteditor to open the new symbol library and change the "ki_description" property but is thatthe way it's supposed to work in KiCad?

author: Karel
author_rank: Super Contributor
timestamp: March 05, 2024, 03:07:28 pm
content: Forget it, it's in File -> Symbol Properties....
My +12V net is now called "SRN" - Page 1
Forum section: electronics / general

author: ppTRN
author_rank: Regular Contributor
timestamp: April 09, 2024, 06:51:38 pm
content: Hi everyone.Just as the title says. I cannot explain how or why or what "SRN" means. The net was tied to +12V symbol in the schematic. Any idea what append? Also, if I try to create say a power planed tied to 12V, I will always find it as SNR.

author: golden_labels
author_rank: Super Contributor
timestamp: April 09, 2024, 08:21:14 pm
content: Did you edit the schematic after creating the PCB layout? Because I can see some other net names also being wrong: Pins 6 and 7 of U9 are connected to “Net-(R5-Pad2)”, but in the schematic it’s R6. Pad 1 of the resistor goes to “Net-(Q1-G)”, despite it goes to Q2.If you changed/renamed things, did you select “Update PCB from schematic” in PCB editor? Was there no errors/warnings?

author: ppTRN
author_rank: Regular Contributor
timestamp: April 10, 2024, 10:32:05 am
content: I am constantly changing stuff in the schematic while working on the PCB layout and always updating the PCB for concistency.When I update the PCB there are no errors regarding this issue

author: xvr
author_rank: Frequent Contributor
timestamp: April 10, 2024, 11:48:16 am
content: You have a short of SRN trace with this one somewhere in PCB. KiCAD trying to avoid such shorts, but sometimes he can't help it (for example - when you change schematic and some refdes or pins changed they nets, when you update PCB, and get what you got)KiCAD do not complain about shorts (as they created), but it will complain in DRC run (if you will check 'test for parity between PCB and schematic')
Footprint/symbol for AO6800 - Page 1
Forum section: electronics / general

author: cosmicray
author_rank: Frequent Contributor
timestamp: February 20, 2024, 07:13:39 pm
content: This part is two AO3400 gates in one physical package.The standard KiCad library does not have a schematic symbol for this part, although the footprint is a SOT-23-6. Is it more correct to draw one mosfet, then specify the footprint contains two instances or two mosfets side-by-side ? The two are independent and have no common connections. When drawing it as one mosfet (with two instances) part placement appears to drop an A followed by a B (for the two halves). It feels a bit existential, but one approach is probably more correct than the other.

author: jpanhalt
author_rank: Super Contributor
timestamp: February 20, 2024, 07:32:47 pm
content: DigiKey says the 6800 is an SC-74/SOT457 footprint. Find anything in the existing library with an SC-74 and see if it fits. There are footprint libraries on the Internet. Ultralibrarian is just one example.The footprint is just that. It generally doesn't care what the symbol is, just so the two are paired.
Kicad 9 EM simulation - Page 1
Forum section: electronics / general

author: metebalci
author_rank: Frequent Contributor
timestamp: February 19, 2024, 07:41:42 am
content: I didnt watch the whole talk at FOSDEM yet but it looks like the slides in the video does not show the slide 50 in pdf (https://fosdem.org/2024/events/attachments/fosdem-2024-1709-kicad-status-update/slides/22615/FOSDEM-2024_SDlLRjz.pdf) which lists EM simulation as a Kicad 9 misc feature.Do you know if this is certain and coming to 9 ? and actually my actual question is, is EM simulation often performed in high freq designs or is it something rare ?

author: delfinom
author_rank: Regular Contributor
timestamp: February 19, 2024, 02:42:09 pm
content: Quote from: metebalci on February 19, 2024, 07:41:42 amIt's more of a wishlist item. The biggest issue is all the open source FEM libraries which are _proven_ are written by US and European national labs that take masochistic pride in using as much Fortran, python and C glued together which makes cross-platform deployment an absolute nightmare.
Imported kicad symbol for IRF9Z24SPBF but can't associate it with the footprint  - Page 1
Forum section: electronics / general

author: komradebob
author_rank: Contributor
timestamp: February 17, 2024, 03:42:42 am
content: Pardon the noobness of the question, but after many many years with <alternate PCB design program> I'm switching over to kicad and some of it's ways are baffling me.I've managed to d/l and import the kicad library for the Vishay IRF9Z24SPBF symbol and imported the library for the 'pretty' footprints, but somehow the symbol is not associated with the footprint and darned if I can find even thevocabularyfor how to associate a footprint in the library with a symbol in the library. Could someone possibly point me in the right direction?Many thanks from a frustrated, grumpy old engineer...

author: Doctorandus_P
author_rank: Super Contributor
timestamp: February 17, 2024, 03:49:21 am
content: Symbol Editor / File / Symbol Properties / General (Tab) / Footprint
10nF 63V Axial Electrolytic Capacitor KiCAD footprint - Page 1
Forum section: electronics / general

author: electrovanga
author_rank: Contributor
timestamp: January 09, 2024, 07:40:28 pm
content: Hello,I am searching a 10nF 63V Axial Electrolytic Capacitor to make a footprint in Kicad but I really can't find it. Could you please help me to find one or about the dimensions?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: January 09, 2024, 08:05:54 pm
content: It would be difficult to find Electrolytic capacitors smaller then 100nF. Electrolytics are only used for bigger capacitances, becase their technology is not necessary for small capacitances and they have too many disadvantages for small values.But apart from that, you are approaching your problem from the wrong direction.1. Determine which capacitor you want to use.2. Get a datasheet for it.3. Find a footprint based on the size or name of the housing, and not on the capacitor value.It is also very easy in KiCad to either make a new footprint, or to modify an existing one.

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 09, 2024, 10:50:26 pm
content: Quote from: electrovanga on January 09, 2024, 07:40:28 pmAre you sure it's nF?

author: ppTRN
author_rank: Regular Contributor
timestamp: January 10, 2024, 03:42:38 pm
content: Regardless of the type and value of the component what is really important is just its phisical dimensions. Do you already have one of such caps that you can phisically measure?Yet I must say that a 10nF electrolityc capacitor is weird.
HiLetgo Relay Module on KiCad - Page 1
Forum section: electronics / general

author: juhstinh
author_rank: Newbie
timestamp: March 24, 2024, 01:08:09 am
content: Hi,I am new to KiCad and am very new to PCB designing.For my project, I need two relay modules in the circuit but I was wondering if yall can help me with the schematic for this piece specifically.http://www.hiletgo.com/ProductDetail/1958543.htmlI see lots of schematics for other circuits but they aren’t quite similar. The circuitry for my project is quite simple as it is one Arduino Uno R3 connected to two relay modules. I will attach the circuit below, keep in mind its just a sketch and not the final product, the arduino on the left and relay module on the right.Please help, any feedback is helpful thank you.

author: stryker
author_rank: Regular Contributor
timestamp: March 24, 2024, 03:19:27 am
content: Hi @juhstinh and welcomeSince the module is a black box that you won't be changing, I would tend to treat it like you have with the Arduino in the schematic and not include the internal workings. Therefore my design would end with naming the connections to J1 & J4 only with a descriptive KiCad global label for each bus/wire.If there will be other components connected on the output side of the HiLetgo module to be included in this schematic then I'd create a custom footprint for the module, similar to the Arduino footprint, with connections defined and a box without the inner components. That's actually surprisingly easy to do.If this was the kind of module that might be a daughter-board to a PCB you're making, this new custom footprint might also have a silk outline for the PCB, especially if it has components on the underside which prevent the space underneath being populated by other tall components.I hope that's helpful.Cheers, Geoff

author: juhstinh
author_rank: Newbie
timestamp: March 24, 2024, 07:07:48 pm
content: Hi Geoff,Thank you very much for your thoughtful input, I was just thinking the same solution last night but with your ideas in consideration made it easier to continue on what to do.Have a great day!
Kicad scripting - need a simple script, but cant find a tutorial. - Page 1
Forum section: electronics / general

author: eTobey
author_rank: Super Contributor
timestamp: January 07, 2024, 12:14:40 am
content: I wanted to look into kicad scripting, but i found no documentation.I just need a simple script, that moves (or cuts out) a group, refills the zones, and maves it back (pastes it).Anyone can do this for me, or knows of a tutorial?
Lock grid properties option? - Page 1
Forum section: electronics / general

author: MasterT
author_rank: Frequent Contributor
timestamp: December 31, 2023, 06:08:26 am
content: Is there an option to block any changes of the griid properties?I always have a problem with my KiCAD changes grid size randomly, seems w/o any reason.Creating new schematic, do copy paste - have to re-set size back to my preferable 1.27, several times every day.thanks.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: December 31, 2023, 11:22:41 am
content: I am not aware of a function to lock the grid. But grid should not change "randomly" either. There are some shortcut keys that influence grid settings, for example by pressing thenkey. You can search for grid related hotkeys withPreferences / Preferences / Hotkeysand then entergridin the search box.

author: MasterT
author_rank: Frequent Contributor
timestamp: December 31, 2023, 02:27:53 pm
content: Could be, I use "M" tto move elements and ocasioanly missed to press "M" , insted N or < or even B. KiCAD doesn't indicate that settings just change (would be nice to have, floating balloon or something ) amd I get noticed only when trying to snap new wire or components and it doesn't fits.I will try to re-map short key - to have nothing around "M" , thanks.
Are these two problems solvable? - Page 1
Forum section: electronics / general

author: ppTRN
author_rank: Regular Contributor
timestamp: December 28, 2023, 09:19:24 am
content: Hi, I've been using KiCad for a while now but there are two problems that really bother me, I am sure there is a way to solve them but I really couldn't figure out how to.1. Misalignment: when I update my PCB editor, even for the first time and without making any changes to the grid settings, some components are misaligned. This really bothers me and I am unable to find a "reallign to grid" command. Not to mention the mess that arises when I make changes to the grid, even when I scale it to 1/2 or 1/4 of the previous value.2. Inconsistency: when I make a change on my schematic editor all new added components will show to the PCB editor, the netlist is updated and everything seems to be fine. The problem is that all components that have been removed from the schematic editor will still be on the PCB editor! This is quite a problem since I will be forced to manually remove them from the PCB and I might not remember which one I removed in the first place!I really find KiCad a very usefull resource, but the problems I mentioned can be a deal breaker. Any Idea how to solve them?

author: bpiphany
author_rank: Regular Contributor
timestamp: December 28, 2023, 09:57:09 am
content: 1. There are multiple possible "snap points" on a footprint. Sometimes the origo of the component, sometimes the center of a pad, possibly others(?). Snapping one of those almost always mis-aligns the others, if they aren't all perfectly on the currently selected grid.2. Shortcut key F8 opens up the "Update PCB with changes" dialog. There are multiple options there for how to proceed with different "conflicts"

author: ppTRN
author_rank: Regular Contributor
timestamp: December 28, 2023, 10:08:59 am
content: That was really helpful, thank you
PCB layout out of sync with strange "symbol association" - Page 1
Forum section: electronics / general

author: prasimix
author_rank: Unknown
timestamp: November 09, 2023, 06:55:32 am
content: I am in the process of migrating from Eagle to KiCad and I started importing schematics and related footprints without any routing. The import was successful, I started slowly with the routing on the KiCad side and in that process it was necessary to correct the wiring of some components. This was done in the Schematics editor and "Update PCB from schematic" (F8 option) was used on the PCB editor side. In several iterations it worked correctly until yesterday at some point I started getting cryptic messages and it seems I lost sync between schematics and PCB layout. I don't know what to do next, I tried to go back several versions from the backup folder, there I can find older versions with which I could possibly continue to work, but I don't dare if I will face a similar problem in the future that I will not understand how it happened. Thanks in advance for any assistance.

author: prasimix
author_rank: Unknown
timestamp: November 19, 2023, 10:06:27 am
content: Just to let you know that I have solved all the problems in KiCad and I am making very good progress. I am impressed with the capabilities it has and I can say goodbye to the Eagle that can go into a well-deserved retirement.In general, the issue is how to make an update so that the schematics and layout are synchronized. Evidently, I made a mistake with the footprints and didn't know that it is possible to make an update in both directions: from schematics to layout and vice versa. After a successful update, the problem was solved.

author: liaifat85
author_rank: Regular Contributor
timestamp: December 14, 2023, 04:02:27 pm
content: Thanks for sharing your update.