Best FPGA for glue logic - Page 1
Forum section: electronics / general

author: thetooth
author_rank: Contributor
timestamp: December 13, 2012, 10:08:13 pm
content: I bought a stellaris launch pad MCU last month and have been working on a in card computer/data logger, so far the software and hardware side of designing have been really easy, but as im getting closer to PCB design im thinking i should consolidate my design.The main display(CFAG320240CX-TFH-T) is a 8-bit parallel controlled graphics LCD with 5 control lines and a busy state pin based on the Epson S1D13700, now my first issue is transfer speed, hooking the 8-bit bus directly to the MCU would be silly since i'd have no pins in no time, so currently i use a MCP23S17 bi-directional shift register. This is great when sending characters to the display, the 10Mhz clock rate of the SPI line is very fast... but... for graphics the display requires you to send a 8bit value(the screens VRAM is arranged as 40 columns by 240 lines of 8-bit(1-byte for bitmap, 2-byte for 4 shaded grayscale and/or blending effects) scan lines, you update a single pixel by reading in the current VRAM, changing the pixel value, and the writing the block back). So, you see drawing the entire display in monochrome would be very slow over SPI, so my idea would be to synthesize the SPI->parallel conversion in the FPGA for characters, but also store graphics and GUI routines within the FGPA's high speed memory and assign macros that allow me to draw large graphics at line speed(40Mbps compared to 625kbps). Additionally, those control pins are also set byte sending an entire byte to the I/O expander, theoretically i could also automate this on the FPGA sideFinally, i could drop the other chips for user I/O and just use opto-couplers for isolation rather than a pair of voltage converters.So my question is, what would be my best bet for this application? i was thinking spartan 3E, but its not recommended for new designs(end of life?), and, well i don't really understand a lot of the terminology relating to `cell size` and logic gates.

author: Smokey
author_rank: Super Contributor
timestamp: December 13, 2012, 11:14:48 pm
content: Unless you have big plans for implementing other functions in the FPGA, you should check out CPLDs for glue logic type applications.Something like the Xilinx Coolrunner-II series maybe. Price is under 2USD for the smaller ones.http://www.xilinx.com/support/documentation/data_sheets/ds090.pdf

author: Harvs
author_rank: Super Contributor
timestamp: December 14, 2012, 01:06:28 am
content: Which MCU is it you plan on using? I believe the launchpad comes in many variants doesn't it? (I see there's a Cortex M4F launchpad?)I'm not overly familiar with the TI line of ARMs, however, most larger 32bit MCUs have a dedicated parallel interface for driving external memory and this sort of thing. Maybe it would be easier (and cheaper) to choose a MCU that has the dedicated hardware to do this?As this is only a monochome LCD, 320x240 is only 76.8kb or 9.6kB. So a decent MCU could hold the complete frame in RAM and do all the graphics processing in RAM, then use a DMA to regularly update the display in the background when triggered by the processor. This is how I've done it before with a similar SPI driven display.

author: thetooth
author_rank: Contributor
timestamp: December 14, 2012, 03:01:27 am
content: Quote from: Smokey on December 13, 2012, 11:14:48 pmLooks promising, im not familiar with CPLDs though, would it be possible to say, implement a program for drawing a circle or reading a bitmap from memory?Quote from: Harvs on December 14, 2012, 01:06:28 amI'm currently using the LM4F120H5QR, it has 32 channels of usable GPIO, for the LCD to run in parallel thats almost half my channels gone already(8-bit data bus plus 6-bit control, not including reset or power control), i mean i could JUST cram everything in like this, but i feel it would be much more flexible if i had 24 channels for GPIO and everything else run off the FPGA.One issue i also forgot to bring up(which you can in fact see in the picture i attached), is this I/O expander requires you to send a 1-byte address and mode every time you send it data, so thats 3-bytes to clock in, and another 2-bytes to clock out, so for 9.6kB the actual transmission over head is 48kB, to achieve 60fps, a throughput speed of 2.8MB/s, also again this display can do grayscale too, so a further byte is required.Anyway thanks for the advice, im going to read up on CPLDs now.

author: tnt
author_rank: Regular Contributor
timestamp: December 14, 2012, 09:56:02 am
content: I wouldn't qualify what you describe as "glue logic" .... glue logic is really small stuff that you could implement with a few discrete 74xx or 4xxx chips ...What you describe is essentially a GPU and you're not going to do that in a CPLD.

author: jeroen74
author_rank: Frequent Contributor
timestamp: December 14, 2012, 11:13:31 am
content: For a GPU you'd need a FPGA. It certainly is possible to create logic to draw circles and lines.But in your case, I would simply choose a bigger processor with more pins. It will save you a lot of headaches. FPGAs need multiple voltages and a configuration device. It will take effort to learn Verilog or VHDL and the toolchain. And that TI processor has more than enough grunt to draw a few simple lines and circles.

author: thetooth
author_rank: Contributor
timestamp: December 14, 2012, 12:16:39 pm
content: Quote from: jeroen74 on December 14, 2012, 11:13:31 amThis is one of the main reasons im asking, i've never worked with an FPGA let alone VHDL, but currently im working independently so i have the time to invest in learning, plus it would allow me to build a common platform. As for voltages, i already have 5v and 3.3v available and can use the same logic level converters to handle the signal transport to devices.My question still remains, which is the best option for this design? From what i can tell the Spartan-3E is the best option since its relatively cheap and has plenty of existing support... but its end of life.

author: ptricks
author_rank: Frequent Contributor
timestamp: December 14, 2012, 12:47:04 pm
content: FPGA can be a bit confusing at the start. Comparing the logic cells is a really hard to understand concept because it depends on so many things and when you try to compare one manufacturer to another it gets even more complex.If it were me just starting out with FPGA I would get one of the FPGA boards that has the programmer and everything included on the board so you don't have to spend money on programmers. The spartan series may be listed as not recommended for new designs but that just means that they have a newer chip, that probably cost more, that they would like you to buy. Starting out you do not want a chip that is brand new on the market because the amount of learning material will be small compared to something that has been on the market for years.A week ago there was someone advertising an FPGA board on here that would fit the bill nicely for someone wanting to start with FPGA, it has all the voltage regs, the programmer, the memory and chip interface protection built in and the price is good for what it includes.http://micro-nova.com/mercuryThere are other boards like the papilio but they cost about the same and do not include protection circuits, memory, or the other peripherals the board has above.http://www.cutedigi.com/fpga/butterfly-one-papilio-one-500k-arduino-fpga-version.html

author: Neilm
author_rank: Super Contributor
timestamp: December 14, 2012, 04:02:20 pm
content: Quote from: thetooth on December 14, 2012, 12:16:39 pmMost FPGAs require a 1.2V / 1.8V supply for the main core and then 3.3V to power the IO. Generally they don't support 5V I/O, although some are what is known as "tolerant".I didn't find learning VHDL very hard - the one thing to remember is that it is NOT a programming language, it is a description of the hardware. That means that unless special blocks are used (sequences) every line happens AT THE SAME TIME (ignoring propagation delays). This can be the most confusing thing to someone who is used to writing software for processors that have a program counter and increment through the instructions one at a time.Neil

author: nctnico
author_rank: Super Contributor
timestamp: December 14, 2012, 09:08:59 pm
content: Actually it is better to treat VHDL as a programming language. The big difference is that every statement is executed in parallel instead of in series. If you use VHDL as a description language then you are shooting yourself in the foot. VHDL offers a lot of features like records (structs), functions, generating logic, etc which make designing logic much easier.

author: AlfBaz
author_rank: Super Contributor
timestamp: December 14, 2012, 10:34:36 pm
content: Aside from the hardware aspect, I think the biggest decision is which description language to use VHDL or Verilog.There's a lot involved just comparing the two from a technical standpoint and lot of the stuff to consider is mostly meaningless until you have dabbled in it for while.I took on VHDL but found that the majority of open source IP is Verilog so I cant help but feel that I backed the wrong horse!If you have done any software programming before the parallelism of HDL will do your head in for a while

author: thetooth
author_rank: Contributor
timestamp: December 15, 2012, 03:44:27 am
content: Quote from: DiligentMinds.com on December 15, 2012, 01:30:57 amSoC FPGA was my first choice in the planing stages but the cost and availability is ridiculous. From what i can tell those Altera Cyclone V SoC don't actually exist yet.Also i'm really liking thisIGLOO nanodev kit, is there a huge difference in VHDL implementations between vendors or does it remain at least some what compatible?I guess its now a choice between IGLOO and Spartan-3

author: Neilm
author_rank: Super Contributor
timestamp: December 15, 2012, 12:09:34 pm
content: Quote from: DiligentMinds.com on December 15, 2012, 08:09:15 amThere are sometimes vendor specific commands for VHDL, for example synthesiser options or something hardware specific.Neil