Bypass caps on opposite side of PCB - Page 1
Forum section: electronics / projects

author: ricko_uk
author_rank: Super Contributor
timestamp: May 22, 2020, 04:12:34 am
content: Hi,I always place bypass caps following these 2 guidelines:1) on the same side as the IC2) IC trace going from 3V3 plane to the cap pin THEN to the uC Vcc pinIn the current board I am using a high speed 200 MHz micro (8MHz external clock with internal PLL multiplication) and because of limited space I placed the caps on the bottom (opposite) side of the 4-layer PCB (two internal planes are Vdd and GND).Just wondering if it could create any issues because either one of the following:a) via inductanceb) the plane's supply is between the cap the the micro VDDI assume that especially point b is not an issue because the current would flow from both cap and plane in "parallel" into the micro? And the via inductance is practically negligible (at least at those frequencies)? Is that correct?Any feedback appreciated!Thank you

author: ataradov
author_rank: Super Contributor
timestamp: May 22, 2020, 05:38:49 am
content: This is a standard configuration and basically the only way to do it for BGA chips, and they work just fine. I would not worry about that too much.

author: trobbins
author_rank: Frequent Contributor
timestamp: May 22, 2020, 05:39:33 am
content: Can you throw up a snip of the pcb layout in that region? One aim is to minimise the loop distance and loop area from the internal IC chip to the internal cap block, whilst using as wide a trace as practical. So info on the IC supply pins and package layout are likely the first issue to appreciate.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 22, 2020, 06:49:48 am
content: You start to get concerned up there (100s MHz), but for most MCU stuff there really isn't anything better than simply vias to the plane. The MCU pins can't see the cap on the far side, it's shielded by both planes; there's no mutual inductance or anything going on there. So the situation can't be any worse, if it's acceptable in the first place to put it somewhere other than directly adjacent.What's more, because the plane is such a low impedance, it acts as a nearly ideal connection between everything tied into it. It doesn't really matter where you put the bypass caps, or how many there are. You might scatter a few around the board, instead of meticulously bypassing every damned pin (which if you follow religiously, tends to make things worse anyway*..). No, it doesn't much matter what the loads are, they can all share each others' bypasses; as long as they aren't synchronized, which, if you have that situation, by all means watch out, but a lot of applications are doing different things in different areas and it's perfectly fine.*Namely, that having too many capacitors invites resonances between them (especially when values or sizes are tapered -- that's almost always advice to ignore), and the sheer component count causes congestion in routing actual useful signals. And if the process also greatly increases the number of vias around the chip in question, the swiss-cheese made of the planes makes the planes themselves perform worse!Incidentally, higher clock frequencies aren't usually much of a burden, either. There simply isn't a short enough length between PCB and die to be able to maintain low supply impedance from PCB bypass alone. This is why high speed chips have onboard bypassing, either on an interposer board, stacked on top of the die, or part of the die layout itself (metal layers being interleaved, in exactly the same way, and for exactly the same purpose, as PCB planes). PCB pins get iffy above 100MHz or so.Tim

author: ricko_uk
author_rank: Super Contributor
timestamp: May 23, 2020, 03:28:48 pm
content: Thank you Tim, trobbins and ataradov!Tim, always long detailed explanations, very much appreciated!