Making PCB footprints - Page 1
Forum section: electronics / projects

author: vikasvjois
author_rank: Newbie
timestamp: March 22, 2015, 05:49:07 am
content: Hi Dave,Love your videos! Can you make a video on designing good PCB footprints? Because I recently found out that making one using information from the datasheet is quite involved for the complex parts (if they have not already specified a land pattern). One of the things I found particularly tricky is how to decide the pad size and location given that all dimensions have tolerances (min, typ, max). This would be irrespective of the PCB design tool being used. I can think of a couple things to mention about:Creating the silkscreen and documentation layers to show the physical size of the part (again based on tolerances)How much soldermask is required between adjacent QFP padsAnything else (trap for young players!) you might think of from experienceHow to avoid iterations because of PCB footprintsIf other forum members have any resources or suggestions on this topic, please post.Thanks,Vikas

author: Falcon69
author_rank: Super Contributor
timestamp: March 22, 2015, 05:59:24 am
content: Here's what I do....When Making your footprint, draw the size of the actual part in very thin line (.001mm ??) silk screen. You will delete this later.Determine what you want for pad size. As a General rule for me, If I know I'm going to have to hand solder it, I use the max size. If I plan on Reflowing it myself, I will use the typical. If I plan to have a fab house assemble the parts on the board for me, I'll use the minimum, given that the size is within the fab houses specs.Now, place that land pattern as the dimensions on the data sheet says under your silkscreen you drew earlier. Now, draw silk screen again using .07-.2mm thick line. But when you do this, make sure the new silkscreen is NOT over the pads, in fact, I keep mine at least 0.3mm away (the silkscreen printer is usually off from the pads when they print). Now, once you have done that, delete the thin line silkscreen that goes over the pads. The reason for this, it eliminates any confusion with the Fab House to print or not to print over the PADS. You don't want them doing that.The soldermask BETWEEN pads will be limited to what the fab house can do. You should ask them. The smallest part I've been able to get them to soldermask between pads is a SOT-353 part, Anything Below that, they can't do, at least, not the fab houses I have used.Hope this helps.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 22, 2015, 01:14:10 pm
content: Quote from: vikasvjois on March 22, 2015, 05:49:07 amGet yourself a copy of IPC-7351B. It has simplified / unified tables that give the allowances for standard classes of parts. Real parts may include strange combinations (e.g., a connector that's mounted with through-hole leads or registration pegs, but has internal LGA type pads as well as gull-wing style surface mount leads), you simply use the respective rules for each type.Quote from: Falcon69 on March 22, 2015, 05:59:24 amI will add this note: if you're doing this in Altium, draw the outline on Mechanical 13. Use the 3D Body tool (P, B). Make areas and sections with respective sizes and heights as needed to fill in a reasonable looking 3D model. Or just leave it an ugly block, if you don't care.This layer will not only hold the models for 3D viewing, but it also can be printed as an output. Typically, you'd use this layer as part of the assembly drawing, since it shows where the components physically are.If you don't have any 3D info in your EDA tool, you can still draw the outline on an assembly or mechanical layer for the same end purpose.QuoteThis is the most important part of the IPC rules. You can always go higher, and if you're intent on hand-soldering your boards (or a few samples, anyway), it's worth making the pads longer (and maybe a hair wider). The inside spacing doesn't need to be looser than the device minimum itself (beware that the end-cap metallization of chip resistors, capacitors, etc. is usually quite loose, and they want you to catch the minimum material case).Very small components (generally under 0603 scale) are prone to tombstoning, and benefit from having more net-size pads. There are also a lot of LGA or BGA style CSPs (chip scale package) that range from encapsulated or bare dies with solder pads, to whole ICs. Needless to say, you won't be hand-soldering these with an iron, so oversize pads will be of no use to you anyway.QuoteIt's my understanding, soldermask is better than none at all, but it's not usually possible below 0.65mm pitch. I normally set a modest 2-3 mil soldermask expansion, and let the fab deal with it, if they want to shrink just a bit to prevent slivers or grow more to eliminate them altogether.Normal fab process includes adjusting soldermask to suit their process, and if they're doing assembly too, then the paste mask as well. Silk is only placed on soldermask (or, only supposed to be), so that gets trimmed automatically too. Or it should. Check with them to make sure about these. The cheapest fabs may not take the time to inspect your files -- you get what you pay for, so take the time to check.Tim

author: Layoutguy
author_rank: Newbie
timestamp: March 22, 2015, 03:03:16 pm
content: The important issues have been well answered by previous posters. Get yourself a land-pattern calculator like the IPC’s LP Calculator. Similar calculators are often built-in to layout CAD systems (PADS has one, although I still use the outboard IPC app for some reason). These calculators construct a fully-dimensioned IPC-7351 footprint from dimensional data entered from the part datasheet. You then build the part footprint in your layout library by reference to calculated model. Built-in versions of these calculators generally eliminate this copy step. If you are not familiar with solder-joint integrity analysis, I recommend you do not set your calculator to produce the “least-minimum” land sizes. The benefits of minimalist lands are few in most circumstances, and the potential for soldering issues increases. The nominal or maximum sizes are the safer bet.

author: Dago
author_rank: Frequent Contributor
timestamp: March 22, 2015, 03:36:24 pm
content: I use library experthttp://www.pcblibraries.com/LibraryExpert/It is a free tool for creating footprints for a wide variety of different EDA tools. Just enter part dimensions and tolerances and out comes IPC-7351 compliant footprint. Takes like 30s per footprint. Best thing I've found in a long time.

author: vikasvjois
author_rank: Newbie
timestamp: March 23, 2015, 06:49:24 am
content: Thanks Falcon, Tim, LayoutGuy and Dago for the suggestions and pointers.Thanks,Vikas

author: alank2
author_rank: Super Contributor
timestamp: March 24, 2015, 02:28:03 am
content: Quote from: Dago on March 22, 2015, 03:36:24 pmDoes the free version output to different tools? Or do you still have to create the part manually?

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: March 24, 2015, 03:18:02 am
content: My free advice: if you're going to start creating your personal library of footprints, set down a standard set of layers for things likecreation datecreator nameipc footprint name, manufacturer footprint namedimensionsCreate standard sizes for the arrows and text, and locations.And then if you can, create all the other sizes of the same package while you're at it. If you're making a qfn16, go ahead and make some other sizes too.

author: Dago
author_rank: Frequent Contributor
timestamp: March 24, 2015, 11:25:22 am
content: Quote from: alank2 on March 24, 2015, 02:28:03 amYes it does. The only thing the free version doesn't have is batch operations and full "libraries" inside Library Expert.

author: alank2
author_rank: Super Contributor
timestamp: March 24, 2015, 03:40:54 pm
content: Quote from: Dago on March 24, 2015, 11:25:22 amI see that now, you are right, this is quite cool. I just wasn't putting in enough parameters to make it ungray the build.So does the viewer give you the ability to use the library but no "build part" feature and the lite version gives you "build part" but no access to the library?

author: Dago
author_rank: Frequent Contributor
timestamp: March 24, 2015, 05:10:29 pm
content: Quote from: alank2 on March 24, 2015, 03:40:54 pmThink so, I've only used the build part feature. Always built my own based on manufacturers dimensions and tolerances.

author: splin
author_rank: Frequent Contributor
timestamp: March 24, 2015, 05:24:28 pm
content: Quote from: Dago on March 22, 2015, 03:36:24 pmHow do you create new footprints with the free version? The FP Designer is not in the free version so what do you do when you have a non-standard component, such as a staggered smd connector?

author: Dago
author_rank: Frequent Contributor
timestamp: March 25, 2015, 06:13:07 am
content: Quote from: splin on March 24, 2015, 05:24:28 pmFor the non-standard footprints I have just made them by hand, make them according to manufacturers suggestion (if it looks decent, often times they do not) or according to the standard.

author: alank2
author_rank: Super Contributor
timestamp: March 25, 2015, 12:17:20 pm
content: Dago thanks for pointing out that the lite version can export, that is so cool. I'm going to use it for all my parts building from now on.Do you use the viewer application? If so, what benefit does it give you?

author: jmaja
author_rank: Frequent Contributor
timestamp: March 25, 2015, 01:07:11 pm
content: KiCAD doesn't seem to be listed at LibraryExpert. Any easy way to use it with KiCAD?

author: alank2
author_rank: Super Contributor
timestamp: March 25, 2015, 01:22:04 pm
content: Another question - does anyone know the document for the JEDEC standards. When I am using LP viewer it calls certain parts "EIA 0805". Is there a document somewhere that says what the JEDEC or EIA thinks an 0805 size should be? This way I could go with the standard's values when creating a part and when a part says it is "EIA 0805" then I would be good to go... There are hundreds of docs on the JEDEC site...

author: alank2
author_rank: Super Contributor
timestamp: March 26, 2015, 03:39:41 pm
content: Bump - does anyone know of which jedec document covers basic generic package outlines like EIA 0805?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 26, 2015, 03:59:36 pm
content: From JEDEC, I don't know; in the old IPC-SM-782, there were recommended definitions for them. I forget if they're based directly on JEDEC or what; it should be in the refs if so.Ah, it's available free* online:http://tinymicros.com/mediawiki/images/3/3c/IPC-SM-782A.pdf(*Well, from somewhere other than the source, so get it while you can..?)782 is superseded by 7351 which provides simple rules for a fairly comprehensive list of land types. The main difference is the heel and toe spacing requirements on components like these.Tim

author: alank2
author_rank: Super Contributor
timestamp: March 26, 2015, 04:22:23 pm
content: Thanks Tim, that is exactly what I was looking for. What size should a 0805 resistor be for example.I've seen the 7351 but it doesn't have the diagrams and sizes, you mention that they have simple rules, is there a calculator where you put "0805" and it shows you the dimensions for 7351?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 26, 2015, 04:29:14 pm
content: RTFDS.Which is worthwhile anyway, because not all 0805 (or etc.) resistors conform to the EIA standard. The overall width and length, usually, but the biggest variables are end cap metallization and height (of course, height doesn't affect the footprint any). The main outliers being current sense resistors of various styles.Tim

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: March 26, 2015, 04:50:29 pm
content: Quote from: T3sl4co1l on March 26, 2015, 04:29:14 pmAlso very important to not confuse metric sizes with imperial. A 0805 metric is not the same as imperial!