Questions about Power-Line-Cycle (PLC) synchronization (precise DC instruments) - Page 1
Forum section: electronics / general

author: RLiangCN
author_rank: Newbie
timestamp: September 06, 2024, 07:41:47 am
content: Hi,I'm making a precision pA meter. I found instruments (e.g., Keithley 6430 and Keysight 2985) have PLC synchronization function.Data are read-out per N times PLC cycles.I understand if the integration time is perfectly matches N PLC cycles, then the 50Hz (or 60Hz) PLC noise are averaged to Zero.My question is:1. Is it possible to precisely match the PLC cycle? or is PLC frequency 50Hz is stable?How these instruments achieve the synchronization automatically and precisely? (I can't find out from their handbooks)2. What if the sync is not good, will this effort still reduce the PLC noise error?Thank you!

author: EC8010
author_rank: Frequent Contributor
timestamp: September 06, 2024, 07:52:23 am
content: The short answer is; no, yes.It's much better to make your electrometer free of hum. Keep an oscilloscope (triggered from line) on its output and improve your design and construction until there is no hum. And yes, itispossible.

author: Phil1977
author_rank: Frequent Contributor
timestamp: September 06, 2024, 08:08:48 am
content: The PLC synch just reduces the PLC influence. The better it is synchronized, the more PLC noise will be cancelled out, but its never reduced to zero.It´s not very complicated to synch to mains with better than 1% phase and frequency stability. And that accuracy is more than enough to get a significant noise reduction.

author: SanderMTI
author_rank: Contributor
timestamp: September 08, 2024, 11:57:00 am
content: I'm totally with EC8010 on this.If you want to measure picoamps accurately, you get better results by keeping hum out to begin with than by trying to hide it.Also.. it's not just hum which interferes at picoampere levels, so having a look with an oscilloscope can be very educational.Sander

author: Kleinstein
author_rank: Super Contributor
timestamp: September 08, 2024, 05:24:07 pm
content: There are 2 parts to the power line syncronization. One is getting the frequency very good. A few meters use a PLL to really synchronize the ADC clock to the mains frequency. So they can compensate for the small (usually < 0.1% variations in the mains frequency). Besides a PLL a more simple frequency measurement and digital adjustment of the integration time could also be done. The better the frequency is matched the less the starting phase has an influence.The other point is starting the conversion always at the same phase of mains, this suppresses the possible beat frequency from an residual hum effect. There can still be an error from hum, but that error would be largely constant. This would be effective for hum effecting the DMMs ADC directly as this would than be subtraced in the AZ cycle. However it only changes from beat frequency to constant error for hum coming in with the signal. This is usually the case with hum at a pA meter. So the constant start phase may be only for the looks.With meter where you have the choice it is usually the 2nd part, so the phase relative to mains. It may come with a slightly reduced reading rate, waiting for nearly one more mains cycle.An option I have not seen / decribed so far would be doing averaging over multiple starting phases. This would especially be a thing when there is averaging over many shorter conversions to simulation longer integration anyway (e.g. > 10 PLC with many meters).

author: DeltaSigmaD
author_rank: Contributor
timestamp: September 12, 2024, 10:32:52 am
content: PLC FilteringIt's a common method to use a PLL to synchronize a measurement device with the power line noise. However, if you are using an integrating DVM without additional post-filtering, you get only a first order suppression of line noise. A deviation of +/-0.2Hz, as typical in Europe, leads to significantly reduced line noise suppression.An alternative solution uses a faster ADC with, let's say, 1kHz sampling rate, and a digital filter is applied to suppress the 50Hz and 60Hz harmonics. I use a symmetrical filter with 10+10 filter coefficients of 8bit size leading to the following data:- output rate 50Hz at 1kHz ADC sampling rate,- fully-precise settling 60ms = at the 3rd output value after a step (synchronized transition, 4 values else),- group delay time 30ms,- suppression of harmonics within +/-0.1Hz deviation of line frequency: 50Hz-harmonics 1..7 <-123dB, 60Hz-harmonics 1..7 <-81dB,- suppression of harmonics within +/-0.2Hz deviation of line frequency: 50Hz-harmonics 1..7 <-111dB, 60Hz-harmonics 1..7 <-78dB.Concluding, I'm using no PLL, but a digital filter yielding <-78dB suppression for >99.9% of time (when the line frequency deviation is less +/-0.2 Hz). There is hardly a shorter filter with such high simultaneous 50/60Hz-harmonics suppression. The -80dB-value is less than the level of uncorrleated power line noise (my experience). Higher suppression of line frequency is of limited use therefore.

author: EC8010
author_rank: Frequent Contributor
timestamp: September 12, 2024, 12:36:14 pm
content: All of the PLC filter arguments are perfectly correct, but they require that previous stages were not overloaded. That's a dangerous assumption to make in an electrometer, which is why I suggest monitoring with an oscilloscope and fixing the problem.

author: Kleinstein
author_rank: Super Contributor
timestamp: September 12, 2024, 04:19:23 pm
content: Usually one needs both: keep the hum reasonable small, to not overload amplifiers and still have good suppression of mains hum and harmonics as some residual hum is often hard to avoid.Classical integrating DMMs are integrating over a multiple of the mains period and this way get the SINC ( sin(x) / x typ ) response with a zeros at the ideal mains frequency and the harmonics.Many SD ADC chips offer an even better suppression near the mains frequency, e.g. as (SINC)³ as 3 such filters in series for even better hum seppression even of the frequency is a little off. However this comes with a little longer settling (e.g. 3 mains periods for sinc3).It depends one the application which fitler is more suitable.A PLL to mains is no longer that common - usually the DMMs assume the frequency at it's nominal value and use a crystal clock. A PLL comes with additional phase noise and this can be an issue for some ADCs.

author: DeltaSigmaD
author_rank: Contributor
timestamp: September 12, 2024, 08:16:05 pm
content: @Kleinstein: I completely agree.Sinc-filters produce notches where required, but a sinc¹-filter stage suppresses only one frequency and its harmonics. If you want to suppress 50 and 60Hz and harmonics, the total filter order is doubled. Chains of sinc-filters for high attenuation have quiet long settling time. A better solution is a combination of sinc-filter stages and a FIR filter. This filter combination minimizes the total setting time for given filter attenuation and line frequency deviation, but requires relatively little effort for the calculation.