Review my Schematic - Page 1
Forum section: electronics / beginners

author: redgear
author_rank: Frequent Contributor
timestamp: November 07, 2019, 05:23:46 am
content: I have been trying to recreate a schematic from a Chinese datasheet. Can someone please review it?Here is the picture of the connections as given in the datasheet:The VSN,VSYS and VSP pins are shorted on the first diagram. I have followed the same and connected them together.Here is my schematic:1) The IP5328P is a custom symbol created by me, when I connect a Label to the pins it creates a junction but no junction is created for single connection on pins in the USB ports(kicad default symbols). Is that a problem? Did I make a mistake while creating the symbol?2) Are the Gate, Drain and Source pins of the MOSFETs Q1 and Q2 properly connected.3) They have used a Electrolytic Cap for C15 and chip capacitors(i guess they referring to SMD) for all others. Can I use the same? Will any SMD cap should be fine for others?4) The pins VSYS,VSN and VSP are connected together. I have tried to follow the the diagram on top of the datasheet, have I done that correct?5) Do I really need a 220uF 25v capacitor on the C15? Many powerbanks using the IP5328P does not use any Electrolytic cap at all and the ones that use have them rated at 100uF 16V.http://bbs.chongdiantou.com/data/attachment/forum/201909/29/095355uyh41te7nfpvyh1x.jpghttp://bbs.chongdiantou.com/data/attachment/forum/201811/08/180416m6kzrpcb8mp43i49.jpghttp://bbs.chongdiantou.com/data/attachment/forum/201910/15/141137n02444z4lvr97mk3.jpghttp://bbs.chongdiantou.com/data/attachment/forum/201901/09/220736y17r7c7c9ts7z3l3.jpgThis one uses a 220uF 16v capacitor:http://bbs.chongdiantou.com/data/attachment/forum/201909/03/112541yz4auqu4ohzav494.jpgI am also attaching the PDF versions of the Datasheet and SchematicThanks

author: Gallardo
author_rank: Newbie
timestamp: November 09, 2019, 05:56:33 am
content: -->1,Kicad I have no use, but from the picture point of view, there is no real connection on the USB port, you need to check the package, or pin properties.--> 2,is the correct connection.-->3,in this circuit, the main function of the electrolytic capacitor is energy storage, and the chip capacitor is mainly to suppress noise. If you are not familiar, I think it can be designed according to official advice.--> 4,is correct.-->5,I recommend using the official instructions to use the components, after all, the official is the BOM obtained through various electrical performance tests; because the 200uF/25v capacitor is bulky, it is not conducive to controlling the thickness of the product, so it will be smaller Point solution capacitors to meet product structure requirements. Some use 16v capacitors (USB output maximum voltage is 12v), or not used, I believe more to save costs, which I think is not very rigorous. Even if I am Chinese.

author: redgear
author_rank: Frequent Contributor
timestamp: November 09, 2019, 06:03:52 am
content: Quote from: Gallardo on November 09, 2019, 05:56:33 amThanks a lot for your reply! I appreciate it.

author: jhpadjustable
author_rank: Frequent Contributor
timestamp: November 09, 2019, 06:11:17 am
content: 0. Proofread your images before posting. 4px high text is not a good way to attract volunteers.1. There should NOT be a junction at the pin if only one wire is connected. Your symbol pins are probably off-grid. In particular, check the symbol pin length and make sure it's a multiple of the schematic grid, or better yet, the same length as other pins of similar symbols.2-5. What Gallardo said, nothing to add.5. Adding, and keeping in mind the high-volume commodity nature of the intended application, the 220µF electrolytic is probably oversized in order to meet ripple current and ESR limits without going to a specifically low-ESR, high-ripple, or high-frequency electrolytic.

author: redgear
author_rank: Frequent Contributor
timestamp: November 09, 2019, 06:37:44 am
content: Quote from: jhpadjustable on November 09, 2019, 06:11:17 amSorry, but it was the best picture I got. That's why I included the actual datasheet in the attachments.QuoteKiCad threw a warning that my pin lengths are not multiples of the schematic grid, looks like that's the mistake I did. Thanks.QuoteSo, I can either use the oversized capacitor or pick a low ESR and a higher ripple current. Since the latter would cost more $$ they have used a oversized capacitor in the design, Correct?

author: jhpadjustable
author_rank: Frequent Contributor
timestamp: November 09, 2019, 09:00:10 am
content: Quote from: redgear on November 09, 2019, 06:37:44 amFair enough, but I meant your schematic screenshot. I generally use an A4 worksheet with all defaults so that, on a 1080p monitor after clicking "Zoom to fit", I can read labels and reference designators with slight difficulty. You might try the multiple/hierarchical sheet support and see how you like it. It's very handy when you're building an array of LEDs/ports/drivers/what have you.QuoteElectrolytic capacitors are rated to hold their specified capacitance after a specified lifetime under the specified conditions of maximum working voltage, ripple current, and temperature. For every 10°C reduction in operating temperature, the lifetime of the capacitor approximately doubles. For the first halving of the working voltage, the capacitor's lifetime approximately doubles (but the effect is much less with further halvings). There are similar effects in relation to ripple current and frequency, which vary by capacitor series. Capacitor manufacturers typically offer application notes that go into detail on how to forecast the lifetime of a capacitor under your chosen conditions. Some, likeIllinois CapacitorandNichicon, offer online lifetime calculators.So you are correct, where the design can tolerate quite a bit of performance degradation while still meeting its mission, such as with C15. Their BOM seems to have been conservatively written with plenty of margin and lowest-common-denominator commodity-grade parts in mind, so that a junior engineer has a very good chance of a successful design with very good yield if they adhere to the BOM specs, no matter how crap caps the manufacturer down the street has in stock on any given day. Manufacturers love it when you buy their stuff and don't call them.You, as the design engineer, are free to rate your components more aggressively, balancing MTTF and performance against cost, size, etc. For example, you wouldn't take pains to derate the capacitor to the point where it outlasts the batteries by a factor of 25 or more. Now, I haven't done anything like translating the datasheet or performing an in-depth analysis of this design to calculate currents on Vsys, so take everything I say as "less than rigorous".

author: redgear
author_rank: Frequent Contributor
timestamp: November 09, 2019, 10:10:42 am
content: Quote from: jhpadjustable on November 09, 2019, 09:00:10 amThat's what I also use. I uploaded the schematic as PDF as well. The hierarchical sheet feature was what I was looking after but I did not know how to enable it.QuoteThat's some cool info... Thank you for the links.QuoteThat's what I intend to do, balancing MTTF and performance against cost but idk how. Where can I read more about it? What are things I can change from the above to achieve a good cost performance ratio?Can the max ripple current be assumed to be three times that of the max DC load current? The max current in the above design will be 5A.

author: jhpadjustable
author_rank: Frequent Contributor
timestamp: November 09, 2019, 01:19:30 pm
content: Quote from: redgear on November 09, 2019, 10:10:42 amAh, that's a bit better.QuoteHow many are you making, and how much do you consider your time to be worth? You're pushing pennies here.QuoteI don't see where you're going to get 5A out of it. Third and fourth paragraphs of the overview, thanks to Google Translate:QuoteSince there's only one of those boost systems in the chip, 18W is probably a whole-system specification, not a per-port spec. VSYS doesn't participate in charging, only output.With that cleared up, according to p39 ofa presentation in Avnet's 2012 Power Forum virtual conference, the output capacitor's rms current can be estimated by:At the maximum boost of 12V at 1.5A with a worst-case 3V battery voltage, that works out to ~2.4A output cap ripple current for the entire bank. So, what's the ESR look like?Murata has builtSimSurfing, a comprehensive selection and data tool for their capacitors. I chose GRM21BR61E226ME44, the general purpose line's 0805 22µF/25V for the caps on VSYS. At 500kHz, the given ESR is about 2mΩ each.Let's look at a "low impedance" cap example, Panasonic's FC series, claiming 1/2 the impedance of the regular high-temperature HA series. The impedance of our 220µF 25V cap in a 10x10mm case is given as 0.15Ω, and permissible ripple current at 100kHz at 105°C is 670mA. For the standard high-temperature HA series, let's take their word for it and figure 0.3Ω. Not accounting for copper losses which are on the order of the ceramic caps' ESR, we can figure the ceramic caps are each going to see 0.3/0.002 = 150x the ripple current of the elcap, leaving 2.4/451 = 5mA for the elcap. No problem here.Having done all that I can say that the use of the 220µF/16V cap is perfectly fine from the ripple current standpoint, but has a slight impact on service life.So how much ripple voltage will we see? Our boost converter is rated for 18W. I'm gonna handwave and use the common rule-of-thumb inductor ripple current estimate of 40%p-p of the maximum inductor current, which is about (18W/3V)=6A*0.4=2.4A. Now let's shove that up the 66µF ceramics for about (1/300kHz) = 3.3µS * (3/12) = ~0.8µs * 2.4A = ~1.9µC of charge applied. A capacitance of one farad will increase its voltage by one volt when one coulomb of charge is applied to it. Our 2µC/66µF = 1/33V = 30mVp-p. Most devices won't have a problem with that!Now let's multiply by 1.5A max current = 45mWp-p = ~15mWrms. That's a fair bit of power to have to deal with from an EMC standpoint. Poorly dressed, cheap cables might cause interference and undesired operation. The extra capacitance will reduce the ripple to about 30mVp-p * 66µF/(66µF+220µF) = 6mVp-p = ~3mWrms. So that 220µF is probably there to control ripple on the output, and therefore EMI. The elcap is 6 cents in 5-packs at LCSC. The ceramics are 8 cents in 10-packs. How hard do youreallywant to push on that, and do you have a scope to experiment and validate?Any greyerbeards want to tell me how far off my tree I am?

author: redgear
author_rank: Frequent Contributor
timestamp: November 11, 2019, 06:58:04 am
content: Quote from: jhpadjustable on November 09, 2019, 01:19:30 pm1k units... Maybe $2 or $3 on the end product. I wanted to learn about it as it will help me in my future projects..QuoteThanks, that's pretty detailed... What is the451and how did you arrive at that figure?QuoteThank you! Looks like I would be better using the specs on the BOM than wasting time to save a few cents.While selecting a capacitor do I also need to check their temperature coefficents? They are just too many to choose from X5R,X7r, etc.I am planning to buy a scope around $500 but I can extend my budget till $1k. Do you have any suggestions?

author: aix
author_rank: Regular Contributor
timestamp: December 28, 2019, 10:49:45 am
content: How much is known about IP5328P's I2C registers?The datasheet describes the chip's slightly convoluted I2C electrical interface, but doesn't seem to even list the registers.Anyone here knows more?