hybridfree/eevblog-posts huggingface dataset:
Xilinx ISim: Display I2C as hex in simulations? - Page 1
Forum section: electronics / general

author: Pack34
author_rank: Frequent Contributor
timestamp: September 11, 2015, 06:39:21 pm
content: I have a feeling that I'm going to be out of luck here, but...I'm trying to get back up to speed with FPGAs and I have some code running. In my testbench I have some I2C events going on and was wondering if there's a way to decode the I2C transmission to display what's going on in hex similar to what my Agilent does when I physically probe something.I could actually put it on a dev board and probe what's physically happening but I want to get more comfortable with simulating.Does anyone have some insight into this, or am I stuck with doing it by eye?EDIT:// I'm using Xilinx ISE, and using VHDL.

author: commie
author_rank: Frequent Contributor
timestamp: September 11, 2015, 07:36:03 pm
content: Hi,You want some sort of I2C probe, which decodes the I2C activity and displays it in hex bytes on a e.g., 16x2LCD? If that's correct, then you are looking at a separate project in itself for a micro-controller coupled with a good compiler which supports I2C commands.

author: Pack34
author_rank: Frequent Contributor
timestamp: September 11, 2015, 07:58:28 pm
content: I was trying to figure out if there was a way to decode it directly in ISim. I have a physical I2C decoder on my desk but I was hoping that there was a way to display it in the simulator.I know how to select a bus and change how it's displayed, just wasn't sure if there was a way to do decode it on a single SDA line. Unfortunately, it looks like I'm out of luck.

author: Neilm
author_rank: Super Contributor
timestamp: September 11, 2015, 08:00:50 pm
content: Have you thought about writing an I2C decoder in the simulator? Then you could put put into the ISim waveform and set the radix to hex. Bingo

author: Pack34
author_rank: Frequent Contributor
timestamp: September 11, 2015, 08:23:24 pm
content: Quote from: Neilm on September 11, 2015, 08:00:50 pmI have not. Can you point me in the right direction on where to get started with this? I'm using VHDL.

author: Neilm
author_rank: Super Contributor
timestamp: September 11, 2015, 08:41:09 pm
content: Have a look athttps://www.eewiki.net/display/LOGIC/I2C+Master+%28VHDL%29It works pretty well as an I2C master (I have used it in the past). I would have thought you could modify this to do what you want.

author: Bassman59
author_rank: Super Contributor
timestamp: September 14, 2015, 04:36:50 am
content: Quote from: Pack34 on September 11, 2015, 08:23:24 pmAll you need is a behavioral (doesn't have to be synthesizable) bus monitor entity. It sits on the bus, with the SCL and SDA signals as inputs only. Then you look for the various bus conditions (START, STOP, etc). It's fairly simple to do -- IF you free yourself from a strictly-synthesizable RTL mentality. VHDL is actually a fairly expressive language. It was intended for simulation and modeling before synthesis entered the picture. And this thing you want to do is sort of the simplest intro to pure test bench/verification coding you'll run into.
FPGA implementation with Xilinx chips - Page 1
Forum section: electronics / general

author: NateDuong
author_rank: Contributor
timestamp: July 26, 2015, 10:43:59 am
content: hi every one, I am trying to learn FPGA implementation with Xilinx chips (entry level), can every one who has a lot experience before, please help me have more ideal.what software, what language, will need, and how to imply them into the Xilinx chips...Please give me a big picture, so I can easily imagine what I need for the future/Thank you, every one.Best regards,Nate Duong.

author: tggzzz
author_rank: Super Contributor
timestamp: July 26, 2015, 03:34:12 pm
content: https://www.google.co.uk/search?q=fpga+for+beginners

author: miguelvp
author_rank: Super Contributor
timestamp: July 26, 2015, 04:04:15 pm
content: Hamster_nz from this forum has tutorials an other things here:http://hamsterworks.co.nz/mediawiki/index.php/Main_Page

author: krenzo
author_rank: Regular Contributor
timestamp: July 27, 2015, 04:37:16 am
content: http://www.fpga4fun.com/

author: NateDuong
author_rank: Contributor
timestamp: July 27, 2015, 09:10:11 am
content: Thanks for all of you giving me good websites....
Altera Quartus II ROM megafunction? - Page 1
Forum section: electronics / general

author: pyrohaz
author_rank: Regular Contributor
timestamp: May 21, 2015, 11:38:22 pm
content: Hey guys,I'm making a simple VGA image displayer (only a 100x75 pixels at the moment, stored as RGB565 for native output format) and I've implemented VGA timing part and RAM access. The problem I have however is that when I compile my program, Quartus doesn't seem to include my memory block into my final project. Does anybody have any idea why?Thanks,

author: John_ITIC
author_rank: Frequent Contributor
timestamp: May 22, 2015, 12:15:27 am
content: If you have not already, best post inalteraforum.comNormally, the compilation report shows in warnings/errors why various design modules are not included. Study it carefully and I'm sure the answer will be there.

author: marshallh
author_rank: Unknown
timestamp: May 22, 2015, 04:29:28 am
content: Read through ALL the warnings. Probalby your block is getting completely optimized away. Look upstream for missing clocks or connections.

author: pyrohaz
author_rank: Regular Contributor
timestamp: May 22, 2015, 10:02:02 am
content: Quote from: John_ITIC on May 22, 2015, 12:15:27 amI'll post on the Altera forum too, thanks!I've searched through my compilation messages and there seems to be nothing stating the memory block being removed through optimization. I'm sure its finding the file too as the design unit is being found at compilation.Quote from: marshallh on May 22, 2015, 04:29:28 amIn my VGA controller VHDL code, I've specified the address and data lines and connected them to the memory block using the block diagram schematic file pictured. I haven't however assigned these address and data lines in the pin planner. Do you think that could be the problem?

author: John_ITIC
author_rank: Frequent Contributor
timestamp: May 22, 2015, 09:16:35 pm
content: Quote from: pyrohaz on May 22, 2015, 10:02:02 amNo. The fitter would normally just choose any free pins. You would get warnings for unassigned pins, though.

author: pyrohaz
author_rank: Regular Contributor
timestamp: May 22, 2015, 09:49:48 pm
content: Quote from: John_ITIC on May 22, 2015, 09:16:35 pmYeah, I gathered that. It definitely gives warnings for unassigned pins but I still can't see anything about the memory megafunction. Maybe because its IP, I need to do additional work to getting it working other than just the megafunction wizard?
Xilinx now offically supports their virtual cable driver! - Page 1
Forum section: electronics / general

author: tmbinc
author_rank: Frequent Contributor
timestamp: May 11, 2015, 07:41:09 pm
content: ... that's the good news, though.For the rest, readhttps://github.com/Xilinx/XilinxVirtualCable/issues/1. I didn't want to make a big drama out of it (in fact, I retroactively licensed my code as CC0, i.e. Public Domain), but their response made me angry.(TL;DR: Xilinx took my code, made an Appnote out of it, and didn't attribute. When asked, they accused me of breaking their copyright to justify their screwup.)
What is this for --> XILINX FPGA development board - Page 1
Forum section: electronics / general

author: ez24
author_rank: Super Contributor
timestamp: May 12, 2015, 06:13:53 am
content: "XILINX FPGA development board first choice for ABC richData tutorial (Oscilloscopes)"At Aliexpress:http://www.aliexpress.com/item/XILINX-FPGA-development-board-entry-first-choice-Data-tutorial-rich/1857825102.html]From the ad:Introduction:0 , Main chip XC3S200A, Configure chip M25P20.1 ,Mature Peripheral Design And appearance.2 , with chip swith USB to UART,UART with driver and control code, the user can write yourown control after learning code, or even directly using the code we provide for use in the actualproject inside.3 , with PS2 keyboard interface , Keyboard as the input is more convenient, and moreinformation can be entered. The board also has a control code that can be directly parse outthe keyboard input..4 , 7-segment digital decoder with 8 dynamic scanning tube . With a standard driver.5 , with 24XX and 93CXX chips and chip sockets , USB port connected to the computer,with software can be used directly for downloader of these two types of chips.6 ,8 DIP switch, 4 buttons, 8 LED, 1 buzzer.7 , external expansion interface board , 20PIN plug.What caught my eye was --> "tutorial (Oscilloscopes)"Edit: Is this an oscilloscope training board?Exactly what is this?

author: drakke
author_rank: Regular Contributor
timestamp: May 12, 2015, 03:05:57 pm
content: Yes, I am interested also.
For Sale (UK): Xilinx Platform Cable USB II - Page 1
Forum section: electronics / general

author: armandas
author_rank: Frequent Contributor
timestamp: February 25, 2015, 10:01:41 pm
content: Would anyone be interested in buying a Xilinx JTAG programmer? Comes in as-new condition, with all the accessories. Looking to get around £120.Won't be in the country from the 3rd of March, so need to sell by Friday, ideally. Would be sent using Royal Mail Special Delivery service.
Xilinx ISE -- Coregen DDR Controller IP problem -- Spartan 3e - Page 1
Forum section: electronics / general

author: Harrkev
author_rank: Contributor
timestamp: January 17, 2015, 05:36:15 pm
content: OK. This is driving me NUTS! I am having problem with the DDR controller generator on Xilinx ISE.I have the bog-standard Digilent Spartan-3E starter board with a Micron MT46V32M16 (8 Meg x 16 x 4 banks). I am having trouble with the data lines.Making a brand-new DDR Controller, I specify an 8-bit address width (keep in mind this part has 16 data lines). I keep churning through and keeping the default options. When I get to "Bank Selection" it wants to use 14 data lines!!!Now, if I go back and choose a 16-bit data width, it wants to use 24 data lines!Any idea what is going on here?**EDIT**According to the Digilent manual for the board, their example UCF file actually fits the entire DRAM IO on bank 3. For some reason, even if I feed that same UCF file in for guidance, the coregen chokes and dies.Note that if I do not select the "right" bank selection, the generator will actually error out without telling me WHY it generated errors, and this is even WITH everything being green on the "Bank Selection" windows. Any comments?Thanks in advance.

author: Scrts
author_rank: Frequent Contributor
timestamp: January 20, 2015, 08:30:43 am
content: Did you set up a number of columns and rows in your memory?

author: Harrkev
author_rank: Contributor
timestamp: January 21, 2015, 10:18:58 pm
content: Quote from: Scrts on January 20, 2015, 08:30:43 amWell, DesignWare knew about the part number (not the speed grade, so I chose one that was slower).I can choose either 8, 16, or 24 bits for the data width. For a single DRAM chip, 16 should work perfectly. Digilent managed to get all pins driven from bank 3 (I assume that they tested it and that it worked). I, however, cannot convince DesignWare to make a 16-bit interface with just bank 3 without having it die.

author: Scrts
author_rank: Frequent Contributor
timestamp: January 22, 2015, 11:42:51 am
content: Maybe there's a reference design for your board?

author: David Spicer
author_rank: Contributor
timestamp: January 25, 2015, 10:55:51 pm
content: Ththere is a ref design but it dissappeared on new years day. I know because i was using it. You might find it by searching the avnet site. They keep an archive. I think its called design resource centre. Avnet/drc or something like that. Look for obsolete designs/xilinx etc.The design i am using uses the mpmc ( multi port memory controller) which you can modify in EDKYou only have to put the part number in and it works the rest out. No needUsing old xilinx boards can be a nightmare. I suspect it's intentional. An insurmountable obstacle tends to arise with licenses or deprecated pcores. I understand where they are coming from. After all, you aren't going to make anything in volume using ddr and a spartan 3e. But that won't make you feel better of course.
Deeds a Digital simulation suite (and VHDL Generator) Altera QII - Page 1
Forum section: electronics / general

author: bingo600
author_rank: Super Contributor
timestamp: December 21, 2014, 09:32:54 pm
content: Gents - Just found Deedshttp://www.esng.dibe.unige.it/deeds/Have a look herehttp://www.mikrocontroller.net/topic/353166#newIf anyone can answer my question about if the Ram starts @32k , please doSeems like a nice little suite that also runs on in linux wine./Bingo
US and Canada only. Win a Digilent Zybo dev board for the Xilinx Zynq 7000. - Page 1
Forum section: electronics / general

author: wilfred
author_rank: Super Contributor
timestamp: November 23, 2014, 10:26:51 am
content: /.

author: muffenme
author_rank: Contributor
timestamp: November 27, 2014, 06:11:02 am
content: http://www.xilinx.com/products/boardsis dead. I have no ideal what you talking about no contest at these website
Help with Altera Cyclone III configuration problems. - Page 1
Forum section: electronics / general

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 04, 2015, 12:49:00 pm
content: Hi,I've tried to make a development board for the Cyclone III, most of it works as far as I can tell without the FPGA.My problem is with the FPGA configuring after I have successfully downloaded the configuration file to the serial memory. Referencing this document:https://www.altera.com/en_US/pdfs/literature/hb/cfg/cfg_cf51001.pdfI can tell what stage the FPGA is in when powering up. Well nothing happens. The FPGA just sits there with NCONFIG at 1.5V, CONFIG_DONE at 0V and NSTATUS at 0V.I think there may be something wrong with the FPGA as NCONFIG isn't at 0V, when I pull it low to reset the device and attempt to restart the configuration it drops a little to 1.2V.I have gone over the pins and connection scheme and unfortunately haven't found any problems!Attached is my schematic, it has some errors but I have made a rev1.1 schematic and changed those. One of those is the schematic says I'm using 1MB of memory when I'm using 16MB. I show rev1.0 as this is the revision of the board I'm working on.Thanks for any help!

author: Scrts
author_rank: Frequent Contributor
timestamp: April 06, 2015, 09:00:59 pm
content: NCE is pulled low by 10k. I think it has internal 10k pull-up. Pull that hard to GND with 0Ohm.

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 07, 2015, 01:54:19 pm
content: Thanks for your reply. It is pulled low in the schematic however I replaced the 10k with 0R and no change.I decided to test whether the pad on the bottom had continuity to GND and it didn't so I fixed that and the FPGA configures from the memory however now Quartus Programmer does not recognise the memory when the pad is connected to GND. It works when I lift it.

author: Scrts
author_rank: Frequent Contributor
timestamp: April 07, 2015, 02:52:01 pm
content: Can you program the FPGA using JTAG? Does CONF_DONE go up then?

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 08, 2015, 12:41:19 pm
content: Unfortunately I didn't bring the JTAG out and I can't mod it.Do you have any other ideas?I haven't had time to look at it since I got it working a bit. I have time tonight and see if I can solve it.

author: deephaven
author_rank: Frequent Contributor
timestamp: April 08, 2015, 12:51:40 pm
content: Have you got MSEL 1, 2 and 3 set appropriately? Seehttps://www.altera.com/en_US/pdfs/literature/hb/cyc3/cyc3_ciii51016.pdfI have MSEL 2, 0 connected to 0v and MSEL 1 connected to Vdd.

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 08, 2015, 07:56:01 pm
content: Quote from: deephaven on April 08, 2015, 12:51:40 pm

author: Boscoe
author_rank: Frequent Contributor
timestamp: April 08, 2015, 08:01:04 pm
content: Okay I've got everything working now. It was because I shorted nCE to ground but in the app note it says to pull it to GND via 10k.
Xilinx, JTAG, and TCF - Page 1
Forum section: electronics / general

author: mark03
author_rank: Frequent Contributor
timestamp: April 18, 2014, 04:28:39 pm
content: So I recently picked up a Zynq dev board (MicroZed) with the intention of finally teaching myself an HDL and learning synthesis and simulation tools. Belatedly I realized that it doesn't come with on-board USB-JTAG. This being Zynq you can do a certain amount just by booting Linux with your FPGA bit file on the SD card, but eventually I'll want a proper JTAG adapter. Especially as the kit came with a Vivado Design Edition voucher which includes Chipscope (now called Vivado Logic Analyzer).Looking at my options, there are the $$$ Xilinx "platform cables," cheap Ebay clones of the Xilinx cables, and Digilent cables. The latter are actually quite reasonable ($60), except that they're a single-use item---only for use with Xilinx FPGAs---which I find somewhat annoying. In this age of fast PCs and USB, why is it that we still can't buy a single "do it all" JTAG thingie that works with any FPGA or MCU with suitable adapters and a universal software interface? The rebel in me hates subsidizing these anti-competitive practices.It turns out that in their new toolset (Vivado), Xilinx has embraced an open standard called the Target Communication Framework:http://www.eclipse.org/tcf/. The drivers for the Xilinx and Digilent cables are encapsulated in an agent calledhw_serverwhich speaks TCF to the rest of the toolset using JSON over TCP/IP. (This has the nice side-effect of allowing remote debugging.) Thehw_serveris probably based on this open-source template:http://git.eclipse.org/c/tcf/org.eclipse.tcf.git/plain/docs/TCF%20Linux%20Agent%20Prototype.html. Which has me wondering... How much effort would it take to write a replacement agent that talks to some cheap FTDI JTAG, or better yet, a modified version of the Black Magic Debug Probe:https://github.com/gsmcmullin/blackmagic?I'll probably pick up one of the cheap Xilinx-only cables and do some packet sniffing to see how complicated the protocol appears. Xilinx used to support something called "virtual cable" which turned out to be very simple indeed (http://debugmo.de/2012/02/xvcd-the-xilinx-virtual-cable-daemon/), so I'm hopeful this will also turn out to be raw data encapsulated in a simple way. Unless they are performing some sort of authentication between agent and tools...
Altium Xilinx Zynq 7000 libraries - Page 1
Forum section: electronics / general

author: mehdiru
author_rank: Newbie
timestamp: April 01, 2014, 09:10:27 am
content: Hi,I'm starting a project with Zynq 7000. I would like to get the latest Altium libraries (Altium's Live site is asking for a login, I tried to register but didn't get any answer from them).Can anybody download them for me? my email is m_e_h_d_i_@_t_a_i_l_e_b_._n_a_m_e (without underscores).Thanks in advance.
Which FPGA chip do you think is much better between Xilinx and Altera? - Page 1
Forum section: electronics / general

author: mazhongqiang
author_rank: Newbie
timestamp: December 21, 2013, 03:58:59 am
content: Which FPGA chip do you think is much better between Xilinx and Altera?Which one is used in designing circuits more general?If you select one of the two chips,please list its advantages compared with the other.Pardon me,my English level is much worse.THank you!

author: mrflibble
author_rank: Super Contributor
timestamp: December 21, 2013, 04:23:01 am
content: Oh cool! We haven't had a decent fpga flame war for a while. Usually it's one of those lame avr vs pic affairs, hardly worth the term war. Those are more like a flame skirmish. Flame kerfuffles really.Altera tools are a little less crappy, xilinx documentation is a little less crappy. There, I said it. Both sides have some crap that you will have to deal with, and what crap you want to deal with depends on your preferences.At any rate, both xilinx & altera fpga's are perfectly capable. What you would pick would depend more on your typical project... Soooo, how about you give us a bit more detail about what you are looking for? That way you can get a bit more specific advice.

author: Fsck
author_rank: Super Contributor
timestamp: December 21, 2013, 04:55:30 am
content: isn't this like asking what's the best screw size for general use?also, neither are chips. they're companies with huge portfolios of products.

author: Stonent
author_rank: Super Contributor
timestamp: December 21, 2013, 05:12:07 am
content: Quote from: Fsck on December 21, 2013, 04:55:30 amThe best one is the one that correctly functions under all the conditions your product will encounter, at a performance level that will not cause the end user to be dissatisfied with your product, that allows your employer's stock price to go up the most.

author: trackman44
author_rank: Regular Contributor
timestamp: December 21, 2013, 05:13:32 am
content: The best way to answer your question is what do you need it to do? Do the research on both chips, find out what they are capable of, what products are they implemented in ( i.e. watch Dave's teardown videos of products with FPGAs), read reviews, come to a conclusion and choose the chip that meets your design goals. It's not about what's better, it's about which one will work for you and you feel more comfortable with.Will

author: free_electron
author_rank: Super Contributor
timestamp: December 21, 2013, 05:36:40 am
content: both companies have similar products . the key is the toolchain.Quartus is straightforward , ISe is a ontraption made from different bits glued together ...

author: DaveW
author_rank: Frequent Contributor
timestamp: December 22, 2013, 12:21:55 am
content: Quote from: free_electron on December 21, 2013, 05:36:40 amAmen. I was on a training course with people using both toolchains. We got instructions written for whatever toolchain we were using, but you could tell who was using Altera, they were always the ones who were finished first
Altera MAX V vs MAX II.  Any substantial reason to ever consider the Max II? - Page 1
Forum section: electronics / general

author: JoeN
author_rank: Frequent Contributor
timestamp: October 25, 2014, 01:25:06 am
content: The MAX V CPLDs seem better in almost every aspect compared to MAX II, unless you need the higher core voltage for some reason. MAX Vs are actually less expensive. What is the MAX II good for other keeping a current design static?Digikey price for qty 1 for industrial (0°C ~ 85°C) grade:Model24054012702210MAX II $$6.80$13.30$22.70$36.20MAX V $$4.90$7.50$11.00$19.90Max V is cheaper.Typical propagation delays:Model24054012702210MAX II4.7ns5.4ns6.2ns7.0nsMAX V7.5ns9.0ns6.2ns7.0nsMax II small devices are faster. Larger devices have the exact same typical delay.Max V also has 40, 80, and 160 LE versions. The 40 LE version is 90 cents! 80 LE version is $1.70. 160 LE is $3.70.Why Max II? Any reason?

author: marshallh
author_rank: Unknown
timestamp: October 25, 2014, 01:28:32 am
content: Max V is newer and smaller die, that's why it's cheaperBoth use on-die eeprom for configuration

author: miguelvp
author_rank: Super Contributor
timestamp: October 25, 2014, 02:33:07 am
content: 169 LFBGA package 8000 LE $19 Qty 1 ($15 Qty 100) 387078 ram bits and 130 I/O pins.http://www.buyaltera.com/scripts/partsearch.dll?Detail&name=544-3038-ND
FS: Altera DE2-70 FPGA Dev Board + 5MP Camera Board - Page 1
Forum section: electronics / general

author: dmginc
author_rank: Contributor
timestamp: July 12, 2013, 12:39:05 pm
content: Hey Guys,Selling these two after brief usage at uni.See here:http://www.ebay.com.au/itm/Terasic-Altera-DE2-70-FPGA-Development-and-Education-Board-5MP-Camera-Module-/161062895722Local pickup: Melbourne, AustraliaCheers
Help required in Library of Zyn 7010 by xilinx SoC - Page 1
Forum section: electronics / general

author: sanwal209
author_rank: Regular Contributor
timestamp: August 07, 2013, 06:35:06 pm
content: I dont have account on Altium Live.I already submitted request but they are not responding and its been one month.I needContents of one Main SoC of my Board.The Link of Content on Altium live is as Followhttp://designcontent.live.altium.com/#UnifiedComponentDetail/Xilinx_Zynq-7000/?search=zynq7000SoC isXC7Z010-1CLG400C.i hope you all have account of Altium Live Can you download the Content of this Chip and send it will be very helpfull because Altium representatives are not responding and this is causing delay in Board.Kindly its a 5 min process i really need help heremy email is sanwal.saleem209@gmail.comThanks

author: sanwal209
author_rank: Regular Contributor
timestamp: August 07, 2013, 10:56:27 pm
content: I Just Got that..Thanks Marshall
FOR SALE: Altera Terasic DE1 Development Board Kit - Page 1
Forum section: electronics / general

author: JimmyMz
author_rank: Regular Contributor
timestamp: October 08, 2013, 01:38:29 pm
content: Hello,I have an Altera Terasic DE1 Development Board Kit that I'd like to sell. Here is a link to the dev board's specifications:http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=83&PartNo=2My DE1 Development Board Kit contains all retail items, originally included with the kit, and the kit will ship to you in the original retail box. This kit is in A+ condition, so youcouldn'tbe disappointed with the quality of ANY item in the kit.If you're interested in the DE1 Development Board Kit, I live in the U.S.A., so your offer must take shipping from the U.S.A. into account. Please PM me an offer. F.Y.I., I have positive feedback on all my internet transactions...my eBay feedback is currently 100%. I suppose the information I provided covers everything, but if I excluded any important details...feel free to ask

author: JimmyMz
author_rank: Regular Contributor
timestamp: October 08, 2013, 06:12:52 pm
content: DE1 has been sold

author: gregallenwarner
author_rank: Regular Contributor
timestamp: October 11, 2013, 01:45:36 pm
content: I was the buyer for the DE1, and I just wanted to comment and say Jimmy is a fantastic seller! The board was in perfect condition, as he described, and at a very fair price. I'm looking forward to getting to use the thing this weekend to start learning FPGA programming. Thanks Jimmy!

author: JimmyMz
author_rank: Regular Contributor
timestamp: October 11, 2013, 01:59:36 pm
content: My pleasure Greg. I was glad to offer an EEvblog forum member a better than eBay price, and a hassle-free experience. I wish you luck with your research

author: echen1024
author_rank: Super Contributor
timestamp: October 13, 2013, 04:35:17 am
content: What was the price? I am just curious, since I am interested in going into FPGAs and want a board that wouldn't break the bank
Altera EPM7096 Quartus II support? - Page 1
Forum section: electronics / general

author: c4757p
author_rank: Super Contributor
timestamp: October 20, 2013, 07:12:06 pm
content: Yep, I know it's obsolete. I happen to have one EPM7096LC68-15 on hand, and it's perfect for a one-off I need to build. But despite the free version of Quartus II claiming to support the entire MAX7000 series, it completely omits all 68-pin devices. I can't seem to dig up anything about this. Does anybody see what I'm missing?

author: free_electron
author_rank: Super Contributor
timestamp: October 20, 2013, 08:10:10 pm
content: did you select plcc in the menu ?you may need to get version 9.xx or older of quartus for that...

author: c4757p
author_rank: Super Contributor
timestamp: October 20, 2013, 08:48:26 pm
content: Oh, I sifted through the menus. I even grep -R'd the Quartus directory for different permutations of the part number....Downloading 9.1 right now, thanks for the hint. I never realized they'd remove models like that - I figured maybe it was only in the paid version and they forgot to mention that or something......and naturally, it won't install.Damn Linux, I love it when I don't require binary-level backwards compatibility.Don't care to fart around with this, I think I'll let this junk bin part transfer to the rubbish bin, and grab a more modern one on the next Mouser order...
Xilinx Webpack. What is free and what is not? - Page 1
Forum section: electronics / general

author: cksa
author_rank: Regular Contributor
timestamp: March 30, 2012, 01:40:57 am
content: It doesn't seem to be very clear to me as to what is free or not out of the Xilinx tools. For example, Coregen is part of webpack, but which CORES are free and which ones are not?Also, as to what tools AREN't included in free Xilinx tools, are they useful for the hobbyist? How will I be restricted? Is Altera better in that regard?

author: slateraptor
author_rank: Frequent Contributor
timestamp: March 30, 2012, 02:41:15 am
content: Quote from: cksa on March 30, 2012, 01:40:57 amThere's nothing prohibiting you from downloading both packages and exploring.Quote from: cksa on March 30, 2012, 01:40:57 amStandard building blocks like single-/dual-port RAM/ROM, FIFOs, PLLs, etc are instantiable. It goes without saying that what can be generated will vary based on your chosen device.Quote from: cksa on March 30, 2012, 01:40:57 amMost hobbyists will have their hands full grasping core functionality, let alone additional included features. Either suite should be more than sufficient for all but the professional hobbyist.Quote from: cksa on March 30, 2012, 01:40:57 amOff the top of my head, Xilinx no longer offers free Modelsim licenses. Besides that, the question is moot.
Having Eclipse for AVR GNU C and Altera Nios II - Page 1
Forum section: electronics / general

author: Stiege
author_rank: Regular Contributor
timestamp: February 13, 2013, 08:39:58 pm
content: So I had eclipse indigo running happily for programming the atmel 328p on my arduino board using avrdude. I go and install Quartus 2 software and the eclipse SDK that comes with it and boom, I've lost my old eclipse set up and add-ons.Alternatively on my linux side, the same thing happened when I installed the eclipse add-on for programming Java on my android device, lost my AVRDude on my linux boot as well.Why can't these add-ons just get along?

author: HackedFridgeMagnet
author_rank: Super Contributor
timestamp: February 13, 2013, 09:30:59 pm
content: As a work around you can have different installations of eclipse running from different directories. This should get around the problem of incompatible plugins.Obviously the paths need to be set up multiple times too.

author: Stiege
author_rank: Regular Contributor
timestamp: February 13, 2013, 10:13:37 pm
content: Thanks, I'll try that. Although I'm not sure why Altera deleted my previous installation, this would have been to a different directory.

author: bingo600
author_rank: Super Contributor
timestamp: February 14, 2013, 08:38:19 pm
content: Quote from: Stiege on February 13, 2013, 10:13:37 pmCould plugins live in a .eclipse in your homedir or ??That might clobber up things/Bingo
Xilinx USB Platform Cable Clone - Page 1
Forum section: electronics / general

author: TerminalJack505
author_rank: Super Contributor
timestamp: March 20, 2013, 11:34:09 pm
content: For those interested, I've attached pictures of a Xilinx compatible programmer I purchased off of ebay for about 40 USD with free shipping.The DVD that it came with seems to be an outdated copy of Xilinx ISE. I didn't bother with it. I have ISE Webpack 14.4 installed. When I plugged it in the Xilinx drivers recognized the device and loaded without any problem.I tested programming with a CPLD project that I had handy and it worked like a charm.All in all I'm pretty happy with it so far. The build quality seems pretty good. There's one bodge on the board where they stacked-up two capacitors on top of one another but that's the only issue I noticed. The soldering quality is good. There is some residue leftover from the through hole components that they hand soldered but everything else is nice and clean and "right with the world."I'll leave the attachments as thumbnails rather than include them inline so as not to picture bomb everyone.

author: TerminalJack505
author_rank: Super Contributor
timestamp: March 20, 2013, 11:40:17 pm
content: A few more with more detail.

author: olsenn
author_rank: Frequent Contributor
timestamp: March 20, 2013, 11:53:42 pm
content: I have the two-in-one Xilinx Platform Cable / Altera USB Blaster clone from Seed (http://www.seeedstudio.com/depot/dsjtag-2-in-1-usb-jtag-cable-for-fpgacpld-p-1040.html?cPath=174) and it works well also. There's really not too much to these things so they're not difficult to clone

author: amyk
author_rank: Super Contributor
timestamp: March 21, 2013, 09:58:12 am
content: It has the Cypress FX2 chip... I wouldn't be surprised if someone in China is selling a variant that can also work as a logic analyser.

author: tinhead
author_rank: Super Contributor
timestamp: March 21, 2013, 10:07:51 am
content: this was a real clone:http://www.mikrocontroller.net/articles/Xilinx_USB-JTAG-Adaptershortly after we published it chinese shops started to clone our clone, of course "improved" down to price (e.g. no LT1719S6, etc)Sure, they works as well, maybe not always (proper voltage detection) and not all modes, but well, for hobby use they probably good enough.

author: TerminalJack505
author_rank: Super Contributor
timestamp: March 21, 2013, 06:07:50 pm
content: Quote from: tinhead on March 21, 2013, 10:07:51 amWell, it's good to know that it was 'inspired' by German engineering at least.
Help with ADC Clocking - Page 1
Forum section: electronics / rf-microwave

author: yammy_96
author_rank: Newbie
timestamp: October 16, 2025, 12:48:21 am
content: I want to sample a 5MHz signal at 20Msps using the AD9629-20. I'm unsure if I have setup clocking correctly and would appreciate any feedback THANKS.40MHz XO used, will use internal divider to get 20MHz.ADC: AD9629-20https://www.analog.com/media/en/technical-documentation/data-sheets/ad9629.pdfXO : CO32D6http://www.hci.com.hk/uploadfiles/Show/20220609095346687.pdfCan I enable the XO by connecting Pin1 to XOVCC?Is the 100 Ohm termination correct?Do I need an LVDS Driver to go along with the XO?Would you recommend using a different XO?

author: radiolistener
author_rank: Super Contributor
timestamp: October 16, 2025, 02:29:03 pm
content: A typical clock input configuration for a high-speed ADC with a differential clock input is the following:back-to-back Schottky diodes across the secondry coil of the CLK transformer will limit excessive amplitude swings from the clock into the ADC to approximately 0.8 Vpp differential. This helps to prevent the large voltage swings of the clock from feeding through to other portions of the ADC and limits the noise presented to the encode inputs.The transformer is used to provide galvanic isolation, suppress common-mode currents through the ground, and match the low output impedance of the clock source to the high input impedance of the ADC clock input. In your case, according to the datasheet, the input impedance is around 10 kΩ.If you are using an LVDS clock, the termination resistor should be placed as close as possible to the ADC clock inputs to minimize signal distortions caused by reflections.Regarding impedance matching, I would recommend verifying on the bench which configuration performs best by feeding a clean sine wave into the ADC under different setups and observing the output, paying particular attention to noise around the carrier.

author: MarkF
author_rank: Super Contributor
timestamp: October 16, 2025, 03:16:04 pm
content: Since the CO32D6 has a LVDS output, I would just follow the clock option in figure 49 of the datasheetwith just a resistor and two capacitors.
Garmin Astro 220 GPS / Dog Tracker questions, - Page 1
Forum section: electronics / rf-microwave

author: CaptDon
author_rank: Super Contributor
timestamp: October 14, 2025, 02:11:05 pm
content: I was given a Garmin Astro 220 with DC30 dog collar tracker. The batteries corroded (Duraleaks naturally) and killed the ability to use the USB MicroSD due to connection damage on the motherboard. I did revamp the battery connections and the unit is working. Here is the main question, The Astro 220 handheld GPS portion uses a 'camera style' USB connector. I have a camera type USB cable but it doesn't seem to externally power the handheld GPS. Do Garmin products need a proprietary USB cable? I also guess that without the ability to use the MicroSD card I am stuck with the very basic 'Base Map' that is in hardware memory? I don't think I can 'flash' anything except the MicroSD if it were still usable. Anyone ever played around with one of these old 220 units? It can still track the dog and give usable information.
Understanding matching network for 5/8 over 1/2 wave antenna - Page 1
Forum section: electronics / rf-microwave

author: Rack201
author_rank: Contributor
timestamp: October 12, 2025, 08:25:11 pm
content: I’m trying to understand the feed/matching arrangement of this 5/8 over 1/2 wavelength antenna:https://www.rfi.com.au/core/media/media.nl?id=2164674&c=3389566&h=wjpkJe9LOW3e4yuagaGjnxKLse26iIHrcS3JrIZAz8u7M6Bk&_xt=.pdfThe base for this antenna references a 'high impedance matching circuit'. There is an inductive coil between the coax braid and the radiator, so it reads a DC short from ground to radiator. Then there is an unterminated single conductor (so not a stub?) extending from the coax center conductor up through the coil. Physically it looks like the attached.Would this be a form of transformer? What could I model this with to experiment?Thanks!My reading suggests this might be some form of transformer style LC network that couples the RF into the radiator and transforms the feed impedance

author: A.Z.
author_rank: Super Contributor
timestamp: October 12, 2025, 08:40:12 pm
content: maybe I'm wrong buthttps://www.steeman.org/Antenna/collinear-dipole

author: Rack201
author_rank: Contributor
timestamp: October 12, 2025, 08:47:59 pm
content: Thanks - I’m ok with the collinear radiating section - more interesting in understanding the matching section in the base.

author: A.Z.
author_rank: Super Contributor
timestamp: October 12, 2025, 08:49:42 pm
content: Quote from: Rack201 on October 12, 2025, 08:47:59 pmjust a "wild guess"; the capacitor is used to (partially) cancel the reactance and the inductive coupler.... if you redraw the circuit in a different way, I believe you'll see it better

author: RFDx
author_rank: Regular Contributor
timestamp: October 14, 2025, 06:27:40 am
content: Quote from: Rack201 on October 12, 2025, 08:25:11 pmModel it as a C/L highpass matching network that takes the 50 Ohm source impedance to a couple of kOhm to feed the halfwave, "ground independent Mopole" antenna.For the 70cm band that would be a 120...130nH shunt inductor between whip and ground/coax braid and a ~1pF series coupling cap. The 1pF cap, being so small, is realized through proximity between the base of the whip (and/or coil?) and the short piece of center conductor extending out of the coax cable.
kenwood ts-940s serial number - Page 1
Forum section: electronics / rf-microwave

author: ME
author_rank: Frequent Contributor
timestamp: October 02, 2025, 12:09:31 pm
content: Can anyone tell me where the serial number is located on my TS-940 SAT?, I cant see it anywhere , Thanks+73

author: ME
author_rank: Frequent Contributor
timestamp: October 13, 2025, 12:47:03 am
content: I found it, it is :6020521 , any ideas what updates or factory mods i should do as in service bulletins etc?. thanks +73.

author: Wallace Gasiewicz
author_rank: Super Contributor
timestamp: October 13, 2025, 10:51:33 pm
content: The big problem with these radios is the PS. If the fan does not work the pass transistors blow and cause the RF power amp to blow the drivers. The PS is easy to repair, the PA driving transistors are difficult. There are several renditions of the drivers and you need to replace them with the correct type. They are also expensive.I usually put a constant "ON" fan on the PS to avoid this problem. I use a computer type fan on the outside of the heatsink. The original fans are "sealed" and hard to lubricate. The power amp fan is not as important. If it fails there is a circuit that turns the PA off when it gets hot.

author: WB8PFZ
author_rank: Regular Contributor
timestamp: October 18, 2025 09:34:00 pm
content: There are replacements for the final rf stage now being offered, they also sell a power supply replacement that works well a eliminates 15-20 lbs. Google TS-940 K6IOK. Also parts for the 930's. Great radios have a few.
mc-921 sub - Page 1
Forum section: electronics / rf-microwave

author: ME
author_rank: Frequent Contributor
timestamp: October 13, 2025, 05:55:13 pm
content: I need to replace an mc-921 double biode in the mode switching cct on a kenwood ts-940s, can i use 2 normal dioded back to back as a replacement?,if so what parts to use, i located an mc-921 on ebay but stupid expensive prices over £20 !.
Looking for kenwood ts-940 psu reliability upgrades - Page 1
Forum section: electronics / rf-microwave

author: ME
author_rank: Frequent Contributor
timestamp: October 12, 2025, 04:27:48 am
content: can anyone recomend any avr/psu upgrades for the original psu to make it reliable?,there is an smps on the market but i dont want a switcher but a way to improve the original psu.
Factors leading to price reductions in microwave communication equipment - Page 1
Forum section: electronics / rf-microwave

author: Scratch.HTF
author_rank: Regular Contributor
timestamp: October 10, 2025, 07:26:11 am
content: Some of the key factors I know of include:* Growing popularity of home satellite TV in the 80s (particularly Ku-band in Europe)* Wi-Fi networking (particularly 5 GHz)* 5G mmWave rollout and development of 6GDo you know of any other key factors?

author: RadioNerd
author_rank: Regular Contributor
timestamp: October 10, 2025, 06:04:24 pm
content: Chinese manufacturers entering the mid-high end market, Siglent being one of the most dangerous ones for the old-established companies...

author: DaJMasta
author_rank: Super Contributor
timestamp: October 10, 2025, 07:08:16 pm
content: The whole telecom industry? Ground links, space links, optical links - the need for high bandwidth and the frequencies being allocated keep pushing commercial applications to higher frequencies, and when it gets outside of laboratory use and into commercial development, the cost drops a few orders of magnitude in a few iterations.The improvements on silicon process go a long way towards making them affordable, but more companies and more expertise in other processes certainly help things along too.More recently, the proliferation of small high frequency radars is pushing that mm wave development, and we're seeing both silicon chips and standard FR4 being mass produced for 40+ GHz applications. The demand for sensing in cars in particular has really helped push development into making these bands more affordable.It's a broad topic, though, if we're going back to the 80s there are plenty of significant things pushing it forward - no small impact would be the car phone turned cell phone turned smart phone. Even if those early bands weren't microwave, that integration and radio technology absolutely enabled working at higher frequencies at more affordable prices.
Lea-XT boards Huawei WD22UGRC: any experience? - Page 1
Forum section: electronics / rf-microwave

author: ecclectrics
author_rank: Contributor
timestamp: October 10, 2025, 11:07:26 am
content: Dear All,I fiind some current offers of Lea-6T and Lea-8T modules from Huawei on the internet (see pictuer below) and am contemplating to get one. Wanted to ask if anybody has experience with these, wheteher they are good and how to use them. Thanks in advance for your advice.Best, Roland
VNA HP 8753b 6ghz trace out of smith chart, and fail test 52,48,17 - Page 1
Forum section: electronics / rf-microwave

author: FPSychotic
author_rank: Regular Contributor
timestamp: October 06, 2025, 09:24:30 pm
content: Hi,I'm beginner and I have a VNA 8753B firm v3.0, with 58047A test set.If I connect any passive component as a N-SMA adapter, in S11 the trace gets gain, it goes out of the circle.After detected it I passed the tests I can pass without mess a lot or could understand, and it failed tests 52,48,17.I think it started after receive a error of IF not found , check R or something like that, I thought the lower temp and age made the YIG a little out of calibration , but doing test 45 fix it, so wasn't very worry, I thought remove the jumper and make the calibration permanent.But now I found this issue, I got the VNA recently so only did 2 port calibration and tested s21 only, there it looks work good, and didn't notice the issue ,it is in reflection only I think.I was said it was a 75Ohm VNA and was converted to.50Ohm, so I dont know if maybe missed some re-calibration in the conversion , or.just have a fault in the ADC board A10 or maybe in the YIG. I connected it to a GPSO and still have the problem.Can anyone help me, I don't know electronics or RF technically to find the issue, but in the practical part I can repair electronics and make RF measurements which make me dificult to know what is going on.I leave one picture of the open after calibration, and after connect a N to SMA adapter.I'm using the Kit 85032B which is right one that is supported by the firmware . Tested diferent adapters, but also other kit 85032A and same peoblem.I think I connect properly the ap7 connectors, cables are good and new, as the adapters. The kit is in very good condition. Also lower the power and rise it, tried calibrate with 6 and 30db attenuators, and also went out of the circle, that is what make me think maybe is the A10 board witch has the ADC but also the ALC I think.I would thanks if anyone can help me I made a great effort to can get the device, and this is very unfortunateThanks. I will be happy to upload more pictures or anything.

author: max-bit
author_rank: Frequent Contributor
timestamp: October 09, 2025, 08:19:59 am
content: From what I can see, both modules are originally rated at 50 ohms.Send photos of the SELF TEST? Does it pass?

author: FPSychotic
author_rank: Regular Contributor
timestamp: October 09, 2025, 08:37:17 am
content: About the 50/75Ohm It is what I was said, it was converted from 75ohm to 50ohm, the test set 85045A I think was added later.Internal test pass, , randomly test 48 and 52 passed, but most times it fails. The one always fail is test 17, which test the ADC IF board A10, I bought the A10 board as foumd one "cheap"If you need more specific test I can do it or more pictures.
Is it a closely guarded secret? RD100HHF1C-103 VS RD100HHF1C-502 - Page 1
Forum section: electronics / rf-microwave

author: Cartel
author_rank: Newbie
timestamp: September 23, 2025, 01:15:11 pm
content: Anyone know the difference between these mosfets?RD100HHF1C-103RD100HHF1C-501RD100HHF1C-502Also when trying to set the idle current, I am told to set it for 1000ma and I should see 4.0v on the gate TX but I see 4.2vShould I stay with 4.2v 1000ma or back it off to 4.0v?thanks*-103*-501*-502

author: ftg
author_rank: Frequent Contributor
timestamp: September 23, 2025, 03:08:36 pm
content: Toshiba's datasheet for RD100HHF1C gives the Vth treshold voltage range as 1.5 to 4.5 volts.So I'd expect there to be a decent amount of unit to unit variation.https://www.mitsubishielectric.com/semiconductors/hf/products/datasheet/rd100hhf1c.pdfIf the service manual says 1000mA, then I'd personally go with 1000mA.

author: pienari
author_rank: Regular Contributor
timestamp: October 02, 2025, 05:06:57 am
content: RD100 is not so familiar for me but the RD70 is.I can say some chip performs better then other and too high bias only create more heat.Lower bias voltage drops output power dramatically but same time chip will last longer.In my tests RD70 performs 4.0-4.3v bias to max safe output 65w @ vhf.