[ASK] About miniBLOC SOT-227 B mosfet and the extra Source pin - Page 1
Forum section: electronics / beginners

author: BravoV
author_rank: Super Contributor
timestamp: April 27, 2016, 07:56:11 am
content: Few questions :- The extra 2nd Source pin which is drawn near to Gate pin, does that mean or imply anything special ?- The words "Kelvin Source (gate return) terminal", anyone can explain in more friendly words please ? Examples maybe ?- Is that a standard mosfet's symbol ?Thanks in advance.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 27, 2016, 09:04:05 am
content: Connect the gate driver to the G-S pins on one side. Connect load current to the D-S pins on the other side.This avoids load current flowing through the drive pins, improving performance.Tim

author: BravoV
author_rank: Super Contributor
timestamp: April 30, 2016, 01:23:44 pm
content: Thanks for the replies guys.Quote from: T3sl4co1l on April 27, 2016, 09:04:05 amTim, what is the exact performance improvement we're talking about ? Example case ?Although its mentioned that we can use both source pins as they're identical, I assume these two has also separated bond wires into the die ?Quote from: blueskull on April 27, 2016, 09:12:02 amAs this form, the wires for either three pins will be much longer (higher parasitic inductance) than the other mosfet types that is soldered on board, as we need to use quite relative long wires to be secured at the terminals. Does this mean for this type of power mosfet, relatively high switching speed is quite challenging ?

author: SeanB
author_rank: Super Contributor
timestamp: April 30, 2016, 01:53:30 pm
content: The drain is a sheet tab from the terminal to the device top, the source is another sheet tab contacting the device inside, and it leads to both terminals using the same length of strip. This means the resistance is the lowest possible so the gate capacitance can be charged and discharged as fast as possible, without the voltage drop caused by 100A flowing in the other lead having an influence on it. Gate lead probably is a slightly narrower sheet tab, just so they can use the same compression welder settings on all 3 terminals to do the connections.Think it through, if the source lead voltage rises 1V on turn on, then the gate effective voltage drops 1V, and this can increase power dissipation a lot to the point of self destruction. Thus a lead to reduce this drop as much as possible.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 01, 2016, 03:56:00 am
content: Quote from: BravoV on April 30, 2016, 01:23:44 pmIIRC, the typical lead inductance is around 8nH, and the mutual is much less.You bolt the PCB to the device(s), after bolting them to the heatsink. With several transistors, the PCB can be self supported, or you can use standoffs or brackets to hold things together as usual.Made a 5kW inverter module, some 5 years ago, using a quad of these. Up to 400kHz. Think the expected limit was around 600kHz at modest derating, but we never pushed it.Suppose you have a transistor with an equivalent gate of 2 ohms + 20nF. This must be driven at +15/0V (or some negative 'off' bias), as fast as needed (on the order of 2 ohm * 20nF = 40ns).A typical driver would be IXDD614CI, which has under 1 ohm output ESR, and can switch in about 20ns, fast enough.The gate driver loop includes these elements:- Gate drive supply bypass cap ("big enough not to matter" C, some ESL and ESR)- Driver IC (~10nH ESL due to pin inductance, ~1 ohm ESR due to Rds(on))- Gate resistor (if applicable; no more than a couple ohms, unless you need it slower*)- Transistor lead inductance (~8nH)- GND return path- And of course any stray inductance in all these paths along the PCB.*Of course if you need it slower (say for EMI reasons), you can cheapen the driver a good bit.Likewise the drain circuit has a loop including:- Transistor D-S (~8nH, and ESR of Rds(on) when on, or C of ~nF when off)- Opposite side transistor D-S (if applicable; take half bridge for instance)- Supply bypass C (and ESR, ESL)- And PCB strays.For the gate circuit, you have a total of maybe 20nF + 3 ohms + 30nH. This RLC circuit has a resonant impedance of Zo = sqrt(30nH/20nF) = 1.5 ohms. ESR > Zo, so it is overdamped. There is no need to further minimize inductance, nor to increase RG.For the drain circuit, you have a total of maybe 24nH + 4nF, for an impedance of 2.4 ohms. But ESR is maybe 0.3 ohm! So, if this resonance is excited, it will exhibit considerable overshoot, leading to failure!The resonance has a quarter period of pi*sqrt(24nH*4nF) = 15ns, which is on the order of times we expect to see here (gate switching will occur in < 80ns, so the Miller plateau will easily be started, crossed or finished in this time period). So expect large overshoot (~60%?).What to do about it?Add inductance.If the load is 300V and 50A, then the load impedance is around (300/50) = 6 ohms. Adding ESL to bring the total to ~100nH will raise the switching impedance Zo to the same level. This only makes things worse at first (more reactance means more parasitic energy stored during a switching cycle), but the first step is to make the inductance manageable, and balanced. Now, when the inverter is lightly loaded (in hard switching), it dissipates maximum power in junction capacitance; when loaded with rated inductive load, it dissipates maximum power in snubber inductance.Now we add a clamp snubber. Since the supply inductance is modest (~80nH added), we have some opportunity to add an RCD clamp snubber circuit across it. The capacitor and diode may have ~20nH (a large part of which is equivalent from the diode's turn-on speed (forward recovery) -- you'd use a junction diode here for the lower cost and capacitance), which is 1/4th the supply loop inductance so we won't be doing too badly here (we can expect a similar reduction in overshoot).The C value needs to be some times the loop capacitance (>3x, otherwise it charges too much during the spike), and R needs to be small enough so the capacitor is discharged (> 2 RC time constants) before the next pulse. The diode handles very little average current, but cannot be too small (I think the failure mechanism is electromigration; follow the repetitive pulse rating if present).Now the resistor dissipates the majority of commutation losses. It doesn't need to be fancy; a tubular ceramic resistor is fine, or you can build a converter to recycle the clamp energy. (A quasi-resonant "lossless" snubber can be used to recycle its own energy as well, but this increases the turn-on peak current, and usually needs more voltage overshoot. In other words, solves the problem by making things worse again. They can be appropriate for some converters though.)Tim