Brain = Mud - Page 1
Forum section: electronics / projects

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 06, 2017, 07:26:22 pm
content: My brain is official fried, I loaded my new board today. It's a duel channel function generator based on the AD9102Took 6.5 hours to complete! my head feels like a pile of mud now.350 components, 270 of them being 0402. So that's one component per 1.1 minutes. The runs of common decoupling caps were fast but it's the switching of components that kills you... definitely must consolidate more, but in this case I had pretty strict requirements for all those different values (loop filter, low pass filter, switching power supply and so on)While doing this I keep saying never again (again) but pushed through it. In the end had only had 5 tombstones that I fixed after reflow. One pad, that I knew had zero solder on it when placed, I decided to ignore knowing it could fix it later.I went with some pretty close spacing on some 0402 parts in rows that were a pain because I could not help bumping adjacent parts that I had already placed.Next project will be a machine to do this for meI'm not really adding anything to the forum and am just sharing because I need a vent and to unwind. What a day!

author: Zero999
author_rank: Super Contributor
timestamp: May 06, 2017, 07:57:27 pm
content: A very professional result.What reflow oven did you use?

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 06, 2017, 08:10:15 pm
content: Allow me to introduce the CookWorks KWS1009J-H10R. 20 pounds from Argos. Winner

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 06, 2017, 08:13:18 pm
content: Relevant music video?

author: MagicSmoker
author_rank: Super Contributor
timestamp: May 06, 2017, 08:14:04 pm
content: Yeah, I am seriously impressed with the placement of the QFP packages. I had to buy a manual pick and place (Abracom "ezpick") for the home lab to keep from smearing the solder paste on every fine pitch component like those QFPs on your board.Oh, and I use a Sharpie pen to put a dot next to any pad that is missing paste or otherwise looks like it might misbehave during reflowing so I won't forget to check it afterwards.

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 06, 2017, 08:48:30 pm
content: Yes! Love PrimusI'm using a scope likethis(not exact one, nor a recommendation) At max height I can get 18mm width on the screen but the good thing about these scopes is they have a fast refresh rate (30 fps), give sharp images and a 20cm working distance. Would definitely recommend something like this over those cheap USB scopes anyway.However 18mm does not put the whole ATSAM 144-LQFP in frame so I'm just viewing the top left corner of it on the screen and the bottom left by eye. I'm also using a hand vacuum tool.The toolI bought for this is shit. You get about 10 seconds before it randomly looses pressure and drops the part. i got the QFP's down on at least between the pins and pushed in place with tweezers, yes I smooshed the solder paste a little but after backing still had good joints and no bridges.

author: testian
author_rank: Regular Contributor
timestamp: May 06, 2017, 09:35:22 pm
content: Looks very professional.Would you like to share the schematics with us?

author: KL27x
author_rank: Super Contributor
timestamp: May 06, 2017, 09:51:23 pm
content: QuoteI'm sure you have lots of other good reasons to buy a manual PnP. I find QFP (and any IC with leads) are so easy to drag solder, I will even remove them from my stencils, entirely, and just stencil mainly the passives and stuff with less than 8 leads. Then drag solder the big multipin parts after the reflow.For the QFN stuff, I have also built a vacuum pickup tool for precise placement. It's a nozzle sticking out of the middle of a two foot long 1/2" dowel with angled handles on the ends. The length is to reduce rotational error AND to give it the reach for placement anywhere even on a large board/panel. You hold it on either end like handlebars on a bike. There a little wire foot near the nozzle which you touch down the point of the foot onto the pcb under the footprint of the chip, then lower the chip down by rotation whilst under the microscope. It works pretty well, once you calibrate the foot for the correct height/size of the chip.OP, that is a professional looking work. Nice pic.

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 06, 2017, 10:22:01 pm
content: @testin I feel it would be a little premature at this stage as it's a first prototype and have not even powered it up yet so am not sure if I have a expensive zero ohm resistor on my hands or what. But I'll post schematics in due course.Having said that I'm happy to provide an overview of whats on the board.The internal 10MHz reference comes from either of these AOCJY2 or a much cheaper AST3TQ both are single ended. I have loaded the AST one but included both foot prints. I'm using the MAX54B1ETE digital pot for fine adjustments of the references.The internal reference and an optional external reference are fed in to a mux that can direct either signal to the system clock or the calibration clock. The Mux is designed using four MHC544A's. In this way I can Use either the internal or external as the system clock or perform a calibration of the internal clock to an external clock.The actual calibration is performed by a Lattice LC4256ZE. I selected this part simple because it was the smallest device in the range the found fit the verilog I wrote. Although I'll admit it's a rather large device on the PCB for such a small task. The basic function of the CPLD is a frequency counter that's read back by the MCU. The counter has a third channel that I'm using for an external counter input.Anyway the main system clock (what ever is selected) goes in to a pll (LMX2582RHAT) whose sole purpose is to take the 10MHz reference and push out a 180MHz clock that the AD9201 DAC wants to see at the end of the day.The 180MHz goes to a clock distribution driver (AD9514BCPZ) this has three outputs. Ch0 divide by 1 is the differential clock for the ADC CH0, Ch1 also divide by one for ADC CH1, and Ch2 is divide by 9 to give the 20MHz clock for the ATSAM MCU HF Clock.So the clocking signals are 1) Single ended from the reference or differential from an external source. 2) LVPECL between the PLL and Distribution chip 3) LVPECTL to LVDC converted between the Distribution chip and the AD9102's. The MCU HS clock is CMOS.Analog front end driver is a THS3091 with +-15 volt rals provided by the TPS65130. I mentioned that part of the circuit brieflyhereIt has other peripherals that I wholesale stole from ATSAM4E dev board reference designs such at Ethernet, Serial, USB and so on but that I've already tested in previous projects so are good.Oh year the core is ATSAM4E16 running FreeRTOS. It's also not a cheap chip that takes up lots of board space so will either be looking to go BGA next time or change to a different Cortex chip.

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 07, 2017, 11:06:32 am
content: Hi All,It powers up! and no obvious issues so far. The MCU takes the simple 'turn leds on' firmware and seems all good. Really happy getting to this point as it's one of those milestones as simple as the task seems.I did have a little freekout moment when I loaded my old RTOS app without re-configuring the clock source and then was not able to connect to the chip again but a pair of tweezers across the ERASE pin and VDD soon fixed that. I need to run on the internal RC first to turn on the TCXO, configure the PLL prior to getting a high-speed clock for the MCU, my old app used an external crystal that does not exist on this board so guess the MCU was just halting after selecting a non extant clock source.Anyway next few weeks are going to be spent writing lots of code and when I've got something to show for it I'll post a new thread dedicated to the project here with a bit more detail.

author: den
author_rank: Contributor
timestamp: May 07, 2017, 06:50:40 pm
content: Newbie question - what are wavy traces for?

author: james_s
author_rank: Super Contributor
timestamp: May 08, 2017, 08:13:19 pm
content: Quote from: pixulator on May 06, 2017, 07:26:22 pmWelcome to my world.That's a great looking board though.

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 20, 2017, 05:15:11 pm
content: It took two weeks (just as I said it would) and today have my first sine wave out of the AD9102. Here's an image of the output of channel 0.It's not pretty but it at least validates a variety of sections on the board. I have lots of issues yet to resolve including but not limited to1) the negative rail of switching power supply has a huge 10mV p-p triangle wave on it that can be seen as the noise in the image above. Passably caused by an early bug where the TPS65130 heated up to a zillion degrees.2) completely ignoring power budget in my design and am already at the 500mA limit of my 3.3 digital supply.3) ballzing up the schematic symbol for the Ethernet port by getting all the pin numbers backward4) more....I'm not making any claims as to it's amazing performance specifications, that stuff is to be worked on over time once I've nailed down the other basic stuff.Actually I was just going to post the schematic as a PDF and realized I have no place to host it? If any one has an idea I'll put it up.

author: David Chamberlain
author_rank: Frequent Contributor
timestamp: May 26, 2017, 06:33:26 pm
content: For anyone following I've started a new thread dedicated to this project.https://www.eevblog.com/forum/projects/2ch-50mhz-awg-based-on-ad9102/