Return Path Routing — Why No One Does It, But You Really Should - Page 1
Forum section: electronics / general

author: kmulier
author_rank: Newbie
timestamp: March 05, 2024, 06:07:21 pm
content: I've written this article about Return Path Routing yesterday.I'd like to share it here:https://embeetle.com/#blog/return-currents

author: tooki
author_rank: Super Contributor
timestamp: March 05, 2024, 08:03:50 pm
content: Kudos! That’s a really nicely explained, nicely illustrated summary of the problem, and a great solution.When I was doing my electronics technician apprenticeship, I had to do a number of high-frequency (4GHz) boards, and my boss introduced me to that aspect. (I had previously already figured out the loop area issue for low-frequency boards, and I came up with exactly the same solution you did! In addition to helping keep loop area small, it’s also a great way to ensure that high-current loads actually have a nice fat high-current return path, not just some sliver of a ground plane somewhere that is enough to satisfy continuity in the rules check, but not carry meaningful current.)

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 05, 2024, 11:24:12 pm
content: Yes, the "trick" to explicitely route traces for what you would have just put a via in a gnd/power plane and called it a day is a good approach.People tend to be lazy with this especially with gnd pins.

author: Benta
author_rank: Super Contributor
timestamp: March 05, 2024, 11:46:36 pm
content: And perhaps abstain from using the thinnest, most anaemic track width available.That also helps.

author: kmulier
author_rank: Newbie
timestamp: March 06, 2024, 09:09:41 am
content: So you're also a Return Current Guy @Tooki? Great! Welcome to the club.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 07, 2024, 02:39:15 am
content: Note that this approach can also help with thermal dissipation issues.

author: tooki
author_rank: Super Contributor
timestamp: March 07, 2024, 06:33:31 pm
content: I think that in summary: in addition to ensuring a sane return path, this method also solves or prevents all sorts of issues that can arise when using a ground plane and blindly trusting the connectivity check in the layout software.

author: Nominal Animal
author_rank: Super Contributor
timestamp: March 07, 2024, 06:58:40 pm
content: Heh, I did this from the get go when I started doing my own (simple hobbyist break-out and carrier board) PCBs, adding thick ground traces until all nets passed DRC,thenadding ground fills where useful. I blame my suspicious nature, and the wish to spend a little extra effort to ensure things work the way I want. (I also like to add more than the minimum spacing between tracks and tracks and pads.)The downside is that when using spoked connections to pads, I often have to remove at least a final segment from the trace to avoid the extra-thick spoke or full connection to the pad. Not much of a downside, but when I forget, the pad spokes can look wonky. (Somebody commented about one in some thread here.)I never thought that it might actually be the more reasonable way to do it.Edited to add later on: The results from effective current loops wrt. susceptibility to EM interference and related antenna effects was something I hadn't thought of before, though. Good points!

author: 2N3055
author_rank: Super Contributor
timestamp: March 07, 2024, 06:59:39 pm
content: And to reiterate obvious, if you think this way you also get better feel of how to best do component placement in the first place..

author: nctnico
author_rank: Super Contributor
timestamp: March 07, 2024, 07:23:49 pm
content: One of my routine post-layout checks is to see whether a ground or power plane is interrupted by a row of pins / vias. If so, it needs fixing. When routing high speed signals (differential or single ended), having return path vias is essential.

author: temperance
author_rank: Super Contributor
timestamp: March 07, 2024, 09:30:51 pm
content: The idea is fine but difficult to apply with for example micro controllers in TQFP, BGA,... with signals starting and ending at all sides of the device. On a multi layer board that's easy enough and what nctnico suggested is the way to go. Spread via's as much as possible so that you don't put up "fences" in planes. Or worse even worse, gaps in planes.For two layer digital boards someone learned me a different approach long ago when I didn't know much about those things. Place components as good as possible. Proceed with routing a web with power and GND between all the important things which need power. It divides your board into small squares/rectangles. The idea is to keep the inductance of the power and GND signals as low as possible. Of course you need more VIA's to connect all signals. But those via's don't hurt while a power distribution network with some inductance combined with high Q ceramic decoupling capacitors does hurt when an external transient makes it into the power distribution network.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 07, 2024, 10:04:14 pm
content: If you route BGAs on 2-layer PCBs, though, you're probably a bit masochistic.

author: temperance
author_rank: Super Contributor
timestamp: March 07, 2024, 10:24:43 pm
content: QuoteThat's not what I wrote. I wrote: For two layer digital boards someone learned me a different approach long ago when I didn't know much about those things.

author: Xena E
author_rank: Frequent Contributor
timestamp: March 10, 2024, 12:55:45 pm
content: I've always wondered why this wasn't a 101 subject rather than being obscured in the later pages of grounding treaties.Well done to the OP for the well written paper.Worthy sticky?X