[solved] FPGA ADC-DAC higher frequency adc input signal causes lower resolution - Page 1
Forum section: electronics / projects

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 05:55:54 am
content: I'm working on a basic adc -> fpga fir filter -> dac experiment and I'm seeing some weird behavior and I have no idea what is causing itCircuit:http://image.prntscr.com/image/63b2addfc5274ce4a70f3aff9a8400c1.pngADC Datasheet:http://cds.linear.com/docs/en/datasheet/1420fa.pdfDAC Datasheet:http://www.ti.com/lit/ds/symlink/tlv5619.pdfThe adc and dac run on a common 48kHz clock, the MSB(11) of adc is inverted to get unsigned output (per datasheet) and that value is put on the dac input on the rising edge of the 48kHz clock.But something really suprising is happening. The higher I go in input frequency the lower resolution the output signal is.It seems to go from the full 12b at 1kHz to 5/6 bits resolution at 9KHz.Since the internal core and clocks for the ADC and DAC are still running at 48kHz I can only conclude that the issue is in the ADC.Measurement 1 [Sine input @ 4VPP 1kHz - Blue trace is input signal, yellow trace is the output of the DAC] :Measurement 2 [Sine input @ 4VPP 3kHz - Blue trace is input signal, yellow trace is the output of the DAC] :http://image.prntscr.com/image/4a6754b9a8c7493ab5f252b27b396c9d.pngMeasurement 3 [Sine input @ 4VPP 5kHz - Blue trace is input signal, yellow trace is the output of the DAC] :http://image.prntscr.com/image/61e0f24eaa054b68b60a146e78e569e9.pngMeasurement 4 [Sine input @ 4VPP 9kHz - Blue trace is input signal, yellow trace is the output of the DAC] :With the sawtooth signal it is even easier to see the output get lower resolution.Measurement 5 [Sawtooth-R input @ 4VPP 100Hz - Blue trace is input signal, yellow trace is the output of the DAC] :Measurement 6 [Sawtooth-R input @ 4VPP 2kHz - Blue trace is input signal, yellow trace is the output of the DAC] :http://image.prntscr.com/image/ccaf624615f34155b777c86093c4fb81.pngMeasurement 7 [Sawtooth-R input @ 4VPP 4kHz - Blue trace is input signal, yellow trace is the output of the DAC] :Measurement 8 [Sawtooth-R input @ 4VPP 6kHz - Blue trace is input signal, yellow trace is the output of the DAC] :http://image.prntscr.com/image/982c51dc1e1d42b29960c95ce666b00e.pngMeasurement 9 [Sawtooth-R input @ 4VPP 9kHz - Blue trace is input signal, yellow trace is the output of the DAC] :http://image.prntscr.com/image/12450d05a0db4c4eb0b14467e69c2d81.pngVHDL TOP:https://pastebin.com/8R5E19s8VHDL CLKDIV:https://pastebin.com/vZPpyVnPVHDL ADC:https://pastebin.com/rCxpMTzeVHDL DAC:https://pastebin.com/cGBQUsBdI have no idea what is going on and this seems very strange behavior. Tried to figure out myself but I have no idea what is causing this.Any ideas what is causing this?

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 06:08:24 am
content: Even more interesting how bigger the ratio between the clock speed (48kHz in the first post) the higher resolution the signal is.clk_out is now set to 5 (running at ~780KHz): Sawtooth-R input @ 4VPP 9.5kHz - Blue trace is input signal, yellow trace is the output of the DAC] :Still works fine at 30kHz in:I do not understand this logic. The faster you sample the better the signal gets :O

author: AndyC_772
author_rank: Super Contributor
timestamp: May 03, 2017, 06:32:01 am
content: Is the signal you're sampling derived from the same clock as your ADC/DAC?In a few cases it looks as though you've not got a very stable trigger on your scope; the analogue waveform (blue trace) looks blurry. How is the scope set up? What is it triggering from?

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 06:53:56 am
content: No the signal is from a separate DDS generator.QuoteIt is triggering on the rising edge of the CH1 signal (yellow line).The blue signal uses a SMA T piece with BNC adapter to connect to the board, DDS gen and the scope.For the yellow signal it is just sma to bnc adapter -> scope

author: capt bullshot
author_rank: Super Contributor
timestamp: May 03, 2017, 07:18:23 am
content: Looks quite as expected.What you see is the result of sampling of your input signal. Sampling a e.g. 9kHz signal with a 48kHz sampling rate results in 5 1/3 samples per period - thats the lines you see. Ideally, when sampling frequency and input frequency are not coherent, the lines should move around, covering all possible voltage steps of the ADC. You may want to experiment with the oscilloscopes and generators settings to see that.

author: Kalvin
author_rank: Super Contributor
timestamp: May 03, 2017, 07:19:20 am
content: Welcome to world of sampled signals. You are missing a reconstruction filter ie. you are creating frequency contents at the DAC output which is not present at the input, so basically you are violating the sampling theorem (or, should I say reconstruction theorem in this particular case).

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 07:36:12 am
content: I added a moving average filter before and that made it a bit better but not by much.Quote from: capt bullshot on May 03, 2017, 07:18:23 amI haven't thought about it in that way. This makes sense

author: hamster_nz
author_rank: Super Contributor
timestamp: May 03, 2017, 07:46:12 am
content: A 9kHz signal, sampled at 48kHZ, without a reconstruction filter you will see only 48/9 = 5.3 different values per cycle.Does your scope have a low pass filter setting for the channel? If so, set it to about 24kHz and see what it looks like then.To the ear, do the DAC wafeforms sound the same as the original? They should do, as your ear has its own inbuilt 15kHz (or so) low pass filters.

author: Kalvin
author_rank: Super Contributor
timestamp: May 03, 2017, 07:48:33 am
content: See this, "Step 7: Reconstruction Filter":http://www.instructables.com/id/Audio-Delay-Module/

author: AndyC_772
author_rank: Super Contributor
timestamp: May 03, 2017, 07:54:53 am
content: When you talk about the signal dropping to '5/6 bits', that would imply that the signal is adopting one of a fairly small number of discrete levels in the Y axis.Oddly, that is something which looks as though it may be happening, but only in one image (for which your link is broken; it'll be helpful to others if you fix it):In every other case, all I see is the number of samples per cycle of your input signal varying as you increase the signal frequency - which, of course, is entirely expected if your sample rate remains fixed.Try triggering off the input signal instead, so at least that is completely stable on the scope trace. Then, look and see what's happening to the DAC output, and how many discrete voltage levels it adopts.I doubt you'll be able to discern the individual levels, unless your input signal frequency is an exact fraction of the sample rate, in which case the ADC will always measure on exactly the same points of the waveform, and so the DAC will indeed output the same set of values each time.Try setting your waveform generator to a frequency which is relatively high compared to your sample rate - say, 12 kHz (for a 48 kHz sample rate). Then try setting it to 12.01 kHz, and watch the DAC output. You should see the individual sampled points drift slowly up and down as the relative phase of the sample clock drifts with respect to the signal you're sampling.If they drift smoothly, your design is working. If they jump in discrete steps, you may have a problem. (Try limiting the resolution by forcing some of the LSBs low in your FPGA to see the difference).

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 08:17:42 am
content: I was wrong the output is 12bits in resolution but I'm just not sampling the signal fast enough to see the ~4096 steps in my 0 -> 4095 bit signal.This is actually logic if you think about it. My initial impression was that I sample more than 2x fs and that it should be ok. But there is more to that I see nowThank you all for the responses!I think many more people might find this post helpful.

author: niekvs
author_rank: Contributor
timestamp: May 03, 2017, 10:01:24 am
content: Note that you can (more or less) perfectly reconstruct the input signal if you add a reconstruction filter on the output. Even a simple RC filter may give a huge improvement. Can you try adding this and see if the result improves? Basically your DAC is incomplete without it: it's important to realize this. The "analog" output of your DAC chip still needs to go through a reconstruction filter if you expect to see a perfect reproduction of the input signal. See also:http://www.dspguide.com/ch3/4.htm

author: AndyC_772
author_rank: Super Contributor
timestamp: May 03, 2017, 10:08:33 am
content: Just to clarify, that's "perfect" subject to the bandwidth limitation imposed by the sampling process, plus the inevitable quantisation noise.Your sine waves can be made to look like perfect sine waves again. Sawtooth waves contain much higher frequencies, so they'll never look right on a scope regardless of any filter, unless your sample rate is very much higher.

author: Spikee
author_rank: Frequent Contributor
timestamp: May 03, 2017, 01:32:08 pm
content: I have left space for a pi filter too fiter a bit on the output and input. But what I'm getting now is good enough