STM 32 Streaming ADC Data continuously through UART - Page 1
Forum section: electronics / projects

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 27, 2019, 04:05:36 pm
content: Hi,I have an STM32F302R8, an I am programming directly to the register rather than using libraries.I have set up 2 ADC channels in 8 bit mode for continuous scanning through the DMA. I have allocated 2 8 bit spaces in memory for the ADC values to be stored in. This data will be used by the micro controller to calculate some stuff, however I'd also like to send a continuous stream of data through UART to the PC through DMA.My dilemma is since the ADC conversion is way faster the UART (currently running at 9600), the ADC value will be overwritten before the UART transmission is complete. At this point what will happen ti the UART transmission?A work around to this would be to take the ADC value from memory and store it in another variable until UART transmission is complete, and then load up a new one an transmit again.Anyone has any other suggestions that might work better?Cheers

author: Kalin
author_rank: Regular Contributor
timestamp: November 27, 2019, 04:58:15 pm
content: I am still a beginner when it comes to these things but my first instinct would be to use interrupts to transfer the data into the UART when the transfer is complete so that it is timed to the UART rather than the ADC.

author: magic
author_rank: Super Contributor
timestamp: November 27, 2019, 05:41:09 pm
content: Are you worried that one byte may be corrupted in the middle of UART transmission or that two bytes will be sent by the UART from the two ADC channels, but that they will come from different moments in time?I'm not familiar with STM32, but in general I would estimate the former as unlikely and the latter as likely. It also depends on how much built-in internal queue the UART has. Some MCUs have two bytes.

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 27, 2019, 06:31:56 pm
content: Quote from: Kalin on November 27, 2019, 04:58:15 pmYes that is my plan to transfer the data after a UART transfer is complete

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 27, 2019, 06:33:13 pm
content: Quote from: magic on November 27, 2019, 05:41:09 pmThe latter is invetabile, since the adc is uch faster than the uart it will never be true 'real time'. However I was more worried about the data being corrupted in the middle of uart transmission

author: magic
author_rank: Super Contributor
timestamp: November 27, 2019, 08:12:38 pm
content: An MCU UART typically has some internal transmit register; you write a byte of data to that register and the UART churns through it at its own pace without caring where it came from and whether the original source of the data has changed or not. If the DMA simply reads a byte from RAM and writes it into the UART TX register and then waits until the UART wants more, nothing bad should happen.I'm talking outta my ass so feel free to disregard if that's not how your MCU works. You have the manual, after allYou may want to move this to the MCU subforum. There are people there who will certainly know and the topic will be easier to notice if it isn't buried in a pile of non-MCU stuff. The "move" button is somewhere at the bottom of the page.

author: thm_w
author_rank: Super Contributor
timestamp: November 27, 2019, 10:49:40 pm
content: There are many possible ways to approach this.Quote from: Glenn0010 on November 27, 2019, 04:05:36 pmYeah, might interrupt on Transmission complete (TC UART or DMA) -> grab latest valid ADC readings -> put into UART DMA buffer -> start UART DMA transfer.Could also make a larger ADC buffer, using circular DMA, large enough to give you time to transfer the data before its overrun.There are also DMA FIFO's which get used I believe (for 8-bit -> 32-bit).https://adammunich.com/stm32-dma-cheat-sheet/https://stm32f4-discovery.net/2017/07/stm32-tutorial-efficiently-receive-uart-data-using-dma/https://community.st.com/s/question/0D50X00009XkhYZ/question-on-stm32-dma-fifoIt feels like a "waste" to DMA only 2 bytes, but it really depends if your application has any use for a huge buffer of previous ADC readings.

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 28, 2019, 09:44:05 am
content: Cheers for the cheat sheet link it's fantastic! I'll give it another wack when I have some time!

author: max_torque
author_rank: Super Contributor
timestamp: November 28, 2019, 12:27:19 pm
content: First option would be to speed up the UART baud rsate. In 2019, i fail to see why you need to be at just 9600 baud. With most USB to serial adaptors 1Megbaud should be easily and robustly availableSecondly, if you are sampling faster than your can stream (for whatever reason) and you need a continuous stream (ie you cannot stop sampling while your stream "catches up") then you will have to decimate your raw data in some way. Given the STM is hardly short of ram, a simple double buffer to grab every nth sample an stick it at the UART seems like the way to go to me?

author: Glenn0010
author_rank: Regular Contributor
timestamp: November 28, 2019, 04:21:27 pm
content: Quote from: max_torque on November 28, 2019, 12:27:19 pmYes I will speed it up as much as possible, it was only at 9600 since it was a value I was using for a simple uart echo program.A double buffer is what am I going to do to keep data consistent even though its not real time!

author: poorchava
author_rank: Super Contributor
timestamp: December 06, 2019, 03:45:31 pm
content: Aside from 2 samples being from differents points in time, nothing bad should happen. In general DMA operations are atomic and UART has a TX register, so a DMA transfer to the memory location will not mess with UART transmission. If you run both UART and ADC via DMA, the DMA will resolve the potential conflict, as it has automatic arbitration mechanisms (if it even will have to, i can't recall if there are or not separate write and read ports on that uC).Cortex M4 and M7 have some serious gotchas when using DMA when there are cache memories enabled. I can't recall the name for that cache mode, but essentially the cache contents do not get invalidated automatically when thereis a DMA transfer to the original place in memory. So when CPU uses data that was cached and that data is overwritten in main memory by DMA transfer (eg. from AURT or ADC) the CPU may still read the old values). I don't know form top of my head if the M4 in F302 evenb has cache, btw.