can FPGA will replace SCM in the future? - Page 1
Forum section: electronics / general

author: david-IT
author_rank: Contributor
timestamp: April 14, 2016, 09:53:25 am
content: Now the technology of FPGA develop very fast,and the cost will down in the future?so do you think FPGA will replace SCM in the future?share your ideas

author: danadak
author_rank: Super Contributor
timestamp: April 14, 2016, 10:47:30 am
content: Scanning Capacitance MicroscopySupply Chain ManagementSoftware Configuration ManagementStudent Christian Movementso many more......

author: tggzzz
author_rank: Super Contributor
timestamp: April 14, 2016, 10:55:16 am
content: Quote from: danadak on April 14, 2016, 10:47:30 amhttp://www.acronymfinder.com/SCM.htmllists 142 alternatives, and I doubt it is completeBut to answer the OP, no FPGAs won't replace SCASA Cryptographic Modules nor Single Chip Modules, although they might be used in implementing them.

author: CM800
author_rank: Frequent Contributor
timestamp: April 14, 2016, 12:26:30 pm
content: I can't see FPGAs ever replacing Single Chip Microprocessors any time soon really.

author: tggzzz
author_rank: Super Contributor
timestamp: April 14, 2016, 01:02:03 pm
content: Quote from: TCWilliamson on April 14, 2016, 12:26:30 pmNo, but they can replace micros+fast logic, and they can contain soft and hard micros. Google Zynq, MicroBlaze, and many related topics.

author: rstofer
author_rank: Super Contributor
timestamp: April 14, 2016, 03:29:41 pm
content: What you buy with the FPGA is parallelism, something you really can't get in a microcontroller beyond the simple multi-core setup. There are applications where SCMs are at a serious disadvantage due to their inability to achieve parallelism.Any time there is some odd hardware or protocol, or even some math things that can be pipelined, where an FPGA might be the only feasible solution. For blinking LEDs, a PIC will win every time.The fact that you can stuff a CPU core into the FPGA alongside the custom logic allows the designer to add connectivity, like Ethernet. A small CPU, programmable in C, adds a lot of functionality.

author: tggzzz
author_rank: Super Contributor
timestamp: April 14, 2016, 03:40:06 pm
content: Quote from: rstofer on April 14, 2016, 03:29:41 pmMore fundamentally you get higher speed, predictable and lower latency, predictable and lower jitter.For raw parallelism, look at the Greenhills chips containing 144 processorshttp://www.greenarraychips.com/home/products/index.htmlFor more conventional and useful parallelism, including compiler-guarateed execution times and up to 32 cores, see the XMOS devices where the largest 4GIPs device only costs ~£25http://www.digikey.co.uk/product-search/en/integrated-circuits-ics/embedded-microcontrollers/2556109?k=xmos

author: rstofer
author_rank: Super Contributor
timestamp: April 14, 2016, 06:06:55 pm
content: And then there are the NVIDIA GPUs on the graphics card.

author: uncle_bob
author_rank: Unknown
timestamp: April 15, 2016, 01:01:47 am
content: HiWell, it *will* be interesting to find out what the OP was asking about ....Simple answer:If there is any volume in your SCM, no, FPGA's aren't going to replace it. FPGA's get replaced all the time, once the product volume goes up.Bob

author: SL4P
author_rank: Super Contributor
timestamp: April 15, 2016, 02:38:20 am
content: CanFPGA replace SCM in the future?Yes. Capable but with higher dev & implementation costs in many applications.WillFPGA replace SCM in the future?No. Capable but with higher dev & implementation costs in many applications.

author: AndyC_772
author_rank: Super Contributor
timestamp: April 15, 2016, 08:16:19 am
content: "Micyoco"...?Does that mean 'microcontroller'? Or something different?It's a completely new one on me; I guess I must have been living under a rock for the last 20 years or so. Or perhaps I've just learned my first word of Chinese?Is there a Chinese word that sounds similar, and "micyoco" is the way it's written using a western alphabet?

author: Ice-Tea
author_rank: Super Contributor
timestamp: April 15, 2016, 09:10:07 am
content: Quote from: david-IT on April 15, 2016, 07:58:20 amNo, they don't. Building an FPGA will always require more silicon, even comparing to exactly the same functionality in an ASIC. In addition, the power of an FPGA lies in its ability to do all kinds of stuff at the same time, parallellism. This is, cost wise, also it's weakness: you need silicon to implement every function on its own where a micro is "reconfigured" by means of the program it is running. You use the same silicon over and over again to implement the various functionality.

author: tggzzz
author_rank: Super Contributor
timestamp: April 15, 2016, 10:12:44 am
content: Quote from: Ice-Tea on April 15, 2016, 09:10:07 amIf parallelism was the key issue, then it wouuld be sufficient to have multiple micros. A more intractable problem is the low latency, fine-grained timing, and timing determininsm possible with FPGAs.Don't forget the old saying "bandwidth is a budget problem, latency is a physics problem".

author: uncle_bob
author_rank: Unknown
timestamp: April 15, 2016, 11:48:18 pm
content: Quote from: tggzzz on April 15, 2016, 10:12:44 amHiIf you want all of the features you mention .... an ASIC will beat an FPGA any day of the week. It won't just beat one by a little bit, it can beat them by an order of magnitude .... and likely while using less silicon.Bob

author: andersm
author_rank: Super Contributor
timestamp: April 16, 2016, 07:43:01 am
content: Quote from: uncle_bob on April 15, 2016, 11:48:18 pmAnd definitely using less power.

author: SeanB
author_rank: Super Contributor
timestamp: April 16, 2016, 09:13:58 am
content: ASIC is a FPGA with all the excess unused stuff, and all the logic used to program and configure it, removed. You start with a FPGA and get the design right, then use the FPGA data to make the ASIC, which generally will fit into a smaller die but which can have the same pinout and package as the FPGA it replaces on the board. Thus no respin on a board, but you need to have a volume that will make the cost of the custom silicon lower than the cost of the FPGA in bulk quantities. IIRC the break even point is 100k parts, which is pretty much the minimum order of any custom silicon, unless you use an uncommited gate array and only have to do the final metallisation layers, where you can do a custom part with only 10k parts as order. Does not save any size or area of die though, just makes the chip a custom part with the FPGA outline and no need to load a data stream or configuration memory at power up.

author: uncle_bob
author_rank: Unknown
timestamp: April 16, 2016, 01:23:24 pm
content: Quote from: SeanB on April 16, 2016, 09:13:58 amHiAn FPGA has a bunch of very generic chunks in it that you can hook up. As soon as you go to an ASIC, you loose the constraint of "generic chunks". That enables your design to do a *lot* of stuff that may be impossible with the FPGA. A voltage servo calibrated delay line is one example that I seem to use fairly often ...Bob