This circuit is blowing my mind (MOSFET question) - Page 1
Forum section: electronics / beginners

author: Croy9000
author_rank: Contributor
timestamp: February 05, 2018, 05:13:42 pm
content: I am hoping someone can un-baffle me, I am very confused atm. Below is a published circuit whose function is to provide 5V to VCC when it is present (a USB cable plugged in). If 5V is not present then VBATT is connected to VCC (if present). When both 5V and VBATT are present, VBATT is said to disconnected.I am trying to understand how this is accomplished. My confusion is what happens when there is no 5V, but VBATT is connected. How is the MOSFET biased properly to allow it to pass current?This is a P-Channel Enhancement MOSFET. From what I understand, for it to be on (connecting VBATT), there must be a Vgs voltage < 0V or more. But the battery is connected to the drain, not the source. What is providing the voltage on the source side to get it biased?

author: Croy9000
author_rank: Contributor
timestamp: February 05, 2018, 05:16:49 pm
content: I also redrew the circuit in the hopes it would help me, which....it didnt.

author: Quarlo Klobrigney
author_rank: Super Contributor
timestamp: February 05, 2018, 05:17:29 pm
content: The only thing I can think of is the reverse leakage voltage/current of D3.

author: gamalot
author_rank: Super Contributor
timestamp: February 05, 2018, 05:25:45 pm
content: If you ignore the body diode, there is nothing different between the source and the drain.

author: Kevin93
author_rank: Newbie
timestamp: February 05, 2018, 05:29:48 pm
content: Your redrawn circuit is incorrect - VBATT connects to the source of the FET, not VCC.When there is no +5V the 100k resistor (R3) pulls the gate down to ground. The source is at VBATT.The PMOS FET therefore is biased by the VBATT voltage between source and gate.This will make it conduct between source and drain providing voltage to VCC via SW1.kevin

author: Paul Price
author_rank: Super Contributor
timestamp: February 05, 2018, 05:34:07 pm
content: The circuit is drawn wrong with the P-chan MOSFET D and S connections reversed.The idea here is that the P-MOSFET could be replaced with a schottky diode, but there would be a power loss due to the forward voltage drop of the series diode. To minimize the loss of switching over to battery, the P-MOSFET is turned on when the USB voltage is zero, but in this schematic that doesn't happen.The only explanation is the MOSFET has been shown connected incorrectly, reversed D and S.When the P-MOSFET is turned on, its low Rdson would present a much lower drop than a diode it replaces.

author: Nusa
author_rank: Super Contributor
timestamp: February 05, 2018, 05:42:48 pm
content: Actually I think it's correct. It's just that you've misunderstood the purpose of the mosfet. It's there to protect the battery from the 5V source when it's present. Don't forget to draw this mosfet's diode in the redrawing...it's significant.

author: Monkeh
author_rank: Super Contributor
timestamp: February 05, 2018, 05:55:14 pm
content: The body diode will conduct when the battery is connected and the USB is not. This will bring the source to the battery potential (minus a diode drop). The gate, if USB is not connected, will be held to 0V by R3. VGSshould then be around -3V assuming a lithium cell of some variety at full charge - this is far over the -1V max threshold and the FET will be conducting as well - and at around 40mohm, that will be very, very close to full battery potential.

author: Croy9000
author_rank: Contributor
timestamp: February 05, 2018, 09:18:54 pm
content: Ah brilliant. Thanks Nusa and Monkeh. Now it all makes sense. The issue was indeed me ignoring the body diode.I can now see VBATT can initially source current because the body diode lets the current pass from source to drain (I guess backwards from normal use?) Also, assuming no 5V preset, this also sets up the proper gate to source on bias for a super low resistance path through source to drain, really opening up the current path for the battery.