0.65mm pitch BGA routing on JLPCB standard 4 layer is it possible? - Page 1
Forum section: electronics / projects

author: Miyuki
author_rank: Frequent Contributor
timestamp: January 30, 2021, 11:36:16 am
content: Hi, I have a question. Do you have experience with cheap board manufacturers and routing denser 0.65mm BGAs?TI layout guide says I can use a simple 4/4mil rule with a 0.2mm drill but need an Annular Ring of 0.1mm(4mil)But most cheap manufacturers like JLPCB have rules with Annulr Ring 0.15mm(6mil) what will make clearance to lands really tiny.Do you have any experience with it? Can I violate this rule and have it manufactured or need I to go to more expensive specs?

author: bson
author_rank: Unknown
timestamp: January 31, 2021, 01:27:26 am
content: Technically not possible, but they may make it anyway if you ask them to. However, you may not get a single board where a via doesn't cut the annular. The reason they need such a large annular is the lack of drill accuracy.

author: wraper
author_rank: Unknown
timestamp: January 31, 2021, 01:32:46 am
content: There are workarounds like making octagon pads.

author: Shadowfire
author_rank: Contributor
timestamp: January 31, 2021, 04:07:18 am
content: If you care at all about yield, you will follow all of your PCB manufacturer's guidelines. Remember, the IC manufacturer guidelines are generally based on getting the spacing and trace sizes equalized; this gives a board with the largest electrical clearances and traces, both of which make the boards easier to manufacture correctly. Intel also has slightly different recommendations for the lands depending on whether the pads are copper-defined or solder-mask defined.The annular ring provided by TI is merely a guideline. If <insert name of any board house here> says minimum annular ring is 6mil, and TI recommends 4 mil, and you give them a 4 mil annular ring, it will *probably* get kicked out during their design check. You should first check to see if the 6mil annular ring can be used without violating the PCB vendor's minimum electrical clearances; as long as you are using a soldermask and are under 30V, you can go down to 2mil copper clearances and still be compliant with IPC-2221B.Quick answer: Figure out if using the the PCB vendor's annular ring will violate their minimum clearances. If it does, use a different service level or vendor. If it results in <2mil trace spacing, use a different service level or vendor. If it results in <4 mil trace spacing, you must use solder mask anywhere this is true. REMEMBER that some prototyping services will automatically clear solder mask away from vias. You generally don't want to use a service like this with BGA parts, it increases the probability of solder shorts.An octagonal pad is probably going to violate the minimum annular spacing (in 8 places), and therefore your octagonal pad could be only partially attached to the via. This is an amazingly bad thing for board reliability. Just normal storage/temperature cycling could cause the pad and via to part ways, not to mention what happens when they reflow your board, or cut it out of the panel.

author: Whales
author_rank: Super Contributor
timestamp: January 31, 2021, 08:51:04 am
content: Not sure if you are doing one-off or large productions, but via-in-pad is an interesting read. I wonder if this is doable in the home using heating + non-specialist epoxies?https://www.4pcb.com/TechTalk_Conductive_or_Non-conductive_VIP_Fill.pdfhttps://www.7pcb.com/blog/non-conductive-via-filling-and-its-advantages.php

author: Miyuki
author_rank: Frequent Contributor
timestamp: January 31, 2021, 10:04:30 am
content: Quote from: Whales on January 31, 2021, 08:51:04 amI wonder what will do HASL finish with via in pad if it will soak them and solve all issuesIt can be an interesting alternative if it will workOr how bad is wicking to 0.2 drilled holeIt's for prototyping max few tens of finished boards expected

author: Shadowfire
author_rank: Contributor
timestamp: February 20, 2021, 08:06:57 pm
content: The problem with via-in-pad is that the vias need to be filled (an extra manufacturing step) before soldering components to the board, otherwise thieving occurs (thru the via to the opposite side of the board). Its something you want to avoid if you're working on a price-sensitive product.

author: nctnico
author_rank: Super Contributor
timestamp: February 20, 2021, 08:16:04 pm
content: Quote from: Miyuki on January 30, 2021, 11:36:16 amIIRC JLPCB has a higher density option as well which allows 0.2mm vias with a 0.1mm annular ring.