Opamp DC bias removal - Page 1
Forum section: electronics / beginners

author: new299
author_rank: Regular Contributor
timestamp: July 23, 2013, 10:07:37 am
content: Hi all,I'm using a device that amplifies with an opamp and puts it though a digitizer. The problem is I get a DC offset on the input (I guess this is the bias voltage from the opamp?). I can see this on a scope. I'd like for this DC offset not to effect other devices, what's the best way of filtering it?---More details:The device is a USRP with LFRX board, the schematic is here:http://code.ettus.com/redmine/ettus/documents/4I'm using this with another data capture device, and the DC offset effects the other device. What's the sensible way to stop this DC offset being received by the other device? I don't want to use a cap, as I don't want to filter DC. Can I use a diode? How do oscilloscopes do this?

author: ElectroIrradiator
author_rank: Frequent Contributor
timestamp: July 23, 2013, 10:41:39 am
content: The problem is in the schematic you linked. The issues are twofold: The V_BIAS input is set to a midpoint DC value, equal to half the supply voltage, and secondly there is no negative supply rail for the instrumentation amps.The VOCM pin is the Output Common Mode Voltage, meaning the average DC output voltage you wish to see on the two outputs, when the (differential) input voltage is zero. You use this pin to adjust the output DC offset to whatever you want/need, including zero.However, to be able to adjust the output common mode voltage to zero, you almost certainly need a negative supply rail to the inst-amps. Just having ground as negative probably wont work here. Haven't looked in the datasheets, as I cannot read exactly which devices you are using.As a first test, try removing R6, 1K to AVDD1, and check the output voltage. This should give zero volt on VOCM, and thus zero average out. But you won't be able to drive anything near zero/ground. Also, for this to work, the devices need to be able to work down to the negative supply rail.Also, using two 1K resistors and a single 0.1 uF capacitor is not going to cut it for a low noise reference voltage, if this is for a critical application. Analog Devices have an app note about this somewhere on their site.

author: ElectroIrradiator
author_rank: Frequent Contributor
timestamp: July 23, 2013, 10:46:16 am
content: The whole point of the schematic you link, is that your single ended input is converted to a differential output. On a differential signal, it is of course the difference between the outputs, which is of interest, not the DC bias. This is a common way for driving some A/D converters, and the DC bias is intentional here.If you just need the input amplified up to a higher DC voltage, single ended, then a simple amp using, say, a TLC272 or better, will do the job on a single power rail.

author: C
author_rank: Super Contributor
timestamp: July 23, 2013, 07:50:20 pm
content: First you need to understand what you are looking at.1. AS818X is a differential in & differential out op amp.2. AS818X power is AVDD & AGND3. Note that VOCM is ( AVDD - AGND) / 24. Note that you have a voltage divider from pin 5 the -out of the amp through R31,R30,R9 to AGND5. note that you have a matching voltage divider from pin 4 the +OUT of the amp through R34,R33,R32 to AGND.6. Note that the two dividers are the same except that R32(24.9 Ohms) & R9(49.9 Ohms).VOCM: Perfect Op Amps with a differential output stage will try to output 1/2 of the Qp Amp's supply on the output pins. The VOCM input lets you add a offset shift to the two outputs. Here VOCM is ( AVDD - AGND) / 2 the same 1/2 of the Qp Amp's supply. VOCM is like the vertical position of a scope, in that it shifts both outputs up or down equally. Said a different way, This input to the Op Amp Moves the center point of the difference of the two OUTs.With a Zero differential on the Op Amp's +IN & -IN this voltage is what is on each of the outputs.R30 & R31 forms a voltage divider between +IN and - OUT, the junction of R9 & R30 should be( - ( -OUT ) ).R33 & R34 forms a matching voltage divider between -IN and + OUT, the junction of R32 & R33 should be( - ( +OUT) ).The following should be trueR31 Voltage =- (r34 voltage)R30 Voltage =- (r33 voltage)The net result of these two dividers is to create a balanced 1X buffer from the difference in voltage what is seen at J19 and the junction of R32 & E33.The differential signal input the Op amp sees is the Voltage across R9 & R32.The difference between the two OUT's is related to the voltage across R9 & R32.If you remove the connection to AGND this would be the difference between the two OUT's(Zero) with the junction of R9 & R32 being at VOCM at Zero current due to VOCM.With the connection to AGND the OUT's must re-balance while keeping the OUT's difference centered around VOCM.Remember this is a differential output amp, so you should have equal but opposite outputs centered around VOCM.Now lets do the easy to think thing of inputing VOCM voltage level on J19. This is ( AVDD - AGND) / 2.- OUT must decrease while +OUT increases by same amount until you have zero difference on +IN & -IN. To get zero difference this means that the voltage across R30 must equal the opposite of R33. With VOCM on J19, you have 24.9/49.9 on R32.Note that as the voltage on J19 decreases the voltage across R30 also decreases. This requires -Out to increase. This also means that R33 changes by the same amount in the Opposite direction which results in +OUT decreasing.What AD808X is doing is converting a single ended input signal in to a differential signal that is level shifted to a more positive voltage center. The difference of J19 to AGND is the difference is the difference between the two OUT's as changed by the gain of the Op Amp (1here).A positive input on J19 is limited by -OUT getting close to -V of OpAmpA negative input on J19 is limited by -OUT getting close to +V of OpAmpNow to the OP's question of DC Offset. There are a lot of possible error sources.R31 <> R34, R30 <> R33 These two results in gain errors but due to junction of R9 & R32 being connected to AGND also result in offset errors.. There are other error sources.The cure for DC Offset is easy, just change VOCM until you have DC balance. This works due to the AGND connection to the junction of R9 & R32. This would normally just shit the output center, but here a change in output center also changes the currents in R9 & R32.I see a possible need to balance both U2 & U3. To balance both will require two circuits like (R6, R7 & C24).The change to VOCM Voltage required should be very small.Put a high value pot across this circuit such that the ends of the pot are connected to AVDD & AGND with the wiper connected to the junction of R6 & R7. At center the pot will have no effect, but when moved from center will slowly change V_BIAS which is VOCM.If the high value pot you have is too sensitive then add a resistor between the wiper and junction of R6 & R7.If you can not get balance with no series resistor, then you need a lower value pot or changes to the R6 & R7 divider.This circuit works fine with no negative supply voltage due to the fact that -OUT suppling a counter offset to keep the input signal in the range of the Op Amp's input.C

author: new299
author_rank: Regular Contributor
timestamp: July 28, 2013, 01:47:25 pm
content: Thank you for your detailed replies C and ElectroIrradiator, you're replies are really helpful. Thanks C in particular for your detailed discussion of the schematic. I'm going to have to sit down with the schematic, data sheet and a primer on opamps and have a read. Thanks again!