hybridfree/eevblog-posts huggingface dataset:
Clicking Noise From Oscilliscope - Page 1
Forum section: electronics / beginners

author: flimtim
author_rank: Contributor
timestamp: November 19, 2021, 02:35:49 am
content: Sorry if this is a really basic question, but why is my oscilloscope producing a fairly loud "clicking noise"? It occurs on startup, and it also happens when I change my voltage division.I assume this is normal behavior, but I don't know what internal mechanics are causing the scope to produce these clicks.For reference, I am using the SDS2104X plus.

author: sleemanj
author_rank: Super Contributor
timestamp: November 19, 2021, 02:43:23 am
content: Relays

author: flimtim
author_rank: Contributor
timestamp: November 19, 2021, 02:46:17 am
content: doh! thanks.

author: tautech
author_rank: Super Contributor
timestamp: November 20, 2021, 08:39:46 am
content: Quote from: sleemanj on November 19, 2021, 02:43:23 amNailed it.flimtim, there are ~20 in the X Plus and most are exercised for self checks at boot.In Daves teardown you can see them all where AFAICT there are 3 for each channel and another 8 scattered around the mainboard.https://youtu.be/HxzQS-Bn2R0?t=354
Client USB Problem on MicroMod Carrier board - Teensy MicroMod - Page 1
Forum section: electronics / beginners

author: UHF
author_rank: Contributor
timestamp: October 27, 2021, 11:37:46 am
content: Hello, I've got a PCB design that uses an M.2 connector for a Teensy MicroMod module. Anyone with some experience of the Teensy platform may be able to understand what I'm talking about, but I would like an opinion of the PCB layout for the client USB micro B connection.The USB is flaky. Windows recognises that I've plugged a USB device in and says it doesn't recognise what exactly it is. There seems to be some communication between the PCB and Windows because I get log information from Teensyduino when the USB is plugged in and unplugged. If I tell the TeensyMM to enter Boot mode from the PCB, it does so and Teensyduino sees this and attempts to flash the current Hex file to it. Power and ground connections are fine. If I remove and bypass the USBLC6 static protection chip (correctly orientated on the board), still the same. I cannot see shorts and have probed around on the M.2 and USB traces. Using another USB connector and soldering short wires directly to pins 4 & 6 of USBLC6 plus GND and VBUS, is still the same. I have five boards from JLCPCB, all the same. The TeensyMM module is fine and I can program it on a Sparkfun ATP board.I can only think that my PCB layout is causing poor USB performance, although it looks simple and fine to me. Stack-up is Signal on top, GND, 3V3, Signal - with ground pours on signal layers.Any help or advice gratefully received, thanks. Ask if you want more!Schematic:https://1drv.ms/b/s!Avbtf5PcDsB0jLEhf0ly98C3bd1F3w

author: Jwillis
author_rank: Super Contributor
timestamp: October 29, 2021, 01:24:02 pm
content: I'm not an expert here by any means but I'll give this a try .Did you add the software for theTeensyduino? The version might have an impact as welll .Teensyduino 1.55 supports Arduino versions 1.8.5 and 1.8.9 and 1.8.12 and 1.8.13 and 1.8.15 and 1.8.16. Future versions of Teensyduino will drop support for Arduino 1.8.15I haven't worked with either Arduino or Teensy but in many other cases software tends to be an issue .

author: bjbb
author_rank: Contributor
timestamp: October 29, 2021, 06:45:59 pm
content: https://forum.pjrc.com/

author: UHF
author_rank: Contributor
timestamp: October 30, 2021, 02:06:24 am
content: Thank you for the replies. It is purely a hardware problem.
Clipping diodes on the output? - Page 1
Forum section: electronics / beginners

author: fabiodl
author_rank: Frequent Contributor
timestamp: February 12, 2022, 07:40:32 am
content: In this schematic, there are two diodes on the H and V pinsWhat are these for? Are they there to clip the lines from going too negative and damaging the 74HCT244?Or do they have another role?

author: Terry Bites
author_rank: Super Contributor
timestamp: February 12, 2022, 01:39:39 pm
content: Yes there are. They are there to enusre the digital sync lines they drive do not go negative to any appreciable degree or to take forever to recover. RGB are analog lines and are designed to be ac coupled.
Clock div fuse - Page 1
Forum section: electronics / beginners

author: Cside
author_rank: Regular Contributor
timestamp: August 28, 2014, 12:48:20 am
content: Quick ammateur question.when switching on the clock/div fuse in a micro, what is the effect on power ?For instance, if we have an 8Mhz external clock and we divide by 8, would the power consumption be comparable to an unfused 1Mhz crystal? I expect it to be somewhere between but I have no dat and little information online. Any experience anyone?

author: Artraze
author_rank: Contributor
timestamp: August 28, 2014, 03:10:41 am
content: In terms of the overall system power usage, generally there's not going to be too much difference between using a 1 MHz clock directly and a 8 MHz clock divided by 8.The power consumed in the crystal is much higher, of course. It's likely (very) approximately 4 times more, but of course it depends on the specific crystals and oscillator. It's still not really noticeable in terms of the overall system power during operation... probably only like 2mW. However, if you put the system into sleep/idle mode and want to keep the oscillator running (so as not to wait for it to startup again) it could be significant.
Clock frequency divider circuit (divide by 2) using D flip flop - Page 1
Forum section: electronics / beginners

author: tarunkumartars
author_rank: Newbie
timestamp: November 13, 2019, 01:07:32 pm
content: how can we divide the frequency of (5MHz) with 50% duty cycle to half its frequency using D flip flops in hardware ?Thank you

author: MarkF
author_rank: Super Contributor
timestamp: November 13, 2019, 01:27:22 pm
content: You can also use 4-bit counters to divide by other powers of 2 (SN74LS160 and SN74LS190 series).These do not need to be LS versions. Could be CMOS if you need higher voltages.

author: tarunkumartars
author_rank: Newbie
timestamp: November 13, 2019, 01:38:49 pm
content: what would be output (Q) when there is no clock given ( initial condition when the Flip flop is just on)? And even negative edge trigger work as well right?

author: wraper
author_rank: Unknown
timestamp: November 13, 2019, 01:55:30 pm
content: QuoteUnless you make power on delay for CLR, output on power on is undefined.QuoteIt acts on positive edge. How is it supposed to divide anything while working for both edges?

author: wraper
author_rank: Unknown
timestamp: November 13, 2019, 02:01:51 pm
content: Quote from: MarkF on November 13, 2019, 01:27:22 pmLS series should die already. Even if you use 5V, there is little reason to use LS, not 74HC74. For higher voltages it would be CD4000 series.
clock gating latches - Page 1
Forum section: electronics / beginners

author: promach
author_rank: Frequent Contributor
timestamp: December 14, 2020, 12:29:26 pm
content: Could anyone help to explain why OR type Clock Gate requires positive latch ?while AND type Clock Gate requires negative latch ?

author: radiolistener
author_rank: Super Contributor
timestamp: December 14, 2020, 12:47:22 pm
content: A & B = !(!A | !B)

author: promach
author_rank: Frequent Contributor
timestamp: December 14, 2020, 01:33:47 pm
content: What are you trying to describe from A & B = !(!A | !B)

author: radiolistener
author_rank: Super Contributor
timestamp: December 14, 2020, 02:00:08 pm
content: Quote from: promach on December 14, 2020, 01:33:47 pm! means NOT operation& means AND operation| means OR operationif you're dealing with inverse values, you can use OR. It will be equals to AND for non-inverted values.

author: promach
author_rank: Frequent Contributor
timestamp: December 14, 2020, 02:25:53 pm
content: Wait, how is A & B = !(!A | !B) related to my question above ?

author: radiogeek381
author_rank: Regular Contributor
timestamp: December 14, 2020, 03:55:02 pm
content: In the top arrangement, with the active-low clock input, the circuit needs to ensure that a falling clock edge that propagates "enable" to the output of the flop doesn't cause a falling edge at the output of the AND gate. (That would present a falling edge on the "output" gated clock to appear very late (flop clk-out delay + gate delay) ) So, the enable is passed through on the falling edge. But the clock is already low so the output of the AND remains low. Then the output will follow the input clock until the disable signal propagates through the flop. But this again will occur after the falling clock edge and prevent a runt pulse. In both cases, treat the flop output as a "pass a rising edge" (OR) or "pass a falling edge" (AND) function.The same logic applies to the rising edge example.Though both of these should be treated with a great deal of respect. They aggravate clock skew problems and can give rise to very interesting and hard to diagnose bugs. (Namely -- "slow" chips work (chips from the slow side of the process distribution) and "fast" chips fail intermittently, even at slow clock rates. )The choice of clock gating strategy is dependent on a whole lot of things -- design rules, process characteristics, product performance targets, design team expertise, and even design management. It's harder than they make it look in the movies.

author: promach
author_rank: Frequent Contributor
timestamp: December 16, 2020, 12:13:22 pm
content: For AND-type clock gate:

author: promach
author_rank: Frequent Contributor
timestamp: March 08, 2021, 08:43:58 am
content: I have two questions onset_clock_gating_check SDC command.1. Why for setup check, AND, NAND gates use rising edge, while OR, NOR gates use falling edge ?2. Why for hold check, AND, NAND gate use falling edge, while OR, NOR gates use rising edge ?
Clock skew, clock shrinkage, phase jitter differences? - Page 1
Forum section: electronics / beginners

author: shivajikobardan
author_rank: Contributor
timestamp: October 27, 2021, 09:28:29 am
content: https://imgur.com/a/k2QaiZuI have the book which shows the figure(but no definition and explanation). Please help me get this and their difference?

author: Kleinstein
author_rank: Super Contributor
timestamp: October 27, 2021, 09:54:24 am
content: Normally a picture says more than 1000 words and it does not need much translation.Clock scew is a systemetic,but fixed phase shift of the clock to different parts of the circuit, e.g. though different path lengths or buffer speeds.Shrinkage is a different delay for the rising an falling edge kind or different clock scew for both edges.Jitter is phase noise, as random variations in the delay.

author: RoGeorge
author_rank: Super Contributor
timestamp: October 27, 2021, 10:13:52 am
content: Clock skew - the ideal and the real waveform have the same length (frequency), but the real one became slightly misaligned in time, there is a phase shift from the ideal (ideal == the reference waveform drawn on top)Clock shrinkage - the ideal and the real waveform have the same length (frequency), but the duty factor is now different than 50%, in that pic the portion of level 1 became slightly shorter than in the ideal waveform on topClock jitter - each period is now slightly longer or short than the ideal waveform, the length on average remains the same, but there is a small random wiggling of the length (frequency) of the real waveform when compared with the ideal one on top
Clocking ADC - Page 1
Forum section: electronics / beginners

author: jmsigler
author_rank: Regular Contributor
timestamp: August 02, 2016, 04:21:51 am
content: Hello, I have a 12.8MHz ref that I would like to use to clock an 8-bit adc (AD9057BRSZ-80) at approximately 70MHz. My current idea is to use a ON Semi NB3N3020 (Datasheet attached). Is this an effective way of generating a clock for the adc? I believe that the 5ps rms jitter is not great, but acceptable for my planned 70MHz clock.This is my first time using a moderately high speed adc, so I'd like any tips and/or traps for young players.
Clone 858D+ hot air rework reed switch question - Page 1
Forum section: electronics / beginners

author: TT_Vert
author_rank: Regular Contributor
timestamp: February 23, 2018, 07:40:55 am
content: It seems I have to have my handle oriented in a certain way to shut off the unit and it looks symmetrical enough where I don't know which side it is half the time so I find myself watching to ensure temp lowers when it is replaced. Has anyone added a second reed switch on the opposite side? Mine is caked in hot glue does anyone know anything about it? From what I've seen it's a 5V Normally closed reed switch.Thanks much,Dave

author: floobydust
author_rank: Super Contributor
timestamp: February 23, 2018, 06:26:53 pm
content: I thought the reed switch is normally open? Let me know if this is wrong.You can put a screwdriver in the wand holder and feel the two magnets.Here is the schematic I drew of the Youyue 858D+ with 856D06.PCB and the wand.These 858D+ hot air stations are kinda dangerous, so I don't trust the wand sensor.Even the on/off switch is dangerous, leaving hazardous live mains running to the wand when it's switched "off"

author: TT_Vert
author_rank: Regular Contributor
timestamp: February 24, 2018, 06:05:47 am
content: Sorry I didn't get notified about replies to this. I did notice one magnet was missing. Glue there but magnet gone. All I had was tape magnet which isn't very strong so that did very little. I may see if I can find a piece of strong magnet that is thin enough but I doubt I do. Another reed switch may be easierYou are right it is normally opened, took it apart and checked. Good thing as SPST N/C axial reed switches are hard to find and 10x the price. I did go through the unit and ensured that it was wired and grounded correctly at least. The unit I have looks quite a bit different internally than all of the videos I saw of people going through and checking their devices. Hot was going through the fuse, unsure about the power switch, I didn't read much about that to be honest.Dave

author: emg
author_rank: Newbie
timestamp: March 15, 2025, 09:36:21 am
content: HiActually extra reed switches aren't required. The Problem is the external magnet or its position. One Neodymium magnet which is Placed(or Glued) on the Plastic part of the Stand is just enough.Note: placing the magnet on any metal part of the stand ,will dramatically reduce magnetic flux around the reed switch. In this case the Switch is activated only in one position.
Cloning a wireless power circuit! - Page 1
Forum section: electronics / beginners

author: robjampar
author_rank: Newbie
timestamp: March 22, 2015, 06:27:03 pm
content: Im attempting clone a wireless charger for a project (Like this);(http://www.aliexpress.com/item/5PCS-LOT-10mm-coil-wireless-charging-module-Receive-current-50-150mA-free-shipping/1841591643.html)Right now i'm concentrating on creating the receiver, and just using the transmitter from Aliexpress to test with.Im not entirely sure how the Chinese one works, Ive attempted to probe it and try and work out whats going on but its a bit difficult for me to reverse engineer.Instead i've tried to recreate it how I thought it was working, and here is my first attempt,I directly rectified the output from the recievers coils like this:And the stepping down the voltage like this (V_IN is actually V_OUT):Then i just pump the (expected) 5V output into a Li-ion charging IC. This works (sort of) but the coils have to be practically touching for it to deliver the 20mAH I set for the battery charger to work, and as soon as they are a mm further apart, the charging IC cuts out (I assume its the charger IC that cuts out at if it cant deliver the 20mAH).Ive tried different values for C24 (the capacitor that is directly over the coils) to see if that has any effect, it does, but it only made things worse.With the chinese one (it outputs 5V), I can get around 80mAH at around 1cm distance apart.I would really appreciate any hints or pointers in the right direction on how to get it working more efficiently? - Or even if im doing anything stupid or totally wrong/there is a much better way!Thanks to anyone that responds!Ive attached a PDF that has all the helpful links ive found (Note: it also includes links for the Power TX, but I am not too worried about that for now)These links are particulaty relevant:http://diydrones.com/profiles/blogs/wireless-power-and-charginghttp://www.sunrom.com/288

author: PA0PBZ
author_rank: Super Contributor
timestamp: March 22, 2015, 08:47:35 pm
content: QuoteDid you use the original coil from the chinese receiver and the same capacitor value? It is a resonant circuit and if it is off you will lose a lot of energy.
Close-up Soldering - Page 1
Forum section: electronics / beginners

author: radiolistener
author_rank: Super Contributor
timestamp: September 18, 2024, 07:53:59 am
content: It looks like AI is generating 3D video from an image taken from a single angle.

author: zapta
author_rank: Super Contributor
timestamp: September 18, 2024, 03:14:32 pm
content: This is the microscope setup they usehttps://youtu.be/m3Ny3j5nH0U?si=FvWaKB4V1PLwqgY1&t=515

author: tooki
author_rank: Super Contributor
timestamp: September 18, 2024, 06:35:18 pm
content: Quote from: radiolistener on September 18, 2024, 07:53:59 amYou need to lay off the hallucinogens (or whatever is causing you to come up with such nonsense).
Closed loop contro system - Page 1
Forum section: electronics / beginners

author: masibp
author_rank: Newbie
timestamp: October 01, 2013, 08:55:43 pm
content: Hello friends. I am being told that the water tank has a capacity of 100cm level. The desired level is 80cm. How should I calculate the control valve constant (Kv)? Q(s)=KvP(s). Q(s) is the inflow rate, P(s) is the pressure driven into the control valve Kv.

author: Paul Price
author_rank: Super Contributor
timestamp: October 02, 2013, 05:25:12 pm
content: Beats me!

author: Sigmoid
author_rank: Frequent Contributor
timestamp: October 02, 2013, 08:30:33 pm
content: Could you elaborate?Just too much missing information!In fact if you reread, this question makes zero sense.

author: geraldjhg
author_rank: Regular Contributor
timestamp: October 14, 2013, 08:02:12 pm
content: id read the right booksthey are hundreds of control loop theory
Cloth electrical tape - Page 1
Forum section: electronics / beginners

author: HobGoblyn
author_rank: Unknown
timestamp: May 13, 2024, 09:53:03 pm
content: Hi all, Google has failed me.The cloth sticky tape you find say over a few cables on a PCB, what’s the proper name please:Thanks

author: Terry Bites
author_rank: Super Contributor
timestamp: May 13, 2024, 10:20:15 pm
content: What is that supermanky yellow tape they use on smps transformers called?I only ask because I want to have it banned!

author: Xena E
author_rank: Frequent Contributor
timestamp: May 13, 2024, 10:38:02 pm
content: Quote from: Terry Bites on May 13, 2024, 10:20:15 pmMylar

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 13, 2024, 11:51:16 pm
content: What's "manky" about it? Yellow tape is a rubber or acrylic adhesive with PET backing, and does an excellent job for such purposes.3M #56 is a typical example, and if you don't like that, maybe a #92 polyimide (Kapton(R)) would be more to your liking?Tim
clothes peg spring inductance - Page 1
Forum section: electronics / beginners

author: random555
author_rank: Newbie
timestamp: April 02, 2021, 01:44:43 am
content: pretty odd question I thought up, but if anyone has one of those old wood clothespegs laying around with the metal spring in them, does that little coil spring have any inductance? I figure as an aircore metal coil it should have something, but I only have a simple mm so I can't test it myself.thanks

author: ataradov
author_rank: Super Contributor
timestamp: April 02, 2021, 01:49:03 am
content: It will, of course. Literally everything has some inductance. Intentional coil will have more than a straight wire.There are formulas to calculate all of that.

author: amyk
author_rank: Super Contributor
timestamp: April 02, 2021, 02:30:41 am
content: https://en.wikipedia.org/wiki/Inductance#Calculating_inductanceYou can also look for "air core inductor calculator" on the Internet.As an order of magnitude estimate, it will be in the few uH range.

author: MikeK
author_rank: Super Contributor
timestamp: April 02, 2021, 02:43:57 am
content: Doesn't the air core inductor calculator assume copper wire? The clothespin spring is some kind of crappy steel.

author: ataradov
author_rank: Super Contributor
timestamp: April 02, 2021, 02:56:20 am
content: They assume lossless conductor, so copper would be closer. But there is a lot of fudge constants there, so it does not matter all that much. Those formulas are only correct for low frequencies, limited dimensions, etc.

author: xrunner
author_rank: Super Contributor
timestamp: April 02, 2021, 02:58:46 am
content: Quote from: random555 on April 02, 2021, 01:44:43 amSure it does. But I think the "coils" are touching (i.e. they aren't made of enamel insulated wire) so the inductance might not be as much as you might get otherwise.
Cloud Lifter (Custom Circuit) Newbie Question - Page 1
Forum section: electronics / beginners

author: jim_griff
author_rank: Regular Contributor
timestamp: March 19, 2024, 12:42:48 pm
content: So, as a total newbie to JFETs (and basically electronics as a whole), I'm trying to design something akin to a Cloud Lifter - a device used to pre-amplify a dynamic microphone's signal to a decent level before the proper preamp stage. It uses 48V phantom power to power the circuit. I believe Phantom power is usually fed via 6.81k resistors to both the hot and cold signal wires to the microphone. In this case, that 48V isn't usually needed for a dynamic mic, but is instead used to power the JFETs in the circuit.Pic 1 is my circuit.Pic 2 is simplified circuit.Pic 3 is also the same simplified circuit but different arrangement.*Topologies are the same, just arranged differently so you can see how it's all connected.My question is this:How on Earth does it work to amplify the signal?I can't for the life of me figure out where the gain comes from.I can't find anything online where people have JFETs in this configuration. i.e. "Back-to-back", or I guess a kind of Darlington Pair but with the power connected to different terminals...Apologies for such a newbie question, but if anyone could point me in the direction of good resources for JFETs, I'd very much appreciate it! Cheers.P.S. Pics 4 and 5 are the generated outputs of the TINA-TI simulation. It seems to work, but I'm going to order some JFETs in the meantime so I can make up a PCB in a week or two.

author: Ian.M
author_rank: Super Contributor
timestamp: March 19, 2024, 01:16:08 pm
content: Its a differential modified cascode:https://en.wikipedia.org/wiki/CascodeInstead of grounding the Gate of the upper FET, its connected to the lower FET Source so it to a large extent tracks the input signal maintaining the Vds of the lower FET more nearly constant. Pic3 shows this most clearly.

author: jim_griff
author_rank: Regular Contributor
timestamp: March 19, 2024, 01:22:57 pm
content: Thanks so much Ian! I'll have a good look into Cascode designs. Something I've heard of before but never looked into. Had no idea this was anything like that.Thanks again. Really appreciate the help!
Clumsy solution to an error; how to improve it? - Page 1
Forum section: electronics / beginners

author: Lucky-Luka
author_rank: Unknown
timestamp: June 29, 2019, 12:42:23 pm
content: Hi allIn my pcb board I've implemented a schematic error.I inverted Vcc and Vss (vss is part of the copper pour) pin connection in the schematic. f@ck!In one picture I point the 2 left middle pins of an IC that have inverted route tracks.I figured out an obnoxious solution involving 2 bended pins of an extra IC socket connected to the original IC socket.It looks like it works just fine now. Last night I shorteed the IC. f@ck!I will make another correct pcb, I was just wondering if something better looking was possible to achieve.Cheers

author: Ian.M
author_rank: Super Contributor
timestamp: June 29, 2019, 01:18:23 pm
content: Swap pins 2 and 3?Well it depends how good you are at making precision track cuts and soldering thin bare tinned copper wire jumpers. IMHO the mod can be made almost invisibly before the socket or IC is fitted.
CMOS 4050 IC as level converter - Page 1
Forum section: electronics / beginners

author: npelov
author_rank: Frequent Contributor
timestamp: June 03, 2015, 09:31:16 am
content: I was looking at4050 datasheetand I found these texts:Quote"ABSOLUTE MAXIMUM RATINGS" section I see:Input Voltage: -0.5 to Vdd+0.5VSo you can't have more than Vdd on input pin (according to ABSOLUTE MAXIMUM RATINGS).And the "RECOMMENDED OPERATING CONDITIONS":Vin = 0 to VDDWhat?I can see there is an input resistor, but they don't give it's value or current for Vin>Vdd.And can someone explain to me the reason for the two diodes around the resistor to ground? I couldn't figure it out . Maybe if you have negative voltage first diode will burn and then maybe second diode will be current limited by the resistor? why would you put the first diode anyway.I had a look at74HC4050equivalent IC. It's absolute maximum ratings clearly show that you can use it as logic converter without any input current limiting:Vdd = -0.5 .. 7VVin = -0.5 .. 16V

author: ignator
author_rank: Regular Contributor
timestamp: June 03, 2015, 11:34:40 am
content: I believe those two input diodes are the intrinsic substrate diodes formed as part of the doping of the pin pads. Note the diode of the Vdd power connection. The Vss is connected to the substrate.Others here that have experience with IC fabrication can tell you how that input resistor is fabricated, but you know every IC has these intrinsic diodes, where input pins can not exceed the power pin's voltage if the diode is forward biased. These 4xxx series parts were susceptible to SCR type latch conditions back when they first came out, if your inputs exceeded the operating rails.

author: Zero999
author_rank: Super Contributor
timestamp: June 03, 2015, 01:36:40 pm
content: That's confusing, elsewhere in the datasheet it implies the input can exceed VDD. I thought the whole point of the CD4050 was it can translate high logic voltages to lower voltages.

author: edavid
author_rank: Super Contributor
timestamp: June 03, 2015, 03:12:29 pm
content: ST just messed up the datasheet. Use the TI datasheet instead:http://www.ti.com/lit/ds/symlink/cd4050b.pdf

author: SeanB
author_rank: Super Contributor
timestamp: June 03, 2015, 04:21:44 pm
content: The 4049/4050 are designed to interface 15V logic to 5v logic, so the inputs can have up to 15V input on them. you should not pull the inputs below ground, as then you will have a high risk of turning on the parasitic SCR in the chip and cooking it.These chips were designed ( as the 4009/4010) to interface the first generation NMOS and CMOS memory devices, which required a 15V logic supply ( along with a -12V and sometimes a -21V supply as well, some needed a -5v supply as well) and which were TTL compatible on the inputs but not the outputs.
CMOS buffer - Page 1
Forum section: electronics / beginners

author: Bogdan
author_rank: Newbie
timestamp: September 22, 2015, 08:40:36 pm
content: Hello everyone,I'm pretty much a newbie when it comes to electronics, but now i'm making my first steps and i encountered a problem.I wanted to use a CMOS buffer for something ( i will go in more details if necessary) the 4050BI connected the Vdd(3.3 V) and Vss(0 V), simple enough. Now i connected on the first input a 3.3V input..here is the problemMy output is 3.3 volts until i connect something, after i connect some LED or something else the voltage drops to 1.7 V or something like that.I want to know why this happens and what can i do to fix it, or use to get my desired result.I suspect that what i'm asking here is 4th grade physics but i simply don't understand what is going on..Thank you

author: hamster_nz
author_rank: Super Contributor
timestamp: September 22, 2015, 09:19:00 pm
content: The rough answer is that the output of a CMOS buffer has output impedance - you can't draw an infinite amount of current frm it.As per page 3.10 ofhttp://www.lns.cornell.edu/~ib38/teaching/p360/lectures/wk09/l26/EE2301Exp3F10.pdf,the output impedance of a CMOS gate is about 1kOhm. (so at 3.3V you might get around 3.3.mA)of current) - even if you connect the pin to 0V. An NXP 4050B looks to be even higher (maybe 5kOhm).However, the 4050B is good at sinking current (12mA @ 5V for NXP part) - so connect the LED between the positive power rail, and add an appropriate current limiting resistor then the output. But you might want then to use an inverter so the LED is only on when you have a high input.

author: alsetalokin4017
author_rank: Super Contributor
timestamp: September 22, 2015, 10:07:11 pm
content: The TI CD4050B data sheet says that at Vcc of 4.5 volts the chip can only sink 5.2 mA per gate in the LOW state at room temperature and can source way less than that in the HIGH state. It can sink 16 mA at Vcc of 10 volts. It's definitely designed for high impedance loads.http://www.ti.com/lit/ds/symlink/cd4050b.pdf
CMOS Decade Counter - Page 1
Forum section: electronics / beginners

author: Falcon69
author_rank: Super Contributor
timestamp: August 22, 2014, 03:39:54 am
content: Question,I'm trying to set this up on the schematic using logic gates on some of the outputs of this CMOS decade counter.http://www.mouser.com/Search/ProductDetail.aspx?R=CD4017BPWRvirtualkey59500000virtualkey595-CD4017BPWRMy question is, does the outputs (Q0-Q9) put out hi or low at all times? Meaning, if I hook up a logic gate to the outputs, will I need to put in a pulldown resistor?It looks like in the data sheet at fig.18, that the logic gates are just connected directly to it.Thanks in advance.

author: eetech00
author_rank: Regular Contributor
timestamp: August 22, 2014, 04:43:01 am
content: hiThe outputs are low and the decoded output goes high when the CLK input transitions from low to highSee the timing diagram, figure 2, on the data sheet.So , if the supply voltage is 5v, the decoded output will be 5vand the remaining outputs will be 0v.eT

author: SeanB
author_rank: Super Contributor
timestamp: August 22, 2014, 04:43:30 am
content: All CMOS counters have totem pole outputs, so there is an active pull up and an active pull down on all outputs. On the 4017 only one output goes high at a time, except for the cascade output which is high for the last 5 counts.

author: Falcon69
author_rank: Super Contributor
timestamp: August 22, 2014, 05:57:20 am
content: Ahh, okay, that makes sense SeanB. Thank you. That would also explain why you need a latching sequence to keep an output high while it switches to the next.Okay, so I will eliminate the resistors I have then. Thank You.What is the cascade output? Which Pin? And why only the last 5 counts, when there are 10 total outputs?

author: dr_p
author_rank: Frequent Contributor
timestamp: August 22, 2014, 01:14:33 pm
content: ______The cascade output is also called "Carry Out" or OUT5-9and is used to drive the clock for the next chip. It's high for the first 5, low for the last 5. Read the datasheet, there's also a timing diagram in there, pinouts, everything you need.

author: Falcon69
author_rank: Super Contributor
timestamp: August 23, 2014, 01:53:12 am
content: oh! You mean for daisy chaining several 4017 chips together to get more then the 10 outputs, gotcha, makes sense.

author: SeanB
author_rank: Super Contributor
timestamp: August 23, 2014, 04:38:28 am
content: You do not get more than 10 outputs, you get a set of decade counters. Carry out is to enable the second counter to have a good input pulse rather than a very short narrow pulse, and that the output will switch in close synchronism with the input clock. First will count and repeat from 0-9 and repeat with the second slowly counting from 0-9 on it's outputs. 100 pulses will bring them back to being both at 0 output high.
CMOS Input Clamp Diodes: Parallel Connected By Dotted Line - Page 1
Forum section: electronics / beginners

author: rambln.wreck
author_rank: Newbie
timestamp: March 08, 2017, 03:37:06 pm
content: Consider the input protection/clamping on the TI CMOS parts (in this case, a CD4017):What is the meaning of the dotted line connecting the triangles of the diode symbol? I have also seen this represented with a solid line in other datasheets.Thanks!

author: singapol
author_rank: Frequent Contributor
timestamp: March 08, 2017, 04:32:52 pm
content: The anodes are connected or on the same substrate?

author: Kleinstein
author_rank: Super Contributor
timestamp: March 08, 2017, 05:17:46 pm
content: The dashed line often indicates parts that are close together and thus thermally coupled.
CMOS inverter output ? - Page 1
Forum section: electronics / beginners

author: AnuI
author_rank: Newbie
timestamp: October 01, 2018, 05:59:46 pm
content: Hi all,I have two questions regarding inverter output.1) what if i remove the Vdd from CMOS inverter and my input is still present. What ll be the output?I think it will be X, but dont know? please help2) what if my input is X and vdd is applied??Please help. Would appreciate.Thanks

author: schmitt trigger
author_rank: Super Contributor
timestamp: October 01, 2018, 06:11:20 pm
content: If you remove power from the IC, any IC for that matter, and then apply an input signal, the behavior would be totally unpredictable.What I have seen is, if the signal source has sufficiently low impedance and there is sufficient decoupling capacitance, the IC and perhaps other ICs, will continue to be powered thru the protection diodes.But again......The circuit behavior will be unpredictable.Whether the poor IC will survive the ordeal, that is a different matter.

author: AnuI
author_rank: Newbie
timestamp: October 02, 2018, 03:15:24 am
content: Thanks Schmitt trigger.But i am looking for something different.Its like if I remove power supply of CMOS inverter or NAND gate the output goes X.I want to know how. Basic inverter analysis kind of explaination.Thanks

author: Zero999
author_rank: Super Contributor
timestamp: October 02, 2018, 01:23:15 pm
content: Quote from: AnuI on October 02, 2018, 03:15:24 amA basic inverter analysis explanation is not applicable because it depends on the type of circuitry used to make the inverter.My guess is, if the CMOS inverter IC's VDD terminal is unconnected, the VSS pin is at 0V, the input is high, what's driving it can supply enough power and there isn't much of a load on the inverter's output, it will power the CMOS IC via the ESD protection diodes and the output will be low impedance, low. If the input is low, there's nothing connected to the other inputs, the CMOS inverter IC's VDD terminal is unconnected and its VSS pin is at 0V, then its output will be high impedance, floating.http://www.nutsvolts.com/magazine/article/understanding_digital_logic_ics_part_4If you don't know what low impedance, low and high impedance floating is, with respect to CMOS logic, then look up tristate CMOS outputs.
CMOS inverting amp with negative VDD? - Page 1
Forum section: electronics / beginners

author: Chad1
author_rank: Contributor
timestamp: June 21, 2012, 07:47:09 pm
content: Hi guys,I'm trying to design a circuit using only an N-FET and a resistor that performs with the basic inverting amp characteristics, but I want it to work with both a + and - VDD. Any suggestions? I'm sure this spec will require more components than an N-FET and a resistor. I tried to come up with a circuit that introduces a diode in series with GND so that when Vin (gate) is pulled low, Vout is VDD (where VDD<0). Below is a truth table of what I want (the last line is the only one that is a problem):Vin (VDD>0) Vin (VDD<0) Vout------------------------------------------------------high 0low VDD (>0)high 0low VDD (<0)VDD||/\/R \||-----o----------o VoutVin ----|-----|||GNDThanks a lot!

author: ejeffrey
author_rank: Super Contributor
timestamp: June 22, 2012, 12:14:29 pm
content: Are either or both of these analog signals or only digital? Does 'Vdd' really need to be the supply voltage, or can you generate separate rail voltages that are above the maximum input voltage and below the minimum. If you can have fixed supplies that cover the entire input range an analog switch will do what you want. Just feed what you call "VDD" to the input and send your "Vin" to the control pin.

author: Unclegummers
author_rank: Contributor
timestamp: June 23, 2012, 07:56:01 pm
content: http://www.southalabama.edu/engineering/ece/faculty/akhan/Courses/EE334-Fall07/Chap16-1-NMOS-Inverter.pdfGoogle is your friend.
CMOS Replacement Battery Question (Playstation 3) - Page 1
Forum section: electronics / beginners

author: wutzerface77
author_rank: Newbie
timestamp: July 15, 2021, 12:57:45 am
content: Hello folks,I'm sure some of the gamer people out there have heard about the CMOS battery Playstation death. For those who haven't-- the Playstation 3 and Playstation 4 essentially lose save data andDOWNLOADED GAMESwhen their CMOS batteries eventually die. My question is: could I theoretically wire another CR2032 in parallel to the current CMOS, then quickly replace it, and remove the secondary CR2032 without affecting anything? I've included a basic drawing for visualization.I apologize if the question is stupid, or not described well-enough. Please let me know if there's anything else I need to describe/explain!Thank you,TimPhila, PA

author: ambrosia heart
author_rank: Regular Contributor
timestamp: July 15, 2021, 01:48:58 am
content: Why not, just do it if you want to purchase a new PS5.See photos

author: Kleinstein
author_rank: Super Contributor
timestamp: July 15, 2021, 08:11:11 am
content: A second battery in parallel is not such a bad idea, if the current is limited. The auximilary battery should be suitable voltage (e.g. 3 V) and have a series resistor to limit the current to a low value. Chances are the auxiliary will first "charge" the old battery, than supply the CMOS (needs only a few µA) and finally "charge" or discharge the new one, depending on the voltage.With too much current the batteries may not like getting charged. A low current (e.g. < 100 µA) usually does no hurt a CR2032 (especially not the old one) for a short time.I would consider an auxiliary battery safer than changing the battery while the playstation is running. There still is a small risk to loose the data - so if possible make a backup.

author: wraper
author_rank: Unknown
timestamp: July 15, 2021, 08:29:03 am
content: Quote from: ambrosia heart on July 15, 2021, 01:48:58 amSo you have read some smart book about ideal circuit and it must be how things work in real world?FYI CR2032 has very high internal resistance (old especially), so nothing bad will happen. You can add series resistor for additional protection. The main concern here is to not accidentally short the contacts during battery replacement. Or that temporary battery may accidentally disconnect in the process.

author: ambrosia heart
author_rank: Regular Contributor
timestamp: July 15, 2021, 10:35:22 am
content: Did an experiment.Just do it, no worry.See photos

author: wutzerface77
author_rank: Newbie
timestamp: July 27, 2021, 12:23:21 am
content: WOW thanks everyone! That was one hell of a response, I appreciate all the experiments and help!!
CMPR  of Unbalanced source resistance - Page 1
Forum section: electronics / beginners

author: Camelkos
author_rank: Newbie
timestamp: October 31, 2020, 01:47:46 pm
content: Hi everybody,Can somebody tell me please how do we get the first CMPR Formula from the ciruit attached Thank you ALL!!

author: TimFox
author_rank: Super Contributor
timestamp: October 31, 2020, 04:42:36 pm
content: From that circuit, if the delta R = 0 and the other resistor pairs are exactly equal, then the output voltage will be zero.If you then add a delta R, simple algebra gives you the non-zero output voltage.The ratio of that voltage to the input voltage (at the bottom of the drawing) gives you the CMRR.

author: dmills
author_rank: Super Contributor
timestamp: October 31, 2020, 06:44:30 pm
content: Treat is as a Wheatstone bridge.The voltages across the load resistors:$$V_u=V_c \frac{R_l}{R_l + \delta R_s + R_s}$$$$V_l=V_c \frac{R_l}{R_l+R_s}$$Then just subtract one from the other.That Corp have a good application note that is relevant on their bootstrapped common mode line receivers.

author: Camelkos
author_rank: Newbie
timestamp: October 31, 2020, 06:58:08 pm
content: Thank you very much !
CMRR and PSRR  - Page 1
Forum section: electronics / beginners

author: joniengr081
author_rank: Regular Contributor
timestamp: March 14, 2024, 02:29:38 pm
content: I was reading the datasheet of INA240. I am always bit confuse of these two terms. Common Mode Rejection Ratio (CMRR) and Power Supply Rejection Ratio (PSRR). These are the two important characteristics of operational amplifier.The datasheet describe CMRR as:132-dB DC CMRR93-dB AC CMRR at 50 kHzAnd PSRR as+/-10 μV/VWhat does these two parameters means ?What is Vcm (common mode input voltage) of an op-amp ? In the datasheet it says - 4 V to 80 V. Does it means that the Vin+ - Vin- can be maximum up to 80 V ?

author: TimFox
author_rank: Super Contributor
timestamp: March 14, 2024, 04:14:59 pm
content: Last question first: the CM range on the input voltage is for both of them together. Your difference (V+-V-) is the differential input voltage, and may not be so large as the CM range.General answer: if you have any two voltagesV1andV2with respect to a common reference node (e.g., ground or the negative supply voltage, as relevant), you can always define the common-mode and differential voltagesVCM= (V1+V2)/2 for the common-mode, andVdiff= (V1-V2)The rejection ratios: if you apply an unwanted signal to either the common mode (at the input) or the power supply (difference between the two power voltages), that unwanted variation will induce an error voltage at the input, equivalent to an offset voltage.The rejection ratio is the ratio between the (large) unwanted signal and the (small) offset voltage.Note that the offset voltage here is an equivalent voltage at the input that would give you the measured output voltage.

author: Terry Bites
author_rank: Super Contributor
timestamp: March 14, 2024, 04:27:04 pm
content: You may find this note from Renesas helpful.It explains the effects of these parameters and how they are measured.

author: MathWizard
author_rank: Super Contributor
timestamp: March 16, 2024, 10:41:22 am
content: I've been aware of this stuff for a while, but I've never tried to measure CMRR or PSRR, those test circuits sure are easy, I better read about PSRR again. I thought it would be about AC signals, and output ripple, for some AC added on-top/between the DC rails.For a while I've been wanting to make a test jig for various op-amp parameters. So I better choose a few circuits and just make them.
CMRR differential probe specification - Page 1
Forum section: electronics / beginners

author: Tomsik
author_rank: Contributor
timestamp: April 26, 2023, 11:09:13 am
content: Hello,I'm a pretty beginner in this field and I must say that CMRR is sometimes really confusing to understand correctly.I would like to know why manufacturers of differential probes specify CMRR sometimes as a positive value and sometimes as a negative...For instance :Testec TT-SX 900150 Hz: -72 dB20 kHz: -66 dB200 kHz: -56 dBPICO TECHNOLOGY TA041CMRR (typical) 86 dB @ 50 Hz; 66 dB @ 20 kHzIs it comparable without regard to the sign? And why do manufacturers do that?

author: wasedadoc
author_rank: Super Contributor
timestamp: April 26, 2023, 11:15:29 am
content: Yes, same. it is a ratio so depending on what to what the sign changes.
CMRR of differential amplifier - Page 1
Forum section: electronics / beginners

author: aneevuser
author_rank: Frequent Contributor
timestamp: March 14, 2020, 03:56:33 pm
content: I've knocked up a differential mic. preamp. I'm currently using an LF411 and a bunch of randomly selected 5% resistors. I've read (but not seen the derivation) that the CMRR depends strongly on how well matched are the resistors around the op amp. I've done nothing special to select matched resistors from my 5% stock. I've measured a CMRR of almost 60 dB, with the amp. having a gain of 40 dB. A bit of googling suggests that this isn't too bad for a mic. preamp.So questions:1. Given my lack of effort at matching the resistors, did I get lucky with this CMRR, or is this an expected figure for 5% resistors randomly selected? I don't know how to calculate the theoretical CMRR here, so I can't answer this myself.2. What CMRR should I aim for, if I want to record speech in an audio-quiet but not necessarily electrically-quiet environment? Is there a rule of thumb that I can use here (e.g. speech=70 dB), or is "as good as possible" the best that can be said?

author: awallin
author_rank: Frequent Contributor
timestamp: March 14, 2020, 04:02:39 pm
content: derivation e.g. there:https://www.ntu.edu.sg/home/aschvun/FAQ/DiffAmp.htmlmaybe take that Acm formula lower down the page and run monte-carlo simulations where you pick R1 thru R4 from a 5% wide distribution, and see what distribution for Acm you get...
CN0359 Conductivity Measurement - Page 1
Forum section: electronics / beginners

author: alnstn10
author_rank: Contributor
timestamp: June 21, 2022, 02:43:27 am
content: How to connect the RTD connection on analog devices CN0359 to the PT1000 temperature sensor (as shown below) ?

author: ocw
author_rank: Regular Contributor
timestamp: June 21, 2022, 05:10:14 am
content: The CN0359 can be connected to either 2, 3 or 4 wire sensors. The manual details the connections for each situation.https://www.mouser.com/datasheet/2/609/CN0359-586926.pdfWhile it is not an optimum method, it looks like you will need to make or purchase a wire to BNC cable. With a PT1000 the extra resistance will not hurt the accuracy as much as with a PT100. You can do some compensation via the software. If you are concerned about accuracy you need to change to a 3 or 4 wire sensor.I have two CN0359's and installed them in a case with banana jacks for my four wire sensors." alt="" class="bbc_img" />