No ethernet PHY connectivity with ESP-32-WROOM - Page 1
Forum section: electronics / general

author: padagra
author_rank: Contributor
timestamp: October 03, 2019, 12:32:53 am
content: Hello all, so I’m pretty new to this hopefully this kind of post is alright. I’ve been racking my brain trying to figure out what I’m doing wrong, maybe one of you will see something I’m missing.So I designed a board based off the Olimex ESP-32-POE for easy sensors in home automation. The Olimex board starts to add up cost with a lot of individual units, I found it was cheaper for me to design the version I need stripped down from their design. I’m going to apologize in advance for my schematics, like I said I’m new and still learning please go easy on me. This is the first PCB design I’ve done, it was supposed to be straight forward since I have an open source design I could copy directly from.Currently I have working:- POE 5v regulator- 5v to 3.3v regulator- Programming Header- IO Breakout- Addressable LEDsThe only part that is not working is the ethernet PHY chip. I’m using the same exact code provided from Olimex using the same components. I’m thinking it must have something to do with my PCB design, I can’t see any differences in the schematics.This last board I received was drawing 1.43amps when I had the ethernet transistor enabled by the Esp-32 microcontroller. Turns out I had a ground via shorting out a trace which was found using a thermal camera. Once I broke the trace on the circuit board, the short went away but I still cannot get ethernet connectivity as expected.Troubleshooting notes:- I also have an Olimex board in hand and have been running my code against it as a baseline, everything works fine on the Olimex board.- I have checked to make sure the select lines through the resistor networks are selecting the appropriate PHY mode on the chip (2.2k ohm resistors)- I am using a different style of rectifying POE jack than the Olimex design has but I breadboarded an “interface” to remap the pins and tested this jack on the olimex board with successThe pictures in the post show the most recent ordered revision with the grounded trace however it was only one filter? capacitor lost for the power rail on the ethernet PHY chip.More notes:- Using low temp lead free solder paste- Hand placed components- Reflowed using T962 (modified) oven- All components reviewed under microscope and any issues repaired using rework station- I’ve been powering up the board using the programming header so 3.3v only. This shouldn’t be a problem considering the only 5v uses are external devices through the IO port which is not in use at the moment. The POE does work when plugging in an ethernet cable with POE on.Links:Olimex Board:https://www.olimex.com/Products/IoT/ESP32/ESP32-POE/open-source-hardwareOlimex Schematics:https://github.com/OLIMEX/ESP32-POE/raw/master/HARDWARE/ESP32-PoE-hardware-revision-C/ESP32-PoE_Rev_C_Color.pdfMy gerber files:https://drive.google.com/open?id=1gMgqzTtAZ7wnyaUZ_DDinuoLpiHPCpMyMy schematics:https://drive.google.com/open?id=1OJd6zbYkBCBy7uq8c__bVKlTIwECfEKWThank you in advance for the help, I have a feeling this is going to be a simple issue I am just looking past.Adam

author: ttt
author_rank: Regular Contributor
timestamp: October 07, 2019, 08:28:48 pm
content: Can you read from the PHY registers or do you have no communication at all with the chip? First thing I would check is the 50Mhz clock on XTAL1/CLKIN. If you don't have that nothing will work.If you have communication with the chip it's likely an issue with wiring on the magnetics side. Are you sure that TD+/TD-/TCT are on pins 4/5/6 of your RJ45 part? The Olimex schematic shows otherwise.Also, as a reminder: you don't need all these pull-down resistors, specifically the PYHADDRx pins. The 8710A has weak pull-downs for these internally. I am not sure why Olimex places resistors for these pins. In my case the chip runs fine without them. Check the 8710A datasheet, all the pull-downs are documented.

author: padagra
author_rank: Contributor
timestamp: October 08, 2019, 01:52:38 pm
content: Thank you for giving me a direction to go!The schematic symbol is not depictive of the actual internal wiring. I duplicated a different RJ-45 POE jack symbol and remapped the pins to the PCB symbol based off the datasheet. Also tested this remapping on a breadboard on the Olimex board with success - got POE and connection to the network.When I get home this evening I will check for clock signal first and work from there.Thank you again

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 08, 2019, 04:07:16 pm
content: May be you have to wait to power up the 8710a until *after* the 50MHz oscillator is up and running?Quotehttps://github.com/OLIMEX/ESP32-EVB/tree/master/HARDWARE

author: dmendesf
author_rank: Frequent Contributor
timestamp: October 08, 2019, 05:26:48 pm
content: Look for the wESP32. It's an esp32 + PoE that was crowdfunded. The developer had some problems with the PHY but managed to solve them and did a good documentation in the process.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 04:54:05 pm
content: Took me a few days to get back on this but here are my findings. I do have a clock signal, I also have a power transistor to control when the 8710A comes on. It appears that despite using the exact code example that successfully works on the Olimex board, I am still getting the the PHY_POWER coming on before the clock is alive.Olimex ESP32-POE example:https://github.com/OLIMEX/ESP32-POE/tree/master/SOFTWARE/ARDUINO/ESP32_PoE_Ethernet_ArduinoClock signal is yellow, PHY_POWER is blue on the screen shots.It appears that what the wESP-32 guy ran into is the same as my problem but I cannot seem to understand why the same code is working on the Olimex board but is not working on mine when this portion of the circuit is identical.In the meantime, I am going to see if I can modify the ethernet library to delay turning on the PHY_POWER output until the clock is alive.Clock signal:PHY_Power vs Clock Signal:Measured:

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 05:39:00 pm
content: I'd like to add that I see Patrick (wESP32 Developer) is using a microcontroller to delay the PHY_POWER line, but Olimex is able to do it using transistors which leads me to believe my current design can be made to work.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 07:04:47 pm
content: I would double check that all the pins are connected, that you're not using any of those pins somewhere else for any other thing, especially gpio0. Have you got a push button "boot" and a pullup? Is it connected to the usb-serial reset/boot circuit contraption too? Do you see a good 50MHz signal at gpio0?Just in case, these are the #defines of pins I use. BTW I think I've read somewhere that ETH_ADDR has to be 0 or 1 depending on something I don't remember.You haven't said what are the symptoms exactly... ?Are you using esp-idf or the arduino IDE?Code:#define ETH_CLOCK_IN_PIN 0#define ETH_MDIO_PIN 18#define ETH_TXD0_PIN 19#define ETH_TXEN_PIN 21#define ETH_TXD1_PIN 22#define ETH_MDC_PIN 23#define ETH_RXD0_PIN 25#define ETH_RXD1_PIN 26#define ETH_MODE2_PIN 27#define ETH_POWER_PIN -1#define ETH_ADDR 0#define ETH_TYPE ETH_PHY_LAN8720#define ETH_CLK_MODE ETH_CLOCK_GPIO0_INETH.begin(ETH_ADDR, ETH_POWER_PIN, ETH_MDC_PIN, ETH_MDIO_PIN, ETH_TYPE, ETH_CLK_MODE);Edit:Delete my gpio0 comments, I see you're using clock mode ETH_CLOCK_GPIO17_OUT.

author: artag
author_rank: Super Contributor
timestamp: October 13, 2019, 07:14:15 pm
content: Can you get a scope trace of the PHY power and clock as sequenced by the Olimex board ?I'm wondering if you've used a fragment of the Olimex code that controls the power but perhaps not some other fragment that initialises the pin. Maybe it floats up (or has a weak pullup) before the code runs that actively sets it high?I'd also be quite concerned about the amount of ripple on that power pin, but that's a different problem.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 07:34:10 pm
content: Quote from: artag on October 13, 2019, 07:14:15 pmThe ripple goes away when I remove channel one of my scope from the clock output. Not sure if that is due to cheap Rigol probes but reading the power pin alone on the oscilloscope gives a clean +3.3v reading the VDDIO (pin 12) on the 8710A.Yes I will capture the Olimex board and post it.Quote from: GeorgeOfTheJungle on October 13, 2019, 07:04:47 pmEDIT: I missed a couple of your questions. Yes I have a clean 50mhz clock on GPIO17. Yes I am using the Olimex designed USB programming for auto programming mode. I split it in half to save component cost by moving the USB to Serial chip off board, still works fine for programming.I have confirmed all the pins are connected, one by one with the board off via checking the traces for continuity.The code example I'm using only requires the clock signal and PHY_POWER pins to be set, if I need to move away from using the Arduino IDE I can - I had it setup already on my Mac, it was easier to use.I am using the Arduino IDE with the official Expressif boards added. Using the exact programming methods on the Olimex yields the correct results, it (Olimex) can connect to google.com on port 80, outputting a successful connection via serial. This leads me to believe I am still missing something on the hardware side.The symptoms:- It recognizes that there is an ethernet cable plugged in.- I can get an "ETH_CONNECTED" status via serial monitor when plugging into my router but it will not connect to google.com or other sites.- The "Link" and "Act" LEDs stay solid (seen in picture) but the router now recognizes there is a device plugged in. Also forgive the poor board design, I intentionally have the RJ45 port elevated as I missed some dimensions, had to clear the pull up resistors I placed too close to the jack.This is the exact code example I'm using provided by Olimex:https://github.com/OLIMEX/ESP32-POE/blob/master/SOFTWARE/ARDUINO/ESP32_PoE_Ethernet_Arduino/ESP32_PoE_Ethernet_Arduino.inoI'm going to recheck the magnetics for the RJ45 jack, I've done it once and breadboarded the connections to confirm it works (and did on the Olimex board) but I will check once more. Perhaps I missed a pin when updated the PCB library for the jack.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 08:00:44 pm
content: More odd behavior. Plugging the router into my POE injector, POE injector into the board, everything powers up but now the ACT light is flashing, LINK light is off. Router does not recognize anything is plugged into it with this configuration. See video:https://www.dropbox.com/s/1m79cp9bqz4duvt/3rLIZL0ESAqrgLJJIQapLg.MOV?dl=0

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 08:02:35 pm
content: You're not passing the config data to ETH.begin()... !https://github.com/OLIMEX/ESP32-POE/blob/master/SOFTWARE/ARDUINO/ESP32_PoE_Ethernet_Arduino/ESP32_PoE_Ethernet_Arduino.ino#L74Try this:Code:#define ETH_CLOCK_IN_PIN 0#define ETH_MDIO_PIN 18#define ETH_TXD0_PIN 19#define ETH_TXEN_PIN 21#define ETH_TXD1_PIN 22#define ETH_MDC_PIN 23#define ETH_RXD0_PIN 25#define ETH_RXD1_PIN 26#define ETH_MODE2_PIN 27#define ETH_POWER_PIN 12#define ETH_ADDR 0#define ETH_TYPE ETH_PHY_LAN8720#define ETH_CLK_MODE ETH_CLOCK_GPIO17_OUTETH.begin(ETH_ADDR, ETH_POWER_PIN, ETH_MDC_PIN, ETH_MDIO_PIN, ETH_TYPE, ETH_CLK_MODE);

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 08:04:38 pm
content: Quote from: artag on October 13, 2019, 07:14:15 pmShould look ~ like this:

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 08:13:18 pm
content: Quote from: GeorgeOfTheJungle on October 13, 2019, 08:02:35 pmNo success I also checked the pins against my schematic, all the GPIO pins in your above code match properly. The LINK and ACT lights are still solid.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 08:28:48 pm
content: Have you been messing with the MAC address? What does ETH.macAddress() say? Do you have a way to check if the router is getting a dhcp request from that MAC? Open the terminal in the Mac(intosh!) and type 'arp -a', do you see the esp32 MAC in the list?

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 08:35:45 pm
content: No I have not been messing with the MAC address.The serial monitor reads: 24:0A:C4:23:FC:27My router does not show any devices with this MAC address.EDIT:'arp -a' command lists MAC addresses but 24:0A:C4:23:FC:27 is not one of themThere appears to be an oddball in the list, all ff:Code:(192.168.1.255) at ff:ff:ff:ff:ff:ff on en0 ifscope

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 09:21:27 pm
content: If it detects link it is receiving ~ ok. You need to check if it's sending anything, so, do you see signals in TXP and TXN? Pins 1 and 2 of the rj45:Edit:Pin 3 ought to be a DC halfway of the peaks of those, that is around 3V.Edit 2:You should be seeing that as soon as it detects link. When it is sending (or trying to send) you should be seeing positive going pulses of 5µs or more atpin 21gpio 21 of the esp32.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 09:47:03 pm
content: I really appreciate your time helping with this, this has been a cause of frustration for quite some time.Capture traces of pin 1 and 2 of the RJ45 which does not look like yours:Nothing in my PCB schematic is hooked up to pin 21 of the ESP32. GPIO 21 shows the following (also does not look like yours):

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 10:06:04 pm
content: Yes I meant gpio21 (pin 33) sorry. There's a problem with that signal (TXEN). You should be seeing beautiful positive pulses there every time it wants to send something (other than link). Maybe you've got a short there? Check it at both ends, at the esp32 (pin33) and at the 8710 (pin 21) IIANM :-)

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 10:08:05 pm
content: So..I have no clue what I did but suddenly I have connectivity - getting a 301 reply from google.com on port 80. Oddly though the LINK light is not lit up anymore but ACT is (see video on dropbox link below). I'm afraid to power cycle the board because I don't want to lose this state if anyone has recommendations for things to check while it is connected.Also I can now see the proper MAC address is connected both on my router and in terminal:Video of behavior:https://www.dropbox.com/s/knfvscbpklvv250/EE4kEkC9Sx2VX6FxcyjLQQ.MOV?dl=0

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 10:13:57 pm
content: I bet there's a short in TXEN... look carefully at the scope picture you've sent! Looks very much as if the poor esp32 is trying hard to pull it high. Look at it again but this time put the scope in 5 or 10µs/div.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 10:19:18 pm
content: Not seeing a short on the traces relating to TXEN but the 8710A is getting very hot despite still holding a connection which would indicate a short. I'm drawing 350ma at 3.3v.My trace path is very direct from the esp32 to pin 21 for TXEN.I will keep searching for a short.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 10:22:27 pm
content: I must insist... TXEN has a problem!

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 10:24:22 pm
content: I will dive into it immediately!Update: I power cycled the board, at first no connection Plugging and unplugging the ethernet cable ~5 times gets it to reconnect and receive from google.com drawing the same amount of current heating up the 8710a. I am going to unplug the test setup and get it under the microscope now.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 10:27:55 pm
content: Edit:And remember this:https://github.com/espressif/arduino-esp32/blob/1c77790a5b5c911718e8dcdd4087339f2acedfdf/libraries/WiFi/src/ETH.cpp#L59This is what it uses as defaults when you call ETH.begin():https://github.com/espressif/arduino-esp32/blob/1c77790a5b5c911718e8dcdd4087339f2acedfdf/libraries/WiFi/src/ETH.h#L63

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 13, 2019, 10:46:03 pm
content: Quote from: padagra on October 13, 2019, 08:35:45 pmThat's a good MAC. This is interesting:Quote(http://www.experts123.com/q/what-is-the-format-of-a-valid-mac-address.html)QuoteThat's ok.

author: padagra
author_rank: Contributor
timestamp: October 13, 2019, 11:53:59 pm
content: Good to know. I just had some dinner but in the meantime while I'm getting captures under the microscope, this is the code I am using per your recommendations. Still using Arduino IDE:Code:#define ETH_CLOCK_IN_PIN 0#define ETH_MDIO_PIN 18#define ETH_TXD0_PIN 19#define ETH_TXEN_PIN 21#define ETH_TXD1_PIN 22#define ETH_MDC_PIN 23#define ETH_RXD0_PIN 25#define ETH_RXD1_PIN 26#define ETH_MODE2_PIN 27#define ETH_POWER_PIN 12#define ETH_ADDR 0#define ETH_TYPE ETH_PHY_LAN8720#define ETH_CLK_MODE ETH_CLOCK_GPIO17_OUT<ETH.h>static bool eth_connected = false;void WiFiEvent(WiFiEvent_t event){switch (event) {case SYSTEM_EVENT_ETH_START:Serial.println("ETH Started");//set eth hostname hereETH.setHostname("esp32-ethernet");break;case SYSTEM_EVENT_ETH_CONNECTED:Serial.println("ETH Connected (SYSTEM_EVENT_ETH_CONNECTED)");break;case SYSTEM_EVENT_ETH_GOT_IP:Serial.print("ETH MAC: ");Serial.print(ETH.macAddress());Serial.print(", IPv4: ");Serial.print(ETH.localIP());if (ETH.fullDuplex()) {Serial.print(", FULL_DUPLEX");}Serial.print(", ");Serial.print(ETH.linkSpeed());Serial.println("Mbps");eth_connected = true;break;case SYSTEM_EVENT_ETH_DISCONNECTED:Serial.println("ETH Disconnected");eth_connected = false;break;case SYSTEM_EVENT_ETH_STOP:Serial.println("ETH Stopped");eth_connected = false;break;default:break;}}void testClient(const char * host, uint16_t port){Serial.print("\nconnecting to ");Serial.println(host);WiFiClient client;if (!client.connect(host, port)) {Serial.println("connection failed");return;}client.printf("GET / HTTP/1.1\r\nHost: %s\r\n\r\n", host);while (client.connected() && !client.available());while (client.available()) {Serial.write(client.read());}Serial.println("closing connection\n");client.stop();}void setup(){Serial.begin(115200);WiFi.onEvent(WiFiEvent);ETH.begin(ETH_ADDR, ETH_POWER_PIN, ETH_MDC_PIN, ETH_MDIO_PIN, ETH_TYPE, ETH_CLK_MODE);}void loop(){if (eth_connected) {Serial.print("I am connected");testClient("https://www.google.com", 80);}delay(5000);}Need to see how I can export the microscope images now...

author: padagra
author_rank: Contributor
timestamp: October 14, 2019, 12:15:53 am
content: Okay, I don't see any issues with the PCB manufacturing or shorts that immediately stand out. I merged some of the images from the microscope, see below:

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 17, 2019, 11:10:31 am
content: I have rewired my PHY to work in ETH_CLOCK_GPIO17_OUT mode, and it works sometimes yes sometimes no. Did you find the culprit?

author: padagra
author_rank: Contributor
timestamp: October 17, 2019, 06:09:58 pm
content: No I have not found the culprit but that's also my experience with it working on and off. It's still concerning that when it does get a connection the 8710a chip starts heating up, perhaps its due to manual assembly with hobbiest grade tools?All that aside, I have been in more communication with the wESP32 developer, Patrick. He gave a few suggestions that I am going to try tonight, I may make a couple PCB design changes and re-order a batch of boards to test everyone's concerns that is involved in helping diagnose this odd issue.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 17, 2019, 08:50:47 pm
content: I've bought one of thesehttps://es.aliexpress.com/item/32947407343.htmlto tinker with the ETH_CLOCK_GPIO17_OUT mode. It works always fine in ETH_CLOCK_GPIO0_IN mode, but not when rewired and reconfigured for ETH_CLOCK_GPIO17_OUT. None of them get even warm (the other is an olimex EVB), much less hot. One thing I noticed is the amplitude of the 50MHz clock is much more than the scope was showing, because I had the 20MHz low pass filter active in that channel. It's almost 6 volts peak to peak IIRC, I don't know if that may have something to do with these faults, maybe?Edit:This is the schematic of that board:

author: padagra
author_rank: Contributor
timestamp: October 17, 2019, 10:33:43 pm
content: Did you buy this to help me?? Either way you're a God send. I just bought one but on Amazon prime so I can start testing immediately, it will be here tomorrow.That is also interesting about the 50mhz clock not being high enough voltage peak to peak, I'll re-check the clock signal and see if it it matches the spec you described.

author: ttt
author_rank: Regular Contributor
timestamp: October 18, 2019, 12:42:26 am
content: Did the wESP32 developer already tell you that you need to drive NRST properly? Simply pulling it high permanently will not work and the Olimex hack with a cap does not work for a warm reset. I've been running into this issue myself in the last few days, to where the LAN8710A resets continuously.I assume you don't care about using an extra pin, so you can make sure to drive NRST properly:1. Pull NRST low2. Wait for the 50mhz clock to come up (it might be already up)3. Wait for a small period (100us worked in my case)4. Pull NRST highFor me this makes the LAN8710a run rock solid and more importantly it can handle warm resets/debugging sessions. My code:https://github.com/tinic/lightguy/blob/master/ethernetif.cpp#L73Code is for an STM32F107 clone, not the ESP32, so not really useful for you :-)

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 18, 2019, 09:51:43 am
content: The datasheet says:QuoteThere's no way to do that when the clock source is ETH_CLOCK_GPIO17_OUT, because there's no clock until after the call to ETH.begin(), which is a long time after /reset.Edit:But nRST is driven by +3.3VLAN no by the esp's /reset, so yes, if in the call to ETH.begin() the driver 1) drives ETH_POWER_PIN/PHY_PWR low to turn off +3.3VLAN then 2) enables 50MHz on ETH_CLOCK_GPIO17_OUT before 3) turning +3.3VLAN on again (ETH_POWER_PIN high) it would have the clock running before the reset, as it should.

author: padagra
author_rank: Contributor
timestamp: October 18, 2019, 12:23:30 pm
content: Quote from: GeorgeOfTheJungle on October 18, 2019, 09:51:43 amSee this was my understanding as well and why I would think that the current circuit in handshouldbe capable of working. If the 8710a absolutely will not work unless the 50mhz clock is live before reset/power cycle (which we know to be true) then I wonder how I will occasionally (1/6 times) get a healthy connection via ethernet in the current circuit design. Granted, the chip shouldn't get hot which is another issue I have not found.Quote from: ttt on October 18, 2019, 12:42:26 amYes and no. His suggestion right now is to bypass the 3.3VLAN transistors with a jumper wire directly to GPIO12 PHY POWER then probe out. He also has stated that he went down this same road basing his work off the Olimex board and had similar issues. This ultimately led him to re-do this portion of the circuit from scratch which is the design he now uses in the production version. He uses an ancillary microcontroller (PMS150C-559) to directly control the timing of the PHY reset and clock signal whereas Olimex does this all through the ESP-32.Quote from: ttt on October 18, 2019, 12:42:26 amYou are correct, I have GPIO I can spare on the ESP32. This sounds like the next step. Assuming the firmware timing is correct, I could just use the ESP32 to pull NRST low, start 50mhz clock, wait, pull NRST high. Fortunately, the board GeorgeOfTheJungle posted above should help with this as I will be able to revise faster. It will be here today.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 18, 2019, 03:51:47 pm
content: Quote from: padagra on October 18, 2019, 12:23:30 pmLooking at the source code, unfortunately it seems that it enables the clockafterturning on the 8710:https://github.com/espressif/esp-idf/blob/release/v3.2/components/ethernet/emac_main.c#L1112-L1145Code:emac_config.emac_phy_power_enable(true);//before set emac reg must enable clkperiph_module_enable(PERIPH_EMAC_MODULE);if (emac_config.clock_mode != ETH_CLOCK_GPIO0_IN) {// 50 MHz = 40MHz * (6 + 4) / (2 * (2 + 2) = 400MHz / 8rtc_clk_apll_enable(1, 0, 0, 6, 2);REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_H_DIV_NUM, 0);REG_SET_FIELD(EMAC_EX_CLKOUT_CONF_REG, EMAC_EX_CLK_OUT_DIV_NUM, 0);if (emac_config.clock_mode == ETH_CLOCK_GPIO16_OUT) {PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO16_U, FUNC_GPIO16_EMAC_CLK_OUT);ESP_LOGD(TAG, "EMAC 50MHz clock output on GPIO16");} else if (emac_config.clock_mode == ETH_CLOCK_GPIO17_OUT) {PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO17_U,FUNC_GPIO17_EMAC_CLK_OUT_180);ESP_LOGD(TAG, "EMAC 50MHz inverted clock output on GPIO17");}}emac_enable_clk(true);This is _eth_phy_power_enable(bool enable):https://github.com/espressif/arduino-esp32/blob/master/libraries/WiFi/src/ETH.cpp#L45-L50Code:static void _eth_phy_power_enable(bool enable){pinMode(_eth_phy_power_pin, OUTPUT);digitalWrite(_eth_phy_power_pin, enable);delay(1);}That's a race condition there, will the clock be up and running in time or not? It depends on 1)how long does it take for the clock to start up and 2)how long does the nRST pulse last. To make thing worse there's that delay(1) in _eth_phy_power_enable(). When the clock comes from the esp32, the call to power up the 8710A should be after the call to emac_enable_clk(), me thinks!The esp-idf part comes precompiled in the Arduino IDE esp32 boards package, so unless we move to platformio or esp-idf, there's not much we can do there, but... we can remove the delay(1) and hope that it helps, because that's not precompiled. It's in:~/Library/Arduino15/packages/esp32/hardware/esp32/1.0.4/libraries/WiFi/src/ETH.cppLet's try that...

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 18, 2019, 04:26:17 pm
content: To be completely sure that the 8710 always gets the /reset it needs, put this (to turn it off) before the ETH.begin(..), because the /reset at nRST only happens when going from no-power to power, not if going from powered-on to powered-on:Code:pinMode(ETH_POWER_PIN, INPUT);digitalWrite(ETH_POWER_PIN, 0);pinMode(ETH_POWER_PIN, OUTPUT);delay(99);ETH.begin(..);Hey, I'm playing with these changes in place (remove the delay(1) + that above), and it seems to werk !!!Edit:I was going to put a scope probe in nRST, but this cheap board has no reset circuitry whatsoever! nRST has its internal pullup, and that's it. Oh, well. This is the sequence of events, blue is the clock, pink is VCC/power input to the LAN8720 board.Perhaps a /reset is not needed after all?Edit 2:It isn't exactly 100BASE-T, more like 17BASE-T, but that's about 2x faster than its WiFi:

author: padagra
author_rank: Contributor
timestamp: October 19, 2019, 02:39:45 pm
content: Quote from: GeorgeOfTheJungle on October 18, 2019, 03:51:47 pmOkay, got that removed.Quote from: GeorgeOfTheJungle on October 18, 2019, 04:26:17 pmGot this added as well. ^Anticlimactically, there are no changes on my manufactured board. I got a few pictures of the results and a video showing how cycling the ethernet plugged/unplugged 6 times will get it to connect, the link light stays off, then you can see it heating up (degrees are in fahrenheit) on the meter.Video of behavior, it might be hard to see but the green LED is LINK, yellow is ACT - you can see once it gets a connection because the LINK led stops light up and ACT starts flashing:https://www.dropbox.com/s/cijq2uw3j1hg3go/IMG_3256.mov?dl=0Peak temp with connection the 8710a reached:Recycled power, lost connection, chip starts to cool back down slowly:The next move is breadboard now that I have the 8720 dev board in hand it was wishful thinking that making some code revisions may resolve this on my manufactured board but at least it is more data. I have an old NodeMCU ESP32 dev board as well I am going to duplicate your (@GeorgeOfTheJungle) setup on and see if I will get the same results. Tune in next time...Edit 1:I'm getting ripple on PHY_POWER (GPIO12) only when the second oscilloscope probe is probing the 50mhz clock on GPIO17. It is making it difficult to catch the timing on the scope, almost like the probes are interfering with one another through EMI.Edit 2:Clean 50mhz clock off GPIO17. Peak to peak I had as high as 5.36vRipple shown when both probes are connected for PHY_POWER GPIO12 (Blue)Ripple on PHY_POWER GPIO12 gone when the clock signal probe removed from the boardEdit 3:So finally some good news, still not resolved but good news. If you ignore the ripple I assume is EMI from these scope probes on the blue trace, the timing appears to be accurate. Blue is 3.3VLAN. The clock is up before the 8710a gets power.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 19, 2019, 07:51:42 pm
content: The things that can draw more power are the drivers of TXP (LAN8710 pin29) and TXN (LAN8710 pin28), pins 1 and 2 of the RJ45. Check these, and check that the 50 Ohms resistors to VDD1A are in fact 50 Ohms. Are you still seeing the TXEN (LAN8710 pin21) pulses flat? Are you sure it's not shorted to anything? If that's still flat it's a signal that something is wrong there. May be the 8710 itself? I would also try an ethernet cable with only 2 pairs, 1,2 and 3,6, just to be sure that the POE thing is out of the equation for the moment.

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 05:00:36 pm
content: Quote from: GeorgeOfTheJungle on October 19, 2019, 07:51:42 pmNone of the tests from the beginning of this thread have been with POE. POE works fine but I have been powering up with 3.3v only through the programming header with the bench power supply since it gives me more accurate readings on current draw.Quote from: GeorgeOfTheJungle on October 19, 2019, 07:51:42 pmChecked and still not seeing any shorts. I changed them (resistors) out with new as well, they are 51ohm as its the closest value I have on hand at the moment. Additionally I took a new unpopulated PCB and rechecked for continuity where it shouldn't be, no shorts.Quote from: GeorgeOfTheJungle on October 19, 2019, 07:51:42 pmSwapped this out with a new one, did not have good pad connections probably for lack of solder paste. I put the old one back, got pad connections again and back to the same results. This leads into some theories below, I'm wondering if there's some bad PCB manufacturing issues contributing.Quote from: GeorgeOfTheJungle on October 19, 2019, 07:51:42 pmNo! Kind of. I am consistently still getting a connection to the web if I plug and unplug the ethernet cable 6 times. 6 times exactly, every single time. Knowing this, the scope shots here are on the 6th connection. The pulses look healthy to mewhenthere is a connection to the web.First set of packets:Zoomed in on first pulse of first set of packets:Second set of packets:I'm beginning to wonder if the trace connections to the 8710a are causing problems. If you look within the orange boxes, it looks like their pad layout is shifted in the manufacturing from the PCB traces. Its all speculation at this point but possible the heating up is from degraded trace width and current capacity??I have a bunch of microscope shots of a new, unpopulated board I am working on merging together in photoshop so you can see what I am working with, I will post an edit when it is completed.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 20, 2019, 05:37:36 pm
content: How do you solder the GND pad below the 8710A without solder paste? If that's not good the chip may seem to work, and do weird things. I've put a MOSFET to switch on/off the cheap 8720A board with gpio 12, and it always recovers well after an on/off/on, it always works fine.Edit:The power consumption I have is 250mA @ 5V => 1.25W, with STA on, AP off, and ETH on, hammering it from the Mac with an ab (apache bench).

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 05:39:13 pm
content: No I don't mean I have not used solder paste, I mean when I tried swapping the 8710 out for a new one there wasn't enough residual solder left for a good connection.Edit 1:My microscope doesn't zoom out any further, I stitched these images together of the PHY portion of the board. It is a large image.https://www.dropbox.com/s/s6ug8cbd4bq5rx5/Microscope-Merge.jpg?dl=0By C15 there is a short with a GND via. I cut that trace out before this thread started so that C15 is lost but there is no short.Edit 2:I am drawing 1.332w when the ethernet cable is plugged in and .592w when the ethernet cable is disconnected and board is idle.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 20, 2019, 07:31:43 pm
content: Why are there vias in RXER/RXD4/PHYAD0 pin 13,TXEN pin 21, TXD0 and TXD1 (pins 22 and 23). Where do they go?Edit:Not in TXEN.Edit the edit: Ohh yeah, there's another mysterious via in TXEN too:Quote from: padagra on October 20, 2019, 05:00:36 pmLooks ok-ish to me :-) Maybe the GND pad is a bit larger than needed?Quote from: padagra on October 20, 2019, 05:39:13 pmIn your schematics that's the "Digital Core Supply Voltage (VDDCR)" 1.2V, I think you should put it back!Edit #n:I've put this in my loop() to turn on/off the 8710:Code:String command= "";void loop () {...while (Serial.available()) {int c= Serial.read();Serial.write(c);if ((c == '\r') || (c == '\n')) {if (command.length()) {if (command == "flipit") {Serial.print("\r\nok\r\n");digitalWrite(ETH_POWER_PIN, !digitalRead(ETH_POWER_PIN));}else Serial.print("\r\nWatt?\r\n");}command= "";}else command+= (char) c;}}

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 09:33:12 pm
content: Quote from: GeorgeOfTheJungle on October 20, 2019, 07:31:43 pmPin 21, 22, 23 were mistakes to be honest. I had them in there originally thinking I would have to route on the bottom side, didn't, then forgot to pull them out.Since starting this project I've learned I need to use a more professional EDA like Eagle but this board was made with EasyEDA. I am able to share the project link for you to view, I probably should have done this sooner. This version is the version I have printed, I have a new project version I have made updates to as I find problems but I have not had that physically manufactured yet I was waiting until resolving this PHY stuff.https://easyeda.com/editor#id=|2f085ee40f21457f85b840427e71eabe|135d6a3fc5f34003961d1a78c100773cQuote from: GeorgeOfTheJungle on October 20, 2019, 07:31:43 pmIf you look closely at this picture of the populated board, the pad seems to be shifted. Whereas the stitched together picture of the unpopulated board appears to be correct.Quote from: GeorgeOfTheJungle on October 20, 2019, 07:31:43 pmI will bodge in a 2.2uf or higher cap for VDDCR. I did not have intentions of permanently leaving it out, but couldn't leave that trace connected for this testing. In hindsight, I should have bodged one in sooner... you live and learn. I hope this hasn't been the cause or an additional cause of the mysterious problems.Edit 1:Wait.. its not C15 that I lost, its C1 on VDD1A.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 20, 2019, 09:49:35 pm
content: Quote from: padagra on October 20, 2019, 09:33:12 pmWhat a wonderful thing is EasyEDA. I love it.QuoteFingers crossed!! :-)

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 10:11:24 pm
content: Note: VDDCR per the datasheet should be at +1.2v, my oscilloscope shows it at +2.0v.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 20, 2019, 10:19:20 pm
content: Quote from: padagra on October 20, 2019, 10:11:24 pmVDDCR comes from VDD1A/VDD2A thru an LDO. The pin LED1 enables/disables the LDO. What does your esp_get_idf_version() say?

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 10:41:20 pm
content: Another screen shot of the serial monitor:I'm at a loss here, I hope you see something on EasyEDA that I'm not because on paper, this schematic, should be working.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 20, 2019, 10:51:40 pm
content: Have you put back the capacitor in VDD1A/VDD2A? What happens if you flip it on and off in the serial monitor (with the code I've posted)?

author: padagra
author_rank: Contributor
timestamp: October 20, 2019, 11:08:32 pm
content: Yes I put a bodge wire in there.Yes I added your while statement. The first "flipit" turned it off, second "flipit" back on. Same thing though, shows "ETH Connected" recognizing an ethernet cable is plugged in but won't actually get a connection to the web or router.Edit:Quote from: GeorgeOfTheJungle on October 20, 2019, 10:19:20 pmCode:18:35:19.053 -> ETH Connected (SYSTEM_EVENT_ETH_CONNECTED)18:35:19.053 -> ETH MAC: 24:0A:C4:23:FC:27, IPv4: 192.168.1.86, FULL_DUPLEX, 10Mbps18:35:19.053 -> v3.2-18-g977854975

author: ttt
author_rank: Regular Contributor
timestamp: October 21, 2019, 03:49:48 am
content: Two things I notice in your schematic and photos, which might or might not be related:1. Your 0.1uF decoupling caps are IMO pretty far from the LAN8710A. I would try to get them closer to avoid interference issues.2. Any reason you replaced the 1uF and 470pF decoupling caps on VDDCR with a single 2.2uF one? The spec sheet calls these values out which makes me think these two are tuned for something specific internally?Temperature wise my LAN8720A gets up to 42C with an active 100BaseT connection. Heat dissipation should be around 250mW with a 3.3V supply and 100BaseT connection. With a 1.8V supply that would go down to 180mW.Attached the layout I use personally

author: padagra
author_rank: Contributor
timestamp: October 21, 2019, 12:11:55 pm
content: Quote from: ttt on October 21, 2019, 03:49:48 am1. Next revision I will get them closer, thank you for the tip2. On VDDCR I have two caps - a 100nf and 2.2uf still in the circuit. I did not directly choose 2.2uf, it was only due to copying the olimex design. I can dig through my SMD caps this evening and see if I have a 470pf to try in place of the 2.2uf.Edit:What are the sizes of your trace widths, via diameter, and via drill diameter in relation to the 8720 on your board?

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 21, 2019, 10:59:38 pm
content: Mine says IDF-VERSION: v3.2.3-14-gd3e562907. Any news?

author: padagra
author_rank: Contributor
timestamp: October 22, 2019, 01:45:14 pm
content: No news, I sent you a PM

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 22, 2019, 05:14:56 pm
content: Hi! Don't despair!I think I've found something: if I remove the 33 Ohms resistor that goes from esp32/gpio17 to 8710A/CLIKIN, my board behaves like yours. Put a 33 Ohms resistor there, in the 50MHz clock, don't feed it directly into CLKIN.

author: padagra
author_rank: Contributor
timestamp: October 22, 2019, 10:57:38 pm
content: @GeorgeOfTheJungle!!!!We are narrowing it down!! I scraped away from solder mask in the ~size of a 0603 pad. Broke the trace and reflowed a 33ohm resistor in series with the clock signal. No magical eureka moment sadly.HOWEVER.First, I removed the old 8710a chip. Added solder paste and put a new 8710a chip on. Cleaned up all the trace connections under the microscope to make sure there were no pad shorts.Second, started probing the circuit again checking every connection looking for the right voltage level. That's when I probed R15 (while ethernet cable was plugged in) and noticed that probing it caused the link/act LEDs to change patterns:- I probed it more and every time I would put pressure on it, the pattern kept changing in how the LEDs were flashing or lighting up. (Link would turn on, turn off, act would turn on, off, flash, etc).- I pulled out a new 10k resistor and reflowed it. Plugged the board in right after reflowing? IMMEDIATE connection to ethernet.- I plugged and unplugged the ethernet cable a bunch of times and got a connection every single time.- Power cycled the board- No connection to ethernet. It is now reacting the same as before where I have to plug and unplug ethernet 6 times to get a connection but the LINK LED is off.- So while the board was powered up and plugged into ethernet, I heated up resistor 15 again with my reflow station. I just ever so slightly nudged R15 and guess what? Immediate connection to the web.- I have tested this now 9 times and every time I get the same results. If I power cycle the board, no connection, heat up R15, nudge it, immediate connection.Conveniently R15 is the pull up resistor for the nRST pin on the 8710a. This has to be where the problem lies. I don't know the answer. Maybe after all this there is an issue powering up the board after clock signal and not triggering the reset on the 8710a?? But then again you have duplicated this layout and have not had issues.All I know is we have narrowed it down to a pattern and it is related to the nRST pin SOMEHOW.I hope this feeds you or someone else info and it makes sense...(By the way we are now 19 days into this almost working on it daily. The finish line is so close)Edit:- Heating up the new LAN8710a will trigger a connection consistently.Edit 2:- Another note. Even when it doesn't connect to the web, it will 100% of the time recognize that an ethernet cable has been plugged in via the serial monitor. So the PHY chip is acknowledging that an ethernet cable is there even though it won't connect to the internet- Another-nother note: Many times when it will acknowledge that the ethernet cable has been plugged in, LINK will stay solid and ACT will be flashing giving the appearance it is connected even though it doesn't actually have a connection to the web.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 23, 2019, 08:30:06 am
content: In the cheap amazon 8720 board nRST is floating, not connected, NC. You could try to leave it unconnected too because it's got an internal pullup and you can always reset (power cycle) the 8710A with the flipit cmd. If I were you I would try that next. Mine's been working flawlessly in this fashion.You don't say what did you see with the scope in nRST? Have you checked the levels and the pulse shape you've got there? Every time you flip it with flipit from off to on you should get another /reset pulse, just leave the scope's probe there and see.I've been (painfully) looking with the scope decoder into each and every of the commands it sends to the 8710 via the MDC/MDIO channel, and the sequences it sends are different after a cold boot (power cycle of the whole thing) than after a /reset (this esp32 board has a /reset button) or after a soft reset via esp_restart(); which is interesting. The idea was to see if there's something that's being left uninitialized sometimes.We'll find out!

author: padagra
author_rank: Contributor
timestamp: October 23, 2019, 11:50:49 am
content: I didn't catch that on the scope but can get it after work. I saw your message before leaving for work and tried removing R15. It didn't change the symptoms at all.I have a 4 channel scope, if there are particular pins you want me to capture on hard reset and soft reset let me know and I will catch whatever is necessary.I'm still wondering if manual assembly is causing this and it just cannot be seen under the microscope.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 08:37:21 am
content: Maybe. But I've made another one, also hand made^W botched, and also works flawlessly, why won't yours?If this works yours must too, I'm sure!I've been peeking at the 8710 registers and the chitchat with the esp, and I've found no way to trick it out, by touching/resetting values in the 8710 registers (*), of that silly non-working mode it sometimes goes into, in which it detects link but won't connect. Let me explain a bit better: this 8720 board has no /reset, and it works wonderfully always after a power cycle but not (not always, just sometimes) after a /reset of the esp32 with the button (without a power cycle) or a reboot via esp_restart(). When it goes into silly mode, it detects link (I know it does because I've been monitoring the registers) but won't connect (the ETH Connect -> ETH disconnect event messages you see in a loop). The only solution I've found to that is to power cycle the 8720, so I've put a mosfet (which yours has already) that cuts (high side) VCC in setup() for 200 ms, and since then it always works fine no matter what, a power cycle, a /reset or an esp_restart().At least these 8720s (yours is an 8710) don't seem to require a /reset at nRST after a power cycle.(*) If you want to peek/poke the 8710 registers you can use esp_eth_smi_read() and esp_eth_smi_write() :Code:#include <esp_eth.h>//disable auto negotiationesp_eth_smi_write(0, bin2u16("000 0 0000 0000 0000"));//reset the 8710esp_eth_smi_write(0, bin2u16("1 000 0000 0000 0000"));//read r31Serial.print(" r31:");Serial.print(esp_eth_smi_read(31), HEX);//this is to let me pass a string representation of the bits, much more convenient.//Accepts bit groups separated with spaces, no problem.uint16_t bin2u16 (const char* s) {uint16_t r= 0;uint16_t peso= 1;int len= strlen(s);while (len--) {char c= s;if (c == ' ') continue;if (c == '1') r+= peso;peso*= 2;}return r;}

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 08:56:41 am
content: So maybe lets try this: put this in setup(), just before the call to ETH.begin(..):Code:pinMode(ETH_POWER_PIN, OUTPUT);//whatever you need (1 or 0, I don't know) to turn it OFF:digitalWrite(ETH_POWER_PIN, 0 or 1);//let's give it plenty of timedelay(500);//This will turn it on againETH.begin(..);You can also try to turn it on yourself again before the call to ETH.begin(), because we don't know how long does the nRST /reset pulse last:Code:pinMode(ETH_POWER_PIN, OUTPUT);//whatever you need (1 or 0, I don't know) to turn it OFF:digitalWrite(ETH_POWER_PIN, 0 or 1);//let's give it plenty of timedelay(500);//Turn it on again//whatever you need (1 or 0, I don't know) to turn it ON:digitalWrite(ETH_POWER_PIN, 0 or 1);//Experiment with this delay length, may be needed or maybe not, IDK.delay(15);//This will try to turn it on again but it'll be a NOP because it was ON already.ETH.begin(..);

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 11:03:25 am
content: But if you've left nRST floating there's no need to turn it on before the call to ETH.begin(). Perhaps a pullup to 3.3V is needed at nRST in the 8710, the 8720 has an internal one.

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 12:04:31 pm
content: All this just makes me believe there is something in the PCB that is wrong. Whether it is manufacturing issue, hand assembly issues, or just bad PCB design on my part.That said, I'll get your breadboarded design duplicated. Might take me a couple nights, I will update as soon as possible.As always, thank you for your persistence on this!!

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 12:41:24 pm
content: Padagraaaa !!! Wait! One more thing...Do you know that story about the first time the ARM inventors powered up the first ever ARM chip in the history of mankind, and it worked fine even though I was NOT connected to VCC? Well, this is what may be happening here!We're not powering down the chip completely... because the other pins it's connected to are feeding it with power. So, please, try this first. We have to put all the other pins the 8710 is connected to as input/pulldown to be sure it's completely off, like this:Code://this goes in setup ()://apagar todos los pines que conectan al 8720//para que no se cuelen los voltios x ahí.pinMode(ETH_MDIO_PIN, INPUT_PULLDOWN);pinMode(ETH_MDC_PIN, INPUT_PULLDOWN);pinMode(ETH_TXD0_PIN, INPUT_PULLDOWN);pinMode(ETH_TXEN_PIN, INPUT_PULLDOWN);pinMode(ETH_TXD1_PIN, INPUT_PULLDOWN);pinMode(ETH_RXD0_PIN, INPUT_PULLDOWN);pinMode(ETH_RXD1_PIN, INPUT_PULLDOWN);pinMode(ETH_MODE2_PIN, INPUT_PULLDOWN);pinMode(17, INPUT_PULLDOWN);pinMode(ETH_POWER_PIN, OUTPUT);//whatever you need (1 or 0, I don't know) to turn it OFF:digitalWrite(ETH_POWER_PIN, 0/1? );//let's give it plenty of time to shut downdelay(500);//This will turn it on againETH.begin(..);Please try this first.

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 01:00:37 pm
content: Now I want to leave work early to go try this at my house. This will be the first thing I try when I get home! Should be about 4pm CST when I'll have an answer.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 02:27:18 pm
content: But I forgot that we've got to put MODE0..MODE2 to INPUT-PULLUP before turning it on again, because these are strap pins that configure the initial state of the 8710 on startup. So wait a sec...

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 04:35:50 pm
content: Here it is:https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0eeFingers crossed !

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 04:47:20 pm
content: Feel like moving to the states so we can hire you? Haha. Not sure what timezone you're in but I will be able to test this out in about 5 hours.

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 09:38:36 pm
content: Ran your modified code, same behavior after using the "reboot" command. It recognizes that ethernet is connected but does not connect to the web. I also cannot see it as a MAC address using the "arp -a" command.I went ahead and ran a register dump:Code:16:25:50.861 -> Oct 24 2019 16:22:4616:25:50.898 -> IDF-VERSION: v3.2-18-g97785497516:25:50.898 -> ESP. getSketchSize(): 65881616:25:50.898 -> ESP.getFreeSketchSpace(): 131072016:25:50.898 -> STA MAC Address: 24 0a c4 23 fc 2416:25:50.898 -> AP MAC Address: 24 0a c4 23 fc 2516:25:50.898 -> BT MAC Address: 24 0a c4 23 fc 2616:25:50.898 -> ETH MAC Address: 24 0a c4 23 fc 2716:25:50.898 ->16:25:50.898 -> Hi! We're in the loop()16:25:51.427 ->16:25:51.427 -> [Event #1] 20: ETH started16:25:55.446 -> [Event #2] 22: ETH connected16:26:20.534 -> dr r0:3100 r1:782D r2:7 r3:C0F1 r4:DE1 r5:CDE1 r6:B r16:40 r17:2 r18:60E0 r26:0 r27:A r28:0 r29:C8 r30:0 r31:105816:26:20.567 -> okI am still working with it and online, I wanted to get you an update on the register dump for now.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 09:55:20 pm
content: Hi!My arduino boards package is 1.0.4, IDF-VERSION: v3.2.3-14-gd3e562907, can you upgrade that, just in case? There have been a few commits that are ethernet/bugfix after that...QuoteQuoteAnd more...

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 10:01:18 pm
content: Updated, and added my testClient function back in.Code:17:00:45.491 -> Oct 24 2019 16:59:3917:00:45.491 -> IDF-VERSION: v3.2.3-14-gd3e56290717:00:45.491 -> ESP. getSketchSize(): 66384017:00:45.491 -> ESP.getFreeSketchSpace(): 131072017:00:45.491 -> STA MAC Address: 24 0a c4 23 fc 2417:00:45.491 -> AP MAC Address: 24 0a c4 23 fc 2517:00:45.491 -> BT MAC Address: 24 0a c4 23 fc 2617:00:45.491 -> ETH MAC Address: 24 0a c4 23 fc 2717:00:45.491 ->17:00:45.491 -> Hi! We're in the loop()17:00:46.054 ->17:00:46.054 ->17:00:46.054 -> connecting to google.com17:00:46.054 -> connection failed17:00:46.054 -> [Event #1] 21: ETH started17:00:48.022 ->17:00:48.022 -> connecting to google.com17:00:48.056 -> connection failed17:00:50.043 ->17:00:50.043 -> connecting to google.com17:00:50.043 -> connection failed17:00:50.043 -> [Event #2] 23: ETH connected17:00:52.051 ->17:00:52.051 -> connecting to google.com17:00:52.051 -> connection failed17:00:54.055 ->Edit 1:Also same behavior, if I plug and unplug the ethernet 6 times (with your code base) it will get a connection and is recognizable on my network.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 10:15:20 pm
content: LOL. WTF is it? GRRRR!Edit 1:You can turn it on and off with ethon and ethoff. When it goes from off to on there's a reset pulse in nRST. Can you capture that with the scope and let me see it? But not necessarily now, because it's too late here and I'm going to bed now. See you tomorrow!

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 10:17:33 pm
content: Man... I know. I don't get it at all.Edit: Did anything stick out to you in my PCB design or schematics that we haven't addressed? @TTT stated that the VDDCR decoupling caps were a bit far from the board.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 24, 2019, 10:32:08 pm
content: Quote from: padagra on October 24, 2019, 10:17:33 pmI haven't looked very much into those things. I supposed you'll have checked voltages and noise and such everywhere long before asking for help, no? What's odd is that plug/unplug 6 times and works, weird... why is that? Have you got another router to try? Have you tried with a 2 pairs enet cable? IDK. It's too late. See you tomorrow!

author: padagra
author_rank: Contributor
timestamp: October 24, 2019, 11:53:12 pm
content: IT IS WORKING.NVMI started breadboarding the design, which lead me into copying the transistor layout for the PHY_POWER and 3.3VLAN power. As I was copying, I thought that R9 was kind of odd. Even though 10k is a high resistor value, it seemed like an odd placement because now when PHY_POWER is enable there is a constant current draw through R9.I removed R9 and IMMEDIATELY it started working correctly. WHAT IS BETTER is the 8710a chip no longer is getting hot and my current draw is down to a total of .726 watts. (3.3v at .23a).SO. The next theory I have is that R9 as a pullup resistor is fine to have in the circuit for the Q5 transistor but I'm thinking that my circuit traces are not capable of handling the current required for the 10k resistor from 3.3v to GND AND also power up the 8710a properly.I hope that this new information is confirmed by you which would mean I need to either:a) remove R9 completely [but what are the consequences of losing that pullup resistor] orb) I beef up the 3.3V traces in that area to handle the current required for both R9 and 8710A.What. a. relief.Edit 1:So maybe not completely relieved. After confirming all functionality was good with internet connectivity through powering up with the bench power supply I went ahead and tested with POE - there's an issue.I think that's why Olimex has that 10k pullup resistor in there. I haven't checked with my scope yet, it's getting late now but when I plug in with POE without R9 attached to the board, the 8710a power cycles ~4 times. So it looks like leaving the base floating of Q5 causes an issue where POE is prematurely triggering 3.3VLAN.If this is correct I'm thinking this is resolvable by revising my PCB design to have a higher current capacity for 3.3VLAN and I'd have to leave R9 in place. What's your thoughts? Hopefully this is on the right track.Edit 2:Here's a video of the behavior. I get the same behavior with POE both with and without the R9 which might be breaking my theory in edit 1. POE powers everything up, lan 8710a power cycles 6 times, connecting (again without the LINK LED) on the 6th time. The good news is I think now that it is down to power issues it should be easier to diagnose on the scope. It's worth noting that when the board cycles these 6 times, it starts heating up.https://www.dropbox.com/s/bwzfyb36zsnm20j/236FFCE1-A6B5-4600-9A83-89284408852D.mov?dl=0Final note before bed - if R9 is removed and I power up with the bench PSU on just 3.3v, it works flawlessly. Connects immediately. If I leave nonPOE ethernet cable plugged in THEN power up the board, it works flawlessly. Immediate connection. So now something with the power/POE/3.3VLAN transistors is funky.Edit 3:Took another glance at it. My "3.3v" rail with POE is very noisy and has spikes upwards of 4.48v. It never rests at 3.3v, always high. I will need to look into this, I'll have to double check R27 and R5 to make sure they are the correct values for a proper 3.3v output, I suspect they are slightly off. That with a better smoothing capacitor and corrected 3.3v/3.3VLAN traces I hope this is the last of it.Considering all is now working well with your revised code, no R9, and the bench PSU I would assume that the POE is capable of working the same way with the right 3.3v output.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 25, 2019, 07:27:34 am
content: Good morning!After all, there's light at the end of the tunnel... :-)Let's see that. Put a probe in ETH_POWER_PIN/gpio12, and another in VDDIO/+3.3VLAN, then flip it on and off with ethon/ethoff and post the pictures. This is what I've got there:ethoff:ethon:I have ETH_POWER_PIN connected directly to the gate of Q5, and nothing else, no C20, no R9, no R2, no Q1. The problem with this setup is that the built-in driver turns it off instead of on because it expects a 1 to turn on/0 to turn off, but this is the other way around. So I have to pass -1 into ETH_POWER_PIN to ETH.begin() and turn it on myself just before the call (to ETH.begin()).The small 10ms ramp you see on the left side of ethon is when we turn on the pullups of the pins MODE0..2 and MDIO, here:https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0ee#file-lan8720a_esp32-ino-L197-L208Quote from: padagra on October 24, 2019, 10:01:18 pmNo need for that, you'll know it's working if it gets an IP:Code:[Event #3] 25: ETH Obtained IP addressETH MAC:24:0A:C4:1D:AE:23 IP:192.168.10.176 100Mbps/FD

author: padagra
author_rank: Contributor
timestamp: October 25, 2019, 10:17:27 pm
content: Finally back home from work.Here's my findings:- The ethon trigger looks good. Yellow trace is PHY_POWER and blue trace is 3.3VLAN- The ethoff trigger does not turn off 3.3VLAN. Which makes sense because R9 being gone leaves the gate of Q5 floating so 3.3VLAN never can turn offETHONETHOFFEdit 1:The tests above are not using POE.If I go from reboot > ethoff > ethon it will not connect. In fact the link/act lights don't even come on. But if I just do a reboot it will connect immediately without R9.Code:17:27:44.934 -> rebootets Jun 8 2016 00:22:5717:27:44.934 ->17:27:44.934 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)17:27:44.934 -> configsip: 0, SPIWP:0xee17:27:44.934 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x0017:27:44.934 -> mode:DIO, clock div:117:27:44.934 -> load:0x3fff0018,len:417:27:44.934 -> load:0x3fff001c,len:104417:27:44.934 -> load:0x40078000,len:889617:27:44.934 -> load:0x40080400,len:581617:27:44.934 -> entry 0x400806ac17:27:45.557 ->17:27:45.557 -> Oct 25 2019 17:00:4417:27:45.557 -> IDF-VERSION: v3.2.3-14-gd3e56290717:27:45.557 -> ESP. getSketchSize(): 65313617:27:45.557 -> ESP.getFreeSketchSpace(): 131072017:27:45.557 -> STA MAC Address: 24 0a c4 23 fc 2417:27:45.557 -> AP MAC Address: 24 0a c4 23 fc 2517:27:45.557 -> BT MAC Address: 24 0a c4 23 fc 2617:27:45.557 -> ETH MAC Address: 24 0a c4 23 fc 2717:27:45.557 ->17:27:45.557 -> Hi! We're in the loop()17:27:46.098 ->17:27:46.098 -> [Event #1] 21: ETH started17:27:50.094 -> [Event #2] 23: ETH connected17:27:50.094 -> [Event #3] 25: ETH Obtained IP address17:27:50.094 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 100Mbps/FD17:28:16.276 -> ethoff ok17:28:21.797 -> ethon ok

author: padagra
author_rank: Contributor
timestamp: October 27, 2019, 07:57:52 pm
content: Small update, I breadboarded everything and ended up destroying my esp32 development board... I have more coming tomorrow.Upon further inspection I don't think my traces are underrated on current capacity with R9. Their current trace width equates to .65a and I shouldn't be near that under normal operation.I'm at a point now where once I breadboard this, I am wondering if I should just duplicate the schematic the 8720 LAN development board and put it in my circuit. All of this should be working but it isn't so I feel like to save everyone's time maybe I should just redo for a breadboarded circuit I know works?I will update tomorrow.

author: padagra
author_rank: Contributor
timestamp: October 29, 2019, 12:09:19 am
content: Things are not going well over here. The SiLabs VCP drivers I need for these ESP32 dev boards has just outright failed on my Macbook. Reinstalling isn't changing my ability to see any ports. So I moved over to an old Windows 10 laptop where I can program them again.Breadboarding my exact PCB with the transistors for PHY_POWER and the dev board is not working at all. I desoldered the 50mhz crystal from this 8720 dev board and fed in GPIO 17 through a 30ohm resistor directly into the board. Running your code (https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0ee), I am getting a timeout waiting for the PHY registers.Additionally the 3.3VLAN on this breadboarded design, is very noisy. There is a lot of ripple and it's hard to tell if the timing is correct.Did you feed a clock signal from the ESP32 directly into the 8720 dev board? Or did you use the ESP to power up the 50mhz crystal instead?

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 30, 2019, 08:48:13 am
content: Hi padagra,I don't think this can work like that. There are quite tight timing constraints in the RMII signals, a 50 MHz clock, and huge power spikes, all of which (and all those long wires) are not suitable for a breadboard.I've discovered an issue that only happens with the ETH_CLOCK_GPIO17_OUT clock, but not when the clock is external (fed to the esp via gpio0). When there's traffic on the wifi STA channel, ETH r26 (the error counter) increases quite rapidly => there's noise and dropped frames. And if I start the wifi AP, the errors climb to the point that the ETH activity LED is flashing constantly => even more noise yet, to the point that proper ETH comms become nearly impossible due to the number of dropped/corrupted packets. I don't recall any of that happening when I had it setup with the external clock in ETH_CLOCK_GPIO0_IN mode.So in these first stages, to test things, if I were you, I would turn the wifi off with the 'wifioff' cmd.

author: padagra
author_rank: Contributor
timestamp: October 30, 2019, 03:10:24 pm
content: I will move to prototyping PCBs and away from the breadboard. Also I will try turning off the WiFi as you have suggested.I have some 50mhz crystals coming in the mail today in addition to some NCP302HSN27T1G. I am going to attempt to move the clock and timing portion off of the ESP32s plate. It seems like with your breadboard success and with wESP32 moving to external oscillators, this may be the way to go.https://www.mouser.com/datasheet/2/464/IDT_XL-Crystal-Oscillators-Datasheet_DST_20180907-961566.pdfhttps://www.mouser.com/datasheet/2/308/NCP302-D-951758.pdf

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: October 31, 2019, 01:11:40 pm
content: Can you try this? Put it immediately after the call to ETH.begin():Code:ETH.begin(...);esp_eth_smi_write(4, bin2u16("000000 0 0011 00001"));This makes it connect at 10 Mbps max (10BASE-T). At 10Mbps I can turn on the WiFi AP and STA and communicate simultaneously through all channels at the same time with no errors/dropped packets: ETH, WiFi AP and WiFi STA. If your problem is noise, this may help.Edit:I've updated the gist:https://gist.github.com/xk/0c08f8a2c49b35a5e0a38aad2dc6f0eeNow it boots in 10BASE-T and can switch modes with the commands eth10 and eth100.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: November 01, 2019, 08:33:19 am
content: Quote from: padagra on October 30, 2019, 03:10:24 pm1) I don't think the NCP302 reset chip is needed because the amazon 8720 board has nRST left floating/Not Connected and it works well. BTW, the datasheet contradicts itself, says it's got an internal power-on reset circuitry:- "Integrated power-on reset circuit" (page 1).- "Note 2.1 Configuration strap values are latched on power-on reset and system reset" (page 11)- "Note 2.2 Configuration strap values are latched on power-on reset and system reset" (page 12)- "When enabled, auto-negotiation is started by the occurrence of one of the following events: Hardware resetSoftware resetPower-down reset" (page 24).- "Note: The Primary interrupt mode is the default interrupt mode after a power-up or hard reset. The Alternative interrupt mode requires setup after a power-up or hard reset."- "The Primary interrupt system is always selected after power-up or hard reset"- "Configuration straps are latched upon Power-On Reset (POR) and pin reset (nRST)." (page 39)- "Varying the voltage up or down after the transceiver has completed power-on reset can cause errors in the transceiver operation" (page 38)But then it says...- "Hardware ResetA Hardware reset is asserted by driving the nRST input pin low. When driven, nRST should be held low for the minimum time detailed in Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 to ensure a proper transceiver reset. During a Hardware reset, an external clock must be supplied to the XTAL1/CLKIN signal.Note:A hardware reset (nRST assertion) is required following power-up. Refer to Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 for additional information."2) A weird thing in the amazon board is that it has LED1/REGOFF connected with 330R to VDDA which in principle would imply REGOFF, but the regulator is enabled. I removed 330R and put a 4k7 pulldown to be sure, and it made no difference. The high-ish forward V of the LED is doing the trick I guess:Quote3) When I look at CLKIN in the 8720 (with the low pass filter disabled in the scope) I see a signal that goes much below GND and above 3.3, so I've put a higher resistance in the esp clock output (gpio17) to make it be 3.3 peak to peak, from just above GND to just below 3.3, at the 8720 CLKIN pin.4) You can use the Mac's ethernet port to do the tests, just have to enable internet sharing in the control panel. If you do that you can peek at the packets with WireShark and see exactly what's being sent (or not!) by the esp, and what's being sent by the Mac (and perhaps missed by the esp?). For example, when I have noise (in 100BASE-T mode + Wifi AP on) I can see the esp is missing many response ACK packets sent by the Mac and therefore retransmitting unnecessarily. If you see packets coming from the 8710 in the Mac you know TX is working. If you see replies sent by the Mac that the esp seems to be missing/ignoring, you'll know you've got a problem in RX.

author: padagra
author_rank: Contributor
timestamp: November 07, 2019, 01:22:44 am
content: Hello again! Been a few days here.So I moved to your revised codebase and put R9 back. The good news? It connects immediately. The bad news? We are back to a no link LED light and high current draw (3.3v @ .29a, 957ma) with the 8710a heating up again..With 10k in R9, it shows clean connection on the serial monitor:Code:18:57:02.421 -> Nov 6 2019 18:26:4118:57:02.421 -> IDF-VERSION: v3.2.3-14-gd3e56290718:57:02.421 -> ESP. getSketchSize(): 65347218:57:02.421 -> ESP.getFreeSketchSpace(): 131072018:57:02.421 -> STA MAC Address: 24 0a c4 23 fc 2418:57:02.421 -> AP MAC Address: 24 0a c4 23 fc 2518:57:02.421 -> BT MAC Address: 24 0a c4 23 fc 2618:57:02.421 -> ETH MAC Address: 24 0a c4 23 fc 2718:57:02.421 ->18:57:02.421 -> Hi! We're in the loop()18:57:02.951 ->18:57:02.951 -> [Event #1] 21: ETH started18:57:44.967 -> [Event #2] 23: ETH connected18:57:44.967 -> [Event #3] 25: ETH Obtained IP address18:57:44.967 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD18:58:38.969 -> [Event #4] 24: ETH disconnectedIf I send the command "eth100" it reconnects and the link LED turns on! But there's still a high amperage draw (3.3v @ .26a, 858ma). Despite the high amperage draw it appears to hold the connection with the data visible through wireshark.My thought with the NPC302 is to just duplicate the setup the wESP32 has (replace the microcontroller he has with the NPC302) in an attempt to be done digging for this ghost of an issue.What pull up resistors are you using for the PHY select mode? 2.2k or 10k? I've got 2.2k.Another note here, the high amperage draw ONLY happens when the ethernet cable is plugged in. Unplug the cable and the amperage goes back down. So something about the connection state is causing the 8710a to draw more power than it needs. 🤷‍♂️Edit 1:After the 30 ohm resistor, I'm getting -240mv vMin and +2.96v vMax totalling to ~3.2v peak to peak.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: November 07, 2019, 01:03:59 pm
content: Hi!That LED is speed not link, it lights @100 and is off @10 Mbps, so that's ok. My power figures are (I did a wifioff first, and the cpu is running @240MHz):Code:wifioff+ nothing connected: 5V*0.12A= 0.6Wwifioff+ eth100 connected: 5V*0.16A= 0.8Wwifioff+ eth10 connected: 5V*0.19A= 0.95Wwifiap+ nothing connected: 5V*0.19A= 0.95Wwifiap+ eth100 connected: 5V*0.24A= 1.2Wwifiap+ eth10 connected: 5V*0.28A= 1.4Wwifioff+ ethoff : 5V*0.07A= 0.35WI'm using two 5->3.3 LDOs, one for the esp32 and another one for the 8720 board.MODE0..2 have no pullups in the chinese board, but each has a 10Ω R in series.If you put it in 10BASE-T + wifioff (that's how it boots now), does it *always* reconnect fine? Even with POE?

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: November 09, 2019, 09:27:52 am
content: Quote from: padagra on October 24, 2019, 11:53:12 pmYou have to have clean power rails. If I were you I would do two things:1.- Remove the SY8089, grab three (short-ish) wires and put the AMS1117 LDO in its place (you've got one in the (now defunct?) esp32 board). GND goes to GND, IN goes to pins 1 and 4 of the SY8089, and OUT goes to c5/c25/led4A/+3.3V. You've got two switching regulators one after the other. That's no problem if everything is working as intended, but in this case we've got lots of noise so it isn't => let's leave one out of the equation for now.2.- If after that still doesn't work, jumper pins 2 and 3 of Q5 to be sure it isn't playing on/off due to noise.How clean is (or isn't) the output of si3402 (+5VP) when feeding POE?

author: padagra
author_rank: Contributor
timestamp: November 10, 2019, 03:48:53 pm
content: Quote from: GeorgeOfTheJungle on November 07, 2019, 01:03:59 pmNo it does not connect with POE in this state, but does consistently connect without POE. I ordered a USB galvanic isolator so I can debug with POE hot, got it in yesterday. What I have found while using POE is that it recognizes an ethernet cable is plugged in via serial monitor "ETH Connected" and the ACT Led flashes but it will not get an IP address. Not sure how useful it is but Wireshark shows the following as if the ESP32 is trying to get an IP address (I think I'm reading this right):Quote from: GeorgeOfTheJungle on November 09, 2019, 09:27:52 amThere is more noise when the router is plugged in. I captured both as a comparison on the three power rails +5vp, +3.3v, and +3.3vlan.+5vp when powered by POE (router unplugged from POE injector):+5vp when powered by POE (router plugged into POE injector):+3.3v when powered by POE (router unplugged from POE injector):+3.3v when powered by POE (router plugged into POE injector):+3.3vLan when powered by POE (router unplugged from POE injector):+3.3vLan when powered by POE (router plugged into POE injector):Quote from: GeorgeOfTheJungle on November 09, 2019, 09:27:52 amWorking this now, will post an update shortly.Edit 1:Okay, I removed the SY8089. Put the AMS1171-3.3 in place of it. It successfully is creating 3.3v. Scope shots:+3.3v when powered by POE (router unplugged from POE injector):+3.3v when powered by POE (router plugged into POE injector):+3.3vLan when powered by POE (router unplugged from POE injector):+3.3vLan when powered by POE (router plugged into POE injector):Two concerning things this uncovered:- The AMS1117-3.3 is getting very hot. I know linear regulators dissipate the excess voltage with heat but this is getting hot -> 146°F- The board is now connecting with POE however it is running into brownouts. It connects, gets IP address, resetsBrownout as seen through serial monitor:Code:11:16:02.065 -> Hi! We're in the loop()11:16:02.596 ->11:16:02.596 -> [Event #1] 21: ETH started11:16:06.638 -> [Event #2] 23: ETH connected11:16:06.638 -> [Event #3] 25: ETH Obtained IP address11:16:06.638 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD11:16:10.993 ->11:16:10.993 -> Brownout detector was triggered11:16:11.031 ->11:16:11.031 -> ets Jun 8 2016 00:22:5711:16:11.031 ->11:16:11.031 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)11:16:11.031 -> configsip: 0, SPIWP:0xee11:16:11.031 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x0011:16:11.031 -> mode:DIO, clock div:111:16:11.031 -> load:0x3fff0018,len:411:16:11.031 -> load:0x3fff001c,len:104411:16:11.031 -> load:0x40078000,len:889611:16:11.031 -> load:0x40080400,len:581611:16:11.031 -> entry 0x400806ac11:16:11.678 ->11:16:11.678 -> Nov 6 2019 18:26:4111:16:11.678 -> IDF-VERSION: v3.2.3-14-gd3e56290711:16:11.678 -> ESP. getSketchSize(): 65347211:16:11.678 -> ESP.getFreeSketchSpace(): 131072011:16:11.678 -> STA MAC Address: 24 0a c4 23 fc 2411:16:11.678 -> AP MAC Address: 24 0a c4 23 fc 2511:16:11.678 -> BT MAC Address: 24 0a c4 23 fc 2611:16:11.678 -> ETH MAC Address: 24 0a c4 23 fc 2711:16:11.678 ->11:16:11.678 -> Hi! We're in the loop()11:16:12.229 ->11:16:12.229 -> [Event #1] 21: ETH started11:16:16.228 -> [Event #2] 23: ETH connected11:16:16.228 -> [Event #3] 25: ETH Obtained IP address11:16:16.228 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD11:16:25.112 ->11:16:25.112 -> Brownout detector was triggered11:16:25.112 ->11:16:25.112 -> ets Jun 8 2016 00:22:5711:16:25.112 ->11:16:25.112 -> rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)11:16:25.112 -> configsip: 0, SPIWP:0xee11:16:25.112 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x0011:16:25.112 -> mode:DIO, clock div:111:16:25.112 -> load:0x3fff0018,len:411:16:25.112 -> load:0x3fff001c,len:104411:16:25.112 -> load:0x40078000,len:889611:16:25.112 -> load:0x40080400,len:581611:16:25.112 -> entry 0x400806ac11:16:25.745 ->11:16:25.745 -> Nov 6 2019 18:26:4111:16:25.745 -> IDF-VERSION: v3.2.3-14-gd3e56290711:16:25.745 -> ESP. getSketchSize(): 65347211:16:25.745 -> ESP.getFreeSketchSpace(): 131072011:16:25.745 -> STA MAC Address: 24 0a c4 23 fc 2411:16:25.745 -> AP MAC Address: 24 0a c4 23 fc 2511:16:25.745 -> BT MAC Address: 24 0a c4 23 fc 2611:16:25.745 -> ETH MAC Address: 24 0a c4 23 fc 2711:16:25.745 ->11:16:25.745 -> Hi! We're in the loop()11:16:26.286 ->11:16:26.286 -> [Event #1] 21: ETH started11:16:30.292 -> [Event #2] 23: ETH connected11:16:30.292 -> [Event #3] 25: ETH Obtained IP address11:16:30.292 -> ETH MAC:24:0A:C4:23:FC:27 IP:192.168.1.86 10Mbps/FD11:16:36.557 ->11:16:36.557 -> Brownout detector was triggered

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: November 11, 2019, 06:36:19 pm
content: Quote from: padagra on November 10, 2019, 03:48:53 pmEither the Mac isn't responding (are you sure internet sharing was on?) or it's responding and the 8710 is deaf/missing the response (rx err). You can look with the scope at pin RXER, 8710 pin13, if you see positive pulses there you've got rx errors. If I turn on wifiap and it's in 100BASE-T I get them too, it still works fine but comms are slow. Not in 10BASE-T.The noise I've got in +3.3 is less than 200mV pk-pk. But when I looked at it, the scope's GND was connected at the USB cable input GND, not at the 8710 board input GND. If I put the GND clip there I think the noise I'll see will be less than that.Try to find something to solder the LDO to so that it can dissipate that heat. It's good for up to 1 amp, that's 3.3W => it should be able to cope with the 8710 and the esp, no problem. IDK if there other things drawing power beside these two in your board?

author: padagra
author_rank: Contributor
timestamp: November 11, 2019, 07:37:13 pm
content: Quote from: GeorgeOfTheJungle on November 11, 2019, 06:36:19 pmI'll probe it out when I get home this evening (1:35pm here) but I find it's odd that without POE it successfully gets an IP address (yes internet sharing is on).Quote from: GeorgeOfTheJungle on November 11, 2019, 06:36:19 pmMy scope's ground is tied to an exposed ground pin I have available on the programming header if that makes a difference.Quote from: GeorgeOfTheJungle on November 11, 2019, 06:36:19 pmNo there is nothing else turned on that would actively be trying to draw power from 3.3v besides the ESP32 and the 8710a. It should not even be close to 3.3w.