Question on choosing FETs - Page 1
Forum section: electronics / projects

author: redgear
author_rank: Frequent Contributor
timestamp: October 16, 2019, 05:43:52 am
content: I am building a BMS based on one of Ti's reference designs --TIDA-00792.I need help choosing the right FETs for the charge and discharge control. I will be using a 7s pack with a nominal voltage of 25.9v and a maximum of 28.7v. My motor draws a max current of 15A and I don't expect the current to go more than 20A even after considering the other electronics.The above design I linked to uses twoCSD19536KTTin parallel for charge and discharge. The FETs are rated at 100v Vds with a continuous drain current of 192A at 100deg.I think this is a overkill for my system and increases the BOM cost.Do I really need two FETs in parallel to handle the current and heat?I am trying to hit a sweet spot between BOM cost and reliability.Is it ok to look for FETs rated for or above 60v(more than 2x my max) with Id more than 50A(more than 2x my max) ?I have shortlisted a few FETs, want to know which one to pick and how many(in parallel). I am open to suggestion outside this list too.Vishay Siliconix SQR70090ELR_GE3- 100v 50AVishay Siliconix SQD50034EL_GE3- 60v 68AVishay Siliconix SQM60030E_GE3- 80v 120AVishay Siliconix SQR97N06-6m3L- 60v 56AThanks

author: MagicSmoker
author_rank: Super Contributor
timestamp: October 16, 2019, 10:17:56 am
content: Quote from: redgear on October 16, 2019, 05:43:52 amMaybe, maybe not. If the FETs are mounted onto the board - and therefore relying on it for a heatsink - then yes, you might need 2 or more in parallel to limit the temperature rise to less than 75C or so because the total thermal resistance from junction to ambient will be quite high.For example, the last FET on your list - SQR97N06 - has a R_theta[j-a] of 50C when mounted on a 25mm x 25mm square of copper on a PCB - a rather large chunk of board area, all things considered - which means it will only take 1.5W of dissipation for a 75C rise. With an Rds of around 90-95 milliOhms at 100C (never use the 25C rating!) you'll hit the dissipation limit at ~4A... No, that isn't a typo. Now let's say you are willing to push the junction temperature up to 125C - not really advisable unless it is a SiC MOSFET, and even then I'd think twice - then you would be allowed a whopping 2W of Pd but because Rds goes up with temperature it will now be 117mΩ so you only get another 130mA of current rating for cutting lifespan by a good 4x (from Arrhenius: every 10-11C rise in temp cuts life in half).Hence for board mounted FETs the spec to focus on is Rds, and using Ohm's Law - R = P / I2- with an allowed Pd of 2W, an R_theta[j-a] of 50C/W and a current of 20A you'll see you need a max Rds at 100C of 5mΩ. What you'll likely find is that a single device that meets these specs will be more expensive than two or even three "worse" devices in parallel, hence the original recommendation. If you insist on going the single device route then consider the D2Pak (TO-263) as it has a lower overall thermal resistance with approximately the same board area used as a heatsink (typically 40C/W).Finally, if the max battery voltage is <30V then a 50V Vds rating will be fine, and since Rds goes up with voltage rating that is a strong incentive to not go too crazy here.EDIT - forgot to specify R_theta[j-a] in last example.

author: redgear
author_rank: Frequent Contributor
timestamp: October 16, 2019, 12:03:27 pm
content: Quote from: MagicSmoker on October 16, 2019, 10:17:56 amThank You for the detailed explanation. I have a few more questions.While using multiple FETs in parallel, does the Rds of each FETs sum up just like resistors in parallel to give the total, in that case I should add up the Rds at 100c and make sure it is less than 5mΩ? How do I find the value of rds at 100c? I am not able to find it on the datasheet.The app note from TI used a 100v FET for a 50v system, so I just doubled up my voltage. I will stick to the 50v Vds rating.

author: MagicSmoker
author_rank: Super Contributor
timestamp: October 16, 2019, 12:11:21 pm
content: Quote from: redgear on October 16, 2019, 12:03:27 pmWhoa there... I gave you an *example* of an Rds, not a specific requirement. You might very well need to get Rds to 2mΩ of less depending on how much board area you can allot to "heatsinking."That said, paralleling resistors causes a decrease in overall resistance, so no, you don't sum them together. For example - and again, this is just an example - four FETs with 20mΩ Rds in parallel will get you to 5mΩ.The datasheet almost always gives Rds at 100C so look harder or choose a more reputable supplier*. Failing that, Rds is approximately 1.5x the 25C value at 100C for any regular FET (that is, not a SiC or GaN type). And always use the max value specified, not the typical one.* - or there will be a graph of Rds vs. temperature, or a multiplier for Rds vs. temperature.

author: Zero999
author_rank: Super Contributor
timestamp: October 16, 2019, 04:09:11 pm
content: No, the resistances don't sum together, but their conductances do.Suppose a MOSFET has an RONof 5mΩ, therefore it has a conductance of:G = 1/R = 1/0.005 = 200STwo in parallel will have a conductance of 400S, which if you convert back to resistance will be 2.5mΩ.R = 1/G = 1/400 = 2.5mΩ.This is where we get RTOTAL= 1/(1/R1 + 1/R2 + 1/R3) from.Be careful when looking at MOSFET current ratings. They're calculated, not determined experimentally. The best route is to work out the power dissipation and temperature rise, which depends on the thermal resistance. Refer to the IR application note AN-1140 linked below.http://www.irf.com/technical-info/appnotes/an-1140.pdf

author: redgear
author_rank: Frequent Contributor
timestamp: October 17, 2019, 04:52:28 am
content: Quote from: MagicSmoker on October 16, 2019, 12:11:21 pmOops. How do I calculate the relation between the required Rds and board area?Quote from: MagicSmoker on October 16, 2019, 12:11:21 pmYeah, that is what I meant, the sum of reciprocals of the resistancesQuote from: MagicSmoker on October 16, 2019, 12:11:21 pmThanks!Quote from: Zero999 on October 16, 2019, 04:09:11 pmYep, i know... I just didn't phrase it properly.Quote from: Zero999 on October 16, 2019, 04:09:11 pmThank You! I will give it a read.

author: MagicSmoker
author_rank: Super Contributor
timestamp: October 17, 2019, 10:12:45 am
content: Quote from: redgear on October 17, 2019, 04:52:28 amSee STMicro Application Note AN1703 for a very good and comprehensive explanation of just that along with some highly useful graphs of thermal resistance vs. board area for various SMD packages:https://www.st.com/resource/en/application_note/CD00004438.pdf