Filter circuit using op-amp, dc offset is coming after every stage   - Page 1
Forum section: electronics / projects

author: tapasxplore
author_rank: Contributor
timestamp: November 01, 2017, 09:21:08 pm
content: I have made PCB incorporating OPA1664 (using dual supply +/- 1.5V) audio op-amp. In the output of every stage I am getting dc voltage along with amplified signal. Op-amp output is getting saturated in positive part very early before negative part because of that. Below I have posted pics with description. I ran the simulation of the circuit and I was not getting and dc offset. I made PCB to test it, but the signal is offset by dc voltage after every stage. How to make sure that only pure ac signal will come out after every stage.Fig.1 Sallen key schematic, except that dual supply is being used, which is not shown.Fig.2 OPA 1664 PCB used as sallen key configuration, dual supply (+/- 1.5V)Fig.3 Output from function generator ( +/-30mV, 100 Hz freq)Fig.4 Output from op-amp first stage , dc shifted by 56 mVFig.5 Output from op-amp fourth stage, dc shifted by 700 mVRegards,Tapas

author: Richard Crowley
author_rank: Super Contributor
timestamp: November 01, 2017, 09:31:08 pm
content: Since you circuit is DC-coupled throughout (including the input), it does not seem surprising that you end up with cumulatively worse DC offset after each stage. Have you considered AC coupling between the stages (to block the cumulative error).How good is your "dual supply"? Particularly, how accurate is the balance?

author: _Wim_
author_rank: Super Contributor
timestamp: November 01, 2017, 09:35:35 pm
content: If your circuit does not need to process DC signals, just put a capacitor (aka dc-blockking cap) in between each stage.The simulation does not show the offset, because an "ideal" opamp does not have any DC offset.If you would use a single opamp in an 8 pin package, these typically have offset null inputs to minimize this phenomenon (offset is trimmed to zero with an external trimmer pot). The quad opamp used does not have this.

author: Kire Pûdsje
author_rank: Regular Contributor
timestamp: November 01, 2017, 09:37:30 pm
content: +/- 1.5V seems a bit low. The datasheet has at a minimum +/-2.5VEdit: oops took the opamp type number from the schematic. In the text you mention the 1664.Edit2: is the generator AC coupled? If yes, the DC voltage at the input is floating. What happens if you short circuit the input?Edit3: I am missing the 0V wire from the battery pack, I only see two wires. Furthermore where is the gnd of the audio signal?

author: Benta
author_rank: Super Contributor
timestamp: November 01, 2017, 10:00:14 pm
content: QuoteYep, very pertinent question. If so, the first amp has no DC reference and will float. Easily fixed.

author: danadak
author_rank: Super Contributor
timestamp: November 01, 2017, 11:03:14 pm
content: I tried reading R values, if you are running stage G of 2 then that results inoverall G = 16, for 1.5 mV of offset that results in just 24 mV. From firststage. Other stages will contribute less. You also have a uA or so of biascurrent creating offsets, thru ~ 40K (cant read R values) so thats 40 mVx 16. So that could be appreciable gained up thru 4 stages.However does your input signal have significant offset ? If so X 16 to that.So best approach is AC couple the first stage signal. And rest of stagesas recommended earlier. Or scale filter values, lower R, higher C.A calulator tool for computing offsets.http://earmark.net/gesr/opamp/Regards, Dana.

author: rfeecs
author_rank: Frequent Contributor
timestamp: November 01, 2017, 11:16:40 pm
content: Did you account for input bias current? 600nA typical. Approximately 40k x 600n = 24mV input offset per stage.

author: Someone
author_rank: Super Contributor
timestamp: November 01, 2017, 11:27:34 pm
content: Quote from: Benta on November 01, 2017, 10:00:14 pmThat signal generator does not have an AC coupling option that I'm aware of, and good DC specifications. The problems with the circuit are the much more typical real world non-ideal effects of opamps.Input offset voltageInput bias currentThe bipolar input 1664 should be causing a significant negative DC bias in the output from the input bias currents as the above posters have noted.

author: Circlotron
author_rank: Super Contributor
timestamp: November 02, 2017, 02:08:13 am
content: And each opamp stage has a DC gain greater than 1 so the offset will get bad quick.