Series Transistor Circuit Problem On Gate - Page 1
Forum section: electronics / projects

author: hal9001
author_rank: Regular Contributor
timestamp: June 21, 2022, 10:57:52 am
content: Im testing a simple circuit with 2 transistors in series to make a bidirectional switch. I connected a scope on one drain and frequency generator (square wave) on the other drain. When the gate connects to Gnd the scope doesnt measure a waveform but when the gate connects to 5V the scope measures the square wave as expected.The problem is I see artifacts when measuring the gate as shown in the pictures. Can some one kindly explain why this is?Square wave is 3.3V with 1.15V DC offset in red color, blue color is the gate measurement. Transistor is TPM2008.Cheers!

author: Zero999
author_rank: Super Contributor
timestamp: June 21, 2022, 11:05:42 am
content: The gate has a tiny capacitance, relative to the drain and source, so this is to be expected.Why not use a dedicated analogue switch IC?

author: hal9001
author_rank: Regular Contributor
timestamp: June 22, 2022, 10:44:13 am
content: Quote from: Zero999 on June 21, 2022, 11:05:42 amThanks for the explanation!Is there a way to reduce the effect in this circuit?Analogue switch is a great idea but the ones with mΩ on resistance and small footprint look much more expensive than price of 2 transistors but Im open to suggestions!Cheers!

author: Terry Bites
author_rank: Super Contributor
timestamp: June 22, 2022, 12:37:03 pm
content: A small cap on the input and output to ground will reduce this artifact. You can also slow down the switching with an RC circuit on the gate. Its not like you need uS switching.

author: Zero999
author_rank: Super Contributor
timestamp: June 22, 2022, 12:48:53 pm
content: Quote from: hal9001 on June 22, 2022, 10:44:13 amWhy does it matter if the voltage on the gate is spiky? You could reduce the value of R1, or remove it altogether.Bear in mind, with a gate control voltage of 0V to 5V, the maximum voltage swing of the signal is the MOSFET's maximum threshold voltage below 5V and minimum threshold below 0V. According to the data sheet the maximum threshold is 1.1V and minimum is 0.35V, so you're limited to a signal voltage range of -0.35V to 3.9V, although it's sensible to restrict it further to minimise leakage and distortion.

author: hal9001
author_rank: Regular Contributor
timestamp: June 27, 2022, 09:11:32 am
content: Quote from: Zero999 on June 22, 2022, 12:48:53 pmThanks Zero999! Your replies are most helpful!My concern about the gate voltage being spiky is if I power the gate voltage closer to VGS Max then those spikes might pass VGS Max rating and cause the transistor to fail. But I have doubts about that theory because the source voltage is changing synchronously with the spikes on the gate so possibly VGS stays below its rating. Is that realistic?Quote from: Terry Bites on June 22, 2022, 12:37:03 pmThanks Terry! Very helpful!

author: Zero999
author_rank: Super Contributor
timestamp: June 27, 2022, 09:58:16 am
content: Quote from: hal9001 on June 27, 2022, 09:11:32 amVGSis not increasing. The gate has a capacitance relative to the drain and source. When the drain and source voltage rise, the gate voltage floats up with them.