Via under 0805 - Page 1
Forum section: electronics / general

author: Ice-Tea
author_rank: Super Contributor
timestamp: September 29, 2016, 08:09:17 am
content: Just wondering, what are the thoughts on a (tented) via under a 0805? I know it is not prefered, frowned upon but... Why? If it's tented, it won't suck up solder, I know traces are run under chips so (and I do it all the time) but... Vias?YayorNay?(Also, I wanted to useGlow)

author: janekm
author_rank: Unknown
timestamp: September 29, 2016, 08:12:13 am
content: I don't see any issue aside from that the unbalanced thermal connection of the pads could, theoretically, contribute to tombstoning but I don't honestly think it's likely (and I very frequently see chip components laid out with 3-spoke connection to ground, and/or via, on one end and a single trace on the other side, so...).

author: DerekG
author_rank: Frequent Contributor
timestamp: September 29, 2016, 10:42:52 am
content: Quote from: Ice-Tea on September 29, 2016, 08:09:17 amThis is not likely to cause any problems. Some board shops may charge more for tenting the vias.I often specify a solder paste stencil of 0.2mm thickness to lay down a bit extra solder. Many stencil suppliers offer you standard (as they are cheaper to make) 0.1 or 0.15mm thick stencils.In your example, to get the auto-router working, you will need to modify the keep out region for the 0805 resistor.

author: ataradov
author_rank: Super Contributor
timestamp: September 29, 2016, 04:11:35 pm
content: Nay. In such small spaces, you are likely to see thicker solder mask (SM + trace), so your component will rock on that central point. This may create problems with automatic assembly.EDIT: Although on 0805 it probably does not matter that much.

author: AndyC_772
author_rank: Super Contributor
timestamp: September 29, 2016, 06:59:00 pm
content: It's completely fine, a total non-issue with an 0805.

author: Ice-Tea
author_rank: Super Contributor
timestamp: September 30, 2016, 04:50:03 pm
content: Thanks for the feedback, guys!Quote from: ataradov on September 29, 2016, 04:11:35 pmAside from the suggestion it won't be an issue for the 0805: how is this different from running a trace under a chip? Which seems to be common practice? Not criticism, really trying to understand...

author: ataradov
author_rank: Super Contributor
timestamp: September 30, 2016, 04:56:26 pm
content: Quote from: Ice-Tea on September 30, 2016, 04:50:03 pmTraces are narrower and more even. Some manufacturers make boards that have small "bulges" over vias. I'm not and expert in board manufacturing, so I have no idea why it happens, maybe because of rounded shape, maybe because of the hole in the middle.Anyway, it is not a huge concern, but no reason to makes life harder for yourself if you can avoid this.

author: Ice-Tea
author_rank: Super Contributor
timestamp: September 30, 2016, 06:58:09 pm
content: Quote from: ataradov on September 30, 2016, 04:56:26 pmOkay, thanks for the clarification!

author: IconicPCB
author_rank: Super Contributor
timestamp: September 30, 2016, 10:24:33 pm
content: Alex,The "bulges" are artifacts of plating process.If plating is done in the conventional unipolar way corners of holes tend to build up excess copper . It is known as dog-bone effect.In pulsed bipolar process where electrode polarity changes periodically during the plating process the ( excessive copper deposition) effect is minimised and eliminated in a properly adjusted duty cycle peak to peak ratio of positive/negative polarities mix.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 01, 2016, 03:26:37 am
content: Fine with me. I've probably done it a lot and not thought twice about it. (I do try to avoid vias under QFNs -- that is, for the few that even have enough space between pins and exposed pad where you can fit vias in the first place. Nothing else really matters, as gullwing leaded part bodies tend to lay slightly above the PCB.)Note that the example in question is a poor one, as you currently have plenty of space to move the via to a non-controversial location.Tim