Understanding High Voltage and Creepage Clearances - Page 1
Forum section: electronics / beginners

author: LoveLaika
author_rank: Frequent Contributor
timestamp: April 16, 2024, 01:48:26 pm
content: I'm looking at PMT readout circuits to understand how other people design them (and hopefully build one), and I'm having trouble with high-voltage traces and appropriate clearance/creepage. I've posted some examples of similar circuits I'm looking at building. These PMT readout circuits consist of simply resistors and capacitors.When working with high voltages (in my case, +2 kV), there has to be some creepage between traces. Usingcreepage.com, for 3 kV on a coated PCB board, it recommends a creepage distance of 7.7 mm between traces (assuming functional insulation, Class IIIa/b). With other calculators, I get different results (Saturn PCB recommends spacing of 2.5 mm for >500 V while KiCAD's built-in calculator recommends 15 mm for B2 at 3 kV). Point is, for high voltages, there's a large amount of clearance that's recommended.However, when I see other PMT circuit boards, such as the ones shown in my links below, the components are rather close to one another. I'm sure that I might be misunderstanding something, but the creepage on these boards doesn't appear to be within the specifications recommended. There's not even a ground plane on these boards (though that may be a different issue). I've even seen similar circuits that were built without a PCB, just wrapping the components close to one another and soldering them at the leads. If boards like this are acceptable, then what am I misunderstanding about high voltage and clearance? Why is it not necessary with these boards?Page of PMT Readout Circuit with SchematicsAnother example PMT PCB circuit with an op-amp

author: aliarifat794
author_rank: Regular Contributor
timestamp: April 17, 2024, 05:59:37 am
content: The voltage levels specified by creepage calculators are often conservative estimates meant to ensure safety. In actual operation, the voltages experienced by the traces might be lower.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 17, 2024, 07:55:25 am
content: You need to use the appropriate class and calculation. Unqualified default calculations are probably using the RMS nominal-maximum voltage,in the presence of transientssuch as mains voltage of given category, and, yeah, those dimensions can get quite large. Since that would be a breakdown of easily, say, 10kV -- plus contamination factor.For functional purposes, transient limited (peak voltage as given), not much clearance is needed, and in particular, the voltage between any given pair of conductors is all that matters. In a PMT divider chain with say 100V per dynode, you can use just a little bit (0.3mm or so) and it's fine. As long as the spacing along the chain to surroundings is adequate, which will probably grow along the chain (depending on what ground is relative to; usually the top dynode). And that will need to be several mm.Tim

author: LoveLaika
author_rank: Frequent Contributor
timestamp: April 17, 2024, 11:18:03 pm
content: Thanks for your reply. Following the calculator on Creepage.com, regardless of class (just for an experiment, so I'd say class 1), the creepage value comes to the same at 7.7 mm. This is assuming functional insulation and coated with soldermask. I see that the calculator offers Vrms or Vdc for AC and DC voltage, but I assumed a working value of 3000 volts DC.What you said about the PMT divider chain, if we take the creepage between subsequent circuit elements, am I right to assume that the voltage between the nodes would be the working voltage to calculate for creepage? If that's the case, then the clearance is much much smaller than what I thought. But then, would the standard PCB thickness be enough to ensure insulation between the high voltage and the ground plane? It's roughly 1.6 mm, but is that enough? If not, is it better to omit the ground plane completely?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 18, 2024, 01:06:53 am
content: Solid board has tons of insulation, more or less the raw dielectric strength of the material.You might not care about ground plane as the impedance is so high (100s V, ~mA peak?), and bandwidth not extraordinary (10s, 100s MHz?).Tim

author: LoveLaika
author_rank: Frequent Contributor
timestamp: April 20, 2024, 01:47:10 am
content: Thanks. Thats reassuring, but if I may...why do we assume ground has high impedance? The creepage calculator is for voltage between traces, but do we not treat the ground plane as a trace due to its high impedance? Shouldn't we still treat it as a trace?So, normally, I make boards with a ground plane on both sides of the board and use vias to connect them together. But, with high voltage, if we treat ground as a trace, then the high voltage nodes needs clearance away from the ground plane. If we use that conservative value of 8 mm, that's a lot of clearance, especially with other parts. It will definitely get in the way of everything else.One option would be to limit the ground plane to just one side of the board, say the side that's opposite of your components if possible. That would leave the other side. We could always have no copper pour there, or we could not connect the copper pour to any net and leave it floating. Would a floating plane cause instability with high voltage even if it's all covered with soldermask?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 20, 2024, 06:57:08 am
content: Sorry,circuitimpedance.That is, the characteristic impedance of the traces/pads over ground, or the lumped-equivalent capacitance and inductance thereof, should be comparable to the circuit impedance, and the extra capacitance of wide pads and close spacing to ground will tend to reduce signal bandwidth.The high signal impedance suggests that a higher distance above ground, and narrower conductors, will yield a better transmission line match, and higher overall bandwidth.Maybe bandwidth isn't actually a problem, but just so you're aware how things go in case it is.Tim