Z80 race-the-beam NTSC output - Page 1
Forum section: electronics / projects

author: profdc9
author_rank: Frequent Contributor
timestamp: August 18, 2021, 07:35:19 pm
content: Hello,I have a Z80 single board computer projecthttp://www.github.com/profdc9/Z80SBCand I have a video display working for it. I did not want to use a specialized video chip, rather, I wanted to do it ZX80-style and minimize the hardware needed. I have a SPI peripheral built onto the board which I also use to clock pixels out of a NTSC video output. I use a 8255 for both the chip select signals for the SPI and for the sync signal. The Z80 races the beam and clocks out pixels achieving a fairly close 15.752 kHz horizontal line scan rate. The bit resolution isn't great, 192 pixels across by 240 down, but its good enough for a basic interface. The Z80 runs at 7.3728 MHz.A photo is attached showing a bit pattern on a LCD with an attached NTSC to HDMI adapter.The current code is in the "ROMCPM" directory as "video.asm" which is a CP/M executable that displays and scrolls a bit pattern.This really makes you appreciate how hard it must have been to write games for the Atari 2600, with almost no spare cycles available for implementing actual gameplay (and 128 bytes of RAM).Dan

author: nigelwright7557
author_rank: Frequent Contributor
timestamp: August 18, 2021, 10:06:48 pm
content: I remember using zx80, zx81 then Spectrum. I wrote a teletext program for the spectrum.Even before that was a thing called a micro-professor.It was z80 based with i/o but used 7 seg displays for inputting address and hex codes.

author: netdudeuk
author_rank: Frequent Contributor
timestamp: August 19, 2021, 06:30:49 am
content: Quote from: nigelwright7557 on August 18, 2021, 10:06:48 pmI have one ofthose.

author: harerod
author_rank: Frequent Contributor
timestamp: August 19, 2021, 07:23:28 am
content: Quote from: profdc9 on August 18, 2021, 07:35:19 pmHow do your spend your HSYNC and VSYNC blank times? VSYNC alone should give you well over 10% of the CPU time.This is how I implemented a Pong-Game with BAS interface on an 8MHz AVR:https://harerod.de/mahpong/mahpong.html

author: Nusa
author_rank: Super Contributor
timestamp: August 19, 2021, 07:44:25 am
content: The Atari 2600 had a TIA chip that offloaded the actual video display (including sprite overlays) and audio processing, so the CPU wasn't tied up doing all the things you are. On the other hand, the Z80 is much more powerful than the 6507 (a repackaged and simplified 6502), so you should be able to do it.

author: harerod
author_rank: Frequent Contributor
timestamp: August 19, 2021, 10:32:11 am
content: Quote from: Nusa on August 19, 2021, 07:44:25 amAh, that takes me back to a schoolyard on a rainy day in the early-mid 1980s. All the cool kids had C64s, while my best friend at that time, a fellow nerd and by far the most intelligent kid in class, had a ZX Spectrum. The exchange was about CPU clock speeds. And the C64-group leader teased my friend by saying "Hahah, at one megahertz my 6510 is faster than your Z80 at three point five megahertz!"Another common tease was about the ZX Spectrum's, err, haptics. My friend had a "ZX Spectrum with extended keyboard and a microdrive." The keyboard extension was some generic piece of plastic with symbol stickers added to the keys. The keyboard was mated to the topless Spectrum. I still have that very machine in storage. I don't know who to donate it to.

author: rsjsouza
author_rank: Super Contributor
timestamp: August 19, 2021, 03:35:02 pm
content: Sinclair ZX81 computers did everything on the Z80 - there was a SLOW and a FAST mode where the display was updated or not with the intermediate results.The D/A and modulation was done by a pair of National Semiconductor devices - IIRC it was the LM1886/1889.

author: Ian.M
author_rank: Super Contributor
timestamp: August 19, 2021, 04:32:22 pm
content: IIRC its possible to use the Z80's Refresh signal + a moderate amount of LSI and MSI logic to generate video. Obviously you need some external counters and dividers to generate the dot clock and Hsync interrupt and a PISO to serialize the video. Z80 refresh normally steps through a 7 bit address range accessing one location in each M1 cycle, but some relatively simple extra logic circuitry can extend that to 8 bits (you need to switch between normal A7 when /RFSH is high and when its low, A7 from a flipflop toggled whenever A6 goes from high to low between consecutive refreshes). The high byte of the refresh address comes from the I register, so can be handled in software in your Hsync ISR. The Z80 instruction rate is variable due to their different lengths, but for a 4MHz Z80, it should average 30 accesses in the 52us of the visible portion of a PAL scanline, which if you let the FIFO preload a bit in during Hsync is enough for 256px per line mono video. Add a moderate depth FIFO, and in your Hsync interrupt, reset the I and R registers (and your external A7 flipflop) to the correct address for the start of the next scanline and also clear the FIFO to discard any overrun. Underruns are a little harder to handle, but if you arrange for your FIFO to raise a NMI before it runs out, worst case you'll get a /RFSH cycle 25 clock cycles later, then another 4 cycles after that as execution reaches the NMI vector, then the NMI routine can execute a bunch of 4 cycle NOPs to rapidly re-stuff the FIFO enough to see out the scanline before returning.That will give you a mostly full speed Z80 with interleaved video memory access. The Z80 will only be slowed down by your FIFO reload NMI ISR occasionally if there's a run of long instructions in your code.

author: SiliconWizard
author_rank: Super Contributor
timestamp: August 19, 2021, 04:41:12 pm
content: Quote from: rsjsouza on August 19, 2021, 03:35:02 pmThe ZX81 had a ULA IC ("uncommited logic array") that essentially replaced all discrete logic ICs found in the ZX80. The ULA was kind of a mask-configurable PLD, made by Ferranti:https://en.wikipedia.org/wiki/FerrantiSo this ULA was taking care of a number of tasks (keyboard interfacing, video generation, address decoding...) Regarding video, it was implementing a shift register and sync signals generation (also some kind of address generation, but I don't quite remember the details.) The Z80 CPU had to constantly access the ULA for generating video though, so that was taking a significant portion of CPU time indeed.Quote from: rsjsouza on August 19, 2021, 03:35:02 pmNot that I know of. The ZX81 had only a few ICs actually: Z80, ROM, RAM, and ULA (and the 7805 regulator.)All video signals (video + hsync + vsync) were generated by the ULA circuit. Video was only monochrome so it was just 0/1. The composite signal was generated using a few external components, and it went to an off-the-shelf modulator for connecting to a TV set. Those modulators were pretty common in home computers. They themselves were really simple and only contained a couple transistors and some passives AFAIR.For those curious to know what this ULA was doing, some guy reverse-engineered it:https://oldcomputer.info/8bit/zx81/ULA/ula.htm

author: rsjsouza
author_rank: Super Contributor
timestamp: August 19, 2021, 07:35:35 pm
content: Indeed. I got partially confused with the ZX80 and my Brazilian clone TK85...