S Parameters : Output Impedance and S22  - Page 1
Forum section: electronics / rf-microwave

author: jamfletch
author_rank: Contributor
timestamp: June 05, 2024, 08:00:25 pm
content: Hi all,I have a theory question with regards to measuring S22 of devices, e.g transistors etc.When we measure S22, we're effectively looking at the impedance lookingintoport 2.If I want to know the output impedance of a transistor, does the S22 actually give me the output impedance? I.e the impedance lookingoutfrom the transistor, to port 2?

author: szoftveres
author_rank: Regular Contributor
timestamp: June 06, 2024, 05:34:15 am
content: When you look out from the transistor, you'll see VNA port 2, which is 50ohms (assuming standard, ideal VNA).

author: glenenglish
author_rank: Frequent Contributor
timestamp: June 06, 2024, 08:35:41 am
content: S22 gives you the impedance looking into that port of the device.S21, S12 equally important as these will influence input/output isolation.How you might load the transistor for a specific application though is a completely separate matter.S params are small signal params. You can measure hot S params, also.

author: pdenisowski
author_rank: Super Contributor
timestamp: June 06, 2024, 09:58:33 am
content: Quote from: glenenglish on June 06, 2024, 08:35:41 amI was just about to say this: A hot S22 measurement (i.e. one where drive power is being applied to the amplifier input) gives a much more accurate indication of amplifier output match during "normal" operation. It's also a somewhat harder measurement to make

author: mag_therm
author_rank: Frequent Contributor
timestamp: June 06, 2024, 11:58:08 am
content: The S parameters can be converted to Z11 and dB_of_S21 etc.This model is of a discrete transistor antenna amplifier showing the conversions in the lower tabulation.https://app.box.com/s/4xah5d2jegu7ps5ic8g2fv0a0mz9hhp6

author: G0HZU
author_rank: Super Contributor
timestamp: June 06, 2024, 07:13:54 pm
content: Quote from: jamfletch on June 05, 2024, 08:00:25 pmThe (small signal) output impedance of the transistor can be computed from the reflection coefficient at port 2 of the VNA (s22).Up at VHF, something like a jellybean 2N3904 BJT (in common emitter at 10Vce and 5mA Ic) will typically have an output impedance of about 400 ohms (resistance) in series with about -300 ohms (reactance). This assumes the base of the BJT at port 1 is driven directly by the 50 ohm port resistance of the VNA. Obviously, the output impedance of the BJT will change if the input of the BJT is driven with a source that has a different impedance to the VNA.In this case, to get maximum gain up at VHF (say 70MHz), the optimal load impedance at the collector would be the complex conjugate of (400, -j300).Up at 70MHz, the 2N3904 might then achieve a gain of about 19dB if the output is conjugately matched and the input is driven from a 50 ohm source.

author: G0HZU
author_rank: Super Contributor
timestamp: June 06, 2024, 08:42:11 pm
content: I don't know if this helps, but I put together some simulations using an old s2p model of the 2N3904 BJT at 10Vce and 5mA Ic.You can see that the output impedance at 70MHz is about 402, -j335 as predicted. You can see in the last plot that the s22 plot in the top right corner shows a good match at 70MHz as the port 2 of the simulator has been set to the complex conjugate at 400, j335.The gain when conjugately matched is about 19.3dB at 70MHz. This is as high as the gain will go here. Any attempt to change the load impedance will result in a reduction in gain.The other image shows a typical implementation using an LC matching network. This uses a high Q inductor (low loss) so the gain almost hits 19.3dB at 70MHz.Sorry, but the plots are in the wrong order. Look at the bottom plot first to see the output impedance of 402, -j335 at 70MHz and the s21 gain of 19.3dB when port 2 is set to the conjugate match of 402, j335 ohms.The smith chart plot shows the design of the matching network.The GMAX plot in the last plot shows that up to 22dB gain is possible at 70MHz if both the input and output of the BJT are power matched. K is above 1 above 70MHz so some care would be needed in the design if both the input and output of the BJT are matched. Otherwise there could be instability somewhere below about 70MHz.However, in this case, only the output is matched and this means the gain drops to about 19.3dB at 70MHz.

author: jamfletch
author_rank: Contributor
timestamp: June 08, 2024, 05:46:17 pm
content: Thanks for the simulation workIf we have our transistor, and make an S11 measurement (Assuming there's infinite reverse isolation, otherwise the finite output to input isolation would mean that the output match has an effect on the impedance looking to the input), we yield a Gamma/Return Loss measurement which is our input match to this device, and from this we can calculate the input impedance of the transistorIf we do the same with our transistor, and measure the S22, is this reflection coefficient the same as what would be seen from the output of the transistor? I've attached a picture to show what I'm getting at. In this case we have the L and C of the output impedance of the transistor like you've mentioned. Does this only hold in an ideal world, with infinite isolation between input and output such that S22 can become our impedance measurement? My intuition here is that because we're effectively looking at a passive reciprocal network, you could deduce the output impedance looking out of the transistor from the S22 measurement?I should probably review Pozar, as I imagine he probably gives the equations to convert S-Paramaters to equivalent impedances in a 2 port network. Is this what you and also Mag_therm have done, you've done some maths/used tools in software on the S-parameters of the transistor to find the output impedance of the transistor (effectively accounting for finite isolation), and from there, you've used the smith chart to design a matching network given a specific impedance at 70MHz?

author: mag_therm
author_rank: Frequent Contributor
timestamp: June 08, 2024, 10:02:55 pm
content: Hi jamfletch,Pozar looks good, I just ordered a used student edition 4.If your first query is about S parameter method being valid for infinite impedances between 2 & 1(in a common emitter transistor hybrid pi, Z of zero Cbc and infinite rbc)Then the S21 for a common emitter will still show a positive gain due to gmVbe.For your second query, S22 can be converted to Z_of_S22. If Z22 has reactive component (example with transistor's Cce), then the load line becomes eliptical (for a pure resistive load) , reducing the common emitter gain a bit, and maybe reducing the 2nd harmonic.In my reply #4, yes, I used the functions available in qucs to calculate Z_of_Snn.A few weeks ago I tried two websites for conversion of S to Z.; both gave different results.In one, I tried entering rectangular then polar, then negating the off diagonals, but still could not get agreement.So I will just trust the qucs. 55 years ago in eng. school, we had to do complex Tx line reflection/SWR using a slide rule and Smith.Now we have vna and sim.

author: G0HZU
author_rank: Super Contributor
timestamp: June 09, 2024, 12:29:28 am
content: All a classic small signal VNA can provide you with is s11, s12, s21 and s22 in steady state. This data can be post processed in a simulator to provide more information.I could repeat my simulation with the BJT flipped around so port 1 feeds into the collector and port 2 is at the base. If I measure s22 at the base it might be 28, -j26 at 70MHz if the collector is driven by the 50 ohm source impedance of the VNA.If I drive backwards through the BJT from the collector to the base, then I will get maximum power transfer (albeit a very lossy transfer) if I change port 2 to have an impedance at the complex conjugate at 28, j26 at 70MHz. Port 2 would then be power matched with respect to the base of the BJT. However, this will all change if I change the source impedance driving the collector because we can all agree that there isn't infinite isolation in the BJT.

author: paul@yahrprobert.com
author_rank: Regular Contributor
timestamp: June 11, 2024, 01:09:55 am
content: If you define the current at the port as positive for current into the port (the standard meaning), then the impedance is the usual meaning of positive for, say, a simple resistance inside the device. In terms of S22, the impedance isZin = z0*(1+S22)/(1-S22). To check, if S22 is zero (no return wave), then Zin = Z0. If you define the current oppositely as positive for currents out of the port, then the Zin comes out of the opposite sign. But nobody uses this convention, because it is silly to say the output impedance of my perfectly matched amplifier is -50 ohms.

author: mtwieg
author_rank: Frequent Contributor
timestamp: June 11, 2024, 01:36:28 pm
content: Quote from: jamfletch on June 08, 2024, 05:46:17 pmNot sure why you would assume perfect reverse isolation in the circuit. Proper use of the S parameters requires no such condition.QuoteNo. S parameters (including S22) are only a characterization of the device/network under test. The impedances seen by the DUT looking towards the outside world are, of course, completely independent of the DUT itself.It's unclear what exactly gamma0 represents in your figure, or why you replaced S22 with gamma22. Gamma and S can mean very different things, depending on context...

author: jamfletch
author_rank: Contributor
timestamp: June 11, 2024, 06:39:01 pm
content: Quote from: mtwieg on June 11, 2024, 01:36:28 pmI think I've formulated my question rather poorly, I've had a think about what I'm trying to actually ask, and hopefully this provides some more information:When we measure the S11 of a device, we insert a voltage wave V1+ into port 1 of the DUT, and we can measure V1-, the reflected wave due to any impedance mismatch between Z0, and the input impedance of the device. I can fully accept that the input impedance of a transistor/whatever determines the mismatch and therefore the S11.We do something similar for S22, but we are injecting a signal into the output port of the device. We then measure V2+ and V2-, and calculate our reflection coefficient at port 2.What I'm struggling to get my head around is that typically, port 2 serves as the output for an amplifier or some other device. When we use port 2 as an output, voltage and current waves exit the device, and travel along a transmission line to a load (and voltage waves are reflected back in the opposite direction). So in the opposite direction to our actual S22 measurementSay the output impedance of the device, like G0HZU's example, is 402-j355. Even though with S22 we measured into the device externally, if a voltage wave exits at the output of port 2, does this see the same mismatch that the S22 measurement sees?I assume the answer is yes, because all we have done is flipped the polarity of the reverse/incoming voltage waves, but for some reason I find it conceptually hard to convince myself.

author: RoV
author_rank: Regular Contributor
timestamp: June 11, 2024, 09:29:06 pm
content: Quote from: jamfletch on June 11, 2024, 06:39:01 pmThe answer is no! Look at this simplified circuit, where the device output is represented by means of its Thevenin equivalent:The impedance looking from outside is Zout. The impedance seen by a wave exiting the device is ZL (e.g. cable+antenna impedance). They are independent (Zout depends on the device, ZL depends on the load). For a power amplifier it is quite common to have Zout much lower than Z0, while ZL is very close to Z0: this allows a high efficiency.Obviously you can convert Z to gamma, it's just math.I see you insist on confusing gamma_out with S22. As you have already been told, they are not the same in general, but only if the source impedance of your amplifier is exactly Z0.

author: paul@yahrprobert.com
author_rank: Regular Contributor
timestamp: June 11, 2024, 11:19:52 pm
content: Maybe the way to look at this is this:The forward voltage from the output is determined by 2 things:1)the input wave, multiplied by S21-plus-2)the wave reflected back by any output mismatch, multiplied by S22And that's all! (unless some nonlinear thing crops up)Any internal mismatches that interfere with the signal getting out are rolled up into the two parameters S21 and S22

author: mtwieg
author_rank: Frequent Contributor
timestamp: June 12, 2024, 11:29:02 am
content: Quote from: jamfletch on June 11, 2024, 06:39:01 pmA few things to keep in mind:1. All network parameters (S, Z, Y, etc) do not distinguish between "inputs" and "outputs". A port is just a port, and the matrix just describes how conditions at one port affect other ports (so long as it's linear).2. Measuring S parameters requires that all ports be terminated with the system impedance Z0. This is actually fundamental to the definition of S parameters. Because the ports are terminated with Z0, any waves exiting the DUT will be totally absorbed at the ports, nothing is reflected back towards the DUT.3. Obviously in practice you might not actually terminate all ports with Z0. In such cases, the S parameters of that DUT are still useful for modelling its behavior. For example with a 2 port network, if port 2 is terminated with some load with a reflection coefficient SL(which is equal to (ZL-Z0)/(ZL+Z0)), then the reflection coefficient Sinobserved looking into port 1 is given by the equation Sin= S11 + (S12*S21*SL)/(1-S22*SL). Deriving these equations might be a useful exercise for you. Similarly, the observed reflection coefficient Soutlooking into port 2 the output for an arbitrary source on port 1 with SS= ZS-Z0)/(ZS+Z0) will be Sout= S22 + (S12*S21*SS)/(1-S11*SS).4. Let's consider a case where port 2 (the "output") is terminated with some impedance ZLand the impedance looking into port 2 is Zout, and neither of these are equal to Z0. We could also define a reflection coefficient at this junction as Sout = (Zout - ZL*)/(Zout + ZL*). This Sout is not equal to the one defined previously, but is still a useful metric for characterizing things (maximum power transfer, for example). Unfortunately, even textbooks are often sloppy with how they define things, so ambiguities are common even for experts.

author: mtwieg
author_rank: Frequent Contributor
timestamp: June 12, 2024, 12:31:19 pm
content: It's probably clearer to walk through some of this while working with real numbers. I'll take G0HZU's example, where his amplifier has an output impedance Zout = 402-j335 (when the input is terminated with Z0=50). I'll just consider this output port for now. Here's a bunch of ways we could describe it when the output port is terminated with Z0=50.1. The output impedance of the DUT is Zout = 402-j3352. The load impedance is ZL= 503. The load reflection's coefficient SL(referenced to the system impedance Z0) is SL= (ZL- Z0)/(ZL+ Z0) = (50 - 50)/(50 + 50) = 04. The output reflection coefficient Sout looking into the output of the DUT (referenced to the system impedance Z0) is Sout = (Zout - Z0)/(Zout + Z0) = (402-j335 - 50)/(402-j335 + 50) = 0.8572 - j0.1058.5. The reflection coefficient of the load (referenced to the DUT's output impedance Zout) is S = (ZL- Zout*)/(ZL+ Zout) = (50 - (402-j335)*)/(50 + (402-j335)) = -0.1481 - j0.85096. The reflection coefficient of the DUT's output (referenced to the load impedance ZL) is S' = (Zout - ZL*)/(Zout + ZL) = ((402-j335) - (50)*)/((402-j335) + 50) = 0.8572 - j0.1058Now let's say the terminating impedance is the complex conjugate of ZLinstead of the system impedance Z0:1. The output impedance of the DUT is Zout = 402-j3352. The load impedance is ZL= 402+j3353. The load reflection's coefficient SL(referenced to the system impedance Z0) is SL= (ZL- Z0)/(ZL+ Z0) = (402+j335 - 50)/(402+j335 + 50) = 0.8572 + j0.1058.4. The output reflection coefficient Sout looking into the output of the DUT (referenced to the system impedance Z0) is Sout = (Zout - Z0)/(Zout + Z0) = (402-j335 - 50)/(402-j335 + 50) = 0.8572 - j0.1058.5. The reflection coefficient of the load (referenced to the DUT's output impedance Zout) is S = (ZL- Zout*)/(ZL+ Zout) = (402+j335 - (402-j335)*)/(402+j335 + (402-j335)) = 06. The reflection coefficient of the DUT's output (referenced to the load impedance ZL) is S' = (Zout - ZL*)/(Zout + ZL) = ((402-j335) - (402+j335)*)/((402-j335) + 402+j335) = 0The only reason all of these numbers can possibly make sense together is because I've carefully stated what reference impedance is used in each case, and the which direction we're looking (towards the DUT or away). Most literature is not nearly so careful though. Often you can assume that the reference impedance is always equal to Z0=50, but in some cases this isn't the case (such as power amplifiers, where maximum power transfer is of interest).

author: G0HZU
author_rank: Super Contributor
timestamp: June 12, 2024, 09:37:35 pm
content: Thanks. To add some credibility to my s-parameter model of the 2N3904, I built the 70MHz (2N3904) amplifier this evening and tested it on a VNA. You can see the gain was at 19.2dB at 70MHz as predicted by the s-parameter model. The 2N3904 I used came from the same bag as the one I measured the s-parameters on a couple of years ago.The s22 measurement shows a less than perfect match but I used a 12pF cap with 5% tolerance and the ideal capacitance should have been about 12.8pF. The gain looks good though

author: G0HZU
author_rank: Super Contributor
timestamp: June 12, 2024, 09:53:46 pm
content: I tried making up the 12.8pF capacitance using two caps in parallel (8.2p and 4.7p) and this is closer to the correct capacitance.See the plot below. The output match is quite good now

author: LM21
author_rank: Regular Contributor
timestamp: June 12, 2024, 11:53:11 pm
content: At low frequency the collector current does not depend on collector voltage. That means that transistor's collector impedance is high.When the transistor is used as an amplifier,, some collector resistance or coil is connected between collector and power supply. That resistance or coil (impedance of) is then equal to output impedance. Because it is smaller than transistor's impedance.When frequency rises, you'll get more and more difference to this simplification. Stray capacitances, phase and so on.

author: jamfletch
author_rank: Contributor
timestamp: June 14, 2024, 07:39:34 pm
content: Thanks RoV, mtwieg & paul for the commentsand thanks G0HZU for doing some measurements too! I think I'll have a go at making a 2N3904 amp and trying to match the output to fully cement the ideas in my head.So I think I'm understanding this better now...The reflection coefficient depends on what impedance you define it to. So therefore, S22 looking into the output is different from the reflection coefficient looking from the output of the transistor to the defined impedance you measure your S22 with (Z0), which in most cases is 50 Ohm.We can use an S-parameter to Z-Parameter transformation to find the output impedance of the transistor.When we design a matching network for S22, we want to match our defined Z0 for the S-parameters to the impedance we see at port 2.Say we design a perfect matching network at a single frequency for S22, we minimise the reflection coefficient in both directions. Making an S22 measurement, we should yield a result of 0. The output impedance of the transistor "looks like" 50 ohms from port 2. This would work the other way too. The output impedance of the transistor "sees" a match to 50 ohm. Have I got this correct?I've done a quick simulation of G0HZU's matching network. I've set the port impedance to 402-j335, we see we obtain a 2 way match.If we take the magnitudes of mtwieg's calculations of the reflection coefficient looking into and out of the DUT, we can see they are the same. The difference in their complex values of reflection coefficient is in their phase angle, due to the sign difference when you calculate (Z-Z0)/(Z+Z0) and (Zl-Zout*)/(Zl+Zout)Please feel free to point out anything that I've got wrong, but I feel like I'm approaching agreement with all the posts so far?

author: mtwieg
author_rank: Frequent Contributor
timestamp: June 15, 2024, 12:18:05 am
content: Quote from: jamfletch on June 14, 2024, 07:39:34 pmYou're getting there. Keep in mind that the term "match" can mean totally different things depending on context. Often it means conjugate impedance matched (maximum small-signal power transfer), but other times it just means "optimal", which is sometimes very far from the conjugate impedance condition (noise matching, optimal power matching, etc). I think for this discussion we're concerned with conjugate matching (to maximize small signal power gain of the amplifier).QuoteYes, the matching network would transform the output impedance at the collector into Z0 at the output of the matching network.QuoteThe transistor, looking from its collector towards the matching network, would see a conjugate match, i.e. 402+j335 in this case.QuoteGood job noticing that, it's no accident.I highly recommend finding and reading the paper "Power Waves and the Scattering Matrix" by K. Kurokawa, which provides the description of what S parameters are in a truly general sense, and explains the difference between "power waves" and "travelling waves", and how they have subtly different definitions of the reflection coefficient. One very useful property of the power wave reflection coefficient (s = (ZL- Zi*)/(ZL+ Zi)) is that for a passive and lossless network (i.e. made of only inductors and capacitors), the power wave reflection coefficients seen at the input and output have the same magnitude. So if one side sees a conjugate impedance match (meaning s=0 at port 1), then the power wave reflection coefficient seen at port 2 will also be equal to s=0, which by definition means that port 2 also has a conjugate impedance match.

author: G0HZU
author_rank: Super Contributor
timestamp: June 15, 2024, 02:31:28 pm
content: The other thing to bear in mind is that the s22 measurement can go outside the smith chart, i.e. the magnitude of the reflection coefficient can be greater than 1 and this depends on the termination at the base.In the case of a common emitter amplifier, this can happen if a shunt inductance is fitted at the base. This means the real part of the impedance seen at the collector will turn negative. With a 2N3904, this can happen across LF through to lower VHF. It depends on how much inductance is fitted at the base. 1uH would typically produce negative resistance across about 2MHz to 10MHz. A smaller value of shunt inductance like 33nH might produce negative resistance at the collector across 20MHz to about 60MHz. I think that a much larger inductance (>150uH?) would generate negative resistance at the collector below about 1MHz.

author: Joel_Dunsmore
author_rank: Regular Contributor
timestamp: June 24, 2024, 07:26:13 pm
content: Quote from: pdenisowski on June 06, 2024, 09:58:33 amAnd it is a bit difficult to measure correctly.For most purposes the conjugate of S22 is the impedance that allows maximum power transfer to the load, which is usually desired. For linear devices the S22 if fixed and measuring the reflection looking from port 2 into the DUT is fine. But for large-signal amplifiers, the actual RF power going out will change the effective output impedance of the device. And further, the load you apply can also affect the output impedance of the device in a complicated way. Consider an amplifier that is 50 ohms output impedance that puts out 1W, with 1V RMS (1.41 V peak) and 1Amp, into 50 ohms. But if it also has a diode across the output, the output voltage waveform will be clipped to 0.7 V as the voltage peaks. If you terminate it with a low impedance, the clipping won't occur and you can get more power out of it than if you terminate it at 50 ohms, even though the small signal impedance (that is the low power impedance) is 50 ohms. The diode is kind-of representative of things like drain-to-gate breakdown that causes various limitations of the DUT.So, to accurately assess the output impedance of a DUT, you have have to load it with the load you want to use and then perturb the output impedance slightly and watch what happens to voltage and current and power delivered. This is what a load-pull system does. Then you find the load that gives maximum power output and that is the conjugate of the Hot-S22.You can also use electronically developed loads for this purpose.For all the gory details you can check out pages 413-433 of my book (www.tinyurl.com/JoelsMicrowaveBookfor those that don't already know it). too much info for a post.In short: It's simple if the amplifier is operating in small signal, S22*=optimal load. It's the same for hot where Hot S22*=optimal load, but much harder to determine Hot S22. And it does make a difference. At one cusotmer, the max power rating changed by 1.5 dB from nominal S22 to the Hot S22 value.

author: jamfletch
author_rank: Contributor
timestamp: June 24, 2024, 08:03:44 pm
content: Think I've managed to make an oscillator rather than an amplifier... G0GZU, please could you send your schematic for your 2N3904? I'm curious to see your bias setup. Many thanks

author: G0HZU
author_rank: Super Contributor
timestamp: June 25, 2024, 06:47:28 pm
content: It's not obvious what bias point you have gone for but it is probably less than 3mA. Either way, your simulation shows a reflection coefficient greater than 1 at about 70MHz and this is a bit unusual for a 2N3904 in your circuit. This indicates negative resistance is present at the input and this is bad for stability.Can you plot the K factor for just your 2N3904 using your simulator?In my case, I plotted K as in the plot below and it showed K was above 1 just above 70MHz for the BJT on its own. So I designed an amp at 70MHz. See the K factor plot below that shows the BJT on its own (the second image below).At lower frequencies than 70MHz K is less than 1 and the circuit is only conditionally stable. At these lower frequencies, having an inductive load at the collector will cause negative resistance at the base. This makes this type of amplifier very prone to instability if this is the case. That's why I chose 70MHz as K was above 1 here. So I could add a tuned load without generating negative resistance at the base at 70MHz.See the second image below for the K plot for my 2N3904. A typical common emitter BJT will show K below 1 at lower frequencies. Up at VHF this will eventually rise above 1 and stay there until some point up at UHF where it will often dip below 1 again.I'm not sure how accurate your Spice model is for a 2N3904. Try plotting K factor at 10V and 5mA Ic and compare it to my real measurement below.If I had tried to design an amplifier down at (say) 20MHz where K is less than 1 I would have to add some damping resistance somewhere to prevent negative resistance at the base at 20MHz after I add a tuned load to the output tuned to 20MHz. The negative resistance usually occurs just below the resonant frequency of the output network. This is the region where the output load at the collector looks to be net inductive.It's generally a good idea to add some damping resistance anyway as this can then achieve unconditional stability at all frequencies. I usually plot K and B1 factors when looking at this stuff.Adding the 680R shunt resistor R1 at the output of the tuned amplifier gets K above 1 everywhere. This causes a small reduction in gain but this is worthwhile as the amplifier is then unconditionally stable at all frequencies. See the first plot below.

author: jamfletch
author_rank: Contributor
timestamp: June 25, 2024, 09:22:46 pm
content: here's what I've got when Ic is biased to 5mA at 10V. My stability factor is <1 beyond 2MHz, I've also tried another SPICE model for the 2N3904, and I get different results, but I'm wondering if this is an issue with me importing the file into QUCS Studio,What Bias circuitry did you use for the results you measured on the VNA? Was it with a grounded emitter, or degenerated?Would you be able to send your .s2p file too?Also, out of curiosity, what software are you using for your simulations? It looks like uW Office?Many thanks

author: G0HZU
author_rank: Super Contributor
timestamp: June 25, 2024, 10:02:36 pm
content: R4 is wrong at 2k as you only have 1V at the collector. Change it to 100R or less and then adjust the potential divider to get 5mA collector current.I used very basic biasing but the emitter was ac grounded. The SW I’m using is Eagleware Genesys. It’s 20 years old, but is still very good.The input cap value is quite low at just 24pF.

author: Joel_Dunsmore
author_rank: Regular Contributor
timestamp: July 04, 2024, 03:43:26 am
content: Quote from: mtwieg on June 12, 2024, 11:29:02 amSmall nit to pick: Measuring S-parameters can be done in any impedance. The impedance of the VNA (expressed as a reflection coefficient) is an/bn. And so we have a relationship between a's and b's at each port (a and b waves being a kind of sqrt of power wave, quite related to a voltage wave) . So S-parameters can be measured into any impedance and use eqn 1.21 of my book to solve for the s-parameters.BUT: this is only true, of course, when the DUT is operating as a linear device. All this math goes away when the DUT is operating non-linearly.

author: jamfletch
author_rank: Contributor
timestamp: July 08, 2024, 07:14:58 pm
content: Just a quick update. I've made a 2N3904 common emitter amplifier with an output matching circuit, used with components I have lying around. The output match and gain at 100MHz are respectable. The gain is lower than I simulated though, possibly due to inductor losses?

author: jamfletch
author_rank: Contributor
timestamp: July 08, 2024, 07:16:54 pm
content: Output match measurement attached