Having trouble with Lattice MachXO3L FPGA [SOLVED] - Page 1
Forum section: electronics / general

author: Tainer
author_rank: Contributor
timestamp: July 05, 2015, 03:28:19 pm
content: I've recently bought MachXO3L starter kit. When I was uploading my bitstream file I accidentally selected 'NVCM Erase,Program,Verify' in diamond programmer. So I've done 'NVCM Erase', tried programming SPI flash again but ended up with the following error:Code:INFO - Device1 LCMXO3L-6900C: LCMXO3L-6900C: Verify IDERROR - Verification Error...when Processing function: 'CHECK_ID'After that I looked at the programming manual and read the following:QuoteSo basically I've already written to the nvcm twice. On the other hand, if I select 'SPI Flash Erase,Program,Verify' instead of 'SPI Flash Background Erase,Program,Verify' I can upload the bitstream file into the SPI flash without problems. Unfortunately, FPGA does absolutely nothing (8 leds are lit all the time). My guess is - it tries to read configuration from nvcm instead of external flash for some reason.Is there a way to 'unbrick' this thing?edit:I can confirm that by programming SRAM I can get the FPGA working, but obviously the configuration will be erased once I power cycle. I assume I need to find some way to tell it to boot from SPI flash instead of NVCM.

author: Macman
author_rank: Regular Contributor
timestamp: July 05, 2015, 11:50:05 pm
content: I don't have any experience with MachX03L myself but from what I understand you have to use the feature row editor to change the configuration bits so that it loads from SPI flash and then download the feature row to the FPGA. The feature row memory can be updated a maximum of eight times.

author: Tainer
author_rank: Contributor
timestamp: July 06, 2015, 02:53:26 pm
content: Thanks a lot, Macman. I've set BootSelect[2:1] and MSPI_Persistent_Enable bits to 011 and now the FPGA boots properly.Too bad the feature row can only be flashed a couple of times. I'd better be more careful with this GUI programming tool..

author: ale500
author_rank: Frequent Contributor
timestamp: July 11, 2015, 04:26:13 am
content: Just curious, have you used the MachXO2 devices ? Is there any differences between the two ? in paper they both seem pretty similar... does it compile for Machxo3 faster ?

author: Tainer
author_rank: Contributor
timestamp: July 12, 2015, 11:33:26 pm
content: Unfortunately I haven't used other Lattice devices (in fact this is my very first FPGA). Although I was intending to use this board for prototyping only and switch to XO2 in the final design, since XO3 is available in BGA packages only and I don't do BGA. Compile time seems reasonable. Flashing (via ftdi) does take a while - haven't noticed much difference between flash or sram upload.

author: peepo
author_rank: Contributor
timestamp: January 04, 2016, 08:15:30 am
content: I have related issue: ERROR - Verification Error...when Processing function: 'CHECK_ID'however on MachXO3LF with ubuntu14.04can anyone advise?

author: joy586210
author_rank: Newbie
timestamp: January 18, 2016, 04:29:53 pm
content: Many thanks, it solved my issue.Now I can boot from external spi flash with my machxo3l now!It seems that nowhere to get details about feature row!

author: helge
author_rank: Regular Contributor
timestamp: January 18, 2016, 11:30:18 pm
content: Feature Row is part of the system configuration and programming and documented here (p.8 and below):http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO3ProgrammingandConfigurationUsageGuide.pdf?document_id=50123QuoteI stumbled upon the FeatureRow structure when I implemented SPI, seehttps://www.eevblog.com/forum/microcontrollers/machxo3-sn-pin-i-think-i'm-screwed/The SN pin (for programming only or available for GPIO when you disable EFB SPI altogether, d'oh!) trolled me pretty good.

author: joy586210
author_rank: Newbie
timestamp: January 19, 2016, 05:58:32 am
content: Thanks helge for your quick response, you are so nice!Maybe TN1279 on my hand is not the latest version!! It's ver 1.4But the latest is ver 1.6!

author: gfrans
author_rank: Newbie
timestamp: March 19, 2016, 05:30:15 am
content: I registered just to say "thanks" to everyone that posted in this thread (if anyone is listening); I was bashing my head against the same problem for days!This is also my first Lattice product, and it's a little frustrating that this model-specific feature is not mentioned at all in the quick-start guide for the breakout board I purchased. I'm not even sure how I managed to overwrite the feature row in the first place.Anyway, cheers!

author: dal3boy
author_rank: Newbie
timestamp: March 22, 2016, 02:29:43 am
content: Hi allAs I'm new to FPGA, got MachXO3 board and now have same issue, as I'm new to this world and don't want brick my boardCan someone guide me to solve this, I'm on Ubuntu 14.04 and Diamond 3.7Please help me with this configurator/setting as I don't fully understand what have to do to make it workingThanks

author: vignesh_shan
author_rank: Contributor
timestamp: October 16, 2018, 11:02:34 am
content: Hi,In Machxo3l (MachXO3 Programming and Configuration Usage Guide), There says"MachXO3L multi-time (up to nine times) programmability through non-volatile technology (NVCM)". Is it but in some websites(link:https://huiminee.wordpress.com/2016/10/03/boot-select-feature-row-spi-external-flash/) and older documents there says nvcm is two times programmable. which one is correct ?? Is any one worked on this ? pls advice if know.