The Impact of Nonlinear Capacitance on Switching - Page 1
Forum section: electronics / projects

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 18, 2019, 01:21:59 pm
content: Consider this switching circuit, showing the 2nd order model (basic parasitics):If there is a current I_L flowing out through L, and Q is off and D is on (assume D is automatic -- a diode, and Q is driven -- a transistor), then I_L flows through D, V_sw is held to ground and V_in drops across Q and its capacitance.This is the setup for a "hard switching" event. When we turn Q on, I_L is shunted away from D (which turns off), and V_sw swings up to V_in. This happens eventually, but a few things have to happen first:1. Q discharges its capacitance, burning switching loss,2. C_D is charged, eventually to V_in,3. L_s is charged, eventually to I_L, but with a peak due to the charging current drawn by C_D as well,4. Also, if it's a PN junction diode, its reverse recovery -- or the C_D equivalent to it.This is called commutation.Note that L_s is also in series with ESL_in (assuming the source V_in doesn't have a low impedance, which is the typical case -- for example, leads from a distant power supply, having considerable inductance and/or resistance). I'll be referring to the pair as just L_s, but remember that it shows up throughout the circuit -- in D, and in the wires between everything, as well!The waveforms below show approximately what happens: L_s resonates with C_D (C_Q is shorted out by Q), giving a peak overshoot due to the amount of excess current charged into L_s during commutation. The ringing frequency is approximately 1 / (2*pi*sqrt(L_s * C_D)) and the resonant impedance is sqrt(L_s / C_D).A note about speed. This is the worst case condition, where the resonant period is longer than the switching device rise time. If switching is slowed down, the overshoot and ringing will decrease (at the expense of switching loss).This condition is surprisingly difficult to avoid with modern transistors (more about this later). The stray inductance of a TO-220 package alone is considerable (about 7nH at the leads, when inserted flush into a board), and with switching speeds in the 10s of nanoseconds (even for fairly generous sized gate resistors), we can't simply ignore this (as past advice -- "minimize stray inductance" -- told).Now, suppose we have a half bridge with two identical transistors. It doesn't matter that D is a diode that turns off automatically; we can recreate the same situation with transistors and the appropriate timing.Consider this transistor,https://www.st.com/content/ccc/resource/technical/document/datasheet/group3/98/a6/87/ed/af/cd/48/21/DM00099972/files/DM00099972.pdf/jcr:content/translations/en.DM00099972.pdfspecifically Fig. 10, capacitance. Note how Coss (and Crss as well) absolutely tanks above about 10V.Note also the data tables, which show Coss a paltry (and useless) 56pF, since it's a spot value, measured at 100V (well into the dropoff range; in fact, some datasheets even show Coss rebounding slightly at high voltages, for which this would even be around the minimum capacitance!). So, we can disregard that item.There is also a Coss eq item. This is measured by charging the capacitance with a 100k resistor (from +600V), and measuring the rise time to 480V. This takes a long time to rise through the low voltages, then accelerates considerably as Coss drops off. Eventually (as the voltage gets near final) it slows down again, so you get a sigmoidal waveform. At the 480V threshold, it's not slowed down much.You get a similar result if you use a constant current, again, since a lot of time is spent at low voltages where the capacitance is high.The point of all this is this question:What kinds of equivalents might we be interested in, to describe Coss?There is also the energy equivalent Coss, which for this part is around 47pF (some datasheets give this figure; this one doesn't happen to, but it is easily calculated from Fig. 11, using Ceq = 2*E / V^2).The energy equivalent is handy for getting a quick idea of how much hard-switching loss is due to the transistor itself switching on -- step 1 in the earlier list. (We'd just as well stick with energy as-is, since energy * frequency = switching loss.)What else? Well, it would be nice to have an equivalent to work with hard switching. The problem is this: how much energy is stored in L_s during commutation? It's not simply the energy in the capacitor -- it would be if the capacitance were constant, but it's heavy off to the low-voltage side, which puts the balance of the voltage across the inductor. The inductor absorbs way more energy than the capacitor does!So for this condition, I have created a crude equivalent, that's more reasonable for an inductive switching loop. It is the current-ramp equivalent capacitance. It works by setting a ramping source current, and calculating how much time it takes to rise.The current ramp emulates the dI/dt set by L_s. Specifically, dI/dt = V_in / L_s. This method will underestimate the time required, because a real inductor's dI/dt drops to zero as its voltage drop crosses through zero, whereas this keeps on going. The time taken at high voltages is fairly small, so this is excusable.Finally, we have one more option: energy or time equivalent under the ramp condition. The energy equivalent gives a C_D that produces the same peak current (and thus stored energy) in L_s (step 3). The time equivalent gives the same, well, rise time.For time,C_Teff = R t^2 / (2*V_in)For energy,C_Eeff = R t^2 / V_in(yup, just double Teff!)For current ramp R in A/us, rise time t in us, where the rise is from zero to V_in volts. C will be in uF. (Or whatever units you like, use Google Calculate to figure the rest out!)It's one thing to be able to measure this, but a current ramp (with high voltage compliance!) isn't the easiest thing to make. So we might fit curves from the datasheet, or use the simulation model if we can.This spreadsheet works that out:https://www.seventransistorlabs.com/Images/STW70N60_Capacitance_Worksheet.pngThis models the STW70N60M2, 24, and the 24's SPICE model (which, big surprise, is out by a factor of 2 from the datasheet -- nice going on that one, ST). On the '24 plots, red is my model, blue is their SPICE. On the '70 plots, blue is my model.As it turns out, a SPICE diode junction capacitance model fits surprisingly nicely. This is described by the parameters Cpar, CJO, m and VJ. Cpar is a regular (linear) capacitor in parallel, and the variable part is given by:C_J = C_JO / (1 + V / VJ)^mThe diode-ey-ness of the diode is disabled by setting IS = 1e-24 and N=10, so only its junction capacitance is relevant. (This may have to be modeled with a generic variable capacitor model instead, as some engines don't allow large m values on diodes for some bizarre reason...)For models of this form, there exists an analytical solution: we can derive the ramp equivalent capacitance by integrating the ramp waveform directly.Calculus warning: you are about to see a trained professional using calculus in their work!First, set up the equations. We have a capacitor, that we want to know the voltage across, as a function of time. Into the capacitor, we send a current, which also varies with time. The capacitor value varies as a function of its voltage. Assume V=0 at t=0.The fundamental capacitor equation gives us the relationship:i(t) = C(v) dv/dtWe have i(t) = R t (a linear ramp, of rate R), and C(v) = Cpar + Cjo / (1 + V/Vj)^m.Move dt to the left hand side, and integrate both sides. We have only t on the left side, and v on the right -- no separation of variables needed, that's a good start.We get:$$ \int R t \, dt = \int C_{par} + \frac{C_{JO}}{\left(1 + \frac{v}{V_J}\right)^m} \, dv $$$$ \frac{R t^2}{2} = v C_{par} - \frac{C_{JO} V_J}{(m-1)\left(1 + \frac{v}{V_J}\right)^{m-1}} + Q_0 $$Fortunately this is also an easy integral, and we have this symbolic solution. It's the implicit integral, so the "plus a constant" is on the right; Q is correct for the units, as this is in units of charge. We set t and v to zero to solve for Q_0,$$ Q_0 = \frac{C_{JO} V_J}{m-1} $$So we can wrap up by solving for time as a function of everything else. Which is just a matter of putting everything else on the right side. Easy! (Solving for v would be considerably more difficult! Is there even a closed-form solution for noninteger m, is that transcendental? I know I'd rather solve it numerically, in any case...)And so finally we have,$$ t^2 = \frac{2 v C_{par}}{R} + \frac{2 C_{JO} V_J}{R (m-1)} \left( 1 - \frac{1}{\left(1 + \frac{v}{V_J}\right)^{m-1}} \right) $$Take the square root of all that and you have your rise time!Wrapping everything up: what are typical values? Well, at 400V supply, STW24N60 does these equivalents:135pF -- Resistor-pullup time equivalent (that's 400V supply, 320V threshold)187pF -- constant current source (400V threshold)51pF -- Coss stored energy equivalent158pF -- current ramp, time equivalent316pF -- current ramp, energy equivalentNote that the equivalents don't depend on dI/dt. We getthe same switching lossdue to hard switching, independent of supply inductance L_s -- it only depends on the ramp energy equivalent parameter. And notice it's fully six times larger than the Coss energy equivalent! (That's 40uJ switching energy, or at 200kHz, that's 8W dissipated just due to this one factor.) This is why hard switching is so, well,hard, and why we take steps to control it, if at all possible.L_s does increase switching loss under load, mind -- it's carrying load current when Q is on, and that current (and energy) goes somewhere when turningoff. In both cases though (turning on and off), we have some hope of directing that energy somewhere useful, say with a resonant or peak clamp snubber. Knowing this, we can design the inverter for maximum switching losses at no-load and full-load conditions, and optimize for a midpoint maximum efficiency. And the value of L_s will be part of that design -- not merely willed to zero.Tim