Inverter Topologies: Trying to sort through them all. - Page 1
Forum section: electronics / projects

author: Wrydog
author_rank: Contributor
timestamp: October 03, 2016, 06:42:19 am
content: Hello all. I'm starting work on a grid-interactive inverter project using GaN FETs. We plan on using an H-bridge for the AC output but am having trouble ascertaining which DC-DC topology is best to boost our input to something useful.In my research I came across a book by a Fang Lin Luo which has many advanced typologies, some of which he's named after himself. It's a little overwhelming and I haven't been able to find a design source that can tell me generally what types are more efficient, which are better suited for hf, which has least THD, and so on.I've had a basic course which covered many of the classical types but I don't know what's best. I don't have the time to research and simulate all the different kinds. I hate to start with a more basic typology when there could be one that's better but I'll have to start somewhere.My question is: Aside from linear converters are most DC-DC converters roughly equivalent in terms of efficiency? What might a good one be? Push-Pull?

author: Phoenix
author_rank: Frequent Contributor
timestamp: October 03, 2016, 07:51:29 am
content: Quote from: Wrydog on October 03, 2016, 06:42:19 amHave you considered the common mode problem associated with a standard H-Bridge for a grid tie inverter? This is why commercial inverters use H5, H6, HERIC, NPC, unfolders etc.

author: Phoenix
author_rank: Frequent Contributor
timestamp: October 03, 2016, 08:41:01 am
content: Quote from: blueskull on October 03, 2016, 08:05:05 amFair enough, he doesn't need the benefits of 3 level switching.However you still will experience DC bus common mode during the dead-time even when using 2 level/bipolar modulation of a H-Bridge and it will only be worsened by fast transistors. Better to know about it before you start than wonder why your converter keeps stuffing up later.

author: Wrydog
author_rank: Contributor
timestamp: October 04, 2016, 12:33:59 am
content: Quote from: blueskull on October 03, 2016, 08:05:05 amFrom what I've read, what Pheonix is referring to is the injection of DC voltage to the grid. How does using GaN devices reduce this?

author: Phoenix
author_rank: Frequent Contributor
timestamp: October 04, 2016, 12:48:04 am
content: Quote from: Wrydog on October 04, 2016, 12:33:59 amWhat I'm referring to is the common mode on the DC bus with respect to earth, which is present using a 3 level (unipolar) PWM, causing large high frequency currents to flow through parasitic capacitances. This is theoretically not present using a 2 level (bipolar) PWM strategy.Using very fast switches reduces the need for the filter size advantages of 3 level switching since the filter will be small enough anyway.

author: Wrydog
author_rank: Contributor
timestamp: October 05, 2016, 03:50:17 am
content: Still a little confused.Earlier you said "you still will experience DC bus common mode during the dead-time even when using 2 level/bipolar modulation of a H-Bridge and it will only be worsened by fast transistors" and then later that this is theoretically not present when using bipolar pwm.Can you elaborate?