CD4043 latch issue breadboard VS PCB - Page 1
Forum section: electronics / projects

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 02:20:52 am
content: Hello everyone,I am working on a circuit which contains CD4043 R/S latch. The design on the breadboard works and everything is great, as soon as the PCB was manufactured and components were soldered, an issue with the latch arose.I use the switch-button on the SET input to initialize the latch and for the restart. But somehow on the output, I always get 0 with no matter what is on RESET input. The exception is when the button is actually pressed, then I have 5V.However, as I said before, there were no problems on the breadboard.What I did, but it doesn't help:1. All the unused latch inputs connected to the ground.2. Decoupling capacitors across VCC and ground.3. The design itself based on logic components. Calculated delay times, there should be still enough time for the latch to recognize 5V from the switch, but it somehow doesn't 'hold' it.4. First used SPDT switch, then replaced it with single pole switch + resistor, to avoid open circuit state at the moment of switch.Nothing has helpedPlease advice. If you need extra details I am ready to provide.

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 02:53:46 am
content: How did you get inverting and non-inverting outputs when CD4043 has only one output per latch? And then Why R3and S4, are they from different latches? This schematic is a complete mess. Also you cannot do that stuff with transistor.EDIT: I guess they are pin numbers on second thought. But you don't number pins like that.EDIT2: and what's with enable pin? If it's connected to GND, output will be in Hi-Z state.QuoteDraw the circuit as it actually is, instead of showing one thing and then describing that there is other stuff.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 02:59:51 am
content: They are pin numbers.I use inverter to get inverting output. The transistor is used as a switch for R input.SPDT versionSPST versiontempsnip3.PNG(30.4 kB. 690x681 - viewed 295 times.)Quote from: wraper on October 08, 2020, 02:53:46 am

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 03:01:31 am
content: Enable connected to 5VQuote from: wraper on October 08, 2020, 02:53:46 am

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 03:30:45 am
content: The big question is what happens with CD4023 A,B inputs?BTW you can replace U6, R16 and Q2 with one schottky diode from R1 to Q1 pins of U5. Or say you could use unused elements from U3 to replace all of that. Those parts are completely unnecessary.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 03:42:12 am
content: Basically they are the sums of 4.35V or 5V signals. 4.35V is a processed pulse signal.Quote from: wraper on October 08, 2020, 03:30:45 am

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 03:46:04 am
content: In my opinion, there is a frequency issue, i.e. low (breadboard) -> high (PCB) frequencies. But I have no idea neither how to check it nor how to fix.

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 11:17:55 am
content: Measure voltage on output of U3 while you keep pressing the button.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 02:37:02 pm
content: These values are known.When input signals (A,B) are 5V (i.e. R=0), and the button is pressed (i.e. S=5), output is high. as soon as I release the button (S=0V), R=0 (input A and B still 5V) , the output is low.

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 02:48:20 pm
content: What you wrote is exactly opposite of what it should be. CD4023 is a NAND gate so unless all of 3 inputs are high, output should be high.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 03:16:12 pm
content: output of the NAND or latch?NAND output is connected to RESET input.I meant the latch output

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 03:24:13 pm
content: When switch is pressed, Q should go high and NAND output should go low because all of it's inputs become high.QuoteI asked aboutU3. Not latch.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 03:36:00 pm
content: Ok. sorry,A, B, C = 5V, output is 0A, B =0, C=5V, output is 5V

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 04:00:28 pm
content: So when button is pressed, what voltage is there?

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 05:11:09 pm
content: When button is pressed0 if A and B = 5V5V if A and B=0V

author: wraper
author_rank: Unknown
timestamp: October 08, 2020, 05:43:19 pm
content: Try shorting collector and emitter of Q2 and see if latch holds output high after switch is released. If it does not then either U5 is faulty or you have some error on PCB.

author: Benta
author_rank: Super Contributor
timestamp: October 08, 2020, 06:19:24 pm
content: I can't say much about your circuit, as both schematics (hand-drawn and CAD) are unreadable.Using logic symbols for a schematic explains the circuit. Using IC pinouts makes it unintelligible and wastes people's time trying to decipher it.Glueing an FF and a gate together shouldn't be too hard. It would probably be even easier making the SR FF with a couple of gates.

author: IvetaS
author_rank: Contributor
timestamp: October 08, 2020, 07:22:51 pm
content: It does hold.Quote from: wraper on October 08, 2020, 05:43:19 pm