Can anyone help me complete my signal generator design? - Page 1
Forum section: electronics / projects

author: slow_rider
author_rank: Regular Contributor
timestamp: May 10, 2014, 06:25:52 pm
content: I'm working on this DC to 1MHz signal generator for a project. I am majoring in digital design for embedded systems so I lack experience designing anything analog, at least anything that is beyond a voltage follower.I am more of a programmer I guess...I'll appreciate any insight for better performing the task I am trying to do. I would ask not to write comments suggesting to do the entire thing differently if possible. There are a number of ways to get something done and the design considerations here are not necessarily those that you might have.The system consists of a DDS which generated a sine / triangle / square wave. The output is about 610mVp-p. The signal goes through a simple LPF that will be set over 1MHz and under the MCLK freq. which is yet unknown. If the clock freq. will be too close to 1MHz I'll upgrade the filter to an active design with a few polls. After the filter the signal is amplified so it will be 10Vp-p and fed into an MDAC which attenuates it as needed. The output of the MDAC is current so there's an op amp for I-V conversion. The op amp I am using won't have enough drive for 50 Ohm load so I used a buffer in the feedback loop.Now...1. I would like to add +/- DC offset to the voltage signal after the MDAC and still have the buffer on the output. How can I combine all that into 2 op amps or better 1? The DC offset will be generated by a bipolar DAC.2. I am not sure how the feedback for the I-V op amp should be hooked up, is this correct? What about compensation for time delay or parasitic inductance due to long loop?3. Am I going too far with part selection? Perhaps the op amps I am using are a bit too much (because they are expensive).4. The DC offset that will be added to the I-V stage should also act as calibration to the offsets gathered along the way, because I want very low freq. as well I am DC coupling everything.Thanks!

author: nctnico
author_rank: Super Contributor
timestamp: May 10, 2014, 06:52:43 pm
content: I'd use a programmable gain amplifier and an extra DAC for offset. Driving a signal into Vref probably doesn't work.

author: slow_rider
author_rank: Regular Contributor
timestamp: May 10, 2014, 06:54:48 pm
content: Why not? This is a multiplying DAC, that's how it is supposed to be used.

author: Bored@Work
author_rank: Super Contributor
timestamp: May 10, 2014, 07:29:14 pm
content: Quote from: slow_rider on May 10, 2014, 06:25:52 pmThanks for telling us in advance you won't listen and won't care. Saves us a lot of time.

author: slow_rider
author_rank: Regular Contributor
timestamp: May 10, 2014, 07:49:14 pm
content: Quote from: Bored@Work on May 10, 2014, 07:29:14 pmThat's not fair. You make it sound like I'm coming with an "attitude", well I am not. I am just trying to keep things in focus. Usually when you ask something like what I am asking someone comes along and suggests a different method and someone might suggest a different approach and it might lead to having a bunch of leads but misses the point of finishing one design.

author: dannyf
author_rank: Super Contributor
timestamp: May 10, 2014, 09:07:29 pm
content: DC offset: you may need to figure out if you want to do it digitally or not first. If analog, you can simply add an offset to the last buffer.Output opamp: look into some ADSL drivers. They tend to be CFB opamps with a buffer built-in (good for a few hundred ma) and up to 100s of Mhz. More than sufficient for what you are trying to do.Amplitude control: again, figure out if it needs to be digital or not first.

author: slow_rider
author_rank: Regular Contributor
timestamp: May 10, 2014, 09:26:55 pm
content: Quote from: dannyf on May 10, 2014, 09:07:29 pmThanks!Everything is done digitally. The DC offset is to be set using a bipolar DAC which should be mixed with the I-V stage after the MDAC. I've actually looked into an ADSL driver (AD815), it seems they have pretty high input current and because I am using an MDAC the output impedance is code dependent which means the linearity of the system will get hurt, I really need an op amp with low input current. Using the BUF634 in the feedback means that the output voltage offset is also mostly dependent on the op amp and not the buffer. Amplitude control is done by inputting 10Vp-p signal into the MDAC and using it to reduce the gain.