How should I work with this footprint? (124-pin VTLA) - Page 1
Forum section: electronics / projects

author: sebmadgwick
author_rank: Regular Contributor
timestamp: October 13, 2014, 11:51:40 pm
content: I am designing a device usingMicrochip's 124-pin VTLA Package. I have downloaded therecommended footprint from Microchip's websiteand I have read the design notes in the datasheet, but I am not sure how to trace this circuit.My problem is that the footprint traps the 'inner ring' of pads between the large central ground pad and the 'outer ring' of pads. There does not seem to be enough room for escape traces or vias.I have attached a screen shot with annotated dimensions.I am considering removing/reducing the central ground pad to makes space for mask plugged vias.Any advice would be welcome.

author: Falcon69
author_rank: Super Contributor
timestamp: October 13, 2014, 11:58:58 pm
content: WowMy guess is the pads are staggered for a reason.Traces go from the back pads between the front and out to whatever. Very Very small traces.If You reduce the center pad, make sure that you tint any vias under neath that chip.

author: Whales
author_rank: Super Contributor
timestamp: October 14, 2014, 12:04:23 am
content: Is it possible to sit the pads upon exposed vias?

author: sebmadgwick
author_rank: Regular Contributor
timestamp: October 14, 2014, 12:14:37 am
content: Quote from: Falcon69 on October 13, 2014, 11:58:58 pmThis would require 1.9mil traces/clearance!Quote from: Whales on October 14, 2014, 12:04:23 amI don't have experience of this. I understand there is a risk that the via siphons the solder away from the joint.

author: Falcon69
author_rank: Super Contributor
timestamp: October 14, 2014, 12:20:36 am
content: not if you get them tinted

author: nctnico
author_rank: Super Contributor
timestamp: October 14, 2014, 12:37:22 am
content: I would avoid these kind of packages. Soldering them correctly is not for every assembly house; it may take a lot of tweaking to get the solder paste mask right. The same goes for the extremely thin traces. They can be mass produced but finding a PCB house where they can do this for a reasonable price will be hard.

author: sebmadgwick
author_rank: Regular Contributor
timestamp: October 14, 2014, 01:00:40 am
content: Quote from: nctnico on October 14, 2014, 12:37:22 amI need the I/O and space is limited. My assembly house frequently deals with much more demanding parts but, as you say, PCB fab is separate issue. If the VTLA is a real problem then maybe I will have no choice but to use the TQFP variant and try to shrink the rest of circuit.I foundGerber files for a designusing a VTLA package.I've attached a screenshot.The design uses very thin traces, but...... the footprint seems to have significantly smaller pads than the recommended CAD file provided by MicrochipSome pads are exposed viasI am concerned that very thin traces and/or substituting pads for tinted vias is going to make PCB fab expensive or introduce new risks. The rest of the BOM is no smaller than 0402 passives or 0.5mm pitch QFNs.The above Gerbers answer most technical questions but I would be interested to hear if anyone else thinks this package should be avoided? Or perhaps someone has used it before and can recommend a few tricks?

author: ConKbot
author_rank: Super Contributor
timestamp: October 14, 2014, 03:57:42 pm
content: You're going to need filled Via in pad, or plated solid microvias. A one side tented via is going to be a big risk when it comes to solder reliability. It forces there to be an air pocket, plus paste amounts could still be fiddly at best. Yes its more expensive, but so is having to re-run boards because of assembly defects.

author: Corporate666
author_rank: Unknown
timestamp: October 14, 2014, 04:57:43 pm
content: Put the vias in the pads and use filled/capped vias. Myropcbcom is my go-to and they do this.a

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 14, 2014, 04:58:23 pm
content: In order of preference:1. Don't use it.2. Check the package drawing; side fillet can be pretty near zero, or even just a little bit under. If the pads are oversize, you're working against unnecessary challenge there. Also check pin/pad shape; if the corners can be rounded off, you can save more space between corners, maybe enough to be useful.3. I wouldn't be afraid of using via-in-pad here. A small (8 mil ID) via won't wick very much if any away; you can even use a larger via and plan for the correct amount of solder. (Likely, the GND pad won't need total solder coverage, unless you plan via-in-pad for it as well, which is usually slightly more recommended than otherwise.)4. You could try hiding tented vias under the edge of the GND pad, but..eeehh, yeah. You'll blow more DRC / DFM doing that than the alternatives. That might not be a problem (if the perimeter remains simple, the surface tension won't dominate over the aligning force of the other pads), but it won't be pretty.Tim

author: Rufus
author_rank: Super Contributor
timestamp: October 14, 2014, 05:18:14 pm
content: Quote from: sebmadgwick on October 14, 2014, 01:00:40 amMicrochip Direct show no stock, Findchips and Octpart show no stock anywhere - the package seems to be avoiding everyone.

author: geggi1
author_rank: Frequent Contributor
timestamp: October 14, 2014, 07:51:14 pm
content: Turn the chip upsiode down and solder on the thinnest wire possible, lik the on used to repair PCB.That should be possible if teh chip is not high frequency or large heat dispation.look at this link.http://wwwhome.cs.utwente.nl/~ptdeboer/ham/sdr/#nov2008It looks a bit nasty but the reciever have been on the air for years.

author: sebmadgwick
author_rank: Regular Contributor
timestamp: October 14, 2014, 08:57:19 pm
content: Quote from: Rufus on October 14, 2014, 05:18:14 pmThere are supply issues for all Microchip parts right now. I presume this will be more relevant for less popular packages (such as the VTLA) as distributors are unlikely to have as much stock.Quote from: geggi1 on October 14, 2014, 07:51:14 pmThat's not going to work out in production.Thanks everyone for the advice. I think I'll go one of two ways:1. Reduce the central ground pad size to make room for mask-plugged vias2. Do not use the package an instead use the 0.4 mm TQFP (assuming there is space)