How are cheap AWG's built - Page 1
Forum section: electronics / projects

author: toli
author_rank: Frequent Contributor
timestamp: May 18, 2017, 04:05:02 pm
content: Hello All,In a project I'm working on I have a need to generate a few pre-defined waveforms. Since I have a few of these channels (~10), I'd prefer to do this all on-board, and not with an external generator(s). I'm now looking for the best way to do this. I've seen some of the relatively cheap chinese function-gens have 100's of MSPS rate, with high accuracy, and a good amount of memory for my needs.I was wondering:1. How are they built, is this something I can do myself with relative ease?2. How would you recommend approaching this problem?I can't give an exact requirement of the sample rate, but I would sure love to get 1GSPS on at least a few of the channels. This will allow me to get the most out of my test-board.The sample length is also not fully defined yet, so I'm not setting a strict requirement here yet.Thank you.

author: Kleinstein
author_rank: Super Contributor
timestamp: May 18, 2017, 04:27:41 pm
content: The cheap-ass generators use an FPGA and super cheap (R2R) DAC. Thus sample length is limited and the DAC is not that great (e.g. DNL good for 7 Bits even if data might be 12 bits). In addition the sampling speed is limited to clock divided by an integer.For low speed there would be the option to use an µC (e.g. ARM based with DMA function) to generate the samples - however much more than about 100 MSPS might get difficult this way. Using 2 DACs and interleaving might double the rate. A 5 ns delay is possible as a delay line.

author: toli
author_rank: Frequent Contributor
timestamp: May 18, 2017, 04:36:42 pm
content: Thanks for the reply.I meant cheap AWG's like the Siglent/Rigol lines as an example. They have quite good SNR, and the sample rate is many 100's of MSPS.

author: Marco
author_rank: Super Contributor
timestamp: May 19, 2017, 08:37:56 pm
content: Dave does teardowns ya know. Predictably they contain a micro for the UI, FPGA for the data shuffling, DAC and wide enough bus width DDRx DRAM to supply it with data.If you can do a high speed digital design and FPGA programming with relative ease, you can do it with relative ease.

author: DaJMasta
author_rank: Super Contributor
timestamp: May 19, 2017, 11:16:25 pm
content: Quote from: toli on May 18, 2017, 04:36:42 pmNot sure your definition of cheap lines up with reality... There are MUCH, MUCH cheaper (mostly DDS) generators that don't come close to the performance of what rigol or siglent can offer in their equipment, and many of the rigol and siglent generators are actually quite powerful and quite accurate vs. similar generators on the market. There are certainly some specialty generators with extra features or top-tier specs and you can keep shelling out dollars for bandwidth, but you're not going to get so much dramatically better without really spending some cash. It wouldn't be difficult to sync up and use a number of these generators together because of their ethernet interfaces.That being said, five generators (assuming 2 outputs each) would be a lot to deal with. Assuming that each of these 10 or so signals has to be controlled independently (and you can't filter one or run one half speed or something to get another), you can also look at dedicated generator chips, which should help keep the cost and board space down. Something like the AD9106 could be an option, because you can get 4 channels on a chip that doesn't cost too much. There are limitations of DDS based designs, so you won't be able to just run megapoint long arbitrary waveforms with such a design, but depending on the application, they could do the job. There are actually quite a number of DDS chips available from various manufacturers, and if you don't need the arb capability, you don't need the interface, and you don't need a wide output range, you should be able to integrate them into a design pretty easily. If you need longer waveform sample lengths, then the FPGA into a DAC is probably the simplest solution, but it's going to mean a lot more design and firmware work than using a DDS chip, so if you can get away without it, it's going to be much simpler and cheaper to do so.

author: timb
author_rank: Super Contributor
timestamp: May 19, 2017, 11:43:13 pm
content: Quote from: DaJMasta on May 19, 2017, 11:16:25 pmYou could actually hook something like a Cypress FX2 USB2 to Parallel converter chip up directly to a parallel input high speed DAC. You could do a single channel at up to 250MS/s like that with no FPGA or firmware needed.For more channels a FX3 could be used with USB3, however you'd need an FPGA (with nBits*nDACs of IO) to demux the data.I'm actually working on a two channel 1Gsps USB3 AWG design right now. Mine is a bit more complex than just a FX3 and FPGA (as I'm adding DDR to cache the arb waveforms, though there will be an option for realtime streaming at a lower sample rate).

author: DaJMasta
author_rank: Super Contributor
timestamp: May 20, 2017, 02:36:54 am
content: That's true, if there's no requirement for it to be standalone, a DAC with a little output filtering, a decent clock, and a connection fast enough to give it data would give you as much arbitrary waveform functionality and length as you could desire.

author: toli
author_rank: Frequent Contributor
timestamp: May 20, 2017, 07:17:59 am
content: Thank you all for the replies. I was hoping a DDS IC could get me higher speed than what I see they can achieve. I've looked at the offerings of AD a week ago and was surprised that these with some memory in them are quite limited.I'm still not sure if I can get away with ARB in just a few of the channels and create the others with predefined signals that are supported by some of the chips. One more thing is that I need to have all channels synchronized to each-other, which is also a thing to consider if it's split between multiple IC's/boxes.

author: amspire
author_rank: Super Contributor
timestamp: May 20, 2017, 08:03:55 am
content: Quote from: toli on May 18, 2017, 04:05:02 pmAre the predefined waveforms digital or analog? I assume you want analog, but people often use these AWGs for simulating digital waveforms and they are not great at the task.If you want to generate arbitrary waveforms and you want as much high frequency resolution as possible, one of the important requirements is a high order constant phase low pass filter after the A/D. Something like a 9th order Bessel filter. If you use a low pass filter with a non-constant delay such as a Butteworth, Chebyshev or Elliptical, the shape of the waveform can disintegrate. For example a squarewave can turn into a jumble of high frequency sine waves. You can always start with a predesigned filter (such as the one from the HP 33120A manual) and change the frequency. Input is on the left (C504).This is a 10MHz 7th order Bessel filter designed for a 40MS/s DAC. It allows for arbitrary waveforms of up to 5MHz to be generated. it is designed for a 50 ohms source impedance and a 600 ohm output impedance. To scale the filter to say a 25MHz for a 100MHz DAC, decrease the L and C by multiplying both by 10/25. (Pick a value that gives the most convenient L and C values). If you want to scale the impedances - say by 4 to give 200 ohms in and 2400 ohms out without changing the frequency, multiply the Ls by 200/50 and multiply the Cs by 50/200.If you are wondering why they only get 5MHz arbitrary waveform out of 40MS/s DAC, the Bessel filters have a much slower roll off compared to other filters. You can easily design a much better filter for pure sinewaves. You can increase the maximum output frequency by using a higher order Bessel filter.If you use a DAC with a differential output, you will need two of these filters as they do need to go before the amplifier stages.

author: toli
author_rank: Frequent Contributor
timestamp: May 20, 2017, 08:06:04 am
content: Thank you for the reply.The signals are multi-level, so while I don't need 12bits and can get away with far less, a digital signal wont suffice.

author: amspire
author_rank: Super Contributor
timestamp: May 20, 2017, 08:19:35 am
content: Quote from: toli on May 20, 2017, 08:06:04 amBut a multi-level digital signal is still very different from a genuine arbitrary waveform which can be any analog shape. A multilevel digital signal can be taken straight out of a DAC without filtering and so with a 100MHz DAC, you can get a pattern with steps at an 100MHz rate. A normal AWG cannot do anything like that.If you do not need many levels, you can possibly achieve this with switched resistors. Perhaps a R-2R ladder to make a simple 6 bit DAC. If you are not after great accuracy, a cmos outputs from a microcontroller or FPGA straight to the R-2R ladder can do a fair job. You would get a 1/64th resolution and only need 5x5K resistors and 7x10K resistors 1%. (Or 17 10K 1% resistors with 10 in parallel pairs).

author: timb
author_rank: Super Contributor
timestamp: May 20, 2017, 12:45:44 pm
content: Quote from: amspire on May 20, 2017, 08:03:55 am40MS/s seems awfully low for a 5MHz AWG... I mean, it's fine if you're just putting out a variable amplitude square wave, but for anything else you can't really have a waveform with more than 10 or so points at 5MHz.I mean, a 10MHz/250Msps AWG is just *barely* passable for even semi-complex waveforms.

author: amspire
author_rank: Super Contributor
timestamp: May 20, 2017, 01:04:33 pm
content: Quote from: timb on May 20, 2017, 12:45:44 pmThat is right. It is DDS. It pick the nearest appropriate values out of the waveform table. That means, with the 33120A, if you have an 8000 sample AWG waveform and you take it up to 5MHz, it can only use 1 of every thousand samples in the waveform table. At 5KHz and below, you will get a perfect 8000 sample AWG waveform.

author: dmills
author_rank: Super Contributor
timestamp: May 20, 2017, 03:25:59 pm
content: But at 5MHz the 33120A only NEEDS one sample out of every thousand in that 8K buffer, because the waveform can be at most a 5MHz fundamental and a 10MHz first harmonic, albeit with arbitrary phase and amplitude, nothing else fits in the bandwidth.Not every set of samples you can load into an AWG is valid, you must band limit the sample set to fit within the bandwidth and this becomes a bigger issue as you raise the rep. rate.This is classic sampling theorem stuff (And might actually make a good interview question).Regards, Dan.

author: Marco
author_rank: Super Contributor
timestamp: May 20, 2017, 04:30:29 pm
content: Quote from: toli on May 20, 2017, 07:17:59 amIf a DDS is good enough, there are low cost AD9910 modules available from China.It even has 1024 entry programmable memory, so it might be usable as a limited AWG.

author: radar_macgyver
author_rank: Frequent Contributor
timestamp: May 20, 2017, 04:59:57 pm
content: You could also use one of ADI's quadrature digital upconverter chips, like the AD9957. This offers the best of both worlds - you can use it as a pure DDS (sine-wave only), possibly with modulation. You could also use it as a pure interpolating DAC, so it would take digital data from, say, an FPGA or a Cypress USB to parallel converter, and generate an arbitrary waveform. Finally, you could also use it as an upconverter, and use the digital data to modulate the carrier signal produced by the DDS, essentially a vector modulator. The 9957 is pin-compatible with a 9910, but requires different firmware. Sample rates up to 1 GSPS, DAC analog bandwidth up to 400 MHz.

author: Marco
author_rank: Super Contributor
timestamp: May 20, 2017, 05:08:16 pm
content: There is alsoa high speed alternative to R2R.You use PI attenuators on FPGA outputs to attenuate them while simultaneously matching to a 50 Ohm transmission line, those transmission lines are fed into a summing junction with series resistors to again get a 50 Ohm match. Noise and linearity will be compromised compared to a proper high speed DAC/DDS ... but it can be done cheap if you already have a FPGA with fast I/O.PS. AFAICS the AD9910 can step faster through it's internal RAM than you can program the AD9957. The AD9957 would be more flexible, on the other hand the AD9910 could be programmed by a microcontroller instead of needing to be controlled by a FPGA with fast RAM. Not best of both worlds, both have their advantages.

author: timb
author_rank: Super Contributor
timestamp: May 20, 2017, 10:40:25 pm
content: Quote from: dmills on May 20, 2017, 03:25:59 pmWith an AWG you can either expand/pad/interpolate/compress the waveform before sending it to the unit and run the clock at the full sample rate *or* you send the waveform as is and vary the clock to output the waveform at the desired frequency.With an AFG (which uses DDS) it runs at the full sample rate and only outputs nSamples in the wheel as the desired output frequency will allow.This is a good overview on the two methodologies:http://www.alliedelec.com/images/Products/mkt/pb/Tektronix/Pdf/understanding_signalgeneration.pdfEdit: DDS is a cool technology, but don't rely on it if you need 100% waveform fidelity at higher output frequencies, because you won't get it. You have no control over which points the DDS skips and which actually get output, so your waveform won't be output exactly as you intended. If you can live with that limitation, it's a great way to do an arb inexpensively.

author: amspire
author_rank: Super Contributor
timestamp: May 21, 2017, 12:16:02 am
content: Quote from: Marco on May 20, 2017, 05:08:16 pmMarco, an chance of posting a circuit? That link you posted is not accessible to us mere mortals.Did a Google search for the document name and got 0 results. Even did a Bing search and got 4308 results of which 4308 were totally useless!

author: Marco
author_rank: Super Contributor
timestamp: May 22, 2017, 02:56:25 pm
content: Bizarre the link indeed doesn't work, but if you click on it from thegoogle scholar search resultfor "20V-high speed low cost arbitrary waveform generator for ICs immunity test" it redirects to an amazonaws link which does work. If I block referrers forwww.academia.eduit doesn't work, so it's the referral which does it.

author: amspire
author_rank: Super Contributor
timestamp: May 23, 2017, 12:23:33 am
content: Quote from: Marco on May 22, 2017, 02:56:25 pmFinally found it:http://s3.amazonaws.com/academia.edu.documents/46488999/V-high_speed_low_cost_arbitrary_waveform20160614-15075-f50vqr.pdf

author: Marco
author_rank: Super Contributor
timestamp: May 23, 2017, 04:26:55 am
content: The full redirected url mentioned something about expiration, so that one might stop working. Clicking through google scholar search results is more likely to keep working for a while.