STM32F4 FFT questions - Page 1
Forum section: electronics / general

author: TinkerFan
author_rank: Regular Contributor
timestamp: April 29, 2016, 10:10:24 pm
content: A friend and I are trying to get an (audio range) FFT up and running on a STM32F4 Discovery board (STM32F407), but we've got some problems:We're using the ARM CMSIS rfft_fast function (CMSIS V1.4.4) and it works, but not how we want it to...First of all, it seems, as if it wouldn't be possible to change the frequency span of a bin. Is there any (secret) way of changing that?What we also don't understand is, how the Output array is put together. We run the conversion function (complex -> real), but why is the output just half of the FFT size?And why is the rest of the array rubbish, when the numbers are coverted into real values (but only if the array extends a certain size)?What does 'inf' (Atollic TrueStudio, value of a float)? Infinity?Why is the DC part of the FFT so high (double the size of the normal peaks)?Thank you for your answers.PS: Here are some details:I'm using Atollic Studio 5.4.2 (Demo version) and the CMSIS Library V1.4.4Attached are the code and the screenshots of some FFTs.I calculate the input values from the 12 bit ADC conversion results by the formula OP = (result-4096)/4096; I don't really know why, but I read it somewhere

author: ataradov
author_rank: Super Contributor
timestamp: April 29, 2016, 10:54:51 pm
content: Quote from: TinkerFan on April 29, 2016, 10:10:24 pmNo, FFT bin size is fixed to Fs / N, where Fs is your sampling frequency and N is the size of the FFT.Quote from: TinkerFan on April 29, 2016, 10:10:24 pmIn case of a real FFT second half is just a mirrored image of the first part. But it looks like you are asking something else. What conversion function you are calling?Quote from: TinkerFan on April 29, 2016, 10:10:24 pmProbablyQuote from: TinkerFan on April 29, 2016, 10:10:24 pmDo you have a sample signal? It probably has DC component.Quote from: TinkerFan on April 29, 2016, 10:10:24 pmThat actually depends on how your ADC presents the result of sampling.And the right formula would be (result-2048)/4096 to bring signal into -0.5 -- +0.5 range. But again, it very much depends on your ADC.

author: uncle_bob
author_rank: Unknown
timestamp: April 29, 2016, 11:56:43 pm
content: HiEven if your signal is perfectly done, the ADC likely has some DC offset. Most MCU ADC's are "DC challenged". The "DC bin" is probably telling you the truth.Calculating FFT's for "power of 2" sized arrays is very efficient. Doing an FFT for 901 bins *would* let you get a specific bandwidth. It would take less time to do 1024 bins.Bob

author: TinkerFan
author_rank: Regular Contributor
timestamp: April 30, 2016, 07:01:54 am
content: Thanks for the answers, we're using the arm_cmplx_mag_f32() function for the conversion.Quote from: ataradov on April 29, 2016, 10:54:51 pmBut how does the µC know the Sampling frequency? I've never given it any information about it... (It is roughly the right span BTW)Quote from: uncle_bob on April 29, 2016, 11:56:43 pmAll right, I know where it comes from. I've got a DC offset of 1.5V, to get the signal centered. I'm fairly knew to that kind of stuff, I didn't knew that would matter...

author: ataradov
author_rank: Super Contributor
timestamp: April 30, 2016, 07:03:41 am
content: Quote from: TinkerFan on April 30, 2016, 07:01:54 amWhat do you mean how? Your ADC runs at a certain sampling rate, you set it up. FFT does not care, it gives you abstract bins.So if you have 2048 point FFT and you are sampling at 2048 Hz and you have signal in the bin 5, then frequency of that signal is 5 Hz.But if you change the sampling rate to 20480, your bin number 5 will mean than frequency of your signal is 50 Hz, but it still will be in the 5th bin.PS: All numbers are approximate and for illustration only due to nature of the process.

author: hamster_nz
author_rank: Super Contributor
timestamp: April 30, 2016, 08:01:38 am
content: You seem to be sampling at about 360kHz or so (the 9th harmonic of 10kHz is about the middle point of the graph).If sample four times slower (e.g 90kHz) the same length fft will cover almost four times longer in time (4096 poonts is about 1/25th of a sec), and the bins will be 1/4th the width in Hz.An easy way to test this would be to do what you are doing now, but sample for 4 times longer, tossing away three out of four samples.

author: hamster_nz
author_rank: Super Contributor
timestamp: April 30, 2016, 08:03:20 am
content: Oh, and you need to filter out anything greater than half your sample rate before the ADC!

author: TinkerFan
author_rank: Regular Contributor
timestamp: April 30, 2016, 11:08:54 am
content: Thanks guys, I think I get it now.

author: TinkerFan
author_rank: Regular Contributor
timestamp: May 21, 2016, 10:43:40 pm
content: Well, the project evoleved and we now have some issues with the size of the RAM, so we need to save some memory. The first thing, we thought of was to use the q16 RFFT function, but apart from the headers and source files I cannot find any informations on it. Will it save some memory (it should, as it deals with 16 bit instead of 32 bit arrays)? And how do I set it up properly, I struggle especially with the twiddle coefficients (in fact, I have no clue what they are).Or are there any other things we could do to save our RAM shortages (external via FSMC maybe)?Thank you for your help again.

author: TinkerFan
author_rank: Regular Contributor
timestamp: May 22, 2016, 03:23:36 pm
content: Sorry, but I just realized that the problem was somewhere else. The Systick triggers the Hard Fault error, not the missing RAM