DC amplifier circuit is oscillating - Page 1
Forum section: electronics / beginners

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 05:29:02 pm
content: Hello everyone.I'm prototyping an amplifier circuit using an op amp and an output MOSFET stage. The goal of that circuit is to amplify DC values. The reason for the MOSFET output stage is that it will eventually need to output up to 1kV otherwise the op amp alone would be fine.For now I'm prototyping with only 20v supply to get a feel of the circuit behaviour. I'm using MOSFETs because it is possible to get some capable of driving 2kV+ which avoids having to piggyback a bunch of BJTs.The problem I have right now is that it oscillates. As is, without capacitors, it oscillates steadily at about 58 kHz (I have a 100nF capacitor across the Vcc and GND pins of the op amp). Putting various capacitors values across R4 changes the frequency and amplitude but it still oscillates.There must be some delay in the feedback loop, the MOSFET's gate is a capacitive load, but I'm not sure how to solve the problem.

author: TimFox
author_rank: Super Contributor
timestamp: October 13, 2024, 05:38:03 pm
content: Have you tried capacitors across R5?

author: Andy Chee
author_rank: Super Contributor
timestamp: October 13, 2024, 05:43:32 pm
content: Quote from: Laval on October 13, 2024, 05:29:02 pmWhat is the required bandwidth of your amplifier? You say 58kHz is bad, so insert a compensation network to roll off the gain above X kHz.

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 05:43:56 pm
content: Quote from: TimFox on October 13, 2024, 05:38:03 pmI did. In fact, that's the first place I tried because it is generally where you put them but it made things even worst. Admittedly, the smallest capacitor I have atm is 0.22nF which is a bit large. Maybe I need smaller caps like 10pF.

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 05:46:37 pm
content: What is the required bandwidth of your amplifier? You say 58kHz is bad, so insert a compensation network to roll off the gain above X kHz.The amplifier will be used only for DC values.

author: iMo
author_rank: Super Contributor
timestamp: October 13, 2024, 06:22:26 pm
content: You are creating 180deg phase shift in your circuit..This may work better, imho..

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 07:04:31 pm
content: Quote from: iMo on October 13, 2024, 06:22:26 pmYes, thanks for the circuit. It is difficult to find BJTs that will operate at the 1 kV power rail it will eventually have to handle. I'm reading about compensation network like Andy Chee said, it's the problem.

author: magic
author_rank: Super Contributor
timestamp: October 13, 2024, 07:06:34 pm
content: Configuring Q1 as voltage follower will not give 1kV.As for the original circuit, the first thing is that stability will depend on Q1 stage gain and overall closed loop gain, i.e. the ratios R1/R2 and R5/R4. So set them to something realistic (100~200x or so, I guess) if you want your prototype to be realistic. Well, this may screw up DC bias of the prototype, so if it can't work, at least try to make the ratio (R1/R2)/(R5/R4) be realistic - I think near unity would be OK. This ratio goes into loop gain, so lower is more stable. But you need to mind things like Q1 gate voltage and available output swing of U1.Then I don't know, perhaps try 10kΩ between the control voltage source and U1, plus a fairly substantial (dunno, 100nF or more?) local feedback capacitor around U1 (OUT to IN-). This is where playing with SPICE AC analysis could make sense. The big unknown is Q1 - it will have flat gain and close to 180° phase up to some frequency, then start to fall off and lag 270°. You want your overall loop gain to fall below unity by the time it happens, and the direct feedback around U1 should provide for that. I think.An alternative option for high voltage is the old "boosted opamp" circuit which takes signals from the opamp's supply pins. Maybe slightly more complex than the above, provided that the above would work.

author: tggzzz
author_rank: Super Contributor
timestamp: October 13, 2024, 07:58:26 pm
content: MOSFET SPICE models are notoriously deficient in some respects; some better ones contain an additional 14(!) SPICE primitive components. More hints inhttps://www.eevblog.com/forum/projects/lcsc-looking-for-spice-modals-436149/msg5596667/#msg5596667Even if you have a good design that works well in SPICE, when constructed you might find that your circuit doesn't "care" that it is a DC circuit, but decides to be very "frisky" at RFkV MOSFET circuits are described extensively in TAoE3 and especially TAoE3 X-chapters. You will save yourself a lot of time and grief if you obtain those references.

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 08:13:48 pm
content: Quote from: tggzzz on October 13, 2024, 07:58:26 pmYes indeed, there is an example of piezo driver at p209 (my third edition) which looks like my circuit but with a totem pole to get 0V output and a some sort of current limiter on the output follower. It also has an input buffer likely to increase the input impedance. There is not that many explanations but it is mentioned that a more detailed analysis is provided in the X chapter. I think it might be a good time to buy the X chapter, this is where the good stuff is.Thanks to you and Andy Chee, lots of good advice and relevant information.

author: magic
author_rank: Super Contributor
timestamp: October 13, 2024, 08:31:46 pm
content: SPICE would help quickly get some idea about global loop stability, and maybe not much more.For that, the important part is that Q1 and Q2 capacitances are in the right ballpark.

author: Laval
author_rank: Regular Contributor
timestamp: October 13, 2024, 09:27:20 pm
content: Quote from: magic on October 13, 2024, 08:31:46 pmIn AoE, they are using a feedback loop on the inverting op amp (between the output and the inverting input). This loop has a capacitor on the feedback resistor and one between the feedback resistor and the output. This is, I think, local feedback to roll off the gain of the op amp when frequency is above the some value. I tried it and for a moment it stopped oscillating. The accuracy went up (even better my target accuracy) but it started to oscillate again.I wasn't able to find some Spice model for the MOSFET I'm using but I'll try again and order some capacitors in the tens of pF. Thanks.

author: Zero999
author_rank: Super Contributor
timestamp: October 13, 2024, 09:28:22 pm
content: Quote from: Laval on October 13, 2024, 07:04:31 pmThe IRF540 doesn't work well at 1kV either.Quote from: Laval on October 13, 2024, 08:13:48 pmYou'll get more helpful replies, if you kept it to one thread, rather than starting a new one.Your DC amplifier has a large gain. It would help if you reduce it by applying negative feedback, before the op-amp. Use thecircuit I posted in the other thread, but with MOSFETs, rather than BJTs.It will still need a frequency compensation network, but will be much easier to stabilise.Transistors can also be cascoded to increase the voltage rating, but it's much easier to just use a single high voltage part.

author: basinstreetdesign
author_rank: Frequent Contributor
timestamp: October 14, 2024, 07:07:40 am
content: Quote from: Laval on October 13, 2024, 05:29:02 pmThere is indeed some delay in the feedback loop. The op-amp isn't getting enough feedback at higher (>100 KHz) frequencies. Your circuit should work just fine with a small adjustment: put a nominal-valued resistor inseries with the inverting input (say start with 5K but could be anywhere from 1K to 25K) and a small-valued cap (say 100 pf to 1nf) between the output of the op-amp and its inverting input. That will make sure the op-amp has lots of feedback at 1 MHz and up and prevent it from slewing too far while its waiting for feedback from R4/R5.

author: magic
author_rank: Super Contributor
timestamp: October 14, 2024, 12:42:19 pm
content: Quote from: Zero999 on October 13, 2024, 09:28:22 pmThis too may work and be easier maybe, if the Q2/Q1 local loop doesn't go nuts. You test this loop in isolation by simply rewiring U1 to unity gain.If it works, you then stabilize the whole lot with the usual trick: capacitor from OUT to IN- and resistor from IN- to the feedback divider.

author: CaptDon
author_rank: Super Contributor
timestamp: October 14, 2024, 12:50:21 pm
content: The circuit proposed by the O.P. would have a hard time scaling up to 100v and will never see 1KV!! I do like some of the BJT circuits other posters have submitted.

author: Laval
author_rank: Regular Contributor
timestamp: October 14, 2024, 03:16:51 pm
content: I have tried the circuit posted by @Zero999 using MOSFETs instead of BJTs. It's a very interesting circuit. It is also oscillating but it doesn't seem to bother the resulting output much. At a higher input voltage, the magnitude of the oscillation went up but the accuracy didn't suffer a lot. I added a compensation network as proposed by @basinstreetdesign and tuned the cap. I settled for a 10k resistor and two 0.22nF caps in series (to get about 0.11nF). It considerably decreased the magnitude of the oscillation, smaller caps might improve the situation a bit. I'll order some with a few OPA189 (that op amp has an impressive spec and is quite cheap). With the compensation, accuracy improved slightly.The accuracy of the circuit is about 0.14% which is one order of magnitude lower then my target (ideally 0.01%). The interesting thing is that the accuracy is very constant across the whole range of input values unlike my circuit. This would make a calibration possible. This is an impressive circuit especially considering its simplicity.I am picking up a lot of noise. I had to use my dual channel linear lab power supply (which is very quiet) to power the op amp and I had to use a small bench SMPS to power the transistor stage. That power supply is very noisy. I have put a few decoupling caps on the transistor stage power rail as well as on the op amp power rails. It decreased the noise a bit but not that much. Maybe I should use some ferrite bead on the rails.Quote from: CaptDon on October 14, 2024, 12:50:21 pmThat's correct and consistent with what I observed but I had to try. I don't have the experience you guys have with this.

author: Laval
author_rank: Regular Contributor
timestamp: October 14, 2024, 06:04:20 pm
content: Since that small SMPS is very noisy I tried powering up the transistor stage with batteries and it was actually good in term of noise and oscillation. I guess a proper PCB would likely help a lot in this regard, it would definitely be better then a parasitic ridden breadboard.I need to improve the accuracy. I suspect the op amp is unable to adjust sufficiently small "increments" or maybe the compensation isn't good enough yet. I hand-picked the two resistors of the outer feedback loop, they are very close to the specified values (less then 1% error on resistors). But the inner loop isn't.

author: TimFox
author_rank: Super Contributor
timestamp: October 14, 2024, 06:16:35 pm
content: Linear IC op amps do not have “incremental” behavior, but do have finite (albeit huge) DC gain

author: Laval
author_rank: Regular Contributor
timestamp: October 14, 2024, 07:05:14 pm
content: Quote from: TimFox on October 14, 2024, 06:16:35 pmOf course. That was a bad choice of words on my part. I didn't mean incremental in the sense of steps, I know feedback is a continuous process.

author: iMo
author_rank: Super Contributor
timestamp: October 14, 2024, 07:08:31 pm
content: Interesting circuit, indeed..Without the C1 (its value randomly chosen) it oscillates a little bit at around 120kHz.PS: the input signal is a sine 1Vpp at 2.5V offset, and the gain is set 200.Output is the sine at 500V offset with 200Vpp.

author: Terry Bites
author_rank: Super Contributor
timestamp: October 16, 2024, 11:41:57 am
content: Q1's gate capacitance is not isolated from the opamp. I'd add a small resistor say 100R. Slip a ferrite bead over the gate lead.

author: Laval
author_rank: Regular Contributor
timestamp: October 16, 2024, 12:41:24 pm
content: Quote from: Terry Bites on October 16, 2024, 11:41:57 amWhich of the designs ? With the first one where Q1 is common source, yes. I'm reading an application note from AD about that. But how do you size the ferrite bead ?

author: dietert1
author_rank: Super Contributor
timestamp: October 16, 2024, 01:21:35 pm
content: I think iMos last proposal V2 is close if you add the 100R resistor into the G1 gate connection.The circuit will still oscillate as it has two mosfets with high impedance drive in a loop. At high frequencies capacitors dominate and there may be 2x 90° shift which means oscillation.If you make the output divider 995K / 5K into a frequency compensated divider, adding two capacitors, it should become stable. Like 100 pF and 20 nF for a gain of 200. The capacitive divider adds fast drive to the lower mosfet input capacitance. The lower cap of the divider can be smaller or omitted as the input capacitance of the mosfet can be 500 pF up to several nF, see the mosfet datasheet.Regards, Dieter

author: PGPG
author_rank: Frequent Contributor
timestamp: October 16, 2024, 01:48:37 pm
content: My 3 cents...Typical OpAmp has a dominating pole at very low frequency (like 10Hz) and gain set to such value that it reaches 1 at about the frequency that other poles began to shift phase.So when gain is 1 it alone (OpAmp) gives 90° shift (by dominating pole) and may be 45° shift by other poles near frequency at which gain crosses 1. This allows to set gain of 1 connecting output to (-) input having phase margin may be 45°.Now at first schematic the gain is increased 10x so even added elements introduces no poles the amplifier will be no stable with gain = 1. If gain would be set to 10 than the loop would have the same ch-c as OpAmp alone and could be stable (I all the time assume extra x10 gain introduces no new poles what is not true). But with whole gain set to 3 it has loop gain of 3.333 at the frequency where OpAmp designers assumed it have to be max 1.As some extra circuits are needed and additional gain is also needed than extra poles are inevitable.I think the solution should be to shift dominating pole down (for example from 10Hz down to 0.1Hz). I think it can be done by introducing circuit having pole at 0.1Hz and zero at 10Hz (to compensate original OpAmp pole).The other solution can be to decrease OpAmp gain (with local feedback) to reach by the whole circuit the gain of 1 at lower frequency (before all new poles introduced by external circuitry).

author: Laval
author_rank: Regular Contributor
timestamp: October 16, 2024, 02:25:14 pm
content: The IRF540 has 1700pF at 1Mhz of gate capacitance, that's a lot. This is not the transistor I will use in the real design because it only goes to 100V and it will need to reach 1 kV. I'm planning on using somehting like thishttps://www.mouser.ca/ProductDetail/IXYS/IXTF02N450?qs=wUaLziKAieXPwzpdj6t6qg%3D%3DInfineon also have nice HV linear mosfet but i would need two in series, I'll see. I also plan on trying other op amps like TLV2333 and OPA189 which I will receive tomorrow.The gain of the prototype is 3 (composite gain) but it will have to be 100 in the final design. The precision of that gain is paramount.I'll change the outer divider to get a gain of 100 when I get back from work tonight.

author: MrAl
author_rank: Super Contributor
timestamp: October 16, 2024, 03:50:38 pm
content: Quote from: Laval on October 13, 2024, 05:29:02 pmHello,You could try the mod in the attachment. Note there is an added capacitor but also an added resistor in series with the non inverting input of the op amp. This arrangement adds some compensation but should not alter the DC transfer function setup with the voltage divider on the output.What happens when you add gain around the op amp is the original compensation may not be enough to handle the added gain. By turning the whole thing into an integrator the output change is slowed down so the op amp can keep up without an overshoot, more or less.This may not work either though, you may have to turn the op amp itself into an integrator by placing the resistor in series with the DC input reference and the capacitor right across the op amp inverting input to output.Using MOSFETs with op amps is a little more complicated than using bipolars.We could look at a typical setup and do a little more analysis to see how this works, but it's really just a setup with an op amp with an added output amplifier and you take the feedback from the output of the added amplifier rather than the output of the op amp. The analysis is then just to see what happens when you vary that extra amplifier gain, from 1 to some higher number like 10, 100, 1000, etc. You then watch the roots of the transfer function and see if they cross over the imaginary axis. There are other methods too which many designers are familiar with.Another issue could be that the value of R3 is too high. The load should probably draw more current because of the nature of the mosfet driving it. It could be the same situation with Q1 also.

author: Zero999
author_rank: Super Contributor
timestamp: October 17, 2024, 07:38:42 am
content: Quote from: Laval on October 16, 2024, 02:25:14 pmUnfortunately, you need to use the same components you intend to use for your final design, for the prototype, otherwise you're wasting your time. This is because the device characterisctics are very important.The IXTF02N450 is optimised for switching. Refer to the safe operating area graph on the data sheet. It might be rated to 4.5kV, but it's only rated to 80mA at 1kV.https://www.mouser.co.uk/datasheet/2/240/media-3319464.pdfYou can use a smaller, cheaper MOSFET designed for linear use. The 2SK1317 may be only rated to 1.5kV, but also 100mA at 1kV and 75mA at 1.5kV.https://www.mouser.co.uk/datasheet/2/698/REN_rej03g0929_2sk1317ds_DST_20050907-2930750.pdfAnyway, this sounds like an X Y problem. In this other thread you mentioned it's for a precision high voltage source. How are you getting the high voltage in the first place? Presumably it's boosted from a lower votlage? How?A more efficient way to do this would be to adjust the input voltage, depending on the setting and only dissipate a small amount of power in the linear regulator.

author: iMo
author_rank: Super Contributor
timestamp: October 17, 2024, 10:57:29 am
content: FRA stability analysis for various output voltages (20V..980V).

author: Laval
author_rank: Regular Contributor
timestamp: October 17, 2024, 04:18:35 pm
content: Quote from: Zero999 on October 17, 2024, 07:38:42 amIndeed, I looked at the SoA (the DC part) of different HV transistors (BJTs and MOSFETs). There are advantages to use a single device instead of a "string" of series transistors (Saturation). Infineon makes decent linear power HV MOSFETs though they are not high enough in breakdown voltage for a single device. The 2SK1317 you linked is very good.Quote from: Zero999 on October 17, 2024, 07:38:42 amI realize that I need to work with the same components as those I will use. As for the power supply, there is an example of regulated high voltage supply in AoE which basically "amplifies" the output of a 12V linear regulator.Your comment made me think about this and I looked at the EDC521 HV module schematics.https://manuals.repeater-builder.com/te-files/MISCELLANEOUS/EDC%20521%20Operator.pdfThey are using another approach that doesn't rely on amplification. They are using a PWN regulator so they don't need HV transistors since the output is on the secondary of the transformer. That's an interesting approach.