NXP RT1020 Program/Debug by SWD - Page 1
Forum section: electronics / general

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 04:38:25 pm
content: Hello.Today I received my Jlink OB, to try to Program/Debug the RT1020 microcontroller directly, without using OpenSDA/Daplink that installs the evaluation board.I have removed the jumpers that connect SWDIO and SDCLK ​​to OpenSDA (J27--> SWDIO, J28--> SWCLK ), and I have connected those signals and GND to the Jlink OB. MCUXpresso recognizes the Jlink, but fails to connect to the microcontroller.There are three more jumpers in the evaluation board (J24, J25 and J26), two are for a UART and one for the RST signal. If I remove these jumpers, and use OpenSDA-DAP Link via USB or JTAG work well, it seems that the UART is not useful to program and debug, I do not know what is the utility of this serial port, but it is not essential for debugging or program.I also tried to connect my Jlink V9 by SWD directly to the RT1020 and it also fails. I do not understand why I can not connect directly to the RT1020 microcontroller by SWD using a Jlink, when the OpeSDA (based on Kinetis MK20) on the evaluation board is also connected via SWD to the microcontroller.Any suggestions?It seems that OpenSDA sends some special commands by SWD to the microcontroller, but if it connects directly with Jlink it does not do it, or so it seems. I need to be able to program and do Debug, using SWD directly, without OpenSDA as an intermediary, to make my own board.

author: MT
author_rank: Super Contributor
timestamp: August 08, 2018, 05:26:25 pm
content: Quote from: luiHS on August 08, 2018, 04:38:25 pmIs this the Amazon/China JLINK OB you talked about to buy in the other thread? You always use SWD, SCK and NRST.Edit: Many times uses NRST if design requires i should say!

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 05:53:20 pm
content: Quote from: MT on August 08, 2018, 05:26:25 pmYes it is. But then I thought about it, and it should work also with the Jlink V9 that I already had, both can be connected by SWD. The Jlink OB, has no Reset signal, only GND, +, SWDIO and SWCLK.I think that finally, I will have to make my own board with a Kinetis MK20 and OpenSDA, using the part of the scheme of the evaluation board.

author: jnz
author_rank: Frequent Contributor
timestamp: August 08, 2018, 06:00:27 pm
content: Buy china knockoff, have problems. Hmmm. Too bad there is no support line you can contact.

author: MT
author_rank: Super Contributor
timestamp: August 08, 2018, 06:09:05 pm
content: NRST could be on pin 18/PB0 on the STM32F103 dongle you bought, measure some to se if any pin wiggles during connect to target or measure the inbuilt K20 dongle and se if K20 wiggles target RST at any point. Surely Segger JLINK V9 have NRST on a cable or so?Chinese manufacturer:https://item.taobao.com/item.htm?spm=a312a.7700824.w4023-6273763140.2.774e62f6SQhUNm&id=19122650433

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 06:54:09 pm
content: Quote from: MT on August 08, 2018, 06:09:05 pmIf I remove jumper J24 on the evaluation board, which connects the Reset signal to the microcontroller, Jlink and Multilink by JTAG and OpenSDA work fine. It seems that they only need SWDIO and SWCLK to program and debug.At the bottom side of the Jlink OB's PCB, there are several SMD pads, which can be part of the Reset line. Anyway, if I remove the jumper from the Reset, it is programmed and debugged without problems using JTAG and OpenSDA, it does not seem necessary.Jlink V9, has Reset signal. I made this small adapter JTAG to SWD (photo attached), for my Jlink, with which I program and debug my boards with Kinetis MK66. It has the pins of GND, + 3v3, Reset, SWDIO and SWCLK. I think it could also be used with the STM32, but for those I use the STLINK V2 from ST.I will try later to connect Jlink V9 to RT1020, also using the Reset pin, to see what happens.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 08:21:14 pm
content: I've done a new check right now. I have connected Jlink to JTAG J16, I have removed all jumpers J24 to J28, and it works, I can program and debug.I have reviewed the evaluation board schematic several times, and I do not see how it connects directly from JTAG to RT1020, it seems that all the JTAG lines go to the Kinetis MK20 instead of the RT1020, so I thought that the MK20 was acting intermediary in all cases.Now I need to know how many pins this JTAG connection needs to program / debug the RT1020. I only want the essential, if it could be by SWD with 2 or 3 pins, better.I will have to re-check the scheme of the evaluation board, to detect where the lines of the JTAG J16 connector are connected to the RT1020, regardless of the Kinetis MK20.In any case, this is good news, because with both the Jlink and the Multilink, the RT1020 can be programmed and debugged directly. Now I can start designing my own board.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 08:32:06 pm
content: And this is very interesting, this guy has already developed his own board with RT1020, and has made public and freely available all the sources and files to do it with Kicad. The only bad thing is that he has used the LQFP144, which is not yet available until the end of this year.This board install a 2x5 JTAG connector for program/debug, so do not use SWD.https://github.com/martinribelotta/imxrt1020-module/tree/r-small

author: donotdespisethesnake
author_rank: Super Contributor
timestamp: August 08, 2018, 09:21:20 pm
content: Quote from: luiHS on August 08, 2018, 08:32:06 pmSWD will also work with the 2x5 JTAG connector, I use it all the time.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 08, 2018, 10:00:13 pm
content: Some pins are shared between SWD and JTAG, certainly, then in addition to SWCLK and SWDIO I need some more pins that I have not connected. But the Jlink OB, does not provide more pins, only SWDIO and SWCLK, although there are some SMD Pads not identified in the bottom side of the board.I will try with my Jlink V9, to identify the minimum pins that should be used to program / debug using JTAG or SWD. I think the Reset pin is necessary.

author: MT
author_rank: Super Contributor
timestamp: August 08, 2018, 11:53:02 pm
content: Quote from: luiHS on August 08, 2018, 08:21:14 pmProgress!Did you get the Chinese dongle to work? If you remove JP24, 27,28 and connect the dongle into theseit should go directly to target and bypass K20, but its a weird schematic. But J16 also seams go directly to sameSW target pins so you have disconnected the K20 dongle basically buy removing JP24, 27,28 .

author: luiHS
author_rank: Frequent Contributor
timestamp: August 09, 2018, 09:15:09 am
content: Quote from: MT on August 08, 2018, 11:53:02 pmI have to verify the SMD pads on the bottom side of the Jlink OB, I'm sure that some must be the Reset signal, I think it's essential for the SWD to work, as soon as I check it, if it's available, I'll connect it and try it.And on Jlink V9, I will also try to connect the Reset cable. In any case, some people inform me that using JTAG is faster than with SWD, so for my own custom board, I will put a JTAG, IDC 2x5 or 2x6 connector with a flat cable, for use with Jlink V9 or Multilink.I already have all the information to design my own board with RT1020 LQFP100. I will put QSPI, a micro SD card, probably a micro USB to test the firmware load with the MFG tool, and some components for my own product (a RGB LED display with Chinese HUB75 panels).I will design the PCB throughout this week, and I will send it to JLCPCB to make it, I hope to receive it and assemble it in about a week.I am very excited about the RT1020, it is a fantastic microcontroller, very powerful and cheap, Cortex M7, 500 Mhz, it is the best, a beast. Also, now, I am reading the Reference Manual to know how to configure and use the DMA, for me essential for my applications.My idea is to migrate all my current projects with STM32 and Kinetis to RT1020. I also look forward to NXP releasing the RT1020 LQFP144, it seems that this will be by the end of this year.The problem with the LQFP100, is that for my applications, it does not have enough I/O ports if I want to connect an SDRAM (to load and run larger programs, with maximum performance). With my current design only 25 I/O ports would be free, and SDRAM I think that need 39 I/O ports.Unfortunately NXP, for now it has only released the LQFP100, I will try my design without SDRAM, but as soon as the LQFP144 is available, it is the one that I will definitely use almost always.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 09, 2018, 09:41:04 am
content: I tried to identify the 4 additional SMD pads in the Jlink OB. Two of these pads are VCC and GND, the other two pads are new, not connected to SWCLK or SWDIO, so one is probably RESET and the other SWO.I will check it later, testing with the RT1020 evaluation board to connect it by SWD with MCUXpresso. I will also test the Jlink V9 by SWD, connecting the RESET pin and by JTAG with the 5 pins.

author: tsman
author_rank: Frequent Contributor
timestamp: August 09, 2018, 11:46:47 am
content: Quote from: luiHS on August 09, 2018, 09:41:04 amIt is SWD for the STM32F103 on the adapter itself. If you want nRST or SWO then you'll need to find and solder onto the pins directly. Not sure if your clone has the onboard UART.

author: MT
author_rank: Super Contributor
timestamp: August 09, 2018, 01:44:13 pm
content: Quote from: luiHS on August 09, 2018, 09:15:09 amEasy now, dont overexite yourself!Alltought the RT10xx has neat speed to cost ratio it still lacks significantly on the pheripherials side DAC is dual but 6bits, many timers still 16bit with crude 3 bit prescaler and i guess its more around the corner, i havent figured out yet what is clock rate is for the timers. RT10xx do have its set of trade offs as all MCU's do but when need for speed on 2 layer PCB thats unbeatable so far and thats great!QuoteThere is one thing missing in the ref manuals and thats a decent block diagram and its flows.QuoteYou can always add two HC595/HC165 etc to get 32 additional IO ports.

author: mubes
author_rank: Regular Contributor
timestamp: August 09, 2018, 07:10:05 pm
content: You're over-thinking this. SWD only needs SWDIO, SWCLK and Gnd to operate. It is _possible_ to need reset too for the special case that the SWD is switched off by code immediately after reset, but that is a rather unusual case and you can work around it in the general case by forcing the board into one of the the boot loaders. Under normal conditions the SWD can reset the chip anyway.You do know that you can reprogram the debug interface on the 1020-EVK to 'be' a JLink, don't you? Well, leastways you can on the 1050...I've not actually broken my 1020 board out of its cardboard box yet to use it 'in anger'. Just go to Seggers site and download the genuine stuff rather than messing with the hooky junk thats as likely to cost you a board as it is to get you debugging....once you've got JLink working with your dev environment then you can start messing with variables.The serial port is also reflected by the JLink, which gives you somewhere to dump debug I/O to....it appears as an additional serial port on the PC.RegardsDAVE

author: luiHS
author_rank: Frequent Contributor
timestamp: August 10, 2018, 06:44:06 am
content: Quote from: mubes on August 09, 2018, 07:10:05 pmI saw that the OpenSDA, using a Kinetis MK20 is connected to the RT1020 by SWD, there are some jumpers with SWDIO, SWCLK and Reset signals, if I remove the Reset jumper keeps working, this can corroborate what you indicate, the Reset does not seem essential.But then the problem comes when I want to use a Jlink V9 or a Jlink OB by SWD, because using SWDIO and SWCLK to directly connect the RT1020, previously removing the two jumpers that join those signals between the MK20 and the RT1020, do not work, it gives error in MCUXpresso.Therefore there is something else, that I do not know, that allows SWD to work using the OpenSDA with the Kinetis MK20, but it does not let it work using a Jlink V9 or Jlink OB.QuoteIt's not about that, it's just the opposite. I do not need to modify anything on the evaluation board. What I need to know is how to make my own board to be able to program and debug it by SWD without having to install an MK20 with OpenSDA in my custom board.I already know what I can do and it works, using JTAG, but I wanted to know why it does not work for SWD, mostly out of curiosity, although if I get it to work it could save some pins in the programming / debug connector. By JTAG I need 5 pins, and by SWD in theory only 2 (or 3 if we count the Reset).QuoteI saw that Jlink generates a virtual COM port, in principle I do not know what utility it has, I do not remember right now if the Multilink creates it too. This reminds me how the Arduino Debug works, by dumping the variables in real time on a window that receives data from a virtual COM port, and for that the printf is used in the program, to get the status of variables or texts. I think the STM32 also do something similar for SWO using STM Studio.In short, by JTAG, I can program and debug the RT1020 using a Jlink or a Multilink. But it does not work for me if I try to connect by SWD with SWCLK and SWDIO. It really is not important, because it works by JTAG, I can put on my board a 2x5 or 2x6 IDC connector and connect it to the Jlink with a flat cable.

author: mubes
author_rank: Regular Contributor
timestamp: August 10, 2018, 01:21:27 pm
content: If you can program via JTAG then you can program via SWD, given that it just uses a subset of the JTAG pins. I broke out my 1020 EVK board and connected the debugger to it (JLinkPro) and it works fine;Code:$ JLinkExeSEGGER J-Link Commander V6.32i (Compiled Jul 24 2018 15:20:49)DLL version V6.32i, compiled Jul 24 2018 15:20:43Connecting to J-Link via USB...O.K.Firmware: J-Link Pro V4 compiled Jun 26 2018 17:00:59Hardware version: V4.00S/N: XXXXXXXXXLicense(s): RDI, FlashBP, FlashDL, JFlash, GDBIP-Addr: DHCP (no addr. received yet)VTref=3.317VType "connect" to establish a target connection, '?' for helpJ-Link>connectPlease specify device / core. <Default>: MCIMXRT1051Type '?' for selection dialogDevice>MIMXRT1021xxx5APlease specify target interface:J) JTAG (Default)S) SWDTIF>SSpecify target interface speed . <Default>: 4000 kHzSpeed>Device "MIMXRT1021XXX5A" selected.Connecting to target via SWDFound SW-DP with ID 0x0BD11477Scanning AP map to find all available APsAP: Stopped AP scan as end of AP map has been reachedAP: AHB-AP (IDR: 0x04770041)Iterating through AP map to find AHB-AP to useAP: Core foundAP: AHB-AP ROM base: 0xE00FD000CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)Found Cortex-M7 r1p1, Little endian.FPUnit: 8 code (BP) slots and 0 literal slotsCoreSight components:ROMTbl @ E00FD000ROMTbl: E00FE000, CID: B105100D, PID: 000BB4C8 ROM TableROMTbl @ E00FE000ROMTbl: E00FF000, CID: B105100D, PID: 000BB4C7 ROM TableROMTbl @ E00FF000ROMTbl: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7ROMTbl: E0001000, CID: B105E00D, PID: 000BB002 DWTROMTbl: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7ROMTbl: E0000000, CID: B105E00D, PID: 000BB001 ITMROMTbl: E0041000, CID: B105900D, PID: 001BB975 ETM-M7ROMTbl: E0042000, CID: B105900D, PID: 004BB906 CTIROMTbl: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7ROMTbl: E0043000, CID: B105F00D, PID: 001BB101 TSGCache: Separate I- and D-cache.I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-WayD-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-WayCortex-M7 identified.J-Link>The photo attached is the wiring to get this (ignore the wires going off in the picture - they're just connected to the serial port on the other board, didn't want to have to remove those).RegardsDAVE

author: luiHS
author_rank: Frequent Contributor
timestamp: August 11, 2018, 12:03:19 am
content: Ok, I have connected it to the JTAG connector, and it works with the Jlink V9, although it gives an error with the Jlink OB (capture screen attached), but this is already a firmware error of that programmer, it seems that its firmware is not up to date and does not support the Cortex M7 or its only for STM32. I bought it on Amazon, I thought it was original, but it seems that it is Chinese and it is not up to date, although my Jlink V9 is also Chinese and it works perfect.I do not know why it did not work at all, when I connected it to J27 and J28, in theory those jumpers are connected to SWD, something I should have done wrong.In any case, as I said, I prefer to use JTAG, because someone told me, in the MUConEclipse blog, which is faster than SWD. I will use my Jlink V9, and on my custom board I will put a 2x5 or 2x6 IDC connector, of the 1.27mm step with a flat cable.A question:To upload an encrypted firmware image to RT1020, can I use Jlink via JTAG, or do I need to do it via USB with MFG Tools?

author: tsman
author_rank: Frequent Contributor
timestamp: August 11, 2018, 01:55:32 am
content: Quote from: luiHS on August 11, 2018, 12:03:19 amThe OB means OnBoard as in this is supposed to be integrated into a dev board by the manufacturer. It is a cut down feature limited version of a J-Link so will run a lot slower than your full sized J-Link. They only say Cortex-M is supported but not what number so it is probably just M3 and M4. Your V9 J-Link has Cortex-M7 support in the firmware.In your case, the fact the J-Link OB lists "GDBFull" as a feature is probably why the J-Link software is complaining it is defective. Some of the knockoff clones show as GDBFull instead of GDB and the J-Link software looks at this + the serial number to determine if it is a knockoff.Quote from: luiHS on August 11, 2018, 12:03:19 amThe J-Link OB and special converted versions such as the ST Link/V2 into basically a J-Link OB have a different firmware branch that is very rarely updated. I'd be wary about updating the firmware in your knockoff V9 J-Link though. Segger have killed the clone units before with firmware updates.Quote from: luiHS on August 11, 2018, 12:03:19 amAs for the connector, I much prefer theTag-Connectsystem. No need to actually fit a connector even when debugging and the PCB footprint is tiny.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 11, 2018, 02:50:04 am
content: Quote from: tsman on August 11, 2018, 01:55:32 amVery interesting, I did not know those connectors. I will order this model to prove it, although it is a bit expensive.http://www.tag-connect.com/Materials/TC2030-CTX.pdf

author: luiHS
author_rank: Frequent Contributor
timestamp: August 13, 2018, 01:56:09 am
content: I have already started creating my custom board with the RT1020 microcontroller in LQFP100 (the only one available). Finally I decided to put the QSPI in port GPIO_SD_B1, leaving the port GPIO_AD_B1 free for JTAG or SWD.I have put jumpers to configure the whole boot system, as it is an experimental board to migrate one of my products with Kinetis MK66. In the final version, the fuses will be programmed internally for the boot mode and all these jumpers will disappear, leaving in turn more free ports. I do not know whether to replace the jumpers with DIP switches, in general the jumpers seem more practical in development boards.I also put a USB connector to test the encrypted firmware load using the MFG Tool. I still do not know if JTAG can load an encrypted firmware image or it can only be USB/UART using the MFG tool. I have put both the JTAG connector and the SWD to test both, and I will finally decide which one I prefer.I still have enough to route, and I think I will have to change all the decoupling capacitors, for a size 0603, now they are all 0805 and I think they are too big and leave little space to route the tracks. I'm surprised by the amount of decoupling capacitors that this microcontroller needs, I'm used to putting the STM32 or Kinetis, one of 100nF for each positive pin.I am following all the advice given in the "Hardware Development Guide" of NXP. I am struck by the comment about adjusting the length of the tracks in SD, " For the SD module interfaces:o Match the data, clock, and CMD trace lengths (length delta depends on the bus rates). "I think that for the next week I can have the design ready to send it to JLCPCB, and in a few days I have the board to assemble it here. I have all the necessary components.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 13, 2018, 02:32:01 pm
content: PCB finished and sent to JLCPCB. In a week I hope to receive it and start the assembly and testing. Finally I put all the decoupling capacitors of size 0603, and the SMD crystal quartz of 5x3mm. I have also put DIL switches, instead of the jumpers, I suppose if I choose quality will not give problems, because my experience with this type of switches of the Chinese, it was quite bad, they failed a lot.

author: MT
author_rank: Super Contributor
timestamp: August 13, 2018, 02:40:33 pm
content: I would try to get more GND area since im a bit unsure how much current the beast draws when all MCU related is att full blast particularly if its a 2Layer board and experimantal!

author: luiHS
author_rank: Frequent Contributor
timestamp: August 13, 2018, 11:07:21 pm
content: There are ground planes in both layers, I do not think there are any problems with the GND.The only thing that worries me is the boot system, being able to choose between booting from SD or QSPI, having connected the QSPI to the port GPIO_SD_B1 for FlexSPI, pins 6 to 11. And keep SD in same GPIO port, pins 0 to 5.Im not sure yet, if boot mode detect QSPI automatically in FlexSPI (GPIO_SD_B1) or FlexSPI 2nd option ports (GPIO_AD_B1). As soon as I check and know exactly how work the boot mode, for production only configure fuses to program device to boot always from a specific device (SD, QSPIO, LPSPI, etc...), and do not need external jumpers to configure it (save I/O ports).

author: luiHS
author_rank: Frequent Contributor
timestamp: August 14, 2018, 02:45:31 am
content: I also made this small JTAG adapter for my Jlink, to program the board I made with the RT1020, either with a 2x5-pin IDC connector by JTAG or a 5-pin connector by SWD.The IDC connector of 2x5 is not the mini version of 1.27 mm, but a 2.54 mm, it may be replaced by the mini version for the final product.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 16, 2018, 06:32:06 am
content: Quote from: tsman on August 11, 2018, 01:55:32 amI have replaced on my board, the IDC JTAG and SWD connectors of 2.54 mm, for a TC2050 Tag-Connect, and I have ordered the cable and the adapter for Jlink to Digikey. I hope it's as good as it looks, and I'll use it in all my designs, the idea is good to save assembly time and some cost.https://www.digikey.es/product-detail/es/tag-connect-llc/TC2050-ARM2010/TC2050-ARM2010-ND/3528170https://www.digikey.es/product-detail/es/TC2050-IDC/TC2050-IDC-ND/2605366/?itemSeq=269348220

author: MT
author_rank: Super Contributor
timestamp: August 16, 2018, 12:45:14 pm
content: Quote from: luiHS on August 13, 2018, 11:07:21 pmIf your PCB is 2 layer you dont have a GND plane rather GND "areas" as seen on your pictures. GND plane is when you dedicate an "entire layer" to GND. I have the same issues with my 2 layer board, spend lots of thinking how to route for low impedance/inductance. However most likely your board will work but will it be at optimum? you may/may not get funny things happening.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 16, 2018, 11:04:12 pm
content: Quote from: MT on August 16, 2018, 12:45:14 pmI understand what you mean, but making a 4-layer PCB is very expensive for my products. My main products have a big PCB, 380x130mm, 442x177mm and similar, these are special LED screens with HUB75 led modules. Converting these PCBs to 4 layers would greatly increase the cost of the product. Now all my boards with 2 layers work well with NXP Kinetis MK66, I hope they also work well with RT1020.I always route manually and very carefully to avoid problems, and now with the RT1020, for the QSPI and the SDRAM, as they handle very fast signals, I will use the meander function of Eagle, to adjust the length of the tracks the same length. I also add vías to join both GND planes, avoiding bare copper areas on any of the faces.I only had to make some designs to 4 layers, for clients that needed to pass the EMI emission certificate. One of those boards was made in the begining to 2 layers and did not pass the emission tests (picture attached), although almost, and I preferred to redo the board to 4 layers, as it was a small board did not increase the cost too much.I trust that it can work well with 2-layer plates, in fact I think the NXP evaluation board for the RT1020, is made in 2 layers, or so I thought I read somewhere.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 20, 2018, 10:59:16 am
content: Today I received the TC2050 cable from Digikey, and also the PCBs that I ordered from JLCPCB to make my first board with the NXP RT1020 LQFP100.On the TC2050 cable, it's a bit short, I expected it to be a bit longer.My board for the RT1020, has errors in the output ports that are handled with the DMA, because I was unaware that the pins must be from the same port and be contiguous. The same thing happened to me with the PCB I made for the RT1020 evaluation board. I have designed a small board that connects to the output of the IDC connector on my board, to reorder the ports, and there will be no problem.I really want to start up this board, because I want to migrate several of my products with Kinetis MK66 as soon as possible. The details about the DMA, I am learning them little by little, and I think that I already have the necessary information to use the DMA by SPI in reception, and as an output to several GPIO ports from an array.

author: luiHS
author_rank: Frequent Contributor
timestamp: August 29, 2018, 10:30:11 am
content: Today I received my first PCB to use with TC2050 connector to Program/Debug by JTAG/SWD, and the look is really good. Everything fits perfectly, and in principle it seems a very good option to remove connectors on the board. I still have to try it, in this case with MCUXpresso to program a Kinetis MK66.The plate for the RT1020 had already been ordered, before knowing this type of connectors, and it remains in the prototype for a standard IDC connector, but in the final product, I will also design to use the TC2050.

author: luiHS
author_rank: Frequent Contributor
timestamp: October 03, 2018, 07:16:53 pm
content: Boards assembled, one with LQFP100 RT1020, and one to connect to the NXP evaluation board, so I can use the SDRAM until LQFP144 is available on December.

author: dengzg
author_rank: Newbie
timestamp: December 02, 2018, 04:19:44 am
content: Hi,I encounted with the same problem with Jlink V9. I had removed Jumper J27 & J28.I found that when connected Jlink V8 between host and target board and then power on target board, MCU could not be detected and when powered the board on first and then connected Jlink, MCU could be found correctly. Perhaps, some bugs with the power subsystem on target board.

author: luiHS
author_rank: Frequent Contributor
timestamp: December 03, 2018, 07:41:45 am
content: Quote from: dengzg on December 02, 2018, 04:19:44 amMy boards with RT1020 and RT1050 work perfectly by JTAG, with Jlink V8 and V9, using MCUXpresso.