Level Translator Impedance Matching Termination Resistors For High Speed? - Page 1
Forum section: electronics / projects

author: hal9001
author_rank: Regular Contributor
timestamp: July 27, 2021, 09:01:04 am
content: I want to connect level translators like 74LVC1T45 to a microcontroller to translate high speed SPI signals from 3.3v to 5v. I want to make sure it works for frequencies up to 40 MHz.Do I need to worry about impedance matching between the microcontroller and 74LVC1T45 to reduce reflections? Is the right solution a series resistor?Cheers!

author: capt bullshot
author_rank: Super Contributor
timestamp: July 27, 2021, 09:34:21 am
content: Quote from: hal9001 on July 27, 2021, 09:01:04 amDepends on the layout.

author: hal9001
author_rank: Regular Contributor
timestamp: July 27, 2021, 09:56:46 am
content: Trace length can be as long as 15 cm to get from one side of the PCB to the other and the PCB will have a ground plane. The worry is I dont want to generate noise in the power rails or cross talk with other traces and hope this can be be reduced or eliminated with correct termination resistors.Can you please describe what in the layout to check for?

author: capt bullshot
author_rank: Super Contributor
timestamp: July 27, 2021, 10:21:39 am
content: Yes, series resistors usually help with that. Place them closely at the signal source, so the signal lines are back terminated. Always provide the GND return path with no interruptions (e.g. no slots in the GND plane underneath the signals) in closest proximity to the signal.For some rule of thumb, one assumes about 50R ... 100R impedance for the signal traces, so depending on the source impedance (IC output), a series resistor in the 33R to 100R ballpark should work.

author: hal9001
author_rank: Regular Contributor
timestamp: July 27, 2021, 10:53:38 am
content: Quote from: capt bullshot on July 27, 2021, 10:21:39 amThanks for the details!You suggest placing the resistor close to signal source. Where is the best place to put the series termination resistors in case of bidirectional signals? The 74LVC1T45 can switch direction and I wonder how to deal with that for future projects.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 27, 2021, 11:27:06 am
content: Depends, some ideas that come to my mind:You'd have two sources to deal with then. So two resistors, one at each end of the trace might be a solution.Or maybe check driver strength and rise/fall times of the sources, and place the resistor at the stronger / faster source.Keep connections short, don't use resistors at all.If your MCU has programmable driver strength, use the weakest setting the system still works with (this should be applied in general with modern MCUs). Even a "slow" signal can have very fast edges and cause interferences, so try to slow down the edges by reducing the driver strength if possible.

author: hal9001
author_rank: Regular Contributor
timestamp: July 28, 2021, 09:58:00 am
content: Quote from: capt bullshot on July 27, 2021, 11:27:06 amThanks!Just to have a better understanding, is the point of series termination resistors to reduce interference from harmonics produced by fast rise and fall times more so than the frequency of the data signal?

author: capt bullshot
author_rank: Super Contributor
timestamp: July 28, 2021, 12:41:54 pm
content: Quote from: hal9001 on July 28, 2021, 09:58:00 amYes and no. You want "clean" signals at the sink side, so the receiver e.g. doesn't toggle a flip-flop twice on a single edge. To achieve that, one way is to reduce ringing and ground bouncing, this is what series resistors at the signal source are intended to do. And yes, doing so dampens higher frequency contents of the signals.If you use a proper transmission line that is correctly terminated, one can use very high frequencies without causing interferences. Most PCB traces aren't well defined transmission lines, so one doesn't know the correct termination either. Modern CMOS stuff has quite fast edges, often in the ball park of 1ns fall/rise time. On a typical PCB a 1ns edge propagates by some fraction of speed of light, maybe 15 ... 20cm. Mistermination causes quite visible signal distortion then (if you have fast enough an oscilloscope). As long as your rise/fall time is slow enough in comparison to the trace length (shorter than 1/4 of the wave length of the highest frequency component), this effect can be mostly neglected. So if you can't make your trace shorter, make the edges slower.Fast edges driven by an CMOS output cause current flow at approximate same frequencies through the VCC / GND pins of the device. Parasitic (package, bond wire, PCB trace) inductances cause voltage drop according to this, causing the IC internal potentials to deviate from the external GND / VCC. This is called "ground bouncing" and can cause interference on other signals. You want a solid GND plane, good VCC decoupling and very short traces from the plane and decoupling capacitors to the GND / VCC pins of the IC.Series termination at the signal source roughly does a mix of both, slowing down the edges and approximately back terminating the signal trace. So the series resistor (or using less stronger driver settings) help with signal distortion through mismatched signal traces and ground bouncing.

author: hal9001
author_rank: Regular Contributor
timestamp: July 30, 2021, 10:41:29 am
content: Quote from: capt bullshot on July 28, 2021, 12:41:54 pmThanks for explaining. This was very helpful!The level translator datasheet doesnt specify decoupling capacitors but should it be assumed if I have a set of level translators then the best practice is to have decoupling capacitors next to each one?Is there a rule of thumb for picking a decoupling capacitor value? It sounds like I should base the capacitor value on 40 MHz because thats the data frequency for this circuit.

author: capt bullshot
author_rank: Super Contributor
timestamp: July 30, 2021, 12:49:04 pm
content: Quote from: hal9001 on July 30, 2021, 10:41:29 amYes, place a decoupling capacitor near to each pair of supply pins. So for the level translators one capacitor per IC.Nearly everyone uses 100n ceramic capacitors, that's the rule of thumb - and use the same type everywhere on your board. It's not depending on your data line frequencies.