Need help with an cmos inverting gate.  - Page 1
Forum section: electronics / beginners

author: Dmeads
author_rank: Regular Contributor
timestamp: February 20, 2019, 12:40:47 am
content: Hello!I am trying to build an DC to AC inverter. I know of the H-bridge kind, but I kinda wanted to try my own way first to learn a little bit because why not!I first created a sin wave using an R2R DAC with an arduino and a bunch of resistors. Then I rectified this, so when the signal goes through an op amp, I can have one rail set to ground and the other set to a little above what I want to amplify the signal to. This allows me to only have to use one power supply on the op amp, because the rectified signal is only in either the positive voltage or negative voltage.Where I am having trouble is getting the rectified sine wave back to an oscillating wave with both positive and negative voltage.I came up with this idea: (idea.jpg)it uses a 555 timer to created a square wave. Also, I used a pmos and nmos to create an inverter. When the 555 wave is at logic low, the bottom switch is off, but the inverter gate is on, which allows the rectified sine wave to flow into the load in one direction.in the next period of the rectified sine wave, the 555 is at logic high, which means the inverter cmos gate is off, and the bottom switch is on, allowing the sine wave to pass through the load from the other direction. if this is correct, then i should get a pure sine wave over the load.in the picture, blue marker is logic low and red is logic high of the 555 wave.I tried to simulate this in ltspice and have attatched the file, but it didnt come out as planned. I have tried trouble shooting, adding pull down resistors ect,. but nothing seems to work. In my mind, i thought there is some potential here for this to work with the cmos inverter gate.The reason I wanted to use a cmos inverter was because if I could use only one 555 timer. If i used two 555s, they would have to switch at the same frequency, but have different time delays in order to flip flop the rectified sin wave signal over the load. I couldn't figure out how to do a time delay on the 555. I looked up the monostable circuit for the 555, but this eventually turns off, and I wouldn't want it to in my circuit.Any help would be appreciated. Thanks!

author: nick_d
author_rank: Regular Contributor
timestamp: February 20, 2019, 01:00:42 am
content: It is not completely clear what you are trying to do?From what I understand you, you want a power stage that buffers the sine wave to produce the same sine wave but with high current capability?In that case you are probably trying to build a class B output stage (the principle is similar to if you played a pure sine wave from your computer into an audio power amp).Bear in mind you will be using the output devices in their linear region so the power supply is essentially wasting the excess voltage by turning it into heat, similar in principle to a 7805 regulator.If that is what you want to do, then find a tutorial on class B amplifiers. They can be built with FETs or bipolar and they can use the output devices in either follower or inverting configuration.cheers, Nick

author: Nitrousoxide
author_rank: Regular Contributor
timestamp: February 20, 2019, 04:10:50 am
content: Yes. It isnt very clear what you're attempting to recreate. From reading, I'm ASSUMING its a pure sine wave inverter. But you haven't posted any quantitive specifications.What's the output voltage?Input voltage?How much current can you sink?Does it have to be an H bridge topology?Why can't you bias the op amp to a virtual ground?From what I can tell, or gather, is that you're directly feeding the FET's with sine waves. Doing this will pass the FET's (slowly) through the linear zone, before reaching saturation. When a FET is operating in the linear region, it behaves somewhat akin to a resistance. You never want to do that with a considerable amount of power as they will operate as space heaters due to this linear ohmic behavior. This is why they either switch between cut off and saturation (NOTE: for power applications, of course there are class B and AB amplifiers that do not adhere to this rule).If you want a sine wave output with an H bridge, you have to drive the FET's with sinusoidal PWM (SPWM). This ensures that the devices are only operating in cut off or saturation, whilst producing an average voltage of sinusoidal nature.You can achieve decent results if you drive a center tapped transformer with a push-pull configuration combined with an output filter.The issue you might have with your setup is crowbar currents, make sure you implement some form of dead time between FET's as such that short circuits aren't created.EDIT: Also, your spice simulation layout makes no sense. You have a pulsed power supply connected to the output of the op amp, which is also connected to all the gates.

author: David Cutcher CEG
author_rank: Contributor
timestamp: April 17, 2019, 05:48:42 am
content: I think I understand. You're just playing.1. Starting with a sine wave,2. then rectifying it to DC.3. Then trying to recreate a sine wave again.You're not worrying about power, just shape.It's an old problem. And persistent. What I provide here is similar to DC to AC converters for cars.Just take a scope to any DC to AC converter that plugs into a car's outlet.Here's my suggestion.Assume you start with a 13 volt 60 Hz AC input from a wallwart.Rectify it, Throw a 7809 on it, and get regulated 9v DC.Create a pulsed digital output of 60 Hz (frequency generated by 555)This small signal from the 555 is used to control transistors.Use a voltage divider (match 5 watt 2 ohm resistors) and tap the center.For AC, that center tap is the new reference for a virtual ground.That gives you a rough 4.5v AC. (4.5 above, 4.5 below, 9v peak to trough)This is then amplified (voltage doublers)These products often do not clean up their signal.Then how you smooth this out is completely up to you.Have Fun - Hope this helps.David Cutcher "Certified Evil Genius"

author: emece67
author_rank: Frequent Contributor
timestamp: April 17, 2019, 07:09:44 am
content: .