Logic Analyzer with negative rails - Page 1
Forum section: electronics / beginners

author: pacioc193
author_rank: Regular Contributor
timestamp: September 08, 2023, 09:01:08 pm
content: I’ve search with out any kind of luck a logic analyzer capable to read natively signal from -10 to +10 VDC with a customizable threshold voltage.Anyone has any kind of experience?

author: srb1954
author_rank: Super Contributor
timestamp: September 09, 2023, 02:45:43 am
content: Quote from: pacioc193 on September 08, 2023, 09:01:08 pmThere are plenty of old-school logic analysers from HP and Tektronix that support that sort of input range.They often require a different interface pod option e.g. the P6460 interface with a Tektronix 1240 logic analyser, that provides the wide range, adjustable threshold inputs vs the P6462 pod which only provides TTL compatible inputs with a fixed threshold.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 05:59:05 am
content: What about something from new school?Thanks for the information btw

author: tooki
author_rank: Super Contributor
timestamp: September 09, 2023, 01:48:43 pm
content: What’s the signal? Could you use an RS-232 transceiver to convert the ±10V to 0V/5V?

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 05:14:38 pm
content: I don’t need a logic state converter. I need a customizable treshold input

author: mwb1100
author_rank: Frequent Contributor
timestamp: September 09, 2023, 06:43:50 pm
content: When I was looking for a logic analyzer that could directly handle RS232 signals without level shifting, I found that the DSLogic handles -30 to +30V signals:-https://www.dreamsourcelab.com/doc/DSLogic_Plus_Datasheet.pdfBut the threshold level is more limited so it might not meet your needs: Threshold voltage: 0v ~ 5v (0.1v step)

author: mwb1100
author_rank: Frequent Contributor
timestamp: September 09, 2023, 06:48:05 pm
content: Just thought of the LA on the MSO5000. The digital capture supports a threshold Range ±15.0 V, in 10 mV steps. I don't know for sure, but I'd guess other MSO's might be similar.-https://int.rigol.com/Public/Uploads/uploadfile/files/20200501/20200501105342_5eab8f36ecb98.pdf

author: tooki
author_rank: Super Contributor
timestamp: September 09, 2023, 07:00:42 pm
content: Quote from: pacioc193 on September 09, 2023, 05:14:38 pmAgain: what’s the signal? (I asked that question first, and for a reason: so you would answer it.)

author: tggzzz
author_rank: Super Contributor
timestamp: September 09, 2023, 07:16:29 pm
content: Quote from: tooki on September 09, 2023, 07:00:42 pmThat is a reasonable and sensible question; the OP would help everybody by answering it.If the OP isn't aware of the XY problem, perhaps this might help...Quote

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 09, 2023, 08:02:25 pm
content: Because you also started:https://www.eevblog.com/forum/beginners/isolated-rs485-logic-analyzer/I assume it's related to your isolated RS485 gadget.Working over isolation barriers needs special attention for managing stray capacitance and other effects. This really is the realm of oscilloscopes to look at the real waveforms instead of only using a logic analyzer.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 10:40:28 pm
content: Quote from: Doctorandus_P on September 09, 2023, 08:02:25 pmYes your assumption is correct. I need to analyze signal like in this photo.

author: tggzzz
author_rank: Super Contributor
timestamp: September 09, 2023, 10:53:29 pm
content: Quote from: pacioc193 on September 09, 2023, 10:40:28 pmThere's little point in using an LA with that trace. LAs are only useful after you have used a scope to ensure good signal integrity.Fromskimmingyour other thread, there appears to be disagreement and/or misunderstandings about the interconnections between "isolated" subsystems.If there really is no common reference point, then I suspect using a differential probe would help avoid measuring common-mode noise.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 11:04:44 pm
content: As already explained multiple times in the other thread, I’ve a db9 with just 4 wires : Data-A Data-B Clk-A Clk-B.I don’t have any kind of ground cable. Using power supply ground the signal remains as in photo. I suspect it is a isolated transceiver. I used oscilloscope and the signal integrity was fine for my test. I can analyze packet manually using old fashion way. I’m asking if there a commercial system that can decode automatically signal.

author: tggzzz
author_rank: Super Contributor
timestamp: September 09, 2023, 11:16:13 pm
content: Quote from: pacioc193 on September 09, 2023, 11:04:44 pmGiven that scope trace,exactlywhat threshold voltage would you select to enable an LA to distinguish a "0" from a "1"?

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 11:24:03 pm
content: Quote from: tggzzz on September 09, 2023, 11:16:13 pmOver 0volt could be 1Less than 0 volt could be 0With an adjusted treshold I can decide that less than -200mv is a 0

author: tggzzz
author_rank: Super Contributor
timestamp: September 09, 2023, 11:32:28 pm
content: Quote from: pacioc193 on September 09, 2023, 11:24:03 pmThis may be a language issue, but "could" and "can" isn't exact. You need to state "must" and "will". If you cannot specify a single unambiguously correct voltage, then any LA will make the wrong choice.Fundamentally your tool needs to measure the signal in the same way the receiving sub-system will measure it. If the voltages shown in the trace are all the receiver has to interpret, then I doubt the receiver will be able to interpret them correctly.If it is RS485 then I expect that the data-a and data-b are a balanced pair of wires communicating a singlesignal. That needs a differential receiver which ignores the (varying) common mode voltage. Thus, either use a differential probe, or use a comparator, and feed the output of either to any simple cheap logic analyser.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 09, 2023, 11:46:37 pm
content: My oscilloscope has just 2 probes. I was not able to detect all 4 wire together.Here a snap with both A and B signal for data line.I’ve disconnected the ground lead from the oscilloscope probe.Like in this YouTube video:https://youtu.be/VWodjUSkYVE?si=IgGqxHjJ1kwlV8Aa

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 12:51:48 am
content: Quote from: pacioc193 on September 09, 2023, 11:04:44 pmhave you tried a regular non-isolated transceiver with bias resistors?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 10, 2023, 01:04:35 am
content: Quote from: pacioc193 on September 09, 2023, 11:04:44 pmAs I already explained multiple times in the other thread, there is no use using a logic analyzer if you trash your signal integrity by omitting a GND wire together with your SR485 data, and your scope screenshot confirms this. Fist fix your signal integrity issues, an then try to use a logic analyzer again (but it's likely not needed anymore, because there is a good chance that once you fixed your grounding issues, the data will be correct too.

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 01:05:22 am
content: Quote from: pacioc193 on September 09, 2023, 11:46:37 pmThat new screenshot shows good signal integrity for A-B, and that indicates what you should do. Either:buy two differential probes, which will convert the two differential input pairs into two signals that go to your scope or LAmake a comparator circuit and use that to convert two differential input pairs into two signals that go to your scope or LAThe comparator circuit could be a voltage comparator, or an RS485 receiver, or any other differential receiver. All you have to do is ensure they have appropriate differential and common mode input voltage specifications.

author: EPAIII
author_rank: Super Contributor
timestamp: September 10, 2023, 02:08:41 am
content: Do you realize what you are actually saying here?"I’ve a db9 with just 4 wires "You are actually saying you have a DB sized connector, which is the physical size of a 25 pin, D sub-miniature shell. And in that 25 pin shell you have just four pins or just four wires connected to pins.The shell sizes with the common numbers of pins are:DE - 9 pinDA - 15 pinDB - 25 pinDC - 37 pinDD - 50 pinBut I have also seen and worked with other pin configurations in the DA size shell, including some with larger sized pins for greater currents and even coaxial connections. In short, the DA, DB, DC, DD, and DE designations refer to the size of the shell that the pins are in, NOT to any particular number of pins or even the TYPE or SIZE of the pins.I strongly suspect you mean you have a DE-9 with just four wires connected.As for your question, your signal seems to need a simple, level change before any logic analyzer. Perhaps you could couple it with a capacitor and then use a DC restoration/clamping circuit. A simple diode connected to ground may possibly do the trick. Or an active circuit employing a switch triggered by a pulse generated from the negative excursions of the signal. That pulse would need to be shorter than the shortest negative excursion to prevent signal distortion.And yes, that is a chicken and egg paradox: which comes first the negative pulse detection or the DC clamping? But the signal can go two ways: into a simple circuit to find the negative excursions and the other path has the switch to ground for a clean ground level clamp. And, of course, it does not need to be referenced to ground. It can be referenced to any Voltage rail with this technique.For more on DC restoration/clamping circuits, look into composit video circuitry.Quote from: pacioc193 on September 09, 2023, 11:04:44 pm

author: ledtester
author_rank: Super Contributor
timestamp: September 10, 2023, 06:38:24 am
content: Quote from: EPAIII on September 10, 2023, 02:08:41 amfwiw, in the Mouser catalog they are all called "DBnn" regardless of the size of the shell.

author: EPAIII
author_rank: Super Contributor
timestamp: September 10, 2023, 06:47:40 am
content: Yes, many places get it wrong.Quote from: ledtester on September 10, 2023, 06:38:24 am

author: Gyro
author_rank: Super Contributor
timestamp: September 10, 2023, 07:54:45 am
content: Quote from: EPAIII on September 10, 2023, 06:47:40 amCommon standard usage has been wrong for many decades then. Everyone knows what a DB9 or a DB25 is.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 10, 2023, 08:21:20 am
content: https://en.wikipedia.org/wiki/Aston_Martin_DB9https://www.reddit.com/r/electronics/comments/1cw9wi/today_i_learned_that_this_is_a_de9_connector_and/I think this is my favourite comment on that reddit site:It's a DB9, dammit!This is one of those times when I'm going to plug my ears and sing LAH-LAH-LAH-LAH-LAH-LAH! until it goes away.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 08:28:53 am
content: Quote from: EPAIII on September 10, 2023, 02:08:41 amSo much rage in this topic. I asked just an information about a commercial logic analyzer with the possibility to read a negative voltage and adjust the threshold.I don’t need a teacher that will explain my a bunch of acronym for a commercial standard connector.DB9 is another common way to call DE connector as also Wikipedia explain it :https://en.m.wikipedia.org/wiki/D-subminiatureI repeat my question : is there any modern logic analyzer with the possibility to select a threshold voltage from -10 to + 10vdc?

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 08:36:59 am
content: Quote from: pacioc193 on September 10, 2023, 08:28:53 amI repeatyourmeasurements, and note that solutionshave already been pointed out to you.https://www.eevblog.com/forum/beginners/logic-analyzer-with-negative-rails/msg5053138/#msg5053138https://www.eevblog.com/forum/beginners/logic-analyzer-with-negative-rails/msg5053204/#msg5053204If you don't want to listen, that's your prerogative. But please stop repeating thewrong questionand insisting people answer it!

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 09:14:10 am
content: Quote from: tggzzz on September 10, 2023, 08:36:59 amOk then I will start :I’ve bought an Hantek6022BL oscilloscope and troughs pulse view of Sigrok i was able to use it as logic analyzer.Classic protocol decoder doesn’t work out of the box, is possible using some custom script to nomalyzer the signal and create a signal where analyzer works after having fix the signal.Anyone know any commercial solution that can works similar to this system?

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 09:32:21 am
content: Quote from: pacioc193 on September 10, 2023, 09:14:10 amNo analyser can work with bad signal integrity.Fix your signal integrity problem using any of the techniques described to provide a clean analogue waveform. Use any available logic/protocol analyser to turn the analogue waveform into a digital signal. Use any available logic/protocol analyser or a script to decode/filter/etc the digital signal.What decoding/filtering/analysis can be done by a logic/protocol analyser can be found in their data sheets.What decode/filtering/analysis you need to do is for you to determine.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 10:04:52 am
content: Quote from: tggzzz on September 10, 2023, 09:32:21 amI need a 4 channels scope to show you a correct signal clk + data because I’ve differential signal.As already show to you, and I attach again the photo, using a differential reading the signal has good integrity using the technic of this youtube video :https://youtu.be/VWodjUSkYVE?si=QzeXz_1ZZpdAvLb_Now stop wasting your time if you don’t have a suggestion on COMMERCIAL HARDWARE that can handle this signal and perform a decode spi/parallel decoding…

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 11:27:30 am
content: Anyone know this logic analyzer brand?https://www.ikalogic.com/sq-logic-analyzer-pattern-generator/This has 2 differential inputs.Any experience with this?

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 11:58:01 am
content: Quote from: pacioc193 on September 10, 2023, 10:04:52 amNo, you don't need 4 channels. You have been told several times how to convert a two-wire differential input into a single-wire input. Do that once for the clock, and once for the data.Youmustdo that before feeding the signal to an LA. You cannot avoid doing that with any logic or protocol analyser.Doing a difference operation then a threshold operation (as shown in your photo) is not the same as doing a threshold operation then a difference operation (as you would like to do).

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 02:19:27 pm
content: Quote from: tggzzz on September 10, 2023, 11:58:01 amFirst of all, let me provide a brief overview of the situation:I have an old EOL computer that communicates with an unknown microcontroller through a custom DE-9 cable. The connector from the old computer includes a GND wire connected to the cable, but the unknown microcontroller does not have a corresponding ground connection.My objective is to intercept the signals traveling from the computer to the microcontroller. However, I encountered several issues in this process:A standard RS485 transceiver ( MAX485 ), represented by U1 and U2 in the diagram, does not seem to produce any output signals, even when its ground is connected to the computer's ground. This resulted in no signal conversion.An isolated RS485 transceiver ( ADM582E -https://digilent.com/shop/pmod-rs485-high-speed-isolated-communication/), on the other hand, is capable of capturing signals from the bus and converting them with great stability without connecting any kind of ground between transceiver and the actual system.The problem arises when the microcontroller responds to the computer's requests. When I use a Windows serial communication sniffer into the EOL PC, it reveals a specific packet format, like this:0x01 0x13 0xC8 0x91 0x00 0x00 0x00 0x4C 0x00 0x00 0x00 0x30 0x00 0x00 0x00 0x33 0x00 0x00 0x00 0x31 0x00 0x00 0x00 0x37 0x00 0x00 0x00 0x35 0x00 0x00 0x000x5F 0x00 0x00 0x00 0x30 0x00 0x00 0x00 0x33...However, when I use a logic analyzer to inspect the signal output of my isolated transceiver, the packet appears slightly altered, like this:0x01 0x13 0xC8 0x91 0x00 0x00 0x00 0x4C 0x00 0x00 0x00 0x30 0x00 0x00 0x00 0x33 0x00 0x00 0x00 0x31 0x00 0x00 0x00 0x37 0x00 0x00 0x00 0x35 0x00 0x00 0x000x9F 0x00 0x00 0x00 0x60 0x00 0x00 0x00 0x66...Upon inspecting the signal with a logic analyzer, it seems that there is no clock missing, but a single bit within the byte 0x5F (0b0101 1111) becomes 0x9F (0b1001 1111), and all subsequent bytes also differ:0x30 becomes 0x60 (0b0011 0000 -> 0b0110 0000)I find it hard to believe that my RS485 transceiver is losing a bit (communication is at a very low speed of 153800Hz). However, it is also difficult to believe that a commercial PCI device would introduce such an obfuscation pattern.For these reasons, I want to rule out any issues with my RS485 transceiver before considering the possibility of an obfuscation pattern.I hope this clarifies everything and explains why I need to read the RS485 bus directly instead of relying on a converted signal.

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 02:38:05 pm
content: Quote from: pacioc193 on September 10, 2023, 02:19:27 pmwhat is controlling DE and RE on U1/U2?

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 02:41:18 pm
content: My custom microcontroller that I use to inject data into the bus. The idle state is low.

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 03:55:09 pm
content: Quote from: pacioc193 on September 10, 2023, 02:19:27 pmFinally, after you have been askedmanytimes onseveralthreads, you provide a partial schematic and definition of the problem. Good!QuoteWell it won't. You need to enable the receiver by connecting /RE to GND.In addition the output might be enabled (and therefore interfering with comms) since DE is not connected to GND.QuoteThat will fail for the reasons I have given.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 04:00:31 pm
content: DE and RE are connected togheter… it is always connect to gnd in both system ( isolated and not isolated ).No data is traded with the standard MAX485 and data is read in isolated transceiver.Then what’s your suggestion to understand which is the problem? How I can be 100% sure the transceiver is working well??I’m not able to get ground from unknow microcontroller.I’m not able to disassembly the old pc.

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 04:26:00 pm
content: Quote from: pacioc193 on September 10, 2023, 04:00:31 pmAh.So your schematic is incomplete in important ways. I've grown tired of this XY problem.Good luck solving your problem.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 04:33:16 pm
content: Quote from: tggzzz on September 10, 2023, 04:26:00 pmAt least you understand that issue is not stupid ground as you have wrote like 10timesSchematic is not incomplete in a important way… in the schematic de and re are connect together.Missing a connection to my microcontroller. That’s itPs . Remember that section is : Beginners and not advance information.

author: tooki
author_rank: Super Contributor
timestamp: September 10, 2023, 05:09:31 pm
content: Quote from: pacioc193 on September 10, 2023, 04:33:16 pmYeah but you’re being a perfect example of a “beginner” who is wasting everyone’s time by withholding information and providing incorrect information (like your schematic).Omitting critical connections is a serious mistake, since it means the information you are providing is WRONG. That is very important.And your attitude is not good. Stop defending your laziness and instead apologize for wasting people’s time.

author: tooki
author_rank: Super Contributor
timestamp: September 10, 2023, 05:14:36 pm
content: Quote from: pacioc193 on September 10, 2023, 02:19:27 pmOne thing to consider is that it’s not uncommon for the A and B to be labeled wrong. You could try switching them and seeing what happens.As for the decoded data… are you 100% sure the comms settings (word length, parity, stop bits) are set correctly? A mismatch could easily cause problems.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 05:45:15 pm
content: Quote from: tooki on September 10, 2023, 05:09:31 pmI have modified the schematic in order do adjust the missing connection.I need just to read data and not write anything on the bus right now. For this reason i decided to put /RE and DE to ground.My attitude could be wrong and i can apologize for it... more information will be provided like logic analyze data and COM port sniffing.Quote from: tooki on September 10, 2023, 05:14:36 pmAbout A and B, switching them the transceiver stop to convert data then i can immagine that polarity is good.About speed, on the original pc communication working fine. About my logic analyzer, i don't set any kind of speed decoding.I attach windows sniffing from the EOL old pc and the logic analyze data burst.

author: tooki
author_rank: Super Contributor
timestamp: September 10, 2023, 06:02:42 pm
content: Quote from: pacioc193 on September 10, 2023, 05:45:15 pmI didn’t say “speed”. The question I asked is about the settings: word length, parity, and stop bits. I don’t know enough about the protocol you’re using to know whether this is actually relevant or not. But if it decides like UART, then these would be settings to verify. (For example, the most common UART configuration is “8N1”: 8 data bits, no parity bits, one stop bit.)If the logic analyzer is producing incorrect decoding, then I’d test the decoder by feeding it a known-good test signal. The last thing you need is for an error in the decoder to introduce errors that aren’t actually there.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 06:06:02 pm
content: Quote from: tooki on September 10, 2023, 06:02:42 pmThe protocol is considerable like an spi.As attached in the photo.The computer initialize the con port with a 153600kbps.The clocking speed of the communication became this one 153800hzI tried to decode manually packet and same data has been found.Attached a screenshotAbout testing on a know good signal, the starting of the packet with header 0x7E and the first couple of byte are correct. After this specific byte, all signal seems shifted by 1 bit...

author: Electro Fan
author_rank: Super Contributor
timestamp: September 10, 2023, 06:41:25 pm
content: "About testing on a know good signal, the starting of the packet with header 0x7E and the first couple of byte are correct. After this specific byte, all signal seems shifted by 1 bit...""The computer initialize the con port with a 153600kbps.The clocking speed of the communication became this one 153800hz"- maybe there is something going on here ^- maybe something useful here:https://pdfserv.maximintegrated.com/en/an/AN3884.pdf

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 06:58:17 pm
content: Quote from: Electro Fan on September 10, 2023, 06:41:25 pmComputer working well. Receive the correct data then I don’t think issue is related to speed or communication protocol.My problem is :The transceiver inside the EOL pc have different output than my isolated transceiver.The speed on the bus is correct, the pc can write and read correctly.The issue is :My transceiver translate data from bus in a different way than EOL computer.Is there any ways to check if data on the bus is 0x5F and not 0x9F as my transceiver decode va?You are trying to say me that clock signal is not correct and I need to generate a my own clock at 153600hz to decode the signal?

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 07:01:52 pm
content: Quote from: pacioc193 on September 10, 2023, 04:33:16 pmWhen I was a beginner with a question, I listened to the answer. If I did not understand their answer, I asked another question.I did not tell them I think they are an idiot.BTW your response indicates (in several ways) that you do not understand what Iand othershave been saying.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 07:11:50 pm
content: Quote from: tggzzz on September 10, 2023, 07:01:52 pmNo I didn’t understand why I need to increase integrity on my signal this is correct.I’m noob about this argument for this reason i I’m asking on this forum.From my test, I asked 10 times the same message and I read it correctly on the EOL computer 100%.On my logic analyzer I always read wrong in the same way. 0x5F became 0x9F. I tested multiple transceiver with no luck.I don’t have many information about the real behavior of the system.I don’t have enough experience about 485 communication.I don’t want be rude, that’s it. I’m searching help to solve my issue that’s it.Already apologize for my comment.

author: Electro Fan
author_rank: Super Contributor
timestamp: September 10, 2023, 07:22:44 pm
content: Quote from: pacioc193 on September 10, 2023, 06:58:17 pmI'm not saying you need to generate your own clock but given that something is off I like tooki's advice (including word length, parity, and stop bits) to start with reviewing the basics just to make sure those are correct.Maybe it's ok for:"The computer initialize the con port with a 153600kbps.The clocking speed of the communication became this one 153800hz"but I'd be curious to know what causes the difference between the kbps and the Hz, and why one or both are at the rates you are seeing. It's just something to look into.PS, the communications on the forum is a little like the communications on your system - doesn't take much to throw the protocol off a few bits and then we get miscommunication.I wouldn't worry too much about it, just try to answer the questions and follow the advice as best you can. There are lots of helpful people here and someone will probably help you figure things out. Seems like you are getting closer.

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 07:26:23 pm
content: Quote from: pacioc193 on September 10, 2023, 06:58:17 pmhow does you transceiver decode the data, SPI? USART? using the clock? just the data?sure you haven't inverted the clock, by swapping A and B ?

author: Electro Fan
author_rank: Super Contributor
timestamp: September 10, 2023, 07:45:59 pm
content: Quote from: langwadt on September 10, 2023, 07:26:23 pmInverting the clock is definitely another thing to check; little endian vs big endian maybe worth a look-see too; decoding has plenty of parameters that all need to be checked and double checked until all the potential errors are eliminated.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 07:49:29 pm
content: Quote from: langwadt on September 10, 2023, 07:26:23 pm1 transceiver convert data bus1 transceiver convert clock busAfter having the converted bus from 485 to ttl logic level I use a “Manchester” / SPI logic Clock on rising and data logic level to decode the message.I’ve done it for multiple packet but this has this wrong behavior.About inverting A and B, from my knowledge, if you invert A and B on the 485 bus the signal could not be translate from transceiver. Is this false?Quote from: Electro Fan on September 10, 2023, 07:22:44 pmUnderstand the advice, I solved in my mind with :The on board EOL boards will try to do the best to achieve the selected baudrate.Is less than 2% of error, I think is acceptable in a system like spi.About communication on forum you right… my bad. I’m trying to apologize.I know this is the best forum to talk about this trouble because a lot of expert are present.Also read on the falling edge is not giving me good result…Quote from: Electro Fan on September 10, 2023, 07:45:59 pmWhat you means with inverting the clock? Read on falling? Shift one pulse ?The start of the signal is correctly decode for more than 32 byte. I don’t think the issue is related to big or little endian.Byte like 0xC8 will be very different in big or little. Could be another parameter that maybe I’m missing but no idea

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 07:55:43 pm
content: Quote from: pacioc193 on September 10, 2023, 07:49:29 pmif you swap A/B the signal is just inverted

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 08:00:00 pm
content: Quote from: langwadt on September 10, 2023, 07:55:43 pmLike reading on the falling edge instead of the rising edge? Having a 50% duty cycle square wave

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 08:09:03 pm
content: Quote from: pacioc193 on September 10, 2023, 08:00:00 pmyes if the clock is always running and 50/50 duty cycle it would be like using the falling edge

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 08:13:02 pm
content: [ Specified attachment is not available ]Quote from: langwadt on September 10, 2023, 08:09:03 pmChecking signal it will not solve my issue… a falling edge will make impossible to read a real data change. On falling edge also data state change.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 10, 2023, 09:12:00 pm
content: Quote from: tggzzz on September 10, 2023, 03:55:09 pm@tggzzzI really don't understand why you still respond to this guy, I have given up. I just may smirk a bit when his signal integrity issues turn out to be the missing GND wire.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 09:20:42 pm
content: Quote from: Doctorandus_P on September 10, 2023, 09:12:00 pm@Doctorandus_PAs already told to tggzzz I’m using this siglent board :https://digilent.com/reference/pmod/pmodrs485/reference-manualMay I ask you, because I’m noob on this argument, why digilent sell a product without having a ground connector to be used as third wire in a half duplex rs485 communication?Is there a Iso ground connector where I need to solder wire. Why not put a 5 pin connector then?From your explanation I will never get able to communicate with this unknow microcontroller until I cannot find a ground cable correct?How the EOL computer is able to do it without a proper gnd connection having an isolated rs485 transceiver? ( Ive tested resistance between power supply ground and 26 pin connector and it is over 10Mohm )

author: tggzzz
author_rank: Super Contributor
timestamp: September 10, 2023, 09:23:04 pm
content: Quote from: Doctorandus_P on September 10, 2023, 09:12:00 pmI'm not, any more.I get pleasure when a beginner asks a question, listens to the answer, thinks about it, and gains understanding.It has become apparent to me that the OP doesn't listen to the answer and think about it. The OP's mind is fixated on their (mis-identified) "problem" and their (irrelevant) "solution".Can't win them all

author: pacioc193
author_rank: Regular Contributor
timestamp: September 10, 2023, 09:28:39 pm
content: Quote from: pacioc193 on September 10, 2023, 09:20:42 pmPs EOL computer communicate with this microcontroller since 1995…Now I need to understand how to replace the computer with a newer system without replacing the unknow microcontroller…

author: langwadt
author_rank: Super Contributor
timestamp: September 10, 2023, 09:43:26 pm
content: Quote from: pacioc193 on September 10, 2023, 08:13:02 pmok, so you do have it connected to a logic analyzer and getting signal that look reasonable, I thought that was your problem?

author: pacioc193
author_rank: Regular Contributor
timestamp: September 11, 2023, 09:53:39 am
content: Quote from: langwadt on September 10, 2023, 09:43:26 pmThanks to everyone... i finally found the solution.Protocol is HDLC that force a bit stuffing when a more than 5 bit are "1" consecutively.The byte 0x5F -> 0101 1111 will be translate to 0 1001 1111 (0x09F) to avoid the flag 0x7E misinterpreted.My board then is working well... I need just to correct the reading from my custom mcu in order to implement this behaviour.

author: tggzzz
author_rank: Super Contributor
timestamp: September 11, 2023, 12:38:40 pm
content: Quote from: langwadt on September 10, 2023, 09:43:26 pmFrom previous messages, it is "yes, repeat no"Hopefully the OP will have learned, by the time they next wants help.

author: Electro Fan
author_rank: Super Contributor
timestamp: September 11, 2023, 01:25:22 pm
content: Quote from: pacioc193 on September 11, 2023, 09:53:39 amCoolHDLC and bit stuffing after 5 consecutive 1s.https://www.techtarget.com/searchnetworking/definition/bit-stuffing#:~:text=HDLC%20packets,after%20every%20five%20consecutive%201s.It’s a little different than simple 7 vs 8 bit ASCII with an extra most significant bit.How did you discover what was happening and how are you going to fix it?

author: pacioc193
author_rank: Regular Contributor
timestamp: September 11, 2023, 02:05:05 pm
content: Quote from: tggzzz on September 11, 2023, 12:38:40 pmMy issue was, since start, a different result from old EOL computer reading and my logic analyser.Logic analyzer show me a different byte from the one the EOL computer show in Windows sniffing... For this reason i would like to see data BEFORE the transceiver because i was thinked an error on the TRANSCEIVER.... My decoded data signal was electrically "good" ...My english is bad, i know, apologize for all.Quote from: Electro Fan on September 11, 2023, 01:25:22 pmI discover it checking data from the EOL computer windows sniffing and logic analyzer with transceiver attached to it...After having check multiple time a lot of packets, i've notice that a pattern must be present for this bit shifting.Checking information online, i've found that is a common use to bit stuffing in HDLC protocol...I will solve this problem implementing a bit stuffing reading/writing inside my custom microcontroller used to replace the actual EOL computer...I already wrote a firmware for ESP8266 where i receive data from computer, bit bang the HDLC protocol, read the answer and send back to the PC.Something like in reading:Code:m_pxRxData[1 + m_uiRxBitCounter / 8] = (m_pxRxData[1 + m_uiRxBitCounter / 8] >> 1) | data;if (data == 1) ctrCounter++;else ctrCounter = 0;if (ctrCounter < 5)m_uiRxBitCounter++;else ctrCounter = 0;And in writing :Code:if ((data >> i) & 0x1 && ctrCounter < 5) //Force a bit to 0 for bit stuffing{SET_PIN = 1 << m_TX;if (data != 0x7E)ctrCounter++;}else{RESET_PIN = 1 << m_TX;if (ctrCounter == 5 && i > 1) i--;ctrCounter = 0;}After having understand that a bit stuffing happen, i searched online and found some interesting website :http://www.interfacebus.com/HDLC_Protocol_Description.html

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 12, 2023, 07:57:35 am
content: Quote from: tggzzz on September 11, 2023, 12:38:40 pmThat is probably wishful thinking. I consider it more likely that he thinks himself smart and thinks we're idiots.Just look at his other thread. Instead of doing some research and trying to figure out why I wrote that a GND wire is mandatory for RS485, he only wants me to admit that he is right.

author: pacioc193
author_rank: Regular Contributor
timestamp: September 12, 2023, 08:43:04 am
content: Quote from: Doctorandus_P on September 12, 2023, 07:57:35 amJust to end the discussion in a friendly way since perhaps my attitude has not been the best :I don't think anyone on this forum is stupid or that I am the genius of the situation.My problem was reading the differential signal without having the ability to connect the ground.I somehow managed to do it even though it is apparently not correct at all.I learned that I need to specify the problem better by providing a wiring diagram can help people fully understand my problem.Many times, however, the focus shifts to the wrong topic.Happy browsing!

author: tggzzz
author_rank: Super Contributor
timestamp: September 12, 2023, 08:57:59 am
content: Quote from: pacioc193 on September 12, 2023, 08:43:04 amI saw different issues: showing us single-ended waveforms, expecting us to diagnose your issue based on those, and arepeated refusalto do (and/or understand) why it is necessary to have a differential analogue receiver driving a logic analyser. That was all tied up with a confused understanding and/or statement of what you did and didn't know.As I taught my daughter, ignorance can be cured but stupidity can't.One technique I find useful: explain it to yourself in detail and in writing before getting other people involved. Often that allows me to clarify my mind and understand the core problem - so that I can solve the problem myself.Over to you for the future