FPGA Ecternal RAM PCB Design - Page 1
Forum section: electronics / general

author: ciikucli
author_rank: Contributor
timestamp: February 28, 2013, 07:53:56 am
content: I'm using a Spartan 3 FPGA, and I was wondering if there were any pitfalls or special considerations when designing a board with external dram. For starters, does dram or SRAM really matter? Which is more common? What's a good low cost ram IC, and what's a good middle point for total size? I'm just supposed to choose the most commonly used external ram module and connect it to a FPGA. Thanks!

author: cyr
author_rank: Frequent Contributor
timestamp: February 28, 2013, 09:34:52 am
content: That depends. What speed and capacity do you need?Small and slow -> asynchronous SRAM, very easy.Big and fast -> DDR SDRAM, which means fine-pitch BGAs and matched trace lengths and impedance (plus much more complicated control logic).

author: Harvs
author_rank: Super Contributor
timestamp: February 28, 2013, 10:21:23 am
content: You can still easily buy single data rate SDRAM in TSSOP packages, which aren't terribly difficult to deal with (albeit sizes are limited by today's standards.)However, dealing with the SDRAM controller in the FPGA can be a PITA.But as stated, SRAM is dead easy if you don't need a lot of it.

author: joelby
author_rank: Frequent Contributor
timestamp: March 01, 2013, 03:21:33 am
content: Also, if you want to use it with MicroBlaze you might want to see which parts are supported by the Xilinx MIG (memory interface generator).You will need to consider the size, cost, bandwidth and latency, what you want to interface it with inside the FPGA, chip packages you can handle, etc.

author: CarlG
author_rank: Regular Contributor
timestamp: March 01, 2013, 09:03:18 am
content: Quote from: ciikucli on February 28, 2013, 07:53:56 amSorry about this, but your problem/question is pretty much very contradictionary. You start with asking about design of "a board with external dram"; like you've already desided to use DRAM. And while I understand that you want to keep the question simple, you provide too little information to get a good answer. The specifications of "most common", "good low cost", etc only have "depends" answers.Yes, there are a lot of pitfalls using DRAMs. Especially, if you have to ask, then IMO, you shouldgo for SRAM. If you don't know enough to tell if DRAM or SRAM matters, then any (S)DRAM interface is just too much to start with, both in terms of design and layout. Just take a look into a mDDR or DDR2 device datasheet and try to figure out how to design the interface. For example, you can start with taking a look at the initialization of the device.Do you mean "module" or "device"? If you really are set to use "the most commonly used external rammodule" then, in practice, there is only DDR2 or possibly DDR3 modules to choose from.Although there nothing wrong with Spartan 3 in particular, mixing it with modern memory technology like DDR2 or DDR3 isn't very logical. Older (S)DRAM technologies I wouldn't even consider for a new design.

author: jeroen74
author_rank: Frequent Contributor
timestamp: March 01, 2013, 10:50:08 pm
content: SRAM does not have to be slow. You can get them with access times of 10ns (expensive though). Good enough for ~100MHz. Easy interface, no latency, no bursting, no refresh, no complicated control sequences needed etc. While an SDRAM controller does take care of all that, to fully utilize the bandwidth potential, the logic that uses the controller must be aware of the latency issues that SDRAM has.What's the actual application? How much memory do you need?

author: nctnico
author_rank: Super Contributor
timestamp: March 01, 2013, 11:45:39 pm
content: Actually 10ns SRAM is not that expensive. Its kind of standard. And if bandwidth is an issue you can always choose to use 16 bit wide memory. The problem is that you'll need to take the setup and hold times into account so 10ns doesn't translate to 100MHz.

author: amyk
author_rank: Super Contributor
timestamp: March 02, 2013, 06:45:17 am
content: For async SRAM 10ns is the fastest common grade (was used mainly for cache chips), but there are faster: GSI had a 6ns grade for a while, but seems to have stopped producing them although still mention 7ns on their site's datasheets.As for the fastest async SRAM you can buy... 8ns:http://www.mouser.com/ProductDetail/ISSI/IS63LV1024-8KL-TR/

author: jeroen74
author_rank: Frequent Contributor
timestamp: March 02, 2013, 11:26:49 am
content: I used the IS61LV51216-10 (10ns 512Kx16 async SRAM from ISSI) one in design, and it costs like €20 in small quantities. I call that expensiveThe designs runs at 49.152MHz, but I recall it worked at ~90MHz.

author: nctnico
author_rank: Super Contributor
timestamp: March 02, 2013, 09:31:35 pm
content: There are cheaper alternatives and you may want to check different suppliers:http://nl.rs-online.com/web/p/sram-memory-chips/0391628/

author: jeroen74
author_rank: Frequent Contributor
timestamp: March 03, 2013, 08:23:54 am
content: I get them from RSStill, an expensive chip (per bit) compared to SDRAM. The board I use it on isn't that cost-sensitive, it's very low volume.I once tried a comparable chip from GSI, but for some reason I didn't use it. IIRC because of availability; ISSI seems to be quite a reliable brand that keeps its products available for a long time.

author: AndyC_772
author_rank: Super Contributor
timestamp: March 03, 2013, 09:55:57 am
content: Quote from: ciikucli on February 28, 2013, 07:53:56 amGo back to whoever gave you that stupid, vague assignment, tell them to go and get their brain out of the jar they keep it in, and try using it for a moment.The most commonly used RAM module in the world, for this week at least, is going to be some commodity DDR module used in PCs. It'll be cheap (per unit capacity), but will require the use of a DRAM controller in the FPGA which you'll have to either write for yourself (hugely time consuming and difficult) or obtain from the FPGA manufacturer (likely to require a licence fee). The PCB layout will also be extremely demanding if you've not done a DDR interface before. Ultimately you'll get large capacity at low cost, but the engineering time and effort required will be high indeed.If you just need a bit more RAM than is available in the FPGA, then a RAM module is no help. You want to attach an asynchronous SRAM chip directly to the FPGA, ie. soldered to the same board. These are much easier to use, but offer smaller capacity and rather different performance - less latency but lower clock rate.Between the two you have the option of SDRAM, which will require a controller in the FPGA - though this is considerably simpler and easier to implement than a DDR controller. The PCB layout will be much less critical too.The correct solution for your application depends on your needs for speed and capacity, your capabilities in terms of VHDL and layout expertise, and the amount of money you have to spend on licence fees and engineering time. There is no generic "right" answer.

author: ciikucli
author_rank: Contributor
timestamp: March 05, 2013, 10:20:55 pm
content: You're quite right. I probably won't be talking to that project adviser again. I am still considering using SRAM on my own board. Its supposed to be a lot easier than DRAM. In both programming and board design consideration. Thanks for all the help.

author: Dongulus
author_rank: Regular Contributor
timestamp: March 11, 2013, 09:50:56 am
content: You might already have the Spartan 3 FPGA locked in for your design. If not, perhaps consider the Spartan 6 family, which has Memory Controller Blocks (MCBs) that are specifically suited for interfacing with DRAM (DDR, DDR2 and DDR3). An MCB has an upper limit of 800 Mbit/s access rates according to the datasheet and Xilinx's IP core generator does all of the work designing the memory controller.

author: nctnico
author_rank: Super Contributor
timestamp: March 11, 2013, 03:51:59 pm
content: Even if it where that simple you'd still need to design around the random access time. It still takes about 100ns to get data from a random address in a DRAM based memory. The only thing which has been greatly approved is the burst transfer rate but most of that advance came from putting memory banks in parallel on the die.