USB JTAG Programmer - PCB Layout Advice - Page 1
Forum section: electronics / projects

author: David
author_rank: Frequent Contributor
timestamp: January 04, 2010, 10:08:04 pm
content: Hi all,I am currently working on a "USB-Blaster" like JTAG programmer as a part of a larger project I am doing. I have found it hard to route the layout as the CPLD used has 0.5mm pitch pins and I dont really want to use lower than 0805 parts (caps/res). Has anyone got some good advice for routing tight pitch components? I am currently working on an FPGA based project (144-pin TQFP) and routing the de-coupling caps alone is a nightmare!I have attached the pics of my JTAG programmer layout (Sorry for JPEG quality):http://biketrialsdave.pwp.blueyonder.co.uk/Blaster1.JPGhttp://biketrialsdave.pwp.blueyonder.co.uk/Blaster2.JPGCheers,Dave

author: charliex
author_rank: Frequent Contributor
timestamp: January 04, 2010, 11:05:57 pm
content: what about putting some of the caps on the other side of the board?

author: EEVblog
author_rank: Unknown
timestamp: January 05, 2010, 02:14:46 am
content: Did you autoroute that?Passive component placement is not optimal around the chips.R7 as one example, and it doesn't look like any of the bypass caps are actually right at the power pins. Probably not a problem in this design, but indicative that placement can be much improved.I assume you'll ground fill the bottom layer too?Remember good PCB layout is 90% component placement.Dave.

author: jahonen
author_rank: Super Contributor
timestamp: January 05, 2010, 10:05:36 am
content: How many signals you need to route out of your FPGA? If you really want to make it good (especially with that 144-pin TQFP one), then forget 2-side PCB and go for 4-layer. Then you can use internal layers for ground and VCC planes alone. Makes your job much easier and gives much better results if you care about EMC and signal integrity (like I do very much even on my hobby projects).BTW, that was not very easy even with 0402-sized caps and 6 layers, still the capacitors were very much PITA.See here.Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: January 05, 2010, 10:08:10 am
content: Quote from: EEVblog on January 05, 2010, 02:14:46 amThis was my first go at manually routing the board. The problem I found with putting the caps right by the power pins is that they obstruct the other adjacent pins. I haven't filled the bottom layer but I think that may help, thanks.Dave

author: David
author_rank: Frequent Contributor
timestamp: January 05, 2010, 12:16:03 pm
content: I will be routing nearly every signal on the FPGA. I feel a 4 layer board is probably going to be essential. I will have to look into how to do this in eagle.DaveQuote from: jahonen on January 05, 2010, 10:05:36 am

author: David
author_rank: Frequent Contributor
timestamp: January 05, 2010, 08:24:04 pm
content: Made a few suttle changes:http://biketrialsdave.pwp.blueyonder.co.uk/BlasterFinal.JPG

author: EEVblog
author_rank: Unknown
timestamp: January 05, 2010, 09:58:58 pm
content: Quote from: David on January 05, 2010, 08:24:04 pmBetter.As a rule you should be using more ground stitching between top and bottom layer. Don't be shy to put extra vias, it doesn't really cost you anything.The bypass caps are still too far away from the chips IMO. U1 and U2 for example have plenty of room to put the bypass caps right at the pins.You should put the bypass caps right at the pins first before you route anything, and then work around them. Then only move them away if you have no other choice.You seemed to have placed all the passive parts away from the chips in neat alignment and then routed *to* the chip. That technique can produce aesthetically pleasing placements, but it's not so good for signal integrity.What is your routing width and grid?Don't be afraid to go down to say 5 though track and spacing if you are having the board professionally manufactured, that will give you much greater routing density.Other niceties, like C2 and C3 should really be at the back of the connector to prevent those unnecessary long traces going to them.Apart from a few subtle placement things and the odd trace, I do like your layout, it looks quite neat, and you've followed good aesthetic design practices.Dave.

author: David
author_rank: Frequent Contributor
timestamp: January 06, 2010, 09:50:19 am
content: Thanks for the positive critisim Dave! I am using 8 mill track/grid. I will further refine it later on today.

author: jahonen
author_rank: Super Contributor
timestamp: January 06, 2010, 02:15:34 pm
content: Yep. If the bypass capacitors are behind large inductance, they become quite useless. You may as well remove them, they just take up valuable PCB space but serve no practical purpose. They should be between the power rail and the IC, so that IC power pins connects directly to the capacitor (proper technique for a 2-side PCB). Remember that GND and VCC connections are equally important. Same goes for C15-18, signals from the pin header at the right side of the board should be routed first to the capacitors, and then from the capacitors to the rest of the circuit. And like Dave mentioned, use tons of ground stitching vias.And since you have a CPLD on the board, try to find a better pin assignment for the signals so that it makes your layout easier. It takes often a while to iterate the pin assignments, but it really is beneficial at the end.Regards,Janne

author: Unknown
author_rank: Unknown
timestamp: January 06, 2010, 02:40:57 pm
content: Quote from: jahonen on January 06, 2010, 02:15:34 pmI use Altium Designer Summer 09, and have a feature called pin swapping (not sure about Eagle never used it) where I can put groups of pins in to an array, and then on the fly doing the PCB, I can swap pins around in the group to make signal routing easier.

author: David
author_rank: Frequent Contributor
timestamp: January 06, 2010, 06:15:03 pm
content: Well I made some final adjustments, moved some capacitors, added more stiching vias and tweaked some routes. I have sent the order off to PCB Cart so now all I can do is wait! Only my second PCB so fingers crossed it all goes wellDave

author: charliex
author_rank: Frequent Contributor
timestamp: January 06, 2010, 07:15:50 pm
content: For my own question, about putting the capacitors on the other side of the PCB for the USB connector, since thats what i've been doing and most of the time the pins are thru hole, so the caps are as close to the pins as possible?Is that a poor design choice ?

author: jahonen
author_rank: Super Contributor
timestamp: January 06, 2010, 08:45:35 pm
content: Putting the capacitors below the components is not a bad practice. I have done it myself when I used through-hole parts. Especially with quad opamps, 1206-sized caps fits just nicely between pins 4 and 11, or two 0603s when used with split supplies. It really is a question of power supply impedance. At high frequencies, it is the inductance which determines the impedance. Inductance is proportional to the loop area. Putting the bypass caps below the component is also usually done with the BGA components, since you can't place discrete capacitors any closer to the package otherwise (except with expensive buried passive components technique).Regards,Janne

author: charliex
author_rank: Frequent Contributor
timestamp: January 06, 2010, 10:51:51 pm
content: Thanks Janne,I usually just do the prototyping, then if when it goes commercial the board gets sent off to a professional layout guy in Australia. But there is no reason to pick up bad habits, or just assume something is Ok because i've seen it before.cheers,charlie

author: Neilm
author_rank: Super Contributor
timestamp: January 07, 2010, 06:14:39 pm
content: If you want to have some advice on layout for PCBs - especially if EMC is a concern I would recommend going tohttp://www.compliance-club.com/and look for the articles by Keith Armstrong. He release a very good book a year or so ago on this topic and summarised in this publication. Registration is free. I work in electronics designing instrumentation and have found that applying these techniques has saved a lot of time and hassle - the project I am working on at the moment just sailed through the required tests and that produces high voltage (100kV) sparks as part of the test sequence.YoursNeil

author: David
author_rank: Frequent Contributor
timestamp: January 09, 2010, 05:41:49 pm
content: I am now about to start the layout process of my latest project design but I need some more advice... The design is based around a Cyclone 3 FPGA and all 94 I/O's are being use (Its a custom development board). My senses are telling me that I should use a 4-layer board? I am also thinking I'm going to need 0402 caps/resistors? Are these particularly hard to solder using hot air reflow by hand?Regards,Dave

author: jahonen
author_rank: Super Contributor
timestamp: January 09, 2010, 06:04:52 pm
content: I don't have much experience on the hot air reflow with chip components (I think that using soldering iron is easier/faster with those ones), but with soldering iron it needs just a little more care when placing the parts. I suspect that hot air reflow is ok. Also note that multilayer PCBs tend to be a quite good heat sink, so you'll need more heat than with a 2-side design. This is most notably obvious when soldering ground connections or similar pads connected to large plane areas.Bottom line is that if you have room for larger components, then use them. 0603 is perhaps the optimum size for me, smaller is notably more difficult to solder and larger ones are not that much easier. But try it out, your mileage may vary.Regards,Janne

author: charliex
author_rank: Frequent Contributor
timestamp: January 09, 2010, 10:39:39 pm
content: I can hand solder 0402 (metric) but i'd rather not !I use a very fine tip 700F to do it and not the hot air station though, but i'm not using paste just solder. I'm looking at making some brass stencils and solder paste this week.The biggest problem i have with them is that if it jumps off somewhere its very hard to find againThere is a company withreasonablypriced preheater that i've thought about trying if i had to do more than a handful of componentshttp://www.zeph.com/but i've never used it, or even know if its really required.

author: David
author_rank: Frequent Contributor
timestamp: January 10, 2010, 03:56:51 pm
content: Well a last minute change to my design (for the JTAG programmer) has shot me in the foot! I changed the supply voltage to the crystal module from 3.3V to 5.0V only now to discover that these are no longer made and cannot be found anywhere! I have sent an email to PCB-cart and fingers crossed I can send them the updated gerbers.Dave

author: jahonen
author_rank: Super Contributor
timestamp: January 10, 2010, 04:30:12 pm
content: Well, I can only say that these things happen, no matter how deeply the design is reviewedAs long as you can fix it with some wire wrap, I think it is okay for the first prototype. At my work, it is often third or fourth revision of the PCB what is actually good enough for production (with all mechanical, functional, performance and EMC problems fixed), and certainly not before the second round.Worst thing I have ever encountered was that PCB had completely wrong land pattern for a BGA, which was not noticed until assembly house informed that they have some trouble assembling the prototypesNeedless to say, the boards were just a bunch of junk.Regards,Janne

author: charliex
author_rank: Frequent Contributor
timestamp: January 10, 2010, 05:52:18 pm
content: I think thats why i switched to software early on in my careerits a lot easier to patch. Though i've had plenty go out for mass production on CD with errors you find out about two minutes after the last one is pressed and no way to patch it. that sinking feeling as you realise you forgot something.did you try findchips.com ? i've had some luck with it finding some parts, one of our ECU's uses an old renesas chip,and renesas seems to update every time you use one of their chips, i've had a heck of a time finding the dev board and debug interfaces for a few of them.

author: EEVblog
author_rank: Unknown
timestamp: January 10, 2010, 08:59:03 pm
content: Quote from: David on January 09, 2010, 05:41:49 pm0402 are at the point where it becomes difficult to solder then by hand without using a good microscope, avoid and use 0603 if you can.Various assembly houses that do protos and small runs by hand charge a LOT more for 0402, because they are much slower to handle and assemble and harder to visually inspect.For automated assembly it's not a problem though.(I can do 0402's by eye, but I usually solder them under the Mantis (x4 or x8) scope)You don't necessarily need a 4 layer board for a 96 I/O pin FPGA (TQFP package I'm presuming?), but it will help. The decision might come down to production cost. Get a quote for the same board from PCBcart for 2 and 4 layers and see if the cost is acceptable in production, if it is then go with the 4 layer board.Dave.

author: David
author_rank: Frequent Contributor
timestamp: January 12, 2010, 08:36:08 am
content: Thanks for the advice. Yes it is a TQFP. Regarding my Micro-Blaster, I got in contact with PCB cart but unfortunately they had already started the etching process. However, I was able to update all my layers for $36 (£18) so I think I escaped lightly!

author: David
author_rank: Frequent Contributor
timestamp: January 27, 2010, 01:30:25 pm
content: Well I've just finished populating the board. A fine nozzle/solder paste and hot air reflow soon had those IC's downStage 1 of three is complete with testing (Its recognised by my pc..).Dave

author: charliex
author_rank: Frequent Contributor
timestamp: January 27, 2010, 06:01:28 pm
content: turned out well.

author: jahonen
author_rank: Super Contributor
timestamp: January 27, 2010, 09:37:07 pm
content: David,Nice to see your design turned out to be good after all. However, I have found out several times that don't pop the champagne until it all worksIn case you still wondering about whether to do your next FPGA project you mentioned with 2 or 4 layers, maybethiswill make it easier to decide. That is a Altera Cyclone II EP2C8, 144 pins and not even near of all the IO:s routed. As you can see, there are hefty number of VCC and GND pins (for a good reason, the IO drive capability is quite impressive). I'm using 0.8 mm diameter vias (with 0.4 mm hole) on the GND and VCC pins on the FPGA and still the damn thing feels like huge blob when placed next to the FPGA pins. The core voltage regulator is underside of the chip, along with the bypassing. I'm planning to use first-to-plane-and-then-to-pin-strategy for powering this thing, although it is not the best thing with only 4 layers, as the inner layers are quite far apart (about 1 millimeter).Cyclone III is even more difficult beast since it requires three voltages (or even four if using DDR-interface) (unless you use 2.5 volt IO:s), one for the core (1.2 V), one for the PLL:s (2.5 V) and finally the IO-voltage (e.g. 3.3 V)Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: January 27, 2010, 10:08:21 pm
content: Quote from: jahonen on January 27, 2010, 09:37:07 pmAh yes I am certainly not celebrating yet!Regarding my next project, I feel a 4 layer board is now the way to go. My idea to handle the VCC pins is to put vias directly behind the vcc pins (I.e. under the FPGA itself) and then straight down to the power plane. I think I might have to route tracks of different voltages through the power plane (2.5V, 1.2V) as well to the appropriate pins as I plan on having it filled with 3.3V (I'm using 3.3V for all I/O).Dave

author: David
author_rank: Frequent Contributor
timestamp: February 02, 2010, 09:12:04 pm
content: So the nightmare of my latest project has just started. Attached is my first go at a very rough layout for my board (Just major component placement). The problem I have is that the RAM/ROM and all those 74HC245 latches share the same address/data buses (the latches just use the data). The data and address buses are 16-bits wide but the latches only use 8-bits of the data each. For this reason ive tried to keep them all as close as possible. Its a right pain that I can't get the RAM/ROM in the same packages too!Dave

author: jahonen
author_rank: Super Contributor
timestamp: February 03, 2010, 07:29:06 pm
content: It seems that you are integrating the USB-blaster on the board, why not just use separate one, makes the layout somewhat simpler? Also, '245 is a bidirectional buffer, not a latch. Did you mean '373? Really not enough IO's for separate address and data buses?I used just array of small 0.3 mm diameter vias on the thermal pad, but that requires hot air soldering.IMO, it makes easier to place the parts when all the power/gnd unroutes/airwires/ratsnest are hidden and just pins colored differently. Especially so with multilayer boards, where VCC and GND are available anywhere on the board. I'm not sure if Eagle supports that.Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: February 08, 2010, 07:11:06 pm
content: Hey everyone,I need some opinions on my routing style. Attached is a picture that shows how I am using filter caps to the ground plane (By placing a via at the end of the caps that goes to the ground plane) Is this a good way of de-coupling? Should I connect ground points of the same IC in the signal layer and then use only a few vias to the groundplane instead?Thanks,Dave

author: jahonen
author_rank: Super Contributor
timestamp: February 08, 2010, 07:26:13 pm
content: I think that your routing style is quite similar to that I use. Connecting the capacitors directly to the plane is ok. For the FPGA, connect the ground pins directly to the plane and don't share the vias, use own via for each ground pin. Also, connect VCC plane directly to the capacitor (like ground), not from the inside end of the FPGA package, although that looks tempting from space point of viewWhat you'll want, is a low inductance connection between the capacitor and the FPGA. This can be accomplished by routing the current and its associated ground current on layers with close proximity. With 4-layer buildups, 1-2 and 3-4 are very close (something like 0.2 mm apart).Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: February 08, 2010, 08:39:18 pm
content: Why is it a bad idea to place vias to Vcc behind the pins (under the IC) ? I'm really starting to think this board isn't routable now! Its a nightmare!

author: jahonen
author_rank: Super Contributor
timestamp: February 08, 2010, 09:25:30 pm
content: See pages 100 and 108 of this nicePDFone of my colleagues found. Quite recently, I ended up connecting the pins and capacitors both directly to the planes. And to reduce the congestion of the routing area, I did put the core VCC decoupling capacitors to the bottom side of the PCB, just under the FPGA.Hereis the screenshot from the layout, but unfortunately not very detailed. However, thisPDFshows the layout in more detail.Don't give up just yet, that requires just a little thought. Also, reduce the component size (decoupling caps) if at all possible. That might make it easier.Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: February 18, 2010, 12:13:57 pm
content: I thought I would post an update of the board so far, although its still a long way off. I kept up my persistence and what first appeared to be impossible has worked out fairly well IMO. While I'm here I'd just like to ask peoples opinions on using wider tracks mixed with smaller ones...What I mean by this is that I've used 0.016" tracks from most of my I/O (ie the switches, leds etc) to in-line resistors and then 0.01" tracks to the FPGA so that I can fit them in. I am now thinking it looks neater to use 0.01" all round? (Obviously not for high current etc..)Dave(Update) Routing Example:

author: TheDirty
author_rank: Frequent Contributor
timestamp: February 18, 2010, 02:49:22 pm
content: 10mil tracks are perfectly acceptable for these small signal lines. Generally I don't care about what looks best with track size, though and usually go with the largest trace that I can place without going overboard. The layout is looking really nice. Is there a reason you wont put components on the bottom of the board? Those decoupling caps would work out well on the bottom.My own quirk is just trying to shove in everything as tight as possible.

author: David
author_rank: Frequent Contributor
timestamp: February 18, 2010, 04:38:12 pm
content: Thanks for the comments. Are you reffering to the big white space on the left-hand side? If so, that's for an LCD display that will plug in.

author: TheDirty
author_rank: Frequent Contributor
timestamp: February 18, 2010, 05:42:41 pm
content: No, sorry, that wasn't a comment on your board. I was just commenting of preferences when it comes to layout. You like to have balanced looking track sizes and I'll do everything I can to jam components as close together with the smallest board size possible. I think it's like those people that can't walk past a painting that doesn't look straight.

author: Unknown
author_rank: Unknown
timestamp: February 19, 2010, 09:24:43 am
content: The rule of thumb I use is to place the largest possible trace I can. Obviously if you are doing controlled impedance (eg USB data, LVDS, RF etc) then the controlled impedance dictates the width. If you can get away with say 20mils for most of the board, and only need to neck down to say 10mils for around the FPGA, it will make the board more "manufacturable" as you will not have as greater problem with under etching (where the etchent eats under the track).Years ago it was more of a problem with needing to "balance" the copper on all the layers, but with modern manufacturing processes, you can have big wide open areas and small tracks.

author: David
author_rank: Frequent Contributor
timestamp: February 20, 2010, 08:01:51 pm
content: This is my preliminary "Final Version 1.0":Dave

author: Unknown
author_rank: Unknown
timestamp: February 21, 2010, 03:16:30 am
content: Hi David,Looks like a great board. Which FPGA are you targeting ?OK some issues: (constructive#1 In the 4x6 keypad, what is the track and gap for the brown traces that are horizontal above PB4, 5 etc. (also bellow the leds)#2 Where the voltages are listed at the top of the board, are the big square pads, tags for a D-Pak voltage regulator ? If so not a good idea to have a hole or via in them (esp not a large one) as it will thief solder during soldering (suck it into the hole) this is mainly an issue for reflow soldering, but it is best to get into good habits#3 The bus around the Flash, SRAM and bus IF for the PB's / LEDS is very uneaven, this could make for some strange timing issues at high speeds (without seeing the schematic it is hard to say BUT it looks like the PB's and Leds are hanging off the Data bus ?)BUT once again, good looking board

author: David
author_rank: Frequent Contributor
timestamp: February 21, 2010, 11:05:41 am
content: Quote from: GeekGirl on February 21, 2010, 03:16:30 amThanks for the constructive criticism, geekgirl!1. The tracks for the LED's/Keypad etc are 0.016" wide and use >8mil spacing. The JPEG image doesn't show this very well, I will upload a PDF at some point so you can zoom in.2. The idea of the large via's under the GND Pads on each voltage regulator was to solder from the reverse side and to allow for better heat dissapation. I am currently looking into revising this as its not necessarily needed.3. The data bus was the hardest part of the board to route as it it shared between the Keypad, LED's, switches, RAM and ROM. I am not planning on having 'very' high speed designs but this is obviously something that the user will have to consider when designing a core.Thanks again for the comments,Dave

author: jahonen
author_rank: Super Contributor
timestamp: February 21, 2010, 01:00:56 pm
content: Just a note that even if you would transfer one word per second along that bus, reflections on the bus edge-sensitive control signals could still cause a problem (non-monotonic edges). It is not the data rate which is important, but the edge rateBelieve me, that kind of problem is very hard to findRegards,Janne

author: David
author_rank: Frequent Contributor
timestamp: March 19, 2010, 12:11:45 pm
content: Its been a long time since I posted here but I've finally had the PCB'S come through

author: TheDirty
author_rank: Frequent Contributor
timestamp: March 19, 2010, 05:48:47 pm
content: Excellent work David. It's always interesting to see what goes into peoples board designs.

author: David
author_rank: Frequent Contributor
timestamp: April 09, 2010, 05:16:56 pm
content: Thank you shafri. The PCB's were manufactured by pcbcart.com in China, and they give a very good finish. The lettering is known as Silkscreen and this is created whilst designing the PCB'S. Via's are essentially plated holes through the board and allow the top layer to connect to the bottom layer. The SMD soldering is all by hand using solder paste through a fine nozzle (on a syringe), it is then reflowed using a hot air rework station. It is really a case of time and practice when it comes to soldering! PCB design itself is something of an art and most often takes as much time (if not more) than designing the circuit schematics. I still have a LOT to learn, but its an on-going process.I recommend you search online for PCB design tips. There's lots out there. Dave has a great document on the basics.A lot of skill comes from being able to use the design software correctly. I used Eagle PCB, but there's plenty of others out there. Altium Designer (probably the 'de-facto' industry standard) is next on my list to learn!Dave

author: EEwannabe
author_rank: Contributor
timestamp: April 09, 2010, 06:18:53 pm
content: Some guy by the name of Dave Jones posted a good tutorial:http://alternatezone.com/electronics/pcbdesign.htmAlthough be warned, I made a board that I was proud of till I read through it, now I don't dare show it around. Thanks Dave!- Patrickp.s. - nice board

author: Mechatrommer
author_rank: Super Contributor
timestamp: April 10, 2010, 04:49:33 pm
content: "The PCB's were manufactured by pcbcart.com in China"well, isnt that take some cost and time to ask someone from china to do and send back to us? if only we can do this from scratch at home."plated holes through the board"dont we need any additional soldering or some type to ensure connectivity between the plated hole and copper plates it is connecting? i used to drill a hole and then insert a piece of wire, solder on top and bottom, as i said, ugly (but i'm happy haha)"Eagle PCB, but there's plenty of others out there. Altium Designer "i'm sure i never touch them before. i just use photoshop haha."reflowed using a hot air rework station"i read some components will be easily damaged if exposed to temp more than 150 degree C. i tried that before using hot air, took me ages to melt the soldering just on a particular area, but too long for the components nearby to get exposed to that high temp. maybe something wrong with my skill, sigh. i ended up to just using soldering iron."Some guy by the name of Dave Jones posted a good tutorial:http://alternatezone.com/electronics/pcbdesign.htm"great!!! thanx!!!thanx david and eewannabe for replying. for other more advanced practitioner, hope my post here dont bored you.

author: David
author_rank: Frequent Contributor
timestamp: April 18, 2010, 11:22:58 am
content: What are peoples opinions on the routing shown in the attached picture? I know there are right angles where the smaller ceramic caps are connected but I think this is acceptable?Cheers,Dave

author: TheDirty
author_rank: Frequent Contributor
timestamp: April 18, 2010, 01:45:18 pm
content: It's impossible to understand how everything is going. It does not look like your caps are inline with the power output. Your power caps need to be between the regulator and the rest of the circuit, you can't just branch power off before it goes through the caps, it reduces the caps efficiency tremendously. Power In -> cap -> regulator -> cap -> rest of circuit.

author: embedded
author_rank: Newbie
timestamp: April 18, 2010, 11:29:14 pm
content: Quote from: David on April 18, 2010, 11:22:58 amRight angles become important as one looks for RF performance of the decoupling. The rule of thumb is up to 30Mhz this is not terribly important. But I suspect that you will have 200Mhz + clocking. So you are looking for the impedance at that frequency. For sake of argument 200Mhz is about 1.5m wavelength then feature size directly relates to the impedance. (And the feature size is very relevant to that wavelength, be well under 1/1000'th of the wavelength since the wavelength is ~300 ohms at wavelength! So you are getting impedance of 300ohms x fraction of wavelength.)Certainly you can decrease impedance by smoothing corners and I would definitely do that for 1Ghz. But is it necessary? Really it's a judgment call. I have not given you an opinion I hope I have given you a tool to look at the issue.Just remember more parallel traces decrease impedance as a square of traces ie faster than width or anything else.That's why Dave is so fanatical about stitching grounds. He is creating parallel traces decreasing impedance by a square rule.

author: TheDirty
author_rank: Frequent Contributor
timestamp: April 19, 2010, 01:14:20 am
content: You're feeding your lower voltage regulators from the higher ones. I'm assuming the low voltage ones take very little current.

author: David
author_rank: Frequent Contributor
timestamp: April 19, 2010, 08:18:23 am
content: Quote from: TheDirty on April 19, 2010, 01:14:20 amThe lower voltage regulators will pull quite a bit of current... I did think about using two 5V regulators in parralel to provide more?This is currently how the regulators are daisy chained:Dave

author: jahonen
author_rank: Super Contributor
timestamp: April 19, 2010, 03:40:29 pm
content: Sharp corners matter only if one aims for constant specific impedance. You can imagine that track gets little wider at corners, so impedance drops there. For power supply rails, you don't target to any specific impedance, but lowest possible one. So having a right angles is not a problem in that sense. A real culprit here is that T-branches increase the impedance of the small capacitors, making them considerably less effective. It is just like adding an series inductor (and very small resistor) with the capacitor.I'd remove those T-branches and route the tracks via the small capacitors (think the capacitor as 4-terminal device, separate input and output tracks), as it should not be very difficult to do so.Regards,Janne

author: David
author_rank: Frequent Contributor
timestamp: April 19, 2010, 07:00:45 pm
content: Quote from: jahonen on April 19, 2010, 03:40:29 pmI'm not quite sure I understand what you mean by this? Any chance of a very quick diagram?Cheers,Dave

author: jahonen
author_rank: Super Contributor
timestamp: April 20, 2010, 09:50:00 am
content: Quote from: David on April 19, 2010, 07:00:45 pmHere's a picture what I mean, it is difficult to explain it in words, but as you can see, the concept is quite simple, minimize the loop area and treat capacitors as 4-terminal devices.Regards,Janne

author: TheDirty
author_rank: Frequent Contributor
timestamp: April 20, 2010, 11:34:23 am
content: He's saying what I said in post 50, you are routing power around your caps instead of through them. Your traces need to go through the caps rather than the caps are just attached to the traces somewhere.

author: David
author_rank: Frequent Contributor
timestamp: May 14, 2010, 04:06:16 pm
content: FINALLY!!!!

author: EEwannabe
author_rank: Contributor
timestamp: May 14, 2010, 04:27:22 pm
content: Congrats,very nice looking board.-Patrick

author: DavidDLC
author_rank: Frequent Contributor
timestamp: May 14, 2010, 06:41:01 pm
content: Excellent work.What I have done is to create a generic board with inputs/outputs, so I can use this generic I/O board with any other development board for microcontroller, instead of having everything together.I will post a picture of this boardI ordered one pcb and the manufacturer sent me two, if any of you is interested to get the board you may need to deal with:- The board has my name on it- Pay shipment and I will send it to you.- Buy the components and populate, it's a mix between smd and through hole components.

author: DavidDLC
author_rank: Frequent Contributor
timestamp: May 22, 2010, 12:23:44 am
content: Here is the picture of the board I was talking about:It has:- 7 x 24 LED matrix, this is to be driven by 4 eight bits ports.- 2 x 16 LCD for 8 bits connection and 3 control lines, but It could be managed in 4 bits and 3 control lines with an additional adapter (not included). It has contrast controlThe rest from here is to be managed by 1 eight bit port:- Two 8 SMD LEDs ports- 4 x 7 LED segment- 4 x 4 keypad matrix, you need to have a port with internal pull-ups- 8 push buttons, they can be read high or low- 8 position dip switch, they can be read high or low- 2 hex switch, they can be read high or low- 2 H-Bridge for motor control- 1 port with 4 NPN optocoupler and 4 SPDT relaysAs I mentioned before I use this for prototyping.

author: DavidDLC
author_rank: Frequent Contributor
timestamp: May 22, 2010, 12:26:21 am
content: Attach is the original picture file

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 22, 2010, 12:51:21 am
content: nice! how much it cost to get a sample PCB? including the shipping.

author: DavidDLC
author_rank: Frequent Contributor
timestamp: May 22, 2010, 01:59:16 am
content: I'm giving away an unpopulated PCB, as I explained before, I ordered one and the manufacturer sent me to.Whoever wants it should buy the components and pay the shipping.I'm located in San Diego, Ca. USA you can calculate the shipping cost and make the decision