Bugs running MCS BASIC-52 on 8052 - Page 1
Forum section: electronics / general

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 26, 2016, 04:07:49 pm
content: Hey! So I've run into a strange problem, trying to get a junk 8052+eprom board to run MCS-basic.It's occuring with both BASIC-52 V.1.1 (Intel's) and V1.2 (modified to work with 8051's as well).I added 8K SRAM at 0000h in memory, for it to run basic, and it boots BASIC,auto-detects baudrate to the terminal and everything.But any operation that would require RAM, it seems returns "Error: invalid line number"When I try to print mtop, it returns 0, and when I set it to something high, like 7FFFh, the error persists.It seems like it isn't accessing the RAM properly, but it must do, since it won't boot at all without it.All chips are tested good, btw.Is BASIC taking my entire RAM? Should I add another 8K? Is it the wrong place in memory?I'm at a loss!Thanks in advance!--Christoffer

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 26, 2016, 04:53:10 pm
content: Upgraded to 32K SRAM - still boots fine, still same issues.RAM and ROM are both addressed in the same space from 0000H, since it's Harvard architecture,it has a "program-read" that enables the eprom, and "data read/write's" for the RAM.--Christoffer

author: westfw
author_rank: Super Contributor
timestamp: January 26, 2016, 06:57:48 pm
content: QuoteSuch as? Are you able to get it to remember entered lines of a program?QuoteIt could be using on-chip RAM for the "OS" and interpreter variables, and only using external RAM for storing the program and/or big arrays?Where did you get the MCS-Basic from?

author: Kalvin
author_rank: Super Contributor
timestamp: January 26, 2016, 07:09:23 pm
content: Which RAM device you use? Have you checked that the device doesn't have any extra chip selects and that you enable the /CS along with the /RD and /WR.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 26, 2016, 07:14:11 pm
content: Quote from: westfw on January 26, 2016, 06:57:48 pmAlmost any operation, like entering any line of code like 10 print "something"or trying to use LIST to list current program in RAM.I got the basic distributions from this page; V1.1 is INTEL's, the rest are modificationshttp://www.dos4ever.com/8031board/8031board.htmlQuote from: Kalvin on January 26, 2016, 07:09:23 pmThe RAM (62256, now) has two chip selects, a /WR and an /OE - all chip selects are tied to active, because I only have one memory device.--Christoffer

author: free_electron
author_rank: Super Contributor
timestamp: January 26, 2016, 09:49:32 pm
content: the ah basic does NOT use the standard memory layout.http://www.nomad.ee/micros/Basic52Manual.pdfthe eprom is dual mapped in rom and ram space

author: free_electron
author_rank: Super Contributor
timestamp: January 26, 2016, 10:02:11 pm
content: 1.9 ANSWERS TO A FEW QUESTIONSQUESTIONAfter RESET or power-up, MCS BASIC-52 does not return the proper value for MTOP, what's theproblem?ANSWERVirtually every time this problem occurs it is because something is wrong with the decoding circuitry inthe system or one or more of the address lines to the RAM are open or shorted. The user should makesure that all of the address lines to the system RAM are connected properly!A simple memory test can be implemented in the COMMAND MODE to verify the addressing to theRAM. First set XBY(1000H) = 55, then walk ones across the address (i.e. P. XBY(1001H) - P.XBY(1002H) - P. XBY(1004H) -- P. XBY(1008H) P. XBY(1010H)) until all locations are tested. If forinstance, P. XBY(1008H) returns a result of 55, then address line 3 (A3) would probably be open orshorted.

author: legacy
author_rank: Super Contributor
timestamp: January 26, 2016, 10:10:05 pm
content: years ago I designed and built a tiny board like the one in the topic title: it works perfectly!my board has- external 27257, 32Kbyte EPROM (fetch only), BASIC takes the first 8Kbyte, my routines follow- external 62256, 32Kbyte RAM (data only)- external 3x 8Kbyte NVRAM (combining PSEN + R/W, so I can fetch and read/write data)- external add on board, ADC 16 channels @ 14bit, RELE array(16), LCD, etc etc, including an ACIA@9600bpsand it has just worked greatly for the last 20 yearsnever turned off, it's the main controller of my greenhousethe NVRAM takes a basic script plus environment data, and it's non volatile due to the DALLAS chip

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 26, 2016, 11:28:22 pm
content: The MCS-51 manual does not mention having BASIC in external ROM. But the "microcontroller idea book" - featuring the 8052AH-basic does. It specifically said to have both atleast 2K RAM and BASIC in ROM at 0000H, but of course, this may be wrong.I'll run the mentioned memory test later, didn't even notice that Q/A section of the manual!Thanks for the hints!It's worth noting, that I have the /EA pin tied low, to disable internal ROM, since I use some pre programmed 8052 - This essentially turns it into an 8032.--Christoffer

author: westfw
author_rank: Super Contributor
timestamp: January 27, 2016, 11:42:57 am
content: Did you make a PCB? 8051 systems all apparently pre-date EAGLE, so I've been unable to find a simple PCB I could send off to OSHPARK or equivalent.

author: legacy
author_rank: Super Contributor
timestamp: January 27, 2016, 11:50:33 am
content: Quote from: westfw on January 27, 2016, 11:42:57 amI did, 20 years ago, with OrCad for DOSI am going to take a photo

author: legacy
author_rank: Super Contributor
timestamp: January 27, 2016, 02:55:26 pm
content: I built 2 boards, one is currently in use in my greenhouse, so here it is the photo of her twin sister

author: matseng
author_rank: Frequent Contributor
timestamp: January 27, 2016, 03:42:05 pm
content: Just to chime in on this conversation (to get them in my "unread" list) I just wanted to say that I recently found two 8052-BASIC chips in my junk drawers. They have the old revision 1.0 of the basic interpreter that apparently is unobtanium as a download on the internets :-) Not sure why anyone would like to run the 1.0 when the newer bugfixed versions are around. If I get them up and running I hope to be able to dump the roms and "donate" them to community.

author: legacy
author_rank: Super Contributor
timestamp: January 27, 2016, 04:55:39 pm
content: mine is v1

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 27, 2016, 11:37:09 pm
content: Quote from: legacy on January 27, 2016, 02:55:26 pmWow! That's really a nice looking board! Love the Eurocard/Din4.1612 format!-The v1.0 basic is, as far as i know, REALLY rare, I'm sure a lot of people would be grateful if you decide to dump it--Christoffer

author: Stonent
author_rank: Super Contributor
timestamp: January 29, 2016, 02:38:52 am
content: It is nice that you can recycle these chips even if they are OTP by telling them there's an external rom.

author: ChristofferB
author_rank: Frequent Contributor
timestamp: January 29, 2016, 02:25:51 pm
content: Quote from: Stonent on January 29, 2016, 02:38:52 amIndeed! Before I knew, I used to throw them out, thinking that a mask programmed µC was useless.Such a waste..--Christoffer

author: Stonent
author_rank: Super Contributor
timestamp: February 02, 2016, 01:12:11 am
content: Quote from: ChristofferB on January 29, 2016, 02:25:51 pmActually I'd bet there was some smart guy/gal out there that used that to their advantage. They could sell a product that comes with the OTP version by default for cost, but you can optionally buy an upgrade chip to install in a socket next to it for some special add-on feature.Or maybe just have two different modes in the product, selectable by a swtich.

author: CDI1977
author_rank: Contributor
timestamp: November 07, 2019, 09:14:19 pm
content: I am playing with MCS-52.I think you are in PROM mode, type RAM then it will accept statements.

author: Jacon
author_rank: Regular Contributor
timestamp: November 08, 2019, 06:40:42 am
content: Pls check the dates of threads you're trying to reply to- you just commented on post dated over 3.5 years ago

author: Bruce Abbott
author_rank: Frequent Contributor
timestamp: November 10, 2019, 06:57:59 am
content: Quote from: Jacon on November 08, 2019, 06:40:42 amIt's OK. Some of us only read this thread just now, and might be curious to know the answer.That 'PROM' mode is interesting! I don't think it's the problem here though, because it should display "ERROR: PROM MODE" if you try to edit a program.

author: iMo
author_rank: Super Contributor
timestamp: November 10, 2019, 09:24:03 am
content: Any practical experience with porting the 8052AH-Basic onto the Dallas DS89C440, DS89C450 ??I've got few in DIL40 (up to 33MHz single clock/instr 805x, 32/64kB of on-chip flash with internal serial programmer), I think I need a fast 3973 and a 32-64kB 8-10ns sram (I collected few from old pentium motherboards), that is all..

author: legacy
author_rank: Super Contributor
timestamp: November 10, 2019, 02:39:28 pm
content: I uploaded a couple of firmwarehere. I can no more find basic v1.0, but I uploaded v1.2.

author: oPossum
author_rank: Super Contributor
timestamp: December 30, 2019, 07:47:35 am
content: Quote from: ChristofferB on January 26, 2016, 04:07:49 pmThis problem is caused by RAM being shadowed (repeating at following addresses). The fix is to do more complete addresses decoding. I am using a 62256 SRAM (32k xand fixed the problem by connecting /CE to A15 so the RAM appears only in the lower 32k.

author: JohnnyQuest1111
author_rank: Newbie
timestamp: August 13, 2020, 01:09:15 am
content: I know this topic has been visited more than 120 days ago but as I did not see any of the posts explaining the memory mapping required by MCS-BASIC, I was compelled to post. In the interest of those that are just now starting to explore the subject of 8052 and MCS-BASIC, I offer the following information with the hopes this explanation helps others that are working with (newly found?) 8052AH-BASIC parts or just wish to play with the 8052-BASIC.Back in 2018, I spent some time researching and developing a minimal 8052 design. The project blog is here:http://8052sbc.wordpress.com. Although the main MCU would take an 8051 pin-compatible device, I used an ATMEL/MICROCHIP AT89S52 with internal 8KB of FLASH and 256 bytes of Internal RAM. I used a CPLD to implement 2 different address decoding schemes based on the level of the EA pin. It is currently running MCS-BASIC V1.30 (Bohling-Wulf) version, which implements EEPROM for saving programs. The addresses of memory are as follows; 8KB FLASH @ 0x0000 to 0x1FFF in program space (!PSEN and !RD), 32KB of SRAM from 0x0000 to 0x7FFF in data space (!RD/!WR and PSEN) and 8KB of EEPROM from 0x8000 to 0xBFFF in program/data space (!PSEN and !WR/!RD). From what I derive, this addressing scheme IS NOT the same as the original OP is attempting with his board, hence the reason it didn't work.In addition, I recently pulled my NMIY-0031 board (circa 1994) off the shelf after more than a few years of collecting dust and programmed an 8KB EEPROM as program memory with the v1.3 version of MCS-BASIC and tried it. It works fine. The NMIY-0031 is strapped for mapping the 8KB EEPROM @ 0x0000 to 0x1FFF in program space and 32K of SRAM from 0x0000 to 0x7FFF in data space and the other 32KB of SRAM from 0x8000 to 0xFFFF in combined program/data space, which makes MCS-BASIC think there is EEPROM available for storing programs. MCS-BASIC used the 8052 because it has 256 bytes of internal RAM as opposed to the earlier 8051 series with 128 bytes of IRAM. Long ago, I replaced the original 8051 on the NMIY-0031 board with an INTEL 80C51FA part, which has 256 bytes of IRAM. So MCS-BASIC works properly on any 8051 part that supports 256 bytes of IRAM, has internal or external ROM mapped in starting at address 0x0000 in program space and has SRAM mapped in starting at address 0x0000 in data space.Peace and blessing,JQ

author: free_electron
author_rank: Super Contributor
timestamp: August 13, 2020, 06:11:51 pm
content: you have not seen what this thing can do until you instantiate the oregano designs 8051 core, a ram and a rom in an Altera FPGa and clock it at 400 MHz ....That is one speedy basic machine !

author: JohnnyQuest1111
author_rank: Newbie
timestamp: August 14, 2020, 07:48:30 am
content: All that crazy speed for MCS-BASIC and the slowest link is the serial port ... if the program prints output ... or the human operator ... if the program is *WAITING* for user input.I can appreciate the fun of the project.At 400MHz, what applications could this blazing fast MCS-BASIC support?Peace and blessings,JQ

author: 0db
author_rank: Frequent Contributor
timestamp: August 14, 2020, 08:02:48 am
content: Quote from: free_electron on August 13, 2020, 06:11:51 pm400Mhz? on which fpga?

author: brucehoult
author_rank: Super Contributor
timestamp: August 14, 2020, 08:22:48 am
content: This thread is very interesting. A few days ago I ordered a handful of 65C02 chips (and 65C22 VIA), some 32Kx8 SRAMs, some 32Kx8 EEPROMs (and a programmer) and a bunch of latches, inverters, 2 input NAND and NOR gates, 8 input NAND gates. Planning to play around with all this stuff on a breadboard.No reason not to play with the same stuff with 8051 or other old CPUs also. I already had plans to try the SRAM on the ATMega2560 eternal bus (the 8 bit latch chip is needed for this, to demultiplex the data bus and LSBs of the address)A cool thing about the 65C02 is it's fully static, so can be run at 0 Hz and stopped or single stepped by hand. Does that apply to 8051 also? I think the Microchip ones are? And also Z180 but not Z80?

author: retrolefty
author_rank: Super Contributor
timestamp: August 14, 2020, 09:20:50 am
content: And also Z180 but not Z80?Z-80 was always fully static and also had support for auto refresh of the DRAM of the day.

author: brucehoult
author_rank: Super Contributor
timestamp: August 14, 2020, 10:12:11 am
content: Quote from: retrolefty on August 14, 2020, 09:20:50 amI don't believe the NMOS ones were.

author: free_electron
author_rank: Super Contributor
timestamp: August 15, 2020, 06:31:26 pm
content: Quote from: JohnnyQuest1111 on August 14, 2020, 07:48:30 ami stripped the uart and converted that into a ftdi245 port. it was speedy ...The oregano core is one of those 'turbo' cores. Most instructions process in a single clocktick. It is free. You can get the verilog. I ran it on a Cyclone 5 i believe. PLL was set to 420MHz. it's been a while. i mapped the ram and rom in the FPGA so nothing external was needed. the rest were simply GPIO pins.

author: JohnnyQuest1111
author_rank: Newbie
timestamp: August 18, 2020, 10:12:45 am
content: QuoteBeautiful!I used to be an FAE for XILINX. Was taught all about the parts and how they work, tools and all. But I never had the time to do anything like that on my own.Peace and blessings,JQ