Is Lattice Trash? - Page 1
Forum section: electronics / general

author: ehughes
author_rank: Frequent Contributor
timestamp: March 05, 2018, 03:45:21 am
content: I am *really* trying to give the ICE40 a go as a CPLD replacement but keep getting this when trying to download the Icecube software:QuoteIs the entire Lattice experience this awful?

author: Dubbie
author_rank: Unknown
timestamp: March 05, 2018, 04:07:38 am
content: Yep their website blows.I had to send several emails before I got the file I was after.

author: lgbeno
author_rank: Frequent Contributor
timestamp: March 05, 2018, 08:40:39 am
content: Lattice is also rolling out a new tool for iCE40 soon.Sent from my iPhone using Tapatalk Pro

author: abraxa
author_rank: Frequent Contributor
timestamp: March 05, 2018, 09:08:50 am
content: Do you need a particular feature from their software? If not, I suggest to use the open source tools located athttp://www.clifford.at/icestorm/.

author: iMo
author_rank: Super Contributor
timestamp: March 05, 2018, 09:15:55 am
content: Started with Lattice ~4 months back. Never had any issue with their web pages access or with their sw download/installation. Issued a few tickets, their support responded in 2-3 working days. Their iCE40 silicon works as expected, it seems so far.They released the new "Radiant dev tool" for iCE40UltraPlus a week ago. It is much improved IceCube2 stuff. I have migrated one larger design from IceCube2 to Radiant already - as they have changed the names of primitives including the names of their parameters (and sometimes their format too), etc., it has been an half day effort to migrate it..There is an IceCube2->Radiant migration document available. Finally, it builds and the design works in the new Radiant as well..PS: the new "Radiant" names of the primitives and their parameter's names/formats are not compatible with the IceStorm. If you want to stay compatible with the IceStorm do use the IceCube2 instead.

author: ale500
author_rank: Frequent Contributor
timestamp: March 05, 2018, 11:54:50 am
content: Sometimes the website is not reachable. It seems to be a region issue because some users seems to be able to download without problems, there are some threads about it around here. I've been using Lattice parts, MachXO2 and Ice40UP for the last 4 years, they work quite well, the software is fast compared to Quartus, these parts allow for smaller designs only. You can try the VPN feature of for instance Opera, to try to download the software from another region, if that is the issue.At least their software doesn't seem to be as broken as some versions of X's ISE was...

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 05, 2018, 01:35:45 pm
content: There are some reported issues with the website, although I've never experienced any.Apart from that, I find their product line very good, easy to use, fairly priced, and their tools (I only use the Diamond suite, which I think is one the fastest and easiest to use on the market) pretty good as well.For the record and as far as I know, the iCE line (and the associated software) was bought by Lattice and may not offer you as good an experience as the "native" Lattice products, although they have just released a new software suite - haven't tested that yet, but it looks promising.All in all, there are only two quirks that I have run into in several years:The Diamond update tool is weird. It only shows minor updates. For instance, if you have 3.9.xxx installed, it will show 3.9.yyy if any, but not 3.10 or later. Since they have never "fixed" this, I assume this is a feature and not a bug (to avoid unwanted updates that may break things), but I find this annoying. If you want to know what the latest version really is, you have to look on the website.The latest Diamond (3.10.1.112) version showed a weird bug with LSE (their synthesis tool) for embedded block RAM (EBR). In one of my projects, the EBRs stopped working properly when I rebuilt it with this version. I had to switch to Sinplify (both synthesis tools are available in Diamond) to make it work again. There was nothing wrong with my code that I could pinpoint. I wanted to submit a ticket, but unfortunately, you have to have a subscription license to be able to do this (you can't have any support or submit tickets when using the free licenses, which is the same with other vendors, but it bites.) Since this wasn't a commercial project, I didn't bother since I found a workaround. But if it had been, I would probably have subscribed ($99 a year I think).

author: ehughes
author_rank: Frequent Contributor
timestamp: March 05, 2018, 02:00:59 pm
content: The part I am looking at is the ICE40LP384-SG32. It appears that the radiant tool supports only the Ultra series. (I have the IceStick in hand and Verilog ready to try...)I almost always go with Xilinx but I am in a pinch where I some logic in a tiny package for a few dollars. The SPI configuration is also attractive as I already have a host MCU in the current version that loads other devices with configuration.The closest fit I have to my needs in the Xilinx realm is the XC2C32A-6QFG32C.QuoteThis is a commercial product. I cant rely on reverse engineered tools.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 05, 2018, 02:28:30 pm
content: Quote from: ehughes on March 05, 2018, 02:00:59 pmSeems so indeed. Would the Ultra series be out of the question? It's much more recent. You would probably get better support and supply lifetime.Quote from: ehughes on March 05, 2018, 02:00:59 pmThere are ways to reconfigure Xilinx FPGAs on the fly with an MCU. I've seen it done at least on the Spartan 6 series. (You can take a look at ZTEX boards for example designs.)Price-wise, they are certainly not competitive at all compared to the iCE series though... not to mention power draw. The iCE series is much better power-wise.Quote from: ehughes on March 05, 2018, 02:00:59 pmI wouldn't rely on icestorm for any commercial project either.

author: iMo
author_rank: Super Contributor
timestamp: March 05, 2018, 02:43:35 pm
content: ICE40LP384-SG32 is supported by IceCube2. The IceCube2 is rather a pretty basic tool, it works with 384 fine (tested). The integrated Synplify Pro (quite hidden, needs to be started via Tool->Tool options..) allows RTL and Technology views.The iCE40UP3k/5k are supported by IceCube2 and Radiant. Radiant includes the same as the IceCube2 one, plus Reveal Analyzer (something like X's ChipScope), built-in Diamond programmer, an useful editor, Netlist analyzer with graphics view, etc..The IceCube2 generates smaller and faster design (most visible with larger designs) than the IceStorm does, it can infer ie. multipliers with built-in DSP modules (UP5k) etc. The IceStorm is less effective, and infers ie. multipliers in fabric (you have to instantiate the modules/primitives manually).Generally you need 2-3x more LUTs with iCE40 compared to the X's Spartan6, I would guess. Also iCE40 is low power and therefore slower than the Spartan6.

author: daveshah
author_rank: Unknown
timestamp: March 05, 2018, 02:57:49 pm
content: Quote from: cleaningOut on March 05, 2018, 02:55:44 pmWorking on it alreadyConversion will mostly be done in a Verilog wrapper loaded by Yosys.

author: iMo
author_rank: Super Contributor
timestamp: March 05, 2018, 03:06:53 pm
content: Great! You may test withthis..

author: ehughes
author_rank: Frequent Contributor
timestamp: March 07, 2018, 01:00:07 am
content: Ok, after some tech support I finally got access to the files.Given the simplicity of the ICE40 devices, I think the tool is at the right level of sophistication (except for the text editor). The inclusion of Aldec for simulation and Synplify is not a bad deal for free. I think it will be fine for these small devices.I do like that they are serving the low pin count, sub $10 FPGA Market. I can also see this a a decent teaching tool as the design flow is pretty simple.I am going to get a kit for the ICE40 Ultra. It actually looks like a nice part with enough to do some useful signal processing. I like the small BGA and QFNs for under $5 bucks.

author: Bassman59
author_rank: Super Contributor
timestamp: March 08, 2018, 04:01:00 am
content: Quote from: SiliconWizard on March 05, 2018, 01:35:45 pmWhat was the problem?

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 08, 2018, 01:11:43 pm
content: Quote from: Bassman59 on March 08, 2018, 04:01:00 amThat was with dual port RAM blocks implemented with EBR, non-registered output.They would read back as only 0's, all the time. Couldn't figure out if it was a write or read problem obviously... There was no error (that I know of) in the way I was using them, no reported timing issues (and I was just accessing them at a couple MHz) and no error shown in simulation (using Active HDL). From the docs, there seemed to be some potential issues with the IPs generated in VHDL (don't remember if it was in this version or an earlier one), so I switched to Verilog for the EBR IPs (using VHDL for my code, you can mix both), but it didn't seem to solve the issue. Switching to Synplify, there was no problem whatsoever (and I never had any issue with the same code with LSE in previous versions).

author: ale500
author_rank: Frequent Contributor
timestamp: March 10, 2018, 06:53:56 am
content: Could it be that the problem was related to the behavior of reads during write cycles ?. They do not always manifest themselves the same way and vary with what looks like logic use. Very annoying.