Impedance matching or not ? and choosing values for RC filter - Page 1
Forum section: electronics / beginners

author: JeanF
author_rank: Regular Contributor
timestamp: October 04, 2019, 04:13:26 pm
content: Hello,I’ve read these two rules of thumb, in different places over the internet but the context was not always clear:a) the input impedance of a device should be greater (around 10x to 100x is common) than the output impedance of the circuit supplying the signal, to avoid overloading the source and weakening the signal too much.b) when dealing with transmission lines, output and input impedances should be matched for best signal transmissionWhen is one or the other most relevant? Is it only a matter of frequency?Thank youA bit more context:I have a signal coming from an optocoupler (a 6N137). I use a 1k pull-up resistor at the output. So the output impedance is 1k if I’m not mistaken.The signal was originally a 9600 baud stream, on-off modulated over a 50 kHz sine carrier, which I have full wave rectified just before the optocoupler. I want to filter that with a RC filter, then pass it through a schmitt trigger inverter to recover the data.How would you choose values for R and C ?I read on the Internet some conflicting advice:c) “the RC constant of the filter should be much greater than the period of the carrier, but smaller than the message signal period”d) “the RC constant should be smaller than the period of the carrier”I played around with LTSpice (I’m not very good a it yet) and apparently choosing RC = 10µs = the period of the carrier seems a good compromise, for example 10k/1n, 1k/10n, etc.according to a) I should use say R=10k and C=1n.I breadboarded all that, including the bridge rectifier (4*1N4148), the optocoupler, the filter and two stages of a 74HC14 for final cleaning. The signal then goes to a USB to serial adapter so I can see the decoded data in Realterm.I was looking at the signal at the output of the filter with an oscilloscope and at the same time I kept an eye on the error status lights in Realterm.With 10k/1n I found that it was really hard to adjust R to get reliable transmission, Realterm kept saying “framing error” or “checksum error” and if I moved an eyelash too fast, the connection would break.On the other hand, with 1k/10n, the transmission was perfect. And it was much more tolerant of resistor variation; using the same 10n cap I got good results with any resistor, from very low values to 1k5.on the scope "screenshots" 0V is the line at the bottom of the screen, it is set to 1V/div.With 8k2 (or 10k) and 1n, the signal has ripple up to about 2.5 volts, which is about the same as the positive-going threshold voltage of the 74HC14, giving false positives and corresponding to what I’ve seen in Realterm. On the other hand, with 1k/10n the signal is cleaner and the ripple stays below 2 volts and everything is fine.Some may say “well if you found OK values, go on, why bothering?” and they’d be quite right; but I would like to understand better what I observed.Any comments or explanations (or links to useful pages that I surely missed!) would be greatly appreciated. And also:- when is it OK,and not OK, to refer to rules of thumb a, b, c and d- with 1k and 10n the input impedance of the filter is about 2,6kOhms. Should I increase the value of the pull-up resistor to have a perfect match ? (I didn’t try yet because I was expecting rule a) to apply)Thank you

author: fourfathom
author_rank: Super Contributor
timestamp: October 04, 2019, 04:38:26 pm
content: You match input impedance to output impedance when you want to get maximum power transfer. Also, when dealing with electrically long transmission lines un-matched terminations will create reflections, or "standing waves", which can reduce power transfer, increase attenuation, and cause signal distortion. So matching impedance is a very important concept.But in your demodulator / detector you don't really care about maximizing the power transfer, as long as your recovered signal is big enough to give you acceptable performance. Other factors, such as the filter component values, signal-to-noise ratio, and perhaps minimizing power dissipation, are much more important.Your optoisolator output impedance is 1K Ohm when in the "high" state, but is much lower when in the "low" state (the low-state impedance is determined by the opto-transistor characteristics.) You can see this effect in the waveforms, where the rise and fall times of the filtered signal sawtooth (at the carrier frequency) are quite unequal in your 820-Ohm / 10n case. This isn't necessarily a problem, but you should be aware of the effect. Increasing the 1K resistor won't really give you a perfect match because of the varying output impedance of the optotransistor, and in any case a perfect match isn't particularly useful here.

author: JeanF
author_rank: Regular Contributor
timestamp: October 05, 2019, 11:00:09 am
content: Thank you very much, that makes perfect sense. In fact I had previously heard about this aspect of maximum power transfer, but I had forgotten about it.I'll read up on this, but while you are talking about signal to noise ratio, what do you generally recommend when choosing filter values in this regard?Thank you also for your other comments.

author: fourfathom
author_rank: Super Contributor
timestamp: October 05, 2019, 06:20:53 pm
content: Quote from: JeanF on October 05, 2019, 11:00:09 amIn this case, signal/noise benefits from a large-amplitude filtered waveform. It would be possible to optimize the low-pass filter at the expense of output amplitude (by using an excessively large series resistor or perhaps additional filter stages). Your current values are nowhere close to causing this problem, but it's worth mentioning in a general discussion.Also important is matching the filter output voltage to the switching threshold characteristics of your "slicer" (the 74HC14). Look at the possible range of threshold voltage and hysteresis region, and make sure that your filtered signal gives you a comfortable margin, and minimum pattern distortion.Look up "matched filter" and "eye pattern" to see how filters can be used to compensate for non-ideal channel characteristics such as intersymbol interference (ISI) and bandwidth. These probably aren't a factor in your current system, but the basic concepts are good to know.Back to your original issue, which is the selection of your RC components to minimize the 50 KHz carrier ripple on your recovered 9600 Baud signal, with your single-section RC filter you will get at maximum a 6dB per octave rolloff. Later I will have time to suggest some optimum values and circuits, but perhaps someone with more expertise will reply before then.

author: fourfathom
author_rank: Super Contributor
timestamp: October 06, 2019, 05:46:44 am
content: As for filter optimization, you can go with a more complicated design, using active filters or even L/C filters, but you probably want to minimize the overshoot and phase or group-delay characteristics of the more aggressive filters. I believe that a "Bessel" response is often used. Or, you can go with a very simple 2-stage RC filter. You won't get a sharp corner on this kind of filter, but you also won't get ringing or overshoot. Here are some attached LTSpice simulations showing the difference that a second filter stage can make. I used no theory in the component selection, just rule-of-thumb and my eyeballs. I guarantee you that these can be improved. These simulations are showing the "eye pattern" I previously mentioned. (In the simulation with the 2-stage filter, the blue waveform is "Vout2" -- I cut off the legend when I cropped the screen-capture.)You can also get an improved filter response by putting a series resistor between the open-collector pull-up and the capacitor (say 10x the pull-up value). This gives you a symmetrical waveform with less carrier ripple. Unfortunately, this also cuts the output voltage swing in half, and not centered around the Schmidt trigger threshold. If you were using a diff-amp as a slicer you could bias the other input to compensate for the new center-voltage.I used a 15-stage LFSR (linear feedback shift register) to generate reasonably long runs of random bits. Testing with a simple 1010... pattern does not show you the effects of heavier filtering, although if the filter settles by the end of the symbol (as is the case with your filters) then this isn't such an issue.Is your carrier truly 50 KHz, or is it a multiple of the baud rate? If it is a multiple, then the eye patterns I show would be slightly cleaner. In my sim I used 9600 baud and 50KHz carrier.

author: iMo
author_rank: Super Contributor
timestamp: October 06, 2019, 07:07:46 am
content: 6N137 with 1k pullup does not have 1k output impedance.It has got CMOS output, typically 200ohm output impedance, with 1k in parallel (the pullup) you get something like 167ohm output impedance.You may get around 1200ohm output impedance when wiring the 1k in series with the output.

author: fourfathom
author_rank: Super Contributor
timestamp: October 06, 2019, 10:52:13 am
content: Quote from: imo on October 06, 2019, 07:07:46 amBut the 6N137 has an open-drain output, and per the device specs the low-state impedance is around 15 Ohms, and the high-state impedance is in the high mega Ohm region. So with a 1k pull-up the effective output impedance will be either 1k or 15 Ohms, depending on state. The 15 Ohm low-state impedance is a useful property in this circuit, since we aren't feeding the 6N137 with a steady 9600 baud signal, but a signal modulated by the 50 KHz carrier which gives an average value at the output of around half-supply. The asymmetrical output impedance forces the output voltage down close to zero volts, which works with the post-filter Schmitt trigger thresholds.

author: JeanF
author_rank: Regular Contributor
timestamp: October 06, 2019, 12:08:27 pm
content: fourfathom, thank you so much! I really appreciate all the time and effort you’ve put into these very detailed and helpful answers. I’m very grateful and I only hope that someday I’ll be able to be as helpful to others as you’ve been to me!I’ll try to tweak values and see what it does when I get back to my (improvised) bench, as well as in LTSpice which I want to practice anyway. I may as well try a second stage of RC filter, that will be a good learning exerciseI believe the carrier is 50 kHz and not a multiple of the baud rate, because the smart meter which outputs the data has been using 50 kHz for years. I shall measure the frequency more precisely, though. Originally the baud rate was 1200 but recently they changed the data formatting and upgraded to 9600, but they kept the carrier the same. In fact I postedanother threadin the Projects section, asking not specifically for help with component values but more for design ideas to make a demodulator differently. As it turns out, I got a little bit of both, but well, I don’t complain. I just realized that here I forgot to post a schematic so here it is attached.When I was experimenting the other day I indeed used a series resistor between the output of the open collector and the capacitor, because I wasn’t aware that the pullup itself could be considered part of a filter. I’ll try without it to see what it does to the output voltage swing. It’s this resistor that got me surprised in the first place, because I was expecting to get good results with about 10x the value of the pullup as you said, and in the end I had better results with lower values. Well I shall experiment a little bit more!imo, thank you for your comment, I must admit I’m not very comfortable yet with impedance calculations, so I watched W2AEW’s video #138 and used the technique of the pot to load the output until the output voltage is halved ; that’s how I found about 1k. I didn’t think of the two different impedances depending on the state.Speaking about low-state impedance of the opto***, how risky is it to remove R3 ? 6N137 datasheet says 50mA absolute maximum output current, but if the output transistor directly discharges the cap, I guess 5V/15 ohms is about 330mA peak? Am I missing something here? (aside from the Vds in the low state which is about 0.2 to 0.6V, and the ESR of the cap). Will the capacitive reactance of the cap limit to a safer level?*** : as a side note, I’m a bit embarrassed to say I can’t immediately see that 15 ohm figure in thedatasheet, which page is it on?Thank you again everyone.

author: fourfathom
author_rank: Super Contributor
timestamp: October 06, 2019, 03:08:34 pm
content: I like the diode bridge detector in your circuit. This gives a better on/off ratio so I have changed the duty-cycle of my 50KHz carrier oscillator to more closely match the output of the diode bridge. This reduces the amplitude of the carrier sawtooth, which is helpful.I don't think that the direct capacitor connection to the opto output will damage anything, but that 1K series resistor is a good addition as it keeps the current spikes within spec and improves the filtering.That 15 Ohm value isn't directly stated in the opto spec sheet, but I derived it from the "Low level output voltage" spec: 0.2V / 13mA = 15.38 Ohms. This is no doubt a nonlinear resistance, but it's probably a good practical estimate.Here is a simulation plot showing the new circuit with the 1K pull-up, 1K series resistor, and 10n capacitor. I also added a second filter stage with a 10k resistor and a 1n cap. You can see the difference in eye patterns. The second stage does slightly affect the behavior of the first, but the effect is minor because of the 10:1 impedance difference.I'm happy to help, as I like circuit design and solving puzzles. Also, this was my first time using the LTSpice eye-pattern feature, as well as the first time I tried using the LTSpice digital library. I had to add the "Td" parameter to the flip-flops before I could get the shift-register to simulate!

author: fourfathom
author_rank: Super Contributor
timestamp: October 06, 2019, 03:53:37 pm
content: Out of curiosity I added a third stage to the filter, and plotted the frequency response using a 1K resistor (which is the average of the high and low-state impedances -- not really accurate, but close enough to see how it works). This cascaded RC filter gives us a very soft roll-off knee, but this isn't necessarily a bad thing in a demodulation filter. The 10:1 impedance ratios are just a convenient ratio, you can try others (which will give you more or less section interaction). The goal of the multiple filter sections is to increase the attenuation of the 50KHz carrier without further attenuating the 9600 baud signal. For what it's worth, the maximum fundamental frequency of a 9600 baud NRZ signal is 4800 Hz. Unless you need square edges for some reason, there's no advantage to extending the filter frequency range much above this, and there is significant advantage to filtering out the unneeded high-frequency components.I haven't checked the specs for the Schmitt trigger input, but my third stage (100K / 100pF) may be approaching the reasonable impedance limits there.

author: JeanF
author_rank: Regular Contributor
timestamp: October 08, 2019, 09:54:56 am
content: I’ve played around with component values yesterday. I’ve seen the influence of the values of the series resistor, the pullup resistor and the capacitor on the filtered waveform with regard to output voltage swing and carrier ripple, it was very interesting and it’s been a good learning experience.I also looked more carefully at the 74HC14 datasheet and its threshold voltages; I interpolated for 5V supply because they are given for 4.5V and 6V supply. As it turns out I was just lucky it worked the other day, because the low threshold is about 1.5V and my signal had a lot of ripple in this region, so there was room for improvement.So as per your recommendations I used a 2 stage RC filter, the series R of the 1st stage was kept low to increase the output swing, R=0 worked as well but I used a small value instead, to limit the peak discharge current in the opto’s output transistor.Then I noticed that the output could be pulled even lower by increasing the pull-up resistor of the opto, but at the expense of the eye shape. In the end I used 1k5.current (no pun intended) values:Rpullup: 1k5first stage: 150R / 10nsecond stage: 10k / 1nI am again very grateful for your help and I’m quite happy with the output waveform, there is now more than 0.5V of margin below the low Vth of the 74HC14, which looks (in my unexperienced point of view) good enoughIn the next days I’ll be away from the bench, I’ll focus on the software side of things instead.Later I’ll build the circuit more permanently on perfboard, I may as well look into other design options just for fun (cf. the other thread) and I’ll try to use a 6N139 instead, which uses less current. Time will tell if further adjustments are needed

author: fourfathom
author_rank: Super Contributor
timestamp: October 08, 2019, 04:08:34 pm
content: With the 1.5V threshold of the 'HC14 you might consider using an opto pull-up voltage closer to 3V. This will reduce the amplitude of the eye pattern, but will also lower the low-state carrier ripple voltage and let you use a more aggressive first-stage filter. If you have a clean 3.3V supply handy you could tie your 1.5K pull-up to that. Here is a simulation where I used a 5V supply and a resistive voltage divider for the pull-up, and increased the first series resistor from 150 Ohm to 1K. You can see that the eye pattern is better centered around the 'HC14 switching threshold, and the carrier ripple slope near the threshold never goes positive (which reduces the probability of spurious switching on the falling edge.)

author: JeanF
author_rank: Regular Contributor
timestamp: October 08, 2019, 08:36:15 pm
content: On this picture I have drawn the high and low thresholds of the 'HC14, 1.58V and 2.63V.So the goal is for the waveform to be symmetrical with respect to the line which is the average of those two, at 2.11V ? If I understand correctly this makes the 1s and 0s equal in duration?Is it primarily for the peace of mind and taste for a job well done, or is it really important? As the receiver is supposed to sample the incoming signal at the middle of each bit, and will do it according to his own internal clock, I assume there will be some tolerance?About the ripple slope at the switching thresholds, I would have thought this wasn't a problem, as a possible spur would need to be more than 1V in height to hit the high threshold and cause false switching, wouldn't it?I'll try what you say next week

author: fourfathom
author_rank: Super Contributor
timestamp: October 08, 2019, 10:45:31 pm
content: Quote from: JeanF on October 08, 2019, 08:36:15 pmWait!!! Don't try what I said, since that was done to center the eye around 1.5V. According to your threshold values, 2.1V is the better goal, and the plain 1.5K pull-up is an appropriate value. You might try increasing the 150 Ohm series resistor to improve the filtering and also bring the eye pattern crossover point closer to 2.1V (as you say, to give you a symmetrical duty cycle). The exact DC level will depend on the effective duty-cycle of the 50KHz carrier after full-wave detection and the opto gain. My simulation is unlikely to match your actual circuit in this regard.You are correct, ripple on the edges won't cause multiple triggering unless it exceeds the hysteresis of the Schmitt trigger. But when you add the inevitable noise to the waveform things can be worse than you anticipate. Having steep rising and falling edges at the filter output is also a good thing, so there is a tradeoff here that involves the hysteresis and the filter frequency response slope.UARTs typically will detect the edge of the start bit, then using a high-speed clock sample all the following bits at what should be the halfway point. Unless the signal is really distorted or noisy, this is a pretty robust technique, and much of the fine-tuning we are trying isn't strictly necessary. But if you can improve the circuit at little or no cost, why not do it? You will be improving the margins so it should be able to better handle a noisy interface. Since you are dealing with a form of AM modulation, noise pickup can be a problem.