Operation of a longtailed pair with collector current mirror - Page 1
Forum section: electronics / beginners

author: whyso
author_rank: Newbie
timestamp: April 29, 2016, 09:10:06 am
content: Hey everybody,I seem to not quite get how this setup show below actually works. Now I have read quite a lot about how a longtailed pair works,going from one with just two collector resistors and a large emitter resistor as a approximated current source, to one with a "real" current source for common mode rejection.Quote(http://www.radio-electronics.com/info/circuits/transistor/long-tailed-pair.php)I can not quite get an intuitive understanding for this.Let me tell you the way I see it:First there is a input difference, lets say the base voltage of T1 is a bit higher than that of T2. This increases the collector current of T1 to IC0+ ?.Since T3 and T4 set up a current mirror, the collector current throw T2 will be forced to that of T1 (IC0+ ?).Assuming IEis roughly equal to ICfor both T1 and T2, we have a total current of 2 * ( IC0+ ? ) at the constant (!) current source at the emitters of T1 and T2. So this is the point I am totally confused about,the current mirror and constant current source kind of set up a contradiction.I am pretty sure I am missing out on a important point, can you guys help me please?Also, can someone clarify that statment for me:Quote

author: Performa01
author_rank: Super Contributor
timestamp: April 29, 2016, 10:16:11 am
content: The statement about converting in a single ended voltage signal is simply wrong, which is probably causing all the confusion.The constant current source sets up a total current I.The sum of currents in T1 and T2 must be equal to I, so I1 + I2 = I;We can also say I2 = I - I1;The currents in T3 and T4 are equal to I1: I1 = I3 = I4;The main thing is, the output is very high impedance (as it's basically just two collectors, hence current sources). So it delivers current, not voltage. More specifically, the output current will be the difference between I2 and I4.On a perfectly balanced differential pair, the output current is zero, because I1 = I3 = I4 = I/2.And I2 = I - I1 = I - I/2 = I/2;Since I2 and I4 are equal, there is no "extra current" left for the output, hence the output current is zero.With maximal imbalance, we get e.g. I1 = I3 = I4 = I;And I2 = I - I1 = I - I = 0;Now I2 is zero, but I4 = I, so the output sources a current equal to I.The opposite would happen if I2 = I and I1 = 0, then the output sinks a current equal to I.Because of the high impedance output, we can connect a high impedance load, where minimal current changes would give very high voltage changes, thus getting very high voltage gain. Even if the load impedance were the same as the resistor on the collector of T2 (in a diff. pair without current mirror), the gain would still be twice as much, because the signal of T1 is not wasted anymore, as the current mirror enables the output to not only sink current, but also source it.

author: 3db
author_rank: Frequent Contributor
timestamp: April 29, 2016, 10:34:03 am
content: Quote from: whyso on April 29, 2016, 09:10:06 amIv'e found that asking even a simple question on this forum leads to loads of waffle and confusion.Have a look on Alan's aka w2aew youtube channel.You might find these links of use.3DB

author: danadak
author_rank: Super Contributor
timestamp: April 29, 2016, 01:20:34 pm
content: Extensive discussion and analysis here -http://www.ebay.com/itm/Operational-Amplifiers-Design-and-Applications-NoDust-/161884652925?hash=item25b113c57d:g:UnEAAOSwhcJWQ3VlThere were 3 more books in the series for a total of 4 in the set.Regards, Dana.

author: orolo
author_rank: Frequent Contributor
timestamp: April 29, 2016, 01:43:50 pm
content: Quote from: blueskull on April 29, 2016, 09:14:02 amThis exactly . At the small signal level (hybrid-pi model), the current source from a transistor is in parallel with the ro (Miller) resistance, which is usually very high. Roughly, if the right transistor of the differential pair tries to draw a small current dI more than the left one, that current has to flow through the ro of that side of the mirror, and the voltage difference at that emitter will be -dI * r0, for a very high ro.

author: TimFox
author_rank: Super Contributor
timestamp: April 29, 2016, 02:42:53 pm
content: Note that the output (where the collector of a PNP in the mirror connects to a NPN in the pair) is not at a well-defined potential. Connecting a load with DC continuity to a specific voltage will determine the quiescent voltage at that point.

author: LvW
author_rank: Frequent Contributor
timestamp: April 29, 2016, 02:53:50 pm
content: Quote from: whyso on April 29, 2016, 09:10:06 amLet me try an answer intwo sentences:* Applying a differential voltage between the input nodes causes an inbalance between both collector currents.* However, because the current mirror forces the two currents to be equal, thecurrent differenceis forwarded to the next stage and further amplified.This is how such a stage works. By the way: The small remaining inbalance within the current mirror (base current) can be compensated by a suitable base current of the next stage.That means: Indeeed, the differential signal is converted into a single-ended signal.(I don`t know why in one post - reply'2 - this feature was classified as "total wrong")

author: Performa01
author_rank: Super Contributor
timestamp: April 29, 2016, 05:43:17 pm
content: Quote from: LvW on April 29, 2016, 02:53:50 pmThis enables the differential collector current signal to be converted to a single endedvoltagesignalis wrong, because it's a current, not a voltage.

author: LvW
author_rank: Frequent Contributor
timestamp: April 29, 2016, 06:30:51 pm
content: Quote from: Performa01 on April 29, 2016, 05:43:17 pmI suppose, you misunderstood the meaning of this sentence.The difference in currents can be converted into a single-ended voltage - of course not within the first stage.This was never claimed by anybody. Of course, the next stage performs this conversion.

author: bson
author_rank: Unknown
timestamp: April 29, 2016, 06:59:06 pm
content: It's easier to understand if you imagine the input transistors instead are JFETs that are always "on" (until you go well into the negative). All that changes with gate voltage in a JFET is the channel resistance, which causes the current mirror to swing the voltages over the two LTP inputs to maintain current symmetry. If one in the T1-T2 pair presents a lower resistance that one will get a lower voltage to throttle the current. The total current is of course set by the current sink near the bottom. Note that it's important to not sink the output; any current loss there will be reflected as a voltage drop and hence nonlinearity. Sinking 100uA on it if the current sink is set to 5mA means 1/50 distortion. Another JFET for the VAS can be a good idea, with a gate resistor to control gate charge rates.BJTs work the same except are sensitive to base current rather than voltage. They need to be preceded by resistors if you want them to respond to voltage instead of current. For a BJT LTP like yours the resistor input network is a critical piece. There's also the issue of input base protection. It's critical that the current sink is faster (has higher bandwidth) than T1, otherwise T1 will see transient Vbe's at rail voltage and won't last for long. This means T1 needs to be given a reasonably high value base resistor or even a little RC rolloff.

author: Performa01
author_rank: Super Contributor
timestamp: April 29, 2016, 07:09:23 pm
content: Quote from: LvW on April 29, 2016, 06:30:51 pmFair enough.I just had the feeling it was exactly this sentence in conjunction with the schematics (that didn't show any load) what got the OP confused.

author: rfeecs
author_rank: Frequent Contributor
timestamp: April 29, 2016, 09:30:13 pm
content: This circuit is a voltage amplifier. Voltage in and voltage out. Not current in or current out.The thing about converting to single ended is explained pretty well in the Wikipedia article:https://en.wikipedia.org/wiki/Differential_amplifier#Collector_current_mirrorQuoteIt's most easy to look at this from a small signal point of view. That is a small variation about an operating point.For the circuit with resistive loads, when you go from differential input to single ended output, you lose half the voltage gain (compared to differential in / differential out). The current mirror restores that by mirroring the current from the left side to the right which causes the two signals to add, so it restores what you lost, making it a better conversion from differential to single ended.You not only get twice the voltage gain, but also higher gain because of the high output impedance of the current source acting as a load.

author: Performa01
author_rank: Super Contributor
timestamp: April 30, 2016, 06:14:52 am
content: Quote from: rfeecs on April 29, 2016, 09:30:13 pmAha. Can you explain how a high impedance output (whose voltage heavily depends on the load) can be called a voltage output? Maybe you're able to find some other Wiki article that explains that a voltage source is supposed to have a low source impedance, whereas current sources have a high one.A long tailed pair with current mirror is a transconductance amplifier, voltage difference in, single ended current out.Consequently, the (open loop) gain of such an amplifier is not expressed in V/V (voltage gain), but A/V (transconductance). The voltage gain can be calculated as soon as the load is defined. The load due to the transistor output impedances is just a parasitic effect, limiting the maximum achievable voltage gain.And for the rest of your statement, I don't see anything that's not already covered in my reply #2.

author: 3db
author_rank: Frequent Contributor
timestamp: April 30, 2016, 07:51:34 am
content: This is the beginners section of the forum.IMHO the reason for designing a circuit like that is so that we can get a HIGH GAIN.It's obvious that a load would be connected to the circuit,why else would it be built.Lots of this type circuitry would be inside op amps to achieve high gain.So whats the point of ranting on about considering it as a current source just because it's Hi Z.We want to use it's hi gain as a VOLTAGE amplifier.We should try and keep things simple so beginners gain an understanding of why circuitconfigurations have evolved to perform a function.3DB

author: LvW
author_rank: Frequent Contributor
timestamp: April 30, 2016, 08:13:22 am
content: Quote from: rfeecs on April 29, 2016, 09:30:13 pmThere are more serious and reliable knowledge sources than wikipedia - and I agree to performa01s contribution.

author: 3db
author_rank: Frequent Contributor
timestamp: April 30, 2016, 11:14:07 am
content: Why is the current mirror there ?3db

author: rfeecs
author_rank: Frequent Contributor
timestamp: April 30, 2016, 04:24:35 pm
content: Quote from: 3db on April 30, 2016, 07:51:34 amExactly. People use an active load with a high impedance to achieve a high voltage gain.This circuit has been used for fourty years. It is a textbook circuit. They describe how it has high voltage gain, not that it has a current source output.It was in my college textbook 35 years ago (we studied the earlier edition):http://www.amazon.com/Analysis-Design-Analog-Integrated-Circuits/dp/0470245999/ref=sr_1_3?s=books&ie=UTF8&qid=1462032712&sr=1-3&keywords=linear+integrated+circuit+designEvery real amplifier circuit has an input impedance and an output impedance, and the gain depends on source impedance and load impedance.Looking at the circuit as a transconductance amplifier is equally valid. I have no problem with Performa01s explanation apart from the wording that was a little confusing and he clarified that in his later post. I thought it helpful to offer another explanation from Wikipedia. It says basically the same thing, I agree.