Dekatron Voltmeter - Page 1
Forum section: electronics / projects

author: Muny
author_rank: Contributor
timestamp: April 27, 2019, 08:08:02 am
content: Hi all,I've been working on this design. The idea is to use Dekatrons to display the value of an input signal. It will necessarily update quickly, so it may be interesting to use it to view varying voltages. It will use the persistence of vision effect while incrementing a Dekatron (slowly for cathodes with associated values below input signal level, quickly for those above). It uses a DAC formed by the conduction of the cathodes as an input to a comparator which will disable a clock divider which feeds a finite state machine which produces the sequences required to increment the Dekatron. The clock divider w/ enable is there so that while the dekatron is working on "turning on" digits below the input signal threshold, it will do so slowly (Appears brighter). And while above, quickly (Appears dim).I know this could be done fairly easily using a microcontroller, but I'm pretty new to electronics and wanted to challenge myself to produce a nice design with mostly discrete parts.So far, I've done the high-level functional design of the voltmeter; and simulated it almost entirely in LTSpice. Now, I'm beginning to pick components and create detailed schematics.I've attached some pictures which show some detail through the design process.The block diagram is from before I realized that the FSM needs the comparator output as an input, and that it also needs to control the clock divider enable line. This is because a random cathode will conduct when Dekatrons are initially powered up. The FSM will 'zero' the Dekatron by counting up quickly until the zeroth (top) digit of is conducting.I even simulated a Dekatron, which included making an FSM to decode the gate pulses delivered by the gate-sequencing FSM, feeding pulses output by this into a decade counter, then a decoder which enables a 450V source in series with 790k resistors (the anode current-limiting resistor) through to each individual cathode pin.I need to determine what clock frequency and divider ratios I will use. I think I will do this with a microcontroller, emulating the behavior of the circuit, since it's easier to adjust values there.In the attachment file named "overall.png", a simulation of the full operation of the circuit is shown. The magnitude at any time on the DAC waveform shows effectively which digit of the Dekatron is lit up.I am interested in hearing feedback about the design, especially if something blatantly won't work in the real world

author: Kleinstein
author_rank: Super Contributor
timestamp: April 27, 2019, 08:46:28 am
content: It looks feasible for a single digit version. However I see a problems with more than 1 digit.I don't know the dekatrons very well. Are they able to count up and down, or are they one direction only ?

author: Muny
author_rank: Contributor
timestamp: April 27, 2019, 02:43:53 pm
content: Thanks for the replyYeah, some Dekatrons can count down. The model I'm planning to use is the A-101. The way you increment/decrement is by pulsing the gate electrodes in sequence, shifting the location of lowest potential.I posted some videos on my YouTube channel of testing (playing around with) the Dekatron I got.https://youtu.be/jczs2vL9kSYhttps://youtu.be/W1AKG3C5ScwThough, in the way that I'm using it I don't think I will need to count down. The way I envisioned multiple digits working was to simply have an identical circuit just with a different divider ratio. Also ensuring the divider ratio of the lowest range won't produce voltages higher than the comparator can handle. (Or some other way I haven't thought of).Is there something about that I'm overlooking?

author: Kleinstein
author_rank: Super Contributor
timestamp: April 27, 2019, 03:32:42 pm
content: I don't think it won't work to use multiple digits in just the same way with a different DAC part. The leading digit might work, but the lower digit would most of the time just see a fixed signal to high or to low. So intensity difference would be too small.My idea with counting up / down would be to use the lowest digit in the kind of ramp mode as described with a fast and slow clock. The upper digits could use a kind of tracking mode: if the lower digit always sees a low at the comparator count down the high digit. If the lower digit sees a constant high count up.An alterative would be a kind of successive approximation by digit: Starting with the highest digit count till the comparator shows best fit for the digit and than go to the next lower digit.

author: Muny
author_rank: Contributor
timestamp: April 27, 2019, 03:56:44 pm
content: Oh wow, you're right. I think I somehow convinced myself multiple ranges is the same as multiple digits. That was silly.I'm trying to think through your ideas. I'm not really sure how to picture the first one.But the alternative seems very reasonable. I think what you're saying would go like this: Count up on the highest weighted digit until the comparator output goes high, then count down one digit. Then do the same with the next lower digit, and so on, until you get to the last. And then somewhere (maybe when all digits have settled) disable the clock divider and count all of the digits quickly back to the 'zero' position.Does that sound right? And also can you explain a little more about the tracking one?Thanks for your thoughts

author: Kleinstein
author_rank: Super Contributor
timestamp: April 28, 2019, 08:39:36 pm
content: The counting per digit version might work without the extra step back, if the lower digits are not at 0, but at 9 and a small offset is added to the comparator (e.g. 1-2 LSB and thus fixed).For the tracking idea, the tracking scheme is an old idea and is sometimes also found in text books - just without separate handling of the lowest digit. So use a comparator to check of the input is higher than the DAC value and depending on the result count up or down and maybe stop if a 2 nd comparator is used.