Ground Plane on 4 Layer Stack - Page 1
Forum section: electronics / general

author: m-joy
author_rank: Contributor
timestamp: January 13, 2014, 04:22:56 pm
content: Hello everybody,i am using a 4 layer stack:Signal1GNDVCCSignal 2now most signals are on Signal1 layer. I wonder if the combination is good.I also want to know if it does make sense to make another GND plane on Signal1 layer, or better not?Greets

author: tszaboo
author_rank: Super Contributor
timestamp: January 13, 2014, 04:48:43 pm
content: This is really standard stackup for low-medium density boards. On signal1 adding additional ground would not make too much difference, on signal2 it would increase the stored capacitance for VCC, which is good. But of course, it depends on your application. What are you making, what frequency, how many ppm/%?

author: m-joy
author_rank: Contributor
timestamp: January 13, 2014, 04:55:11 pm
content: Hello,thank you. There is mainly one 80Mhz Pic Microcontroller feed by an 8Mhz Oscillator.And a Display with is driven with a clock of ~10Mhz. And additional lines for USB, UART, some PWM.That means switching the inner layers (vcc and ground) and add an additional GND Polygon to signal 1 would make sense? Because Signal 1 would be better for my ground plane. Or what about an Ground plane on signal1 and signal2?(pcb size 100x100mm)Greets

author: JuKu
author_rank: Frequent Contributor
timestamp: January 14, 2014, 06:57:52 am
content: it is good as it is. The ground is the closest to most of the signals, minimizing the return current loop areas, just as you want it. Just keep the ground solid, no cheating (routing through the ground plane).

author: tszaboo
author_rank: Super Contributor
timestamp: January 14, 2014, 12:28:17 pm
content: I also think that it is good as it is. It makes repairs a lot easier if you route on the outer layers, as tracks are accessible, and you need this for a prototype. Routing is only done on (only) inner layers if the density is so high, that there is no space for the tracks, like a mobile phone. But than you have a 6 layer board at least.Ground should be next to the power plane, and next to the signal plane having mayority of the tracks. I dont think you will have too much signal integrity issues with this, only take care about the USB. One other thing, is that an antenna on the top left corner? That also requires extra care.

author: m-joy
author_rank: Contributor
timestamp: January 14, 2014, 02:21:47 pm
content: Huhu,thanks =) okay so no more ground polys on the top.Jeah that is a PCB trace antenna. I routet the connection with 50Ohm impedance and made keepouts on all stacks beneath. Hope thats okay

author: nctnico
author_rank: Super Contributor
timestamp: January 18, 2014, 10:24:34 pm
content: Quote from: m-joy on January 13, 2014, 04:55:11 pm4 layers is total overkill for a project like this. Optimise the schematic so you can route most of the signals on the top layer. Have a solid-as possible ground plane on the bottom layer. Put a VCC copper pour underneath the microcontroller (no traces under the microcontroller!) on the top layer and put a ground pour on the top layer for the rest of the board. Stitch with vias to bridge over any traces on the bottom layer and presto: you have an excellent 2 layer design.

author: m-joy
author_rank: Contributor
timestamp: January 18, 2014, 10:36:53 pm
content: Why no trace under the uC?

author: tszaboo
author_rank: Super Contributor
timestamp: January 19, 2014, 08:28:51 pm
content: Quote from: nctnico on January 18, 2014, 10:24:34 pmDepends how many of the PCB is made. If you spend two additional 2 days making a layout for two layer, and in the end, you make tens of it, your time is a bigger expense for you or your company. Not to mention, if you have to re-spin the board because signal integrity issues, or you need to trace the problem, that is definitely a bigger expense.

author: nctnico
author_rank: Super Contributor
timestamp: January 25, 2014, 12:27:56 am
content: Quote from: m-joy on January 18, 2014, 10:36:53 pmThat would interrupt the solid VCC plane under the chip.@NANDBlog: it doesn't take me extra time to make a board that way. If you optimise the schematic for the traces to be short and without vias you have less work doing the layout so either way it pays off.