Class D FET driver questions (long...) - Page 1
Forum section: electronics / beginners

author: Chris Wilson
author_rank: Super Contributor
timestamp: January 03, 2018, 01:26:05 pm
content: I have run a Class D push pull FET based PA on LF (137kHz) for a long time, with no issues. It's exciter is a cheap kit from QRP Labs called a U3S. The amp is from an American hams' design and has worked fine. In a can't leave well alone moment I decided that as the designer of the U3S exciter had issued a new firmware update for its Atmega 328 processor that allowed toggling the Si5351A synthesizer to output two 180 degree out of phase signals, from CLK0 and CLK1 pins, these could be used to delete an IC (Flip Flop 74F74 that divides by two and inverts signal) in the amp and to drive the FET driver IC directly.Rather than spend an hour typing it all out I am taking the liberty of copy pasting what advice and questions I have received and posted on the UK LF forum, so you can see what's been tried. Basically I have changed from the IR2110 FET driver that needs 5V and 12V supplies to an MCP1404 driver IC that uses a single 12V supply, so also i lose a 5V voltage regulator too. I have it working (ran all night last night) but to do so I have to meticulously adjust the voltage to this driver IC to around 9V. Much less and the gate and drain waveforms of the PA FET's go to hell in a hand cart, and the same, but more so, with a near 12V supply.Here's where we have gotten so far! Thanks for reading, it's a bit long winded...I use my U3S QRP Labs exciter to drive a PA on 137kHz, and it worksfine. Hans, the designer, made changes allowing a 180 degree out ofphase pair of signals to come direct from the Si5351A synthesizer chip withthe intention of this being able to drive a push pull Class D FETdriver chip directly without a X2 signal being divided and split by apreceding IC, please see original and simplified circuits below. Itried this but it appears the circa 2.2V outputs of the Si5351A chipare not sufficient to drive the inputs of the IR2110 FET driver.Any ideas please? Thanks.Original PA circuit (works fine with "normal" U3S driving the 74F74direct with CLK0 output):http://www.gatesgarth.com/amp.jpgModded amp circuit (simplified in the hope of building with one lessIC):http://www.gatesgarth.com/amp-modded.jpgIR2110FET driver specs:http://www.gatesgarth.com/IR2110.pdf74F74 IC specs:http://www.gatesgarth.com/74F74.pdfU3S exciter schematic:http://www.gatesgarth.com/u3s-schematic.jpg~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Seems an odd choice of driver chip. A high/low side driver used in a non-bootstrapped mode to drive two low-side FETsHow about one of the normal FET driver chips - picking out one I've used in the past, the MCP14E 3/4/5 family. Logic level input, spec. Logic '0' max 1.3V, Logic '1' min 2.4V. So bias half way and your 2.2V swing takes it into the valid range.They three types are inverting, non inverting, and one of each in a package~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~OK, this seems to continue the simplify quest rather thantransformers, plus I can delete the 5V regulator. I think I have someMCP1404 driver chips, if I have I'll knock something together and reportback, thanks Andy.~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Hello Andy,MCP1404 IC fitted, as soon as power to the PA FETS is applied (even6V) one of the gate square waves either disappears or becomesextremely random. Swapping inputs to the driver IC makes nodifference, it's one pair of PA FET's dependent. FET's work fine whenreturned to "as designed" status! Driving the driver IC through the1nF caps and 15k resistors to ground. Outputs from CLK0 and CLK1 are180 out of phase and seem correct. Any ideas please? Thank you!http://www.gatesgarth.com/amp-modded.jpgSo am I ok using another pair of 15K to pins 2 and 4 up to pins 6 (12VDC +)? Thanks, this is all rather academic, given the latest U3Sfirmware allows direct output of two signals from the Si synthesizer180 degrees out of phase I just fancied seeing if I could reduce thecomponent count of an amp.~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~When I said bias half way, meant half way between the two logic threshold limits. Ie mid way between 1.3V (upper limit of guaranteed '0' and 2.4V (lower limit of guaranteed '1') so bias at 1.8VNot half the supply volts.Study the data sheets and calculate. Don't just play with components willy-nilly~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~.Hello Andy, OK, understood, I did some calculations then checked them against anon-line calculator and get figures of 68K and 12K for the divider. If Iretained the existing 15K to ground I might be able to use 82k as theother half? Or are these values too high for needed current flow?Thanks. Chris~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~An "Online calculator" Whatever is that. Do you mean the basic equations for a potential divider?Vout = Vin . (Rb / (Rt + Rb)There is no leakage current into a CMOS input so those will do as well as any other pairings. Check the chip data sheet, it gives you all the values you needAndy~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~Hello Markus / Andy / all,Please seehttp://www.gatesgarth.com/amp-simplified3.jpgI added 2 off 86k resistors as resistive dividers as shown. Voltageswere as expected 1.87 and 1.86V on pins 2 and 4 but both driver outputpins sat high at circa 12V . Removing the added resistors but runningthe MCP1404 on 9V all works fine with gate and drain waveforms asshown here:http://www.gatesgarth.com/9v.jpgBut on much less than 9v, say here at 6.8V the waveforms deteriorate and output is noisy:http://www.gatesgarth.com/6point8v.jpgand with the supply at near 12v things totally fall apart with the traces rapidly degenerating into hash around 11.7V :http://www.gatesgarth.com/11point7v.jpgNot sure why this is so....Have I misunderstood the bias at 1.8V Andysuggested?? By e-mail from Andy:@@@@@@@@@@@@@@@@@@@@@@@@@@"When I said bias half way, meant half way between the two logicthreshold limits. Ie mid way between 1.3V (upper limit of guaranteed'0' and 2.4V (lower limit of guaranteed '1') so bias at 1.8VNot half the supply volts.Study the data sheets and calculate. Don't just play with componentswilly-nilly.Andy"@@@@@@@@@@@@@@@@@@@@@@@@@@Thanks. Any /all pointers to what is happening welcome!I am wondering if the input capacitance of the two pairs of FQA34N20L FET's (worst case 7800pF, best case of 6000pF for a pair) is pushing this driver which is rated to deliver into 5600pF in 34nSIf I used a pair of TC4452 driver IC's (each 8 pin device has only one input and output) these are capable of supplying 22,000pF in 42nS so have a lot more oomph. Am I looking in the right direction or way off track please??

author: b_force
author_rank: Super Contributor
timestamp: January 03, 2018, 02:19:46 pm
content: What is the question exactly?Also, all these components are a bit old, nowadays there are a lot newer, cheaper and easier to use components.137kHz is also very low.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 03, 2018, 02:27:04 pm
content: o boy, what a nebulous long read.Firstly what is your problem ? Short term answer get newer chips from Ti and use a reference design, if you want to get abstract and use IR gate drivers and self oscillating loops well then buckle up you have lots to learn. You may want to look at diyaudio's class-d section.Good Luck.

author: capt bullshot
author_rank: Super Contributor
timestamp: January 03, 2018, 02:55:18 pm
content: In general, it's a bad idea to use AC coupling capacitors with the inputs of the driver chip.Next, the IR2110 is weaker than the MCP1404, so drives the MOSFETs somewhat slower.One more, the IR2110 has asymmetric propagation delays (turning OFF faster than ON), this provides some dead time in the original circuit.Last: you can use your 12V supply for the IR2110 logic side, this is clearly stated in the datasheet, so no need for the 7805.If your exciter doesn't provide enough level to drive the IR2110 input, you'll have to use some kind of level translator chip, like a 74LCX08, not AC coupling. AC coupling is "forbidden" with this kind of drivers. Treat them as "logic" ICs (like the 74xx series or whatever), not analog stuff that may work fine with AC coupling. These drivers must be driven by proper "logic" levels, like the output of a '04 inverter (or the '74 Flipflop) operating at 3.3V or 5V.Provide a solid ground plane for the MOSFETs sources and place the driver chip on this same solid ground plane, do not use wiring to connect the driver outputs to the gate and source. Keep the ground connection from MOSFET sources to the driver chip as short and solid as possible. You'll also need a proper ground plane from the logic chip driving the MOSFET driver to the MOSFET drivers. These drivers are quite fast and can pick up all kind of ground noise at their inputs, resulting in oscillation. The IR2110 is way much less sensitive here than the other one, so for a non-optimum layout, the IR2110 would be the better choice anyway. Stay away from more modern parts, as they often are faster and more sensitive to noise and ground shifting. They need real good layouts, decoupling and so on, and won't work reliably on a poor prototype built. Don't drive MOSFETs faster than required for your purpose.Driving the MOSFETs too fast (by using a beefier driver chip) can cause all kinds of unwanted feedback and oscillation. Real good ground plane design helps you out of here, or just use larger gate resistors to drive the MOSFETs somewhat slower. Your description of 12V supply voltage causing havoc points into this direction.Having not enough dead time can cause cross conduction with the MOSFETs, resulting in large unwanted currents circulating in your circuit through the ouput transformer. These also can cause all kinds of distorted waveforms until full destruction of the power stage. If the driver chip (the MCP1404) doesn't provide dead time on it's own, you'll have to provide some circuitry. Two 180° shifted waveforms aren't enough here, there must be some delay from the falling edge of one phase to the rising edge of the other phase, in both directions. The delay is required in the ballpark of 10ns ... 100ns.

author: Chris Wilson
author_rank: Super Contributor
timestamp: January 10, 2018, 11:21:37 pm
content: Some very very useful replies, thanks very much indeed. Captain Bullshot especially has given me much to consider, I have much to learn about what initially seemed simple amplifiers! Is *anything* simple in RF electronics?