Do single-ended impedance matter for differential pairs? - Page 1
Forum section: electronics / projects

author: unturned3
author_rank: Contributor
timestamp: May 29, 2023, 11:32:37 pm
content: Hello!I'm trying to calculate the trace width for a differential pair (carrying MIPI CSI-2 signals), usingJLC's impedance calculator. Given the defaults (1.6mm 4 layer PCB, 1oz outer copper, 0.5oz inner copper, 8 mil trace spacing) and a target differential impedance of 100 ohms, JLC's calculator suggests a trace width of 8.68 mils.However,PCBWay's calculatoralso reports a single-ended impedance along with the differential impedance. I've seen from several sources that MIPI CSI-2 need 50/100 ohms for the single-ended/differential impedance respectively. But,this threadseems to suggest that single-ended impedance doesn't matter much if the differential impedance is met.My questions are:1. Does the single-ended impedance matter for a differential pair?2. Can I get away with using JLC's suggested trace width of 8.68 mils, without caring about the trace's single-ended impedance?Thank you.

author: moffy
author_rank: Super Contributor
timestamp: June 01, 2023, 06:24:20 am
content: I was thinking about your question, and I think the single ended impedance does matter. If you terminate each of the differential traces to the ground plane with 50R resistors you will have 100R between the differential pair, which means all the transmission lines, single and differential are suitably terminated by just two 50R resistors.

author: unturned3
author_rank: Contributor
timestamp: June 10, 2023, 11:00:48 pm
content: Hmmm... I guess I'm even more unsure of what to do now, after reading your answer. I mainly do software and does not have a strong background in electrical engineering.

author: Marsupilami
author_rank: Frequent Contributor
timestamp: June 11, 2023, 02:40:59 am
content: Don’t take this as an expert advice, I’m waiting to be corrected, but I think it doesn’t matter assuming your driver is reasonably differential (driving significantly more even mode than odd).The single ended impedance of each trace alone doesn’t even matter, because the closeness of the other trace in the pair will have an effect and it also depends on the potential on that trace how much.I would double check with another calculator but other than that I think the diff value from jlc will be good.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 11, 2023, 04:55:57 am
content: Use the impedance recommended by the interface.50/100 means the lines are basically uncoupled. Contrary to one poster in the other thread, this still retains the benefit of the two signals picking up similar interference -- which therefore is able to cancel out at the differential receiver -- when they are routed near/over noise sources at the same positions along both lines.So, in a multilayer PCB, you might have noise sources due to crossing over different power planes, or routing near an SMPS, or a dynamic load (or indeed entering one, as in the SoC hosting the bus), or just routing over cables (even if modestly shielded, there is some CM introduced), and by letting those noise sources enter both linesat the same time(same position along the trace in terms of distance to receiver), signal quality is maintained.CM impedance cannot be ignored for two primary reasons:1. CM range. Noise greater than the input common mode range (usually GND to VCC, but often less!) causes the receiver to malfunction, and corrupted data results. Even if the noise magnitude by itself isn't sufficient to violate this limit (i.e. maybe it's 1V), resonance on the route can cause that voltage to multiply, at certain unlucky (resonant) frequencies. A CM choke might be used to dampen this mode, or to increase its impedance to better filter it, but there may be reasons not to do that. If nothing else, if the transmitter and/or receiver offer matched Zcm, any noise will be terminated and the multiplication ratio (aka Q factor) is 1. (Other reasons include direct use of the common mode, like USB's SE0 state -- USBis nota fully differential signaling method!)2. Mode conversion. In addition to the above, the differential signal itself can become corrupted, because the impedance seen by each line will always differ slightly between them, along the route, or at pins, etc. Thus, some CM noise couples into the DM signal -- and vice versa, which is how data signals can end up radiated as an emissions problem.So, because coupling doesn't matter, you don't need to worry about coupling distance at all. You do however need to worry about the EM environment, which suggests keeping them close-ish as a rule. How far is allowable, depends what they're being routed over, but most likely, being in the 3 to 10 x (dielectric height) spacing range will be fine. Avoid proximity to other connections, and reduce spacing if routing under something expected to have rapidly changing fields (i.e. intensity change vs. position). Also keep interference sources balanced and symmetrical where possible, like for crossing planes, do it square on, and try to match lengths to that point, as mentioned.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 11, 2023, 05:22:12 am
content: Quote from: Marsupilami on June 11, 2023, 02:40:59 amSurely you mean odd more than even?Even means, both in the same direction (CM). Specifically, Z_even is the impedance of one trace when both are driven in this way, i.e. Z_even = 2 Z_cm. Likewise Z_odd = Z_diff / 2. And normal/diff or CM/DM impedances can be derived from these.Presumably, the driver is generating very little even mode / CM (unless that's a feature of this version of MIPI of course; I am unfamiliar with it), and the receiver benefits from noise cancellation to maintain good signal quality.Of course, if it uses CM or normal mode signaling, signal quality benefitsnone, in general, from differential routing; and then it's like routing any bus of normal-mode (single ended) signals, where signal quality of any one trace must be as good as any other.(Again using USB as an example: I'm not clear on how the receiver structure is actually designed. It sounds like they're doing real differential receiving for the data, butin addition to thatthere's also a SE0 receiver. The problem is, if noise is bad enough to activate the SE0 state, the received data quality doesn't matter, it's just been superseded. There is still some merit in using a differential receiver in this way -- but it's still susceptible, by whatever the CM detection margin is, at some point. For example, perhaps the CM detector is disabled for some period of time, while receiving a packet say; well, that reduces the amount of time it's exposed to noise, which reduces the chance it's triggered erroneously. But the worst case can still happen, where exactly the receiver margin is crossed by noise at exactly the wrong time. This is the sense in which I mean "no benefit in general" above.)Tim

author: Marsupilami
author_rank: Frequent Contributor
timestamp: June 11, 2023, 07:16:30 am
content: Quote from: T3sl4co1l on June 11, 2023, 05:22:12 amYes, that. Listen to what I mean, not what I say, duuuh.

author: twospoons
author_rank: Frequent Contributor
timestamp: June 12, 2023, 01:22:02 am
content: Consider also that your typical differential driving source is in fact two single-ended drivers operating in anti-phase. The same is usually true at the receiving end too. So the implication from that is that you really should control both single-end and differential impedance.The only truly differential drive I can think of is a transformer.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 12, 2023, 01:36:44 am
content: Quote from: twospoons on June 12, 2023, 01:22:02 amNah; inter-winding capacitance, say. They can get almost arbitrarily good, but not perfect. Antenna maybe..?Tim

author: dmills
author_rank: Super Contributor
timestamp: June 12, 2023, 08:22:33 am
content: The thing to realise about most microstrip diff pairs usually couple FAR more strongly to the reference plane then they do to each other, to the point that edge coupling is often almost irrelevant.If you look at the geometry the wide face couples thru a dielectric of relatively high relative Mu and Er to the reference plane while (simplifying horribly) the edges couple thru (mostly) air and are only typically 35um high! Fringing effects do obviously make this more complicated and there are places where a 2.5 or 3d field solver is the only way to play.While you can fine tune the impedance with line spacing it has a very limited effect, so you can for example get say 90R for USB out of a pair of lines that are 50R to the reference plane when considered individually, but most of that comes from the two 50R to the reference plane in series.It is substantially the case that pair spacing does not much matter, but that trace width and spacing to the reference plane very much does.For shits and giggles I set up a test board and measured the reduction in interference coupling with a couple of differently spaced diff pairs and a very fast comparator, by sweeping a DC offset at the driver I could effectively measure the noise level at the receiver without needing a 25GHz scope.Turns out that with a standard LVDS RX at best I was getting about 12dB of suppression, and that this was almost constant (So probably limited by the LVDS RX) out to several mm of trace separation with the aggressor in the far field, near field as expected it mattered more.

author: shakalnokturn
author_rank: Super Contributor
timestamp: June 12, 2023, 06:07:48 pm
content: Quote from: dmills on June 12, 2023, 08:22:33 amWould routing differential pairs with conductors superimposed on adjacent layers be a better solution ?

author: f4eru
author_rank: Super Contributor
timestamp: June 12, 2023, 07:34:13 pm
content: if the signals are nicely symmetrical, if you put a common mode choke,then common mode impedance is irrelevanta mismatched common mode could in some circumstances help EMC.USB has some marginal signalling in the common mode domain, where a common mode choke can make problems.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 13, 2023, 12:32:51 am
content: Quote from: shakalnokturn on June 12, 2023, 06:07:48 pmIf you need strong coupling, it helps, but keep in mind this: say you could place your eye right in the middle of one such trace (that is transparent), and look around you: how much of your surroundings is filled by ground, and how much by your companion trace? Granted, some of the visible GND is at quite some distance, and distance matters here, but there's still one full side filled by GND, and less than a full side filled by the trace. So for equal spacings, we'd expect less than 50% coupling -- but not much less, maybe 30 or 40%? Certainly an improvement over the edge-parallel configuration.But typical PCB stackups are not equally spaced. If you did this on a typical 4-layer build, the Top-Mid1 and Mid2-Bottom spacings are MUCH thinner than Mid1-Mid2. To have shielded differential stripline, you can only route it on Mid1/Mid2. Which means they're both much closer to GND than to each other, and the coupling again is rather low. You'd need the inverse construction, with thin spacing between mid layers (prepreg), and wide spacing top and bottom (a two-core stackup). And that's annoying because now your surface microstrip traces are rather high impedance. Upshot: any inner plane pairs you're using will be very low impedance / high capacitance.On a multi-ier layer board (say 8+), you can remove whatever planes you like, above and below the pair, to get a lot more options on trace spacing and clearance to ground.But one would very much be reasonable to ask: is it really worth THAT MUCH wasted board area (layers above and below the pair route) when you could just use a single-ended stripline that will have better shielding and no obstructions to other routes? If it's an RF thing, just toss in baluns at worst; if it's a digital thing, just use the edgewise pair that is already standard, or add interfaces to make it single-ended (ECL perhaps). (LVDS over microstrip pairs is probably better than ECL over buried stripline, in a real PCB environment.)Tim

author: Marsupilami
author_rank: Frequent Contributor
timestamp: June 13, 2023, 05:40:54 am
content: Quote from: Marsupilami on June 11, 2023, 02:40:59 amI do stand corrected. I read more about this and I only have one question.As far as I understand it the ideal case is a pair of uncoupled lines that still close enough to pick up the same interference.Everything is only getting sh*ttier with coupling. Including loss.So then, when the system is constrained in a way that stuff has to be crammed in a tight space what's a practical rule of thumb figuring out how much SE impedance deviation is bad. Assuming it is not explicitly specified by the signaling standard used.So like when do you go, like "cr*p, I need a new stackup"

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 13, 2023, 06:50:34 am
content: Not bad, it simply is what it is, and needs to be treated properly (terminated, filtered, whatever).USB is what it is, because that's about what you get for a twisted pair inside a foil/braid shield.Ethernet, can somewhat ignore the common mode, on the cable (media side), as the CMRR of the transformers is reasonable (~30dB). The CM impedance of a cable in free space can be fairly modest (low 100s ohms, large component due to radiation resistance), but the cable can also be routed in ductwork or cable raceways i.e. basically making the whole cable as a round-wire-over-plane transmission line with Zcm maybe 70 to 150 ohms.Note it also uses CMCs to improve CMRR at high frequencies (which accounts for winding/wiring imbalance in the transformers).Once on-board however (PHY side of the transformers), the traces should be normal mode (50 ohms, uncoupled) because the traditional 10/100 current mode driver is just that, two N-MOSFETs sinking to GND (controlled amplifiers, not switches). With the termination resistors positioned close to the PHY pins, to terminate the stubs (since the two traces act in series with respect to each other through the transformer). Which is also why the PHY side trace length should be kept small -- but even 1G Ethernet is quite modest in bandwidth (~125MHz) so despite being a "high speed interface", the allowable stub length is quite long (10s of cm!).Whereas the H-bridge structure (mainly on 1G devices, but sometimes used by 100M ones too) could be wired straight differential, at least give or take how exactly CM is handled internally by the device -- but likely it's made for normal mode so it's fine without. (Likewise, they usually (always?) have the CT bypassed with a capacitor, implying a low Zcm is desired.) And anyway, PHY is always going to be board-level, so when are you not going to have low Zcm?Tim