MOSFET Safe Operating Area - Page 1
Forum section: electronics / beginners

author: Thane of Cawdor
author_rank: Regular Contributor
timestamp: January 15, 2022, 08:47:37 am
content: Hi everyone,I'm choosing between logic-level N-channel FETs for an application where they need to switch (every few hours at a time) up to 4-5A at a maximum Vgs of 25V, Rdson of less than 100 milliohms and a gate drive of 3.3V.When looking at the datasheet for thishttps://cdn-shop.adafruit.com/datasheets/irlb8721pbf.pdfdevice, it looks to meet the specifications. However from what I understand, according to the SOA, the operating mode is outside the safe region (drawn with blue).Am I missing something here? Does the SOA Vds x-axis refer to the voltage across the drain-source when the MOSFET is fully on (so in theory, we should be ok)?

author: Whales
author_rank: Super Contributor
timestamp: January 15, 2022, 09:48:25 am
content: Are you operating the mosfet in a "linear mode" of operation, ie partially on? Or are you using it as a simple on-off switch?You choose your position on the two axes of this graph (Ids and Vds) from actual, real life possibilities and points in time. ie: when your mosfet is fully on you have some Ids but almost zero Vds; when your mosfet is fully off you have almost zero Ids but notable Vds. These two points should be well within the SOA.N.B. technically you have to imagine there are SOA lines for operating longer than 10msec. Really there should be a DC line in there too (ie infinite seconds), but they're too lazy to spec it. If you interpret this graph without any DC SOA line then technically you could claim this device can't handle being off for more than 10msecLazy SOA graphs like this are supposed to be ignored when you're operating your mosfet as a switch (fully on and fully off), but because you're under-driving the gate (3.3V on a 10V-specced gate) then you have to guess.

author: Thane of Cawdor
author_rank: Regular Contributor
timestamp: January 15, 2022, 09:53:27 am
content: Thanks, I'm operating in the saturation mode as an on-off switch. That makes more sense! So as long as I'm in saturation mode, I won't need to really worry about the SOA (given I'll be right against either the x or y axis)?

author: Whales
author_rank: Super Contributor
timestamp: January 15, 2022, 09:56:10 am
content: Quote from: Thane of Cawdor on January 15, 2022, 09:53:27 amNormally, yes, but note the last sentence of my last post that I just ninja-edited in:QuoteTechnically speaking: this part is not specified to handle your load at all. It might blow up, it might notEDIT: If I go with your 100mohms RDSon then that means 0.5W dissipated in the fet when delivering 5A. That seems small so it's probably OK, but again because the SOA has no DC (infinite seconds) line I can only guess.EDIT 2: Looks like the datasheet only has graphs for RDSon down to Vgs = 4V (see attached). Not sure where you got the 100milliohms from.It looks like this mosfet won't even turn on until about 4V, so I don't think it will actually work in your application(unless you use some other circuitry to level-shift your 3.3V signal to something higher for the gate).

author: Nominal Animal
author_rank: Super Contributor
timestamp: January 15, 2022, 10:03:14 am
content: N-channel (enhancement-mode) FETs are used as a low side switch, with the drain connected to the load (load "ground", with the other side of the load connected to the positive supply) and source to ground. When the gate is at ground potential, the switch is OFF. When the gate voltage is sufficiently positive, the switch is ON.For the IRLB8721, look at Figure 2. Since you'll be using Vgs=3.3V, the "curve" we need to look at is somewhere between the two lowermost curves (that are for 3.0V and 3.5V). On the vertical axis, let's consider 5A. It's under 0.2V on the horizontal axis, so we'll be generous and estimate Vds=0.2V.This means that voltage drop (Vds) over the switch at 5A load is about 0.2V when turned on by a gate voltage of about 3.3V.About one watt (0.2V × 5A = 1 W for DC) is turned into waste heat due to that voltage drop.So, in Figure 8, in the Safe Operating Area chart, you're actually very near the left edge.In the Thermal Resistance section, it tells that the junction-to-ambient thermal resistance is max. 62°C/W (without a heat sink, mounted on an one square inch FR4 PCB). Since passing 5A means one watt is dissipated, the junction will be at about 62°C over ambient, so less than 100°C, which should not be a problem, really; but you might need a heatsink to be sure.Just for fun, let's compare a some (semi-random) alternative I picked from Mouser catalog: IPP042N03L G. Cost at Mouser is 1.29€ apiece, TME EU 1.1€ apiece. I don't know where you reside, but I think this one is what I'd use instead.Its Vds/Id chart doesn't have enough resolution at 5A currents (it is designed for much larger currents), but at 5A and less, its drain-source on resistance at 3.2 Vgs is about 9 mOhm, so at 5A, about 0.045 Vds (and 0.225W thermal load). Its datasheet doesn't report junction-to-ambient thermal resistance, but since the package is the same as above, let's assume a generous 75°C/W; and in that case, the junction temperature only gets about 17°C above ambient at 5A currents. Wouldn't even need a heatsink, and the voltage drop over the MOSFET would be neglible (twentieth of a volt at 5A). To handle much bigger currents, only a heatsink would be needed.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 15, 2022, 10:29:28 am
content: For a switching use the SOA diagram has curves for different times. This would be the time the MOSFET can withstand that combination of voltage and current at the same time. For switching this would be about the transition time. Very slow switching (very weak gate drive) may have to care about the SOA diagram and than look at the corresponding curve.The choosen MOSFET may not work well with only 3.3 V gate drive as it may just bare start to conduct or have a rather high R_on.This FET is OK with 5 V drive, but not 3.3 V. Those logic level FETs are from times when this was 5 V logic.For 3.3 V drive one would need a MOSFET made for lower drive, e.g. a specified R_on at 3 V or the like.

author: Ian.M
author_rank: Super Contributor
timestamp: January 15, 2022, 11:07:06 am
content: In these days of poor parts availability and FUBARed supply chains, as the application doesn't require PWM, I might be tempted to abuse a jellybean OPAMP as a somewhat crappy level-shifting gate driver, so I can use just about any power N-MOSFET. Pick one that can operate direct from your load's power rail (viable up to 35V max), with a common mode input range that includes ground, and configure it as non-inverting x3 for nearly 10V gate drive from a 3.3V level logic signal. Don't forget a 100 ohm series gate resistor as close to the MOSFET as possible to isolate the capacitive load from the OPAMP and prevent the MOSFET 'chirping' RF during the transition. If a low enough Vgs threshold MOSFET is available, do not populate the OPAMP and its feedback resistors, and place the gate resistor on alternative pads that connect it direct to the logic signal.

author: Siwastaja
author_rank: Super Contributor
timestamp: January 15, 2022, 12:41:44 pm
content: Quote from: Thane of Cawdor on January 15, 2022, 08:47:37 amYou probably already got it, but I say once more:The chart applies to all cases, and always holds. You just need to be careful understanding the circuit; as you draw it, the blue dot is placed at current during on-time, at voltage during off-time. Such combination does not exist in your circuit.In switching application, when off, Vds = Vsupply, but Id = 0. When on, Id = load current, but Vds = Rds_on * Id, nearly zero.You shouldn't ignore the SOA curve, just draw the dots in these two cases and make sure they are inside the safe operating area.You also should draw a third dot representing switching, but this is harder to quantify exactly. Say, Id = Iload, Vds = Vsupply/2, would be a fair ballpark assumption. Draw this third dot, and see if it fits within the curve as defined by the estimated switching time. Usually it does because switching times are short.And yes, in switching applications, we often just ignore the SOA graph, but really we shouldn't. But as you can see, if the switching time is short enough so that the curve is square on the top-right side, then we get the same result using other parameters defined in datasheet: Idmax, Vds_max and so on. Although, don't dismiss thermal calculations.

author: Thane of Cawdor
author_rank: Regular Contributor
timestamp: January 16, 2022, 07:00:02 am
content: Thanks everyone for the great responses, appreciate them all and will be following up on the suggestions.Quote from: Ian.M on January 15, 2022, 11:07:06 amAs an alternative, are there any issues with using a gate driver IC with a standard N-channel MOSFET, would you still need the gate resistors in this scenario?

author: Ian.M
author_rank: Super Contributor
timestamp: January 16, 2022, 07:19:49 am
content: You may still want a gate resistor to slow down the switching for EMI reduction purposes, or to 'tame' the gate driver by reducing the current spikes it draws driving the gate capacitance when switching. However its usually not advisable to slow it down so much you have to worry about how much of the SOA corner is clipped.As I commented above, populating it on different footprint locations is also a good way of selecting between direct drive of a <1.5V Vgs_threshold(max) MOSFET and an ordinary one via the gate driver. SMD Zero ohm jumpers cost money!