Solder paste coverage for large pads? - Page 1
Forum section: electronics / general

author: knotlogic
author_rank: Regular Contributor
timestamp: July 13, 2017, 02:22:06 am
content: Is there any rule of thumb when deciding the size of the solder paste aperture for large pads, especially like with exposed pad QFN packages? I've seen recommendations to break up larger areas into a number of smaller ones, but nothing that talks about how large/small to make the smaller areas, or what percentage coverage to aim for vs the original.

author: mrpackethead
author_rank: Super Contributor
timestamp: July 13, 2017, 02:35:25 am
content: Almost certainly ( at least for any decent manufacturer ) there will be recommended solder paste patterns for a package in datasheets etc. The rule of thumb would be to use those.

author: knotlogic
author_rank: Regular Contributor
timestamp: July 13, 2017, 05:26:19 am
content: Quote from: mrpackethead on July 13, 2017, 02:35:25 amLooks like Atmel might not be one of those decent manufacturers...Or I've been doing a terrible job of searching for them. But I've also been looking at various power LED packages from smaller manufacturers, and.... it's messy. There's a 2835 package that appears to be an industry standard, but there seem to be rather different PCB footprints between manufacturers!evb149, thanks for the list! That's going to take me some time to get through though. 70% is rather small though, not to mention 50%! I was guessing 80% but now that seems way too much.I've been using EAGLE thus far, and IIRC the paste layer is automatically shrunk a certain amount relative to the copper layer, although it's possible to delete it and insert one's own during footprint creation. I need to check that. (I also need to start using CircuitStudio, but that's a different matter entirely...)I'm not doing any commercial manufacturing with this, and am probably going to go with OSH Stencils for my first time round.

author: jmelson
author_rank: Super Contributor
timestamp: July 14, 2017, 07:54:42 pm
content: For QFNs with exposed pad under the chip, the amount of solder paste must be reduced a LOT, or the chip will pull down and squeeze the solder out to the rows of pads, shorting everything out. Many people make "window frames" by making a number of squares with clear stripes between them. This arranges for the solder to be spread across the pad but still reduces the total solder volume to prevent the shorts.Larger parts can use 100% aperture to pad size, as the lead pitch is reduced, then you have to make the apertures smaller to prevent bridging. I sometimes have to go down to about 50% area for 0.5 and 0.4mm lead pitch.Jon

author: ion
author_rank: Regular Contributor
timestamp: July 14, 2017, 09:26:04 pm
content: If you're looking at Atmel, they do have this Application Note:http://www.atmel.com/Images/Atmel-8826-SEEPROM-PCB-Mounting-Guidelines-Surface-Mount-Packages-ApplicationNote.pdfSection 2.3 has some information on paste stencils.

author: mrpackethead
author_rank: Super Contributor
timestamp: July 15, 2017, 12:13:05 am
content: Quote from: ion on July 14, 2017, 09:26:04 pmthis is probably the best note i've seen on it.. nice post.

author: d1wang
author_rank: Newbie
timestamp: January 16, 2019, 02:30:33 am
content: I was wondering the same thing and found this thread.While many manufacturers have recommendation on the stencil design, all involve rectangular stencil apertures. So far I haven't found any actual drawing on a complex stencil (likethis) from any semiconductor manufacturer:I am in the process of creating aWeb toolfor calculating the paste masks and the total paste area. Let me know if you find any mistake or have any suggestion.

author: IconicPCB
author_rank: Super Contributor
timestamp: January 16, 2019, 05:13:16 am
content: It is counter productive to talk about aperture area when in fact solder volume is the issue to hand.

author: mrpackethead
author_rank: Super Contributor
timestamp: January 16, 2019, 06:43:35 am
content: Quote from: IconicPCB on January 16, 2019, 05:13:16 amI would be significnatly concerned about creating voids with the circular patterns in that stencil. The variation in height because of the use of solder mask is also an issue.

author: d1wang
author_rank: Newbie
timestamp: January 16, 2019, 07:18:10 am
content: I have searched the Web for information on this. I haven't found any formula or a ballpark target of the solder paste volume. I would appreciate it if someone can provide a formula/number that people can use as starting point.The idea here is to have some acceptable result (without the added cost of via plugging). The following comes from TI'sapplication note:QuoteDoes anyone have experience with via-tenting on exposed pad?I haven't read anything that mentioned height variation. How big of a problem is the height variation?

author: ar__systems
author_rank: Frequent Contributor
timestamp: January 17, 2019, 03:15:19 pm
content: I did vias on the exposed pad and masked via on the bottom side. Works fine. I notice that at least some of lead free pastes don't really flow that much (or at all, really). In particular GC10 practically does not flow. So sucking solder into via might be much less of an issue than you think.

author: d1wang
author_rank: Newbie
timestamp: January 18, 2019, 12:25:32 am
content: Good to know. What's the drill size of your via hole? Do you know if the stencil apertures avoided covering paste on the via holes?

author: mrpackethead
author_rank: Super Contributor
timestamp: January 18, 2019, 12:37:32 am
content: tenting the bottom side is not a good idea. It can result in outgassing.. which can do all sorts of nasty things when you reflow.. the gas thats trapped in the via will expand when heated.I have good results with not tenting either side, I put my solder paste in squares to avoid the holes.. and with GC10 it really doe'stn seem to move that much, and i don't get wicking.