oversampling + dithering limitations ADC bits upgrade (correlation explaination) - Page 1
Forum section: electronics / projects

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 22, 2014, 06:40:37 pm
content: So I have done regular over sampling of a ADC before, and its nice. However, I noticed this:http://www.ti.com/lit/an/spra461/spra461.pdfon page 9 they show how by injecting a dithering signal you can increase your gains from over sampling, and its impressive (4096 samples = 11 bits extra).However the PG 9 (under limitations) says that that this works if-the signal does not correlate with the dithering (what does this mean)?-if you cannot assure that it does not correlate then the quantity should not change by more then 0.5 LSB during the period of Fs (sampling) times K (over sampling coefficent).So if I had a 1 MSPS ADC with a triangle wave dither doing 4096 over samples and the signal does correlate (again what does this mean??) then1/(1,000,000*4096)=244 picoseconds. So if the ADC was 6 bits, I added 11, making a 17bit ADC, then my signal could not change by more then 0.5 LSbits in 244 picosecond? WHat if they are uncorrelated?but this makes no sense, the proportion I get from 20uV/244 picosecond is 81920 volts/second, and then using the slew rate formulaVp = Sr/2*pi*FWe want our maximum frequency at 5V, so, 81920/(2*3.14*x)=5, solving iteratively I get about 2500Hz...Again, this assumes that my input is "correlated" to the dither.is this correct? how practical is it to squeeze 11 bits out of something? how do I determine if my signal correlates? what if it does not, what is the rule of thumb???I would like to try this out on a SAR ADC some time, but will it be a futile effort to try to get 11 extra bits from some high speed ADC? if only for kicks and giggles.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 22, 2014, 08:22:06 pm
content: http://en.wikipedia.org/wiki/Cross-correlationNot that Wiki explains things very well, but the point is basically this: suppose your signal can contain any frequency. Maybe it's an audio ADC or something, so it has to cover a wide, continuous, band. There will be at least one frequency out of the entire range which is a close ratio of the dither. The peaks and valleys of both signals will line up, and the dither will make things worse rather than better, manifesting as poor accuracy, DC offset, AC ripple, aliasing and so on.Tim

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 22, 2014, 08:33:32 pm
content: Quote from: T3sl4co1l on March 22, 2014, 08:22:06 pmok. So a DC signal will not correlate to anything then? Do you know of what the "uncorrelated" limitations are ?correlated = 0.5 lsb/244psuncorrelated =?I was thinking that the linear oversampled dithered 24 bit 32000ksps SAR ADC could give something the 31 bit texas instruments 60$ 31bit ADC a serious run for its money since its only 10$ single (vs 60-120$ single for the 31 bit ADC).http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7767/products/product.htmlthis ADC already has some ASIC digital filtering in it but I don't see any reason why you could not further over sample it.here is the texas 31 bit adc :http://www.digikey.com/product-detail/en/ADS1282IPW/296-23429-5-ND/1856942If I did over sampling on the 7767, at a rate so that the useful output is ~ 120 samples a second it sounds like it could probably get close to the specifications of the ads1282 @ 120s/sanyway, it seems that correlation is a % property. what is the threshold of the the 0.5lsb limit?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 22, 2014, 09:01:23 pm
content: Oh, and you made a mistake in the formula; the quoted text says "period of Fs times k", or(1/Fs) * kwhich is in the miliseconds, not picoseconds.What exactly are you trying to measure? Even a "DC" signal (really, meaning bandwidth < 1Hz) is noisy enough that you can't get 24 bits out of it. That's nanovolts. Nanovolts hardly exist on the quantum level, at cryogenic temperatures (such is the domain of SQUIDs and such!). You aren't going to find anything by dithering, nor by paying an additional $50.Also mind that dithering depends on DNL being uniform over the range. Some ADCs have this, most SAR ADCs do not (it jumps around between perhaps 0.2 and 0.8 LSB, but almost always still monotonic). One option is to use a dither much greater than an LSB, so the error is averaged over many DNL bins in a region, but this will still be subject to variation. In effect, you're depending on the single-bit gain to be flat, when it is not; and when it varies, so does your equivalent dither amplitude. Yes, you can accumulate numbers til your heart's content, but that doesn't mean the additional bits are at all (quantitatively) useful.Tim

author: SArepairman
author_rank: Frequent Contributor
timestamp: March 22, 2014, 09:27:45 pm
content: Quote from: T3sl4co1l on March 22, 2014, 09:01:23 pmoh, I see, that pesky formula...regular over sampling seemed to work for me when I tried it with a 16 bit ADC, it was useful at DC for around 3 extra bits in my testing.I spent time reading various papers on over sampling and there seems to be a general consensus that you can get 2-4 bits of useful resolution through regular over sampling (this 2-4 bit increase is claimed by papers from Silicon Labs, Texas instruments, etc) and that past that its probably a wise idea to switch the hardware.So I should look at dithering as a tool to get me 2-4 more bits from my signal, so long I don't mind the correlation problems, so I can get twice the sampling rate of regular over sampling?Have you ever seen any circuits that used a gross amount of over sampling, for some kind of specialized application? just wondering (other then a delta sigma ADC)How about sticking to low frequencies? Like reading a resistive sensor cycled at 1-2 Hz for 1/f , thermocouple voltage cancelingit does seem that the 31 bit ADC was meant for low frequency signals, not DC.