SPICE model for 4538 monostable ? - Page 1
Forum section: electronics / projects

author: jmelson
author_rank: Super Contributor
timestamp: May 21, 2019, 09:41:39 pm
content: Anybody know where to get a generic SPICE model for a 4538 monostable?There is a HIDEOUS file from TI that has about 100 parts in it, but they are all just I/O models, with no actual logic function inside. The late Jim Thompson apparently created a model, but I can't find the actual file, his web site seems to have gone down sometime after his demise.I want to simulate something so I make sure I have the right connections to the positive- and negative-triggered edge inputs.Thanks for any help,Jon

author: Wimberleytech
author_rank: Super Contributor
timestamp: May 21, 2019, 10:42:03 pm
content: Found this on github* (DUAL) RETRIGGERABLE MONOSTABLE MULTIVIBRATOR* Pulse Width Tw = 0.7 * R * C* tpd R,A,B->Q 30n* Tpulse 75n, C=0, Rext=5k.SUBCKT 74HC4538 A B CLR CGND RC Q QN VCC VGND vcc1={vcc} speed1={speed} tripdt1={tripdt}.param egain=1/{vcc1}.param td5=1e-9*(5)*4.0/({vcc1}-0.5)*{speed1}.param td2=1e-9*(2)*4.0/({vcc1}-0.5)*{speed1}*XINA A Ai VCC VGND 74HC_IN_1 vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}XINB B Bi VCC VGND 74HC_IN_1 vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}XINCLR CLR CLRi VCC VGND 74HC_IN_1 vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}XINRC1 RC RCi VCC VGND 74HC_IN_0 vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}** Model of a 74HC123A derived from SGS-Thomson data sheet.* Helmut Sennewald, 13.9.2002A4 DHIGH 0 N014 0 N004 N006 N005 0 DFLOP tripdt={tripdt1} td={td5}*A3 0 N015 N016 N023 0 N014 0 0 OR tripdt={tripdt1} td={td5}A3 0 N015 N016 0 0 0 N014 0 OR tripdt={tripdt1} td={td5}A1 Ai 0 0 0 0 0 N015 0 SCHMITT Vt=0.46 Vh=0.02 tripdt={tripdt1} td={td5}A2 Bi 0 0 0 0 N016 0 0 SCHMITT Vt=0.46 Vh=0.02 tripdt={tripdt1} td={td5}A6 0 N008 0 N006 0 N007 0 0 AND tripdt={tripdt1} td={td5}A5 0 N009 0 N007 0 N008 0 0 AND tripdt={tripdt1} td={td5}A14 0 N003 0 N021 0 N004 0 0 AND tripdt={tripdt1} td={td2}A13 0 N003 0 N005 0 0 N030 0 AND tripdt={tripdt1} td={td5}A12 N005 0 0 0 0 N012 0 0 BUF tripdt={tripdt1} td={td5}A21 0 N010 0 N011 0 0 N009 0 OR tripdt={tripdt1} td={td5}A22 0 N005 0 N007 0 N010 0 0 OR tripdt={tripdt1} td={td5}A11 0 N013 0 N012 0 0 N003 0 OR tripdt={tripdt1} td={td5}A7 0 N007 0 N018 0 QNi Qi 0 AND tripdt={tripdt1} td={td5}A20 RCi 0 0 0 0 N011 0 0 SCHMITT tripdt={tripdt1} td={td5} Vt=0.54 Vh=0.2mA10 RCi 0 0 0 0 0 N013 0 SCHMITT tripdt={tripdt1} td={td5} Vt=0.1 Vh=0.2mA32 0 N006 0 N021 0 N022 0 0 OR tripdt={tripdt1} td={td5}A31 0 N022 0 N023 0 N021 0 0 OR tripdt={tripdt1} td={td2}A33 N021 0 0 0 0 N019 0 0 BUF tripdt={tripdt1} td={td5}A30 CLRi 0 0 0 0 N023 0 0 BUF tripdt={tripdt1} td={td5}A34 0 N007 0 N006 0 N020 0 0 AND tripdt={tripdt1} td={td5}A35 0 N020 0 N018 0 N017 0 0 OR tripdt={tripdt1} td={td5}A36 0 N017 0 N019 0 N018 0 0 OR tripdt={tripdt1} td={td5}M10 RC N001 VGND VGND NMOS1M30 RC N024 VCC VCC PMOS1D1 RC VCC DIO1D2 VGND RC DIO1R10 N001 N002 100R30 N024 N029 100R3 CGND VGND 1E4 RCi 0 RC VGND {egain}E7 N029 VCC N018 0 {vcc1}E8 N002 VGND N030 0 {vcc1}V1 DHIGH 0 DC 1.MODEL NMOS1 NMOS ( LEVEL=3 W=500e-6 L=1E-6 VTO=1+ VMAX=1E6 RS=10 RD=10 CJ=0.002 MJ=0.4+THETA=1E-6 ETA=0.01 KAPPA=2.2).MODEL PMOS1 PMOS ( LEVEL=3 W=500e-6 L=1E-6 VTO=-1+ VMAX=1E6 RS=10 RD=10 CJ=0.002 MJ=0.4+THETA=1E-6 ETA=0.01 KAPPA=2.2).MODEL DIO1 D (IS=10p RS=10 N=1.75 M=0.4 Cjo=6p TT=20n)*XOUT0 Qi Q VCC VGND 74HC_OUT_1X vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}XOUT1 QNi QN VCC VGND 74HC_OUT_1X vcc2={vcc1} speed2={speed1} tripdt2={tripdt1}.ends

author: RomDump
author_rank: Regular Contributor
timestamp: May 22, 2019, 12:26:08 am
content: Quote from: jmelson on May 21, 2019, 09:41:39 pmJim Thompson Model

author: jmelson
author_rank: Super Contributor
timestamp: May 22, 2019, 06:12:31 pm
content: Thanks very much, guys!Jon

author: jmelson
author_rank: Super Contributor
timestamp: May 22, 2019, 09:51:30 pm
content: Ugh, thanks were a bit too soon. The first one was incomplete, it calls in a bunch of I/O subcircuits like 74HC_IN_1, which are not included.And, the Jim Thompson one, although it says "run on ANY simulator" has a lot of syntax that is not compatible with my sim (basic SPICE included in Protel 99SE). So, there are things like :E_E6 N_1 GND VALUE { V(Rbar, GND)/V(VCC) }I converted these to :E_E6 N_1 GND VOL='V(Rbar, GND)/V(VCC)'which seemed to satisfy the syntax, but I get a page of errors when I try to run the simulation.Anybody recognize the flavor of SPICE this was written in?Thanks,Jon

author: Wimberleytech
author_rank: Super Contributor
timestamp: May 22, 2019, 10:29:44 pm
content: Here is the github link from where I grabbed the post above. It prolly has those other subcktshttps://github.com/texane/power_inverter/blob/master/ltspice/logic/74hc/74hc.lib

author: RomDump
author_rank: Regular Contributor
timestamp: May 23, 2019, 01:36:39 am
content: Quote from: jmelson on May 22, 2019, 09:51:30 pmJim use to write his models for PSpice. However, looking at the files in the archive it looks like it is for LTSpice (Which you can download for free and use).