decent but affordable 16 bit DAC - Page 1
Forum section: electronics / projects

author: nemail2
author_rank: Regular Contributor
timestamp: June 07, 2019, 11:52:03 pm
content: Hicurrently I'm using a MCP4922 in my Lab PSU design. However as I have a gain of 6 currently for my voltage set circuit (DAC goes to opamp, opamp has a gain of 6 and has a darlington in it's feedback loop) and I want to output more than 12.228V (which is VREF = 2048mV * gain of 6) by still being able to control the voltage with 1mV steps, I thought I'd need a higher res DAC.The MCP4922 does have an internal programmable gain of 1 and 2 but with my current setup, at an internal gain of 2 and an external gain of 6 at a VREF of 2048mV I'd be setting my voltage in 6mV steps instead of 1mV.So I found this one:http://www.ti.com/lit/ds/symlink/dac8563t.pdfand was wondering if it was even possible to feed it with 5V (which would give me 5V full scale output) but use 3.3V (that's the MCU's voltage) for the SPI interface. According to the datasheet, the DAC recognizes voltage above 2.1V as logic input HIGH. According to the datasheet it should be possible even without the need of any voltage level shifters.Am I missing something or should this work?Does anybody know better suited/cheaper DACs with 16 bits or even a completely different/better idea how to solve this?Thanks!

author: thm_w
author_rank: Super Contributor
timestamp: June 08, 2019, 12:23:41 am
content: Quote from: nemail2 on June 07, 2019, 11:52:03 pmYeah looks like you are right, no outputs so no level shifting needed. You may need to do some calibration if the accuracy isn't good enough for you, but the typical values look good. Also depends on your external reference.$8/eahttps://www.ti.com/product/DAC8563TThere are some DAC8562SDGSR on LCSC for under $5:https://lcsc.com/products/Digital-To-Analog-Converters-DACs_615.htmlI tried to see what DAC is used in Rigol/Siglent PSU but couldn't find it.

author: mariush
author_rank: Super Contributor
timestamp: June 08, 2019, 12:35:49 am
content: Have you looked at something like LTC2631H or LTC2640H (12bit, 4.096v internal reference) ... not sure you'd get mV precision, but 2-3 mV should be doable.May seem expensive for a 12bit DAC but if you include the built in reference...or maybe LTC2612 (14bit , needs external reference)

author: MasterT
author_rank: Frequent Contributor
timestamp: June 08, 2019, 01:55:37 am
content: MCP4912 has INL +-12 LSB, so basically its' 8-bits DAC and you never get 1mV anyway, even in 0-2.048 range. It's easier /cheaper to use a sigma-delta adc (mcp3421, mcp 3551) and digital pots to lock a loop via micro. Accuracy 18 -3 bits (resistor divider to scale output back) =15-bits or so.If still prefer your design, than look at max5717A - 16 bits, INL +-1

author: David Hess
author_rank: Super Contributor
timestamp: June 08, 2019, 03:00:39 am
content: Quote from: MasterT on June 08, 2019, 01:55:37 amI was going to say this first but you beat me to it. The MCP4922 only has the absolute accuracy of an 8 bit DAC. Higher resolution than accuracy is common in servo applications where the only requirement is monotonic operation.QuoteOr there are 12 bit DACs which have 12 bit accuracy if that is required.

author: Kleinstein
author_rank: Super Contributor
timestamp: June 08, 2019, 08:32:13 am
content: As in a lab supply there is no need to change the settings very fast, one could use PWM and a filter. With some care it can be reasonably linear and it essentially always is monotonic. There is still some effort for a good filter, that does not add much drift and it needs care with the layout and reference buffering.

author: Arjunan M R
author_rank: Regular Contributor
timestamp: June 08, 2019, 08:38:43 am
content: I am also designing a lab PSU using MCP4922.To measure current and voltage I am using MCP3421 ADC.

author: nemail2
author_rank: Regular Contributor
timestamp: June 08, 2019, 01:25:54 pm
content: Quote from: thm_w on June 08, 2019, 12:23:41 amI'd like to use the internal reference of the DAC. The ADC I'm using (ADS1115) as well has an internal reference so I'd get away without any external references at all (which saves board space).Quote from: thm_w on June 08, 2019, 12:23:41 amThanks! Didn't think of LCSC being an option! I'm kinda buying everything at Mouser which sometimes costs me more money than necessary. Have to work on that :-)Quote from: mariush on June 08, 2019, 12:35:49 amTo get the desired resolution and output voltage, I'd need 14 bit at least. Unfortunately the LTC2612 is a bit on the expensive side, being even without an internal VREF...I could go with 4.096V VREF @ 12 Bit DAC and Gain of 5 though, that'd give me 20.480V max. output which is good but I'd have to go with 5mV steps (not too shabby and better than 3mV in terms of nice steps). i guess I'd find a decent, rather cheap 12 Bit DAC which accepts 3.3V and below als logic input high while running @ 5V. So I guess that'd be a rather cheap but not as precise solution. And it would be a shame, using resolution here, as I just beefed up the ADCs for being able to measure in 1mV steps.2.500V VREF @ 16 Bit DAC and Gain of 5 would give me 16.500V max output (with internal DAC Gain of 2) at 0.03814697265625mV steps (internal DAC gain of 1) or 0.0762939453125mV steps (internal DAC gain of 2). not beautiful but I could "repair" some of that in software. this seems to be the easiest and cheapest solution in terms of hardware.4.096V VREF @ 14 Bit DAC and Gain of 4 would be the nicest option in my eyes. 0-16.384V in 1mV steps that would be.4.096V VREF / 16384 (14 bits) = 0,25mV per stepGain of 4 makes that 1mV per stepGain of 4 makes 16.384V max output out of the 4.096V VREF. VDD would be 5V for the DAC and it would have to accept low-ish voltages like 3.3V (MCU voltage) as logic input high. Also, there should not be any outputs cause they'd drive at 5V which would fry my MCU (and I don't want to use a voltage level shifter). That seems to be the easiest solution in terms of software and traceability due to the simplicity of the calculations.while writing, it came to me that 16 Bit DAC and gain of 4 @ 4.096V VREF would work good as well, same as 14 Bit DAC and Gain of 8 @ 2.048V VREF should work. 16 Bit DAC and Gain of 8 @ 2.048 VREF should work too.As far as I can tell by parametric search results, there is no such 14 Bit DAC with integrated 4.096mV VREF so I guess it'd be something like the LTC2612 or DAC8162T + external 4.096V VREF if I want to go the 14 Bit way @ Gain of 4.My head is smoking. Is gain of 8 a smart thing to do? That'd amplify the minimum output of the DAC (which in my case with the MCP4922 currently seems to be about 1-2mV) by 8 so it raises the minimum output voltage...Quote from: MasterT on June 08, 2019, 01:55:37 amBut I'm using the MCP4922, not the MCP4912 currently and it works quite good (3mV steps work). Only thing I want to replace it is because of the 3mV steps, I'd like to have 1mV steps... that digipot design sounds interesting, never thought of doing it like that. However for now, I'd like to stick with my design...Quote from: Kleinstein on June 08, 2019, 08:32:13 amI'm not good at designing filters (essentially, I do not know what I'm doing) and I'd need a 14 or 16 bit PWM then, at least. Wouldn't I?Quote from: Arjunan M R on June 08, 2019, 08:38:43 amThat might be Dave's fault, using the MCP4922 in his µSupply video series years agoFor the ADC, I went with the ADS1115.

author: mariush
author_rank: Super Contributor
timestamp: June 08, 2019, 02:23:48 pm
content: Here's a thought .... could you compromise in some way and configure the gain of your opamp dynamically depending on the output voltage, so you'd get 1mV steps below 5v, 2mV below 10v, 5mV below 20v or something like that?Maybe it's something as simple as shorting resistors on the gain of your opamp to take them out of circuit?

author: chris_leyson
author_rank: Super Contributor
timestamp: June 08, 2019, 03:07:15 pm
content: "DAC 2 Click" from MikroElektronica uses the 16-bit LTC2601 which has 8 LSB INL, and the "ADC 8 Click" uses the ADS1115.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 08, 2019, 05:13:28 pm
content: As others pointed out, INL and DNL are your major constraints here and you have previously mentioned that you are not able to calibrate them outwhich is a bit painful. the LTC2601 is a reasonable replacement, but still not fantastic. at worst case scenario it has 64 bits INLmaking it a 10 bit ADC ... so cross your fingers and hope you get a golden sample ... or order a few and test them individually (I once had to do that with op amps since the more expensive stuff would have costed about more than 10 of the cheaper onesI got lucky and found a golden sample in them).what op amp are you using for the gain stage? I suggest a rail to rail chopper amplifier since you need low input offset voltage for any level accuracy. maximum allowed offset would be the tolerance, divided by gain, so 1/6 mV in your case.

author: David Hess
author_rank: Super Contributor
timestamp: June 08, 2019, 06:29:40 pm
content: Quote from: mariush on June 08, 2019, 02:23:48 pmThat is not an uncommon way to handle it. Often you have to dig into the specifications to find if this was done.

author: nemail2
author_rank: Regular Contributor
timestamp: June 09, 2019, 11:56:50 am
content: Quote from: mariush on June 08, 2019, 02:23:48 pmQuote from: David Hess on June 08, 2019, 06:29:40 pmnah, wouldn't be an issue for me. I mean, who needs 12.000V and couldn't get away with 12.010V (if that'd be the only settable voltage due to resolution)? I know, bad example - but for me, that wouldn't matter.How'd I do that, with MOSFETs? Are they the way to go? Or is it another "it depends" like always in engineering?Quote from: chris_leyson on June 08, 2019, 03:07:15 pmQuote from: OM222O on June 08, 2019, 05:13:28 pm^|This... that's a horrible number... The ADS1115 is pretty decent though, and I'm going to use that as it performed well on my breadboard tests with my Lab PSU circuit on a PCB already (bodged in).Quote from: OM222O on June 08, 2019, 05:13:28 pmnah, not gonna do that. I'll be better off, just ordering a DAC which doesn't have those bad figures in the first place.Quote from: OM222O on June 08, 2019, 05:13:28 pmOPA2197, they seem to work pretty good, in general I get really good voltage setting results with my current setup (MCP4922 + OPA2197) with measured voltage being in general within 0.1% of the set value (measuring with my multimeter + the ADC, both measurements match).Quote from: OM222O on June 08, 2019, 05:13:28 pmyeah, that's simply beyond my knowledge, I wouldn't even know where to start. and even if, I'd need somebody to explain it to my like to a braindead monkey before i'd get it... unfortunately I sometimes do learn really fast and sometimes things take ages.Quote from: David Hess on June 08, 2019, 06:29:40 pmI guess I kinda like the idea, however I'd be happy if I'd get away without having to implement that as it'd add more complexity to the circuit and I'm running out of GPIOs on my MCU already. Sure one could do the switching with schmitt triggers and stuff but yeah.. complexity and board space

author: nemail2
author_rank: Regular Contributor
timestamp: June 09, 2019, 12:20:26 pm
content: How about this puppy?https://www.mouser.at/datasheet/2/609/AD5641-1501608.pdfI could power it through the (to be chosen) 4.096V voltage reference and all'd be fine.One thing comes to mind, however: will this thing really output 4.096V at max (rail to rail output)? I wasn't able to find anything(!) in the datasheet which declines that. Everywhere they are talking about 0 to VDD output.or, what about this one, even better values as far as i can tell:http://www.ti.com/lit/ds/symlink/dac8311.pdf

author: nemail2
author_rank: Regular Contributor
timestamp: June 09, 2019, 03:47:43 pm
content: ok so I came to the following conclusion, which should work for my design:use DAC8311 14 Bit DAC @ 4.096V VDD=VREF and Gain of 4 at my Opamp output stageuse a second DAC8311 14 Bit DAC @ 4.096V VDD=VREF for my CC mode circuit (instead of currently 12 Bit @ 2.048V VREF so I'll be able to set the current in 0,5mA steps or just jump two steps at a time if i want to keep 1mA resolution)use REF5040 (standard grade) as a voltage reference and to power both DACsDAC8311 datasheet:http://www.ti.com/lit/ds/symlink/dac8311.pdfREF5040 datasheet:http://www.ti.com/lit/ds/symlink/ref5040.pdfAs I'm currently using the REF3120 (standard grade) as VREF for my DAC, the new VREF should be an improvement as well.My only concern is the output power needed to drive both DACs driving the opamps, especially in regards of the input voltage I'd apply to the REF5040.The only voltage which is usable and near the REF5040 is 15V so there'd be some dissipation and warmup in the reference, if the DACs will draw the max. specified 10mA. Question is, if they will. I don't think so but I'm not 100% sure, as I didn't really have to worry about it until now.Please have a look at my schematics, first page, upper right part:https://github.com/mamama1/LabPSU_Darlington/blob/master/schematics.pdfSorry for the mess, if I'd redraw it, I'd have to reroute everything as well :-(Thanks!

author: SiliconWizard
author_rank: Super Contributor
timestamp: June 09, 2019, 05:00:29 pm
content: Quote from: nemail2 on June 07, 2019, 11:52:03 pmDatasheet states that logic inputs high level is 2.1V to AVDD, so you can safely use 3.3V to 5V logic if you're using a 5V AVDD.Obviously don't forget to connect the 5V supply to the VREF pin as well, otherwise it will use the internal reference (2.5V). Note that the internal reference is pretty accurate so if a 2.5V full-scale output could be adequate, I'd suggest using it instead of a generic 5V the accuracy of which may not be all that good. Of course you can always use a 5V voltage reference both for VREF and AVDD: this DAC draws little current.

author: nemail2
author_rank: Regular Contributor
timestamp: June 10, 2019, 12:41:35 am
content: kinda decided to go with the DAC8311, unless something bad comes up... (see my previous post).But thanks for your response anyway.

author: David Hess
author_rank: Super Contributor
timestamp: June 10, 2019, 03:28:48 am
content: Quote from: nemail2 on June 09, 2019, 11:56:50 amIt comes down to either switching a gain stage after the DAC or switching the gain of the control loop which has the complication of affecting the frequency compensation. It could be done with MOSFETs but there are lots of ways.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 10, 2019, 04:55:48 am
content: Look up "universal shunt" or "ayrton shunt". Same idea applies here. You have a resistor in the feedback path of the op amp. If the shunt is disconnected, it only acts as a dummy resistor and you have unity gain. Then depending on the value of the universal shunt, you will have some gain which is 1+(feedback resistor/shunt resistor). If you want a specific impelementation for the universal shunt, I can provide a schematic using N channel fets.Also your op amps seem good for a gain of 6 (100uV max offset) but keep the OPAx188 (OPA2188 in your case) as a drop in replacement upgrade

author: OM222O
author_rank: Frequent Contributor
timestamp: June 10, 2019, 05:14:01 am
content: Actually I already have a universal shunt schematic with kelvin connections! See the attached picture.You can Ignore Q4-6 since they are for the sense connections and you don't need them here. The DMN3018SSD should be good enough, but if you need lower capacitance, consider the FDS6930B (again, drop in replacement). This should give you 6 orders of magnitude resistance which is more than good enough for my applications, but needless to say, you have to tune the values and the ranges of the resistors for the gain values you want. Good luck

author: David Hess
author_rank: Super Contributor
timestamp: June 10, 2019, 05:20:55 am
content: The tricky implementations of gain switching compensate for or are invariant of the series resistance of the switch.https://www.analog.com/media/en/training-seminars/tutorials/MT-072.pdf

author: Kleinstein
author_rank: Super Contributor
timestamp: June 10, 2019, 06:48:40 am
content: Quote from: nemail2 on June 09, 2019, 03:47:43 pmThe DAC8311 should not nit much more than 160 µA + the output current. The only point I see a 10 mA limit is for the output current it can deliver at some point. So the supply current should not be a problem. If heating of the reference is a problem one could consider a series resistor to drop some of the voltage. This can also work as a filter.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 10, 2019, 08:46:57 pm
content: Quote from: David Hess on June 10, 2019, 05:20:55 amThat is why I recommended different fets. Higher Rdsonmeans lower capacitance and better transients, etc. but can introduce some errors. Higher capacitance has the opposite effect, therefore it's a tradeoff. Anyhow if the resistors are chosen to be large enough, often the Rds is orders of magnitude better than the resistor tolerance itself, making it a non issue

author: nemail2
author_rank: Regular Contributor
timestamp: June 10, 2019, 10:50:19 pm
content: Ok, so this is what I've come up with now.i hope the digital traffic on the SPI and I2C lines won't spread to much into the analog circuitry, I've put ferrite beads in between every ADC and DAC supply line (L5, L6, L8) and I have followed datasheet instruction on bypassing and filter caps as well as I tried to follow layout recommendations.I don't like the wasted space above the ENC pin header but I'd have to rearrange like EVERYTHING to get rid of that. Alternative would be to move the whole left part (from IC5 to the two DACs down but that would increase the trace length for current measurement (the shunt is a bit above IC13).So basically I'm planning to go with the 4.096V voltage reference (REF5040) and with 2x DAC8311 at a fixed gain of 4 (which is even less than I have now: 6!) which will give me (nearly) zero to 16.384V output in 1mV steps.Any objections or hints from anyone?

author: OM222O
author_rank: Frequent Contributor
timestamp: June 11, 2019, 04:53:03 am
content: The parts choices seem reasonableBut that layout thoughno offense but it seems very willy nilly without any rhyme or reason. Usually the layout follows the schematic, i.e. you have sections that do specific things, rather than just running traces all over the shop. What software are you using for the pcb design? If it's easy eda I can help you clean it up. Otherwise I can upload some pictures as hints. It would be beet to seperate your analog and digital supplies btw. LDOs are so cheap these days that there isn't an excuse for not doing so. You also won't need the ferrite beeds if you have a clean supply to start with

author: David Hess
author_rank: Super Contributor
timestamp: June 11, 2019, 08:38:04 pm
content: Quote from: OM222O on June 10, 2019, 08:46:57 pmI am just point out that with a slightly different circuit configuration, FET resistance becomes irrelevant because only the operational amplfier's input bias current passes through it. Now JFETs or integrated CMOS multiplexers can be used without consideration of series resistance.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 11, 2019, 09:33:59 pm
content: Interesting ... Can you please provide a schematic for that configuration? So far I have only came across the example which I provided

author: David Hess
author_rank: Super Contributor
timestamp: June 12, 2019, 09:01:48 pm
content: Quote from: OM222O on June 11, 2019, 09:33:59 pmFigure 7 on PDF page 5 of the document I linked as shown below shows the basic idea:https://www.analog.com/media/en/training-seminars/tutorials/MT-072.pdfNote that separate dividers in parallel with the output could also be used instead of one stacked divider. Input resistance matching to remove the contribution of input bias current to input offset voltage can be done by adding a compensating resistance in series with each switch if necessary; the AD797 shown uses input bias current cancellation so this was not shown here but it might be done with a 741 or 324. A low input bias current part would not require this either.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 12, 2019, 09:43:12 pm
content: Sorry but I can't see how this is different from the schematic that I provided. All the drains are commoned and will go to the inverting input (R+ net), the gates are the "TTL gain control" and each source goes to one resistor in the chain. My idea used a fixed resistor in the feedback path as well, but now that I've seen that diagram, I realized it was just an extra part and you could remove it alltogetherplease correct me if I'm wrong and the diagram in AD app notes is different from my schematic.Edit: in hindsight I only provided the schematic for the range switching and not the entire circuit as I didn't have time and that schematic was already abailable to me quickly. Maybe that's where the confusion comes from. If so, my bad and I will create full schematics for the specific implementation rather than using words to describe it from now on

author: nemail2
author_rank: Regular Contributor
timestamp: June 13, 2019, 08:04:34 am
content: Hisorry I'm on vacation currently with (gladly) limited access to a PC and writing stuff on the phone is just... meeeeeeeeeeeeehQuote from: OM222O on June 11, 2019, 04:53:03 amI appreciate your feedback and I knew that the layout is not ideal. I wasn't aware that it is THAT horrible, thoughThe lower part is digital stuff, display, MCU power supply, relais switching, pwm fan control, etc.Then there are big fat power traces for the series pass elements and to the output connectors and in between from left to right) there is the current measurement circuitry, the CC/CV opamp control loop and the onboard voltage measurement as well as the external voltage sense resistors.I do have quite many LDOs and Vregs on the board, especially in the analog part I didn't go tight and did rather put in another LDO than going all over the board with a trace.when crossing traces, I tried to only do it in 90 degrees and I tried to separate digital and analog stuff as much as possible and I tried to keep traces as short as possible, especially for the critical (analog) parts.So.. I thought it was halfway decent but appearently notso I'll gladly take any advice on how to optimize the layout. I don't really know what to optimize there, apart from relayouting everything. However if I'd do that, it might end up worse than it is now. Or quite the same

author: OM222O
author_rank: Frequent Contributor
timestamp: June 13, 2019, 09:53:28 am
content: Quote from: nemail2 on June 13, 2019, 08:04:34 amI can see your point about the traces being 90 degrees to each other, but that's not how it worksit's never that simple in electronicsIt has more to do with loop area, rather than overlap of the traces themselves, although this will reduce the coupled noise, it's not as effective as you thinkI will do some layout examples on how to properly segment the board into blocks and how to separate the signals / grounds properly.

author: OM222O
author_rank: Frequent Contributor
timestamp: June 13, 2019, 01:08:14 pm
content: here is a very basic schematic and layout, just to get the point across (didn't spend too much time on cleanliness, but it's still not too shabby):https://easyeda.com/theepicn008/layout-exampleThinks to note:I didn't use a proper MCU breakout board. just 2 4-pin headers as an approximation. use the proper teensy breakout pinsI went with a linear regulator since it was easier to draw than the switch mode one you have. again this isn't a major point hereVCC is a thick track running at the bottom. this is the voltage input to everythingas you can see, the digital and analog traces are completely seperate: digital stuff on the left and analog stuff on the right. if you draw a line in the middle of the board, you can see the DAC and ADC both have the digital IO on one half, and the analog IO on the other half. this way you can have a solid ground plane, but it acts like 2 ground planes (analog and digital) joined only under the chips that are both analog and digital. if you want to be extra sure,separate AVDD and DVDD on the ADS1219 (i.e. connect 3.3V to reset and DVDD lines rather than 5V to both).Also you can see the "blocks". top right corner is the linear regulator section, to its left are the mixed signal chips (DAC and ADC), under those there is the reference voltage (layout copied from T.I datasheet with minimal routing changes), the two LDOs and their caps, and the digital stuff on the very left. I hope this helped you clean up your board a bit. I used too large of a package (1206) which makes things look less neat, but I think yours were 0603 so you should be fine in that regard. just keep the layout like the schematic (i.e. in blocks) and be careful of the mixed signal chips. that should be it. just make sure you have the switching regulator on the digital side, not the analog

author: nemail2
author_rank: Regular Contributor
timestamp: June 15, 2019, 11:21:29 pm
content: HiThanks for drawing that example. However I'm still not sure how I should do this with my design.I mean, I have this already:- digital and analog traces are separated, only the SPI and I2C lines necessary for the DAC and ADC go to the analog part of the board (lower part is digital, upper part is analog)- current return paths should be reasonably short everywhere- ground planes are split and star grounded, teensy 3.5 has a ferrite bead which connects the AGND pin (which is connected to the analog part of my board) to the GND pin (which is connected to the digital part of my board)- all traces as short as possible or at least reasonably short, at least for the analog part- all power supply traces are big ass- separate LDOs and VREGs for digital and analog circuitry- no switching regulators on the analog sidei admit, what's not ideal in my opinion or rather say what i really think to understand whats not ideal:- I2C traces are quite long- SPI are as well, as I need SPI for the DACs and for the Display as well, which is on the opposite side of the teensy board on the digital side and the DAC is obviously on the analog side- power supply traces (27V and 15V) are quite long because i just need them in totally different sections of the board- NTC trace (TH0) goes from the TIP3055 footprint all the way down to an analog input of the teensy 3.5 -> quite long trace as wellfor none of these issues I have a solution. I have simply no idea on how to solve those issues - the board is quite large and a bit complex as well (at least for a beginner like me) and many things are already tightly packed and I simply do not know how to make the layout better.even if I'd relayout everything, I'm pretty sure I'd end up in a similar layout (if not worse) like I have now.Of course I don't expect you to do my project for me but I'd be really curious how you would layout this design. I just can't see how your clean but simple example layout could scale to a design like mine and still stay as clean as yours is. At least not if I'd do the layout.I have done some more cleanup and a bit of relayouting to reduce the size of the board and make some traces shorter and I have updated the github repository with the lastest version:https://github.com/mamama1/LabPSU_Darlington/raw/master/preview.PNG