Passing radiated EMC with an SMPS involves an element of luck...agreed? - Page 1
Forum section: electronics / general

author: ocset
author_rank: Super Contributor
timestamp: August 17, 2019, 10:47:18 pm
content: I once worked with one of the UK’s finest SMPS design engineers. They were working for the same company as myself at the time. They had already designed many of the SMPS PSU’s as used by the British military.They once were talking about trying to get SMPS’s through radiated EMC without the SMPS being in a metal case, and without any metal shielding being used around the PSU or its components, whatsoever…..….In relation to this, this excellent designer said to me…..if you have designed an (non metal enclosed) SMPS and it has passed conducted EMC, and it has been layed out as good as it possibly can be using EMC layout rules (eg keep power switch current loops as minimal in area as possible etc etc)……and supposing this SMPS fails on radiated emissions…..then there are no exact calculations that you can do to get it to pass radiated EMC…..but rather, one simply has to “sprinkle” in ferrite beads and common mode chokes, and Y capacitors, and cable ferrites like “currents in a cake”, until you get a pass.Please discuss if you agree with this?Passing radiated EMC for an SMPS when one has a metal casing is far , far easier, of course, but thats not what they were talking about.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 18, 2019, 02:18:54 am
content: We should be eternally grateful to work in a field whereevery single last thingcan be modeled, emulated or solved, without having to touch a single tool.There are no guesses here. There can only be a lack of knowledge.Anyone who insists that it is a required design step, to perform physical testing, and that luck is involved: they are admitting their ignorance.Now, it often is the case that, for a variety of reasons, an engineer is unable to attain full knowledge of a system, and therefore must make assumptions, guesses, and perform experiments. One must understand that this is not a strictly necessary route, and these steps are more as exceptions that we make for various reasons (insufficient time or budget to study or model the system; insufficient working knowledge; insufficient time/budget to pursue the education to obtain that working knowledge; etc.).It's a practical problem, not a theoretical one.A very good engineer might go her entire career without having undertaken such a project -- that is, one with knowledge so comprehensive as to be practically complete -- but this is only statistical evidence, and not proof!Conversely, a less skilled engineer might go his whole career assuming that such processes are necessary, and never taking up the education (or making the realization) that there are other ways to do it.Mind, it's not that one or the other approach is necessarily superior. Perfectly merchantable products can be made either way. It's perhaps interesting to consider the ways in which the two approaches might fail. For example, the low-level method might be fragile under variation in parts value (something of a liability for long-term products, as parts age in use, or as substitutes parts are put into production over the years), whereas the high level method might get all the basics right, but have a structural quirk that makes the design unexpectedly difficult to evolve over time, as the customer's requirements or production needs change (e.g., using just the perfect part, and then the requirement changes just outside its capability; or it's from Maxim and they discontinue it, amirite?). Either way, if the absolute best results are demanded, one should allow for multiple cycles of refinement.So, in regards to EMC, we can -- at least in principle -- model everything perfectly, make just a few component changes, and have high confidence in passing tests the first time. We don't need to rely on luck in the physical test, but we might have no reasonable alternative due to the amount of effort required to create such a simulation (namely, ca. $6-figures for the EM simulator, plus some months setting up the model).(Note that the argument applies recursively, so that a more talented engineer might change just a few values in the simulation and be done, whereas the other may make hundreds of relatively undirected changes. Simulations are just virtual testing procedures, after all. Or in the meta, so that ones' level of knowledge might be approached in a comprehensive way, or through scattered experience.)(Note also that this is not an endorsement of "CAD jockey" design. If one can reach a level of practical experience from their armchair, by all means do, but do not leave it unchecked against reality. Many will need lots of hours in the lab to reach a functional level; most prople, I suppose, will never reach it at all. (That is, a lot of people don't care for engineering at all, or tried and didn't turn out to be any good at it.))Tl;dr: disagree.Tim

author: ocset
author_rank: Super Contributor
timestamp: August 18, 2019, 11:11:56 am
content: Thanks, on a related topic, all the places where I have worked where they have designed offline flybacks in plastic cases, did not pass radiated EMC to EN55032 class B unless cable ferrites were used in the supply cable. As you know, unfortunately, having a supply cable with a cable ferrite on it is a lot more expensive than just a supply cable.These companies still sold the product because it passed conducted EMC, and they declared that they were “working on” a pass for the radiated EMC.In fact, I think many would agree, that it is not possible to pass radiated emissions to “EN55032 class B “ with a hard-switched SMPS unless one encloses the SMPS in a metal enclosure, or encloses at least the switching node in a “metal can”, or uses a cable ferrite in the supply cable.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 18, 2019, 05:47:05 pm
content: It's possible to pass any arbitrary level with suitable construction, not necessarily needing explicit shields as such. Those are just easier.Tim

author: MagicSmoker
author_rank: Super Contributor
timestamp: August 19, 2019, 04:10:07 pm
content: Paraphrasing - if not echoing - what Tim just wrote, it is often most cost-effective to build a prototype and do pre-compliance testing on it in-house. It may be theoretically possible to fully model an SMPS but the expense of the software and the time it takes to both become proficient in it as well as characterize every last aspect of the design, typically render this option impractical for all but the highest volume products, where saving a few cents (to dollars, even) per unit will be worth the effort.I typically design very high power converters for niche markets and rarely have to contend with consumer product EMC testing, but some of the things I have designed over the years ended up needing to go through some form of EMC testing as regulations (or the enforcement thereof) changed over time and they usually made it through on the first try, with only one thing in recent memory needing any kind of remediation (adding common mode chokes to internal cables and shielding a terminal block - rather kludgy stuff, but cheaper than a full redesign, especially since product volume was in the 10s per year).Passing consumer EMC testing on the first spin of a product design is usually pretty easy once you have experienced the process yourself. It tends to present one with an enormously steep learning curve on the first go, however.

author: f4eru
author_rank: Super Contributor
timestamp: August 19, 2019, 11:29:56 pm
content: I concur with most of the statements here, but :QuoteYes and no.Usually, you find the source of the noise, and treat directly at the source. That works best and more reliably to keep HF/VHF at bay.Treating somewhere down the line (like at I/O cables, with chokes near cables) is not always best, because the impedances of I/O cables at VHF freqs. vary much more than the ones on the drain of a switching FET.

author: ogden
author_rank: Super Contributor
timestamp: August 20, 2019, 12:12:13 am
content: Quote from: treez on August 17, 2019, 10:47:18 pmDisagree as well. Most likely he was trolling you. Even oldskool SMPS engineer understands how to find source of the EMC problem and how to fight it. Meaning he do not "sprinkle" components but change/add them where needed.

author: JohnG
author_rank: Frequent Contributor
timestamp: August 29, 2019, 02:32:38 pm
content: In practice, for anything other than the simplest designs, it is practically impossible to model everything, although purveyors of multi-physics FE software will try to tell you otherwise.Believe it or not, even jellybeans like X7R MLC caps exhibit behavior for which the behavior is not totally understood. That doesn't mean it can't be understood, but rather that it's hard do justify spending a lot of time and effort on a $0.001 part, even if you sell 10^9 of them every year. It makes more sense for the manufacturer to spend the money to use cheaper plastic in the tape and reel packaging to make the part cost $0.0009. Don't even get me started on magnetic core material or insulation thickness...Given the above, there is always something you didn't or couldn't model in the time frame of the design, and so there is some chance that something important was missed. That being said, if you know your physics and have enough experience, you make the design to minimize the chance of problems, and to quickly find and fix the ones you missed.In one sense, there is always noise in any system (except at 0K, maybe??), i.e. random variables you cannot completely control or know. One could call that luck.Cheers,John

author: temperance
author_rank: Super Contributor
timestamp: September 04, 2019, 09:07:37 pm
content: Hi, can you elaborate on how you would create a radiated emission model?Thank you

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 04, 2019, 10:51:45 pm
content: Quote from: temperance on September 04, 2019, 09:07:37 pmThe full case would be a multiphysics simulator, where you start with a SPICE model of the circuit in question, derive a model of the PCB parasitics, and then run a simulation of the circuit with correct parasitics and couple that to an EM field model of the board and cables within its enclosure, and so on.Needless to say, multiphysics simulators aren't cheap (~6 digits USD). But it is, as far as I know, an eminently tractable problem.A much more accessible example might be: approximating the enclosure, cables and parasitics through hand-waved estimations of common and differential mode impedances and couplings, and finding, for example, the attenuation from main switching nodes, to cable. Then put in the spectrum of the switching waveform at those nodes, and there you go. Essentially this would actually get you the conducted emissions, and you'd need to make further assumptions about how much that might radiate, or to model the cabling further; if nothing else, you can very roughly assume the worst case, that everything that conducts out the cables, is radiated. You should be able to do a very conservative design in this way, ensuring that you have ample margin in the simulation to account for errors in estimates of impedances or couplings.Neither option is particularly simple or easy, but that's to be expected. These are complicated structures. The best we can hope for is to crank-crank-crank the numbers and see what comes out.Tim

author: temperance
author_rank: Super Contributor
timestamp: September 05, 2019, 07:15:47 pm
content: Hi Tim, thanks for your reply.The "estimate the impedance game" is what I'm doing. It works well but at times you can be stuck.People often seem to think that the switching node is the most "dangerous" of them all. (Maybe in terms of deadly) When done properly, the switching node isn't that dangerous. But it requires hours of moving components around until the best solution has been found with the least stray capacitance to earth and the shortest current loops (proper decoupling). The most dangerous node is secondary common where primary DM signals come out as CM signals. That's not such a big deal when everything it connects to will be contained within and enclosure and the strcuture can be considered "small" (even a plastic case containing a +300W supply can pass radiated emission tests without cables attached). The problem starts when cables will be attached to the equipment. (you often don't know what's on the other end)Ruling out the primary structure as a contributor to radiated emission when designed properly reduces the problem to a CM source with cables attached. Something like that might be easier to simulate.Regards

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 05, 2019, 07:39:48 pm
content: Yup -- when you have to work within constraints of how much time and money you can spend actually optimizing and testing a layout, you have to choose a layout that is very likely to work without all that testing.Again, the matter of tightly versus loosely coupled problems: in physics, tightly coupled systems are the most difficult to analyze, and make up many of the biggest current problems in the state of fundamental physics today. If we can make our E&M design loosely coupled -- by keeping current loops compact and well shielded -- we have a much easier time estimating or calculating results, without having to resort to full multiphysics simulations.Regarding the switching node, the node itself is pretty important, yes -- it's the loudest part. But notice I didn't concentrate just on it -- the entire system, from those sources, to the cable or antenna, matters. We can stop that noise at any point, with a suitable shield and filter; the challenge is to do it within the constraints of the project, say if we are limited to a plastic enclosure, or 2-layer board, or some size or cost target, etc.So, the DM-CM conversion of the transformer (if applicable) matters; or of the supply or grounding network; coupling from transistors or diodes in layout or heatsinking; etc.Also, of course, all sources matter, so one should not overlook for example, diodes as switching nodes. Recovery noise can be significant, or if not recovery per se then the pseudo-recovery waveform that a schottky diode or MOSFET's nonlinear capacitance generates.Tim

author: IanB
author_rank: Super Contributor
timestamp: September 05, 2019, 07:48:48 pm
content: An actual, physical prototype is surely the most accurate simulation of the design you can obtain? So why not put the prototype in the laboratory, measure its emissions and other properties, and then test modifications to achieve the required outcome? An experienced engineer will surely have a very good idea about what kinds of changes to make and where to make them in order to improve the metrics of interest?

author: temperance
author_rank: Super Contributor
timestamp: September 05, 2019, 08:20:13 pm
content: Taking a proto-type to a test lab is very expensive and you want to tackle problems before taking measurements. From that point, a simulator can be a very interesting. I thought for a moment that you wanted to model the complete assembly with some black magic.But there other problems. Take for example a kitchen device which you take in your hand, a soup mixer perhaps, containing nothing more than a brushed motor and a switch. A seemingly simple device until you have to deal with it's radiated noise because of the stray capacitance between the motor and the person holding it. Or complete machines full of motors, drivers, power supplies, PLC's,... I start to notice that companies involved in such things are sometimes taking draconic measure and wrong decisions because they have an EMC expert who said so.

author: temperance
author_rank: Super Contributor
timestamp: September 05, 2019, 09:34:07 pm
content: I don't know what kind of answers Treez is expecting to get from such a question.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 05, 2019, 10:56:49 pm
content: Exactly -- if you, as the project or engineering manager, have a $100k budget, is it better to spend it on five (and that's being generous) proto spins and trips to the lab? Or one simulator with no incremental cost for iterations? (Just the labor cost of the engineers using it; but you're paying them either way; give or take hiring a specialist to make better use of it, perhaps.)If you have a tightly coupled system, and your only recourse is to modify and iterate, the advantage is clear!Why you have a tightly coupled system in the first place, is probably a better question, but it may not be one you want to ask.Which brings to mind, there's the sunk cost fallacy: it may seem like you've spent $100k already, say, developing a new product over a year or several. Why are you going to spend $100k on something that's almost done?Or, downside, maybe your engineers have been stringing you along, always showing some kind of progress, but you're still a long way from product release. The progress doesn't make it seem worth spending another $100k on some fancy tool or consultant to clear the final hurdles. Or to tell the team to scrap their work and start over, to some extent or another. That's one path leading to development hell: progress remains incremental, yet never quite enough for release.Or, again, pushing the extreme limits of size or cost, may be a reasonable justification for the complexity, and the simulator is a big help.Big quantity items, like automotive, are a good application for this -- the size is somewhat restrictive, the tests are stringent, the lifetime reasonably long, and electronic prototypes may not be so expensive, but testing is (all the mechanical prototypes will however be a big cost; 3D printing helps a lot). The big quantity (millions/yr) means engineering (NRE) amortizes easily.Tim

author: OwO
author_rank: Super Contributor
timestamp: September 06, 2019, 04:12:55 am
content: OK no. I haven't encountered any product design (consumer or industrial) where doing EMC with expensive multiphysics modelling software makes financial sense. A prototype costs on the order of $100. The labor afterwards to diagnose EMC costs ~$100 (2 hours @ $50/hour). The equipment to do so costs <$1000. (You don't need an anechoic chamber. Just using some antennas/probes near the prototypes will give better indications of EMC pass/fail than a simulation.) Given that, $100k in modelling software would take 500 prototypes to amortize if it amortizes at all. If it takes more than a day of an engineer's time to set up models then it does not amortize at all. In practice testing with the physical prototype is much more productive because you can play around with it and see the spectrum in realtime. In most cases the engineer's time makes up the bulk of the costs of development (prototype costs are insignificant) so doing it physical makes sense.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 06, 2019, 10:53:31 am
content: Also note I'm using US pricing, not CN. $5k is entry level for enterprise level protos over here.Tim

author: temperance
author_rank: Super Contributor
timestamp: September 07, 2019, 10:06:20 am
content: Some interesting stuff for those who think simulations are not a viable tool:https://interferencetechnology.com/simulation-in-emc/Take a look at the aircraft lightning strike simulation.And something to read about the bandwidth of lightning strikes:https://pdfs.semanticscholar.org/d667/d941fb781ef0cff68ae62bee8be3f52a1193.pdf

author: filssavi
author_rank: Frequent Contributor
timestamp: September 07, 2019, 11:23:23 am
content: Quote from: T3sl4co1l on September 06, 2019, 10:53:31 amEven with US pricing, I’m fairly convinced that emi simulations make sense only for cutting edge research type stuff, and even there it is probably fairly project dependent especially for power electronicsFirst of all the FEM simulator is just the tip of the iceberg, there are several other problems:-you also need someone that knows how to use it well (and there are relatively few peoples on the market with such a skill set, and for and engineer to pick it up to proficient level it takes few years)-a support contract for the software is also almost mandatory(especially for the cheap softwares) the documentation and error messages are purposefully bad (instead of the upfront purchase they make money on the ancillary stuff afterwards)- material scientists and related equipment for material characterisation as most of the magnetics and dielectrics materials are very very sparsely characterised as only the barest minimum of the material properties are put on data sheets ( either because it is classified as sensitive/IP or more likely because not even the manufacturer has bothered to do it). And this step is of utter importance as a FEM simulator results are only as good as the material definitions are-the ECAD/Fem simulator interface is usually quite bad and it takes a lot of time to move the geometry from one to the otherGiven all of this it is understandable why almost nobody makes use of simulations in this fieldContrast this with ASIC flows where everything is simulated multiple times...-everyone is trained on simulators as it is really not possible to do otherwise-the processes and materials are extremely well characterised, foundries provide extensive PDK where all second and third order effects are extremely well studied-as long as you stay with one vendor it is not that bad to move between tools

author: Rerouter
author_rank: Super Contributor
timestamp: September 07, 2019, 11:35:13 am
content: Most of the simulators seem to mainly be optimized 2D and 3D vector field plotting tools, Is there some special sauce that means it could not be open sourced if one was to say they don't care about simulation time?

author: MagicSmoker
author_rank: Super Contributor
timestamp: September 07, 2019, 11:51:10 am
content: Quote from: temperance on September 07, 2019, 10:06:20 amLike anything else whether a tool is viable or not depends on how much it costs up front, how much time it takes to learn how to use it, how much time it takes to input all necessary data to get useful output, vs. how many development/prototype cycles it can eliminate by preemptively identifying compliance issues.It has been my observation - not experience, since I can't afford such software as a one-man-band - that software like this is never worth the overall expense unless product volumes are very high and development schedules are very tight. Perhaps the only industry segment which qualifies is automotive; everywhere else it seems to be a tremendous drag on productivity, rather than an enhancement.

author: coppice
author_rank: Super Contributor
timestamp: September 07, 2019, 12:03:33 pm
content: Quote from: OwO on September 06, 2019, 04:12:55 amIterating designs causes a lot of lost opportunity costs, and usually results in a design that only just about passes the tests, after adding some bits to it. Using simulations usually identifies both a whole lot of weaknesses, and reasonable ways to address them with zero or less than zero addition to the BOM. You might get a 4 layer design down to 2 layers. You might get a few components out of the design. Over a decent sized production run the simulation stuff can more than pay for itself.The finest geometry processes usually start off being used for complex parts, on multilayer boards, with lots of resources put into making the board very stable in operation. As they get used for things like simple MCUs, replacing older large geometry MCUs, engineers find it much harder to achieve a stable design with the kinds of simple 1 or 2 layer boards they are used to. After serious problems with many of the earlier iterations of fine geometry low complexity parts, semiconductor makers are putting more effort into trying to make their fine geometry parts more inherently stable. However, they still need a cleaner noise environment in which to operate than most large geometry parts. I've seen lots of designs going round in circles for months, increasing in cost and complexity, trying to pass the tests. If someone bites the bullet and tries simulation they typically clear up their problems, with a low cost BOM, much faster. If you are starting out with simulation its probably best to try working with experts initially. Otherwise the learning curve might hold you back.

author: JohnG
author_rank: Frequent Contributor
timestamp: September 07, 2019, 02:25:44 pm
content: Quote from: filssavi on September 07, 2019, 11:23:23 amMod up!This kind of simulation makes sense for very high volume (e.g. phones), very large and costly equipment (e.g. MRI scanners, airplanes), safety-critical applications (e.g. airplanes), and military applications which may have out of the ordinary needs. I believe the OP was talking about such an application.It also can make sense for small, simplified problems where you cannot measure something because the tools don't exist or they disturb the system you are trying to understand (e.g. power module internal mutual inductance, RF connector to trace impedance, antenna design).I love simulation, by the way. It can be a huge time-saver and life-saver. I mostly use Spice, and I have done a little 2D and 3D simulation. Enough to know that good FEM engineers are valuable, not that common, and cost as much as good FEM software. By good, I mean ones who can and have solved real-world problems for real hardware that actually worked in the end, and did it in a short enough time to matter.Cheers,John

author: max_torque
author_rank: Super Contributor
timestamp: September 08, 2019, 12:33:29 pm
content: For me, the design on if a model is worth more than a prototype simply comes down to the future use of the model!For a one off, there is little point in designing, and then validating the model, you may as well spend the time on the real, singular product.But if you plan to do it all again, then a validated model becomes valuable, because at that point, it can short cut the physical development route.So, if you're doing a one off SMPS for a product, and you're unlike to do another in the near future, and you're mainly concerned with getting your whole product approved and to production, no, a model based approach is probably a waste of time and resource that could be better spent on real hardware. But if you're a company that makes SMPS as your product, then yes, developing a validated parametric model for SMPS is really rather valuable, across far more than just EMC testing!

author: SteveyG
author_rank: Unknown
timestamp: September 09, 2019, 11:47:08 am
content: Quote from: OwO on September 06, 2019, 04:12:55 amSame. Modelling would be an ideal, but in practice it never happens anywhere near to the level being suggested. There would simply be too much of a significant investment in time to get anywhere close to modelling an entire SMPSU design and even then, it would not be particularly accurate.My experience would be that you create the design with EMC in mind in the first place, model any specifics, but then test and evaluate. Every main supplier power supply company that I know of has their own EMC chamber, but if not, you can usually spend a day in a local EMC test house for only £500 to £1000.

author: SteveyG
author_rank: Unknown
timestamp: September 09, 2019, 11:48:28 am
content: Quote from: JohnG on September 07, 2019, 02:25:44 pmI can guarantee you it doesn't happen for MRI scanners. Don't know about aerospace though.

author: TimNJ
author_rank: Super Contributor
timestamp: September 11, 2019, 05:37:15 pm
content: From my perspective on the consumer/medical SMPS industry, FEM is basically never used. (Never heard of anyone actually using FEM, other than in a random app note from Infineon, etc.) I think the barrier to entry is still way too high to make any sense for a "normal" engineer (like me) to try making use of FEM software.However, I think it could still be useful from a purely educational perspective, if engineers could visualize how certain layout/construction geometries might affect their design...Maybe not useful to try to modeleverynew project with FEM, but rather using FEM as a tool to understand how fields/wavesmightinteract in that new design. Something to fiddle with, change parameters, and observe..Is there any reasonable open-source or low-cost modeling software that isn't completely impossible to use? It would be interesting to try out, just to see learn how different electrical and spatial configurations might affect a design...

author: MagicSmoker
author_rank: Super Contributor
timestamp: September 11, 2019, 07:02:54 pm
content: Quote from: TimNJ on September 11, 2019, 05:37:15 pmYep, and this has been my perspective from the industrial / heavy transportation side of things. Coincidentally, I'm doing a job right now for a company that is staffed almost entirely with PhDs who just love to model stuff and were asking if they should invest in FEM software. Rather than flat out tell them no, I instead asked how closely their current design resembles their SPICE model? I got nothing but crickets in response...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 11, 2019, 09:10:22 pm
content: Quote from: MagicSmoker on September 11, 2019, 07:02:54 pmWell, such a scenario implies ignorance onsomeone'spart.A SPICE model is rarely a full design, and need not resemble the part it's modeling, for a given definition of semblance and degree of model accuracy. It's simply the wrong question to ask.Conversely: a useful model needs to reflect the characteristics, dynamics, whatever of the problem at hand, and of the space around the problem. Models might also be used as much to disprove alternatives, as to prove a preferred embodiment, in which case the resemblance is supposed to be slight!So there may be two reasons why you got blank stares.Tim

author: MagicSmoker
author_rank: Super Contributor
timestamp: September 12, 2019, 04:57:46 pm
content: Quote from: T3sl4co1l on September 11, 2019, 09:10:22 pmThat's a bit harsh, and perhaps a bit disconnected from reality, too. In an ideal world all FE and SPICE software would be easy to learn, highly accurate, and execute simulations in reasonable times without requiring state-of-the-art desktop PCs to run it. In the real world, FE and (to a lesser extent) SPICE software is exceptionally difficult to use, buggy or quirky, has little to no ability to warn you when you are performing a GIGO simulation (that is, Garbage In, Garbage Out), relies on algorithmic shortcuts that may compromise accuracy in the name of expediency, and is so demanding of CPU cycles and memory bandwidth that it cripples the computer it is being run on for minutes (SPICE) to hours (FE) at a time.A great example is modeling a transformer in LTSpice. At the simplest/least-accurate level you need only specify a coupling coefficient, K, for two or more inductors, and if K=1 then LTSpice will execute a simulation extremely quickly. At the next level of accuracy you can approximate leakage by setting K<1; this dramatically increases the computational effort but starts to show real world behavior like ringing and spikes during switch turn-off, limited short-circuit current and voltage transformation errors, etc. You can then specify the parallel capacitance across each "inductor" which improves the accuracy of losses and common mode noise coupling, at yet another dramatic increase in simulation time. Finally, you can switch to the non-linear Chan model to incorporate the behavior of the core at, once again, a hefty penalty in simulation time. In the end a simulation that took a few 10s of milliseconds to run now takes 10s of minutes, and it still won't generate waveforms that look exactly like what the actual prototype delivers, so there goes your EMC analysis.Quote from: T3sl4co1l on September 11, 2019, 09:10:22 pmThe implication was that the performance of the actual device (a resonant mode transformer) was quite a bit different from the model they created in the pricey SPICE software they use (NB - I recreated the model in LTSpice and it came much closer); contemplating just how much more different an FE model of a complete product might behave compared to the actual product proved sobering, hence the lack of a comment in response to my rhetorical question.And these people aren't stupid, or even ignorant. The overall circuit is a real work of art, it's just they pushed everything harder than they should have, had to radically change the overall circuit midway through once a regulatory issue was clarified, and haven't much (any) experience with designing a commercial product (rather than a prototype for an IEEE paper), much less for manufacturability.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 12, 2019, 05:26:05 pm
content: Quote from: MagicSmoker on September 12, 2019, 04:57:46 pmIf you're getting orders-of-magnitude increases in simulation time, something is very wrong! Those options are increasing the element count by one, three and about a dozen, respectively.To get waveforms "exactly like ... the prototype" you'd likely have to run FEA on the layout itself; you're also depending on the manufacturer device models, which vary from stock SPICE (e.g. a LEVEL=3 MOSFET with nonlinear capacitors and parasitics added on) to full-on custom (2-3 pages solid of nonlinear dependent sources and their functions). The former runs fast and converges well but misses subtle physics of the real device; the latter runs terribly slow on board-level simulators, and may suffer from convergence issues, especially in buggy simulators (possibly the enterprise-level ones do better, or at least take better advantage of more powerful hardware).It can be worthwhile to avoid the latter type of model, just for being able to run enough simulations, and tweaking the models or results accordingly.QuoteTaking the statement at face value, it's believable, but has the issues I identified. Now that you've identified the particular case, I can see it is indeed on the realistic side.QuoteYep, that's a problem for anyone new to a given field or sub-field: you simply don't have experience in the particulars. Doesn't matter how smart or educated you are; if you don't have that exact experience, you simply don't. Ignorance isn't a bad thing, it's just a thing. You can't fixstupid, as they say, but ignorance is easily treated through research and practice.A good approach would be to do an introductory project or two, to feel out the new space Then to dive into the big project, being able to optimize everything much more evenly, not just the core-domain parts. Sometimes that may not be possible due to tight schedules; then again, it could well be a time saver yet, even if not to the immediate deadline, but to avoid inevitable production delays later on.Tim

author: MagicSmoker
author_rank: Super Contributor
timestamp: September 12, 2019, 10:04:52 pm
content: Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmNot at all - making k<1 or specifying meaningful parallel capacitance results in high frequency ringing which drastically increases the amount of data generated and (should) force the simulator to reduce the time step size. That said, I did fail to mention that one has to actually tell LTSpice to limit the size of the time step when incorporating real strays otherwise it might just skip right over the oscillations caused by them completely.Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmYep, but that's what most of here are arguing isn't worth the effort!? I was just using SPICE simulation of the circuit to extrapolate the immense increase in difficulty required to do an FE analysis of the entire assembly for EMC (that is the subject of this thread, after all...)Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmYep, we're on the same page here. Experience, knowledge and good judgement (oh, and time) inform when to do the quick-n-dirty sim vs. when to use the full blown subckt/inline models for every component, etc. The thing is, for circuit simulation you can often do the quick-n-dirty for most of the development process and only switch to using the device-specific models when fine-tuning things, but for EMC simulation you need to specify Every Fucking Thing or doing it is pointless.Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmSorry for being circumspect but NDAs and all that. I can't even mention the specific topology without giving away what the thing is since the author of the IEEE paper on it is the lead engineer at the company.At any rate, yes, the problem is, indeed, incomplete knowledge of all the salient - if not the passingly relevant - details involved. But like I said above, that's not necessarily fatal when doing a SPICE simulation of a circuit, but invariably fatal when doing an FE analysis for EMC.Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmRight... you meant literal ignorance - a simple lack of knowledge - rather than the altogether more pejorative meaning commonly ascribed to it today. We're in total agreement there, then. I still maintain that FEA (or FEM - whether you prefer the last letter stand for Analysis or Modeling) is economically unattractive most of the time. I mean, have you actually used (or tried to use) SABER or ANSYS (for two examples I've had the displeasure of being tortured with before)? Those programs just have the most brutal learning curve of anything I have ever seen.Quote from: T3sl4co1l on September 12, 2019, 05:26:05 pmMmm... yep, I agree this is the best way to get up to speed with such FEA monstrosities, but in this case it is 2.5 years past the original estimate of taking 6 months to complete... But baptism-by-fire is the usual way things get done in small companies.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 12, 2019, 10:44:01 pm
content: Quote from: MagicSmoker on September 12, 2019, 10:04:52 pmOh, relative to a really big timestep where you don't get any of those details, sure.But that's trivially solved with a piecewise energy balance argument --http://schmidt-walter-schaltnetzteile.de/smps_e/smps_e.htmlfor example. If you're plugging everything into SPICE just to see what the gross waveforms are, you're using the wrong tool!This goes hand-in-hand with a number of other bad habits, implementing discontinuous functions for example, perhaps the worst of which is the IF() function. SPICE simply isn't made to solve such problems -- it requires real, finite derivatives of the provided functions -- so it quickly crumples under such a burden.Indeed, such a simple premise, you might as well run in Falstad circuit simulator -- its constant-timestep, first order integration doesn't much care how well-behaved the derivative is. But it's easily fooled (a small difference leading to exponential instability), so is of limited use.Some simulators handle this well; Simetrix I think is one? PSPICE apparently deals with it pretty well too, which unfortunately leads to zillions of mfg models being written for it, with TABLE functions. Gack.QuoteHeh yep, all too common unfortunately...Cheers!Tim

author: OwO
author_rank: Super Contributor
timestamp: September 13, 2019, 01:47:15 am
content: The other elephant in the room is that in a real design most chips simply don't have detailed enough models for EMC simulations to tell you anything meaningful. I was working on a board that required high isolation between sections up to 3GHz where it was experimentally determined that a PLL synthesizer chip had significant leakage of RF into the SPI control pins. The best models you can get for these kinds of parts are equivalent circuits for each pin individually and there is no way you can predict something like this. Since every leakage path matters you will get wrong results and be sad when the prototype performs like shit and nothing like the simulation.In practice the only time where board level EM simulations would have been useful for me is for signal integrity (e.g. DDR3/4). In that case you would only be simulating small parts of the board (just the DDR traces and the driver models). It is very rare that you would want or even be able to simulate an entire board.LTSpice and RFSim99 do pretty much everything I need in terms of simulation. I'm also looking into OpenEMS for antenna and signal integrity analysis. I won't be considering expensive EM software that do not and will not do what they claim to be able to do (with reasonable effort and computing power).

author: AndyC_772
author_rank: Super Contributor
timestamp: September 13, 2019, 09:39:20 am
content: Quote from: treez on August 18, 2019, 11:11:56 amA few years ago I carried out EMC testing on a product I'd designed for a customer. It needed to plug into a PC as support equipment, so I took my laptop.Fully expecting the worst, I plugged in the mains power brick, which was a 180W unit manufactured by FSP.That supply turned out to be exceptionally quiet, really impressively so.Since then I opened one up to take a look inside. The outer enclosure is sealed plastic, but inside there's a metallic layer which covers four sides (though not the ends, oddly). On the DC outlet side there's a ferrite bead moulded onto the cable, but on the mains side it's just an IEC socket with no external ferrite needed.Given the exceptional EMC performance, I can't call that a "bad" design. Far from it.FWIW the oddest place I think I've seen cable ferrites used is on the (wired) controllers for the Sony PlayStation. Still can't quite figure out how that was cheaper than fixing any EMC problems with internal filters instead.

author: EEEnthusiast
author_rank: Frequent Contributor
timestamp: September 13, 2019, 10:40:06 am
content: Quote from: OwO on September 13, 2019, 01:47:15 amI fully agree with this.. With increasing complex SOCs coming in the market with multiple RF cores and High Speed digital switching, it is almost impossible to get a model for the IC. So performing EM model to find out on the die or on the package coupling is exceedingly complex. We only go by best practices and tricks learnt over many years to keep out unwanted coupling.Modelling the entire system including the ICs, passives and other components with the PCB and mechanicals would be exceedingly complex job. Even with the perfect models made, running a simulation for a far field pattern on the system is the next difficult task. The amount of memory and computation needs for solving the maxwells equations for this, would be enormous.On my previous job, I had made some effort on this front by simplifying the geometries to reduce the meshing size. Then many components which may not carry high frequency currents were eliminated to simplify this further. With all these done, the design simulation on HFSS would take multiple hours, if not days. This is good enough to get a first level of understanding of the problem. But most solutions were arrived at by intuition and experience only.

author: JohnG
author_rank: Frequent Contributor
timestamp: September 18, 2019, 02:58:37 pm
content: Quote from: SteveyG on September 09, 2019, 11:48:28 amFor SMPS power supply, it would be unusual to do this for MRI to pass EMI regulations, but EMI susceptibility is a big concern. I know for a fact that it has been done for research on power electronics and effects on image quality. MRI development for sure makes extensive use of 3D FEM for electromagnetic and mechanical design.