PC USB Logic Analyzer - Who Has The Best Software? - Page 1
Forum section: electronics / projects

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 29, 2011, 09:14:42 am
content: please...1) suggest what USB LA brand has the best software?2) what feature in LA hardware and software that is critical, important and a must have for digital debugging?hope to hear some suggestion.update: this is usefull info i found for LA comparisonhttp://sigrok.sourceforge.net/wiki/Logic_Analyzer_Comparison

author: Balaur
author_rank: Unknown
timestamp: October 29, 2011, 09:48:05 am
content: Hello Shafri,I've never had the opportunity of interacting with USB LAs, but I'm using older Tek Windows-based LAs at work.There is a lot of very nice features in the GUI of those LAs that I'm sure you can easily find in recent USB offerings, however the outstanding feature that I really appreciate is the sophistication of the trigger system.You have a FSM-like trigger system with states and transitions that supports if/then clauses, events (signal/buses/words transitions), event counters, etc, that could accommodate fairly complex set-ups to allow the LA to trigger on the exact event you are looking for. Very nice system!However, for all this to work, you absolutely need hardware support that takes your triggering set-up and acts on it.Other commonly-used software features are:- channels naming (obviously)- making a bus from individual signals- describing signal states for an easy-to-understand name, color, etc in the waveform display- easy and fast scrolling - although that one is not happening yetImportant hardware features (in a professional settings, although a hobbyst will be happy with far less):- huge amount of channels (we are using up to 160 signals)- low channel-to-channel slew- per-channel user-defined thresholds for logic levelsCheers,Dan

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 29, 2011, 10:41:55 am
content: Quote from: Balaur on October 29, 2011, 09:48:05 amwow, i need a beginner tutorial on this esp on triggering system.Quote from: Balaur on October 29, 2011, 09:48:05 ami saw in youtube, the salae logic software, it got ipod/handphone style smooth scrolling.and another colorful GUI from usbee, quick read the manual, but it prove i'm clueless when it comes to triggering logic.http://www.usbee.comQuote from: Balaur on October 29, 2011, 09:48:05 amyes i'm currently looking for "bang for buck" USB LA. but since this is dependent on PC and USB, so software is equally important part just as the hardware i think. most USB LA can provide decent hobbiest level feature, but the kicker usually the "crappy" software.thanx Dan for suggestion.

author: Unknown
author_rank: Unknown
timestamp: October 29, 2011, 01:01:43 pm
content: The only affordable USB LA that supports this kind of advanced triggering is the OLS, although I'm not sure if the software support for it is finished. See the recent thread by 0xdeadbeef. All others have quite basic triggering I think, although the Intronix LogicPort might be slightly better, and Saleae have promised more advanced triggering sometime in the future.

author: Thomas
author_rank: Regular Contributor
timestamp: October 29, 2011, 05:19:28 pm
content: You can download and testdrive the LogicPort software:http://www.pctestinstruments.com/downloads.htmIt will run in Demo mode if no hardware is present. Then you can play with all the features and see if it fits your requirements.

author: ElektroQuark
author_rank: Unknown
timestamp: October 29, 2011, 05:38:04 pm
content: You can try the LeCroy LogicStudio software too. But the hardware is expensive.

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 29, 2011, 06:17:40 pm
content: Quote from: EdoNork on October 29, 2011, 05:38:04 pmyes, i want to have a look on software first so i'll get idea what feature should be available in LA SW and HW.i installed and tried the logicport, will look more detail into it.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 29, 2011, 06:59:16 pm
content: Quote from: alm on October 29, 2011, 01:01:43 pmThe status quo is still that the FPGA supports advanced triggering, but the GUI doesn't.

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 30, 2011, 05:14:28 pm
content: let me link some related topic...https://www.eevblog.com/forum/index.php?topic=4940.0https://www.eevblog.com/forum/index.php?topic=5352.msg69793#msg69793as this thread is meant more on software, i've had my time from last night looking for usb LA. i concluded there's balance, ie [lower spec HW (MS/s, #channel) + ok'ish SW] will cost more (alot more) than [higher spec HW + crappier SW]. lets take example...(let me rate it 1 to 10 according my own standard, being top USB HW is 500MS/s 30+ channel, large mem and fancy triggering logic (width, pattern, boolean and whatnot), and SW based on my relative judgement on GUI/feature/quick play, pls correct me if i'm wrong):1) Hantek LA5034 (HW 8, SW 2) = $204http://www.ebay.com.my/itm/Hantek-LA-5034-34CH-USB-Logic-Analyzer-Oscilloscope-500M-68KB-/280749224492?pt=BI_Analyzers&hash=item415df5322c2) LogicPort (HW 8, SW 5) = $389http://www.pctestinstruments.com/3) ChronoVu LA (HW 6, SW 2) = $221 (ah crap!)http://www.ebay.com.my/itm/PC-USB-Logic-Analyzer-100MHz-64Mb-memory-/250684716233?pt=BI_Analyzers&hash=item3a5df934c94) USBee (HW 3, SW 7} = USD694 HW+SW combined price (rip off!)http://usbee.com/usbeezxdigitaltestpod.aspx5) Saleae Logic (HW 3, SW 7) = USD149http://www.saleae.com/logic/6) Saleae Logic 16 (HW 6, SW 7) = USD299http://www.saleae.com/logic16/7) ZeroPlus (HW 7, SW 4) = € 129,00http://www.zeroplus.com.tw/logic-analyzer_en/products.php?pdn=3&pdnex=list8} DigiView 3100 (HW6, SW 5) = USD499http://www.tech-tools.com/dv_dv3100.htm9) Scanalogic (HW6, SW 8} € 59http://www.ikalogic.com/scanalogic2/prices.php10) Lecroy LogicStudio 16 (HW9, SW9) $990http://www.lecroy.com/logicstudio/logicstudio.aspxi wish i have hantek (fastest and cheapest) + usbee swbut sadly its not open SDK, so i cant build one sw for my need, its stated in the hantek link above.. there's 2nd design with supply demo VC VB etc, but i cannot find in the net, does anyone know? but since the sw is not upgradable, maybe i should stay away from hantek? salae logic 16 maybe the next option, with less MS/s capable, but $99 more.edit: with exception to ols la, which only $49 with better SW, but deadbeef complained about having to do something to pc to make it work. sad, i'm not expert in java or sump thing.fyi: LeCroy sw crashed, shame!

author: Chet T16
author_rank: Frequent Contributor
timestamp: October 30, 2011, 10:56:25 pm
content: There is a salae sdk and clone hardware can be had for $50. My clone works as both a salae and a usbee.

author: amspire
author_rank: Super Contributor
timestamp: October 30, 2011, 11:39:35 pm
content: I have the Logiport software with the Intronix LA1034 hardware.It is a fairly old design now - my board is copyright 2006.If you are interested I can do some photos of the internals, but basically the hardware is an Altera Cyclone EP1C4F324C6, FTDI FT245BM USB chip, a 93C46 serial eeprom, and a switching supply.Because of its age the memory is now a bit small (34 bits x 2048) but with compression (for clock speeds up to 200MHz), it can often store an adequate amount of data. I think at 500MHz internal clock mode, it does not compress.If I was looking for a new analyser now, I would be looking for more memory.It only has 4 interpreters - IC2, Synchronous Serial/SPI, RS232, CAN 2.0A-2.0B Bus.No analog channels.Input logic threshold programmable between -6V to 6V with 50mV resolution, 100mv accuracy so in theory you can do any logic from 15V CMOS down to sub 1V logic. Maximum input voltage is +/- 40VDC which is pretty good. In practice though, sensitivity degrades with speed, so at 250MHz, the sensitivity is something like 0.8 V, so it will be struggling with fast logic around the 1V mark.Anyway, you can download the software and run it in demo mode. Decently written, but hasn't really changed much over the years.Richard

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 31, 2011, 12:32:27 am
content: Quote from: Chet T16 on October 30, 2011, 10:56:25 pmlink or PM pleasei hope its logic16 since original logic one day will be limiting (24MS/s no internal memory) i guess. how do you download usbee sw? (USBee Suite Pro?) its $299 in the website. a total rip off.Quote from: amspire on October 30, 2011, 11:39:35 pmyou are free to tear down in another dedicated thread (or in this thread i dont mind), we will enjoy watching. i've tried logicport sw yes it looks a bit old but way better than hantek sw, i think its adequate for some work. i wonder since hantek hw spec = logicport hw spec. maybe hantek cloning it, and maybe the intronix sw will work on hantek? is there SDK available for logicport?have tried saleae logic sw, its kind of fun. the other sw we need to click a button or press keyboard to zoom in and out, but this saleae is using middle wheel to quickly zoom, ipod style left right scroll, i think this is important for quick navigation GUI and debugging large data.

author: Unknown
author_rank: Unknown
timestamp: October 31, 2011, 12:59:31 am
content: Quote from: Chet T16 on October 30, 2011, 10:56:25 pmI dislike those clones since about 90% of the work for those USB bulk transfer logic analyzers is in the software. The hardware is just a Cypress USB SoC in bulk mode which sends all data to the host. It's not like a complex multimeter with some add-on software for data logging.Wasn't there some issue with new versions of the Saleae software being incompatible with clones?

author: DrGeoff
author_rank: Frequent Contributor
timestamp: October 31, 2011, 01:43:49 am
content: Have been using the Logicport analyser for a few years now and it has never failed me. Software is very stable and the hardware works just fine. I've really only been using it to double-check timing and states during testing and to decode some protocol streams, but it has been a very handy device to have.

author: JuKu
author_rank: Frequent Contributor
timestamp: October 31, 2011, 09:58:48 am
content: I have a Zeroplus. Now that I've used it a bit more, I have more respect for the protocol analysis features of it. It is really strong on that, and I didn't expect that seeing what is actually going on in a fairly complex system would help so much in the software development section. For example, i had no trouble following a command from host processor serial terminal to the slave processor SPI port to the peripheral registers and back (several SPI busses, some displayed twice in different formats). I even had a few spare lines left after the exercise:-).If I would buy now, I wouldn't make a compromise on that feature, I'd go for more channels and as deep memory as I can afford.

author: Chet T16
author_rank: Frequent Contributor
timestamp: October 31, 2011, 10:50:29 am
content: Quote from: Mechatrommer on October 31, 2011, 12:32:27 amIts only the original salae but for $50 i couldn't say nohttp://iteadstudio.com/produce/seleae-logic-usbee-ax-usb-blaster/

author: Balaur
author_rank: Unknown
timestamp: October 31, 2011, 10:55:21 am
content: Thank you Shafri for preparing the list. Much appreciated. It motivated me to (slowly) have a look at all the tools for a possible acquisition.I've just played with the Saleae logic software. I'm somewhat dismayed by their approach, but I'm used to a totally different LA GUI, so sorry for my assumptions.Quick questions:- Can you combine arbitrary signals into a bus and display the bus waveform? I know that there is a simple parallel analyzer, but it's not what I expect- Can you have vertical reticles?- Are you able to set the trigger instant inside the sampled window between 0% and 100%?- Without bus waveforms, the trigger set-up makes sense but it's cumbersome to use if you want a particular value on a bus. However, for 8/16 channels, it's not a big issue.Cheers,Dan

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 31, 2011, 11:16:44 am
content: Regarding the number of protocols, the ZeroPlus is unbeatable, especially if you get 30+ plugins for free. There's even an SDK to develop your own plugins. Also the GUI is not that bad after all. It's not always 100% intuitive, but pretty capable. The newest beta version even supports LA and DSO stacking. So you are able to combine the input of multiple LAs and a scope. Unfortunately, it crashes when I connect it to my Owon SDS, but this looks like an interesting feature. Generally speaking, the development of the GUI is pretty active compared to other LAs.What I don't like is that you need to define two buses (and duplicate inputs) to decode SDI and SDO of an SPI bus. Also the trigger system is very limited. And it's kinda crappy that you need to install each and every protocol separately and the downloads are rather big just because of large Chinese help files.On the good side, it's very cheap and has a good memory depth, especially I you buy the C16032 and patch it into a C16128. Also the thresholds are adjustable from -6V to +6V and the input can tolerate -30V/30V.So if you your main interest is to decode protocols and you want support for stuff beyond SPI, there is not much of an alternative.The OLS is cheaper and has the promise of an advanced triggering system, but it has no housing, no adjustable input threshold and can tolerate only -0.5V to +7V. The GUI is ok, but you can't do very much with it. E.g. you can't define buses, the trigger setup is very cryptic.Of course, everything including the hardware and FPGA code is open source, so you could change it all on your own, but honestly, there are only a few people who worked on the project, currently the development is more or less on hold since several months. E.g. there are only a few protocol analyzers and only one of them is developed by another person than the one who developed the GUI. The fact that the FPGA code supports an advanced triggering system since early 2011, but there is still not even a beta version of the GUI to actually use this feature says a lot about the speed of development.

author: amspire
author_rank: Super Contributor
timestamp: October 31, 2011, 11:52:51 am
content: I added a teardown for the Logicport logic analyzer here:https://www.eevblog.com/forum/index.php?topic=5387.msg70141#msg70141

author: Unknown
author_rank: Unknown
timestamp: October 31, 2011, 12:11:01 pm
content: Quote from: Balaur on October 31, 2011, 10:55:21 amNot in the current version.Quote from: Balaur on October 31, 2011, 10:55:21 amNot as far as I know.Quote from: Balaur on October 31, 2011, 10:55:21 amPre-trigger buffer size in preferences gives you some control.Quote from: Balaur on October 31, 2011, 10:55:21 amYes, triggering is currently quite limited: the v1.0 software had more options. They have promised better triggering, but no time line.

author: JuKu
author_rank: Frequent Contributor
timestamp: October 31, 2011, 12:22:43 pm
content: Quote from: 0xdeadbeef on October 31, 2011, 11:16:44 amIt is a bit more work to set up, but it gets the job done. With "virtual CS" (based on the activity of clock) you only need to copy one channel (the clock), so even the duplicated screen estate is not a big waste. You can copy channels, so you can get to use all channels anyway. I don't see this as a big minus.The limited trigger is much more of a concern. But are we asking too much from a $150 instrument? Still, I'd buy another or two for stacking if it could trigger on something like this:-if a SPI bus master out is 0x34 xx xx (talking to a particular device) and there is no falling edge on int_x in next 1 ms... (device missed timing)-when a device interrupt goes low but the host does not activate the chip select in x_ms (master missed timing)-when a peripheral SPI out bus has a pattern "0x82 0x15 0x0?" and "?" has bits 1 or 3 set (error on peripheral)You get the idea.

author: Balaur
author_rank: Unknown
timestamp: October 31, 2011, 02:17:37 pm
content: Quote from: alm on October 31, 2011, 12:11:01 pmThank you Alm, much appreciated.Cheers

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 31, 2011, 02:19:38 pm
content: Quote from: JuKu on October 31, 2011, 12:22:43 pmI didn't say that it doesn't work, I just said that I don't like the way it works. SPI is by definitions a 2way protocol, so decoding only one data line violates the protocol. Yes, there is a workaround, but it would be less effort and less waste of screen space if the SPI analyzer would simply decode data in and out.Quote from: JuKu on October 31, 2011, 12:22:43 pmIMHO there is no LA available which can do this in realtime. Only the dumb USB LAs could do this in theory, but at this point, there doesn't seem to be a single one with better trigger possibilities than the ZeroPlus. The FPGA based LAs would have to implement the protocol analysis in the FPGA which is not possible at least for 30+ protocols. The only way to do this would be an offline analysis, i.e. capturing a buffer, analyzing in the PC software and pretending a trigger condition if there was one. This is how scopes with SPI pattern trigger ability do this and this is also I guess how high end USB LAs like theLeCroy LogicStudiohandle it.Indeed ZeroPlus offers plugin calledProtocol Analyzer Triggerfor 39€, which however seems to only mark the fitting sample. If at all, it can only work as offline trigger.There is also a so calledPulse Width Trigger Modulewhich makes it possible to trigger on pulse width of a single signal. But it works only on one signal, obviously can't be combined with other trigger conditions and is a little clumsy to use. IMHO it makes more sense to use e.g. the OLS as trigger generator if it finally supports advanced triggering.

author: Unknown
author_rank: Unknown
timestamp: October 31, 2011, 02:44:26 pm
content: Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pmMake this no affordable LA. I'm sure Agilent can sell you a box that can do this. Would the OLS come close if they ever finish the software side of the demon core?Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pmI agree, this is a missed opportunity. The fast CPU of your modern desktop and large amount of buffer memory should allow them to do much more than a cheap FPGA, but none of them take advantage of this. I have complained about this in the past, and was told to expect much more advanced triggering in the future, but I wouldn't hold my breath.Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pmOr they just use a bigger FPGA. You don't have to actually load all 30 protocols all the time, you could have a separate bitstream per protocol. You could even get fancy and synthesize a bitstream dedicated to the trigger condition.Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pmI agree with your assessment that these are just clumsy workarounds.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 31, 2011, 03:44:17 pm
content: Quote from: alm on October 31, 2011, 02:44:26 pmWell, the 10k€ Agilent desktop LA on my bench at work can't do this, neither can the 14k€ LeCroy Waverunner Scope with the ~1k€ SPI plugin. Well, the latter can trigger on SPI patterns, but of course only one the sample memory. So it actually already triggered and just filters the memory as described above.So I'm not really convinced that there is any device on the market that can combine protocol and timing trigger in realtime. Of course you could let someone design you a specialized LA or do it yourself, but I doubt that there is an existing solution yet.Actually, I think it should be pretty easy to add e.g. an SPI decoder to an FPGA LA design, but then you'd need a larger FPGA and to change the protocol, you'd need to download a new FPGA bitstream. Or you'd need a VERY large FPGA to fit in the 30+ protocols of a ZeroPlus LA.Then again, I guess if you put a somewhat capable microcontroller next to the FPGA and decode the protocols in the microcontroller, it should be possible to combine close to realtime protocol triggering with edge/time triggering. Then again, I'm not aware of any device on the market that could do this out of the box.Quote from: alm on October 31, 2011, 02:44:26 pmNo, it would just come close to the edge/time trigger capabilities of an old HP desktop LA (16500/16550):http://gadgetfactory.net/logicsniffer/uploads/Playground/OLS%20Advanced%20Trigger.pdfhttp://www.mygizmos.org/ols/fpga.htmlQuote from: alm on October 31, 2011, 02:44:26 pmWell, the (non realtime) operating system is always a bit of a problem. Sometimes windows decides to use 100% CPU load for whatever for dozens of seconds and it will be pretty hard to overcome this with a large buffer. Surely the reliability of USB analyzers could be improved a lot by using USB3.0 and larger buffers, but they will never reach the reliability of a real HW trigger.Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pmSure. Would be completely possible. It's just that you can't place your order on any available product at this point.At least AFAIK.

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 31, 2011, 05:36:31 pm
content: Quote from: Balaur on October 31, 2011, 10:55:21 amhantek sw (and of course logicport) is specialized at that, but just that. other than that, hantek sw tried to solve "chess problem - how to defeat kasparov" behind since apparently it struggling on displaying data (sim) and eventually got hanged when we press some button (i mean its only a simple thing it can do/show but processing it seems like hell in it). otoh, saleae gave more effort on GUI, but the functionality still can be improved. o well, cant get everything in one package, maybe i'll give more preference to something that open their software to SDK and add-on plugins. so future development is possible by 3rd party or diy.Quote from: 0xdeadbeef on October 31, 2011, 02:19:38 pminteresting point. are you saying that device like saleae logic (usb bluk transfer mode, no internal ram) in theory can do any kind of triggering possibilities in PC software? USB always the bottleneck i think. they have to implement excellent compression in HW before sending it to USB to improve sampling rate, am i thinking right? otoh saleae logic 16 has 10bils samples capability, so we can dumb capture in HW first and later download and analyze in PC in offline mode (as opposed to "virtually realtime but not so" original logic version). btw, i cant comment much on hardware as i'm no expert. but having experience guys talking here is great as it will be valueable for future reference later. keep it coming.btw, i just realized i broke downloaded the zeroplus sw (138MB) last night, i have to restart download again just now, so still haven't play with it and the assessment still = ?and i'm sure there are (should be) alot more USB LA i havent found yet. i only based on whats mostly mentioned here and there.

author: Mechatrommer
author_rank: Super Contributor
timestamp: October 31, 2011, 06:05:53 pm
content: Quote from: Chet T16 on October 31, 2011, 10:50:29 ami have USB blaster, but slightly different layout (instead of 2 another chips, mine only got one), but the same processor CY7C68013. ok its almost the same layout as the ITDB01 board herehttp://iteadstudio.com/store/index.php?main_page=product_info&cPath=1&products_id=51maybe i just have to find the FW for both "cloned saleae logic" and my original usb blaster FW? so i can switch functionality between LA and fpga programmer? if i buy it (even cheap at $50 not including shipping cost which could be the same or doubled price) maybe i'll just get another usb blaster HW? sound uneconomical for me. thanks for providing the link anyway.

author: Unknown
author_rank: Unknown
timestamp: October 31, 2011, 08:42:23 pm
content: Quote from: 0xdeadbeef on October 31, 2011, 03:44:17 pmI'm surprised, I would have expected them to have implemented real-time protocol decoding by now. Although I guess it gets slightly harder as the sample rate goes up.Quote from: 0xdeadbeef on October 31, 2011, 03:44:17 pmI thought it might be possible to implement an SPI decoder in the state machine, although that would only work for very simple protocols.Quote from: 0xdeadbeef on October 31, 2011, 03:44:17 pmBut they always stream the data (semi) real-time, I believe they only have a few bytes of buffer in the hardware. Because of the large RAM, you can easily fit several seconds in the buffer at 24MS/s. The only limitation I see is that, on average, the trigger algorithm should be able to keep up with the data, but that shouldn't be too hard on a modern CPU. In the case of SPI you can ignore all samples except those on a rising/falling edge of the clock while SS is enabled, for example.Quote from: Mechatrommer on October 31, 2011, 05:36:31 pmUSB is the bottleneck, but this is independent of the triggering. USB is the reason why they can only sample at 24MS/s. With the Logic16 they employ some tricks so they can trade channels for sample rate, and I believe they added more buffer space. The reason why they can do billions of samples is because they store it all in your computer, the hardware alone is incapable of anywhere near that number. This is why you see a sharp divide between the USB bulk transfer ones that can do almost unlimited number of samples at modest sample rates (Saleae, Usbee), or the FPGA-based ones that can sample much faster but are limited to the RAM in the hardware (Intronix, OLS, Zeroplus).

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 31, 2011, 09:05:55 pm
content: Quote from: alm on October 31, 2011, 08:42:23 pmFrom an historical point of view, logic analyzers were mainly used to watch data/address buses. Our older HP LAs could even show disassembled opcodes. I guess therefore they are still aimed at complex edge/time triggers, not on realtime protocol decoding. Anyway, if you take into account that Agilent and Lecroy want around 1k€ for one simple (offline) protocol decoder in a scope, I'd guess they'd let you pay >10k€ for a few realtime decoders alone on top of a 10k€ LA.Quote from: alm on October 31, 2011, 02:44:26 pmThe FPGA in the OLS is a pretty small Xilinx Spartan-3E (XC3S250E) with only 250k gates. A lot of this is used for the block RAM (216K). So there's actually not much space left for the LA.

author: Unknown
author_rank: Unknown
timestamp: October 31, 2011, 10:04:21 pm
content: Quote from: 0xdeadbeef on October 31, 2011, 09:05:55 pmBut how many people are still doing design with external address buses? Even the high-end ARM processors can have RAM and CPU in the same package. Not that many other parallel buses left either, although I guess real-time decoding of PCIe is quite tricky without dedicated hardware.Quote from: 0xdeadbeef on October 31, 2011, 09:05:55 pmI was thinking about the HP 16500A-like state machine in the Demon core, but 16 states may not be enough to match all 8 bits.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 31, 2011, 10:19:15 pm
content: Quote from: alm on October 31, 2011, 10:04:21 pmAnd actually a lot of ASICs use 16bit per word and multiple words per message and then you can have even daisy chains of 2 or 3 devices etc.

author: Balaur
author_rank: Unknown
timestamp: November 01, 2011, 12:13:13 am
content: Quote from: alm on October 31, 2011, 10:04:21 pmHeh, heh, you'll be surprised!One of the major departments at my company is specialized on very specific reliability testing of components. Basically, we interface the Device Under Test to an internally designed tester that has a large FPGA (both in size but also on I/Os - hundreds of them). There is a DUT-specific board that ensures the electrical set-up for the DUT.The FPGA implements an interface for the DUT to be happy and to work correctly.The tester also have a standardized interface (up to 160 signals) to the LA to map the signals we need.The DUT can be anything: SRAMs, DRAMs, FPGAs, TCAMs, CPUs, quite advanced devices really and sometimes even dedicated test vehicles or engineering samples. The tester copies the most interesting signals of the DUT to the LA to give us some visibility on what's happening there. That includes address/data, various buses, etc. Very useful.We work with the component suppliers very early in the production (before release). The datasheet may not exist yet or not quite really fits the reality. Thus, in our case, a competent LA is a must.Now, since we had tested hundreds of fairly complex devices until now, it looks like there is quite a lot of designing involving devices with a lot of interconnections. I wish those engineers all the best, since I know how things could get tough very easily.

author: slateraptor
author_rank: Frequent Contributor
timestamp: November 01, 2011, 10:05:24 am
content: Quote from: Chet T16 on October 30, 2011, 10:56:25 pmIt's sad to see all the hard work that Joe and Mark of Saleae have put into their product being ripped off by yet another Chinese hacker lacking principle. It's even more sad to see the hobbyist community supporting the adulteration of a fair product sold at a fair price.A disappointment to see hacking without principle for the sake of marginalizing that which is already within reach.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 01, 2011, 10:53:10 am
content: Quote from: slateraptor on November 01, 2011, 10:05:24 amopen source fanatics? can we make it as a new term? i do agree with you at some points. but realizing the HW is just the same as another device, just difference in FW/SW and the bundled SW cannot give all you want is sometime mind disturbing. if they want to make a "good for money" device i think they need more hardwork, ie better SW and functionality etc, instead of just try make make a balance in the force (cheap but not complete SW). but i dont know about others and you.

author: Rasz
author_rank: Super Contributor
timestamp: November 16, 2011, 01:24:53 am
content: Quote from: Mechatrommer on October 29, 2011, 10:41:55 amhttp://www.aliexpress.com/product-fm/446147460-CY7C68013A-USB-Logic-Analyzer-Core-Board-Schematics-wholesalers.htmlits Salea clone for $15, you can get clones with a jumper that can work as both Salea and USBee for $20-25. Thats as "bang for buck" as they come.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 16, 2011, 06:52:43 am
content: thanks mate and welcome to this forum. its been proposed by Chet T16 herehttps://www.eevblog.com/forum/index.php?topic=5361.msg70133#msg70133i think its the same hardware, but your link is far more cheaperedit: with one chip less missing? (RAM?) and the funny thing, the ad showing Saleae software picture with the original saleae logic16 HW in it... as usual... from China with Love!

author: Unknown
author_rank: Unknown
timestamp: November 16, 2011, 02:55:21 pm
content: Since the software represents the far majority of the development effort for the dumb USB bulk logic analyzers (Usbee, Saleae), cloning them is more harmful than cloning something hardware focussed. If companies clone a scope front-end (eg. the whole Hantek/Rigol/Atten/Instek mess), they at least have to spend some R&D effort into getting the layout and parts right, and they have to actually build the hardware. This is just a Cypress SoC plus EEPROM on a PCB, which probably costs much less than $15 to make without case and probes. Usbee at al. are basically being punished for not annoying their users with protection schemes like online activation.On the more practical side, the screen shot appears to show the old software, which is no longer maintained or available. I would verify that it also works with the current version before buying. I believe there have been some troubles with clones and the new software.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 28, 2011, 11:21:10 pm
content: going back at this. know what i found? i really dissapointedstill not found the "ideal" software that i think suitable. the most featured and user friendly imo so far is scanalogic software, but still i want it to be able to show analog waveform and the HW is a bit on the low end side (4ch 20MSps) though it provides FFT, what the heck FFT is for in logic analyzing?. saleae SW looks cute (ipod scroll, iron man website), but cannot show analog, cannot find data value, logic16 price near ds1052 cost, what did they do?, sigh.there's new guy coming...http://www.ebay.com.my/itm/Ideofy-LA-08-USB-Logic-Analyzer-I2C-Master-and-I2C-SPI-UART-decoders-/270852968239?pt=BI_Analyzers&hash=item3f10184f2fhttp://www.ideofy.com/la-08_enhis HW looks promising, but the SW still in very early stage. maybe i should encourage this guy, i like the way he did the sampling rate and channel selection. i think i'm going PM him if he can add saleae+scanalogic feature in his SW. if he can respond positive then good for him.

author: Unknown
author_rank: Unknown
timestamp: November 28, 2011, 11:41:21 pm
content: How about just concentrating on finding the best logic analyzer software, as opposed to a jack of all trades, master of none? Most logic analyzers suck at analog, and most DSO's suck at working many logic channels. Unless you spend $$$ on a real MSO (i.e. not Rigol), I think you're better of getting a good DSO and a good logic analyzer.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 28, 2011, 11:53:45 pm
content: Quote from: alm on November 28, 2011, 11:41:21 pmerr i mean, combining say 8 or 16 digital io and show as byte/word values in one graph. kind of debugging DAC on the digital side. thing like Hantek LA5034 software does.

author: Unknown
author_rank: Unknown
timestamp: November 29, 2011, 12:03:14 am
content: Is this useful for anything but old DAC/ADCs with an old-style parallel interface? Most modern parts, especially the ones likely to be used with a low-end MCU, are using some sort of serial bus. You'd have to decode the serial protocol first before being able to graph the values.

author: Mechatrommer
author_rank: Super Contributor
timestamp: November 29, 2011, 12:40:44 am
content: well at least parallel decoding could be handy. btw, its not like we have to add a resistor in the HW? its just in the SW, only few lines of code to add will do, isnt that hard isnt it?esp if you are making money out of it.

author: Unknown
author_rank: Unknown
timestamp: November 29, 2011, 01:13:32 am
content: I'm not saying it's hard or that I'm against software incorporating this feature, but I wouldn't consider it one of the must-haves. The ability no navigate large traces smoothly would probably among the most important ones. This includes both search and smooth zoom/pan. Also good support for decoding the popular serial protocols. I should be able to zoom out (to some degree) while still seeing the decoded data. Of course YMMV.

author: Mechatrommer
author_rank: Super Contributor
timestamp: December 02, 2011, 07:46:18 pm
content: de-ghosted my PC and now i managed to test previously crashed SWs, some other apps was messing with the dotnetfx config/file i think. USBee tested, about similar interface with older saleae (minus the ipod scroll). but this Lecroy LogicStudio, so far its the best software, list in Reply #8 updated, i gave it HW 9, SW 9 its the best so far compared to others at several order magnitude. but $999? gulp!i hope the next update they will incorporate Saleae's scroll and centered over mouse zoom style, we cant get everything rightbut top navi bar of Lecroy's is adequate enough to navigate all data easily. now they got rectangle lens/magnifier too! very very nice! thats how a LA software should look like from my eyes.

author: roli_bark
author_rank: Regular Contributor
timestamp: May 09, 2013, 01:34:20 pm
content: Bumped into it while looking for a good USB based LA. Sorry for reviving this thread.The Intronix LogicPort has only a Sample buffer of 34 x 2048 samples ? Or is it a Typo ?If so, why did you grade it as HW8 [ relative quite high grading] ?Sorry, but in my book a 2048 samples per channel LA does not deserve a 2nd look ....

author: amspire
author_rank: Super Contributor
timestamp: May 09, 2013, 02:31:24 pm
content: Quote from: roli_bark on May 09, 2013, 01:34:20 pmIt is an excellent logic analyzer - one of the best in the sub $500 price bracket. It uses compression to store samples so it can often store millions of clock cycles in that 2048 samples. It also has good triggering, so you hopefully do not need to capture as much data. Because the samples are stored in memory on the Asic, it can capture at a genuine 500 MHz for a 34 bit wide data with data compression - much faster then the analyzers that stream the data through a USB port to be saved on the PC. The streaming analyzers have a slower capture rate but can store huge samples.So having both types of analyzer can be a good tactic. The right tool for the right job.Yes there are cases when a big data buffer is needed to say capture the whole conversation of a communications port for later analysis, but if you always have to capture MBytes when debugging, then you are probably not working efficiently.If you understand how to work within the limitations of the Logicport, it is a fabulous fast logic analyzer. It most definitely deserves a look if you need a high performance analyzer.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 09, 2013, 03:10:47 pm
content: Quotethe guy talked out of his ass

author: Bored@Work
author_rank: Super Contributor
timestamp: May 09, 2013, 03:30:25 pm
content: Quote from: Mechatrommer on May 09, 2013, 03:10:47 pmNo, the guy managed to explain his reasons. You, on the other hand, seem to inhale some very bad batch of glue.

author: Mechatrommer
author_rank: Super Contributor
timestamp: May 09, 2013, 04:00:43 pm
content: Quote from: Bored@Work on May 09, 2013, 03:30:25 pmif you have trouble understanding, under alcoholic influence or in a very bad day... here i was refering to this posthttps://www.eevblog.com/forum/projects/pc-usb-logic-analyzer-who-has-the-best-software/msg70033/#msg70033that he (roly_bark) pointed out.