Simple circuit for RF mosfet gate drive - Page 1
Forum section: electronics / rf-microwave

author: profdc9
author_rank: Frequent Contributor
timestamp: October 11, 2023, 04:21:27 pm
content: I want to make a simple circuit that uses only common BJTs and other common parts that can drive a MOSFET with about 150 pF gate capacitance at up to 30 MHz. The source needs to be a 3.3 V logic signal. I found it was not easy to do this because almost all such circuits use a CMOS logic gate output which is limited in the peak output current. Here is the circuit I designed. I hope others find it useful.

author: jonpaul
author_rank: Super Contributor
timestamp: October 11, 2023, 08:35:00 pm
content: Wrong assumptions:FET have a charge requirement, the 150 pF is not a good model.see the many IC and other FET drivers back to 1970s.Jon

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 11, 2023, 08:48:43 pm
content: Q2 has no B-E pulldown?What's wrong with transformer coupling? It's just an RLC network, easy to design.As mentioned, the exact impedance matters, and varies with load. Presumably 150pF is the average or equivalent value over a large enough (10V?) swing.Tim

author: LM21
author_rank: Regular Contributor
timestamp: October 11, 2023, 10:49:51 pm
content: One more question. How does it actually work. Have you built it and measured it.

author: profdc9
author_rank: Frequent Contributor
timestamp: October 11, 2023, 11:23:50 pm
content: Quote from: T3sl4co1l on October 11, 2023, 08:48:43 pmThe base of Q2 is pulled up to force it to be on but not saturated. This is one of the simplest biasing arrangements. Q3 is a voltage follower to turn Q2 on and off, and R21 is negative feedback to prevent Q2 from saturating.Transformer coupling can only be tuned for a single frequency. This is designed to work over a wide bandwidth. For example, I've attached the circuit operating at 1 MHz rather than 30 MHz. This is intended to drive 3-4 BS170 or 1 IRF510 without requiring a 74ACT logic gate. It can drive higher capacitances than 150 pF but only at lower frequencies.Dan

author: profdc9
author_rank: Frequent Contributor
timestamp: October 11, 2023, 11:30:59 pm
content: Quote from: jonpaul on October 11, 2023, 08:35:00 pmMOSFET drivers are not designed for a specific gate charge. They are usually designed with a totem pole output or push-pull output as to provide as low impedance path to ground or the high rail so that the gate can be charged or discharged. This is similar to the above circuit, where Q1 charges the capacitor, and Q2 discharges the capacitor. Most MOSFET drivers can only switch at most in the low MHz range which is the limit for most SMPS switching. I am looking for a solution that works up to 30 MHz as to switch RF transistors for HF transmissions. I also want a solution that does not require proprietary components if possible. After trying many different solutions this is what I came up with.Dan

author: profdc9
author_rank: Frequent Contributor
timestamp: October 11, 2023, 11:34:35 pm
content: Quote from: LM21 on October 11, 2023, 10:49:51 pmI haven't built and measured it. But briefly, Q3 is a voltage follower so that the source can switch Q2 rapidly despite the Miller effect from the common-emitter configuration. The resistor R21 prevents Q2 from saturating using negative feedback so that it can be switched off quickly. When Q2 is on, it pulls the base of Q1 low as well as drains C1. When Q2 is off, R17 pulls the base of Q1 high which turn on Q1 and charges C1. The transistors are prevented from saturating so that their speed can be maintained.Dan

author: profdc9
author_rank: Frequent Contributor
timestamp: October 12, 2023, 03:15:49 am
content: Adding a push-pull stage to the output seems to increase the current capacity by a factor of 3 or 4 but would probably burn the transistors from heat. Each push/pull transistor has about 1 amp peak, a maximum of 12 V potential, with a duty cycle of perhaps 10%, resulting in average power of about 0.5 W.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 12, 2023, 03:30:38 am
content: Quote from: profdc9 on October 11, 2023, 11:23:50 pmOh, you're just using C2 as DC restore, sure. Will depend on duty cycle though. Not clear if that's in your optimization scope here.QuoteCitation needed!Mine work fine over, oh say as a typical example, 20kHz to 5MHz or so? "Tuned" for a power switching application of course. For RF, an LF cutoff of some 100s kHz would be reasonable, with upper limit in the 10s of MHz, maybe even low 100s.QuoteYou may find this of interest --Set for fairly steep bias (~10mA), and using smaller transistors (MMBTH10/81), this can switch in under ten nanoseconds; even the 3904/6s shown will do under 20ns. Obviously, the open collectors are sensitive to any load impedance, and the emitter follower doesn't work very well itself at high frequencies, where we might desire multiple stages to improve gain and thus current capacity (dI/dt) and sharpness.Here's an example, as built, where the above circuit (or a slight variation of it; the input stage is a diff pair actually, I think it was?), feeds a 2N7002/BSS84 "CMOS inverter", feeding a PBSS303NX/PX complementary emitter follower. The 51R || (coil) is snubbing to deal with the MOSFETs' shoot-through, and has a small impact on the output waveform.This is the output into, I think it was 2.2R + 10nF. Rise is slower by combination of the snubbing coil (also hence the modest overshoot and ringdown), and the BSS84 simply being weaker than the 2N7002 (there's no such thing as "complementary MOS", just PMOS that are of similar design and scaled to be a reasonable companion again a given NMOS; typically Coss and Rds(on) are jointly 50-100% higher than the NMOS, to give a compromise between conduction and switching losses of the overall pair, or, for CMOS logic purposes, the best compromise for speed or layout density).This was quite some years ago actually (ca. 2013?), and there's very little reason to do exercises like this now, thanks to the widespread availability of GaN. Drivers are lower voltage (5V), and getting more abundant; or you can use just a shitton of logic gates in parallel, lol. More to the point, such frequencies are almost unmanageable at more than modest power levels, because the drain-circuit switching speed is so much more than is feasible on PCB layouts, given loop inductance and all that, I mean.Tim