mosfets or relays or? - Page 1
Forum section: electronics / projects

author: phenol
author_rank: Regular Contributor
timestamp: September 14, 2017, 04:16:51 am
content: Imagine 200 small resistors, 60-100 ohms each, the 'top' ends of which are all tied together and the 'bottom ' ends are available for individual addressing either by closing a relay contact or a mosfet switch. The common end of all 200 resistors is connected to a reasonably fast pulse source delivering up to 200V and down to 70ns pulse width, similar to what i did herehttps://www.eevblog.com/forum/projects/high-side-switching-tri-state/msg1171652/#msg1171652Only one resistor is switched to ground at a time. Now i am torn between speed, noise and reliability associated with mechanical relays and parasitics (capacitances) within the 200 fets that will 1. load the pulse source,2. potentially cause severe ringing (could be dampened), 3. require solid gate drive in order to prevent ghost dv/dt turn-on of fets that must be off and 4. leakage current degrading the resistance measurement circuitry accuracy.The switch fet must be robust enough to handle at least 5 A during pulsing for at least 5us.

author: David Hess
author_rank: Super Contributor
timestamp: September 14, 2017, 04:11:09 pm
content: I do not see how you are going to get good performance with a layout large enough to use relays unless the whole thing is designed as a transmission line. MOSFETs are physically smaller making layout easier.So the big problem is isolation from the 10s of picofarads of MOSFET output capacitance when they are turned off. 50 picofarads in series with 50 to 100 ohms times 200 is 0.01uF in series with 0.25 to 0.5 ohms; can your pulse generator drive that? If not then what I would do is place a fast recovery diode in series with each MOSFET drain and add a pullup resistor to +250 volts or so. Now when the pulse is applied, it sees only the capacitance of the reverse biased diode junction which can be on the order of 5 picofarads for a diode which can handle 8 amps or more of surge current so the pulse generator only has to deal with 0.001uF of capacitance instead of 0.01uF of capacitance. Use 2 diodes in series and add balancing resistors to halve the capacitance again.

author: phenol
author_rank: Regular Contributor
timestamp: September 14, 2017, 09:13:15 pm
content: Thanks Davidwell, it does currently work with relays as i ditched the fet idea at first, but i am willing to revisit it...The relays i found are only 5 or so millimeters wide and don't occupy that much space. The resistors in argument are all printed on alumina substrates and have sub-mm size each with contact pads just 150um apart. The cantilever probe card that establishes contact with the pads precludes the use of sensible transmission line arrangements and it doesn't appear like i really need one; there is some multi-MHz ringing as a result of the fairly long ribbon cables, but it decays quickly and doesn't introduce significant changes in the pulse energy content. The thing shoots a series of pulses of increasing amplitude until the value of the trimmed resistor hits the target, so some ringing isn't really a problem.The mosfets i was considering have Coss~200-300pF. Your idea of putting reverse biased diodes in series with each drain makes perfect sense , but then this will add a diode drop when the mosfet is on. While this is inconsequential for the high voltage stage of the trimming process , the current data acquisition module connected to the common node of all 200 resistors relies on the fact that the bottom end of a resistor under test is grounded to get its resistance after each pulse.

author: David Hess
author_rank: Super Contributor
timestamp: September 15, 2017, 03:09:55 am
content: That certainly makes things more difficult. I would not want to run 200 sense lines and simple compensation for the forward voltage drop of the diodes is going to leave additional error in the resistance measurement.How were you selecting your MOSFET such that the output capacitance was 200 to 300 picofarads? Would 200 to 300 picofarads even be a problem? Controlling the slew rate or bandwidth of the high voltage pulse might allow more capacitance.I can think of ways to compensate for the forward voltage drop of the diodes perfectly or close enough but they all add enough complexity that I suspect the relays are a better solution unless the goal is higher reliability, faster operation, or less cost if the relays are very expensive.

author: phenol
author_rank: Regular Contributor
timestamp: September 15, 2017, 05:49:12 am
content: The relays are actually in the $1.5-2 ballpark--basically the first small enough, nothing special specimen i ran into for the sake of getting the prototype up and running. It is going to be a one-off instrument, so nre and materials cost is not a limiting factor.I had the following requirements for the switches:1. Vds>250V2. Rds_on < 200mohm (for adequate resistance measurement accuracy)3.Beefy enough to withstand dead shorts at 160V and <3us in duration. This one is a very fluid requirement and in reality it may never see a short-circuited load, but still...The above leaves me with sizable transistors the parasitics of which cannot be neglected. Coss~200pf, that's per transistor. There's 200 of those in parallel (ultimately they have to be 400), where the drain of each one is hooked to a 100 ohm or less resistor...so this sounds pretty horrible.The pulse itself has to be as narrow as 70-80ns and its rise time is maybe 20ns or so, which means that i don't have much room for slew rate control...Also, there will be some charging/discharging current flowing thru all 199 resistors that are supposed to be off while one is on and is being pulsed. The effect of such a current on the final value of an already trimmed resistor is unknown; it may drift up/down or simply fail. There is a very thin line between trimming and burning. Once it is crossed, the entire component is scrapped.

author: David Hess
author_rank: Super Contributor
timestamp: September 15, 2017, 03:02:41 pm
content: Here is how I might try doing it with just MOSFETs and there may be some benefits.Keep the MOSFET and series diode or diodes as I suggested. But now include an operational amplifier for each MOSFET which samples the junction between the diode and load and compares it to a reference which may be ground. The operational amplifier drives the MOSFET so that the junction is held at the reference or it drives a current sink in series with the MOSFET's source. The former case duplicates your current setup and allows the resistance measurement to be taken as you currently are (high side or low side?) *or* at the source of the MOSFET as a current which may be converted to a voltage with a resistance. In the later case, the resistance measurement is taken at the junction between the diode and load. Any circuit or added resistance in series with the MOSFET source is clamped in adjustment mode but this just takes a diode.The input of the operational amplifier is protected from high voltage by being high impedance and including a high series resistance followed by shunt protection.Since the MOSFET is actively driven to either maintain a virtual ground or with a current, its Rds is irrelevant to resistance measurement accuracy so a smaller MOSFET may be used lowering capacitance.

author: phenol
author_rank: Regular Contributor
timestamp: September 15, 2017, 07:09:35 pm
content: I was thinking about doing something similar to your virtual ground suggestion earlier today. I am also planning to limit the test probes to 50 and progressively transport the substrate underneath.Now, if i'm to artificially lower the resistor to diode junction to ground, i have to tie the sources of all fets to a negative potential wrt ground and keep it steady during pulsing...

author: David Hess
author_rank: Super Contributor
timestamp: September 15, 2017, 11:26:00 pm
content: Quote from: phenol on September 15, 2017, 07:09:35 pmThe FET sources only have to be steady during the high current cycle so they can be clamped to ground with a diode and the negative bias source does not have to be low impedance.The operational amplifiers could drive either the gate or the source.

author: phenol
author_rank: Regular Contributor
timestamp: September 16, 2017, 06:13:21 am
content: if done like that with virtual gnd, i have to figure out how to put it in 3 different states, namely pulsing mode where the fet is fully on, measurement mode where the fet is under op amp control, and finally fet off mode where the drain diode is reverse-biased.As it stands today, the relays are addressed by OD shift registers by shifting in 1 to the corresponding position.

author: David Hess
author_rank: Super Contributor
timestamp: September 16, 2017, 01:23:00 pm
content: There are three modes but no extra control signals are necessary.The operational amplifiers can drive the *source* of the FETs continuously but the FETs only turn on with the existing gate drive signal. The only tricky part about this is limiting how low the output of the operational amplifiers can go so they cannot turn on the FETs when the gate drive signal is low. The easy way to do this is of course to limit the negative supply voltage to the operational amplifiers although I might instead use an NPN transistor cascode in series with the operational amplifier output with the base tied to the limiting voltage minus 1 Vbe to do the same thing with 10s of millivolts of accuracy. This makes it easier to use a cheap precision operational amplifier. (1)When an FET is on, if the high side drive is a current for the resistance measurement, then the operational amplifier will pull a current from the FET's source to balance the low lead of the test resistor at ground as if the diodes did not exist and the resistance measurement may be made. If the high side drive is the high voltage, then the current will be high and the FET's source will be clamped at ground by a power diode at the source.(1) This replaces the combined uncertainty of the MOSFET Vgs and operational amplifier low output saturation voltage. If using a rail-to-rail output operational amplifier or a single supply operational amplifier, then this is not needed but I might do it anyway. I try to avoid using CMOS, rail-to-rail, and single supply operational amplifiers unless they are called for because they have compromised performance.

author: phenol
author_rank: Regular Contributor
timestamp: September 17, 2017, 08:15:52 am
content: Let's see if we are on the same page and please excuse the crudity of my drawing; all i have on me is my phone and a piece of paper.Rx is the resistor under test. CTRL line is managed by the shift register output and is either 10 or 0v. The op amp steers the source such that the junction between Rx and the fast diode is maintained at 0v. The PNP is just a clamp.I see couple of issues here. The first is the one you mentioned with the mosfet not turning off completely when Ctrl=0v. If the negative op amp supply is limited to say -2V, there will be about 2V across GS when ctrl=0V for a rail-to-rail component. This is typically below Vth, but it may or may not be low enough to guarantee that the fet is fully off.The other one is the high pulsed current that will flow from the output of the op amp when the mosfet is enabled and Rx pulsed. The schottky clamp on the source diverts the high pulsed current to ground, but still...it can be limited by the resistor on the output of the op amp, but then the negative supply would have to go even lower making the first issue worse.

author: David Hess
author_rank: Super Contributor
timestamp: September 17, 2017, 12:52:43 pm
content: That is the idea.The CTRL line could go negative to prevent the output of the operational amplifier from turning on.A diode may be better than the PNP transistor because of low reverse base-emitter breakdown voltage. The operational amplifier might not even require protection at its inverting input but it is a good idea to include it anyway.I do not think the operational amplifier will have a problem with its output suddenly being pulled positive up to the schottky diode clamp voltage but it should be tested. If it does, then adding a PNP emitter follower to its output with a base resistor to limit the current will solve it. Or better, add the NPN cascode in series with its output which I suggested so the MOSFET source is driven by the collector of the NPN transistor. I was thinking of using the NPN as a precision output clamp instead of relying on negative output saturation of the operational amplifier but it would protect the output of the operational amplifier also.The feedback resistor will be a relatively high value to limit the current when 200 volts is applied. This resistor should be voltage derated.

author: phenol
author_rank: Regular Contributor
timestamp: September 17, 2017, 03:40:11 pm
content: when you say cascode, what do you mean? something along these lines maybe?

author: David Hess
author_rank: Super Contributor
timestamp: September 17, 2017, 05:29:09 pm
content: Quote from: phenol on September 17, 2017, 03:40:11 pmExactly but with a resistor between the output of the operational amplifier and the emitter of the NPN transistor to limit the current and gain. Now the sudden positive voltage jump when 200 volts is applied is isolated from the output of the operational amplifier (1) and the negative saturation voltage is limited to the base voltage minus one Vbe or about 0.6 volts. Once the NPN transistor saturates, further current is drawn by the operational amplifier through the base instead of the collector.Since most of the MOSFETs will be shut off normally, it may be worthwhile to tie the gate drive into the operational amplifier somehow to shut it off when not needed but it is not strictly necessary. I am not sure what your test current is.(1) The collector side of the transistor is high impedance including low capacitance.

author: phenol
author_rank: Regular Contributor
timestamp: September 18, 2017, 03:53:27 am
content: the test current is 10mAdisabling the op amp with the gate drive signal is certainly viable and probably easier than making the output of the shift register go negative

author: phenol
author_rank: Regular Contributor
timestamp: September 18, 2017, 07:01:41 am
content: ..or something like this. The inverter should assist in getting slightly negative Vgs of the main switch.The whole thing is becoming excessively complex, though...

author: David Hess
author_rank: Super Contributor
timestamp: September 18, 2017, 10:55:20 am
content: Quote from: phenol on September 18, 2017, 07:01:41 amThe more complex solid state design might be justified if the relay were expensive, faster operation was desired, or for higher reliability.There may be some simplifications. I considered whether using one operational amplifier and multiplexing the signals might be better but operational amplifiers are so inexpensive that I do not think that is worthwhile. Maybe the operational amplifier circuit can be combined with your resistor measurement to simplify that. Depending on how well controlled the gate threshold voltage is of the power MOSFET, disabling or accurately controlling the operational amplifier output may not be necessary. The buffer transistor may not be necessary at all.