ADC reading high when sampling too fast - Page 1
Forum section: electronics / projects

author: danie1
author_rank: Contributor
timestamp: June 24, 2020, 06:45:52 pm
content: I'm working on a motor driver and have found an interesting (maybe?) issue with my ADC setup.I copied the config from the open source VESC firmware which runs the F405 at 168MHz and the ADC at 42MHz which is actually out of spec - the datasheet says 36MHz max. However, this does seem to work and is used in one of the STM32 examples for that chip.The VESC also configures the ADC for the minimum sampling time of 3 Cycles.I suppose it's a surprise this works at all - the ADC is running above spec and sampling for a tiny amount of time.This config works for me ONLY if I've got an external filtering capacitor attached. I've got a switchable low pass filter that uses either 220pf (off) or 220nf (on) and when "off" the voltage is wrong.Increasing the ADC sample time to > 54 cycles or enabling my low pass filter result in the same reading which agrees with my mutli meter, scope and psu.The odd bit, and the reason for posting, is the wrong reading is higher than the input voltage and I can't think how that could happen. The adc connects the sample and hold cap to the DC signal and if it's connecting for too short a time it reads ~20% high???I wouldn't be surprised if the VESC hardware has similar quirks but ultimately it doesn't really matter because the absolute voltages don't really matter as long as they are self-consistent and more or less linear.So, the question is, how can an ADC read higher than the highest DC in the system when the sampling period is too short?I've attached the schematic for the switchable low pass filter for clarity.

author: mikerj
author_rank: Super Contributor
timestamp: June 24, 2020, 07:32:27 pm
content: Possibly inductance in the input circuit is causing overshoot on the sampling cap when it's switched in inside the ADC.

author: bson
author_rank: Unknown
timestamp: June 24, 2020, 07:35:19 pm
content: I assume the ADC is differential internally and samples relative to a reference even if it's internal. A high reading might indicate a drop in the reference voltage. Not sure how an unfiltered input could make that happen though, but having a charge cap on the input is generally good practice for many reasons.

author: DaJMasta
author_rank: Super Contributor
timestamp: June 24, 2020, 08:46:02 pm
content: Could it be that the sample and hold cap charges faster than it discharges, so you're seeing some residual offset charge left in the capacitor after shorter discharge cycles that are not fully discharging it?You could probably test by varying the input DC voltage and seeing whether the reduced voltage follows a standard capacitor discharge curve on the ADC output.

author: danie1
author_rank: Contributor
timestamp: July 08, 2020, 01:53:40 pm
content: I figured it out - if the previous sample in the sequence was higher it takes too long to drain the sample and hold cap. Initially I discounted it because VCC voltage is the highest in the circuit but of course I'm not shoving that directly into the ADC - the scaled VCC is less than the scaled current measurements because the current measurements have a 50% offset so you can read positive and negative.I feel like there should be method for the chip to attach the sample and hold cap to ground to drain it between samples but I doubt it. I'll take a look in the reference manual. Maybe I can insert a sample of a GPIO I'm not using that's grounded in between.Cheers for the suggestions anyway!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 08, 2020, 11:03:46 pm
content: Yes, that would do, or there may be a GND setting in the mux. Could also repeat the measurement on a given channel (rather than scanning between inputs, as I assume is being done?).Overclocking ADC tends to skew or destroy LSBs, so it's not a great idea in general. Would be interesting to see if some parts can be overclocked without errors, even at min/max Vdd and temp. I would guess so. Not at all useful for production of course, more of a neat curiosity.Tim

author: magic
author_rank: Super Contributor
timestamp: July 09, 2020, 07:00:24 am
content: Quote from: T3sl4co1l on July 08, 2020, 11:03:46 pmBudget scope vendors would like a word with you

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 09, 2020, 07:40:01 am
content: Well, budget is a relative thing... if you can get Chinese peasants sorting your MCUs for pennies, maybe it's worthwhile.Tim

author: RoGeorge
author_rank: Super Contributor
timestamp: July 09, 2020, 07:49:02 am
content: Quote from: danie1 on June 24, 2020, 06:45:52 pmResonance maybe?The schematic only includes the intended components. Apart from those, there is parasitic inductance, stray capacitance, reflections on impedance mismatches, and so on.Another reason might be the switching inside the ADC. When switched too fast, the internal ADC switches might accidentally pump some extra charge into the internal switched capacitors.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: July 09, 2020, 08:46:45 am
content: Ah, thank you for proving my point -- in perhaps the bleakest way imaginable.Tim