ADC input filter - Page 1
Forum section: electronics / projects

author: OM222O
author_rank: Frequent Contributor
timestamp: February 08, 2019, 10:01:44 pm
content: Hello everyone.I'm using a 24 bit ADC for a project.I was going through the datasheet again when I saw this note:I was curious so I had a look at another data sheet from a similar ADC (although 16 bit) and found a very similar note!Now I'm not sure why Cdiff should be at least 10x higher than common-mode caps? I have previously used the ADC with 2 1k resistors and 3 100nF capacitors without any issues:I will probably use 1k resistor array again, and bump up the Cdiff to 1uF (the application is purely DC, so cutoff frequency doesn't really matter) or maybe reduce the resistors to 100ohm for lower error. Any comments on why they insist on the value of capacitors being an order of magnitude different? Thanks!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 08, 2019, 10:05:42 pm
content: It's simply a caution as stated; if you don't mind a little common mode error at high frequencies, it's alright.Most applications for these things are reading nearly DC anyway, so even the 10Hz internal filter that many offer, can stand to be further supplemented with additional  filtering.Tim

author: David Hess
author_rank: Super Contributor
timestamp: February 09, 2019, 02:15:34 am
content: The mismatch between the two common mode filters on the differential signal converts common mode noise into differential noise so the differential capacitance is made larger to reduce this effect. If you are making measurements in the presence of large amounts of common mode noise, then a different circuit is called for to prevent this problem.

author: wraper
author_rank: Unknown
timestamp: February 09, 2019, 03:02:23 am
content: QuoteThat means signal was quite clean to begin with. Not only C8, C9 should have much lower capacitance, they should be closely matched. And the smaller the difference there is with C7, the closer they should be matched. Using X7R, X5R and similar unstable capacitors for C8, C9 is unacceptable unless it's X2Y cap (2 caps with 1 common terminal). R1 and R2 should be closely matched as well.

author: OM222O
author_rank: Frequent Contributor
timestamp: February 09, 2019, 12:31:39 pm
content: I have not heard of X2Y capacitors before! they seem to be great for this application. also why is 100nF too large? what value would you recommend?

author: wraper
author_rank: Unknown
timestamp: February 09, 2019, 10:22:52 pm
content: Quote from: OM222O on February 09, 2019, 12:31:39 pmIt's not that 100nF is too large. It's that 2 caps connected to GND should have much smaller capacitance than cap between the inputs. As of X2Y, although it's suggested they can be used without a cap between differential inputs, IME it's not a very good idea. I had troubles because of doing so (in noisy environment). Although Johanson dielectrics datasheet says they are closely matched (don't actually specify how well). In practice 2 caps are not that well matched as it turns out, often worse than 5%. But they at least are well matched in their flaws such as capacitance change due to ageing, temperature and applied voltage.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 09, 2019, 10:38:22 pm
content: There are also just general purpose capacitor arrays, but again I don't know that they're matched in any substantial way.The big problem is C0Gs are quite expensive in that size. So are stacked film. (Stacked film also have the problem of leakage due to flux ingress into the stack, that's impossible to wash out. May not be relevant here but is a problem in low-leakage analog filters.) You may consider using THT just because the films are cheaper and smaller footprint. Ask your assembler for a ballpark cost tradeoff (assuming cost is the only motivation for SMT, of course).Tim

author: OM222O
author_rank: Frequent Contributor
timestamp: February 10, 2019, 01:09:07 am
content: Cost isn't purely a motivation but mouser has only 1 C0G(NP0) cap at 1uF which costs about 15 bucks! no thanks XDso it would be ok to use a 100pF X2Y for C8 and C9, as well as a 100nF for C7?I wanted to replace the two resistors R1 & R2 with a resistor network array (1%) which means they won't be closely matched. what effect will unmatched resistors have? I don't think the bias current to ADC is matched better than 1% anyways?

author: coppice
author_rank: Super Contributor
timestamp: February 10, 2019, 01:35:30 am
content: You want the filter to be formed from the 2 resistors and the differential capacitor. Its easy to get 2 fairly well matched resistors, and if there is only one capacitor matching is not an issue there. Now you have rolled off the input signal nicely, in a way which should be fairly consistent, even if your capacitor varies quite a bit with temperature. The balance of the filter means it won't cause a phase shift. However, there is another issue to deal with....The CMRR of most sigma-delta converters is really good. Some of the switched capacitor input ones can have an amazing CMRR. However, they usually have one weakness in their input rejection - high frequency noise, beyond the bandwidth of the input circuitry, isn't rejected very well. That's why its a good idea to have small equal value bypass capacitors from each leg to ground. They will suppress RF pickup. Low value capacitors usually work better, as they perform better at high frequencies. Also, capacitors large enough to form an effective part of the anti-alias filter would need to be accurately matched, so they don't introduce a phase shift. You want these two capacitors to have their ground sides connected directly together. If they ground to different points in the circuitry they can inject any ground plane noise that may exist as a differential signal. Keep the grounds physically adjacent, and they can only input noise common mode. Keep them small, and any tolerance mismatch between these capacitors is seldom sufficient to spoil the circuit's balance enough to be troublesome.So, I don't know why they recommend a 10 times ratio in the capacitances. A 1000 times ratio is usually a better solution.

author: wraper
author_rank: Unknown
timestamp: February 10, 2019, 02:04:35 am
content: Quote from: coppice on February 10, 2019, 01:35:30 amThey recommendedat least10 times. For example, I use 10x ratio in one of my circuits. It's because there may be a HUGE environmental noise starting at few a kHz, yet I need at least 500Hz of bandwidth, and input signal full range is about 10mV. Something like 100pf for bypass is simply not sufficient. And I cannot go too high for cap between inputs as well. So ratio ended up somewhat on low side.

author: OM222O
author_rank: Frequent Contributor
timestamp: February 10, 2019, 02:24:00 am
content: are really small value capacitors (E.g 10pF) even able to provide any filtering? I feel like even parasitic in the circuit would be higher than 10pF ... I'm using 2 heavily stitched ground planes on both sides.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: February 10, 2019, 04:14:59 am
content: You have all the variables needed to solve this -- sample rate (low kHz), and impedance (the series resistor). C = 1 / (2*pi*F*R).Tiny caps won't do anything in the critical band (presumably the 10kHz~10MHz range, above which the internal EMI filtering (if applicable) should take over), at least not without greatly increasing the resistor values, but then the input bias current offset spec will ruin the offset voltage. So, you need big values.Diff cap being bigger is motivated by having more CMRR than diff noise tolerance, plus CM/DM mode conversion as discussed. Diff noise is also diff signal, so it's not a hard rule, it's application dependent. Maybe you'd be better off with an instrumentation amp and active filtering in some applications; that would be fine, too.Tim

author: coppice
author_rank: Super Contributor
timestamp: February 10, 2019, 09:36:28 am
content: Quote from: wraper on February 10, 2019, 02:04:35 amWhy would that make 100pF insufficient? Its only there to suppress RF, not anything close to the band. The big differential capacitor does that.

author: iMo
author_rank: Super Contributor
timestamp: February 10, 2019, 09:43:47 am
content: https://e2e.ti.com/blogs_/archives/b/precisionhub/archive/2015/11/06/three-guidelines-for-designing-anti-aliasing-filters

author: wraper
author_rank: Unknown
timestamp: February 10, 2019, 01:40:43 pm
content: Quote from: coppice on February 10, 2019, 09:36:28 amWith 100pF they start to do anything way above the frequency of CM noise in-amp can cope with, not to say sufficiently suppress it. The typical scenario is that body of a load cell may be electrically connected to a body of 1kW PWM driven BLDC motor (from crap driver without output filter or anything). Most likely nothing would be grounded. FWIW design of previous supplier failed miserably in that scenario.

author: coppice
author_rank: Super Contributor
timestamp: February 10, 2019, 01:47:52 pm
content: Quote from: wraper on February 10, 2019, 01:40:43 pmYou haven't answered my question. Clue: most of the switched cap input sigma delta converters have terrific CMRR figures, and all you need is to do is suppress RF.

author: wraper
author_rank: Unknown
timestamp: February 10, 2019, 02:07:23 pm
content: Quote from: coppice on February 10, 2019, 01:47:52 pmThat was not ADC connected directly. And with ADC it also depends, especially if it has PGA. You may need largish bypass caps or don't need them at all.

author: coppice
author_rank: Super Contributor
timestamp: February 10, 2019, 02:21:57 pm
content: Quote from: wraper on February 10, 2019, 02:07:23 pmThe information in this thread is predicated on the ADC being directly connected. Any other kind of input needs different treatment. The majority of sigma delta converters with switched gains have no real PGA, even though the block diagram frequently shows a PGA to illustrate the functionality. If its a discrete time converter, with a switched capacitor inputs, they usually switch the size of the sampling capacitors to alter the gain.

author: OM222O
author_rank: Frequent Contributor
timestamp: February 10, 2019, 02:33:16 pm
content: I have decided to use a 100nF Cdiff and a 10nF X2Y cap for common mode, with resistor value of 1k as it limits the cutoff frequency to about 8KHz which should be sufficient for the sigma delta ADC to take care of the rest. One thing that was lost/ignored in the conversation was: what difference will mismatched resistors make?If possible I would rather use a resistor array with 1% tolerance (no matching guaranteed) to reduce parts and save space on the PCB.Again, I'm not sure the bias currents are matched that closely anyways?

author: David Hess
author_rank: Super Contributor
timestamp: February 11, 2019, 01:36:45 am
content: Quote from: coppice on February 10, 2019, 01:35:30 amThey are assuming low common mode variation which depends on the application.My experience is that the two common mode suppression capacitors should be as small as possible and only used to remove radio frequency interference and should *not* be relied on for suppressing AC common mode signals within the bandwidth of the ADC because mismatch will convert common mode AC signals to differential signals corrupting any measurement. If common mode signals within the bandwidth of the ADC need to be suppressed, then an integrator from the ADC input to a previous stage should be used to remove the common mode signal.