How many decoupling capacitors should I used with my circuit? - Page 1
Forum section: electronics / beginners

author: Marmotta
author_rank: Contributor
timestamp: June 28, 2021, 06:08:28 pm
content: I replicated an Arduino Pro Micro, as I needed direct access to the D- and D+ pins rather than via USB and it works well enough, but now I need to add four of the following circuits to my board design. My question is whether the decoupling capacitors should also be replicated as many times, will just the current decoupling capacitors be enough for all four microcontrollers, or should I change the values of the current caps to account for the extra microcontrollers? I understand the purpose of decoupling caps, just never really understood how to implement them properly.

author: Siwastaja
author_rank: Super Contributor
timestamp: June 28, 2021, 06:25:41 pm
content: It's thelocationwhich matters. Capacitance is irrelevant as long as it's enough (100n being more than enough already); low inductance matters. The cap needs to be close between the power and ground pin. So usually you use one per device, and further, one per each power pin if multiple pins exist, especially if the power pins are further away from each other.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 28, 2021, 06:37:39 pm
content: I'd prioritize UVCC/UGND and whichever power pins are nearest any ports that are doing work (so, PORTB mostly?). Four caps is probably fine. Short direct routes are okay, circuitous routes are not.If this will be on a 2-layer board, pour ground on both layers and stitch frequently. Mind the negative space between and around traces and pads; you want to stitch either side of any trace of modest length (say, stitching every few cm), at trace crossings, peninsulas, etc. Avoid routing traces in parallel on opposite sides: this completely blocks ground fill across the bus. Parallel routing on a single layer is okay, as long as ground is underneath. Buses crossing at right angles minimizes the unsupported area (note that no ground can pour, top or bottom, where traces cross).If 4 layers, pour VCC and GND inner layers, and you'll have direct routes basically anywhere; you can keep the bypass caps as above, or probably get away with fewer overall.Tim

author: mrkev
author_rank: Regular Contributor
timestamp: June 28, 2021, 09:44:30 pm
content: The real answer is, what is the goal. For it to work? It will probably work with few caps on the power rail just fine. Do you have to pass some EMC tests? Then you'd add a cap to every power pin there is, just to be on the safe side.

author: Marmotta
author_rank: Contributor
timestamp: June 28, 2021, 11:53:24 pm
content: It doesn't have to pass any sort of test, but ideally be stable enough to work reliably.

author: radiolistener
author_rank: Super Contributor
timestamp: June 29, 2021, 03:12:07 am
content: Two capacitor will be enough. One ceramic to filter high frequency noise. And one high capacitance for low frequency noise.Two types because one type cannot filter high and low frequency simultaneously due to physical limitations (parasitic ESR, inductance).The main concern here is the wire distance between capacitor and the chip pins. This distance should be as close as possible to reduce inductance and inductive/capacitive coupling with other signals.It's better to place ceramic capacitor more close to the chip because HF is more sensitive to the wire inductance.For better low pass filtering there is a sense to add third electrolytic capacitor.For example 100-1000 pF (ceramic) + 100 nF + 47 uF (electrolytic).

author: Siwastaja
author_rank: Super Contributor
timestamp: June 29, 2021, 06:52:41 am
content: Quote from: radiolistener on June 29, 2021, 03:12:07 amAnd again, this myth lives so strong.Just don't. You don't need the two dips in the impedance plot. You need low enough impedance over the whole frequency range that matters. A larger capacitance value does that. HF performance is only limited by the parasitic inductance, which only depends on the physical construction and package size.100-1000pF is available in the same package size and same parasitic inductance as 100nF. You gain nothing with a smaller capacitance value.For best results, use the 100nF in the smallest package you can handle (that would be typically be 0402) and place it as close to the pin as you can. It does equally well for "high frequencies" than a 1000pF cap in the same 0402 package placed equally close. Don't be misled by looking at impedance plots that are plotted with different scales. Plot on the same graph with unified scales and you see what I mean.If 100nF is not enough (for example, high peak current device driving large external capacitances, say a large gate driver) then just use 1uF, still available in 0402. The frequency response goes quite low and still no compromise regarding high frequencies.Addition of significantly larger elcap, as already shown by the OP, is a good idea thanks to its high ESR which is useful in damping oscillations.So OP is doing fine.

author: Kleinstein
author_rank: Super Contributor
timestamp: June 29, 2021, 01:28:33 pm
content: The MLCC caps are relatively cheap. So if in doubt have place for every VCC/GND pair of pins. For just getting is run and no extra special needs, like passing EMI limits or low jitter clock one can get away with rather little, at least most of the times. Multiple low ESR caps in parallel can be tricky and worse, as there can be resonances with the traces in between. So ideally have some damping resistors, not just many caps.The position (close to the chip) of the 100 nF (or similar small size) cap is important. The position and capacitance of the electrolytic cap is less important - here the ESR may be more important feature, acting a RC damper. So low ESR is not always better here.

author: gf
author_rank: Super Contributor
timestamp: June 29, 2021, 01:55:18 pm
content: Regarding this topic, I did like.

author: bobbydazzler
author_rank: Regular Contributor
timestamp: June 30, 2021, 07:35:07 am
content: Quote from: gf on June 29, 2021, 01:55:18 pmInteresting vid thanks, I wonder if there's any difference in capacitance size for filtering purposes instead of decoupling. For decoupling it seems best to just use 1uf mlcc in the smallest size possible(100nf is probably good enough 90% of the time but using just 1uf is less parts to buy).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 30, 2021, 07:43:17 am
content: For that matter, 10nF is enough for most purposes. Not sure why 0.1u caught on, but whatever.Tim

author: Siwastaja
author_rank: Super Contributor
timestamp: June 30, 2021, 10:15:21 am
content: If an IO port with 20 pins total, each driving 50pF capacitive load, or total of 1nF if simultaneously switching, from capacitive divider perspective, a 100nF is definitely enough for 1% ripple voltage (worst case first order approximation) seen over the capacitor, but 10nF is marginal. Although with 20 pins you'd usually have an another Vcc pin already.With today's availability of high-capacitance MLCCs in small packages, it really doesn't matter much. You could always use say 47nF (which was a surprisingly widely used decoupling cap with discrete logic and ICs I think) but 100nF and even 1uF are available in the same package, practically same cost (especially if you calculate any price for the PCB real estate, stocking or ordering, and placement), and excess capacitance rarely isn't a problem even with 1u parts although I do admit if you have a lot of them in parallel the total can be significant from surge current perspective and damping it becomes even more important.100n rarely causes problems by being too little or too much, maybe that made it so popular. And even if you end up using the worst offender Y5V parts, you still have at least some 20nF actual... Which is likely enough, usually at least.

author: SteveyG
author_rank: Unknown
timestamp: June 30, 2021, 10:23:08 am
content: Quote from: Siwastaja on June 29, 2021, 06:52:41 amI agree with you. I'd be surprised if you'd need 1 uF though, even a 1 nF 0402 or 0201 has low enough parasitics to get the job done.

author: Siwastaja
author_rank: Super Contributor
timestamp: June 30, 2021, 10:32:59 am
content: Put simply, the 1nF part has low enough inductance (simply: wiring length) that it can supply chargequicklyi.e., despite quickly rising current. But a 100nF part is completely equal in this regard because it has the same length from the IC to the first (bottom) "plate" inside the capacitor. It has larger number of stacked plates, also maybe closer to each other each providing more capacitance.What 1nF part lacks is enough capacitance to continue supplying for the pulse the load expects. It's simply too small. A 100nF part does not have this issue.A combination of 1nF and 100nF is not much better than a single 100nF part and not any better than two paralleled 47nF parts.

author: harerod
author_rank: Frequent Contributor
timestamp: June 30, 2021, 12:00:56 pm
content: Questions about bypass capacitors are a staple question in any electronics forum. I just wanted to add that there is no need to blindly believe all the answers given. Both major aspects (general frequency response and pulse response in particular) can be measured "at home", at least if one has access to a spectrum analyzer and an oscilloscope.Here are some simple two layer example boards that I use to analyze new filter components:https://harerod.de/applications_eng.html#EmiFilTestThey have either standard layout patterns for filters or a single line, which can be altered with a sharp knife to accommodate different footprints.I can only recommend playing with filter setups, it is fun and educational.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 30, 2021, 09:46:48 pm
content: Quote from: Siwastaja on June 30, 2021, 10:15:21 amYes, in exceptional cases like this, it would be prudent to use more. It's not instantaneous, so the exact figure depends how much is available from nearby sources as well. With routed VCC, depends on the Fc and Zo of the route; with planes, Zo can be much lower and you might not care.Back in the days of discrete logic gates, octal bus drivers were the most exceptional, and that's still only eight. For general gates that can't change all at once, and aren't so heavily loaded, less will do.A higher ripple voltage may also be tolerable; 10% would probably be pushing it, but less than that I would expect low BER.On-chip PDN has the same problem; evidently they're quite tolerant of ripple, enough that self-capacitance (of inactive gates, during a given cycle) suffices to cover it. And a few stacked VDD/VSS metal layers doesn't hurt.What with the days of discrete logic being long gone, this isn't of much importance anymore I suppose. In any case, just have enough capacitance, or in general, low enough ⌈Zo⌉, to meet the device requirements as it's connected and used.A shame literally no one defines maximum supply impedance, or characterizes their power pins in a handy way (possibly in IBIS models but I never had to use 'em).QuoteI think I've seen 10, 22, 47 and 100nF appear commonly on TTL boards, yeah.Heh, a few years ago during the capacitor shortage, it might've even paid to make such a change. But that's a temporary thing... like today's chip shortage, although it's worse this time around.QuoteYep, not sure that there's even any meaningful cost difference, at least until you're buying pallets at a time.Tim