Fudging with manufactuerer footprints - Page 1
Forum section: electronics / general

author: i509VCB
author_rank: Contributor
timestamp: November 28, 2024, 07:15:05 pm
content: Before I start I'm not looking for any FCC certification of this layout at. Nor will I build this layout.To begin, the nRF5340 is available in what Nordic calls an aQFN-94 package. Of course what makes this a challenge is that the pin pitch is 0.4mm and it's a hybrid of a BGA and QFN package. Nordic's datasheets suggest you use buried micro vias for the inner row. However because I tend to be stingy, I would like to avoid buried vias. Even using JLCPCB's 0.25/0.15mm vias with via-in-pad, I you can't meet the design rule requirements.On the right is the regular footprint. I was thinking if I reduced the size of the exposed pad on the PCB I could fit vias in without via in pad. It seems to work with a 0.5mm reduction on each side and then using 0.25/0.15mm vias (left). This seems to pass the design rules for JLCPCB at least, but is awfully cursed.I would think this type of footprint change would be discouraged due to assembly reasons. Assuming the inner vias are tented I assume this is still a terrible idea?

author: Whales
author_rank: Super Contributor
timestamp: November 28, 2024, 08:51:11 pm
content: > Nor will I build this layout.Where is your adventurous spirit? You've come this far!Are tented vias a bit lumpy sometimes? I might be remembering something else, but I swear I've seen little peaks of soldermask above some tented vias before. Would be worth keeping an eye out and flattening them if need be.The solder surface tension forces on the metal base can over-power the solder-tension forces of the little pads, causing misalignment during reflow. With the large metal base on a smaller pad I am not sure if this will be the same or worse. Using less solder on the pad might help?

author: ataradov
author_rank: Super Contributor
timestamp: November 28, 2024, 09:23:34 pm
content: If the EP is actually this big, don't do it. You will get shorts. Not on all board, but on enough to be annoying and costly. Solder mask will be thinner around the edges of the vias.I did this for prototypes and I just did 3 boards. One out of 3 was shorted after manual assembly. Automated assembly may be a bit more gentle, but this experience convinced me to never do that again.And vendors doing packages like this should really reconsider their life choices.

author: thm_w
author_rank: Super Contributor
timestamp: November 29, 2024, 09:57:53 pm
content: If its a very low IO count design, you might get away with just removing a bunch of the pads. Doesn't have to be the entire row.Quote from: Whales on November 28, 2024, 08:51:11 pmSure there is soldermask over the copper but the height is not much, 20um or so. Normal solder thickness should be more than that ~70um.Its a good question though, if you look at the package image it looks like it has no balls? So they just rely on solder paste alone. Weird package for sure.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: November 30, 2024, 01:47:11 am
content: A check shows that the center pad is indeed this big:[ Attachment Invalid Or Does Not Exist ]In general, you can't rely on solder mask to be a reliable insulator.You can try to add a layer of silkscreen over your via's too, but that will increase the height and may influence soldering reliability.I had a look at theirhttps://nsscprodmedia.blob.core.windows.net/prod/software-and-other-downloads/reference-layouts/nrf5340/nrf5340-xxaa-reference-layout-1_2.zipby opening their second example in KiCad, and they use micovia's inside the pads themself.My suggestion is you write a cursing letter at nordic for making such stupid packaging decisions, and then use some other IC. ARM + Bluetooth does not sound very special.

author: Niklas
author_rank: Frequent Contributor
timestamp: December 02, 2024, 10:08:12 pm
content: Nrf5340 is also available in a BGA package that is not a full grid. Might give some better breakout as there is a ring without balls where you can add vias. I just finished a layout with it, but that used microvias in pad.- Do you need all the pins or can you make some clever selection to spread out the used pins?- Some signals might tolerate to be routed through an additional I/O pad set to input. Can get signals out without vias underneath the micro.- The breakout shown in your example will cut the 0V/GND plane's connection to the thermal pad when using drilled through vias. Removing unused annular rings on inner layers might help, but keep at least 0.15 mm clearance from the hole edge to copper plane.

author: i509VCB
author_rank: Contributor
timestamp: December 03, 2024, 04:57:22 am
content: Quote from: Doctorandus_P on November 30, 2024, 01:47:11 amBelieve me I'm no fan of the packages that Nordic provides in their larger parts. A 0.65mm boring BGA would be a blessing and that's saying something. Yes ARM + Bluetooth isn't very special, but I find that the other vendors are a real pain in the ass to use from software. Yes writing your own Bluetooth stack is a very bad idea, but softdevice or running zephyr on the network core sounds a lot less painful than trying to make the mess I've seen from TI and etc work.At least the Nordic wifi ICs come in a QFN, but those are a whole world of hurt in software in their own way (you need to port wpa-supplicant or write your own WPA2/WPA3 implementation).If I do want to use the Nordic parts I will probably just buy a module. I got in a few 52833 modules the other day for something else.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: December 04, 2024, 08:33:07 pm
content: ... or just keep close to their recommended layout with micro via's. As far as I understand this is relatively expensive for prototypes and small series (you can't make use of the cheap pooling services), but it does not matter very much for bigger series.For small quantities using modules does indeed seem a better option. This puts your headaches to someone else and you get the benefit of an already certified radio / antenna section. It may also reduce cost if this results in a lower layer count for your own PCB.