Colpitts voltage controlled oscillator - Page 1
Forum section: electronics / rf-microwave

author: Bromsnortor
author_rank: Newbie
timestamp: June 17, 2022, 04:19:37 pm
content: Hi everyone, I am trying to build an oscillator that can be controlled with voltage. I will do this by replacing the c4 capacitor with two varicaps. I calculated the frequency to be 90 Mhz, but it does not start oscillating . I think the loop gain is too small but when I calculate it it should be fine. Does anyone have suggestions?

author: TimFox
author_rank: Super Contributor
timestamp: June 17, 2022, 05:25:14 pm
content: What value of ESR or Q on the inductor did you use for the calculation?

author: rf-fil
author_rank: Regular Contributor
timestamp: June 18, 2022, 04:29:56 am
content: This model works OK for me, except my LTSpice doesn't have the BC550 model (Is Analog Devices fucking with LTSpice?) so I used 2N2222. IF it doesn't work for you, you might not be setting up the right kind of simulation or your BC550 model is wrong.Anyway, this is a theoretical simplified model and will not work as a real circuit. Here's what I would do in real life: Faster transistor, maybe BFR93 or similar. R2 and R3 can easily be smaller, for a faster ramp up of the base bias, around 10k is reasonable. The inductor is way too small. The value is comparable with normal circuit parasitics. For example the BC550 leads will easily be 10nH each. I would use something like 68nH to 100nH, a high-Q model. A Q of at least 50 is best. C1 and C2 are way too large for this frequency. With 100nH, the capacitors would be around 68pF, a more typical value. Also, are you considering how to get the RF out of the oscillator? Wherever you tap the RF out, it will load the oscillator, and change its frequency, or even stop it from running. The load has to be included in the design calculations. A typical load, such as a common collector buffer stage will have a load impedance of a few hundred ohms in parallel with a few pF capacitance. Oh, and don't forget supply bypass, a 100nF cap from +10V to ground, very close to the inductor.

author: Bromsnortor
author_rank: Newbie
timestamp: June 18, 2022, 07:03:43 am
content: Thank you for your response, I tried it with a lower time step of 1n and that works. I know that the values are not realistic and that I have to change them but I calculated the oscillation frequency expressed in L1 and the capacitors so I can change them however I like as long as the loop gain stays bigger than 1 (also calculated that). Thank you for your advice to add a buffer, I was planning to do this with a ccc or a cdc. Can you explain why I need 100nF with 100 Mhz? What value do I need if I am doing 300 Mhz?

author: iMo
author_rank: Super Contributor
timestamp: June 19, 2022, 05:03:33 pm
content: Well, it takes some time to get a "feeling" for the radio-electronics..".ic" means "initial conditions" - that may help you to start the simulation.R,L,C values - well, that is something you have to learn..

author: mawyatt
author_rank: Super Contributor
timestamp: June 19, 2022, 06:12:23 pm
content: One of the more difficult things with simulating a high "Q" LC type sinusoidal oscillator (or equivalent model), is trying to evaluate the steady state conditions. This can require a lengthly simulation time (small time steps), which infers a lengthly real time, even on a fast computer.Without diving into lots of details about simulations and numerical analysis here's a technique we developed back in the 80s to help, long before Cadence came up with their similar techniques.Find the DC bias operating point and the active device currents. Create a SPICE PWL ideal current source with 4 points. Estimate the desired circuit final frequency and set the PWL current source to 0, 0 | tp/4, Ibias | 3tp/4 -Ibias and tp, 0, where tp is the desired oscillator waveform period. This creates a triangular waveform the resembles a sine wave that has a peak to peak of 2* Ibias, no DC offset, averages to zero, and closely produces a waveform similar to the oscillator sine wave. Being an ideal current source it has no effect on the circuit outside the PWL timeframe other than "kick starting" the oscillator very close to the final results. If the Ibias is the inductor DC current to the active device (for example drain or collector), then the current source should be straped across the inductor. Experiment with different locations, but we found generally across the main frequency controlling inductor yielded the best overall results.This technique works very well if implemented properly and can save significant simulation time, especially in high "Q" oscillators like crystal, ceramic, and SAW types....and very easy to utilize. A study of the Barkhausan Criterion and Numerical Analysis can help understand the nuances of simulating high "Q" oscillators. Cadence may have some useful videos on this as well and one might find helpful.Best,

author: BigBoss
author_rank: Regular Contributor
timestamp: June 20, 2022, 04:08:14 am
content: Is it working with a standard Load ?? (50 Ohm )

author: iMo
author_rank: Super Contributor
timestamp: June 20, 2022, 11:13:33 am
content: @mawyatt: it seems the kicking up the osc with PWL works as well..PS: It does not start without the ".ic" directive or the PWL kick..

author: iMo
author_rank: Super Contributor
timestamp: June 20, 2022, 11:18:07 am
content: Quote from: BigBoss on June 20, 2022, 04:08:14 amYou have to do an impedance matching when considering 50ohm load, imho..