why does SPI flash take between 45ms and 400ms to erase a sector? - Page 1
Forum section: electronics / projects

author: incf
author_rank: Frequent Contributor
timestamp: May 08, 2025, 04:35:37 pm
content: Winbond's W25Q32 SPI flash memory IC is rated to erase a sector in between 45ms and 400msat room temperature.(edit: at any temperature?)What causes the time to be variable?After receiving the command to erase a sector is it reading back the contents and re-erasing until the memory reads all '1's or something?

author: ataradov
author_rank: Super Contributor
timestamp: May 08, 2025, 05:15:44 pm
content: As flash ages, it becomes slower to erase due to physical damage erase process causes. It is likely that a new one will be on a faster side. Voltage variations also affect the erase time.It does detect the erased state, but not by reading back the value, but on a lower analog level. It has to do that anyway, since they would want to avoid over-erased state, which would cause programming errors.

author: iMo
author_rank: Super Contributor
timestamp: May 08, 2025, 05:26:56 pm
content: Quote from: incf on May 08, 2025, 04:35:37 pmWhere the "at room temperature" comes from? I cannot see it in the datasheet.The specs MIN MAX are for a range from -40 to +85/105C usually..

author: incf
author_rank: Frequent Contributor
timestamp: May 08, 2025, 05:33:12 pm
content: Quote from: iMo on May 08, 2025, 05:26:56 pmYou're right I think, I saw several footnotes saying "Tested on sample basis and specified through design and characterization data. TA = 25° C, VCC = 3.0V" and assumed the worst.

author: iMo
author_rank: Super Contributor
timestamp: May 08, 2025, 06:25:49 pm
content: In datasheets there are usually stated the values at MIN TYP MAX.TYPically are at ambient and MIN and MAX are for the entire temperature range (and or other param ranges).Also there are notes you may find below the tables with small indexes sometimes, thus you have to find the specific parameter in the table which they refer to..

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: May 08, 2025, 08:06:45 pm
content: I think the erase time may also depend on the content of the memory

author: incf
author_rank: Frequent Contributor
timestamp: May 08, 2025, 08:09:38 pm
content: At a low level what is the exact process the flash controller carrying out during a sector erase cycle?I imagine that will provide a hint towards all of the different variables involved.

author: amyk
author_rank: Super Contributor
timestamp: May 09, 2025, 03:24:49 am
content: Quote from: ataradov on May 08, 2025, 05:15:44 pmIsn't it the other way around? As the insulating layer wears, it's easier to push the charges through it (and when it gets leaky enough to not hold the charge for more than a moment, you'll start getting program errors too.)

author: ataradov
author_rank: Super Contributor
timestamp: May 09, 2025, 04:47:07 am
content: I'm not 100% sure of the physics involved, but I think it gets slower for whatever reason. I may be wrong here.

author: bson
author_rank: Unknown
timestamp: May 11, 2025, 04:51:48 am
content: Perhaps it depends on the exact gate geometry of the cells... it could be 45ms is what it should be for a 4k sector, but they'll tolerate variations up to 400ms?

author: incf
author_rank: Frequent Contributor
timestamp: May 11, 2025, 11:35:30 am
content: See attached graph.I wonder if these graphs are for a particular type of data. It does not appear to vary very much for this particular device and test vs temperature and cycle count. figure 2 from "Temperature Impacts on Endurance and Read Disturbs in Charge-Trap 3D NAND Flash Memories " athttps://www.mdpi.com/1285628