8-bit serial LCD interface? - Page 1
Forum section: electronics / general

author: technix
author_rank: Super Contributor
timestamp: November 11, 2017, 03:07:38 pm
content: I have seen various chips claiming the existence of a "8-bit serial" interface for RGB LCD panels, with the signals HSYNC, VSYNC, DOTCLK, ENABLE and 8 data bits.* What is this interface?* What kind of interface chip do I need to connect this to a standard 24-bit parallel RGB LCD interface?

author: Canis Dirus Leidy
author_rank: Regular Contributor
timestamp: November 12, 2017, 11:25:07 pm
content: Quote from: technix on November 11, 2017, 03:07:38 pmCan you, please, give example of such chip? Because this: "HSYNC, VSYNC, DOTCLK, ENABLE and 8 data bits" looks like signals of something like "RGB interface" from ILI9325 datasheet (only with 8-bit bus instead of 18-bit), but this is not a serial interface.

author: retrolefty
author_rank: Super Contributor
timestamp: November 13, 2017, 12:03:52 am
content: Quote from: technix on November 11, 2017, 03:07:38 pmNowadays the term "serial interface" includes I2C, SPI, as well as traditional 8-bit UART, is used bymany Asian product (modules) suppliers. It can be a bit confusing to beginners.

author: technix
author_rank: Super Contributor
timestamp: November 13, 2017, 01:10:06 am
content: Quote from: Canis Dirus Leidy on November 12, 2017, 11:25:07 pmThis kind of interface is mentioned in the datasheets of i.MX233 and SSD1963 as potential RGB TFT LCD high speed interfaces.

author: technix
author_rank: Super Contributor
timestamp: November 13, 2017, 01:12:14 am
content: Quote from: retrolefty on November 13, 2017, 12:03:52 amThis is some kind of modified RGB TFT LCD interface that uses three transfers per pixel...? It is likely not Asia-specific as those are used in datasheets for SSD1963 and i.MX233.

author: Canis Dirus Leidy
author_rank: Regular Contributor
timestamp: November 13, 2017, 03:02:07 am
content: If I google correctly, "serial RGB" is an interface for TDM (Time Division Multiplexed) LCDs such as LMS250GF03. So, yes. This isQuote from: technix on November 13, 2017, 01:12:14 am

author: technix
author_rank: Super Contributor
timestamp: November 13, 2017, 03:07:02 am
content: Quote from: Canis Dirus Leidy on November 13, 2017, 03:02:07 amSeems like it. Now how can I convert this into a standard 24-bit RGB stream? Is there any ASSP chip or do I have to use my own CPLD?

author: MT
author_rank: Super Contributor
timestamp: November 13, 2017, 02:15:24 pm
content: For STM32 users, SSD1963 driver.http://en.radzio.dxp.pl/ssd1963/

author: dmills
author_rank: Super Contributor
timestamp: November 13, 2017, 03:03:17 pm
content: Hsync, Vsync, dotclock and enable says old school video interface to me, which way are you going?Do you need to interface an 8 bit (three transfers per pixel) device to a 24 bit panel (Two octal latches and some toy logic required), or are you seeking to interface some chip that produces 24 bit data to a display device using the 8 bit bus (You will need a clock at three times the pixel clock rate, a small FPGA is often the simplest way)?My usual party trick with screens (Because the miserable things keep going obsolete!), is a small FPGA to interface whatever I have to whatever I need, it insulates the rest of the system from the front panel pain.Regards, Dan.

author: technix
author_rank: Super Contributor
timestamp: November 13, 2017, 03:09:42 pm
content: Quote from: dmills on November 13, 2017, 03:03:17 pmSo rounding up, I can just stick something like an EPM240 MAX II CPLD between the i.MX233 and the LCD socket, and code the octal latches and whatever in there? Should I need to swap pins just change the programming in the CPLD?

author: dmills
author_rank: Super Contributor
timestamp: November 13, 2017, 04:17:52 pm
content: You will need at least one PLL or a clock running at a reasonable multiple of the pixel clock, to register the three bytes and clock them into the screen.Regards, Dan.

author: technix
author_rank: Super Contributor
timestamp: November 13, 2017, 07:22:09 pm
content: Quote from: dmills on November 13, 2017, 04:17:52 pmThere is a DOTCLK that allows me to latch each of the three bytes. Isn’t that enough?If I go the FPGA route, is there any small FPGA, preferable with internal Flash, that have 40 or so I/O pins and comes in a TQFP48 or LQFP64 package?

author: jmelson
author_rank: Super Contributor
timestamp: November 13, 2017, 10:13:47 pm
content: Quote from: technix on November 13, 2017, 07:22:09 pmYou probably don't need a full FPGA. Xilinx has the XC95xxXL series of CPLDs. There is a 44-pin package of that. They also have the Coolrunner 2 (XC2Cxxx) series that are more like FPGA architecture, also available in 44-pin package. Both of these families are non-volatile. The XC9500 series are also 5V tolerant.Jon

author: legacy
author_rank: Super Contributor
timestamp: November 14, 2017, 12:44:48 pm
content: Quote from: technix on November 13, 2017, 03:09:42 pmSure, you don't know what you are talking about, but you need a CPLD

author: technix
author_rank: Super Contributor
timestamp: November 14, 2017, 02:33:16 pm
content: Quote from: legacy on November 14, 2017, 12:44:48 pmNext time read through the whole thread before commenting, especially if the thread is less than a few pages long. You have missed a few important posts where the discussion made progress and the CPLD conclusion is not pulled out of my ass. If you don't want to bother reading up a few posts, don't comment (especially with a f***ing annoying video) just to distract others.This will be my last time giving you, specifically YOU behind the handle "legacy", a TL;DR. Read carefully: I have found a few LCD drivers, like Solomon Systems SSD1963 and NXI i.MX233 that have a "8-bit serial" DOTCLK mode for LCD panels. Such interface isn't that common among actual display panels, which usually ask for a 16-bit RGB656, 18-bit RGB666 or 24-bit RGB888 interface in DOTCLK mode. I am guessing that there may be some kind of ASSP chip that can convert this "8-bit serial" interface to a normal 24-bit interface, however I did not find any. The suggestion by dmills is a small CPLD to latch the data coming from the LCD controller, expanding the time multiplexed RGB into a standard RGB signal.

author: dmills
author_rank: Super Contributor
timestamp: November 14, 2017, 04:05:45 pm
content: If coming from a CPU type thing with an 8 bit bus, you can sometimes get away with just two octal latches and a data clock at three times the pixel clock rate (Which is usually present with such interfaces, check the timing diagram).But first, check the screen datasheet, some of them have such an 8 bit mode already via suitable strapping of the configuration pins and suitable register settings.One warning, you will sometimes find that the ability to configure which way around a screen is mounted goes away when using the direct video modes, ILI looking at you....Regards, Dan.

author: technix
author_rank: Super Contributor
timestamp: November 14, 2017, 04:56:05 pm
content: Quote from: dmills on November 14, 2017, 04:05:45 pmSo far none of my screens claim to support this interface through strapping... Maybe I need to re-read the datasheets.At least for the i.MX233 board I can leave the screen flipping to the Linux kernel and the framebuffer interface. For bare metal interfaces I can insert a similar indirection layer too.

author: jaromir
author_rank: Unknown
timestamp: November 14, 2017, 07:56:49 pm
content: Many of cheap and "dumb" 320x240 monochrome LCDs do have interface with 8 bits of data, VSYNC, HSYNC and one or two more signals. Smaller displays, like 160x128 do usually have only 4 data lines. The drivers in those displays are nothing but shift registers with latches, needs to be refreshed continuously and with quite strict timing (not trivial to do with MCU, somehow easier with DMA). I have 640x400 LCD made like this; with HD61105/HD61104. The "intelligent" display drivers like T6963 do expect to be connected to those serial latches.Often, the "dumb" displays are are "smart" displays with unpopulated footprint of T6936 and stuff.

author: technix
author_rank: Super Contributor
timestamp: November 14, 2017, 08:29:56 pm
content: Quote from: jaromir on November 14, 2017, 07:56:49 pmI am trying to connect a 800x480 one... Am I pushing it?Speaking of i.MX233, it also have a System mode with VSYNC - it uses the standard 8080 or 6800 style 8-bit parallel interface to talk to the LCD controller, but also emits a separate VSYNC signal. What interface chip can take that? I have checked RA8875 and SSD1963 (both fairly common on LCD modules sold in China) but neither accepts this VSYNC.

author: jaromir
author_rank: Unknown
timestamp: November 14, 2017, 08:43:54 pm
content: The 8080/6800 controller mode with VSYNC is really a bit weird to me, as the VSYNC to drive pixel shift registers is usually generated by the controller itself.Oh and regarding the FPGA/CPLD - recently I started playing with small ICE40 FPGAs from Lattice. Those are made in smaller packages too, while costing as much as small CPLDs, but otherwise small CPLD is totally fine choice.

author: technix
author_rank: Super Contributor
timestamp: November 14, 2017, 09:27:59 pm
content: Quote from: jaromir on November 14, 2017, 08:43:54 pmWhat kind of fps can standard 6800/8080 mode get? Can I even think about 800x480@30fps on RA8875 or SSD1963? What about 60fps?How much would Lattice dev kit cost? Or I would just stick to the Altera MAX II CPLD (100 pin smallest package)

author: dmills
author_rank: Super Contributor
timestamp: November 15, 2017, 01:07:20 am
content: The elephant in the room for FPS is far more a case of "What will the screen accept", you HAVE to meet the appropriate timings in this mode, check the data sheet.I have to admit that unless I am doing something quite explicitly video with a honking great FPGA, I would usually wimp out and use a display with integrated controller, they often have the same interface, but the on chip framebuffer and readout logic makes a lot of the timing pain die.regards, Dan.