Limitations of FPGA-based ADC - Page 1
Forum section: electronics / projects

author: mark03
author_rank: Frequent Contributor
timestamp: January 18, 2017, 06:28:01 pm
content: Does anyone know if it is feasible to obtain 12-16 bit performance in few-kHz bandwidth from an FPGA-based sigma-delta ADC using the FPGA's LVDS inputs as comparators, and minimal external components? There are plenty of examples on the web using a single-order loop with external RC integrator to achieve ~ 10 bits ENOB at high oversampling factors. See e.g.http://www.latticesemi.com/~/media/LatticeSemi/Documents/WhitePapers/AG/CreatingAnADCUsingFPGAResources.PDF?document_id=36525Doing better would require a second-order sigma-delta design, but I don't have a good grasp of how the nonidealities of the LVDS comparators and ordinary digital output pins would limit performance in that scenario. I barely understand enough to be dangerous, so I've been searching (in vain) for an "existence proof" before proceeding any further.The reason for doing this, is that I have an application where I want to transmit some kHz-bandwidth analog signals from a rotating platform by optical means. I thought I could use sigma-delta modulation to output a Manchester-encoded bit stream for driving an LED, but almost nobody makes sigma-delta modulators as standalone building blocks. What I want is something like the Maxim/Dallas DS8102 (now discontinued).I could use pre-packaged ADCs and an MCU, of course, but the digital requirements are fairly minimal so the idea of doing all of this in a single ice40 or similar FPGA is appealing.

author: pitagoras
author_rank: Regular Contributor
timestamp: January 18, 2017, 07:56:25 pm
content: How much is "some Khz bw"? Linear has for example LTC2440.

author: langwadt
author_rank: Super Contributor
timestamp: January 18, 2017, 09:29:57 pm
content: Quote from: mark03 on January 18, 2017, 06:28:01 pmwhy would an FPGA be appealing compared to one of the numerous MCU with build-in ADC?both ADI and TI have sigma-delta modulators

author: mark03
author_rank: Frequent Contributor
timestamp: January 18, 2017, 11:10:19 pm
content: Quote from: langwadt on January 18, 2017, 09:29:57 pmI might be able to get by with 12 bits, but 14 or 16 would be preferable, and in my experience there aren't many built-in ADCs with that level of performance. Also, the rotating platform is battery powered, and I might be able to achieve a lower power consumption with one of the little Lattice FPGAs than with an MCU running at full tilt. But you may be right. Doing this with a bit of custom logic just seemed like a potentially elegant solution.Quote from: langwadt on January 18, 2017, 09:29:57 pmYes, ST too. The ADI and TI parts have built-in isolation, which I don't need, require a 5V rail, and are expensive. The ST part is better, but all of them require separate clock. That's what I liked about the DS8102; it built in Manchester coding for single-bit output.

author: timb
author_rank: Super Contributor
timestamp: January 18, 2017, 11:57:34 pm
content: FWIW, the Cypress PSoC 5LP series has programmable Delta-Sigma Modulator blocks you can use (along with up/down mixers and LPF blocks). Might be worth looking into!Edit: The PSoC Analog Coprocessor has it as well, if you don't need the MCU and programmable logic functionality too.

author: ve7xen
author_rank: Super Contributor
timestamp: January 19, 2017, 02:17:24 am
content: Quote from: mark03 on January 18, 2017, 11:10:19 pmDefinitely seems elegant, but a lot more work - perhaps that's half the fun! They're not that hard to find though. TI has MSP430F2013 with integrated 16-bit ?? ADC for about $3 in onesies. ST does an STM32 series with Cortex M-something and 16-bit ADC as well. NXP/Freescale has the Kinetis K series with 16-bit SAR ADC. I'm sure there are others, though I don't think even the cheapest of them will come in cheaper than the smallest iCE40, though by the time you add the configuration flash it'll be close.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 19, 2017, 04:29:30 pm
content: The very small FPGAs may not me enough to implement a second order SD converter (with decimation and filter). Sending the raw data of the SD, before SD will require a relatively high data rate and thus extra power.Also power consumption tends to be higher with a FGA than an µC. With 12 Bit ADC there are plenty of µC to chose from, and a few with internal 16 bit ADC or SD converter. Oversampling could give you a few extra bits of resolution, though not accuracy. I don't think the µC will have to run at high speed more like sleeping most of the time.

author: mark03
author_rank: Frequent Contributor
timestamp: January 19, 2017, 09:14:34 pm
content: Quote from: Kleinstein on January 19, 2017, 04:29:30 pmMy goal, remember, is to transmit the SDM 1-bit stream optically, so I don't want the decimator. That's where most of the silicon area and power lies.Back to the original question, which no one has answered thus far: I did manage to find a single example of an actually implemented (as opposed to merely simulated), FPGA-based, second-order SD ADC:http://www.diva-portal.org/smash/get/diva2:650302/FULLTEXT01.pdf(See chapter 6.) He is getting ~ 80 dB SNR, much better than the two-resistors-and-one-capacitor design.This is a hobby project for me, so indeed, the learning is half the fun, although I wish I had time to pursue all of these loose ends.

author: hli
author_rank: Frequent Contributor
timestamp: January 21, 2017, 09:24:22 pm
content: Quote from: timb on January 18, 2017, 11:57:34 pmThe PSoC5LP even comes with a 20bit Delta-Sigma ADC as ready-to-use component

author: kony
author_rank: Regular Contributor
timestamp: January 21, 2017, 09:45:24 pm
content: Is the manchester encoding mandatory?Look up sigma delta modulators from Avago, errr... Broadcom it is now, I think?Texas instruments makes quite a lot of D/S modulators as well. They actually offer even dedicated digital filter chip.http://www.ti.com/product/amc1210http://www.ti.com/product/ADS1205http://www.ti.com/product/ADS1204https://www.broadcom.com/products/optocouplers/industrial-plastic/isolation-amplifiers-modulators/sigma-delta-modulators

author: mark03
author_rank: Frequent Contributor
timestamp: January 23, 2017, 07:09:05 pm
content: Quote from: kony on January 21, 2017, 09:45:24 pmThe one-bit signals have to travel optically from the rotating to the non-rotating electronics, so multiplexing clock+data would be advantageous.I took another look at the TI parts and indeed, the dual-channel, non-isolated ADS1205 looks nice, although I'd probably still need the programmable logic to mux the channels, manchester encode, etc., and it requires a 5V rail which is always a hassle. So the FPGA-only solution is still looking better.

author: kony
author_rank: Regular Contributor
timestamp: January 23, 2017, 07:19:21 pm
content: The +5V rail is just for the analog section of the modulator trough, digital works down to 2,8V - so no hassle interfacing the glue logic at all.Depends if you need guaranteed INL/DNL and spurious free dynamic range or not - what is the application in question again? You said somethig about 12-16b ENOB, this is simple way how to obtain it.

author: mark03
author_rank: Frequent Contributor
timestamp: January 24, 2017, 04:39:12 pm
content: The hassle is obtaining the 5V rail in the first place. Difficult in battery-powered equipment.Application is the front end of an cylindrical electrostatic field mill.

author: Kleinstein
author_rank: Super Contributor
timestamp: January 24, 2017, 05:11:29 pm
content: For a field mill, I would expect a 12 bit adc good enough. As the ADC is sampling an AC waveform, there will be significant oversampling and averaging when you get the DC result. So the DC result could be considerably higher resolution than the ADC used. So my best bet would be a small µC that includes a 12 Bits ADC.For sending raw SD data would need a high data rate and this needs extra power for the transmission. So the extra power needed to reduce the data rate to a lower speed, but higher resolution stream is well spend. It depends on the optics, but I would not be surprised if the LEDs for sending the data would be the main part to power if really raw 1 Bit SD data are send.

author: kony
author_rank: Regular Contributor
timestamp: January 24, 2017, 05:26:04 pm
content: Quote from: Kleinstein on January 24, 2017, 05:11:29 pmAny pointers to decent literature with theoretical analysis how the system absolute accuracy is affected by ADC + frondend preprocessing deviations from ideal case scenario?I do understand how to process such signals, but not fully how I can estimate worst case total system linearity and absolute precision (except for measurements on large enough sample of prototypes).

author: Kleinstein
author_rank: Super Contributor
timestamp: January 24, 2017, 07:00:56 pm
content: To estimate nonlinearity one could use a kind of simulation, so use simulated data and see how a non ideal ADC would influence the linearity of the whole system. The tendency it that sampling intermediate values too, does reduce nonlinearity somewhat compared to the pure ADC. Especially DNL of the ADC should be less important.For the precision, I don't expect the ADC to be a major point as the ADC is sampling an AC signal and is thus it is more gain drift that might be a small issue, but this is usually relatively low. The bigger problem here is more in the mechanical part (e.g. thermal expansion / bending) and also surface effects (e.g. surface layers that change surface potentials or dielectric effects on isolator surfaces). For the surface effects it might be a good idea to look at the related Kelvin probe.Usually a field mill is not considered super accurate, as there are mechanical shifts that can have quite an influence. As the accuracy is not expected to be super high, it should be relatively easy to check this by comparison with a normal voltmeter.

author: kony
author_rank: Regular Contributor
timestamp: January 24, 2017, 07:25:18 pm
content: Thanks for effort, but that dosen't really answer my question.I am more after generic description of limitations in oversampled systems (working with correlated AC signals), not limited in scope to this exact case. I'm aware of many factors that have impact on the performance of each individual block in the signal path, but I'm yet to find a way how to combine them into model that makes sense (yes, I did attempted multiple times, but the results I'm getting out of the models seem to be too good to be true).

author: mark03
author_rank: Frequent Contributor
timestamp: January 24, 2017, 08:05:16 pm
content: Quote from: Kleinstein on January 24, 2017, 05:11:29 pmYes, I considered this tradeoff, but the winner is not obvious to me. Using low-power op-amps, I expect most of the power to be in the LED regardless, but how does the transmission power compare with the power of the CIC filter to crunch the 1-bit stream down to samples, and perhaps the demodulation process if that is included. The  receiving pcb will only be ~ 1 cm away from the spinning one. Reducing the data rate would have one advantage: I could spit out a handful of bits on each rotation as a single tx/rx pair come into range, versus having to commutate between a handful of LEDs to keep a constant data stream.I'm impressed that you know about field millsAs you say, environmental effects like charging of non-conductive surfaces near the sensor can dominate the accuracy. Fortunately I'm not that concerned about absolute calibration---I just want to watch thunderstorms. And have fun with the technical challenges.If anyone is interested, I'm aiming for a design similar to this one (just not as small):http://clasp-research.engin.umich.edu/e-field/publications/E-FieldSensorElectrostatics2007_Rev_Jan2008.pdf

author: Kleinstein
author_rank: Super Contributor
timestamp: January 24, 2017, 10:29:51 pm
content: I have experience with a Kelvin probe, which is kind of similar to the field mill, but usually lower voltage. Here it is gas adsorption that can have quite an effect.The normal type of field mill does not use a rotating amplifier, just a grounded shield. This might be less sensitive, but is good enough to detect effects like a thunder storm. I can understand that there might be some advantages to the version the a rotating drum and it is likely a lot more fun to build.For using a µC with integrated ADC I would expect a current consumption of something like 1 mA (possibly less), including demodulation if needed. So this would make this my obvious choice, though only a low grade 12 Bit or maybe 10 Bit ADC. Those µC internal ADCs are usually quite low in power.