Exceeding MOSFET's gate voltage - Page 1
Forum section: electronics / beginners

author: GonzoTheGreat
author_rank: Regular Contributor
timestamp: December 17, 2015, 10:47:08 pm
content: As is is commonly known, exceeding MOSFET's maximum voltage (VGS) is a bad idea because it punctures the gate insulation layer, leading to the destruction of the MOSFET ...and with multi-cell MOSFETs - to gradual decrease in overall transistor performance.HOWEVER: Does thegate voltage limitapply to?:- the voltage that is applied between the gate and source terminal,OR- to the voltage to which the gate-source capacitance becomes charged to.I hope the distinction is clear.

author: Zero999
author_rank: Super Contributor
timestamp: December 17, 2015, 11:30:36 pm
content: The voltage between the the gate-source terminal is the same thing as the voltage to which the gate-source capacitance is charged to.

author: GonzoTheGreat
author_rank: Regular Contributor
timestamp: December 18, 2015, 06:33:49 am
content: Quote from: Hero999 on December 17, 2015, 11:30:36 pmEventually, but not immediately.According to circuit theory the voltage across a capacitor driven by a constant voltage step is given by the functionVC=V(1-e-t/RC)For example: If a constant 100V is applied across a 10nF capacitor thru a 1Ohm resistance, then at t=0 the voltage across the capacitor is 0V, at t=10ns it is 63V ...and at t=50ns it is 99V.The same thing should happen with the gate capacitance supplied by a constant voltage pulse.If it doesn't, then I want to know - why not?Finally, I want to know if that VGSgate oxide limit is for the voltage at t=0 or at t=5*RC

author: Ian.M
author_rank: Super Contributor
timestamp: December 18, 2015, 06:42:39 am
content: The limit is for the instantaneous Vgs at *ANY* time. In practice if you were to apply a voltage pulse directly to the gate pin, you have a *tiny* amount of protection due to the gate lead and bondout inductance and resistance forming a low-pass filter with the gate capacitance, but at the time scales that becomes important at, you also have to consider the resistance of the gate metallisation, which means the effective capacitance in the low-pass filter isn't the whole of the gate/channel capacitance.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 19, 2015, 01:44:30 am
content: Quote from: Ian.M on December 18, 2015, 06:42:39 amAnd this is on the order of nanoseconds, where ESD pulses and RF voodoo live. For everything else...Also, if you're getting a time constant from the gate spreading resistance, that means the gates aren't turning on evenly over the device, and you'll probably be overvolting some areas first!Practical breakdown voltages are in the 40-100V range, for Vgs(max) in the 20-30V range. But obviously, it's a one-time random variable, so you want to stay well outside the actual breakdown, which is why they rate them that way. (Also, lower voltage parts have even lower voltage gates, so beware of that too.)Tim

author: Ian.M
author_rank: Super Contributor
timestamp: December 19, 2015, 02:12:34 am
content: Yep. I wouldn't even go there for the RF voodo. However ESD events can cause pulses on that timescale, especially if your external TVS diode clamps protecting the gate aren't fast enough, maybe because of too much self-inductance in the clamping path.For most devices there seems to be a sweetspot at about 2/3 the rated gate voltage, where its on about as hard as it can be, but you've got enough headroom that any ringing or other transients from the gate driver wont cause gate oxide failure.

author: GonzoTheGreat
author_rank: Regular Contributor
timestamp: December 19, 2015, 04:05:53 pm
content: What about discharging a small capacitor (C) charged to high voltage (e.g. 200V) into the gate of a large MOSFET rated at VGS= ±20V,in order to turn it on faster?Before you scream at me that this will kill the MOSFET, consider the case when C < CISSP.S.Since cap-to-cap energy transfer is not very efficient, would it be better to do an inductor-to-cap transfer?With inductive transfer, the maximum voltage to which the gate capacitance would became charged to, should be beV=iL*(L/CISS)½

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 19, 2015, 09:28:15 pm
content: Such a waveform has been considered e.g. by Stanford for MOSFET and IGBT pulse generators for particle accelerator / kicker applications. I believe the suggested preshoot is something like 60V decaying over 100ns.Energy efficiency isn't a big deal, because the whole point is trying to change the voltage on the internal capacitor, which is hiding behind the gate spreading resistance. I don't think you'll save anything with an inductor when trying to achieve maximum speed, because it all ends up dissipated anyway. An inductor, with appropriate switching, can be used for efficient gate drive at lower speeds, however (where the gate current is low and therefore the energy dissipated on that resistance is also low).Tim