Issue with switching noise and cascaded LDOs. - Page 1
Forum section: electronics / projects

author: sporadic
author_rank: Regular Contributor
timestamp: August 05, 2014, 01:09:49 pm
content: I thought I had done my homework on this subject, but I'm obviously missing something here. I'm powering the circuit below withthis 12V power supply supply. J1 is for 5V operation and is not being used. Measurements are being done with a Rigol DS1052E and the stock probes at 1x with a ground spring. AC coupled and bandwidth limited.The parts I am using are theNCP11175V LDO andNCP700B3.3v Ultra Low Noise / High PSRR LDO in a cascaded configuration. The electrolytics are Panasonic low ESR caps and all ceramics are X7R.When measured at the at the power connector, I have a sinusoidal ripple of roughly 20mV around 300kHz. Measured at C10, it gets down to 8mV. If I switch to battery power, the LDO output noise is lower than what I'm capable of measuring.In hind sight, I realize I need to add a ferrite bead to filter the really high stuff, but shouldn't the cascaded LDO configuration be giving me a cleaner output than what I'm seeing at 300kHz? Another cheap power brick I have exhibits even higher ripple around 32kHz and its enough to cause issues with the nRF24L01 module I'm using. Should I be doing more filtering or is there something wrong in my implementation? Banging my head on this, appreciate the help!PixelSitck_schemtic-20140725bysmerrick, on FlickrPixelStick_gerber-20140725bysmerrick, on Flickr

author: nickm
author_rank: Regular Contributor
timestamp: August 05, 2014, 02:15:25 pm
content: Use an actual inductor for filtering. Ferrite bead are useful for high frequency fuzz not the ripple you're seeing.

author: Marco
author_rank: Super Contributor
timestamp: August 05, 2014, 02:28:04 pm
content: NCP700B should have over 30 dB PSSR at 300 kHz according to it's datasheet ...

author: mij59
author_rank: Frequent Contributor
timestamp: August 05, 2014, 02:34:16 pm
content: Hi,It could be an ground loop.If you probe the ground with the scope, is the signal still present?

author: sporadic
author_rank: Regular Contributor
timestamp: August 05, 2014, 04:48:06 pm
content: Quote from: nickm on August 05, 2014, 02:15:25 pmQuote from: Marco on August 05, 2014, 02:28:04 pmSo I'm correct then that the 300kHz ripple on the output of the NCP700B "should" be much lower than I'm seeing?Quote from: mij59 on August 05, 2014, 02:34:16 pmI'll check this tonight and grab some scope shots as well. Thanks!

author: dannyf
author_rank: Super Contributor
timestamp: August 05, 2014, 05:28:50 pm
content: PSRR at that high of a frequency is typically fairly low.

author: sporadic
author_rank: Regular Contributor
timestamp: August 05, 2014, 05:49:24 pm
content: Quote from: dannyf on August 05, 2014, 05:28:50 pmThe closest number I've found in the datasheet is as Marco noted above, 30db @ 300kHz in figure 15. I stacked a 10uF X7R on top of C4 as well and it didn't effect the ripple.However, figure 15 along with the rest of the PSRR charts have Vin at Vout + .5V. Would running the LDO with too much overheard (1.7 vs .5V) adversely effect the PSRR numbers?

author: German_EE
author_rank: Super Contributor
timestamp: August 05, 2014, 07:20:13 pm
content: A series choke or two will almost certainly help as they will form low-pass filters together with the input and output capacitors. Also, rather than use a ground plane, a single point ground will be much better (but then you will have to redesign your board). Connect all of the capacitors, the two regulators and input & output grounds to the same point and the noise will probably go away.

author: dannyf
author_rank: Super Contributor
timestamp: August 05, 2014, 07:35:59 pm
content: QuoteI cannot see why.All the "LDO" does is to be able to work under smaller Vin-Vout differentials.

author: mikerj
author_rank: Super Contributor
timestamp: August 05, 2014, 08:09:44 pm
content: Quote from: sporadic on August 05, 2014, 05:49:24 pmTypically it's the other way around, the PSRR degrades at low voltage overheads. It could easily be a ground problem as other have said. A offline switcher will almost certainly have a cap connecting the primary and secondary, so with a scope plugged in and the ground clipped onto your circuit, you probably have a lovely low impedance ground loop at the frequencies you are looking at.

author: sporadic
author_rank: Regular Contributor
timestamp: August 06, 2014, 02:43:00 am
content: These are readings under minimal load. nRF24L01 module removed and outputs disconnected. Pretty much just the Xmega and two LEDs powered up on board. The noise average lessens under a decent load (nRF module and driving 25 pixels) to around 8mv at C10, but is much messier. The biggest component is around 300kHz in both cases.At Input:Inputbysmerrick, on FlickrAt C10:C10bysmerrick, on FlickrWhat's the best method for verifying or measuring ground loop issues? What's the proper way to probe ground with a mains earth referenced scope? I don't have any isolation gear or differential probes. I had planned on making another run of these boards anyways so changing the layout isn't an issue if its required. Thanks again for your help.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 06, 2014, 07:21:04 am
content: Beware that your system bandwidth is under 10MHz on the X1 setting.If you need high fidelity measurements, try soldering a coax cable directly onto the board, leads as short as possible. Then you can also observe high frequency noise.300kHz is not the domain of ferrite beads. Actually, your waveforms look like that's just ringing inside the power supply, and it's actually running at a rather sluggish speed of, say, 50kHz or something like that. Mind that the power supply itself may be rather shitty on emissions; who knows. You'd have to start with that.Null measurement: ground the scope probe (or, better yet, coax probe) to itself, and connect the ground to the power supply ground. Measure the residual. This is common mode noise being sensed by the scope, and gets into the cable by losses and stuff. It should decrease if you wrap the cable around a lot of ferrite, but it's not usually a good way to actually get rid of it (like I said, 300kHz is rather low for ferrite beads).Differential: start at the input and follow it through. Check the ESR / reactance of the capacitors in the signal path, and the PSRR of the regulators (and under what conditions they're measured in -- usually only a limited bandwidth shown, and in circuit with caps). LDOs are typically awful at high frequencies, and you'll usually need inductors and low ESR caps to reduce it.Not that it's a big deal, doesn't look like this circuit does anything analog. If it's just digital, don't worry about it.Tim

author: dannyf
author_rank: Super Contributor
timestamp: August 06, 2014, 10:59:36 am
content: I would add a diode / small inductor before C1.

author: sporadic
author_rank: Regular Contributor
timestamp: August 06, 2014, 12:38:37 pm
content: Quote from: mij59 on August 05, 2014, 02:34:16 pmQuote from: T3sl4co1l on August 06, 2014, 07:21:04 amI performed the null measurement this morning. Attached probe ground lead, connected ground lead to tip, and probed power supply ground on the board. Picked up the same signal as I posted above. So am I to assume this is common mode noise being generated by the power supply? I don't pick it up when the supply is off. What if I put a shorted probe to power supply ground on CH1, a normal probe w/ spring to ground on CH2 and subtracted them? Wouldn't this be the noise as seen by the circuit? The only connections are the power supply and pixel string that the supply drives.My quest for stable voltage was for the 2.4GHz nRF24L01 radio module. I've ran into issues using these on dirty switchers in the past and am trying to add some robustness to the system. I would hope for better range / sensitivity with a cleaner supply as well. I'm just a hobbyist trying to learn some proper design guidelines and testing techniquesThese stock probes are only 8MHz at 1x. I'll pull out some coax this evening and trying capturing higher frequency stuff. So far, I've seen a few spikes in 10x but resolution is pretty poor with the probe.I can lose the ground plane if it helps and make room for filtering passives on the bottom if required, just trying to find the source and if I'm measuring it correctly first. If it is in fact common mode noise being generated by the power supply and the board is essentially floating with the supply while in usage, is it an issue? I assume I'd have to remove the common mode component first to get a true noise measurement. Thanks again for the responses!

author: free_electron
author_rank: Super Contributor
timestamp: August 06, 2014, 02:06:20 pm
content: U2 needs ceramics close to its in and out pin. Wiring for 72 to ground is too long. Use a local via.Also, turn on he damn pin numbers in the schematic . I do 't know what pin number is adj on u2 and i'm not going to read the datasheet. What crappy cad program is that ?And plase the decals on the pcb right as well. U2 is not marked.Edit your smd compone ts to have a box around em instead of a single stupid line. It looks like half an effortAnd clean up your schematic. There's more net labels than parts ... Use wires.

author: sporadic
author_rank: Regular Contributor
timestamp: August 06, 2014, 03:04:52 pm
content: Quote from: free_electron on August 06, 2014, 02:06:20 pmWhy so much hate for DipTrace?I turned pin numbers for you and attached it. I had removed the marking for U2 and replaced it with 5V to designate the solder jumper underneath it. It's a build option to leave off U2 and use the jumper if you're on 5V power.I'll tighten up the layout around U2, but would adding ceramics help any if it's common mode stuff I'm seeing? I just don't want to needlessly add components. I followed the datasheet for U2 and use their recommended capacitor specs. Also, shouldn't the capacitor be connected directly to the input and ground terminals of the regulator and not via the ground plane?As for silkscreen outlines around the passives, how does a box vs a line look like "half an effort"? It has nothing to do with performance of the circuit and just sounds like bitching to me. Outlines on SMD passives also take up lots of space and they're already too big at 0805. Plus, it's the default pattern for DipTrace. I prefer smaller, but trying to keep them larger to be assembler friendly.

author: free_electron
author_rank: Super Contributor
timestamp: August 06, 2014, 04:40:57 pm
content: Quote from: sporadic on August 06, 2014, 03:04:52 pmi don't know what it is drawn in. All i know is that schematics like that are unreadable. every pin should have a pin number and name. Parts should be wired so we can follow visually what goes where. Parts need clear designators values and type numbers on em.These are just basic rules for schematic capture.Quotethis has nothing to do with common mode. PSRR is the problem. Power supply rejection rate.Quotei agree I followed the datasheet for U2 and use their recommended capacitor specs. Also, shouldn't the capacitor be connected directly to the input and ground terminals of the regulator and not via the ground plane?the frequencies you run at are too low to get any kind of effect from the planes. planes only work for fast edges and only if the are properly coupled with the signal traces , or coupled power wise.Quoteit is difficult to see what orientation the part is in. a resitor or cap should have a box around it. use 6 mil traces position the box at half pitch interval. This not only makes finding where the part is easier it als o makes it easier during population of the board and during placement of the parts. the box defines the placement boundary. boxes are allowed to touch but not overlap.let me explain : let's say you have an 0805 using pads that are 25 mil by 25 mil. the placement rules call for a gap of 18 mils between parts. so the midpoint between two adjacent components is 9 mils. so if you draw a box that is 9 mils larger than the part body you have now a visual queue during board layout. if you let the parts 'touch' you know they are 18 mils apart meeting the placement criteria. you also know you have a 18 mil gap between pads meaning you can run a 6 mil trace with 6 mil clearance through there without problems.things like that save a lot of time during pcb layout as you can simply snap parts together and neatly arrange them visually. you save time and you can make the board density better without sacrificing routing real estate.I'm not just pulling this stuff out of the sky.. i've been doing PCB design for 20+ years and these are best-practice rules.just trying to make life easier. not bitching.now on the layout : pin 32 is the analog VCC with cap c6 , that is your critical node. that needs a separate trace directly to u3. Not a shared trace with the nrf... and not a loop-de-loop like it is now. ( u3 , up under the chip , to the connector , to c9 to c10 to c6 and then on to r2 ... )c9 and c10 do not follow the electron flow. you come from regulator , go to cap then go to connector. not regulator, connector cap.pin 1 of the 5 volt regulator needs its own via to ground.another problem is that your return pathway for the avcc is long. i would place the u3 regulator much closer to the avcc. u3 needs to sit where c9 and c10 are now hanging. actually i would almost swap u1 and u3 location. the 'digital nest' then sits top right.now, on the 5 volt regulator. i picked up the on-semi datasheet and they specifically call out for MLCC caps (page 6) . i see electrolytics ... not good. you need ceramics. they use 10uF MLCC both at in and out.

author: mikerj
author_rank: Super Contributor
timestamp: August 06, 2014, 05:34:42 pm
content: Quote from: free_electron on August 06, 2014, 04:40:57 pmIf the op is seeing this signal with the scope probe grounded and connected to 0v on his power supply then there is no amount of PSRR improvement that will reduce it because it's nothing to do with PSRR.

author: rob77
author_rank: Super Contributor
timestamp: August 06, 2014, 06:04:17 pm
content: LC filter at the input... i had a similar "issue" with a SMPS followed by a bunch of linear regulators.get rid of the noise form the SMPS at the input and bob's your uncle

author: sporadic
author_rank: Regular Contributor
timestamp: August 06, 2014, 06:06:01 pm
content: Quote from: free_electron on August 06, 2014, 04:40:57 pmShouldn't I be seeing some improvement in my measurements between the output of U2 and U3 given the NCP700B's PSRR specs? Everyone else seems to think it's a ground loop or common mode issue.QuoteI looked in DipTrace, but couldn't find any SMD passives with boxed silkcreens. I like the idea however and may toss together my own pattern library. Thanks for the explanation behind it.QuoteThe nRF24L01 header is actually my critical node as that's where the 2.4GHz radio is. That's where I need clean power. None of the analog functions are being utilized on the Xmega and AVCC (pin 32) is just tied to VCC. The reasoning behind C9/C10 was to help clean up power before it goes out to the module. The modules themselves are cheap pre-fab ones from eBay. Maybe a big electrolytic up there would be better?QuotePage 9 goes into detail of capacitor selection.QuoteThis will be driven way more than a few feet from the source, hence the 100uF electrolytic. Am I missing something here?QuoteOr here? My output cap is in spec.My capacitor selections for the 5V LDO were based on being bit in the ass on a different 1117 "cearmic compatible LDO" previously, Diodes Inc AP1117. ESR was actually too low with their stated caps and caused the AP1117 to oscillate like crazy. The NCP1117 however is stable with a much larger range of ESR and I've used the part with just 10uF MLCCs. ThePanasonic low ESRcaps I used meet the specifications and I don't see an issue with them. Nonetheless, what I was originally concerned with is the PSRR performance of the 3.3v section with the NCP700B but form what everyone else is saying, that isn't necessarily my issue.

author: free_electron
author_rank: Super Contributor
timestamp: August 06, 2014, 07:24:19 pm
content: ah. a trap ! be careful specifying an 1117 from company x and actually using one from some other company. the specs are not necessarily the same (as you already found out because the diodes one )try the following : solder a 1uf ceramic cap directly on pin 1 and 2 of the 1117 and see what happens.frmo your quote :Quotei see electrolytics , they specifically say ceramic...even though ESR may be in spec, the roll-off over frequency may be bad. you see 300KHz ? smells like electrolytics are your problem. by the way , ESR is not a fixed value. it is frequency and temperature dependent.ok , so it the nrf module is critical : get that ldo as close to the module as possible. you can also pump up the bulk ( to some limit) by soldering an additional couple of 10uf ceramic on top of c9 and c10. see what that does.a quick look at that 50v 22uf gives an esr @ 100Kz of 0.3 ohm... an mlcc of 22uf: C2012X5R1V226M125AC is 3 milliohm @ 100KHz ! that is two orders of magnitude ...http://product.tdk.com/capacitor/mlcc/detailed_information.php?lang=en&ref=us&part_no=C2012X5R1V226M125ACgo to the curve for esr versus frequency (top right curve) and hover the mous eover the red curve. the website will show you numbers as you move the mouse.my gut says : ditch the electrolytics , shave as much crap off the incoming supply before you even hit the 5 volt regulator.the psrr of the ldo's is not stellar above a few ten khz.when probing with the scope. probe directly acresso c9 or c10. do not tie your ground to some other point on the board. use a short ground line.als o make sure the earth terminal on your power supply has no shorting bar to the ground output. i don;t know what kind of supplly you have. most 'good' supplies have 3 terminals : red, black and green. red and black are the output , green is tied to the metal box and earth pin in the power cord.the scopes bnc ground is also tied to the ground pin in the power cord. so if there is a shorting bar between black and green on the psu you may see very strange effects ....

author: sporadic
author_rank: Regular Contributor
timestamp: August 07, 2014, 04:24:44 pm
content: Quote from: mij59 on August 05, 2014, 02:34:16 pmQuote from: T3sl4co1l on August 06, 2014, 07:21:04 amQuote from: mikerj on August 06, 2014, 05:34:42 pmEverything I'm seeing points to what the users above have said. When I probe ground on the board, I see the same signal. What's the cheapest and safest way for me to verify this and get an actual noise reading as seen by my circuit? As much as I would love a set of differential probes, its not really in the budget. If someone could point me to the <$100 solution, I'd entertain it. I hate to say it, but would floating earth on the scope be ok for these low voltage (3-12V) measurements? *Flame Shields ON*

author: mij59
author_rank: Frequent Contributor
timestamp: August 07, 2014, 04:45:10 pm
content: Quote from: sporadic on August 07, 2014, 04:24:44 pmSorry if I have missed some comments, but have you tried a linear power supply or a battery to power the circuit ?Why do you need that 12V 30A monster ?

author: sporadic
author_rank: Regular Contributor
timestamp: August 07, 2014, 05:10:10 pm
content: Quote from: mij59 on August 07, 2014, 04:45:10 pmI've tested with a 7.4v LiPo battery and whatever noise being generated by the LDOs was <1mV, essentially buried in the noise floor of my gear. In one layout, the supply will be powering a few of these boards along ~50ft of cable, along with 10-20A worth of pixels depending on the layout. Another layout is using smaller 5-6A bricks at each board. Before I start testing other supplies and layouts however, I would like to get some baseline noise measurements with this current setup and therein lies my issueEDIT: Just some background on what it does: It's a wireless pixel driver for holiday lighting / sequencing. I have another board which is a transmitter driven via RS485. Below are some test patterns being ran from a previous prototype with a battery as the power supply. The current design works fine with the power supply I'm using now, I'm just trying to get some real noise measurements to judge performance.First PixelStick tests:andAnd to get an idea of how they'll be used in the end (part of my show from Halloween last year):This is the flood system I did for for it:http://forkineye.com/electronics/floodbrain-18-channel-10w-rgb-led-floodlight-system/

author: mij59
author_rank: Frequent Contributor
timestamp: August 07, 2014, 05:53:09 pm
content: Quote from: sporadic on August 07, 2014, 05:10:10 pmThanks, looks great !10 to 20A on a 50 ft cable at 12V could be a problem.How much voltage drop can you tolerate on the cable?Could you test the circuit at full power with cable?

author: sporadic
author_rank: Regular Contributor
timestamp: August 07, 2014, 06:09:54 pm
content: Quote from: mij59 on August 07, 2014, 05:53:09 pmThanks! It wouldn't be 20A at the end of one 50' run. 3 seperate runs off the power supply with the longest one being ~50'. Not really worried about that aspect of it, but I've tested 4-5V drop with no issues. The pixel strands themselves are only 18 gauge wire and get power injection periodically from a higher gauge feed from the power supply. I plan to test for noise with everything at full power and with different power configurations and supplies once I can get a proper test method downRight now, that's the part holding me up. Given my previous measurements were bad in regards to the ground loop / common mode issue, I don't want to proceed with any more changes or filtering additions until I can get a measurable baseline with what I currently have.