SAMD21G18A UART  - Page 1
Forum section: electronics / general

author: WILDERNESSBAGEL
author_rank: Contributor
timestamp: January 31, 2022, 02:11:55 pm
content: I used the code ataradov's githubhttps://github.com/ataradov/mcu-starter-projects/blob/master/samd21/main.cand the code works. However I tried to change it so it works with SERCOM5 on pins PB22 and PB23 (PAD 2 and 3, and it's SERCOM alt). I changed all SERCOMs in the code to SERCOM5 and I changed the pads to 2 for TX and 3 for RX, also I changed PORT_PMUX_PMUXE_D_Val to D instead of C, here is the complete code with the changes:Code:/** Copyright (c) 2015, Alex Taradov <alex@taradov.com>* All rights reserved.** Redistribution and use in source and binary forms, with or without* modification, are permitted provided that the following conditions are met:** 1. Redistributions of source code must retain the above copyright notice,* this list of conditions and the following disclaimer.* 2. Redistributions in binary form must reproduce the above copyright* notice, this list of conditions and the following disclaimer in the* documentation and/or other materials provided with the distribution.* 3. The name of the author may not be used to endorse or promote products* derived from this software without specific prior written permission.** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE* POSSIBILITY OF SUCH DAMAGE.*///-----------------------------------------------------------------------------#include <stdlib.h>#include <stdint.h>#include <stdbool.h>#include <string.h>#include "samd21.h"#include "hal_gpio.h"//-----------------------------------------------------------------------------#define PERIOD_FAST 100#define PERIOD_SLOW 500HAL_GPIO_PIN(UART_TX, B, 22)HAL_GPIO_PIN(UART_RX, B, 23)#define DelayTicks(ticks) {volatile uint32_t n=ticks; while(n--);}//takes 8 cycles#define DelayMs(ms) DelayTicks(MS_TO_DLYTICKS(ms))#define F_CPU 8000000#define CYCLES_IN_DLYTICKS_FUNC 8#define MS_TO_DLYTICKS(ms)(uint32_t)(F_CPU / 1000 * ms / CYCLES_IN_DLYTICKS_FUNC) // ((float)(F_CPU)) / 1000.0//-----------------------------------------------------------------------------static void timer_set_period(uint16_t i){TC3->COUNT16.CC.reg = (F_CPU / 1000ul / 256) * i;TC3->COUNT16.COUNT.reg = 0;}//-----------------------------------------------------------------------------void irq_handler_tc3(void){if (TC3->COUNT16.INTFLAG.reg & TC_INTFLAG_MC(1)){TC3->COUNT16.INTFLAG.reg = TC_INTFLAG_MC(1);}}//-----------------------------------------------------------------------------static void timer_init(void){PM->APBCMASK.reg |= PM_APBCMASK_TC3;GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(TC3_GCLK_ID) |GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0);TC3->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_WAVEGEN_MFRQ |TC_CTRLA_PRESCALER_DIV256 | TC_CTRLA_PRESCSYNC_RESYNC;TC3->COUNT16.COUNT.reg = 0;timer_set_period(PERIOD_SLOW);TC3->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE;TC3->COUNT16.INTENSET.reg = TC_INTENSET_MC(1);NVIC_EnableIRQ(TC3_IRQn);}//-----------------------------------------------------------------------------static void uart_init(uint32_t baud){uint64_t br = (uint64_t)65536 * (F_CPU - 16 * baud) / F_CPU;HAL_GPIO_UART_TX_out();HAL_GPIO_UART_TX_pmuxen(PORT_PMUX_PMUXE_D_Val);HAL_GPIO_UART_RX_in();HAL_GPIO_UART_RX_pmuxen(PORT_PMUX_PMUXE_D_Val);PM->APBCMASK.reg |= PM_APBCMASK_SERCOM5;GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(SERCOM5_GCLK_ID_CORE) |GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0);SERCOM5->USART.CTRLA.reg =SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE_USART_INT_CLK |SERCOM_USART_CTRLA_RXPO(3/*PAD3*/) | SERCOM_USART_CTRLA_TXPO(2/*PAD2*/);SERCOM5->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);SERCOM5->USART.BAUD.reg = (uint16_t)br;SERCOM5->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;}//-----------------------------------------------------------------------------static void uart_putc(char c){while (!(SERCOM5->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_DRE));SERCOM5->USART.DATA.reg = c;}//-----------------------------------------------------------------------------static void uart_puts(char *s){while (*s)uart_putc(*s++);}//-----------------------------------------------------------------------------static void sys_init(void){// Switch to 8MHz clock (disable prescaler)SYSCTRL->OSC8M.bit.PRESC = 0;}//-----------------------------------------------------------------------------int main(void){uint32_t cnt = 0;bool fast = false;sys_init();timer_init();uart_init(115200);uart_puts("\r\nHello, world!\r\n");while (1){if (5000 == cnt){fast = !fast;timer_set_period(fast ? PERIOD_FAST : PERIOD_SLOW);uart_putc('.');}else{uart_puts("\r\nHello, world!\r\n");DelayMs(1000);}}return 0;}Did I miss something?

author: WILDERNESSBAGEL
author_rank: Contributor
timestamp: January 31, 2022, 02:30:55 pm
content: OK I figured it out SERCOM_USART_CTRLA_RXPO and SERCOM_USART_CTRLA_TXPO don't represent pads directly the correct settings are, SERCOM_USART_CTRLA_RXPO(3/*PAD1*/) | SERCOM_USART_CTRLA_TXPO(1/*PAD0*/); more info on page 432 in the datasheethttps://ww1.microchip.com/downloads/en/DeviceDoc/SAM_D21_DA1_Family_DataSheet_DS40001882F.pdf#page=432