Need help with a TDS540C repair - Page 1
Forum section: electronics / repair

author: mwbarth36
author_rank: Regular Contributor
timestamp: May 25, 2020, 04:44:33 pm
content: I have acquired a TDS540C scope with the following problem. Although the startup tests are Passed, and the Diagnostic tests are Passed, it will not pass SPC. Here is what I discovered so far. Even thought the Start Up Tests are Passed, if one looks at the Error Log it has the following message tagged with the start up time and date:Warning: VariGain Setting beyon (not displayed)Ch 4 1.0957 > 1.080The same message is received if one runs the Diagnostic Tests. Now, as far as the scope working, everything appears normal, all four channels show signal. The offsets on all four channels are zero, or very close to it. The signal gain on all four channels appears the same, the same signal on all four inputs will appear as a single trace, indicating very close gain match. All channels trigger just fine. So, the scope appears to be operating in a completely normal fashion.However, it always fails SPC with the following Error Message:ERROR: Internal Adjustment Range(3@ 5001): 1.0111 = > Balance dac #4 (ID # 147)It would appear that something in the Channel 4 signal path is preventing the scope from passing SPC even though the signal from it matches all other channels. I did replace the op amp (072) feeding the balance input to the channel 4 acq. Chip, just because I had one. It did not help. I am sure the messages probably narrow the problem down if I understood what they mean.Wondering if anyone has any ideals as to what the problem might be, or where I can get information on the meaning of the error messages. I have the schematics for this scope, the TDS540B schematics appear to be the same as the TDS540C. This model does not have the 'Electrolytic' problem of some other 540 models, so that is not the problem.I have had very good luck at getting the answers to problems on this Thread, hope that is the case with this problem.

author: BreakingOhmsLaw
author_rank: Frequent Contributor
timestamp: May 25, 2020, 05:40:36 pm
content: Well, it says DAC, not ADC, so i would guess the channels are not meant by this.Any DAC would likely be needed for the deflection of the trace, so check if the overall image is okay.

author: mwbarth36
author_rank: Regular Contributor
timestamp: May 26, 2020, 02:56:49 pm
content: The DAC is used to provide the analog signals to the front end amplifiers to compensate for any offsets, etc. During the calibration phase offsets are zeroed and digital values are stored for use during actual operation. In this case, during actual operation the offsets, gain, etc. for channel 4 is exactly as it should be. All channels look the same, zero offset, same gain, signal looks perfect, but the SPC indicates otherwise, giving the error report. Plus, the diagnostic tests indicates something is out of range. If I can figure out the meaning of the Error report, perhaps I can locate the faulty circuit.

author: CaptDon
author_rank: Super Contributor
timestamp: May 26, 2020, 03:51:52 pm
content: The DAC's are not used for trace deflection as you may have guessed. The errorreport seems to indicate your failure is only very slightly outside the normal allowablerange. Do you see any of the slightly oily looking residue around the electrolyticcapacitors on the acquisition board? This could cause a slight current leakagethat would be outside the correctable range. This type of failure is very commonfor this series of Tek scopes. I had to clean and scrub the Aq board in my TDS644A.It had all kinds of failures and once cleaned worked perfectly. The CPU boardhad been replaced by a prior owner and did not have the bad capacitors. I alsoreplaced 100% of the electrolytics on the aq board and with it still failing decidedto give it a bath.

author: shakalnokturn
author_rank: Super Contributor
timestamp: May 26, 2020, 04:06:06 pm
content: Tek could have left some margin on the DAC side of things, it would allow to throw the error message you get while maintaining normal operation until the DAC actually hits the binary limits.If you've replaced the concerned op-amp for variable gain control on that channel the next suspect would be the 405x or whatever MUXes the DAC output.I imagine the error could also come from the wrong calibration signal amplitude being fed to CH4 frontend during power-on calibration or SPC. Have you compared that to a good channel?It would be a good starting point, I'd expect all frontends to get the same calibration references whereas gain/offset trim voltages are likely to vary a little between channels.

author: mwbarth36
author_rank: Regular Contributor
timestamp: May 27, 2020, 02:10:15 am
content: Thank you for your suggestions. Yes, I do understand that the DAC is not used for signal presentation. As to the 'leaky' capacitors. The TDS540C has none of the small electrolytics that the other TDS 500 and 600 series has. All capacitors are either Ceramic, or Tant. I did replace the one op amp responsible for the balance input to the front end, might have to try some of the other components associated with the calibration on channel 4. Just afraid it may be a problem in the large custom chip associated with the front end for that channel. Do not believe it can be in the Attn. section as the signals, and offset are just like those for the other channels. What are your thoughts?

author: mwbarth36
author_rank: Regular Contributor
timestamp: May 27, 2020, 02:16:16 am
content: Thank you for your suggestions. I will continue to look at other components in the path for channel four. The MUX for the DAC is a good bet, will try that next. Also will try to compare the signals to the channels during calibration.