Should I design a 2 or 4 layer PCB for this? - Page 1
Forum section: electronics / projects

author: ebastler
author_rank: Super Contributor
timestamp: January 17, 2019, 06:25:28 pm
content: I am fiddling with the design for a vintage computer replica, which will be centered around "real" delay lines as the main program and data storage. The idea is to use a few of the 64µs delay lines from older PAL television sets, and build the electronics from discrete 74HC series chips. (The latter seems like a good compromise between manageable effort and building something "tangible", where the computer architecture is readily visible in the board layout.) The computer will be a limited version of Turing's "Pilot ACE", originally designed and built between 1945 and 1951.The board's key parameters should be:5 MHz clock rate (given by the delay line properties),Approx. 50 chips, 74HC series, SMD,Board size 20*20 cm² (8*8") or a bit smaller.I am wondering whether I should plan to use a 4-layer PCB. It should be quite possible to lay out the traces on 2 layers only -- I plan to leave some room between the funtional modules of the design anyway, to make the architecture clearly visible. So I don't want to use 4 layers just out of lazyness... But I am worried about EMC, and about getting clean signals. There is a bit of analog amplification and discrimination going on at the delay line outputs. (Signal levels around 200mV.)What's your take on this? Does a 5 MHz design justify four layers, with ground and power planes? Thanks for your advice!N.B. This is a hobby project, not meant to ever become a commercial design. So from a compliance perspective, I can radiate all I want...But I don't want to create a total mess EMC-wise...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 17, 2019, 06:51:32 pm
content: As long as you have a contiguous ground on either layer (preferably both), 2 layer is fine. If you're reserving a fair amount of space for routing buses between chips, this works nicely.Contiguousness is achieved by stitching ground together. Everywhere a trace cuts through the pour, it's divided into another region; keep ground over/under traces/buses where possible, and add stitching vias around them.If you need to cram things together a bit more tightly, 4 layer is definitely the way to go. With DIP or SOIC logic, single side placement, I'd think 4 layer would not buy you a 50% board area savings (which since 4 layer typically costs ~double, would be your economic threshold). With two sided placement of SOIC, you'll definitely get there (but you'll also spend a lot more time in layout, which is a far worse deal economically speaking, in proto quantities).Tim

author: bson
author_rank: Unknown
timestamp: January 18, 2019, 04:10:38 am
content: I'm with blueskull 100% on this. ~50 discrete 74 series logic ICs just screams 4 layer; you will want two complete layers to route signals on, at least, and only have to worry about excess vias cutting up the internal power planes, not how to route and pour power. For something with a huge amount of signals it's potentially very difficult to maintain anything resembling a continuous ground plane. Not worth the hassle.

author: mariush
author_rank: Super Contributor
timestamp: January 18, 2019, 04:20:51 am
content: You should consider whether you can put multiple DIP chips (maybe grouped by purpose or functionality) on tiny boards that you can then plug like memory sticks on your main board - doesn't have to be anything fancy, simple pins with 0.1" spacing or something like that, which would allow you to route traces between holes.

author: ebastler
author_rank: Super Contributor
timestamp: January 18, 2019, 04:51:53 am
content: Thank you all for your input!It looks like 4 layers are justified then. Tim's point that a contiguous ground plane in a two-layer design should do the job is well-taken; but I agree with the other comments that it might end up not being all that contiguous... While I don't have to route large buses in this bit-serial computer design, I will certainly need to route quite a few traces on the second layer.I am less concerned about the cost (it's a pet project anyway), but more about "sportsmanship" and doing this without overkill.I will do the placement and have a close look at the rats nest, but will be ready to use 4 layers. Thanks!

author: Berni
author_rank: Super Contributor
timestamp: January 18, 2019, 06:13:07 am
content: Yeah a 4 layer board is less about routing and more about giving you a solid uninterrupted ground plane inside. The board you describe sounds like it has a fair bit of routing complexity so you probably can't dedicate the bottom layer to be mostly ground on a 2 layer board.The other advantage of 4 layer is that you get better trace impedance. Common small traces are easy to get to be 50 Ohm single ended or 100 Ohm differential impedance, this makes the trace look like a 50 Ohm coax between two points on your board. This becomes critical once you get to high speed LVDS interfaces, but with all your delay lines maybe controlling trace impedance might be useful too. The clock might only be 5MHz but modern fast 74 series logic can generate rise times in the order of a few nanoseconds and this gives the transition edge a bandwidth above 500 MHz.There are cases where old 8/16bit CPU boards continued to be manufactured for legacy reasons, but they used more modern equivalent chips in them. These modern chips are faster and in some cases this would make the computer crash because the PCB was designed for use with older slower chips that didn't have rising edges fast enough to upset the old 2 layer PCB design (4 layer was really rare in the old days)