"Bizen transistor", a claimed new transistor family/process/technology - Page 1
Forum section: electronics / general

author: Whales
author_rank: Super Contributor
timestamp: October 23, 2019, 05:36:13 am
content: https://www.electronicsweekly.com/news/design/tunnelling-transistor-offers-logic-power-easy-make-ic-2019-10/https://www.searchforthenext.com/Approximate claims:- Uses less space than CMOS for the same fab size- Uses less steps than CMOS for the same fab size- Lower power than CMOS for dynamic conditions due to reduced capacitances.- ~10x fanout per gate- Symmetric P-style devicesDo new processes get promised all of the time and never fruit? I don't like the sound of their business name.

author: daqq
author_rank: Super Contributor
timestamp: October 23, 2019, 06:27:30 am
content: Well, looks nice on paper I suppose. Though continuous current logic? How well does that scale?Hate the website design though, clearly designed for mobile and lack of information.

author: Marco
author_rank: Super Contributor
timestamp: October 23, 2019, 07:25:46 am
content: The static current consumption seems manageable at a couple watt per billion of transistors.

author: daqq
author_rank: Super Contributor
timestamp: October 23, 2019, 08:21:21 am
content: QuoteAre you sure about this? There are lower than 5V voltage diodes available. (http://www.farnell.com/datasheets/2245598.pdf)

author: tom66
author_rank: Super Contributor
timestamp: October 23, 2019, 08:46:33 am
content: The website is trash. Another investor after cash for the next greatest idea?

author: bd139
author_rank: Super Contributor
timestamp: October 23, 2019, 09:03:55 am
content: Quote from: Whales on October 23, 2019, 05:36:13 amYes.I bet it'll disappear. Probably when they can't get a yield on a larger scale. There's a reason tunnel diodes disappeared off the market.Quote from: daqq on October 23, 2019, 08:21:21 amThat's actually the wrong way round.Zener effect is less than 5V. Avalanche effect is above 5V. Zeners below around 5V are much more heavily doped and have pretty crappy yields and are binned from what I was reading a few years back (roughly same reason as tunnel diodes which are basically just even more doped). I haven't read the physics but I assume they are running <5V as they mention tunneling zeners. I'm not sure how they're going to get a reliable yield of good zeners at 100M gate level.Whole thing stinks of "production problems" to me. Getting theory into production kills 75% of good ideas on paper. But good luck to them.

author: Marco
author_rank: Super Contributor
timestamp: October 23, 2019, 09:49:12 am
content: Aren't CMOS gates with current feature sizes already tunnelling significantly?

author: bd139
author_rank: Super Contributor
timestamp: October 23, 2019, 10:00:46 am
content: Yes. I think the tunnelling in MOS devices leads only to parasitic things (gate tunneling and drain-source direct tunneling leading to leakage) whereas the bizen it's a functional requirement. I sat through a whole lecture on this once but I had a hangover so I'm not sure it went in correctly. Please correct me if I'm talking shit

author: Whales
author_rank: Super Contributor
timestamp: October 23, 2019, 10:55:22 am
content: Here I was thinking their website was empty because of my content blocker

author: mdubinko
author_rank: Contributor
timestamp: October 28, 2019, 06:32:20 am
content: I'm wondering how they constructed a master-slave D flip flop with only 8 transistors, as shown in one of the diagrams--looks like a lithography plan.Each transistor can serve as a NOR gate, but unless I'm missing something, that kind of flip flop will need 8 gates PLUS an inverter. But it's done with 8 transistors, not 9...