Help me understand photodiode amplifier Jfet bootstrap.  - Page 1
Forum section: electronics / projects

author: Lambda_
author_rank: Newbie
timestamp: September 20, 2023, 07:44:14 pm
content: Hey i want to build a pin photo diode transimpedance amplifier.So im reading some application notes like:https://www.analog.com/en/technical-articles/1mw-transimpedance-amplifier-achieves-near-theoretical-noise-performance.htmlBut this one i can’t follow how this works:https://www.electronicdesign.com/technologies/analog/article/21806128/matched-jfets-improve-photodiode-amplifierThe photo diode needs to "drive" the opamp input and the jfet?The trans impedance amplifier input is driven by the feed back to 0V... So what is the point of driving the Diodes Cathode and not just grounding the diode.I think i understand the concept of using a Jfet in front of a op amp to leverage the low input current noise and capacitance of the Jfet. But that not what happening here?Also that bigger higher capacitance Photo diodes seam to have more noise seams to be counterintuitive to me.I would appropriate if someone can explain how this is supposed to work so i can maybe get an intuitive understanding of whats going onThanks for any help hints and links about the topic.

author: TimFox
author_rank: Super Contributor
timestamp: September 20, 2023, 08:21:09 pm
content: In the single design you posted twice, the large photodiode has a very large capacitance at zero volts bias.In similar applications, we found that that capacitance is the dominant parameter for output noise.The JFET bootstrap keeps the AC voltage across the diode low, to reduce the noise of the amplifier.With transimpedance amplifiers like this, one can analyze the noise into the following manner:1. Refer each noise source to anequivalent noise currentat the input, to be compared with the photodiode's output current in use.2. The current noise of the amplifier goes there directly.3. To a good approximation, the voltage noise of the amplifier "flows through" the parallel combination of the (large) photodiode capacitance and the feedback resistor.Since the voltage noise is roughly constant (wrt frequency), that noise current density therefore increases with frequency as the capacitive reactance falls.4. The thermal noise current (decreases with increasing resistance) goes there directly.5. Terms from 2, 3, and 4 are uncorrelated (assuming the amplifier input equivalent noise current and voltage generators are uncorrelated), so you add them in quadrature (root sum of squares).Some people prefer to calculate the noise at the output, so term 3 becomes a noise voltage amplified by a frequency-dependent noise gain affected by the diode capacitance. That should give the same answer.The .noise analysis in Spice calculates the AC gain from each resistor to the output, which are all independent of each other, computes the noise of each resistor, then computes the total output noise, and finally calculates the AC gain to the output from another reference point specified (usually the input).Calculating the effect of that JFET is an interesting design question.

author: Marco
author_rank: Super Contributor
timestamp: September 20, 2023, 09:12:29 pm
content: Quote from: Lambda_ on September 20, 2023, 07:44:14 pmIt is driven towards 0 V, but it doesn't reach it. There is a significant AC voltage at the negative input, the JFET mirrors that to cathode mostly eliminating current through the diode capacitance, leaving only the photocurrent you're interested in.

author: moffy
author_rank: Super Contributor
timestamp: September 20, 2023, 09:21:26 pm
content: The voltage at the source of the JFET will be positive, because Vgs will need to be negative to control the current through the JFET, as long as it doesn't saturate. As TimFox stated the JFET is what is effectively driving the capacitance of the photodiode, keeping the AC small, so that the input to the opamp only sees an effectively much smaller capacitance. That is why they can get away with a 0.25pF feedback capacitor without instability. This also improves the bandwidth of the of the TIA.

author: Lambda_
author_rank: Newbie
timestamp: September 20, 2023, 09:47:27 pm
content: Thanks a lot!@TimFox i have t think about your post bit longer it packs quite a bit of information i have to process first. thanks for thisQuote from: Marco on September 20, 2023, 09:12:29 pmSo for my mental model i can replace the Jfets in this application with an ideal Buffer driving the Cathode with what ever voltage is on the anode?This reduces the unwonted (high frequency?) ac over the diode that is only there because the non ideal Opamp has a slow rise time with such a high gain/ feedback resistor?is the significant AC voltage a a consequence of the non ideal opamp or is it there because of the diode capacitance?@moffySo if i get this right in this application the Jfets "only" help to midigate the the slow response from the large capacitance?and in this application:https://www.analog.com/en/technical-articles/1mw-transimpedance-amplifier-achieves-near-theoretical-noise-performance.htmlThe Jfet has a completely different function. (its has lower noise then the Opamp input)

author: TimFox
author_rank: Super Contributor
timestamp: September 20, 2023, 10:25:58 pm
content: Quote from: Lambda_ on September 20, 2023, 09:47:27 pmI haven't used that exact bootstrap circuit, but I believe it exists to "remove" the large diode capacitance from the circuit.With my analysis, the equivalent noise voltage of the op amp flows through it, and produces a corresponding noise current at the input.In the alternate analysis, the capacitance increases the "noise gain" of the feedback circuit, thus producing a corresponding noise voltage at the output.Again, both analyses should give the same answer: it depends on if it is more convenient for the designer to consider total equivalent input noise current or output noise voltage.

author: moffy
author_rank: Super Contributor
timestamp: September 20, 2023, 10:56:54 pm
content: Quote from: Lambda_ on September 20, 2023, 09:47:27 pmThat is basically correct except the buffer isn't perfect. If you connected the anode of the photodiode to say 0V you would have the full 3000pF of capacitance loading the inverting input, and destabilising the opamp. You would then need a much larger feedback cap and the severely reduced BW as a result. With the JFET acting as a near unity gain buffer the inverting input now only sees a fraction of that capacitance, there is also the advantage that the positive bias across the photodiode will also help reduce its capacitance.

author: MathWizard
author_rank: Super Contributor
timestamp: September 23, 2023, 05:01:45 am
content: So it's a light sensor, with a "large" capacitance, so it's voltage would change slower than wanted. So to allow the voltage to change quicker, you use the JFET to move a lot of charge in/out of the diode. And then charge on the inverting pin side of the diode capacitance, basically only comes and goes across the feedback R and C, which leads to the output, which will give a faster voltage output signal, than just the plain sensor.So the op-amp's output, relying on the feedback current, gives an output voltage, that changes very fast like the diode current, is that it ?

author: magic
author_rank: Super Contributor
timestamp: September 23, 2023, 05:32:13 am
content: Quote from: Lambda_ on September 20, 2023, 09:47:27 pmAC voltage at IN- exists both because of limited open loop gain at high frequencies and because of input voltage noise of the chip.Capacitance to ground at the input pin absorbs current in order for that voltage to exist and presumably disturbs circuit operation in one way or another.(One very obvious way is that voltage noise of the opamp is amplified by the ratio of feedback resistor to diode capacitive reactance, but I would expect frequency response and/or stability issues to occur as well).Try simulating this. Use an ideal opamp model, replace the diode with an ideal current source in parallel with an ideal capacitor. Run AC analysis with the current source set to "AC 1", see what's the closed loop frequency response to diode current. Then reset current to zero and add an "AC 1" voltage source between ground and IN+ - that's your input voltage noise - see how the output responds to it.Quote from: MathWizard on September 23, 2023, 05:01:45 amHow can the JFET "move charge into diode capacitance" if it keeps the voltage at both ends equal?The exact opposite is the point - eliminate unwanted AC current through the diode.

author: TimFox
author_rank: Super Contributor
timestamp: September 23, 2023, 02:29:03 pm
content: There are two reasonable ways to connect a photodiode to an op amp connected as a transimpedance (current-in, voltage-out) amplifier:1. Reverse-biased diode (other end connected to appropriate bias voltage). This greatly reduces the photodiode's capacitance, but causes a "dark current" to flow. The dark current is exponential in temperature, so it may cause an intolerable temperature drift in the output. There is also shot noise associated with this dark current, which may be a problem. In sensors such as in digital cameras, the photocurrent will charge up the diode capacitance until the diode forward-biases.2. "Photovoltaic" mode (diode connected from 0 V to a low impedance, so the voltage across it is zero or very low). This eliminates dark current and its shot noise, but there is an important shunt resistance as the voltage goes through zero and a much larger diode capacitance than with reverse bias.The diode capacitance must be included in the analysis of the op amp circuit: it is part of the feedback network.High capacitance results in increased noise output caused by the input noise of the op amp, and can limit the bandwidth (speed) of the feedback amplifier.Therefore, reverse bias is often used for high-speed/frequency applications.Done properly, however, the photovoltaic mode should have an output offset that is less sensitive to temperature than the reverse-bias mode.The large-area photodiode in the posted circuit has a relatively huge capacitance due to its active area.(I spent roughly 30 years at work using both connections in various x-ray detectors.)

author: David Hess
author_rank: Super Contributor
timestamp: September 25, 2023, 09:11:51 am
content: Quote from: TimFox on September 23, 2023, 02:29:03 pmThe change in voltage across the diode is the change in voltage between the inverting and non-inverting inputs, and ignoring the limitations of open loop gain, that change is proportional to the slew rate of the output.

author: TimFox
author_rank: Super Contributor
timestamp: September 25, 2023, 02:44:58 pm
content: Quote from: David Hess on September 25, 2023, 09:11:51 amIn photovoltaic mode, the photodiode is connected between ground and the inverting input (virtual ground), with the non-inverting input grounded.The voltage at the virtual ground end of the photodiode is the amplifier's DC offset voltage plus a very small change required to drive the output of the amplifier to the voltage determined by the feedback network.The slew rate does not enter into it until you approach or exceed it, when the op-amp's input signal voltage will increase as the feedback tries to drive the amplifier past the slew rate limit.Note that the large capacitance of a large photodiode has a substantial effect on the feedback network and must be considered in the design.

author: magic
author_rank: Super Contributor
timestamp: September 25, 2023, 03:23:36 pm
content: David clearly meant momentary rate of change of the output, not slew rate understood as the maximum possible rate of change.It is proportional to the input voltage, except near DC.

author: TimFox
author_rank: Super Contributor
timestamp: September 25, 2023, 04:23:24 pm
content: Thechangein the output voltage is proportional to the change in the input voltage, not therate of change(slew rate).Note that the op amp uses a feedback resistor to make a current-in, voltage-out amplifier (transresistance) for the photocurrent from the photovoltaic photodiode, which dominates the computation of input voltage vs. output voltage at reasonable frequencies.In any event, for "reasonable frequencies" the voltage change across the diode (equal to the op amp input voltage change) is "small" (virtual ground to real ground).The difference in operating modes is between "reverse-bias" (I find the other term, "photoconductive", can be confused with a photoconductor, e.g. CdS), and "zero bias" or "photovoltaic.With reverse bias, the diode has a relatively small capacitance, relatively high parallel resistance, and some dark current.With zero bias, the diode has a relatively large capacitance, medium parallel resistance, and no dark current.Those parameters are to be included in the design of the amplifier.

author: David Hess
author_rank: Super Contributor
timestamp: September 25, 2023, 04:45:57 pm
content: Quote from: TimFox on September 25, 2023, 04:23:24 pmThat is the limitation of the open loop gain.QuoteThe slew rate of the output is proportional to the difference between the inputs, minus the offset voltage, because the small signal response of the differential pair at the input is that of a transconductance amplifier with a voltage in and current out. That output current from the differential input stage is what charges or discharges the internal compensation capacitance, and that is buffered to produce the low impedance output.So while the output is slewing, there is an addition to the input offset voltage which is proportional to the slew rate of the output. If the maximum output slew rate is exceeded, then the differential input voltage becomes unbound but that does not apply here.Limited bandwidth of the operational amplifier also causes overshoot of the change of the differential input voltage before slewing of the output can start, but that is not important here.The reason this matters is that the photodiode capacitance resists the needed change in the differential input voltage, no matter how small it is, which is required to get the output slewing, which is why there is advantage in minimizing it. Of course a proper analysis would involve a bode plot and the effect of the photodiode capacitance on the frequency compensation, but the above is where the change in differential input voltage is coming from.

author: TimFox
author_rank: Super Contributor
timestamp: September 25, 2023, 07:07:41 pm
content: Consider the photodiode connected to an op amp (which acts internally as a voltage-in, current-out first transconductance stage driving the compensation capacitor in the second stage, as you discuss, to give the open-loop frequency response), with a feedback resistor to define the transresistance of the whole circuit (photocurrent in, voltage out).For simplicity, neglect the external feedback capacitor required for stability.At medium frequency (above DC but well below the unity gain frequency), a sinusoidal component in the photocurrent will result in a sinusoidal output voltage component, close to in-phase with the photocurrent, due to the amplifiers feedback resistor.The sinusoidal component across the op amp input terminals will be that voltage divided by the open-loop voltage gain of the op-amp, which in that frequency range falls inversely with frequency and has a 90 degree phase angle.Therefore, the AC voltage across the photodiode is determined by the output voltage and the open-loop gain, but will have a corresponding phase shift.To further the analysis, we need to compute the (undesired) current from this input voltage through the diode's capacitance, which will produce some error, important at higher frequencies.In this context, the diode capacitance will affect what we mean by "medium" and "higher" frequencies.The algebra is straightforward, and can be done easily by an ".AC" Spice simulation.Note that the normal op amp datasheet for such devices is characterized by a DC voltage gain (somewhat ill-determined) and a unity-gain frequency (GBW) that is better-determined from unit to unit.

author: magic
author_rank: Super Contributor
timestamp: September 25, 2023, 08:07:42 pm
content: Quote from: TimFox on September 25, 2023, 07:07:41 pmThis is the output changing at a rate proportional to the differential input voltage.

author: TimFox
author_rank: Super Contributor
timestamp: September 25, 2023, 08:30:32 pm
content: Quote from: magic on September 25, 2023, 08:07:42 pmIf you analyze it that way, you should get the same answer.However, the slew-rate vs. differential input voltage is not a data-sheet function.My analysis only needs the GBW = unity-gain frequency (assuming a simple op amp), which is a data-sheet parameter.Note the importance of the overall feedback network (feedback resistor and capacitor, with diode capacitance and resistance) to the analysis.

author: CamJam
author_rank: Newbie
timestamp: April 15, 2024, 11:20:03 pm
content: I recently found this JFET bootstrap documentation (see pp. 16-18 of attached Linear systems application note file) and this forum has helped me tremendously in determining it usefulness for large gain transimpedance (TIA) design.I would like to share how I convinced myself that the JFET improves the noise and stability performance of a TIA system I am designing for a project using a SFH2440 photodiode.DISCLAIMER:I am not the savviest with op amp and semiconductor/transistor circuit analyses… so please excuse my mundane interpretation and feel free to share better ways to interpret how the JFET effects a TIA circuit. With that said lets jump into it! This is where thestarts...There is a TLDR below.My “aha” moment was when I reconfigured the JFET circuit (left) into its equivalent small signal lumped model (right) as shown in the image "JFET Bootstrap Circuits".https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123060;imageReferring to the rightmost circuit, the “magic” of the JFET is the fact that the gate-drain capacitance (Cgd = 2 pF) is in series with the junction capacitance of a photodiode (Cj = 135 pF). As the Cj >> Cgd, the equivalent capacitance connected at the -IN terminal will be ~ Cgd. (I see it as the JFET acts like path of least resistance for the AC current coming from the feedback loop back into the -IN node of the TIA).To supplement what @Tim Fox, @Marco, and @moffy (Reply 1-3) described… the JFET reduces the noise gain -> NG = 1 + Rf/X-IN(f) (where Rf is the feedback resistor and X-IN(f) is the equivalent reactance of the capacitance found at -IN terminal of the op amp at frequency = f) seen by the input of the op amp.Proof is in the pudding, I simulated the effect of the JFET with some SPICE (using the left circuit from "JFET Bootstrap Circuits). The frequency response for the TIA system without a JFET is shown in image "f response no JFET".https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123072;imageThe PM of the OPA1655 without a JFET is 78° which indicates a stable system. Notice that the NG at f = 10 kHz is 37.85 dB (= 91 V/V) and peaks to a value of 43 dB for higher frequencies. The NG I calculated at f = 10 kHz was 38.6 dB at Cj = 135 pF and Rf = 10 MΩ. The input voltage noise density of the OPA1655 is 2.9 nV/√Hz, multiply that by NG and you get an output voltage noise density contribution of ~ 265 nV/√HZ.The simulation for the frequency response with the JFET bootstrap is is shown in in image "f response with JFET".https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123066;imageNotice for this case that the NG here is ~ 15 dB less than the f response for the TIA without the JFET at f = 10 kHz. Calculating the NG using C-IN = 4 pF and Rf = 10 MΩ gave me ~ 7 dB which does not agree well with the simulation… probably because I did not account for the ~ 10 pF from the op amp input (or the JFET spice model actually has a Cgd > 2 pF). The 23 dB from the frequency response corresponds to a C-IN ~ 15 pF). The output voltage noise density contribution by the op amp input voltage noise density of the JFET bootstrap is ~ 30 nV/√HZ when a JFET bootstrap is used.Despite the disagreement between the simulation and calculated values… the takeaway here is that the JFET bootstrap does lower NG due to lowering the effective capacitance at -IN. This is useful for high gain TIA and/or an op amp with relatively high input noise voltage density (> 5 nV/√Hz) where reverse biasing the photodiode does not reduce the capacitance at the -IN enough to lower NG.For comparison, the Rf noise (which does not vary whether a JFET is used in the TIA… to my knowledge) for a 10 MΩ feedback resistor at 25 °C (298 K) is ~ 405 nV/√HZ. So, by simply using a JFET bootstrap, the contribution of the input voltage noise density is less than ±3x that of the Rf voltage noise density (i.e., the contribution of the op amp input voltage noise density to the total output voltage noise density is negligible compared to that of Rf).A quick note on stability as the JFET bootstrap could also help with improving stability/distortion for TIA systems with lower Rf values and GBW. A general rule of thumb you want to ensure that fi = GBW*Cf/(C-IN + Cf) > fp = 1/2*pi*Rf*Cf for your output signal to not be unstable.For example, lets assume an op amp to be used has a GBW of 2 MHz and the fp of the system designed must be > 150 kHz (so fp = 150 kHz), and Rf = 1 MΩ. The corresponding Cf must be ≤ 1pF to satisfy this criterion. If C-IN = 144 pF (no JFET) and Cf = 1 pF, fi = 125 kHz which is < fp, typically corresponding to less stability/more distortion in the output. If C-IN = 4 pF (no JFET), fi = 400 kHz which is > fp corresponding to a more stable output. The simpler solution to improve fi would be to simply find a op amp with greater GBW.TLDR: For large gain TIA systems, the JFET bootstrap method helps in 2 ways:1. It will significantly lower (not eliminate) the op-amps input noise contribution to the total output noise to the point that it is typically no longer the dominant source of noise of the TIA (for feedback resistance values ≥ 1MΩ). (From my analysis the thermal noise of the feedback resistor will be the dominant source of noise afterwards for large gain TIA systems.2. Lowering the capacitance at the -IN terminal of the op amp to < 20 pF (assuming stray capacitance is minimized in the PCB) can significantly help with improving the stability of the TIA (for lower gains/feedback resistance values ≤ 1 MΩ) by typically allowing the use of feedback capacitance (≥ 1 pF) which are more practical to achieve in physical circuit designs.Despite these improvements, if a low noise system is desired… ensure to minimize photodiode shot noise and feedback resistor thermal noise as they tend to become the dominant noise sources in the JFET bootstrap TIA configuration (good luck with resistor thermal noise…).