Serial protocol design standards/guidelines - Page 1
Forum section: electronics / general

author: ricko_uk
author_rank: Super Contributor
timestamp: June 09, 2020, 10:11:18 pm
content: Hi,are there "relatively simple" software protocols for designing/implementing reliable 2-way SPI communication between master and slave? If not at least some guidelines?Thank you

author: kamtar
author_rank: Regular Contributor
timestamp: June 10, 2020, 01:36:17 am
content: It all depends on your use case.

author: Warhawk
author_rank: Frequent Contributor
timestamp: June 10, 2020, 04:04:00 am
content: You don't always need a protocol. Is this an off-board communication? Same MCUs? Is one always the master?Your question is vague and can't be properly answered. Try to be more descriptive.A tip: You can have a DMA constantly transferring a specific memory location. You can map your data there (e.g. structs etc.). For sure, you need to know what your compiler does and how data get organized but this is a valid approach.

author: dtodorov
author_rank: Contributor
timestamp: June 10, 2020, 06:11:27 am
content: That is actually an interesting question.So far I have not encountered a standardized higher-level protocol to validate data and prevent transmission errors. Basically, most PHYs can have physical layer error detection (even the UART has parity bits), but if you aim to have robust communication in harsh environment I suggest you look over to CAN/IP networks.

author: ricko_uk
author_rank: Super Contributor
timestamp: June 10, 2020, 01:19:43 pm
content: Thank you all

author: SiliconWizard
author_rank: Super Contributor
timestamp: June 10, 2020, 03:12:04 pm
content: Yeah, I don't think there's a general answer to this. Really depends on your requirements.That said, over the years I have designed and used base protocols for this kind of thing, that are simple enough, robust enough and have proven to work well.They are basically all based on the following packet structure:* A header, containing:** Sometimes a 'magic' sequence (can help identify the start of packets);** A packet 'role" ID (defines what the packet contains, can be a "command", pure data, etc.);** The packet size;** Sometimes a packet 'sequence number' (if the protocol allows retrying);* Possible 'data';* A CRC of some kind of the whole packet (can be included in the header or at the end of the packet).Depending on the requirements, the protocol can also include the fact that all packets must be acknowledged.

author: ricko_uk
author_rank: Super Contributor
timestamp: June 10, 2020, 04:45:03 pm
content: Thank you SiliconWizzard !

author: ETITsynthesizer
author_rank: Contributor
timestamp: June 12, 2020, 02:05:09 pm
content: you can use SPI in full duplex if both the master and the slave support it. while IP+CAN is great it also has more overhead both in bandwidth and CPU requirements. you can slow down TCP but the % of bandwidth that goes into the protocol for very small packets might not be worth it. also, numbering packets might not be worth it if you wait for confirmation before moving on. this creates a lot of wait conditions but it does not use as much ram as having a complicated asynchronous stack. you can be as low level or as high level as you want. there are plug and play CAN kits that basically write the software for you. you can code this on bare metal in assembler on an ARM cortex M0.