BeMicro CV Questions - Page 1
Forum section: electronics / general

author: weilawei
author_rank: Newbie
timestamp: October 02, 2014, 07:21:10 am
content: I've recently received theBeMicro CVFPGA dev board, and it's a cute little bugger. I love it and I'm super pleased with my purchase, but it's got an 80-pin card-edge connector, and I can't seem to find the right one. In apostI wrote for my blog, I noted that the suggested mate is aSamtec MEC-140-02-L-D-RA1. The photos show a plastic divider, but no such corresponding cutout exists on the card edge! I've counted pins and it doesn't appear that it would even fit half the connector or something like that. Does anyone have any suggestions on how to make use of it (without soldering because I try to reuse all my parts)?Also, I'm pretty new to serious electronics, but I'm a very experienced programmer (though new to Verilog). I've played with 100-in-one kits early on, but my enthusiasm was damped by spring terminals as a kid, so I invested heavily in the programming side of my skillset. Since my buddy gave me a breadboard, it's been a whole different experience.I've got a little Hello World demo going on the board (also run the Propeller P8X32A on it!!) showing a few logic gates, but there's a quirk. In the sim, the code acts as you would expect (an AND gate acts like an AND, OR like OR, XOR like XOR), but on the board, an AND acts like an OR, an OR like an AND, and an XOR like an XNOR! The code in my post is written so that it'll light up the LEDs in the "intuitively correct" fashion (to my mind at least).A good friend of mine who's an actual EE explained that I could use a chunk of the logic elements to swap things around, but I'd like to know: what's the standard practice for dealing with this sort of mirrored logic? (It's not really an inverse to my mind as a programmer, because you can't just negate the gate or the inputs as the truth tables for AND and OR aren't symmetrical.)Ultimately, I plan on implementing my own small processor inside it (to tackle a specific crypto problem I have in mind), but I'd love any advice or corrections to the information contained in my post.Thanks everyone! (And especially thank you Dave for teaching me so much about electronics!)

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 02:44:54 pm
content: Too bad you didn't post before purchasing.I got the BeScope Bundle for just $50 which includes the SDP Interposer with the mentioned connector.My research shows me that the connector used by hitex on the original BeMicro is Edit(NOT) the one you mentioned.Edit: correction, the one used is a MEC6 not MEC1 as you linked.http://www.hitex.com/index.php?id=1804Look at the schematic of the last product here that supposedly can be used with the BeMicro series including their new MAX10 offering.http://www.hitex-download.de/lpc/lpc-stick/USR_SCM_LPC-Stick-Prototype-A1-2.pdfBut I haven't purchased such connector yet. At $10 it puts in in the expensive category for me:http://www.newark.com/samtec/mec6-140-02-l-d-ra1/connector-card-edge-rcpt-80pos/dp/85T5569And I don't have a need for it since I have the interposer and I can get the other connector cheaper (I'll have to look it up again what is on the other side of the interposer but as I recall the connector was only a couple of dollars)

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 03:13:00 pm
content: Forgot to put the link to the bundle:http://parts.arrow.com/item/detail/arrow-development-tools/bescopebundleIt comes with:BeMicro CV Eval KitSDP Interposermini USB cableoscilloscope probeBeScope Daughter CardI already had a BeMicro CV so now I have twoOne problem is that the software distributed with the BeScope is missing some crucial file, but some one got it from the nCk-research team that Arrow hired to do the software. A batch file is still missing but it's not crucial.Edit: link to where to get the missing file (BeServer.tcl) in this thread from parallax.com:http://forums.parallax.com/showthread.php/157115-BeScopeBundle-System-FilesThere is also a batch file missing but as mentioned before it's not crucial, but convenient to be able to run the scope code easier.

author: tggzzz
author_rank: Super Contributor
timestamp: October 02, 2014, 03:24:21 pm
content: Looks like a good price for a reasonable board - except for the 40 pin connectors. One only has two GNDs, the other has 10 but they are somewhat clumped together.I question whether there might be (unnecessary) signal integrity issues with tightly specified high speed signals.

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 03:37:42 pm
content: Quote from: tggzzz on October 02, 2014, 03:24:21 pmOne of the 40 pin connectors is compatible with Terasic daughter boards (including all the DE series boards that have 40 pin connectors)So you can find boards like this 3 channel full 8bit per color high speed (330Msps) video DAC board shown here with a DE0-Nano.BTW is a good DAC:The other 40 pin connector is not compatible with Terasic boards so you gotta be careful on using the right one.

author: weilawei
author_rank: Newbie
timestamp: October 02, 2014, 03:57:23 pm
content: Fantastic! Thank you so much miguelvp! It's cool to see that other people have this board as well, since I've had some difficulty cobbling together documentation. I wish I had posted first, but hey--live and learn. I've gone and updated the blog post to reflect your advice.I might eventually buy the kit and get a second board, but first, I think I'll get that connector and make myself a breakout board. Right now, I'm not really looking to use existing daughterboards, but more to make pins available for wiring up things to experiment with. I'm sure I'll get there eventually, but for now, it's all about the GPIO.How's the quality of the BeScope?

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 04:46:56 pm
content: Quote from: weilawei on October 02, 2014, 03:57:23 pmI only played with it briefly just to make sure I could make it work, and posted my thoughts here:https://www.eevblog.com/forum/blog/eevblog-661-mailbag/msg513818/#msg513818Excerpt:Pictures of the device generating 2.5MHz and 5.0MHz ringing square waves as well what the DS2202 sees.2.5MHz:5.0MHz:Rigol:

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 06:40:11 pm
content: From that BeScope post I mentioned the connector on the other side in the interposer:QuoteSo If you get the SDP Interposer you can use the Hirose FX8-120S-SV in your board. or if you get the connector you could also get the FX8-120P-SV and find out the schematic for the Interposer (I know it's somewhere on the net) and make your own interposer that is compatible with the Analog Devices boards

author: tggzzz
author_rank: Super Contributor
timestamp: October 02, 2014, 07:36:42 pm
content: Quote from: miguelvp on October 02, 2014, 04:46:56 pmFor us to understand the significance of that ringing, you have to define the probe used and how it was connected to the board.And then, when considering the lack of GND pins on the 40-way connectors, see what happens w.r.t. ground bounce when many outputs simultaneousl switch in the same direction.

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 09:30:45 pm
content: Quote from: tggzzz on October 02, 2014, 07:36:42 pmThe ringing is just be cause of the oscillator generating the 2.5MHz and 5.0MHz test signal.This is the schematic that you can find in the link I gave above with more details:I was just probing the in board test signal using both the ground and the signal pins on the test signal.QuoteAs far the lack of GND pins I'm not sure what are you talking about, it has 2 GNDs one 3.3V and one 5V on the Terasic 40 pin connector.The custom one has 10 GND pins out of the 40, and the 80 pin connector has 23 pins that I can't find assigned, I will have to look at the schematic if they are all connected to ground, pins [30-34] and [61-80]

author: weilawei
author_rank: Newbie
timestamp: October 02, 2014, 10:49:10 pm
content: Quote from: miguelvp on October 02, 2014, 09:30:45 pmFromschematics(not 100% sure they're correct, this is untested, will edit after testing).On the card edge, using the format of: CEC Pin -> Label -> Pin Planner (IO Bank) (Notes)):30 -> EG_P45 -> P14 (D)31 -> EG_P13 -> AB18 (D)32 -> GND33 -> GND34 -> EG_P46 -> R14 (D)61 -> EG_P26 -> W21 (D)62 -> EG_P58 -> V20 (D)63 -> EG_P27 -> V21 (D)64 -> EG_P59 -> U20 (D)65 -> EG_P28 -> U22 (D)66 -> EG_P60 -> P18 (E)67 -> EG_P29 -> U21 (D)68 -> NC69 -> NC70 -> NC71 -> NC72 -> NC73 -> NC74 -> NC75 -> NC76 -> GND77 -> NC78 -> EXP_PRESENT -> P19 (E) (R32, 10K to GND)79 -> VCC5P080 -> VCC5P0

author: tggzzz
author_rank: Super Contributor
timestamp: October 02, 2014, 10:53:43 pm
content: Quote from: miguelvp on October 02, 2014, 09:30:45 pmVery unlikely, since the oscillation frequency is independent of the clock rate, probably around 100MHz.I'll bet your probe has a 6" ground lead and croc clip, and a ~15pf tip capacitance.Seehttp://www.ganssle.com/video/episode1.htmlhttp://www.ganssle.com/video/episode2_whats_in_a_scope_probe.htmlfor an indication why, then readQuick probe overview:http://www.williamson-labs.com/scope-probes.htmGood intro to probes:http://circuitslab.case.edu/manuals/Probe_Fundamentals-_Tektronix.pdfQuirky but informative about probes:http://www.dfad.com.au/links/THE%20SECRET%20WORLD%20OF%20PROBES%20OCt09.pdfQuoteDetails matter where signal integrity is concerned.QuotePrecisely.I prefer to see a 1:1 signal:ground for high speed signals, but 4:1 is usually not a problem particularly with differential signals,providedthe grounds are near the signals, which implies evenly distributed. "Professional" high-speed board connectors meet those conditions.You need to get a basic understanding of signal integrity. There's no such thing as a digital signal (except when considering individual electrons); everything is analogue and/or RF.To give you an inkling of the issues, consider a single output that drives a 50ohm line through 1V in 1ns. That's a current change of 20mA in 1ns, or 20MA/s (and I mean MA/s not mA/s). Now a piece of wire (e.g. in a connector or IC lead) has an inductance of roughly 1nH/mm. Given a 3mm lead in a connector, the 20MA/s will induce a voltage across the wire/inductor of 60mV, i.e 6% of the signal voltage. Now have 10 outputs switching simultaneously, and you have an induced voltage of 600mV, or 60% of the signal.

author: Dongulus
author_rank: Regular Contributor
timestamp: October 02, 2014, 11:56:56 pm
content: Quote from: tggzzz on October 02, 2014, 10:53:43 pmYeah, this is probably the case. You can make a quick short ground probe using a piece of insulated wire. Start by taking the "witch's hat" off of the oscilloscope probe then strip both ends of the insulated wire and wrap one end around the metal ground shield of the probe. Thicker gauge wire is a bit better because you can bend it and it will keep its shape. Pick a ground reference point close to where you are probing.It takes some effort to master holding the probe tip and the ground probe in place with one hand. We have some real Tektronix short ground probes at work, but most of the other engineers tend to prefer the wire wound probes better. This will likely remove some of that edge oscillation if you keep the wire short.

author: miguelvp
author_rank: Super Contributor
timestamp: October 02, 2014, 11:58:36 pm
content: There are plenty of high speed transceivers and lvds pins.you not always need ground.And it's just a test signal. it reads my 1khz test signal from the scope without ringing.Also probing without ground since the test signal ground is the same as the scope module produces the ringing, so I'm not worrying too much about it and it's kind of off topic. I was just saying that for $50 he can get the bundle instead of paying $49 for just the dev kit. The interposer alone goes for another $50 for example. And the BeScope by itself is $45, the probe is a cheapy $10 100MHz, so you are getting $150 worth of things for just $50

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 12:46:41 am
content: Back to the OP message, I did look at your article and I want to confirm that both my boards have the 5CEFA2F23I7N higher specked FPGA, didn't even bother to look before so thank youAs for the memory, you can use the NIOSII lower level soft core so you don't need to be tethered (I haven't tried it yet). Also you gotta check on hamster_nz's website he made his own SDRAM controller. There might be other controllers that don't need Avalon, but you got to initialize them with a State Machine.http://hamsterworks.co.nz/mediawiki/index.php/SDRAM_Memory_Controllerhttp://hamsterworks.co.nz/mediawiki/index.php/Simple_SDRAM_ControllerAlso the BeScope uses the memory via the Avalon interface without the NIOS soft core, so you can use the DRAM controller untethered.There are two versions of the documentation for the BeMicro CV I will try to hunt them down where I got them from (nevermind you address that on your blog).As for the inverted logic, it's not really inverted, a 1 is active High. Now your inputs might be inverted, didn't look at the details but if your input ports are set to 3.3V and you get one high and the other one low (0V) an AND will produce 0V as expected. Or maybe your output is inverted and the LED is pulled high, didn't look at the details but the board is not running on inverted logic levels.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 01:20:39 am
content: More detail on the inverted logic problem you are experiencing.Here are the schematics of the switches, buttons and LEDs on the BeMicro CV.The switches and buttons are pulled high when off (putting VCC on the pin) and grounded when on or pushed (putting 0V on the pin)On top of that the LEDs are pulled high, so when floating or off on the pin they light up. And they turn off when you output a 1 on the pin.So the logic is valid within the FPGA but your inputs are inverted and so it's your output, so you'll have to add not gates to both to make it work properly.You can do that by adding a schematic top level to define the pins and adding the appropriate Not gates.Here are the DE0-Nano schematics, you'll notice that they are what you expect, and on top of that the buttons are hooked via a hex Schmitt-trigger buffer providing debouncing for the switch.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 02:04:27 am
content: Updated:https://www.eevblog.com/forum/microcontrollers/bemicro-cv-questions/msg523257/#msg523257with link to where to get the BeServer.tcl file that is missing in the BeScope.Also, do get the source for the BeScope to learn how to make your own Avalon Master so you don't need the NIOS II soft core.

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 08:13:30 am
content: Quote from: miguelvp on October 02, 2014, 11:58:36 pmSo in one toy example there aren't any problems. I can believe that.Now try to use the 40-way connectors "for real", and there may be subtle intermittent failures that can be difficult to diagnose and impossible to cure.Hint: what's important is the signal's rise/falltime and the setup/hold times on inputs, and edge ringing causing false clocking. And all of those are as relevant for a 1kHz signal as they are for a 50MHz signal.QuoteI was addressing your point and pictures about "device generating 2.5MHz and 5.0MHz ringing square waves". I made no comment about anything else you said.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 08:37:19 am
content: I've driven that DAC up to 1600x1200 at 60Hz, so 162 MHz pixel clock. Edit (using that 40 pin connector)In this capture it shows the time for 256 values. So multiply the 1 over delta X to get the approximate pixel clock.Edit: 1600x1200 @60Hz output (phone camera picture)Pushing the pixel clock to 330MHz beyond what the FPGA should be capable off I was getting some noise, you can clearly see 16 bigger spikes over the 256 value range and noisier.On the previous page it was a 25.6MHz pixel clockAll of them 24 pins for the RGB plus HSync and VSyncEdit: And if you are compelled to know how fast the edge connector is, feel free to send me any one of these boards:http://wiki.analog.com/resources/alliances/altera

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 02:15:10 pm
content: Quote from: Dongulus on October 02, 2014, 11:56:56 pmPersonally I like the bayonet/spear type ground connection on a low-impedance Z0 probe, which is demonstrably good to >1GHz (and potentially 6GHz if you have the right Keysight probe!).I suspect your "real Tektronix short ground probes" are bayonet/spear grounds. They are surprisingly easy to crete at home with a needle, phosphor bronze sheet and Fimo modelling clay! They are also a prime candidate for a small project on a 3D printer.There are good descriptions of how to make your own GHz Z0 probes on the web.Putting all that together, I'm surprised that people are prepared to publish diagrams showing ringing digital signals; it looks as if they don't know what they are doing.

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 02:24:25 pm
content: Quote from: miguelvp on October 03, 2014, 08:37:19 amVery pretty pictures, and I am glad they work for your application.But I don't think the pictures can be taken as indicating too much about the signal integrity. The waveforms shown are too far removed from the potential problem, so there's no indication of how close to the edge of the envelope (or eye diagram in this case) the waveforms are.Is there any possibility you could show diagrams when using a low impedance Z0 probe plus very short ground lead/bayonet/spear? That probing technique is good to >1GHz, and actually the "low impedance" Z0 probe probably has ahigherimpedance than the probe I suspect you are using.In addition, you state the signals in question are (very sensibly) differential, which will of course avoid degrading signal integrity - as I noted in an earlier post. If someone else in a different design uses single-ended signals, the results might be quite different.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 02:37:36 pm
content: I said the pins can be configured to do differential signals. Those are not the case in there.Also my 200MHz scope with 300MHz probes at 2Gsps falls short even for the 330MHz measurement.In any event, the BeScope measuring its own test signal with the ground clip removed showed the ringing even with a shared ground with the test signal.

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 02:52:24 pm
content: Quote from: miguelvp on October 03, 2014, 02:37:36 pmOf course it does. What else would you expect with a 200MHz scope looking at a 330MHz signal? Even the fundamental will be significantly attenuated, and the harmonics will be grossly attenuated. The 2GS/s spec is effectively meaningless in this context.(If you mean a 330Mb/s signal then the effects won't be quite as pronounced, but they will still be significant. The rule of thumb is that to look at the signal integrity of an X MHz clock, you need a scope with a bandwidth >5X MHz)QuoteWhat else would you expect to see if you don't have a properly grounded probe?! At these frequencies there's no such thing as a "shared ground".Seriously consider reading those references I gave in an earlier post - you'll learn a lot and will get better results.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 03:26:30 pm
content: The ground on the test signal is the same ground on the scope barrel, are you clamming that's not properly grounded if I use the probe with the ground clip removed?(the signal is labelled as CLK Out).Edit: the board is designed to do 250MSps topping at 50MHz. At least my Rigol uses a x10 ratio 200MHz with 2GSps.Schematic here:http://download.siliconexpert.com/pdfs/2014/8/12/6/18/35/157/arrowd_/manual/bescope-revg6schematics.pdf

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 04:04:01 pm
content: Quote from: miguelvp on October 03, 2014, 03:26:30 pmOh good grief!Look at the references I previously posted in this thread.They will explain the theory and show experiments demonstrating that the theory matches practice.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 04:12:34 pm
content: It's not that simple.I will have to put everything aside and fire up that project, I did look at the references you linked but I don't have any interest in measuring it again. I will get to it eventually when I wan't to expand the use of that BeScope later on.Sorry for the ringing in your ears, but Like I mentioned I only gave it a quick look to make sure it was working and then it went back to the queue where it will stay until I decide to look at it again.Edit: And I do have a short ground tips for my probes, I'm sure the ringing is in there because if the test signal uses the same ground as the scope you don't need that short ground tip, but I will look at it again when I get to it.

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 05:18:30 pm
content: Quote from: miguelvp on October 03, 2014, 04:12:34 pmIt is that simple.As a handwaving starting point, consider that a 330Mb/s signal will have a fall/risetime of (at most) 1ns and a bit period of 3ns. If your probe is 1m long then it will take any signal around 3ns to get from the tip to the scope. Hence if you changed the "ground" voltage at one end, it would take several transition times and about a bit period before "ther other end" even "notices" any change in "ground" voltage. At these frequencies the concept of a single ground is a false myth.Hence, on the subject of signal integrity and scope probes:you are ignorantyou aresoignorant that you do not realise thedepthof your ignoranceYouwillhave the same problems every time you look atanyfast digital signal on any project or any piece of equipment.So why delay learning?. If you don't learn then you will waste time on the next project involving high speed signals.You have been pointed towards information that will help you lessen your ignorance. If you don't follow it up then two English proverbs apply:"you can lead a horse to water, but you can't make it drink""there's none so deaf as them's won't hear"As I taught my daughter:it is OK to makenewmistakesignorance can be cured; stupidity can'tEdit: my apologies for the somewhat brutal way in which I expressed those truths.

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 05:30:57 pm
content: The way I see it.I know how to use a short ground clip, have used it before so it's no mystery to me.You are the one that is bringing up the signal integrity of the board, go ahead and buy one for $50, I'm not going to stop what I'm doing to satisfy your curiosity.Terasic has plenty of boards that use the 40 pin connector using only 2 grounds and I've not heard any problems with them.As for proverbs, this is not one but:Don't sweat the little stuff. It's a test signal and I'm not interested in the least to find out if the oscillator that is only used for that purpose, rings or not.If you need to find out, then get the damn thing and try it yourself.

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 06:19:15 pm
content: Quote from: miguelvp on October 03, 2014, 05:30:57 pmThat's good, but it certainly isn't evident from what you've written in this thread. Quite the contrary in fact.QuoteMy interest is limited to raising potential problems before people spend too much time/money on the board. Particularly since the potential problem might well lead to the "Pictures of the device generating 2.5MHz and 5.0MHz ringing square waves".

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 06:30:22 pm
content: The burden is not on me to disprove your theory. Never heard any problems with Terasic DE series board having problems with their only 2 ground count 40 pin headers as far as signal integrity problems.Seems to me the burden is on you, so go for it.BTW the oscillator has nothing to do with the 40 pin header (other than turning it on)

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 06:47:34 pm
content: If I thought this conversation could produce any new information, I would ask "what theory do you think I am trying to prove?", and note that you've only just got around to mentioning that the 40-pin connector wasn't involved. But that would only lead to a pointless "you said - no I didn't..." conversation, so I won't.Quote from: miguelvp on October 03, 2014, 06:30:22 pm

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 07:06:36 pm
content: Quote from: tggzzz on October 03, 2014, 06:47:34 pmWell....Quote from: tggzzz on October 02, 2014, 03:24:21 pmQuote from: tggzzz on October 02, 2014, 07:36:42 pmQuote from: tggzzz on October 02, 2014, 10:53:43 pmQuote from: tggzzz on October 03, 2014, 08:13:30 amQuote from: tggzzz on October 03, 2014, 02:24:25 pmQuote from: tggzzz on October 03, 2014, 06:19:15 pmI bet you are very well loved and a nice guy, but not such a nice person on the net.So prove their connector is inferior, I did put that project aside a several weeks ago and I'm not digging it out for you, because frankly you are more demanding than a spoiled kid.So just get the thing and prove your groundless theory.After all Terasic has been using that 40 pin connector for what 5+ years?Edit: Also I would have expected an "Expert" like you to just glance at the oscillator circuit and realize it only has one enable signal to turn it on and one to switch between full frequency or half frequency:

author: tggzzz
author_rank: Super Contributor
timestamp: October 03, 2014, 08:32:06 pm
content: QED

author: miguelvp
author_rank: Super Contributor
timestamp: October 03, 2014, 09:28:04 pm
content: Quote from: tggzzz on October 03, 2014, 08:32:06 pmWWWWW by you

author: weilawei
author_rank: Newbie
timestamp: October 04, 2014, 01:09:44 am
content: The whole ringing and signal integrity debate aside (thanks for the info, both of you!), I have a further question about the logic levels.Now, I know that on thechip, the gates act as normal. No confusion there. But on theboard, the LEDs and the switches are pulled high, so they're Off when the logic level is 1/True, and On when the logic level is 0/False. So, the default state of an LED is Off/1/True, and the default state of a (let's pick one) tact switch is Off/1/True.When I press the tact switch, it gets pulled back to ground (excuse my terminology--I'm sure I'm butchering it. Please just try to follow). So, the state of the switch is On/0/False when being pressed (the inverse of what I would expect as a programmer/non-EE). If I map an LED to track the state of the switch, that means that the LED is also pulled low and its state is now On/0/False. So far, so good. Everything works as expected.Now, I take another switch and another LED. If, in the code, I do (tact_a & tact_b), the result when both are pressed will be 0, and the LED will light up. So far, still good.Now, I press only one switch. The result of the AND gate is still 0 and the LED is still turned on--the opposite of the intuitive result. I want the LED to reflect the intuitive usage of the switches. If you expect behavior where the LED only turns on when both switches are pressed--that won't happen. In fact, you get behavior that looks like an OR gate. When I let go of both switches, they're both registering Off/1/True, and thus the result of the AND gate is 1, meaning that the LED turns OFF.In order to get the intuitive output, I needed to swap AND and OR gates, and negate XOR gates. What's the usual way to fix this? I spent quite some time writing out the truth tables for these operations as reflected by the lights and switches on the board. If you simply negate inputs and outputs, you don't get the intuitive result (as the AND and OR gates aren't symmetrical, so you can't just negate them in this case, you need the mirror image of them... swapping AND and OR, though you can negate XOR because it IS symmetrical).So, what's the usual fix, so that I can write my code as normal, and also see the output as expected? In the simulator, the "switches" and "LEDs" are normally pulled down to ground, so everything works as expected, but on the board (not the chip, the board), you get a mirror image of the expected results. Something was mentioned about adding a "top level schematic", but I don't know what that means. I'm brand spankin' new to Quartus II, FPGAs, and Verilog, although I do have some experience with microcontrollers--but always wired the other way around (GND is false/0, VCC is true/1).

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 01:19:18 am
content: I would use a top_level schematic and add your input pins and wire them to NOT gates if they are 1 when unpressed, also on the outputs use NOT gates as well if they are on when 0. Make a symbol of your Verilog/VHDL code and wire it on the top_level schematic.I can add a simple tutorial with images if you need more detailed clarification.As for the signal integrity/ringing I assumed that with the oscillator schematic it would be clear it was not due to the header. But I guess he assumed the signal was coming from the FPGA. Misunderstandings happen. But the insulting and derogatory tone, well that's unfortunate.

author: weilawei
author_rank: Newbie
timestamp: October 04, 2014, 01:24:25 am
content: Quote from: miguelvp on October 04, 2014, 01:19:18 amThat would actually be awesome, but you really don't have to. Is there a good tutorial somewhere out there on this? All the tutorials I find seem to be aimed at VHDL. Should I be learning VHDL instead? My google-fu seems to be failing me. I appreciate you taking the time to help a n00b.EDIT: I suspect that what my EE friend was trying to get at is the same thing as you've suggested, but I'm about as dense as a brick wrt Verilog right now. Perhaps a comprehensive Verilog tutorial for n00bs is out there somewhere?

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 01:38:48 am
content: There is always the my_first_fpga tutorial from Altera:http://www.altera.com/literature/tt/tt_my_first_fpga.pdfThe thing is that you don't need the clocks and other things but they use a top level schematic and then they add a counter symbol produced by verilog code.Only things you have to change is the device to match yours and the pin planner to match your board.Also the pll ip might not be available for the Cyclone V (I'm pretty sure the one they use there is not the same) so It might be confusing and for what you want you don't need a PLL anyways.I don't mind doing a simple tutorial if you post the verilog code that you want to do with the logic as you expect (not the inverted stuff) and the pin planner for your board.

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 06:23:25 am
content: I decided to do it based on the code on your blog, let's see how this comes out, 26 pictures and 30 steps, taking some shortcuts because I think you know the programming part of things.1) File>New Project Wizard2) Click Next3) Fill in the New Project Wizard and click next. (note you can't have spaces in the project names nor directories.4) Might ask to create the folder so click Yes.5) Select Family Cyclone V (E/GX/GT/SX/SE/ST) Name filter: 5CEFA2F23C7 select the only chip listed and click Finish6) Select Assignments>Device and click on the button in the middle named "Device and Pin Options..."7) Under Category select "Unused Pins" and set it to "As input tri-stated" (default is weak pull that will make the LEDs glow even when off) Click OK then OK again to dismiss the Device popup.8 ) Create a Schematic (.bdf) File>New>Block Diagram/Schematic File9) Save the generated bdf file as sample1_top: File>Save As... (should be the default) needs to be the same name as your top project set in step 3, it associates it as the top level. Click SaveThe top level can be schematic, Verilog, VHDL, System Verilog,etc.10) Lets add your Verilog code. File>New>Verilog HDL File click OK11) Save the created Verilog1.v file as hello_world.v: File>Save As... type hello_world.v under File name and click Save.12) Input your code in hello_world.v and save itCode:`timescale 1ns / 1psmodule hello_world(input wire tact_a,input wire tact_b,output wire [7:0] led);// Turn off unused LEDsassign led = 1'b0;assign led = 1'b0;assign led = 1'b0;// Status LEDs for tactile switchesassign led = tact_a;assign led = tact_b;// Normal behaviour due to schematic top level fixing the inputs/outputsassign led = tact_a & tact_b; // ANDassign led = tact_a | tact_b; // ORassign led = tact_a ^ tact_b; // XORendmodule13) Let's make a symbol out of your code: File>Create/Update>Create Symbol Files for Current FileThis will convert your hello_world.v to a symbol file (.sym)14) Now let's add the hello_world.v symbol to the top-level file, click on the sample1_top.bdf tab15) Right click on the canvas and select: Insert>Symbol and expand Project on the popup window and select hello_world and click OK16) The symbol will be attached to your cursor, click somewhere in the canvas to place it.17) Lets add the input pins, you can right click on the canvas then insert symbol and look for the primitives etc.. but let's use the icon as shown here.18) The pin will be attached to your cursor, click where you want it and you will have another pin attached to the cursor, place the 2nd pin and press ESC when you have both pins in the canvas.19) NOT time: right click on the canvas and select: Insert>Symbol20) Expand libraries>primitives>logic>not check Repeat-insert mode and click OK (or type not under the name box, check Repeat-insert mode and click OK)21) Place 3 NOTs, press ESC when done, then click on an input and move it so it connect to the NOT and same thing with the other input.22) move the cursor to the end of one not, the cursor will change to a wire, click and drag the wire to tac_a, a square box will show showing it's connected release the mouse button.23) Do the same for the other input and from the symbol output to the third NOT.24) Lets add an output pin, after placing it press ESC25) Right click on the output pin, select Properties and rename it, the [7..0] makes the output an 8 bit bus.26) Connect a bus from the output pin to the output of the NOT gate. If you do it the other way around it will only do a wire instead of a bus. You can also use the bus icon to force it to a bus.27) Right click on pin_name1 select properties and rename it to BUTTON_A and the other one to BUTTON_B, Also one of the NOT gates has the same instance name as hello_world, right click and rename it inst3, Then do a File>Save AllIf you don't rename the duplicated instance name it will fail during compilation and double clicking on the error will take you to the schematic right where the problem is at.

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 06:23:44 am
content: Continuation28) Before we can assign the pins you must compile, or at least start Analysis & Elaboration, select: Processing>Start>Start Analysis & Elaboration.29) Time to assign the FPGA input and output pins. Select: Assignments>Pin PlannerThanks to your blog I got the right LED pins(I left default voltages)30) Time to program the device: Tools>Programmer. Hardware Setup... select the USB-Blaster (of course you would have to have the driver installed)Add File, select output_files/sample1_top.sof and hit the Start button.Back on Quartus, you can use File>Convert Programming Files... to create a permanent JTAG Indirect Configuration File (.jic) so you don't have to be tethered. There are also other methods so your board will store the configuration and load and run it when powered up. Edit: Programming it that way will take a different tutorial, on this little one we are just going to stick with the .sof filePictures of the twin boards the one on the right features the BeScope, the one on the left (and the one we are programming has the interposer on the back)First picture is both buttons unpressed and all LEDs offOne button pressedThe otherand both

author: tggzzz
author_rank: Super Contributor
timestamp: October 04, 2014, 08:31:47 am
content: Quote from: weilawei on October 04, 2014, 01:09:44 amYou're welcome, it is good to be able to help people makenewmistakes

author: weilawei
author_rank: Newbie
timestamp: October 04, 2014, 03:31:36 pm
content: Wow. I woke up to find your tutorial, miguelvp, and I was floored. Thank you so much for that. It's utterly incredible. Altera should be hiring you for their tutorials. In the words of Dave Jones, "That's a real bobby dazzler! Worked a treat!"It really cleared up all my questions and showed me a bunch of tricks I'd missed (like using the top level schematic to populate the list for the pin planner instead of typing them all in).It worked flawlessly (I've included a few pictures of my board after following your tutorial) and I learned a ton along the way. Thank you so much. This community is really incredible and the response from everyone here has been absolutely stunning. There's not an emoticon here to express how grateful I am for all the help.Now, I ought to go finish my lists of pin locations for that card edge and start in on the next project! Thanks again (to both miguelvp and tggzzz)!

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 05:35:37 pm
content: Glad it worked. I'm a noob as well and been playing around with them for about one year but not all the time so I did pick up a couple of things along the way. But I'm a software engineer for many decades so I understand stepsYou can use the direct link if you want to refer to it:https://www.eevblog.com/forum/microcontrollers/bemicro-cv-questions/msg524041/#msg524041Or you can copy the whole thing if you want and alter what you need for your blog, no need to even credit me really, because it's really not that big of a deal, I mean this is pretty much a concise version of my_first_fpga but skipping some redundancy.As for doing tutorials for Altera, nah, they are better at it. I would recommend you take the altera university classes (the fpga curriculum) . Edit: they are free although you have to create an account (free as well).http://www.altera.com/education/training/curriculum/fpga/trn-fpga.htmlplus they have a lot of other free training resources.Edit: You should submit a bug report to Arrow on the swapped LED pins and on the missing edge pins as well.

author: miguelvp
author_rank: Super Contributor
timestamp: October 04, 2014, 07:20:38 pm
content: One more thing.If you make changes to your Verilog file (hello_world.v) Even adding new inputs, you can update your symbol in the schematic editor by right clicking on the component and selecting "Update Symbol or Block..."However doing this might disconnect the wires so move the block around to make sure the wires didn't get disconnected.I don't think it will update the symbol automatically so just remember that you have to update it manually on changes.Also play around with the Edit Selected Symbol, it allows you to add descriptions and other things.

author: dreschel
author_rank: Contributor
timestamp: September 30, 2016, 06:29:06 pm
content: Does anyone know if the BEmicro CV is still available? I would like to purchase one, new or working used.Thanks, Bill

author: ebclr
author_rank: Super Contributor
timestamp: October 03, 2016, 02:29:26 am
content: According to arrow site no stock but can be back orderedBemicro CVBemicro MAX10BEmicroVA9https://www.arrow.com/en/products/search?q=bemicro

author: dreschel
author_rank: Contributor
timestamp: October 03, 2016, 01:43:23 pm
content: Thanks. I did query Arrow last week and never heard back... that was why I was asking. I just did the Live Person thing and said they were working on the backorder time quote. I will post when I here what that backorder status is.

author: dreschel
author_rank: Contributor
timestamp: October 03, 2016, 02:30:25 pm
content: I just heard back from Arrow that the lead time for the BEMICRO CV is 9+ weeks.That plus gets me. Kind of makes me wonder if that is saying: Never.If anyone has an extra that is gathering dust and they would like to sell it, I would be happy to purchase one.Bill

author: dreschel
author_rank: Contributor
timestamp: October 06, 2016, 12:45:22 pm
content: I really do need one of these. I would pay for shipping and throw in a 20% profit ( a bid of $60) for a functioning BEMICRO CV...

author: ebclr
author_rank: Super Contributor
timestamp: October 13, 2016, 12:31:47 pm
content: You can try this alternative boardhttp://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=165&No=941