USB 2.0 analog debugging in Silicon Valley - Page 1
Forum section: electronics / projects

author: davekeck
author_rank: Contributor
timestamp: March 07, 2024, 08:00:11 pm
content: I'm working on a USB product that uses the STM32F7 with USB 2.0 HS PHY. The problem: USB comms fail with the latest Apple M3 MacBooks, but work fine with other hosts that I've tried (Intel and M1 MacBooks).USB comms can be made to work with M3 hosts by modifying STM32F7's PHY tuning register (USBPHYC_TUNE), so the problem is almost certainly in the analog domain. (However I haven't been able to find a value that works across my entire population of prototype devices, and there are 2^24 USBPHYC_TUNE values.)I don't have the 2+ GHz oscilloscope / fixtures to debug this, so I was wondering: is there anyone in the Bay Area that has the equipment and would be willing to debug with me? I'm on a self-funded startup budget (hence the lack of high-end equipment), but I naturally expect to pay.Renting an oscilloscope is another option if anyone has suggestions there.Thanks!David

author: davekeck
author_rank: Contributor
timestamp: March 07, 2024, 08:00:45 pm
content: Other info:- ST's STLINK-V3MINIE debug probe (based on the STM32F7) has the same problem. It doesn't work with M3 MacBooks because of it.- I've filed issues with both Apple and ST (not holding my breath).- It's possible that M3 hosts are actually the problem (but I don't have the equipment to determine that).

author: tooki
author_rank: Super Contributor
timestamp: March 08, 2024, 02:38:04 pm
content: Quote from: davekeck on March 07, 2024, 08:00:11 pmContact one or more scope manufacturers and ask to try out a high-end scope. They’re generally quite generous with loaner units. Just make them think you’re in the market to buy one.

author: Matt Coates
author_rank: Contributor
timestamp: March 08, 2024, 02:51:18 pm
content: Might not be relevant in this case but I had an issue recently with USB 2.0 failing on newer Mac books with a dev board and it turned out to be the ESD diodes on the USB data lines that were causing the issue. Might be worth a quick review of the hardware schematics! Removing them fixed the issue, then replacing them with something higher spec (designed for USB 3) fixed the problem for good.Good luck!

author: Nominal Animal
author_rank: Super Contributor
timestamp: March 08, 2024, 11:05:12 pm
content: Most likely unrelated, but: Many USB 1.1 FS devices have problems with USB 3.0 implementations (especially the early ones; affects many 8-bit microcontrollers with native USB like ATmega32u4, and even some 32-bit ARM Cortex core ones), but if connected via an USB 2.0 hub (that is capable of HS, and therefore includes a retiming crystal), work fine.Thus, it would be interesting to know if connecting the STM32F7 to the macbooks via an USB 2.0 hub makes any difference.

author: davekeck
author_rank: Contributor
timestamp: March 09, 2024, 12:48:00 am
content: Thanks Nominal.The comms problem is indeed fixed when the STM32F7 is connected via a hub. (I've tried two: an LG display and a discrete USB-C hub.)The STM32F7 is configured for HS mode though (480 Mbps), so I'm not sure how that affects your theory?

author: Nominal Animal
author_rank: Super Contributor
timestamp: March 09, 2024, 03:15:51 am
content: Quote from: davekeck on March 09, 2024, 12:48:00 amI've never discovered the underlying reason – I don't have sufficient test equipment either to do a comparison or measurement on the actual signals –, but Isuspectit is related to timing, and how high-speed USB hubs need to reclock the signal. I suspect it is not exactly a frequency issue, but something to do with jitter, i.e. timing on individual symbols, not average symbol timing. If so, you might need a 1GHz+ scope to tell.USB 2 high-speed signaling is half-duplex; there is only one signal pair (D+ and D-), which transfers data in one direction at a time. Theoretically, the high-speed symbol rate is 480 Mbit/s ± 0.24 Mbit/s, or ±0.05% or ±500 PPM, but Ibelievemany USB 3 host chipsets just require stricter timing than that for reliable transmission. (At full speed, the symbol rate is 12 Mbit/s ± 0.03 Mbit/s, or ±0.25% or 2500 PPM. A full-speed USB 1.1/2.0 hub does not need to retime/resync the signals, but a high-speed one always has to, and such hubs almost invariably use a crystal for this. The MCUs I've personally observed this happened to also used proper 16MHz or 24MHz crystals, integer fractions of the 480MHz symbol rate, and worked fine with some USB 3 host implementations and only had issues with some others, so they cannot have been too wildly off. I can imagine a PLL sync'd to say a 27 MHz crystal might easily be off by more than 500 PPM, though, as the exact ratio is then 160/9 ≃ 17.778.)It is also possible the USB 3 host chipsets are within spec, but the microcontrollers out, and all hubs (I haven't found a USB 2 HS hub that would not fix this issue) are more tolerant than those host chipsets.. but considering this only affects only some (mostly USB 3.0) host chipsets, used to be much more common with early USB 3.0 chipsets, andallUSB 2 HS hubs seem to fix this issue, I'm inclined to blame the USB 3 host chipsets.This used to be common when USB 3 was first introduced, with the "use a hub in between" being recommended for all kinds of issues with even standard mice and keyboards. With the next generation host chipsets (for USB 3.1) problems were much rarer, and with current chipsets very rare. It is quite possible the same problem would have affected USB 2 HS devices, if we'd have any; at the time, MCUs like AVRs with native USB had only full-speed support, and even today many (most?) ARM Cortex M0/M0+/M3/M4/M4F microcontrollers tend to have only full-speed USB, with high-speed appearing mostly with Cortex M7 and later cores (and of course in specialized chips like Cypress FX2).TL;DR:Apologies for not being able to give any actually reliable information; only that "use usb 2 high-speed hub" used to be a common fix for a similar issue with all sorts of USB 1.1 full-speed devices (USB 2.0 high-speed ones being rarer), when USB 3 was first introduced.

author: davekeck
author_rank: Contributor
timestamp: March 09, 2024, 06:42:37 pm
content: Thanks Nominal!Quote from: Matt Coates on March 08, 2024, 02:51:18 pmThanks for that Matt. The ESD diodes is an interesting theory. I'm using DT1446-04V-7, and looking at the datasheet again, its specs actually appear to beat USB 3.0 ESD diodes (TPD2EUSB30): 0.65 pF capacitance versus 0.7 pF.Another theory is that my clock driving the STM32F7 might not spec'd for proper USB 2.0 HS. I'm using the SIT8021AI-J4-18S-16.000000E; still looking into whether its specs are good enough. Frequency stability: +/-100ppm, period jitter: 110ps, phase jitter: 2.5ns.