Please suggest a good cheap USB 16CH logic analyser - Page 1
Forum section: electronics / testgear

author: Ian.M
author_rank: Super Contributor
timestamp: June 05, 2019, 01:52:25 pm
content: Please suggest a good cheap USB 16CH logic analyser, mostly for 5V work on legacy 8 bit systems. I intend to use Sigrok Pulseview and would prefer not to infringe Salae (or anyone else)'s firmware copyright. Some pulseview-compatable analog capability would be nice but is not essential.

author: Gandalf_Sr
author_rank: Super Contributor
timestamp: June 06, 2019, 10:32:58 am
content: I've struggled with this one and ended up with a real Saleae Logic 8. I bought cheap clones and wasted a lot of time on them and their crappy software.There are 2 aspects to logic analysis (in my world anyway):1. Are the signals correct from an amplitude, timing, and noise perspective?2. What is the actual data traffic running on the bus?1 is best met by a mixed signal scope that has a 16-channel analyzer (like a Rigol MSO2072A or better).2 once you know that the signals are OK, this is the real problem. Saleae does an awesome job in their ease of use and capture of data but has the major (almost unforgivable) missing feature thatyou can't send data out over the bus; to get around this, I own a Bus Blaster and a Bus Pirate but the Pirate (vn 3.6 or 3.8, don't bother with 4.x) gets most use. The interface for the Bus Pirate is a serial terminal window (Teraterm recommended) and it can be made to do some really useful stuff but there's a learning curve and the documentation is all over the place.I went with Saleae Logic rather than Logic Pro because I don't need to look at buses running over 50 MHz but, if you do, then the (way more expensive) Logic Pro is perhaps worth consideration.Some will suggest that you can buy an old logic analyzer on eBay, not sure what this will achieve other than take up a lot of bench space.

author: Gyro
author_rank: Super Contributor
timestamp: June 06, 2019, 10:55:24 am
content: There are cheap clones of theoriginalSalaea logic 16 available on ebayeg.https://www.ebay.co.uk/itm/Mini-Saleae-16-Logic-Analyzer-USB-100M-Max-Sample-Rate-Support-1-2-10-Software-U/163266339370. There was no analogue support on the original one.Generally they use a different FPGA from the original genuine one and do not rely on the Saleae downloaded bitmap.Mostof them are supported by Sigrok Pulseview.The sigrok supported devices page shows the internals and f/w details.P.S. They don't have the switchable input threshold of the original - they're 3v3 with 5V tolerance.

author: ptricks
author_rank: Frequent Contributor
timestamp: June 06, 2019, 11:48:30 am
content: What do you consider cheap ?to avoid infringement get the ones that have open source firmware.16 channels really drives up the cost because you usually are going to see an fpga involved.I'm working on designing one that uses one of the cypress PSOC chips so it is really fast, the chip handles everything from capture to decoding, the boards would cost probably under $20 but it is still in design phase and it will not support 16 channels , just 8.

author: snoopy
author_rank: Frequent Contributor
timestamp: June 06, 2019, 02:11:54 pm
content: I bought one of these. Pretty good spec and memory depthhttps://www.aliexpress.com/item/Kingst-LA5016-USB-Logic-Analyzer-500M-max-sample-rate-16Channels-10B-samples-MCU-ARM-FPGA-debug/32774297984.html

author: cv007
author_rank: Frequent Contributor
timestamp: June 06, 2019, 05:34:09 pm
content: I have a dslogic basic that can be had on ebay for about $80 (which I consider a good price for up to 400MS/s). You can upgrade to a plus by soldering on a ram chip. You can use dsview (their version of pulseview), or you can use pulseview (I have not tried it).Analog Devices ADALM2000 ($~100) seems to be available now, it looks like a nice device that also uses pulseview under the hood for the logic analyzer.https://wiki.analog.com/university/tools/m2k/scopy/logicanalyzerThis will have the added benefit of having other options like analog along with the logic analyzer. It says it can do 100MS/s, but I'm sure that is with minimal pins and am guessing buffer size is minimal also (unless streaming at a lower sample rate, whatever that may be).Maybe my 'cheap' bracket does not match up with yours, though.

author: Stray Electron
author_rank: Super Contributor
timestamp: June 06, 2019, 06:09:54 pm
content: Good HP brand Logic Analyzers can be had on E-bay with the pods and cables for as little as $50. Shipping is expensive so look for one in your area and go pick it up in person and save on that costs. Don't bother with one that doesn't have the pods and cables, those alone will costs far more than a complete and working LA.I bought an HP last year for $35 just to rob the HP feet off it. I had to drive 12 miles to pick it up.

author: TK
author_rank: Super Contributor
timestamp: June 06, 2019, 07:14:45 pm
content: I use the Zeroplus LAP-C 16032, 16 channels and 32K samples per channel. The software runs on Windows and you can decode more than 100 protocols. I think they are around $140 in the US

author: Electro Fan
author_rank: Super Contributor
timestamp: June 06, 2019, 07:18:39 pm
content: Quote from: Gyro on June 06, 2019, 10:55:24 am

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: June 06, 2019, 07:27:11 pm
content: While I have a (patched) Zeroplus LAP-C, I haven't used it for years. IMHO, at the ~100€ price point, the best option is still a DSLogic Plus. Trigger options are somewhat limited, but it's just working and since the Win10 driver problems were solved, I can recommend it wholeheartedly again. The SW progress is incredibly slow though but it's open source, you can write your own Python decoder scripts and there's Sigrok support for it.In the few hundred Euro league, there's also the Ikalogic SP209. The Ikalogic SW is generally nicer than the one for the DSLogic (much better trigger options, easier manual measurements) but for most people, it's probably not worth the 400€ for 9 channels.

author: Gyro
author_rank: Super Contributor
timestamp: June 06, 2019, 07:36:16 pm
content: Quote from: Electro Fan on June 06, 2019, 07:18:39 pmThe one I bought does, but there are several variants as I indicated.Mine is the "2015-01-08 variant" as shown in the attached link but housed in a black case like the ebay listing example. I'm not up to date with what PCBs are in the currently available ones - the Sigrok supported LAs page has more up-to-date information on support than I do. The version I have has series resistors and protection diodes (the 50Vprotection).2015-01-08 variant...https://sigrok.org/wiki/Mcupro_Logic16_cloneGeneral Sigrok LA support page...https://sigrok.org/wiki/Supported_hardware#Logic_analyzersP.S. Incomplete quote fixed.

author: Ian.M
author_rank: Super Contributor
timestamp: June 07, 2019, 10:25:06 am
content: Thanks everyone for the suggestions so far.My main usage is likely to be debugging code for 8 bit MCUs when attempting to bring them up, before I've got enough working I/O to support using a monitor ROM.It looks like I'm going to need to budget roughly $100 for one of the FPGA based options to get a decent sample rate in 16CH mode. OTOH if I am willing to settle for only 12MHz sample rate in 16CH mode, the Sigrok FX2LAFW firmware running on a Cypress FX2 EZ-USB eval board clone will do that with change from $10. That may be acceptable if I'm happy with an 8 bit CPU system clock upper limit of a couple of MHz. Of course there's no input protection, and its fixed 3.3V logic thresholds, albeit 5V tolerant. If I'm going to go dirt cheap, it probably more sense to regard the FX2 board as disposable and concentrate on protecting the host USB port as adding on a daughterboard to provide protection, variable thresholds and a probe connector with one ground per channel, and a set of decent probes wont leave me with much change from that $100. If I want analog, it looks like one can add one analog channel to a FX2 with just a fast parallel ADC, and a unit gain stable video OPAMP to buffer its input.With any of the non-pro grade logic analysers, complex triggering, and clocking from the D.U.T don't seem to be available options. I was planning to use external hardware for complex triggering anyway, as by the time I've hooked up an 8 bit data bus + CPU control signals, there aren't very many channels left on a 16CH LA, and one does need to see A0 and A1 for many 8 bit peripheral chips to be able to see which register is being accessed.I haven't had a chance to review all the LAs linked yet - that's a job for the weekend!I would certainly welcome further suggestions, so please don't stop making them.

author: gslick
author_rank: Frequent Contributor
timestamp: June 07, 2019, 07:07:39 pm
content: As was mentioned back in Reply #6, depending on where you are located and how much bench space you have, picking up something like an HP 16500 series logic analyzer could be an option, but that would only be cheap if you could find one local to you. Otherwise the shipping alone can exceed the value.

author: Ian.M
author_rank: Super Contributor
timestamp: June 07, 2019, 11:06:14 pm
content: Thanks for the suggestion (and for helping me refine my requirements) but it doesn't look like there are any cheap HP LAs anywhere near me, and I don't have the bench or storage space anyway. PC connectivity for them also seems to be a whole multi-layer can of worms that could end up being rather expensive.Also the limited 'tether' range of the probe pods on a non-USB LA concerns me, as I'd basically need clear bench space directly in front of the instrument, rather than being able to set up a USB LA anywhere within a 2m range of the bench PC. Topic title amended to include 'USB'.

author: rsjsouza
author_rank: Super Contributor
timestamp: June 08, 2019, 10:11:52 am
content: Quote from: snoopy on June 06, 2019, 02:11:54 pmI got a Kingst LA2016 and it is a very good unit with good software. Unfortunately Sigrok does not support it.

author: Gandalf_Sr
author_rank: Super Contributor
timestamp: June 11, 2019, 09:58:50 am
content: My interest was peaked but after reading throughthis thread on the ADALM2000it sounds like a product that is not ready for release (understatement). Someone waited a year for a delivery from Mouser.

author: thm_w
author_rank: Super Contributor
timestamp: June 11, 2019, 09:28:28 pm
content: Quote from: Gandalf_Sr on June 11, 2019, 09:58:50 amNot saying youshouldbuy it, but availability is not an issue. Mouser has 248 in stock. AD themselves have ~1,800 in stock, according to Digikey.Their wiki is down, which is not too encouraging.But scopy program seems to be under some development:https://github.com/analogdevicesinc/scopy

author: tai
author_rank: Contributor
timestamp: August 07, 2019, 02:26:39 pm
content: I own both ADALM2000 and DSLogic Plus.IMHO, DSLogic Plus is better if what you want is logic analyzer only. It has better sampling rate, trigger features, and less bugs (Scopy crashed more often).Being said that, Scopy (of ADALM2000) is also quite usable.The best part of ADALM2000 is that it comes with everything - oscilloscope, signal generator, logic analyzer, programmable power supply, digital I/O, etc.And most of them can be used in parallel, as long as pin doesn't conflict. Scopy can create separate window for each function, so you get to use all features concurrently.ADALM2000 is capable of setting up a simple end-to-end complete lab test configuration.So if you just want a logic analyzer, then just go with DSLogic Plus.But if you do not have other equipments and do not need advanced features of DSLogic Plus (advanced trigger, 400MHz sampling), then go with ADALM2000.

author: GigaJoe
author_rank: Frequent Contributor
timestamp: August 09, 2019, 03:09:46 am
content: kinda:https://www.eevblog.com/forum/testgear/usb-logic-analyzers/had Saleale clone 16ch is that on ali for $40, its OK, but wasn't deep enough on 4+ channel usage due to short buffer , after that the speed drops dramatically, 12Mhz, If i remember correctly ... usb 2.0 speed ... , buffer for 8ch ,maybe fraction of seconds....so i purchase DSLogic, it has 2 versions , basic and pro,price:https://www.aliexpress.com/item/32905798335.htmlconversion:https://time4ee.com/news.php?readmore=453there are 2GB buffer: but it significantly beyond my budgethttps://www.ikalogic.com/pages/logic-analyzer-sp-series-sp209you may consider usb scope + 16ch :https://www.aliexpress.com/item/32816631452.htmlhttps://www.aliexpress.com/item/32691450768.html

author: picitup
author_rank: Regular Contributor
timestamp: October 17, 2019, 08:11:21 am
content: I've recently had my interest peaked on logic analysers. First I bought a 24Mhz Cypress 8 channel Sale clone for £8.95 in the UK. It's cheap and cheerful and works with PulseView and there's a short video on how to set it up here:The issue I had with this setup, is sometimes the unit seems to go dead and unplugging/replugging the device didn't help, only a reboot seemed to fix it. It does work with the latest Salea software, but if you've used it with PulseView, you need to go into device manager/update driver/let me choose/Salea driver.Unsurprisingly, the next issue was speed. At 4 samples minimum, you're looking at 24/4 = 6Mhz max speed. I'm playing with an ILI9341 display and understand the SPI can work up to 30Mhz which I'd like to do.after some poking around, I came up with the LA5016 from Kingst here:http://www.qdkingst.com/en/productsIt's a shame that it's not supported by PulseView atm although the LA2016 is planned. The things I liked about it were:1) At 500Mhz, that's around 125MHz signals max @16CH2) It has 1Gbit on board memory3) It has compression (run length encoding)4) The manufacturer's software looks goodhttp://www.qdkingst.com/en/download5) I emailed them some questions and they answered same day.It should be delivered either Saturday or Monday so I'll report back with any comments.Although I'm still new and playing, I've found logic analysers with a PC to be *much* easier that my "improved" DS4014 with serial decode. 27 button presses later....

author: picitup
author_rank: Regular Contributor
timestamp: October 21, 2019, 12:04:40 am
content: Well the LA5016 arrived and I've had a play. My first impressions are I wonder how I ever managed without one. I found a timing discrepancy on a PIC32MX chip with little effort between the Data/Command line to my LCD and the SPI output.Once the proper work was done. and my LCD worked, I spent some time trying to speed things up. I found that depending on which instructions I used on my PIC32MX, I could obtain better SPI throughput. This was easy with the LA. Now the SPI is running at a blistering 30MHz clock lol.The software seems very good. I mentioned above, there is (1Gbit edit: 2Gbit) of ram on board and RLE compression but you can also configure it to run across USB directly, so the best of both worlds. The only thing I've missed so far is the sample 'blobs' on PulseView which are pretty handy to find out if your sampling rate is right. I emailed Kingst and once again, they replied within a day, but said they won't support the blobs in the near future. Pity.The FPGA is an Altera Cyclone IV and there's also a Cypress CY7C68013A which I guess manages the USB interface. There's also a couple of Samsung (K4T1G164DG edit: K4T1G164Q): 1GB ram chips.The USB and data cables are covered in silicone and are super flexible and the case is aluminium.I chose this LA over the Saleae due to the big price difference - LA5016 was £131.00 (used) and the Logic Pro 16 at £819.00 + VAT = £982.80. The Salea device only seems to support direct mode, so you need a USB 3.0 port to get the bandwidth and I'm assuming there's no buffer in it.The Saleae does have analogue ports and the Kingst has none. The Kingst has 2 PWM outputs and the Saleae has none.The Saleae will only do 500MHz on up to 4 channels, but the Kingst will do 500Mhz on all 16 channels at once.So all in all, I think the Kingst is a cheaper price and better hardware/features.That's all for now....

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 21, 2019, 06:37:57 am
content: I'm not so sure if "Kingst" is actually a real manufacturer's name. Most of the time this thing is sold as Jiankun LA5016. Also it's usually advertised to have 512Mbit HW memory or 32M/channel. So 1GBit might be wrong.Honestly I still think the open source DSLogic Plus is a better bet. E.g. does the "Kingst"/JianKun software allow to write your own protocol decoders or change/fix the existing ones? I used this quite a bit with my Ikalogic ScanaPlus and would not buy another LA without this possibility. Btw: it also doesn't seem to have a clock input or trigger output.

author: 2N3055
author_rank: Super Contributor
timestamp: October 21, 2019, 07:18:07 am
content: I really like Scanaquad device but IkaLogic Scanastudio looks and feels like "Teletubbies" ...Everything is huge on screen, and only very basic things are there. Channels are too big, scroll bar is too small.You cannot control basic parts of U/I. And it throws errors on exit.It's horrible. As I say, device is working fine, and I wanted custom scripting too. Also it has basic triggering, which was also interesting.Custom scripting is also weird, because it's poorly documented. As in not documented.In new version it wants you to install Atom editor. I guess it's better than if they made their own editor, because that one would probably only have open and not save button.... Just because...And is buggy..It feels like they are not making device you USE to work on something else, but as if you are going to buy their device to play with Scana device and program for it, spending more time playing with LA that to use LA to fix something else...If you need something to look at simple I2C packets and such, it can be used, in same manner like you can use decoding on Rigol 1000Z. It's better than nothing.But DSLogic Plus looks like Keysight compared what you get from Ikalogic.

author: picitup
author_rank: Regular Contributor
timestamp: October 21, 2019, 07:43:33 am
content: Hi @0xdeadbeefYes I've seen both the devices called Jiankun and Kingst, maybe they are a re-seller, but I've even found links from the Kingst site to pictures of a Jiankun device so who knows?Yes, if you check their download linkhttp://www.qdkingst.com/en/products, you can write your own protocol using their SDK. I'm not sure about modifying existing protocols, but the SDK has a couple of examples for you to modify AKA Serial and SPI.As far as the memory goes, in the above post, I did identify the 2 ram chips which are Samsung K4T1G164QG chips and are 1Gbit each (sorry about the typo before) so that ties up with 2Gbit hardware memory (not 1Gbit like I said before.I suppose it would be nice to prove the storage memory out. Maybe I can get a USB 1.1 hub and run at 500Ms/s for 4 seconds and see if it works.I may be being dumb, but what's a specific clock or trigger input? The analyser just reads specified data lines and the software has options to trigger on edges/high/low.I took a look at the DSLogic Plus and thought it looked good. At USD 149.00 I think it's good value (much better that Salea) although the specs of the LA5016 are better. The DSLogic has a slightly lower max sample rate, at 400Sa/s and this is only with 4 Channels which, rather cheekily, they don't mention on their data sheet. It's only got 256Mbit memory, so 1/8th of the Kingst.After saying the above, I think the DsLogic Plus would probably meet my needs as mostly my issues are with serial protocols such as RS232 and SPI so 2/3 lines are enough although I'd still go for the Kingst as the specs are better and hopefully more future proof. As mentioned above, I'm not sure about modifying Kingst existing protocols but that would be a good feature.You may be surprised about what I say about Kingst. I am too. I've bought lots of Chinese hardware in the past and found a reasonable bit of kit, with crap software and no support, but Kingst seems different.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 21, 2019, 08:14:48 am
content: Quote from: 2N3055 on October 21, 2019, 07:18:07 amHm, I used differerent versions of Scanastudio over many, many years and despite of minor issues with some versions, I liked it very much.IMHO, it's a far better GUI than that of DSLogic in nearly every aspect, specifically with custom measurements and triggers. Plus storing setups and measurement works perfectly well (in contrast to DsView).I'm not happy with every decision they made, but they listened to suggestions as long as the forum was still there.It was a big disappointment for me as they first crippled and then closed the forum but this seems to become an industry standard as the same thing happened on the DreamSourceLab site a few years later.In both cases combined with a very (!!!!) slow development that makes you wonder if more than one or two persons are working on the Software. In case of DSView, I'm tempted to believe there is only one guy who looks at the SW every few months for a couple of hours.Quote from: 2N3055 on October 21, 2019, 07:18:07 amThe ScanaPlus actually has (had) the most complex triggering of all affordable LAs. There was a time when I (thought I) nearly convinced Ibrahim Kamal (the founder of Ikalogic) to implement a proper multi-stage (event/time) triggering approach but most of that was removed again in later versions.Quote from: 2N3055 on October 21, 2019, 07:18:07 amI wrote the SENT decoder that is now part of the default decoders I think, so I know what you mean. It was a bit of trial and error at some point, but I've seen worse. Actually, at this point, I also had the impression that most (other) decoders were implemented in a somewhat ugly and unprofessional way. And I have to note that this was my first JavaScript implementation ever.As a side note: most decoders hat an awful lot of updates because of bugs. At some point, not even the SPI decoder was working properly and I had to fix the script locally. But all of that happened many years ago.Quote from: 2N3055 on October 21, 2019, 07:18:07 amI have seen that but didn't update yet. For my own scripts, I always used an external editor. I hope this is still possible.Quote from: 2N3055 on October 21, 2019, 07:18:07 amI'm actually still using the ScanaPlus at home and at work, where I analyze SPI and SENT communications, measure SPI load and things like that. I borrowed it to several colleagues and all of them liked it a lot. One of them even ordered the SP209i. Personally, I'm slightly disappointed that the SP209 series is so much more expensive than the ScanaPlus and still only features 9 channels. That was an odd choice and still is. Still, if I could get one for <= 200€, I would buy it.For the time being, I use my ScanaPlus for this and my DSLogics (I actually own two) for that which is OK for me. Still, in my dream, I'd like a LA that combines the strengths of both.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 21, 2019, 08:53:50 am
content: Quote from: picitup on October 21, 2019, 07:43:33 amI tend to believe that JianKun is the original name and Kingst a rebranding for the Western market. But indeed, that's up to speculation.Quote from: picitup on October 21, 2019, 07:43:33 amWell, an SDK is better than nothing, but personally I'm a big fan of using scripting languages for decoders.Quote from: picitup on October 21, 2019, 07:43:33 amWell, I can't say as I only found blurry pictures of the PCB, but actually the Kingst homepage also says 2GBit now (?).Quote from: picitup on October 21, 2019, 07:43:33 amPurists would say that a LA without clock input isn't a LA but a protocol analyzer. With a clock input you can adjust the sample rate to that clock and thus guarantee that you store the levels at the correct moment.I must admit though that I never really used the clock input of the DSLogic myself yet. Still nice to have one.Quote from: picitup on October 21, 2019, 07:43:33 amThe sample rate is somewhat meaningless without proper analog bandwidth and these probe cables add quite a bit of inductance at higher frequencies. The DSLogic at least has shielded cables.About the memory: while I agree that having more can't hurt, I never ran into limitation with the DSLogic Plus. Usually sampling more than 1 or 2 seconds is just not convenient.Besides, you can always switch to "stream mode" with lower sampling rates and sample up to 16G.Quote from: picitup on October 21, 2019, 07:43:33 amNothing is really future proof nowadays. At least the DSLogic is Open Hardware and Open Source. AFAIK even the code for the FPGA is open source. So if everything fails, the community could take over. This being said, in contrast to the OpenBench Logic Sniffer, there doesn't really seem to be a community for the DSLogic and closing down the forum didn't really improve the chances that there will be one.

author: picitup
author_rank: Regular Contributor
timestamp: October 21, 2019, 10:12:12 am
content: QuoteI agree. I think their SDK uses Microsoft Visual Studio to create DLLs and scripting is much easier and maintainable.QuoteWell I've seen 2 x 1Gbit chips on the board, so 2Gbit it isQuoteYes I agree and the cables are long. I'm making my own up, so will take your recommendation of using screened cables.QuoteThat's interesting thanks. I've learnt somethingQuoteNo, nothing is, but you want to get the best chance and better and faster hardware with more memory will help. Open Source is definitely desirable. I like PulseView, but the LA5016 is not supported yet. The LA2016 is planned.Yes, forums are very helpful and are always my first go-to. It doesn't look like Kingst has one, which is a pity but as I mentioned, they reply to emails in a day so that's a +1.Anyway after all this detail, I'm really pleased with my first analyser. So much easier than a scope LA. I'm so glad I didn't fork out EU 500.00 for the Rigol decoders! I also ordered the LA2016 which is somewhere between here and China so that will go up onto eBay when it arrives.Onward and upward..Steve

author: 2N3055
author_rank: Super Contributor
timestamp: October 21, 2019, 12:22:07 pm
content: Quote from: 0xdeadbeef on October 21, 2019, 08:14:48 amI also liked original Scanastudio, and had have bought ScanaQUAD because i liked that software and because ScanaQUAD had triggering.Then I realized that it doesn't work with old software, and that new software is not written yet. That was 2 years ago, and in meantime, like you said, triggering was reduced to almost none compared to what was promised at the time of purchase, and software is so simplistic that it is sad.I was active on forum, and some user interface decision were made based on my input..I basically gave up on them when Mr. Kamal decided to kill of forum to shut up negative feedback. Instead of developing their basic software to be at least as capable as old one they killed off, they spent two years developing wanky pen scope that nobody cares about....Talking about going extra mile to ignore users and truth...And then after 2-3 years, software is still in it's infancy...I had high hopes for them, but they keep on doing things that are not in benefit of users.In order for me to respect them again they would need to :- return multistage triggering- make U/I that is more informative and uses was screen estate that is there- write detailed documentation on object model for Scripting- drop prices.The way they are now, I wouldn't recommend their products to anyone...

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 21, 2019, 01:14:03 pm
content: Quote from: 2N3055 on October 21, 2019, 12:22:07 pmI understand that the newest version of ScanaStudio is supposed to be scriptable. Didn't check it yet. And yes, as far as I recall, the improved triggering was partly done in V2 which stayed in Beta for years until it was replaced by V3 with more limited triggering. Still, to be fair, the triggering of most USB LAs is even more limited. The serial protocol triggering is somewhat unique (but again unfortunately not implemented in a generic way to actually use it for any protocol). Agreed, you can actually create some (!) complex triggers also in DSView but it's a GUI nightmare and you need to plan it on paper before even starting to program the trigger.Quote from: 2N3055 on October 21, 2019, 12:22:07 pmThe original forum was one of the reasons I bought the ScanaPlus.Quote from: 2N3055 on October 21, 2019, 12:22:07 pmMaybe it's too long ago but I can't remember a terrific fight there. Yeah, people were nagging about releases and the team kept up making promises and became silent when they were not kept. But nothing totally unusual.Also before the forum was completely shut off, there was this abomination of a forum where you could ask questions which then were posted in one chaotic thread where you couldn't find it your own post half an hour later. About the same thing that NXP did with their forums a bit later.Quote from: 2N3055 on October 21, 2019, 12:22:07 pmAgain, I wouldn't say so and all I usually need is working in V3. I actually think the GUI is fast and intuitive compared to others. I'm a bit disappointed though that triggering is worse than in V2 and development is generally very slow. But my main gripe with my ScanaPlus is that I think its input circuitry is not optimal and due to its lack of (USB) data consistency checks, it can display total garbage signals now and then if it's overwhelmed by picked up noise.Regarding slow development: the same is true for DsView. Actually, it's even worse. Some years ago, they introduced the dark design without any possibility to change colors. But I need a light background colors to use screenshots in reports.I complained about that in the forum until it was closed down. Now, several years later, they finally added an option to switch back to light mode, but they did only exactly that. You still can't define your colors. All signals are gray by default and while you can change (only!) the signal colors manually, this change is not persistent. Hell, you can't even really store/restore a full setup in DSView. E.g. if you store a measurement and load it later, the "device" is changed, so you can't do any new measurements with this setup. Nowthisis missing basic functionality. And there is actually little to no progress in the DsView SW in the last five years. The only big improvement during its whole development was the speed-up of the Python protocol decoders which happened when the forum still existed. Since then, the development stalled.Quote from: 2N3055 on October 21, 2019, 12:22:07 pmI'm actually puzzled that they still exists. Few shops sell their products. Since they took so long to come up with the SP209, they didn't have a replacement for the ScanaPlus for several years. Instead, as you said, they developed that stupid scope pen thing that nobody ever wanted. And they wasted years developing that USB synchronizing absurdity for the ScanaQuad. It's not surprising that they had to raise the prices. They've just shut down their online store btw. Let's see if the SP209 can save them but I'm honestly skeptical.

author: egonotto
author_rank: Super Contributor
timestamp: October 22, 2019, 03:01:14 am
content: Hello,if I make no error 0xdeadbeef has earlier (few years) written that you can buy reduced ScanaPLUS. I bought one.Now my ScanaPLUS is a ScanaPLUS V2.The software is ScanaStudio 2.305.011Are more ScanaPLUS now ScanaPLUS V2?Best regardegonotto

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 22, 2019, 08:20:39 am
content: ScanaStudio 2.x is a very old version which never came out of beta as far as I know. In my currently installed version 3.x of ScanaStudio (newest version is 4.x), my original ScanaPlus is correctly detected as such. If this is not the case in the old beta you're using, this is most probably a bug.My understanding is that the only difference between ScanaPlus "V1" and V2 is firmware (FPGA code) which can't be updated for the end-user on the ScanaPlus (big design mistake IMHO).The original ScanaPlus always samples all 9 channels internally. So if you only need e.g. two channels, the USB bandwidth for the other 7 channels is wasted. In the V2 model, they introduced the channel sampling selection that you just showed. The reason was that people complained about data inconsistencies for signals with higher frequencies (e.g. 10MHz clock signal). Since the ScanaPlus doesn't have any data consistency mechanism implemented (obviously to save bandwidth) at some point, there is a point where more data would be needed than available and the captured/displayed data becomes invalid. With the V2, you could increase the bandwidth by dropping channels. IMHO this concept was more of a panic reaction than a proper design choice. The SP209 has internal RAM now and is said to have a was of checking the consistency of USB data. But that took quite a few years and is still doesn't have USB3 AFAIK.

author: ebclr
author_rank: Super Contributor
timestamp: October 22, 2019, 08:59:00 am
content: This is inside LA5016 Jiankun one

author: rsjsouza
author_rank: Super Contributor
timestamp: October 22, 2019, 04:06:16 pm
content: Thanks for sending this. Interesting how it says JK-LA-X016 but it is only applicable to the LA5016 and LA5032 (the LA2016 and LA1016 are clearly different as they use a smaller connector). Also interesting to see the sea of NC pins on the LA5016 - GNDs could make life easier for higher speeds.For comparison,a LA2016 photoat Sigrok.

author: picitup
author_rank: Regular Contributor
timestamp: October 23, 2019, 09:59:25 am
content: My LA5016 is labelled Kingst and it has a slightly different layout with BGA ram and less components. I've added a pic for all to see.I've ordered a USB 1.1 hub to prove the memory really works and a 100MHz xtal osc and a couple of TC74VHC393FN dual 4 stage ripple counters, so will wire it up to produce 16 different signals (100Mhz, 50MHz, 25.....) and try all 16 channels with the USB 1.1 port at once.Good point about the unused connections should be grounds. I removed the top lid from my device and the PCB resides in a slot. It really is stuck in tight and I can't get it out lol.I'll report back when some progress is made.CheersSteve

author: picitup
author_rank: Regular Contributor
timestamp: October 23, 2019, 10:32:11 am
content: Well a bit of pushing and shoving and I got the PCB out by pulling the case apart slightly. I think some bright spark may have put a drop of superglue on the PCB edge as now it's easier to get the board in and out.When I put the board back, I couldn't get the case to line up. That's because one edge of the case is male and the other female so you need to put the board in the right way.I can confirm that all the NC pins really are NC so there's no option of 'improving' the device aka Rigol. When I get a mo I'm going to short all the NC connections to ground so that will help.The back of the board isn't riveting, but I've attached a pic anyway.CheersSteve

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 23, 2019, 10:41:16 am
content: Seems that they optimized out the Max II CPLD in the newer (?) version. But also no visible signs of (automatic) length matching for the DDR2 RAM any more.

author: ebclr
author_rank: Super Contributor
timestamp: October 23, 2019, 11:44:15 am
content: Hi guess is 2 different things, 2 different companies, not the same, the price is also not the same

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 23, 2019, 12:09:05 pm
content: Yeah, could be. Generally a problem with Chinese products. Even the original manufacturer usually doesn't care about clear model and revision numbering and several clones take over the case, the logo, maybe even the technical data, but you just never know what you're actually buying. Same is true to some degree also for the DSLogic. The original design changed twice or so but DreamSourceLab never cared to somehow document the official revisions. Plus there are several clones which look (nearly) identical but e.g. have cheaper probes or a different probe connectors.

author: ebclr
author_rank: Super Contributor
timestamp: October 23, 2019, 12:49:44 pm
content: It's very common to Chinese copy the model name, The fact is that they "don't see English names " and they believe LT5016 is a coll drawing, look for phmeter PHS03, you will find more than 100 different product with the same model number, The fact is that Chinese only understand 这个狗屎

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: October 23, 2019, 01:27:16 pm
content: I would think that any Chinese person will understand that characters in Latin script are letters. Obviously you can't expect that they always can actually read the letters or words.At some point I wondered though if a trade name has the same meaning in China as in the Western world. I tend to think that at least for smaller companies, the focus is on creating a product and selling it with a good margin rather than on putting much interest in establishing a company name or being very proud of your products. In contrast to this, being proud to work for a company with a good reputation and being proud in your products might be more or a Western tradition (which is also going down the drain due to price pressure and marketing bullshit etc.).

author: rsjsouza
author_rank: Super Contributor
timestamp: October 23, 2019, 08:07:10 pm
content: You guys made me curious. I opened my Kingst LA2016 and it is identical to the one at Sigrok.

author: picitup
author_rank: Regular Contributor
timestamp: October 24, 2019, 08:09:10 pm
content: Well the USB 1.1 hub arrived and to check it really does provide a bottleneck, I tested my USB stick with h2testw directly into the USB 3 port of my laptop and got 25MB/s write speed. Then through the 1.1 hub I got 1.1MB/s so yes, it does provide a bottleneck lol.The 100Mhz xtal osc has arrived, and I'm just waiting for the two ripple counters so I'll report back when those appear.CheersSteve

author: TK
author_rank: Super Contributor
timestamp: October 24, 2019, 08:52:30 pm
content: If the logic analyzer has internal capture RAM, then what USB transfer rate you have should be irrelevant. If it offers real time streaming mode, then matters.

author: picitup
author_rank: Regular Contributor
timestamp: October 25, 2019, 08:13:21 am
content: Yes, that's the test. I want to see that the on board storage actually works. Probably should get out more...Steve

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 06:31:01 am
content: Well I'm still waiting for parts for the frequency divider. The post is really slow here, I guess the donkey's ill again.I woke early today and got to wondering what the accuracy of the LA5016 is and started looking at the PCB again. There's only 1 crystal on board and that's the 24MHz for the Cypress USB chip. I'm guessing the FPGA gets its clocks from the Cypress chip. According page 26 of the the data sheet, the xtal pins of the 100 pin device are pins 10 and 11 (XTALIN and XTALOUT) but it is legal to drive XTALIN from an external 3.3v 24MHz clock. The data sheet is here:https://www.cypress.com/file/138911/downloadThe xtal on board has no markings, apart from 24.00 on the top so I'm guessing it's a cheapy one. If required, it should be possible to fit a 24Mhz tcxo to improve the accuracy. When I get a minute, I'll test the LA5016 as-is on my 10Mhz gpsdo.CheersSteve

author: TK
author_rank: Super Contributor
timestamp: October 31, 2019, 11:03:12 am
content: It is my understanding that the 24MHz crystal is for the USB section of the Cypress chip. Can it generate the high clock required by the FPGA for sample rates of 100-200MHz?

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 12:07:42 pm
content: Yes it is, but there's a 20x PLL internally giving 480Mbps although I don't have any real idea atm. I can't see another xtal on the board and the FPGA will need to be clocked. I'll take a closer look....

author: TK
author_rank: Super Contributor
timestamp: October 31, 2019, 01:24:14 pm
content: What about U14?

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 02:25:05 pm
content: What's U14? I'm outside my comfort zone here :-)

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 02:42:30 pm
content: Oh yes, the chipI can't quite see the markings on my photo so I'll pop the case off and report back once I've drank more coffee :-)

author: rsjsouza
author_rank: Super Contributor
timestamp: October 31, 2019, 03:07:45 pm
content: Quote from: picitup on October 31, 2019, 02:42:30 pmI read "AVF", which corresponds to the op amp:TLV272. The network of resistors and capacitors seem to agree with that.

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 05:18:41 pm
content: Thanks for that @rsjsouzaThe markings are TI 7B AVF as you say so that ties up with it being a TI part. I couldn't find it anywhere. So that still leaves no obvious clock for the FPGA. I could maybe add some capacitance to the xtal and see if it puts the measurement out. The TI site identifies the AVF marking with the TLV272CDGK part here:https://www.ti.com/store/ti/en/p/product/?p=TLV272CDGKHmmm....

author: picitup
author_rank: Regular Contributor
timestamp: October 31, 2019, 07:20:35 pm
content: Hi againI've spent a bit of time identifying the chips and have updated the chip markings on the piccy of the board.Here's what I've come up with so far:U1 - Altera Cyclone IV FPGAhttps://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-53001.pdfU2, U4, U5, U7 - V05SRV05-4 ESD Protection Diode Arrayhttps://www.onsemi.com/pub/Collateral/SRV05-4-D.PDFU3 - CY7C68013ACypress USB Microcontroller High-Speed USB Peripheral Controllerhttps://www.cypress.com/file/138911/downloadU6, U8 - YJAASGM2019A - Low Power, Low Dropout, 250mA, RF-Linear Regulatorshttp://www.wandec.com/upfile/SGM2019.pdfU9 - 24C02NIIC-Compatible (2-wire) Serial EEPROM 2Mbithttps://www.mouser.co.uk/datasheet/2/268/Atmel-8828-SEEPROM-AT24CM02-Datasheet-1398087.pdfU10 - IC??U11, U12 - K4T1G1604G1 Gbit DDR RAMhttps://www.samsung.com/semiconductor/global.semi/file/resource/2017/11/DS_K4T1G08_16_4QJ-B_Rev1_0-1.pdfU13, U16 - SC2HFSGM6013 1.6MHz, 600mA Synchronous Step-Down Converterhttp://www.datasheet-pdf.com/mobile/1301564/SGM6013.htmlU14 - TI 7B AVFTLV272CDGK - Dual 16V, 3MHz, 550-uA/ch, rail-to-rail output op amphttps://www.ti.com/store/ti/en/p/product/?p=TLV272CDGKU15 - PFNITPS60403 - 60mA Charge Pump Voltage Inverter with Fixed 250kHz Operationhttp://www.ti.com/lit/ds/symlink/tps60403.pdfSo that's all of them apart from U10 which is just marked IC and I can't find that one for some reason!

author: Daixiwen
author_rank: Frequent Contributor
timestamp: November 01, 2019, 07:38:53 am
content: U10 is probably an SPI flash to configure the FPGA, such as an Intel/Altera EPCS16 or a Micron MT25Q

author: picitup
author_rank: Regular Contributor
timestamp: November 01, 2019, 10:05:05 am
content: Yes, I think you're right. The track and resistor to the LED threw me a bit, but this actually goes to the FPGA, not U10.So back to the start, I'm guessing the FPGA is clocked by the Cypress XTAL.I wonder...... The Cypress data sheet says XTALIN can be either an XTAL or 3.3v square wave. Does anyone know if this is an automatic switchover, or would it require the pin reconfguiring through firmware?Hm.....

author: picitup
author_rank: Regular Contributor
timestamp: November 02, 2019, 04:50:50 pm
content: I've joined the Cypress forum to try and get an answer on XTALIN, but it seems pretty quiet over there. I'm away for a week now so see how it goes:https://community.cypress.com/thread/50178Chat soon.....Steve

author: picitup
author_rank: Regular Contributor
timestamp: November 05, 2019, 09:49:08 am
content: Hi AllWell a helpful person replied on the Cypress forum and confirmed that XTALIN will auto-switchover between a crystal and an oscillator input. So in short, I can remove the xtal and caps and add a tcxo. I've got my eye on a 589L240X2CAT at Mouser here:https://www.mouser.co.uk/ProductDetail/CTS-Electronic-Components/589L240X2CAT?qs=sGAEpiMZZMt8oz%2FHeiymAMra1pTmE9sFQ2Dh%252BCLNKsLnN6X8Jb7f5g%3D%3DIt's 0.28ppm, 3.3v and 5x7mm so easy to solder. The only gotcha is it's not stocked and has a 12 week lead time.

author: evgen.05
author_rank: Regular Contributor
timestamp: January 27, 2020, 06:57:19 am
content: Hello! Could anyone make a dump from EEPROM from LA2016? I've got a LA1016, they are absolutley indentical at hardware.

author: voodoobearhunter
author_rank: Contributor
timestamp: May 14, 2020, 05:53:53 pm
content: How is the LA5016? I'm looking to buy a cheapish logic analyser and am torn between the LA5016 and the Dslogic Plus.

author: PRL519
author_rank: Newbie
timestamp: February 04, 2022, 03:22:47 pm
content: Hey picitup, if you’re still out there…Any update on your LA5016 analysis? Last posts showed you checking to confirm that the onboard memory was working (that USB speed to PC didn’t matter). Did you finish your analysis?I’m looking at the LA5016 and LA5032 for my latest project (building a Z80 out of discrete components). Max clock is only 5 MHz, so the LA’s should work fine.Not a lot of useful LA50xx reviews out there.Thanks.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: January 08, 2024, 10:16:23 am
content: Resurrecting thread...Now in 2024.... I'm looking for a cheap LA that can capture at least 20ms worth of at least 12 signals where the fastest one is a clock at approx 18MHz.I see these LAnnnn things? Would that be a good choice.

author: rsjsouza
author_rank: Super Contributor
timestamp: January 08, 2024, 12:12:57 pm
content: My LA2016 is still working like a champ and is still fully supported byKingst. Also,Sigrokstarted to support it, so I can definitely recommend it.

author: voltsandjolts
author_rank: Unknown
timestamp: January 08, 2024, 02:04:26 pm
content: Quote from: evgen.05 on January 27, 2020, 06:57:19 amThis is an old post, but for the benefit of others, converting an LA1016 (100MHz) into the LA2016 (more expensive 200MHz model) would not be easy. There is an SO8 authentication chip on the board which is checked by the fpga and the kingst software. Loading the 200MHz fpga bitstream on the LA1016 doesn't work. See details on Sigrok wiki, schematic etc.

author: ConraDonald
author_rank: Newbie
timestamp: February 07, 2024, 09:16:51 am
content: I've just bougth a LA2016, but I can't make it work with PulseView in windows 11 or linux .ANyone of you have advice to give me? Which driver have to used ? I extract in linux the fw but there are several files and I don't really know which is the exact procedure to make it works within pulsview.I've tryed to connect with native driver Kingst LA-2016 and also with fx2lawfw but with no success in both cases. I've put in the firmware directory all files extracted with pythons script but in windows and linux (ubuntu 22.04) it doesn't connect to the analyzer.On the pcb of the La2016 is reported: ver.3.2

author: mwb1100
author_rank: Frequent Contributor
timestamp: February 07, 2024, 06:47:23 pm
content: You should let people know some precise details of what you have and are doing. Posting the details using copy/paste when possible is best (only post a screenshot if text copy/paste won't do):- what version of sigrok? ("sigrok-cli -V" output)- what instructions are you following (a URL for example)- exactly what directory did you put the firmware file(s); what are the names of the "several files"?- exactly what does sigrok say when it fails to connect to the device? Adding the "--loglevel 5" option will provide more detail about what sigrok is trying to do.Also, does the KingstVIS Virtual Instruments Studio software work?

author: ConraDonald
author_rank: Newbie
timestamp: February 07, 2024, 09:31:16 pm
content: VER sigrok-cli 0.8.0-git-9d9f7b8Libraries and features:- libsigrok 0.6.0-git/4:0:0 (rt: 0.6.0-git-b503d24/4:0:0).VER PULSEVIEW:PulseView 0.5.0-git-9b8b734Installation path used for .fw files on windows11 : C:\Program Files\sigrok\PulseView\share\sigrok-firmwarefiles inserted (get via python script):5.350 kingst-la-01a1.fw5.430 kingst-la-01a2.fw5.697 kingst-la-01a3.fw142.412 kingst-la-01a4.fw5.459 kingst-la-03a1.fw124.412 kingst-la1010a0-fpga.bitstream125.301 kingst-la1010a1-fpga.bitstream342.524 kingst-la1010a2-fpga.bitstream178.151 kingst-la1016-fpga.bitstream178.379 kingst-la1016a1-fpga.bitstream178.542 kingst-la2016-fpga.bitstream178.362 kingst-la2016a1-fpga.bitstream577.892 kingst-la2016a2-fpga.bitstream181.322 kingst-la5016-fpga.bitstream247.485 kingst-la5016a1-fpga.bitstream593.076 kingst-la5016a2-fpga.bitstream451.116 kingst-la5032a0-fpga.bitstream127.244 kingst-ms6218-fpga.bitstreamFirmware search paths:C:\Users\claud\AppData\Local\sigrok-firmwareC:\Program Files\sigrok\PulseView\share\sigrok-firmwareProtocol decoder search paths:C:\Program Files\sigrok\PulseView\share\libsigrokdecode\decodersthe pulseview interface recognize Kinst LA2016 device, but run button is grey and it doesn't react when I try to activate the record funcion.Ouput of sigrok command : c:sigrok-cli --config samplerate=1M -d kingst-la2016 --continuous -l 5 -o test.txt -O csv --samples 100000D:\temp>c:sigrok-cli --config samplerate=1M -d kingst-la2016 --continuous -l 5 -o test.txt -O csv --samples 100000sr: [00:00.000000] log: libsigrok loglevel set to 5.sr: [00:00.000000] backend: libsigrok 0.6.0-git-b503d24/4:0:0.sr: [00:00.000000] backend: Libs: glib 2.44.1 (rt: 2.44.1/4401:1), zlib 1.2.11, libzip 1.5.2, minilzo 2.10, libserialport 0.1.1/1:0:1 (rt: 0.1.1/1:0:1), libusb-1.0 1.0.23.11470 API 0x01000108, hidapi 0.8.0-rc1, libftdi 1.4.sr: [00:00.000000] backend: Host: x86_64-w64-mingw32.static.posix, little-endian.sr: [00:00.000000] backend: SCPI backends: TCP, serial, USBTMC.sr: [00:00.000000] backend: Firmware search paths:sr: [00:00.017000] backend: - C:\Users\claud\AppData\Local\sigrok-firmwaresr: [00:00.017000] backend: - C:\ProgramData\sigrok-firmwaresr: [00:00.017000] backend: - C:\Users\Public\Documents\sigrok-firmwaresr: [00:00.017000] backend: - C:\Program Files\sigrok\sigrok-cli\share\sigrok-firmwaresr: [00:00.017000] backend: - C:\Program Files\sigrok\sigrok-cli\share\sigrok-firmwaresr: [00:00.017000] backend: Sanity-checking all drivers.sr: [00:00.017000] backend: Sanity-checking all input modules.sr: [00:00.017000] backend: Sanity-checking all output modules.sr: [00:00.017000] backend: Sanity-checking all transform modules.srd: libsigrokdecode loglevel set to 5.sr: [00:00.035000] kingst-la2016: USB enum found 77a1:01a2 at path usb/1-5, 1.5.sr: [00:00.035000] kingst-la2016: USB PID 01a2, MCU firmware 'kingst-la-01a2.fw'.sr: [00:00.037000] kingst-la2016: Manufacture date bytes 23 11 dc ee.sr: [00:00.037000] kingst-la2016: Manufacture date: 2023-11.sr: [00:00.039000] kingst-la2016: EEPROM magic bytes 0b f4 00 00 0b f4 10 ef.sr: [00:00.039000] kingst-la2016: Using secondary magic 0xb (0x10).sr: [00:00.039000] kingst-la2016: Model 'LA2016', 16 channels, max 200MHz.sr: [00:00.039000] kingst-la2016: FPGA bitstream file 'kingst-la2016a2-fpga.bitstream'.sr: [00:00.039000] kingst-la2016: Checking operation of the FPGA bitstream.sr: [00:00.041000] kingst-la2016: FPGA registers dump: bitstream checksr: [00:00.041000] kingst-la2016: 0000 ee 85 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.041000] kingst-la2016: 0010 57 0a 08 00 00 00 00 00 b0 ba 19 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.042000] kingst-la2016: 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00sr: [00:00.043000] kingst-la2016: FPGA register: run state 0x85ee.sr: [00:00.043000] kingst-la2016: Unexpected FPGA register content (run state).sr: [00:00.043000] kingst-la2016: Uploading FPGA bitstream 'kingst-la2016a2-fpga.bitstream'.sr: [00:00.044000] resource: Attempt to open 'C:\Users\claud\AppData\Local\sigrok-firmware\kingst-la2016a2-fpga.bitstream' failed: No such file or directorysr: [00:00.044000] resource: Attempt to open 'C:\ProgramData\sigrok-firmware\kingst-la2016a2-fpga.bitstream' failed: No such file or directorysr: [00:00.044000] resource: Attempt to open 'C:\Users\Public\Documents\sigrok-firmware\kingst-la2016a2-fpga.bitstream' failed: No such file or directorysr: [00:00.044000] resource: Opened 'C:\Program Files\sigrok\sigrok-cli\share\sigrok-firmware\kingst-la2016a2-fpga.bitstream'.sr: [00:02.044000] kingst-la2016: FPGA bitstream upload (577892 bytes) done.sr: [00:02.137000] kingst-la2016: Run state: 0x85e9 (idle).sr: [00:02.138000] kingst-la2016: Device should be initialized.sr: [00:02.138000] hwdriver: Scan found 1 devices (kingst-la2016).sr: [00:02.138000] device: kingst-la2016: Opening device instance.sr: [00:02.148000] kingst-la2016: PWM config, app spec, ch 0, en 0, freq 1000.0, duty 50.0.sr: [00:02.149000] kingst-la2016: PWM config, reg 0x0070, freq 200000, duty 100000.sr: [00:02.149000] kingst-la2016: PWM config, enable all 0x00, cfg 0x01.sr: [00:02.149000] kingst-la2016: PWM config, disabling before param change.sr: [00:02.150000] kingst-la2016: PWM config, app spec, ch 1, en 0, freq 100000.0, duty 50.0.sr: [00:02.150000] kingst-la2016: PWM config, reg 0x0078, freq 2000, duty 1000.sr: [00:02.150000] kingst-la2016: PWM config, enable all 0x00, cfg 0x02.sr: [00:02.150000] kingst-la2016: PWM config, disabling before param change.sr: [00:02.150000] hwdriver: sr_config_set(): key 30000 (samplerate) sdi 0000000001BAEE90 cg NULL -> uint64 1000000sr: [00:02.151000] hwdriver: sr_config_list(): key 50001 (limit_samples) sdi 0000000001BAEE90 cg NULL -> (uint64 0, uint64 10000000000)sr: [00:02.151000] hwdriver: sr_config_set(): key 50001 (limit_samples) sdi 0000000001BAEE90 cg NULL -> uint64 100000sr: [00:02.151000] session: Using thread-default main context.sr: [00:02.151000] session: Starting.sr: [00:02.151000] hwdriver: kingst-la2016: Starting acquisition.sr: [00:02.151000] kingst-la2016: Set threshold voltage 1.40V.sr: [00:02.151000] kingst-la2016: Duty cycle values: R56 0x021f, R79 0x00f2.sr: [00:02.153000] kingst-la2016: Set trigger config: enabled-channels 0xffff, triggering-channels 0x0000, level-triggered 0x0000, high/falling 0x0000.sr: [00:02.154000] kingst-la2016: No trigger setup, skipping pre-trigger config.sr: [00:02.155000] kingst-la2016: Set sample config: 1000kHz (div 200), 100000 samples.sr: [00:02.155000] kingst-la2016: Capture ratio 50%, count 0, mem 256.sr: [00:02.155000] usb: Failed to get libusb file descriptors.sr: [00:02.155000] session: bus: Received SR_DF_HEADER packet.cli: Received SR_DF_HEADER.sr: [00:02.156000] hwdriver: sr_config_get(): key 30000 (samplerate) sdi 0000000001BAEE90 cg NULL -> uint64 1000000sr: [00:02.156000] output/csv: gnuplot = '', scale = 1sr: [00:02.156000] output/csv: value = ',', record = '', frame = '', comment = ';'sr: [00:02.156000] output/csv: header = 1, time = 0, do_trigger = 0, dedup = 0sr: [00:02.157000] output/csv: label_do = 1, label_names = 0sr: [00:02.157000] output/csv: Outputting 16 logic valuessr: [00:02.157000] output/csv: Got packet of type 10000sr: [00:02.157000] hwdriver: sr_config_get(): key 30000 (samplerate) sdi 0000000001BAEE90 cg NULL -> uint64 1000000sr: [00:02.157000] output/csv: Set sample rate, scale to 1000000, 1000000 microsecondsPress any key to stop acquisition.sr: [00:02.159000] session: Stopped.sr: [00:02.159000] hwdriver: Cleaning up all drivers.sr: [00:02.159000] kingst-la2016: Closing device on 1.5 (logical) / usb/1-5 (physical) interface 0.it creates a csv file with header but no data:; CSV generated by libsigrok 0.6.0-git-b503d24; from Kingst LA2016 on Wed Feb 07 22:25:23 2024; Channels (16/18): CH0, CH1, CH2, CH3, CH4, CH5, CH6, CH7, CH8, CH9, CH10, CH11, CH12, CH13, CH14, CH15; Samplerate: 1 MHzobvioulsly with the original software KingstVIS it works

author: mwb1100
author_rank: Frequent Contributor
timestamp: February 07, 2024, 10:08:24 pm
content: Looks like sigrok isn't having any problem finding and opening the LA2016. I can see you're using the nightly build; you might want to try the release build and see if you get better results:Code:C:\sigrok\sigrok-cli>sigrok-cli -Vsigrok-cli 0.7.2Libraries and features:- libsigrok 0.5.2/5:1:1 (rt: 0.5.2/5:1:1).... (remaining output elided)

author: ConraDonald
author_rank: Newbie
timestamp: February 08, 2024, 07:06:01 am
content: in the version sigrok 0.7.2give me this output : Driver kingst-la2016 not found.I've also test with fx2lafw with the results : No devices found.

author: voltsandjolts
author_rank: Unknown
timestamp: February 08, 2024, 08:42:31 am
content: I think the sigrok project is struggling forstaffvolunteers. The nightly builds weren't happening for a few weeks (months?). There's only one grumpy guy on the mailing list who has commit access and sometimes chimes in. He makes it hard to want to help TBH. There may be others able to assist on IRC but I get the impression there's not many developers interested these days.I have built pulseview myself, it's a bit of a PITA doing the Windows build. And I'd have to distibute it under another name, only sigrok can publish "PulseView".

author: ConraDonald
author_rank: Newbie
timestamp: February 08, 2024, 12:36:41 pm
content: Is there any other software besides the original one, that can decode a USB bus decently, with Kinst-LA2016 ?

author: voltsandjolts
author_rank: Unknown
timestamp: February 08, 2024, 01:25:40 pm
content: The only software that works with LA2016 is the Kingst software or Pulseview, AFAIK.For USB bus investigations consider:https://www.eevblog.com/forum/projects/usb-sniffer-using-rp2040https://www.eevblog.com/forum/projects/low-cost-lsfshs-usb-sniffer-with-wireshark-interface

author: ConraDonald
author_rank: Newbie
timestamp: February 08, 2024, 02:47:43 pm
content: probably sigrok works correctly with older Hw version...