Standard component layouts? - Page 1
Forum section: electronics / general

author: ssashton
author_rank: Frequent Contributor
timestamp: November 03, 2021, 11:36:58 am
content: Hi All,I'm self-taught in EE, but at this point I've done a good handful of my own PCB layouts. I usually find the hardest part of PCB layout is the initial placement of components because nothing has been routed yet, but it affects everything down the line.So I want to ask - are there standard good and space efficient layouts for common component blocks such as an LM317 and associated parts or dual op-amp ICs in inverting, non-inverting and differential arrangements, etc??Although the best layout will be influenced by the design envelope as well as package types, it seems to me it would be handy to have a list of good common layouts.

author: Feynman
author_rank: Regular Contributor
timestamp: November 06, 2021, 06:59:00 pm
content: I'm not aware of any standard component placements. Requirements are simply to different, I guess (packages, components sizes, stack-up/layer-change requirements). Most people/companies will have their own standards for regular reuse, of course.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 07, 2021, 12:12:33 am
content: Well, absolutely no one cares about relationships between components -- say for purposes of PCB fabrication, assembly or inspection. The only thing that matters, is much less specific: reserve space (courtyard) between components to permit access for rework/repair purposes. So, enough space to see the component and its solder joints (optical inspection), access it with tools (soldering iron, twezers, hot air, etc.), and that's about it.As for starting a PCB, just group up parts centroids, shove things around until they're roughly in schematic order (assuming the schematic itself is drawn in flow order -- which, for beginners, isn't something that can be taken for granted -- don't neglect your schematic layout, readability is king!!), then shove some more to get a useful, compact placement, taking account of shapes and sizes, any clearance constraints (e.g. leave a little space between SMTs for tweezers access, make room for heatsinks -- preferably make heatsinks a physical component so they appear with 3D model, if your PCB design is using 3D info), expected space for routing, and mechanical outline (screws/holes can also be components, may even be necessary if making ground connections), etc.This is easiest when ratsnest and group vectors are shown; most EDA tools show these so it's easy to do. If not, you'll have to keep track of pins/pads/nets and line them up carefully.An LM317, basically takes two capacitors, two resistors, and maybe a diode; I'm not sure how much you're expecting anyway -- there's only so many ways you can permute those. Including if the TO-220 is standing up or laying down, heh. Or other packages (hmm, since without a suffix, that's ambiguous too). Still, like a few thousand ways, if you wanted to enumerate them all. And it's easier to place components, than to enumerate combinations and select from a list, so you'd never bother to do that, at least practically speaking. So there you go.BTW, note that the capacitors can be shared with other nearby capacitors, that's generally true of any bypass cap. So those aren't necessarily even something that needs consideration.Tim

author: bob91343
author_rank: Super Contributor
timestamp: November 07, 2021, 12:13:03 am
content: My take on it is to lay out a signal path, including returns. Avoid crossovers as much as possible.Any 'standard' layout is likely to ignore some important rules.

author: Cerebus
author_rank: Super Contributor
timestamp: November 07, 2021, 12:55:31 am
content: Quote from: T3sl4co1l on November 07, 2021, 12:12:33 amFor this part, minimum spacing around/between components, therearestandards. Some places will have in-house standards, I have seen several articles published with 'industry recommended' spacings and there are some buried in JEDEC or IPC standards.One of the published recommendations I have seen which seems a pretty good summary of generally accepted good practice is athttp://irtfweb.ifa.hawaii.edu/~ao/Electronic/Peter_dump/Electronics/System/Text/PCBCADGuidelines.pdf. See page 14 onwards for spacing recommendations. The recommendations in there areminima, you can always allow more space.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 07, 2021, 02:29:58 am
content: Yep, of which IPC-7351 is one of the most important. Which I can't find a good link to offhand, but copies often show up online. Version C is current, A or B may be easier to find; the broad strokes are identical in any case. These specify how to measure and categorize solder joints, calculate pad dimensions and courtyards, and the recommended names and orientations for common footprint types.Or even IPC SM-782, which was superseded by 7351, but is still generally relevant as a starting point. The biggest change I think is moving away from tabulated dimensions, and dropping the pad gap dimension for chip type components, in favor of calculating heel/toe directly from part dimensions, for various standard types of solder joints (and size conditions).Mind, IPC is all about recommendations -- ultimately, all that matters is, is it productive? Pad size and shape, paste pattern, heat cycle, component spacing, all of that needs to be adjusted to the assembly line it's running on. IPC is just a starting point: something everyone should be able to manufacture, but not optimized for any particular process.And yeah, that's also generally true, dimensions generally don't have to be exact, so much as they have to meet or exceed some minimum. You can technically have a TSSOP or QFP with enormously long pads extending away from the part (visual reference: consider a typical SMT breakout board). I'd worry about shorts across such long pads, honestly, but the solder joints at the device are going to be just fine.Whether you want to go big or keep tight, is more a matter of: is it enough space to get a soldering iron in there, for example? For this reason I often leave toe closer to 0.5mm, up to 1mm for large parts; this ensures even a radiused tip gets adequate contact. For reflow soldering, toe can be reduced to the IPC minimums; I especially like this for small (0402 or less) components, which are small enough that surface tension dominates so having longer pads could pull the part to one side or the other -- a risk of tombstoning. (0805 and up are largely free of tombstoning risk.)Tim

author: james_s
author_rank: Super Contributor
timestamp: November 07, 2021, 03:00:18 am
content: Many datasheets have layout guidelines that are helpful for things like switching regulators and other high speed stuff. Other than that, figuring out how to logically lay out the parts is just part of engineering, you get better with practice.

author: Feynman
author_rank: Regular Contributor
timestamp: November 07, 2021, 07:57:51 am
content: Quote from: T3sl4co1l on November 07, 2021, 02:29:58 amThere is no version C, yet. There is a "What is New in IPC-7351C?" presentation by Tom Hausherr floating around on the internet, but Tom himself said that IPC dumped the proposed changes shown in that presentation.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 07, 2021, 12:06:54 pm
content: Ah, got it! Haven't been following, and still see references to "C" from time to time. That explains that.Tim

author: Cerebus
author_rank: Super Contributor
timestamp: November 07, 2021, 03:01:48 pm
content: Quote from: T3sl4co1l on November 07, 2021, 12:06:54 pmThat's cleared that up for me too. Not being Mr. Moneybags I rely on finding versions, or drafts, or interpretations, of these standards drifting about the net. I've had abortive attempts to find the "C" version and just assumed that it was too new for an accessible copy to have drifted into view.

author: thm_w
author_rank: Super Contributor
timestamp: November 08, 2021, 09:51:14 pm
content: Maybe you want to study some app notes, read some layout guides, etc.https://www.eevblog.com/forum/projects/texas-instruments-application-note/As Feynman said, it can vary widely depending on what your goal is.Also not answering the question but some PCB tools have a feature to make it easier to copy-paste a layout, once you've got one you like:

author: nigelwright7557
author_rank: Frequent Contributor
timestamp: November 08, 2021, 09:58:52 pm
content: I roughly place components where the routes seem shortest.Then I either optimise the nets or perform a "swap autoplace" function to get shortest net by swapping component positions automatically.Anything I dont want moving is set as "unmovable"I then autoroute and fill in what it cant do.If its audio pcb I go in and fix star grounding where required.I then add any copper ours I need.