[AVR Mega 0 series] interrupt vectors - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: February 07, 2021, 10:38:24 am
content: Where do I find the list of AVR-libc / GCC interrupt vectors for the new Mega 0 series? I wish which ever asshole at Microchip or Atmel that decided to recycle the Mega name could be fired! it was the most stupid thing they ever did, you can't find any information about them as any search will bring up decades of information about completely different chips that had that name first. That Mr. D. Head must still be working there........

author: mikerj
author_rank: Super Contributor
timestamp: February 07, 2021, 10:52:31 am
content: Literally a few seconds on Google found theFamily datasheetlisting the interrupt vectors on page 50.Why are the majority of your posts whinging about everything being someone else's fault? It's getting quite boring.

author: Simon
author_rank: Unknown
timestamp: February 07, 2021, 10:59:28 am
content: it was a stupid idea to re use the name, it causes utter confusion, they are two different types of chip entirely and were in fact the xmega. The list on the datasheet is all well and good, but what are the magic words for the interrupt handler?For the legacy mega's (see I actually have to change the name now of something that had an accepted name to make it clear which one of the two things with the same name I am talking about) I would go here:https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html, which yea, 5s on google can be found and used.No such thing exists for the 0 - series.

author: Simon
author_rank: Unknown
timestamp: February 07, 2021, 11:07:34 am
content: iom3208.h that is called up in AS has a list that I assume is it.Code:/* ========== Interrupt Vector Definitions ========== *//* Vector 0 is the reset vector *//* CRCSCAN interrupt vectors */#define CRCSCAN_NMI_vect_num 1#define CRCSCAN_NMI_vect _VECTOR(1) /* *//* BOD interrupt vectors */#define BOD_VLM_vect_num 2#define BOD_VLM_vect _VECTOR(2) /* *//* RTC interrupt vectors */#define RTC_CNT_vect_num 3#define RTC_CNT_vect _VECTOR(3) /* */#define RTC_PIT_vect_num 4#define RTC_PIT_vect _VECTOR(4) /* *//* CCL interrupt vectors */#define CCL_CCL_vect_num 5#define CCL_CCL_vect _VECTOR(5) /* *//* PORTA interrupt vectors */#define PORTA_PORT_vect_num 6#define PORTA_PORT_vect _VECTOR(6) /* *//* TCA0 interrupt vectors */#define TCA0_LUNF_vect_num 7#define TCA0_LUNF_vect _VECTOR(7) /* */#define TCA0_OVF_vect_num 7#define TCA0_OVF_vect _VECTOR(7) /* */#define TCA0_HUNF_vect_num 8#define TCA0_HUNF_vect _VECTOR(8) /* */#define TCA0_LCMP0_vect_num 9#define TCA0_LCMP0_vect _VECTOR(9) /* */#define TCA0_CMP0_vect_num 9#define TCA0_CMP0_vect _VECTOR(9) /* */#define TCA0_CMP1_vect_num 10#define TCA0_CMP1_vect _VECTOR(10) /* */#define TCA0_LCMP1_vect_num 10#define TCA0_LCMP1_vect _VECTOR(10) /* */#define TCA0_CMP2_vect_num 11#define TCA0_CMP2_vect _VECTOR(11) /* */#define TCA0_LCMP2_vect_num 11#define TCA0_LCMP2_vect _VECTOR(11) /* *//* TCB0 interrupt vectors */#define TCB0_INT_vect_num 12#define TCB0_INT_vect _VECTOR(12) /* *//* TCB1 interrupt vectors */#define TCB1_INT_vect_num 13#define TCB1_INT_vect _VECTOR(13) /* *//* TWI0 interrupt vectors */#define TWI0_TWIS_vect_num 14#define TWI0_TWIS_vect _VECTOR(14) /* */#define TWI0_TWIM_vect_num 15#define TWI0_TWIM_vect _VECTOR(15) /* *//* SPI0 interrupt vectors */#define SPI0_INT_vect_num 16#define SPI0_INT_vect _VECTOR(16) /* *//* USART0 interrupt vectors */#define USART0_RXC_vect_num 17#define USART0_RXC_vect _VECTOR(17) /* */#define USART0_DRE_vect_num 18#define USART0_DRE_vect _VECTOR(18) /* */#define USART0_TXC_vect_num 19#define USART0_TXC_vect _VECTOR(19) /* *//* PORTD interrupt vectors */#define PORTD_PORT_vect_num 20#define PORTD_PORT_vect _VECTOR(20) /* *//* AC0 interrupt vectors */#define AC0_AC_vect_num 21#define AC0_AC_vect _VECTOR(21) /* *//* ADC0 interrupt vectors */#define ADC0_RESRDY_vect_num 22#define ADC0_RESRDY_vect _VECTOR(22) /* */#define ADC0_WCOMP_vect_num 23#define ADC0_WCOMP_vect _VECTOR(23) /* *//* PORTC interrupt vectors */#define PORTC_PORT_vect_num 24#define PORTC_PORT_vect _VECTOR(24) /* *//* TCB2 interrupt vectors */#define TCB2_INT_vect_num 25#define TCB2_INT_vect _VECTOR(25) /* *//* USART1 interrupt vectors */#define USART1_RXC_vect_num 26#define USART1_RXC_vect _VECTOR(26) /* */#define USART1_DRE_vect_num 27#define USART1_DRE_vect _VECTOR(27) /* */#define USART1_TXC_vect_num 28#define USART1_TXC_vect _VECTOR(28) /* *//* PORTF interrupt vectors */#define PORTF_PORT_vect_num 29#define PORTF_PORT_vect _VECTOR(29) /* *//* NVMCTRL interrupt vectors */#define NVMCTRL_EE_vect_num 30#define NVMCTRL_EE_vect _VECTOR(30) /* *//* USART2 interrupt vectors */#define USART2_RXC_vect_num 31#define USART2_RXC_vect _VECTOR(31) /* */#define USART2_DRE_vect_num 32#define USART2_DRE_vect _VECTOR(32) /* */#define USART2_TXC_vect_num 33#define USART2_TXC_vect _VECTOR(33) /* *//* PORTB interrupt vectors */#define PORTB_PORT_vect_num 34#define PORTB_PORT_vect _VECTOR(34) /* *//* PORTE interrupt vectors */#define PORTE_PORT_vect_num 35#define PORTE_PORT_vect _VECTOR(35) /* */#define _VECTOR_SIZE 4 /* Size of individual vector. */#define _VECTORS_SIZE (36 * _VECTOR_SIZE)

author: Simon
author_rank: Unknown
timestamp: February 07, 2021, 11:13:27 am
content: In case you missed the reference: