Basic Power Electronic Help - Page 1
Forum section: electronics / beginners

author: electrohobies
author_rank: Newbie
timestamp: September 29, 2017, 12:25:09 am
content: In a isolated half bridge topology is the current flowing through the ON Mosfet and the primary of the transformer just the drain current of the mosfet based on the Mosfet drive mode?

author: TimNJ
author_rank: Super Contributor
timestamp: September 29, 2017, 02:16:07 am
content: Yes, the drain current is the current through the primary winding. If the top FET is on (and bottom is off), current flows "downwards" through the primary. If the top FET is off (and bottom is on), then the current flows "upwards" through the primary. C3 and C4 form a capacitive voltage divider so that the voltage applied across the transformer can be reversed periodically.

author: electrohobies
author_rank: Newbie
timestamp: September 30, 2017, 04:08:55 pm
content: Thank you. I looked online and on Power electronic books on how to choose the C4 and C3 capacitor value and types but could not find anything. Does anyone here have any explanation on what to take into consideration when choosing these caps? thanks youEDIT: I found some that on some forums they suggest a470u or 680ucapacitor rated at the given drain current and source voltage. However I would really like to know how we come to determine these values? help please?

author: Benta
author_rank: Super Contributor
timestamp: September 30, 2017, 05:44:57 pm
content: First, in this type of topology, CB is not 100% necessary, but can in certain cases (resonant design) be significant. In a "hard-switching" design, it can be omitted, its function being done by C3 and C4.For choosing the value of C3 and C4, you'll find that they turn out to be significantly larger than a pure capacitance calculation will indicate.The limiting factor is ESR (and to a certain extent ESL). You'll need to do a thorough ripple current analysis for choosing the right type/size for achieving acceptable losses.Bleed resistors across C3 and C4 is good design.

author: electrohobies
author_rank: Newbie
timestamp: September 30, 2017, 06:07:54 pm
content: Thank you! yes I think the answer is more complicated then I though it was going to be. can you be more specific about why ESR is an issue? power dissipation? also any reference that I could get more information from? I am struggling finding any info about this stage of the bridge.Also do you think going with a full bridge topology instead is better if space is an issue? 4 mosfets could end up using less space than 2 mosfets and 2 bulky 680 uf electrolytic capacitors for instance?Thank you much!

author: Benta
author_rank: Super Contributor
timestamp: September 30, 2017, 06:20:23 pm
content: I assume that we are talking about an offline power supply here? Or is it a secret?Anyway, the point is that C3 and C4 are carrying the full primary AC current, not just primary magnetizing, but also reflected secondary load current, which can be a lot.So when I say "ripple current", I mean this full current.Electrolytic capacitors have limits for maximum ripple current (which is mainly, but not only) derived from ESR. Yes, it's a power dissipation issue, but the ripple current limit also takes things into account like possible local hot spots in the cap.I suggest you download some electrolytic cap datasheets and try to understand them fully.Concerning half-bridge vs. full-bridge there is no clear-cut answer. Heatsinks also take up space, and drive for a full-bridge is somewhat more complicated. Things like form-factor come into play (if the thing has to be extremely flat, capacitors are perhaps not so cool...)

author: electrohobies
author_rank: Newbie
timestamp: September 30, 2017, 06:49:04 pm
content: This is just an exercise to understand this topology. I picked up random numbers and tried to design around them, then got stuck at picking valid capacitor values. Could not find any reference any where talking about this. To recap everything I understood so far, the capacitor divider values has to be as large as possible to provide a stable voltage across the transformer. The cap ESR becomes a factor in high current circuitry since now the cap is dissipating power across it and affecting the efficiency of the topology to deliver max power to the load. Thank you and I will dig more into this.

author: Benta
author_rank: Super Contributor
timestamp: September 30, 2017, 07:04:49 pm
content: QuoteThe effect of the capacitor ESR on overall efficiency is negligible. The main point is the maximum ripple current rating of the caps, which, if exceeded, can cause the caps to fail. This leads to larger caps than you might expect.

author: electrohobies
author_rank: Newbie
timestamp: September 30, 2017, 07:30:56 pm
content: Thank you for the response. I did some online research about the effect of ripple current, and I am wondering if this ripple current is also an issue if building a DC to AC inverter for instance? or is it just for AC to DC converters? This is just a curiosity since if the primary input voltage is DC then there should not be any ripple current if it is well filtered. is this a correct analogy or is there something I am missing here? Thank you again!

author: Benta
author_rank: Super Contributor
timestamp: September 30, 2017, 08:58:02 pm
content: After looking through a couple of my electrolytic cap datasheets, I must apologize for using the wrong term. Something got lost in translation, I guess.The correct term is "maximum AC current", not maximum ripple current. The ripple current is generally specified at 100 Hz or 120 Hz and is used for characterizing mains rectified AC/DC smoothing capacitors.Maximum AC current is the deciding one for your application, because it relates to the high-frequency current through the transformer primary and thus through C3 and C4. Most electrolytics do not specify this, good ones specify at 10 kHz and a few types at 50 or 100 kHz. Those are rated for switching regulator/converter applications.In the end, it's about how much power is dissipated in the caps from high frequency current.

author: ocset
author_rank: Super Contributor
timestamp: September 30, 2017, 09:52:10 pm
content: in many offline HB's your C4 and C5 are film capacitors of about a 1uF-2uF or so, (if its around 200w), and then you have your bulk capacitance across vin.CB is for when you are in voltage mode control.CB is not to be used when you are in current mode control.Dr Ray Ridley , in his great book, "Volume 1 control", slates and pillories the half bridge, because it does have some bad old fault modes if you are not careful with it.You can get a kind of unbalanced switching if you are not careful and end up with the voltage across c4 and c5 not being equal.Ridley recomends the 2 transistor forward as being robust.Some of the older 110VAC half bridges used to have a switched rectifier to double up the mains and give an effectiove 220vac supply...in that case the two split caps are just what you have in that rectifier situation.Ive forgotten the name of it......."Voltage doubler rectifier" i think?.......if you do it, then those two caps give you a "hard" split supply, and are nice for a half bridge input,..kind of mitigating some of the half bridge hang-ups......but now the regs say you cant do it, because you need a pfc stage up front.

author: electrohobies
author_rank: Newbie
timestamp: October 01, 2017, 01:36:38 am
content: Would the switching transistors create ripple voltage of some kind at the node between c3 and c4? Are these capacitors placed in order to minimize the ripple voltage depending on the switching frequency of the fets?This is what I understood from the following post :https://www.eevblog.com/forum/projects/half-bridge-inverter-for-dc-ac-conversion/If the half bridge topology is implemented as shown in the picture above I dont see the use of the the bulk capacitance besides a couple of bypass capacitors to provide a steady input.