Where did the 5um lithography process from 1970 go? - Page 1
Forum section: electronics / general

author: soFPG
author_rank: Frequent Contributor
timestamp: November 12, 2019, 07:24:18 am
content: You probably heard about the guy who successfully manufactured an IC in lithography process at his parents house in 2018.On his blog he says that a lot of electronics got cheaper but creating an IC still is unaffordable for the hobbyist.In todays world I think the largest process is 180nm or so (correct me if I am wrong). But where did the 5um process from the 70s go? Why is all this still so expensive even though the process is still roughly the same (or is it)?

author: Weston
author_rank: Regular Contributor
timestamp: November 12, 2019, 08:12:47 am
content: Making ICs requires a number of process steps, including doping, oxidation, and metallization. Due to contamination this all has to be done in a clean environment. A lot of the tools for this, such as furnaces and metal deposition tools, are large and expensive.The biggest change that allowed going from 5um to 180nm was in the lithography, which allowed smaller features to be patterned on the substrate. A modern 180nm process also probably uses more metal layers, and doping is done with ion implantation, but those are relatively minor differences. Compared to changes in lithography, a lot of the other tools look relatively the same.If you were to set up a fab today you would need a cleanroom setup, furnaces, metallization tools, wetbenches, and all the other equipment, regardless of feature size. The difference between 180nm and 5um would only really change how much you spend on lithography equipment, which is only a portion of the cost. Given the small difference in capital cost and large difference in utility between 180nm and 5um, no one is going to make a new 5um fab.Fabricating semiconductors has always been a relatively expensive process due to all the equipment and costs have never really come down.

author: magic
author_rank: Super Contributor
timestamp: November 12, 2019, 08:22:13 am
content: I indeed suppose it's not as much about lithography (you could probably do it with photography or microscopy gear) as it is about the nasty cocktail of chemicals to actually process the silicon.Half of it you probably won't even buy because OMG terrorism.

author: soFPG
author_rank: Frequent Contributor
timestamp: November 12, 2019, 09:23:31 am
content: Producing PCBs also involves nasty chemistry and expensive machines but somehow prices went down to 2$. There is one service which allows for shared wavers (you get a few mm2 for your die) but the price is no where near 2$. More like 1000$ for that small piece. Just wondering why the cost can not be spread as well amongst people who use the same waver as it is possible with PCBs

author: george.b
author_rank: Frequent Contributor
timestamp: November 12, 2019, 09:41:18 am
content: Quote from: soFPG on November 12, 2019, 09:23:31 amNowhere near as nasty, AFAIK, and with equipment/processes nowhere near as complex.Lots of foundries offer multi-project wafers, but the process is simply not as cheap as that for PCBs. Plus, there just doesn't seem to be as much demand for custom silicon as there is for custom PCBs.

author: coppice
author_rank: Super Contributor
timestamp: November 12, 2019, 09:46:22 am
content: Quote from: soFPG on November 12, 2019, 09:23:31 amThat $2 figure has been achieved by avoiding masks, and writing the image directly onto the sensitised FR4. Its not how you do cheap volume production, but it produces similar results. So, once your $2 prototypes check out OK, the volume production boards will be identical. In the 80s they made semiconductor equipment that wrote directly to the wafer, allowing fast low cost prototypes. However, this couldn't achieve the resolution of the best semiconductor processes, so it faded away. If someone could make a machine to direct write wafers at, say, 45nm or better feature sizes I'm sure it would be a huge hit. A few years ago masks for fine geometries were so expensive people were terrified of an all layers revision. Now they are so expensive people are seriously worried about a single metal layer needing revision. A fast cheap prototyping service would be a game changer, but don't hold your breath.

author: Kjelt
author_rank: Super Contributor
timestamp: November 12, 2019, 10:52:33 am
content: The whole process is made for mass production.I am not an expert but do know that many chips require 20 to 30 layers.Single or low quantities chips are a huge trouble.Masks can costs up to millions these days, but still if you go to the old process of 200nm or lower you still need 20 to 30 times:the wafer has to be given a doping layer (in ultra low vacuum depositing)the wafer has to be given a photo layerthe wafer has to be exposed to uv lightthe wafer has to be developedthe wafer has to be etchedthe wafer has to be cleaned and polishedthe wafer has to be given an interconnection metal layer (in ultra low vacuum depositing)the wafer has to be given a photo layerthe wafer has to be exposed to uv lightthe wafer has to be developedthe wafer has to be etchedthe wafer has to be filledthe wafer has to be cleaned and polishedAfter all that you have you're wafer that has to be tested and then cut into the single dies.Now if you do this in mass production you get 200 wafers per hour, all systems are calibrated and tweaked for that single process and you run run run, still it wouldtake a monthbefore the first wafer is finished.If the masks contain multiple different size chips noone wants to help you since this would cost way too much time.So the only alternative is companies that sell fixed die space and fixed layers but they actually would like larger quantities since each design needs its own masks which also costs a lot of money.

author: Kjelt
author_rank: Super Contributor
timestamp: November 12, 2019, 10:56:05 am
content: Quote from: coppice on November 12, 2019, 09:46:22 amThere was a company called Mapper lithography , but it went bankrupt last year after 18 years of R&D trying to get this thing economically feasible, it was not meant to be.https://www.bloomberg.com/profile/company/0611172D:NAwebsite is offline but in the wayback machine you can find the info:https://web.archive.org/web/20181023041912/https://mapper.nl/

author: soFPG
author_rank: Frequent Contributor
timestamp: November 12, 2019, 11:32:38 am
content: As you probably know from Sam Zeloof, it is possible without a mask just using a beamer with a macro lens. He said in one of his blog posts that with a proper beamer and good quality macro lens he could go from 5um into the nano-meters. But 5um is more than enough for most things I think.And he also does not have a clean room, just a vacuum tube where he does the metal layer.And I think for Doping he does not use an Ion gun as well.The most expensive parts are the bonding machine, the furnace, scanning electron microscope, optical microscope and, most expensive, the vacuum machine

author: tooki
author_rank: Super Contributor
timestamp: November 12, 2019, 11:58:05 am
content: For the non-German speakers, in the above post, a “beamer” is what we call a “video projector” in English.

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: November 12, 2019, 12:09:17 pm
content: I think parts of the answer are here:https://en.wikipedia.org/wiki/Chlorine_trifluoridehttps://en.wikipedia.org/wiki/Silanehttps://en.wikipedia.org/wiki/Ultrapure_water

author: amyk
author_rank: Super Contributor
timestamp: November 12, 2019, 12:23:41 pm
content: I believe a lot of the cheaper microcontrollers are still on a 1um process.

author: Kjelt
author_rank: Super Contributor
timestamp: November 12, 2019, 01:22:20 pm
content: Quote from: soFPG on November 12, 2019, 11:32:38 amNot sure what he did but since I can not even get a prestine picture from my $5k Sony 4K UHD projector I doubt he has something that can go into the um or even lower, esp. since lithography machines use UV light and lenses costing a million $. And one dust particle can be as large as 50um (1-100u).

author: magic
author_rank: Super Contributor
timestamp: November 12, 2019, 02:02:10 pm
content: Not that hard to find his websitehttp://sam.zeloof.xyz/first-ic/http://sam.zeloof.xyz/maskless-photolithography/It seems he uses a Full HD DLP projector fitted with UV illumination and microscope optics to project the image onto the wafer. Of course dust has to be removed, certainly from the lower parts of the setupAnd for the EU fanboys:HCl and H2SO4 are drug precursors, you can buy them but you need to find a supplier who knows it's legal to sell them and how to fill the paperwork.H2O2 can't be bought in serious concentration for reasons that could put UK readers in jail if I disclosed them

author: emece67
author_rank: Frequent Contributor
timestamp: November 12, 2019, 02:13:19 pm
content: .

author: magic
author_rank: Super Contributor
timestamp: November 12, 2019, 02:28:10 pm
content: Hydrofluoric acid is commonly used and that stuff can kill if you come in contact with it. Sam Zeloof mentions it too, maybe he used some relatively safe concentration or maybe he was careful.I'm not sure what's the reason why HF is typically used for etching SiO2 instead of NaOH.editWait, I think I know. IIRC sodium hydroxide eats raw silicon too. I experimented with using that stuff to remove aluminium from IC dies.

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 12, 2019, 02:56:23 pm
content: Quote from: soFPG on November 12, 2019, 07:24:18 amOh, nope. 350nm is still pretty common. You can take a look at MPW services to get an idea:http://europractice-ic.com/(bear in mind those services only have access to a limited number of process nodes, but they are still pretty useful.)Above 350nm, it really depends on the foundry (not all will have such process nodes), but it's certainly still used. One of the largest foundries, TSMC, has a 3µm process, for instance:https://www.tsmc.com/english/dedicatedFoundry/technology/logic.htmMaking ICs as an hobbyist, although fun and challenging, doesn't make much sense at all IMO. What exactly do you think you could achieve that could justifiy that these days? Again apart from the joy of knowing you have made it yourself? There's plethora of cheap ICs on the market that are going to fit any hobbyist use, and well better than funky homemade stuff. It can't be compared to making PCBs at all for the time being. It's orders of magnitude more complex and involving.Apart from requiring expensive gear (or fiddling with low-cost stuff until you get something) and nasty chemicals, it also requires knowledge that eludes most hobbyists (it would be such a tiny fraction of them that there is simply no market for that whatsoever). Designing an IC is not like designing electronics with discrete parts, it's more involved. Then it also requires expensive CAD tools if you want to do anything serious (there are open source tools but the problem is that you'll be completely on your own). Except from specialty stuff, many, or most ICs these days are designed using large libraries from foundries (for the corresponding process node) with pre-designed transistors and a lot of other basic elements. Few IC designers these days, apart from specialty stuff, have to design individual transistors for instance at a low level. They just need to define their dimension and characteristics, most of the time, and select base items in libraries. Designing an IC completely from scratch without any library is an interesting step when you are learning microelectronics, but you'll quickly figure that you won't achieve a lot beyond pretty simple stuff (that just makes no sense from a usability POV.)What you could reasonably achieve as an hobbyist, and what I've seen from the few projects out there, is very simple stuff like one or a couple transistors, that the person proudly achieved to make after often months or sometimes years of trying - and said transistors are eventually functional, but will usually have very meh characteristics... It's really interesting stuff, but just not worth it if you want a RESULT. If your'e interested in the process itself, it's of course always worth it in itself. But don't expect much out of it apart from pride.Another usability factor is one of the reasons we design ICs to begin with: miniaturization. You often don't need that as an hobbyist (and again when you do, you will rarely ever need anything that can't be designed with off-the-shelf parts). And if you ever did want to design something that would need extra miniaturization not achievable without designing your own ICs, then you would run into many other problems: packaging, assembly for instance.The only real and useful example for an hobbyist (or small company) these days as far as designing your own ICs go, is the pure digital ICs IMO. But that's what FPGAs are for these days, and making a custom digital IC can't be justified unless you go for very large volumes or are in a very niche application that requires ultra low power that can't be achieved with an FPGA. Good luck though, as designing ULP stuff at a low-level is not that easy and light years from what could ever be achieved with home-made tools.There are also a few vendors that make programmable mixed-signal ICs which contain reconfigurable analog blocks, a bit like FPGAs but for mixed-signal stuff.So I don't really see the point (except again the challenge).What I think may appear in the future, rather than low-cost IC making machines, is an evolution of the current PCB approach. Maybe tools and processes that will allow to integrate discrete, off-the-shelf parts (possibly then available in other package forms that what we have these days) onto smaller substrates that PCBs, but at a much lower cost and in a simpler way than what we can do at the moment, a bit like hybrid modules.

author: KaneTW
author_rank: Frequent Contributor
timestamp: November 12, 2019, 03:25:21 pm
content: The big part of why I don't bother is that I don't want to deal with fluoride compounds and HF.

author: soFPG
author_rank: Frequent Contributor
timestamp: November 12, 2019, 03:27:29 pm
content: The problem with FPGA in my opinion is that they either have too little or too much Ressources but most of the time you do not need that many pins or so many LUTs and then they have complicated voltage levels too. At least in my opinion.It is unfortunate that the process for IC manufacturing is so unreachable.It would be nice to be able to at least integrate a few thousand transistors. There are not that many things you can do with 6 transistorsEdit: I do not and also will not handle these chemicals but the dream having your own little circuit in a ceramic DIP..And you could revive old ICs which became obsolete long agoSo many options

author: coppice
author_rank: Super Contributor
timestamp: November 12, 2019, 03:59:34 pm
content: Quote from: SiliconWizard on November 12, 2019, 02:56:23 pmA lot of stuff is still being made in 350nm, and even 500nm, but new parts are almost always finer than this. 350nm is just too expensive to be competitive for anything more than a very simple part, that would be severely pad limited in a smaller geometry. The startup costs are lower for coarse geometries, but when you hit volume the costs look bad.

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 12, 2019, 04:15:58 pm
content: Quote from: coppice on November 12, 2019, 03:59:34 pmOh sure, but it does exist. That was the point. And it's still used quite a bit.It's a lot cheaper than finer nodes for many applications actually (not sure what you call 'simple part', certainly that would not be cost effective for large ICs, but there's a significant market otherwise). Also, you can get access to HV variants of 350nm nodes (for instance at AMS) for reasonable prices too, so in some applications going for finer nodes doesn't make economic sense. The 350nm nodes are still used for many automotive applications for instance, or medical devices. Finer nodes also tend to leak more, so the 350nm node can be useful for low-power stuff (as long as the circuits are indeed not too large.)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: November 12, 2019, 06:13:01 pm
content: Quote from: SiliconWizard on November 12, 2019, 02:56:23 pmI would be very interested in a "meh" process, like poly-Si FETs on glass. Should be cheap enough to make, though probably still needing some vacuum steps (for sputtering/evaporation?). The area can be huge (think TFT panels) and the complexity can be far higher than a PCB. The clock frequency won't be amazing (low MHz if that) but it doesn't need to be for lots of things.Zeloof is doing real MOSFETs on monocrystalline substrate, and the characteristics match the real deal (roughly, the P-ch complement of what's in CD4007). Not going to make a power amp any time soon, I suppose (though a wide transistor would be another interesting pattern to demonstrate), but more than enough for mixed signals.QuoteYou say that, but look at this stupid thing:It does what many ICs already do (phase shift PWM controller); none of which however expose the oscillator core itself, so I had to go and make this. It's huge, bigger than a DIP40. It's expensive, I'll be lucky if I can get it assembled for less than $20. Add on shipping and markup, and it's at least $50 -- what hobbyist would buy that?I would love to have a chip that does this, but it simply does not exist.(The next best thing would be throwing the couple logic chips in an FPGA and solving the timing with DACs and comparators, or something hacky with FPGA pins possibly (e.g., LVDS type inputs sometimes are good comparators). I don't have any FPGA tools handy so that would take way longer to design and build, and more prone to bugs.)(The behavior could also be emulated with less -- an FPGA and clock alone, or MCU. I require continuous time adjustment, and a clock divider based solution simply isn't that.)QuoteStill has the assembly cost though. You can't hybrid your way out of pick-and-place, and you're only increasing the cost by requiring higher precision placement, and flip-chips or wire bonding. Make "Visual 6502" for $100, I challenge you.Tim

author: Benta
author_rank: Super Contributor
timestamp: November 12, 2019, 07:52:05 pm
content: The biggest cost in semiconductor production is the silicon wafer, which is cut from a big monocrystalline "sausage", measuring 6", 8" or 12" in diameter. The incentive to squeeze as many die as possible from this wafer is from a cost point very high, explaining the desire for increasingly smaller geometries (= more die). The photolithography costs are mostly equal, although the machines and buildings are more expensive (the Motorola fab in East Kilbride was a building within a building, where the fab itself was suspended on enormous springs and dampers to avoid vibrations from trucks driving by).The second big cost is probing and test.The rest is cheap.The second incentive for smaller geometries is of course the wish for more functionality on the same size die.I strongly suspect, that the old 5 um photolithographic equipment was dropped in a dumpster.

author: chickenHeadKnob
author_rank: Super Contributor
timestamp: November 12, 2019, 08:53:48 pm
content: Quote from: Benta on November 12, 2019, 07:52:05 pmNot all of it. In the eighties some obsolete fab equipment capable large geometry bulk CMOS was quietly bought from scrappers for pennies on the dollar and re-purposed to make watch chips by swiss watch makers but that was a very limited thing. side note -- in english we call that silicon sausage a " boule " or log

author: iMo
author_rank: Super Contributor
timestamp: November 12, 2019, 09:35:00 pm
content: Except R&D the largest costs are with production of photo-lithography masks (a set of). It costs hundreds thousands $ till several million $. The cheapest is the actual production of si wafers (with chips on it), where the cost per wafer are flat fee today, $1000-$2000 per wafer (ie 300mm one). You may get thousands chips off a single wafer.Direct writing on silicon wafer is the most expensive exercise I can imagine. I worked in electron lithography lab in late 80ties and we were able to make 100nm resolution patterns into PMMA. The equipment at that time cost something like several million $, and writing full a single wafer would take a day/two, moreover, you would need do it at least 20times, thus it would cost you an arm and leg ( not ARM )

author: Kjelt
author_rank: Super Contributor
timestamp: November 12, 2019, 10:33:33 pm
content: Quote from: Benta on November 12, 2019, 07:52:05 pma 300mm wafer would cost around $100 so not that expensive.https://semiengineering.com/mixed-outlook-for-silicon-wafer-biz/

author: coppice
author_rank: Super Contributor
timestamp: November 13, 2019, 12:22:23 am
content: Quote from: Kjelt on November 12, 2019, 10:33:33 pmThe last time I looked it was something like $100 for a blank 300mm wafer, and $1200 for one processed at 130nm. These things can change a lot over time, so it may be finer geometries are now down to that price.

author: CatalinaWOW
author_rank: Super Contributor
timestamp: November 13, 2019, 04:32:50 am
content: But now you have a relatively inexpensive 300 mm wafer. Which means you either have to have all your other process steps handle that wafer size, or you must dice your wafer and process the pieces. Which will of necessity be rectangular with square being the choice. And loss of lots of material around the edges. And then you need to customize equipment to handle those non-standard pieces.Some portion of the equipment for those old process lines was purchased by specialty vendors who try to keep old chip designs alive. Their market is military and industrial customers for whom the cost of replacing old equipment is huge so are willing to pay amazing prices for obsolete parts. Lots of it was surplussed and sent out for salvage. I have seen hundreds of square meters of it sitting in outdoor storage or in dusty warehouses. Just the thought of cleaning it back up to semiconductor standards is frightening. With the only bright spot being that it doesn't have to be near as clean as current processes require.That latter also informs some other issues in the process. Reagents, resists and other materials at cleanliness requirements of the large processes is no longer produced. The cleaner stuff needed now works, but is priced to reflect the extra problems.

author: Black Phoenix
author_rank: Super Contributor
timestamp: November 13, 2019, 05:19:19 am
content: Quote from: CatalinaWOW on November 13, 2019, 04:32:50 amAll of this make me remember (yes offtopic but related with your topic) regarding a Photography Film Manufacture in Italy that was bought in some Kickstarter campaign to start again making 35mm film -https://www.filmferrania.it/The website news section is a very nice info in what it was taken to recover and put again old equipment working, with cleaning and all the necessary steps to restart production, from 2014 until now.Can't that be done in this case? Yes FPGA may substitute the need to remanufacture old designs no more being used and also custom ones, but still...

author: OwO
author_rank: Super Contributor
timestamp: November 13, 2019, 07:12:59 am
content: A 300nm digital design is probably going to use more die area and draw more power than the same thing implemented on a 28nm FPGA...

author: iMo
author_rank: Super Contributor
timestamp: November 13, 2019, 07:45:24 am
content: The trick with today's chip manufacturing is there are maybe 5 companies in the world specialized on the mass production. They spent billions of dollars to build and fine tune particular manufacturing process for extremely high yields, where they provide "libraries" and support for the many fabless chip makers such the stuff you design works on the real silicon as expected. It is a blackbox where you send your "tapes" via an email and in some rather short delivery time you get "chip dies" you may play with. That is why the production of "almost anything" you put on the 300mm wafer costs "flat fee" today, as I wrote earlier $1k-$2k per wafer.Your assumption you take old machinery off the scrap yard, you remove the dust and start produce 5um chips is pretty challenging one. To build in 1970 a 5um process node (or better to say 10um at that time) on a greenfield cost hundreds millions of dollars..

author: soFPG
author_rank: Frequent Contributor
timestamp: November 13, 2019, 09:02:39 am
content: I am wondering how much volume the uCs from Padauk have.Because 1 penny for a uC is pretty much nothing (okay they are OTP but the message is clear)I am wondering if there are some smaller chinese fabs who only produce ICs for local companies but do it very cheap and they just did not open up to the western world (yet).Are there any open source IC design tools? If so, there also must be open libraries for transistors / NAND-Gates and so on?

author: tooki
author_rank: Super Contributor
timestamp: November 13, 2019, 09:12:01 am
content: As an aside, this entire discussion is a fantastic reminder of the awesome technological and industrial achievement it is that semiconductors not only can be manufactured at all, but at such incredibly low cost. I’m not sure if there’s any other industry where economies of scale are so extreme.Also, this is a fascinating article about the apparently unique source of nearly all quartz feedstock for silicon crucibles:https://www.wired.com/story/book-excerpt-science-of-ultra-pure-silicon/I mean, man, if a terrorist wanted to bring the planet to a developmental standstill (at least in semiconductors), destroying that mine would be a good place to start...

author: iMo
author_rank: Super Contributor
timestamp: November 13, 2019, 12:08:02 pm
content: Here you may add your own prototype designs on a wafer:http://europractice-ic.com/mpw-prototyping/general/mpw-minisic/http://europractice-ic.com/mpw-prototyping/asics/Pricelist

author: coppice
author_rank: Super Contributor
timestamp: November 13, 2019, 12:31:08 pm
content: Quote from: soFPG on November 13, 2019, 09:02:39 amMost of the locally owned fabs in China are open to western customers, and I've heard of quite a few things from major western semiconductor companies being made in them.

author: coppice
author_rank: Super Contributor
timestamp: November 13, 2019, 12:35:13 pm
content: Quote from: OwO on November 13, 2019, 07:12:59 amIt depends what kind of power you are talking about. The 350nm part will draw more power when running at full speed, but the 28nm part will leak like a sieve, and ruin the standby consumption. Which matters most in your application?

author: soFPG
author_rank: Frequent Contributor
timestamp: November 13, 2019, 08:31:37 pm
content: Interesting videos:

author: CatalinaWOW
author_rank: Super Contributor
timestamp: November 13, 2019, 11:43:50 pm
content: Quote from: imo on November 13, 2019, 07:45:24 amThat number may be correct for a high volume production plant, but the number for a small volume research or internal use facility was far smaller. My company had a 5 micron line in the mid 70s. The dream was to have proprietary silicon that would allow product differentiation. The bill for the line was almost two orders of magnitude smaller the hundreds of millions of dollars you mention. But they couldn't afford even that much smaller bill every two years to keep up with Moore's law. Never went below 5 micron and eventually dropped out altogether. I believe that trajectory was true for many companies.

author: GeorgeOfTheJungle
author_rank: Super Contributor
timestamp: November 23, 2019, 02:00:29 pm
content: Measure a hair with the calliper: The original CMOS 4000 series chips were 20µm: 0.08e-3/20e-6 = 4 => 1/4th of a hair.In soFPG's msg above, in the 2nd video, it says "an LSI IC may contain tens of thousands of circuit elements [...] in a chip perhaps 1/20th of a square inch in area" : sqrt(25.4*25.4/20/10e3) = 0.056 mm => the area of a "circuit element" was almost == a square hair.