MOSFET body diode reverse recovery - Page 1
Forum section: electronics / projects

author: Zeyneb
author_rank: Regular Contributor
timestamp: February 28, 2018, 09:04:38 pm
content: Hi there!I’m developing a synchronous buck (step-down) voltage regulator around a fast 2.4MHz NCP3030B. To maximize efficiency I’m “studying” the body diode reverse recovery aspect in my circuit.In my circuit sketch D1 and D2 represent the inherent drain-to-source body diodes of the mosfets.To be sure, regarding the high side mosfet body diode, as this device is always reverse biased (it never seen a voltage larger than its forward voltage). The reverse recovery charge Qrr is never released in the circuit. Correct?Now for the low side mosfet. When the high side mosfet (QHS) is on, net a is high and the QLS body diode is reverse biased. But it will become forward biased as QHS turned off, entering the dead time moment and the inductor reverses its voltage polarity. Now in order to prevent the body diode reverse recovery charge release I was thinking about paralleling a schottky diode. If the schottky has a sufficiently lower forward voltage, the schottky can manage to get conducting before the voltage (negative voltage on net a) reaches the forward voltage of the body diode. So practically the schottky takes it all over during the deadtime. The body diode Qrr never gets released in my circuit and the Qrr of the schottky is very low. Maybe I can even select a silicon carbide one. When the QLS mosfet is turned on after the deadtime then almost all of the current flows from source to drain.Am I correct in this? Do you have further thoughts about this topic to make my design a great success?It might be that you get annoyed by my style of making statements and asking if that is correct afterwards. Look, it is not my intention to show off. Rather it helps me tremendously for my own understanding if people explain stuff along my line of thoughts. And my lines of thoughts are demonstrated in my explanation on how I think it works.Best regards,Zeyneb

author: llkiwi2006
author_rank: Regular Contributor
timestamp: February 28, 2018, 09:30:05 pm
content: Why are you using a NMOS as your high side switch and not a PMOS? You will need a higher voltage than Vcc to turn it on.

author: Benta
author_rank: Super Contributor
timestamp: February 28, 2018, 09:38:56 pm
content: As a buck converter, the upper side switch is as in every other design, no issue there.The interesting part is the low side switch. That is basically a replacement for the usual Schottky/HS rectifier placed in that spot.The concept is called "synchronous rectification", where the lower side switch acts as the free-wheeling diode.Your main question is, whether the body diode will make trouble. Answer: maybe.It depends on the quality of your gate drive.If you can control the lower side switch perfectly, the body diode never comes into play. The lower MOSFET will turn on and conduct current into the inductor (in the "wrong direction", but it works), provided the on resistance is low enough to keep the source-drain voltage drop below ~0.7 V.Adding a Schottky or even a SiC device makes the exercise futile, because then you can remove the lower MOSFET altogether.

author: Benta
author_rank: Super Contributor
timestamp: February 28, 2018, 09:42:56 pm
content: Quote from: llkiwi2006 on February 28, 2018, 09:30:05 pmThere are high-side gate drivers for this, and using them cancels problems of gate voltage vs. input voltage.And the portfolio of N-channel MOSFETs is much larger.

author: jmelson
author_rank: Super Contributor
timestamp: February 28, 2018, 10:05:22 pm
content: Quote from: Zeyneb on February 28, 2018, 09:04:38 pmI had exactly this problem in a full-bridge motor drive. I never got to the turn-off of the body diode, the killer was the turn-ON! With up to 14 V forward bias across the body diode, it took several US to turn on, killing the gate driver at that point. An ultra-fast power diode was put across the low-side FET. I also put an RC snubber on the junction between the two FETs to ground. Optimum in my drive seemed to be around 4700pF and 10 Ohms. The 10 Ohm resistor has to be a big one, I currently use a 2 W SMT resistor. Without the snubber, the di/dt caused other circuitry to have problems.Jon

author: HackedFridgeMagnet
author_rank: Super Contributor
timestamp: February 28, 2018, 10:23:19 pm
content: Quote from: jmelson on February 28, 2018, 10:05:22 pmCan you explain that again, it doesn't make sense to me how that is possible.edit. Ok rereading it, the slow turn on time for the body diode, means it isn't forward conducting for a couple of uSec. Hence the forward voltage. I haven't come across this before.

author: jbb
author_rank: Super Contributor
timestamp: February 28, 2018, 11:58:19 pm
content: What is Vcc? For small voltages the body diodes aren’t a big deal.Are you using Silicon, Silicon Carbide or Gallium Nitride devices? Or Silicon SuperJunction? The technology can make a huge diffence.Re NMOS/PMOS: NMOS have much better parameters (both on resistance and capacitance) so it’s worth a little more effort in the gate driver.Re adding a Schottky: the problem is that with fast switching edges, the inductance between the MOSFET body diode and the external Schottky diode will tend to oppose current transfer to the Schottky.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 01, 2018, 06:42:15 am
content: Quote from: llkiwi2006 on February 28, 2018, 09:30:05 pmGeneral PMOS facts:1. NMOS performance is ~2.5x better than PMOS.2. Market selection is smaller; PMOS fit for purpose might not be optimized as well as NMOS, resulting in a further performance hit. Not to mention cost.3. Bootstrap gate driver. Read the NCP3030 datasheet. No added cost!Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 01, 2018, 06:46:26 am
content: Quote from: jmelson on February 28, 2018, 10:05:22 pmStrange, I haven't measured any forward recovery in the -- admittedly few -- transistors I've tested. I've also not tested at stupendously high dI/dt, which may be relevant, but might suggest your loop inductance was far too low?Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 01, 2018, 07:40:14 am
content: Quote from: Zeyneb on February 28, 2018, 09:04:38 pmFYI, the triangle inside the MOSFET symbol represents this -- the triangle is the substrate, the line is the channel, and together they're a junction, strapped to source and rectifying against drain. The extra diode is redundant.Why no one realizes this (and I don't mean just newbies, I mean basically everyone, at every level!), no idea. It's amazingly poorly known...QuoteCorrect, unless output current reverses. It's not obvious to me whether this controller has passive rectification behavior, or if it's just full wave all the time and supports negative output current, regeneration or boost or however you like to call it.QuoteWith a 28V controller, SiC is straight out, you won't even be tapping into the fancier Si schottky (trench MOS and such), just plain old 40, 60V schottky.QuoteRight, thing is if you use a big enough schottky to have less drop than the body diode, you'll have doubled (or more) the switch node capacitance, which screws your switching loss. It can be worse than dealing with recovery (which isn't that slow for low voltage MOSFETs -- but, not good enough for a ~MHz converter).And if you use too small a diode, you're adding capacitance AND doing nothing. Example: LTC3810 recommends a pissant 1A diode on a 10-20A inverter; what a waste! (And yes, just for posterity's sake, I tested it and it's completely useless.)The only solution is to control dead time so the switches are just barely overlapping. You may want to increase loop inductance to limit dI/dt. That's it.Without dead time control (sadly, controllers are usually fixed, and much too long to be useful!), your only means is to increase the gate resistors, or using R || D to drive them.As for the NCP3030, I see multiple warning signs in the datasheet. I'd dump it and use something else.Tim

author: jbb
author_rank: Super Contributor
timestamp: March 01, 2018, 08:24:31 am
content: QuoteI agree with T3sl4co1l; at 28V, I suggest you just use the MOSFET. Do a proper workup to balance the conduction and switching losses; don't just jam in a huge MOSFET with low RdsON. For a reasonable size NMOS the Qrr will be quite low anyway. Also the leakage inductance will block the transfer of current from the MOSFET channel (during synchronous rectification) to the Schottky.No point in SiC below say 300V. Just use Si schottky.QuoteThat's playing hardball. An alternative approach would be to leave some small dead time in there (like 50ns or less), increase the HS gate resistor a tiny bit if current spikes are too high, and reduce the loop inductance. Don't mix these ideasQuoteYes, there are plenty of warning signs. I think the kickers for me were 1) quite high resistance in gate driver outputs 2) 80ns dead time (bloody ages @ 2.4MHz!) and 3) no slope compensation. They even have the gall to show some BS chart with stable and unstable regions like it's a magical property of the chip!!!In fact, I would suggest the use of an integrated synchronous buck if you're not super sensitive to BOM cost. They deliver great performance cause the hard stuff is done in tiny silicon.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 01, 2018, 10:37:11 am
content: Quote from: jbb on March 01, 2018, 08:24:31 amIncidentally, you can get devices to solve that -- "FETky" or the like, integrated schottky body diode. Still more Coss+Cjo than a FET alone, so do check if the switching loss balance is okay.QuoteNothing wrong with shoot-through -- two transistors on, doesn't mean massive loss. It just goes from current ramping in the output inductor, to current ramping in the switching loop. Increasing that inductance, reduces switching loss due to shoot-through.As you adjust gate resistors (bottom turn-off and top turn-on rates -- adjust rising/falling independently using an R || D + R network), you will find there is a minima, where recovery is eliminated but before shoot-through takes over.It's a fine line: the timing precision is on par with the switching time constant t_sw = pi*sqrt(Lstray * Coss) / 2. For 10nH and 1nF that's a mere 5ns. So an error of 10 or 20ns will be out of whack, to one side or the other.Increasing loop inductance does increase switching loss (just as increasing Coss increases loss, for the same reason, but depending on peak switch current instead of peak switch voltage), so you must find a suitable compromise, as well as a precise enough controller, to operate in this manner.Which segues into the next point on that subject:QuoteThe dead time is very sloppy, what was it, min 50, max 100ns? It's not clear what that depends on. Probably manufacture and temperature, maybe supply voltage as well. Broad side of a barn, as far as switching goes, especially at MHz.The most creepy things I saw were:1. Voltage mode controller? In 2018? You've got to be fucking kidding me. (Which means slope compensation is N/A -- it's wholly worse than that!) Also, voltage mode means dependency on output cap ESR.2. What thehellis this nonsense about bootstrap ripple? Sampling times? Even stuff about DACs?? Is this thing a fucking microcontroller inside?! What the hell do they need ten thousand transistors for? It's a switching controller; it's not even a current mode switching controller!The whole thing smacks of a graduate in digital logic, doing a pet project, with an amateurish understanding of control theory, and solving everything with discrete time, sampled, clocked, state machine methods, when all of that could be simplified to a couple hundred transistors (which I think is about what TI uses in their Eco-Boost line, which itself is slightly quirky in this regard -- example, the pulse skipping mode is literally skipping pulses, not just slowing down the repeat frequency gracefully).The underlying problem -- the "so what, what's wrong with that?" answer -- is that there's way too much hidden internal state for such a simple problem. The quirks seen in the datasheet only begin to scratch the surface of possible fatal errors this thing could encounter, particularly under arbitrary conditions (EMI and transients, noisy inputs and outputs?).QuoteNot to say things are bliss there, either -- they still have the identical recovery problem, except you don't have the ability to snub it because the logic is drawing VCC from the high side +V pin.One reported case was LM3102 generating drift-step-recovery transients (risetime < 1ns), corrupting all ADCs on a DAQ board.I usually stick with TI, TPS54xxx something or other seems to pop up most often. I forget if any run quite that fast, but there should be options. ON Semi seems to have a lot of cut-price parts, with quirks (though usually not as quirky as this one). Don't overlook Rohm/Renesas, Diodes Inc (similar to ON Semi, they have a lot of cheap clones, I think?), and many Taiwanese and Chinese companies that are getting more and more US market penetration and have chips that work surprisingly well.(If you were wondering, no, unfortunately I don't have any recommendations for a replacement in this application.)Tim

author: David Hess
author_rank: Super Contributor
timestamp: March 01, 2018, 03:13:32 pm
content: Quote from: T3sl4co1l on March 01, 2018, 07:40:14 amI have always drawn the body diode in separately to prevent ambiguity and treated the diode shown in the MOSFET symbol as the base-emitter junction of the parasitic bipolar transistor. The body diode is the base-collector junction. My justification is that there are two parasitic junctions so there should be two diodes shown and the body diode operates independently of the gate potential. The standard MOSFET symbol even shows the base-emitter junction shorted which it is.

author: Zeyneb
author_rank: Regular Contributor
timestamp: March 01, 2018, 06:35:56 pm
content: Thanks a lot for all the contributions and especially for Tim (T3sl4co1l) and jbb ones. I also realized the deadtime is unreasonably long in the NCP3030 device. And I too was annoyed by this excessive bootstrap voltage documentation shit. Therefore I realize I need to reconsider my controller chip. Still I prefer to go for an fast MHz one with external switches (mosfets). FYI Vcc is a 19V laptop supply. The output voltage is intended to be controllable/adjustable between 1V to 14V or so. My goal with a fast controller is a small low value inductor, fast transient response as well as trying to eliminate electrolytic capacitors.I'm having an excel sheet where I put all the equations to determine power dissipation and the rest like inductor value etcetera.QuoteMinimal deadtime is good for a wider range of duty cycles as well as minimum power dissipation because little time is spend in the body diode conducting state. But even if you do have minimal deadtime you either have the reverse recovery phenomenon or not, true? As reverse recovery power is only wasted at the start of the deadtime period from QHS off to QLS on. Do you mean that with delicate timing you can prevent the Qrr charge release altogether? Or should I play safe and select a mosfet with a good low Qrr spec anyway.Also I don't understand your lack of worry about shoot-through. To me as both mosfets are on the 19V laptop supply is shorted and as there is no inductance in that part of the circuit a massive current is going to flow and the safety features of the laptop supply are switching the power off. Are you willing to elaborate more on this?Anyway I'm glad to have asked for advice here on the eevblog forum to get such valuable comments.Best regards,Zeyneb

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 01, 2018, 09:32:12 pm
content: Quote from: Zeyneb on March 01, 2018, 06:35:56 pm1. On these time scales, the transistors are not switching instantaneously.2. Also on these time scales, the supply is not a brick wall. It's... "squishy". Inductive. More precisely, the switching loop (between supply bypass capacitor, HS FET and LS FET) is.So, whereas the transistors could short out the supply to the tune of, say, 50A at the peak, it would take a lot longer for this to happen, than the time scales you're doing this on.It might be worth playing around with a simulator to see how it works out yourself.BTW, shorting out a supply for nanoseconds at a time is kind of meaningless -- the energy first has to pass through whatever filtering is in the circuit.If nothing else, space itself serves as a filter -- that is, the stray inductance of wires and cables. You can't meaningfully short a power supply that's, say, 2 meters away, until several microseconds have passed. That's about how much time it will take for the current to build up to unusual levels (say, ~10x the DC nameplate rating).Here's a transient from "short circuiting" a fairly rigid 40V supply through 0.2m of cable:The first microsecond is the L/R time constant of the system (the ~0.2uH of the cable, curved a bit by the DUT's internal resistance), the next two microseconds are the DUT actively limiting current, and the rest is the DUT turning off.The supply was a bank of 4 x 4700uF 50V electrolytic capacitors, pretty low ESR, and much less ESL than the cable, which was dominant.Tim

author: jmelson
author_rank: Super Contributor
timestamp: March 01, 2018, 09:36:48 pm
content: Quote from: HackedFridgeMagnet on February 28, 2018, 10:23:19 pmRight, as the high-side transistor shut off, the voltage at the common node between them would plunge below zero as the inductor current continued to flow out to the load. I was using the IR2110 half-bridge driver chip, and it cannot tolerate the source of the high-side transistor going more than about 6V below ground before some parasitic diodes on the chip turn on. So, I had to make sure there was some diode to clamp the low-side drain/high-side source node to not go more negative that a couple Volts. A fast diode that could turn on in less than a 100 ns of so was required. That and an RC snubber totally solved the problem.Jon