Adder Circuit has different outputs depending on inputs - Page 1
Forum section: electronics / beginners

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 10, 2021, 07:43:57 pm
content: I built an adder circuit (version 01). It takes four individual voltage inputs and uses op-amps to add/subtract them in three output equations. Given how the op-amp stages are cascaded, I was hoping to achieve a gain of 2.3x at the output sum when viewed by an oscilloscope. However, I'm running into an issue.When I designed it, I ran simulations of it in LTspice using test data and ideal sources along with models provided by TI. Ideally, I should be getting the appropriate gains. However, real-life testing shows differently. In a nutshell, while some inputs give the correct output, inputting the same signal into other inputs (specifically input C and D) gives gains that are way higher than what I expect. I'm using a signal generator to input a small 100-mV peak-to-peak sine wave at 1 kHz into one signal input at a time (due to my generator only having one output). Inputting the signal into inputs A and B give a ~200-mV peak-to-peak output signal at each of three outputs as expected. However, inputting the same signal into input C is problematic. When I input the same signal into input C, output 1 gives the correct signal, but output 2 and 3 give me a 300-mV peak-to-peak signal. That sort of gain is too high, and it shouldn't be possible with the fixed resistors.Since this was a first draft, I included footprints of potentiometers at each op-amp stage in order to adjust the gain (making sure to remove the fixed resistor in parallel with it so I'm controlling the gain that way). However, I'm still getting too high of a gain in the aforementioned scenario above. I don't know what might be causing this problem, so does anyone have any ideas on what else I can do to troubleshoot this?

author: Andy Watson
author_rank: Super Contributor
timestamp: September 10, 2021, 09:01:47 pm
content: You say that you only have one signal generator and therefore can only drive one input at a time, are you grounding the other unused inputs?Consider what happens if you drive input D. A slightly attenuated version of the signal is buffered by the "D-C" op-amp and fed-back to the C input via R29.

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 10, 2021, 09:11:39 pm
content: Other inputs are left open ended. Should I use a 50-ohm load to tie them to ground instead?EDIT: Scratch that. I'm using appropriate cables, but following your suggestion, passing the input to C and tying D to ground through use of a 50-ohm load dongle attached to the input end, the output remains the same. With the aforementioned sine wave, output #2 gives me a 300-mV peak-to-peak sine wave. When inputting the same signal into inputs A and B, I get 200-mV peak-to-peak still....it's frustrating to ask this so late, but should I have output resistors after each op-amp, or is that taken care of with my 2k-ohm resistors?

author: Andy Watson
author_rank: Super Contributor
timestamp: September 10, 2021, 09:32:35 pm
content: Quote from: LoveLaika on September 10, 2021, 09:11:39 pmYou cannot allow them to be open. Both the "diff" op-amps can potentially cross-couple their positive inputs back to the negative input - unless the inputs are driven/grounded with a low impedance source.QuoteI think you are good to go with the output arrangements that you have.

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 10, 2021, 10:26:22 pm
content: Quote from: Andy Watson on September 10, 2021, 09:32:35 pmThanks for your reply. Running some more tests, something does seem off. If the 'diff' op-amps require a low-impedance source, how would I go about doing that? Is it just as simple as lowering R32 and R28 (and subsequently R42 and R38)? They don't go to ground necessarily, but the offset voltage is rather close to ground. Or, if I'm understanding you correctly, since the outputs of DIFF1 and DIFF2 are inputs to OUT #3, should I just insert a low-impedance load to ground at the op-amp outputs (like a resistor)?Below are some results of a test I ran. Sorry if the formatting is terrible. I'm not entirely sure how to insert a table. I simply inserted the test sine wave into an input (and making sure that the other inputs are terminated with 50-ohm loads to ground), and I measured each output one at a time along with the components that make up the output showing the results below. The concerning voltages are in bold. You can see how an input at C somehow achieves a high output at OUT #2 and OUT #2. Furthermore, I saw a noticeable sine wave at DIFF2 and DIFF1 (in bold). Those should not be there, and they weren't present when inputs A and B were being tested. Perhaps this is indicative of the cross-coupling that you mentioned before.EDIT: Now that I think a bit more about what you said, I believe the inputs are driven to ground with a 50-ohm resistor. You can see it with R55, R56, R57, and R58. Am I wrong?Table 1 for results viewing Output 1, shorting inputs to ground other than one being tested:INPUT SIG_GEN SUM1 SUM2 OUT1A 103mV 200mV ~21mV 188mVB 103mV 210mV ~21mV 204mVC 103mV ~20mV 193mV 184mVD 103mV ~20mV 206mV 200mVTable 2 for results viewing Output 2, shorting inputs to ground other than one being tested:INPUT SIG_GEN SUM1 SUM2 OUT2A 103mV 200mV ~20mV 214mVB 103mV 210mV ~20mV 236mVC 103mV ~20mV 200mV312mVD 103mV ~20mV 210mV 232mVTable 3 for results viewing Output 3, shorting inputs to ground other than one being tested:INPUT SIG_GEN DIFF1 DIFF2 OUT3A 103mV 200mV ~20mV 200mVB 103mV 210mV40mV175mVC 103mV ~30mV 197mV308mVD 103mV50mV190mV 170mV

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 11, 2021, 02:13:12 am
content: Are 'A' of the sum stage and 'A' of the diff stage the same signal?

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 11, 2021, 02:52:55 am
content: Yes. Input A is the same at the first op amps. Same with the others inputs.

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 11, 2021, 03:01:51 am
content: Quote from: LoveLaika on September 11, 2021, 02:52:55 amDid you try buffering the signals?Or to ask the question differently: does the error show up if you connect only one, i.e. the summing OR the difference stage?

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 11, 2021, 03:07:10 am
content: No, I didn't buffer it with an op amp. Just passed it through a low pass filter. Ill have to do that for version 2, but I didn't think it was necessary here

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 11, 2021, 03:09:04 am
content: See above (modified my post)

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 11, 2021, 03:16:09 am
content: Not sure. I could remove the input resistors at the appropriate op amps and see how they behave....

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 11, 2021, 03:33:41 am
content: If the problem still occurs, would passing it through a unity gain amp first help?

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 11, 2021, 03:53:28 am
content: If the problem does NOT occur with the separated inputs, bufferíng them should solve it.

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 11, 2021, 04:47:59 am
content: Any way to solve it without buffering? My board is built so I can't put a buffer on the board. Its odd how this problem occurs but not show up in simulation

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 13, 2021, 04:49:48 pm
content: Running some tests, I think my problem may stem from the difference amplifier like you said. From my results, somehow, when I input a signal in D, there's a noticeable sine wave that's being outputted from the difference of A and B, even though A and B are shorted to ground.As an alternative, what if I use larger resistors and set the first four sum/difference op-amps to unity gain and just control the gain at the output op-amps? Would using larger resistors help mitigate this strange sine wave I'm seeing that's not supposed to be there?

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 13, 2021, 06:09:41 pm
content: I do not think that larger resistors will do any good. As I see it, you have to separate the first stages or buffer the signals. And I noticed that your descriptions of the function in the later stages does not match the working of the circuit. Subtraction is not commutative.Can't say where that sine wave comes from. Is it line frequencyy?

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 13, 2021, 07:02:43 pm
content: Surprisingly, I think they kind of worked. For the difference amplifiers, I replaced the resistors used for the difference op-amps with 40-k resistors, which resulted in a unity-gain configuration for them. Doing so seemed to eliminate the undesirable sine wave that I was getting previously (at the cost of signal gain, but this is all part of troubleshooting I guess).Forgive me for asking, but how does my circuit not work the way I have it laid out (results wise)? Based on the operation of each op-amp circuit, it should come up with the output that I intended (putting aside the overall gain for now). Subtraction is not commutative, sure, but I'm struggling to see how it matters here if the results are what I expect.

author: capt bullshot
author_rank: Super Contributor
timestamp: September 13, 2021, 07:39:03 pm
content: You're using pots for the various _OFFSET voltages. So they have a non-zero source resistance.You're using some of the _OFFSET voltages for more than one OpAmp ADD / SUB stage.Here's the issue:The input signal of one circuit will couple through these nodes to other stages.If you short all of the _OFFSET voltages to GND, your output signals should behave as expected.

author: Neomys Sapiens
author_rank: Super Contributor
timestamp: September 13, 2021, 07:39:24 pm
content: Quote from: LoveLaika on September 13, 2021, 07:02:43 pmI'm referring to the term A-B-C+D at the diagram labeled Diff Stage #2. When the output of the Diff Stage #1 is D-C as the signal DIFF2, that appears to be not correct to me. Or did I overlook something?

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 14, 2021, 02:42:36 pm
content: Thanks. Yup, by shorting DIFF_OFFSET1 to GND, that seemed to solve all my issues. It's surprising how it all worked relatively well after that. Thanks for the answer. Now, I don't have to use these large 40k-ohm resistors. Going back to 2k feels much more normal now.

author: LoveLaika
author_rank: Frequent Contributor
timestamp: September 14, 2021, 02:46:40 pm
content: Oops, sorry. Bad wording. What I meant was that there were 2 different DIFF stages: one for the individual inputs (A,B,C,D) and one for using the results of DIFF STAGE 1, resulting in the two difference equations when following the difference amplifier equations.