FPGA ? - Page 1
Forum section: electronics / general

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 10, 2018, 03:22:45 pm
content: Hi, so i discovered FPGA does really stand for something.How can i use it to make a synthesizer ?Normally i have some MCU, only for polyphonic synths it dont has power enough,now i found out that it is possible to make a synthesizer with FPGA, i seen this movie on youtube :Where do i start ?, any chance i can buy it in DIP package ?thanks

author: Berni
author_rank: Super Contributor
timestamp: April 10, 2018, 03:56:08 pm
content: FPGAs are not available in DIP. Best bet is to buy a cheap development board that brings out a lot of the pins on easy to access 0.1 inch headers.Programing FPGAs is also a whole different manner. They do not execute code but are instead internally rewired to implement a logic function out of digital building blocks (Like logic gates but more advanced). As a result they are programed in special HDL languages that are basically text based representations of logic functions and flipflops and as such bares no similarities to usual programing languages like C, Basic, Python etc.

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 10, 2018, 04:24:53 pm
content: I dont understand how can you make a sinewave with gates ?

author: kony
author_rank: Regular Contributor
timestamp: April 10, 2018, 04:27:54 pm
content: NCO + LUT or CORDIC. Not all that different from how you would do it on MCU executing code really.

author: NorthGuy
author_rank: Super Contributor
timestamp: April 10, 2018, 04:36:05 pm
content: FPGA is a little bit of overkill, but it'll surely work rather easily, especially if you want to generate and mix gazillions of channels.FPGAs do not have DACs. Logic is pure digital. Thus you'll need to use external DACs. On the other hand, FPGAs are very fast, so you may be able to generate fast PWM and pass it through a low-pass filter to get a decent sound signal.Also, FPGAs are more expensive, they require multiple voltages, they don't have flash. So making an FPGA board is more difficult than MCU, but you can buy a ready-made one to start from.

author: james_s
author_rank: Super Contributor
timestamp: April 10, 2018, 04:38:39 pm
content: It's possible to implement most of the DAC in an FPGA, I routinely use a delta-sigma DAC which requires only an external low pass filter, just a resistor and capacitor.

author: Berni
author_rank: Super Contributor
timestamp: April 10, 2018, 04:42:38 pm
content: Yep as kony said an algorithm is used to generate the values for each sample in the sine wave. You can execute the algorithm in a MCU or you can build digital logic that calculates the same mathematical expressions using dedicated logic.The difference is that a MCU normally has only one ALU(Arithmetic Logic Unit). This is the pile of logic inside the CPU that actually does your mathematical calculations so the software in the MCU has to feed the algorithms calculations trough that ALU one operation at a time. On the other hand inside a FPGA one can build simpler versions of this same ALU that can only do one type of operation (Add, Subtract, Multiply etc) but then copy paste them so that multiple math operations in the algorithm can be calculated at the same time, each mini ALU working on its own part of the altogether in parallel. This essentially creates a so called "single purpose computer" with logic that is hardwired to run this specific algorythem.Because you can just keep copy pasting these and FPGAs can generally hold a lot of copies of these "single purpose computers" in one chip means that even a small FPGA could be doing 100x more math operations per second than a typical MCU and as such can run the algorithm that much faster.In the end the the MCU or FPGA send the data out to a DAC anyway and thats where the digital numbers finally become a analog sine wave.

author: JPortici
author_rank: Super Contributor
timestamp: April 10, 2018, 06:04:11 pm
content: Quote from: NorthGuy on April 10, 2018, 04:36:05 pmAaaah the HOAXhttps://github.com/heise/HOAXit was my understanding that he used a FPGA to model all 91 tonewheels in an hammond, vibrato scanner, plus some other logic to implement a leslie emulationbut i admit i never had a close look at the project

author: rhb
author_rank: Super Contributor
timestamp: April 10, 2018, 11:52:12 pm
content: I'm just getting started with FPGAs. It's a *lot* more complex than programming an MCU or writing DSP code for a workstation or supercomputer.As noted, the FPGA is overkill for audio, unless you want to synthesize a few dozen Leslies at once along with several Moogs. I suspect a BeagleBoard X15 would meet your needs with far less effort.However, if you want to play with FPGAs, I strongly recommend getting a MicroZed board. There is a staggering range of tutorials for it. There are cheaper boards, but the documentation is skimpy. Also the Zynq has a fast dual core ARM with NEON FPUs, so you can prototype on the ARM and then move the execution of CPU intensive portions to the FPGA.There is a *lot* more to it. So read about the Zynq for a few days.

author: james_s
author_rank: Super Contributor
timestamp: April 11, 2018, 12:36:56 am
content: I wouldn't necessarily say FPGA development is a lot more complex than writing software, rather it's a lot *different* and if you enter it with the attitude that you are writing software you are likely to have difficulty. FPGA "programming" is hardware development, learning to describe the hardware is actually relatively easy, but learning to design complex digital hardware is quite challenging, thus FPGA development is challenging. Stick with it though, as tricky as it is, it's also incredibly cool.

author: rhb
author_rank: Super Contributor
timestamp: April 11, 2018, 01:50:06 am
content: A fair statement. It certainly *not* more complex than the seismic processing codes I've written or worked on. But it's more complex in that there are all sorts of constraints that you don't face in pure software. And there are a *huge* number of new acronyms to learn.But it *is* very cool. I spent enough time in grad school that I expect to do most new things 3-4 times before I am done. My sole complaint is having to do chores.The only real obstacle is a an HP 8560A which came yesterday and an 8569A which will arrive in a month or two. Well, plus some LM399s and an HP 3478A. Oh, and some other toys ;-)

author: BrianHG
author_rank: Super Contributor
timestamp: April 11, 2018, 02:59:10 am
content: Quote from: JanJansen on April 10, 2018, 03:22:45 pmOnly use an FPGA if you wish to spend 6 months to a year learning how to work with one.You wont find a DIP FPGA, but, you will find development boards, with standard dual row 0.1" headers to all the IO pins. Some dev boards already have DACs and ADCs of different grades, some even designed for audio. Save you from wiring the bootprom, the crystal oscillator, voltage regulator, decoupling caps, and solves a bunch of beginner hardware aspects to ease your life.

author: lawrence11
author_rank: Frequent Contributor
timestamp: April 11, 2018, 03:58:05 am
content: DIP FPGA, now that is a good one.And people think my 2 layer BGA board is silly.

author: james_s
author_rank: Super Contributor
timestamp: April 11, 2018, 05:02:57 am
content: Well I guess there are PALs and GALs, they're an early relative of the FPGA and can occasionally be found in DIP packages.

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 11, 2018, 04:23:23 pm
content: Thanks for the reply`s all.I like to make my own dev board better then buying one, i will try with a DIP converter maybe if that is possible.I am looking at mouser, there are FPGAs from €1,24 to €30.098,92, very funny.If i buy some cheap chip is the software that is needed free to use and fully optimized ?

author: james_s
author_rank: Super Contributor
timestamp: April 11, 2018, 04:40:11 pm
content: The cheapest way to get started with FPGAs that I know of is with the EP2C5T144C8 "mini board" dev boards that you can buy for about US$14 from many Chinese sellers on ebay and other sites. These boards are cheaper than buying a bare FPGA and they are all ready to go. You will not be able to do anything with a DIP layout, they do not have enough pins.The software you use depends on the FPGA manufacture, Altera (Intel) Quartus II and Xilinx ISE are the two I'm familiar with and both have free versions with some minor limitations.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: April 11, 2018, 05:14:38 pm
content: If you find a 5V DIP FPGA let me know.

author: NorthGuy
author_rank: Super Contributor
timestamp: April 11, 2018, 06:22:04 pm
content: Quote from: JanJansen on April 11, 2018, 04:23:23 pmThis is, sort of, a DIP converter:https://store.digilentinc.com/cmod-a7-breadboardable-artix-7-fpga-module/The dev tool, called Vivado, has free support for most reasonably small FPGAs.

author: legacy
author_rank: Super Contributor
timestamp: April 11, 2018, 06:33:37 pm
content: Quote from: NivagSwerdna on April 11, 2018, 05:14:38 pmthere are SOM modules with Xilinx chip on it, plus level shifter. All of this in DIP a BIG 48pin package.But it's a chip, it's a SOM, and it's a bit priced.

author: legacy
author_rank: Super Contributor
timestamp: April 11, 2018, 06:38:13 pm
content: do you know, guys, any low-cost (<200Euro) fpga (Xilinx is my choice) with usb3343 onboard?

author: NiHaoMike
author_rank: Super Contributor
timestamp: April 12, 2018, 12:37:05 am
content: Quote from: legacy on April 11, 2018, 06:38:13 pmThere's a $100 Artix 7 35T board with FX3 USB 3.0 option on Ebay.

author: BrianHG
author_rank: Super Contributor
timestamp: April 12, 2018, 03:42:39 am
content: Why are you guys going for such overpriced FPGA boards. Here is a cheap one, and since it is overkill, if the OP ever decides to make his own board, he can use the smaller 12$ or 7$ Max 10 chip after prototyping with this dev board. No bootprom, only requires 1 single 3.3v supply and it's a simple QFP.https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=218&No=708

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 12, 2018, 11:43:55 am
content: There are also the Lattice breakout boards - approx $25 - MachXO2 and MachXO3.

author: mac.6
author_rank: Regular Contributor
timestamp: April 12, 2018, 03:01:11 pm
content: Do not rush on fpga dev board!First learn some HDL (verilog/vhdl, pick your poison), then simulate and test your design. All this is 0$.Once you have something that behave correctly on your testbench, select your fpga and synthesize.

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 12, 2018, 04:32:51 pm
content: Normally with flash MCUs they guarantee 40 years, after that the flash might be corrupted.How does this count for FPGA ?, are they staying good longer or do they also use flash for the programming ?Can you also reprogram FPGA 100.000 times like a flash MCU ?Can i pick any FPGA ?, they all do the same ?thanks

author: james_s
author_rank: Super Contributor
timestamp: April 12, 2018, 05:33:00 pm
content: Personally I find it far more interesting to play with real hardware then to just simulate the HDL. You don't need to spend a lot, one of my favorite beginner FPGA dev boards is very cheap. This is just one of many different sellers that have them:https://www.ebay.com/itm/ALTERA-FPGA-Cyslonell-EP2C5T144-Minimum-System-Learning-Development-Board/401255830236?Most FPGAs use an external configuration ROM to load the bitstream, so the life depends on the ROM used. I've never managed to wear one out though.

author: NorthGuy
author_rank: Super Contributor
timestamp: April 12, 2018, 05:44:06 pm
content: Quote from: JanJansen on April 12, 2018, 04:32:51 pmNo. FPGAs don't have flash at all. They must be configured (programmed) every time they power up. Most boards have flash chips to auto-configure the FPGA, but this is not necessary. While you work on your design, it is much easier to configure it from the PC through JTAG or an MCU. Dev tools can do it for you. Configuration takes few seconds, but that is nothing compare to compile times.Quote from: JanJansen on April 12, 2018, 04:32:51 pmIn a sense. There's less diversity in FPGAs than in MCUs, but there are differences. The biggest difference is in dev tools, which you can try before buying FPGAs. Many people use so called IPs n their designs - sort of programs which you can use (e.g. connect to the Ethernet, USB, memory etc.). The manufacturer may want big money for their IPs.

author: Berni
author_rank: Super Contributor
timestamp: April 12, 2018, 05:58:14 pm
content: FPGAs are pretty similar. They all have the basic functionality of implementing logic but they differ in the extra hardware that surrounds that logic. Like having faster IO pins, better PLLs to generate clocks, internal resources for doing math faster... all the way up to having DDR3 memory controllers and ARM CPUs built in.But the biggest difference is the manufacturer. If you buy a Altera chip you will ONLY be able to use the software from Altera. There is zero compatibility between vendors, so if you don't like the compiler, design tools, prebuilt modules etc from them then you have no other choice but to go to a different chip. There is no clear best brand here but generally Altera and Xilinx have the better software out there. On the other hand Lattice has the cheapest chips but there software is not that great.In any case just get a cheap dev board and have at it. But be prepared for a big learning experience, any knowledge of C or other programing languages is completely useless here. These languages might have If statements and loops but they work in a completely different way than they do in all other languages (Even tho they might seam they are the same at first).

author: dmills
author_rank: Super Contributor
timestamp: April 12, 2018, 08:23:22 pm
content: A nasty trap here is that Verilog looks kind of, sort of, like C, but is in fact nothing at all like C!The thing to remember is that FPGA fabric (if we ignore the special function stuff that varies by vendor) consists of only three things, small lookup tables, flipflops and programmable ways to hook these together. Generally there are also block memories and often some sort of ALU blocks, but details differ.Conditional expressions (that do not involve the clock) turn into logical multiplexers that then turn into suitably programmed LUTs, conditionals that involve clock edges turn into flipflops possibly with clock enables and maybe with a LUT tacked onto the input.Pure combinatoric logic turns into LUTs (not always in obvious ways), be careful with arithmetic here it can eat a LOT of LUTs and slow everything down, there is a reason for those vendor specific ALU blocks (You usually get anywhere from a dozen or so to a few thousand of these).Finally the other annoyingly vendor specific thing is clock generation, there are generally PLL like things that can be configured to do useful things.Now in addition to the HDL of choice there is another elephant in the room, the constraints file(s), these define such things as pin mappings and IO timing requirements and given a complex design can be a total can of worms.Now the big "Traps for young players":Inputs that are NOT synchronous with the clock (as well as anywhere you need to cross clock domains) suffer a risk of metastability, the cure is easy but you need to realise that you need to apply it.If there is any path thru combinatoric logic that does not set a signal value before it is used you will infer a latch, this is almost always an error.Clocks are a different class of thing from normal signals, and the tools will bitch bigtime (and fail to achieve timing closure) if you mix the two. It is fine to gate a flipflop using its clock enable input, but it should be clocked from a clock. This also applies to clock pins, you can maybe sort of get things to work using a non clock pin as a clock input, but try not to need to do it.Most FPGA logic clocks on the rising edge of the clock, don't try writing fall edge logic, it can be done, but you will sooner or later end up swearing.FPGA vendors write huge amounts of documentation, and all of it has extensive footnotes, **THE FOOTNOTES MATTER**. Altera, looking at you, turns out a cyclone V will not come out of reset if you don't power VBatt even if not using the key memory.... Oh how we laughed.

author: jmelson
author_rank: Super Contributor
timestamp: April 12, 2018, 08:35:00 pm
content: Quote from: NorthGuy on April 12, 2018, 05:44:06 pmWell, actually there are SOME that do. The Xilinx XC3SnnnAN series are identical to the XC3SnnnA except that a flash memory chip is added inside the package. This is the Spartan 3A series, a bit dated, but handy for this feature. The flash only adds a few $ to the price. The FPGA loads from the flash in a fraction of a second.Jon

author: asmi
author_rank: Super Contributor
timestamp: April 13, 2018, 12:00:40 am
content: Quote from: dmills on April 12, 2018, 08:23:22 pmI always look at how things are done on other commercially available devboards (most of them have publicly available schematics) - this helps to avoid these fine print issues.

author: Berni
author_rank: Super Contributor
timestamp: April 13, 2018, 05:26:50 am
content: Quote from: jmelson on April 12, 2018, 08:35:00 pmWell yes there are exceptions. Lattice has some with built in flash, Altera has there MAX series of CPLDs that are actually just FPGAs with the boot flash stuffed into it, but they can usually still boot from external memory if you tell them to do it. I meant to say that FPGAs don't contain flash inside the actual logic fabric like CPLDs do but is instead a separate block of memory that gets loaded in byte by byte on boot.Still id recommend just getting a FPGA dev board where all of this is already taken care of.

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 15, 2018, 02:24:40 pm
content: I seen Daves movie on youtube now also.I guess you can copy anyones design with reading the configuration pin sequence.

author: ogden
author_rank: Super Contributor
timestamp: April 15, 2018, 10:15:46 pm
content: Quote from: JanJansen on April 15, 2018, 02:24:40 pmYou can get only FPGA configuration bitstream which is far from design. In case one needs copy protection of their FPGA-based device, then there's solution:https://www.maximintegrated.com/en/app-notes/index.mvp/id/4594

author: asmi
author_rank: Super Contributor
timestamp: April 15, 2018, 11:39:29 pm
content: Quote from: ogden on April 15, 2018, 10:15:46 pmXilinx FPGAs have built-in support for bitstream encryption which makes cloning bitstream impossible. I suspect that other vendors' chips have similar functionality.

author: Berni
author_rank: Super Contributor
timestamp: April 16, 2018, 05:18:15 am
content: Yep most FPGA manufacturers give you the option of encrypted bitstreams where a unique ID inside the FPGA is used as part of the decryption key for his unique bitstream.This means that if you swapped out the FPGA on such a board the new FPGA would not boot because it will generate a different decryption key internally and will fail to decrypt the boot flash.

author: james_s
author_rank: Super Contributor
timestamp: April 16, 2018, 04:12:31 pm
content: Not that it really matters here, a beginner or hobbyist is not going to care about encrypting their bitstream.

author: ogden
author_rank: Super Contributor
timestamp: April 16, 2018, 04:29:20 pm
content: Quote from: james_s on April 16, 2018, 04:12:31 pmAnyway information about FPGA bitstream protection is much more relevant than you commentAfter all - you never know when your knowledge will be useful as well as you never know which beginner will become professional.

author: james_s
author_rank: Super Contributor
timestamp: April 16, 2018, 08:57:21 pm
content: My point was simply that encryption is not something to worry about in the beginning, there are enough other hurdles to keep a beginner busy, encryption is not difficult to grasp later on if/when one needs it.

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 17, 2018, 10:14:31 am
content: All together it sounds really fun.It should be really simple once you get the clue ?, just very verbose, i feel i have some talent for these things.Developing blocks and copying them later without worrys, just like programming, once you spend time you get things ready for use.Only thing is if i start SMD soldering i have more normal chips to buy wich they dont have in DIP.I should install the software and emulator, maybe i dont need the dev board at all ?, not that 16 dollar is to much for me, only i have so many garbage already.What would be the normal applications for FPGA ?, like they say it is overkill for a synthesizer, i want a polyfonic synthesizer so i need more power.

author: Berni
author_rank: Super Contributor
timestamp: April 17, 2018, 11:43:32 am
content: Usually the FPGA development tools give you some form of simulator along with them. This is because often things are first run inside the simulator to test and debug them since troubleshooting a non working design while its running inside a real FPGA chip is difficult (It can't be stopped like a CPU hitting a breakpoint and its difficult to see whats happening inside)I wouldn't say a big audio synthesizer is overkill to implement in a FPGA. But it does sound like something that could likely be done in a fast ARM CPU like a Raspberry Pi 3 or similar.Tasks that a FPGA does can vary a lot, but usually a FPGA is used when you can't get an off the shelf chip to do what you need (often involving high speed). A common simple task for a small FPGA is adapting a fast interface bus into a different bus. For example turn a serial MIPI video bus into a standard parallel RGB video bus, while converting 24bit color to 18bit color with dither. Very little logic is required to do that and it doesn't even need to hold a full frame of video in memory, it can be done in a <10$ FPGA chip. There is no serious processing going on but the FPGA allows interfacing to that fast MIPI bus that might be moving its pins at 500MHzOn the other extreme are applications that require a great deal of processing power and move tons of data around. For example something like a military phased array radar system. The thing might have 1000 antennas each getting demodulated into an IQ signal sampled at 10s or 100s of MSPS, summing it up that's 100s of GB/s of data coming in. All of that data then has to be munched trough in some way like FFT done, correlated, further demodulated etc. In there you might find a $5000 FPGA chip and not one of them but an array of 10 to 100 of such chips to get enough processing power or data throughput.As a middle between the two a FPGA might be used in a digital oscilloscope to grab data from the very fast ADC, stuff it into RAM and then generate a waveform picture from the data.

author: NivagSwerdna
author_rank: Super Contributor
timestamp: April 17, 2018, 12:16:16 pm
content: Quote from: JanJansen on April 17, 2018, 10:14:31 amFPGAs are becoming very cheap and accessible and this trend will probably continue. The learning curve is steep but it could fit your application if you have the time to dedicate to it. Poly-anything suits FPGAs well... you can use parallelism in hardware.Have fun!

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 17, 2018, 02:07:19 pm
content: Quote from: Berni on April 17, 2018, 11:43:32 amThat is a nice one i have to remember, i,m always curious how these fast scopes works, now i have to re-watch those teardown videos.

author: JPortici
author_rank: Super Contributor
timestamp: April 17, 2018, 02:17:36 pm
content: Quote from: Berni on April 17, 2018, 11:43:32 ama couple of years ago roland launched the aira series, all of which use one or more roland-labelled FPGAs (probably just relabelled parts) to create next-level virtual analog synthesizers, they called that ACB (Analog circuit behaviour)makes sense to perform many of the calculations in parallel

author: asmi
author_rank: Super Contributor
timestamp: April 17, 2018, 03:07:52 pm
content: Quote from: JanJansen on April 17, 2018, 10:14:31 amFPGA is the closest you can get to designing your very own custom chip without having to spend millions of $$. So any digital circuit you can think of can be implemented inside FPGA provided that the chip you have on a board has enough resources. That said, this ultimate flexibility comes at a price, both literally (FPGAs are some of the most expensive chips out there, there are FPGAs that costs $100k+ for a single chip!) and figuratively (development tools are necessarily very complex and hard to get a grip on).

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 17, 2018, 04:38:24 pm
content: Quote from: JPortici on April 17, 2018, 02:17:36 pmAh nice to know, i havent had my hands on any aira synth, i hear from people the ACB sound really good compared to any other brand virtual analog.Now i see how they made the ACB, its not magic after all.Ok if this is the case that roland uses this for the ACB, then i definitly need to get started with this.Aira also runs at 96K audio rate, very good, maybe i could have 192K how nice.

author: dmills
author_rank: Super Contributor
timestamp: April 17, 2018, 07:26:18 pm
content: I hope you are **GOOD** at fixed point maths (And Z plane shenanigans generally)!I would bet that a whole lot of that Roland thing is extensively multi rate, good non linearity normally needs a lot more then twice Nyquest.I would probably start by getting my algorithms to run on a PC CPU possibly in matlab (They do not need to run in realtime here, have them write .wav files if need be), then graphics card, then see about an FPGA.The graphics card, if you design your approach with an eye to ending up on an FPGA is a nice halfway step and it has a compile time a tiny fraction of that of an FPGA place and route.This also lets you build test vectors that you can then use in your testbenches to verify the FPGA in simulation.Regards, Dan.

author: hamster_nz
author_rank: Super Contributor
timestamp: April 17, 2018, 09:37:19 pm
content: If you were to ask me, here would be my rough plan for your first FPGA experiments.It is a design of two halves - one half being the MIDI side, the other half being the audio side. They can be built independently and integrated as needed.This link message will help with MIDI messages :https://www.midi.org/specifications/item/table-1-summary-of-midi-messageYou could use a basic FPGA board from Ali Express, but I would suggest you get an entry level FPGA board from Terasic or Digilent, along with a compatible I2S DAC addon.Anyway, on with the design:MIDI control(can be done independently)- Build the H/W side of the MIDI interface (Just an optoisolator with a pullup IIRC)- Build an FPGA component to receive MIDI and display the message on the devboard LEDs.- Enhance it to receive MIDI, filter channels, and display the message on LEDs.- Enhance it to act on key down/key up message, and turn the LEDs into a display of active notes.The audio design is where most of the work is needed.First audio design- Create an square wave oscillator (maybe tuned to A 440Hz)- Attach it to an amp/speaker somehow - e.g resistor divider and and cap to block DC. Or maybe a R2R ladder if you want to get fancy.- Create some way to switch it off and on, maybe use a button on the dev board- If you have the MIDI control block, attach it to the signal on the control block that turns on when the 'A' note on MIDI message is received.You can now play an 'A' note over MIDI or using a button.Adding an cheap DAC- Create a cheap and cheerfull one-bit DAC in the FPGA- Change the oscillator to a DDS Sine wave, rather than a square wave.- Sort out your understanding of signed vs unsigned samples, so it sounds like a sine wave- Now play an 'A' as a sine wave.- Maybe add options for more waveforms via switches.Going polyphonic (one octave)- Create 11 more copies of the oscillator, tuned to different notes of an octave.- Wire each to the control section (or buttons if you haven't got that far).- Add a simple (sum all channels) mixer, to mix the values heading into the DACAdding envelopes- Create a timer for each channel- Have it mute the note after a short period of time, or when MIDI note off is seen- You can now play 'beep' 'beep' 'beep'- Use the timer counter to index an envelope, and use that to multiply the oscillator output before going to the mixer- You should now have something vaguely musical.Add an I2S DAC- Create an I2S transmitter- Redesign your design to get the clocking friendly with I2S- Have a reasonable high quality outputIf you get this far, then you should have enough FPGA skills and experience to make useful judgement for your next synth project. One that actually is properly designed from the outset - e.g. rather than having an oscillator for each note you time-slice the logic between channels.You can also look at adding DSP effects (e.g. reverb), to make it sound better.Allow about a month of dedicated hobby time (maybe a 60-100hr project if you haven't touched HDL before).

author: alexanderbrevig
author_rank: Frequent Contributor
timestamp: April 17, 2018, 10:27:37 pm
content: Replying for interest to get updates and to say that hamster_nz should be nominated for a "Best EEVBlog answer" award!

author: hamster_nz
author_rank: Super Contributor
timestamp: April 17, 2018, 10:41:42 pm
content: Quote from: JanJansen on April 10, 2018, 04:24:53 pmIn a software way...Code:static unsigned int index; // Where we are in the lookup table, * 2^22static unsigned int dds_step; // How far we advance the index each cyclestatic short int lookup_table = {... sine values ... };void update_sine(void){dac_set_output(lookup_table[index>>22]);index += dds_step;}Converted to H/W that looks like a 32-bit accumulator to hold "index", a 1024 entry 16-bit memory block to hold "lookup_table", and an adder to add 'dds_step' to 'index'.By changing the value of 'dds_step' you change how quickly you advance through the lookup table, and hence the frequency of the sine wave coming out of the DAC.

author: Berni
author_rank: Super Contributor
timestamp: April 18, 2018, 05:15:10 am
content: That reply from hamster_nz sums it up nicely. You want to work up to the final design in incremental steps so you have something that works most of the time and when it stops working you can have a easier time pinpointing what broke.I wouldn't say running it using CUDA or similar GPU acceleration would help translating the design to a FPGA since the two work fairly differently. And you can get pretty quick compile times inside of HDL simulators. They also do incremental compiles so a small change in one module would just take a second to compile. Tho the simulation part might take a bit of time if you wanted to run the FPGA for long enough to actually get audio to listen to out of it since it. Usualy you only run the FPGA for a few 1000 clock cycles jsut to test the functionality of the design and that's pretty much instant on a modern PC.

author: asmi
author_rank: Super Contributor
timestamp: April 18, 2018, 12:01:22 pm
content: Another good thing to try is High Level Synthesis (like Vivado HLS). It allows you to develop your code in C/C++ and then run it through the tool so it would generate HDL code for the IP core that performs your algorithm. For data processing algorithms this is not a bad approach, but you've got to know how to wire up that core (typically data processing algorithms use AXI Stream interface to accept data points one at a time).

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 18, 2018, 02:02:26 pm
content: Quote from: asmi on April 18, 2018, 12:01:22 pmA C code to FPGA code converter application ?, how nice, its all i need, how good is it ?

author: JanJansen
author_rank: Frequent Contributor
timestamp: April 18, 2018, 02:06:03 pm
content: Quote from: hamster_nz on April 17, 2018, 10:41:42 pmThis code looks like normal microcontroller C code.I made a few synthesizers already.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 18, 2018, 02:10:34 pm
content: To use look-up tables properly for signal synthesis, you should use fractional indices and some kind of interpolation (at least cubic in my experience) to get decent audio quality.Note that there are other ways of generatiing basic waveforms such as sine/triangle that are iterative, don't need look-up tables and will get you less distortion (unless of course you can use huge look-up tables).

author: daveshah
author_rank: Unknown
timestamp: April 18, 2018, 02:48:40 pm
content: At some point going into FPGA development it may be worth looking into formal verification, which once you get your ahead around can be easier and quicker (and of course safer) than simulation. Yosys is free and open source and the SymbiYosys tool makes the formal verification flow very easy. The only caveat is currently only Verilog is supported (without the third party Verific frontend).Dan Gisselquist of ZipCPU has an excellent blog where he introduces formal verification using Yosys with real world examples:http://zipcpu.com

author: asmi
author_rank: Super Contributor
timestamp: April 18, 2018, 03:40:47 pm
content: Quote from: JanJansen on April 18, 2018, 02:02:26 pmCheck out Vivado HLS. There are few restrictions on the code - most important are no dynamic memory allocations and no I/O (both file IO and console) are allowed, but other than that just about any code is good enough. Google for "UG902 - Vivado Design Suite User Guide: High-Level Synthesis" if you want to know more (be prepared for a long read!).

author: Berni
author_rank: Super Contributor
timestamp: April 18, 2018, 04:19:22 pm
content: Yeah there are some tools that allows you to covert C code into running on a FPGA, but this does NOT remove the need to know a HDL language and general FPGA workflows.The C code that you put in has to be written with the FPGA in mind and needs some knowledge on how the whole thing works. Otherwise you can end up filling a giant FPGA completely full using just a few lines of code or have code that runs a lot slower than it should.What these C code converter tools are useful for is when the FPGA needs to be programed to do a very complex task as they essentially provide an extra layer of abstraction. Very useful for things like hardware video decoders/encoders that are already complicated to understand in C code. But if you are able to break your problem down into a bunch of D flipflops and computational logic then its easier and more efficient to simply express it in the actual HDL language.Lucky for you that a lot of audio DSP operations are mostly just putting the samples trough some math equations in a certain order and this is easy to convert into HDL code. That is provided you can get the math to work with fixed point numbers since floating point is not very FPGA friendly due to the complex logic needed to do math with it. Since these things are often used for DSP work means that a lot of FPGA vendors might have some ready to go modules of common DSP functions. These might be things like FIR and IIR filters, NCO signal generators, upsamplers/downsamplers, FFT etc...Also FPGAs are not always better than CPUs. They are a bit like GPUs in a PC where they are great at doing a simple(but possibly also very long) task over and over on a lot of data. While they are not very good at complex tasks that involve making a lot of decisions and taking different routes trough the procedure all the time. As an example a FPGA can implement a SD card interface pretty nicely where you can give it commands like "Write 0x55 0x45 0x45... to sector 465", it has to do the same thing every time to execute that. But if you wanted to do something like "Append decimal 1234 onto file log.csv" then you are going to have a hell of a time teaching a FPGA to do it and use a lot of resources(Both inside the chip and in hours of your work). Such a task involves first finding the FAT32 filesystem on the card, then navigating to the directory, then finding the log.csv in a file table, allocating a new sector to that file, writing the data to that sector, updating the file table entry and finally closing the file. This is very easy to do with a CPU however so in such a case you would be best off to include one in the design where the "Write sector" functionality would be left in the FPGA while the filesystem is handled by the CPU that gives commands to the FPGA on what sectors to read and write. In this case you use a external microcontroler that's connected to the FPGA over some sort of bus or you build a softcore CPU inside the FPGA(Some FPGAs even have built in CPUs) and run compiled C code on that.One neat trick when using an external MCU/CPU with a FPGA is to use a MCU that has support for external SRAM memory (A lot of decent ARM MCUs have this). If you connect these external memory pins to the FPGA then you can have the FPGA act like its a SRAM chip, except that these memory locations are actually reading/writing to hardware registers inside the FPGA. As a result you can build peripherals inside the FPGA and memory map them into the MCU so that they are used just like the built in peripherals. This makes the FPGA sort of like a south bridge in a PC or a sort of coprocessor.

author: asmi
author_rank: Super Contributor
timestamp: April 18, 2018, 05:31:12 pm
content: Quote from: Berni on April 18, 2018, 04:19:22 pmIt's the same thing with a regular C code. Unless you know what you're doing, you can write horrendously inefficient C code just as well. Which is why I've referenced a user guide for HLS which describes how to write C code to achieve best results. One thing I like about HLS is that it allows to effortlessly pipeline your processing to increase throughput at expense of more resources used. All it takes is a single #pragma directive in the code.

author: james_s
author_rank: Super Contributor
timestamp: April 18, 2018, 06:18:13 pm
content: Why not just write the HDL directly in the first place? Trying to shoehorn C in there seems like an extra step and a waste of time.

author: asmi
author_rank: Super Contributor
timestamp: April 18, 2018, 06:34:15 pm
content: Quote from: james_s on April 18, 2018, 06:18:13 pmBecause it'smucheasier to develop your data-processing algorithm in C as you can use regular debugger to debug the code to confirm it's doing what it needs to do using regular C toolset and a testbench written in C. And then you can do a co-simulation of generated HDL code against your C code testbench to confirm that generated code works just as well. Just try it out and you will see the benefits yourself! There is nothing to "shoehorn" and there are no extra steps. I take C programming over HDL code any day!

author: ogden
author_rank: Super Contributor
timestamp: April 18, 2018, 07:36:18 pm
content: Quote from: asmi on April 18, 2018, 06:34:15 pmMatlab is way better tool than plain C toolset, especially if your HDL project is signal processing.

author: asmi
author_rank: Super Contributor
timestamp: April 18, 2018, 07:38:24 pm
content: Quote from: ogden on April 18, 2018, 07:36:18 pmAs long as you already know it and got the money to buy a license. While learning C is free and much more useful in the long run

author: hamster_nz
author_rank: Super Contributor
timestamp: April 18, 2018, 09:09:14 pm
content: Oh, I remembered that there was a video of my Music Box project on YouTube. It doesn't have MIDI, but it does play a tune (skip towards the end).All of the HDL is here:http://hamsterworks.co.nz/mediawiki/index.php/Synth_Envelope