CP2102, tolerance to voltage on I/O pins when not powered? - Page 1
Forum section: electronics / projects

author: thinkfat
author_rank: Unknown
timestamp: April 02, 2022, 08:44:40 am
content: Hi,I'm designing a application specific PCB with an ESP32-C3-MINI module. It is battery powered and uses the TI BQ25015 as a charger and power supply for the ESP32. I want to add a CP2102 USB-Serial bridge like on the original DevKit to make software development and debugging easier.To save battery power, I want the CP2102 only be powered when USB is connected. However, when USB is disconnected, the ESP32 module would of course be active and there would be voltage applied to the UART side of the CP2102.The datasheet says the inputs are tolerant to 5.8V regardless of the chip being powered or not. But nothing is said about whether this is a valid operating condition and how much current would be going back into the chip from the I/O pins.Does anyone have any experience with this?PS: The datasheet specifies a leakage current for the I/O pins, but again doesn't specify the operating conditions under which those numbers are valid.

author: fchk
author_rank: Frequent Contributor
timestamp: April 04, 2022, 11:35:43 am
content: Unless explicitely specified otherwise, all digital circuits can only accept voltages between 0V and the supply voltage (with a +- 0.3V tolerance). If the chip is unpowered, supply voltage is 0V, and so the chip must not have any voltage at its io pins. There is a risk of powering the chip through the protection diodes, which may fail then.There are circuits like 74LVC-T dual voltage level shifters that allow partial powering. You may also use 1k series resistors to limit the current through the protection diodes.fchk

author: Ian.M
author_rank: Super Contributor
timestamp: April 04, 2022, 12:01:40 pm
content: Why not simply either drive ESP32 I/Os configured as outputs connected to the CP2102 low, or set them as inputs with external pulldown resistors, whenever the CP2102 is not powered? A simple potential divider from USB Vbus to an ESP32 I/O pin lets you monitor its power status.

author: Peabody
author_rank: Super Contributor
timestamp: April 04, 2022, 02:13:37 pm
content: I can confirm that the CP2102 behaves badly when powered down. Not sure about the new CP2102N, but it's probably the same. All of the pins will sink significant current when the chip is powered down. You can test this by connecting a 5V source to Tx, Rx, DTR, or whatever, through a resistor, and see how much current flows. As I recall, I ended up with zero ohms as the resistor, and the sink current was something like 13mA. But it's been a long time, so you should test it yourself.So one solution is to make sure that anything connected to the CP2102 is low when USB is not connected. Another option is to use a buffer chip that goes hi-Z when powered down. See the circuit below. Some of the circuit may not be relevant since it involves flashing new firmware to an MSP430 through USB, and allowing the CP2102 to power the processor when that's going on.As I remember, this powered-down behavior is the same for the other popular USB-UART chips.

author: thinkfat
author_rank: Unknown
timestamp: April 04, 2022, 02:38:49 pm
content: OK, thanks for the responses. Another option is to have the CP2102 be powered from the main 3.3V rail and hope its power consumption is not going overboard when no USB is connected. This is the configuration used on the ESP32-C3-DevKit. I've added a couple of resistor footprints to activate either configuration.

author: thinkfat
author_rank: Unknown
timestamp: April 13, 2022, 06:32:55 am
content: Alright, I had a few prototype PCBs made and the result is not as dramatic regarding the CP2102 as I had feared. With just some 10 Ohm resistors placed in the UART lines and the CP2102 configured for bus-powered operation, I don't see much current drawn by the CP2102 when it's powered down. The voltage drop across any of the resistors is sub 100µV, so, practically nothing.However, there is of course the case that the ESP32 is powered down while the CP2102 is up because the device is charging from USB. Then, the CP2102 is back-powering the ESP32 through the UART lines - not recommended, either.So, I want to put some isolation in between and I found a 74VHCT126AFT that seems to be good for the purpose. But I'm unsure how to connect it. I could power it either from the main 3.3V power rail that is driven by the BQ25015, or from the 3.3V regulator of the CP2102. Also, where to connect the enable signal of the buffers?It seems that the buffers are safe to be driven when the chip is not powered. So, I could power the chip from the CP2102 internal regulator. It would be powered down when USB is not connected. The buffer enable could then come from the main 3.3V rail, so the buffers would be enabled only when both power rails are present, i.e. ESP32 and CP2102 both powered.Or, I could wire it the other way around, powering the buffers from the main 3.3V rail and connecting the enable pins to the CP2102 regulator output.If anyone has an idea about that, I'd appreciate the input.

author: Ian.M
author_rank: Super Contributor
timestamp: April 13, 2022, 07:27:24 am
content: To prevent the I/O pins back-powering the ESP32, why not simply ensure the ESP32 is powered normally whenever USB is connected, but put it in an appropriate sleep mode, probably deep sleep mode, but possibly hibernate to minimize power consumption, and effectively 'switch it off'.

author: thinkfat
author_rank: Unknown
timestamp: April 13, 2022, 07:41:59 am
content: That might work most of the time, but the BQ25015 cannot run its DCDC converter when the battery is very, very low and it has to do a pre-charge. The DCDC is just a buck converter that is directly fed by the battery, so when it's input voltage is lower than a certain threshold, TI "recommends" to disable it. Which makes sense, if the battery is drained, the tiny precharge current likely cannot charge the battery and power the device at the same time. So, I have a circuit that disables the DCDC in precharge mode.

author: Gyro
author_rank: Super Contributor
timestamp: April 13, 2022, 08:22:02 am
content: Quote from: Peabody on April 04, 2022, 02:13:37 pmI wouldn't call that behaving badly. I'd call it normal behaviour of any CMOS logic IC when unpowered. They have input protection diodes that shunt input current to the supply rail (or internal regulator). If you check the datasheet, I think you will find that 13mA exceeds the Absolute Maximum specs for the chip. The simple, if a little dirty way of handling it is by inserting an appropriately sized (eg. 4k7 if you are dealing with 5V logic) close to the pins, to limit the current to a safe value.

author: Ian.M
author_rank: Super Contributor
timestamp: April 13, 2022, 08:50:07 am
content: Quote from: thinkfat on April 13, 2022, 07:41:59 amIn that case, I *think* you can simply hold the CP2102 in reset during Bq25015 precharge mode to disable its TXD pin output (and other output pins). There will still be *some* parasitic power current available as its I/O pins have weak pullups active during POR so you may need a 10K pulldown (as recommended for /SUSPEND) on TXD and any other outputs going to your MCU.Seehttps://community.silabs.com/s/article/cp210x-cp211x-pin-states

author: tooki
author_rank: Super Contributor
timestamp: April 13, 2022, 05:26:03 pm
content: Quote from: thinkfat on April 04, 2022, 02:38:49 pmI’ve done this and can confirm it works, just like on the dev kit C. (Provided the PCB layout is good; bad USB routing will cause it to fail.) I haven’t bothered trying to confirm it, but it should only be drawing a fraction of a mA in this situation.But just to emphasize something since it’s not obvious and people often confuse them: the CP2102 and CP2102N are not exactly the same chip.You need to use the CP2102N. (The N version has GPIOs the non-N version doesn’t have, and some of those are used for configuring the ESP32 to accept programming.)Edit: I double checked, and I think you can use the old version. I thought it used GPIOs (which the old version doesn’t have) to trigger the EN and IO0 control lines, but it uses the DTR and RTS (hardware flow control) lines.

author: tooki
author_rank: Super Contributor
timestamp: April 13, 2022, 05:26:56 pm
content: Quote from: Ian.M on April 13, 2022, 08:50:07 amBy the datasheet, it seems to me it’d usemorepower when held in reset.

author: Ian.M
author_rank: Super Contributor
timestamp: April 13, 2022, 06:58:40 pm
content: The CP2102 datasheet doesn't specify its 'held in reset' supply current. The CP2102Ndatasheet does: Typ. 1.3mA, which is an order of magnitude *LESS* than it normal operating current. Neither are a concern if my suggestion of holding it in reset is used, as the CP2102(N) is powered from USB Vbus, not from the battery via the BQ25015.

author: tooki
author_rank: Super Contributor
timestamp: April 13, 2022, 10:21:04 pm
content: Quote from: Ian.M on April 13, 2022, 06:58:40 pmYeah, I’m talking about the ‘02N, as I made clear in the prior reply,since the N is needed for the ESP32.Edit: I double checked, and I think you can use the old version. I thought it used GPIOs (which the old version doesn’t have) to trigger the EN and IO0 control lines, but it uses the DTR and RTS (hardware flow control) lines.Anyhow, the entire issue here isn’t the situation when USB is connected, which is what the “normal operating current” describes (the two loads shown are for differentcontinuousdata rates). But this entire thread is about when USB isnotconnected, and thus there will not be any data transmission. So USB suspend is what would matter, and the “held in reset” current is much higher than the suspend current.

author: thinkfat
author_rank: Unknown
timestamp: April 13, 2022, 10:24:51 pm
content: I'm using a CP2102-GMR, for the simple reason that it is in JLCPCBs "Basic Part" category, while any of the CP2102N are "Extended Parts" and more costly.Why would i need a CP2102N for the ESP32?

author: Ian.M
author_rank: Super Contributor
timestamp: April 13, 2022, 10:32:52 pm
content: Quote from: tooki on April 13, 2022, 10:21:04 pmThat was the primary concern, for which I suggested the ESP32 detecting lack of Vbus and shutting off its TX output, so it didn't back-power the unpowered CP2102 (bus powered when USB connected) but Thinkfat then raised a secondary concern of the CP2102 back-powering the ESP32 if that's shut off but the device is charging from USB, hence my suggestion to hold the CP2102 in reset if the ESP32 is powered down. If a 74LVC1G06 or 74LVC1G07 (depending on what shut-off signal is available for the 3.3V rail) powered direct from the battery is used to drive the CP2102 reset pin, the additional current consumption with both the CP2102 and ESP32 powered down should be a fraction of a uA.

author: tooki
author_rank: Super Contributor
timestamp: April 13, 2022, 10:33:48 pm
content: Quote from: thinkfat on April 13, 2022, 10:24:51 pmOK, I double checked, and I think you can use the old version. I thought it used GPIOs (which the old version doesn’t have) to trigger the EN and IO0 control lines, but it uses the DTR and RTS (hardware flow control) lines. But given that the N version has better-defined characteristics in precisely the thing you’re worried about (behavior when not running), it seems stupid to me to use the old version.

author: thinkfat
author_rank: Unknown
timestamp: April 14, 2022, 06:14:19 am
content: That's right. I'll think about it.

author: thinkfat
author_rank: Unknown
timestamp: April 15, 2022, 02:37:05 pm
content: Okay, I think a good solution will be to use the CP2102N and wire it up in self-powered configuration. The idle current with no USB plugged is small enough to not impact the battery life of my device. Regarding the total BOM cost - The CP2102N in QFN20 package is only 10 cent more expensive than the ancient CP2102-GMR and I will not need the Toshiba isolation buffer. All in all it costs less. Since I don't need the GPIOs or charger control, the smallest package is enough.This should cover the two cases I was worried about: The CP2102N will only be powered when the ESP32 is also on, no problem with any back-powering through I/O lines. When the main 3.3V rail is off and a USB charger is connected, the CP2102N will be connected to VBUS only through a voltage divider, which will limit the amount of current going into the CP2102N. This case is even mentioned in the datasheet.Thanks to all for the contributions.