4-layer stackup options - Page 1
Forum section: electronics / beginners

author: jrs45
author_rank: Regular Contributor
timestamp: February 20, 2020, 03:08:42 pm
content: I've been reading about PCB stackups, and for four layer boards, there are usually two popular options (bottom to top):Signal - power - GND - signalGND - signal/power - signal/power - GNDI've typically used the first one, it seems to be the most popular (and having access to traces is handy for bodging).The second one, with GND planes shielding the signals makes a lot of sense, since when peppering it with grounded vias you can make a pretty good faraday cage around the inner signal/power layers.But doesn't the large number of non-GND vias break up these ground planes significantly? You'd need one for just about every pin connection, so it seems that a large amount of the ground plane(s) will be broken up like crazy, at least when you have a dense board (as many do). And these vias travel through all layers, interfering with optimal routing.Just wondering what people thought of this.

author: thinkfat
author_rank: Unknown
timestamp: February 20, 2020, 03:39:06 pm
content: I thought the most popular stack up was signal gnd power/signal signal. To be able to route controlled impedance traces on the top layer.

author: jrs45
author_rank: Regular Contributor
timestamp: February 20, 2020, 06:09:24 pm
content: Quote from: thinkfat on February 20, 2020, 03:39:06 pmThat's what I wrote, I just wrote from bottom to top.

author: Neilm
author_rank: Super Contributor
timestamp: February 21, 2020, 05:02:26 pm
content: I would not put a plane on the outer layers - it would make routing the board hell. The ICs and components will make a mess of the plane. If you have any high frequency they will become very small slot antenne.Also, the two planes close together will act like a capacitor giving you some high frequency decoupling.

author: jrs45
author_rank: Regular Contributor
timestamp: February 22, 2020, 03:46:42 pm
content: Quote from: Neilm on February 21, 2020, 05:02:26 pmThat's what I was thinking, but it was surprising to see it so widely advocated I figured I was missing something. Having the outer layers as shields does make sense, until you realize how much these are broken up by components and vias that will be basically everywhere.

author: KaneTW
author_rank: Frequent Contributor
timestamp: February 22, 2020, 05:10:43 pm
content: http://www.hottconsultants.com/techtips/pcb-stack-up-2.htmlhas an evaluation of different stackups.

author: jrs45
author_rank: Regular Contributor
timestamp: February 24, 2020, 03:32:15 pm
content: Quote from: KaneTW on February 22, 2020, 05:10:43 pmThanks. That page is an example of possible oversight of the implications of the GND-sig-sig-GND stackup, as in their Figure 3b. They call it the "best possible" but I am skeptical of this, because they didn't seem to consider the implications of breaking up the planes so aggressively with the components and vias that are required for basically every pin.This is Henry Ott, though, so he's not one to argue with, but I still don't see how the outer GND layers are all that effective for EMC or coupling when they're full of parts/holes.

author: KaneTW
author_rank: Frequent Contributor
timestamp: February 24, 2020, 07:31:00 pm
content: I think the idea is to have the holes be minimal (i.e. basically just a via directly next to the pad), which should provide minimum EMI area. Of course, that doesn't really work for circuits where even a couple mm slot is a strong radiator. But it should work well with anything non-RF.