ECP5 JTAG flashing with ft2232 does not work - Page 1
Forum section: electronics / general

author: DocRaptor
author_rank: Contributor
timestamp: April 17, 2022, 03:27:10 pm
content: Hello,I have a problem with an Lattice ECP5 on a custom board. I want to flash it (for the first time) with a ft2232 breakout-board from elv. I made a very simple test-"programm", just an or connected to three pins, just to test if the design works. When I choose to verify the fpga, I get following output (I also needed to pick the fpga, it did not auto detected the fpga):INFO - Cable Auto Detection Activated.INFO - Board with FTDI USB Host Chip detected.INFO - No Lattice HW-USBN-2A cable detected.INFO - No Lattice HW-DLN-3C (parallel) cable detected.INFO - Multiple cables were detected.Starting: "pgr_program set -cable "Starting: "pgr_program run"INFO - Check configuration setup: Start.Device#1 LFE5U-85F: Failed to verify the ID(Expected: 0x41113043 Read: 0xFC000803).ERROR - Check configuration setup: Unsuccessful.ERROR: pgr_program failed.ERROR - Programming failed.In the error-tab is shown:85021025 ERROR - Check configuration setup: Unsuccessful.2340014 ERROR - Programming failed.And programming fails too.Did something wrong in my design or in diamond (or or somewhere else)?I attach the schematic of my board.

author: mon2
author_rank: Frequent Contributor
timestamp: April 17, 2022, 04:42:52 pm
content: In your programmer s/w, you should see 2 USB functions.The default function is not working for you as the programmer -> use the pull-down menu to select the 2nd USB function and test again.Lattice uses the same FTDI controllers for their tools and know that it works fine for at least the ICE40UL1K programming. Your issue is very likely the above.

author: DocRaptor
author_rank: Contributor
timestamp: April 18, 2022, 10:54:37 am
content: Do you mean under "Cable Setting"?

author: mon2
author_rank: Frequent Contributor
timestamp: April 18, 2022, 12:46:07 pm
content: Yes -> Port -> select the 2nd port in this drop down and test again.

author: DocRaptor
author_rank: Contributor
timestamp: April 18, 2022, 05:38:48 pm
content: I set in Port from FTUSB-0 to FTUSB-1. It didn't worked. I hocked everything on port B on the FT2232 Board and tested it again. Set the Port in Diamond to FTUSB-0, after it failed to FTUSB-1. It always fails. The difference is: Wired everything to Port A on the FT2232 Board the device ID shown in the console is 0xFC000803, with the three other combinations it is 0xFFFFFFFF.Is there a way to bypass this device ID check, so that the error comes up, it tries to flash it anyway?

author: mon2
author_rank: Frequent Contributor
timestamp: April 19, 2022, 11:31:30 am
content: Post your FTDI to Lattice pinout / wiring. The JTAG is a state machine interface that must extract the expected ID out of your FPGA by the tool chain to validate it is the proper selected part. You can try to use a slower bus speed from the same cable settings menu. That is, the transactions will be done at a slower rate but should still work.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 19, 2022, 04:53:28 pm
content: We need to see your wiring indeed.Another thought is that the FTDI chip may need to be configured (using FT_Prog). I remember a discussion, some people thinking that JTAG could be used with those chips with the default config, others (myself included) thinking they may need to be configured. Not 100% this is required, but that's what I've done and it worked. I posted the configuration file some time ago, but I can't find the thread anymore, so I'll attach it to this post. Worth a try. (I put the FT_Prog XML config file in a zip archive because the forum doesn't accept XML extensions, so extract it first.)Another option for programming the ECP5 is to use ECPDAP. It works pretty well, but requires a CMSIS DAP probe instead. If you have that around.https://github.com/adamgreig/ecpdapThere's another open-source program for that, supporting FTDI chips:https://github.com/gregdavill/ecpprog

author: DocRaptor
author_rank: Contributor
timestamp: April 19, 2022, 07:35:47 pm
content: I wired the FT2232 as followed:TDO AD2TCK AD0TDI AD1TMS AD3GND GND5V USB 5V Power of my BoardI tried to set diverent Clock divider. Everytime it is 0xFC000803 , except 0, than it is random everytime.I also set the FT2232 up with the config file from SiliconWizard (thanks), but still the verification fails. Whats weird, now the IDs starts to change with the Clock set above around 6, but not as random. When I check the ID multiple times, it stays the same for a couple of readouts, than it change and than stays the same again for a couple of times.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 19, 2022, 07:54:16 pm
content: A couple points:- A pull down resistor is recommended on TCK. Is there one on your board, or is the TCK pin floating?- Your wiring looks correct.- Since behavior seems dependent on the clock rate, how long are your JTAG wires? There may be some crosstalk or ringing issue.

author: DocRaptor
author_rank: Contributor
timestamp: April 20, 2022, 06:38:57 am
content: TCK has a 4.7K pull-down resistor. I use 20 cm jumper wires. I can make shorter cables. Maybe this helps.

author: mon2
author_rank: Frequent Contributor
timestamp: April 20, 2022, 02:53:10 pm
content: Yes, 20cm is waay too long. Keep the fly wires short as possible. I recall when we brought in the official FTDI made USB to MPSSE cable where the IC controller is located inside the molded hood (near the USB connector) + pigtail wires. The experience was horrible in working with the Lattice FPGA devices.The closer the FTDI IC is to the target device you wish to progran, the better.

author: DocRaptor
author_rank: Contributor
timestamp: April 20, 2022, 07:24:41 pm
content: Update: I have new cables on it. Length: 8cm. Now the results: The ID read is always 0xFC000803, exept when the divider is set to 0, than it is always 0xFA021003.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 20, 2022, 08:26:03 pm
content: Do you have a scope to look at the JTAG signals?

author: mon2
author_rank: Frequent Contributor
timestamp: April 20, 2022, 09:29:44 pm
content: How reliable is the PCBA for this custom board ? Could the FPGA be soldered incorrectly ? Can it be x-rayed ?Do you have another Lattice FPGA from perhaps a kit where the FTDI bridge can be confirmed to be working and is able to extract a known good JTAG ID ?

author: DocRaptor
author_rank: Contributor
timestamp: April 22, 2022, 11:26:19 am
content: Here are some scope-pictures.Channel 1 is always TDI and trigger is set to Channel 1Pic1:Channel 2 - TMSPic2:Channel 2 - TCKPic3:Channel 2 - TDOReliability of my custom board: I hope I didn't made any mistakes. I based it on other boards and used the Hardware Checklist from Lattice.X-Ray: I have no access to one.Soldering: If needed I could resolder the FPGA (remove it from the board, reball it, and than solder it on the board).I don't have another Lattice FPGA in Chip-Form or on another Board. I orderd some boards with Lattice FPGAs (ICE40 and ECP5) from different sellers, but they never arived (and when you want to know when I orderd them: It was one year ago).I'm thinking of buying this here:https://www.ebay.de/itm/154901961991?hash=item2410e05d07:g:LO8AAOSwnYhiMbWy, to test if it works better. It is the only one which will not take nearly a month from china.

author: laugensalm
author_rank: Regular Contributor
timestamp: April 24, 2022, 07:28:40 pm
content: If this is a FT2232L, there might be issues with the TCK slew rate. Even though that would look fine on a 100 MHz scope and despite the theoretical hysteresis, minor glitches from external noise can cause multiple triggering at a slow rising edge on the fast input drivers of the FPGA TAPs. Don't use any pull resistors on the TCK pin.The FT2232H has better slew rates, but I have always added a small driver gate to make sure to get a very fast rising edge on the TCK. The traces/wires to the ECP5 need to be indeed very short (< 7cm).

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 24, 2022, 07:39:56 pm
content: I'm not sure I understand the behavior of TCK vs TDI on your capture #2.

author: DocRaptor
author_rank: Contributor
timestamp: April 25, 2022, 06:57:12 pm
content: The Chip is a FT2232HL.I can , when I have time again, shorten the wires more and test again.

author: DocRaptor
author_rank: Contributor
timestamp: May 06, 2022, 07:19:47 pm
content: I ordered a USB JTAG Programming Cable, a clone one. Today it arrived and I pluged it in and got Error with "the board power is not turned on". After figuring out that on VCC on the box the power needs to go in and does not come out, I tested it again. And Status showed: PASS. So the problem is with the my FTDI Board.

author: Bassman59
author_rank: Super Contributor
timestamp: May 06, 2022, 10:05:35 pm
content: Quote from: DocRaptor on May 06, 2022, 07:19:47 pmJust a data point. I tried to use the FT2232H mini-module to program a MachXO2 on a board I designed, and the Diamond programmer didn't recognize it. After an evening of futzing with it, I gave up and ordered the Lattice programming pod, which worked right out of the box.My guess is that the Lattice pod has a the correct VID/PID and the 2232 has one of its ports set up to do JTAG. Out of the box the 2232 ports default to UART.I suppose I could try using the FT-PROG to set the module to use Lattice's VID/PID, whatever it is (I can find it now from the official dongle) and then the driver in Diamond would work. Maybe. Anyway I have the official dongle so there's no point to playing around with the module.

author: ale500
author_rank: Frequent Contributor
timestamp: May 07, 2022, 06:51:31 am
content: There is a thread here about Lattice's VID/PID being necessary to successfully program... lattice FPGAs!. I bought a FTDI 2232 breakout board and after programming those IDs, it did work. MachXO2 breakout boards work too as programmers after severing the TDI/TDO traces.

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 07, 2022, 04:49:21 pm
content: I posted the required file for FT_Prog right above.

author: DocRaptor
author_rank: Contributor
timestamp: May 07, 2022, 06:25:36 pm
content: Quote from: SiliconWizard on May 07, 2022, 04:49:21 pmI used your FT_Prog file, but it did not work

author: SiliconWizard
author_rank: Super Contributor
timestamp: May 07, 2022, 06:35:04 pm
content: Quote from: DocRaptor on May 07, 2022, 06:25:36 pmI'm sure your problem was somewhere else. But not quite sure what.

author: TheBoredOwl
author_rank: Newbie
timestamp: July 31, 2025, 01:18:12 am
content: I had the same symptoms. The cable for programming was a 'C232HM-DDHSL-0' purchased from Mouser. This has a 0.5m! cable from the FT2232H to the point where it was attached to my SWD debug header. This was followed by another ~10cm of ribbon cable to the board. The result was intermittent inability to verify the flash and/or get the device ID. I sliced 42cm out of the programmer cable and the result is rock solid.