Olimex journey to failure. - Page 1
Forum section: electronics / general

author: paulca
author_rank: Super Contributor
timestamp: June 03, 2025, 10:07:03 am
content: So I wanted an ICE40 dev board with a decent amount of IO.I bought an Olimex iCE40HX8K and thought I'd include the Digital IO board, just in case. Good job as it has level shifters and my project is 5V.For some reason I assumed it would have a USB port. No.So I spent ages look through old boxes of programmers and I could find every single type of programmer, BUT, a direct SPI programmer. STM, STK500, ASP, FTDI-JTAG... but not SPI programmer and no FTDI-232H (that wasn't customised to JTAG for ESP32).Eventually I found an FT232RL but after a bit of a fight it came down to "Nope. The RL is not supported by the toolchain, only the H"So, another Mouser order to buy Olimex's "recommended" option. Their own "Leonardo clone" 3.3V Arduino board which is directly supported by "progrduino" tools.At one point I did have an STM32BluePill running someone's USB Mass storage flasher. However, it just didn't work. STM32 firmware changes killed the whole debug UART and hooks it was using, even if I did re-implement all the _write() et. al. hooks and make the debug UART work, I threw my hands up in dispair because... I have to have the STM32 programmer, the USB Mass storage AND now I need a USB-Serial adapter an a terminal to see why it's not working? Fuck that.I went and spent the rest of the evening with an IceSugar-Nano, which at least works flawlessly with apio and the default board def and a single USB-C connections.Take away on my FPGA learning. I really need to refresh on my low level logic. I am suffering badly with "out by one" style errors and boundary conditions. School boy stuff. I put it down to the change in structure from sequential ala code to simultaneous/concurrent 'gate style'. It's not my first time with "similar" structure. I see parallels in things like XML stream event processing. There you get each tag in turn, one at a time (although it can be concurrent if you choose) and it's up to you to create "event handlers" and manage your own state machines. Things do not happen in order and not even for loops happen "in order" in those langauges (example XLST). I do not expect this is "the same" but entirely asynchronous programming is not entirely new to me.It's like an LED chaser example. I always like to take these one step further as exercises. So I wanted to make it into a "Knight rider" ping pong pattern.What I couldn't work out was.. there are 8 LEDS. D0-D7. However the example was declaring [7..0] and matching "reached end" with 8b'11111101This just didn't look right to me and gave me a mental block in trying to do the other end. I tried about 30 different combinations and I got the thing working, but looking at the "code" I think it's bugged in more than one place and they are just cancelling each other out.The detect end as "8b'11111101", eg. the penultimate bit is because in the same always block it increments the bit position. So it accounts for this by using if x-1, instead of "if x". I am fine with this. Where I start to loose it is when you have these kind of "+1" here and "-1" there and half a dozen of them. I just can't track them and start making lots of out by one errors.I suppose it might be time to bring out the Mk1 debugging tool ... the pen.Anyway. The learning plan now is to take the two code examples: LED-Chaser and PWM and combine them into a "knight rider" with a trail behind it.There are many ways to do this and the simpliest would be to create the "breather" module ontop of the PWM model and instansiate an array of them and use a "for loop" to generate the transitions in a single always block, (yes I get that for loops are NOT iteration at runtime). Then I just start them all at staggered points.This is not what I want to explore with the project. I actually want to have a single "active" LED driven by the ping pong chaser routing. For the "echo trail" I want to employ flip-flop delay cascades.Just haven't quite worked out how though. Have a few idea to play with tonight. Starting with just a very slow clock chaser that is done with flip flops.rather than if/then blocks.

author: gpr
author_rank: Contributor
timestamp: June 06, 2025, 11:22:53 am
content: I share your frustration with olimex ice40 board.It might have been an excellent board if it supported something less cumbersome programming than requiring another dev board with crappy firmware to just program it.Another complain from my side: imagine you want to boot it directly via spi (not the usual way by updating flash from spi and booting from flash). Designers had that in mind and mentioned in schematic, all you have to do is ... desolder a few small smd resistors and do some other soldering work. Not jumper, not even solder bridge, but smd resistor.Eventually, my workflow for it is: I have rp2040 board which basically translates between spi and uart: I upload fpga bitstream via uart to rp2040 with small python script, then rp2040 writes to fpga flash via spi.All that is a bit bulky, with a bunch of additional wires, but after some initial struggling it works ok, not the worst solution for the price.

author: paulca
author_rank: Super Contributor
timestamp: June 06, 2025, 11:30:41 am
content: Contrast that with the iceSugar-Nano or the official iceStick-EVO, it's a single USB connection in both cases. A USB socket on the nano and an A plug on the iceStick.The iceStick is much larger, sports a 144 pin package and breaks out 16. The same number as the nano about 1/5th it's size.It seems as though the Olimex experience is more the "norm" for FPGAs. The accessibility of things like the LatticeIce dev boards, a lot relating to price point, are apparently fairly unique. They are however extremely well positioned for "learning by tinkering" boards for the likes of me.Reading up on some tutorials for other FPGAs and their tool chains put things into contrast. FPGAs are rarely used outside of industries that need them and those industries already know how to use them. They tend to set up one environment, one test harness and one dev suite and run with it for years and years. Not really what a curious hobbiest does.

author: betocool
author_rank: Regular Contributor
timestamp: June 07, 2025, 03:59:42 am
content: Just to counter the Olimex experience... with other brandsI've used Digilent FPGA dev kits and Terasic dev kits in the past, and both of them always have the USB debugger included, no extra boards required. Yes, there is some hate towards Xilinx and Altera/Intel/Back-To-Altera in terms of company, but the products are good. Xilinx documentation is really good. The other... meh. Plus, both Quartus and Vivado are Linux compatible, big plus for me.My 2c's.Cheers,Alberto

author: zapta
author_rank: Super Contributor
timestamp: June 07, 2025, 06:10:48 am
content: There are several low cost good boards that works out of the box with Apio, I have had good experience with UPDuino 3.1, IceFun, and Gowin Tang Nano 9K. The IceFun has 4 buttons, 4x8 LED matrix and a speaker, and can be plugged in a solderless breadboard for experimentation.What version of Apio are you using? The upcoming Apio 1.x.x includes many improvements over 0.9.5https://github.com/zapta/apio-wiki-dev/wiki/python-based-installation// Installing as a pip packagehttps://github.com/zapta/apio-wiki-dev/wiki/standalone-installation// Standlone installation, no python required.For debugging I recommand writing a testbench and simulating ('apio sim') until it works. It's much easier to debug with the simulation results.Quick start here:https://github.com/zapta/apio-wiki-dev/wiki/quick-start

author: zapta
author_rank: Super Contributor
timestamp: June 07, 2025, 06:34:13 am
content: Quote from: paulca on June 03, 2025, 10:07:03 amIf you prefer the 'schema' design model you may want to check IceStudio. It's an open source and free project that allows you to draw your design but also insert snippets of verilog if needed for special case.https://icestudio.io/