Which CPLD vendor to choose today? - Page 1
Forum section: electronics / general

author: Laura
author_rank: Contributor
timestamp: April 05, 2015, 10:45:32 pm
content: At this point in time, which CPLD family would be the best choice for personal one-off projects? I need 5 volt compatibility. The current project could use a RAM configured device, but my next project will need instant on operation.Some background: At work in the early '80's I burned two or three PALs. Then in the early '90's I used an Altera CPLD - probably a 7064. About 15 years ago I bought a Windows 98 laptop and downloaded the free Xilinx software. The intent was to use a 5 volt 9500 series CPLD in a personal project. I ended up not doing anything because there didn't seem to be enough documentation.Xilinx is no longer proud of their CPLD offerings. The 5 volt devices seem to only be available as new-old-stock. The current CoolRunner II family doesn't have 5 volt compatible inputs. The 9500XL devices could work for me though.Altera looks to be close to end-of-life of their 7000 and 3000 CPLDs. I had to dig around their site to find any mention of them. Like the big X, they seem focused on large FPGAs.Lattice though lists their 4000 series devices right with all their other offerings. I've found at least one source to get the chips cheaply. Lattice seems to be the underdog that's claiming the low end of the market.So - would Lattice be a smart choice? I notice their free software for CPLDs seems to be Windows only. I've been a Mac person since 1984, so I'll have to put together another Windows machine to run it.FYI, the current project absolutely needs 26 macrocells, and I've found uses for the remaining cells of a 32 cell device. The next project will need a device one size bigger.

author: TiN
author_rank: Super Contributor
timestamp: April 05, 2015, 11:06:06 pm
content: MAX II from Altera still does support 5V for most of modes.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 05, 2015, 11:16:50 pm
content: Lattice 4000 has 5v input tolerance. Pretty cheap, and a few package options. Just designing one in now as it happens.Uses the old "ispLever classic" SW which works OK - you need a new (free) license every 6 or 12 months. A minor irritation but it's auto-generated and emailed in a minute or two so no big deal.A fairly big package, mucg hof which is FPGA stuff you don't need.I don't think anyone does (or is ever likely to do) FPGA/PLD SW on a Mac.I'm sure there are solutions via the various ways people run Win on macs.

author: Laura
author_rank: Contributor
timestamp: April 05, 2015, 11:24:50 pm
content: Quote from: TiN on April 05, 2015, 11:06:06 pmThey seem to be much bigger devices than I need. The smallest device (EPM240) has 240 logic elements (claimed equivalency of 192 macro cells) in a 100 pin TQFP package.

author: Laura
author_rank: Contributor
timestamp: April 05, 2015, 11:36:37 pm
content: Quote from: mikeselectricstuff on April 05, 2015, 11:16:50 pmThat's the part I've been eyeing - the 4000V version.Quote from: mikeselectricstuff on April 05, 2015, 11:16:50 pmI've seen mention that some suites have been released for Linux - though not supporting the 4000 series. My preference for running different OS's is to set up separate computers instead of running virtual machines or having alternate boot disks.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 05, 2015, 11:53:44 pm
content: On the subject of Lattice, I just got one of these cheap clone programmers,http://www.ebay.co.uk/itm/251686578853Works better than the genuine Lattice one I had, which always needed bodge caps on TCK to work reliably.Another thing I like about Lattice is their SlimVME stuff - source code which you can add to your MCU to program CPLDs and FPGAs using files generated by their ISPVM software. Really easy to use - just provide stubs to control the IO pins and a 1mS delay.

author: nctnico
author_rank: Super Contributor
timestamp: April 06, 2015, 03:33:10 am
content: My default is to use Xilinx' XC9500XL series and start in a PLCC package. Together with a socket you can even use these on vero board if you like.I use ISE + VHDL to create the bit files. The standard Xilinx programmer you can find on Ebay (for example:http://www.ebay.com/itm/Xilinx-Platform-USB-Download-Cable-Jtag-Programmer-for-FPGA-CPLD-C-Mod-XC2C64A-/390809652326?pt=LH_DefaultDomain_0&hash=item5afe120c66) will do fine to program the CPLD's internal flash.

author: Harrkev
author_rank: Contributor
timestamp: April 06, 2015, 07:54:54 pm
content: Quote from: nctnico on April 06, 2015, 03:33:10 amI have some similar needs. The Xilinx stuff if 5V "tolerant," but I would be hesitant to drive 5V with a 3.3V output.

author: nctnico
author_rank: Super Contributor
timestamp: April 06, 2015, 08:00:49 pm
content: Check the specs of the 5V logic you are trying to drive. In the TTL world Vih is 1.4V so 3.3V more than satisfies that requirement. Some CMOS logic may be on the edge of not working. Running the CPLD from a slightly higher voltage (3.6V for example) may just be enough to make the difference. Otherwise a simple 74HCT buffer does the trick as well.

author: JohnnyBerg
author_rank: Frequent Contributor
timestamp: April 06, 2015, 08:20:26 pm
content: @nctnico: what device would you suggest to start with? I see the XC9536XL-10VQG44C (Digikey $1.46) ?What about the learning curve of ISE + VHDL?

author: Laura
author_rank: Contributor
timestamp: April 06, 2015, 08:30:41 pm
content: Quote from: nctnico on April 06, 2015, 08:00:49 pmIn my case, one side of the CPLD will connect to an FTDI FT232H (i.e. 3v3 signaling), the other side to ~30 year old embedded systems. Early ones are NMOS, while later ones are CMOS. I strongly suspect the CMOS versions use TTL level signaling. I can't check the specs though because it is all proprietary custom silicon.Quote from: nctnico on April 06, 2015, 08:00:49 pmAll my connections to the embedded system need to be bidirectional. I'd have to use a 74LVCH16T245 or similar. This is why I want a 5 volt compatible device.

author: ralphrmartin
author_rank: Frequent Contributor
timestamp: April 06, 2015, 08:31:10 pm
content: An alternative might be a PSoC 4 or PSoC 5LP device from Cypress. They have some very cheap development boards.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 06, 2015, 08:33:34 pm
content: If you want 5v in & out, it seems Atlem;s ATF1500 and ATF2500 ar still available.But probably cheaper to use level-shifters and a 3v3 part

author: janoc
author_rank: Super Contributor
timestamp: April 06, 2015, 09:43:44 pm
content: Quote from: JohnnyBerg on April 06, 2015, 08:20:26 pmAbout same as the comparable Altera/Lattice tools. They also use VHDL and Verilog and the IDE sucks about the same too.

author: JohnnyBerg
author_rank: Frequent Contributor
timestamp: April 06, 2015, 09:58:19 pm
content: Quote from: janoc on April 06, 2015, 09:43:44 pmArghh ..

author: nctnico
author_rank: Super Contributor
timestamp: April 06, 2015, 10:09:21 pm
content: Quote from: JohnnyBerg on April 06, 2015, 08:20:26 pmThat depends on your background. If you have to start from scratch then you'll have a lot to learn. IMHO CPLDs are easier to understand than FPGAs because they have much less logic and timing behaviour depends much less on the amount of logic. With the XC9536XL you can easely look at each resulting output equation to see the 'end result' of your VHDL code.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 06, 2015, 10:11:33 pm
content: Quote from: janoc on April 06, 2015, 09:43:44 pmLearning curve of the IDE is pretty minimal, it's more about knowing HDL, and the limits & capabilities of the device you're targetting. If you've used one FPGA/CPLD toolchain, others will be pretty familiar, especially as some parts are actually the same code.

author: Muxr
author_rank: Super Contributor
timestamp: April 07, 2015, 02:09:11 am
content: @mikeselectricstuff fan of your videos and thanks to them.. I've also decided to go with Lattice as my first foray into CPLD design.Most of the stuff I am looking to do is on the small chip side and Lattice have about the best sub $20 selection of chips, with some nifty features, easily obtained from mouser.I picked up one of those bare bone MachX02 boards, was also wondering if you had any experience or thoughts about the FleaFPGA board for little more utility for experimentation? (http://www.fleasystems.com/fleaFPGA.html)

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 07, 2015, 08:43:01 am
content: Quote from: Muxr on April 07, 2015, 02:09:11 amThere are many FPGA boards out there, though less for Lattice than Altera & Xilinx - pick whichever has the best fit of add-ons for what you want to do.I think Lattice do a cheap board for the 4000 series.QuoteMaybe in terms of understanding the device, but in terms of learning the process of getting into CPLD/FPGAs, starting with a medium-sized FPGA means not having to worry about device limitations until you get to really big or fast designs.A CPLD has significant limitations that mean you usually have to have some understanding of the device to get anything nontrivial to fit, or tweak things so they fit when you run out of resources.With an FPGA you write the code and it will fit. Using a fairly big device means the place/route doesn't have to struggle, so runs fairly fast.For a learning exercise, my advice would start with a reasonable sized FPGA on a devboard, then look at CPLDs & smaller FPGAs when you need to save cost and/or package size as you get towards a real design or product.

author: bingo600
author_rank: Super Contributor
timestamp: April 08, 2015, 08:25:30 pm
content: Quote from: Laura on April 05, 2015, 11:24:50 pmEhh ??Were you just looking at boars on *bay ?The Altera max also comes in 32 & 64 MC's/Bingo

author: JoeN
author_rank: Frequent Contributor
timestamp: April 09, 2015, 04:13:28 am
content: I've used EPM240s in some of my projects. I get what you are saying about them being bigger devices, but you can get them dirt cheap on eBay so who cares if you leave 2/3rds of the device unused. At least for one off hobby stuff:http://www.ebay.com/itm/10PCS-IC-ALTERA-TQFP-100-EPM240T100C5N-EPM240T100C5-/400572822121http://www.ebay.com/itm/5PCS-IC-EPM240T100C5N-TQFP100-ALTERA-NEW-GOOD-QUALITY-/300746279397I have no idea how they can sell them this cheap.They do work, just fine, in fact.

author: Laura
author_rank: Contributor
timestamp: April 09, 2015, 07:48:47 am
content: Quote from: bingo600 on April 08, 2015, 08:25:30 pmI was looking at Altera's website. The Max ---> II <--- series didn't list anything smaller. The Max (no suffix) certainly has 32 and 64 MC devices. However that generation does not have a web page - one has to burrow into the documentation area to find any mention of them.

author: JoeN
author_rank: Frequent Contributor
timestamp: April 10, 2015, 08:14:03 am
content: Max V have the smaller devices.As near as I can tell, the Max II and Max V have the same support for 5V IOs which is it doesn't support 5V unless you provide an external resistor and clamp diode.https://www.altera.com/en_US/pdfs/literature/hb/max2/max2_mii51009.pdfhttps://www.altera.com/en_US/pdfs/literature/hb/max-v/mv51005.pdfMax V's are pretty reasonable for these smaller deviceshttp://www.digikey.com/product-detail/en/5M80ZE64C5N/544-2715-ND/2499438http://www.digikey.com/product-detail/en/5M40ZE64C5N/544-2717-ND/2499440I bought a few of these about a year ago and they program just as easily as the Max II. There appears to me to be very few differences between the Max II and Max V, actually.

author: janoc
author_rank: Super Contributor
timestamp: April 10, 2015, 08:27:55 pm
content: Quote from: mikeselectricstuff on April 07, 2015, 08:43:01 amI have made a good experience with the Papilio range from Gadget Factory:http://papilio.cc/index.php?n=Papilio.HardwareThey are Xilinx Spartan based, but the main thing is that there are some "shields" or how they call them "wings". I have the LogicStart Megawing which goes with a free book teaching you the basics:http://papilio.cc/index.php?n=Papilio.LogicStartMegaWinghttps://github.com/hamsternz/IntroToSpartanFPGABook/blob/master/IntroToSpartanFPGABook.pdf?raw=trueI have found that a rather good resource to get me started with VHDL and ISE.

author: JoeN
author_rank: Frequent Contributor
timestamp: April 15, 2015, 02:23:15 pm
content: She's complaining that 240 logic cell devices are too large. I think that Spartan is probably even bigger than what she wants.

author: janoc
author_rank: Super Contributor
timestamp: April 15, 2015, 03:01:29 pm
content: Quote from: JoeN on April 15, 2015, 02:23:15 pmI was only completing the info on FPGA boards that Mike wrote. As others said before, it is likely easier to learn programmable logic on an FPGA than fight with the tight constraints of a CPLD.And when package size is concerned, you will be really hard pressed to find a CPLD under 32-48 pins. On a pre-populated devboard it is a moot issue anyway.

author: nctnico
author_rank: Super Contributor
timestamp: April 15, 2015, 10:39:33 pm
content: It's true an FPGA won't easely get you in trouble with limited resources for a first project. OTOH it may cause people to get completely lost when they try to understand how their code translates into the programmable elements (primitives) of the device.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 15, 2015, 10:53:32 pm
content: Quote from: nctnico on April 15, 2015, 10:39:33 pmThat isn't something a beginner needs to go anywhere near though. You have to get fairly deep into things before you need to know about that stuff. If you're well away from fully utilising space or speed you may never need to, though it can be interesting to look at the place/route diagrams.

author: janoc
author_rank: Super Contributor
timestamp: April 16, 2015, 10:06:03 am
content: Quote from: mikeselectricstuff on April 15, 2015, 10:53:32 pmPersonally I found it fairly enlightening to look at the generated RTL. Xilinx ISE allows displaying the generated code as a schematics of flipflops and gates and it really drives the point home when you can actually see that e.g. your VHDL state machine translates into a counter + decoding logic or that there really isn't any "black magic" behind something like an SPI interface, just a long strings of flip-flops forming a few shift registers.It is probably less useful for complex designs, but for simple things when learning the HDL it does help to understand what is actually going on. However, whether you are building for an FPGA or CPLD makes a little difference here, unless you are using some built-in features of the FPGA - those show only as opaque boxes.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: April 16, 2015, 12:42:53 pm
content: Quote from: janoc on April 16, 2015, 10:06:03 amAbssolutely - it is interesting to look at, but you don't need to understand it to get the job done.In exactly the same way that it's not necessary to know any assembler to effectively use a C compiler, but it can be very useful when optimising or debugging strange behaviour.

author: Laura
author_rank: Contributor
timestamp: April 17, 2015, 08:43:49 am
content: Quote from: JoeN on April 15, 2015, 02:23:15 pmAt this point, there's several of us getting advice on this thread. FPGA suggestions might be correct for other readers.For my project, an FPGA is overkill. A small CPLD in a 44 or 48 pin package is a better choice. I also want the result to fit in an overside cable plug or dongle. The resulting cable needs to quite literally go out into the field.I don't fear running out of synthesis logic. I've hacked enough digital logic that I know what I want for the underlying implementation. In terms of not knowing what some "code" synthesizes to, I may have the opposite problem: I may have to hunt around for the magic Verilog spell to cast to get what I want.And FYI, my project has changed a bit: Due to frustration with the FTDI chip, I'm going to use a different FTDI mode and a bigger (64 macrocell) CPLD that takes on more functionality.

author: janoc
author_rank: Super Contributor
timestamp: April 17, 2015, 01:00:03 pm
content: Quote from: mikeselectricstuff on April 16, 2015, 12:42:53 pmWell, certainly not necessary if you know what you are doing already. However, for me, as someone who is originally a "software guy" and more familiar with basic discrete logic, seeing the results of the synthesis translated to actual flip-flops and gates really helped me to understand what I am doing and where did I screw up. I am speaking about the value of it for learning the HDL, not necessarily for writing production code.And the analogy with the assembler vs C - it is not exactly the same thing. Yes, C is compiled to assembler and VHDL/Verilog to RTL, but that's where the similarity ends. With C I have a debugger or at least something like printf() that I can poke and prod the binary with when something isn't working right. I can't really see inside of that FPGA or CPLD, only observe what is going on from outside (yes, I am aware there are some debugging/probing tools, but I don't have access to those). So having a clue what could actually be going on inside is extremely helpful. I have also found it really indispensable when actually trying to fit a larger design I was working on into a CPLD, to see where I could fix some inefficiencies and save some flip-flops and thus CPLD cells.

author: nctnico
author_rank: Super Contributor
timestamp: April 17, 2015, 01:07:35 pm
content: It is always a good idea to have some debug pins on an FPGA/CPLD design. Usually you don't care much about timing on a debug port so they don't eat any of the 'valuable resources'.

author: janoc
author_rank: Super Contributor
timestamp: April 17, 2015, 08:22:10 pm
content: Quote from: nctnico on April 17, 2015, 01:07:35 pmOf course, that is what I usually do.However, what I had in mind was something akin to a source code debugger that would allow you to step through the code and check variables. I don't think that such thing even exists for the FPGAs. The concept of "stepping through" doesn't even make much sense, because of the highly parallel nature of the thing. I know that there are some things available from Xilinx that allow you to virtually probe the content of registers and other things in your design through a debug port, but I don't have that. One can always synthesize a virtual logic analyzer on the chip to make the internal state accessible from outside, but that it not really an option on the small CPLDs. And even if you do that, you still don't really get to see the connection between your VHDL/Verilog lines and the data coming from the chip.

author: nctnico
author_rank: Super Contributor
timestamp: April 17, 2015, 09:55:32 pm
content: The proper way of debugging an FPGA design is simulating it. This allows to probe any signal in a design from a waveform viewer. This works very well once you have programmed a proper test bench.

author: JohnnyP
author_rank: Regular Contributor
timestamp: May 03, 2015, 07:29:40 am
content: I did my first and so far only CPLD design back in '07, reading online tutorials, etc.I used the 44 pin EPM7064STC44-10NI layed out the pcb as I was designing the logic in the Altera. The Altera software said 94% (eek) utilization. It's a good thing it worked because there wasn't room for the next larger device.I use the Quartus 4.2 Web edition, which has schematic entry.I didn't know the parts were obsolete when I designed it, but they are still available from Mouser and Digikey at less than $9.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: May 03, 2015, 09:04:57 am
content: Quote from: nctnico on April 17, 2015, 09:55:32 pmThere is no such thing as "proper", only more or less appropriate for a given set of circumstances.Simulation is often difficult or impossible when interacting with with complex, unpredictable or non-synchronised signals - it will often be way quicker to test hardware than set up everything for simulation.

author: nctnico
author_rank: Super Contributor
timestamp: May 03, 2015, 01:58:42 pm
content: That is only true for poorly specified hardware. Once you have the signals inside an FPGA or CPLD simulation is much quicker than going through synthesis & route to just try something. One of the projects I'm currently working on involves an FPGA design which takes about 30 minutes to get through the synthesis stage and another 15 minues for place & route. If I need to make a major addition or change I simulate that part first otherwise it just takes too long to try & test something let alone getting different debug signals out.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: May 03, 2015, 04:08:11 pm
content: Quote from: nctnico on May 03, 2015, 01:58:42 pmTrue for complex stuff, but where compiles are seconds rather than minutes, it's often quicker to just program it.Hence "most appropriate" not "proper"

author: Muxr
author_rank: Super Contributor
timestamp: May 26, 2015, 10:48:47 pm
content: So I have to say I am quite pleased with the MachX02. Thanks Mike!Over the weekend I implemented a simple SPI LED driver. It's basically ESP8266 -> MachX02 -> LED Matrix, ESP8266 is just sending some binary counter data (slowed down quite a bit), and the CPLD is driving the LED matrix with the data in the frame buffer.

author: ale500
author_rank: Frequent Contributor
timestamp: May 30, 2015, 04:40:35 am
content: Those MachXO2 are great !. The software works quite well and is fast at compiling/routing and so on. But I saw that once you get over like 70 % it may fail to route... What I like the most is that you can get purely 3.3 V parts, no need for multiple power rails, and an internal oscillator... I use them for various CPU developments... if they only were 5 V tolerant

author: Muxr
author_rank: Super Contributor
timestamp: May 30, 2015, 06:53:49 am
content: Quote from: ale500 on May 30, 2015, 04:40:35 amYes! I really haven't run into many issues getting this going, and I am fairly new to FPGAs, did a bit of learning of Verilog, I got a decent handle on the principle now. The hardest part was deciding between Verilog and VHDL, I picked Verilog since it's more common here in the US. Also TQFP package instead of BGA is nice as well. I do get worried they might discontinue them with the release of MachXO3 but probably not for awhile.Ice40 series looks interesting too, for low power applications. I might give those a try at some point as well. Lattice seems to have the low end small FPGA market on the lockdown.

author: ale500
author_rank: Frequent Contributor
timestamp: May 30, 2015, 07:26:02 am
content: Those MachXO3 seem to come only on BGA packagesboomerI do not think that they will phase-out the MaxchXO2 that soon, I mean they are still offering the MachXO line...I also picked up Verilog instead of VHDL... here in Germany is the latter more widespread, I am not german so it is ok... Once you understand how to build a circuit and solve problems with programmable logic, the language shouldn't pose a problem anymore....