HP 1661C logic analyzer setup help - Page 1
Forum section: electronics / beginners

author: poot36
author_rank: Frequent Contributor
timestamp: May 07, 2022, 03:55:52 am
content: I am trying to set up my HP 1661C logic analyzer to capture the data on a SPI bus but am having trouble with it triggering on the clock pulse from the SPI bus. I have set the LA to to state mode and have selected the correct clock input wire in the setup as well as assigned labels to all the remaining data pins connected on the SPI flash chip and when I run the LA it does wait until it sees a clock pulse to start triggering but then gives me a error message that is not in the manual and only once I stop it do I see some data but I know it is not all of it as I have looked at some of the pins on a 2 channel scope and it stays active for more time then the capture shows. What I am trying to do is fix a computer motherboard that is mostly dead and does not even beep when the RAM is removed but on the scope I was able to see some bios activity but then it stops and I want to see if that activity is sensible data or not. If you want I can provide pictures of the LA setup screens if that would help.

author: poot36
author_rank: Frequent Contributor
timestamp: May 09, 2022, 02:07:09 am
content: Well I think I figured it out, the clock input on the LA does not appear to support 1.8V signals so I think that is where I am having the issues stem from. Guess I will need to get one of those cheap USB LA units and hope it works at 20Mhz for the clock and 1.8V. If someone can confirm these findings that would be great.

author: pigrew
author_rank: Frequent Contributor
timestamp: May 09, 2022, 02:36:13 am
content: Based on the 1661C's manual, you should be able to adjust the threshold voltage of each pod. For 1.8 V logic, set it to 0.9 V (or so).Or have you already setup the threshold? There is a threshold accuracy of (100 mV + 3%), but that should be fine.(And for a USB logic analyzer... I kinda like the DSLogic hardware but the software is questionable. Its logic probes are much nicer than the competitors.)(Digilent Digital Discovery is another possible USB LA choice... one IO bank can be configured with 1.2 to 3.3V logic. The hardware isn't as nice, but the GUI is quite comfortable.)

author: poot36
author_rank: Frequent Contributor
timestamp: May 10, 2022, 02:15:43 am
content: @pigrew The interesting thing is I had set the threshold to 1.5V and all the other signals were showing as having activity on them but the clock was not. If I set the LA to timing and used the non clock input wire I was able to capture the data but it would not be very useful as there was more data samples between clock edges as it was running off the LA's internal clock for timing. I am thinking of getting one of the cheap 8 channel USB LA units that works up to 24Mhz and uses the open source Sigrock software for running it. Or is that a bad idea as it may not be quick enough to capture the 20Mhz clock of the SPI bus?

author: pigrew
author_rank: Frequent Contributor
timestamp: May 10, 2022, 03:07:01 am
content: Quote from: poot36 on May 10, 2022, 02:15:43 am1.5V threshold sounds too high for 1.8V logic... For 1.8V logic, you need more like 0.9V threshold. You would likely be on the very edge of acceptable. It's possible the clock line has a different load or a slightly different threshold.Most of the $20 logic analyzers do not have adjustable threshold (they have fixed input threshold, compatible with LVTTL). Even worse, I think they only have timing mode (and not state mode). For timing mode to work, you'd want at least 80 MSa/sec.

author: poot36
author_rank: Frequent Contributor
timestamp: May 23, 2022, 12:26:57 am
content: @pigrew I finally got some time to check a few things and I did change the trigger level to 0.9V and it made no difference so I started looking at the clock cable into the LA and found that it was somehow internally damaged so I swapped it for another one and was able to get the LA to correctly trigger off the clock pulse. Do you know if there is any way to import the data from this old LA into Sigrok when i use the list as ASCII export function?