Question on NPN Logic Inverter From Textbook - Page 1
Forum section: electronics / beginners

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 02:30:07 pm
content: Hi,I created an LT Spice of this logic inverter from a textbook (Jaeger and Blalock, 3rd edition "Microelectronic Circuit Design"). I'm getting a Vce that's 10x less than what's printed in the book. I was wondering if someone could help troubleshoot my model. In the sim, I get a Vce of 18mV and the book (see attachments) has it listed at 180mV. Maybe I'm not measuring the right thing?Thanks,Carl

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 02:31:13 pm
content: It's cut off in the photo, but the figure from the book below the text is 5.32(a).

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 02:42:05 pm
content: Pick a 2n3904 model for you simulation and see what you get.You are being kinda hard on that poor transistor forcing 1 volt Vbe.Add some base resistance.

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 02:42:50 pm
content: 2n3904V(vce): 0.00810523 voltage

author: rstofer
author_rank: Super Contributor
timestamp: September 30, 2019, 02:45:05 pm
content: VceSat is usually on the order of 0.2V (MAX at Ic=10 mA). Your simulation shows about 1/10th that amount and it is probably an issue with the model.Look at the 2d page of the 2N3904 dataseet and you will see that VceSat is also a function of collector current. The lower the current, the lower the saturation voltage.https://www.onsemi.com/pub/Collateral/2N3903-D.PDFPage 6 shows VceSat of 0.1V for currents less than about 10 mA.Try it with a real circuit!

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 02:51:49 pm
content: QuoteYeah, not enough current. The book is wrong.

author: edavid
author_rank: Super Contributor
timestamp: September 30, 2019, 03:24:09 pm
content: I think the other replies have missed the point.You have VBEset to 1V. The base current is 3A. Of course the VCEis very low.Add a reasonable base resistor, and you will see a more reasonable saturation voltage.

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 03:54:37 pm
content: Does this simulation look better? I put a 1k resistor in series that brought Ib down to 0.3mA.Is the general consensus that the book is wrong? High current / low current, the book still seems about an order of magnitude too high (180mV versus 18mV)?Thanks,

author: Zero999
author_rank: Super Contributor
timestamp: September 30, 2019, 04:05:55 pm
content: That's better. I was just about to post the same schematic, but with R2 = 8k2, but you beat me to it. I suggest you try it.Yes, I agree 180mV is on the high side, at such a low current, when VBE= 0.8V. It's probably an error with the decimal place, which is easily done.

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 04:19:27 pm
content: Quote from: Zero999 on September 30, 2019, 04:05:55 pmIs there a rationale for selecting 8.2k? Also, is this R a current limiting resistor or DC coupling (or both)?

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 04:22:24 pm
content: Born in the lab

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 04:23:50 pm
content: Quote from: eev_carl on September 30, 2019, 04:19:27 pmPower, speed... The resistor is to limit current. All resistors couple dc.

author: edavid
author_rank: Super Contributor
timestamp: September 30, 2019, 04:26:54 pm
content: Quote from: eev_carl on September 30, 2019, 03:54:37 pmI wouldn't say that the book is wrong. They are just describing a different type of transistor, probably something more like a 2N2369. You can tell this from the high VBE.Also, your base current is still unrealistically high. Try a forced beta of around 10 and see what you get.

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 04:35:29 pm
content: Quote from: edavid on September 30, 2019, 04:26:54 pmAt best, the book is incomplete then. Given that it's goal is to teach, leaving the student with such a quandary without explanation is sub optimal. But, books are never perfect.

author: fourfathom
author_rank: Super Contributor
timestamp: September 30, 2019, 05:06:57 pm
content: Quote from: Wimberleytech on September 30, 2019, 04:35:29 pmThat book is quite complete (I found it online as a pdf). Take a look at Chapter 5 (Bipolar Junction Transistors) where the behavior in saturation is extensively discussed. That "inverter" example is just that, en example of an inverter, and not meant to by itself be a treatise on transistor characteristics.So from this the OP learns that not all transistors are created equal. Not a bad lesson!

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 05:25:31 pm
content: QuoteI don't want to start a flame war, but I downloaded the book and within just a few minutes I found more incompleteness (arguably just wrong)--see if you can tell me what is wrong with Fig. 2.17. My point remains, no book can be complete, and the instance noted in this thread could have been more complete.

author: Zero999
author_rank: Super Contributor
timestamp: September 30, 2019, 06:48:31 pm
content: Quote from: eev_carl on September 30, 2019, 04:19:27 pmI chose it because it would make IB≈1/10ICand it's the same value as RCso it would cut down on the BoM cost, if you wanted to build it, as ordering multiples of the same value resistor, is cheaper than fewer of many different values.For the purposes of simulation, how about changing V1 for a current source and sweeping its value from say 1pA to 10μA?

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 07:48:40 pm
content: This accompanies the example too. I knew about Beta and was using different LT Spice models before I posted to see if I could back into the answer.My confusion was that this graph has Vbe ranging from 0-5 without the discussion about Ib. It seemed like a concrete circuit (ready to be built) to me with specific values for the collector resistor, Vbe, and Vcc.

author: edavid
author_rank: Super Contributor
timestamp: September 30, 2019, 08:14:48 pm
content: That is a confusing graph, since obviously you can't have a VBEof 5V.Instead of VBE, the X axis should be the input voltage to the base resistor (that was left out of the schematic?!?).It does make you wonder about the quality of the book.

author: Zero999
author_rank: Super Contributor
timestamp: September 30, 2019, 08:34:02 pm
content: Please do some image processing, rather than posting huge files. Here it is squashed, with the shadow removed and improved contrast.Yes, it doesn't make much sense. If VBEreally was 5V, then the transistor would burnout from excessive base current. It's probably the voltage before the base resistor, as mentioned above.

author: floobydust
author_rank: Super Contributor
timestamp: September 30, 2019, 08:42:15 pm
content: You'll never force an E-B junction to 5V without the transistor exploding. That graph should end at 1V.Be careful, EE textbooks are written by academics and there are many errors. Always look for the latest edition or the errata. In university, the textbook errors and mistakes never ended despite the author having great credentials.

author: eev_carl
author_rank: Regular Contributor
timestamp: September 30, 2019, 08:46:46 pm
content: Yeah, nothing in errata for 3rd, 4th, 5th editions (mine is 3rd)

author: floobydust
author_rank: Super Contributor
timestamp: September 30, 2019, 09:04:55 pm
content: I think the book mistake is to use the datasheet maximum spec of BVEBO, instead of VBE(on). Example:2SC5200 power transistor: BVEBO5V; VBE(on) 1.5V2N3904/2N2222: BVEBO6V; no spec for, but saturation graph is VBE(on) 1.0V

author: fourfathom
author_rank: Super Contributor
timestamp: September 30, 2019, 09:52:09 pm
content: Quote from: Wimberleytech on September 30, 2019, 05:25:31 pmOK, you're right. I'm not a process/fab guy so I would have to study that figure long and hard, and still probably wouldn't spot the problem.I did look at the graph showing +5V VBE, and that is obviously wrong. Skimming through the book I also noticed Fig 6.3, showing a single-NPN inverter with a direct connection to the base, and showing a transfer function input ranging from 0V to V+. So this is not an isolated problem in the book.

author: Wimberleytech
author_rank: Super Contributor
timestamp: September 30, 2019, 10:12:58 pm
content: Quote from: fourfathom on September 30, 2019, 09:52:09 pmYeah, I skimmed the book...all 1300+ pages. I take issue with lots of things. Why teach H-biasing of MOSFETS? It is, frankly, useless information. I don't have a problem with typos and an equation faux pas here and there (I am an author and understand how easy it is to miss such things), but pedagogical issues are more problematic.

author: rstofer
author_rank: Super Contributor
timestamp: October 01, 2019, 06:38:27 pm
content: Assuming an hFE of 40, I did a little MATLAB thing to figure out what the base resistor should be. I am also going to assume VceSat = 0.2V and Vb = 0.7V. In any event, I come up with around 20k Ohms for the base resistor to get the device into saturation. If I were to actually build the circuit, I would use 10k just to make absolutely sure I got the transistor into saturation.Code:[font=courier]format shortEngformat compactVcc = 5.0 % givenVsignal = 1.0 % givenVceSat = 0.2 % assumedVb = 0.7 % assumedR2 = 8200 % givenVR2 = Vcc - VceSatIR2 = VR2 / R2Ib = IR2 / 40 % assumed hFE = 40VR1 = Vsignal - VbR1 = VR1 / IbThe results look like:Code:[font=courier]Vcc =5.0000e+000Vsignal =1.0000e+000VceSat =200.0000e-003Vb =700.0000e-003R2 =8.2000e+003VR2 =4.8000e+000IR2 =585.3659e-006Ib =14.6341e-006VR1 =300.0000e-003R1 =20.5000e+003This little arithmetic problem will also run in the free Octave (I believe based on other tests).Biasing to use the transistor as a common emitter amplifier is an entirely different matter. Here the issue is just to create an inverter.