Constant current source using dual op-amp giving high offset - Page 1
Forum section: electronics / projects

author: yashrk
author_rank: Frequent Contributor
timestamp: April 04, 2025, 10:51:16 am
content: Hey all,I am working with following circuit using dual op-amps with in AD8629. I am setting 0.1V at input of the first opamp which is acting as a buffer. Here everything is working fine withlow offset of 0.01mV.The second opamp is maintaining 0.1V across 10K resistor which is setting the 10uA of current. But here with the second opamp if I measure across the resistor R6 there is0.54mV of offsetwhile the input offset of the opamp is in micro-volts. I have tried removing the capacitor C14 shorting both 1.5K resistors, etc. with no luck.Relay is currently non-functional is normally connecting the 10K to GND.Not sure why I am getting this high offset. Any suggestions will be helpful.

author: xvr
author_rank: Frequent Contributor
timestamp: April 04, 2025, 11:35:46 am
content: What is precision of R1 and R2?0.01mV of 100mV is an 0.01% (or 100ppm). It should be VERY presize resistors

author: yashrk
author_rank: Frequent Contributor
timestamp: April 04, 2025, 11:48:13 am
content: Quote from: xvr on April 04, 2025, 11:35:46 amI agree, and that's why I deliberately mentioned about the offset.Right now I am talking about the voltage difference between inverting and non inverting pin of the second opamp. Which ideally should be same or very low.

author: negativ3
author_rank: Regular Contributor
timestamp: April 04, 2025, 12:12:41 pm
content: Are you measuring current at the same time as observing the offset?

author: yashrk
author_rank: Frequent Contributor
timestamp: April 04, 2025, 01:00:26 pm
content: Quote from: negativ3 on April 04, 2025, 12:12:41 pmYes I am, if you are worried about the burden voltage added by the multimeter then that shouldn't be a problem as the voltage which is fed back to the inverting pin is after the current measurement point and after the R12 resistor.

author: sharow
author_rank: Contributor
timestamp: April 04, 2025, 01:05:36 pm
content: Because op-amps, even rail-to-rail, don't swing all the way to 0 volts.Going down to 0.54mV(1mV on output) is actually pretty impressive.hmm, Does "0.54mV offset" mean something like 100.53mV?

author: Andree Henkel
author_rank: Regular Contributor
timestamp: April 04, 2025, 01:19:04 pm
content: yes, you should provide a supply slightly below 0V at the -Supply.LM7705 is solution for this:https://www.ti.com/product/LM7705?keyMatch=LM7705&tisearch=universal_search&usecase=GPN-ALTI also don´t get why C14 is connected that way in your circuit.

author: jwet
author_rank: Frequent Contributor
timestamp: April 04, 2025, 01:30:45 pm
content: There is no DC feedback in the circuit. There are standard current source circuits like a mosfet on the output of an amp with a sense resistor in its source as feedback. The floating load is in the supply to drain circuit.The first op-amp has no purpose and its easy to do this without a relay- use an analog switch.

author: yashrk
author_rank: Frequent Contributor
timestamp: April 04, 2025, 01:39:35 pm
content: Quote from: sharow on April 04, 2025, 01:05:36 pmYes that is correct. At voltage divider I am getting 99.83mV, at buffer opamp output I am getting 99.84mV hence a offser of 0.01mV. After that across resistor R6, I am getting 100.34mV which translates to 0.5mV of offset.

author: yashrk
author_rank: Frequent Contributor
timestamp: April 04, 2025, 06:56:04 pm
content: Quote from: jwet on April 04, 2025, 01:30:45 pmSorry I didn't get what you want to say?

author: Benta
author_rank: Super Contributor
timestamp: April 04, 2025, 07:40:35 pm
content: I think you have a bias current problem.The two inputs of the second opamp should have the same source impedance, and they don't.One input is basically zero (the one fed from opamp one), and the other is 10k.Add a series resistor to the first input of the same value, chances are good that it'll work.

author: sharow
author_rank: Contributor
timestamp: April 05, 2025, 07:38:03 am
content: One possibility is that the second opamp is demodulating the chopping noise of the first opamp.Since there are two chopper opamps in one package, they likely share the same chopping frequency(or chop timing)...I think it's probably different though.

author: Jay_Diddy_B
author_rank: Super Contributor
timestamp: April 06, 2025, 04:44:19 am
content: Hi,I don't think it is input bias currents. 0.54mV / 10 k= 54 nA.The datasheet shows the input bias currents versus input voltage to be around 1000pA with a CM voltage of 0.1V and hot, 125C.Measure the voltage between GND A and GND B as shown below:They should be connected to the same point, star ground.Jay_Diddy_B

author: Vovk_Z
author_rank: Super Contributor
timestamp: April 06, 2025, 10:28:28 am
content: I don't get a current source part at that design at all. It doesn't look as it for me. Possibly it just I overlook something there.A capactor at output is shorted or not?

author: PCB.Wiz
author_rank: Super Contributor
timestamp: April 07, 2025, 12:33:23 am
content: Quote from: Vovk_Z on April 06, 2025, 10:28:28 amI think the intention is the load is inserted at TP8 and then U10B drives to try to keep 100mV across R6 or R7, which is constant current.

author: yashrk
author_rank: Frequent Contributor
timestamp: April 07, 2025, 06:25:41 am
content: Quote from: Vovk_Z on April 06, 2025, 10:28:28 amI have tested with both capacitor populated and removed, with not much difference in performance.If you ignore the R11 & R12 they are not needed for the operation and are there for current protection. Anyway, if you ignore the resistors and the capacitor C14. What you have is op-amp trying to maintain 0.1V across a known resistor as the feedback is taken just above the resistor which is connect to GND. This maintains a constant current depending on the resistor value.For this to work there should be minimal offset between the input and output of the opamp and also low offset drift as well, hence the reason to select the AD8629.

author: yashrk
author_rank: Frequent Contributor
timestamp: April 07, 2025, 06:26:33 am
content: Quote from: PCB.Wiz on April 07, 2025, 12:33:23 amThat's correct.

author: negativ3
author_rank: Regular Contributor
timestamp: April 07, 2025, 10:09:08 pm
content: You should run a Falstad simulation on your design.https://www.falstad.com/circuit/circuitjs.html

author: yashrk
author_rank: Frequent Contributor
timestamp: April 08, 2025, 06:52:57 am
content: Quote from: Jay_Diddy_B on April 06, 2025, 04:44:19 amJay you were bang on the issue.As per your suggestion I measure the voltage as shown by you, and there was around 0.3mV of offset voltage. Then I checked all the GNDs from point 'B' GND and they were varying from 0.1mV to 0.3mV. Shorting the two GNDs A & B solved the offset issue. Now for 99.9mV of input I am getting 9.98uA of current.Why this happened?Actually, to avoid interference from GND plane of digital circuit and switching power supply we had removed GND plane from the whole analog section, on all layers. And sourced the GND from one point of a LDO output capacitor which was used only for analog section. Though that concept might have been right, the poor execution in the layout made it into long trace which is my theory why this offset happen. (Do correct me if I am wrong).Also, Jay I would like to know what prompted you to check the GND offset? was there a deeper logic or just been, there done that situation?Anyway, thank you all for your suggestions.Hope my description of the issue and though process which led to the issue helps someone else.