Logic gates to select single values on an 8/16-bit bus - Page 1
Forum section: electronics / beginners

author: ALonda
author_rank: Contributor
timestamp: March 19, 2017, 11:19:41 pm
content: This all is in relation to using gates or logics of some sort to determine if a particular 8/16-bit address is on an address bus is of a particular value in order to do a chip enable, or to check if all 8/16 bits of an adder is zero, or in general to validate that all logic outputs from a certain circuit is of a particular value.I want to create a circuit to set a chip enable if a particular address is on a bus. My best idea so far is using a combination of 4-input NOR and AND gates connected on selected lines but with one of each leaves two outputs needed to be combined with yet another logic chip. so probably one 4-input AND + one 4-input NOR + one 2-input NOR for an 8-bit address input.I have tons (60+) old 4K proms I could use but no programmer/eraser equipment.I imagine diodes would work in place of (N)OR?Just connecting them together without anything I expect would work (in place of (N)ORs but if one output was high and the other low, alot of current would go to waste. (?)Transistors/mosfets should work but would be a wiring nightmare (?)I have no experience with PALs. Are PALs easy to program? Need special equipment?Is there something Im not aware of that could solve my problem cheaper/easier?/A(Yes I have been bitten by jealousy bug and dream of making a breadboard cpu built with logic gates just like my hero Ben Eater)

author: ALonda
author_rank: Contributor
timestamp: March 20, 2017, 12:38:59 am
content: Talking about a CPLD or FPGA is way off the mark for this question.I do have a cyclone II FPGA in the mail coming from china but that would not be part of a breadboard cpu. I could use it to verify a design maybe but it wont achieve my dream.The idea of using 74xx138 is great. I figure with proper wiring it can be used to verify up to 11 bits for the cost of 2 chips. Better than using AND and (N)OR chips. Would only need 3 chips to cover 16 bits!/A

author: radiogeek381
author_rank: Regular Contributor
timestamp: March 20, 2017, 12:54:10 am
content: There are lots of ways to do this. I'm assuming you want something simple.Here's how we'd have done it back in "the old days" of SSI.I'm assuming that you want to decode 16 bits to see if they match exactly one address.This block of logic has two inputs IN<15:0> (16 bits)and ADDR<15:0> (the address we're matching against)Option 1. Compare each bit of IN to the corresponding bit in ADDR. You do this with anXOR gate. Then check to make sure the output of every XOR gate is false.That takes 16 XOR gates (like four 7486 chips), 2 8-input NAND gates (2 x 7430) and one 2 input NOR (1/4 * 7402)Option 2. Build it out of muxes -- this is also known as a poor man's PLA.It will take four 16:1 muxes (like a 74HC4067 or 74150). we'll call them U1,U2,U3,U4U1 select inputs are connected to IN<3:0>U2 """"" to IN<7:4>U3 to IN<11:8>U4 to IN<15:12>Now this is where it gets a little complicated.Tie all the data inputs (E0...E15 in the drawing I found athttp://ee-classes.usc.edu/ee459/library/datasheets/sn74150.pdfhigh by default. But one of them on each chip will be tied low.On U1, tie the Ex input low that corresponds to the value of ADDR<3:0> That is if ADDR<3:0> is 0b1010, tie E10 low.On U2 tie the bit corresponding to ADDR<7:4>U3 .. Addr<11:8>U4 .. Addr<15:12>All of the 16:1 muxes need to have their ENABLE pins tied low.Now connect all the W outputs to the input of a 4 input NAND. (7420)The output of this NAND gate will be LOW when the address matches.I'm sure you can imagine other ways of doing this with 8:1 muxes or evendecoders and muxes. These are the two obvious ways, assuming 1980'stechnology.I can't imagine using an FPGA for this (and I spent 20+ years as a chip designer).If this is the only function you need, there are probably a bunch of PLA orPLDs that can do it. Your initial notion of a ROM would work too.------------------------

author: ebclr
author_rank: Super Contributor
timestamp: March 20, 2017, 12:56:42 am
content: http://www.ti.com/lit/ds/symlink/sn74as885.pdf

author: FrankBuss
author_rank: Unknown
timestamp: March 20, 2017, 01:38:21 am
content: Quote from: ebclr on March 20, 2017, 12:56:42 amProblem is to find a chip which is not obsolete. The sn74as885 is not in stock at Digikey and costs a fortune at Mouser. Good idea to search at Digikey:http://www.digikey.com/products/en/integrated-circuits-ics/logic-comparators/773Then click "in stock", 108 ICs left. This one looks nice:http://www.digikey.com/short/32dmc9available in DIP, 2-6V, 8 bit, costs less than a buck.

author: ebclr
author_rank: Super Contributor
timestamp: March 20, 2017, 07:16:36 am
content: Forget USA and EuropeBuy on the world factory market,not on makers markethttps://world.taobao.com/search/search.htm?_ksTS=1489994131437_28&spm=a21bp.7806943.20151106.1&_input_charset=utf-8&navigator=all&json=on&q=74as885&callback=__jsonp_cb&cna=tl3XEA1%2F3U8CAbrnnZ1AwTX1&abtest=_AB-LR517-LR854-LR895-PR517-PR854-PR895

author: Ian.M
author_rank: Super Contributor
timestamp: March 20, 2017, 08:37:28 am
content: Assuming you are doing it 'old skool' with a mix of non-programmable SSI and MSI logic, it depends whether you need to decode for one address or for multiple independent addresses.If its multiple fixed addresses, use a 4 to 16 line decoder for each nibble of the address bus. Each output represents a decoded hex digit and if you combine one output from each decoder using a four input AND gate (or OR gate if active low), you have a fully decoded address. Each additional address only needs another four input gate, which at two a package scales well up to the fanout limits of the 4 to 16 line decoders.

author: ebclr
author_rank: Super Contributor
timestamp: March 20, 2017, 08:47:26 am
content: Buy this cheap board and make the "ic you want"https://pt.aliexpress.com/item/MAX-II-EPM240-CPLD-Minimum-System-Core-board-Development-board/32649248485.html?spm=2114.02020208.3.27.1IAgmy&ws_ab_test=searchweb0_0,searchweb201602_2_10065_10068_433_434_10136_10137_10138_10060_10062_10141_10056_10140_10055_10054_10059_124_10099_10103_10102_10096_10052_10053_10050_10107_10142_10051_10106_10084_10083_10080_10082_10081_10110_10111_10112_10113_10114_10078_10079_10073_10070_10122_10123_10124,searchweb201603_3,afswitch_1,ppcSwitch_5_ppcChannel,single_sort_0_price_asc&btsid=b6204e7c-5229-484c-9996-376f8b842d1f&algo_expid=cb0c1c5e-039c-4c6c-91b1-0d6fbf2e6776-3&algo_pvid=cb0c1c5e-039c-4c6c-91b1-0d6fbf2e6776

author: FrankBuss
author_rank: Unknown
timestamp: March 20, 2017, 09:20:45 am
content: Quote from: ALonda on March 19, 2017, 11:19:41 pmI don't get it, how can you check a particular value with these chips? I guess thedatasheet of the 74688shows the simplest solution: A bunch of 2 input XNOR gates, like the 74LS266, and then combining the outputs with AND gates, and NAND for the last stage, if you want output low on match. For 8 bits you would need 2 x 74266 XNOR gate chips, 2 x 7421 AND gates and one 7400 NAND gate.QuoteI can recommend a MiniPro TL866, I have one.Dave tested it, too. You can get it from eBay. Nice about using an EPROM is that you need only one EPROM to decode many different addresses. You can use d0-d7 for 8 different chip selects.QuoteWith diodes you can implement OR and AND gates, seehttps://en.wikipedia.org/wiki/Wired_logic_connectionThe disadvantage is that it is slower than using gates, if the pullup or pulldown resistor is too high, because of parasitic capacitance, or power consumption is higher, if you use lower value resistors. And the fan-out is not so good.

author: rstofer
author_rank: Super Contributor
timestamp: March 20, 2017, 06:52:48 pm
content: The bad thing about EPROMS is that some of them are seriously SLOW. The venerable 1702, for example, needs 900 nS from CS' to data out. This delays the address decoding for every device it selects.You need to get something with a delay of 10 nS or so. So, can your CPU load the memory map into some kind of fast RAM? Boot from a piece of flash that sets up the memory map and then maps itself out at some point.Not much different than a MMU, really. I haven't even thought about the block diagram...

author: james_s
author_rank: Super Contributor
timestamp: March 20, 2017, 07:14:21 pm
content: Look at existing 8 bit computer designs from the late 70s-80s for lots of examples of how to do it. Classic arcade games are good for this too, manuals are available for most with full schematics.I like using CPLDs for this sort of thing, cheap and easy to work with. The programming cable for Altera CPLD and FPGA devices is available for about $6 for a clone that works fine. Usually you can get by with a couple of jellybean 74xx series chips though. Often the address is only partially decoded, the result is that a specific peripheral may appear in several places in the memory map but this is ok if there is nothing else there.

author: BrianHG
author_rank: Super Contributor
timestamp: March 20, 2017, 08:54:13 pm
content: 2 of these will give you 16 bits, you might need an inverter to invert the output if you want positive logic.You don't need any other ICs.http://www.digikey.com/product-detail/en/texas-instruments/SN74F521N/296-33912-5-ND/1570293

author: ALonda
author_rank: Contributor
timestamp: March 20, 2017, 11:53:21 pm
content: Quote from: BrianHG on March 20, 2017, 08:54:13 pm+1 chip to combine the 2 outputs.74138 can do 16bits matching in 3 chips at about half the price.But would need cmparators to compare two values for branching and such/A

author: james_s
author_rank: Super Contributor
timestamp: March 21, 2017, 12:09:38 am
content: Seems like a single CPLD would be easier and cheaper. XC9536XL was $1.36 each last time I bought one.

author: kony
author_rank: Regular Contributor
timestamp: March 21, 2017, 12:24:15 am
content: Drop some CPLD on that.Lately each time I'm facing using more than single 74xx chip other than trivial combinatoric gate, I rather put there some of the XC95xx - price difference is basically nill, and the crossbar matrix makes PCB layout so much simpler that it is worth the JTAG programming fuss.

author: BrianHG
author_rank: Super Contributor
timestamp: March 21, 2017, 01:42:24 am
content: Quote from: ALonda on March 20, 2017, 11:53:21 pmRead the data sheet...Take the output of one and feed it into the output enable of the second. No need for another chip. That oe is not a tristate, but was placed there to bridge these ICs.

author: ALonda
author_rank: Contributor
timestamp: March 21, 2017, 02:57:05 am
content: Quote from: BrianHG on March 21, 2017, 01:42:24 amYoure right, but still, 3x 74138 only cost 42cents while 2x 74521 cost $1.3Ive ordered 20x 74138's and put 10x 74521 in my shopping cart/A

author: rstofer
author_rank: Super Contributor
timestamp: March 21, 2017, 01:37:44 pm
content: Have you worked out the delay through the decoder chain? How does this affect the cycle time of devices?

author: FrankBuss
author_rank: Unknown
timestamp: March 21, 2017, 01:44:15 pm
content: If he builds his own computer, he can clock it as slow as he want

author: rstofer
author_rank: Super Contributor
timestamp: March 21, 2017, 07:04:54 pm
content: Quote from: FrankBuss on March 21, 2017, 01:44:15 pmSure, but there are no bonus points for making things slower! Nobody ever went to the store asking for a slower computer!

author: james_s
author_rank: Super Contributor
timestamp: March 21, 2017, 08:25:04 pm
content: I do remember having to use software that deliberately slows down a computer though in order to run older games that ran too fast. Haven't had to do that for a long time though.

author: rstofer
author_rank: Super Contributor
timestamp: March 21, 2017, 09:31:55 pm
content: Quote from: james_s on March 21, 2017, 08:25:04 pmThat was always a consideration for text based games. The programmers had to make the player believe they were challenging the machine.It was disconcerting when the teletype rattled off the response immediately after pressing return.

author: james_s
author_rank: Super Contributor
timestamp: March 21, 2017, 09:46:51 pm
content: I was thinking of some graphical games that ran so fast on a 286 or 386 that they were unplayable. I remember one in particular on a 33MHz 486 you would hit start and Game Over popped up in about 100mS.

author: ALonda
author_rank: Contributor
timestamp: March 21, 2017, 11:10:15 pm
content: I would think that "I designed and built my own cpu" would rank pretty high for bragging rights, no matter how fast it is.In any case, since most logic chips are rated for 40-50MHz I imagine a cpu based on them could atleast hit 10MHz or so before turning into a quantum time teleporter machine./A

author: rstofer
author_rank: Super Contributor
timestamp: March 21, 2017, 11:51:07 pm
content: Quote from: ALonda on March 21, 2017, 11:10:15 pmThere is serious cred for building your own CPU, regardless of how it is done.If, for example, you want a clock rate of 20 MHz (fairly fast, a Z80 only ran 6 MHz, the 8080 only 2 MHz), you have 50 nS to do memory access if you don't want a wait state. If you give up half that in decoding, there isn't much time left for taccof the memory.It's just a number to look at. If might not be an issue at all! I haven't looked at the datasheets so I have no idea how much time is being used in decoding.When I first started messing with computers in 1970, I was using an IBM 1130. Somewhere around '74 I built a bipolar emulation using blown-link PROMs to hold microcode and 74181s for the ALU, all wire-wrapped. Memory wasn't available at that time so I waited until 2003 or so to build it over again with an FPGA. My version runs all of the IBM software, unchanged. And it runs at 50 MHz versus 400 kHz of the original. With just a little effort, I could probably kick it up to 100 MHz, 250 times the speed of the original! On a chip the size of a postage stamp.