The best schematic layout standards - Page 1
Forum section: electronics / projects

author: VK3DRB
author_rank: Super Contributor
timestamp: May 02, 2013, 11:44:51 pm
content: Hi all.Some people get a little agro about schematic payout practices. For example, "NEVER use wires with net labels on them going nowhere - it is not a wiring diagram". There is no real reason for such an argument other than bad experiences or sheer pig headedness.I think a paradigm reset is required. A fundamental requirement of a schematic is to effectively communicate how a circuit is assembled symbolically. Of course using it as a source to produce a subsequent PCB or a BOM is also fundamental. But if it does not communicate efficiently (shortest time to absorb the required information into the brain of the reader), it is a bad schematic.In other words, for the same reader or the next person down the line a good schematic is one which is easy to understanding. Many old TV schematics were examples of bad schematics - the good ones at least had sample waveforms on them and words depicting each functional subsection. (These days, you don't even get a schematic.)I believe there are valid reasons to have open schematic wires with net labels to unclutter a schematic in certain instances, as there is to use bus lines and discrete wires. It all depends upon the situation, what the signals are, and the schematic environment.Evenso we all have pet hates. Mine are:- inconsistencies, especially in part and net labelling (cause: lack of planning or standards)- no "NO ERC" markers on lines (cause: laziness)- too many or not enough schematic sheets (cause: lack of planning)- no history page or history information anywhere else (cause: laziness or poor standards)- long symbolic component leads (eg: 20mm, rather than 10 or 15mm) (cause: using Altium's standard libraries)- schematic layout that is hard to read or confusing (cause: not thinking of other readers)To address these issues, I am developing PCB Coding Standards which are guideliness for developing PCBs. Such standards ensure we all read from the same page and no-one gets their noses out of joint. Also I am stating WHAT and WHY in the standards. I am purposely leaving many elements loose ended in that the designer has poetic licence to do how he sees it fit. But for component libraries, it is a THOU SHALL approach. I once worked for a medium size company where the libraries were and probably still are out of control, untrusted, full of errors and in multiple places.Any comments, suggestions and war stories, on what you do for coding standards please add them here!cheers,Dave

author: MacAttak
author_rank: Unknown
timestamp: May 03, 2013, 12:36:24 am
content: My main thought is that I hope you keep in mind more than one schematic capture software package when you do this. Altium is in use by many professionals, but not by many hobbyists (and quite a few professionals too) due to the crazy price tag and reputation for being unstable. So it would be good to not assume that rule #1 of your schematic standards draft isn't "buy an Altium license".

author: VK3DRB
author_rank: Super Contributor
timestamp: May 03, 2013, 02:03:06 am
content: Quote from: MacAttak on May 03, 2013, 12:36:24 amAgreed. I should have stated it was Altium centric. There are other schematic package around of course. As for stability, the latest Altium is greatly improved on earlier versions. One annoyance is bugs are not fixed unless you continue to pay. It is a bit like having to paying for a Windows upgrade from the Win ME to XP because of bugs. On the other hand, the number of users is limited and they need to have an income stream to stay viable and develop better products.

author: AlfBaz
author_rank: Super Contributor
timestamp: May 03, 2013, 02:27:38 am
content: Quote from: VK3DRB on May 02, 2013, 11:44:51 pmI don't like using these either but there are some common situations where disabling a certain ERC rule will prevent you picking up legitimate errors.An example is an output pin feeding an input pin. You then place a series terminating resistor in line and you get a "no driving source" error for the input pin. With all the smarts altium has you'd think it would be clever enough to realise this.To put my mind at ease I never place a "NO ERC" marker unless I have thoroughly investigated the error cause. If its a non-obvious error suppression I'll place a text footnote symbol or number near the "NO ERC" marker and expand on it in a text box else where on the schematic.

author: Rufus
author_rank: Super Contributor
timestamp: May 03, 2013, 02:32:31 am
content: Quote from: VK3DRB on May 02, 2013, 11:44:51 pmNever say Never but stuff like the attached (Hello Dave?) really pisses me off. Is ADC-IOUT a helpful label allowing it to be referenced in other documentation? Perhaps it is a helpful identifier for the net in PCB layout?Or perhaps it is a free pass to attach to that wire anywhere else in the schematic and the only way you can tell is to search the entire schematic for more instances of it.edit addition:-I once lifted some circuit from a Microchip evaluation board. Made PCBS and that bit didn't work. After some head scratching figuring out how that bit was supposed to work and why it wasn't I find a couple of pull up resistors attached by net labels sitting in the corner of the last page of their schematic. The cruddy CAD package they use for most of their stuff which produces PDFs with stroked font text which can't be searched doesn't help either.I would definitely require net labels used to make connections to be placed on stubs and recommend that they be grouped and aligned to make finding other instances easier.

author: AlfBaz
author_rank: Super Contributor
timestamp: May 03, 2013, 02:44:14 am
content: Quote from: Rufus on May 03, 2013, 02:32:31 amUnfortunately this can be an invaluable tool in identifying nets that require special attention in the PCB layout and this can always create arguments between those that use the schematic for circuit comprehension and those that use it to convey info to the PCB layout tools

author: Neilm
author_rank: Super Contributor
timestamp: May 04, 2013, 06:24:23 am
content: Quote from: VK3DRB on May 02, 2013, 11:44:51 pmWhere I work, you won't even get a schematic in the service manual. You get a block diagram - although if I have written it any interesting signals will have a waveform if you need it to figure out if the board is faulty.QuoteTrue - my pet hate is two wires joining in as they cross. I use Orcad and have had several problems when nets that should not connect when they cross have connected. I use new labels to try to avoid this.I also don't like it when there are several nets run in parallel that snake of over the schematic but all head to different locations. You end up having to trace them out to work out where they go.QuoteThe libraries I use at work are fixed - if we don't use them then we don't get the information into the BOM. The worst problem is that they are maintained by the mechanical designers, so when they do a symbol I tend to have to ask them to alter it. Even if I have given them a note to say how I want the symbol to look.Neil

author: jmole
author_rank: Regular Contributor
timestamp: May 04, 2013, 06:33:52 am
content: Still learning altium, my main experience has been with EAGLE, but I think this is a decent rule:Cross-sheet connections may only be through named ports, power nets, or ground nets.

author: free_electron
author_rank: Super Contributor
timestamp: May 04, 2013, 02:25:11 pm
content: Quote from: jmole on May 04, 2013, 06:33:52 am+1 on that !

author: nctnico
author_rank: Super Contributor
timestamp: May 04, 2013, 04:01:21 pm
content: A few more rules for diagrams:- no swastikas- only T connections (no crossings)

author: G7PSK
author_rank: Super Contributor
timestamp: May 04, 2013, 04:25:01 pm
content: Surely a circuit diagram should give enough information so that any one with a modicum of knowledge would be able to construct the circuit and it will work.I have come across many diagrams that have been drawn on a cad program that do not allow this whereas the old diagrams that were drawn out by hand usually do, most likely due to the fact that the old school draughtsmen had experience in all fields of design and construction, I have come across this with other engineering drawings as well the cad operators had little or no practical experience during their training and so did not know how it works on the shop floor when making things.

author: Rufus
author_rank: Super Contributor
timestamp: May 04, 2013, 05:09:35 pm
content: Quote from: G7PSK on May 04, 2013, 04:25:01 pmNot really. A part list and a net list provides the information required for someone to construct the circuit.As the name implies a schematic should convey the scheme of the circuit. In most cases I would rather not see a schematic cluttered with detailed information required to construct it.I think there is generally a conflict between designers who consider a schematic as something to represent and convey the scheme of a circuit and the CAD types who consider it to be a graphical entry method for producing net lists and part lists.

author: c4757p
author_rank: Super Contributor
timestamp: May 04, 2013, 05:14:07 pm
content: Quote from: Rufus on May 04, 2013, 05:09:35 pmThis is indeed what the name implies, but to me that's more of a block diagram. Those have their place as well, but I agree that a circuit diagram should convey all the necessary information that a reasonably knowledgeable engineer would need to build the circuit. Perhaps it's more that "schematic" is a poor name than that this is a poor method.Obviously there are many "CAD types" who just vomit components and text onto a page and call that a schematic, but that doesn't mean reducing the amount of content is the right answer, it means it needs to be organized better.

author: Rufus
author_rank: Super Contributor
timestamp: May 04, 2013, 06:13:31 pm
content: Quote from: c4757p on May 04, 2013, 05:14:07 pmThere are 'CAD types' who may insist schematics show component footprints or company database part numbers. Who may insist all schematic symbols show all power, no connect and mfg test pins. Who may insist schematics include symbols for mechanical items such as nuts and bolts and the bare PCB because they want a part list generated from the schematic to include them. Who may insist the schematic includes symbols for mounting holes (with no electrical connection) so a footprint for a mounting hold gets automatically pulled into PCB layout. Who may insist the schematic prominently includes "DO NOT SCALE" and "REMOVE ALL BURRS".There is a whole host of crap 'CAD types' might want shown on a schematic which detracts from its primary function. Depending of course on what you think the primary function of a schematic is.

author: nctnico
author_rank: Super Contributor
timestamp: May 04, 2013, 10:03:58 pm
content: Quote from: c4757p on May 04, 2013, 05:14:07 pmTime for an anecdote: one of the junior engineers in a company I worked for got the task of creating a rather large circuit consisting of several FPGAs and other stuff. Instead of creating several pages he created one huge diagram. When he printed it he spend quite some time taping the pages together. One of the senior engineers asked for wall-paper glueWe quickly gotten to the conclusion that the senior engineers should have given the junior engineer more support and we all goofed up.

author: jmole
author_rank: Regular Contributor
timestamp: May 04, 2013, 11:01:40 pm
content: Quote from: Rufus on May 04, 2013, 06:13:31 pmDepends on what stage of the design process you're at. If you're building a board, the schematic you design for the board should definitely have stuff like mounting brackets, heatsinks, etc.If you're at the conceptual stage, or SPICE simulation stage, probably there's no need for it.This is why multi-sheet design is really great. Design subcircuits without the extra PCB mfg stuff, that you can run through SPICE, then use them as referenced documents in a larger sheet that is board specific.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: May 04, 2013, 11:19:58 pm
content: I really hate what seems to be a recent trend of just dumping a load of symbols down, sticking some net names on and thinking that's Job Done.OK for complex circuits, having wires drawn between all nodes can get complicated, but for simpler ones it's just laziness, and makes it hard to read.In particular it's very hard to see how many different places one net is connected to.QuoteThat is just unforgivable.

author: AlfBaz
author_rank: Super Contributor
timestamp: May 04, 2013, 11:26:05 pm
content: Microchip are famous for this style of drawing and to top it off they publish the schematic as a non text searchable image, pasted into a PDF

author: jmole
author_rank: Regular Contributor
timestamp: May 04, 2013, 11:31:32 pm
content: Quote from: mikeselectricstuff on May 04, 2013, 11:19:58 pmOne thing I like about EAGLE is the SHOW command, which will highlight all traces, pins, and PCB pads/traces with a given net name. Haven't found this in Altium yet, but I'm still exploring.

author: AlfBaz
author_rank: Super Contributor
timestamp: May 04, 2013, 11:55:12 pm
content: Quote from: jmole on May 04, 2013, 11:31:32 pmALT + click on a net or line and CTRL + double click on a port to take you up a level

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: May 05, 2013, 12:20:33 am
content: Quote from: jmole on May 04, 2013, 11:31:32 pmThat doesn't help you if you're looking at a PDF

author: grenert
author_rank: Frequent Contributor
timestamp: May 05, 2013, 12:48:46 am
content: Quote from: mikeselectricstuff on May 04, 2013, 11:19:58 pmFor years, this DIY audio company has been guilty of horrible schematics that make my head hurt:

author: c4757p
author_rank: Super Contributor
timestamp: May 05, 2013, 01:15:08 am
content: Quote from: Rufus on May 04, 2013, 06:13:31 pmWhy is this a bad thing, again? If the information is properly organized it won't get in the way. It's all part of the circuit design - why is some less important than others?Quote from: mikeselectricstuff on May 04, 2013, 11:19:58 pmYep. That is absolutely atrocious - there's no excuse for that. If I can't see at a glance if anything else connects to a certain point, you've failed.

author: codeboy2k
author_rank: Super Contributor
timestamp: May 05, 2013, 03:51:42 am
content: Quote from: grenert on May 05, 2013, 12:48:46 amThat schematic has way too much audio magic for meLets see... LED voltage references. check... dual constant current sources.. check.. discrete opamp .. check!thumbs up all around

author: Scutarius
author_rank: Regular Contributor
timestamp: September 10, 2020, 02:15:13 pm
content: Hi everybody!I was searching on google images the most eye pleasing schematics out there (tidy, organized, good practices, how to highlight info etc) just for having them on my desktop and taking a look for time to time.Could you share in this post any of your personal sch that your are really proud of?PS: I saw a post on LinkedIn about adding more information at the symbol level on passive components, I think it is worth it.https://www.linkedin.com/feed/update/urn:li:activity:6707952060152844289/

author: Mechatrommer
author_rank: Super Contributor
timestamp: September 10, 2020, 02:55:36 pm
content: Quote from: mikeselectricstuff on May 04, 2013, 11:19:58 pmhere... a gift for your pet hates (attached #258)... i dont call it laziness, i call it saving time during refactoring... work smart, not work hard. luckily i work alone as a hobbiest, not a pro with many colleagues, so i dont think i will hurt anybody... ie for my eyes only. but if someone need to understand my circuit, get along...

author: radar_macgyver
author_rank: Frequent Contributor
timestamp: September 10, 2020, 03:18:03 pm
content: ^^ I'm just going to look the other way and assume Mechatrommer is trollingI've started to make my schematic symbols for complex ICs indicate what they do internally. This is not always possible (for example FPGAs or microcontrollers) but for things like RF MMICs, it helps to understand the signal path if for example a mixer symbol internally shows the traditional RF mixer symbol, rather than a rectangle with some pins on it. Shown below is my symbol for an LMX2594 synthesizer.

author: Scutarius
author_rank: Regular Contributor
timestamp: September 10, 2020, 04:21:38 pm
content: I like the idea! I don't recall ever seeing that before.Thanks for sharing.

author: merport
author_rank: Newbie
timestamp: September 10, 2020, 05:52:04 pm
content: In ancient times, the engineer would hand draw the schematic, hand it off to a technician to prototype, evaluate. So I think readability and theory of operation awareness where part of the process. Then the draftsman would get involved followed by the assembly people. Modern electronic interfaces and packaging have created a different process that relies on computer entry for most of the work flow.I don't know what work flow standards there are in the EE world, but from reading comments here, the work flow is based around the development tools. So what to do. I guess have the software nag the EE that they are not using the proper style. Perhaps have a variety of style templates that can be build into the software.

author: free_electron
author_rank: Super Contributor
timestamp: September 10, 2020, 08:40:27 pm
content: Here is the definitive , keep you nose clean , avoid trouble, guide to drawing schematics.1) symbols have pins that represent physical pads on the board.2) connections are made using WIRES between pins on a sheet.3) netnames are just that : names to apply to a net as opposed to letting the machine use net_xxxx format. The name is there so you can find the bloody damn signal on the pcb layout.4) netnames do NOT infer connection and should NEVER be used for such purpose. Anyone drawing schematics with netnames dangling directly off pins should be re-educated. if that fails : fired and prohibited from ever designing anything again.5) read 4 again6) connectivity leaving a page does so through a port or a power object. NOT through net-names ( read 4 again )7) wires attached to a power port or port do NOT get a net-name. The port names the wire. you do not want to tie two different net-names to 1 wire ! that is asking for troublecrossing wires NEVER connect. Connections are made only on T-junctions !9) instantiated pages higher in the hierarchy use wires to connect ports together. of port names are identical on all sub-sheets there is no need to name the wire. If port names are NOT identical then the wire must be named.10) Higher up names in the hierarchy override lower level names.The above 10 rules will guarantee a clean ,readable, block reusable , design where you can do multichannel designs using <repeat> constructions without running in to massive undetectable short circuits.Do not try to outsmart the software ! you are only going to muck it up into a mess that is impossible to untangle unless you know what to look for. Every time a new guy shows up with questions like 'every time i do an update it removes a bunch of nets and loads different ones . on the next update it puts the old nets back and removes the new ones .. what is going on ? ' the answer is : you apparently do not know how to draw schematics.if you are going to do multilevel hierarchy : use a strict hierarchy where power ports are restricted to the page they reside on.an example :Run a netlist and you will find that the centerpoint between the two transistors is tied to .... GND ! why ? because the wire has no name so it takes on the name of the port (GND). We also did an override on ISO_GND by naming it GND.You will also find a big fat short between the gates , becasue they both get names GATE_DRV...You have a half bridge that will bounce the ground of the control electronics up and down between +450 and -450 volts ! Now imagine someone making a 3 phase version of this .... all three phases are shorted , and shorted to the control ground. all the gates are shorted so all transistors fire at the same time. Power this thing up , fed from a 50Kwh Stationary storage LiIon pack and you will be lucky if they find your shoes , or any remains from the lab at all ...

author: richard.cs
author_rank: Super Contributor
timestamp: September 10, 2020, 10:38:53 pm
content: Quote from: radar_macgyver on September 10, 2020, 03:18:03 pmI do this as much as possible, often there is a diagram in the datasheet which is a good example to work to, usually with some simplification. Some examples attached (and yes I have found occasion to use a 723 in the modern world).Another pet hate that relates to symbols matching packages is components with several distinct sub-parts drawn as a single symbol. A dual transistor package with them both drawn as a single part so they can't be moved relative to each other just doesn't allow a sensible schematic in most cases.

author: Chris56000
author_rank: Frequent Contributor
timestamp: September 16, 2020, 01:57:52 pm
content: Hi!That's what I do with my Abacom sPlan 7 software – it was bought to document an already designed product for repair purposes, so I lift the i.c. internal block diagram from the datasheet (where it's not too complex!) and trace over it to produce the i.c. circuit symbol.Far too many people who buy (or get bought for their job) multi–£K EDA tool licences still have the horrible habit of bunging down D.I.L. Symbols with the pins in the original order, so you end up with in omprehensible mazes of crossing wires, or they just give up with the pin stubs going nowhere and a load of equally incomprehensible labels on them!If you look at a circuit diagram for an analogue CRT TV, or an old VCR, etc., it was virtually standard practice to show analogue i.c. devices in block form, and if the device designer made a good block layout to begin with, you can easily work out what the external components connected to the device do, which you can't do with Altium's & KiCAD's garish yellow boxes!My standard for circuit diagrams was to aim for the quality of those produced by Thorn/E.M.I./Ferguson, the last of the large British Consumer OEM's, their diagrs were based on principles laid down in BS 3939: 1975 (and as amended) – if like me, your main need is documenting existing items for repair, (then unless you need to design/manufacture a complete new PCB, in which case you do need a complete EDA tool or online equivalent, e.g., easy EDA), use something like sPlan 7, or learn KiCAD (Udemy have had a £10 offer on a full Electronics & PCB course from time to time).Another gripe is schematics with all the connection marks left on it, all the pins "1" and "2" on passive components, net labels cluttering it up everywhere etc., etc., you don't need all this rubbish on the final diagram – this is caused by not properly setting the display and print options after installation!As to all the garish yellow i.c. boxes and symbols, etc., again I never use them, I make my own symbol based on the i.c. datasheet block diagram as described above!And please, can we get out of this horrible bloody habit of using Times New Roman on Altium's drawings please? Chris Schroeder wrote in his book "Inside Orcad For Windows" (Internet Archive) –"serifs and other embellishments have no place on technical drawing lettering!"Again this is because users are too lazy to set up the global system Font Options after installation – Altium and Orcad offer full schematic TTF support, so there's no excuse for not using proper CAD type lettering – these packages do add some to the "Fonts" folder when installed!My best tip is to download as many free service manuals as takes your fancy, e.g., H.P., Tek, etc., and see how they do it!Chris Williams