A shift register IC with individually settable tristate outputs ? - Page 1
Forum section: electronics / projects

author: Psi
author_rank: Super Contributor
timestamp: April 14, 2014, 11:46:36 am
content: As the topic says, i'm wondering if such a think exists in a discrete ICA shift register where each output can be set 0,1 or tristate by the input data stream.I need to clock the serial out at about 1mhz with a 48mhz MCU driving it so being able to"load it with data all at once then let it run"is a big plus to take load off the MCU.Obviously it would need two input bits for each output (to handle the 3 possible states)

author: Kjelt
author_rank: Super Contributor
timestamp: April 14, 2014, 11:57:00 am
content: CPLD and program it yourself? Sounds like a real custom ic to me not something off the shelf.

author: Psi
author_rank: Super Contributor
timestamp: April 14, 2014, 12:02:24 pm
content: yeah, i was afraid of this.I might try running the two build-in SPI ports of the MCU in parallel and combine the outputs somehow to get H/L/Tristate

author: tszaboo
author_rank: Super Contributor
timestamp: April 14, 2014, 12:24:34 pm
content: You can daisy chain two shift register, and route the output of one to two 74xx126 or similar IC. Or 4 bit from one register sets the output, 4 sets it tri-state, or any combination...

author: free_electron
author_rank: Super Contributor
timestamp: April 14, 2014, 03:07:01 pm
content: Pca9535 or 9565 should be able to do that.If you flick a pin to input it becomes hi impedant. If you set it to output one chip is hard pull down , pull up , the other is a true pushpull.You can blast them at 1MHz i2cThe chip is register based. There is a control register where you can flick a bit to turn off the register autoimcrement. Set the config registers once. Then flick the autoimcrement off and send a packet to the io register. If you dont send a stop you can keep blasting bytes. If you blast at 800kz clock you will get roughly 100k updates per second.Cpld is your other option.

author: Kjelt
author_rank: Super Contributor
timestamp: April 14, 2014, 07:10:44 pm
content: Quote from: free_electron on April 14, 2014, 03:07:01 pmThat one has 400kHz I2C not 1MHz, the other one is unknownPersonally I don't trust I2C port expanders for blast and forget applications but that might be my bad experiences.I have had a couple of problems in the past with sporadically stuck I2C busses from expander chips (microchip not NXP BTW) and since then i always read back what I have sent to them in order to be confident and if I am going to use I2C chips in the future I insist that they have a reset input.

author: free_electron
author_rank: Super Contributor
timestamp: April 14, 2014, 08:53:25 pm
content: you can run them at 1MHz without problems.the other type number could be a 9555 .. there is a whole series of em.i2c is robust if done properly. most software libraries are badly written. microshit … they have weird behaviour in their registermap. bass-ackwardsi suspect microchips are actually programmed microcontrollers and not hard logic ...

author: Psi
author_rank: Super Contributor
timestamp: April 15, 2014, 09:37:39 am
content: Thanks guys.Quote from: mojo-chan on April 15, 2014, 09:29:36 amIm using a STM32 but i can't see any way to output a tri-state stream of data in hardware without using multiple ports at once plus some external components. As far as i can tell all the built in serial hardware devices can only output data in push/pull or open drain but not all 3 together.

author: Rerouter
author_rank: Super Contributor
timestamp: April 15, 2014, 09:54:48 am
content: i think he means bit banging the output, using both the port output register and the port direction register,

author: Psi
author_rank: Super Contributor
timestamp: April 15, 2014, 09:58:16 am
content: yeah, i dont think the 48mhz STM32F0 has enough power to bitbang at 1mhz without any jitter while processing other interruptsPreloading the SPI FIFO with 16bit chunks and letting it run should work, but i'd need to use both SPI ports and external logic to get a tristate system.

author: veryevil
author_rank: Unknown
timestamp: April 15, 2014, 12:03:47 pm
content: You could easily do it with a 2 x non-inverting octal tristate buffer 74xx126 and 2 x 74xx595.Chain the two shift registers together and have one as the tristate enable lines on the buffers and one as the outputs.EDIT: NANDBlog got there first

author: daveatol
author_rank: Regular Contributor
timestamp: April 15, 2014, 02:44:23 pm
content: A rather cheap and lame method would be to use diodes on the shift register outputs; two outputs, two diodes (one provides pull-down, the other pull-up - or Hi-Z if both reverse-biased). Alternately a single MOSFET between two SR outputs (G & S -- the Drain is the output) can be used for a similar effect.

author: dannyf
author_rank: Super Contributor
timestamp: April 17, 2014, 11:35:12 am
content: QuoteOne obvious solution would be to use a mcu.If that doesn't work, use OC/OD or diodes on the output + high value pull-up/down resistors.If that doesn't work, use two ports / shift registers, one to control the output states ('0' or '1'), and another to control direction via a switch.

author: hooverphonique
author_rank: Contributor
timestamp: April 17, 2014, 08:38:09 pm
content: is the thing you're looking for an 8 bit serial load, parallel out shift register with individually tristatable outputs?if so, do you not have the option of selecting a compatible mcu with more pins, so you can use an 8 bit mcu port? or am I misunderstanding something here?

author: SL4P
author_rank: Super Contributor
timestamp: April 18, 2014, 01:21:26 am
content: OK, here's the really dirty way for a quick one-off home project!Run 'n' buffered shift registers inparallel(not serial), and pick one bit off from each SR.Then you can twitch the OE pin on each individual SR with a regular port output - to achieve exactly what you want!Horrible - but in a pinch !

author: dannyf
author_rank: Super Contributor
timestamp: April 18, 2014, 01:28:35 am
content: QuoteRun two shift registers, one controls the data and another controls analog switches.

author: free_electron
author_rank: Super Contributor
timestamp: April 18, 2014, 05:15:20 am
content: Quote from: dannyf on April 18, 2014, 01:28:35 amThat is how i do that in an fpga. We have a domain specific serial protocol. Looks like spi but it isnt as the addressfield length can change on the fly.High priority address is 1 bit. Second priority is 2 bits.So 1data32, 001data32,010data32,011data32,000<5bit addr><16 bit data>I blast that using three shifters. One has the bitpatter, the second has the tri pin of the buffer after the first shifter, the third controls the select line.

author: Psi
author_rank: Super Contributor
timestamp: April 18, 2014, 11:33:52 am
content: Thanks guysYou've all given me some good ideas to pursue.