AVCC decoupling - inductor or ferrite? - Page 1
Forum section: electronics / general

author: knotlogic
author_rank: Regular Contributor
timestamp: March 31, 2017, 02:40:10 am
content: I'm laying out a board withAtmel'sMicrochip's ATmega164P, and I'm curious about one piece of recommended practice they have in theirdatasheet(page 216): They recommend that the analog voltage pin should be hooked up to VCC via a low pass filter consisting of a 0.1 uF capacitor and a 10 uH inductor. Wouldn't a ferrite be a more appropriate part in this case?They also have an app note:AVR042: AVR Hardware Design Considerationswhich shows an inductor in one of the schematics, but also describes using a ferrite elsewhere...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: March 31, 2017, 02:48:38 am
content: Even a 1kohm ferrite bead is about 3uH at low frequencies. Inductors come in much larger values, and have the bonus of not saturating under DC bias.More important, though, is having a critically damped, to overdamped, amount of capacitance and resistance. Ideally, you should use a ceramic e.g. 0.1uF capacitor, to provide a low impedance bypass at high frequencies, then damping with a bulk capacitor >= 0.47uF that has ESR (which can be ceramic plus outboard resistor, or tantalum or electrolytic). The ideal ESR is calculated from: R = sqrt(L / Cbyp). Somewhat lower ESR is okay too, but don't go below sqrt(L / (Cbyp + Cbulk)), or it will be underdamped again.Tim

author: amitchell
author_rank: Regular Contributor
timestamp: March 31, 2017, 03:23:30 am
content: I have had more luck using a 10R resistor in series with VCC and AVCC, followed by 1.0uF and 0.1uF caps. Watching to make sure AVCC is within its voltage tolerance of VCC of course. Anyways you can repopulate with an inductor or bead in the same footprint as the resistor if that works better for you.I think the 10R 1uF combo puts you around 16kHz corner frequency.

author: westfw
author_rank: Super Contributor
timestamp: April 07, 2017, 06:39:02 am
content: Aren't ferrites mostly for higher frequency noise (5MHz+), while the LC filter for the Vcca on AVRs is aimed more at noise near the frequencies that the A2D is actually operating at? So you might use a ferrite between your fancy 3MHz SMPS chip and the AVR, or to keep the USB signal frequencies from getting radiated on the power wires, but the Vcca filter should be aimed more at the ~100kHz noise generated by random other events on the power bus, that are similar to the A2D clock itself?

author: KE5FX
author_rank: Super Contributor
timestamp: April 07, 2017, 07:08:13 am
content: Don't use an inductor and a capacitor together unless you actuallywanta resonant circuit. In this case, a small resistor -- 10 to 100 ohms -- would be a good idea, either across the inductor or in series with it.Two things happen when you use an undamped LC circuit for power-supply filtering. One is that the noise isn't so much suppressed as "herded" into the portion of the spectrum near the corner frequency, resulting in a large noisy peak. The other, if the inductance and/or capacitance is large enough, is that you'll get a big resonant spike during power on/off conditions that can damage other components.

author: nctnico
author_rank: Super Contributor
timestamp: April 07, 2017, 12:02:39 pm
content: Using an inductor + capacitor is a recipe for dissaster indeed. I'd use a ferrite bead because that is designed to dissipate the high frequency noise.

author: tatus1969
author_rank: Super Contributor
timestamp: April 07, 2017, 12:29:40 pm
content: A capacitor and an inductor form a resonant circuit, which will amplify everything at its resonance frequency. In this circuit, low frequencies will pass, high frequencies will be blocked, but interference at the resonance frequency will be amplified.The standard solution to this problem is to make the filter dissipative. You can either add a resistor in series, with the inductor, use an inductor with high ESR, or use a ferrite instead of an inductor.This restricts yourself in the amount of inductance that you can have. You want high inductance, because that moves the filter's corner frequency to lower values. But having done that, you also need more resistance. But too much resistance in a power supply is not good either.What you can do is choosing the maximum resistance that you can live with, choose the maximum capacitance that you can or want to pay for, and calculate the inductance of choice from that. If you use an inductor plus series resistance, or a ferrite bead with suitable parameters, is up to you.Caveat: when it comes to filtering very high frequencies, make sure that your inductor or ferrite bead have a self resonant frequency that is higher than what you need. Or use them in conjunction.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 07, 2017, 03:33:13 pm
content: Quote from: tatus1969 on April 07, 2017, 12:29:40 pmAll you need to do is make the capacitor lossy, at the transition frequency (where a resonant peak falls if there is no loss). You can keep a low impedance (high attenuation) at high frequencies by using a low-ESR bypass cap, and keep the damping by using a high-ESR "bulk" cap.Tim

author: tatus1969
author_rank: Super Contributor
timestamp: April 07, 2017, 04:22:34 pm
content: Quote from: T3sl4co1l on April 07, 2017, 03:33:13 pmThe drawback of this is that for high frequencies your L filter only interacts with the smaller low-ESR cap, which reduces the attenuation. It probably depends on what is more important. If you need good filtering, put the resistance in series with L, if you need little voltage drop, put it in series with C.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 07, 2017, 05:57:27 pm
content: Yeah but do that again with the same 10u + 4 ohm and see what it does.Or if you use a low ESR 10u (ceramic, say), then check with a 47u electrolytic in parallel with it. Or so forth.Tim

author: tatus1969
author_rank: Super Contributor
timestamp: April 07, 2017, 06:37:32 pm
content: Quote from: T3sl4co1l on April 07, 2017, 05:57:27 pmright, I was comparing apples and pears. Lets put it that way: if voltage drop is not an issue, then use R in series with C[low ESR]. If it is, then add the lossy damping instead and accept the additional cost and board space penalty. That assumes of course that the resistor in the first case is not a power device.

author: knotlogic
author_rank: Regular Contributor
timestamp: April 10, 2017, 03:44:08 am
content: Thanks all! (Especially Tim)What's interesting is I remembered reading a post somewhere a long while back talking about power supply caps for op-amps. Conventional wisdom was a 0.1 uF and 4.7 uF in parallel, but it was old advice from back when that was a leaded 0.1 uF ceramic and a leaded 4.7 uF tantalum. The only datasheet I was ever able to find put the ESR of the tantalum at about 4.7 Ohms, and in this discussion it was suggested that if you replaced both parts with modern low-ESR MLCCs, you'd end up with resonant tank where the parasitic inductance of the larger cap met the capacitance of the smaller one. The solution? A bit of resistance in serial with the larger cap.Quote from: T3sl4co1l on April 07, 2017, 05:57:27 pmDidn't he do that? (I'm terrible with SPICE - need to work on that)Quote from: tatus1969 on April 07, 2017, 06:37:32 pmUh, just to check, don't you mean if voltage drop *is* an issue then the R goes in series with the C? Comparing what you wrote in your post before that (the one with the sim).I'm actually surprised that the larger cap doesn't contribute to attenuation...

author: ohdsp
author_rank: Contributor
timestamp: April 10, 2017, 09:36:24 am
content: From real life testing a 600R ferrite bead with 47r/100pf in series to ground next to the ferrite bead - and other usual filter caps (10uf, 100nf, 10nF) - works well under a lot of EMC testing situations. Also a 1 Ohm resistor in place of the ferrite bead is fine on low current supplies up to a few tens of mA, or more if supply variation is ok. This will also depend on the ability of the PSU to drive low impedance capacitors without ringing/being unstable.These combinations where test in a G-Strip and GTEM cell upto 2.7GHz, have no data on this anymore but application was in vaguely safety critical products.Have also found in simulations that adding a good 220uF electrolytic capacitor with the above parts seems to give a good simulated response across the board; but depends on the ferrite bead you use and may need tuning.Some datasheet filters seemed to be tuned for specific frequencies; such as TDMA noise from mobile phones. This may indicate a know issue with the part? Always worth considering.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 10, 2017, 06:02:52 pm
content: Quote from: ohdsp on April 10, 2017, 09:36:24 amThe 47R + 100p won't do anything once you've loaded it down with the rest, but this is good advice for signal inputs that should be filtered but otherwise retain useful bandwidth (e.g., low speed (up to ~Mbit) pins). The C can also be, in part, a TVS, to give excellent ESD and surge ratings.Once you add bigger C, they dominate, and it's all about their ESR.Which relates to another bit of paranoia: stacked values/sizes of caps. It's BS, and likely to make things worse.QuoteThat seems backwards -- ferrite beads are fine up to 10s of mA, sometimes 100s of mA. They are rarely, if ever, good up to their rated (DC thermal) currents, however, so they shouldn't be used on high-power rails. For those, a proper inductor is needed.What's the difference between a ferrite bead and an inductor? Both are available in multilayer types, and comparable SMT chip sizes. Well, a ferrite bead is ungapped ferrite, while the inductor is gapped somehow (probably a distributed gap, so the material has lower permeability; or a powder composite is used, with the same property). The inductor saturates relatively sharply, at a relatively high current, thus storing much more energy. The ferrite bead saturates at low current, storing very little energy.It's the same as comparing a common mode choke to an inductor. A CMC is really better thought of as a poorly made transformer: it's not intended for storing energy, indeed, it stores as little as possible,which is another way of sayingits inductance is maximal, and it saturates at very low current.A ferrite bead is a single winding CMC. Which makes it a DMC as well, but you need to use that property carefully, otherwise it saturates and its filtering advantage goes away.As for resistors, like 1 ohm resistors, it's always been a really weak way to go:1. If you don't need the filtering, if it's just unproven paranoia, why bother at all?2. If you do need the filtering, you probably need a lot more than the couple dB a resistor can offer you.3. Or, to get the same dB at the same cost, you can use a small inductor and less capacitance, versus a resistor and a big pile of capacitance!QuoteThat's good. Confirming the efficacy of your filtering, and shielding, is a necessary step -- one which very few engineers actually take the time to do!You know what they say, "no one ever got fired for using too many [as opposed to, too few] bypass caps". Well, that's wasted production cost. And, using bypass caps carelessly isworse. The only reason app notes continue to recommend it is, you're less likely to carelessly bungle it, using too many, than too few. Well, if you're going to resign yourself to ignorance, sure, spam them around, but ignorance is no way to insist upon living your life.QuoteAnd now we enter fully into power distribution network (PDN) territory.The PDN is a network like any other: since it's loaded with capacitors, the trace lengths (transmission lines) can be approximated as series inductors. You have a CLCLC... network, which therefore has a characteristic impedance Z = sqrt(L/C) (for whichever sets of L and C you wish to find the impedance of), and a cutoff frequency. And, as a network, it's only dampened by real losses: anywhere you provide ESR on par with Z, you'll have good damping.And when you provide damping in that way, the only way to do it, is by capacitor-coupling it in with an oversized capacitor. This is why the "bulk cap" should be several times C, and this is also why the bulk capis not there for energy storage, but rather, dissipation!Bulk caps by the PSU may be for energy storage, in which case they probably have much lower ESR as well. You can tell because the voltage across the capacitance is changing: ripple voltage means reactive power means energy storage is being used.Bypasses are specifically intended not to store energy, but to keep a low impedance -- precisely the inverse of common mode chokes and ferrite beads, and this is no accident!QuoteAlways know your noise source! A simple CLC filter, made with through-hole components, looks like a matching network at high frequencies! The capacitor ESL and inductor EPC allow very high frequencies to pass right on through (and also radiate off those components, if applicable). A very wideband filter needs to be made of several stages, tapering the cutoff frequency up as you go. You can keep attenuation over 80dB over as many decades as you like, you just have to account for the parasitic properties of the components you're using.Tim

author: ohdsp
author_rank: Contributor
timestamp: April 10, 2017, 08:47:09 pm
content: Wow, extensive response there!Quote from: T3sl4co1l on April 10, 2017, 06:02:52 pmChoosing capacitors based on size alone is pointless, and can make things worse. But again from real life testing, if you choose the capacitors based on the impedance vs frequency you can nail EMC issues on the head in 1 or 2 component changes instead of chasing around the circuit like a headless chicken. But only if you have suitable filtering on all supply and input/output nodes for a circuit so you don't move issues to another part of the circuit.If you look at capacitor datasheets you can get the impedance low across the desired frequency range (few MHz to GHz) by using a few increasing decade values of capacitors (1nF, 10nF, 100nF). You have to consider that this filtering is needed for both external and locally produced interference.Even if you spend your life designing a circuit around maths, and transmission line theory, or PDN theory, or any theory and maths; there will be something that will bite you when it's on a real PCB in a real environment being bombarded by several TV transmitters; mobile phone masts; WiFi networks and so on (simulated or real!). Black magic comes to mind; and there will be plenty of engineers that call BS on this; but i've not meet any in real life designing/passing real PCBs who would!I am sure complex COMSOL simulations may help this but it is past most companies/projects. Chucking the circuit in a test chamber and tweaking it the old fashioned way can be just as effective, assuming you design it right from the start. Leaving extra spaces on the PCB for the 1nF, 4.7nF, 10nF or whatever caps you may need costs nothing if there is PCB space left for the footprints. You can always no-fit them.How this relates to the OP; If you are designing a PCB and are filtering your AVCC supply then more capacitor footprints are not a bad thing; but you need to test/tune the PCB in real life if possible otherwise you can make things worse and not better. You also need to make sure they connect close to the supply pins with low impedance connections to ground or they won't do anything useful at all. Datasheets can be full of all sorts or rubbish and out right incorrect data; but it is probably a better start than nothing.Quote from: T3sl4co1l on April 10, 2017, 06:02:52 pmA 1R resistor can do the same thing as a ferrite bead at lower currents, but is higher resistance than the ferrite beads I worked with. If you are developing commercially and need to save money it is a neat trick that works just fine in some cases. There are plenty of good reasons for using a CRC filter (which if what you basically end up with), there are reasons for not using it. All depends on situation and the application.Quote from: T3sl4co1l on April 10, 2017, 06:02:52 pmA lot of this work was from a very experienced designer engineer (50 years+); I would not question what I was told simply because real world experience is a league above maths and simulations in 99% of cases.Quote from: T3sl4co1l on April 10, 2017, 06:02:52 pmAgain if PCB space is available then footprints cost nothing; a lot of IC's call for decoupling on every pin which may not be possible. Depending on the IC it may be needed; most computer boards and CPUs I have seen have as many bypass capacitors crammed in around/under/in the sockets they can fit in. If you are using something like an Analog Devices ADAU1452 or XMOS chip running at ~300MHz you may need it, otherwise an ATmega164P would do with a few 100nF close to the chip and a couple of bulk caps close to it. The amount of caps you need depends on your application and your statement seems like the definition of ignorance.Quote from: T3sl4co1l on April 10, 2017, 06:02:52 pmGreat, never looked at PDN Theory; but I am sure it doesn't apply on my PCBs with a chip pulling a couple of hundered mAs at a regular frequency over a 2 inch trace. Maybe i'm wrong but haven't seen proof of it yet; however I am always happy to improve my engineer ability. My view is if it makes my circuits more immune to everything (RF, conducted, surge, ESD, whatever) then I will happily slap it on willy-nilly if my budget allows. I decided to play with the above filters in LTSpice for my projects I am working on and adding a few 220uF caps looked like they would improve what already seems to be good design (the 47R+100pF that did make a difference in a real life test scenario along with 100nF and other caps).At the end of the day maths and theory is great, but I find it dull and boring compared with real life working circuits.For the OP if I was designing a circuit and wasn't sure I would probably leave space for the datasheet filter, but I would also incorporate my 600R/47pf,100pF/100nF/10nF filters because I know these work in real life. LTSpice sims can show you the interaction as long as you can model the inductor/ferrite bead parameters properly.A lot of these filters are designed for external interference that may upset your IC; an ATmega164P would have once been fine with 1 100nF capacitor and 10uF aluminium electrolytic close by. These days with so much interference around this is not true anymore. If you used just that and put a noisy PSU on it who knows what will happen.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 10, 2017, 11:44:53 pm
content: Quote from: ohdsp on April 10, 2017, 08:47:09 pmThanks. I take my knowledge of E&M and network theory seriously!QuoteYup. Chip capacitor ESL is proportional to length, but more importantly, proportional to the trace length and vias (length, number and arrangement) used to connect to it.I mean, simply enough put: even a small value (<1nF) capacitor is a short circuit at RF (10s or 100s of MHz) -- it looks like a block of metal, or a solid trace. Any extra (0.1uF, 10uF) is just dropping the frequency where it looks like this (which is the SRF of the capacitor in circuit). The HF asymptote is independent of value -- it only depends on geometry.It's important for beginners to note all of these assumptions: the capacitor datasheet might plot impedance, but it's de-embedded at the fixture pads. A real circuit will have more ESL, so will exhibit a lower SRF.Many people blindly think that impedance curves can be stacked without consequence, but this wholly disregards the phase of those impedances, and the distances (and therefore stray inductances) involved in connecting them!QuoteBut just doing this with ceramic capacitors is folly: they resonate against each other, so that there are parallel resonant peaks, where the supply impedance is higher than the maximum required spec.At least there is some benefit from using type 2 dielectrics: the losses are higher, so the peaks aren't as exaggerated. You might have a peak impedance that's 20 times ESR, but if that's still in spec, you're okay.But make no mistake: if your spec is >20 times higher than ESR, you would have been fine without paralleling any at all.QuoteI'm a little confused on this: are you saying most believe in black magic, or that they should, because something always comes up?In my world, there is nothing that cannot be simulated, given sufficient time, expertise and budget. Yes, that can reach the levels of..:Quote...But, one can make quite reasonable assumptions about onboard components, and their dynamics. The fact that everything is on board, and that the board is designed with a solid ground plane, means that this is a tractable problem to solve, to sufficient accuracy.I might suppose "sufficient accuracy" is +/- 10% on magnitude impedance, over a DC-100MHz range, with looser accuracy above there.The fact that ground plane acts to shield otherwise-nearby traces from each other, and to shield traces from the nasty outside world, means we don't have to concern ourselves too much with the coupling matrix between every damn trace on the board, and any antennas that may be lurking nearby.COMSOL can crank out a complete model of a PCB in just this way -- that is, including all the trace inductances, capacitances and coupling coefficients -- but gosh, several things:1. The matrix ought to be nearly sparse. In practice, none of the elements will be zero (give or take rounding error), but also in practice, most should be small enough to ignore (like, 10^-9).2. We should remove the near-zero elements: ignore them outright, so the simulation can run faster, and so the model can be simplified. Indeed, that's central to my argument above: design the circuit, in the first place, so that a simple model is reasonable.3. And if the matrix is not sparse, then that speaks more to the crappiness of the PCB layout, than anything about the model, or further EMC performance. Consider what the coupling matrix must look like on one of those old e.g ZX Spectrum motherboards: two layers, CMOS/TTL signals everywhere, no ground plane in sight! It's a wonder any signals got where they needed, at all, even with the slow risetimes of the day.QuoteTrue, but: the underlying fundamental is that, more capacitors is not guaranteed to work better: it may be worse!If you can squeeze in some lossy capacitors in those positions, you can make it unequivocally better; but those are hard to come by in ceramic chip sizes. (And very small tantalums tend to have too much ESR for this. Modern low ESR polymer chips are probably good, but also much more expensive than plain ceramic.)I find myself often using a big ceramic in series with a physical resistor. This also avoids the other gotchas on lossy "bulk" types -- no surge or overvoltage sensitivity versus tantalum, no ESR drift versus electrolytic.Reserving a place like this near an IC supply pin -- an R+C, not just a C, gives you a lot more flexibility. With losses nearby, it becomes practical to connect capacitors in parallel, and achieve better results. (It still needs to be done properly, but the fact that you have to picksomevalue for that resistor, should prompt you to consider where that value comes from. Thoughtful design is better than spam design.)QuoteI didn't emphasize the difference very well there; the important factor is this: over what frequency range is a ferrite bead a higher impedance |Z| than the resistor?The resistor is 1 ohm, so that's easy. (Okay, it'll be inductive at very high frequencies, but so is an identical length of trace.)Typical example, Laird MI1206L391R. The impedance graph doesn't resolve 1 ohm, but assuming it's an L+R circuit at low frequencies, it reaches 1 ohm at about 260kHz.For all frequencies above there (up to the 3GHz limit of the plot), the ferrite bead is unequivocally better. (It won't be as good if you saturate it, but it's -3dB at 300mA, not too bad even for medium power applications!)Here's an equivalent circuit I constructed for the MI1206L391R:Code:.SUBCKT MI1206L391R 1 2R2 1 3 0.05R1 1 4 33C 4 2 1.6pL 3 2 0.61uRp 1 2 445.ENDSIt matches well within the low resolution of their plotted impedance. (L can be replaced with a nonlinear equivalent, to add saturation to the model. Probably, the other parameters remain constant, or change only a little.)You could consider this an "analytical continuation", so to speak. The model is physically realistic, the curve is reasonable, and there's no particular reason to suspect any funny business at low frequencies.So if your target is to filter MHz+ noise, the ferrite bead does an excellent job, and 1 ohm resistance... doesn't.However, there are still applications where resistors are handy:- Dropping resistors can be split up, and filtering added. This is handy for voltage shunt references.- Where modest value resistors are tolerable, the small additional amount of filtering, or isolation, or loss/dampening, can be helpful. (Whereas you might avoid a ferrite bead or inductor because of resonance and parasitic capacitance.)- Where other features of the resistor are valuable, e.g., current limiting, or fusibility.The last two reasons make R-supplied stages very common in RF circuitry.QuoteNow I take issue with that.Math and simulation are absolutely, unequivocally correct in this field.That we should be so lucky!We work within a field where this is even possible!Computer science has the halting problem.There can be no general approachto prove a computer program is correct.Biology combines our poor understanding of complex chemical reactions with our equally poor knowledge of the chemicals within biological systems. (It's not impossible, but it's a matter of information: systems must be modeled whole: thousands or millions of chemicals and their equilibria, and we're only scratching the surface.)Chemistry has quantum mechanics to deal with, but is at least tractable: molecular geometries can be computed with excellent agreement to real measurements. Though many models suffer from needing empirically derived parameters, or from intractable statistical mechanical problems (like solvents, and the mechanics of different phases of matter, not to mention phase transitions thereof). Chemistry is better likened to a natural language, like English: hundreds of rules, and thousands of exceptions to those rules.But in electronics, in principle, everything can be modeled. There are simulators for semiconductor physics. There are simulators for electromagnetic waves. There are simulators for magnetic and electric properties of materials (though usually approximated -- ferromagnetic and ferroelectric saturation for example). There are simulators for analog and digital logic circuits.It is down only to the designer, to decide which of these he shall choose. And having made a choice, to build realistic models of the system under study.And again, yes, many of these are impractical when one does not have the time or budget to invest in a more comprehensive solution. But a trained eye can quickly decide whether or not that's necessary to create a model of sufficient accuracy. (Calculating an approximation is much easier than calculating the exact solution; this is, in a sense, how SPICE works; and one can be trained to do the same, in real time, for problems like EMC!)QuoteFor this particular example -- they most likely need them. The supply network impedance for a 1V, 100A device is alreadystarting at10 milliohms, DC -- the AC impedance needs to be a small fraction of that. Microohms!It takes a lot of caps in parallel, just to get the ESR that low. It takes a lot of vias to the get ESL equally low.QuoteYes! Exactly! It depends on application!One should not spam bypass capacitors, nor throw them around carelessly.Indeed, SoCs can't possibly be supplied from on-board capacitance. Even for a BGA with a checkerboard pattern of VDD and VSS pins (but they're almost never designed this way), the inductance of the PCB-plane-to-die interconnect will blow the impedance spec at just 50 or 100MHz, let alone 300MHz, or harmonics into the 10s of GHz.For this reason, theymustintegrate bypass caps into the SoC. Which also eases the PCB designer's job.At the die level itself, there may be whole metal layers, doing nothing other than routing VDD and VSS. Studded with vias, the inductance is extremely low, and the capacitance is relatively high (probably 10s of nF?). Indeed, some ICs can self-bypass, even without a capacitive supply network: as long as maybe 1 in 20 of your CMOS gates are transitioning at the same time, their body capacitance will act to bypass their neighbors that are switching. Ugly, but it's digital, it only has to work for 0 and 1.All depends on the design. Sadly, many datasheets don't go into detail about such important things as power quality. So you're left to guess how much they put on there, and how much you actually need.There's also plenty of incomplete data out there. There are "X2Y" caps, that claim lower inductance. They brag about an FPGA application that was improved to ~half jitter, after "optimizing" bypassing with their special caps. What they don't tell you is how many iterations it took to get there, or if they tried to do the same with an equal number of conventional capacitors...I suspect that equivalent results would be had, if they simply removed the same pattern of (conventional) capacitors, and changed the via pattern appropriately (i.e., preferring four vias per chip, flanking the midline of the part).QuoteA hundred mA, that's huge! What'll it do in a nanosecond? Two inches, that's what, 300ps? Massive!Out of non-RF analog, and jellybean logic, no, you won't have any problems -- sensitivity in the 100MHz+ range is unlikely there, and you won't have an interesting supply impedance until such frequencies.74LVC is fast enough (t_r < 1ns) to get interesting results. The family is also rated for 5V operation, which must incur some... interesting shoot-thru spikes, easily in the 100mA range.And, as you mentioned, SoCs of various sorts. But given the provision that, they handle the worst of it, internally, as they must. There could still be clock noise and harmonics leaving the CPU, or unintended resonances in the supply network, which is where filtering comes in handy.So, how much is 100mA, anyway? Well, simply put, if your PDN is 1 ohm, then a step change of 100mA makes a step response of 100mV. If it's 1 ohm flat, then it's 100mV flat (which isn't much, even out of 2.5V supplies), but more likely it's complex, so it will bounce up and down over various time scales. For sure, you need to make sure that a dozen gates, all switching at once, don't collapse the supply (12 * 0.1 = 1.2A, enough to corrupt logic levels on a 2.5V system).You should also worry about ground bounce at that point, even if it's on ground plane. Make sure shoot-thru currents are handled as locally as possible, and all the driving-pin currents (and their image currents beneath the traces they drive) stay separate from inputs. All the usual good stuff.QuoteNice. Do keep a close eye on what your models do -- traditionally, a SPICE component is as ideal and non-physical as possible. LTSpice turns them into macros, so that a capacitor may have ESR and ESL included in it. Check these parameters, and make sure they're zero when you intend to have an ideal component, or set appropriately to model a given physical component.Use subcircuits as necessary -- like I illustrated above for the ferrite bead example.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: April 10, 2017, 11:53:12 pm
content: Addendum, in support of modeling --Here's a simulated waveform from a project I was playing with, way back in college.It's the gate waveforms of a pair of complementary MOSFETs (H bridge).Here's the real thing (excuse the sloppy waveforms of the Tek 475; I colorized the one trace to make it stand out). (Same H scale, 50ns/div; 2V/div vertical scale.)The biggest difference is the delay, really. The gate bounce and Miller step is there, and the supply bounce is there, too (a bit worse on the real one).Tim

author: ohdsp
author_rank: Contributor
timestamp: April 11, 2017, 08:50:06 am
content: Well I did read all of your post. Some points seem interesting although largely irrelevant and do not tally with what I have seen in real life (and some points seem completely off topic). Simulations are useful; but should never be taken as absolute (from experience).I have worked with engineers who spend their time trying to make the real world waveforms look exactly as the simulations show - a futile exercise with no real world benefit on low power circuits. All electronics projects I work on end up as a compromise due to cost and development time; and you just need to know when to stop.For an ATmega164P I would happily ignore most of what you have written; because there are many real world circuits that function just fine with a splash of 100nF/10nF caps. I have personally seen benefit from the filters I have mentioned previously; they can be a simple change over what would have been used anyway; and they can be bridged out with 0R resistors or have capacitors left as no fit options to give best real world effect.And yes you can measure/simulate/plot the impedance of a 0R with indutive leads etc; or anything you want in this world; but it can largely end up as irrelevant. Especially if all you want is to filter an ATmega164P!