Attempting to identify mysterious PAL Hardware Description Language - Page 1
Forum section: electronics / general

author: inaxeon
author_rank: Regular Contributor
timestamp: September 26, 2023, 05:28:49 am
content: I have the source code for an old PAL, developed in the early 1990s, but I have no idea what actually compiles it. According to Wikipedia the known languages are ABEL, CUPL and PALASM, but the syntax of this file does not match any of them.Anyone seen anything like this?Title PM5644 LOGO TIDSCODE V8Pattern TIMECODE/DECODERRevision 03Author SVEN NORMANN JORGENSENCompany PHILIPSDate 93061412-NC 4008 002 02011DENNE PLD ER BEREGNET TIL AT ERSTATTE 3 ONE-SHOTS DER SIDDERMELLEM DEN ANALOGE INTERFACE OG MIKROPROCCESSOREN PAE TEXT-GENERATORENDEN BRUGES SAMTIDIG TIL ADRESSE DECODERCLK is the clock signal.(FH I KREDSLOEBET)denne version har rd og wd med i endualport|PAL22V10 1:CLK,| 2:IDATA,| 3:A13,| 4:A14,| 5:A15,| 6:WD,| 7:RD,| 8:-,| 9:-,| 10:-,| 11:-,| 13:-,| 14:TICOD_MODE,| 15:IDATADEL,| 16:ENDUALPORT,| 17:LD2,| 18:LD1,| 19:Q0,| 20:Q1,| 21:IDATADEL2,| 22:TICODATA_OUT, |TO uP TIME CODE DATA| 23:Q2 |TO uP INT'|||REGISTERS: CLK // Q[2..0],IDATADEL,IDATADEL2||ACTIVE-LOW: ENDUALPORT,LD1,LD2,Q2,WD,RD|||P = ((IDATADEL & IDATADEL2)#(IDATADEL' & IDATADEL2'))||MAP: Q[2..0] -> Q[2..0]| { gray(n) ->gray(n+1) ,P & (n/=6) & (n/=7) & TICOD_MODE| gray(n) ->gray(6) ,P & (n==6) & TICOD_MODE| gray(n) ->gray(0) ,P & (n==7) & TICOD_MODE| gray(n) ->gray(n+1) ,P' & (n< 4) & TICOD_MODE| gray(n) ->gray(7) ,P' & ((n==4)#(n==5)#(n==6)) & TICOD_MODE| gray(n) ->gray(0) ,P' & (n==7) & TICOD_MODE }||Q2 = TICODATA_OUT' & TICOD_MODE'||TICODATA_OUT = (TICOD_MODE & (Q[2..0]/=gray(0)) & TICODATA_OUT )| # (TICOD_MODE & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(1)))| # (TICOD_MODE & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(2)))| # (TICOD_MODE & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(3)))| # (TICOD_MODE' & IDATA & TICODATA_OUT )| # (TICOD_MODE' & IDATA & Q2 )| # (TICOD_MODE' & TICODATA_OUT & Q2 )||IDATADEL2 = IDATADEL||IDATADEL =IDATA||LD1 = WD & A13' & A14' & A15||LD2 = WD & A13 & A14' & A15||ENDUALPORT = A15'& (rd # wd)|a15 & a14 & a13 timecode writea15 & a14 & a13' secund pulse|TICOD_MODE = ( WD & A15 & A14 & A13)| # (TICOD_MODE & ( WD & A15 & A14 & A13')')

author: PCB.Wiz
author_rank: Super Contributor
timestamp: September 26, 2023, 09:02:50 am
content: Hehe, that is a strange one.You can ‘sort of’ see what it is trying to do.Some are easier than others.Eg LD1 LD2 look easy to recode.gray(n) seems to be an operator, and MAP: is an usual state engine.Q2 seems to have dual declarations?Do you have any programmed pals ?Some iterations with test vectors would get you there.

author: inaxeon
author_rank: Regular Contributor
timestamp: September 26, 2023, 09:10:36 am
content: Quote from: PCB.Wiz on September 26, 2023, 09:02:50 amI do not have the programmed PAL unfortunately. But I do have a picture of one and know what its checksum is!I reckon 'gray' is a gray code converter:https://en.wikipedia.org/wiki/Gray_codeThe 'MAP' is quite tricky. Lots of syntax there. And that is the main reason why I'd like to track down the manual for whatever compiles this!

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: September 26, 2023, 09:26:49 am
content: In an old 1994 PLD databook i see a reference to "Snap" software from Philipshttp://www.bitsavers.org/components/philips/_dataBooks/1994_Philips_IC13_Programmable_Logic_Devices.pdf

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: September 26, 2023, 09:30:49 am
content: That syntax doesn't look far from my hazy memory of CUPL."&" is a bitwise concatenation operator, not logical AND, # is logical OR.the only thing I'm not sure about is the " ' " suffix

author: inaxeon
author_rank: Regular Contributor
timestamp: September 26, 2023, 09:36:43 am
content: Quote from: mikeselectricstuff on September 26, 2023, 09:26:49 amOhh. That is interesting. Could be it. Very few mentions of it anywhere on the internet however, let alone a surviving copy of it!

author: up8051
author_rank: Frequent Contributor
timestamp: September 26, 2023, 09:47:17 am
content: Probably:ORCAD/PLD, ORCAD/PLD386+Example from old Orcad Tutor:Code:GRAY CODE TO BINARY CONVERTERA Gray code to binary converter is a progressive array of exclusive-orgates judiciously interconnectely. Here such a converter is defined as anumerical map, forcing the PLD compiler to work out the detailed logicitself. The PLD compiler achieves exactly the same logic as the classicalexclusive-or array. See Chapter 5 of the reference guide for a discussionof maps.|PAL16HD8 in:G[3..0], io:B[3..0]|| Map: G[3..0] -> B[3..0] { Gray(n) -> n }| Vectors:| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d| Test G[3..0]| End }

author: inaxeon
author_rank: Regular Contributor
timestamp: September 26, 2023, 10:14:47 am
content: Quote from: up8051 on September 26, 2023, 09:47:17 amDon't suppose you could tell us where that came from?

author: PA0PBZ
author_rank: Super Contributor
timestamp: September 26, 2023, 10:39:29 am
content: Orcad PLD seems right. Unfortunately the only manual I could find is on SCRIBDhttps://www.scribd.com/document/207983369/ORCAD-PLDCode:= assignment' complement or NOT& AND# OR## XOR?? Tri-state enable// Rising edge of the clock\\ falling edge of the clock

author: up8051
author_rank: Frequent Contributor
timestamp: September 26, 2023, 11:20:27 am
content: Quote from: inaxeon on September 26, 2023, 10:14:47 amI used Orcad a long long time ago.The file comes from an old installation disk.Unfortunately, there is no user manual on the disk, only example files

author: PCB.Wiz
author_rank: Super Contributor
timestamp: September 26, 2023, 06:30:00 pm
content: Quote from: up8051 on September 26, 2023, 11:20:27 amAre you able to zip and post the example files?That would help the OP and any other ORCAD/PLD users.

author: up8051
author_rank: Frequent Contributor
timestamp: September 26, 2023, 07:23:38 pm
content: Quote from: PCB.Wiz on September 26, 2023, 06:30:00 pmOrcad (DOS version) and all examples are available at:https://groups.io/g/dosOrCAD