why my j-link V8 does not support STM32H750 - Page 1
Forum section: electronics / general

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 22, 2020, 08:02:45 am
content: Hi,I have this probe for so long, and it had supported everything that I have connected! this is the first CM7 part, that I'm connecting to, it's a STM32H750VB,Do you have any Idea what might be wrong?

author: ataradov
author_rank: Super Contributor
timestamp: July 22, 2020, 08:31:03 am
content: Please crop your image only to the actual error message.Your hardware is too old and does not support Cortex-M7:https://wiki.segger.com/Software_and_Hardware_Features_Overview

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 22, 2020, 09:40:01 am
content: Thanks, It seems I should switch to DAP or J-link V9

author: ataradov
author_rank: Super Contributor
timestamp: July 22, 2020, 04:01:53 pm
content: Yes, I really don't understand why debugger needs to know about the core. I'm not sure why they would do that other than extracting the money.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: July 22, 2020, 04:09:48 pm
content: Problem is that 99% of V8 probes aren't old but Chinese fakes. Segger puts a lot of effort into the tools, so it's worth buying a legit probe (IMHO Ozone alone is worth it). Actually I bought a new EDU (V10) some months ago since my old legit EDU V8 was no longer supported.

author: ataradov
author_rank: Super Contributor
timestamp: July 22, 2020, 04:26:43 pm
content: It is not the problem in this case. In this case the official version does not support the device either.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: July 22, 2020, 05:46:44 pm
content: It'sexactlythe problem. Supporting a HW version where 99% of the devices are Chineses clones just doesn't make any sense for Segger - so they burned that bridge. The only legit V8 users without any upgrade discount are EDU users like me. But it's sold for ~50€ (without VAT) which is not really worth complaining. Besides, V10.1 has new features and is faster, so there are additional benefits by the newer hardware.

author: abyrvalg
author_rank: Frequent Contributor
timestamp: July 22, 2020, 09:50:38 pm
content: That Segger’s strategy is a bit "double-edged" - how long it will take that new genuine V10.1 to become obsolete? Knowing that it is "because of chinese clones" doesn’t help a legal buyer much.

author: ataradov
author_rank: Super Contributor
timestamp: July 22, 2020, 09:54:44 pm
content: I don't see why debugger needs to be locked to the target. May be they have a good reason and they do some target-specific processing on the debugger, but it kind of feels like a lock-in attempt.Similar to how SAM-ICE was just a J-Link, but locked to Atmel devices. It would actually read the device ID and refuse to work with non-Atmel devices.Given availability and cheapness of CMSIS-DAP debuggers, the only real reason to use J-Link is their standalone tools. And may be if you really need advanced features like trace.

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: July 23, 2020, 05:54:58 am
content: Note that the whole V8 discussion is only about the base line models (EDU, Base, Plus). Better models like Ultra and Trace have different HW revisions and no clones. Besides, all versions but EDU can be upgraded to the newest revision for 50% of the normal asking price:https://www.segger.com/purchase/trade-in-program/Regarding comparison with "CMSIS-DAP": I actually moved from Segger EDU to LPC Link 2 fro a while because this was the solution working best in LPCXpresso/MCUXpresso. But the Segger integration evolved quite a bit since then and sinceOzonebecame available, I just use MCUXpresso to compile anyway and then reprogram and debug in Ozone. AlsoRTTis a great help for development.These tools were my main reason to buy the new EDU version even though the old one and even the LPC Link 2 with the J-Link firmware worked good enough. The data transfer is much faster with the new HW revision which enhances all features based on runtime memory access etc.

author: abyrvalg
author_rank: Frequent Contributor
timestamp: July 23, 2020, 06:31:35 am
content: Quote from: 0xdeadbeef on July 23, 2020, 05:54:58 amSearch “JetLink Ultra V4”

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 06:48:56 am
content: It's all about money,Segger has fucked usI have found V9 clones in here too,But I hate to switch to it and be fucked a gain by segger, I wonder if it could be done with FT2232 too, since I would use this baby for Xilinx and Gowin already.

author: ataradov
author_rank: Super Contributor
timestamp: July 23, 2020, 06:51:36 am
content: You can't make FT2232 work with Segger software.BTW, I think they had some trade in program, so you may be able to trade in your old device to get some discount on the new one. That is of course if you feel like giving more money to them.

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 07:09:35 am
content: QuoteLinks would be highly appreciatedyou can PM me if you likeQuoteI wanted it to work with Keil, is there a solution?Also I have found J-Link OB-STM32F072 firmware in Githubhttps://github.com/JassyL/JLink_ARM_OB/blob/master/J-Link%20OB-STM32F072-CortexM___firmware_2020/J-Link%20OB-STM32F072-CortexM___firmware_2020.binSince I have a easypaduk, maybe that could help too, or maybe a new hardware that act as DAP and J-link OB

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 07:43:17 am
content: QuoteThanks, Please name a few forums then

author: hans
author_rank: Super Contributor
timestamp: July 23, 2020, 08:19:40 am
content: Google for document "RM08001-R2" to see an ancient Jlink USB spec. There really isn't much device-specific going on for Cortex-Mx targets..I was surprised by that wiki article saying that the J-Link EDU v8 does not support Cortex-m4 devices. I use an old J-Link EDU from 2011 with STM32L4 and STM32F4 parts with OpenOCD, which works fine, so perhaps the feature set is limited for J-Link own executables.@ali_asadzadeh: Just google for 5 secs. I've been able to find a J-Link v10 .bin file from 2019 for the LPC4337 on the first google page. Not sure how much that's worth though (and if it even works), because the LPC4337 is almost 13 euro's on Mouser. For that money and hassle, I would probably get a J-Link EDU Mini (https://www.segger.com/products/debug-probes/j-link/models/j-link-edu-mini/). It includes the core feature set a clone buyer is probably most interested in (programming and debugging). If you need ancient ARM support (e.g. LPC2100 series), fancy trace features, or faster download speeds (200k/s vs 1MB/sto RAM) then buy their expensive debug pods..J-Link debuggers are buried into more dev-boards like the ones from Silicon Labs, usually on some kind of STM32 hidden under the LCD screen. So I suppose Segger figured out that their business model shouldn't resolve around chasing after chinese clones 24/7, but licensing to OEM's (such as Atmel like @ataradov mentioned) is far more sustainable and profitable.

author: abyrvalg
author_rank: Frequent Contributor
timestamp: July 23, 2020, 08:31:29 am
content: Keil claims CMSIS-DAP support, so you can go as simple as an $2 Aliexpress ST-Link converted to CMSIS-DAP using this info:http://akb77.com/g/stm32/cmsis-dap/

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 09:32:10 am
content: Thanks for sharing,Quotehans my google is not smart as yours, would you please share the linkMy google found this linkhttp://www.azlina.ru/programmatoryi/j-link-v-10-programmator-jtag-otladchik-dlya-arm-i-cortex-mikrokontrollerovDo we have a schematic too?

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: July 23, 2020, 10:47:10 am
content: AFAIK none of the clones >8 is really aproperclone like the V8 clones were (i.e. recognized by the Segger SW as legit). Lots of "V9" versions were just V8 with all the potential issues of blacklisted serial numbers or with some hacks like dual firmware to recover to an old version if bricked. V10 clones seem to need a hacked firmware. So you can't actually just use the newest firmware automatically etc.I just don't get why anybody would invest more than 10€ or so in a clone that will be potentially bricked, blacklisted or get stuck with old firmware if you can buy a legit EDU for 50€ (even though the nag screen is not so easily disabled anymore with latest drivers from 2020, there's still an easy 99% solution).

author: janoc
author_rank: Super Contributor
timestamp: July 23, 2020, 10:56:46 am
content: Quote from: ataradov on July 22, 2020, 09:54:44 pmIsn't the same thing as what Microchip is doing with the Pickit, or the BlackMagicProbe does? They are all handling the JTAG/SWD in the actual firmware of the probe, along with some extra stuff like tracing, serial ports and what not. So when you change target to something the firmware doesn't support you need to reflash the probe too.It is not necessarily due to attempt at a vendor lock-in but a design choice as these probes tend to be faster than when the processing is done at the host and the probe only twiddles the SWD lines.

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 12:09:01 pm
content: I made progress, I just flashed my eayPaduk with the j-link-OB STM32F072, and It act like a j-link, I have successfully program and debug a STM32F030kT6 part,The new OB probe modified so, I can connect it to STM32H750VBNow when I connect this probe to my STM32H750VB, the OB will detect the Core and tries to flash the chip, But It will through some error like this,QuoteHere my Schematic for STM32H750VBThe wired thing is that the j-link software would have wrong RAM setting in device selection, the parts should have 1MB of ramany New Ideas?

author: ehughes
author_rank: Frequent Contributor
timestamp: July 23, 2020, 01:09:25 pm
content: QuoteNews Flash. Businesses operate on money. Segger can't build good tools when everyone is using clones and fakes. I have seen lots of companies making debug tools come and over over the past 20 years. They only ones that survive charge money for their product.

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 23, 2020, 01:43:33 pm
content: I have made another progressI have Used DFU and flashed the part, my hardware is fine, the problem is the J-link-OBI can program and debug with the j-link OB another STM32 F0 part (STM32F030K6T6), so the j-link OB clone on easy padauk must be fine, has anybody got any success with j-link OB and STM32H750 or other H series parts?If it fails I should go to DAP, and PORT the DAP to STM32F072 parthas anyone done it? and test it with STM32H?I need debugging:-\

author: eliocor
author_rank: Unknown
timestamp: July 23, 2020, 06:24:37 pm
content: Compatibility table:https://wiki.segger.com/Software_and_Hardware_Features_Overview

author: thm_w
author_rank: Super Contributor
timestamp: July 23, 2020, 11:58:16 pm
content: Quote from: 0xdeadbeef on July 23, 2020, 10:47:10 amI have a "v9.4" that updates firmware OK. Will check what chip is in there.The one thing is instead of 22R series resistors inside they've used 220R. I'm not sure if this was a mistake or required due to some other function in the programmer.I'm basing this value off of thisV7 schematic, need to buy a proper Jlink and open it up to verify.Whats the EDU solution?edit: latest FW, micro is STM32F205The V10 clones I see are using aLPC4337, I assume the genuine one is the same IC.

author: abyrvalg
author_rank: Frequent Contributor
timestamp: July 24, 2020, 06:54:54 am
content: Try disconnecting H750’s RST from J-Link (leaving just SWCLK and SWDIO) - any changes in the behavior?

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 25, 2020, 08:06:08 am
content: QuoteI did not connected the RST from the j-link-OB to the STM32H, still same results, No luck.Any one has the STM32H750 chip? please share your results

author: ataradov
author_rank: Super Contributor
timestamp: July 25, 2020, 08:08:22 am
content: There is no point. It (either debugger or the software) explicitly checks for the core type and refuses to work. It knows it is Cortex-M7, so the SWD connection is fine with reset or not.You are out of luck. Think twice before going with Segger again.

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 25, 2020, 08:46:24 am
content: Do we have V10 schematics?

author: robca
author_rank: Frequent Contributor
timestamp: July 25, 2020, 03:55:31 pm
content: Quote from: ataradov on July 25, 2020, 08:08:22 amI can't find exact release dates, but Jlink V8 is at least 10 years old. I don't think it's entirely unreasonable for a vendor to not update a 10 years old deviceAlso, the Segger documentation explains why they put "intelligence" in the Jlink instead of the PC debugger (https://www.segger.com/downloads/jlink/UM08001section 1.5), and provide a way to add custom devices in the PC DLL (https://wiki.segger.com/Open_Flashloader#Create_a_Flash_Loader). It might be possible to support the M7 core that way (I doubt it will be "worth" doing it, but possible). So it's not an arbitrary decision to stop piracy, as much as the need to have new hardware to support the new core features in the probe itself for very good reasonsHaving used a Jlink to debug nRF52 devices I came to appreciate how much value a Jlink adds compared to a normal SWD debugger (like ST Link). In the case of the nRF52, Nordic provides a sort of OS that takes care of pretty much all the Bluetooth and ANT communication stacks. The downside is that a standard breakpoint kills the communication stack, so you cannot single step into the code. Segger offers something called a Monitor Mode Debug (MMD) which keeps the processor running and uses a clever technique to still allow for single stepping thru code. It's truly life changing for a nRF52 developer (incidentally, Nordic provides an onboard Jlink in their development boards). The same with Segger RTT, much better than SWO in pretty much all scenariosIf the price to pay is that a user needs to buy a Segger Jlink every 15 years or so, it's not a bad tradeoff.Lastly a real Segger Jlink EDU Mini that supports all the cores, costs <$20. So even hobbyist with no money can easily afford one. And, yes, you cannot do commercial work with the EDU license, but given that the majority of hobbyists sem to use unlicensed clones without a moral concern, I could argue that using a real EDU mini for semi-commercial work is at least morally equivalent to using a clone that comes with no license whatsoever

author: abyrvalg
author_rank: Frequent Contributor
timestamp: July 25, 2020, 09:11:23 pm
content: Quote from: ataradov on July 25, 2020, 08:08:22 amSurprising, OP's log from j-link OB shows no signs of refusal, it attempts to work with M7 core indeed (but fails on reset).

author: ataradov
author_rank: Super Contributor
timestamp: July 25, 2020, 09:16:02 pm
content: If the probe actually includes core-specific logic, then it is understandable, but it is just a bad design.The explanation about the inefficiencies of the protocol are also strange. Again, sounds like they just did nit do a good job designing their protocols. Probably on purpose.With CMSIS-DAP you can do some very efficient transfers. Not many implementations do, since they are typically generic, but it is possible and not that hard.There is still an argument for transferring some of the logic to the probe, of course, but it does not need to be core-specific.

author: ali_asadzadeh
author_rank: Super Contributor
timestamp: July 29, 2020, 01:03:13 pm
content: More UpdatesFuck Segger, I have ported DAP to easy-pdk programmer for padauk , Now I can debug with it. So this programmer can work with padauk MCU and ARM Cortex parts, such a universal and cheap programmer. the problem with this DAP is the speed, because of STM32F072 and it's USB speed.

author: unitedatoms
author_rank: Frequent Contributor
timestamp: August 01, 2020, 02:41:35 pm
content: while manufacturer's ethics being discussed here, I may suspect the issue with M7 debugging could be caused by known bug in architecture.https://www.eevblog.com/forum/microcontrollers/cortex-m7-debugging-bug/

author: 0xdeadbeef
author_rank: Super Contributor
timestamp: August 01, 2020, 06:26:01 pm
content: Quote from: unitedatoms on August 01, 2020, 02:41:35 pmFelt more like discussing ethics of users. In hindsight I'm not even sure if the OP ever owned a legit J-Link.

author: eliocor
author_rank: Unknown
timestamp: August 01, 2020, 07:21:48 pm
content: To my knowledge the dismission by Segger of the V8 programmer was due ONLY for technical reasons: no more space available in the internal flash memory (64kB):from ÷ to0x0000 to 0x1FFF - bootloader (never updated by DLL)0x2000 to ~0xF8FF - J-Link v8 programmer code (updated by DLL)~0xFA00 to 0xFFFF - J-Link configuration (never modified by DLL)If you extract from JLinkARM.dll the "latest" firmware for the v8 version (compiled on Nov 28 2014*) you'll find that Segger has used ALL of the available Flash resources.This because there is NO MORE SPACE available!This is the ONLY reason v8 units are no more supported, so it is USELESS to discuss about "ethics/greediness/..."!*) the May 27 2009 v8 firmware release had more than 0x4800 bytes free!

author: abyrvalg
author_rank: Frequent Contributor
timestamp: August 01, 2020, 08:54:18 pm
content: Quote from: ali_asadzadeh on July 29, 2020, 01:03:13 pmPorting it to Cypress FX2 for USB HS (and using one of those cheap AliExpress boards) could be interesting. HS has 8x higher frame rate, so the latency should be lower.

author: ataradov
author_rank: Super Contributor
timestamp: August 01, 2020, 08:56:58 pm
content: FX 2 has very slow GPIO, so you would not get a very high speed on the SWD side.You really need a real MCU with USB HS.

author: abyrvalg
author_rank: Frequent Contributor
timestamp: August 02, 2020, 07:10:19 am
content: Sure, a modern MCU with HS will be better, but I like the idea of widespread board reuse.FX2’s GPIF FSM can be used under CPU control (wasting entire D0-7 bus to drive SWDIO, but who cares?) - serialize a data byte into GPIF buffer, fire the transfer (SWCLK can be generated by GPIF waveform on one of CTLx outputs), serialize next byte, check for completion, repeat. The CPU itself isn’t that fast, but GPIF parallelism can compensate something. I need to check the details.