2 PWM outputs with half a cycle phase shift on AVR - Page 1
Forum section: electronics / general

author: Simon
author_rank: Unknown
timestamp: March 01, 2016, 09:17:10 pm
content: I have a need to generate 2 PWM signals on an AVR but they need to be out of phase by half a cycle. Is this actually possible? The only way I can think of doing it is somewhat manually with interrupts and perhaps 2 different counters that are synchronised.

author: Psi
author_rank: Super Contributor
timestamp: March 01, 2016, 09:26:22 pm
content: As long as you use a timer mode that doesn't mess with the top/bottom of the counting the two timers will stay in whatever sync they are started in.So it's only a one-off issue getting the 2nd timer to start at the right time.Perhaps set the timer to first generate a compare interrupt at 1/2 the time and use that to start the 2nd one and then re-purpose the compare to do pwm from then on as you need.

author: bktemp
author_rank: Super Contributor
timestamp: March 01, 2016, 09:27:40 pm
content: In hardware it is not possible (except for the AT90PWM series). Either you have to do the PWM using timer interrupt + software, or you can use 2 timers set to the same period but one startet with a delay of half the period.For generating complex PWM waveforms there are much better controllers than AVR.

author: Psi
author_rank: Super Contributor
timestamp: March 01, 2016, 09:34:34 pm
content: Maybe you can find a AVR which can generate PWM on a ext int pin.Then use any ext int state change interrupt to trigger the start of another timer that runs a fixed time and changes another i/o to match what the first one was.That would cut down the amount of code needed

author: Simon
author_rank: Unknown
timestamp: March 01, 2016, 09:34:57 pm
content: Quote from: Psi on March 01, 2016, 09:26:22 pmthat sounds easy enough. I'll study the datasheets.

author: Psi
author_rank: Super Contributor
timestamp: March 01, 2016, 09:40:58 pm
content: The real question is, are there any PWM modes that don't mess with top/bottom.You may have to do it yourself by calculating when to use 'compare match set output' and when to use 'compare match clear output'That way the signals are still being generated in hardware, you just have to preload what you want it to do before it has to do it.EDIT: I think it will have to use a timer mode that updates OCR Immediately. Which rules out all the dedicated pwm modes. Unless there's something i've not thought of.

author: dgtl
author_rank: Regular Contributor
timestamp: March 01, 2016, 09:45:35 pm
content: On some AVRs some timers share a prescaler. This prescaler can be stopped (set TSM, then PRSYNC). Then set the initial timer counter values of both timers with required offset. Enable both timers, set everything up. Then enable the prescaler and both timers start counting at the same time, staying in sync as they go.Changing PWM duty cycle is easy. Changing frequency or the phase difference requires stopping of the prescaler. Still, with careful coding, it can be made almost invisible.

author: Psi
author_rank: Super Contributor
timestamp: March 01, 2016, 09:47:52 pm
content: Yeah, i think there are a few options for doing this that will work.Unless you're trying to generate a really fast pwm signal it should be doable with a few timer/int register tweaks inside a few interrupts.

author: Simon
author_rank: Unknown
timestamp: March 01, 2016, 10:02:33 pm
content: 50 to 500Hz is plenty for this, it's that slow that i could do it all in software and make a right pigs ear of itbut yes if the counters can all be stopped and started together then I can preload 127 in one and start the other at 0 and have then firing same frequency but offset cycles.

author: collingtech
author_rank: Contributor
timestamp: March 02, 2016, 02:15:44 am
content: interesting, im in the middle of one project like this one, will open a new project post and put there my aproach, only a minor diff , im using pll , pay attention for the timers :0)