photo/clip to represent circuit optimizations that allow clock++ in a cpu? - Page 1
Forum section: electronics / general

author: DiTBho
author_rank: Super Contributor
timestamp: August 19, 2025, 02:34:22 pm
content: DEC did not "create" the "StrongARM" CPU: it was "developed" by then as an enhanced version of the ARM architecture.I'm trying to describe DEC's improvements focused on enhancing performance and power efficiency for the ARM core, resulting in the StrongARM processor.It's complex, and words are not as effective as a picture or a video clip ...I should make it clear how DEC used their internal know/how from VAX (and then Alpha) to simplify interconnecting circutics, making paths shorter between two stages, used "bypassing" and "forwarding" tricks to avoid some waitcycles between two pipelined stages, and other tricks like that.They literally took the existing ARM architecture and applied their expertise in processor design and manufacturing to create a faster, more efficient implementation, resulting in the StrongARM processor family.The problem is: how to achive so with some pictures? video clips?I am not not even sure if it's possible ...Open to idea and suggestions.Thanks

author: DiTBho
author_rank: Super Contributor
timestamp: August 19, 2025, 03:11:06 pm
content: (Even ifthisis not the point, it's interesting.(differences between arm architectures from a C-programmers perspective))

author: DiTBho
author_rank: Super Contributor
timestamp: August 19, 2025, 10:24:42 pm
content: Has anyone ever worked with an ASIC - Computer Aided Design - program?If so, what software? Is there a picture or video of this software?I feel lost

author: u666sa
author_rank: Frequent Contributor
timestamp: August 20, 2025, 06:10:26 pm
content: I can take a logo example on youtube image search. Any one I like. Then I can add it to Ai and ask it to make me a logo in same style but with my own information. I think what you need to do is to use Ai in similar fusion.You’re trying to convey a nuanced technical evolution—DEC’s transformation of the ARM architecture into the StrongARM by applying deep architectural expertise from VAX and Alpha. To visualize this effectively, you’ll want to combine microarchitecture diagrams, pipeline illustrations, and comparative visuals that highlight the performance and efficiency gains. Here’s how you can approach it:🧠 Key Concepts to Visualize1. Pipeline Optimization Techniques• Show a simplified ARM pipeline vs. DEC’s StrongARM pipeline.• Highlight shortened interconnect paths, bypassing, and forwarding logic.• Use arrows and color-coded paths to show how data moves more efficiently.2. Architectural Influence• Create a visual lineage: VAX → Alpha → StrongARM.• Use icons or silhouettes of chips with annotations like “out-of-order execution,” “branch prediction,” “clock gating.”3. Performance vs. Power Efficiency• Use bar graphs or radar charts comparing:• Clock speed• Instructions per cycle (IPC)• Power consumption• Die size4. DEC’s Design Philosophy• A stylized infographic showing DEC’s design principles:• “Minimalist interconnects”• “Smart pipeline control”• “Manufacturing precision”🎥 Video SuggestionsHere are a few videos that might help you build or inspire your own visual narrative:• Arm's New CPU to Supercharge AI on Android – While modern, it shows how ARM designs evolve for performance and efficiency.• New Arm CPU is 15% faster than previous generation – Useful for understanding how ARM tweaks microarchitecture for gains.🖼️ Image ReferencesI’ve found several image sources that illustrate StrongARM’s architecture and DEC’s enhancements. These will be shown in the image card below. You’ll see diagrams from WikiChip and CPU-World that break down the SA-110’s internals and pipeline structure.🔧 How You Could Build Your Own VisualsIf you’re designing this yourself (which I suspect you might be), here are some ideas tailored to your style:• Use glowing neon overlays to highlight data paths and bypass logic.• Blend Russian and English annotations to reflect your bilingual aesthetic.• Layer cosmic or gothic textures behind chip silhouettes to give it a dramatic flair.• Create animated GIFs or short clips showing pipeline stages with and without DEC’s enhancements.Would you like help drafting a storyboard or mockup layout for one of these visuals? I can sketch out the structure and suggest design elements to match your style.

author: SiliconWizard
author_rank: Super Contributor
timestamp: August 20, 2025, 06:27:21 pm
content: Quote from: DiTBho on August 19, 2025, 10:24:42 pmDo you intend to design your own chip? Or is that more out of interest to get to know how it's all done?The commercial EDA tools for that are very expensive (Cadence, Synopsys...)As far as open-source goes, the main ones are Yosys for digital synthesis, Nextpnr for P&R and Magic or KLayout for the layout.Note that even if you're able to synthesize a digital chip, getting a layout out of it implies using mapping and P&R tools and a given PDK from the manufacturer of the process node you want to use. Getting access to a PDK can be also a very costly experience. Google has made that part accessible (at some conditions) with its open PDK (Skywater):https://github.com/google/skywater-pdkGetting to know Skywater would be a good starting point.Also note that some fabless companies do offer services such as turning RTL into a chip. That's also expensive, but possibly not as much, if this isn't your main activity as a company, than buying licenses for commercial tools, getting agreements with a foundry, and so on.

author: DiTBho
author_rank: Super Contributor
timestamp: August 20, 2025, 07:11:41 pm
content: I only need to make a short video clip.

author: DiTBho
author_rank: Super Contributor
timestamp: August 21, 2025, 02:26:24 pm
content: is there any better picture than this one?a color one, without any comments?