ROM Emulator using a CPLD - Page 1
Forum section: electronics / general

author: ale500
author_rank: Frequent Contributor
timestamp: May 09, 2015, 09:26:04 am
content: I want to do some retro projects with 5V uPs. This thing is only as bootstrapper. A Flash device would be there... but has to be programmed. The thing is I do not have an E(E)PROM programmer (I could build one for EEPROMs) and I though about emulating a ROM. Some years a go I used a Parallax Propeller as small ROM & Video circuitry. It sort of worked but it is slow and PIN constrained (it only has 32 IOs). I multiplexed the Address bus and had to use some resistors to level convert...An ATMega is also quite slow but doable, monitor a pin, read address fetch data,put data on port, switch to input when read cycle ends.But, If I want to test some code, that means editing/compiling/burning, chip here, chip there... What if I write a small server for the PC, and with a CPLD I emulate the rom. It sends the address and waits for a byte answer. Using the MRDY pin on the 6809, you could get by, I think. I wrote some code and simulated it, it seems to work ok.What do you think ?- No E(E)PROM programmer available. I could build an EEPROM programmer, do not really want to.- Another uP with Flash and ISP as ROM.- A CPLD as ROM with a small server and serial connection to a PC.

author: bktemp
author_rank: Super Contributor
timestamp: May 09, 2015, 10:11:38 am
content: Reading each byte from a PC is extremely slow, because of the time it takes to send the adress to the PC, and send the requestet byte back. This will be around 1kHz.A EPROM emulator is probably the fastest way:Load the whole program into a SRAM using a microcontroller or a CPLD. Then disconnect the microcontroller/CPLD (tristate the pins or using a buffer with output enable feature) and connect it to target system using another buffer.With a fast USB connection it takes less than 100ms to load the whole program into the SRAM. Then it can run at full speed.

author: ale500
author_rank: Frequent Contributor
timestamp: May 09, 2015, 03:19:52 pm
content: Well, that is slow in executing the code is not a big concern, the idea is to use it to test some code on the target and to not have to use an EPROM of sorts. (One could also use a SRAM with a puffering capacitor and move it from programmer to target...) An EPROM emulator like what you describe sounds very interesting... but instead of 3 buffers with tri-state outputs some uC like an atmega32, with enough pins for all functions which can be turned into inputs... I like it... it could be used in many projects... if RESET on the target is asserted many (all) processors tri-state address, control and data lines.

author: bktemp
author_rank: Super Contributor
timestamp: May 09, 2015, 07:48:05 pm
content: Using a battery or capacitor backed up SRAM was the first thing I did use many years ago. But it was annoying every time removing the module from the board, plugging it into the programmer and then back into the target.Using buffers or switches for connecting a SRAM to the target has one big advantage over emulating the memory using a microcontroller: It behaves exactly the same as a ROM. There is no need to add some wait states. You can even use the same socket to connect the EPROM emulator to the target board. And when the software is finished, you can simply program it to a flash or EPROM and plug it into this socket.

author: westfw
author_rank: Super Contributor
timestamp: May 09, 2015, 09:38:52 pm
content: I've had the idea of using a smallish microcontroller to implement the external memories of old-style micros... The same sort of "I can be arbitrarily slow if I manipulate the micro's signals (possibly including clock) correctly" thinking.Seems like a lot of trouble to avoid getting/implementing an (E)EPROM burner.Or you could just use NVSRAM instead of EPROM:http://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_114323_-1

author: bson
author_rank: Unknown
timestamp: May 09, 2015, 10:34:05 pm
content: How about a NOR flash? Some of them have EPROM compatible pinouts.http://www.mouser.com/ProductDetail/Microchip-Technology/SST39SF020A-70-4C-PHE/?qs=sGAEpiMZZMtI%252bQ06EiAoG0BE%2fkOcyDgdE8ftOOlSg%2fE%3d(Real data sheet with pinouts:http://ww1.microchip.com/downloads/en/DeviceDoc/25022B.pdf)EPROM pinouts:http://nesdev.com/EPROM%20Pinouts.txt

author: westfw
author_rank: Super Contributor
timestamp: May 10, 2015, 12:34:08 am
content: Yeah, but the byte-wide EPROM-compatible flash chips can be as complicated to program as regular EPROM (different write methods for different vendors, etc.) (or was that the byte-wide EEPROM chips?)

author: technix
author_rank: Super Contributor
timestamp: May 10, 2015, 05:22:05 am
content: If you have some SRAM available you can use the CPLD as a crossbar switch: when a pin is asserted the target uP can access the SRAM as if it is ROM; when not the SRAM get disconnected from the SRAM and a programming interface is presented to the PC. This pin asserting can also be done using commands from a computer too. Or you can also emulate the ROM using CPLD itself.

author: nctnico
author_rank: Super Contributor
timestamp: May 10, 2015, 11:18:12 am
content: You don't really need a CPLD for this. Some buffers like the 74xx245 will do the job just fine. A serial in parallel out shift register (like the 74xx595) can be used to create the address and data. An SPI interface offers a quick way to setup addresses and data to load the memory. If you need to support multiple sizes then a small CPLD like a GAL16V8 is enough to make the various pin mappings.

author: ale500
author_rank: Frequent Contributor
timestamp: May 11, 2015, 12:57:52 pm
content: From your comments, I see that the idea is more or less to emulate an EPROM (E2PROM, Flash, whatever) and load it beforehand with some sort of... uC (or similar). I see why you mean that too.But... implementing a Flash burner may be the easiest. There is almost no reason not to use a Flash, the algorithms are not difficult and already described in the datasheets. Compatible with multiple projects too...

author: C
author_rank: Super Contributor
timestamp: May 11, 2015, 06:30:34 pm
content: Some things to think about with microprocessorsCPU needs to read data from one source.CPU can write data to many places at the same time.For example you could read from a eprom and then write to the same location and end up writing to sram. One Intel development system did this. The boot switch did two things, reset the CPU and set a flip-flop. This FF controlled where the read data came from, the eprom or sram. The CPU could reset the ff. From software you could think of a bootstrap program booting a bootstrap program. This allowed the initial boot strap program to load stage two from mass storage. The Reset switch just reset the CPU so RW access was to sram.Back then many systems used shared ram. The CPU and Video display shared the same ram. If you could do two accessed in the time the Video display needed one access then you could have no video glitches and any time access to Video display ram. Some systems went a step further and had the CPU read from sram or dram and CPU writes went to both video display ram and sram/dram.With today’s memory speeds & sizes you could shadow the entire 6809's memory space and have shared access to the shadow ram with the bootstrap loader micro.If you think about it, most program memory access is sequential. What happens if you you use two memory chips to cover the same access range using A0 to select which chip. The memory chips do not care, the CPU can not see the difference.Note that shared access to some ram can make debugging programs easer. It can also be used for IO.If you want to spend the money you can get dual port memory chips. Or save money and do time slots to the memory and handle the timing so that it works.C

author: netdudeuk
author_rank: Frequent Contributor
timestamp: May 13, 2015, 07:39:07 am
content: Before I bought my proper programmer, I built an Arduino shield with some shift registers to program Atmel EEPROMs and it was easy to do. There's a schematic online for something like that. Easy to build I got a load of the EEPROMs cheap from China in 16KB and 32KB sizes.

author: legacy
author_rank: Super Contributor
timestamp: May 13, 2015, 10:34:14 pm
content: well, the whole 6809 could be synthesized to fpga.btw: how big is the ROM ?have you already considered a dual-port ram ? If within 2K..4Kbyte they are available in DIP package.

author: ale500
author_rank: Frequent Contributor
timestamp: May 14, 2015, 02:19:29 pm
content: I could fit everything in a MachXO2-7000 with my own 6809 core. But it is not so fun. Have you seen FUZIX ? that would be the idea. Just bootstrap the thing to load an image from SD card. Programming the on-board flash (29F040) would be great too.I will use the same ram as shared ram, the '09 accesses memory when E is high. A CPLD is already in place to isolate the uP and the RAM. Nowadays we can rely on some fast memory