PCB layout suggestion - Page 1
Forum section: electronics / projects

author: romhunter
author_rank: Regular Contributor
timestamp: December 25, 2020, 04:13:45 am
content: Hi, I'm doing a kit for PIC24 microcontroller, and it've been forever since my last time doing PCBs, and also my first time with Kicad. Can someone offer some help with the layout, like pointing out bad practices and improvement suggestion? Any help is welcome. The silkscreen haven't been worked on so please ignore itThe PCB is 2 layers and will be fabricate with JLCPCB. I will also release everything as open source once it is done.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 25, 2020, 07:51:14 am
content: Bypass capacitor placement seems non-optimal. I'd start placing them first close to the pins.Rotating the MCU 45 deg may (or may not) ease the layout (especially if the header pinout isn't set in stone yet), very typically seen in such breakout boards.

author: romhunter
author_rank: Regular Contributor
timestamp: December 25, 2020, 08:14:42 am
content: Quote from: Siwastaja on December 25, 2020, 07:51:14 amCan I have some suggestion on that? I've tried to place them as close as possible.Quote from: Siwastaja on December 25, 2020, 07:51:14 amUnfortunatelly the header pinout have been defined before and cannot be changed. I will see if I can do anything about it, but chances are slim.

author: hans
author_rank: Super Contributor
timestamp: December 25, 2020, 08:51:24 am
content: Depending on your choice of capacitor size, they will likely block a few pins outside of the QFP package from fanning out. Logically, a smaller 0402 cap will be easier to squeeze in than a 0805, but it depends on what you can/want to solder, so let's not go into that trade-off.However, I would recommend placing these capacitors at VDD/GND pins (often in pairs). Also try to directly route the VDD/GND on the chip to the capacitor if you can (meaning, if the chip and cap are on the same layer, try to use a trace rather than going through 2 vias).One huge advantage of QFP is that there is tons of space under the chip as well. So you could then route all those blocked pins under the chip, go to the bottom layer and then fanout from there.Alternatively for QFN, which have a large exposed pad, I would place the decoupling capacitors underneath the chip, and then use the exposed pad as a GND return. You could also apply this for QFP packages.

author: romhunter
author_rank: Regular Contributor
timestamp: December 25, 2020, 09:15:36 am
content: Quote from: hans on December 25, 2020, 08:51:24 amI'm using 0603, and I don't want to go to 0402 or 0201 since my equipment is not that good to assemble them yet. It would be a little tedious.Quote from: hans on December 25, 2020, 08:51:24 amSince I'm using 0603, it would block around 5 pins per cap. Should I put the chip and the caps on the same layer and do as you said, or fan out 5 pins from the bottom side? I'm currently putting the cap on the underside of the chip and go through vias to the VDD/GND pairs.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 25, 2020, 09:39:31 am
content: Quote from: romhunter on December 25, 2020, 08:14:42 amSmallest package you can handle (typically 0402, that's doable for most of us in prototyping, and everyday business even for low-grade contract manufacturers; but 0603 is acceptable if you like handling them better), just place next to the pins. It helps if you can decide not to use one of the IOs next to the power pin, but even if you do, you can either route the signal "opposite direction" using a via under the package, or you can just pull the capacitor a tiny bit out so you can route the one or two signals.It helps to use the smallest track and via size your PCB manufacturer supports, to escape thesignals. You can then widen the tracks once cleared out of the vicinity of the chip.So route power first and give it the priority.See attachment how I tend to do it. Note the signal traces going under the chip.Even if you mostly like 0603, consider changing just those 100n bypass caps to 0402 because I think it helps quite a bit. For small prototype batches, the small amount extra time you spend being more careful to solder them is saved in the design phase making routing easier. For production, 0402 poses no actual problem despite interwebz forum claims that some obsolete CMs stuck in 1980's still exist (my take is, just avoid those CMs).

author: Siwastaja
author_rank: Super Contributor
timestamp: December 25, 2020, 09:48:21 am
content: This may be a better example, all nearby pins in use for signals. Note how the capacitor ground pin is connected both to the ground plane through a via, but also to the pin through another track. I don't think the latter is really necessary, the MCU ground pin has two vias very close to it under the chip.See how easy the routing gets when you can use 0402 parts. I gladly take the "disadvantage" of needing to be a bit more careful during prototype assembly. I like simplicity over complexity and that works in routing as well, and I think miniatyrization of parts often brings you simplicity and ease of design. I have this attitude that I'm a designer first and foremost, and it's enough to me I'mableto build my own prototypes, it doesn't need to be extra easy or fun, it's not my core work. Manufacturability is very important, though, never compromise that!Hole size is 0.25mm and track width 6 mils. If you try to do this with, say, 0.4mm holes and 8 mil tracks, you are out of luck already, and need to push parts further and escape traces in stupid patterns.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 25, 2020, 09:58:05 am
content: Quote from: romhunter on December 25, 2020, 09:15:36 amI missed that piece of information originally. If they are right under the chip, they are close enough to function properly, it's a good solution overall, very widely used, basically the only way with BGA.Though, for such simple design, I think you can reduce the manufacturing costs by going for single-sided load. Two-sided load requires two passes in reflow oven. For just a few caps that absolutely do notneedto be there, that's a lot of cost per cap! OTOH, for a complex design, you are utilizing both sides for a variety of components (with only the limitation that the bottom side doesn't hold heavy components which would drop in the second reflow step).

author: romhunter
author_rank: Regular Contributor
timestamp: December 25, 2020, 10:50:27 am
content: Thank you for all the feedbacks regarding the decoupling caps. I'll change the layout for that.What about other tracks? Namely the power distribution? Ground plane? Signal tracks? I would gladly accept any feedback to improve my skill.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: December 28, 2020, 02:54:15 am
content: First, you've clearly put some effort in this.There are a bunch of things I would do differently. Some are "good practices" others just personal things. I write them down in the order I see them, there is no order of importance.I do not like the blue boxes drawn around schematic sections. They just clutter the schematic without adding anything useful. I've done it this way in the past and it is just a high maintenance thing. Leaving a bit of whitespace between the sections is just as clarifying. What is more useful is to use a bigger font for the notes, so you can also read them when zoomed out.The NCP1117 has very little cooling. Connect it to a decent piece of copper and use that as heatsink.Add an inductor to filter the incoming 5V to the board. This keeps out a lot of electrical garbage from the external power supply. Is power coming through the USB connector, or via the J1 or J2?Add a Polyfuse in the power supply section.Add a small SMPS circuit, so you can power the board from any voltage between 6V and 30Vdc.I would make a hierarchical sheet just for the power section, from Power entering the board, voltage regulators NCP1117, decoupling caps, filter for analog supply.Does CH340 have on-board pull down resistor and series termination resistors? My memore is a bit foggy there.I would use "MountingHole_Pad" for the mounting holes, and then connect them to the GND plane.You do not have a GND plane. It's all cut to little pieces by the vertical tracks on the bottom layer. All the I/O tracks to J1 and half the I/O tracks to J2 go over big gaps in the GND plane.You especially cut the GND plane to pieces with the VDD_MCU net. You can route this net with a big fat track on the top layer from JP6 to the CPU and also use the area on the top layer under the CPU to make this a "star distribution point from there.10uF Ceramic capacitors in 0603 package. Are those available? (Cost!). A capacitor with too low ESR after the NCP1117 may cause instability.I never draw the outlines of zones on the outlines of the PCB. I usually draw them in a weird shape, for example a pentagon around the PCB. If then the zone filling goes wrong, you see it instantly, also on generated Gerber files. If you draw it on the outline, and for some reason the zones get filled to the edge of the PCB it can cause shorts because of burrs during routing. (Especially with 4 or more layer PCB's).Put the crystals closer to the uC, and the capacitors for the crystals between the crystal and the uC, so their GND connection is much closer to the center of the GND plane under the CPU. Route OscO and OscI as a differential pair, wires close together and minimize loop area. Preferably also make a slot in the GND plane just around the crystal, so no currents can flow under the crystal through the GND plane. Connect this isolated part in such a way that OScI and OscO are routed over the connection.If you have to make long slots in the GND plane, then at least use some via stitching every cm or so, or better, Put some vias in the tracks that cut through the GND plane to the other side, so you have only small gaps in the GND plane itself.Run DRC and look at the "Unconnected Items (1)" tab. There is a connection missing in the 3V3 net. This is best solved by a 3V3 zone on the top layer around the NCP1117. You can then also use that as a heatsink.Are you sure you want to stick out J4 (Pickit) so far from the board? It's mechanically very vulnerable.SW1 through SW4. I assume you forgot the junction dots to connect them to the RC filters.Short circuiting a ceramic 100nF capacitor with a switch will overload the switch, and inject a lot of noise in the GND plane. Such capacitors can deliver 10A peak currents! To fix it, connect them in series, as in: (3V3) -> 1k -> 470R -> Cap. -> GND and then connect the switch to the junction between the 1k and 470R resistor, and go from the capacitor to the uC.R14 may have too high a value. LED backlight often sucks quite a lot of current. Watch out for dissipation in this resistor. Maybe add a transistor here, so you can switch the backlight off with the uC.Is R5 (1M over crystal) needed? This is usually integrated in the oscillator in the uC these day's.Clean up Silk ScreenThere are also some texts in the schematic overlapping with tracks.You've used 3mm mounting holes. If you want to use M3 screws, then use 3,2mm or 3,5mm holes.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 28, 2020, 07:30:47 am
content: A few comments on Doctorandus_P's reply;Adding input inductor and polyfuse "just for fun" is IMHO bad advice, both have real traps for young players and are non-trivial to design right and likely do not produce the result you expect from them. Inductor can oscillate with the input capacitance, causing the exact problem which you are trying to solve (and which likely doesn't exist). Polyfuses require derating or are surprisingly short-lived. For example, if your expected maximum current is 0.5A, you should pick 1A hold current, in which case it may actually trip at 3A today, and at 1A tomorrow. USB power supply does better job on overcurrent protection, and traditional fuse does better job protecting against fire / serious physical damage (if applicable, likely not with such a circuit). When in doubt, keep it simple!The regulator only needs larger cooling area if it produces too much heat for the currently available cooling area. The MCU itself definitely does not pull that much current. Assuming there is no significant power output through the pin header, the current design is likely just fine. Regulator datasheet lists RthJ-A with minimal footprint, use it to calculate the die temperature.SMPS for "any voltage" input is obviously a nice feature, but today, USB 5V powered devices are very common and people are often happy with this option only. Linear regulator is simple and fine for such low-power circuit. I'd use a more modern linear regulator with better stability in respect to the output capacitance and ESR, though.

author: Simon
author_rank: Unknown
timestamp: December 28, 2020, 01:11:16 pm
content: try to get a small capacitor near each pin, with a double layer board you have plenty of space to run signals. The use large capacitors close by by far enough away to not upset the I/O traces.