Number of clock cycles required by the DSP exceeding the MCPS amount? - Page 1
Forum section: electronics / general

author: mahaju
author_rank: Newbie
timestamp: September 10, 2024, 06:34:05 am
content: I have an audio DSP that takes audio samples from a mic, does some processing and plays back the processed samples from a speaker. Something like this:Mic->mic buffer in DSP -> Long processing function -> speaker buffer in DSP -> speakerThe MCPS value for the DSP is set at 120 MCPS at the beginning of the application whish I assume means the DSP can generate 120,000,000 clock ticks in 1 sec, and if I count the number of clock ticks required by all the DSP instructions in a 1 sec duration, this value should be less than 120,000,000. Am I correct in my thinking here?The DSP that I am working with provides a simulator that they say is cycle accurate, and also lets me input pcm data form a wav file, perform the "Long processing function" in the simulator on PC and save the result to a file. At the end of the simulation it shows me the number of clock cycles used up by all the DSP instructions in a disassembly window. It turns out that the clock cycles used up by "Long processing function" is much higher than 120,000,000, at least as shown by the simulator.I have run the DSP application in hardware in real time, and the audio output sounds as expected. The chip doesn't heat up or anything like that either. If my application was exceeding the set MCPS rate by such a large amount, I assumed something would have been visibly or audibly wrong when running my program on hardware. (It's also possible that I misinterpreted the clock cycle count shown by the simulator; I'm looking into that as well).I am looking for some outside perspective on this. Am I right in thinking that the total number of clock ticks I counted in the DSP code for 1 sec of program execution should be less than 120,000,000? If my program does exceed this value, wouldn't it cause any problem in the program execution? Is it possible to exceed this value and still have the program running in hardware without any side-effects? Or the fact that the program runs as expected in hardware without any audio distortions imply that I am in fact not exceeding the MCPS rate, and I misinterpreted the simulator's result?

author: Kleinstein
author_rank: Super Contributor
timestamp: September 10, 2024, 07:23:27 am
content: If the DPS program needs more clock cyles for the calculation than available it will react in a different way than planed. There is a good chance is could skip over samples at the input and thus run at something like half the data rate, so that the DSP part can catch up. The details depend on the program.In some cases this may still give an acceptible result. Especially with audio the high frequency part is often not that improtant - e.g. many people can hardly hear things above 10 kHz and thus the upper half of the classical audio band.

author: SteveThackery
author_rank: Super Contributor
timestamp: September 10, 2024, 10:57:03 am
content: I am absolutely no expert, but I had a similar situation to you: I was using an Arduino to process audio (yes, I know) and it didn't have the horsepower to complete the algorithm before the next audio sample was due. In my case it just started delaying the sampling, which introduced distortion at the output because the algorithm was built around the assumption that the samples would be at the specified rate, evenly spaced and with none missing.

author: mahaju
author_rank: Newbie
timestamp: September 11, 2024, 01:16:39 am
content: Quote from: SteveThackery on September 10, 2024, 10:57:03 am@SteveThackery yes I think that would be the expected behaviour and if my dsp did that the situation would have been clearer, at least I would have known what the problem is. My current situation is I am not sure whether my program is consuming more clock ticks than the chip can generate, but still not showing any side-effects in its output (which I think would be a weird thing to happen), or I misinterpreted the result of its simulator. The chip manufacturer isn't replying to my questions either.The DSP does have cache memory and performs pipelining, but I don't know if that can cause such a drastic difference in the measured clock cycles. The MCPS rate set for the DSP, and the number of clock cycles I measured for my "Long processing function" is significantly different.