understanding the following regulator circuit - Page 1
Forum section: electronics / projects

author: john23
author_rank: Frequent Contributor
timestamp: October 05, 2025, 12:26:45 pm
content: Hello , There is a very intresting circuit taken from the attached article.I am trying to understand its mathemtical logic.Could you help me logickally dissamble it into different parts so I will se the functionally of each part and how they play together?https://www.edn.com/a-temperature-compensated-calibration-free-anti-log-amplifier/

author: mawyatt
author_rank: Super Contributor
timestamp: October 05, 2025, 02:52:43 pm
content: This is a Log-Domain Antilog type circuit utilizing the base-emitter voltage and collector current natural log and exponential relationships.The input signal is inverted by U5 and has a fixed gain that is TC compensated by{ptc}. U5 output (VS scaled version of Vi) drives the base of Q1b which has it's collector forced to 0 volts by negative feedback in U2 and the collector current is fixed at Vref/Ref at 10MΩ or 250na. C2 is the integration capacitor in the inverting feedback around U2.Voltage A is the output of U5 and Vbe of Q1b with a fixed bias collector current of 250na, which is VA = vt*ln(Ic/Is) = Vbe +VS, where VS is the scaled input signal, and this voltage is "forced" upon Q1a emitter with Q1a base at 0 volts. So Q1a collector current is Ic = Is*exp(VA/vt) where Is is saturation current and vt thermal voltage kT/q and VA is the sum of the Vbe to produce the bias collector current and the scaled input VS which yields a simplified solution of Ic of Q1a is Ibias*exp(VS/Vt). Q1a collector is forced to 0 volts by U1 negative feedback and collector current scaled by R1 and integrated by C1 to produce the output VO as the scaled version of the exp of Vi where Vi is always positive, and the signal is integrated along the way by C2 and C1 respectively.The article shows a way to temperature compensate the output result since the basic output is exp(-Vi/vt) where vt is the thermal voltage kT/q and thus temperature influenced.Anyway, hope this helps.Best

author: john23
author_rank: Frequent Contributor
timestamp: October 14, 2025, 05:40:34 pm
content: Hello mawyatt,Thank you very much for the informative responce:1.What power supply should I use in this case for the opamps ?2."The input signal is inverted by U5 and has a fixed gain that is TC compensated by{ptc} resistor"How can I know the needed value of PTC resistor in ltspice simulation when input signal enters U5?3.the collector of Q1b is connected to the negative port of U2.I am having trouble to understand the sentence bellow.How can I test the U2 Q1b relation to see what is needed from this part of the circuit?"U5 output (VS scaled version of Vi) drives the base of Q1b which has it's collector forced to 0 volts by negative feedback in U2 and the collector current is fixed at Vref/Ref at 10MΩ or 250na."

author: mawyatt
author_rank: Super Contributor
timestamp: October 14, 2025, 06:25:44 pm
content: 1) Use any power supply within the op-amp limits and the expected maximum input and range of the output signal from U5.2) You'll have to solve the equation that shows the total TC of the entire chain, then compensate by selecting the proper value for {ptc}.3) Q1a and Q1b need to be tightly matched, and best if they are on the same die (dual package transistor). These form the core and thus small offsets and/or parameter difference can cause large errors in the final voltage from U1.For example, assuming ideal op-amps and room temp, if the voltage at Q1b emitter (U2 output point A) as sensed by Q1a and the difference is ~19mV, then the collector currents will differ by 2X, if the difference is ~59mV then the collector currents will differ by 10X!!Best

author: john23
author_rank: Frequent Contributor
timestamp: «Reply #4 on:Todayat 07:46:23 pm »
content: Hello Mawyat,I am trying to start simulating parts of the structure according to the original circuit as shown in the photo and LTspice.few question:1.what kind of signal I need to put inside the input signal to see the regulating in action?2.after the opamp stage we are basicly ampliying the input signal and puting it into the base of q1.what state the Q1 needs to operate in so this half of the circuit will function properly?Thanks.