Inverter symbols - Page 1
Forum section: electronics / beginners

author: nilium
author_rank: Contributor
timestamp: December 18, 2013, 08:29:44 pm
content: Found this on a TI 74LS148 datasheet. Is there a functional difference between these two inverter symbols? If not, why would anyone even draw this?Thanks,N

author: free_electron
author_rank: Super Contributor
timestamp: December 18, 2013, 08:47:15 pm
content: first is an inverter followed by a buffer.logic functionality is the same, internally it is constructed a different way. this is common because these are schematics drawn by using symbols typical for IC design.

author: nilium
author_rank: Contributor
timestamp: December 18, 2013, 08:49:43 pm
content: Thank you! It was hard to believe there wasn't a good reason for different symbols.

author: nilium
author_rank: Contributor
timestamp: December 21, 2013, 03:13:59 am
content: What is the purpose of these buffers—amplification/impedance matching? Looking at the attached schematics, one would think the input impedance of the AND gates is low. If that's the case, I don't quite understand the rationale behind placing the buffer downstream of the inverter for G3. Are both buffers adjacent to match each other's impedance?Thanks in advance!N.

author: mrkev
author_rank: Regular Contributor
timestamp: December 21, 2013, 03:57:17 am
content: Quote from: nilium on December 21, 2013, 03:13:59 amI don't think that they will be internaly different. As this is probably on one chip, inverter is usually done as one pair of transistors. I woud say that schematic looks like this for better analogy. So you realised that inverted input is taken and inverted (again) output is gonna be at the other side.

author: nilium
author_rank: Contributor
timestamp: December 21, 2013, 04:06:13 am
content: Thanks, mrkev.It is indeed part of one chip (74LS148).Are you saying that there is no reason driving the choice of inverter/buffer order? Not even a subtle one?

author: mrkev
author_rank: Regular Contributor
timestamp: December 21, 2013, 04:17:12 am
content: Quote from: nilium on December 21, 2013, 04:06:13 amWell if there is, i don't see itAnd when you think about the buffer, it's usually inverting, so you don't need two circuits, one does job of both.Btw. this is how they internally look like. The first one is probably the one used. It's just inverter that has enough power to drive another logic inputs on chip. The second one is inv. with buffer (that would be used to drive more log. blocks or for ext. output) and third one is invertor in cmos logic (in fact buffer and inv in-one), which can be done quite big and capable of driving multiple log. inputs right away.

author: nilium
author_rank: Contributor
timestamp: December 21, 2013, 04:29:48 am
content: Hmmm...I still think there must be something that makes the chip designers place the inverter before the buffer at G3 and the other way around at G9. Otherwise why bother making and using two different symbols?Edit: Thanks for the 3 diagrams. Didn't see those at first! Still wondering about the actual choice of inv-buff (G3) versus buff-inv (G9) in the specific implementation of the 74LS148.

author: megajocke
author_rank: Regular Contributor
timestamp: December 24, 2013, 04:43:41 pm
content: They draw the symbol that way because it makes more functional sense as the inputs to the chip are active-low. I've never heard it being related to buffers or anything. Any references apart from hearsay?All the standard gates can be drawn in two different ways, and they are called DeMorgan equivalents. You'd choose the one that most clearly illustrates logic function. For example, an OR gate is the same as an AND gate with inverting inputs and outputs. The latter could be used when you want an active-low output signal that is active when both active-low input signals are active.See this link for a table:http://webdocs.cs.ualberta.ca/~amaral/courses/329/webslides/Topic8-DocTimeDiagrams/sld011.htmYour inverter symbol is in there too

author: Zero999
author_rank: Super Contributor
timestamp: December 24, 2013, 06:08:31 pm
content: Quote from: free_electron on December 18, 2013, 08:47:15 pmYes.An inverter will have the propagation delay of one gate, a buffer is two inverters connected in series so it'll be 2 and an inverter followed by a buffer 3. The inverter followed by a buffer will also have triple the gain and will oscillate at a high frequency if you bias it in its linear region.