IrDA SIR interfacing (SOLVED) - Page 1
Forum section: electronics / beginners

author: truhlik_fredy
author_rank: Regular Contributor
timestamp: March 26, 2011, 12:46:52 am
content: I'm experimenting with serial IrDA SIR transfer. I have 3th party device sending data. I made receiver with similar SFH203F and connected to similar general purpose opamp in similar circuit like this one:I made just the 1 stage by that circuit. First I used to read data from 2mm distance and that was OK, but now I want to have much bigger distance, perhaps 1 meter so after first stage I amplified it, then made hysteresis and then amplified rail to rail, and now I'm able to read data from 10 cmbut it's very sensitive for ambient light. There are 2 problems, first I perhaps should put cap in series to make it more robust from ambient light, but the second problem is that SIR protocol makes about 20uS pulses for 100uS signal, so when my USART MCU receiver is expecting to have same value for next 100uS it have the value just for small period and then changes, till the USART reads it, it's something else there already. So I amplify and amplify till the distortion is so big that the pulse is getting wider and of course amplify the background and ambient as well. When I checked on scope the pulses are pretty nice even on larger distance, just they are not wide enough. So when I could get some sort of "pulse delayer" then I didn't need so insane high gain and the ambient light problem could get better.Because I have don't know what is best approach with photo diodes and how to amplify them correctly so I decided to leave problem 1 for later and started thinking of some delay circuit, first I was thinking of some caps to hold the charge, or gates to delay them and on the end the OR gate, or something like this, then I found thisAnd I wasn't sure if it isn't el cheapo approach. Or one based on 555 timers. I want to have it properly made, no that after slight temperature change it will misbehave etc... I was trying to search ebay, but usually just found 2 kinds, overkills (like motherboard controller, irda, keyboard, hdd leds, irqs, timers and milions of other features) or I found absolutely useless ICs (like IR remote control ICs). So I could not find dedicated IC for interfacing with IrDAs SIR mode. I decided to do mine. I didn't had by hand any other gates except INVerters so I abandoned that idea, but I have nice small cheap CPLD xc9572xl. So I made this delay in verilogmodule hlavny(clk,signal,vystup,done);(* LOC="P1" *) input clk;(* LOC="P13" *) input signal;(* LOC="P14" *) output vystup; reg vystup;(* LOC="P34" *) output done; wire done;assign done=0;reg [12:0] pocitadlo = 0;reg cnt,pulse;always @ (posedge clk) beginif (signal && !cnt) begincnt<=~cnt;pulse<=1;end else if (!signal) begincnt<=0;end else beginpulse<=0;endif (pulse == 1) beginpocitadlo<= 0;end else beginif (pocitadlo<2500) beginpocitadlo<=pocitadlo+1;vystup<=1;end else beginvystup<=0;endendendendmoduleI have much easier and preciser control how long the pulse will be held. It detects raising edge, what I think is much better than falling edge with the transistor and cap design, because it's counting from beginning of the pulse, not from end, so my delay is exact signal width not like with the cap where the whole width is the signals width + delay width.It synthesizes in 17 macro cells, so still 75% resources free, what I will use later when I will be making transmitter and I will need to make this short pulses. They should be 3/16 of the original signal width and even when I found another circuit with 555 to make this, the frequency was regulated just by eye, so not very precise and perhaps not very long term stable.So the CPLD has many advantages against just analog circuit but now I'm thinking that CPLD is still overkill, it should be done much easier and there should be ICs to do the amp for photo diode and interfacing IrDA SIR to USART and vice versa. So the question is there something with normal price and good availably (like ebay etc...) that will do precise this kind of job for me? Should I go different path or continue with the CPLD. For any pointer I will be very thankful.AntonPS: If somebody want take the verilog code, just go ahead. Just change the LOC locations for your pins. The constant for counter to stop is calculated for 25Mhz clock, change that as well with different delays and different clocks.

author: truhlik_fredy
author_rank: Regular Contributor
timestamp: March 26, 2011, 04:04:34 am
content: Why it's always so when you spend week to find answer, just after posting question somewhere you will find answer?I found the MAX3131, it looks like exactly what I wanted.