i2c bus isolation for un-powered AVR [SOLVED] - Page 1
Forum section: electronics / general

author: rx8pilot
author_rank: Super Contributor
timestamp: February 14, 2015, 11:24:08 pm
content: Hi all, I have a challenge that I have not been able to solve. Hopefully someone has seen and solved this before.I have a system with multiple AVR MCUs on a few different PCBs. All of them communicate with TWI (i2c). One of the PCBs could be intentionally shut down as part of a safety response. The problem is when that AVR is shutdown, the i2c bus (SDA and SCL) is pulled low by the internal IO pin diodes.I am trying to figure out a simple circuit with FETs that will block the i2c signals from entering the AVR when powered down. I added two N-Fets to the SDA/SCL pins oriented with the SOURCE to the AVR and the DRAIN on the i2c side of the FET. The GATE is driven HIGH by a 10v Zener circuit connected to the main power bus 17v.The goal is that the when the 17v bus is on, the AVR powers up and the FETs bi-directionally pass the i2c data. If the 17v goes off, the FET's turn off and block the SDA/SCL from being grounded by the AVR. The question I have, is whether the SOURCE of the FET being tied to the AVR pin will be sufficiently grounded to where it will turn on with the gate being charged to 10v will actually create a Vgs of around 10v minus the diode drop.ADD:This is an I2C slave only. 5v.R29 discharges the GATE when 17v is OFFC13 is just a bypass cap.Z1 is a simple limiter since 17v is close to the limits of the FETs and could go over.

author: voltsandjolts
author_rank: Unknown
timestamp: February 15, 2015, 12:00:26 am
content: I2C isolator perhaps, e.g. Analog Devices ADUM1250http://www.analog.com/en/products/interface-isolation/isolation/standard-digital-isolators/adum1250.html#product-overview

author: rx8pilot
author_rank: Super Contributor
timestamp: February 15, 2015, 12:27:18 am
content: That seems to be a sure solve. Only downside is cost, but at least DigiKey stocks them at $4.70/100. I was looking at another pre-engineered low-cost isolator but availability was marginal.Do you think the FET approach could work? If so, it a $.50 solution. No need for hot-swap, just need the i2c pins to be Hi-Z when the AVR is off. In the end, these will be produced in 1000's so if a reasonable low-cost option exists, I am motivated to find it.

author: rx8pilot
author_rank: Super Contributor
timestamp: February 15, 2015, 03:36:06 pm
content: Quote from: evb149 on February 15, 2015, 02:18:58 amThere is one i2c MASTER that will always have power with 5 slaves. The PCB that could be shutdown, has an AVR slave and two special purpose slaves. The special purpose slaves go Hi-Z while not powered so they have no impact on the i2c bus. Only the AVR pulls the bus low when it does not have power.Quote from: evb149 on February 15, 2015, 03:59:27 amIt appears the 2N7002 has been replaced by the DMN65D8LDW. I still have some of the 7002's, and they seem to be the same - at least for this purpose. The Vgs cn go up to 20v. Maybe I should use a 15v Zener so that I always have 10v above the +5 state. My biggest question is this: when the AVR is powered up and the TWI/i2c bus is configured, those pins should go Hi-Z. If this is the case, the Vgs would not matter becuase the SOURCE pin is effectively floating. Does that sound right?Maybe put weak pull-ups between the source and the AVR like this to ensure the FET will actually turn on.

author: mikerj
author_rank: Super Contributor
timestamp: February 15, 2015, 07:36:13 pm
content: Have a look for I2C hot swap buffers such as the NXP PCA951x (x=1,2,3,4)

author: rx8pilot
author_rank: Super Contributor
timestamp: February 15, 2015, 09:02:29 pm
content: Quote from: mikerj on February 15, 2015, 07:36:13 pm"hot swap buffers" is the critical key-word, finally got that. thanks.Looks like TI, Linear, NXP are the most well known, but there are a bunch of options for these components. The TI is under $1 which is appealing and it will work far better than what I have so far. They all seem to be in relatively huge SOIC-8 packages, but I can deal with that.Choice for prototype: TI TCA4311ADRSolved. Thank you for the help.

author: mikerj
author_rank: Super Contributor
timestamp: February 17, 2015, 01:31:30 pm
content: No problem, glad I could help. As an aside, some of these buffers have built in logic that will attempt to automatically clear a stuck bus.

author: rx8pilot
author_rank: Super Contributor
timestamp: May 08, 2015, 05:39:44 pm
content: Just an update on this topic. The TI solution worked perfect through prototyping and will continue on into production. Does a great job keeping the TWI/I2C bus clear until the MCU is ready for it.

author: nctnico
author_rank: Super Contributor
timestamp: May 10, 2015, 03:57:45 pm
content: Quote from: rx8pilot on February 14, 2015, 11:24:08 pmIf this is bit-banged I2C be aware that Vih and Vil levels can be terrible (for I2C) on Atmel devices which results in EMC problems with longer I2C busses. Better use a microcontroller which has real I2C pins and doesn't load the bus when powered off.