LTC1871 based boost converter - please check my layout - Page 1
Forum section: electronics / beginners

author: newbie666
author_rank: Regular Contributor
timestamp: December 29, 2013, 05:10:21 pm
content: Hello,I am a beginner as far as dc-dc converters go and I've decided to take up a boost converter project as a nice way to get going. I am trying to design a boost converter for small tube circuits. Here are the parameters:Vin = 30-32VVout = 220VIout = 50mAf = 300kHzFirst thing I've done was to do some calculations as per datasheet. Then I've put the circuit together in LTSpice, imported IRF644 model as it seems suitable for switch for this application and it seems to work after some tweeking of L and Cout.Here's the schematic:And inductor current + output voltage waveforms:Questions I have:First of all what value of the SENSE resistor should I use? I just picked a value I saw on an example circuit but I'd like to be more aware of where it came fromWhat exactly is the function of Ith pin? I can see on the block schematic of the IC that it's voltage is compared to the sense input but I don't really understand why. Can anyone explain what's the deal with current mode regulation? How do I choose R and C at the Ith pin?When the converter starts I can see the inductor current is in the range of 3-4A. When the output voltage get's to the desired value it drops to 0.2-0.6A so I thought about using 220uF/1A inductor. What's going to happen in the startup phase? Will it saturate? Does it mean that the converter will take longer to start or won't start at all?What's up with that weird current peak between 4.8ms and 5.4ms? Output voltage seems to be in the desired range already, why does the inductor need to work so hard?I know spice is not the same as the real thing but that's all I have at the moment. I'll be building this converter as soon as I get myself a scope.Thanks a lot for your help!link to LTC1871 datasheet:http://cds.linear.com/docs/en/datasheet/1871fe.pdf

author: mrkev
author_rank: Regular Contributor
timestamp: December 29, 2013, 09:09:52 pm
content: Hi,I'm not really fammiliar with this chip, but I've done (just) few DC-DC converters, so I may help a tiny bit.Quote from: newbie666 on December 29, 2013, 05:10:21 pmLook f.e. at page 15, right-side colum. SENSE pin is usually used to get the current running through the inductor (as it is here). By changing the Rsense(R1 in your case), you can adjust the max. current. I'm not sure what is the value of Vsense, since it deppends on the operating mode. I would recomend to print out the datasheet and read it carefully. As your output current is really low, you shouldn't need more than 1A through inductor, I would try to increase the value of R1 (significanly, to something like 0.05 or more).Quote from: newbie666 on December 29, 2013, 05:10:21 pmI'm not really sure but guessing from the block diagram, it seems to change the threshold value of Vsense. Can't find anything else, to read it carefully would take another hour...Quote from: newbie666 on December 29, 2013, 05:10:21 pmAs I wrote before, I don't think that you need such a high current. And yes, if you get pass the saturation, it will take more time to start up, but i would be more concerned about possibility of damaging the inductor.Quote from: newbie666 on December 29, 2013, 05:10:21 pmBecause the sense resistor is so lowBtw. you took it from design of converter that has >14Amp output...Well it's not much, but i've tryed

author: newbie666
author_rank: Regular Contributor
timestamp: December 29, 2013, 09:51:37 pm
content: thanks! I will print the datasheet and have another read tomorrow. Also, I'll try to increase Rsense. I haven't realised that it was limiting the maximum current. That definitely clears up some things.

author: mrkev
author_rank: Regular Contributor
timestamp: December 29, 2013, 11:54:41 pm
content: I look at that block diagram one more time and I think that it works this way:The oscilator gives the pulses. PWM latch is swiched on by it and that is gonna swich on the mosfet. PWM latch is reset by pulse to R. This puls is generated by thecurrent comparator, OR by aOV comparator.Thecurrent compis comparing voltage at SENSE pin with voltage at RLOOP. This means that the mosfet is switched off when the current (sensed by a Rsense) exceed some value (it should be max 140mV, more later).TheOV comp.is on when feedback voltage (from output) exceed 1,315V. This arangement is for so called "skipping". It will skipp the pulses when output voltage is higher by 6,5% (234,3V in your case).The feedback is also going through thetransconductanceEA amplifierwhich is amplyfying by gm(i really don't know why they use mho - ohm backwards; instead of S-siemens) this means that difference between FB and reference 1,23V is "changed" to a current. This current is charging external capacitor at ITHpin. Voltage from this pin is again transfered to a current (by the V-to-I) and this current is driving the RLOOP.This all means that if the difference between FB and reference 1,23V is low, the voltage at RLOOP(remember, it coresponds to max. inductor current) is decreased; when it's high, the max. inductor current is increased.So the combination of Rc and Cc1 (R3 and C2 in your schematic) is affectingmax. inductor currentversus thedifferenceof theoutput voltagefrom theselected value.The example would be:Let's say that you want 220V at the output. The actual value is 210V. You have divider (R6 and R7) set to about 1/179. FB voltage is 210*1/179 = 1,173V. Ithcurrent is gonna be (1,23V-FB)*gm. gm(from datasheet at page 3) is 650uS. Ith=(1,23V-FB)*650u=37uA. This current is charging your C2 via R3. If C2 is not charged (I am over-simplyfying) It will make difference of about 0.8V reducing the inductor current from 140mV/Rsenseto 80mV/Rsense(I guess - since the range of voltage for Ith is 0V-1,4V and it's directly responding to 140mV at Vsense(max)). (ITHis also probably clamped at that 1,4V value, so you won't get higher current than 140mV/Rsense.)So increase the R3 and you will get higher inductor current (and big changes of that current) corresponding to how much your output is off from selected voltage. Decrease it and you will get slower response (and the current won't change that much).Increase the C2 if you wanna slow ramp-up, decrease it if you wanna quick one.

author: newbie666
author_rank: Regular Contributor
timestamp: December 30, 2013, 06:44:06 am
content: Thank you for an excellent explanation. This all makes sense nowEdit.So I've changed the Rsense to 96 to keep the inductor current below 1.5. I have also tweaked the values of Rc and Cc (47k, 1nF) and here's the end result.I think it's pretty nice. Going from 0 to full load I get only around 0.35V ripple with 47uF output cap. What else can I simulate in LTspice that could be usefull?Now I'm going to build it and see what's the simulation errorKeep your fingers crossed.

author: megajocke
author_rank: Regular Contributor
timestamp: December 31, 2013, 02:24:54 am
content: You could try simulating load step response where you let the converter reach-steady state again between each transition, but otherwise it's like the curve you already have posted. Alternating between 50% and 100% (and/or 10% and 100%) of maximum output current with 1 µs or so rise/fall times might be a typical test.47 µF seems huge for the power/switching frequency combination, but sometimes it can make sense to have a large output capacitor. I guess you would be using an electrolytic? Make sure you check the current through the capacitor and don't forget that ESR will make output ripple (at the switching frequency) much worse than what your simulation shows.One situation where a very large output capacitor together with a slow control loop is useful is when you want to supply a load drawing a pulsating current at a relatively low frequency, using a converter that only handles the average power drawn by the load instead of the peak.Could you post your .asc file?

author: newbie666
author_rank: Regular Contributor
timestamp: January 02, 2014, 06:22:03 pm
content: Hi megajocke,I'm probably going to use a smaller cap as the load will be drawing pretty much constant current. Thanks for all the other tips as well! See the attachment for the LTspice file. Had to zip it as I couldn't attach asc.Here's the transistor model I've used.Code:*Feb 19, 2010*Doc. ID: 90205, Rev. A*File Name: part irf644s_PS.txt and part irf644s_PS.spi*This document is intended as a SPICE modeling guideline and does not*constitute a commercial product data sheet. Designers should refer to the*appropriate data sheet of the same number for guaranteed specification*limits..SUBCKT irf644s 1 2 3*************************************** Model Generated by MODPEX **Copyright(c) Symmetry Design Systems** All Rights Reserved ** UNPUBLISHED LICENSED SOFTWARE ** Contains Proprietary Information ** Which is The Property of ** SYMMETRY OR ITS LICENSORS **Commercial Use or Resale Restricted ** by Symmetry License Agreement **************************************** Model generated on Jun 13, 00* MODEL FORMAT: SPICE3* Symmetry POWER MOS Model (Version 1.0)* External Node Designations* Node 1 -> Drain* Node 2 -> Gate* Node 3 -> SourceM1 9 7 8 8 MM L=100u W=100u* Default values used in MM:* The voltage-dependent capacitances are* not included. Other default values are:* RS=0 RD=0 LD=0 CBD=0 CBS=0 CGBO=0.MODEL MM NMOS LEVEL=1 IS=1e-32+VTO=3.93445 LAMBDA=0 KP=4.69945+CGSO=1.19039e-05 CGDO=1e-11RS 8 3 0.000445828D1 3 1 MD.MODEL MD D IS=1.0995e-09 RS=0.0097058 N=1.31812 BV=250+IBV=2.5e-05 EG=1.2 XTI=3.07233 TT=0+CJO=1.12292e-09 VJ=5 M=0.878791 FC=0.5RDS 3 1 1e+06RD 9 1 0.194136RG 2 7 2.82207D2 4 5 MD1* Default values used in MD1:* RS=0 EG=1.11 XTI=3.0 TT=0* BV=infinite IBV=1mA.MODEL MD1 D IS=1e-32 N=50+CJO=1.98061e-09 VJ=1.23172 M=0.9 FC=1e-08D3 0 5 MD2* Default values used in MD2:* EG=1.11 XTI=3.0 TT=0 CJO=0* BV=infinite IBV=1mA.MODEL MD2 D IS=1e-10 N=0.439875 RS=3e-06RL 5 10 1FI2 7 9 VFI2 -1VFI2 4 0 0EV16 10 0 9 7 1CAP 11 10 1.98061e-09FI1 7 9 VFI1 -1VFI1 11 6 0RCAP 6 10 1D4 0 6 MD3* Default values used in MD3:* EG=1.11 XTI=3.0 TT=0 CJO=0* RS=0 BV=infinite IBV=1mA.MODEL MD3 D IS=1e-10 N=0.439875.ENDS irf644s

author: newbie666
author_rank: Regular Contributor
timestamp: January 06, 2014, 04:09:58 pm
content: Can someone please have a look at my layout?Schematic with part names:pcb:top layer:ground plane

author: poorchava
author_rank: Super Contributor
timestamp: January 07, 2014, 12:07:11 pm
content: I think you should remove thermal reliefs. They are handy for soldering, but they introduce additional inductance to traces, and you want all the power traces for catch diode, mosfet, inductor and capacitors to be as low impedance as possible.

author: newbie666
author_rank: Regular Contributor
timestamp: January 08, 2014, 09:23:32 pm
content: Cze??,Thanks for the tip. I used thermal reliefs because it's going to be my first board soldered in the oven and initially I didn't want the parts to tombstone. No reason that should happen with Cout or L so will change that

author: megajocke
author_rank: Regular Contributor
timestamp: January 08, 2014, 11:05:15 pm
content: Why do you have a hole in the ground plane under the coil?Removing or at least making the thermal ties wider for the power path components sounds like a good idea.

author: peter.mitchell
author_rank: Super Contributor
timestamp: January 09, 2014, 01:18:47 pm
content: May i have design file, I want to see if i can adjust the layout a bit, i see a few things but its hard to describe because im just working with it in my head.rotate inductor 90 degrees CW, move in VIN track.move FET down to pin lines up with inductorflip CIN left join grounds and move VIN over rightmove Rsense up and move the 2 COUT over towards the diodeshould have some room to move CVCC and chip to right,rotate R3 & R4 180 degrees and move in to big ground pour