Best way to get SMA GPIOs on an FPGA board? - Page 1
Forum section: electronics / general

author: Moritz
author_rank: Newbie
timestamp: June 23, 2025, 03:58:47 pm
content: Hi,I’m currently planning an FPGA setup where I need at least 6 SMA connectors that I can use as single-ended GPIOs (The SMA connectors are used to receive detection events as digital logic levels and to control external devices by sending corresponding on/off signals). I’ve seen some solutions using FMC adapter boards, but so far I haven’t found many FPGA boards with FMC connections where all other requirements are covered. Do you have any advice on how to connect multiple SMA connectors for GPIO purposes to an FPGA board?Thanks in advance!Moritz

author: tszaboo
author_rank: Super Contributor
timestamp: June 23, 2025, 04:08:47 pm
content: It would help if you tell us what board you are using.

author: Moritz
author_rank: Newbie
timestamp: June 23, 2025, 04:27:42 pm
content: I’m currently still in the process of choosing an FPGA board. Since I don’t yet know what options I have to implement the required number of SMA connectors, I haven’t made a final decision. My experiment does not have high performance requirements, so connectivity, specifically access to SMA connectors, is one of the most important criteria for me when selecting a board. As someone who has never worked with FPGAs before and has limited prior knowledge in electrical engineering, I’m trying to get a general overview of the possibilities to make these types of connections available. I would really appreciate any advice on how to approach this and what solutions are typically used to connect multiple SMA lines for GPIO purposes.

author: tooki
author_rank: Super Contributor
timestamp: June 23, 2025, 04:34:43 pm
content: Since you specify SMA: is this because of specific signal requirements (high frequency, in particular), or just low frequency, but because it’s what’s on the other end of the cable?If you need high-frequency properties, please specify those. (Rise time, bandwidth, etc.)If it’s just for low-frequency connector convenience, then it hardly matters how they’re connected, in that you can just wire SMA jacks to ordinary pin header connectors (“DuPont”, etc) or solder pads.

author: Moritz
author_rank: Newbie
timestamp: June 23, 2025, 04:56:15 pm
content: In my case, the input signals come from a single-photon detector with a dead time of 10 ns, so the maximum event rate is around 100 MHz. These signals are cleaned up using a comparator to produce proper TTL pulses. On the output side, I use the FPGA to control a modulator, also at frequencies up to roughly 100 MHz. I mainly prefer SMA connectors because all the devices I interface with (detectors, modulators, etc.) already use SMA, so it keeps the setup consistent and reduces the need for extra adapters.

author: ejeffrey
author_rank: Super Contributor
timestamp: June 23, 2025, 09:01:38 pm
content: Most of the FPGA dev kits I have seen primarily use SMA connectors for special purpose IO pins, either clock inputs or multi-gigabit transceivers. Generally I have found that for most things I need to make something custom.FMC is one option, but a lot of the less expensive development boards (like the Arty series) have an arduino or raspberry pi compatible shield footprint that's just filled with GPIOs. PMOD is also common, but you have to watch out as PMOD headers sometimes have level translators or buffers that limit the speed. It would be very quick to turn out a board that fit on one of those footprints and had exactly the SMA connectors you want. It would be just connectors so easy to hand solder. It's also easy to expand if you need to add more signal conditioning or other simple logic.

author: tooki
author_rank: Super Contributor
timestamp: June 23, 2025, 10:32:43 pm
content: Quote from: Moritz on June 23, 2025, 04:56:15 pmThanks, that is exactly the kind of answer I was hoping for.If your detector has 50 ohm outputs, and the rise/fall times and/or pulse width are critical, then you might want SMAs that are run through 50 ohm controlled impedance traces. If it’s just a matter of counting photon events, then it might not be critical and adapting other connectors/pads will be fine.I’ve done both kinds of boards for particle physics detector applications. I’m FAR from an expert, but basically, rise/fall times essentially dictate the analog bandwidth you need, and that in turn dictates how critical the wiring and PCB layouts need to be. (For example, if a 200MHz oscilloscope is sufficient to observe your signals, then a few hundred MHz bandwidth is enough for your board — not too critical. But if you need a 2GHz oscilloscope, then you need multi-GHz wiring and layout, and that is very picky.)

author: Someone
author_rank: Super Contributor
timestamp: June 23, 2025, 11:19:22 pm
content: Quote from: Moritz on June 23, 2025, 04:56:15 pmThis can also be a downside/"trap"/problem. FPGA IO (GPIO is usually microcontroller/software description/concept) has narrow voltage ranges and limited or no protection. Leaving that sort of fragile connection on a general purpose connector is a recipe for disaster.Generally any electrical connection to the FPGA IO is made to a specific circuit expressly designed for the task.

author: radar_macgyver
author_rank: Frequent Contributor
timestamp: June 23, 2025, 11:49:01 pm
content: Some vendors have PMODs with SMA I/O such as this:https://www.nettimelogic.com/shop.php#!/PM-GPIO-SMA/p/598630934PMODs will work with many low-end FPGA boards. The schematic doesn't have enough detail to tell if the SMA is terminated, but that can be easily added in to control the ringing that might otherwise occur with the fast risetime signals. The line buffer on each I/O gives some degree of protection to the FPGA I/O.Depending on how many of these you're building, you may be able to hack together something with GPIO PMODs, I could have sworn Digilent made those but I can't find them now.If you're using dev boards with the higher density SYZYGY I/O, there are some breakout boards available:https://opalkelly.com/products/szg-brk-std/https://www.lantronchips.com/product/good-stuff-department-syzygy-breakout*edit* fixed first link

author: asmi
author_rank: Super Contributor
timestamp: June 24, 2025, 01:47:12 pm
content: I would use a comparator/Schmitt trigger which would generate an input signal to FPGA that is guaranteed to be "safe" for it. There are comparators fast enough to detect pulses down to hundreds of picoseconds long, and you can set whatever threshold level you desire. In general connecting external cables directly to FPGA I/O pins without protection is a bad idea because simple cable bends can generate voltage spikes substantial enough to kill FPGA's I/O buffers - with the notable exception of MGT RX/TX pins as they are specifically designed to drive/receive signal from long transmission lines, but even those typically have ESD protection and typically use AC coupling to reduce potential for damage.

author: tszaboo
author_rank: Super Contributor
timestamp: June 24, 2025, 04:37:49 pm
content: Quote from: Moritz on June 23, 2025, 04:56:15 pmSelect the FPGA, then select a board for it. Don't select the board based on the IO.There is a saying in my language, which translates to: To select a coat for a coat button.Why? Because you are going to spend hours writing the VHDL code and minutes connecting things.

author: laugensalm
author_rank: Regular Contributor
timestamp: June 25, 2025, 08:46:00 am
content: Why not roll your own?The point is, that looking for a board with exactly that impedance, properly matched lengths and bandwidth may take you longer.You might just pick up a core module with capable I/O connectors and layout a base board for it.Or, the dirty way: wire them up flying. I've done so with a cheap MachXO2 board, the I/O was fast enough to resolve around 200 MHz. Wasn't too bad, just a flimsy setup.And yes, ringing may damage your I/O. So you might want to double-check impedance matching.Or you go check up on ready-made measurement gear from Zurich Instruments (R&S), m-labs, et al. with a bit of a budget, but not sure whether you will have to 'hack' that hardware.