9 bit CPU daydream - Page 1
Forum section: electronics / projects

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: November 22, 2020, 02:15:21 am
content: Just an idle speculation.I don't know much about CPU architecture, the microcode, etc so this is just a question.Why can't there be a 9 bit CPU? For example, the Commodore 64 has a horizontal video resolution of 320 pixels so any math involving moving across the screen involves carry bits and extra instructions. The video chip has the high bits of sprite positions in another byte, so moving each sprite requires addressing a bit in this byte to position it.So what if there is a 9 bit 6502 so that everything could fit into a 9 bit byte?You'd save lots of CPU cycles for sprite calculations, seems to me.Instructions would have bit 8 cleared so it can run 8 bit 6502 code natively, any instruction with bit 8 set high signals a 9 bit instruction.I suppose this would make C and Z flags kind of hard to figure, are they the result of an 8 bit or 9 bit carry?I can see problems but I can't see a showstopper. Anyone?I am thinking in terms of 1980s technology, not a modern FPGA. Like if Commodore spun their own 9 bit 6502 "9502" CPU in 1984 let's say.An intermediate step to the 16 bit 65816, just needs an extra DRAM chip and there you go. Of course storing and reading 9 bit files on 8 bit floppy drive DOS .... that's gonna be fun.So .. dumb or genius?

author: I wanted a rude username
author_rank: Frequent Contributor
timestamp: November 22, 2020, 02:27:31 am
content: In the early years of computing, there were many word sizes we would consider oddball today.18-bitand36-bitfor instance, as multiples of the compact 6-bit character sets in use at the time.There is no reason you can't design a 9-bit architecture, but multiples (and especially powers) of 8-bit are more idiomatic in binary systems, not to mention absolutely prevalent and entrenched. A loose analogy (based on convention, not intrinsic elegance) in decimal is the way you use powers of 1,000 (thousands, millions, billions, etc.) every day, and then one day you encounter 1,00,000 ==1 lakhand, not having been exposed to it before, it feels bizarre.

author: robzy
author_rank: Regular Contributor
timestamp: November 22, 2020, 02:29:55 am
content: So this is actually a bit of a fun question.This isn't a comprehensive answer - but one of the problems you'd run into is how you store everything in memory.Doing a mix of 8 bit instructions and 9 bit data words would be a nightmare.

author: magic
author_rank: Super Contributor
timestamp: November 22, 2020, 10:54:39 am
content: You would use 9 bits to encode instructions.I don't think there is anything fundamentally precluding such a machine. You would need to design a 9 bit RAM for it too, and maybe some permanent storage like disks with 4608 bits per sectorIt's probably doable even today, but quite pricey given the investment in reinventing almost every computing wheel.

author: hans
author_rank: Super Contributor
timestamp: November 22, 2020, 11:13:41 am
content: We as humans like patterns, and we seem to like 8-bit and multiples thereof. For example, we went from 32-bit to 64-bit x86 CPUs years ago. Why 64-bit, and not 40 or 48-bit? Doubling every data path and memory bus must have been quite expensive.. Oh, and the promise was that computers would get twice as fast. Well, that didn't really happen just because of this transition...In fact the convention of a "byte" was also "invented" by Werner Buchholz in the 50s, back when some computer systems or terminals still used 7-bit 'bytes' (e.g. the original ASCII set was defined to fit in 7 bits).In contrast, the your described use case seem very valid. Having to go 16-bit integers just to count up to 320 is doubling data memory and double the instructions to handle it on a 8-bit CPU.If you were to create an ASIC (or perhaps out of personal interest) for such an application, you could consider designing a 9-bit ALU and memory system if you have the time..Oh.. and you can apply the same trick on instruction sets. If you need more bits to define more operations, then use more bits. Those also don't have to be a multiple of 8. For example, Microchip PIC families have different cores with different instruction set widths. The PIC18F uses 16-bit instruction words. The PIC24 uses 24-bit instruction words. Most PIC16s have 14-bit ISA. Small PICs (e.g. PIC10, PIC12) may only use a 12-bit instruction set. It depends.. it's in the datasheet somewhere. Source:https://en.wikipedia.org/wiki/PIC_instruction_listingsWhat you do see is that any odd number may use padding to be stored easily on conventional machines. You would also need to think about addressing conventions. But there wouldn't be any limitation why you couldn't pack everything together..

author: grumpydoc
author_rank: Super Contributor
timestamp: November 22, 2020, 11:19:08 am
content: There is nothing inherently wrong with a 9-bit CPU - in fact a simulation of one is available here:https://github.com/goodatsports/9-bit-CPU/blob/master/cpu-final.circAs well as 18 and 36 bit wordlengths other sizes have been used - 12-bit was used inseveral machines- other odd bit-widths have been used before the world largely settled on 32 and then 64 bit instruction widths.PIC16 is a 14bit instruction and PIC24 is (unsurprisingly) 24 bits.

author: Siwastaja
author_rank: Super Contributor
timestamp: November 22, 2020, 01:51:53 pm
content: In the end, the width of the registers, memory elements and ALU operations is completely arbitrary. 9-bit CPU would be more cost-effective than a 16-bit one, and provide significant performance benefit compared to a 8-bit CPU,ifthe particular application required a lot of number crunching up to number 511; including the case of indexing 320 pixels.But, do you think that applications spend considerable part of CPU time or memory on calculating pixel indeces up to 320? I don't think so. Clearly, the games where the numerical range become the bottleneck for good performance found ways to work around the limitation.And then again, if you increased the number of bits to 9, you would soon find some other typical calculation which needs numbers over 511, and wanted to add another bit, and so on...From simple ALU width viewpoint, this process could be said to end at 32 bits; operations really requiring more precision or range than that seem to still be so rare that doing multiple instructions is not a performance issue. Hence, 64-bit architectures came along surprisingly late (i.e., 32 bits ruled until around year 2010). Address space of the 32-bit address bus was clearly a larger problem than the 32 ALU register operation width. Even now, if you compare 32-bit and 64-bit CPUs, you don't get much performance benefit from the increased numerical range of the ALU.Today, SIMD is a big factor, and the width of some SIMD operations, as well as memory bus width is much more than 64 bits. Saying a CPU is "n-bit CPU" makes less and less sense every day. This is true even to the microcontrollers today; even just ARM Cortex-M7 is a hybrid 32/64-bit MCU depending on what you measure as indicator of "bitness".Multiples of 8 have the advantage of leveraging existing mindset of the programmers.Gaming consoles like NES used horizontal pixel count of 256, and you can see where this is coming from. It's not only indexing the x address, it's also calculating the frame buffer offset y*xs+x, where you might want to replace the multiplication by shift-by-eight, which in a 8-bit machine is just loading x and y coordinates to different 8-bit registers that form the halves of the 16-bit addressing register.

author: profdc9
author_rank: Frequent Contributor
timestamp: November 22, 2020, 03:28:55 pm
content: Some more interesting questions is whether or not it is possible to have reliable computation with ternary computation, or computation that uses three states per digit (for example 0, 1, or 2) rather than two as in binary (0 and 1). The Soviet engineers experimented with this idea though I do not know how successful it ended it up being.Or why not a mix of analog and digital registers? One can store analog values on MOS capacitors or in dynamic RAM cells. CMOS inverters already implement inverting amplifiers, and so one then one can have adders/subtractors. You could have multipliers/mixers using cascode transistor arrangements. Logarithms/exponentials are of course implemented using a PN junction. A MOS transistor can act as a constant current source for logarithms with a fixed voltage on the gate, or as a source-follower for applying a constant voltage to a diode for exponentiation. Clipping and absolute value operations can be performed using Schottky diodes.

author: phil from seattle
author_rank: Super Contributor
timestamp: November 22, 2020, 03:43:02 pm
content: Lots of good answers so far.One reason for powers of 2 is that addressing is more space efficient that way. With an 8-bit byte, you can select a bit with a 3 bit index, 9 bit bytes require 4 bits. So an instruction to index a 9 bit byte will require an extra bit and thus be less space efficient. (not to mention wasting indices 10-15.) Multiplexers and demuxes would have to be 4 bits wide, not 3 and so on. Instructions would be fatter and thus require more memory chips to hold. Back when they were building digital stuff out of MSI components and 1K bit memory chips that extra bit added cost and made the computer less price competitive.

author: David Hess
author_rank: Super Contributor
timestamp: November 22, 2020, 05:00:53 pm
content: There is no reason other word sizes cannot be used but powers of 2 have the advantage of making best use of binary multiplexers and decoders which naturally operate on widths which are powers of 2.The Microchip PIC is a modern example of a processor which uses a non-power of 2 for its instruction width. In the past all kinds of instruction and data widths were used.

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: November 22, 2020, 05:25:09 pm
content: Thanks, I know Commodore went bankrupt in 1994 but I'm still not over it.I enjoy idle speculations about what "could have been" if someone had a better vision of what a successor to the 64 could have been like back then...It's no fun with modern tools since everything is possible when you throw trillions of transistors at a problem.

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 22, 2020, 07:04:49 pm
content: Commodore did a bunch of stuff after the C64 and before it went bankrupt.In terms of "home computer", they released the C128, which was based on a MOS 8502:https://en.wikipedia.org/wiki/MOS_Technology_8502And of course, there was the Amiga line after that, a huge step forward at the time.

author: sam[PS]
author_rank: Contributor
timestamp: December 20, 2020, 09:31:46 pm
content: Quote from: Alex Eisenhut on November 22, 2020, 02:15:21 amThat actually can be. It's just a matter of standardisation, if you want to do other than 4-8-16-32-64 you'd have to redo everything custom in the circuit so no reuse no nre ... would just be a really bad economic decision unless it's a softcore in an fpga on an already full custom design.Now a real question is why 8bit micro still exist when 32bit micro are now cheaper, and draw less current for much more computing power/feature ? (I know i'm a troll)Just my 2cts...

author: SiliconWizard
author_rank: Super Contributor
timestamp: December 20, 2020, 10:39:02 pm
content: Quote from: sam on December 20, 2020, 09:31:46 pmThis is off-topic, but there's a number of reasons for this. One is legacy: a number of products are designed around a certain line of 8-bit CPU/MCU, and if the product works well, has been validated, and even more so if it must follow heavy regulations, not making any major modification to the architecture is a major benefit. Another reason is simplicity (this was already discussed before on this forum, AFAIR.) 8-bitters are almost always a lot simpler, and as long as they fit your requirements, there's a good reason, from an engineering POV, for using parts that are as simple as possible for a given task. Now regarding power consumption, that is not entirely true. Whereas most 8-bitters on the market these days indeed draw as much, if often actually more, than many recent 32-bitters, there are some niche 8-bitters that draw a ridiculous amount of current, and from a pure silicon POV, an 8-bit CPU tailored for low power on the right CMOS process node will draw a lot less current than any 32-bit CPU, just because it can be made of a much smaller number of transistors. But you're right in saying that many, if not most 8-bitters on the market these days are not specifically designed for ultra low power, so the reasons for them still having a market are the above ones.

author: coppice
author_rank: Super Contributor
timestamp: December 20, 2020, 10:56:00 pm
content: Quote from: sam on December 20, 2020, 09:31:46 pmMost applications don't require extremely low power. Most MCUs are much faster than the application requires, and vast numbers are clocked way below their rating. I can't buy a 32 bit micro for less than 10 cents. Now what was the question again?

author: Tomorokoshi
author_rank: Super Contributor
timestamp: December 21, 2020, 09:09:07 pm
content: Other threads are around here on related topics.These days "binary computer" and "computer" are used somewhat synonymously. Actually, "binary computer" sounds redundant. However, there was a time when it was an important distinction. The best known example is of a "decimal computer", the IBM 650:https://en.wikipedia.org/wiki/IBM_650There was a lot of extra complexity to make it work in decimal compared to a binary computer.

author: ejeffrey
author_rank: Super Contributor
timestamp: December 21, 2020, 09:56:37 pm
content: To me it always seems like most of the ideas for 9-bit data (or other non-standard word sizes) would be to efficiently handle 8-bit data with 1 bit left over for whatever application you are thinking of at the time: identifying commands vs. data in serial streams, dirty/clean flags for modified data, avoiding escape sequences, and so on. Of course none of those uses would work if 9-bit bytes became the standard you would need 10 bits and so on.

author: Alex Eisenhut
author_rank: Super Contributor
timestamp: December 21, 2020, 10:16:59 pm
content: Sure, I used something called NSP back in the day, Nine bit Serial Protocol. IIRC.https://adontec.com/9-bit-serial-communication.htmI dunno, something like that.

author: S. Petrukhin
author_rank: Super Contributor
timestamp: December 22, 2020, 08:32:43 pm
content: 9 bits are not divided in half and will look ugly in HEX

author: coppice
author_rank: Super Contributor
timestamp: December 22, 2020, 08:37:05 pm
content: Quote from: S. Petrukhin on December 22, 2020, 08:32:43 pmThere was a time when octal was more popular than hex for computer work, and octal works very nicely with 9 bit words.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 22, 2020, 09:38:58 pm
content: Yes, octal is all but forgotten these days (exactly because now everything's n*8 bits so octal never works out evenly) but if you had to work with 9-bit architectures a lot, you would quickly grow into looking values in octal instead of hexadecimal.

author: SiliconWizard
author_rank: Super Contributor
timestamp: December 22, 2020, 10:10:24 pm
content: Quote from: ejeffrey on December 21, 2020, 09:56:37 pmThat sounds quite right to me!The idea of designing a completely non-standard architecture like this just to accomodate some particular cases that have good chances of being relatively short-lived doesn't make sense from an industrial POV. 9 bits because of a 320-pxel wide resolution? And now if the new line offered 640 pixels instead, they would design a new 10-bit CPU? Really?The very fact many companies making home computers used the 6502 at the time was that it was available, it was CHEAP and easy to deal with. Software tools also already existed. Designing their own CPU instead would have made little sense. What was a lot more common was designing custom chips for specific functions - which was not only easier to do, easier to integrate, designed to exactly solve a set of issues instead of twisting a CPU for a mediocre result...So even on a very simple computer such as the ZX81, there was a custom chip. Back to Commodore, the Amiga used an off-the-shelf 68k AND a number of custom chips for graphics and sound acceleration, but even the C128, which was a direct successor of the C64, used an accelerated video chip IIRC...

author: Tomorokoshi
author_rank: Super Contributor
timestamp: December 23, 2020, 06:10:27 am
content: Quote from: SiliconWizard on December 22, 2020, 10:10:24 pmThen when it goes to 1280 pixels, and one more bit is needed, all would be well; because then you could say...This one goes to eleven!

author: Berni
author_rank: Super Contributor
timestamp: December 23, 2020, 08:35:45 am
content: More of a question is what would you gain from the CPU being 9bit?Its mostly just being able to work with numbers twice as large. But then again a 16bit CPU has that benefit too, along with being able to work with 256 times larger numbers than 8bit, not just twice as big. All while a 16bit CPU is significantly more standard, has memory easily available and is a round multiple of 8.So why is multiple of 8 so nice? Well computing became very standardized around this number. Memory is easily available in such widths, hard drives store data in 512x8bit sectors, memory cards have 512 or 1024 or 2048 or 4096 pages of 8bits, network protocols to talk to other computers are aligned to 8 bits, graphics cards produce 24bit RGB video that goes out on HDMI in 24bit format so again multiple of 8, digital audio always uses 8bit 16bit 24bit or 32bit and is sent over digital audio connections such as SPDIF and HDMI as such.Now i hear you say, BUT all of that is 16 or 24 or 32 bit just because computers are 8bit!!!Exactly so, we don't try to fight a standard, it just makes your life harder if you do. But then why 8 still. Well the reason is because computers work in binary. So if you have a power of 2 number of bits this means you can encode that number in binary the most efficiently. This is useful because CPUs have some operations that work on bits and so the bit index must be encoded in the instruction. So now we narrowed it down to why is it not 2bit 4bit 8bit 16bit 32bit? Well apart from 2 bit (that is too small to be useful really) we do have 4bit 8bit 16bit 32bit CPUs out there. The 4bit ones are dead now, but they used to be common in the early days.Okay but still why is the 8bit superior over 4bit or 16bit. Well more bits means more logic and wires to make it all work, so we want the least number of bits possible. So then why is it not 4bit? Well computers have worked with human readable text since the early days. So to represent the English alphabet you need at least 26 characters so that already will not fit into 4bit. The text character encoding standards of the day already used 6bit and 7bit codes, so that means an 8bit CPU can easily work with text. And so we finally narrowed it down to 8. The magical 8 is the smallest power of 2 number that can easily store text.

author: Siwastaja
author_rank: Super Contributor
timestamp: December 23, 2020, 09:52:48 am
content: Also note the difficulty in defining what the "n-bitness" of a CPU really means, does for a good coffee discussion though.Regardless of theexactdefinition, almost never is any CPU "purely" an n-bit CPU. The 32-bit Cortex-M7 CPU has a 64-bit wide memory data bus and a bunch of 64-bit instructions so ALU has partial 64-bit support. No one is claiming it's a 64-bit CPU, maybe the 32-bit address bus is the defining factor? But oh wait, 8-bit AVR architecture has 16-bit address bus and no one in their right mind would call it a 16-bit CPU, so maybe the address bus isn't the defining factor either?The fact is, 8-bit addressing is basically useless even for very simple control tasks. So 8-bit CPUs need either a 16-bit linear address space, or some veryhorribleinteresting tricks. If you have 16-bit address space, you are doing 16-bit pointer arithmetic all the time. Also, in many control applications, numbers exceeding -128/+127 but not exceeding -32768/+32768 are very common.So you could think with 16 bits, most of the bits in registers would end up being in actual use with high duty cycle, so it would be a sweet spot for low-cost, low-power MCUs. And actually, 16-bit MCU manufacturers do use such arguments. In the end, while 16-bit MCUs are quite common, they are not as widely used as you could have expected. Maybe the progressive jump from 8 bit era of late 1980's to early 1990's was too small in engineering timeframe; 8 bit MCUs were serving fine until about early 2000's when 32-bitters started becoming available, so many engineering companies completely skipped the 16-bit MCU era. And frankly, 8-bitters still serve fine in many cases, but 32-bitters are now equally cheap or even cheaper.

author: tggzzz
author_rank: Super Contributor
timestamp: December 23, 2020, 03:52:40 pm
content: Quote from: Alex Eisenhut on November 22, 2020, 02:15:21 amThe first (mini)computer I used had a 39-bit word containing 2 18 bit instructions plus a modifier bit.Many mainframe computers had 6 bit bytes.When it comes to data (not instructions) the interaction between addresses, instruction coding entropy, and convenience/performance, there are many advantages to keeping everything powers of two.Harvard computers frequently have different width instruction busses and data busses.

author: coppice
author_rank: Super Contributor
timestamp: December 23, 2020, 04:32:02 pm
content: Quote from: tggzzz on December 23, 2020, 03:52:40 pm7 bit bytes, just large enough for a Romance character, were common, but who used 6 bit bytes?Quote from: tggzzz on December 23, 2020, 03:52:40 pmTrue Harvard machines (most machines are now kind of Harvard, since the CPU works from a pair of instruction and data caches), especially DSP ones, rarely have instruction and data bus lengths that match. As soon as you decide to split the memories in a Harvard style it rarely makes sense for them to be the same size. We just start to think it does when we spend too much time with Von Neumann machines.

author: tggzzz
author_rank: Super Contributor
timestamp: December 23, 2020, 06:32:48 pm
content: Quote from: coppice on December 23, 2020, 04:32:02 pmICL/ICL 1900 series, 4 bytes in a 24-bit word.QuoteJust so.Von Newmann machines have the significant advantage that you can naturally interpret a number as either data or instructions. Nowadays that's also a significant disadvantage.

author: xani
author_rank: Frequent Contributor
timestamp: December 23, 2020, 11:52:02 pm
content: Quote from: hans on November 22, 2020, 11:13:41 amTo be fair no modern 64 bit processor have physical address busactually64 bits wide. My desktop hasCode:address sizes: 39 bits physical, 48 bits virtualwhile fat server AMD Epyc hasCode:address sizes : 43 bits physical, 48 bits virtualI think I also saw some clever use of the "free" 16 bits to encode extra data, or even lower bits (so called tagger points) in places where you need to have aligned access anyway so they would normally always be 0

author: tggzzz
author_rank: Super Contributor
timestamp: December 24, 2020, 12:50:18 am
content: Quote from: xani on December 23, 2020, 11:52:02 pmAt the ISA level the physical address bus is unimportant. The virtual address space is what matters.

author: Berni
author_rank: Super Contributor
timestamp: December 24, 2020, 06:43:48 am
content: Well implementing a full 64bit wide address bus is just way too much addressing space than any computer today would need.But the width of a bus often has nothing to do with the "number of bits" of a CPU. For example have a look at the Intel 8088 CPU. It is a version of the 16bit Intel 8086 with a 8bit memory bus (Because 8bit RAM and motherboards ware cheaper back then).The Pentium 3 CPUs typically used DDR1 DIMMs as RAM. These DIMMs have a 64bit data bus even tho all Pentium 3 processors are 32bit, but if you are running dual channel memory you technically have a 128bit RAM. Tho that is the width of the chipsets memory controller, but still the FSB bus on the CPU pins also has a 64bit data bus, but has a 36bit address bus. So nothing is actually 32bit about its buses. But then you also have the Pentium 4 that is the first Intel consumer CPU to go 64bit, yet it fits on the same FSB bus.If you look at GPUs they have 256bit 384bit 512bit memory buses, yet nobody said this is a 512bit graphics card. They simply needed the extra memory bandwidth that such a wide bus can provide.So the bus size is simply what the chip designers found it to be an appropriate compromise between number of pins, bandwidth, complexity etc.. for the job it does.The number of bits on a CPU can be open to interpretation sometimes, but in most cases it is pretty clear as the largest word size the CPU can work with using the majority of its instruction set. So an Intel i7 with AVX512 is not a 512bit CPU because all the other standard ALU operations are still 64bit. So the ability to work with 512bit is just a special case limited to some special instructions.

author: SiliconWizard
author_rank: Super Contributor
timestamp: December 24, 2020, 03:49:11 pm
content: Quote from: Berni on December 24, 2020, 06:43:48 amYes, this is a relatively common topic and has already been discussed here from what I remember.The reasonable answer, of course, for a definitive and general definition of a n-bit CPU, is that there is no such formal definition. It's basically up to the designers of the CPU, and has sometimes been used as a marketing tool.That said, I agree that the most common use of this term is neither for the data bus width nor for the address bus width, but for the width of the general-purpose registers of a given CPU (and, usually again, the width of the ALU inputs). Of course that applies to... the most common architectures. There are some odd architectures out there (there aren't now as many as there used to be in the past) that have different sets of registers with different widths for different internal uses, so in this case it becomes hard to properly define "n", but in many cases it's relatively obvious. As you said, registers used for vectored operations usually don't count for this; they are not general-purpose and can be used only for a restricted number of uses. But you may still debate "n". OTOH, on a classic RISC processor with no vectored operations, registers usually all have the same width and it becomes relatively non-ambiguous.And there are a lot of examples of CPUs with various data and address bus widths not related to "n". The 8088, 68000, 68008... for the data bus (and probably many more), and still most processors these days regarding the address bus. The 8088 was considered a 16-bit processor (with an 8-bit data bus), the 68000 a 32-bit processor with a 16-bit data bus, the 68008 a 32-bit processor with a 8-bit data bus (externally, but still 16-bit internally?), and neither had an address bus with a width corresponding to "n".

author: DiTBho
author_rank: Super Contributor
timestamp: December 24, 2020, 03:57:02 pm
content: Quote from: SiliconWizard on December 24, 2020, 03:49:11 pm8 bit on the CPU bus interface, 32 bit on the CPU data-path and registers.

author: tggzzz
author_rank: Super Contributor
timestamp: December 24, 2020, 07:00:23 pm
content: Quote from: SiliconWizard on December 22, 2020, 10:10:24 pmAcorn made computers base d on the 6502, and decided to take the bits they liked when they designed their proprietary CPU. That was, of course, the ARM1.

author: Sky Shark
author_rank: Newbie
timestamp: March 17, 2021, 12:17:51 am
content: QuoteYes, personally I find 6502 & ARM the two most enjoyable micros to write assembly for. (I grew up on 6502, both 6502 & ARM feel natural to me)

author: grumpydoc
author_rank: Super Contributor
timestamp: March 17, 2021, 07:49:44 am
content: I half agree - the tiny amount of ARM assembler that I did suggested that it was, as you say, a really nice architecture to work on.Always loathed the 6502 though.