hybridfree/eevblog-posts huggingface dataset:
How to panelize with Kicad? - Page 1
Forum section: electronics / general

author: zapta
author_rank: Super Contributor
timestamp: December 25, 2023, 08:22:33 pm
content: I have a small rectangular PCB design in Kicad 7 I would like to panelize it as a simple grid.1. What is a simple and reasonable way to do that? (e.g. what plugin or tool).2. Once I panelize, can I still make changes to the schematic and PCB without a tedious repanelizing?

author: Doctorandus_P
author_rank: Super Contributor
timestamp: December 26, 2023, 12:36:49 am
content: If you open KiCad's "Plugin and Content Manager" and then type in "panel" as a search word, it finds two plugins. the "SparkFun KiCad Panelizer" and KiKit.I think KiKit has some built in automation to help with updating the panel, but I am not sure.

author: selcuk
author_rank: Frequent Contributor
timestamp: January 12, 2024, 07:40:38 pm
content: I agree with the recommendation. Kikit is simple and efficient for this job. After you panelize, you can save the configuration to a JSON file. If you update the design, you can import the JSON file and it automatically applies the same panelization to it.Generic panelization software works on Gerber files. This one generates Kicad PCB, so that you can manually edit panel data if necessary. But you probably write simple post processing scripts to automatize that as well.
Can't install kikit plugin - Page 1
Forum section: electronics / general

author: TankSparks
author_rank: Contributor
timestamp: July 27, 2023, 06:49:24 am
content: kikit is a panelization pluginI had it working on Kicad 6.0 bit can't get kikit plugin to appear in kicad 7.0I can install it from the Plugin manager, but it does not appear anywhereMy JLCPCB plugin works fine,Anybody got Kikit to work on Kicad 7.0?

author: IanJ
author_rank: Unknown
timestamp: July 27, 2023, 08:44:46 am
content: Quote from: TankSparks on July 27, 2023, 06:49:24 amHi, there is some info here from the author regarding kicad V7 install issues and how to resolve I believe.https://github.com/yaqwsx/KiKit/discussions/492Ian.
Inner Copper Clearances? - Page 1
Forum section: electronics / general

author: LoveLaika
author_rank: Frequent Contributor
timestamp: June 23, 2023, 12:59:44 pm
content: My PCB fab house has different inner and outer copper clearance requirements. They require a copper-to-board edge clearance of 10 mils (0.254 mm) on the outer layer and 15 mils (0.381 mm) on inner layers. How do you change the design rules to account for this? I see an option for this in the constraints section of the design rules labeled as "copper to edge clearance", but this affects all layers. Is there a way to set this in the design rules automatically? The only other way I could think of is to set it for largest clearance or to just adjust the copper pour zones.

author: 6313oscar
author_rank: Newbie
timestamp: June 26, 2023, 12:52:20 pm
content: You could make your own costum DRC rule for this:Kicad PCB editor -> Board setup -> Custom DRC rulesCode:(version 1)(rule "outer layer clearance"(layer outer)(constraint edge_clearance (min 0.254mm)))(rule "Inner layer clearance"(layer inner)(constraint edge_clearance (min 0.381mm)))
BGA Pad Clearences - Page 1
Forum section: electronics / general

author: Creedonics
author_rank: Newbie
timestamp: June 07, 2023, 02:16:51 pm
content: Hi everyone,so i wanted to route my BGA Components, but i found that all of them have some pretty huge clearences, any idea on how to change them ?thank you!

author: Miti
author_rank: Super Contributor
timestamp: June 07, 2023, 09:14:24 pm
content: File > Board Setup > Net Classes > Default Net Class > Clearance
Please help identify KiCad footprint size for Aishi 100uF SMD cap - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: January 01, 2024, 11:42:04 pm
content: Cap has a diameter of 6.3mm, does it mean I should be ok using any of the 6.3 footprints? I see that some have slightly different spacing but looks negligible.https://www.digikey.com/en/products/detail/aishi-capacitors/SVZ1CM101E06E00RAXXX/16536400

author: stryker
author_rank: Regular Contributor
timestamp: January 01, 2024, 11:48:21 pm
content: Hi @newtekuserThe spacing of all those is the same. The 2nd dimension is how tall they are. The actual footprints will be probably common, but the 3D model of each may vary to display a more accurate representation of the populated PCBCheers, Geoff

author: newtekuser
author_rank: Frequent Contributor
timestamp: January 02, 2024, 02:31:03 am
content: Thanks a bunch!
Has Kicad a impedance and length matching functions - Page 1
Forum section: electronics / general

author: FlyingDutch
author_rank: Regular Contributor
timestamp: May 27, 2023, 07:05:56 am
content: Hello,more and more often I need to use track length and impedance matching (differential and high-speed signals). I watched several tutorials of "Altium Designer" on youtube and this CAD has built-in functions for this purpose.I am mostly using free "EasyEDA" or "Eagle CAD", but both do not have length and impedance matching functions. I wonder if "KiCad" has such features, or maybe another free CAD?Thanks in advance and Regards

author: Doctorandus_P
author_rank: Super Contributor
timestamp: May 27, 2023, 01:04:56 pm
content: KiCad does have a few built-in functions for both routing differential pairs and for length matching, and a simple search (internet, KiCad manual, etc) for those terms would give you a quicker and better answer than I can write here.
Kicad 7.0.x milestone  - Page 1
Forum section: electronics / general

author: hpw
author_rank: Frequent Contributor
timestamp: April 11, 2023, 10:52:20 am
content: Just wondering about the 7.0.2 milestone as 13-Apr-2023 .... as for today, only 56% completedhttps://gitlab.com/groups/kicad/-/milestones/24#tab-issuesSo we get some banana wareor better IMHO, to shift the release deadline... as more issues gets fixed.

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 16, 2023, 08:19:41 pm
content: Well, I think the deadlines for milestones are more or less fixed, so they do not account for possible surprises.v7 has introduced a lot of changes and there were some serious bugs in 7.0.0, 7.0.1 fixed some but certainly 7.0.2 ended up with a very long list of them and the deadline was just not realistic, but again I think the calendar is fixed for releases. I would take the deadlines with a pinch of salt until v7 reaches a more "stable" status.

author: hpw
author_rank: Frequent Contributor
timestamp: April 20, 2023, 11:00:37 am
content: Quote from: SiliconWizard on April 16, 2023, 08:19:41 pmYeah, we are getting next 7.0.3 milestonehttps://gitlab.com/groups/kicad/-/milestones/25#tab-issues

author: hpw
author_rank: Frequent Contributor
timestamp: May 15, 2023, 07:16:30 am
content: Next milestone as 7.0.4https://gitlab.com/groups/kicad/-/milestones/26#tab-issuesand 7.0.3 should be ready for today
Kicad Improvement - Page 1
Forum section: electronics / general

author: steven236
author_rank: Newbie
timestamp: May 04, 2023, 05:12:44 am
content: I am a big user of Kicad. Have to say Kicad6.0 is much much better than Kicad5.0.I have some friends who are software engineers and we have a plan to improve Kicad since it is open-source. So What features do you think could be improved in KiCad?Are there any specific tools or features that you feel are missing in KiCad.Or any additional comments or feedback about your experiences with KiCadLet me know, Let’s see whether we could develop some new functions based on the current Kicad version.

author: ataradov
author_rank: Super Contributor
timestamp: May 04, 2023, 05:44:12 am
content: KiCad has issue tracker. There issues are graded and discussed. Pick any of them and start implementing. Everything people really want will be reported as an issue.Discussing wishes without knowing your real ability to do anything is just a waste of time. Solve a few existing issues, show that you can actually follow though, then there would be something to discuss.Also, current version is 7.0.

author: Karel
author_rank: Super Contributor
timestamp: May 04, 2023, 06:36:41 am
content: What would be nice as well is to update the documentation.Also, a file format description for V7.

author: ebastler
author_rank: Super Contributor
timestamp: May 04, 2023, 06:39:56 am
content: Quote from: steven236 on May 04, 2023, 05:12:44 amHead over tohttps://dev-docs.kicad.org/en/contribute/to get your bearings.It's not clear from your post, but if your plan should be to spin out a separate version of KiCad which is under your own control: Don't. You and your friends do not have the critical mass and the credibility to do that, and Kicad would not benefit from a fragmentation of development resources and versions.
KiCAD v7.0.2 released - Page 1
Forum section: electronics / general

author: johnboxall
author_rank: Unknown
timestamp: April 17, 2023, 04:33:17 am
content: The KiCad project is proud to announce the latest version 7 bug fix release -https://www.kicad.org/blog/2023/04/KiCad-7.0.2-Release/

author: Chris56000
author_rank: Frequent Contributor
timestamp: April 19, 2023, 12:17:08 pm
content: . . .And at long last, KiCAD 7 brings the TTF/System Font support I was hoping for!Just out of curiosity, what is the physically largest and most complex KiCAD board that is available on the internet as a documented design file rather than simply a screenshot?I have a physically very large board to design when I get home from my sister's visit next week, alas to say not very exciting in hardware terms, altho' physically large, it's very simple thro' hole components on 100 mil grid multiples! – it's a "Convergence Control Panel" for a vintage 1967 colour TV it's owner wants to restore!Peter Dalmaris's latest book for KiCad 7 suggests the available features are catching up with expensive tools like OrCAD and Altium very rapidly!Chris Williams

author: SiliconWizard
author_rank: Super Contributor
timestamp: April 19, 2023, 08:03:28 pm
content: Quote from: Chris56000 on April 19, 2023, 12:17:08 pmI was waiting for that as well, but note that currently KiCad's handling of TTF fonts is very slow and makes opening schematics (including switching sheets, which makes it more obvious) much slower.This is a known issue that I can't tell whether the maintainers will be able to address any time soon.Also, the graphic rendering is not super great (at least compared to native rendering of fonts) as it's rendered by OpenGL and probably characters are transformed into purely graphical objects (as for the standard KiCad font), which would explain both the relative slowness and the "meh" rendering. Fonts are hard to render. I was hoping that text would be optionally rendered natively, but I guess it wouldn't fit at all the view model of KiCad's schematics (and PCBs.)So, while the feature is great, the result for now may not be as good as you'd expect, at least from a UI POV. But for printing/exporting schematics for publishing purposes, and for custom fonts on PCBs, it's great to have.
Is this the matching footprint for the micro USB header? - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: April 17, 2023, 12:38:17 am
content: I've purchased a bunch of these micro USB headers (attached pic) for cheap and would like to use them in my designs, but I'm not sure that this is the right footprint for them.The seller doesn't answer to my messages so not help from them unfortunately.Can someone please confirm?

author: Uky
author_rank: Regular Contributor
timestamp: April 17, 2023, 09:38:03 am
content: Whenever I am faced with a similar problem, I always look for the manufacturers STEP-file.When the STEP-file is imported/mapped to the footprint, I instantiate the footprint onto an empty PCBthen invoke the 3D display of the board, including copper pads and plated/unplated holes/slots.

author: newtekuser
author_rank: Frequent Contributor
timestamp: April 17, 2023, 02:31:44 pm
content: Sort of what I did in my pics but I couldn't find anything on the manufacturer so I added footprints to the pcb and opened them in the 3d view to compare but I still can't tell for certain altough what I've got seems close.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: April 18, 2023, 01:13:14 pm
content: There are over a hundred footprints for micro USB connectors, and if you buy a bunch of them from some random cheap shop, then there usually is no documentation at all for dimensions and such, and you'll have to reverse-engineer (a.k.a measure) the pin and hole locations and make your own footprint.

author: newtekuser
author_rank: Frequent Contributor
timestamp: April 19, 2023, 12:50:43 am
content: Found it:https://www.digikey.com/en/products/detail/switchcraft-inc/RAHMB20AUETR/17372286
KiCAD 0.1" card edge connector definition? - Page 1
Forum section: electronics / general

author: Tony_G
author_rank: Super Contributor
timestamp: May 23, 2022, 10:09:55 pm
content: Hey All,I find myself in the position of needing to create an extender board for adjustments of an old HP 83522A - I've found what looks like to be the right female connector on DigiKey and I ordered one to confirm that it does in fact work.What I haven't done before is use KiCAD (years ago I worked using DipTrace but I think it's time to move to something more open) - The schematic and pathing are going to be really simple but I'm wondering if there is a library somewhere that already shows a 0.1" card edge connector that I can use - In this case, I need to have it as a 22 pad double sided PCB footprint (total of 44 connectors). Here are couple of images that show the type of thing I'm trying to duplicate (this one doesn't have enough contacts nor the right edge cut).Extender board exampleTarget card & enclosureAny pointers would be appreciated.ThanksTonyG

author: Zoli
author_rank: Frequent Contributor
timestamp: May 24, 2022, 12:18:33 am
content: AFAIK there''s no foot print, looks like you will have to make one. Good starting point would be the ISA edge connector, which you will find under the "BUS_AT" name.And don't be afraid to modify a footprint, pretty much all the relevant PCB tools are available.Have fun!

author: RBBlackstone
author_rank: Newbie
timestamp: March 20, 2023, 10:36:47 am
content: I know it has been awhile, but did you ever create this extender card in KiCad?Would love to see the card and how you did the files.

author: Tony_G
author_rank: Super Contributor
timestamp: March 20, 2023, 05:30:31 pm
content: Yes, I did:I'm absolutely not a KiCAD expert, hell, I'm just a KiCAD noob so there may be many mistakes in this but you can grab the files here:https://1drv.ms/u/s!Amqar8_XQ9Uzk7ESkGYO511PFAumDg?e=kFdn2RIf I did a second run, I would put gold on the contacts and fix up that little line of solder mask at the bottom.TonyG
Missing pads on bottom side - Page 1
Forum section: electronics / general

author: semir-t
author_rank: Regular Contributor
timestamp: March 02, 2023, 09:00:08 pm
content: Hello all,I started working on a project that I received from other engineer. It was designed few years ago with older version of KiCAD. After importing it I can't see pads on the bottom layer of the board (3D design looks good on the bottom side). Top side is good and I can see all pads.I have tested this with KiCAD6 and KiCAD7 and I get the same result. It looks like somehow pads on the bottom are disabled. When I select the part I can see the pads but as soon as I release the part the pads disappear.Does anyone have an idea what could be an issue ?Thanks,Edit1:Also, bottoms silkscreen is missing but I can see it on the 3D model. It seems that everything related to bottom layer is missing.Edit2:When I select the part and flip it to top side it appears normal and I can see the pads.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: March 02, 2023, 10:01:01 pm
content: There is not much to deduce from reporting you can't see something.If you zip up the project and post it here, then others can have a look at it to determine what is going on.

author: SiliconWizard
author_rank: Super Contributor
timestamp: March 02, 2023, 10:26:16 pm
content: Are you sure the bottom layers are just not invisible, from the appearance toolbar?

author: semir-t
author_rank: Regular Contributor
timestamp: March 03, 2023, 06:41:41 am
content: Thanks, this was the case. I am only using KiCAD for past 3 months (previously used Eagle CAD) and I wasn't aware that KiCAD had this feature. I enabled it bottom layer and it works perfectly.
import .kicad_sym file - Page 1
Forum section: electronics / general

author: Kokoriantz
author_rank: Frequent Contributor
timestamp: April 19, 2023, 12:16:40 pm
content: I received symbol file .kicad_sym instead of .lib. How I can add on the library?

author: Benta
author_rank: Super Contributor
timestamp: April 19, 2023, 03:36:12 pm
content: .kicad_sym is the library format for 6.0 and later. If you're on an earlier version you can't use it.
Filled zones - constraining to orthogonal, or at least 45° ? - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: February 22, 2023, 08:14:36 pm
content: Something that most other EDA offer, and I've used KiCad for a good while now, and have yet to figure it out.Please tell me I'm missing something obvious.When creating filled zones, polygon lines are only constrained to the grid, but not to any kind of angle. That is UTTERLY annoying.With many other EDA, you can just press shift/ctrl/alt or whatever to constrain polygon lines to 45° or 90°. I tried all this in KiCad to no avail.Tell me it was obvious and I missed it!

author: Doctorandus_P
author_rank: Super Contributor
timestamp: February 22, 2023, 08:27:04 pm
content: In KiCad V7 on the left toolbar there is an icon to toggle to limit actions to horizontal + Vertical + 45 degree.Also, inPreferences / Preferences / Hotkeysyou can search for "45" and then you see thatConstrain to H, V, 45has hotkey[Shift + Space]assigned to it by default.Also note there are some 200+ possible hotkeys in KiCad, and maybe about half do not have any key assigned by default. So it can be worth it to comb though that list if you find some function lacking a hotkey.

author: langwadt
author_rank: Super Contributor
timestamp: February 22, 2023, 08:38:14 pm
content: kicad 6

author: SiliconWizard
author_rank: Super Contributor
timestamp: February 22, 2023, 08:42:46 pm
content: Thanks! Glad this was a case of me missing it!Still on v6 here. I did see the option in the filled zone dialog, but then it would apply to the whole polygon of the zone.I didn't think of looking in the hotkeys list. A lot of "hidden" functions here!So Shift+Space it is. It toggles between constrained and not constrained, which is what I was looking for.
On updated Kicad 6.0 and its library, having error loading symbols - Page 1
Forum section: electronics / general

author: abdulbadii
author_rank: Frequent Contributor
timestamp: February 09, 2023, 08:02:45 am
content: Help solve after updating to Kicad 6.0 and its library, it is having error loading symbols librarythis message re-pop up if exit so relaunch kicadall seem require.libfilename extension while in the symbols directory it has.kicad_symfilename extensionso how the decent way to synchronize and solve them

author: m k
author_rank: Super Contributor
timestamp: February 10, 2023, 05:30:03 pm
content: Preferences -> Manage -> Migrate
Multiple projects in same directory (6.0.10) - Page 1
Forum section: electronics / general

author: m k
author_rank: Super Contributor
timestamp: February 05, 2023, 01:52:49 pm
content: Selecting stuff from left side of the project window didn't go well.Selecting project first from left and then using only right side icons is fine.Modifying symbols and footprints is unknown.I've always picked the "main" project first.Sub projects I'll start so that after creating one I'll move stuff back from sub directory without the library file.No idea how the library file is linked elsewhere but this way all self made library stuff remains available.
Schematics conversion into valid Verilog code - Page 1
Forum section: electronics / general

author: caius
author_rank: Regular Contributor
timestamp: February 17, 2020, 09:18:42 pm
content: I successfully use Kicad since many years, I love it and I think I'll never switch to something else.I was just wondering if there is some tool to convert Kicad schematics into valid Verilog code that you can use in Quartus for example.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: February 29, 2020, 08:43:28 am
content: I also like KiCad, but never used Verilog and do not know what such a program should do.As KiCad is fully Free & Open Source software there are a lot of "side projects" around KiCad. From extracting component data from PDF's. scripts for generating netlists, tools for generating different kind of BOM lists and many more.Some are well maintained, others are in varying levels of bitrot.I've seen pages on github where some people kept lists of such tools of external projects around KiCad.File formats in KiCad are also Open and pretty easily readable ASCII, and tools / libaries for writing those files are of course also a part of the KiCad project.But what sort of level of conversion are you looking for?Just a netlist thing, or do you want it to automatically insert a softcore if you use a uC in your schematic?

author: caius
author_rank: Regular Contributor
timestamp: February 29, 2020, 10:04:45 am
content: Quote from: Doctorandus_P on February 29, 2020, 08:43:28 amYes, I woul like something able to convert schematics into valid Verilog code that then I can compile to program CPLDs (like Atera MAX7000 or Atmel ATF15XX)

author: ebastler
author_rank: Super Contributor
timestamp: March 05, 2020, 06:04:18 am
content: Would this work as a starting point?https://github.com/efarres/KiCad-HDL(No personal experience with it at all, just found it via Google.)

author: rea5245
author_rank: Frequent Contributor
timestamp: February 01, 2023, 06:14:14 pm
content: I just released a KiCad plugin that generates Verilog from a schematic. You can see it athttps://github.com/galacticstudios/KiCadVerilog

author: bson
author_rank: Unknown
timestamp: February 03, 2023, 01:25:49 am
content: Why would you not use the built-in logical operators for gates, flip-flops and such?

author: rea5245
author_rank: Frequent Contributor
timestamp: February 03, 2023, 01:39:56 am
content: Quote from: bson on February 03, 2023, 01:25:49 amIt depends what your goal is.My goal was to make a homebrew CPU using off-the-shelf parts. So I made a schematic using those parts, then converted it to Verilog and simulated it before actually buying everything and building it.
Power flags - Am I using them right? - Page 1
Forum section: electronics / general

author: ppTRN
author_rank: Regular Contributor
timestamp: January 22, 2023, 09:21:47 am
content: Hi, being a newbie on KiCad, I am about to complete my first schematic. The ERC check sais that there are some problems about Power input pins not driven by any power output pins. So i learn that i need to use power flags. Thing is, to solve some errors, i need to put them in places where i really do not want to see a power flag! Attached some examples.Thank you!note: just like the voltage divider of VBUS, if i connect a power flag at the regulator input, it solves the problem but... do i really need to put it there or am I doing something wrong?

author: golden_labels
author_rank: Super Contributor
timestamp: January 22, 2023, 09:36:41 am
content: Note that you only need to deal with PWR_FLAG for ERC. It’s not needed otherwise.In the first image (1.png), nodes VBUS and VEXT may be marked as power. But they are separated from the marked node by D1 and Q1 respectively. While some components have their outputs normally used as power sources, it’s not a typical function of either the cathode of a diode or the source of a MOSFET. Therefore, if U2 requires VI to be a power node, it must be marked as such. Keep in mind this is not a simulation: ERC doesn’t know the purpose and function of those components. It just checks constraints, which you feed to it.The error in the second image (2.png) about UART_RX is valid. ERC finds an error in your diagram: you have a pin that is not driven, despite it should be.

author: ppTRN
author_rank: Regular Contributor
timestamp: January 22, 2023, 09:38:32 am
content: Thank you very much!
KiCad 6.0.8 ERC issues (newbie) - Page 1
Forum section: electronics / general

author: newtekuser
author_rank: Frequent Contributor
timestamp: January 15, 2023, 06:43:23 pm
content: I have used KiCad before to produce a simple board design (it was of a simple interface to program PIC 40DIP MCUs via ICSP header) that I printed with my manufacturer of choice (JLCPCB), but years later now I'm back at it and see that I cannot even pass simple ERC checks.Don't know if it's due to major KiCad changes since I can't remember what version I used the last time.Having seen that I couldn't pass ERC with more complex diagram, I drew something simple as in the screenshot below which still fails ERC. I don't really understand what Kicad wants of me.After reading through some forums, I ended up connecting the PWR_Flag to my 5V source which got rid of one of the errors, but still fails with same error for the GND connection.Can someone please enlighten me what I'm doing wrong?

author: ataradov
author_rank: Super Contributor
timestamp: January 15, 2023, 07:07:57 pm
content: You need power flags on all power lines. This includes grounds.And it also includes all power connections that are not traceable by the ERC. For example if you have power flag on a battery before the power switch, you need a power flag on the connection after the switch, since ERC can't tell that they are the same thing.The only time you don't need a power flag is when the line is explicitly driven by the pin marked as power output (typically output pin of voltage regulators).

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 15, 2023, 07:50:01 pm
content: Yep, and it's nothing new. Has been like this for a long time in KiCad.

author: newtekuser
author_rank: Frequent Contributor
timestamp: January 15, 2023, 09:10:06 pm
content: Quote from: SiliconWizard on January 15, 2023, 07:50:01 pmThanks, it worked after adding the PWR_FLAG to GND connection as well!How about rules for not connected pins? i.e.: ERC fails if I connect unused pins to ground (because I don't want them floating). It only passes if I add the "no-connection" flag to those pins.I'm actually not clear how KiCad checks them, it lets me connect some pins of MCU to GND, but others it throws errors and only ERC only passes if I add the no-connection flag.

author: Benta
author_rank: Super Contributor
timestamp: January 15, 2023, 09:16:26 pm
content: It's no problem connecting input pins to ground.The issue occurs if the pins are outputs or bidirectional or tri-state (which is also an output).Use the "-x" symbol on the right screen side to deactivate the pins for ERC, and consider your design again.

author: SiliconWizard
author_rank: Super Contributor
timestamp: January 15, 2023, 09:17:03 pm
content: Quote from: newtekuser on January 15, 2023, 09:10:06 pmYou can either modify the symbols to make the pins "passive" instead of "NC".Or modify the ERC rules (in the 'Schematic setup' dialog.)But beware - for some ICs, NC pins should actually be left unconnected, so bypassing or ignoring the warning should be done after having strictly checked this.
Via rings in "connected layers only" -- how to make default? - Page 1
Forum section: electronics / general

author: ebastler
author_rank: Super Contributor
timestamp: December 11, 2022, 10:06:22 am
content: I am playing with a design where the top side of a 4-layer PCB would directly act as the "user interface": No components, no traces, just black soldermask and white silkscreen. Capacitive touch sensors for user input will be placed on the upper inner layer, and output will be via a small display mounted on the PCB bottom, behind a milled cutout. All active components are SMD parts on the bottom, of course.Ideally I would also want to avoid visible via holes on the top layer, to keep it as visually clean as possible. The low-cost manufacturers don't offer blind vias, but plugged or epoxy-filled vias would be an option.I can't have Ground on the top layer, for cosmetic reasons and because it would increase stray capacitance of the touch sensors. The top layer would be just soldermask over bare FR4. So, in order to avoid little humps at each plugged via location, I want the vias to have no annular ring on the top layer.Kicad offers that option in the properties of each individual via: Annular Ring can be set to "Connected layers only". But how do I set it forallthe vias? Is there a way to make it the default property? (Can't find this in the board setup dialog.) Or can I change it globally via the Edit > Edit Track and Via Properties dialog somehow? (I can't see that particular setting in the global Edit dialog.)Thanks for any pointers you might have!

author: bpiphany
author_rank: Regular Contributor
timestamp: December 11, 2022, 10:32:19 am
content: It should at least be possible toselect everythingright click -> select -> filter selectioncheck only viashit 'e'change annular rings property

author: ebastler
author_rank: Super Contributor
timestamp: December 11, 2022, 10:41:43 am
content: Thanks! That seems like a workable solution.I had not realized that you can edit the properties of multiple vias at once in this way. Kicad's ability to do an "edit" on multiple selected objects seems so limited: Doesn't do anything for footprints, graphical objects, text etc. -- but it does seem to work for vias. Good to know, thank you!

author: JeffYoung
author_rank: Newbie
timestamp: January 14, 2023, 10:46:43 pm
content: There's also Tools > Remove Unused Pads..., which allows the same without selection.And in 7.0 there's a property inspector that allows editing of shared properties on any selection.
Clearance violations for copper on same net - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 21, 2022, 04:04:37 am
content: This one is driving me nuts. I get clearance violations when I add copper (lines/polygons...) on the same net to get more copper than single tracks. How do you get around this? I'm sure this is possible as people regularly advise doing this to enlarge connections, manually create teardrops, etc.I'm sure I'm missing something. What is it?

author: tautech
author_rank: Super Contributor
timestamp: November 21, 2022, 05:22:32 am
content: Been caught with similar in Altium and it's normally improper trace snap connections, that is each section of the trace doesn't connect perfectly to another section.Delete the Net and lay it out again or if there are only a few changes in the trace inspect them very carefully.

author: SiliconWizard
author_rank: Super Contributor
timestamp: November 21, 2022, 07:52:42 pm
content: OK I found the culprit. Two issues actually.- Probably obvious for KiCad aficionados: any copper that you manually add should be assigned the same net. So if you want to add copper, you basically have to create zones AND assign them the same net. Do not let the netunassigned, otherwise KiCad will not be "clever" enough to detect a connection on the same net, it will treat the added zone as "orphaned" copper and this will be a violation even if there is no electrical issue whatsoever. This kinda makes sense though, as there could be unwanted orphaned copper. But I think the violation message could in this case be a bit more specific.Also, do not use graphic shapes for this, only usefilled zones, because I don't think you can assign a net to a graphic shape, only to filled zones. If anyone knows better about this point, please let us know.- The other issue was in a footprint that also had graphic shapes on top of some pads. I had to correct it. But as opposed to the layout editor (unless again I missed something), the footprint editor can allow you to combine several graphic shapes into a single pad, which is pretty handy. (Right click / Edit pad as graphic shapes) So I merged all added graphics shapes this way and the violations went away.

author: tautech
author_rank: Super Contributor
timestamp: November 21, 2022, 08:02:17 pm
content: Quote from: SiliconWizard on November 21, 2022, 07:52:42 pmYep, Altium dos that too. When you magnify enough you should be able to see the Net labeling that if not all the same is the reason why you get a violation.As you use PCB CAD's more sorting all this stuff becomes somewhat 2nd nature.Enjoy the journey.

author: JeffYoung
author_rank: Newbie
timestamp: January 14, 2023, 10:45:01 pm
content: Correct: KiCad does not at present support nets for graphic objects, only zones. It is in the feature-request list though....
doAnalyses: TRAN:  Timestep too small - Page 1
Forum section: electronics / general

author: rhenry74
author_rank: Newbie
timestamp: December 10, 2022, 07:00:01 am
content: Total noob here... first circuit. It's an oscillator that I'm trying to kick start in spice.It won't simulate, fails with "doAnalyses: TRAN: Timestep too small"Any ideas?

author: Slh
author_rank: Regular Contributor
timestamp: December 10, 2022, 07:39:42 am
content: Possible things:Your maximum timestep could be too big on your trams command. Set it to 1n and try again.Add a .cshunt=10e-15 and or rshunt=10e15 These add tiny parasitics to 0V that help it solve.Q2B has a rather high initial condition. I don't think that's helping. Either bring it down to around 0.4-0.6V or get rid of the initial conditions and vary all of the resistors by 5% to unbalance it so it starts.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: December 10, 2022, 02:42:55 pm
content: There is a working example of an astable multivibrator (and many more) on the KiCad forum:https://forum.kicad.info/t/simulation-examples-for-kicad-eeschema-ngspice/34443

author: Benta
author_rank: Super Contributor
timestamp: December 10, 2022, 08:09:10 pm
content: KiCAD/ngspice errors have mostly nothing to do with the actual problem. Irritating, but live with it.You need to fix a couple of things:Your power supply is incorrect.The 2N3904 pin sequence is incorrect for simulation.You seem to generally use the "pspice" library for your schematic. Don't, there's no need and the symbols are ugly. Don't; just use the standard symbols.Where did you place the 2N3904 Spice model?

author: rhenry74
author_rank: Newbie
timestamp: December 12, 2022, 05:32:55 pm
content: The fatal flaw was I thought the 0 in the ground reference was a pad. My wire didn't actually connect to it.But... it still wouldn't oscillate... i tried many of yall's suggestions.I downloaded the astable.7z example and it just worked right out of the starting gate.I'm not sure what the flaw is in my schematic but I'm now in a place where I can move forward.Thanks for the help!

author: TimFox
author_rank: Super Contributor
timestamp: December 12, 2022, 06:57:51 pm
content: In Spice simulations, "0" is a reserved node number for ground, common, etc.Each node must have a DC route to "0" for the simulation to work, since it starts by calculating the DC voltages to ground.(When necessary, put a 100 G resistor from a floating node to 0.)
Hint: KiCad on high-DPI displays - Page 1
Forum section: electronics / general

author: mcovington
author_rank: Regular Contributor
timestamp: November 20, 2022, 09:30:39 pm
content: Problem: under Windows, with a high-DPI (high-resolution) display, KiCad's icons around the edge of the screen are abnormally large.Solution: Perform the intervention shown in the picture below, but do it toeeschema.exe, gerbview.exe, kicad.exe, pcbnew.exe,andpl_editor.exe, all inC:\Program Files\KiCad\6.0\bin.This may be old news to some. A high-DPI display is one in which the screen pixels are not Windows' logical pixels; Windows has various ways of scaling up the display. Many computer screens these days are high-DPI.
KiCad 6.0.9 released - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 30, 2022, 07:35:20 pm
content: Well, source code released before the actual announcement on KiCad's website and the binaries.So expect to see it in a couple days. Those that can build it from source or some Linux users can already use it. Others will have to wait.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 31, 2022, 03:15:16 pm
content: Bug fix releases (Increments in the 3rd number) happen about once a month.When you're running Linux, the KiCad updates are of course installed with regular system updates, so you do not have to worry about the "latest".For others, new releases are always announced on the blog, a few hours or days after the update itself has been rolled out. You can always look at the updates at the official KiCad Blog:https://www.kicad.org/blog/... and a few hours later:https://www.kicad.org/blog/2022/10/KiCad-6.0.9-Release/

author: PartialDischarge
author_rank: Super Contributor
timestamp: October 31, 2022, 03:50:06 pm
content: And I'm still running 5.1.9 and using it KiCad a lot, maybe a good moment to update, have not done so because I have 0 problems with my current version.
Teardrops and filets? - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 04, 2022, 03:56:06 am
content: Is there any way in KiCad 6 to get teardrops and filets on traces?I kinda remember seeing there was some plugin for that, but that would be best if it didn't require any plugin. Or if, at least, that was one of the officially supported plugins. Which it doesn't seem to be.Any idea?

author: golden_labels
author_rank: Super Contributor
timestamp: October 04, 2022, 09:01:53 pm
content: Automatically? As far as I know: no, only with plugins.Manually: yes, you can. If you draw shapes on the copper layer, you may then convert them to fill zones or traces and associate with target nets. With arcs and holding Ctrl for snapping it’s not that hard to get what you want. But that is really tedious work. Unless you are being paid to do so, have a technical reason to use teardrops/filets or just preparing a show off board, I would avoid that option as much as possible.

author: mushroom
author_rank: Regular Contributor
timestamp: October 04, 2022, 09:03:02 pm
content: The teardrop plugin was intended for KiCAD 5, and wasn't updated for KiCAD 6. (tested, never used)Your best chance is 7 beta (6.99) :https://forum.kicad.info/t/kicad6-99-finally-added-the-teardrop-feature-non-plugins/33192

author: SiliconWizard
author_rank: Super Contributor
timestamp: October 05, 2022, 12:41:30 am
content: Quote from: mushroom on October 04, 2022, 09:03:02 pmNice feature. But I'll wait for v7. Not risking the beta.
KiCAD 6.0.8 Released - Page 1
Forum section: electronics / general

author: johnboxall
author_rank: Unknown
timestamp: October 02, 2022, 10:37:31 pm
content: KiCAD v6.0.8 has been released. Learn more >https://www.kicad.org/blog/2022/09/KiCad-6.0.8-Release/
Why is this hidden power pin showing and upside down - Page 1
Forum section: electronics / general

author: Back2Volts
author_rank: Unknown
timestamp: September 26, 2022, 01:47:03 pm
content: Why is this hidden power pin showing in such way? I am stumped.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: September 26, 2022, 10:18:45 pm
content: Have you tried un-checking:>> Schematic Editor / View / Show Hidden Pins

author: Back2Volts
author_rank: Unknown
timestamp: September 28, 2022, 09:56:05 am
content: Thank you. After seen your answer, I went back to it... I deleted it fro the schematic and realized there was a piece of trash wire over the pin.
Symbol pin number below pin instead of above? - Page 1
Forum section: electronics / general

author: SiliconWizard
author_rank: Super Contributor
timestamp: September 11, 2022, 02:10:23 am
content: Running into something pretty annoying there. I'm modifying an existing symbol. The pin numbers are all below the pin line instead of above for all other symbols I'm using. I can't figure out why. If I create another pin on this particular symbol, same, the pin number appears below the line. What gives? It doesn't do that for all other symbols I've tried.Any idea?

author: SiliconWizard
author_rank: Super Contributor
timestamp: September 11, 2022, 02:27:21 am
content: OK answering my own question if anyone's interested. That's explained there:https://forum.kicad.info/t/pin-number-is-displayed-below-its-pin-why/8911It's just that the option "place pin names inside" was not checked (probably because pin names exist but are not shown on this symbol.) And don't try to find this option on the pin dialog, it's a symbol-wide option in the symbol properties dialog. Yeah.There is a separate option for not showing them. If the latter is checked, I don't think the former makes any sense, and even less so that it should have any impact on where the pin numbers appear, but apparently everyone is happy because this has been there for at least 5 years.So anyway. Just check the "place pin names inside" when you don't want to show pin names. It will show pin numbers above the line. As usual. Don't ask.
KiKit panelizing footprints - Page 1
Forum section: electronics / general

author: Rachie5272
author_rank: Regular Contributor
timestamp: May 03, 2022, 07:27:36 pm
content: Hello, I'm trying to panelize a board with KiKit, but can't figure out how to manually specify mousebite tab placements. I have the KiKit library installed through the library manager, but how do I access them? They don't show up in the footprint selector or editor.

author: yaqwsx
author_rank: Contributor
timestamp: September 09, 2022, 03:47:00 pm
content: You have to add the path. The fact that the libraries are not added automatically is a little stupid in the KiCAD plugin manager.
CD4093 - Page 1
Forum section: electronics / general

author: stoica adrian
author_rank: Contributor
timestamp: October 17, 2022, 09:07:54 am
content: Hi,I am designing a circuit around CD 4093.I have the following difficulty: I do not find the power pins for this component, can anyone please let me know how to activate this pins?As you can see on my screenshot, there is no ''Unit E'' allocated with the power pins for this component.Thank you,

author: Karel
author_rank: Super Contributor
timestamp: October 17, 2022, 10:56:38 am
content: To me this looks like an error in the library.The powerpins are hidden. They are called "Vdd" and "Vss".

author: Kleinstein
author_rank: Super Contributor
timestamp: October 17, 2022, 11:03:12 am
content: It could be an old entry in the library using hidden pins with defined GND / VCC names.Under the Enschema settings (display options) one can enable showing the hidden pins.The hidden pins are an old feature that in my opinion causes more trouble than it is good for (it works with the logic chips if they all get the same supply, but already some extra filtering for some chips can cause nasty problems). AFAIK (and I would totally vote for it) this feature is discuraged and should be removed, but some old parts may still have it. I learned the hard way with some 74HC1G04 or similar.So an upgrade/fix of the library would be a good idea - though maybe not technically an error but only an old entry.

author: Benta
author_rank: Super Contributor
timestamp: October 17, 2022, 07:03:43 pm
content: I'm running 6.0.8 and I see the power pins. It's the two small circles. You don't see then in the Symbol Editor overview.

author: julian1
author_rank: Frequent Contributor
timestamp: October 17, 2022, 10:50:32 pm
content: In kicad 6 at least, there is hef4093b quad nand. It has a extra unit E, with power supply pins represented, rather than being hidden.If the naming is a bother, copy it into your own library, and use a text editor to rename.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: October 18, 2022, 09:35:08 am
content: Hiding the power pins is a remnant from 40 years ago. Back then it was quite common. PCB's with logic IC's tended to be pretty big (100+ IC's was no exception) and all of those IC's were connected to the same power supply. In these modern times, with Logic IC's most often used as some glue logic, with different power supply voltages on the same PCB and EMC regulations it does not make much sens anymore to hide the power pins.So you can use the symbol from the: "4xxx" library, which has the power pins as "Unit E", or you can just use some net labels on your power supply to name them appropriately. If you:Schematic Editor / View / Show Hidden Pinsthen you see the Vss and Vdd names of the hidden power pins.
Installing Mouser Footprint and Schematic Symbol Libraries - Page 1
Forum section: electronics / general

author: EPAIII
author_rank: Super Contributor
timestamp: January 27, 2023, 10:34:56 am
content: I have attempted to install the part libraries from Mouser. At one point I get a warning that the folder needs to be accessible. I think it is. But I am not sure if the installation worked or not.Has anyone installed these libraries and if so, how can I tell if I have them or not. Perhaps some of the names that will show up in the editors?

author: newtekuser
author_rank: Frequent Contributor
timestamp: March 04, 2023, 04:46:24 am
content: For footprints, I copy the .mod files manually to the appropriate category under KiCad\6.0\share\kicad\footprintsFor symbols, I add the path to the symbol using the Manage Symbol Libraries menu.This may be the wrong way, but I tried other methods which didn't work for me like using an importer tool, or just configuring paths.
Melt your circuit boards - Page 1
Forum section: electronics / general

author: crgarcia
author_rank: Regular Contributor
timestamp: June 04, 2022, 08:48:04 pm
content: Just found this, and did it for my PCB. It looks so much better

author: Trader
author_rank: Frequent Contributor
timestamp: June 04, 2022, 08:56:27 pm
content: Quote from: crgarcia on June 04, 2022, 08:48:04 pmWow, beautiful curves, congrats. Maybe you could post a picture from "Before". To compare the before and after. Thanks.

author: Doctorandus_P
author_rank: Super Contributor
timestamp: June 04, 2022, 09:37:27 pm
content: This plugin is already in the "Plugin and Content Manager" in KiCad, which means it's just a few mouse clicks away if you have KiCad installed and you can easily try it on your own PCB.

author: voltsandjolts
author_rank: Unknown
timestamp: July 12, 2022, 08:04:59 pm
content: Nice. This makes me wanna try the latest KiCAD, which is on the path to greatness BTW

author: jnz
author_rank: Frequent Contributor
timestamp: July 13, 2022, 06:42:16 pm
content: I tried this out and had an issue I can't reproduce now :\It melted fine. But broke trace to pad clearances, and DRC couldn't/didn't detect it.I didn't realize until I uploaded it to BayAreaCircuits, their automated system told me min clearance was 4 mil or so, which made no sense. Sure enough, there it was and I manually adjusted.Now, when I go in and try and make the same happen. The DRC seems to catch it.So, IDK, be careful and manually check clearances. I'll keep using it for now.

author: SiliconWizard
author_rank: Super Contributor
timestamp: July 13, 2022, 06:50:54 pm
content: "The ultimate circuit board melting experience."Yeah.The idea of curved traces is nothing new and the Topor autorouter is based on this. Of course then everyone is free to decide whether they want to use this. The video looks a bit too much like marketing crap to me. Sorry.Now while the feature is still nice to have, I would be very wary to use it for any serious work at the moment. And I wouldn't be too surprised if there were still issues with DRC (which becomes pretty complex with curved traces). I wouldn't be hugely surprised if there were some bugs with the Gerber generation either.

author: crgarcia
author_rank: Regular Contributor
timestamp: August 14, 2022, 06:33:47 am
content: Yes! In my board I could not use it, because it broke DRC all over the place and it does not maintain differential pairs, but it still look very coolIt supports doing it for selected parts of the PCB, so I guess I could do it for the areas that are not that squeezed