hybridfree/eevblog-posts huggingface dataset:
PIC32MZ, trying to send SPI data with DMA - Page 1
Forum section: electronics / general

author: JPortici
author_rank: Super Contributor
timestamp: April 06, 2017, 06:49:51 pm
content: ** I Can send data but probably not the correct one **I am trying to automate an SPI transfert over DMA, for this i am using- 1 DMA Channel- 1 Timer- 1 OC module- 1 SPI ModuleTimer is the timebase for OC module and generates DMA triggerOC Module generates CS Waveformso the operation is Timer reset -> OC out Low -> DMA Trigger -> 3 bytes over spi -> OC Out Highthings are working in the sense that DMA trigger is generated, spi data is sent inside the CS Low period, but the data is not what i would expect.relevant code:Code:volatile int32_t j; //global variable[...]/* DMA CONFIGURATION */DMACONbits.ON = 1;DCH0CONbits.CHAEN = 1;DCH0ECONbits.CHSIRQ = _TIMER_2_VECTOR;DCH0ECONbits.SIRQEN = 1;DCH0SSA = ((uint32_t) &j) & 0x1FFFFFFF;DCH0DSA = (uint32_t) &SPI5BUF & 0x1FFFFFFF;DCH0SSIZ = 3;DCH0DSIZ = 1;DCH0CSIZ = 3;DCH0CONbits.CHEN = 1;[...]//j is incremented in another timer interrupscope shows that always the same data is being transferred, while i would be expecting the data being changing.debugger confirms that variable j is incremented. looking at memory i can't find the sequence of bytes that is being transferred.do you have any suggestion?

author: Lunasix
author_rank: Regular Contributor
timestamp: April 06, 2017, 07:22:04 pm
content: Try to add this in your variable declaration :__attribute__((coherent))I'm using many dma channels with a PIC32MZ, all with this declaration. Without that, I had unexpected results due to the cache memory.

author: JPortici
author_rank: Super Contributor
timestamp: April 06, 2017, 07:26:57 pm
content: Ah yes, that makes sense. Later/tomorrow i'll try.To be honest i'm very new to these MCUs with cache..

author: Howardlong
author_rank: Super Contributor
timestamp: April 06, 2017, 07:31:30 pm
content: Ooo oh I know this ooohttp://www.microchip.com/forums/m/tm.aspx?m=790065&p=1;-)

author: JPortici
author_rank: Super Contributor
timestamp: April 07, 2017, 08:31:37 am
content: and __attribute((coherent)) it wasit had to be the cache (which i forgot about) because variable "j" had an address and &j returned a different address in a different space** take my word for it, i didn't put test pads on this board so it's a bit hard to display every trace **Purple: CS, Yellow: MOSI
BNO055 - System not calibrating - Page 1
Forum section: electronics / general

author: Turbo
author_rank: Newbie
timestamp: April 09, 2017, 11:57:40 am
content: Hi,I am all new here, and actually came here because I cant seem to figure out this problem, some extra knowledge might come in handy!I am using a BNO055 NDOF chip to measure the angle of a small "Segway" kind of thing, so just a reversed pendulum system,but the euler angles have a MASSIVE amount of drift on them.The measured angle of the robot just lying down ( so always the same ) can vary with as much as 5 degrees....But, the system doesn't seem to fully calibrate, I can calibrate the magnetometer, the gyro and the accelero,but the "system" calibration ( which is a calculation according to the datasheet ) stays 0, so not calibrated.Has anyone here more knowledge about these sensors and why I can't seem to calibrate it?Thanks in advance!SamVUBrussels, MSc. Engineering Technologies - Electronics & ICT

author: EBRAddict
author_rank: Contributor
timestamp: April 10, 2017, 05:30:04 pm
content: I found once the mag, gyro and acc show as calibrated ( =3 ) the system usually follows in 1-2 seconds. I always stop moving the sensor once the 3 parts have calibrated, so maybe it needs to be at rest for the system calibration to show = 3. Double check to see if you're masking the calibration status register correctly.I stopped using the BNO055 because of the calibration needs. Even if I loaded calibration constants from a prior "good" calibration it would stop accepting them over time. For my project it wasn't feasible to remove the sensor and re-calibrate it frequently.
Do SDRAMs are meant to be used with fast MCUs? - Page 1
Forum section: electronics / general

author: Dimitri
author_rank: Newbie
timestamp: April 05, 2017, 02:48:17 pm
content: Hi,I was planning to make a DSP based design. It was needed to be low-power so I decided to use TMS320C5505.While examining the c5505 EMIF documents I come across with the following explanation: (you can reach from here pg87: goo.gl/n1fToS)This device has limitations to the clock frequency on the EM_SDCLK pin (driven by SDCLK) based on theCVDD and DVDDEMIF.• When CVDD = 1.3 V, and DVDDEMIF = 3.3 V, 2.75 V, or 2.5 V, the maximum clock frequency on theEM_SDCLK pin is limited to 100 MHz (EM_SDCLK ? 100 MHz). Therefore, if SYSCLK ? 100 MHz, theEM_SDCLK can be configured either as SYSCLK or SYSCLK/2, but if SYSCLK > 100 MHz, theEM_SDCLK must be configured as SYSCLK/2So basically -as far as I understand- it says you need to choose an SDRAM that works half of the clock rate of your DSP. I went an searched the SDRAMs in digikey. But all of the devices were working above 100MHz. So they are not suitable for using with that chip. (Unless I somehow could use in lower clockrates.) So I deduced that SDRAM are meant to be used with "not so much low-power" devices running at least couple hundreds of MHz?But then I look the memory map of this chip, c5505, and half of its adress space is for SDRAM. So I am quite in doubt about my deduction. Does my assumptions are correct? How can I supply the need for extra RAM using this chip?

author: dmills
author_rank: Super Contributor
timestamp: April 05, 2017, 04:26:05 pm
content: Don't just look at the first page of the datasheet, look at the actual timing diagrams, you would be surprised just how slowly you can run some of those parts.All first pages of datasheets are written by the marketing slime (It was a less messy compromise then killing them all and hiding the bodies), and they all go on at length about how fast the things can go, forgetting both how tight that often makes timing and that not everything needs fast.Regards, Dan.

author: ataradov
author_rank: Super Contributor
timestamp: April 05, 2017, 04:28:42 pm
content: SDRAM can be clocked much slower. There are plenty of MCUs with maximum clock frequency way less than 100 MHz, and they work just fine.The best way to start is to find some development kit by the manufacturer or third-party.

author: daveshah
author_rank: Unknown
timestamp: April 05, 2017, 06:04:07 pm
content: SDR SDRAM has no minimum clock frequency in theory (provided you can refresh it fast enough, but that's not a signficant real limit)Later technologies (DDRx) do have a significant minimum clock, I believe it's 125MHz for DDR2 and 300MHz for DDR3
New interpriter option for micros!? Turing Completeness of Powerpoint - Page 1
Forum section: electronics / general

author: jnz
author_rank: Frequent Contributor
timestamp: April 03, 2017, 04:36:54 pm
content: I mean... no powerpoint for Linux but an x86 SoC maybe this would a sleek option for embedded scripting? After all... It no more obscure than Forth!
Trouble with FTDI adapter - Page 1
Forum section: electronics / general

author: Dan Moos
author_rank: Frequent Contributor
timestamp: April 01, 2017, 09:00:33 pm
content: Ok, first off, I'm not thinking this is the usual FTDI fiasco thing.I have this:http://www.mouser.com/ProductDetail/FTDI/DB9-USB-D5-M/?qs=sGAEpiMZZMuhucAexPYLelnvPR1J%2fIyQI have successfully gotten data out of my project (6502 based computer build), into a terminal program. Data from my project's UART displays uncorrupted in the terminal.I can't seem to get the adapter to send data OUT FROM the PC. I have a scope probe on the appropriate pin (RxD on the part) and it just sits HIGH and inactive when I type in the terminal.To avoid some misunderstanding that i had in another forum that is also helping me, I for sure don't need a NULL modem connection. Look at the datasheet. I have the MALE part. So when sending data FROM the PC, it should appear at the adapter's RxD pin.I've tried a loopback connection, with RxD and TxD tied together, and nothing. I have yet to be able to create any activity on the RxD pin, whilst data going the other way (which requires my homebrew computer build to run a program, access the UART, and all of that) works fine. Yet a simple use of the terminal to get something to happen on the RxD pin of the adapter has stymied me.I have all handshaking and flow control OFF in the terminal. I have the right port settings. I'm going for 8,1,none, but even if that was wrong, a loopback should work. I'd at least get SOMETHING.I'm not even trying to involve my projects UART yet. I'm trying to intercept the data just before it reaches it, so any complications with my UART code/connections are not part of the problem.I'm actually wondering if its a driver issue. My driver is up to date, or so Windows claims.I've tried RealTerm, TerraTerm, and Putty. I've tried more than one USB cable, and port on the PC.My Bus Pirate, which also uses an FTDI to USB connection works just fine.My understanding of the FTDI driver shenanigans is that you either get garbage, or an unrecognized device. I get a re4cognized device, good data one way, and zero activity the other. That's why I don't think its an FTDI anti-counterfeiting issue. That said, I admit a limited amount of knowledge on this matter.I'm at my wit's end! Help!

author: kripton2035
author_rank: Super Contributor
timestamp: April 01, 2017, 10:25:19 pm
content: since the fdti driver "problem", I bought some usb-uart bridges from another brands (cp2102, or chg340)and if I suspect such driver problem, I check with these other bridges.ps: finally, I end up using the others chips as they are really less expensive, and are ok for the job.

author: Dan Moos
author_rank: Frequent Contributor
timestamp: April 02, 2017, 04:18:15 am
content: Solved! Stand down.I'm a dumbass who reads datasheets backwards.
Pwm for pic 16f84A and DC motor - Page 1
Forum section: electronics / general

author: AlienOnEarth
author_rank: Newbie
timestamp: April 02, 2017, 05:29:58 pm
content: Hello guys!I want to make a PWM for PIC 16F84A and a DC motor. I use Mplab ide and hitech C compiler.I have found some code on the internet but I have got an error when I compile it:Error  D:\Documents\cod licenta\licenta (1).c; 17.1 undefined identifier "OPTION_REG"Can you give me some advice to get rid of this error, or maybe another source code for a PWM?In the attachment you will find the code if you want to look on it.Thank you!Have a nice evening

author: JPortici
author_rank: Super Contributor
timestamp: April 02, 2017, 06:08:48 pm
content: Quotewhy on earth.anyway, read this:http://www.microchip.com/forums/m717850.aspx

author: AlienOnEarth
author_rank: Newbie
timestamp: April 02, 2017, 06:37:43 pm
content: Thank you very much!Now it is working but it is not functional in Proteus.Do you have an example of a pwm generator code? Or some suggestions of how to modify the existing code.Thanks

author: Buriedcode
author_rank: Super Contributor
timestamp: April 02, 2017, 10:40:14 pm
content: I believe the reaction was for the old device. Nothing wrong with old devices, but it just makes your life more difficult. The '84A is well over 20 years old, expensive, doesn't have many peripherals, and poor support. Almost all of the existing projects for it will happily work on other PIC16's.

author: JPortici
author_rank: Super Contributor
timestamp: April 03, 2017, 12:39:07 pm
content: Precisely. Make your life easier!Anyway, The code you have posted is 100% okay, as to make a software pwm you have to do three things1)set up a timebase, try also to use an interrupt so jitter will be reduced2)set up three registers: counter, period,duty.3)inside the interrupt (or at each timebase event) do the following:- increase counter- if counter is greater or equal than period reset counter- if counter is less or equal than duty out is low/high, otherwise out is high/low
Question about Quartus - Page 1
Forum section: electronics / general

author: mn
author_rank: Contributor
timestamp: March 29, 2017, 03:21:24 pm
content: I have written a VHDL code in Quartus and have compiled it without any error. I am able to view the schematic viaTools->Netlist Viewers->RTL ViewerThe questions are1- The RTL schematic shows the gate level. I want to see the LUTs in the LABs that were used to implement the design. How can I do that?2- Is there any way to view the placed and routed design inside the device editor?I see those things in Xilinx ISE. Any idea about them?

author: jahonen
author_rank: Super Contributor
timestamp: March 29, 2017, 04:23:46 pm
content: 1. You can see LUTs in technology map viewer. That should show the contents of the LUTs.2. Chip Planner shows where the design elements physically are.Regards,Janne

author: mn
author_rank: Contributor
timestamp: March 30, 2017, 05:54:29 am
content: 1- I doubt if the technology map viewer really shows the LUTs. As you can see in the picture (post mapping), in each block the gate level is shown not the LUTs.2- The chip planner shows the layout of the chip but there is no label for the objects. Also, I don't know where is my design on the chip. Please see the two pictures.

author: jahonen
author_rank: Super Contributor
timestamp: March 30, 2017, 08:51:46 am
content: Try using post fit technology map viewer, that should show LUTs.The darkened blocks in zoomed out view of chip planner shows where populated blocks are. Try zooming there. Alternatively, you can use the node finder to locate your design objects.Regards,Janne

author: mn
author_rank: Contributor
timestamp: March 30, 2017, 11:08:34 am
content: Sorry but I don't see any "post fit". If you mean, "technology mapper viewer (post mapping)", then the picture I attached in my previous post is actually the post mapped one. It only shows the block diagram (at least this is what I see).

author: Daixiwen
author_rank: Frequent Contributor
timestamp: March 31, 2017, 06:56:30 am
content: What kind of information are you looking for exactly?AFAIK the technology map viewer still shows you the design hierarchy but decomposes everything inside each block at the basic level: registers, LUTs, memory blocks and multipliers. What you show in your first screenshot looks like LUTs to me, with 4 inputs and one output each.

author: Scrts
author_rank: Frequent Contributor
timestamp: March 31, 2017, 12:49:41 pm
content: If it shows a module, double click can go into it AFAIK. You will be able to go down as far as the primitives then.
Atmel ICE full kit in Farnell is... - Page 1
Forum section: electronics / general

author: IAmBack
author_rank: Regular Contributor
timestamp: March 30, 2017, 01:53:48 pm
content: 28% off (65GBP/76EUR w/o VAT).Maybe someone is interseted...

author: technix
author_rank: Super Contributor
timestamp: March 30, 2017, 02:20:18 pm
content: This is a bit late as I have already bought mine (and moved on to ARM architecture...)

author: Gibson486
author_rank: Frequent Contributor
timestamp: March 30, 2017, 04:05:35 pm
content: Quote from: technix on March 30, 2017, 02:20:18 pmLOL...I am in the same boat. We used these at work. They are junk. They break every once in a while.
Low cost single board computer board that can run Win7 - Page 1
Forum section: electronics / general

author: Jester
author_rank: Frequent Contributor
timestamp: March 29, 2017, 11:01:38 pm
content: I'm working on a test fixture that requires a PC running Windows for the already created test software. In the past I have used Via Embedded, however that was about 3 years back and there is always a faster, better , cheaper version it seems.Low costBoard would have to be small in the ball park of 10cm x 10cm (or smaller)Minimum 2 USB ports, prefer 4VGARun off a small HD or SSD card using Win7Does anyone have any recomendations?

author: senso
author_rank: Frequent Contributor
timestamp: March 30, 2017, 12:33:10 am
content: How much of a low cost it needs to be?http://www.lattepanda.com/But you need an HDMI to VGA converter, installing Windows 7 might be possible:https://www.sevenforums.com/installation-setup/405205-how-do-i-install-windows-7-lattepanda.htmlIf you can/want to go the Aliexpress route, there are hundreds of NUC like single board pc's already with case's, ranging from celerons to i7's(the U flavor, so always a dual core with at most hyper threading), price ranging from 80€ to 400€, if you find one and only need the board, talk to the seller, might get a better deal without the casing.EDIT: The Celerons are quad cores, but lower frequencies.

author: pieman103021
author_rank: Contributor
timestamp: March 30, 2017, 01:26:09 am
content: Quote from: evb149 on March 30, 2017, 12:57:23 amI'm going to agree with this, although it may be possible to get a NUC for a good price if you look enough. That being said, mini-itx and NUCs are nearly 20x20cm, so if you absolutely need to fit in 10x10 you might have to use pico-itx.
12b adc to Q2.10 fixed point conversion - Page 1
Forum section: electronics / general

author: Spikee
author_rank: Frequent Contributor
timestamp: March 30, 2017, 03:25:06 am
content: Hello,I'm experimenting with ADC->matlab filter -> DAC and have it all implemented at this momentbut having trouble with the adc binary to fixed point conversion. Searching on google did not bring me closer to an answer.Adc 12 b -> 4096 stepsReference 2.048 VSo so the float would be = 0.0005V * adc_binary_valI set my matlab fiter IO to be word length 12 bit , fractional length 10 bit fixed point.In C/C++ I would have this working in no time but with me being fairly new to VHDL it is where i'm stuck at this moment.Technically I could do something like this:real resolution = 0.0005;ADC_OUT std_logic_vector(11 DOWNTO 0);real ADC_Vout = ADC_OUT * resolution;But that does not seem the most logical / best to implement in VHDL , there must be an better and easier way to do this ?Any tips / help is greatly appriciated.

author: cyberfish
author_rank: Regular Contributor
timestamp: March 30, 2017, 01:21:08 pm
content: It will take much less logic to multiply by m/n instead, where n is a power of two.Maybe ADC_OUT * 1 / 2048 as an approximation?

author: ehughes
author_rank: Frequent Contributor
timestamp: March 30, 2017, 01:35:03 pm
content: I think you may be missing the point (no pun intended) of fixed point. The point is an imaginary concept that you carry through your computations. Your your case, you literally have to do nothing.For your VHDL, if you are using a common format through out the pipeline, the only scaling you may need is after multiplies. (And even then you may retain precision in any accumulation, etc you may do).Now, technical speaking when you say Q2.10, that is really a 13-bit number. The Q format generally implies you are working with signed number.If you are filtering, you don't have to even work about your 0.0005v scaling to volts. That is somewhat meaningless for the purposes of the filter. All you have to worry about is how you scale factor may change in your filter pipeline.Here is a point to ponder. What is the difference between a Q2.10, Q3.9 and Q4.8 number? Absolutely nothing. They are all 13-bit integers. It is purely how we chose to interpret them.

author: Spikee
author_rank: Frequent Contributor
timestamp: March 30, 2017, 02:56:52 pm
content: I Think I'm doing something completely the wrong way ... Will come back in a few days with the solution
PIC32MZ external crystal anomalous behaviour - Page 1
Forum section: electronics / general

author: rill17
author_rank: Contributor
timestamp: March 28, 2017, 08:42:21 pm
content: I am currently designing a project using the PIC32MZ1024EFG100 microcontroller. as part of the design I used a 12Mhz external crystal oscillator to operate as the system clock. The problem is that when i configure the microcontroller, it doesnt start working immediately. After programming the microcontroller the only way i got it to start up was by physically touching the oscillator either with my finger or even with a non conductive object such as a peice of plastic. the oscillator used has 18pF capacitors and was placed close to the microcontroller as is recommended. Continuity tests where also performed and the oscillator was also changed to a higher frequency (25Mhz) and then changed back to a new oscillator of 12Mhz with no change. This was all done with an operating frequency of 75Mhz from a possible 200Mhz with no change. trying to operate the microcontoller at a frequency of 150Mhz only resulted in the microcontroller operating at an extremely low frequency, so much so that the i2c module was working at a frequency of 8khz from a configured value of 150Khz. Using the internal FRC the microcontroller works normally.Any ideas???

author: up8051
author_rank: Frequent Contributor
timestamp: March 28, 2017, 09:04:15 pm
content: Did you read this:https://www.eevblog.com/forum/microcontrollers/pic32-external-osc-not-working/Regardsup8051

author: rill17
author_rank: Contributor
timestamp: March 28, 2017, 09:17:58 pm
content: thanks, turns out the errata sheet specifies issues with the oscillator.http://ww1.microchip.com/downloads/en/DeviceDoc/80000663D.pdfI'm gonna try using a 24Mhz oscillator, luckily i have a spare one from another project. should work according to the errata table 3
need help identifying this or find an equivalent , i searched everywhere  - Page 1
Forum section: electronics / general

author: themastermix
author_rank: Newbie
timestamp: March 26, 2017, 10:57:50 am
content: helloi'm new to this forumi just need to find this 10 pin ic , i looked everywhere but can seem to find anythingit is used as stepped motor driver for a lighting machinethanks for any efforts

author: MrBungle
author_rank: Unknown
timestamp: March 27, 2017, 08:23:24 am
content: Can't help you with an exact match, but it looks pin-pin compatible with On-Semi's LV series of stepper drivers. (LV1909, LV1948, LV8548/49 etc etc)
synthesize basics - Page 1
Forum section: electronics / general

author: mn
author_rank: Contributor
timestamp: March 25, 2017, 12:12:20 pm
content: I have synthesized a simple 1 bit full adder with ISE which consists of 2 half adders and an OR gate. The Half adder entity also consists of an XOR and an AND gates. What I get as results are:1- The output shows that only 2 XOR gates were used!Code:=========================================================================* Advanced HDL Synthesis *=========================================================================Advanced HDL Synthesis ReportMacro Statistics# Xors : 21-bit xor2 : 2=========================================================================2- The RTL schematic of the FA correctly shows two half adders and an OR gate. However, the RTL schematic of half adders only shows one input port (!) and it considers a bus (!) names data[1:0] instead of x and y as inputs. Please see the attachments (1.jpg and 2.jpg).3- The Planahead correctly maps the design to two 3-LUTs as the attachment (3.jpg).4- Observing the device, I see that two LUTs are merged in one LUT which I don't understand that! (4.jpg)Any comment for the mentioned items?

author: radar_macgyver
author_rank: Frequent Contributor
timestamp: March 25, 2017, 04:03:49 pm
content: Quote from: mn on March 25, 2017, 12:12:20 pmThe report only shows any macros that were found, it doesn't include every LUT.Quote from: mn on March 25, 2017, 12:12:20 pmNothing wrong with the results, but yes the naming is not consistent. The 'x' bus at the input of the HA is split up before going to the carry AND, and the XOR is shown as a macro.Quote from: mn on March 25, 2017, 12:12:20 pmNothing wrong with the merge either, the 6-LUTs in your device can implement the entire full adder in one LUT since they have two outputs. This minimizes routing between LUTs. on a 4-LUT device (Virtex-5 and below, or Spartan-3 and below) this would always need two LUTs. Map has a LUT packing option, but that's for unrelated logic, and relates to packing unrelated LUTs into CLBs (if I recall correctly).

author: mn
author_rank: Contributor
timestamp: March 27, 2017, 05:54:15 pm
content: Thank you very much

author: mrflibble
author_rank: Super Contributor
timestamp: March 28, 2017, 06:08:54 pm
content: Internally a LUT6 is built out of two LUT5s and a MUX. From UG384:The function generators in Spartan-6 FPGAs are implemented as six-input look-up tables(LUTs). There are six independent inputs (A inputs - A1 to A6) and two independentoutputs (O5 and O6) for each of the four function generators in a slice (A, B, C, and D). Thefunction generators can implement any arbitrarily defined six-input Boolean function.Each function generator can also implement two arbitrarily defined five-input Booleanfunctions, as long as these two functions share common inputs. Only the O6 output of thefunction generator is used when a six-input function is implemented. Both O5 and O6 areused for each of the five-input function generators implemented.Seehttps://www.xilinx.com/support/documentation/user_guides/ug384.pdffor more info.
Recycling Fibre Channel MIA ? - Page 1
Forum section: electronics / general

author: legacy
author_rank: Super Contributor
timestamp: March 24, 2017, 11:21:53 am
content: do you believe it's possible?

author: awallin
author_rank: Frequent Contributor
timestamp: March 24, 2017, 08:41:52 pm
content: Quote from: legacy on March 24, 2017, 11:21:53 amthat looks like it should work fine for slow-ish bit-rates with a suitable PECL-driver/reicever interfacing to your own circuit (e.g. TTL or RS422)gigE SFP transcievers are quite cheap and although built for 1.25Gbit will go down to 1MHz or even lower. Not sure what the lowest supported bit-rate is... the TX and RX lines are AC coupled so I suspect an SFP won't do very slow serial traffic.

author: hamster_nz
author_rank: Super Contributor
timestamp: March 25, 2017, 06:33:54 am
content: The coding system on Fibre Channel ensures an equal number of ones and zeros are always sent. This is useful as it allows very tight automatic gain control in the receiver (esp for optical)I wouldn't expect it to like data the does't have a balanced number of ones and zeros, or it the runs of ones and zeros are too long (upsetting any AGC loop)

author: legacy
author_rank: Super Contributor
timestamp: March 26, 2017, 11:06:14 am
content: I am more worried about the analog part, and I can't find useful documentation.
SanDisk 4GB MicroSd card - problems with SPI communication - Page 1
Forum section: electronics / general

author: krzysiobal
author_rank: Newbie
timestamp: March 23, 2017, 07:12:54 pm
content: I am trying to communicate with MMC/MicroSD cards, using 6502 microprocessor (and some FPGA between, which is de facto responsible for the whole communication on SPI protocol).Firstly i developed library which allowed to communicate with MMC cards. It worked great. Then I tested it on small micro SD cards ( <= 2GB) and it worked too, without any changes. Then i wanted support SDHC cards. I am detecting card according to these diagram:http://elm-chan.org/docs/mmc/mmc_e.htmlhttp://elm-chan.org/docs/mmc/pic/sdinit.pngOn SD/MMC, sectors were adressed like 0, 512, 10124, etc. On SDHC, they have adressees 0,1,2,3,...It is also working without problems, I tested it on 8 GB & big 32 GB Kingston SDHC.Few days ago I ordered a lot of random used 4 GB cards. Half of them are working, the other half (which are all branded by SanDisk) are not working at all. After sending CMD0, the card is answering 0x01, but then sending CMD8 returns odd results.Here are my waveforms.Do you have any idea what is the difference between Sandisk's SPI? I looked into their datasheed and for example CMD8 is reserved..https://web.archive.org/web/20131115122620/http://dlnmh9ip6v2uc.cloudfront.net/datasheets/Components/General/SDSpec.pdfWhen SandiskCards are inserted into computer's card reader, all of them are working of course.SPI's !CS is permanently grounded, MOSI/MISO/SCLK are driven by fpga's pins at 3.3 V level. SCLK freqency is 800 kHz.

author: thm_w
author_rank: Super Contributor
timestamp: March 23, 2017, 09:41:22 pm
content: The computer is using 4-bit SD mode to communicate, as I'm sure you know. Probably has a ton of code to handle edge cases as well.Have you tried the SD card decode modules for saleae and pulseview? It helped me a lot when debugging SD and will generate these diagrams you've shown. Although I'm not sure if it works with SPI mode.If that should be R7 response, then 0xC1 doesn't make sense.Have you tried a lower clock speed?Not sure if this is relevant:http://stackoverflow.com/questions/2365897/initializing-sd-card-in-spi-issues

author: krzysiobal
author_rank: Newbie
timestamp: March 25, 2017, 12:15:49 am
content: Worked like a charm, thank you very much!
MPU-6050 start drift - Page 1
Forum section: electronics / general

author: DzAnej
author_rank: Contributor
timestamp: April 02, 2017, 06:13:19 pm
content: Hi there!I am making a Hexacopter and I have a problem with the gyro (MPU-6050). After the callibration of the gyro is completed (in setup - the average of 2000 readings) the angle is decreasing for a few seconds...The gyro is still on the flor and level while the readings were took.Here is the graph:You can see that after 30-40 seconds the angle settles stable.Is this some kind of a problem with the internal buffer of the gyro? Do I need to set some specific registers to get rid of this problem?
What is considered a valid interrupt edge - STM32 - Page 1
Forum section: electronics / general

author: mbless
author_rank: Regular Contributor
timestamp: March 22, 2017, 04:41:41 pm
content: This is a general question for all MCUs, but the answer probably differs based on the specific brand and architecture. I'm using a STM32F4 and I have a noisy interrupt signal, so I'm getting a lot of unintended triggered interrupts. I predicted this might be an issue so I designed the board with pads for a low-pass filter. Right now I'm trying to figure out what RC combination to use to bring the noise spikes down to a level that doesn't trigger the ISR. Of course I don't want too strong of a filter because I lose edge timing accuracy.So my question is what constitutes a valid edges, rising or falling, to trigger an interrupt? Does it have to change from the valid TTL low/high levels (0.8V and 2V in my case), valid CMOS levels (1V and 2.3V in my case) or is there some other threshold? I can't find anything in the datasheets, so I don't know if I'm not using the correct terminology.

author: ajb
author_rank: Super Contributor
timestamp: March 22, 2017, 05:05:16 pm
content: Unless otherwise specified, the thresholds will be the same as when the pin is configured as a general purpose digital input. So the specified VILand VIHlevels should hold. In the STM32F7 datasheet I have open, these are given in section 5.3.20: I/O static characteristics. Note that STM32 parts may have different IO structures on different pins (FT, TT, TTa), so be sure you know which structure the pin you're dealing with has (specified in the Pin definitions table) so you consult the right input specs.For additional noise immunity, an external schmitt trigger may be useful after the LPF.

author: newbrain
author_rank: Super Contributor
timestamp: March 23, 2017, 08:01:44 am
content: In addition to the levels, the minimum pulse width for an interrupt to be recognised has to be considered.This is described in the EXTI chapter as:Quoteand then later on in the AC I/O characteristics:Quote(checked for some F4 and F7, same values).So, in general, anything longer than 10ns will be caught by the edge detector.
DOH! Hand soldering extensions on a QFN. - Page 1
Forum section: electronics / general

author: wbicks
author_rank: Newbie
timestamp: March 26, 2017, 02:22:35 am
content: I ordered this Atmega32u4 board while forgetting that the 32u4 has dedicated SPI pins, which this board didn't break out to a header.And of course its the QFN version. But with the help of a head magnifier, some disassembled stranded wire, and by channeling my inner Louis Rossman, I managed to get wires onto the MOSI, MISO, and SCK pins.Attached are some pictures so you can laugh at my suffering. I am going to finish the code soon and see if it works.PS: For the curious among you, this is for a custom design I did based on the Si4463 radio transceiver from Silicon Labs, which i'm configuring for use in the 2 meter ham radio band.

author: KL27x
author_rank: Super Contributor
timestamp: March 26, 2017, 10:54:37 am
content: Believe it or not, you can do that with 30AWG kynar wire with the insulation still on. I have use smaller wires, but there is rare the job that actually need it. 30AWG kynar is my bread and butter. I feel naked without at least 1000 feet on hand.If you really need to use bare/bus wire, here's a tip. Hot glue a little bit of board to the top of the chip. Either a tiny fragment of protoboard or a little square of copper clad scored into 3 little strips. Using a small knife, you can cut these 3 traces partway through to reduce heat transfer. Then connect the little bus wires to one side of the board, and connect insulated wires to the other. Tack the insulated wires down to the pcb just a little bit away, for strain relief. If room allows, I like to make the board large enough to place a small paper label on it to identify each signal without looking at a datasheet. And it allow easy resoldering if the interconnect wires do break.Maybe overkill for this specific project. But a lot of my proto/dev boards may get cleared/stored away and revisited several times, and going the extra mile saves time and effort in the long run. But your lack of even hot glue is disturbing. When doing anything like this... hot glue, baby.
Pull ups on FPGAs? - Page 1
Forum section: electronics / general

author: bentomo
author_rank: Contributor
timestamp: March 22, 2017, 06:04:23 pm
content: So I'm using an ICE40HX8K and I've synthesized a design and I cannot figure out why my output is not being driven. I'm expecting a 3.3v peak but only get about 400mv of range. This seems to be the case for all of my outputs.I eventually stepped back and just wired my input clock to an output pin just to make sure it wasn't my logic, but still no luck.I can see the frequency so I know the signal is getting through but it's only in the 0-500mV range. So it seems like the internal pull-up pin wasn't working. I attached an external pullup pin and now it's just a 3.3v centered 400mV peak-to-peak wave that matches the clock of my input frequency.So my question is, how do output drivers generally work on FPGAs? It looks like I've enabled what I need to in software. The best documentation I could find on this is page 10 of the familydata sheet. But this seems like a trivial thing and I'm not sure what I'm missing.My test code is essentiallyVClock : in std_logic;TFTLCDCLK : out std_logic;signal VClockI: std_logic;VClockI <= not VClock;TFTLCDCLK <= VClockI;signal VClockII'm starting to think I should throw away this lattice stuff and go get a spartan 6 board.

author: jm_araujo
author_rank: Regular Contributor
timestamp: March 22, 2017, 06:11:30 pm
content: (No experience with FPGAs, so could be a stupid question)Have you wired the VCCIO_x correctly for all the banks?

author: FrankBuss
author_rank: Unknown
timestamp: March 22, 2017, 06:19:10 pm
content: Did you define the right IO type in the Lattice Diamond Port Assignment spreadsheet? Maybe it is configured as LVDS.

author: james_s
author_rank: Super Contributor
timestamp: March 22, 2017, 06:25:10 pm
content: Pullups are used on inputs, the output should be a totem pole that is actively driven low or high. Do check the configuration as suggested, and also make sure you are not using a special purpose pin. Many FPGAs have a few pins that are input-only feeding the global clock network or dedicated to some special function.

author: bentomo
author_rank: Contributor
timestamp: March 22, 2017, 08:15:34 pm
content: There HAS to be a name for a phenomenon of figuring something out as soon as you ask someone about it. Spent about a day on this and as soon as I make the post I noticed that my jumpers were on backwards.So I was programming the devices CRAM and resetting it every time I moved from USB to my test bench. I fixed the jumper and viola, a clock output.Maybe I was seeing what I wanted to see in the messy waveforms.Thanks for the quick responses as always guys.

author: mrflibble
author_rank: Super Contributor
timestamp: March 22, 2017, 09:05:10 pm
content: You could check the bit about physical constraints on page 17, and inspecting pins in the package viewer on page 21-22.http://www.latticesemi.com/~/media/LatticeSemi/Documents/Tutorials/AK/iCEcube2Tutorial.pdf
A basic Micro-controller   - Page 1
Forum section: electronics / general

author: Md Mubdiul Hasan
author_rank: Regular Contributor
timestamp: March 24, 2017, 12:47:14 am
content: Hi,Even its 1950's project, I feel interest on it. You might feel it silly!I am trying to get attraction those people, who knows its hardware well.Its a serial interface project, someone who posted it online.Take a look this schematic, I have few questions.1. Does the resistors R1 and R2 has connection with PIN4 of DM7406? Did you see those are connected with regulator input?2. Whats the reason of invert signals by buffer here?3. Does the pull-up resistors are on matched value against IN/OUT current and voltage ? I got MAX and MIN pull-up resistor value setting equation on DM7406.4. Anything wrong you could see in this design?Kindly post your comment here.

author: Md Mubdiul Hasan
author_rank: Regular Contributor
timestamp: March 24, 2017, 01:53:10 am
content: Dear Sir Blueskull,Thank you for nice technical descriptions.Let me draw my interest on your comments right here.1.Quote-Open collector chips have no internal pull-up resistor, right? Where you would get such different output range in this design?Dont you mean A1,Y1......An,Yn?2.Quote, why we need to trigger you know?3.QuoteCant we calculate resister values ? Can you check datasheet kindly?4.QuotePlease identify them. Dont you mean RC calculation/time constant/frequency calculation?QuoteYes, well noticed.

author: rstofer
author_rank: Super Contributor
timestamp: March 24, 2017, 04:42:45 pm
content: The circuit seems to be a chip programmer. In the old days (and still with some PICs), high voltage was applied during programming. Hence the 12V capability and the use of open collector inverters to select the voltage applied to Vpp.I used the 80C251 about 12 years ago and it was a pretty nice chip. I certainly wouldn't use it today! OTOH, I have a very nice Pascal compiler for the 8051 family and I really like the language.
analogic signal produce bad comunication spi - Page 1
Forum section: electronics / general

author: msantihagho
author_rank: Newbie
timestamp: March 18, 2017, 02:52:52 am
content: hi everyone! I need your help. So I have problems with use adc and spi comunication. I tell you, I am traying to comunicate two pics for spi on proteus. The pic master is 18f458 and slave is 16f887. The master must to read one signal for the port A0. The comunication is good if I send data without to connect the analogic signal on the pin_A0. I am using CCS. I put the code and image from circuit.Excuse me my English. I am learning.please help me!Master code:#include <18f458.h>#device adc=10#fuses hs, nowdt#use delay(clock=20M)#use standard_io(b)#include <lcd.c>#define LCD_ENABLE_PIN PIN_D0#define LCD_RS_PIN PIN_D1#define LCD_RW_PIN PIN_D2#define LCD_DATA4 PIN_D4#define LCD_DATA5 PIN_D5#define LCD_DATA6 PIN_D6#define LCD_DATA7 PIN_D7void main(){int16 lectura;float voltaje;lcd_init();setup_adc_ports(AN0);setup_adc(ADC_CLOCK_DIV_8);setup_spi(spi_master | spi_l_to_h | spi_clk_div_16);do{set_adc_channel(0);lectura = read_adc();voltaje = 5.0*lectura/1024;printf(lcd_putc, "\f%01.2fV", voltaje);spi_write(voltaje);delay_ms(1000);}while(true);}########################slave code:#include <16f887.h>#fuses INTRC,nowdt#use delay(clock=8M)#use fast_io(B)#include <lcd.c>#define LCD_ENABLE_PIN PIN_D0#define LCD_RS_PIN PIN_D1#define LCD_RW_PIN PIN_D2#define LCD_DATA4 PIN_D4#define LCD_DATA5 PIN_D5#define LCD_DATA6 PIN_D6#define LCD_DATA7 PIN_D7void main(){float data;lcd_init();printf(lcd_putc, "hola");output_high(pin_b1);delay_ms(1000);setup_spi(spi_slave | spi_l_to_h | spi_clk_div_16);do{if(spi_data_is_in()){data = spi_read();printf(lcd_putc, "\f%f", data);delay_ms(1000);}}while(true);}

author: danadak
author_rank: Super Contributor
timestamp: March 18, 2017, 01:45:16 pm
content: I do not see where you have setup all the A/D parameters -http://www.microcontrollerboard.com/analog-to-digital-converter.htmlhttp://www.tcnj.edu/~hernande/ELC343/Chapter_12.pdfHow do you test for conversion complete in code / AtoD busy ?Regards, Dana.
Vintage 6800 Assembler - Page 1
Forum section: electronics / general

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 14, 2017, 10:00:18 pm
content: Ha, I was digging in my closet for something and ran across this from the '80s.

author: Benta
author_rank: Super Contributor
timestamp: March 14, 2017, 10:13:45 pm
content: Wow! A blast from the past.I remember that one, even played with it myself. They cost a fortune back then, something like a month's pay.Thanks for sharing... and don't throw it away, it belongs in a museum.PS: could you share some better pics? Thanks.

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 14, 2017, 10:37:31 pm
content: Sure, I don't know what the rules are on vintage porn, but here ya go.

author: Benta
author_rank: Super Contributor
timestamp: March 14, 2017, 11:14:36 pm
content: Thanks!BTW, it's not from the 80s, but the late 70s.

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 14, 2017, 11:16:46 pm
content: Quote from: Benta on March 14, 2017, 11:14:36 pmAh, true. I said '80s because it was when I received it.

author: rrinker
author_rank: Super Contributor
timestamp: March 15, 2017, 02:16:57 pm
content: The 6800 has a 49th week 1976 data code! OMG tantalum caps!So much stuff like that I lusted after back then. All unaffordable to me at the time.

author: ebclr
author_rank: Super Contributor
timestamp: March 18, 2017, 12:06:19 am
content: How many hours did i played with that hex keyboard to enter programs to make my 1 st microprocessor clock, was very funny and excitingNow is possible to have similar excitement making the same clock wich a MAX II clpdsAlso interesting
Attiny84 writing a random/serial number on EEPROM - Page 1
Forum section: electronics / general

author: dan3460
author_rank: Frequent Contributor
timestamp: March 16, 2017, 02:04:37 pm
content: I'm using a series of Attiny84's as sensor I2C master controllers. Each sensor will send information to a motor controller that is acting as the only slave in the system. The motor controller needs to keep track of which sensor sent the information. The best solution is to have each sensor send a serial number identifying it along with the data. My idea is to have this number, as a 2 byte number, stored on the EEPROM of the Attiny84.I think the best way to add the number will be to upload it to EEPROM while I'm loading the program via arvdude. I'm using Atmel Studio to program the chip with USBASP, with the external tool. I think I can add on the command line the upload of the EEPROM file together with the program, my question is how create the file to upload that will contain the sequential/serial number.- What is the format for the EEPROM file to upload?- Is there a program or technique to create the sequential number contained in the file?- How would you make it so every time you upload the program in the chip there is a new number on the file?I found some stuff on the internet but still a little lost on how to proceed.Thanks for the help guys,

author: Jeroen3
author_rank: Super Contributor
timestamp: March 16, 2017, 02:19:48 pm
content: I think you can achieve what you're looking for with Srecord.http://srecord.sourceforge.net/You can modify hex files with that.Or you write some python script, there are modules that can edit hex files.It's more difficult to create unique numbers, since this will require your tool to store the numbers.

author: dgtl
author_rank: Regular Contributor
timestamp: March 16, 2017, 06:00:26 pm
content: The avrdude is capable of writing binary files (type=r). In this way, you write a program that generates the next image file and then write a batch file that updates the number and programs it to board. Alternatively, you can even give the byte values on the command line (type=m), in case you have only a few bytes to write to.On linux, this could even be shell-scripted in a bash script file.
Logic as level shifter? - Page 1
Forum section: electronics / general

author: Jeroen3
author_rank: Super Contributor
timestamp: March 16, 2017, 07:23:49 am
content: I've made a mistake on a little project. Like we all do sometimes.There is this little circuit with a 3.3V MCU and a little P-channel fet switching some 5V stuff.The fet has a gate pull-up to 5V to turn it off, but is clamped at 3.6V due to the pin used on the mcunot being 5V tolerant.So it's not going off completely.5-3.6 is Vgs 1.4For a cheap fix I could add a NPN transistor, but that would require an additional new part.Can I use an74LVC1G57Configurate gate as 3.3V to 5V level shifter?

author: Ian.M
author_rank: Super Contributor
timestamp: March 16, 2017, 07:50:24 am
content: Provided you've got a 5V supply for it, and the 3.3V MCU logic '1' level is over 3.1V the thresholds inTable 12. Transfer characteristicslook promising. There isn't going to be a lot of margin so put it as near as you reasonably can to the MCU pin.

author: Jeroen3
author_rank: Super Contributor
timestamp: March 16, 2017, 08:26:43 am
content: I see a problem when it gets hot. I'd better add a reel of bc547's.

author: Ian.M
author_rank: Super Contributor
timestamp: March 16, 2017, 08:32:08 am
content: As long as your 5V supply isn't more than 0.1V high you've got a little margin over the full temperature range.

author: Jeroen3
author_rank: Super Contributor
timestamp: March 16, 2017, 09:34:19 am
content: Yeah, its a "regulated" DC/DC (24 to 5) sip brick. So no warranties there.

author: Ian.M
author_rank: Super Contributor
timestamp: March 16, 2017, 09:41:43 am
content: Better bite the bullet and put in something like a74LVC1T45(or 74LVC2T45 if you need two channels)You may even be able to safely do away with the gate pullup.

author: nctnico
author_rank: Super Contributor
timestamp: March 16, 2017, 12:00:27 pm
content: I'd go for a 74HCT device. You can power them from 5V but since they are TTL compatible Vih (logic high input threshold) is 1.4V.

author: Jeroen3
author_rank: Super Contributor
timestamp: March 16, 2017, 02:24:19 pm
content: Since it required a pcb update. I've placed some sot23 npn.Obviously, there are plenty of special chips to buy for this, but board space and efficiency were not a design goal.The reason I asked for the configurable gate is because there were already some on the board.
Does anyone here have an OOPic? - Page 1
Forum section: electronics / general

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 14, 2017, 05:47:19 am
content: I bought an OOPic controller many years ago, and sadly, Savage Innovations died and so the OOPic. This is the PIC board that I have ever diddled with.I was digging around in old projects and found my 2 OOPic boards and decided to try and revive them with a new project. I now have Windows 10 and couldn't find the compiler anywhere for Windows 10 (64 or 32 bit).Tell me your project or add a jpeg of your OOPic.

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 14, 2017, 09:36:59 pm
content: I found the chip web page for the OOPic with software links for compiler and manuals, for those interested.http://www.micromegacorp.com/ide-v3.html

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 15, 2017, 04:12:40 pm
content: Does MicroMega make any MCUs used currently that is popular?

author: tpowell1830
author_rank: Frequent Contributor
timestamp: March 15, 2017, 11:57:03 pm
content: This micro name is uMFPU-V3 for the OOPic. Hope I see some OOPic fans.