Timestep too small in simulation with 2 pulse generators - Page 1
Forum section: electronics / general

author: Krotow
author_rank: Regular Contributor
timestamp: November 22, 2024, 07:29:30 pm
content: Complete newbie in ngspice and KiCad simulations here. Tried to simulate bidirectional 1-line connection to GPIO with N-MOSFET and NOR gate. To simplify things, used two VPULSE sources. V2 generate three 50ms "input" pulses, V3 must wait 500ms then generate one 50 ms "response" pulse. Ran transient simulation in 1 second timeframe. Unfortunately simulation for complete circuit fail with notorious "timestep too small" error.doAnalyses: TRAN: Timestep too small; initial timepoint: trouble with xq1:dlim-instance d.xq1.d1So far had no success with this. With both V2 and V3 present any Vx or simulation timestep value cause this error. Without V3 however simulation works. Both V2 and V3 times are within 1 second interval. Any idea what is wrong here? I attached whole KiCad project at bottom.FYI: Circuit itself is an adaptation fromSplitting and arbiting a bidirectional serial buscircuit at Figure 7. It works just fine IRL where recipient that is the cursed Nayax VPOS Touch card reader where PULSEx lines have very weak output without internal pullup measures and can't pull voltage down with almost every other pullup solution.

author: Nominal Animal
author_rank: Super Contributor
timestamp: November 22, 2024, 07:52:45 pm
content: The error message is a bit misleading, because what it actually means is that the underlying simulation time step could not be computed, even though it tried progressively smaller timesteps. I suspect the underlying problem is that specific situations cause the models – especially MOSFETs, but also various SPICE models – to behave in a discontiguous/discrete/chaotic manner, which the solver has difficulty dealing with.In simple terms, you can interpret the error as "this circuit is not simulatable as-is, because it causes (some specific model) in it to misbehave".The error message you see refers to Q1, which is the 2N7002 MOSFET, so I would suggest you first try adding say a 10Ω resistor to gate of Q1.If that does not work, my next suggestion would be to move the 10Ω it to U1A pin 3 side, and add another 10Ω resistor to the TX line.If that does not work, I'd add say 1Ω resistors to the output of each voltage supply.The resistor values themselves aren't that important; they just ensure that the currents from pure voltage sources stay realistic. For MOSFET gates, it limits the peak current draw when switching states (and thus slightly slows down the switching rate), so I've found it very useful to look at the peak current over the limiting resistor (whatever value you happen to use) to determine whether the circuit is realistic and whatever drives the MOSFET gate can handle the very short peak current draws.The same advice would apply if the error referred to some SPICE model instead.(Although I have KiCAD 8 installed, it is Friday evening here, and I'm feeling too lazy to experiment with this myself. Apologies!)

author: Benta
author_rank: Super Contributor
timestamp: November 22, 2024, 10:09:49 pm
content: First, clean up your schematic.Don't use global labels unless absolutely necessaray, draw a wire instead. Your labels are all inputs, although some are really outputs.That's one error source fixed.Second, get rid of units B, C, D. They're not needed for the simulation.Third, make certain that the 74HC02 model pinout matches U1A.

author: Krotow
author_rank: Regular Contributor
timestamp: November 23, 2024, 12:10:40 am
content: Turned out, the real cause of timestep error indeed was completely mismatched component inputs and outputs. I corrected them. Also changed global labels to local, connected VPULSE sources with lines and deleted everything not directly involved in simulation. Now it works as expected. Thanks to you both.Interesting why there are no warning about mismatched inputs. Though as I realized, ngspice have no idea about component pin layout in schematic and KiCad doesn't care.

author: Benta
author_rank: Super Contributor
timestamp: November 23, 2024, 09:54:08 pm
content: "Interesting why there are no warning about mismatched inputs."There are. It's called "Electrical rule check" and is in exactly the same menu as the simulator.

author: Krotow
author_rank: Regular Contributor
timestamp: November 24, 2024, 03:30:53 pm
content: Ok, I ran that check and got a full load of warnings and errors about missing 74HC02 component parts. At end was forced to add all unused parts (see the bordered eyesore in attached picture at right side) and correct their pin ordering as well. At least there is no more errors.

author: Benta
author_rank: Super Contributor
timestamp: November 24, 2024, 09:47:55 pm
content: Yeah.If you don't want to look at them, place them outside the sheet.You're working very disciplined by grounding inputs and Xing non connected outputs. That'll save you a lot of trouble moving on.Good job.

author: Krotow
author_rank: Regular Contributor
timestamp: November 30, 2024, 01:24:08 pm
content: Quote from: Benta on November 24, 2024, 09:47:55 pmThanks. Can't forget the logic gate grounding. Especially older logic gate types glitch when unused inputs aren't grounded or pulled up. Already burned myself on that few times. And X-ing the unused pins is is a good schematic design. I love well formed documents.