LOL - Altium is resorting to propaganda .... - Page 1
Forum section: electronics / general

author: cadguy68
author_rank: Contributor
timestamp: May 28, 2019, 02:29:35 pm
content: So, Polar Instruments, and all the other impedance calculators, which have been in use for decades, are suddenly no longer trust-able, but the new Altium is:https://resources.altium.com/altium-designer/clearing-up-trace-impedance-calculators-and-formulasSure, don't trust the formulas used in the past. What about the ones in AD V17 and below - those were okay though?And, autorouter technology over the past decades has also failed the industry, but the new Altium is our salvation:https://resources.altium.com/high-speed-design/to-autoroute-or-not-to-autoroute-a-history-of-failed-design-automationThose two images at the beginning of the page aren't even autorouted images - they're hand taped images, totally meant to mislead.Really Altium !!?!! Think I'm going to barf ...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 28, 2019, 07:14:27 pm
content: Not quite. The doubt is perfectly valid, and infuriatingly common -- most calculators present their results with absolutely no hint that they might be in error, let alone in what ways. And these are difficult subjects (look at all the terms in the Hartley formula shown) -- wemustexpect errors, and to be able to work with those errors we need to know when they are acceptable and when they are not!But then, the close of the article is delightfully terse. Sure, you can do controlled impedance calculations....but having now discussed the formulas, and the existence of these errors,how well does your recommended product compare?Oh... it just ends there. Well, isn't that convenient.Tim

author: Berni
author_rank: Super Contributor
timestamp: May 28, 2019, 07:59:37 pm
content: Im still sticking to Altium 16Tho i have to admit some of the new features in 19 do look nice, like automatically fixing traces when blocks of components are moved, or interactive autorouting of buses and such. But all the other crap that breaks and the stupid new user interface keeps putting me off.

author: thm_w
author_rank: Super Contributor
timestamp: May 28, 2019, 09:43:21 pm
content: Quote from: cadguy68 on May 28, 2019, 02:29:35 pmThey don't care about anything but their latest product, so if something is new or improved now thats all that matters.Actually yeah that article is odd because they just go on to conclude: "Altium Designer includes a layer stack manager with an extensive stackup materials that helps you control impedance". What? Why not have some proper built in calculations to do it instead.But its good they are bringing the issue up. Recently found out the trace calculators for internal traces are all off, for example:https://www.smps.us/pcb-calculator.html

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 28, 2019, 10:10:29 pm
content: Some very good calculators here:http://www.chemandy.com/calculators/calculator-index.htmhttp://www.chemandy.com/calculators/microstrip-transmission-line-calculator-hartley27.htmthe Hartley formula mentioned abovehttp://www.chemandy.com/calculators/coplanar-waveguide-with-ground-calculator.htmCPWGTim

author: Berni
author_rank: Super Contributor
timestamp: May 29, 2019, 05:18:40 am
content: My way of doing it is the ever popular Saturn PCB toolkit:http://www.saturnpcb.com/pcb_toolkit/Punch the numbers into that and then set up Altium do give me the right track/spacing for my needed impedance. I'm not really fussed if my trace ends up being bang on 50 Ohm or 45 Ohm. I know the cheap boards i order from PCBWay or whoever won't be impedance controlled so the dielectric factor and exact thickness will wander around and mess up my exact impedance anyway.Also what is around the trace or coplanar waveguide or whatever also matters. The ground plane on each side is not infinite, there could be components close, there is the extra dielectric of the solder mask etc.. So if you really want to be sure you got the impedance spot on you have to resort to EM simulations rather than just plugging in a few formulas. But its not worth the trouble, unless you are doing fancy RF stuff or ridiculously high speed digital (Like running the faster types of DDR4 at full speed) it doesn't matter if your impedance is a bit off.

author: cgroen
author_rank: Unknown
timestamp: May 29, 2019, 08:44:55 am
content: Regarding the autotouters, I simply love the examples they show, they are always perfectly 1:1 (like the ones in the second link in the first post). The connections from the device to the connectors are perfect from the design, so of course its no big deal for an autorouter to solve that.I'm still waiting to see some real world success using an autorouter, and not just for a single design, but repeatably (oh, and flying cars etc)

author: Berni
author_rank: Super Contributor
timestamp: May 29, 2019, 10:21:57 am
content: Well the autorouter can handle branching complex designs just fine, but it usually becomes quite a mess when it starts jumping layers.I did challenge Altiums autorouter a few times by taking a complex dense board that i routed by hand, deleting all traces and vias and then let the autorouter at it with the same rules. Things usually start off pretty well but then it starts to work its way around existing tracks and jump around, it does move the tracks around a bit to untangle them but as the board gets more full it sort of gives up on any major changes to existing tracks. Eventually at about 95% of tracks routed it stops and gives up as it runs out of room on the board. Pretty much all of the left over 5% of tracks are the long distance tracks going across the whole board, those are now impossible to get routed anywhere due to the spaghetti mess all over the place. Its just so disorganized that it runs out of room rather than logically grouping traces together and running them in tight bundles or leaving space for potential traces that might need to go by that spot. You can probably help it along by imposing rules about running traces on a given layer only vertical or only horizontal but come on nobody makes boards like that in this day and age.

author: 2N3055
author_rank: Super Contributor
timestamp: May 29, 2019, 01:21:34 pm
content: Quote from: Berni on May 29, 2019, 05:18:40 am1+ For Saturn PCB Toolkit

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 29, 2019, 04:02:23 pm
content: Quote from: Berni on May 29, 2019, 10:21:57 amEveryone makes boards like that in this day and age, and you may've proven the point as to why everyone does.Tim

author: nctnico
author_rank: Super Contributor
timestamp: May 29, 2019, 06:25:06 pm
content: Quote from: T3sl4co1l on May 28, 2019, 10:10:29 pmWell... the generic equations only work well for 50 Ohm-ish microstrips. In my experience none of the online calculators give very accurate results especially when you need to calculate impedances other than 50 Ohms. The formula from Hammerstad & Jensen is much more accurate. A couple of years ago I wrote a tool to calculate elliptic microstripline filters and I ended up using Hammerstad & Jensen's formula in order to calculate the impedance correctly (correctly as in getting a result which simulated correctly in an EM simulator and worked as a real circuit).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 29, 2019, 09:53:43 pm
content: Oh, cool.More detail than you'll ever need:http://qucs.sourceforge.net/tech/node75.htmlSeems to stop short of a prepared calculator, but it should be pretty easy to write one.Tim

author: ahbushnell
author_rank: Frequent Contributor
timestamp: May 29, 2019, 11:21:39 pm
content: You can use FEMM and do 2D calculations. It will do electrostatic and magnetostatic. From that you can calculate the inductance/m and capacitance per meter which can be used to calculate the impedance.I now have 3D software but I have used FEMM for a long time.The price is great.Free.Andy

author: Siwastaja
author_rank: Super Contributor
timestamp: May 30, 2019, 08:07:10 am
content: What would be the motivation to calculate/simulate impedances to higher than about 1% accuracy? In real world, open-loop material control could never reproduce the exact simulated geometry and material properties anyway, so actually a closed-loop system is used, where test traces are reproduced and then the circuit geometry finetuned to produce the actual impedance-controlled product. So in this case, most important is to be able to accuratelymeasure, and then keep process control between the test strips and actual circuits tight. Sub-1% accuracy of the initial simulation would be meaningless. Am I missing something?

author: Berni
author_rank: Super Contributor
timestamp: May 30, 2019, 09:29:42 am
content: Quote from: T3sl4co1l on May 29, 2019, 04:02:23 pmWell its been a long time since i have seen such a board, especially if it has modern fine pitch SMD parts on it. So care to show examples?Of course any designs that are even close to dense will have large ares of the board that are flowing in a certain direction since its the only way to make good efficient use of board area. But a single layer might have multiple of these directional areas on it depending on what that particular section of the board needs or the areas might flow and curve organicaly to get around places. As opposed to the classical style of having pretty much all traces going strictly vertical and then on the next layer all traces going strictly horizontal. Tho to be fair modern electronics tend to be a lot more point to point on a PCB compared to the oldschool digital designs where nets tend to fan out hugely over many components all over the board.

author: MagicSmoker
author_rank: Super Contributor
timestamp: May 30, 2019, 10:09:58 am
content: Quote from: Siwastaja on May 30, 2019, 08:07:10 amBang on correct. Also, don't the RF cowboys have to re-spin their boards even more than the power electronics cat wranglers? Surely no one expects a controlled impedance board to work exactly as "calculated" the first go around?@Berni - I hand route all my boards and above a certain complexity I definitely use routing rules like "layer 3 traces run horizontally; layer 4 traces run vertically." I don't slavishly adhere to them - that would be just as stupid as the typical autorouter - but if these sorts of rules didn't help tremendously people wouldn't bother with them. See attached excerpt showing minor rule violations noted with yellow lines.

author: Berni
author_rank: Super Contributor
timestamp: May 30, 2019, 11:26:29 am
content: Quote from: MagicSmoker on May 30, 2019, 10:09:58 amUsually my reason for using internal signal layers is that there is not enough board space to route out the given complexity purely on top and bottom. Since i never have the luxury of blind or buried or micro vias means that the space taken up by vias matters a lot. So when a lot of traces need to make a turn in the same direction it can save a lot of space if the turn is simply done on that layer(if nothing is in the way). This also lets you adjust the "trace bandwidth" in a certain areas of the board if you happen to have a larger than usual amount of traces going in a given direction.An example of a corner in a dense 6 layer board (2 layers used for power and ground are hidden):

author: nctnico
author_rank: Super Contributor
timestamp: May 30, 2019, 05:04:23 pm
content: Quote from: Siwastaja on May 30, 2019, 08:07:10 amThe problem is that the error of the 'simple' formulas is much bigger than that in some cases but the error isn't advertised.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 30, 2019, 07:09:19 pm
content: Quote from: Berni on May 30, 2019, 09:29:42 amI would love to, but NDAs, y'know?Includes 4 and 6 layer designs, too. Unsure if they were autorouted but they mostly adhere to a layer bias anyway.Personally, I prefer layer bias, but I allow for changing orientation around the board. For example, around a QFP, same-side pins are radial, so opposite side routes should be tangential. Some routing can be resolved underneath the chip (typically making the shortest path), but don't go crazy with it, as that blocks other routes, or ground fill if applicable (i.e., 2 layer).QuoteI would dare say it's the other way around: bias is done for expediency. Or six layers used when four or even two layers will suffice, just to get it finished.Mind, I mostly work with smaller quantity designs, where NRE is a larger fraction of total production cost, and PCB cost, isn't so much. So I've seen a lot of those cases. (I've also "fixed" a number of those cases, taking just a few hours to remove a practically redundant layer pair.)Whereas, truly dense layouts -- consider cellphones with HDI boards, 8+ layers, and surfaces absolutely stuffed with parts -- can't afford much layer bias, because everything is so dense. HDI also facilitates flexible layout, which may or may benefit from layer bias anymore. (The businesses making them, can probably afford a better autorouter than Altium, too...)QuoteYeah, which is my style as just said. I think not everyone can afford to make those allowances without confusing themselves, so a lot still prefer stronger layer bias.I could point to any number of classic computer boards, with strong bias -- many of which were done with early autorouters, with square corner traces and all. But as you note, designs change over time, and what worked back then, may not be the best approach today.Tim

author: OwO
author_rank: Super Contributor
timestamp: May 31, 2019, 05:27:09 am
content: When I do layout design the role of each layer is very ad-hoc; for example top internal plane is usually a ground plane but routing power traces on it is allowed as long as the area is free of high speed traces on the top layer. Same thing with power planes, most of the board does NOT usually have any fixed power planes but I may add a local power plane on bottom internal plane so that it can carry power as well as serve as a "ground" plane for high speed signals to travel on.If I had to assign fixed roles to layers, e.g. power plane, ground plane, signals, etc or restrict direction of lines there is NO way I can route the boards I'm doing on 4 layers. I have done Zynq + DDR3 (32 bits) on 4 layers, running at full speed. None of this is possible with the typical layout design styles I see (other than maybe some chinese layout designs), and absolutely NOT possible with any autorouter. Everyone else is using 10+ layers with Zynq and DDR3, which is why every single Zynq SoM that includes DDR3 I see are severely overpriced.

author: Berni
author_rank: Super Contributor
timestamp: May 31, 2019, 06:26:31 am
content: Yeah i also like to cheat and use power layers for signals in places where things get tight and i can get away with it in terms of integrity (Some of it can be seen in the form of visas that seemingly go nowhere in the corner).I'm not trying to say autorouters are completely useless or that using the vertical/horizontal routing layers is always bad. Those vertical/horizontal styles are actually very good for the old digital boards with like 50 of those 74xx/40xx logic chips on a board. There nets are so chaotic all over the board that you would have a hard time forming sensible bundles of traces. Here doing it like a 80s autorouter makes a lot of sense as it keeps things as organized as they will ever be.On modern boards this is usually not optimal anymore. Nets don't branch so much, there are high speed requirements on them, big chips can have crowded fanout under them etc.. You can still use autorouters to help speed up the process such as fan out a BGA for you to then manually tweak to your liking, or manually route a bundle of traces right up to a chip and let the autorouter connect it up. Results in a still quite optimal design that doesn't look autorouted while saving the PCB designer time and work. Tho i don't work much on massive boards where this saves the most time so i never bothered to learn those step by step autorouter tools.Oh and nice one with a Zynq on 4 layer. Those are big chips.

author: Pitrsek
author_rank: Regular Contributor
timestamp: June 07, 2019, 07:42:03 pm
content: Quote from: ahbushnell on May 29, 2019, 11:21:39 pmOr you can go directly with free 2D field solverhttp://mmtl.sourceforge.net/In my experience the results are spot on.