ECP5 SPI flash programming using open source tools - Page 1
Forum section: electronics / general

author: vagran
author_rank: Newbie
timestamp: December 27, 2024, 04:49:10 pm
content: Hi,I just begin FPGA learning. I am using ColorLight 5A-75B v8.2 board (Lattice ECP5 LFE5U-25F-6BG256I) to play with. I succeeded with uploading my hello world design using Yosys/NextPnR/ecppack/OpenOCD to FPGA SRAM. However, I currently cannot understand how can I upload my design into SPI flash on the board using the same (or may be some additional, but still open-source) toolchain. According to the ECP5 documentation ("Programming External SPI Flash through JTAG for ECP5/ECP5-5G" AN), it should be possible to do this. This is done through JTAG so looks like it should be a matter of proper ".svf" file generation. Does such stuff exist in the open source?

author: SiliconWizard
author_rank: Super Contributor
timestamp: December 27, 2024, 11:12:12 pm
content: I have used these boards and don't remember the details with OpenOCD, but I think it was a bit of a mess.I use the following tool, which can both configure the FPGA and program its attached SPI flash. It requires a DAP adapter, which is exactly what these boards have actually (unless they have changed that), so it's compatible. It directly takes the .bit file.https://github.com/adamgreig/ecpdapIf you're on Windows and don't want to bother compiling it (it's Rust-based), it has a Windows executable ready to use:https://github.com/adamgreig/ecpdap/releases/tag/v0.2.0Quick guide:- To scan the JTAG chain (that will check that ecpdap correctly sees the FPGA):Code:ecpdap scan- To configure the FPGA SRAM:Code:ecpdap program <yourbistream.bit>- To program the SPI Flash:Code:ecpdap flash write <yourbistream.bit>Note that those boards usually come with a write-protected Flash. You need to unprotect it the first time you want to re-program it:Code:ecpdap flash unprotect

author: betocool
author_rank: Regular Contributor
timestamp: December 28, 2024, 04:02:23 am
content: Try this for open source toolchain:https://github.com/trabucayre/openFPGALoaderI've used it in the past with Vivado (Xilinx) on a Linux machine, both for FPGA and flash programming. Works surprisingly well and it's simple enough. The repo is being actively maintained, which is also a good sign.Cheers,Alberto

author: vagran
author_rank: Newbie
timestamp: December 28, 2024, 03:21:26 pm
content: Thanks! That worked:Code:openFPGALoader -b colorlight -c ft232 -f --unprotect-flash blinky.bitI use CJMCU-232H board for JTAG link.I am on Linux, and useoss-cad-suitepre-built toolchain. It happens to have `ecpdap` as well. I tried it, but seems I did not get how it should be connected, just JTAG seems not enough:Code:% ecpdap scanError: no CMSIS-DAP probes found.Anyway, I am happy with `openFPGALoader`, thanks!

author: SiliconWizard
author_rank: Super Contributor
timestamp: December 28, 2024, 07:53:59 pm
content: Ah, I understand why now. ecpdap works with the dev boards using the ColorLight modules (SIMM), which have a DAP adapter on board. These boards:https://www.aliexpress.com/item/1005001686186007.htmlThey are not as cheap, but more flexible as they give you access directly to most IOs. The board below does have level shifters and (AFAIR) you don't have direct access to IOs, which is less convenient. And they are all level-shifted to 5V (again IIRC).So I checked and your board ColorLight 5A-75B v8.2 seems to be the original board made as a LED panel controller with all the connectors, and apparently it has a FTDI chip for JTAG, and not a DAP adapter like in the above board.https://www.wiredwatts.com/colorlight-5a-75becpdap doesn't support (yet, and as its name implies) FTDI chips, although that's something I had suggested to its author as an alternative.

author: vagran
author_rank: Newbie
timestamp: December 28, 2024, 08:09:47 pm
content: Yes, I get it from AliExpress for 15$ with delivery included during BF sale. The only routed input is the button (which is also available on the nearby connector pin) and JTAG. BTW I found using JTAG for communication and debugging very handy using JTAGG primitive (supported by Yosys) and a simple Python script using `pyftdi` package. This way I can get bidirectional link with computer for inspecting and affecting my logic internal state. I also plan to use this communication channel with some MCU (like ESP32) if I end up with making something useful with this board. This looks much easier than bothering with output drivers resoldering.