Design of voltage-controlled current sink (or source) - Page 1
Forum section: electronics / projects

author: Craig_D
author_rank: Newbie
timestamp: September 17, 2018, 11:07:16 pm
content: Hello, I am new to the forum but have been in electronics for a number of years.I am trying to design a voltage-controlled current sink or source. A sink seems more stable and capable of being implemented with least parts count / board space.Basically, I need to provide "0" to 50mA @ 80VDC, with maximum practical resolution. The load pulses at 10-250uS, with 300-500nS rise and fall times.What I have done: I have looked at number of both sources and sinks, using either BJT or MOSFET pass transistors driven by an op amp. Since the output voltage is 80, sources seem to me to require floating the op amp, which contributes to stability problems and adds to parts count.But sources and sinks that I have tested in sim suffer from severe overshoot on the pulse rising edge, because the circuit starts at max current and needs time to respond to a limit. This appears to be confirmed by the fact that overshoot is not seen when the control voltage is set for max current. I have played with a comp cap between the op amp inverting input and output, noting that the width of the overshoot is inversely proportional to capacitance because of its effect on the op amp's output rise time (overshoot occurs during the 'ramp' in the op amp output).It seems to me that I need a very fast op amp, but I suspect the overshoot will still be present as a spike. That could create problems for downstream current sensing, either making it less precise or more complex.If someone can point me in the direction of a solution, that will be most appreciated.

author: tszaboo
author_rank: Super Contributor
timestamp: September 17, 2018, 11:19:06 pm
content: BJT works better at high speed, because the gate charge of a FET. And the actual usable voltage of a FET transfer characteristics for low current is small, so noise gets amplified. But your step response requirements are very high. Basically, you expect the load to go from 0V to 80V within a microsecond, that is very high speed for any opamp. Or most analog control loop.As far as I see, you want a machine making pulse load, so probably better if you create an R-2R DAC, calculate the resistance based on voltage and just turn on the required FETs at the same time.

author: Craig_D
author_rank: Newbie
timestamp: September 19, 2018, 05:55:41 am
content: Thanks for the input, NANDBlog. I agree on the BJT. Not having to drive gate capacitance is a big plus. 80V in 500nS (not a spec, just what I'm getting so far, so I'm going with it) is 160V / uS, which a number of op amps can meet. That said, slew rate can roll off sharply outside of particular conditions, and manufacturers don't always spell that out.Blinding speed isn't a requirement, but a spike-free output is. I can trade *some* speed for cleaner leading edges. Can't really go over 1uS rise time, though.

author: Zero999
author_rank: Super Contributor
timestamp: September 19, 2018, 06:37:03 pm
content: The problem with BJTs is the safe operating area can become an increasing concern, as the voltage increase. 80V at 50mA should be doable, but will need a fairly chunky transistor. The TIP32C should be fine with dissipating 80V at 50mA, but it might be a little slow.https://www.mouser.com/ds/2/149/TIP32-890118.pdfMOSFETs can be faster and typically have a wider safe operating area, but driving the capacitive gate can be tricky, as mentioned above. I suppose a complementary pair of emitter followers could be placed between the op-amp's output and MOSFET's gate to reduce the capacitive load seen by the op-amp. Use a MOSFET rated to about 100V, with as higher on resistance as possible: typically higher on resistance parts have less gate capacitance. The old school IRF510 is probably one of the most suitable MOSFETs for this application.https://www.vishay.com/docs/91015/sihf510.pdf

author: Kleinstein
author_rank: Super Contributor
timestamp: September 19, 2018, 07:44:45 pm
content: For reasonable speed and power BJTs, audio transistors might be a good choice. The D44H series might work. With the right gate drive MOSFETs can also be quite fast. It's just tricky to get good SOA and small size and thus low capacitance together. The IRF510 is quite commonly used for RF power applications - so possibly a good choice, though one might get away with a smaller type (lower capacitance).10 -250 µs means one is inside the pulsed part of the SOA. So one may not need the corresponding DC rating.I would consider a cascode configuration, especially of the voltage does not have to go down very far. So the high power part would be driven from the emitter or source and the control part isolated from the change in voltage.

author: Zero999
author_rank: Super Contributor
timestamp: September 19, 2018, 09:49:42 pm
content: Quote from: Kleinstein on September 19, 2018, 07:44:45 pmGood point about the SOA, but no mention was made of the repetition rate, hence duty cycle, which could be an issue if it's high.I agree about using a cascode, perhaps the 2N7000 and a larger MOSFET would be a good choice.

author: SiliconWizard
author_rank: Super Contributor
timestamp: September 19, 2018, 10:57:16 pm
content: Something like this: very fast (rise and fall times < 200 ns) and limited spiking (at least in simulation). Thanks to the small negative supply you can get very low currents (< 100 nA) for a 0V input voltage.

author: Craig_D
author_rank: Newbie
timestamp: September 20, 2018, 01:11:39 am
content: Hero999, I see that I did leave out some useful information in my description. Rep rate is 100Hz or less and pulse width can vary between 10 and 250uS (thus the need for fast rise and fall times). These are all great responses and I will be trying these ideas -- will post results.

author: David Hess
author_rank: Super Contributor
timestamp: September 20, 2018, 08:53:08 pm
content: Precision settling in 100s of nanoseconds is difficult enough without a heavy load on the output of the operational amplifier. The input capacitance of the transistor needs to be isolated from the operational amplifier with a buffer. Loading on the operational amplifier needs to be minimized to prevent thermal effects which limit settling time.The transistor's reverse transfer capacitance complicates things so higher performance is possible using a high voltage cascode transistor. This allow allows the transistor being driven by the operational amplifier to be lower voltage and smaller lowering capacitance.Another circuit configuration which is much higher performance is to switch the output of the current sink using diodes and an open loop pulse generator so the current sink always operates at a constant current. This brings up another configuration where *two* cascode transistors are used in parallel forming a differential pair which switches the constant current from the load and a positive supply. Now the pulse generator only needs to switch by a couple of volts.