Failing on iec 61000-4-4 surge pulse - Page 1
Forum section: electronics / projects

author: rednoka
author_rank: Contributor
timestamp: May 28, 2024, 08:24:18 pm
content: The circuit below is failing on IEC 61000-4-4 surge pulses: 500V peak, approx. 6ns rise 100ns fall.The circuit first utilizes 2 back-to-back-connected TVS diodes clamping incoming 500V surge pulse to approx. 82V. After that, (after reverse voltage protection), there is another circuit clamping the 82V voltage into 56V. This is not only for surge protection but for also overvoltage protection.However, the circuit is failing on the surge pulses. The usual suspect is the overvoltage protection circuit. It works when the input voltage is manually (slowly) increased above 56V, but I think it fails if the surge hits suddenly. Somehow the over-voltage protection circuit is not acting fast enough. I appreciate any suggestions / opinions / explanations.Additions:- Fails on test with approved surge generator.- The failure is that: The following DC-DC converter IC burns up after the surge hit. (The DC-DC converter IC withstands max 65V.)- The board is extremely small, therefore I couldn't put any EMI filter (pi-filter) or common-mode choke.- The layout is added.More additions:- I re-examined the failed boards. The TVS diodes and all other transistors seem still intact (working). This means (I think) the TVS diodes worked and clamped the incoming pulses into 82V. Otherwise, a 500V pulse would crash those transistors.- I still think that the overvoltage detection and protection part is acting slow for some reason. I conducted some LTSpice simulations (not exact values and parts though) and the overvoltage protection circuit failed there too.However, when a 10uF capacitor is added everything is good in the simulation. I already have 5uF capacitor in the power entry. Very confusing.- The hardest constraint is the size of the board. Currently, the board is one-sided having components only on the top side. I can put some short components (like MLCCs) into the bottom side, but still there is not enough space for all protections.Update:- I decided to add a small surge protector daughter card. I hope the testing company will accept to pre-test the unit with this daughter card without any additional charges. If it passes, I will modify the PCB accordingly and start another test process.- Unfortunately, the PCB area and height are very limited. I cannot afford a Common Mode Choke.- I added the schematic of the daughter card.- Also my conclusion is bad layout. I made some spice simulations, normally the capacitors after the TVS diode should clamp the pulses. Somehow, they do not work.Another note:- If you are using MLCC capacitors on surge protection, beware the DC bias effect! The effective capacitance value of the capacitors drops dramatically under DC bias. In my case where there is 48V DC on the DC input, the capacitance values drop to one-quarter of the original.

author: Hiemal
author_rank: Regular Contributor
timestamp: May 29, 2024, 01:10:26 am
content: My very basic guess would be due to the back to back TVS diodes you have. Any parasitics in line with them could slow their response rate down, and having two in series is essentially doubling those parasitics... That'd be where I'd start, by trying to find a single bidirectional TVS that could do the job you're wanting.

author: Retirednerd2020
author_rank: Regular Contributor
timestamp: May 29, 2024, 03:03:06 am
content: Another issue could be the layout. Can you show the current paths relative to the surge devices? Is there any appreciable shunt trace length to the surge devices? Making the shunt lead length as close to zero as possible is a good goal.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 29, 2024, 04:14:48 am
content: EFT is wholly shut down, differential mode, by the 10uF cap alone. Your problem lies in common-mode sneak paths, or bad layout.Not sure what else to make of it; you say it fails, but not even how.Tim

author: jonpaul
author_rank: Super Contributor
timestamp: May 29, 2024, 04:55:22 am
content: Fails on just simulation or on test with approved surge generator?What generator, scope, probes?Photo of diagram of tesat setup?Scope traces of Vsurge , I surge and Vout, ?It needs properly designed CM and DM mode chokes at input.Suggest to use an experienced compliance design firm or consultant.https://www.ti.com/lit/an/slva711/slva711.pdfhttps://transientspecialists.com/blogs/blog/electrical-fast-transient-burst-iec-61000-4-4Bon Chance,Jon

author: rednoka
author_rank: Contributor
timestamp: May 29, 2024, 06:15:20 am
content: I strongly believe that the back-to-back TVS diodes work. They share the pulse energy. I used them in other projects and passed the same test without any problems.

author: selcuk
author_rank: Frequent Contributor
timestamp: May 29, 2024, 08:30:06 am
content: 5.0SMDJ30CA seems fine for ESD and EFT bursts but may be insufficient for the surge pulses. Check the attached image for a sample surge and ESD protection circuit. The varistor is for surge pulses and TVS diode for the rest of the transients. The fuse is to prevent fire when varistor fails shorted. It normally passes transient currents. Series resistor adds impedance to the TVS path to isolate it from surge currents and let varistor take the initial hit.IEC 61000-4-4 tests for EFT burst. Surge test is 61000-4-5. In your case, TVS diodes are not burned but DC-DC converter is. And from your rise and fall times, I think the test is about EFT not surge. I agree with the idea about problems using two series TVS diodes. So when you use one TVS diode, it will act fast and try to redirect surge currents into itself. In that case, you can consider using a varistor for surge protection if you need any.The layout may add additional inductance in series with the TVS or DC-DC converter and this leads to a difference from the previous designs. Your ground connection of TVS diodes is close to the power entry and seems fine. But the path through the TVS diodes may have more impedance than the path through DC-DC converter. You may need to direct the current to the diodes first then to the converter.

author: ArdWar
author_rank: Frequent Contributor
timestamp: May 29, 2024, 09:06:17 am
content: Quote from: T3sl4co1l on May 29, 2024, 04:14:48 amSure, but I won't bet my life on two series connected capacitor without any equalization at all, especially this close to rating voltage. At least I hope those aren't MLCC.

author: rednoka
author_rank: Contributor
timestamp: May 29, 2024, 10:56:05 am
content: I think I found the problem. Below you can find the timings of the NMOS transistor. The rise time is 8.2ns, which is higher than the initial rise time of the pulse (6ns). It seems the surge pulse penetrates before we close the gate.

author: rednoka
author_rank: Contributor
timestamp: May 29, 2024, 11:31:42 am
content: Quote from: ArdWar on May 29, 2024, 09:06:17 amWhy are the series connected capacitors bad practice? Due to parasitic inductances?By the way, those capacitors are indeed MLCC. Is MLCC especially bad to use in series?

author: nctnico
author_rank: Super Contributor
timestamp: May 29, 2024, 12:43:20 pm
content: Quote from: T3sl4co1l on May 29, 2024, 04:14:48 amI go for a bad layout. Look at how the trace sneaks around the connector towards the capacitors. There is lots of inductance in that trace. In addition, there is a huge internal layer copper pour going straight into the transistor. The TVS diodes and capacitors will do very little the way this board is routed. Adding a small inductor, common/differential mode filter or ferrite bead in series with the supply likely does wonders to improve this circuit. Some filtering is likely needed to pass conducted emissions anyway.I'm not seeing the advantage of the overvoltage protection circuit. A TVS + fuse (either self resetting NTC or regular fuse) is easier and more reliable. BTW, it looks like Q1 is wired the wrong way round with the diode always conducting. Assuming this is part of a telecom PSU, it looks like part of a soft-start circuit with several components missing.Regarding MLCC capacitors: these are surprisingly tolerant where it comes to voltage peaks. There is plenty of information to be found on that subject on internet. Putting these is series is sometimes recommended so a failure of one (due to cracking) doesn't cause a short between the supply rails. Using Y2 or X2 capacitors is a good option in this case.

author: jonpaul
author_rank: Super Contributor
timestamp: May 29, 2024, 03:57:54 pm
content: Check TVS specs, suspect inedaquate pulse rating.Add CM and DM filter chokes.Review PCB layour creep and strike clearancesj

author: T3sl4co1l
author_rank: Super Contributor
timestamp: May 29, 2024, 07:39:09 pm
content: Quote from: nctnico on May 29, 2024, 12:43:20 pmQ1 is reverse polarity protection. All the low-side switching does assume there's no external ground loop around the unit, which is TBD.Tim

author: dkonigs
author_rank: Regular Contributor
timestamp: June 02, 2024, 03:21:19 pm
content: So as someone who's been working through some EFT issues myself, I just stumbled across this thread.One thing I've been seriously wondering about, the answer to which may be useful to others here, is how to correctly probe the impact of an EFT pulse through your system.There are tons of articles about proper EFT test setups, and a few with suggestions for mitigating the impact of an EFT pulse. But what I have not seen, is any guidance on how to actually set up your equipment to probe your system with an oscilloscope to see how various filter attempts are actually performing.A big part of the problem is that between differences in ground between the device-under-test, the EFT generator, the power source, and the oscilloscope, combined with the energy of the pulse itself, the noise it induces tends to go all over the place. As such, even if you just probe ground (as opposed to probing across a power rail), you'll still tend to pick up something quite significant.So what exactly is the correct test setup for actually probing the output of your power stage (or anywhere else in your system) to see how much of an EFT pulse got through? Are there any good articles/documents/diagrams covering this aspect?

author: nctnico
author_rank: Super Contributor
timestamp: June 02, 2024, 11:44:02 pm
content: I think using an isolated probe is a good start. Maybe a differential probe will do but it might have too much capacitance to ground already.https://www.micsig.com/SigOFIT/

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 03, 2024, 12:45:27 am
content: Yep, CMRR (CMR too, for that matter..!) is the name of the game.Note that you can't probe, at all really, without affecting the system: just attaching probe leads to a device, adds the loading of those wires. Every little bit of length matters, in the ns domain. Just 1m leads with high impedance at the end (as a typical diff probe will have), sure not really a huge difference, but still something. And, contrast to the, probably more accessible but far more dramatic case: say you run a coax cable to the device, from a grounded scope; now you're adding a huge ground-return path, and no stack of ferrite beads will provide enough isolation to get a clean reading unaffected by that CM loading.Even a scope with isolated inputs, or a battery powered one, has the capacitance to free space / surroundings, of the isolated section or unit itself, dangling at the end of a thin cable; for those first couple ns, it still makes a difference.In the special case where the EUT is bonded to a ground plane, then CM voltage can be low, and additional CM impedance shunting the EUT doesn't have much more effect, and a coax (still well bonded to the EUT, and with a few FBs along it) to the scope can do fine. But this is a fairly special case, nice when it happens but not applicable in general.Tim

author: rednoka
author_rank: Contributor
timestamp: June 03, 2024, 11:27:12 am
content: By the way, I have a headroom for a series resistor up to 2 Ohms. Does a regular thick film 2 Ohm resistor with 1W power spec (placed after the TVS diode) withstand the iec 61000-4-5 pulses (together with other protection elements)? Or do I need a special resistor?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 03, 2024, 12:22:57 pm
content: Well which one is it? Because the OP says "surge", but the standard (-4-4) is "fast transient burst", not "surge". -5 is "surge".Note also, 61000-4 only specifies kinds of testing and methods; the exact tests required, for a particular class of device, are prescribed elsewhere. Thus you can have a 61000-4-5 combined-wave surge generator (the 8/20 or 1.2/50 µs pulse source), nominally with a 2Ω source impedance, but external resistance can be added in series to represent higher-impedance sources, like long telecom cables. It's not enough to call out the whole standard; what part of it, and how it's being used, must be specified.61000-4-4 doesn't make any allowances for alternatives, other than the two coupling methods given (direct, or capacitive-clamp); I'm not aware that any other standards use it as a basis but modify the impedance or whatever (but, that may well be done somewhere, I don't know). It would be pertinent to know which mode/method, and everything else about the system (number and length of cables, spacial arrangement,  grounding of units in the system, etc.), but given the magnitude of the transient, it isn't too important how exactly it gets into a module, or PCB, it's always going to be some mixture of direct conduction or CM-DM conversion, so I didn't see much need to ask for details.Perhaps you're doing all of these tests, and it's not ambiguous, it's not a typo, you've just moved on to the next series of tests now, or whatever. But I have enough suspicion now to raise these concerns.Tim

author: selcuk
author_rank: Frequent Contributor
timestamp: June 03, 2024, 12:57:50 pm
content: I observed issues for 61000-4-5 surge test (2 ohm output impedance) on a couple of boards using regular thick film resistors "before" a varistor. As far as I remember they had 2010 case. They usually get burned and become very high impedance. There are anti-surge or pulse withstanding resistors for better immunity to surges but I didn't try them especially for this case. There is an inductor on your additional board so a series resistor may not be necessary.Since your resistor will be "after" a TVS, it can be fine. But I suggest you the place a not populated varistor and a not populated and shorted fuse in case you fail the surge test with that TVS diode. You can mount these two on the test lab quickly without paying the test cost again.There are also ferrite beads with defined pulse ratings. May be it is better to use them instead of unknown resistors. Example:https://www.we-online.com/components/products/datasheet/74279226101.pdf

author: rednoka
author_rank: Contributor
timestamp: June 03, 2024, 01:36:14 pm
content: Quote from: T3sl4co1l on June 03, 2024, 12:22:57 pmYou are right. My unit is under test for both IEC 61000-4-4 and IEC 61000-4-5 surges. Currently I have failed from IEC 61000-4-4 but I am also considering IEC 61000-4-5.

author: rednoka
author_rank: Contributor
timestamp: June 03, 2024, 02:04:50 pm
content: Quote from: selcuk on June 03, 2024, 12:57:50 pmI have made a few LTSPICE simulations with ferrite beads. For iec 61000-4-4 pulses (which are fast, ns range, therefore occupying high-frequency bandwith), ferrite beads are fine.However, with iec 61000-4-5 pulses (which are slower, us range) the ferrite beads are useless in my simulations. (There were a few special ferrite beads which were useful but they have 1-2 Ohms DC resistance.)

author: T3sl4co1l
author_rank: Super Contributor
timestamp: June 03, 2024, 03:01:59 pm
content: Mind that most (almost all? All I've seen, anyway, exceptthose I've derived myself) FB models are linear only, and may be poorly fitted at that (have seen many single-RLC models out there). Under the amperes peak current of a direct EFT pulse, expect saturation -- the effect is merely delaying the leading edge, by perhaps a ns or few, without actually slowing or attenuating it.But again, without seeing the whole design, all I can conclude is it's probably not coming in on the power supply specifically. It might be carried common mode, inducing drop across other connectors, but you'll have to determine which those are, and protect and filter them accordingly.Tim

author: jkostb
author_rank: Regular Contributor
timestamp: June 03, 2024, 03:32:58 pm
content: 61000-4-4 is EFT and not surge (=61000-4-5). EFT has very fast rise and fall times compared to surge. Surge pulses are slow but have high energy content. TVS diodes offer perfect solution for surge protection even when back to back mounted (I have done projects with back to back mounted tvs diodes comparable what you have and it passed 61000 surge tests).For EFT you need additional protection. My proposal is since you don't have space for common mode chokes, try following:1) Add ferrite bead in power and return line to DCDC converter2) Add small NPO/COG capacitor to return line before the ferrite beads. (I suspect that your DCDC converter is killed by differential spike)3) You need to improve the PCB layout. The EFT pulse can easily bypass all protection because traces are routed too close to those TVS diodes (capacitive coupling)