Why do parallel bus to SPI interface ICs not exist? - Page 1
Forum section: electronics / beginners

author: sci4me
author_rank: Regular Contributor
timestamp: January 23, 2021, 04:18:46 pm
content: What I mean is something like this:https://www.nxp.com/docs/en/data-sheet/PCA9564.pdfbut for SPI instead of I2C. It seems like it should be relatively simple to implement in silicon but, despite somewhat-extensive searching, I have only found IP for SPI interfaces, no actual physical devices. It's quite perplexing to me, especially as a software developer who's only an electronics hobbyist; I'm genuinely curious what the reason is. Thanks!

author: wraper
author_rank: Unknown
timestamp: January 23, 2021, 04:23:47 pm
content: This IC is like a crutch, has little of niche use and SPI version would make even less sense.

author: Benta
author_rank: Super Contributor
timestamp: January 23, 2021, 04:42:06 pm
content: They exist as FPGA libraries. Example:https://www.latticesemi.com/products/designsoftwareandip/intellectualproperty/referencedesigns/referencedesign03/spimastercontroller

author: tooki
author_rank: Super Contributor
timestamp: January 23, 2021, 05:03:18 pm
content: Quote from: sci4me on January 23, 2021, 04:18:46 pmDoes it need to be an actual bus IC (which I guess is aware of the bus state or something?)? Because SPI port expander ICs do exist and aren’t hard to find.

author: exe
author_rank: Unknown
timestamp: January 23, 2021, 05:06:53 pm
content: The other day I was surprised by not finding an SPI multiplexer, a sort of usb hub, but for SPI. After some thinking I concluded that it's not a trivial tasks, and there are so many application-specific requirements, that it's not worth it. Instead, one could use a dedicated mcu with many io pins to do only that. So, probably, a cheap MCU is answer to many problems with interfacing different buses and/or devices.

author: HB9EVI
author_rank: Frequent Contributor
timestamp: January 23, 2021, 05:13:49 pm
content: Quote from: tooki on January 23, 2021, 05:03:18 pmgood question; I used the PCA9564 as an experiment on my Z80 board; it's fun, but it doesn't really have a practical usage nowadays. I guess a simple MCP23S17 should do the job

author: Benta
author_rank: Super Contributor
timestamp: January 23, 2021, 05:35:33 pm
content: Quote from: blueskull on January 23, 2021, 05:11:20 pmThey're slaves. The OP needs a master.

author: DC1MC
author_rank: Super Contributor
timestamp: January 23, 2021, 05:45:59 pm
content: Quote from: sci4me on January 23, 2021, 04:18:46 pmIf you can live with its limitations this may be a good choice:https://www.mouser.com/datasheet/2/405/tp3465-449702.pdfCheers,DC1MC

author: sci4me
author_rank: Regular Contributor
timestamp: January 23, 2021, 05:53:12 pm
content: To be clear, I'm not saying there's a strong argument that such a thing _should_ exist. The context of my question is homebrew 8-bit computers. I'm currently bit-banging SPI and have plans to move to a hardware-assisted implementation later; have a couple strategies, need to determine which would be better, etc. etc. doesn't matter here.It's not hard to create an SPI master with a '165, a latch, a counter, and a few gates.But no, I'm genuinely curious why products like this are seemingly so rare/non-existent. Is it just because it's not worth the cost to manufacture them?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 23, 2021, 05:53:50 pm
content: Easy enough to implement master functionality with a few more logic chips. Few latches, small counter, comparators -- make a basic state machine to control a shift register, and the clock (making sure the clock enable is synchronous with the clock, and adapting clock domains if the clock is independent from the bus) and chip select signals. Interrupt can simply be gated from CS rising, or something like that.I'm not sure what use there is in integrating all that? SPI is ubiquitous in MCUs, parallel buses are uncommon. Certainly there's no point today. Perhaps there would've been a brief period in the 90s, when parallel buses (MPUs) were still popular, and SPI peripherals were increasingly popular. Seems like that would be your best bet, looking for something long-obsolete that you can get some spares of.There is the old fashioned UART (in chip form), which has offered similar functionality for decades. Specifically you'll need a USART type, using the "SRT" set of functions. I'm not sure offhand that a classic 8250 or 16550 has that functionality, but there's probably something out there. Every family had their own thing (Intel 8250, Motorola something, Zilog Z80-SIO, etc.), I don't know what differentiates them. Shop around. Again, to the extent that you can shop among probably-obsolete parts. Maybe look up old catalogs (Digi-Key, Jameco, etc.) and data books.Edit: ah, I see my historical insight was correct!Tim

author: wraper
author_rank: Unknown
timestamp: January 23, 2021, 06:06:34 pm
content: Quote from: sci4me on January 23, 2021, 05:53:12 pmAnd this is your answer. Nobody cares about 8 bit homebrew. If it's a real product, engineer will just use a component which natively supports SPI. Unless you want to attach SPI to some very old hardware base, I don't see any reason for it to exist.

author: pqass
author_rank: Super Contributor
timestamp: January 23, 2021, 06:15:05 pm
content: Instead of a '595/'165 combo, I've found the all-in-one 74LS299 shift/storage register (serial in/out to/from parallel in/out).It's used in a recent vintage 8080 S100 CPU card to connect to an SD card.See cropped image (below) of larger schematic (next link) at bottom of the page (last link):http://www.s100computers.com/My%20System%20Pages/8080%20CPU%20Board/JAIR1SCH-Production%20Rev1%5b1%5d.pdfhttp://www.s100computers.com/My%20System%20Pages/8080%20CPU%20Board/8080%20CPU%20Board%20Rev0.htm

author: Benta
author_rank: Super Contributor
timestamp: January 23, 2021, 06:41:14 pm
content: It's still not an SPI master.

author: tooki
author_rank: Super Contributor
timestamp: January 23, 2021, 08:30:38 pm
content: Quote from: exe on January 23, 2021, 05:06:53 pmHuh? SPI already supports multiple devices. The most common way is to share MISO, MOSI, and SCLK, but have a separate CS (chip select) line for each slave device, but daisy-chained SPI exists, too.

author: rfclown
author_rank: Frequent Contributor
timestamp: January 24, 2021, 03:58:46 am
content: Quote from: sci4me on January 23, 2021, 05:53:12 pmIt's because there is no need. There isn't a need for any hardware between the controller and the SPI peripheral. Create a piece of hardware that takes 8+ lines to interface with periperals that need a 4 line interface? If you don't have dedicated SPI hardware in your processor, then you bit bang. SPI and I2C are great in that they don't need any interface hardware (except pullups for I2c). Moto created SPI in the 80s when I2C speed was only 100kbps. I thought it was great that I could use the printer port of a PC (parallel port) to program SPI ICs on a test bench with no interface circuitry (everything was 5v).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 24, 2021, 04:27:49 am
content: Quote from: rfclown on January 24, 2021, 03:58:46 amWell, OP said they've already done that, so it's safe to assume they need more.What if a lot of communication is required? Certain tasks go fromutterly impossible, to actually feasible (e.g. real time graphics on a small LCD?). It's certainly nice to have!Tim

author: rfclown
author_rank: Frequent Contributor
timestamp: January 24, 2021, 04:40:30 am
content: I was answering the question of why the thing he's looking for doesn't exist. OP said he's genuinely curious why. If the need is for higher speed, then you use a controller with a faster SPI interface. Since those exist, there isn't a need for someone to develop something else that would amount to more hardware than necessary.I just read the other posts more thoroughly. DC1MC found a chip that does what the OP is asking for. I can't believe anyone would make this. Just like the I2C chip in the original post, it seems insane than someone would make it.If the OP wants to do things with older processors, that's fine. It's cool to use retro stuff. But SPI was created at a time when controllers were getting more integrated. I was at Moto in the 80s when the HC11 came out that had SPI hardware on it and internal program and data memory. They put SPI in all the chips we used in our radios. We needed the fast speed (versus I2C) for programming synthesizers and such, especially in trunked radios.

author: sci4me
author_rank: Regular Contributor
timestamp: January 24, 2021, 08:17:09 am
content: Quote from: T3sl4co1l on January 24, 2021, 04:27:49 amMy interest in this is mostly driven out of curiosity and having fun. The best "practical" argument I can make, in the context of homebrew 8-bit computers of course, is that I want to use SD cards as a storage medium. I was honestly impressed with the performance of bit-banged SD access, but for whatever reason I became very interested in potential alternatives that would be hardware-assisted or entirely implemented in hardware, partly for performance and partly because I sometimes enjoy over-engineeringI've found a (small) handful of ways to do this, and am currently toying around building a SPI master on a breadboard.Another use case I have is SPI SRAMs and EEPROMs.

author: exe
author_rank: Unknown
timestamp: January 24, 2021, 09:18:16 am
content: Quote from: tooki on January 23, 2021, 08:30:38 pmHuh? SPI already supports multiple devices. The most common way is to share MISO, MOSI, and SCLK, but have a separate CS (chip select) line for each slave device, but daisy-chained SPI exists, too.I wanted separate lines for DAC and ADC to avoid noise injection into DAC. How much of a problem is this I don't really know, I wanted to be on a safe side. Another thing is, different slaves may have different maximum speed. One slow slave could delay poling other devices. But this is not what a simple hub could fix. Or I want to poll DAC and ADC at constant rates don't think if their timings can overlap.At the end I concluded that I probably overthinking the problem, and sharing one SPI between two devices is the best option for me.

author: Ian.M
author_rank: Super Contributor
timestamp: January 24, 2021, 10:06:13 am
content: If you want quiet SPI lines to one device, or need to isolate SCLK and MOSI from a slow device while the bus is being used at a much higher speed, all you need is a 74HC125 quad tristate buffer and a few pullups. Use three gates for MOSI, MISO and SCLK, with pullups/pulldowns (depending on desired idle state) on the slave side, all with /OE controlled by /SS. Use the fourth with /OE tied low to buffer /SS. Alternately buffer /SS the same as the others, with a pullup. The pullups should go to a quiet Vcc supply, and its also advisable to keep the traces between the '125 and the slave short.If you are using a MCU that only has a limited number of /SS lines (e.g. due to lack of DMA support if you bit-bang /SS on a GPIO pin), as long as you can set up three pins in advance, you can use a 74HC138, with /SS to one of its /EN pins and three GPIOs to its address pins as a 1:8 /SS demux, or a pair of them and an extra GPIO as a 1:16 demux.On the parallel bus <> SPI side of things, its worth noting that in Microchip's PIC24/dsPIC33 MCU families, many higher pin count devices have a PMP (Parallel Master Port), which is an 8 bit bus interface, with read and write strobes and chip select. When configured in addressable slave mode, it also has two address lines, which direct data transfers to four input buffer registers and four output buffer registers. In slave mode the bus interface timings are controlled by the external bus, not the PIC, and all the PIC has to do is deal with stuffing or saving the buffer before the next bus access. As many PIC24/dsPIC33 MCUs can run at up to 100 MIPS, at least an order of magnitude faster than the cycle time of 8 bit era buses there's plenty of time between accesses for housekeeping, so they make good programmable peripheral controllers. e.g. you could reasonably easily implement I2C, SPI, UART, counter/timers, PWM outputs and ADC inputs in one device. The only fly in the ointment is that PIC24/dsPIC33 MCUs with PMP are 3.3V devices so you'll probably need level shifting if using them on a legacy 8 bit bus, unless you can find one with all 5V tolerant PMP data pins and are using a bus that uses TTL logic thresholds. See:http://ww1.microchip.com/downloads/en/DeviceDoc/dsPIC33-PIC24-FRM,-Parallel-Master-Port-(PMP)-DS70005344A.pdf