Creating a USB HID device on FPGA - Page 1
Forum section: electronics / projects

author: matrixofdynamism
author_rank: Regular Contributor
timestamp: October 18, 2020, 11:30:58 pm
content: I am thinking what project to do next for fun and learning purpose.I am interested in learning about USB and thus creating a USB HID device starting with mouse and then a joypad would be a great idea I think. The entire USB peripheral design is expected to be done in VHDL.Now there are a few things that I want to find more about.1. Simulation, in order to simulate the design fully I will need a USB-Host that can enumarate my peripheral and then communicate with it. This USB-Host would most likely have to be a BFM that is compliant with the USB specification and can mimick the behaviour required of a USB host in real life.-> What options exist to get and use a USB-Host BFM? Will I need to use SystemVerilog UVM to do this? I am a VHDL person.2. Harware testing, when it comes to hardware testing I shall need a USB host. The PC with windows can be a USB host, but it is important to have a host that gives insight into what is happening when I connect my USB peripheral. Maybe a Linux based USB host will have drivers that are supposed to used in development and testing of a custom USB peripheral? I am not sure. What is the best option? There are USB bus protocol analyzers that can be used to serve as host but are expensive.3. Hardware debug, when it comes to hardware testing, it will benefit to have a protocol analyzer that can be used to monitor the traffic between my peripheral and the USB host. I think that I really should have a hardware analyzer rather than a software analyzer. But the options for both hardware and software USB bus analyzers are vast and I don't know where to begin.4. I shall check OpenCores to get ideas on how can such a device be designed using VHDL. I think that usually we would go about having an external PHY IC which will handle some level of the USB communcation stack and exposes the D+ and D- pins. I am not sure why we need this since FPGA itself is a digital device as well.I am grateful for any advice.

author: ataradov
author_rank: Super Contributor
timestamp: October 19, 2020, 04:42:56 am
content: I'm not aware of any freely available host models. There are host controllers, but they still would require you to implement the whole application logic.Linux is definitely better for testing. If you are making an HID device, then no drivers necessary, OS will just use native HID drivers. You may actually have better control over the process with a microcontroller with a USB host controller. That way you will be able to see all the steps of the process and compare operation with other off the shelf HID devices.Hardware USB analyses are pretty expensive. Some sort of way to sniff the bus is definitely necessary. But what specifically depends on what exactly you want to implement. For USB HS you need a real PHY and a real sniffer, for sure. For USB FS or LS, you can get away with reasonable fast logic analyzer with corresponding protocol decoder.For USB LS FPGA will be able to just bit bang the protocol, just like V-USB does on AVRs. This is very easy to do, and you can use V-USB as a reference.For USB FS bit banging is still an option, but you would need to be much more careful about your timings.Note that in both cases you may not meet requirements of the USB specification to the electrical signaling, but in practice it will work. You won't be able to certify your device with USB, but I assume you don't need that anyway.There is a complete hardware-only implementation of the USB CDC out there. But typically people use some sort of a soft core to implement the actual protocol logic.

author: jbb
author_rank: Super Contributor
timestamp: October 19, 2020, 06:42:12 am
content: Maybe have a look atLuna?

author: matrixofdynamism
author_rank: Regular Contributor
timestamp: October 19, 2020, 08:18:23 pm
content: What about simulation BFMs?

author: ataradov
author_rank: Super Contributor
timestamp: October 19, 2020, 08:45:39 pm
content: I don't think anything freely available like that exists. And paid options are easily searched, but there is not even a point in asking for a price, it is going to be expensive, and will likely require expensive software to run.USB is not that hard to do blindly. If you use Linux as a host, it will tell you most of the stuff that is going wrong. Using MCU as a host you will get even more details.

author: poorchava
author_rank: Super Contributor
timestamp: October 22, 2020, 08:53:19 am
content: U can check this:It's a 32C3 talk from Bunnie and Xobs about implementing USB device in software on a Cortex-M0.They go into quite a lot of detail into how it works on lower level.

author: LootMaster
author_rank: Regular Contributor
timestamp: October 22, 2020, 09:13:34 am
content: I honestly don't see the point.You wont have much fun, and its more expensive than an stm32f2.I think once you are there you will get bored and give up

author: RoadRunner
author_rank: Frequent Contributor
timestamp: October 22, 2020, 11:05:57 am
content: Quote from: LootMaster on October 22, 2020, 09:13:34 amThough useless in most of the cases, But not completely pointless. Can be used for DFU.https://github.com/tinyfpga/TinyFPGA-Bootloader

author: matrixofdynamism
author_rank: Regular Contributor
timestamp: October 25, 2020, 11:18:08 pm
content: I am not sure who loot master is talking about.Do I understand correct that no one here has used a BFM that can be used to represent a USB Host in simulation to test our peripheral.

author: ataradov
author_rank: Super Contributor
timestamp: October 25, 2020, 11:20:33 pm
content: Quote from: matrixofdynamism on October 25, 2020, 11:18:08 pmHe is a troll with very strange opinions, don't worry about it.Quote from: matrixofdynamism on October 25, 2020, 11:18:08 pmMost likely yes. It is not a widely accessible technology. And even if you hear from the people with access, how is it going to help you? There is definitely nothing free for that.

author: emece67
author_rank: Frequent Contributor
timestamp: October 26, 2020, 08:50:52 am
content: .