Unable to decode SPI payload. - Page 1
Forum section: electronics / general

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 24, 2014, 08:55:08 pm
content: HiI'm stuck now for hours (2 days to be exact and out of desperation and countless hours of goggling) unable to decode SPI commands from my PIC 18F45K20 demo. (its the first time im actually using SPI)At the moment I only need to view my data CLOCK and decode the MOSI (SDO) line, the problem is I "seem" to be getting data yet, both my (NEW) RIGOL 2072A and Saleae 8-ch cannot seem to decode any of the data (it seems like its trash), all I see is the clock line the MOSI (SDO) output im not sure why the protocol decoding BOTH scope and saleae is not able to decode the simple data.. (does it need all the lines present? MOSI. MOSI, CLOCK and enable???According to wiki SPIDuring each SPI clock cycle, a full duplex data transmission occurs:the master sends a bit on the MOSI line; the slave reads it from that same linethe slave sends a bit on the MISO line; the master reads it from that same lineNot all transmissions require all four of these operations to be meaningful, but they do happen.(that's why im using the MOSI for now, im not sure why both the analyser and the scope cannot decode the data)here is the code and screen shot image./** P R O C E S S O R C O N F I G U R E **************************************************/#pragma config FOSC = INTIO67, FCMEN = OFF, IESO = OFF // CONFIG1H#pragma config PWRT = OFF, BOREN = OFF, BORV = 30 // CONFIG2L#pragma config WDTEN = OFF, WDTPS = 32768 // CONFIG2H#pragma config MCLRE = ON, LPT1OSC = OFF, PBADEN = ON, CCP2MX = PORTC // CONFIG3H#pragma config STVREN = ON, LVP = OFF, XINST = OFF // CONFIG4L#pragma config CP0 = OFF, CP1 = OFF, CP2 = OFF, CP3 = OFF // CONFIG5L#pragma config CPB = OFF, CPD = OFF // CONFIG5H#pragma config WRT0 = OFF, WRT1 = OFF, WRT2 = OFF, WRT3 = OFF // CONFIG6L#pragma config WRTB = OFF, WRTC = OFF, WRTD = OFF // CONFIG6H#pragma config EBTR0 = OFF, EBTR1 = OFF, EBTR2 = OFF, EBTR3 = OFF // CONFIG7L#pragma config EBTRB = OFF // CONFIG7H/** I N C L U D E S **************************************************/#include <xc.h>#include "p18f45k20.h"#include "system.h"#include <plib.h>/** D E C L A R A T I O N S *******************************************/void main (void){/*************************************************************************/TRISA = 0b00000000; // all outputsTRISB = 0b11111111; // Only make RB0 AN INPUT otherwise all inputTRISD = 0b00000000; // Data direction PORT-D LED`s are ALL// configured as outputs./*************************************************************************/// SPI CONFIGURETRISCbits.RC0 = 0; // LCD_SE chip enable. (Output)TRISCbits.RC1 = 0; // LCD_DC data/command. (Output)TRISCbits.RC2 = 0; // LCD resetTRISCbits.RC3 = 0; // LCD_CLK Serial SCK - Output (Clock)TRISCbits.RC4 = 1; // SDI - Input (Serial Data In)TRISCbits.RC5 = 0; // SCK - Output (Clock Output)SSPSTAT = 0x40; // Set SMP=0 and CKE=1. Notes: The lower 6 bit is read onlySSPCON1 = 0x20; // Enable SPI Master with Fosc/4/**************************************************************************/OSCCONbits.IRCF0 = 0; // 8-MHZ CPU ClockOSCCONbits.IRCF1 = 1;OSCCONbits.IRCF2 = 1;/*************************************************************************/WPUB = 11111110; // RB1:RB7 internal weak pullups.RCONbits.IPEN = 1; // Turn priority levels on./*************************************************************************/ANSEL = 0b11100000; // RA0:RA disabled analog. (AS0:AS4) for register ANSELANSELH = 0b00000000; // (AS8:AS12) turn analog off for now. visit this later./*************************************************************************/IOCBbits.IOCB4 = 1; // See IOCB register for RB external interrupts.IOCBbits.IOCB5 = 1;IOCBbits.IOCB6 = 1;IOCBbits.IOCB7 = 1;/*************************************************************************/INTCONbits.INT0E = 1; // Enable Interrupt 0 (RB0 as interrupt). ( // INTCON interrupt control register )INTCONbits.TMR0IE = 1; // Enable Timer0 interrupt.INTCONbits.RBIE = 1; // RB port change nterrupt Enable bit.INTCONbits.TMR0IF = 0; // Timer0 overflow interrupt enable bit.INTCONbits.GIEL = 1; // Low priority interrupts allowed.INTCONbits.GIEH = 1; // Interrupting enabled.INTCONbits.INT0IF = 0; // Ensure flag is cleared.INTCONbits.INT0IE = 1; // Enable INT0 interrupt.INTCONbits.INT0F = 0; // Reset interrupt flag./*************************************************************************/INTCON2bits.RBPU = 0; // Enable PORTB internal pullups.INTCON2bits.INTEDG0 = 0; // Interrupt on falling edge of INT0 (switch pressed).INTCON2bits.TMR0IP = 0; // TMR0 overflow interrupt (LOW priority).INTCON2bits.RBIP = 1; // RBIP port change interrupt (HIGH priority).//CloseSPI(); // Turn off SPI modules if was previosly on//OpenSPI(SPI_FOSC_4, MODE_00, SMPMID ); //while(1){SSPBUF = 'P';while(!SSPSTATbits.BF);SSPBUF = 'A';while(!SSPSTATbits.BF);//__delay_ms(10);}}

author: FrankBuss
author_rank: Unknown
timestamp: January 24, 2014, 09:01:56 pm
content: The data looks good, but yes, you need an enable signal. Just use a GPIO on your PIC, set it to low before you start the tansfer and to high after the transfer and your logic analyzer should decode it.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 24, 2014, 09:09:26 pm
content: Quote from: FrankBuss on January 24, 2014, 09:01:56 pm@FrankBuss THANKS let me try that right now and post my results.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 24, 2014, 09:16:39 pm
content: Quote from: diyaudio on January 24, 2014, 09:09:26 pmThanks dude. I owe you one! it works!!!//CloseSPI(); // Turn off SPI modules if was previosly on//OpenSPI(SPI_FOSC_4, MODE_00, SMPMID ); //while(1){EN = 0;SSPBUF = 'P';while(!SSPSTATbits.BF);EN = 1;__delay_ms(10);}

author: FrankBuss
author_rank: Unknown
timestamp: January 24, 2014, 09:43:32 pm
content: My pleasure. There are some rare chips which don't need a chip enable, like some ADCs from Analog Devices, which (optionally to chip enable) uses a long pulse of 0 bits clocked in, and then a 1 start bit, but otherwise SPI wouldn't make sense without some start/stop signal.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 24, 2014, 10:04:17 pm
content: Quote from: FrankBuss on January 24, 2014, 09:43:32 pmI've also managed to think a bit harder why the Rigol 2072A scope didn't decode correctly, turns out the clock channel needed a threshhold set above 0v, I had it set to 2v, and bang it worked as well. (Victory is short lived though my time trial is almost over what a way to leave, feels like a unfinished good movie in my case)

author: Maxlor
author_rank: Frequent Contributor
timestamp: January 24, 2014, 11:20:54 pm
content: Meh, you're not missing too much. The Rigol DS1104Z (and I assume it works the same on the DS2000 series) only decodes signals that are displayed on screen, an only if you're zoomed in enough to see the clock transitions. If you scroll enough for the start condition to be outside the screen, the whole communication sequence is no longer decoded (at least it's the case for I2C.) It's not totally useless, but fairly limiting.But hey, maybe a future firmware upgrade makes the LA functionality operate on the whole buffer instead of just the visible part. That'd be nice.

author: diyaudio
author_rank: Frequent Contributor
timestamp: January 24, 2014, 11:37:23 pm
content: Quote from: Maxlor on January 24, 2014, 11:20:54 pm@MaxlorYeah, that's why I just went for the 2-channel 2GS option wasn't really interested in the decoder stuff I have a Saleae "clone" it works great and didn't even cost anything near the price of the Rigol upgrade option. Perhaps a firmwae update will fix/improve it who knows..