Adapting 2x DAC0800 into a 16-bit DAC - Page 1
Forum section: electronics / projects

author: John B
author_rank: Frequent Contributor
timestamp: October 12, 2022, 02:26:51 am
content: This is more of a brainstorming question. I have quite a few leftover DAC0800 ICs from another project. Eventually I'd like to utilise them in a bench PSU with a digital interface, probably with 74HC595 shift registers providing the serial to parallel conversion. They're 8 bit DACs and I figure 16 bits would be more suitable, roughly <1mV resolution for a 0-30V PSU, in terms of bit depth anyways.Bandwidth isn't a concern as it would be generating a DC reference voltage. So I wondered about some techniques for summing the outputs of 2x DAC0800. The first hope is that I would be able to directly sum the output currents of 2x DACs, but this would require a 1:256 ratio of currents. Unfortunately the datasheet shows that the full scale output currents need to be in the range of 1-4mA only.Previously I used a transimpedance amplifier to convert the output currents to voltages, so two options that immediately come to mind are:1. A 1:256 ratio in the feedback resistors of the two transimpedance amps, then using a 1:1 summing op amp to give the final voltage.2. A 1:1 ratio in the feedback resistors of the two transimpedance amps, then using a 1:256 weighted summing op amp to give the final voltage.Is there any practical difference? Or perhaps a better way to sum the 2 DACs?

author: ejeffrey
author_rank: Super Contributor
timestamp: October 12, 2022, 04:05:58 am
content: You can indeed combine two DACs to increase resolution, but it will have very poor linearity. Whenever the fine DAC rolls over there will be a discontinuity. Essentially the DNL of the hybrid DAC will be the same as the DNL and INL of the coarse DAC and it will be severely non-monotonic.There aren't many applications where this is acceptable on it's own. You can improve it by making the ranges overlap and calibrating it. So instead of using a 1/256 divider on the fine DAC use 1/128. This will result in an effective 15 bit DAC, but now you can calibrate the coarse DAC and create a lookup table of the fine DAC starting/ending point for each code. This can get reasonably good performance depending on how much the calibration drifts.For high speed systems this can make sense. You can use a slow but high resolution ADC to calibrate the fast DAC. For low speed applications it makes more sense to just get a natively high resolution DAC such as a sigma delta DAC.

author: moffy
author_rank: Super Contributor
timestamp: October 12, 2022, 04:07:37 am
content: You won't necessarily end up with a monotonic 16 bit DAC as they are only linear to 8 bits and you are likely to end up with many bumps in the output verses digital input. With a calibration ROM you would be able to get more than 8 bits but I'm not sure how much.

author: srb1954
author_rank: Super Contributor
timestamp: October 12, 2022, 04:08:11 am
content: Quote from: John B on October 12, 2022, 02:26:51 amEven if you do sum the 2 DACs in exactly the right ratio due to the non-linearity error in the MSB DAC the settings of the LSB DAC would be practically meaningless in terms of accuracy. Effectively, the accuracy of your combination DAC wouldn't be much better than a 9-bit DAC. The situation is even worse if your summing ratio is not exactly 1:256.The only way to get accurate readings out of such a combination DAC would be to have a digital correction table to calibrate out the errors due to non-linearity of the MSB DAC and gain errors in the summing ratios. That would require quite a bit of testing to characterise the DAC performance and it would still be susceptible to errors from temperature coefficients and component drift.It would be far easier and simpler to just get a real 16-bit DAC, which are reasonably cheap these days.

author: CaptDon
author_rank: Super Contributor
timestamp: October 12, 2022, 01:08:58 pm
content: I built a 16 bit sine/cosine generator with the very same idea of two 8 bit DAC's stacked. You take the output of the high order DAC and feed it to the reference input to the low order DAC. Essentially what you get is an 8 bit scaling of an 8 bit DAC. It works perfectly and if you have a multitude of available DAC's you can simply feed a 16 bit binary number that keeps increasing and finally rolls over. Connect up a scope and look at the 16 bit sawtooth output and hand select the high order DAC to give the best linearity although all of mine did an excellent job. I looked at the sawtooth wave and found it to be 100% acceptable. Using a sine to binary 16 bit number generator I programmed those numbers into a pair of 2716 eproms to get the 16 bit wide sine number 'lookup table' or in this case 'conversion table'. It works incredibly well and my sine/cosine generator drives a large X/Y C.R.T. P.P.I. (Plan Position Indicator 'think radar'). The display has 64K of pixels and the memory storage has the feature of OR'ing old data with new data that will leave a trail behind any moving object. Best wishes on your project.

author: moffy
author_rank: Super Contributor
timestamp: October 12, 2022, 02:18:39 pm
content: Quote from: CaptDon on October 12, 2022, 01:08:58 pmThat is a very clever idea.I have some MCP4922 dual 12 bit DACs, might give it a try.

author: mawyatt
author_rank: Super Contributor
timestamp: October 12, 2022, 03:43:19 pm
content: Using one DAC (A) to drive the Reference of another DAC (B) is a technique that creates a discrete analog version of the digital product A*B*Vr, where Vr is reference of DAC A. This can also be used with DAC A Vr replaced with an analog signal A and the result is (Analog A)*B.Very effective techniques for combining digital and analog signal processing, in fact we utilized this back in ~82 to multiply a couple analog signals with Chirp Sine and Cosine functions as part of the Chirp Z Transform (another little known form of the Fourier Transform).Best,

author: John B
author_rank: Frequent Contributor
timestamp: October 12, 2022, 07:55:58 pm
content: That's an interesting idea. Like I said the datasheet lists a very narrow range for the reference current, but I'll give it a try and see how it performs. I'm also not really chasing a perfect 16 bit resolution, even 10-12 bits would be an improvement over a single DAC0800. It's mainly down to finding uses for the parts on hand.

author: 2N3055
author_rank: Super Contributor
timestamp: October 12, 2022, 08:12:58 pm
content: Quote from: mawyatt on October 12, 2022, 03:43:19 pmFun fact: on MSOX3000T series of scopes (and I presume the whole family) Keysight uses Chirp Z to do FFT. Interesting algorithm.Nice short article:https://www.osti.gov/biblio/816417

author: MasterT
author_rank: Frequent Contributor
timestamp: October 12, 2022, 10:10:46 pm
content: The circuits name is "current attenuator" according to National Semiconductor. So I see others use "current scaling" or "current dividers/ multipliers" . All based on BJT current mirror .Don't think someone would bother with bunch of transistors, easier to put quad OPA, two I/V and third one as summator.https://wiki.analog.com/university/courses/electronics/text/chapter-11http://www.dicks-website.eu/current_mirror/en-index.html

author: mawyatt
author_rank: Super Contributor
timestamp: October 13, 2022, 01:51:03 am
content: Quote from: 2N3055 on October 12, 2022, 08:12:58 pmDid not know Keysight picked up on the CZT, thanks!! Good article as well!!We utilized the CZT back in 82 as the core of a Real Time Dynamic Reconfigurable Spectrum Analyzer, and developed custom CCD devices for the complex Sine and Cosine convolvers, and 4-quadrant multiplying DACs as the complex multipliers (thus the prior mentioned DAC usage). One of the early usages of DTCA signal processing.Best,

author: moffy
author_rank: Super Contributor
timestamp: October 13, 2022, 05:04:47 am
content: I couldn't quite get my head around how the numbers would work in multiplying two 8 bit dacs and trying to produce a linear ramp. So I wrote a little program and sorted the results and the larger the numbers got the bigger the gaps in the sequence became as well. When multiplying two eight bit numbers from 0 to 255 there are lots of duplicates (0 etc) which means there will be gaps in the sequence elsewhere. You really have to add scaled values rather than multiply for improved linear resolution.