PCB Design tips - Page 1
Forum section: electronics / general

author: RayJones
author_rank: Frequent Contributor
timestamp: July 27, 2010, 11:03:10 am
content: Since there seems to be a lot of threads cropping up lately about PCB designs, it may be worth presenting this link, by some little known authorhttp://www.alternatezone.com/electronics/files/PCBDesignTutorialRevA.pdf

author: Zero999
author_rank: Super Contributor
timestamp: July 27, 2010, 11:38:22 am
content: A good tutorial, some things are out of date though, who uses the old DOS AutoTrax now? I know it was written in 2004 but I doubt many people used it even back then.

author: EEVblog
author_rank: Unknown
timestamp: July 27, 2010, 01:08:52 pm
content: Quote from: Hero999 on July 27, 2010, 11:38:22 amYou'd be surprised!The article was meant to be fairly independent of any design tool though, the concepts are the same regardless of the tool.But yes, it's old and needs an update and a zillion additions, if only I had the time.Probably better suited to my new video blog format.Dave.

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: July 27, 2010, 04:25:29 pm
content: Just skimmed through this and looks a very comprehensive guide with much good advice, however I have to take issue with this :Quoteat least the 'complete' part. These days most designs will have at least one microcontroller, on which many of the pins can be exchanged to improve PCB layout. Ditto FPGAs, and often connectors to other parts of the system, as well as series combinations of parts that can be swapped.Ifthe design is of a complexity level that youcanhold it in your head or a few scraps of paper, then diving straight into the PCB placement and layout is likely to produce the best layout from the point of view of minimum trace lengths, minimum vias, better EMC, better manufacturability, and maybe even fewer layers.The best allocation of pins can only be done whilst placing and routing the PCB, and back-annotating all this to a ready-drawn schematic is a recipie for errors to creep in. Unfortunately I've yet to see a schematic package that deals well with a vague "This bunch of lines goes to some of these pins, in an order to be decided later" sort of specification. There are so many things that can potentially be swapped around that trying to specify it in a schematic would take way longer than just placing & routing it and documenting it in a schematic afterwards.Obviously this approach doesn't scale well to more complex systems, and is only applicable where the same person is designing the circuit, doing the PCB and probably writing the firmware as well, however even then, keeping maximum flexibility in allocating pinouts can make the PCB layout process quicker and finished result better.Most PCBs have mechanical costraints, and simply looking at where parts _can_ go on a layout is far more productive than trying to "draw the schematic with the PCB in mind".On a similar theme, I recently found thisvery comprehensive guide to PCB manufacturing issues (PDF)- although specific to one supplier, the general rules apply to any PCB that is going to be manufactured

author: jahonen
author_rank: Super Contributor
timestamp: July 27, 2010, 05:24:09 pm
content: Quote from: mikeselectricstuff on July 27, 2010, 04:25:29 pmI have actually done something like this at work. I can't even think working without schematics there, as it is the master document for many others, such as BOM, and it is peer-reviewed document as demanded by our QMS (as is the layout, of course). I can only say that it is quite time consuming process on large FPGAs. The one I have worked on was 780 pin one (Altera Cyclone III in fact). In such cases I wouldn't recommend that schematic is skipped (no way you could memorize all those connections, unless you are savant person or so), but instead build layout parts placement and schematic side by side. If you do this carefully, you already have the parts placement mostly done when you finish the schematic. I worked so that I looked up possible FPGA pin candidates from layout, then edited the schematic connecting the signals and then ECO'ed the changes back to layout, thus the schematic was kept updated at all times. At the end, it made the layout look very clean with minimum number of layer swaps for most signals.There are also some software which can optimize the FPGA pinout based on the layout requirements while keeping the constraints of a FPGA in mind, MG's IO designer for example. Haven't tried it out though. If the design involves a FPGA with high-performance memory interfaces, such as DDR(2/3), then it definitely becomes a trinity between FPGA design software, schematic and layout. Then it is not usually possible to choose pins which much freedom, and there are few places where you can place for example the byte lane strobe or mask signals. It would be extremely foolish not to iterate the memory bus with FPGA design software, if FPGA design software fitter says that this pin configuration is not possible, then your game is over.Regards,Janne

author: mikeselectricstuff
author_rank: Super Contributor
timestamp: July 27, 2010, 09:57:28 pm
content: QuoteAs most of my jobs are 1-off builds. the PCB file tends to act as the master, from which BOM and pick/place data (including feeder allocations by part value) is generated. The schematic is mostly for information - the odd mistake/out-of-date value may sneak in to the schematic, but this doesn't affect the manufacturing data. I'd rather have a wrong part on the schematic than on several hundred boards..!