My analog 0-12V 3A benchtop power supply - Page 1
Forum section: electronics / projects

author: Alex30
author_rank: Regular Contributor
timestamp: December 15, 2014, 12:13:17 pm
content: So I have pretty much finished my design for my benchtop power supply. It is loosely based on a few different supplies I have seen on this forum and Dave's eevblog tutorial. I am still fairly new to all this stuff but have tried to learn as much as I possibly can to design this. I have already mostly set up this in LTspice (minus the preregulator and one or two other things) and it seems to work okay. I have not provided the ltspice project as it is very messy and not quite the same as my drawing, but I can supply it if someone wants to see it.I have not included any mains transforming or anything like that as I do not have the experience to mess around with mains and did not feel comfortable doing this, so I plan on powering it with an existing 16V laptop charger I have picked up.My supply uses a tracking pre regulator to provide the linear regulators (I chose 2 x 1.5A ones because they were easier for me to get) with an appropriate voltage to regulate such that the voltage drop should only be about 1.7V. It also uses current sensing \ setting that limits the output voltage to ensure the set current isn't exceeded. In addition to this, there is an optional fuse mode that can be turned on with a switch that will use a monostable that turns off the preregulator (therefore the supply) for about 800ms if the set current is exceeded. This set current is previewed on a voltmeter.Please excuse my drawing, I am actually a civil draftsman but I am not used to eagle or electrical drawings so I have done my best without going crazy.Hopefully you guys will be kind enough to give me some feedback\comments\criticism. I'm sure there's a few mistakes, hopefully not so many I have to reconsider large portions of the design! Cheers guys!EDITDesign has now been upreved, see latest post

author: Alex30
author_rank: Regular Contributor
timestamp: December 15, 2014, 01:24:45 pm
content: Quote from: 3roomlab on December 15, 2014, 12:48:42 pmMight be a good idea as long as it's not too hard to implement. Would the best way be to invert the 10V reference and then allow the voltage set opamp (IC4A) to swing from -1.2V -> 10.8V? Then perhaps put the subsequent 2N3904 transistor to -1.2V instead of ground? Would that work? Having a negative rail should help the opamp outputs go to 0 aswell actually so it will help with the current sensing etcI think you are probably right about the balancer resistor. Probably before the lm1086's...EDITOh and I hope this doesn't take a year haha. I plan on prototyping it over the christmas break if possible.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 15, 2014, 02:31:27 pm
content: First thought: seems awfully complex for such a simple function?It does illustrate you have a good understanding of block level design, and putting together functions to make a complete system.Obvious pitfalls: I haven't spotted many, so that's good. I've spotted a few:- The linear regulators are strapped in parallel- The REG_ON_OFF is overdriven by IC7A. Which it might be able to do (CD4000 outputs are pretty weak), but it's not nice. Probably, you just need a series resistor there to make that OK, so no big deal.- If MODE_SW is just a switch, then MONOSTABLE pin 8 will never turn on (switch closed), limited to 0.7V by T1 base-emitter. Or it will have an undefined (hi-Z) logic level (switch open), which is bad (floating CMOS inputs!). It should have a pull-down resistor for when the switch is open. And, I guess, it should be connected before R28, or even better, IC7A, which is performing the same function but open loop. Perhaps that's where D3 was intended to go, not REG_ON_OFF? (Still with a pull-down -- the LED won't pull all the way to 0V, at least not very quickly.)Less obvious pitfalls:- Common mode range: does LT1013 input include positive supply rail? I don't remember offhand.- Also, does LT1013 input and output range include GND?- Voltage loop should be okay. You're setting the linear reg ADJ pin voltage, which works. More subtle matters remain, however (see below).- Current loop won't work. At least, I shouldn't think so. You've got an oscillator. IC4B needs compensation, otherwise as soon as it goes near current limit, it will overshoot, overcompensate, and bounce around. An R+C from out to -in is recommended there. (But since ISET connects to other things, ISET should be buffered, then use a series resistor from the buffer to -in to set compensation with the R+C.) This is compounded by T1, which is wired for maximum gain (and what's worse, the gain varies with operating point, so it's impossible to compensate properly, and C5, which slows down the gain node.- On the plus side, it won't sit there and oscillate (at high frequency); if IC7A is wired to trip the monostable, then it'll overshoot once then sit around for a while. IC7A should probably be slowed down to allow for inevitable transients -- but not grossly just because "well it only works if I put 10uF here". If you get into that situation... reconsider a lot more of the circuit, because you're making it worse overall if you have to do that."wut"s:- LM234Z current sinks? For... so the output pulls down normally? But why two, and why not just a dumb resistor?- I guess D2 is intended to prevent accidental overvoltage or reversal of the output, but... it's a tiny 1/2W zener. If that's the purpose, a bigass 1.5KE12A (or more) would be better.- Tantalum on a rail that can be shorted out is probably not a great idea (surges make tantalum much more likely to burst into flames). Likely, you'd be better off with a few 0.1's -- enough to keep the regulators stable, while also reducing the possible output surge -- handy if you're going to be, like, testing LEDs or something, which do not appreciate large current spikes.- You've got a kickass reference -- REF102 is +/-2.5mV from nominal. But it's all wasted because IC4A is looped back to the reg ADJ pins, not the output. And the LM1086s are +/-25mV, so the fantastic reference is buried in the noise!Not that very precise voltages are all that useful in an adjustable supply anyway: you lose the voltage accuracy as soon as you put a potentiometer on it. But you do keep the stability and drift.The readouts are where you need both accuracy and precision, since you're basically calibrating the output voltage to the display, every time you turn the knob.So, you could save a few pennies by using a low accuracy but high precision ref (like, +/-1% or something bad like that, but kickass stability/drift).- C1 is placed after the current shunt, so ALL the ripple in your 15V supply goes straight into the current sense... ahh... nasty. Plus whatever switching noise is left from the pre-regulator!- PN3638A is more or less setting PREREG to 0.7V above the output, but, there's no pull-down resistor, and the LM1086 says 1.5V max dropout. The transistor also increases the regulator's loop gain, which may render it unstable. An R+C from base to collector can help with that, but with the internal compensation on this switching regulator, there's only so much you can do. It should really be a proper controller, the kind with the error amp pins taken outside, so you have more control over its compensation.Nice-to-haves:- Better current limit response time, or being able to keep it from oscillating at all. The complete current limit loop is IC4B, T1, REG1/2, C2, C6, C7, PREREG and associated components (including its internal compensation time constant) and C1, back through IC1A.- Input protection (you've got a diode on the output, but you're perfectly happy to place a poor, defenseless CD4047 right across a lumbering, looming 15V, 3A+ supply rail?)- Higher efficiency -- lower shunt voltage drop, perhaps using one of those 5 terminal current sense amplifier chips instead of the op-amp requiring matched resistors?Tim

author: prasimix
author_rank: Unknown
timestamp: December 15, 2014, 04:58:36 pm
content: Quote from: T3sl4co1l on December 15, 2014, 02:31:27 pmI'd like to suggest shunt such as LT6118 which comes with comparator that include latch functionality that can be used for OCP (over-current protection). I tested it recently and it works nicely if you don't require programmable OCP function. If that is a case you can use shunt like LT6101 or LT6102 in combination with fast comparator such as LT1671 or LT1712 (both comes with latch functionality). I was playing previously with some TI solutions such as INA282 and INA193 but as far as I learned from testing they are inferior to mentioned LTC solution.

author: Marco
author_rank: Super Contributor
timestamp: December 15, 2014, 05:57:02 pm
content: Why not just do a opamp+pass transistor regulator for the post regulator?

author: Alex30
author_rank: Regular Contributor
timestamp: December 16, 2014, 11:58:27 am
content: Quote from: T3sl4co1l on December 15, 2014, 02:31:27 pmYeah mate I may have overcomplicated some things I'm sure. Just wanted all those features there so I kind of followed some design logic and adjusted it to my needs, i'm sure there's a few smarter\more efficient ways to go about things that would simplify the design, but all that comes with experience. Thanks for the comment on my design though! I have put in my comments in red.Quote from: T3sl4co1l on December 15, 2014, 02:31:27 pmQuote from: T3sl4co1l on December 15, 2014, 02:31:27 pmQuote from: T3sl4co1l on December 15, 2014, 02:31:27 pmQuote from: T3sl4co1l on December 15, 2014, 02:31:27 pmThanks very much for all those comments Tim. I just find it absolutely awesome people are willing to review my designs on here because I know how time consuming it is to go through peoples work! Really appreciate it!Thanks for all the other comments too I will have a think about them.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 16, 2014, 03:24:28 pm
content: Quote from: Alex30 on December 16, 2014, 11:58:27 amJust because the simulator says it might happen, doesn't mean the model is right, and that it will always happen in practice.LM358 for example is rated for single supply operation (inputs work down to -0.3V, output will pull down to ~mV), but if you try drawing any current with the output, it won't saturate at mV, it will saturate more like 0.5V. The actual saturation curve is kind of three-stepped, as different parts of the output stage start turning on. The "single supply" characteristic is only true if current is very low (sub 1mA), or even negative (you can use a pull-down resistor from the output to -V, without needing to power the op-amp itself from -V as well). The typical example is a pull-down resistor to 0V, so the output stage ideally never has to sink current at all. Which also keeps it in class A (LM358 output stage has relatively bad crossover distortion, i.e., when output current reverses).Subtle things like these are useful to know about op-amps. Old parts usually came with an equivalent schematic, which gives you some ideas... if you can decipher it. Sometimes they don't tell you anything, and you just have to guess, or suck it and see. (Example: early MOS op-amps where output range and bandwidth depend on input common mode voltage! Later CMOS (RRIO) amps are better behaved, but the input offset voltage changes suddenly at certain common mode voltages -- because the entire amp is actually two strapped in parallel, so when one polarity of input stage turns off from the common mode voltage, the other is still there to function. But the transistors have slightly different offsets.)QuoteI mean, since you'll have an R+C feedback, the ISET voltage will be disturbed by it (namely, the input into the "op-amp plus feedback" looks like a virtual ground at high frequencies). The compensation will also depend on how much resistance is on the ISET node. Putting a voltage follower after ISET and before the amp isolates this, and lets you set a fixed series resistance.QuoteA BJT current sink would be fine -- easy enough to set for 20mA (plus temp range), no need for a regulated current ref.Or if you'll be using a negative supply, a resistor wouldn't be terrifically bad. It will draw a bit more current at full output, which you need to be able to sink through that negative rail.QuoteYes, I would suggest putting it at the output. The voltage drop shows up after the regulators, but you aren't really using them to regulate, anyway. You're using them as followers with a stable offset voltage (namely, Vo = Vin + 1.25V or whatever).Which, since you're just doing that, you might as well kill two or three birds with one stone:- Drop the regs, go with regular power BJTs instead (TIP31 or better?)- Which has crappy offset (Vbe, which depends on load and temp), but- low dropout (you can drive base voltage up to 0.7V above collector voltage -- dropout is limited by Vce(sat) alone!)The offset is bad, so you need feedback from the output anyway. But you want that regardless, because you're already wasting the REF accuracy with the REG error -- and, obviously, if you put the current sense at the output, it directly ruins the output resistance. So you need feedback after that, anyway.So you'd change IC4A feedback from the ADJ node to the output, with a little compensation, and... some other things, such as to implement the current limit safely.You still want the series resistor R24 from IC4A output to follower input (was ADJ, now the power transistor bases), to limit base current (and to a looser extent, collector current) and allow the op-amp some freedom from the BJT capacitance.Depending on ratings and all, you may want several BJTs in parallel. Usually with current-sharing emitter resistors. But base resistors may be necessary to prevent oscillation. You may also need additional current, usually a Darlington strapped configuration -- but, you don't need to source that voltage from the preregulator (which would waste your low dropout) -- you can draw that from the primary supply.QuoteProbably because it's in a beta or device dependent manner. In any event, the feedback pin must have a pulldown, because the pin is something like an op-amp input -- high impedance. (If the SPICE model didn't capture this... well...)QuoteIf the adapter is permanently connected, probably not a big deal. But if it's hot plugged and stuff, it's going to see all sorts of nasty transients. I once lost a laptop motherboard to, as far as I know, an intermittent short in the adapter cable. Probably a combination of things: the transient itself causing severe undershoot and large peak reverse currents, and the power management circuitry not responding fast enough to disconnect the battery from the charger (remember, just because it works at DC, doesn't mean it will work at all, or not explode under unusual conditions!).So, it's better simply not to -- if you can arrange, say, a low voltage rail to handle the logic supply, then that isolates the pansy chips from the mean old outside world. You also get a nice and clean rail to run the REF from, so it's even cleaner.It would also be nice to run the op-amps from such a supply, but you may not have the opportunity to (i.e., you need to drive the output follower with a voltage range that covers most of the supply range). That said, you can use an analog level shifter or gain stage to accommodate wider ranges from lower voltage op-amps. So there are many ways to attack it, depending on how fancy you want to get.With the extra regulators, you can then do a couple things: extended supply range (maybe it's good up to 30V instead of 18), put on a very reasonable value TVS (18-24V rating is good for a circuit rated 30-36V abs. max. -- it should survive, say, distant lightning with that protection!*), and maybe even overvoltage or reverse protection (good for automotive use?!).*There's not really a good working example for this, since the adapter takes the brunt of lightning on AC mains, and probably just blows up under that kind of stress (without making much trouble at the output itself). The working example would be, you have the 18VDC (or whatever) connected through a few hundred feet of wiring, say if you routed it through a house for... who knows why. So nearby lightning causes EMP causes induction in the cable = transients into the thing. Telecoms are a better example (36-72VDC routed through large exchanges and such?), but obviously not the use-case here.But yeah, just a TVS at the input should be fine to keep things safe under most conditions, as long as everything connected to the rail is safe to run at those voltages (30-36 say). You may then need a level translator to use the CMOS with the rest of the circuit... though I guess you only have it running LEDs and little switches, so that won't actually be a problem at all here, and is actually very handy.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: December 17, 2014, 11:48:52 am
content: Quote from: 3roomlab on December 16, 2014, 12:14:54 pmYeah I will probably just end up using two 12V regulators, one inverting to get clean +12 -12 for my opamps as per below.Thanks yeah, linear regulators get pretty useless when you are trying to drop several volts at anything more than an amp. You end up wasting power and having huge heat sinks.Quote from: T3sl4co1l on December 16, 2014, 03:24:28 pmYeah lol I know that LTSpice doesn't offer very good simulation of opamps. But thanks for the explanation there it was interesting.Quote from: T3sl4co1l on December 16, 2014, 03:24:28 pmYes that is very true. I was wondering, can I use the negative input of IC7B (just before the 10K resistor) as a voltage follower or do I need a dedicated opamp for this? Also with the RC filtering, what would the purpose be of filtering ISET if I have already buffered it with a voltage follower? Are you sure you do not mean to filter CURRENTSENSE? If that is the case what sort of cut off frequency would be typical of such an application?Quote from: T3sl4co1l on December 16, 2014, 03:24:28 pmYeah I might just do that, good idea. I was just thinking too hard I thinkQuote from: T3sl4co1l on December 16, 2014, 03:24:28 pmHmm you do offer an interesting perspective there but I sort of disagree. Just to clarify on my original comment though, I was asking whether I should put the shunt between the prereg and the linear regs, not after the linear regs. This is why I would have to increase the voltage following as I would expect some dropout at full load over the shunt.Just a little confused by your comment though as I am not using the regs as voltage followers, I am using them as regulators and just driving the voltage adjust separately (by using a good voltage reference). If you mean dropping the prereg completely, i'm not entirely convinced. IMO using a switching regulator is just more efficient than using a bunch of transistors with cost and simplicity.Quote from: T3sl4co1l on December 16, 2014, 03:24:28 pm?? I meant I physically breadboarded the prereg circuit to make sure it was working right. But yeah I actually did miss a pull down resistor in my schematic, I had one on my breadboard thoughQuote from: T3sl4co1l on December 16, 2014, 03:24:28 pmGood suggestions. That does give me a few ideas. Perhaps I could use a couple of 12V regs for +/- 12V for my opamps and monostable and get an extra couple of opamps and then use those with my pots instead of voltage dividers, that way I have buffered my ISET and VSET signals. I won't need the full +/-15V swing anymore anyway as I will be replacing the current sense shunt and opamp with an IC.Yeah sticking a TVS at the input sounds like about as much effort as I would have expected I'd need. Nice to have as you said.Looks like it's back to the drawing board as they say. I will need to overhaul a few things, but it will be worth it. New prototype deadline: end of febI should get the new drawing done before christmas though so I will check back in with that before I start. Cheers mate

author: Alex30
author_rank: Regular Contributor
timestamp: December 22, 2014, 11:39:13 am
content: So I got a little bit addicted to getting this design sorted and have a new revision. I have addressed a number of comments from Tim (T3sl4co1l) and improved others. Changes are as follows-Added a negative rail to allow supply to go down to near 0V. (Decided to just aadd another lm2596 to get the negative rail)-Added RC oscillation suppression on comparators (thanks Tim my simulator really showed me the benefits of this)-Changed the way current limiting is applied so that the opamp input is pulled down to -0.6V, this improved noise reduction.-Changed the current sensing to use a shunt comparator (unfortunately I could only find an SMD package, I wanted to hand solder and etch everything so I will just have to put up with this)-Added a TVS protection diode and 15V rail for low current parts, this should offer some protection against overvoltage.-Removed monostable, realized that the On\Off pin on the lm2596 could just be run by a simple RC circuit. But had to remove the LED signal from this as I couldn't think of a simple way of making the LED turn on during this time without over complicating things. Hopefully the On\Off time of ~10-20ms on, to 150-400ms off is enough to flash the LED visibly as this loop occurs.-Decided to just get a single linear voltage ref instead of using ones in my bin as they aren't that expensive and worth the money for the amount of time I've sunk into this project.-Added a number of probing points to attach a multimeter and oscilloscope.-Added plug for a freq gen, this will allow me to use my analog oscilloscope to probe the turn on transient time and the current limiting transient time. The freq gen will change the current limit to 3A to 0A over and over.-A few other improvementsFew that took me a while, had to create a couple of parts in eagle as well for this. Also got confused over negative voltages for T1 NPN but got that all sussed now which is why I needed D4 and D5.Looking forward to comments and suggestions as always!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 22, 2014, 05:26:09 pm
content: It's so slow! I'm cryin' here!It would be so much faster if you...- Dump C14, C15, C9 entirely, possibly C10 as well (or reduced value)- Reduce the R+Cs until the step response is critically damped, or as reasonable as you can get. (Test with a step superimposed on VSET, then ISET, then a stepped load resistor too, enough such that it operates in pure voltage mode, pure current mode, or transitions between the two -- the latter being the worst offender. Don't forget to test over a range of operating points, because things often speed up or slow down at different voltages and currents.)- LM350A is still +/-25mV, so your regulation is relatively poor (I don't see feedback from the output -- which, if you do that, you get < mV error for one, and can use cheap BJTs instead of LM350 for another)- The -0.7V node (not really a supply) is squishy. To the tune of 6-7kohms squishy. If T1 turns on hard, it's going to be a lot higher than -0.7V. Which matters, because 10KPOT2 references it. The LM4040Z is also lower precision than REF01HP, however this is actually fine because 0.7V is a small enough part of 10V that it won't upset things too much. It is being used as an offset, which means it's more sensitive to variations in the -0.7V node when set to low output voltages. To have -0.7V be a supply, it needs to be buffered with a voltage follower.- The current sense will be incredibly slow: everything in this circuit is geared towards miliseconds, but current sense also has to slew from -6V in cutoff, all the way up to... wherever it kicks in, somewhere around 0.5-1.0V at IC2B output. The sudden transition is also hard to compensate (gain changes nearly instantly, from "ain't doin shit" to "oh holy crap that just collapsed the output, sorry about that").Actually, on closer inspection, ISET is buffered (yay!), but there's no series resistor between ISET and IC2B, so the compensation R+C will do just about nothing!- Also, it still looks weird that you're taking an apparently logic level output from IC2B, when it's wired for linear operation, when IC1A is wired as a comparator, and it's just blinking an LED.- T3 doesn't seem to be biased at a useful voltage or current..? Usually the emitter resistor is quite small, and the base is biased for a couple volts.- The zener reglated 15V supply is, uh, interesting, but wasteful if the input is ever more than 16V. Maybe better with an LDO?- Also, there's no such thing as a 15KE13.6. The next closest in the 1.5KE series are 12 or 15V (suffix A = unidirectional, CA = bidirectional). Speaking of, D7 looks fine, but it probably shouldn't be bidirectional. Maybe bigger, just so it's the same size as D10? I like the symmetry, but maybe you don't need much in either position if you don't know what to protect against.So... not at all optimized, or even considered really, for speed. Given the ~25mV error of the LM350A, it is DC correct, and if it's AC-stable, then it's usable. (Ding ding ding, we have a winner?)The reason I harp on speed is because: by reducing gain EVERYWHERE, you're completely throwing away every opportunity, that the circuit just gives you, to improve performance. As a result, the AC output impedance suffers. It can be that much stiffer at frequencies up to the roll-off frequency, but now you're depending on capacitors to get that impedance down (namely, C10, which doesn't have a current limit circuit, either).In my opinion at least, the ideal regulator is one which requires no output filter capacitors at all: it's fast enough, and stable enough, that no matter what load you attach, it remains rock solid and steady. It's also easier to current limit such a circuit, because you don't have a big old capacitor sitting across the output rail.Engineering being the art of optimization, the goal should always be to pick component values that are in some way optimal. The part about speed that bothers me is, all the capacitor values chosen here were chosen arbitrarily. If they were chosen optimally, they would give time constants comparable to the devices they serve: the LM350A (which should be 1~10us kind of range I think?), the LM2596 (~1ms?), and so on. The exact values are controlled by how the loops interact, so that even though, say, IC2B is needs to be stable by itself (which may be quite fast), it needs to cooperate with everything around it (IC2A plus the LM350A). The combination of elements is what sets the transfer function poles: the loop speed and damping factor.The ways in which things are optimal varies, just as, in a painting, the optimal positions for brush strokes varies with the underlying sketch and the image that has been built up so far. You can very easily engineer your way into a corner, where you have no choice but to sacrifice performance for stability, or something like that. Even on that level, you can still do well: a circuit can be optimal in component values and such, while not necessarily being very good overall. "It's something!" Of course, as with the master painter, the master engineer is able to recognize the limitations of certain approaches, and is able to select a much more suitable sketch to build upon, then bring it to completion with a beautifully optimized design.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: December 23, 2014, 10:27:06 am
content: Thanks Tim. Excellent suggestions as always. This project has been such a great learning experience for me so far but I have struggled with optimisation a lot. I have mainly been using LTspice and just playing with values until it looks right to be honest. I suppose that can be a good way to tweak things but not make significant change so I do appreciate your input regarding design changes.I am pretty happy to make all the changes in your first paragraph. I plan on redoing my LTSpice sim at this revision (C) to give you some pretty graphs. Only problem is I don't have LTSpice models for most parts on here so it will be an approximation at best.Not sure what you mean with IC2B as it is still wired as a comparator, just has a bit of buffering there. Do you mean making the mode_sw attach to IC1A? Why would I do this? Not sure on the benefits here? T3 was designed to consume 5mA which was the spec for LM350, but I agree with you that the voltage should be lower to allow it to function over a wider voltage range. LDO sounds good. Regarding D10, yes that was an error on my part I meant to specify 1.5KE15 thanks and yeah good point about D7.Good insight again in your last section. I guess I am still unable to fully identify optimisation opportunities, but I am definitely learning. I was also unsure about how far I could get this optimised? Like what would be a good transient time for start up or current limiting in your opinion given my design approach?Thanks.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 23, 2014, 11:13:58 am
content: Limiting time constants will be the switcher, and either the linear regulator, or whatever's driving it (the latter if BJTs are used instead). More generally, the pass device (whether reg or BJT).For small step changes in VSET, the error amp and pass device are able to work within some headroom, so the response time of the switcher doesn't matter.For slightly larger steps in VSET (over a volt, rising), the output saturates and we must wait for the switcher to catch up. An acceptable sacrifice, in exchange for efficiency.Falling steps are not limited by the switcher (the pass device is just making more and more headroom for itself before the switcher catches up), but the slew rate will be limited by output capacitance and load resistance or current. For a very agile output, you might attempt to minimize or eliminate the output capacitance, and/or provide more sinking capability (something beefier than a 2N3904 pulldown -- you can even build a full complementary push-pull output stage, just like an audio amplifier -- which is simply a bidirectional voltage regulator with specified bandwidth).BJTs can be pushed quite fast, but you need a lot of push to make them move near a fraction of f_T. Realistically, over 100kHz bandwidth is pretty easy to achieve, and a few MHz isn't unreasonable. It does get harder to stabilize an amp that fast, especially in the presence of complex, low impedance loads (inevitably, you're going to be connecting series wiring inductance plus parallel bypass capacitance to the output of this thing -- you don't want it to start singing on a load like that!). So again, a reasonable sacrifice would be a more modest circuit, that's fast enough, without pushing it to "bleeding fast", or having to worry too much about oscillation and stuff.Which is also reasonable for the op-amps. I forget LT1013 specs, but even something like an LM358 would be sufficient (though you'd want a part with lower Vos and higher gain, so as not to spoil the REF's excellent drift characteristics). That has a GBW (~= same thing as f_T) of a few MHz, more than enough to push around BJTs in the 100s of kHz range. If you use plain ol' power transistors (generally low hFE), you'll need a driver stage between them and the op-amp output (usually another follower with a smaller transistor). You can also use pre-made Darlington types, but the saturation (aka dropout) voltage is a little higher.General rule of thumb: you can stack, and stabilize, multiple control loops around each other, if they're a reasonable factor different in frequency response. If the cutoff frequencies overlap too much, the phase shifts conspire to give you an oscillator. So, you want 3MHz+ amps set for a 1MHz roll off, used as part of a control loop with 300kHz bandwidth, and so on. Your bandwidth limits external to the amp include the current sense circuit, BJT capacitance, current error amp response / slew time, and so on.Corollary: if you need low distortion or low error from the error amplifier, within a certain time frame, it needs more gain at the frequencies corresponding to that time. Since gain drops as -20dB/dec on dominant-pole compensated voltage op-amps (i.e., the garden variety op-amp), it's very easy to predict how much loop gain you have at some frequency (or time frame), and therefore how much error will be left at that frequency.So, a 3MHz amp might work in a 300kHz BW loop, but the distortion will only be corrected to 10% of its open-loop value; if you need below 1%, you need GBW > 300MHz(!) (which probably isn't even practical, because you're still limited by the speed of everything around it), or you have to wait 100 times longer (= test at 3kHz) for the error to stabilize. Error simply means any non-ideality in what the error amp is amplifying, so in this case, loop gain limits output impedance. That's why it's important to have a fast circuit: you get more precision sooner. But it's also important to start with an inherently low impedance circuit, so the error amp has less to deal with. This is why emitter followers are preferred over LDO type (PNP collector, etc.) configurations in power supplies such as these.Because your current loop is outside the voltage loop, it will have to be compensated for both itself, and the inner (voltage) loop, and the response time of the INA current amplifier device. So, all the more reason to keep everything fast if you can -- the current limit will be the slowest to kick in.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: December 23, 2014, 12:24:14 pm
content: You kind of just blew my mind there haha. But I think I understand what you mean. Definitely given me things to think about but I will struggle to enact them. I do appreciate the comment though I will go through what you said and try and build and learn from it.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: December 24, 2014, 12:52:07 am
content: Now you're getting into two custom things: capacity and feedback. I would suggest using a more general part, like a controller chip, plus high side driver and external NMOS switch. Instead of sending VSET to it, use either VSET + 1V or so (introducing the offset somehow), or VOUTPUT + 1V (same idea).Which one you use doesn't really matter in steady state, or dynamically, because the switcher will be much slower, so we're always going to be waiting for it to play catch-up. VOUTPUT would be better depending on how the current limit is introduced -- if you do it by pulling down on the VSET, then that signal is pretty much the same as the output anyway.You can't simply wire VOUTPUT to FB, because VOUTPUT is very specifically isolated from what the controller is doing -- that's the point of the postreg. The reg chip needs to know what its output is doing. Or to put it another way, FB is a high gain input, it goes from full off to full on over a span of just a few millivolts.You can't connect regulators in parallel, but some controllers offer scalable operation. Two main methods: One, using a controller with enough output phases to handle the current (usually with outboard switches). Two, use current mode controllers, with feedback to each of their current outputs, and run all of them from a single error amp. The converters are transconductance stages (voltage in, current out).Tim

author: Alex30
author_rank: Regular Contributor
timestamp: December 24, 2014, 03:43:35 am
content: Quote from: 3roomlab on December 24, 2014, 12:19:18 amYeah as Tim said, the point of using a transistor is to isolate the prereg from the rest of the regulated circuit. I would advise against using that configuration for this purpose. Plus why would you? Using a PNP and 3 resistors is cheap.Using regs in parallel is usually not a good idea but I have seen it done before in other designs and even in a datasheet... herehttp://www.ti.com/lit/ds/symlink/lm317.pdf. Although the LM317 isn't a switching regulator like the LM2596. I wouldn't say you couldn't do it, but ideally you would use a different switching reg that can handle the current. Do a few experiments and see how it goes. In my breadboard when I was playing around with ideas I was using 2 linear regs in parallel and it seemed to be fine, but again they weren't switching regs.EDITOh and I was going to say. I'm taking a few days off working on the design over christmas so I won't have the next revision done for at least a week to a week and a half.

author: Alex30
author_rank: Regular Contributor
timestamp: December 29, 2014, 01:02:48 pm
content: Well I managed to beat my own deadline again and ready to show you rev CAs promised, I have also fixed up the LTSpice model and got it fairly organised. As always there are a few missing components in ltspice so I have substituted as best as I can and flat out excluded the preregulator section (which shouldn't matter too much as the only time that will slow things down is when the voltage is increased so i'm not concerned about that). I have attached this model so it can shed some light on my design if you want to check things out.There are quite a lot of changes but some of them are:1. Optimised the capacitor layout and values to achieve between 1-1.5ms reaction time to current limiting2. Substituted the linear regulator with a BJT, removing the need for IC2A to swing to negative voltages, still required a negative voltage rail to allow my expensive 20 turn bourns 10k pots to set vset and iset to 0.3. Removed several trim pots to remove noise here and there4. Added 15V low drop out regulator for 15V supply. I have included a pmos to delay the turn on of this due to lots of overshooting during initial startup.5. Removed the need for an ammeter and instead included an extra opamp to allow the current to be displayed using existing currentsense with a voltmeter. This will reduce any impedance due to using a cheap ammeter.The reason why I have not reduced capacitor values any further is I did some experimentation with capacitive loads which resulted in the current sense ringing like crazy. I have since fixed this by changing to the capacitor values shown, however this is my main driving force behind not wanting to reduce capacitor values any further.I have attached several screen captures of the voltage transients at the output. In all the pictures the line marked 'short_circuit' is basically a transistor turning on with a small value resistor on the collector, therefore changing the current draw and forcing the current limiting to kick in. The reason why I have changed to using this method instead of pulsing the iset is because iset is buffered and I found more realistic results could be achieved by using this new method.The first picture shows the current limiting kicking in when the resistor associated with the 'short circuit' transistor is at 0.1 ohms. The first knee at the top of the curve is due to the sudden current draw which causes a slight voltage drop, there is a small amount of recovery on this knee before IC2B kicks in and collapses the output. All in all the load experiences high current for a total of about 0.5ms.The second picture shows current limiting kicking in when the resistor on the 'short circuit' transistor is about 4 ohms. Again there is a knee at the top of the curve due to the current draw. The is a bit of undershoot from about 16.1-16.4ms which maxes at about 300mv on this occasion. The entire response takes about 1.5ms. The only way I could reduce the undershoot is by increasing C3 or C9, which increased the overall overcurrent response to about 2-2.5ms. I figured that an undervoltage lasting about half a millisecond was reasonable, not sure if others will disagree though.As previously mentioned I had some trouble with the initial power on. The main problem was that if the power supply was started on current limiting mode there was quite a long time (20ms) until the current limiting kicked in. This was due to the delay due to capacitors charging and etc i think. So I added the pmos (Q2) to delay the startup of the 15V supply until about 30ms in to the initial power on. Additionally I have soft started the 10V reference, as there was significant overshoot from this. Picture 3 shows the supply being turned on in current limiting mode which takes significantly longer than normal for the voltage to ramp up (8ms). There is some bouncing around until it settles out but at least it doesn't ramp up to several volts higher than it should. Picture 4 shows the supply being turned on without any current limiting being required, however there is a slow down due to the soft start of the 10V reference. This again, takes about 6-7ms to turn on.After this initial power on the voltage is able to rise quite quickly after the short circuit is removed as shown in picture 5. After doing some testing at various voltages there is sometimes overshoot of about 100mv for 0.2ms which again I think is reasonable.Looking forward to comments and suggestions as so far I have really appreciated the help.

author: Kevin.D
author_rank: Frequent Contributor
timestamp: December 30, 2014, 10:11:15 pm
content: Hi Alex .I don't see any feedback for your V cntrl loop, so it will change with load current. Feedback was internally provided when you used 3 legged reg's , but with discreet pass elements you need feedback .The other circuit problems aside though, probably the best tip I can give you would be to stop breaking your schematics into little jigsaw pieces . These types are terrible to read and you'd probably get much more reply's if readers didn't have to do a jigsaw puzzle/match the labels puzzle first in order to read your schematics.Best Regards

author: Alex30
author_rank: Regular Contributor
timestamp: December 31, 2014, 04:57:20 am
content: Quote from: Kevin.D on December 30, 2014, 10:11:15 pmThanks for the reply Kevin. Yes now that you mention it it was something that I have been meaning to add, thanks for reminding me!I will certainly change the layout of the schematic. I guess it's a habit I have picked up due to my drafting job where I do a lot of pipeline detailing, although breaking up a pipeline schematic is not something you would normally do either. I have seen some electrical schematics that are broken up into certain buses, but usually I have just seen the VCC, VSS etc broken into flag type connections. If I just make say, the voltage supply (15V, 16V) and ground broken up into flag type connections would that be a logical approach to drafting this?Cheers.

author: Alex30
author_rank: Regular Contributor
timestamp: December 31, 2014, 10:53:29 am
content: How's this one look?

author: prasimix
author_rank: Unknown
timestamp: December 31, 2014, 11:07:46 am
content: Much much better. I don't know what EDA you are using but if it supports multiple layer in schematics then I'd like to suggest that all what is not really required for discussion (such as bunch of "probe point"!) to move into separate layer that will not be visible in version which you'll post here.

author: Alex30
author_rank: Regular Contributor
timestamp: December 31, 2014, 11:46:40 am
content: Quote from: prasimix on December 31, 2014, 11:07:46 amThanks! Starting to get used to electrical drafting!I am using eagle and I should be able to do that. Will have a go for the next revision.

author: prasimix
author_rank: Unknown
timestamp: December 31, 2014, 01:00:31 pm
content: Quote from: Alex30 on December 31, 2014, 11:46:40 amYes, go to Display/Hide layers and add a new one (eagle_display2.png). Use that layer with component/text which you'd like to keep private (eagle_properties.png).

author: Alex30
author_rank: Regular Contributor
timestamp: January 06, 2015, 12:27:17 pm
content: Okay so I have just made a few fixes to my design. One of the things was that the old differential amplifier for current sensing fell out of spec at low currents. I have now changed to a different device for this (AD8418A). Quite a nice differential amplifier, just a little expensive but it was the only one that RS would sell one unit of that met my needs.I have also made a few fixes here and there and changed the trimming behavior for the displays so that it is possible to get them to display 0A for the ammeter and ISET even though the supply is consuming some power in the current sink.I also picked up 2 of these:http://www.ebay.com.au/itm/390727749972?var=660192233360&ssPageName=STRK:MEWNX:IT&_trksid=p3984.m1497.l2648I will display my output voltage and current on this. I know my current measurement will probably only be accurate to 0.001A but I thought I may as well use a 5 digit display just because 2 of these things next to each other would look pretty cool. For the ISET display I am just using a 3 digit display as I don't think there's any point in even trying to see if I can set the current limit to less than 5mA accuracy simply I don't think it will work based on the tolerances of the components and I really don't see the point anyway.I will start to design the board now I think. I prefer to etch my own boards using toner transfer so my submission probably won't be sufficient to send to a manufacturing place, but it will certainly be enough for my needs. Perhaps I will supply the eagle project after I am finished and have everything tweaked so that others can use my design if they want.Oh and I suspect I will be lowering C9 at some stage for better current limiting response, but I will be playing with this value on the prototype and see how low it can go.PSCouldn't get eagle to hide the probing points I put in. Seems like at least with the version I have, I can't place components on any other layer than symbols. Same goes for the nets.

author: electr_peter
author_rank: Unknown
timestamp: January 06, 2015, 12:58:57 pm
content: Quote from: Alex30 on January 06, 2015, 12:27:17 pmHow will you provide power for panel meters? These meters require isolated supply to provide accurate reading.I also plan to use such type of panel meters with 2 isolated supplies for my PS. I chose those because of a bit higher claimed accuracy (resolution is a bit bogus I suspect) -> less time messing around with adjustment pots.

author: Alex30
author_rank: Regular Contributor
timestamp: January 06, 2015, 01:09:35 pm
content: Quote from: electr_peter on January 06, 2015, 12:58:57 pmThat was one thing I was going to work out in the prototype actually. I was thinking that as there is some degree of isolation with the multiple rails I have (+16, +15, +5, -6) I may just be able to power it off those. I will then compare it to powering it with a completely isolated supply and see what kind of accuracy I can get.

author: Alex30
author_rank: Regular Contributor
timestamp: January 07, 2015, 03:11:32 am
content: Quote from: 3roomlab on January 07, 2015, 01:38:27 amYes R42 is quite a voltage drop and it is partially for secondary protection but I also found it gave the best stability for capacitive loads. In simulation when I had about 50uF strapped across the load with no series resistance it caused oscillation due to current limiting kicking in and out as the load capacitor is charged and discharged, however with a bit of series resistance it slowed the loop down enough to prevent this oscillation. As getting heaps of volts out was never something I really had in mind for this project I was willing to sacrifice some headroom for this.Damn, thanks for drawing my attention to IC2B I somehow made a mistake with showing that and I didn't notice. I have attached a newer revision (again) and I have fixed that. It is supposed to be negative feedback for output stability.Thanks for the tip regarding that. I guess I won't know until the voltmeters arrive though so I will just have to leave it for now...Oh and as you were asking about the prereg before and how that works I have since figured that out and improved the resistor values and added in C7 which improves stability. In the datasheet for the LM2596 it recommends using not much more than 1K for the pull down resistor (R16) but if you look at the block diagram for the LM2596 (attached) R1 and R2 shown in that diagram simply act like a voltage divider. So the formula shown for the normal adjustable version still applies V=Vref*(1+(R2/R1) but there is now a voltage drop across the PNP transistor of about 0.5V-0.6V, so now the formula is V=Vref*(1+(R2/R1))+0.6. So I have 1.23*(1+(100/1000))+0.6 = 1.9V approx.

author: Alex30
author_rank: Regular Contributor
timestamp: January 07, 2015, 06:38:40 am
content: Sorry I had some things totally confused there and have changed the whole negative feedback part and changed the previous rev F on my previous post. To describe this bit (just to prove I have it solved) Vset swings from 0-8V to control the output voltage. By using IC2B I am forcing IC2A to raise it's output voltage such that the output of IC2B makes the inverting input of IC2A 8V. I just have to set the voltage divider after the output of IC2B so that with 12.1V in, I get 8V out. This is given byVout=(R1/(R1+R2)*VinRearranging I getR1 = (-Vout*R2)/(Vout-Vin)So I chose R2 to be 2K so that gives meR1 = (-8*2)/(8-12.1)=3.9With this in place, any voltage instability due to voltage drops in POWER_TRANSISTOR and the 0.2 ohm resistor will be compensated for.Yes the CURRENT_V_DISPLAY basically takes the 0-4.8V signal, doubles it using IC3B, then multiplies it by 10/32 to give 0-3V.I really don't know much about input protection hey, but it looks pretty solid... Perhaps too solid?? I suppose this is the sort of thing where it's hard to know when to stop. For me it was easy because I am already using a fairly reliable power adapter meant for laptops. So even though I have included a TVS diode and a fuse, I bet they are probably somewhat redundant. But it's nice to have at least something.

author: prasimix
author_rank: Unknown
timestamp: January 07, 2015, 07:43:52 am
content: One practical question: are you thinking to split power ("dirty") ground (call it PGND) and signal ground (AGND)? This do not make any difference in simulation but in real circuit can improve ripple and noise since you will have a SMPS pre-regulator on the board.

author: Alex30
author_rank: Regular Contributor
timestamp: January 07, 2015, 12:36:40 pm
content: I'm really not sure as I plan on having the prereg quite close to the input ground anyway just for practical board layout. In addition to this, as I am etching the board myself I plan on having 16 mil minimum traces, which are quite low impedance and tend to be a bit more forgiving from what I gather. It's worth looking into though.

author: Alex30
author_rank: Regular Contributor
timestamp: January 10, 2015, 05:37:47 am
content: Just been doing a bit of a final review of the design for those interested as this is getting quite a lot of views but not many comments, so hopefully someone gets something out of my design procedure and logic. Plus It's nice to write this down so I don't have to remember it.Just checking headroom for output voltage. So to get 12.0V out at 3A the emitter of the power transistor needs to be 12.54V due to the voltage drop across the resistor (180 milli ohm). Looking at the datasheet for the power transistor (2SD1683) I found that the base to emitter voltage drop is about 0.95V at 3A (Picture 1). That means that for 12.0V out I need 13.49V to the base. As the opamp (LT1013) Vout spec is typically 14V when Vs=15V, but has a minimum of 12.5V, this means that I may be out of spec if I get a bad chip. This would be unacceptable if it was for manufacturing but I am willing to take this risk as I will be manually picking the chip and checking to make sure it can reach 13.5V out.The power transistor's gain was carefully chosen to make sure that with the LT1013's relatively low output current of 20mA, I would be able to get 3A out of the transistor. This means I need a gain of at least 150. As shown in picture 2, the gain specification is satisfied up to 3A, which is what I need.As I need 12.54V at the emitter and I want to supply 2V higher at the collector to keep within given conditions in the datasheet (and for good ripple rejection), my prereg will need to supply 14.54V+0.24V = 14.78V due to the voltage drop on the shunt resistor. As the minimum voltage drop possible for the LM2596 preregulator is 1.234V, this means I need a supply of 16.014V to the prereg. As I have a inverse polarity protection diode at the input (incase the DC plug is wired wrong) I have a voltage drop of 0.48V (Picture 3). This means that my supply has to be 16.494V minimum. Now I know ideally you would add a certain percentage to that and just say 17V-20V or whatever, I will see how I go with the 16.5V adapter I already have and if it isn't working I will try a higher voltage.As I may want to get a higher voltage out of this design at a certain point, I looked at the feasibility of upgrading it in the future. As the LT1013 has a recommended supply voltage range of 30V (+/-15V), that means that it could possibly drive output of the supply to 26V. However, as the peak inverse voltage for the SB530 diode is 30V, I would have to replace all of them with a higher voltage. If I replaced the 15V regulator with a 30V one, replace the feedback resistors for IC2 and the resistors for the LED's and the TVS diodes for input and output protection, replace the PNP feedback transistor with a higher voltage equivalent, I could turn this supply into 26V out @ 3A without changing the PCB layout at all. Only thing is that I would have to supply 31V and It's pretty hard to find a wall adapter that would do 31V-35V @ 3.2A. Perhaps in the future I will salvage an old computer power supply and set it up in a box with a buck booster. Those things can put out some serious power, even with a 200W computer power supply, if my buck boost was at 90% efficiency I could get 5.8A at 31V.Anyway I have been working on the board layout a bit but it's not ready to show. Hope that was interesting and helps others. I certainly learned quite a bit out of working on this.

author: void_error
author_rank: Frequent Contributor
timestamp: January 10, 2015, 09:25:57 am
content: Just in case I missed it - what's your intended current limit range?

author: Alex30
author_rank: Regular Contributor
timestamp: January 10, 2015, 12:11:04 pm
content: Quote from: void_error on January 10, 2015, 09:25:57 am0-3A. Using the differential amplifier I should get good resolution down to below 20mA and I will be able to set the current limit to within 10mA using my chosen display. Additionally my pots are set up in a logarithmic manner, meaning I get excellent tuning in the low levels but coarser control in the higher settings. Having said that, with the high quality 10 turn pots I have, I think the final turn would give me between 2.1A-3A from memory. So still quite good and I doubt there will be much floating around due to the potentiometer knob.

author: void_error
author_rank: Frequent Contributor
timestamp: January 10, 2015, 02:10:18 pm
content: 30mA gives a 2.4mV across the shunt resistor. According to the datasheet, that's just before the point where the output error becomes significant. I wouldn't go below that. It's still a 1:100 range.Quote from: Alex30 on January 10, 2015, 05:37:47 amI managed to get around the opamp supply voltage drawback and used 5V ones (low offset, rail-to-rail I/O, reasonably high bandwidth) with some additional discrete circuitry, the only limiting factor now being the LTC3824's (replacing the LM2596) input voltage range - up to 60V.

author: Alex30
author_rank: Regular Contributor
timestamp: January 10, 2015, 02:35:06 pm
content: Quote from: void_error on January 10, 2015, 02:10:18 pmYes you are correct. I knew it was about that, just forgot the exact value.Quote from: void_error on January 10, 2015, 02:10:18 pmIn my circuit I have to drive the transistor base at about 1.6V above the output voltage, this is why I need a higher voltage rail for the opamp if I wanted to increase the output voltage. Only other way would be to use some transistor trickery but for the cost of replacing one regulator and being able to maintain the same layout I will probably just leave it like that.To be honest replacing the components I listed to modify the supply to give 26V out would probably be quite cheap. The main thing that would cost a lot is the 31V 3.2A supply. I will probably be using this supply I'm building to build a buck boost for a salvaged computer power supply, which will then supply this power supply. Power-supplyceptionI have actually been able to churn out the board design fairly quickly. I still need to do a review of it but I may be back tomorrow or the next day with the design. Again it probably won't be up to the standard for manufacturing as I am going to etch the board at home, but it will hopefully be a sound design.

author: Alex30
author_rank: Regular Contributor
timestamp: January 11, 2015, 05:03:30 am
content: Okay so I haven't had time to fully check my board layout but I think it's pretty much there. Hopefully I can get some feedback. I have made most of the traces quite large and pretty much gone with 1mm (40 mil) traces on most things except for the SMD component. The reason I have done this is because I am going to print it myself and I find that if I use 24 mil or smaller I often have to fix up some parts of the toner transfer. So I am just making things easy for myself. It would certainly be possible to vastly reduce the size of this board by using SMD components (perhaps somewhere between 3/4 to 2/3 the size, currently 150mmx150mm). For now though this is just a prototype and I won't even be masking it. Perhaps somewhere down the line I will update the design and use the space more efficiently and use SMD components and have the board professionally manufactured. I have used 66 mil traces for power and ground buses and the main power going in and out of the transistor regulator. I have attempted to use plane construction where appropriate and I have split up the ground plane into 3 distinct parts, one for the noisy SMPS, one for the analog control stuff and another for the load.I have changed only a few things on the design. The two jumpers on the current sense line are for the addition of decoupling caps if required.Anyway let me know what you think as I'm not that experienced! Hopefully it's not crap!Cheers

author: prasimix
author_rank: Unknown
timestamp: January 11, 2015, 09:22:04 am
content: 150x150mm is a huge area even for THT variants. Enough to place almost two modules but as you said you are going to make it by yourself and some extra space could help. Here is some comments:1. It seems that you are using top layer as ground plane with split between SMPS and linear section. It is not clear how or where that two are connected. Hopefully that should be a single low impedance point. I also do not understand why you add that deep cut on the ground plane section below power transistor heatsink.2. Decoupling capacitors (i.e. 100nF ceramic) are missing next to all op amps. Something that is not usable in simulation but can make a real difference in practice. Also check recommendations for decoupling your voltage reference IC (maybe it's even suggested to add small value resistor or inductance as a low pass filter on Vin as in case of many ADC). Do you really wants C13, C14 and C15 to be an elco and not ceramic (or mica)?3. Shunt connection section is strange. It seems that you add a place for SMD resistor in parallel with THT. That's fine but I'd like to suggest to merge that into one area and redesign the Kelvin connection. Also since you have a lot of space why not using 100+ mils trace to the shunt?4. Heatsinks looks big enough but still I hope that you made some basic calculation to not end up with let say more than 40oC over ambient temperature for the full load. I presume that cooling fan is not planned since it is another unnecessary source of noise.5. Since you have a SMPS pre-regulator on board any oscilloscope probing with long gnd cable is simply meaningless. Therefore maybe you'd like to modify your test points with one in attached library where additional ground anchoring hole is placing next to "hot" one to have the shortest ground possible (see picture). That can make a life easier and save you from some desperate times looking at spikes that really do not exists since they are picked up by wrong probing.6. I'll add and extra space for ceramic capacitor that will be connected in parallel with C6 in case that low ESR is required for changing control loop characteristics. Of course to small ESR also can be a reason for instability with some controllers. Another possibility is to divide C6 into two smaller elco and ensure appropriate space on the PCB (that could also helps to keep ripple current per capacitor well below their max. value).7. There is possibility that you'll experience some overshooting with C9 only. From my current experience with another op amp (TL074) a resistor in serial is required. Therefore I'd add an extra space on board to experimenting with C9 only or with C9 plus lets call it Rcomp. That is also possible that a small capacitor (tenths of pF) will be necessary in parallel with R3 and R42.

author: Alex30
author_rank: Regular Contributor
timestamp: January 11, 2015, 10:23:14 am
content: Thanks for the response! Yes I know the 150x150 is huge! I was just checking out of interest and it would cost $180 to have a board of this size manufactured in a small quantity! After I have nutted out the performance of the design I will definitely look at optimising the size and stuff. One thing I really don't like about this design is that I have a large area taken up by a buck arrangement and all it is currently doing is providing a negative voltage to a pissant little voltage reg (-2.5V). I have been trying to think of a way to design something where I don't need all that real estate and components just to get a -2.5V reference but have not yet thought of anything. Anyway, my comments in red:Quote from: prasimix on January 11, 2015, 09:22:04 amThanks again for the help, it's much appreciated and you have raised some excellent points.

author: prasimix
author_rank: Unknown
timestamp: January 12, 2015, 08:04:42 am
content: Quote from: Alex30 on January 11, 2015, 10:23:14 amI'm suggesting that if you'd like to add a place for both THT and SMD variants to make a custom component. You can see as an example in attached Eagle library a combination of THTOAR1shunt and SMD 2512 (i.e.Ohmite).Quote from: Alex30 on January 11, 2015, 10:23:14 amThere is a lot of straightforward online calculators. Here is some example:link1andlink2. Max. junction temperature is usually 150oC since destruction point of silicon is 175oC. You can go even lower and set max. junction temperature to 125oC in your calculation. Max. ambient temperature for unprotected area is usually 60oC but from my experience even if you momentarily touch 80oC there is no damage.

author: Alex30
author_rank: Regular Contributor
timestamp: January 12, 2015, 09:45:57 am
content: Quote from: prasimix on January 12, 2015, 08:04:42 amI'm sorry, what's the benefit of doing this over just using a single SMD resistor? Actually, sorry I think you may have mistook my Vias for a through hole mount!Quote from: prasimix on January 12, 2015, 08:04:42 amYeah I'm just unsure about the thermal properties of this particular transistor, I found a website that quoted the typical junction to case spec for TO-126 packages as between 3.5 - 10. Using 10, which is worse case scenario I found that with an ambient temperature of 45 degrees C (say it's a hot day and I have the board inside an enclosure) the junction temperature is quite close to it's maximum allowable under full load (144 degrees C). But if the junction to case is say, 6, then it is 120 degrees under full load. Best case scenario (3.5) is 105 degrees under full load. I guess as this info is not given in the datasheet I will just have to take some readings and try and roughly determine how it performs. I will do a few tests at some stage this week and try and collect some data. I'm optimistic it will be fine, but I may have to change the heatsink to a much bigger one if not.

author: prasimix
author_rank: Unknown
timestamp: January 12, 2015, 11:19:25 am
content: Quote from: Alex30 on January 12, 2015, 09:45:57 amNothing more then just allows more freedom to you (and other which decide to use your design tomorrow) for experimenting and choosing shunt and in the same time create easier Kelvin connection despite of chosen variant. This component is important if you are going to have decent current measurement/control.

author: Alex30
author_rank: Regular Contributor
timestamp: January 12, 2015, 12:55:10 pm
content: Quote from: prasimix on January 12, 2015, 11:19:25 amHmm its a good suggestion but just looking at the AD8418A it has very low error with higher temperature and I'm only expecting .72 watts out of the shunt. I'm confident the temperature won't effect my components with this setup but I may as well space those vias to suit this kind of shunt for the prototype, just because they're already there and I may as well just in case.

author: Alex30
author_rank: Regular Contributor
timestamp: January 13, 2015, 02:28:47 pm
content: So I conducted a bit of an experiment with the transistor to work out the thermal resistance properties of the 2sd1683. I did 5 readings that I have shown in the attached table. The first 2 readings I have excluded from my results as the temperature did not get hot enough to really say anything about the thermal dissipation qualities. The heatsink I used is 6.5K\Watt for each reading (which is the same H\S I will be using on my design). I was performing all readings with my fluke 17B DMM which includes a temperature probe. I probed the top of the case of the 2sd1683 package for each temperature reading and waited between 20-45 minutes (more for higher temperatures). After excluding the first two readings I get an average of 4.7K/W for the junction to case thermal resistance. Now I know that this is not super accurate, but even if I assume a 20% error which gives me 6K\W, and I use my 6W expected power (2V drop at 3A) I get about 120 degrees in 45 degree ambient temperature or 100 degrees in 25 degree ambient temperature. Thus, I'm pretty satisfied that this heatsink and transistor combo will work in my designBTW Power is in Watts and temperature is in Celsius.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 13, 2015, 05:18:16 pm
content: Wait, where did you measure Tj?Probing the device gets you near Tc, not Tj.The datasheet suggests 12.5C/W RthJC (10W rating at 25C, 150C Tjmax).Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 14, 2015, 03:19:34 am
content: Quote from: 3roomlab on January 13, 2015, 06:57:15 pmThanks for the info it is interesting. I however would prefer not to use a fan as they're noisy and I don't think I really have to.Quote from: T3sl4co1l on January 13, 2015, 05:18:16 pmIt's impossible for me to measure Tj. I was probing the top of the case and tried to find the hottest part with my probe, which turned out to be in a nodule on the top of the package, closest to the heat sink side. I do not have thermal imaging so this spot may not be the optimal location to probe but I did my best to find the hottest part. So I glooped some thermal paste in there and stuck my probe in. Thermally the case temperature should be quite close to the junction temperature, as all heat from the junction is dissipated to the case.Quote from: 1Interestingly it is also possible to calculate the junction temperature using the case temperatureQuote from: 1The datasheet however, does not provide Psi-JT. But looking at a few nominal values in the article, it seems like Psi-JT is typically between 0.1 to 1. This means that for my device, the junction temperature could be up to 8 degrees hotter than my case temperature.Quote from: T3sl4co1l on January 13, 2015, 05:18:16 pmYou didn't just plug in 12.5 into the junction to case and then put in 10 Watts to yield a junction temperature of 150 did you? This ignores the case to ambient dissipation and is not correct as you are trying to lump the junction to case and the heat sink dissipation into the same value. The datasheet says that for 10 Watt dissipation a heat sink was used, we don't know what type of heatsink though. Normally the device can dissipate up to 1.5W without a heatsink.The datasheet simply does not provide enough information. There are 3 unknowns - Junction to case, Junction to ambient or heatsink resistance. Typically a TO-126 package will have a junction to case resistance of about 3.5 - 10 K/W (2). With this in mind I think my 4.7 K/W junction to case is ball park. Besides, I just put 7.85W through it and it survived happily, in my design I will only be putting 6W through it.1:http://www.eejournal.com/archives/articles/20110721-tipt2/2:http://www.giangrandi.ch/electronics/thcalc/thcalc.shtml

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 14, 2015, 04:09:34 pm
content: Quote from: Alex30 on January 14, 2015, 03:19:34 amNooooooThat's the whole purpose of specifying RthJC: the thermal resistance between junction and case. Only when power flow is zero (and in equilibrium), Tj = Tc. When there is power flow, Tj > Tc due to this resistance.The resistance will vary depending on where you measure it against. There's probably no good way to do this with a TO-126, because the outer package is all plastic (ideally, you'd drill down to the metal tab, either from the top through the encapsulation, or from the back through the heatsink).For TO-220 devices, it is often taken in the front inner corner between heatsink tab (just below the screw hole) and the body.QuoteYou can't assume a value for this (why it's Psi-JT I don't know; R_{Theta J C} is the normal symbol), because it is device dependent. Example: a TO-92 which is all plastic is up around 80 C/W minimum (and most of that is coming out the leads). Very large transistor modules are in the < 0.01 range (i.e., they can dissipate kilowatts).QuoteThat's precisely what I did.Power dissipation rating are usually such that Tc = 25C (usually enforced, precisely, on all points on the surface of the case, using a nucleated boiling freon bath), and Pd such that Tj reaches 150C (or whatever the rating is). Thus, a temp rise J-C of 125C. For 10W, in this case, or 12.5 C/W.Since Tj(max) must be conserved, Pd drops when Tc is higher, until no power dissipation is permissible at Tc = 150C (because Tj is already 150C and cannot be allowed to rise any further).QuoteNo, and no:The dissipation is the entire case dissipation, held at a constant temperature. Actual use (on an infinite heat sink at 25C) will have slightly poorer results, because case to ambient dissipation, as well as heat carried in the leads, is weaker than the test case.We don't need to know what heatsink they used, because they specify Tc = 25C, not Ta = 25C.The heatsink dissipation does not matter, because this calculation assumes the heatsink is exactly 25C (not to mention on other points of the case). For a real situation with an air-cooled heatsink, its thermal resistance must be added in as well, to get the expected dissipation rating. Thus a 10W transistor might only be good for 3 or 5W, even with a fairly generous heatsink. The rated dissipation is an absolute maximum; your actual application will always achieve less.Now... I don't know if Sanyo performed a nucleated boiling liquid test, or if they did a somewhat more legitimate "infinite heatsink" method. In that case, the dissipation will include poor ambient dissipation, giving somewhat better results.The NBL test is typical of power devices today (IR has an appnote explaining the obvious BS). This is how a surface mount D2PAK can claim 350W dissipation.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 15, 2015, 02:44:49 am
content: No, there's no JA in parallel. The JA rating is when not using any heatsink or active cooling at all, just the device standing alone.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 15, 2015, 10:57:03 am
content: Quote from: T3sl4co1l on January 14, 2015, 04:09:34 pmYes this is exactly what I meant. I have attached a rough graph I drew to demonstrate my understanding of the temperature variation in a component with a heatsink attached and without a heatsink. As time goes on and the system reaches a state of equilibrium, the temperature of the case would approach to within Delta T of the junction temperature, regardless of whether or not the heatsink is used. Because the case has very poor dissipation to ambient, somewhere upwards of 80 C\W, the case temperature should be within a margin of the junction temperature. Based on common sense, I wouldn't expect delta t to be more than 20% higher than the case temperature for this kind of package, do you?Quote from: T3sl4co1l on January 14, 2015, 04:09:34 pmPsi-Jt is not the same as Theta JC.Quote from: T3sl4co1l on January 14, 2015, 04:09:34 pmQuote from: T3sl4co1l on January 14, 2015, 04:09:34 pmI can certainly understand what you are saying here and I think you're right, but it just doesn't add up to my observations. If it was 12.5 C/W wouldn't I have just vaporised the NPN material?ThetaJC = (Tj-Tc)/PTj=(ThetaJC * P) + TcTj=(12.5 * 7.85) + 110Tj=208 degrees.Yet it is still functioning totally fine. I mean if im running 7.8W through the thing and measuring 110 degrees on the hottest part of the case that I can find for 45 minutes and it still works fine afterwards can't I conclude that running 6W through it will be fine? If not what is the technical reason why? How could I prove that the heatsink and package combo is sufficient for 6W worth of power, without putting in a stupidly high safety margin or using lab grade equipment given that I am not making this for production, but for a hobbyist setting.If this isn't sufficient and there is no other options, could I simply replace the BJT with a N type MOSFET? I'm not that used to using mosfets yet, would any other components be required?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 15, 2015, 04:42:35 pm
content: Quote from: Alex30 on January 15, 2015, 10:57:03 amThat's not Tc, though. At least, not the one going to the heatsink.Aha, this is what they mean from Psi JT,http://www.ti.com/lit/ug/sluu484/sluu484.pdfit's "junction top", not junction case. So the power is explicitly not flowing through that thermal resistance. Which is why it's used like JC, but obviously a wrong value.Actually... the reference they give,http://www.ti.com/lit/an/spra953b/spra953b.pdfis much better than my knowledge. However: it is mainly about plastic IC packages, not discrete power devices.I've had no reason to believe a power device should have the surface near Tj. For some ICs, it makes sense: the die takes up a sizable portion of the internals, so Tj is able to diffuse nearly untouched to the surface. Psi_JT is then a scaling parameter intended to account for residual from diffusion, and ambient dissipation.The question, then, is: how representative is that?On a TO-3 device, obviously it's useless, but if you don't mind cutting one open, you can very easily measure Tj directly.On a TO-220, the plastic is quite a bit thicker than any die inside, so the Psi_JT is probably much higher than usual. Die size varies with device; you'd be surprised how small a BJT die is, for most devices. Even large dies (30A schottky, 100A MOSFET?) don't go to the edges, so I'd be surprised if the surface temp was really representative. You can measure the heatsink tab, but that's closer to Tc. And even that has problems: the temperature along the tab is uneven, being hottest underneath the die. And this varies with how good the heatsink connection is (direct greased vs. insulator), and even screw clamping force (argh, what a terrible package!).On a TO-126, it's probably not so bad: the package is thinner, the heat spreader is more compact (contained within the package, and not cantilevered off the screw), but, the die size still need not be much.My gut feeling is that you'll get something, at best, halfway between Tj and Tc (calling Tc the inner surface temperature of the heat spreader). But it depends on construction, and with scant little data from the Sanyo datasheet...QuoteOn one occasion, I tested IRF740 (Vishay/Siliconix brand) at high voltage. Although the RthJC *max* is rated as 1 C/W, I actually achieved enough power to suggest either RthJC was closer to 0.5 C/W -- that, or Tj was actually a sizzling 210C!On closer inspection, the die is huge: seems they never shrank the IRF740, just kept on making the same old thing. So when they say RthJC max, they're being quite generous! It's also stable at DC, no 2nd breakdown. I was measuring Tc based on the "inside corner" location, which I should guess is relatively independent of die size.In contrast, I tested a Fairchild FDP6N60C or something like that, which promptly blew at just over the power rating suggested by RthJC max. The IRF740 is an old spec and has a lot of slop; new products are designed and manufactured to much tighter specs. Though oddly enough, the IRF740 is still the cheaper of the two, despite having several times the die area...QuoteNah, no need for that. I would suggest going to a higher power device, or using two in parallel.If you're shopping, probably the best BJTs available today are low-Vce(sat) types, e.g.:http://www.digikey.com/product-detail/en/2SC6144SG/2SC6144SGOS-ND/3536834They're high gain, low sat (obviously) and high speed (certainly better than the classics, e.g. TIPxx, BDxxx), and usually fairly priced. They're also available in SMTs if you want a lot of current real quick, e.g., low voltage or budget switching applications, gate drivers, etc.In this application, the high hFE translates to easy drive: probably no need for a booster stage, just run it right off the op-amp (plus series resistor).Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 16, 2015, 02:07:35 am
content: What's so special about 70C? It's not like it's halfway to the limit or anything.I would avoid classics like TIPxx, because the Vce(sat) is pretty darn low, and that'll soon be a problem at high currents and low pre-reg overhead. Their cheapness is tempting though.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 16, 2015, 02:49:09 am
content: Thanks Tim. I guess just to be safe I should investigate using a different transistor that can dissipate more power. Just annoying that RS components doesn't seem to stock what I need, but the 2SC6144SG sounds like the perfect package, even the Vbe at 3A is quite low at about 0.6-0.8V. Thanks for the suggestion!

author: Alex30
author_rank: Regular Contributor
timestamp: January 16, 2015, 03:31:19 am
content: Argh it's impossible to find a good through hole transistor that suits my needs that isn't a darlington pair in Australia. I'm trying RS and element 14 and not getting anywhere. Digikey wants $30 shipping just for a few transistors. Maybe I will be using a MOSFET after all. I don't need anything extra to use a MOSFET do I?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 16, 2015, 03:42:47 am
content: As long as the op-amp can supply the extra Vgs(th) plus a bit, it's fine, yes. Compensation will be different, but you probably need to adjust that, anyway.Mind that overvoltage applied to the output (e.g., suppose the output is set for 5V, and you connect it to a battery or capacitor charged to 15V) will back-flow through the body diode... which won't cause any problems, because, the preregulator won't care. Actually a good thing to beware of, since the BJT would be damaged in the same situation (beyond about 5V, the E-B junction avalanches; in that range, the current is limited only by the dV/dt causing the preregulator's filter cap to charge).Speaking of, it might be handy to have a source-gate diode, to keep the gate voltage safe. Maybe make it a zener of 6-12V or something, so Vgs stays safe. Doesn't really matter as long as maximum supply is always under Vgs(max), and no over/under-voltage condition at the output can cause problems (the TVS there clamps excessive overvoltage, and prevents much reversal).Analogously, the BJT version could stand a diode in the same position, though obviously it doesn't need to be a zener in that case, because the base is quite happy to carry current. Not as much as the collector, but it won't blow up. At least unless all those caps in the path are big and low ESR.Anyway, a few of most anything in parallel will work: that TO-126 you were looking at, some TIP31s, whatever. Typical hFE on classics like TIP31 isn't too bad (~100?), so you probably still want a booster (2N4401 follower plus current limiting resistor?), and saturation isn't great, but two or three in parallel, plus setting the overhead appropriately, will solve that.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 16, 2015, 05:23:32 am
content: Yeah that makes sense. Thanks for the suggestions. I suppose I could hook up a couple in parallel but I would have to change the heatsink to one that could accommodate that I suppose. Unless I could install one backwards onto the same heatsink on the opposite side of the other one? Or is this a complete no-no?EDITLooks like it's a no-no. I just tried doing this and the back to front transistor temperature was ramping up tens of degrees hotter than the one the right way around. Just switched it off before the magic smoke came out

author: Alex30
author_rank: Regular Contributor
timestamp: January 16, 2015, 12:11:02 pm
content: So after what Tim said I was thinking of going with 2 2sd1683 in parallel. I will use a larger heat sink like this 75 length version:http://docs-asia.electrocomponents.com/webdocs/1297/0900766b81297c1c.pdfI will attach both transistors onto the same heatsink. I have updated the schematic to show the most up to date version

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 16, 2015, 04:45:43 pm
content: E-B zener isn't necessary, but a diode of some sort is desirable.Did you check base current requirements?What are the collector resistors for? Transistors in parallel need emitter resistors (and usually base resistors as well). Use enough resistance to drop maybe 0.1-0.2V at full current.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 16, 2015, 05:55:35 pm
content: What's with these collector resistors???Diode???The LM358 certainly won't be happy at 50V, but the simulation won't mind (as far as I know, breakdown is rarely modeled in ICs).It's probably stable as shown. Try adding a VPULSE in series with the 'ref' voltage there and see if it bounces.Even an explicitly unstable circuit need not oscillate in the simulation, because transient analysis does not include noise. A perfectly balanced DC operating point will not drift away and oscillate, even if it's a dynamically unstable condition. Another option is to use "set to zero" simulation conditions, though this has drawbacks for circuits with long time constants.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 17, 2015, 03:02:19 am
content: Quote from: T3sl4co1l on January 16, 2015, 04:45:43 pmI was actually wondering if a base resistor more than 10 ohms is even needed in this case. The LT1013 is only capable of delivering 25mA max and it has an infinite short circuit time. My conundrum is this: I have to drive the base of the transistor at sufficient voltage to allow the emitter to be at a maximum of 12V + 3 * 0.18 + 0.7 = 13.24V. I am providing the LT1013 with 15V on the positive rail. The output swing will come to just within 1.2V of the positive rail = 13.8V. That means that I can't afford to have a large base resistance. All the 10 ohms is doing in this scenario is acting as part of the R-C with the 10nF cap.In my understanding the base resistor is just to protect the base from large currents, but if the LT1013 is only capable of 25mA anyway, what do I do?Quote from: T3sl4co1l on January 16, 2015, 04:45:43 pmOkay, I normally see them on the emitter, but why can't the balance resistors be on the collector?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 17, 2015, 07:11:37 am
content: Because collector resistors don't do anything.. read up on emitter degeneration, current feedback, negative feedback, all that good stuff.By base current I mean exactly that... if you're limited to 25mA (and maybe not even that.. is the op-amp guaranteed for 25mA at the 1.2V-from-positive-rail condition?), then at hFE = 100, you're limited to 2.5A output and no headroom.Adding another transistor will boost that to well more than needed, even with everything at hFE(min).The resistor between amp output and base serves to decouple the op-amp, so it can be locally compensated with an R+C or whatever. Otherwise, there's no voltage to generate, against the base capacitance and stuff, and it can be more prone to oscillation.10 ohms sounds way too small to do anything; the op-amp's output is probably 20 ohms impedance at higher frequencies, so that adding 10 to it hardly accomplishes anything. Over 100 ohms is more typical (e.g., driving capacitive loads from common non-capacitive-tolerant amps).Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 17, 2015, 07:42:32 am
content: Yes it is, but the hFE is actually above 150 at 3A so no other transistor should be needed.If I use 100 ohms I will get a 2V drop, which means I will have to increase the positive rail to allow the opamp's output to get to ~15.5V which is a pain. I guess there's no way around it though. Thanks

author: Alex30
author_rank: Regular Contributor
timestamp: January 17, 2015, 12:25:52 pm
content: Yes it does but for me the sim is saying it will jump only 0.7V or so, if you reduce C1 to 10nF I bet this will be reduced somewhat, but the slew rate of the opamp is the thing that will prevent you from getting it perfect. But if the spike is less than a volt and lasting for 10-20us I sort of doubt it would damage anything. Even if you were to use sensitive components on a normal lab power supply you would usually take precautions and have some kind of input protection on your proto-board. 12V is definitely not acceptable though, if reducing the value of C1 doesn't help much, try another opamp.

author: Alex30
author_rank: Regular Contributor
timestamp: January 18, 2015, 05:00:54 am
content: From what I understand about your set up, I think it's possible that C4 and C2 will allow noise from the load to pass into your voltage control and cause oscillation as they both try and compensate one another. Perhaps someone can confirm this for me though because im not sure. In my schematic I am already getting negative feedback from IC2B.Interestingly I found that the spikes caused by changing loads are exacerbated by C16 on my schematic. This is caused by the output of the opamp seeing the inverting input through C16 during fast voltage transients, which is actually beneficial for noise reduction but makes the opamp overcompensate to a certain degree. But by adding in a series resistor there the spikes can be reduced somewhat as the opamp doesn't try to jump too high or too low when compensating. I'm not too sure what value resistor will be needed but i'm thinking somewhere between 1-5K.Do you have an output cap of about 1-10uF?EDITOh I actually was looking at your schematic wrong, I thought C1 was attached to something else. Do you have a feedback capacitor from your opamp to the inverting input like C16 on my schematic?EDIT2Also why are the resistor values around your transistors so low?

author: Alex30
author_rank: Regular Contributor
timestamp: January 18, 2015, 07:15:14 am
content: So here's the updated version. Things are starting to get a bit messy on the board, but hey, i'm sure things will get even worse later onI don't think it's too bad though. Unfortunately I couldn't fit both transistors on the same heat sink and ensure they are thermally coupled without changing the design too much or hunting down a certain sized heat sink. I don't think it will matter too much though. I ended up increasing the positive rail of the opamps to 17V to fix the problems I was having with driving the power transistors. In turn, this has increased the minimum supply to 18-20V, which is a bit disappointing but it is what it is. Anyway, as always feedback is welcome!

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 18, 2015, 07:38:03 am
content: Quote from: Alex30 on January 18, 2015, 05:00:54 amLook at it for what it is: a B-E capacitor. It's just slowing down the follower. It might reduce overshoot by slowing the whole thing down, but 1. there are better ways to handle overshoot, and 2. by slowing the whole thing down, you impair the ultimate performance of the circuit: the error amp necessarily must respond more slowly, which means a higher output impedance at signal frequencies. Which needs a larger output filter cap to compensate, which again makes things worse...QuoteIt's not a "coupling in spikes" thing, it's that it's filtering them out, preventing the amp from responding quickly. It's wired as an integrator, so it responds gradually over time and that's it.The overshoot, undershoot and recovery transient is precisely what should be expected from an integrator alone: it takes time to unwind from a heavy load, then it eventually shuts off entirely; meanwhile, the output coasts down (due to idle load or whatever). But then it drops below setting, so it takes more time for the output to wind back up to quiescent. Overshoot is a necessary side effect of this type of circuit.Putting a resistor in series with the capacitor adds some proportional gain, so that a step change in load voltage results in a step change in feedback. The resistor value is calculated based upon the loop gain, i.e., a step of so-and-so results in this-and-that error, which needs to result in so-and-so feedback to keep the output constant.QuoteI would suggest not reading into his simulation very far; note the tooltip thingy that shows 53A peak currents; 20V into a 0.2 ohm (and something) load.Tim

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 18, 2015, 07:43:25 am
content: Quote from: Alex30 on January 18, 2015, 07:15:14 amUncoupled transistors? Better increase the emitter resistors about 5x then. Power ratings accordingly.What is this BS about split planes?This looks terrible! No via stitching either.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 18, 2015, 07:58:34 am
content: Quote from: T3sl4co1l on January 18, 2015, 07:38:03 amThis makes a lot more sense. I knew it was like an integrator, I just didn't understand exactly what was going on with the spikes but this explanation is pretty good.Quote from: T3sl4co1l on January 18, 2015, 07:43:25 amReally? Didn't realize it was that critical.Quote from: T3sl4co1l on January 18, 2015, 07:43:25 amYeah it is pretty rough. The split planes are there to separate the noisy SMPS from the rest of the stuff. The split plane closest to the load area is to separate the analog stuff from any noisy loads I may be working on, like if I was building a SMPS. How many vias would you expect to see? I have 4 on the SMPS ground plane and 5 on the ground plane for the other components. This board is going to be etched at home, so all those traces are quite large.

author: Alex30
author_rank: Regular Contributor
timestamp: January 18, 2015, 10:23:25 am
content: Well after what Tim said, i'm a little embarrassed about my board layout lol. I guess that's what happens when you rush things and keep adding stuff without wanting to redo the layoutI've thrown away that layout and started again. I really want to get the layout done this week so I can start etching...

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 18, 2015, 05:50:39 pm
content: If you're going for hand made, you should go for single side SMT, ground plane on the back, with as few vias as possible (but as many as necessary for good grounding between both sides). Because vias are annoying.Example: here's a hand-scratched gate drive buffer circuit,Every large solder bump that's seemingly at random is a via (folded over nub of wire, soldered both sides). There's one in the bottom left (beside the chip cap), two between the larger transistors, two along the top edge, and I think one under the red coil. (I don't think the bump on the right, beside the resistor and capacitor, is a via, but I might be mistaken. It should have one on that end, in any case.) Plus a few more out of frame.Here's an old board I made,It should've been made with ground pour around all the low level circuitry, but even so, note the conspicuous lack of vias: only two signals couldn't be routed locally. The other traces on the ground side are VCC.Tim

author: splin
author_rank: Frequent Contributor
timestamp: January 18, 2015, 07:28:26 pm
content: I've just had a look over this thread and FWIW have one or two comments [Note: I am responding to the previous cct before the latest changes to op-amp voltages etc.].First it would be very helpful to use standard symbols if you can - its quite hard to work out what some of the boxes are. Presumably POT1 and POT2 are potentiometers for setting the voltage and current limit? If so what value are they? Even the trimmer symbol would be better.Presumably the boxes labelled Pxx are test ports but what are 'D PWR2' and PORT?If POT1 and 2 are potentiometers, they won't vary the voltage and current settings linearly. POT2 must be 10K to set VSET at 0V, 2.5V above -vref, so now set the potentiometer to 50% or 5K. The current through the pot is (10V - (-2.5V))/(510 + 5000 + 620 + 2000) = 1.538mA, thus VSET = -2.5 + 1.538 * (2000 + 620) = 1.53V rather than the 6V you might expect. Maybe you want it that way to provide much more resolution at low voltages, but I doubt it.Another problem is that potentiometers tend to have wide tolerances and lousy temperature coefficients unless you spend a lot of money. +/-20% tolerance and 1000ppm/C is fairly typical which means you'd need to select R17/R19 according to the actual resistance of the pot or provide a trimmer to allow setting of 0V. But then a temperature coefficient of .1% per degree C means the 0V level would vary between -43mV and +33mV given a 20C temperature change - not good for a precision instrument. (And that ignores the temp coefficients of the other resistors, references and opamp offset drifts etc.).For linear operation you need to use the pots in ratio mode across the 10V reference voltage, the wiper contacts providing VSET and ISET. The tolerance of the pots is then irrelevant and the effect of the temperature coefficient almost so (depending on the temperature variation along the track) and 0V shouldn't move with time or temperature. R17,18 and 19 are no longer required as is IC1A - VSET is only driving the high impedance input of IC2A. Scaling of the voltage feedback signal (R37,R32) would need adjusting slightly to provide 10V at 12V output.ISET would need attenuating from 10V max to 4.8V; using a resistive divider from the pot wiper to ground would compromise the linearity slightly but using a 1.5K pot and say a 2K/2.2K divider should be acceptable. Again, with the possible exception of the ISET display voltmeter ('ISET D'?) it is only driving high impedance inputs so IC1B is not required. I have a cheap ebay 5 digit voltmeter (0 to 4.3000 to 33.000V); I measured the input resistance as 347K so negligable in this application. It is also rock solid at 0V with the input grounded so all that means you can probably eliminate IC4B, R42,46,47,48,49,C24 and TRIM2. IC3B could also be eliminated.What is the pupose of IC2B? As far as I can see, all it does is add to the impedance of the very low impedance POWER_SUPPLY_OUTPUT signal (not that that matters) and adds some noise and offset voltage? I'd get rid of it and R44.IC4B doubles ISET which is then attenuated to 31% by R47/48. Why not do it in one step by adjusting R42 and/or R45? Similarly for IC3B.Why R26 and R28? The LM2596 ON/OFF signal can be driven up to 25V.The note says Reg OFF ~50ms delay but I assume you mean Reg ON as set by R21/C11? I calculate it to be between 125ms and 245ms given a starting voltage of approx 7V and the LM2596 ON/OFF i/p threshold anywhere between 2V and .6V (and ignoring the 5uA typical ON/OFF signal i/p current). Probably not very important; however it is generally a bad idea to drive logic inputs with such slowly changing signals unless you know them to have hysterisis (eg. Schmitt triggers) - crossing the threshold causes currents in the device to change which can create ground bounce which in turn can raise/lower the signal across the input threshold causing nasty oscillations for some time.Note 4 says the LM2596 i/p capacitance should have a ripple rating of at least 1.6Arms. However I calculated that with an input voltage of 16V, o/p voltage of 8V and 3A load, the ripple current would be 2.285Arms; at 14V out it would be 3A - 680uF/50V would not be big enough. You don't want to get this wrong - exploding electrolytics can blind someone!You should be able to eliminate the inverting switcher as well - connect the top of a flying capacitor to the pre-regulator switch o/p (pin 2) of the LM2596 and connect the bottom of the capacitor to ground via a diode so that when the switch o/p is on (high) it charges the capacitor to Vinput (less switch transistor saturation voltage); when it switches off, pin 2 drops to approx 0.5V as D3 conducts, causing the bottom of the capacitor to drop to (+.5V -Vinput) or approx -15.5V for a 16V input. A diode and capacitor connected to the bottom of the flying capacitor can then be used to rectify and store the 0v to -15.5V square wave. Given the very small current requirement from the -2.5V reference, the values for the flying and storage capacitors should be reasonably practical - use power = 1/2CV^2 * Fsw, where C is the flying capacitor and Fsw is the LM2596 switching frequency (150kHz). It does require the pre-reg switcher to be switching sufficiently often however - ie. if it drops into discontinuous mode under low load conditions then the energy it can supply to the -ve supply will drop accordingly - you'll need to watch the current control loop turning off the switcher.Actually why do you need -2.5V at all? VSET and ISET don't need to go below 0V and the LT1013 input range goes down to 0V minimum, -0.3V typical. The LT1013 ouput can swing down to 25mV but you don't need that anway for the voltage and current control loops - the only place it would be desirable is driving the voltmeter/display - except that you probably don't need them anyway. So get rid of all the -2.5V supply components as well.The 80mOhm shunt is in the wrong place - it should be after the regulator and before the voltage feedback otherwise its measuring some of the supply's operating current as well as the load. Reducing R43 by 80mOhms means it wouldn't increase the maximum voltage o/p required from IC2A; removing R20 altogether would save .3V - what is its purpose?T3 and associated components provide a constant current load of 35mA. What is it for? Is it to provide a minimum load on the pre-reg? Wouldn't a simple resistor be good enough? I hope T3 is well heatsinked - with the o/p at 12V with no load it will be dissipating 450mW; without a heatsink that means a 90C junction to ambient rise. If room ambient is 35C and the supply's internal temperature is 10C above that, its cutting it a bit fine.The current sense is compared to ISET by IC3A and depending on the mode switch it either turns off the output via T2 or turns off the pre-reg. The latter would oscillate slowly due to the deliberate turn-on delay and it wouldn't limit the current very quickly as C9 would supply the load until discharged - less of a problem with a 3A limit but for example, say the limit is set to 10mA, and the o/p is 12V when the load is partially shorted. It would supply, say, 100mA, 10x the limit for 33ms or more - not what you'd expect of a current limit.When the current limit operates in the mode where it drives T2, the current limit LED won't necessarily operate, depending on the difference in offset voltage between IC3A, IC4A, voltage drops along tracks, leakage currents etc.I don't see why you need to pass transistors. One should easily be able to dissipate 4.2W with an 8C/W heatsink. At 3A that would require the pre-reg output to be 1.38 above the emitter, which requires R20 to be reduced to 634 Ohms.I can't see a voltmeter to display the output voltage which seems odd.Have fun!Splin

author: Alex30
author_rank: Regular Contributor
timestamp: January 19, 2015, 08:01:44 am
content: Quote from: T3sl4co1l on January 18, 2015, 05:50:39 pmI have already purchased most of the parts, plus I went with mostly through hole stuff because I find it easier to work with. As I said before, if I get this working well I may get a board professionally produced and I will use SMT then for both size and cost reduction. Thanks for the pics though, they are quite neat boards! I do appreciate the honest feedback though hey, sometimes a reality check is what I need before I throw away work haha.

author: Alex30
author_rank: Regular Contributor
timestamp: January 19, 2015, 08:02:09 am
content: First of all I really appreciate your time you have put into reviewing my design, it must have taken a while so thanks very much. My comments below.Quote from: splin on January 18, 2015, 07:28:26 pmYes you are right, the reason I have not used proper symbols is because I am connecting these things with header plugs and I guess I was just too lazy to go into eagle and make a custom library part, but I should have as you shouldn't have to guess what it is.Quote from: splin on January 18, 2015, 07:28:26 pmThat is correct. D_PWR (there are 3 of them) are power plugs for the voltmeters and PORT is a spare plug. I should probably put a note or something to describe this.Quote from: splin on January 18, 2015, 07:28:26 pmActually I did intend logarithmic operation of the pots as it allows me finer control at smaller values which is generally where I would want fine control. But after reading your next point I may have changed my mind!Quote from: splin on January 18, 2015, 07:28:26 pmActually I did buy some expensive pots because I really like old school pots compared to rotary encoders just because the feel of turning quality photometers is sex haha. I picked up two of thesehttps://www.bourns.com/pdfs/3590.pdfwhich have excellent accuracy. But yes, adjustment of the resistor values may be necessary which isn't the end of the day.Quote from: splin on January 18, 2015, 07:28:26 pmThis is totally true and I can't believe I didn't just come back to this simple solution. I headed off down this track and made it more complicated than it should be, fresh eyes really help sometimes hey. Just for the reduction of parts I may sacrifice my logarithmic operation for this linear setup. If I simply changed it to a simple wiper scenario I can remove the negative reference as well. Are you sure the voltage follower can be removed? The main reason it is there is due to C15 and R27, as that integrator arrangement is fairly low impedance.Quote from: splin on January 18, 2015, 07:28:26 pmIC2B provides negative feedback and keeps the output at a solid voltage regardless of load current changing the voltage drop across the transistors and R43. R44 simply provides some level of protection to IC2B.Quote from: splin on January 18, 2015, 07:28:26 pmHmm, I remember I did do this for a reason but I can't remember why now... Perhaps it is no longer needed and I could just do it in one step now.Quote from: splin on January 18, 2015, 07:28:26 pmBecause it allows me to play with the values more, I will be changing R26 and R28 during prototyping (see below)Quote from: splin on January 18, 2015, 07:28:26 pmThis is true, however what is unknown to me is the time that IC3A will be on before it is switched off by the entire system after the preregulator is turned off. I should have made this a bit more clear in my schematic but the 50ms is my desired value and I will be playing with this to even work out how feasible this method is. Perhaps I should just remove the note as it is confusing for other readers. From reading the datasheet it sounds as though the On\Off pin acts like a schmitt trigger which is why i'm hopeful this will work.Quote from: splin on January 18, 2015, 07:28:26 pmReally appreciate you getting the calculator out for my safety hey. As a hobbyist I may not be going about this the right way and I must admit I didn't do any calc I just thought 1.6Arms would be enough, but now I looked it up and had a go at calculating it and I got different answers to you, perhaps we can compare notes? I used thisguide.To calculate Irms of Cin, first I had to find delta Il which is found on this second documenthere. DeltaIl is given by equation 3, which in my case is this:dIl = -(1.16-20+x)*((1/20)*x*(1/150000))/(22*10^(-6))where x is the output voltage. Note that the (1/20)*x*(1/150000) is the on time, as the frequency of the lm2596 is 150kHz, my understanding is that the on time can be given by the fraction of the output voltage to the input voltage multiplied by the period of the waveform, hopefully this is correct.Next the calculation for Cin is given by equation 1 on the first link, which in my case is this:Icin := sqrt((1/20)*x*(3^2*(1-(1/20)*x)+(1/12)*dIl^2))This graphed with respect to x is shown here:Next to calculate Cout I used equation 6 found on the first link.Ico = 1/sqrt(12)*(x*(20-x))/(20*(22*10^(-6)*150000)) where x is my output voltageThis plotted with respect to x gives this:So I should expect about 1.5Arms max on the input cap and about 0.5Arms on the output. How did you calculate yours?Quote from: splin on January 18, 2015, 07:28:26 pmActually if I use the wiper setup on the potentiometer you were talking about I won't need it at all. On this setup it was required with how the voltage divider was set up. All the more reason to change this part of the circuit so I do appreciate that. Regardless, it is an excellent solution to getting a negative rail out of the same switcher. I wonder how much current you could pull out of it when it is set up in this manner.Quote from: splin on January 18, 2015, 07:28:26 pmThat's true, the location of it is a hangover from when I had to remove overhead required to operate the transistors, but that requirement is no longer as tight as the design as evolved so I'm happy to move it there now. R43 is there to help output stability for capacitive loads. In simulation I found that with no series resistance there was a lot of oscillation as the supply went into a loop of current limiting over and over. The resistor helps by allowing this oscillation to gradually reduce to a state of equilibrium. In your last sentence I assume you are talking about R43 and not R20?Quote from: splin on January 18, 2015, 07:28:26 pmThis current sink is to allow the current sensor to maintain accuracy at low loads. I actually neglected to think about the thermal performance of this section so cheers for pointing it out.Quote from: splin on January 18, 2015, 07:28:26 pmThis is true which is why I am still cautiously optimistic but not 100% sure this will work well. I will be playing around with the time base to see how I can tune this to make it a viable mode. If I can't get it to work well, this part of the design may get thrown away. I'm hoping that if I make the off time small enough (50ms) I will get reasonable performance and the LED will be flashing, but I will have to wait and see.Quote from: splin on January 18, 2015, 07:28:26 pmBecause I want to make the pre-reg drop 2V to help with ripple rejection. I may be lowering this in the prototype but I thought 2V was a good starting number. Hopefully I will be able to lower it enough in the prototype so that I only require one.Quote from: splin on January 18, 2015, 07:28:26 pmIt's there, just on a header plug at the outputI wouldn't forget that haha.Thanks again.

author: prasimix
author_rank: Unknown
timestamp: January 19, 2015, 09:48:59 am
content: Possibly I missed something in this Cin/Cout discussion but what I can see in your latest schematic are only bulk capacitors C1 (470uF) and C8 (220uF) for SMPS pre-regulator. Where is ceramic (low ESR) which is from what I experienced currently the key factor for handling ripple (current and voltage)? I'd like to recommend the following document:TI - Input and Output Capacitor Selection.

author: Alex30
author_rank: Regular Contributor
timestamp: January 19, 2015, 10:02:23 am
content: Quote from: prasimix on January 19, 2015, 09:48:59 amThat's an interesting read. I will try and use this in my design, thanks. The LM2596 datasheet (which is pretty good) has step by step design instructions but doesn't even mention this which is odd

author: prasimix
author_rank: Unknown
timestamp: January 19, 2015, 10:26:16 am
content: Quote from: Alex30 on January 19, 2015, 10:02:23 amMaybe ceramics are not really necessary in case of LM2596 but look what Webench offer with quick inputs of Vin=15-19V, Vout=12V/2.5A ...Take note of elco's ESR values (they are specialized elcos for SMPS).

author: Alex30
author_rank: Regular Contributor
timestamp: January 19, 2015, 11:24:51 am
content: I find that schematic very strange as it totally disagrees with recommended capacitor values from the datasheet. Not really sure how those capacitor values were selected

author: prasimix
author_rank: Unknown
timestamp: January 19, 2015, 11:29:15 am
content: Don't know how muchWebenchis accurate for your IC but it's pretty usable for i.e. LM5118 or LM5574. You always can try to play with it by yourself. It's at the end official TI.com tool.

author: Alex30
author_rank: Regular Contributor
timestamp: January 21, 2015, 01:14:16 pm
content: Quote from: 3roomlab on January 21, 2015, 01:04:39 pmGood to be an inspiration! haha. Would help if you provided some model numbers for some of your components like the current sensor, i'm keen to see what you selected.EDITAlso having said I do appreciate the shout out perhaps this belongs in a different thread?

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 21, 2015, 08:46:30 pm
content: I can think of about ten things wrong with that circuit, pretty much all of which have been mentioned repeatedly in this thread, and ignored in this thread...Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 22, 2015, 10:50:03 am
content: Quote from: 3roomlab on January 22, 2015, 08:32:05 amHah, you can't be much worse than me mate, even looking back to some of my posts when I started this topic I facepalm. Being embarrassed to show people your work never gets you anywhere though, even if you cop some heavy criticism at least you learn from it. But yeah posting this thread has brought my level of understanding up tremendously, my original design was a vague conglomeration of blocks to do a certain function (and I laughingly thought it was more or less ready), but now it is coming together as a more coherent whole design and I got this forum to thank for it. BTW your current sensor looks decent. Sorry I can't really review your design though, i'm not a very good reviewer because I don't feel I know enough.

author: Alex30
author_rank: Regular Contributor
timestamp: January 22, 2015, 02:57:07 pm
content: So i took a hammer to the whole design after the previous revelation after commenting on splin's suggestions. I've tried putting the current sense after the power transistors but the current limiting oscillates all over the place. I think that the only thing keeping things in equilibrium before was a combination of the fact that the current limiting was slowed down by the slew rate of the transistors and opamps and the way ltspice models work, which is probably not a true representation of reality. I'm now really concerned that this thing is just an oscillator when it is in current limiting mode. With the 4.7u compensation cap at the load is in place the current limiting seems to oscillate at about 350-400hz. Really hard for me to tell whether this is just the sim or the parts used in the sim being different to what I selected or whether this thing is just unstable. Really frustrating but I think this will delay this project for a long time now as i'm missing my window of opportunity I suspected I would have in the first couple of months of the year. If I can't fix it up in the sim my proto board will have breakouts everywhere which will take some thinking about.

author: Kalvin
author_rank: Super Contributor
timestamp: January 22, 2015, 03:13:13 pm
content: May adding some hysteresis for the current limiter might resolve this oscillating: With the hysteresis the current limiter will "lock" into limiting mode until the load current has sufficiently reduced, and the current limiter will then "unlock". Something like fold-back current limiter.

author: Alex30
author_rank: Regular Contributor
timestamp: January 22, 2015, 03:24:33 pm
content: I tried that by turning the current limiting opamp into a bit of a schmitt trigger but obviously I didn't want the threshold to be very high otherwise the current set would be pretty arbitrary. Unfortunately the opamps seem to just work harder to push through the hysteresis. Without significantly slowing down the slew rate of the opamps (and therefore current limiting response) I'm not sure how else to fix this other than changing the current limiting design.

author: Kalvin
author_rank: Super Contributor
timestamp: January 22, 2015, 03:39:20 pm
content: This is just something that just came to my mind: How about making the current limiter so, that it will switch fast into limiting mode and switch slowly to releasing mode. In this way it will operate sort of asymmetrically. The overload current will activate the limit circuit fast ie. it will protect your circuit connected to the power supply. But it will release the current limit slowly. As a gut feeling, this should reduce - or even eliminate- the oscillating.

author: Alex30
author_rank: Regular Contributor
timestamp: January 22, 2015, 04:03:21 pm
content: It's a reasonable idea but the current control design just goes from 'let's slow down' to 'oh shit open all the way up' as soon as it passes the hysteresis limit

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 22, 2015, 10:01:46 pm
content: So, you need compensation on the current error amplifier, is what you're saying?

author: Alex30
author_rank: Regular Contributor
timestamp: January 23, 2015, 07:45:15 am
content: Quote from: T3sl4co1l on January 22, 2015, 10:01:46 pmIm saying that the oscillation is so bad that I would make it slow as a snail if I tried to compensate it. I'm currently brainstorming some ideas

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 23, 2015, 09:15:47 am
content: Then you're doing it wrong!Sometimes you're kind of screwed on that, without getting rather aggressive on the method... but there's no reason for that here.You can analyze the loop outside the error amp, and figure out how much attenuation and phase shift it has, as a linear circuit (or making assumptions to approximate it as linear). Then use that as a limiting case to design the compensation network.This analysis is also handy for figuring out where the slowest parts of the loop are, so you can do what's possible to shrink those and speed up the loop wholly.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 23, 2015, 09:47:39 am
content: I will give that a go but it will be a bit tricky for me as I am still a bit of a newby with working out proper compensation, I usually get by by sticking different filter caps until I get a winner haha. Don't think that will work here though.I had a go at a more maths based method but got stuck. My idea was to take the difference of the currentsense and the currentset using an opamp, which would give me a voltage equivalent to the current I would need to reduce the output by. I thought I could somehow subtract that exact amount of voltage needed out of the Vset. Only problem is that I am subtracting a value equating to amps from a value equating to volts, which means nothing really without another step. So I was thinking perhaps I could do a mathematical operation like dividing the vset by currentsense to get a value equating to the resistance of the circuit and then somehow using this to change the Vset. This way the vset would be set by maths, rather than flying around until it finds a point of equilibrium. But I think that's starting to get more complicated than it should be, I dunno.EDITHm after what you said I tried adding a RC filter between the pull down transistor on vset and the opamp controlling the voltage. Even though my calculated R and C values for the phase shift didn't work I tried a few different values and I got it to be stable. Hurah! Now I just have to figure out why it's stable with these unexpected values, if I can lol.EDIT2Maybe sticking a trimpot on that RC will be a good idea to help with calibration?

author: Alex30
author_rank: Regular Contributor
timestamp: January 23, 2015, 01:22:34 pm
content: Quote from: 3roomlab on January 23, 2015, 12:12:05 pmHm I can see there are a few things confused on your schematic... I can't seem to see any voltage control at all?You have U1A acting like a differential amplifier for current sensing, but you have R17,R19,R21 and R7 halving the voltage prior to the differential amplifier... Why?U1A is wired for gain of 10,000, but with the R17,R19,R121 and R7 voltage divider that is a gain of 5,000. Which means that 1A going through a 20mOhm sensing resistor (R3) will give a voltage difference of 0.02V, but then with a gain of 5,000 U1A will be totally flooded. You should nominate a voltage range to represent a current range, for me 3A=4.8V on my current sensing line, so you need to wire your differential amplifier to give sensible voltage outputs for different currents.Next you have U1B giving a gain of 10...Why?Then U3B acting as a voltage follower...Why?Then R16 and R17 don't seem to accomplish anything unless I'm missing something?Then U5A is set up as a comparator that is constantly on until the currentsense exceeds your current set which drives Q2 and Q1 and supplies the load with supply voltage. This is a bit confused, see below.I have attached a sketch with a lot of stuff removed to show the fundamental operation of my power supply. Note that the circuit will not work with just these components but that this diagram just helps explain how it works.First on the voltage set part, the voltage set value can be anything, as long as the gain of U2 is set up such that the value of voltage set turns into the value that you want your load to be at. For example if you have voltage set turned up all the way to 5V and you want this to represent the voltage at the load being at 10V, then set the gain to 2x. This completes the voltage control.Next on the current control, U1 acts like a comparator so that it's output turns on when current sense exceeds current set, which then turns N1 on and pulls the voltage set value to ground. When voltage set is at ground, U2 will output nothing and effectively turn off the voltage at the load, but then the current sense is now at 0V, so U1 turns off again and the load voltage is turned all the way on and the current sense is now high again etc etc. It will loop like this, which is why you need to compensate for this oscillation by carefully placed capacitors. Turning U1 and U2 into integrators is a good start. I have just got mine working again by putting a RC filter just before U2 aswell. With this config no other filtering caps should be needed besides maybe a capacitor at the output to compensate a little bit.Hope this helps

author: prasimix
author_rank: Unknown
timestamp: January 23, 2015, 04:45:57 pm
content: Quote from: Alex30 on January 23, 2015, 09:47:39 amYou mean stable because it does not oscillate or that there is even no overshooting? Suspending oscillation is a good improvement but pay attention on overshooting (if any) especially when you change voltage or load.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 23, 2015, 09:47:05 pm
content: Where do you get a gain of 5k from? The voltage gain is (R5 + R18) / R18 as an inverting amplifier. Except, the +in is attenuated by R6 / (R6 + R24) which is about 10/11, which when combined with the other ratio (11/1) gives a 10:1 voltage gain.But R19-R21 and R17-R7 attenuate the incoming signal by half, except R18/R24 load these slightly, so the ratio will be slightly less than half, about 2% less. So the overall differential gain is about 4.89. Common mode rejection will be good as simulated, because all the resistors are matched; in practice, you will have to select or adjust the ratios so that R19/R21 = R17/R7, and R24/R6 = R18/R5. A final gain and offset adjustment would complete the stage for proper two point calibration.The next stage is noninverting gain of 10, so together, there's gain of about 48.9. So the 0.2 ohm sense resistor looks like 9.78 ohms, when comparing the voltage after U1B to the current through R3.C2 and C1 provide some filtering, but this is probably not required (no switching noise to filter out..), and the phase shift is probably undesirable.With no local feedback across U5A, it's wired as a comparator. Which an LM358 is one of the worst at, so you'll get triangle rather than square waves. As shown, it should be oscillating around... the pole set by C2-R5 (around 100Hz). Probably above, since the phase margin doesn't go to crap until some ways above the pole, and you need 90 degrees phase shift to make that happen.Gist of it is, every time you see an R and a C, you have one (or a few) break frequencies. Depending if the resistors are acting in series or parallel, it's a pole (gain drops with rising frequency) or zero (gain levels off). Both C1 and C2 are pole-zero because they only reduce gain to a point; in the case of U1A, the noninverting gain never goes away, so it drops from gain of 10 (inverting) to gain of 0.1. The slope between those points is always constant (and the phase shift 90 degrees for that slope), so it flattens out at about 10 times higher, or 1kHz. Alternately, the series resistor is R18, which is 10 times smaller, or 1kHz. Same thing. At C1, gain goes from 10 to 1 over 1kHz to 10kHz, same idea.If you go for dominant pole compensation, you need that pole well below the lowest in the system. Or under 100Hz. >15n across U5A should do it. Or since the loop has finite gain and not excessive phase shift, you can use an R+C feedback with a smaller C (= higher break frequency) to have it run with limited gain at higher frequencies.Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 24, 2015, 02:01:40 am
content: Sorry Tim's right, it is only a gain of 10:1, not 10,000. That's what I get for looking at things when it's late lol. But yeah, why use R19-R21 and R17-R7 and then U1B giving a gain of 10? More importantly why end up with a gain of ~50? Most of these IC current sensing amplifiers that you can buy are rigged for a gain of 20 I have found. Maybe just set up the differential amplifier for a gain of 20 and leave it at that and then at least that will be equivalent to most things you can buy.

author: Alex30
author_rank: Regular Contributor
timestamp: January 24, 2015, 02:35:23 am
content: Quote from: prasimix on January 23, 2015, 04:45:57 pmPretty much both. It's running fairly well at the moment i think. I have attached a couple of graphs from the sim to show you. All of these graphs have a change of load happening at 1ms. The first one is a 2.2A load that is given a 'short circuit' load that should run it up to 6A, but the current limit is set at 3A. The second one is a ~10mA load that is given a 'short circuit' load that should run it to 3.5A with the current limit set at 3A. The third one is a load changing from 100mA to 2.1A without any current limit.It's possible to get practically no oscillation at the tail end of the current limiting response by increasing the capacitor at the load side, but it slows things down and I'd prefer this faster response.

author: prasimix
author_rank: Unknown
timestamp: January 24, 2015, 07:46:47 am
content: Looks nice.When finish a prototype I suggest to test in practice the following scenarios for possible overshooting/oscillation:Power up without load connectedPower up with load which activate CC mode (i.e. U is set to 10V, I is set to 100mA that limit U to only 2V)Same as above but during normal operationPower down without load connectedShort circuit with various U set (i.e. 1V, 2.5V, 6V etc.)

author: Alex30
author_rank: Regular Contributor
timestamp: January 24, 2015, 08:17:40 am
content: Quote from: prasimix on January 24, 2015, 07:46:47 amThanks I will give that a go. Which reminds me I will have to get a bit creative as I only have an old analog scope and a cheap ebay square wave function gen. So yeah, maybe I could use the power switch and come off with a mosfet or something to pulse the supply on and off to take those readings? Or maybe I will just resort to trying to video tape it, not sure what frame rate I would need though, probably too much.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: January 24, 2015, 08:33:05 pm
content: Well, Miller effect is the input-referred equivalent resulting from a feedback network, such as the virtual ground at -in (if +in is constant), or the magnified capacitance at -in (if the amplifier has relatively low gain).Tim

author: Alex30
author_rank: Regular Contributor
timestamp: January 25, 2015, 04:25:19 pm
content: As I said before I'm not too good with compensation as I am still learning. But after briefly reading some of that stuff (thanks 3roomlab) would a lead-lag compensator be a good application of compensation just prior to the voltage control, instead of using an RC filter?

author: Alex30
author_rank: Regular Contributor
timestamp: January 26, 2015, 04:06:14 am
content: Well there's nothing quite like bumbling your way through AC analysis in LTspice not knowing what you are doing. Despite this I got current limiting response down to 65us in the sim. Would have liked to understand it a bit more but it looks like a good few months of learning control systems before I can get a grasp.

author: Alex30
author_rank: Regular Contributor
timestamp: January 26, 2015, 01:05:15 pm
content: Well I'm posting this a little encumbered after Australia day but I had this pretty much finished yesterday and just added a couple of final touches. I have streamlined the entire design and got the number of opamps required down to 4. This is because I realised some of the opamps were redundant due to the operation of the current sense chip (which is actually an opamp and does not require any follower) and the fact that the negative feedback for the voltage control did not actually require a voltage follower. I have substituted a couple of resistors for pots as I wanted to be able to easily tune this as it is just a prototype and easy tuning is important so I can finalise the design. I have also included space for additional capacitance in some areas in case I need to quickly add a little bit. Hopefully this is the one!I have also followed prasimix's suggestion and allowed room for a calculated 60uF of ceramic caps to reduce output ripple