Step-change detection circuit - Page 1
Forum section: electronics / beginners

author: HwAoRrDk
author_rank: Super Contributor
timestamp: January 07, 2018, 01:00:42 pm
content: I was recently trying to figure out a way of detecting step changes in an input signal, so that I can record what the 'plateau' levels are of each step. I came up with the following circuit:The input signal is in the range of 0-2.5 volts. It first gets AC coupled so that each step change generates a pulse, but because these are quite low in amplitude, they are then fed into a non-inverting op-amp with gain of approx. 100 so that the output is a nice 5-ish volt pulse. I can then take the output pulse and feed it to a rising-edge external interrupt pin on an MCU (or maybe analog comparator pin). Whenever the interrupt triggers, I take an ADC reading of the original input signal and record the voltage.So far, I've been simulating it and it seems to do what I need, but I am not sure whether there are any side-effects or other things I may not have taken into consideration. Are there?One limitation is that it only detects positive step changes, but that is just fine for what I want. Another thing I encountered was that the simulation showed that without the small cap, the output from the op-amp would sometimes oscillate/ring; adding 10pF seemed to be the minimum necessary to avoid that.I was originally thinking about possibility of doing this in software with just the ADC, but I couldn't think of a solution (it's not as if it's as easy as, say, peak detection). If anyone can indeed point me to some software solutions, that'd be great.

author: Cerebus
author_rank: Super Contributor
timestamp: January 07, 2018, 02:31:17 pm
content: Perversely, you're doing the opposite of what you want, mathematically. You're differentiating the signal (i.e. dv/dt). You want to know when the signal is plateaued, and mathematically this is when dv/dt = 0. So you are detecting the transition, not the plateau, and assuming that a plateau follows the transition. You'd get more robustness by triggering your reading when the differentiated signal had been zero for a specified time (which is going to be signal dependent).Alternatively, trigger your readings at regular intervals, but inhibit a reading if dv/dt != 0. Use the transition (dv/dt != 0) as a marker and average all the readings between markers to get the levels of your plateaus.If you need readings of both polarities, include a precision rectifier circuit after your differentiator to effectively take |dv/dt|.

author: danadak
author_rank: Super Contributor
timestamp: January 07, 2018, 04:29:30 pm
content: Is the signal periodic ? If it is then using your d/dT interrupt makes lifeeasy. Have the ADC run continuously and take the prior sample whenthe d/dT occurs. That sample is the final decay level just prior to nextstep. But that presupposes that the behavior between samples is continuousand predictable.Or, as prior post suggests, average the samples between triggers to getan average, or RMS.So that begs the question, what are the characteristics of this signal, both atstep and in between d/dT steps ?Regards, Dana.

author: Cerebus
author_rank: Super Contributor
timestamp: January 07, 2018, 04:33:26 pm
content: I'm assuming, from the implications of the original post, that this is a stair-step kind of waveform.

author: phil from seattle
author_rank: Super Contributor
timestamp: January 07, 2018, 09:51:07 pm
content: Knowing nothing about your application, do you have enough spare CPU cycles to just do it in SW? Look at the ADC value and if it has changed by a certain amount, record the new plateau level. Obviously, that would be done after some filtering.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: January 08, 2018, 09:21:38 am
content: Quote from: Cerebus on January 07, 2018, 02:31:17 pmHaha, I feel dumb, I totally didn't think of it that way.Quote from: danadak on January 07, 2018, 04:29:30 pmYes. Although, not regularly periodic. There could be anywhere between a few milliseconds and several seconds between steps. But there should always be a period between steps, even if it is short. The smallest expected step level should be about 50mV, but usually more than that, about 200+mV.Quote from: danadak on January 07, 2018, 04:29:30 pmHmm, yes, that would be a better approach. The signal has a rounded 'shoulder' just before it plateaus, so I guess if I took the reading at the point of interrupt, I would probably catch the shoulder, and not the final plateau level. Using your approach would be more accurate.Quote from: Cerebus on January 07, 2018, 04:33:26 pmYes, precisely.Going back to what Cerebus said in his first post, I was thinking about it in the shower last night (where all the good ideas are born, right?), and had an idea about how to implement that approach just in software, and in a very easy way at that.I can set up the ADC to sample at a fixed frequency - say, 1kHz. Then I can use a simple 8-bit integer (or maybe 16 if I need more) as a simple historical buffer that indicates whether the last 8 readings were higher/lower than the previous - where a 1 bit is higher/lower, and a zero bit is unchanged. I would probably want to use a certain margin when making the higher/lower comparison, to account for noise. Then, all I have to do is look at whether the integer value of the buffer variable is equal to zero, and when it is, I have a plateaued signal, and I can take the last ADC reading as my level.Something like the following pseudocode:Code:left-shift buffer by oneif (current_reading > last_reading + margin) or (current_reading < last_reading - margin) thenbuffer = buffer | 0x1last_reading = current_readingif buffer == 0 then<do whatever with current reading>Does this sound good?And, if I need more than 8 history buffer bits, then I could use a 16-bit integer either fully or with a mask (for, say, 10 bits). ADC sampling rate could also be adjusted to ensure I get a buffer's worth of samples in the minimum expected period between steps.I'm sure I once saw something vaguely similar (at least, the concept of using an integer variable as a buffer of binary flags), but used for software de-bouncing of button inputs, but I don't recall where I saw it.Oh, and finally, one question about the circuit in my original post: would it be best to put a diode (a schottky?) to ground between the AC coupling cap and the input to the op-amp? So as to prevent negative pulses (from downward steps in the input signal) going to the op-amp. I might just breadboard it for kicks to find out how it behaves in the real world.

author: danadak
author_rank: Super Contributor
timestamp: January 08, 2018, 01:14:59 pm
content: QuoteYes, you cannot take the inputs to OpAmp outside their CM range, someOpAmps don't behave well when you do. Anything like simple offset errorsto phase reversal can occur in the OpAmp.Regards, Dana.

author: Cerebus
author_rank: Super Contributor
timestamp: January 08, 2018, 01:31:24 pm
content: Shouldn't that be:IF abs(current_reading - old_reading) > margin THEN ...If you can relate your history length, sample rate and the settling time of your input circuit, then you're got quite a nice mechanism for choosing your accuracy on a nice sound basis. i.e. If your input time constant is, by helpful coincidence, the same as your sample time, then the number of zero bits in your buffer is the number of RC constants that you've waited; so 1 RC constants would be a 67% measurement confidence limit, 3 RC constants 95% and so on. Obviously a realistic version has to factor in a realistic ratio of sample rate and settling time.In the original scheme, there's probably a good way to do your clamping by using diodes in the feedback loop. I can't be arsed to figure it out at the moment (currently running on only one cup of coffee so far today), but you ought to be able to come up with a clamping, rectifying amplifier with a judicious application of diodes, some of which could be zeners.

author: HwAoRrDk
author_rank: Super Contributor
timestamp: January 08, 2018, 03:25:57 pm
content: Quote from: Cerebus on January 08, 2018, 01:31:24 pmAh, yes, of course! Thanks.