Reducing 555 discharge current - Page 1
Forum section: electronics / beginners

author: TwinOak
author_rank: Newbie
timestamp: September 14, 2018, 01:00:59 pm
content: Hello forums, first post here!Just wanted to get some thoughts and opinions on a problem (and solution) I encountered recently. I was designing a circuit with a few 555s in one-shot configuration with variable pulse duration and wanted to get a large duration span. Not thinking about what I was doing, I whacked 100 ohm resistors in series with 100k pots for charging the timer caps. The supply voltage was quite high, around 13V and on first powerup the regulator got a bit toasty. With the pots at 0 ohms, 130 mA* was of course flowing through the discharge pin of each 555 chip.So this could be fixed by increasing the minimum resistance and lowering the supply voltage, but what if I wanted an even larger span, I could go up to 1 Meg or even 10 Meg pots, but 10 Meg is not something that I've got in my junkbox, nethier is a large assortment of varable caps (I've got exactly zero). So I came up with this solution:As I haven't found anything obvious on the subject when googling, and I can't stop thinking that this is somewhat of an ugly hack, I can only assume-There's a much simpler solution while still using the 555 that I've overlooked-There are other chips better suited for the application-It's not a common circuitAny thoughts?Best regardsAlexander*EDIT: actually limited to 100mA, at least for the LMC555

author: malagas_on_fire
author_rank: Frequent Contributor
timestamp: September 14, 2018, 01:20:55 pm
content: Let's get started with the basics, first the voltage Supply from a TI part can range between 4.5V to 16V, second the High level voltage of the output can be high as 12V so the LED and resistor will not be so happy.Datasheet:http://www.ti.com/lit/ds/symlink/ne555.pdfWhy only 100 Ohms on (Correction) 7 , 6 pins? The datasheet sugest a typical application of 9.2K on figure 9.

author: SeanB
author_rank: Super Contributor
timestamp: September 14, 2018, 02:46:41 pm
content: How a bout a series resistor to pin 7, probably around 33R. Will reduce the discharge current, and aside from increasing the delay time a little, will work. As well the regular 555 does have some rather large current spikes on switching, even with nothing connected, so a supply bypass capacitor ( 470-1000uF 25V electrolytic right near pins 1 and 8 is about right) is needed, even if your supply is capable of supplying 1A or more.

author: malagas_on_fire
author_rank: Frequent Contributor
timestamp: September 14, 2018, 03:28:48 pm
content: Yeah the bypass caps are quite needed maybe an extra 100nF directly between the power pins, in parallell with fat capacitor. The temperature seems to be another factor on the accuracy up to 1.5 %, 50ppms as stated in datsheet.

author: Gyro
author_rank: Super Contributor
timestamp: September 14, 2018, 03:53:57 pm
content: I've never managed to find a discharge pin maximum or peak current specified in a 555 datasheet, I've looked several times when thinking of using it as an open-collector output.The main output pin maximum current is well specified and figures are also given of Discharge pin off-state leakage and on-state voltage at a nominal current. Given that in most configurations there is a timing capacitor, without value limits, directly connected between Discharge and ground, it's weird that there's no peak current spec (that I can see). The bipolar 555 block diagram invariably shows the Discharge pin as just an open collector transistor.

author: TwinOak
author_rank: Newbie
timestamp: September 14, 2018, 04:17:24 pm
content: Sorry guys, I knew I should have been more clear.The circuit shown is NOT the real world circuit I've been designing, it's only a doodle made to show the solution I came up with to the proposed problem. In words, the solution is to hold the gate of the FET low during dead time through pin 7, while still being able to discharge the cap through the schottky diode. Thereby the only current "wasted" through pin 7 is set by the pullup resistor R2, and I could probably up that to 100k.I built this circuit up on the breadboard and it works, but I'm interested in knowing how you would approach the problem: (how) would you generate varying pulse durations from say 100ns to 100ms with a 555?, and if you can spot any issues with the solution shown.The actual circuit looks more like this (but it lacks the FET/schottky hack):

author: malagas_on_fire
author_rank: Frequent Contributor
timestamp: September 14, 2018, 05:16:07 pm
content: How about 1K and 100uF ? You could use a 556 IC which has two 555 timers with shared power if you want to spare layout.Here are some calculators :http://www.ohmslawcalculator.com/555-monostable-calculator

author: TwinOak
author_rank: Newbie
timestamp: September 14, 2018, 06:33:51 pm
content: I'm not sure if I'm misunderstanding you or vice versa. I'm well familiar with how to calculate a fixed duration for the 555 timer.What I'm looking for is the most elegant solution to achieve a wide (user) trimmable pulse duration range without having to waste current through the discharge pin while the chip is sitting idle.I've already acheved this with the circuit in the opening post, but I'm curious to know how you would approach the same problem.Of course, a micro would do the trick, but that's cheating. I know that there are loads of alternate 555 configurations floating around, and perhaps someone knows about one that would do what I want.Best regardsAlexander

author: SeanB
author_rank: Super Contributor
timestamp: September 14, 2018, 07:07:44 pm
content: Having looked at the die photos you can see discharge and the output stage use a similar size NPN transistor on die, so the current is going to be the same for both, 300mA, as both are fed from the same current source. The transistor probably is not a saturated switch during the beginning of conduction, with the high pulse of current, so likely gets to around 500mA transiently.

author: malagas_on_fire
author_rank: Frequent Contributor
timestamp: September 14, 2018, 07:32:33 pm
content: Quote from: TwinOak on September 14, 2018, 06:33:51 pmSorry if i misunderstood or confuse you. But now i understand better what is you're point to achieve. Maybe the series resistors in pins 6 and 7 metioned by SeanB will limit the inrush current to that pins, of a small value V =13.75 /0.5mA => 33 Ohms for maximization .. Power can 1W since the duration of the inrush peak is too short that will not upset the resistors and the IC's

author: Gyro
author_rank: Super Contributor
timestamp: September 14, 2018, 07:54:55 pm
content: Quote from: SeanB on September 14, 2018, 07:07:44 pmYes, I've done the same exercise with die photos, it's still weird though that no-one has ever quantified it in a datasheet, either in the parametric or Absolute Maximum sections.The 555 has all sorts of non-timer uses (push button toggles etc) where it might be useful to have an open collector output rather than the totem pole. It would be nice to have more than an educated guess at it's continuous current rating. As you say, size wise, itoughtto be about the same as the totem pole pulldown transistor as long as it stays in saturation.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 14, 2018, 08:06:13 pm
content: Long duration, use CMOS (7555, LMC555...). Or any of the logic timers (74HC123, CD4047, 4098...). If you need high current output, consider a gate driver instead of the old crappy 555's output; TC4420 is quite a bit beefier (also faster, rail-to-rail and low shoot-thru).Tim

author: viperidae
author_rank: Frequent Contributor
timestamp: September 15, 2018, 09:33:29 am
content: If you want a large range of time intervals, why not use a counter chip clocked by the 555? You can then select different counts and frequencies to obtain the desired time. You also mitigate the issue of leakage in your capacitor when using very large timing resistors.

author: TwinOak
author_rank: Newbie
timestamp: September 17, 2018, 10:44:44 pm
content: Hello everyone, thanks for all the input. Given that a few different topics around the 555 have been discussed but not so much the one I intended, my guess is that it's not such a common problem.SeanB and Malaga, it's not the discharge current I'm worried about, it's the steady state idle current through the charge resistor that I want to reduce.Tim, thanks for the alternatives, I'll check them out. Even though it's not long durations I need, just large adjustable spans. Look at the 74hc123 for instance, it requires a minimum charge resistor value of 10 or 2k depending on Vs, and max 1M. That won't even give me 3 full decades of adjustment, best case.Viperidae, probably the best suggestion so far, especially if precision and long intervals are required. But perhaps a bit more cost than a few passives if not.So, should we turn it the other way, are there any big downsides to the FET/diode suggestion in the op, can you fault it?Best regardsAlexander

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 18, 2018, 04:01:29 am
content: Quote from: TwinOak on September 17, 2018, 10:44:44 pmRegarding that, the leakage of the diode, and the input bias current of the 555's comparators, are still present, so you don't get any upward extension in terms of period. The transistor is just gating a resistor, which doesn't make much sense when that's what the traditional circuit does (resistor 1 from +V to DISC, resistor 2 from DISC to capacitor).You could add a JFET source follower, to eliminate* comparator bias current. Likewise, buffering DISC with a low-leakage diode (certainly not a schottky!) or transistor will eliminate that source of error, allowing very large charging resistors (not quite gigs).*Well, reduce by a few thousand times, say. There is no elimination of course, but ~pA leakage is possible with these improvements.Or just get a CMOS version, which addresses pretty much all of this on-chip -- note discharge leakage current, and THR/TRIG input bias:http://www.ti.com/lit/ds/symlink/lmc555.pdfTim

author: TwinOak
author_rank: Newbie
timestamp: September 18, 2018, 07:08:05 am
content: Tim, I still don't think you are reading what I'm saying. I AM using the LMC555 already.I've built the circuit up and it does work. You write that the (internal) transistor already gates the charging resistor, yes it does, but in the opposite state to the external one I've added. When the 555 (in monostable mode) is "off", idle, non-triggered, the internal transistor - be it a CMOS or bjt version - is fully on. To discharge the capacitor, yes, but as a side effect it will also draw full current through the charging resistor. If you like me would need this resistor to be small, much smaller than the recommendations, then that current will be substantial and orders of magnitude larger than any bias or leakage currents.Adding the external FET only allows current to flow when the 555 is triggered. There will still be current flowing through it's pull-up down through pin 7, but the pull-up could be high value.I chose the schottky because newer designs are getting quite reasonable in regards to reverse leakage, and I figured the lower forward voltage would give a lower error when calculating the RC circuit using the standard equation.All the bestAlexander

author: MK14
author_rank: Super Contributor
timestamp: September 18, 2018, 08:00:58 am
content: Quote from: TwinOak on September 14, 2018, 01:00:59 pmYou can get very low power consumption MCUs, and they don't cost much these days. In tiny packages.It could be put into some kind of "sleep" mode (switching off all the un-needed peripherals, as necessary, to minimise power consumption), until the time is up. Then toggle a port, which could drive a transistor or mosfet, if more output current is needed.Without looking it up, the MCU current, at low (clock) frequency and using sleep mode etc applicable to the device you are using, is probably around a microamp or so, maybe less. But maybe it is 10 or 20 microamps. Best to look it up.The program would only need to be quite short and you could easily do any other functionality in the program, depending on what exactly you are trying to do.Once you have the code written. You could keep it and use it for that type of project, for the next 5 years. Just changing the required time constant(s), at the top of the source file.But if MCUs are not your thing or you really want it to be all hardware, then carry on.But all the circuitry you seem to be adding, seems to make a modern, very low power consumption MCU, an attractive option.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: September 18, 2018, 09:22:24 am
content: Quote from: TwinOak on September 18, 2018, 07:08:05 amOh, good!I didn't see anywhere in this thread that you did.QuoteNot sure how to parse that part of the sentence, but anyway -- you aren't locked into the traditional circuit of course: you can put diodes in to speed up charge or discharge, you can tie the timing resistor to the output pin, no pullup needed (only three components required for an astable), you can use a current source or sink to get a linear (and perhaps better controllable?) ramp, etc. Tons of add-on options.I once made a triangle wave generator with a hysteresis comparator, FET follower and two current mirrors. With heavy bias (~10mA) in the comparator (this was all made discrete from 2N4401/3s, except for the 2N4393 JFET), the maximum frequency was some 33MHz (Ct = 100pF I think it was at), while the minimum frequency was about 100Hz, limited by leakage current in the 2N4401/3 current mirror, corresponding to a few nA I think it was? Which is not at all bad for a relatively large (600mA) general-purpose transistor. Probably helps that it was cold in the shop at that time, too...If you're going for low supply current consumption, a 555 of any type is simply not what you need (note LMC555 is 50uA and up!). There are micro- and nano-power timers on the market that may be of interest, or you can build your own from logic chips and/or low power comparator(s).QuoteThe lowest leakage commodity one I know of is BAS70, which isn't bad, but even 1N4148 outperforms it by 10x, while being rated for over four times more current (so it's ~40x better by die area, presumably?).Transistors (specifically, B-C junction) can be a lot better, and always perform better than the datasheet (2N4401 is spec'd for 100nA but I saw ~1nA in my example). Smaller (low Ic(max)) and higher voltage parts typically perform better. BCX70 is a good small GP transistor, and I've heard tell of some (I forget if it was BCX70 or some RF type) in the pA range.Another problem with low current or wide range is the hFE reduction at low currents. MOS may be better, unfortunately very small MOSFETs don't exist anymore (there are plenty of GaAsFETs and PHEMTs out there, but they are definitely not jellybean priced). If you can't do it with a few CD4007s, you're pretty much SOL outside of getting it done in an ASIC......And that's where MK14's note comes in, MCUs can run on less power than LMC555, as long as what they're doing isn't being done very fast. It's kind of sad, semantically speaking, to commit thousands of transistors to a task like this, but hey, when the incremental cost of a transistor is almost exactly zero as it is today, it doesn't really matter, does it?Tim

author: Gary350z
author_rank: Regular Contributor
timestamp: September 18, 2018, 02:33:22 pm
content: Quote from: Gyro on September 14, 2018, 03:53:57 pmI recently found the answer to this:

author: SeanB
author_rank: Super Contributor
timestamp: September 18, 2018, 05:24:24 pm
content: How about then using pin 3 as the voltage source for the timing as then your charge and discharge times can be separated and you have a very wide range available, and the current limitations you have no longer apply.

author: Gyro
author_rank: Super Contributor
timestamp: September 18, 2018, 06:50:15 pm
content: Quote from: Gary350z on September 18, 2018, 02:33:22 pmThanks Gary, I clearly haven't checked the latest TI datasheet version recently!The LM555 designation implies that it came from their Nat Semi acquisition.It does look as if it relies no the pulldown transistor coming out of saturation at higher currents - as far as I can see, they are using a common set of output sink figures for the discharge pin and the Output pin. Maximums just referenced to device dissipation.

author: TwinOak
author_rank: Newbie
timestamp: October 03, 2018, 11:49:48 pm
content: QuoteI didn't think that it mattered that much since we're dealing with the current consumption (mostly) dictated by the external components and not the chip itself.QuoteNow we're getting to the interesting stuff, thanks! I'll probably dig down into building discrete solutions in the spirit of this for later designs. Regarding low power timers, I don't know, I'm not really into building super low power designs for the sake of it at this stage. I just thought it was interesting that you could get the 555 to run much more efficient as a monostable with just a few jellybean parts. Perhaps I should have been a bit more restrictive with my questions in the OP, for the sake of clarityI took the time to do some actual measurements. At 5V supply, the idle current of my particular LMC555 (with no charging circuit connected) is 100uA. With the FET/diode hack and R1 at 100k, the idle consumption rises to 150uA, regardless of the value of R2 (Rcharge), it could be anything from 0 ohms to open.With the standard 555 monostable circuit, of course I also get a current draw of 150uA when setting Rcharge to 100k, but this increases as the resistance goes down...0.6 mA at 10k, 4.9 mA at 1k, 42.9 mA at 100 ohms and peaking at around 98mA with 20 ohms. Lower than this and the chip throttles the current to 100 mA.(reposting the relevant part of the circuit for ease of access)I also checked to see how the timing would be influenced by the hack, for short pulses the duration increases somewhat, I assume beacause of losses in the FET, at longer durations it goes down because of the capacitor being "pre charged" to the Vf of the diode, and some initial reverse leakage. C3 at 220uF.QuoteI did some thinking around this, and realized that for the proposed mod it's not bad at all to use a schottky. The only time it's going to see a reverse bias condition is the first instances after the timer is triggered, when the + of the cap is basically at ground potential and pin 7 goes open (or high in this instance because of R1). It will alter the timing characteristics slightly, but not the idle current consumption.QuoteExactly what I've always thought! And personally there's another side to it, I've been programming for the best part of my life, it's just no challenge to program a measly timer.So why do I keep nagging about this quite insignificant mod? Probably because of the 555 being such a classic chip. I'm positive that I won't be the last person to base a design around it, just because there's so much info readily available. Hopefully there's someone else out there who finds it useful to squeeze 5 or 6 decades worth of pulse time from it without pissing away 100 mA (and finds this post).