Expected performance of multichannel FPGA controlled class D amplifier - Page 1
Forum section: electronics / general

author: Molenaar
author_rank: Regular Contributor
timestamp: August 26, 2016, 11:50:45 am
content: Dear all,I'm experienced with microcontrollers, but have no experience with FPGA's, although I have been reading up on them and VHDL.Currently I'm investigating the best way to current drive DC-coupled inductive loads (freq <= 50 kHz) in an energy efficient way based on spectral components of some measurements. Ideally the solution should scale to multiple channels, which is why I thought of an FPGA. The maximum total amount of power over all channels combined will be <10 watt, probably <5 watt most of the time. The load impedance per channel will probably be around 1k, although this can be redesigned if necessary.I'm not sure what kind of performance I can expect from a discrete class D controlled by a sigma-delta modulating FPGA. How does this compare to a discrete solution, e.g. one of the many class D chip amplifiers commercially available?

author: Ammar
author_rank: Regular Contributor
timestamp: August 26, 2016, 12:05:00 pm
content: Finding hard to follow what you are trying to achieve. Are you doing an FFT on the load and using that to decide how to drive the class D amplifier? Are you performing wireless power transfer? Or building a resonant converter of some kind? Is the driving of one channel based on the state of another channel? Would like to offer suggestions, just need more information.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2016, 03:08:01 pm
content: 10W into 1kohm is a lot of voltage, and won't give very efficient switching! The low frequency ~50kHz helps with this, though.Tim

author: Molenaar
author_rank: Regular Contributor
timestamp: August 26, 2016, 04:19:01 pm
content: Quote from: Ammar on August 26, 2016, 12:05:00 pmNot on the load, consider it an arbitrary signal. For every channel, I want to do an FFT and based on the peaks and phases for certain frequency bands, adjust the input for the amplifier.Quote from: T3sl4co1l on August 26, 2016, 03:08:01 pmThe 1k ohm could be adjusted to >= ~10 ohm. The 50 kHz is not the switching frequency, but should be the maximum signal frequency. The switching frequency should thus be a lot higher.

author: nctnico
author_rank: Super Contributor
timestamp: August 26, 2016, 05:53:23 pm
content: AFAIK all class D amplifier chips have a bandwidth less than 20kHz and most power needs to be delivered at much lower frequencies. Another problem you'll have with class D is filtering the harmonics which can be problematic if the load isn't constant (and what happens if the load gets disconnected; some filters may start peaking?). If the load is already inductive I'd try to PWM the load directly. There will be a sweet spot for input voltage and load impedance versus MOSFET Rdson and gate charge; you might want to make a spreadsheet for that to select the optimum. I don't know what your requirements are but for something which sounds similar I designed a 2 stage approach which varies the power supply voltage in order to vary the output power and a class-D stage to create the output waveform.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 26, 2016, 06:53:27 pm
content: Quote from: Molenaar on August 26, 2016, 04:19:01 pmThe load resistance makes a huge difference in the design! Is it a free variable? Why? What is it?Tim

author: Molenaar
author_rank: Regular Contributor
timestamp: August 26, 2016, 07:39:37 pm
content: It is a coil, of which I can wire up sections in series or in parallel, so I can adjust the load to the driving circuit, up to a certain extend.

author: T3sl4co1l
author_rank: Super Contributor
timestamp: August 27, 2016, 05:01:49 am
content: Ah, fewer turns (and more parallel sections) is definitely the better way to go here, then!Tim

author: Molenaar
author_rank: Regular Contributor
timestamp: August 30, 2016, 12:32:12 pm
content: If I indeed use more parallel sections, what kind of efficiency can I reasonably expect? Will I be significantly less, approximately equal or even better than dedicated class D chips (like audio ones)?I know only a ballpark figure can be given, but still I'm interested before I embark on learning a new technology. Thanks!

author: nctnico
author_rank: Super Contributor
timestamp: August 30, 2016, 02:46:47 pm
content: In an inductor parallel windings won't add to the inductance; they will only reduce the series resistance (and thus reduce copper losses).

author: diyaudio
author_rank: Frequent Contributor
timestamp: September 06, 2016, 09:07:45 pm
content: Quote from: nctnico on August 26, 2016, 05:53:23 pmA Universal Grammar of Class DAmplificationBruno Putzeyshttp://www.hypex.nl/docs/papers/AES124BP.pdf

author: diyaudio
author_rank: Frequent Contributor
timestamp: September 06, 2016, 09:18:02 pm
content: Quote from: Molenaar on August 26, 2016, 11:50:45 amNothing. All the analog behavior will need to be handled in the digital domain, there is no operating or audio benefit, up till today the challenge is still the same: How to develop a modulator that is able to handle complex loads.Listen to this talk.

author: CM800
author_rank: Frequent Contributor
timestamp: September 07, 2016, 03:44:00 pm
content: Quote from: evb149 on September 07, 2016, 01:10:53 amDon't forget MicroSemi's SmartFusion1/2 FPGA SoC:http://www.microsemi.com/products/fpga-soc/soc-fpga/smartfusion2