Troubleshooting: ST-LinkV2 fails to connect to STM32F030K6T6 - Page 1
Forum section: electronics / beginners

author: glebkooo
author_rank: Contributor
timestamp: October 22, 2023, 09:32:08 pm
content: Hi, would really appreciate some ideas on how to troubleshoot ST-Link to STM32F030K6T6 connectivity, details below.I've designed a following PCB that is intended to drive LoRa RA-02 module with bare STM32F030K6T6.Design is based on the "AN4325 - Getting started with STM32F030xx and STM32F070xx series hardware development".The only major exception is that I decided to use internal oscillator to save a space on the board.I'm a newbie in PCB design and this is my first project with STM32. Will be glad to hear some feedback regarding the design.After assembling I faced problems with flashing MCU: openocd, nor STM32 ST-Link Utility was able to recognize the chip.What I've tried so far:checked power supply to VDD, VDDA pins after LDO with multimeter -> Okay, 3.3Vchecked, how I soldered decoupling capacitorschecked, how I soldered all the MCU pins to PCBre-soldered another chip of the same make and modelremoved C3connected BOOT0 to VDDmonitored serial connection when BOOT0 pin was tied to VDDtried to program it with NRST connected to RST pin on ST-Linktried to program it with NRST connected to GND / VDD (3.3V) / left floatingchecked ST-Link, connected it to a BluePill -> that's not an ST-Link issueTried different target settings in ST-Link Utility: lowered SWD speed - set < 1 MHz, tried different modes: Normal, Hot Plug, Connect Under ResetTried all the Reset Modes in ST-Link UtilityImportant notes:ST-Link V2 dongle is 100% not genuineI am not sure the STM32F030s are genuine, bought few pcs on the local market, $0.95 eachFeeling exhausted now, will be glad to hear some other ideas to try, maybe I am missing something.The next steps I would try:- add an external 8 MHz crystal, because almost all the breakout boards do this- play with development board with that MCU, replace my chip with one from dev board- order parts from Mouser and wait a month for delivery, in parallel - try another local supplier

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 09:57:28 pm
content: What does openocd print in the log specifically?

author: glebkooo
author_rank: Contributor
timestamp: October 22, 2023, 10:14:17 pm
content: Here is the log from openocd:QuoteThe same if I lower the speed to 100 kHz.And here is my openocd.cfg:

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 10:21:22 pm
content: Add "-d3" for more detailed debug information and also add -c "transport select swd" for plain SWD.

author: glebkooo
author_rank: Contributor
timestamp: October 22, 2023, 10:41:18 pm
content: Changed config to use stlink-v2 interface. Failed to pass "transport select swd" via command line, seems one of the nested config files selects transport automatically and doesn't allow to change it later on. Will try to switch transport in a different way.Here is a verbose log from openocd without "transport select swd" command.upd: inserted "transport select swd" command into the project's openocd config file after st-link config loading, but before loading target config.Seems my programmer doesn't support this transport.Quote

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 10:59:32 pm
content: I'm not too familiar with STLink, but from this log it looks like it tries to create a JTAG chain. I would force "transport select swd" just to see if that makes any difference.You pass it asQuoteAlso, what is in the openocd.cfg ?

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 11:01:04 pm
content: This seems to be something ST-Link specific, no idea, never used them.

author: glebkooo
author_rank: Contributor
timestamp: October 22, 2023, 11:20:41 pm
content: Here is what in openocd.cfg file after my experiments with no luck:Code:#OpenOCD configuration file, generated by STM32 for VSCode#transport select swd# Programmer, can be changed to several interfaces# Standard will be the stlink interface as this is the standard for STM32 dev boardssource [find interface/stlink.cfg]# The target MCU. This should match your boardsource [find target/stm32f0x.cfg]reset_config trst_and_srst srst_nogate connect_assert_srst# My custom configadapter speed 5

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 11:25:59 pm
content: Try moving "transport select swd" after the interface include and before the target include. Not sure how much of a difference it makes, but this is the way it is in my scripts.

author: glebkooo
author_rank: Contributor
timestamp: October 22, 2023, 11:39:09 pm
content: Here is updated config file:Code:#OpenOCD configuration file, generated by STM32 for VSCode#transport select swd# Programmer, can be changed to several interfaces# Standard will be the stlink interface as this is the standard for STM32 dev boardssource [find interface/stlink.cfg]transport select swd# The target MCU. This should match your boardsource [find target/stm32f0x.cfg]# My custom configadapter speed 5And here is an output:Code:openocd -f ./openocd.cfg -d3 -c "program build/stm32f030k6t6.elf verify reset exit"xPack Open On-Chip Debugger 0.12.0+dev-01312-g18281b0c4-dirty (2023-09-04-22:32)Licensed under GNU GPL v2For bug reports, readhttp://openocd.org/doc/doxygen/bugs.htmlUser : 3 1 options.c:52 configuration_output_handler(): debug_level: 3User : 4 1 options.c:52 configuration_output_handler():Debug: 5 1 options.c:233 add_default_dirs(): bindir=/__w/openocd-xpack/openocd-xpack/build/win32-x64/application/binDebug: 6 2 options.c:234 add_default_dirs(): pkgdatadir=/__w/openocd-xpack/openocd-xpack/build/win32-x64/application/openocdDebug: 7 2 options.c:235 add_default_dirs(): exepath=C:/Users/gleb/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-2.1/.content/binDebug: 8 2 options.c:236 add_default_dirs(): bin2data=../openocdDebug: 9 2 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/AppData/Roaming/OpenOCDDebug: 10 2 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.config/openocdDebug: 11 2 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.openocdDebug: 12 2 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-2.1/.content/bin/../openocd/siteDebug: 13 2 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-2.1/.content/bin/../openocd/scriptsDebug: 14 2 command.c:152 script_debug(): command - ocd_find ./openocd.cfgDebug: 15 3 configuration.c:88 find_file(): found ./openocd.cfgDebug: 16 3 command.c:152 script_debug(): command - ocd_find interface/stlink.cfgDebug: 17 3 configuration.c:88 find_file(): found C:/Users/gleb/AppData/Roaming/Code/User/globalStorage/bmd.stm32-for-vscode/@xpack-dev-tools/openocd/0.12.0-2.1/.content/bin/../openocd/scripts/interface/stlink.cfgDebug: 18 4 command.c:152 script_debug(): command - adapter driver hlaDebug: 19 4 command.c:152 script_debug(): command - hla_layout stlinkDebug: 20 4 hla_interface.c:229 hl_interface_handle_layout_command(): hl_interface_handle_layout_commandDebug: 21 4 command.c:152 script_debug(): command - hla_device_desc ST-LINKDebug: 22 4 hla_interface.c:216 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_commandDebug: 23 4 command.c:152 script_debug(): command - hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b 0x0483 0x374d 0x0483 0x374e 0x0483 0x374f 0x0483 0x3752 0x0483 0x3753 0x0483 0x3754 0x0483 0x3755 0x0483 0x3757Debug: 24 4 command.c:152 script_debug(): command - transport select swdDebug: 25 4 command.c:541 run_command(): Command 'transport select' failed with error code -4User : 26 5 command.c:613 command_run_line(): Debug adapter doesn't support 'swd' transportIt says my st-link device doesn't support 'swd' transport...

author: Psi
author_rank: Super Contributor
timestamp: October 22, 2023, 11:39:36 pm
content: I program my STM32F042 with the 'stm32flash' utility in linux.If you have a linux pc you could try see if that works.egstm32flash -w myhexfile.hex -b 57600 -v COM4add -j if you want to lock the chip (enable flash read protection)When I program boards I sometimes have to glitch the reset pin to get the board to enter serial bootloader mode.Usually it starts up in boot mode but not every time.

author: ataradov
author_rank: Super Contributor
timestamp: October 22, 2023, 11:45:53 pm
content: Yes, this is something specific to ST-Link. ST forums may have a better answer.I don't think there is anything wrong with your hardware, it seems fine.If you have access to any RP2040 board, turn it into CMSIS-DAP debugger and try with that.But if it works with bluepill, then settings should be fine. Capture the log from that and compare where they diverge.

author: DavidAlfa
author_rank: Super Contributor
timestamp: October 23, 2023, 12:31:07 am
content: Have your tried cubeProgrammer? Is the ST-Link FW updated?

author: glebkooo
author_rank: Contributor
timestamp: October 23, 2023, 03:20:12 pm
content: Tried to program my board with Picoprobe - no luck.Pressing reset on my board during / before openocd operation didn't help.openocd.cfg:Code:source [find interface/cmsis-dap.cfg]transport select swdsource [find target/stm32f0x.cfg]adapter speed 100openocd verbose output:Code:Open On-Chip Debugger 0.12.0 (2023-10-02) [https://github.com/sysprogs/openocd]Licensed under GNU GPL v2libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3For bug reports, readhttp://openocd.org/doc/doxygen/bugs.htmlUser : 4 0 options.c:53 configuration_output_handler(): debug_level: 3User : 5 0 options.c:53 configuration_output_handler():Debug: 6 0 options.c:234 add_default_dirs(): bindir=../../binDebug: 7 0 options.c:235 add_default_dirs(): pkgdatadir=../../share/openocdDebug: 8 0 options.c:236 add_default_dirs(): exepath=C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/binDebug: 9 0 options.c:237 add_default_dirs(): bin2data=../share/openocdDebug: 10 0 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/AppData/Roaming/OpenOCDDebug: 11 16 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.config/openocdDebug: 12 16 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.openocdDebug: 13 16 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/siteDebug: 14 16 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scriptsDebug: 15 16 command.c:152 script_debug(): command - ocd_find ./openocd.cfgDebug: 16 16 configuration.c:88 find_file(): found ./openocd.cfgDebug: 17 16 command.c:152 script_debug(): command - ocd_find interface/cmsis-dap.cfgDebug: 18 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/interface/cmsis-dap.cfgDebug: 19 16 command.c:152 script_debug(): command - adapter driver cmsis-dapDebug: 20 16 command.c:152 script_debug(): command - transport select swdDebug: 21 16 command.c:152 script_debug(): command - ocd_find target/stm32f0x.cfgDebug: 22 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/target/stm32f0x.cfgDebug: 23 16 command.c:152 script_debug(): command - ocd_find target/swj-dp.tclDebug: 24 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/target/swj-dp.tclDebug: 25 16 command.c:152 script_debug(): command - transport selectDebug: 26 16 command.c:152 script_debug(): command - ocd_find mem_helper.tclDebug: 27 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/mem_helper.tclDebug: 28 16 command.c:152 script_debug(): command - add_usage_text mrw addressDebug: 29 16 command.c:152 script_debug(): command - add_help_text mrw Returns value of word in memory.Debug: 30 16 command.c:152 script_debug(): command - add_usage_text mrh addressDebug: 31 16 command.c:152 script_debug(): command - add_help_text mrh Returns value of halfword in memory.Debug: 32 16 command.c:152 script_debug(): command - add_usage_text mrb addressDebug: 33 16 command.c:152 script_debug(): command - add_help_text mrb Returns value of byte in memory.Debug: 34 16 command.c:152 script_debug(): command - add_usage_text mmw address setbits clearbitsDebug: 35 16 command.c:152 script_debug(): command - add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;Debug: 36 16 command.c:152 script_debug(): command - transport selectDebug: 37 16 command.c:152 script_debug(): command - transport selectDebug: 38 16 command.c:152 script_debug(): command - swd newdap stm32f0x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0bb11477Debug: 39 16 tcl.c:418 handle_jtag_newtap_args(): Creating New Tap, Chip: stm32f0x, Tap: cpu, Dotted: stm32f0x.cpu, 8 paramsDebug: 40 16 core.c:1474 jtag_tap_init(): Created Tap: stm32f0x.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xfDebug: 41 16 command.c:152 script_debug(): command - dap create stm32f0x.dap -chain-position stm32f0x.cpuDebug: 42 16 command.c:152 script_debug(): command - target create stm32f0x.cpu cortex_m -endian little -dap stm32f0x.dapDebug: 43 31 command.c:286 register_command(): command 'tpiu' is already registeredDebug: 44 31 command.c:286 register_command(): command 'rtt' is already registeredDebug: 45 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0Debug: 46 31 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 47 31 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 48 31 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 49 31 command.c:152 script_debug(): command - flash bank stm32f0x.flash stm32f1x 0x08000000 0 0 0 stm32f0x.cpuDebug: 50 31 tcl.c:1306 handle_flash_bank_command(): 'stm32f1x' driver usage field missingDebug: 51 31 command.c:152 script_debug(): command - adapter speed 1000Debug: 52 31 adapter.c:249 adapter_config_khz(): handle adapter khzDebug: 53 31 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 54 31 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 55 31 command.c:152 script_debug(): command - adapter srst delay 100Debug: 56 31 command.c:152 script_debug(): command - reset_config srst_nogateDebug: 57 31 command.c:152 script_debug(): command - transport selectDebug: 58 31 command.c:152 script_debug(): command - cortex_m reset_config sysresetreqDebug: 59 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event examine-end stm32f0x_default_examine_endDebug: 60 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event reset-start stm32f0x_default_reset_startDebug: 61 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event reset-init stm32f0x_default_reset_initDebug: 62 31 command.c:152 script_debug(): command - adapter speed 100Debug: 63 31 adapter.c:249 adapter_config_khz(): handle adapter khzDebug: 64 31 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 65 31 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueUser : 66 31 options.c:53 configuration_output_handler(): adapter speed: 100 kHzUser : 67 31 options.c:53 configuration_output_handler():Debug: 68 31 command.c:152 script_debug(): command - initDebug: 69 31 command.c:152 script_debug(): command - target initDebug: 70 31 command.c:152 script_debug(): command - target namesDebug: 71 31 command.c:152 script_debug(): command - stm32f0x.cpu cget -event gdb-flash-erase-startDebug: 72 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event gdb-flash-erase-start reset initDebug: 73 31 command.c:152 script_debug(): command - stm32f0x.cpu cget -event gdb-flash-write-endDebug: 74 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event gdb-flash-write-end reset haltDebug: 75 31 command.c:152 script_debug(): command - stm32f0x.cpu cget -event gdb-attachDebug: 76 31 command.c:152 script_debug(): command - stm32f0x.cpu configure -event gdb-attach halt 1000Debug: 77 31 target.c:1629 handle_target_init_command(): Initializing targets...Debug: 78 31 semihosting_common.c:107 semihosting_common_init():Debug: 79 47 cmsis_dap_usb_bulk.c:105 cmsis_dap_usb_open(): could not open device 0x8086:0x9a13: Operation not supported or unimplemented on this platformDebug: 80 47 cmsis_dap_usb_bulk.c:105 cmsis_dap_usb_open(): could not open device 0x04f3:0x0c6e: Operation not supported or unimplemented on this platformDebug: 81 47 cmsis_dap_usb_bulk.c:150 cmsis_dap_usb_open(): found product string of 0x2e8a:0x000c 'Picoprobe (CMSIS-DAP)'Debug: 82 47 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x2e8a:0x000cDebug: 83 47 cmsis_dap_usb_bulk.c:217 cmsis_dap_usb_open(): found interface 0 string 'CMSIS-DAP v2 Interface'Info : 84 47 cmsis_dap_usb_bulk.c:320 cmsis_dap_usb_open(): Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E66014A81F1E6925Info : 85 78 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: SWD supportedInfo : 86 78 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: Atomic commands supportedInfo : 87 78 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: Test domain timer supportedInfo : 88 78 cmsis_dap.c:1089 cmsis_dap_get_version_info(): CMSIS-DAP: FW Version = 2.0.0Info : 89 78 cmsis_dap.c:1243 cmsis_dap_swd_open(): CMSIS-DAP: Interface Initialised (SWD)Debug: 90 78 cmsis_dap.c:1328 cmsis_dap_init(): CMSIS-DAP: Packet Count = 2Debug: 91 78 cmsis_dap.c:1331 cmsis_dap_init(): Allocating FIFO for 2 pending packetsInfo : 92 78 cmsis_dap.c:1145 cmsis_dap_get_status(): SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0Info : 93 78 cmsis_dap.c:1383 cmsis_dap_init(): CMSIS-DAP: Interface readyDebug: 94 78 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 95 78 adapter.c:217 adapter_khz_to_speed(): have adapter set upDebug: 96 78 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 97 78 adapter.c:217 adapter_khz_to_speed(): have adapter set upInfo : 98 78 adapter.c:177 adapter_init(): clock speed 100 kHzDebug: 99 78 openocd.c:133 handle_init_command(): Debug Adapter init completeDebug: 100 78 command.c:152 script_debug(): command - transport initDebug: 101 78 transport.c:219 handle_transport_init(): handle_transport_initDebug: 102 78 command.c:152 script_debug(): command - dap initDebug: 103 78 arm_dap.c:95 dap_init_all(): Initializing all DAPs ...Debug: 104 78 arm_dap.c:119 dap_init_all(): DAP stm32f0x.cpu configured by default to use ADIv5 protocolDebug: 105 78 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 106 78 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 107 94 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 108 94 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 109 94 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 110 109 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 111 109 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 112 125 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 113 125 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 114 125 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 115 141 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 116 141 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 117 156 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 118 156 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 119 156 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 120 172 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 121 172 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 122 188 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 123 188 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 124 188 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 125 203 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 126 203 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 127 219 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 128 219 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 129 219 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 130 234 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 131 234 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 132 252 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 133 253 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 134 257 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 135 269 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 136 271 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 137 276 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 138 276 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 139 276 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 140 292 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 141 292 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 142 307 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 143 307 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 144 307 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 145 323 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 146 323 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 147 339 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 148 339 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 149 339 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 150 354 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 151 354 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 152 370 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 153 370 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 154 370 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 155 386 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 156 386 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 157 401 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 158 401 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 159 401 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 160 417 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 161 417 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 162 432 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 163 432 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 164 432 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 165 448 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 166 448 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 167 464 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 168 464 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 169 464 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 170 479 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 171 479 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 172 495 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 173 495 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 174 495 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 175 511 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 176 511 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 177 526 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 178 526 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 179 526 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 180 542 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDDebug: 181 546 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKDebug: 182 557 cmsis_dap.c:1192 cmsis_dap_swd_switch_seq(): JTAG-to-DORMANTDebug: 183 559 cmsis_dap.c:1207 cmsis_dap_swd_switch_seq(): DORMANT-to-SWDDebug: 184 564 cmsis_dap.c:891 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 JUNKError: 185 580 adi_v5_swd.c:366 swd_connect_single(): Error connecting DP: cannot read IDRDebug: 186 580 command.c:541 run_command(): Command 'dap init' failed with error code -4User : 187 580 command.c:613 command_run_line(): in procedure 'program'Debug: 188 580 command.c:541 run_command(): Command 'init' failed with error code -4Debug: 189 581 command.c:152 script_debug(): command - echo ** OpenOCD init failed **User : 190 581 command.c:690 handle_echo(): ** OpenOCD init failed **Debug: 191 581 command.c:152 script_debug(): command - shutdown errorUser : 192 581 server.c:758 handle_shutdown_command(): shutdown command invokedDebug: 193 581 command.c:541 run_command(): Command 'shutdown' failed with error code -4User : 194 582 command.c:613 command_run_line():Debug: 195 582 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 196 583 cmsis_dap.c:1197 cmsis_dap_swd_switch_seq(): SWD-to-JTAGHowever, successfully programmed BluePill (STM32F103C8T6) with the boilerplate code that was generated by STM32CubeMX for that chip:Code:Open On-Chip Debugger 0.12.0 (2023-10-02) [https://github.com/sysprogs/openocd]Licensed under GNU GPL v2libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3For bug reports, readhttp://openocd.org/doc/doxygen/bugs.htmlUser : 4 0 options.c:53 configuration_output_handler(): debug_level: 3User : 5 0 options.c:53 configuration_output_handler():Debug: 6 0 options.c:234 add_default_dirs(): bindir=../../binDebug: 7 0 options.c:235 add_default_dirs(): pkgdatadir=../../share/openocdDebug: 8 0 options.c:236 add_default_dirs(): exepath=C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/binDebug: 9 0 options.c:237 add_default_dirs(): bin2data=../share/openocdDebug: 10 16 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/AppData/Roaming/OpenOCDDebug: 11 16 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.config/openocdDebug: 12 16 configuration.c:33 add_script_search_dir(): adding C:\Users\gleb/.openocdDebug: 13 16 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/siteDebug: 14 16 configuration.c:33 add_script_search_dir(): adding C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scriptsDebug: 15 16 command.c:152 script_debug(): command - ocd_find ./openocd.cfgDebug: 16 16 configuration.c:88 find_file(): found ./openocd.cfgDebug: 17 16 command.c:152 script_debug(): command - ocd_find interface/cmsis-dap.cfgDebug: 18 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/interface/cmsis-dap.cfgDebug: 19 16 command.c:152 script_debug(): command - adapter driver cmsis-dapDebug: 20 16 command.c:152 script_debug(): command - transport select swdDebug: 21 16 command.c:152 script_debug(): command - ocd_find target/stm32f1x.cfgDebug: 22 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/target/stm32f1x.cfgDebug: 23 16 command.c:152 script_debug(): command - ocd_find target/swj-dp.tclDebug: 24 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/target/swj-dp.tclDebug: 25 16 command.c:152 script_debug(): command - transport selectDebug: 26 16 command.c:152 script_debug(): command - ocd_find mem_helper.tclDebug: 27 16 configuration.c:88 find_file(): found C:/Users/gleb/Downloads/openocd-20231002/OpenOCD-20231002-0.12.0/bin/../share/openocd/scripts/mem_helper.tclDebug: 28 16 command.c:152 script_debug(): command - add_usage_text mrw addressDebug: 29 16 command.c:152 script_debug(): command - add_help_text mrw Returns value of word in memory.Debug: 30 16 command.c:152 script_debug(): command - add_usage_text mrh addressDebug: 31 16 command.c:152 script_debug(): command - add_help_text mrh Returns value of halfword in memory.Debug: 32 16 command.c:152 script_debug(): command - add_usage_text mrb addressDebug: 33 16 command.c:152 script_debug(): command - add_help_text mrb Returns value of byte in memory.Debug: 34 16 command.c:152 script_debug(): command - add_usage_text mmw address setbits clearbitsDebug: 35 16 command.c:152 script_debug(): command - add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;Debug: 36 16 command.c:152 script_debug(): command - transport selectDebug: 37 16 command.c:152 script_debug(): command - transport selectDebug: 38 16 command.c:152 script_debug(): command - transport selectDebug: 39 16 command.c:152 script_debug(): command - swd newdap stm32f1x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477Debug: 40 16 tcl.c:418 handle_jtag_newtap_args(): Creating New Tap, Chip: stm32f1x, Tap: cpu, Dotted: stm32f1x.cpu, 8 paramsDebug: 41 16 core.c:1474 jtag_tap_init(): Created Tap: stm32f1x.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xfDebug: 42 16 command.c:152 script_debug(): command - dap create stm32f1x.dap -chain-position stm32f1x.cpuDebug: 43 16 command.c:152 script_debug(): command - transport selectDebug: 44 16 command.c:152 script_debug(): command - target create stm32f1x.cpu cortex_m -endian little -dap stm32f1x.dapDebug: 45 16 command.c:286 register_command(): command 'tpiu' is already registeredDebug: 46 16 command.c:286 register_command(): command 'rtt' is already registeredDebug: 47 16 command.c:152 script_debug(): command - stm32f1x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0Debug: 48 16 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 49 16 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 50 16 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 51 16 command.c:152 script_debug(): command - flash bank stm32f1x.flash stm32f1x 0x08000000 0 0 0 stm32f1x.cpuDebug: 52 16 tcl.c:1306 handle_flash_bank_command(): 'stm32f1x' driver usage field missingDebug: 53 16 command.c:152 script_debug(): command - adapter speed 1000Debug: 54 16 adapter.c:249 adapter_config_khz(): handle adapter khzDebug: 55 16 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 56 16 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 57 16 command.c:152 script_debug(): command - adapter srst delay 100Debug: 58 16 command.c:152 script_debug(): command - transport selectDebug: 59 16 command.c:152 script_debug(): command - reset_config srst_nogateDebug: 60 16 command.c:152 script_debug(): command - transport selectDebug: 61 16 command.c:152 script_debug(): command - cortex_m reset_config sysresetreqDebug: 62 16 command.c:152 script_debug(): command - stm32f1x.cpu configure -event examine-end# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |# DBG_STANDBY | DBG_STOP | DBG_SLEEPmmw 0xE0042004 0x00000307 0Debug: 63 32 command.c:152 script_debug(): command - tpiu create stm32f1x.tpiu -dap stm32f1x.dap -ap-num 0 -baseaddr 0xE0040000Debug: 64 32 command.c:152 script_debug(): command - stm32f1x.tpiu configure -event pre-enable _proc_pre_enable_stm32f1x.tpiu stm32f1x.cpuDebug: 65 32 command.c:152 script_debug(): command - initDebug: 66 32 command.c:152 script_debug(): command - target initDebug: 67 32 command.c:152 script_debug(): command - target namesDebug: 68 32 command.c:152 script_debug(): command - stm32f1x.cpu cget -event gdb-flash-erase-startDebug: 69 32 command.c:152 script_debug(): command - stm32f1x.cpu configure -event gdb-flash-erase-start reset initDebug: 70 32 command.c:152 script_debug(): command - stm32f1x.cpu cget -event gdb-flash-write-endDebug: 71 32 command.c:152 script_debug(): command - stm32f1x.cpu configure -event gdb-flash-write-end reset haltDebug: 72 32 command.c:152 script_debug(): command - stm32f1x.cpu cget -event gdb-attachDebug: 73 32 command.c:152 script_debug(): command - stm32f1x.cpu configure -event gdb-attach halt 1000Debug: 74 32 target.c:1629 handle_target_init_command(): Initializing targets...Debug: 75 32 semihosting_common.c:107 semihosting_common_init():Debug: 76 47 cmsis_dap_usb_bulk.c:105 cmsis_dap_usb_open(): could not open device 0x8086:0x9a13: Operation not supported or unimplemented on this platformDebug: 77 47 cmsis_dap_usb_bulk.c:105 cmsis_dap_usb_open(): could not open device 0x04f3:0x0c6e: Operation not supported or unimplemented on this platformDebug: 78 47 cmsis_dap_usb_bulk.c:150 cmsis_dap_usb_open(): found product string of 0x2e8a:0x000c 'Picoprobe (CMSIS-DAP)'Debug: 79 47 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x2e8a:0x000cDebug: 80 47 cmsis_dap_usb_bulk.c:217 cmsis_dap_usb_open(): found interface 0 string 'CMSIS-DAP v2 Interface'Info : 81 47 cmsis_dap_usb_bulk.c:320 cmsis_dap_usb_open(): Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E66014A81F1E6925Info : 82 74 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: SWD supportedInfo : 83 74 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: Atomic commands supportedInfo : 84 74 cmsis_dap.c:1112 cmsis_dap_get_caps_info(): CMSIS-DAP: Test domain timer supportedInfo : 85 74 cmsis_dap.c:1089 cmsis_dap_get_version_info(): CMSIS-DAP: FW Version = 2.0.0Info : 86 74 cmsis_dap.c:1243 cmsis_dap_swd_open(): CMSIS-DAP: Interface Initialised (SWD)Debug: 87 74 cmsis_dap.c:1328 cmsis_dap_init(): CMSIS-DAP: Packet Count = 2Debug: 88 74 cmsis_dap.c:1331 cmsis_dap_init(): Allocating FIFO for 2 pending packetsInfo : 89 74 cmsis_dap.c:1145 cmsis_dap_get_status(): SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0Info : 90 84 cmsis_dap.c:1383 cmsis_dap_init(): CMSIS-DAP: Interface readyDebug: 91 85 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 92 85 adapter.c:217 adapter_khz_to_speed(): have adapter set upDebug: 93 85 adapter.c:213 adapter_khz_to_speed(): convert khz to adapter specific speed valueDebug: 94 85 adapter.c:217 adapter_khz_to_speed(): have adapter set upInfo : 95 85 adapter.c:177 adapter_init(): clock speed 1000 kHzDebug: 96 85 openocd.c:133 handle_init_command(): Debug Adapter init completeDebug: 97 85 command.c:152 script_debug(): command - transport initDebug: 98 85 transport.c:219 handle_transport_init(): handle_transport_initDebug: 99 85 command.c:152 script_debug(): command - dap initDebug: 100 85 arm_dap.c:95 dap_init_all(): Initializing all DAPs ...Debug: 101 85 arm_dap.c:119 dap_init_all(): DAP stm32f1x.cpu configured by default to use ADIv5 protocolDebug: 102 92 cmsis_dap.c:1187 cmsis_dap_swd_switch_seq(): JTAG-to-SWDInfo : 103 92 adi_v5_swd.c:370 swd_connect_single(): SWD DPIDR 0x2ba01477Debug: 104 92 arm_adi_v5.c:679 dap_dp_init(): stm32f1x.dapDebug: 105 92 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACKDebug: 106 92 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000Debug: 107 92 arm_adi_v5.c:719 dap_dp_init(): DAP: wait CSYSPWRUPACKDebug: 108 92 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000Debug: 109 98 cmsis_dap.c:817 cmsis_dap_swd_write_from_queue(): refusing to enable sticky overrun detectionDebug: 110 99 openocd.c:150 handle_init_command(): Examining targets...Debug: 111 99 target.c:1815 target_call_event_callbacks(): target event 19 (examine-start) for core stm32f1x.cpuDebug: 112 100 arm_adi_v5.c:1095 dap_get_ap(): refcount AP#0x0 get 1Debug: 113 101 arm_adi_v5.c:1038 dap_find_get_ap(): Found MEM-AP AHB3 at AP index: 0 (IDR=0x24770011)Debug: 114 102 arm_adi_v5.c:825 mem_ap_init(): MEM_AP Packed Transfers: enabledDebug: 115 103 arm_adi_v5.c:836 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0Debug: 116 104 target.c:2600 target_read_u32(): address: 0xe000ed00, value: 0x412fc231Info : 117 105 cortex_m.c:2727 cortex_m_examine(): [stm32f1x.cpu] Cortex-M3 r2p1 processor detectedDebug: 118 105 cortex_m.c:2742 cortex_m_examine(): [stm32f1x.cpu] cpuid: 0x412fc231Debug: 119 105 target.c:2600 target_read_u32(): address: 0xe000edf0, value: 0x03010001Debug: 120 106 cortex_m.c:2799 cortex_m_examine(): [stm32f1x.cpu] reset happened some time ago, ignoreDebug: 121 106 target.c:2688 target_write_u32(): address: 0xe000edfc, value: 0x01000000Debug: 122 108 target.c:2600 target_read_u32(): address: 0xe0002000, value: 0x00000261Debug: 123 108 target.c:2688 target_write_u32(): address: 0xe0002008, value: 0x00000000Debug: 124 108 target.c:2688 target_write_u32(): address: 0xe000200c, value: 0x00000000Debug: 125 108 target.c:2688 target_write_u32(): address: 0xe0002010, value: 0x00000000Debug: 126 108 target.c:2688 target_write_u32(): address: 0xe0002014, value: 0x00000000Debug: 127 108 target.c:2688 target_write_u32(): address: 0xe0002018, value: 0x00000000Debug: 128 108 target.c:2688 target_write_u32(): address: 0xe000201c, value: 0x00000000Debug: 129 108 target.c:2688 target_write_u32(): address: 0xe0002020, value: 0x00000000Debug: 130 108 target.c:2688 target_write_u32(): address: 0xe0002024, value: 0x00000000Debug: 131 115 cortex_m.c:2846 cortex_m_examine(): [stm32f1x.cpu] FPB fpcr 0x261, numcode 6, numlit 2Debug: 132 116 target.c:2600 target_read_u32(): address: 0xe0001000, value: 0x40000000Debug: 133 117 cortex_m.c:2545 cortex_m_dwt_setup(): [stm32f1x.cpu] DWT_CTRL: 0x40000000Debug: 134 118 target.c:2600 target_read_u32(): address: 0xe0001fbc, value: 0x00000000Debug: 135 118 cortex_m.c:2552 cortex_m_dwt_setup(): [stm32f1x.cpu] DWT_DEVARCH: 0x0Debug: 136 119 target.c:2688 target_write_u32(): address: 0xe0001028, value: 0x00000000Debug: 137 120 target.c:2688 target_write_u32(): address: 0xe0001038, value: 0x00000000Debug: 138 121 target.c:2688 target_write_u32(): address: 0xe0001048, value: 0x00000000Debug: 139 123 target.c:2688 target_write_u32(): address: 0xe0001058, value: 0x00000000Debug: 140 127 cortex_m.c:2599 cortex_m_dwt_setup(): [stm32f1x.cpu] DWT dwtcr 0x40000000, comp 4, watch/triggerInfo : 141 128 cortex_m.c:2856 cortex_m_examine(): [stm32f1x.cpu] target has 6 breakpoints, 4 watchpointsDebug: 142 129 target.c:1815 target_call_event_callbacks(): target event 21 (examine-end) for core stm32f1x.cpuDebug: 143 130 target.c:5154 target_handle_event(): target(0): stm32f1x.cpu (cortex_m) event: 21 (examine-end) action:# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |# DBG_STANDBY | DBG_STOP | DBG_SLEEPmmw 0xE0042004 0x00000307 0Debug: 144 131 command.c:152 script_debug(): command - read_memory 0xE0042004 32 1Debug: 145 133 command.c:152 script_debug(): command - mww 0xE0042004 775Debug: 146 133 command.c:152 script_debug(): command - flash initDebug: 147 134 tcl.c:1363 handle_flash_init_command(): Initializing flash devices...Debug: 148 134 command.c:152 script_debug(): command - nand initDebug: 149 134 tcl.c:484 handle_nand_init_command(): Initializing NAND devices...Debug: 150 135 command.c:152 script_debug(): command - pld initDebug: 151 135 pld.c:337 handle_pld_init_command(): Initializing PLDs...Debug: 152 135 command.c:152 script_debug(): command - tpiu initInfo : 153 135 gdb_server.c:3836 gdb_target_start(): starting gdb server for stm32f1x.cpu on 3333Info : 154 136 server.c:297 add_service(): Listening on port 3333 for gdb connectionsDebug: 155 137 command.c:152 script_debug(): command - reset initDebug: 156 137 target.c:1834 target_call_reset_callbacks(): target reset 3 (init)Debug: 157 137 command.c:152 script_debug(): command - target namesDebug: 158 138 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-startDebug: 159 138 command.c:152 script_debug(): command - transport selectDebug: 160 138 command.c:152 script_debug(): command - transport selectDebug: 161 138 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event examine-startDebug: 162 139 command.c:152 script_debug(): command - stm32f1x.cpu arp_examine allow-deferDebug: 163 141 arm_adi_v5.c:825 mem_ap_init(): MEM_AP Packed Transfers: enabledDebug: 164 141 arm_adi_v5.c:836 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0Debug: 165 141 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event examine-endDebug: 166 142 target.c:5154 target_handle_event(): target(0): stm32f1x.cpu (cortex_m) event: 21 (examine-end) action:# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |# DBG_STANDBY | DBG_STOP | DBG_SLEEPmmw 0xE0042004 0x00000307 0Debug: 167 143 command.c:152 script_debug(): command - read_memory 0xE0042004 32 1Debug: 168 144 command.c:152 script_debug(): command - mww 0xE0042004 775Debug: 169 144 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-assert-preDebug: 170 145 command.c:152 script_debug(): command - transport selectDebug: 171 145 command.c:152 script_debug(): command - stm32f1x.cpu arp_reset assert 1Debug: 172 145 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 173 146 cortex_m.c:1760 cortex_m_assert_reset(): [stm32f1x.cpu] target->state: unknown, examinedDebug: 174 147 cortex_m.c:1879 cortex_m_assert_reset(): [stm32f1x.cpu] Using Cortex-M SYSRESETREQDebug: 175 149 arm_adi_v5.c:754 dap_dp_init_or_reconnect(): stm32f1x.dapDebug: 176 151 arm_adi_v5.c:679 dap_dp_init(): stm32f1x.dapDebug: 177 152 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACKDebug: 178 152 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000Debug: 179 152 arm_adi_v5.c:719 dap_dp_init(): DAP: wait CSYSPWRUPACKDebug: 180 152 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000Debug: 181 152 cmsis_dap.c:817 cmsis_dap_swd_write_from_queue(): refusing to enable sticky overrun detectionDebug: 182 246 cortex_m.c:1104 cortex_m_halt_one(): [stm32f1x.cpu] target->state: resetDebug: 183 246 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-assert-postDebug: 184 246 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-deassert-preDebug: 185 246 command.c:152 script_debug(): command - transport selectDebug: 186 246 command.c:152 script_debug(): command - stm32f1x.cpu arp_reset deassert 1Debug: 187 246 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 188 246 cortex_m.c:1932 cortex_m_deassert_reset(): [stm32f1x.cpu] target->state: reset, examinedDebug: 189 246 core.c:640 adapter_system_reset(): SRST line releasedDebug: 190 406 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-deassert-postDebug: 191 406 command.c:152 script_debug(): command - transport selectDebug: 192 406 command.c:152 script_debug(): command - stm32f1x.cpu was_examinedDebug: 193 406 command.c:152 script_debug(): command - stm32f1x.cpu arp_waitstate halted 1000Debug: 194 406 target.c:3258 target_wait_state(): waiting for target halted...Debug: 195 406 cortex_m.c:936 cortex_m_poll_one(): [stm32f1x.cpu] Exit from reset with dcb_dhcsr 0x30003Debug: 196 406 cortex_m.c:606 cortex_m_endreset_event(): [stm32f1x.cpu] DCB_DEMCR = 0x01000501Debug: 197 406 target.c:2688 target_write_u32(): address: 0xe0002000, value: 0x00000003Debug: 198 411 target.c:2600 target_read_u32(): address: 0xe0002000, value: 0x00000261Debug: 199 411 target.c:2688 target_write_u32(): address: 0xe0002008, value: 0x00000000Debug: 200 412 target.c:2688 target_write_u32(): address: 0xe000200c, value: 0x00000000Debug: 201 412 target.c:2688 target_write_u32(): address: 0xe0002010, value: 0x00000000Debug: 202 412 target.c:2688 target_write_u32(): address: 0xe0002014, value: 0x00000000Debug: 203 412 target.c:2688 target_write_u32(): address: 0xe0002018, value: 0x00000000Debug: 204 412 target.c:2688 target_write_u32(): address: 0xe000201c, value: 0x00000000Debug: 205 412 target.c:2688 target_write_u32(): address: 0xe0002020, value: 0x00000000Debug: 206 412 target.c:2688 target_write_u32(): address: 0xe0002024, value: 0x00000000Debug: 207 412 target.c:2688 target_write_u32(): address: 0xe0001020, value: 0x00000000Debug: 208 412 target.c:2688 target_write_u32(): address: 0xe0001024, value: 0x00000000Debug: 209 412 target.c:2688 target_write_u32(): address: 0xe0001028, value: 0x00000000Debug: 210 412 target.c:2688 target_write_u32(): address: 0xe0001030, value: 0x00000000Debug: 211 412 target.c:2688 target_write_u32(): address: 0xe0001034, value: 0x00000000Debug: 212 412 target.c:2688 target_write_u32(): address: 0xe0001038, value: 0x00000000Debug: 213 412 target.c:2688 target_write_u32(): address: 0xe0001040, value: 0x00000000Debug: 214 412 target.c:2688 target_write_u32(): address: 0xe0001044, value: 0x00000000Debug: 215 412 target.c:2688 target_write_u32(): address: 0xe0001048, value: 0x00000000Debug: 216 412 target.c:2688 target_write_u32(): address: 0xe0001050, value: 0x00000000Debug: 217 412 target.c:2688 target_write_u32(): address: 0xe0001054, value: 0x00000000Debug: 218 412 target.c:2688 target_write_u32(): address: 0xe0001058, value: 0x00000000Debug: 219 412 cortex_m.c:803 cortex_m_debug_entry(): [stm32f1x.cpu]Debug: 220 412 cortex_m.c:544 cortex_m_clear_halt(): [stm32f1x.cpu] NVIC_DFSR 0x9Debug: 221 428 cortex_m.c:346 cortex_m_fast_read_all_regs(): [stm32f1x.cpu] read 20 32-bit registersDebug: 222 428 cortex_m.c:873 cortex_m_debug_entry(): [stm32f1x.cpu] entered debug state in core mode: Thread at PC 0x8000c08, cpu in Non-Secure state, target->state: haltedDebug: 223 428 target.c:1815 target_call_event_callbacks(): target event 0 (gdb-halt) for core stm32f1x.cpuDebug: 224 428 target.c:1815 target_call_event_callbacks(): target event 1 (halted) for core stm32f1x.cpuUser : 225 428 armv7m.c:741 armv7m_arch_state(): [stm32f1x.cpu] halted due to debug-request, current mode: ThreadxPSR: 0x01000000 pc: 0x08000c08 msp: 0x20005000Debug: 226 428 command.c:152 script_debug(): command - stm32f1x.cpu curstateDebug: 227 428 command.c:152 script_debug(): command - transport selectDebug: 228 428 command.c:152 script_debug(): command - stm32f1x.cpu was_examinedDebug: 229 428 command.c:152 script_debug(): command - stm32f1x.cpu arp_waitstate halted 5000Debug: 230 428 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-initDebug: 231 428 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-endDebug: 232 428 command.c:152 script_debug(): command - echo ** Programming Started **User : 233 428 command.c:690 handle_echo(): ** Programming Started **Debug: 234 428 command.c:152 script_debug(): command - flash write_image erase build/stm32f103c8t6.elfDebug: 235 444 configuration.c:88 find_file(): found build/stm32f103c8t6.elfDebug: 236 444 image.c:68 autodetect_image_type(): ELF image detected.Debug: 237 444 configuration.c:88 find_file(): found build/stm32f103c8t6.elfDebug: 238 444 image.c:637 image_elf_read_headers(): ELF32 image detected.Debug: 239 444 target.c:2600 target_read_u32(): address: 0xe0042000, value: 0x20036410Info : 240 444 stm32f1x.c:827 stm32x_probe(): device id = 0x20036410Debug: 241 444 target.c:2624 target_read_u16(): address: 0x1ffff7e0, value: 0x0080Info : 242 444 stm32f1x.c:1009 stm32x_probe(): flash size = 128 KiBDebug: 243 444 core.c:939 flash_write_unlock_verify(): image_read_section: section = 0, t_section_num = 0, section_offset = 0, buffer_idx = 0, size_read = 3312Debug: 244 444 image.c:666 image_elf32_read_section(): load segment 0 at 0x0 (sz = 0xcf0)Debug: 245 444 image.c:672 image_elf32_read_section(): read elf: size = 0xcf0 at 0x1000Debug: 246 444 core.c:939 flash_write_unlock_verify(): image_read_section: section = 1, t_section_num = 1, section_offset = 0, buffer_idx = 3312, size_read = 12Debug: 247 444 image.c:666 image_elf32_read_section(): load segment 1 at 0x0 (sz = 0xc)Debug: 248 444 image.c:672 image_elf32_read_section(): read elf: size = 0xc at 0x2000Warn : 249 444 core.c:545 flash_iterate_address_range_inner(): Adding extra erase range, 0x08000cfc .. 0x08000fffDebug: 250 444 target.c:2688 target_write_u32(): address: 0x40022004, value: 0x45670123Debug: 251 444 target.c:2688 target_write_u32(): address: 0x40022004, value: 0xcdef89abDebug: 252 444 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000002Debug: 253 444 target.c:2688 target_write_u32(): address: 0x40022014, value: 0x08000000Debug: 254 455 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000042Debug: 255 457 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000001Debug: 256 457 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x1Debug: 257 459 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000020Debug: 258 460 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x20Debug: 259 460 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000002Debug: 260 461 target.c:2688 target_write_u32(): address: 0x40022014, value: 0x08000400Debug: 261 461 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000042Debug: 262 463 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000021Debug: 263 463 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x21Debug: 264 469 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000020Debug: 265 469 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x20Debug: 266 469 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000002Debug: 267 469 target.c:2688 target_write_u32(): address: 0x40022014, value: 0x08000800Debug: 268 469 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000042Debug: 269 469 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000021Debug: 270 469 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x21Debug: 271 479 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000020Debug: 272 479 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x20Debug: 273 479 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000002Debug: 274 479 target.c:2688 target_write_u32(): address: 0x40022014, value: 0x08000c00Debug: 275 479 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000042Debug: 276 479 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000021Debug: 277 479 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x21Debug: 278 495 target.c:2600 target_read_u32(): address: 0x4002200c, value: 0x00000020Debug: 279 496 stm32f1x.c:173 stm32x_wait_status_busy(): status: 0x20Debug: 280 496 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000080Debug: 281 497 target.c:2688 target_write_u32(): address: 0x40022004, value: 0x45670123Debug: 282 497 target.c:2688 target_write_u32(): address: 0x40022004, value: 0xcdef89abDebug: 283 498 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000001Debug: 284 499 target.c:2020 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x20000000Debug: 285 500 target.c:2074 target_alloc_working_area_try(): allocated new working area of 60 bytes at address 0x20000000Debug: 286 500 target.c:1941 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)Debug: 287 501 target.c:1941 print_wa_layout(): 0x2000003c-0x20000fff (4036 bytes)Debug: 288 501 target.c:2382 target_write_buffer(): writing buffer of 60 byte at 0x20000000Debug: 289 503 target.c:2074 target_alloc_working_area_try(): allocated new working area of 3332 bytes at address 0x2000003cDebug: 290 503 target.c:1941 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)Debug: 291 504 target.c:1941 print_wa_layout(): * 0x2000003c-0x20000d3f (3332 bytes)Debug: 292 504 target.c:1941 print_wa_layout(): 0x20000d40-0x20000fff (704 bytes)Debug: 293 504 target.c:2688 target_write_u32(): address: 0x2000003c, value: 0x20000044Debug: 294 505 target.c:2688 target_write_u32(): address: 0x20000040, value: 0x20000044Debug: 295 506 target.c:1815 target_call_event_callbacks(): target event 3 (resume-start) for core stm32f1x.cpuDebug: 296 506 armv7m.c:174 armv7m_restore_context():Debug: 297 507 armv7m.c:441 armv7m_write_core_reg(): write pmsk_bpri_fltmsk_ctrl value 0x00000001Debug: 298 507 armv7m.c:441 armv7m_write_core_reg(): write xpsr value 0x01000000Debug: 299 507 armv7m.c:441 armv7m_write_core_reg(): write pc value 0x20000000Debug: 300 507 armv7m.c:441 armv7m_write_core_reg(): write r4 value 0x08000000Debug: 301 507 armv7m.c:441 armv7m_write_core_reg(): write r3 value 0x20000d40Debug: 302 507 armv7m.c:441 armv7m_write_core_reg(): write r2 value 0x2000003cDebug: 303 507 armv7m.c:441 armv7m_write_core_reg(): write r1 value 0x0000067eDebug: 304 507 armv7m.c:441 armv7m_write_core_reg(): write r0 value 0x40022000Debug: 305 507 target.c:1815 target_call_event_callbacks(): target event 18 (debug-resumed) for core stm32f1x.cpuDebug: 306 507 cortex_m.c:1392 cortex_m_resume(): [stm32f1x.cpu] debug resumed at 0x20000000Debug: 307 507 target.c:1815 target_call_event_callbacks(): target event 4 (resume-end) for core stm32f1x.cpuDebug: 308 507 target.c:2600 target_read_u32(): address: 0x20000040, value: 0x20000044Debug: 309 507 target.c:1021 target_run_flash_async_algorithm(): offs 0x0 count 0x67e wp 0x20000044 rp 0x20000044Debug: 310 507 target.c:2382 target_write_buffer(): writing buffer of 3320 byte at 0x20000044Debug: 311 586 target.c:2688 target_write_u32(): address: 0x2000003c, value: 0x20000d3cDebug: 312 586 target.c:2600 target_read_u32(): address: 0x20000040, value: 0x2000006eDebug: 313 586 target.c:1021 target_run_flash_async_algorithm(): offs 0xcf8 count 0x2 wp 0x20000d3c rp 0x2000006eDebug: 314 586 target.c:2382 target_write_buffer(): writing buffer of 4 byte at 0x20000d3cDebug: 315 586 target.c:2688 target_write_u32(): address: 0x2000003c, value: 0x20000044Debug: 316 586 target.c:3258 target_wait_state(): waiting for target halted...Debug: 317 617 cortex_m.c:803 cortex_m_debug_entry(): [stm32f1x.cpu]Debug: 318 617 cortex_m.c:544 cortex_m_clear_halt(): [stm32f1x.cpu] NVIC_DFSR 0x3Debug: 319 632 cortex_m.c:346 cortex_m_fast_read_all_regs(): [stm32f1x.cpu] read 20 32-bit registersDebug: 320 632 cortex_m.c:873 cortex_m_debug_entry(): [stm32f1x.cpu] entered debug state in core mode: Thread at PC 0x2000003a, cpu in Non-Secure state, target->state: haltedDebug: 321 632 target.c:1815 target_call_event_callbacks(): target event 17 (debug-halted) for core stm32f1x.cpuDebug: 322 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register primask with value 0x00000000Debug: 323 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register pmsk_bpri_fltmsk_ctrl with value 0x00000000Debug: 324 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register xpsr with value 0x01000000Debug: 325 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register pc with value 0x08000c08Debug: 326 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r7 with value 0x02168114Debug: 327 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r6 with value 0x04c11db7Debug: 328 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r5 with value 0x00000008Debug: 329 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r4 with value 0x2000002cDebug: 330 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r3 with value 0x00002000Debug: 331 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r2 with value 0x00000000Debug: 332 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r1 with value 0x20004fd8Debug: 333 632 armv7m.c:704 armv7m_wait_algorithm(): restoring register r0 with value 0x40011000Debug: 334 632 target.c:2600 target_read_u32(): address: 0x20000040, value: 0x20000044Debug: 335 632 target.c:2142 target_free_working_area_restore(): freed 3332 bytes of working area at address 0x2000003cDebug: 336 632 target.c:1941 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)Debug: 337 632 target.c:1941 print_wa_layout(): 0x2000003c-0x20000fff (4036 bytes)Debug: 338 632 target.c:2142 target_free_working_area_restore(): freed 60 bytes of working area at address 0x20000000Debug: 339 632 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 340 632 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x00000080Debug: 341 632 command.c:152 script_debug(): command - echo ** Programming Finished **User : 342 632 command.c:690 handle_echo(): ** Programming Finished **Debug: 343 632 command.c:152 script_debug(): command - echo ** Verify Started **User : 344 632 command.c:690 handle_echo(): ** Verify Started **Debug: 345 632 command.c:152 script_debug(): command - verify_image build/stm32f103c8t6.elfDebug: 346 632 configuration.c:88 find_file(): found build/stm32f103c8t6.elfDebug: 347 632 image.c:68 autodetect_image_type(): ELF image detected.Debug: 348 632 configuration.c:88 find_file(): found build/stm32f103c8t6.elfDebug: 349 632 image.c:637 image_elf_read_headers(): ELF32 image detected.Debug: 350 632 image.c:666 image_elf32_read_section(): load segment 0 at 0x0 (sz = 0xcf0)Debug: 351 632 image.c:672 image_elf32_read_section(): read elf: size = 0xcf0 at 0x1000Debug: 352 632 image.c:1264 image_calculate_checksum(): Calculating checksumDebug: 353 632 image.c:1294 image_calculate_checksum(): Calculating checksum done; checksum=0x15170223Debug: 354 632 target.c:2074 target_alloc_working_area_try(): allocated new working area of 52 bytes at address 0x20000000Debug: 355 632 target.c:1941 print_wa_layout(): * 0x20000000-0x20000033 (52 bytes)Debug: 356 632 target.c:1941 print_wa_layout(): 0x20000034-0x20000fff (4044 bytes)Debug: 357 632 target.c:2382 target_write_buffer(): writing buffer of 52 byte at 0x20000000Debug: 358 648 target.c:1815 target_call_event_callbacks(): target event 3 (resume-start) for core stm32f1x.cpuDebug: 359 648 armv7m.c:174 armv7m_restore_context():Debug: 360 648 armv7m.c:441 armv7m_write_core_reg(): write pmsk_bpri_fltmsk_ctrl value 0x00000001Debug: 361 648 armv7m.c:441 armv7m_write_core_reg(): write xpsr value 0x01000000Debug: 362 648 armv7m.c:441 armv7m_write_core_reg(): write pc value 0x20000000Debug: 363 648 armv7m.c:441 armv7m_write_core_reg(): write r7 value 0x02168114Debug: 364 648 armv7m.c:441 armv7m_write_core_reg(): write r6 value 0x04c11db7Debug: 365 648 armv7m.c:441 armv7m_write_core_reg(): write r5 value 0x00000008Debug: 366 648 armv7m.c:441 armv7m_write_core_reg(): write r4 value 0x2000002cDebug: 367 656 armv7m.c:441 armv7m_write_core_reg(): write r3 value 0x00002000Debug: 368 657 armv7m.c:441 armv7m_write_core_reg(): write r2 value 0x00000000Debug: 369 658 armv7m.c:441 armv7m_write_core_reg(): write r1 value 0x00000cf0Debug: 370 659 armv7m.c:441 armv7m_write_core_reg(): write r0 value 0x08000000Debug: 371 659 target.c:1815 target_call_event_callbacks(): target event 18 (debug-resumed) for core stm32f1x.cpuDebug: 372 660 cortex_m.c:1392 cortex_m_resume(): [stm32f1x.cpu] debug resumed at 0x20000000Debug: 373 660 target.c:1815 target_call_event_callbacks(): target event 4 (resume-end) for core stm32f1x.cpuDebug: 374 661 target.c:3258 target_wait_state(): waiting for target halted...Debug: 375 707 cortex_m.c:803 cortex_m_debug_entry(): [stm32f1x.cpu]Debug: 376 708 cortex_m.c:544 cortex_m_clear_halt(): [stm32f1x.cpu] NVIC_DFSR 0x3Debug: 377 716 cortex_m.c:346 cortex_m_fast_read_all_regs(): [stm32f1x.cpu] read 20 32-bit registersDebug: 378 717 cortex_m.c:873 cortex_m_debug_entry(): [stm32f1x.cpu] entered debug state in core mode: Thread at PC 0x2000002e, cpu in Non-Secure state, target->state: haltedDebug: 379 717 target.c:1815 target_call_event_callbacks(): target event 17 (debug-halted) for core stm32f1x.cpuDebug: 380 717 armv7m.c:704 armv7m_wait_algorithm(): restoring register primask with value 0x00000000Debug: 381 717 armv7m.c:704 armv7m_wait_algorithm(): restoring register pmsk_bpri_fltmsk_ctrl with value 0x00000000Debug: 382 718 armv7m.c:704 armv7m_wait_algorithm(): restoring register xpsr with value 0x01000000Debug: 383 718 armv7m.c:704 armv7m_wait_algorithm(): restoring register pc with value 0x08000c08Debug: 384 718 armv7m.c:704 armv7m_wait_algorithm(): restoring register r4 with value 0x2000002cDebug: 385 718 armv7m.c:704 armv7m_wait_algorithm(): restoring register r3 with value 0x00002000Debug: 386 719 armv7m.c:704 armv7m_wait_algorithm(): restoring register r2 with value 0x00000000Debug: 387 719 armv7m.c:704 armv7m_wait_algorithm(): restoring register r1 with value 0x20004fd8Debug: 388 719 armv7m.c:704 armv7m_wait_algorithm(): restoring register r0 with value 0x40011000Debug: 389 719 target.c:2142 target_free_working_area_restore(): freed 52 bytes of working area at address 0x20000000Debug: 390 719 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 391 719 image.c:666 image_elf32_read_section(): load segment 1 at 0x0 (sz = 0xc)Debug: 392 719 image.c:672 image_elf32_read_section(): read elf: size = 0xc at 0x2000Debug: 393 719 image.c:1264 image_calculate_checksum(): Calculating checksumDebug: 394 719 image.c:1294 image_calculate_checksum(): Calculating checksum done; checksum=0xb50c6d59Debug: 395 719 target.c:2074 target_alloc_working_area_try(): allocated new working area of 52 bytes at address 0x20000000Debug: 396 719 target.c:1941 print_wa_layout(): * 0x20000000-0x20000033 (52 bytes)Debug: 397 719 target.c:1941 print_wa_layout(): 0x20000034-0x20000fff (4044 bytes)Debug: 398 719 target.c:2382 target_write_buffer(): writing buffer of 52 byte at 0x20000000Debug: 399 719 target.c:1815 target_call_event_callbacks(): target event 3 (resume-start) for core stm32f1x.cpuDebug: 400 719 armv7m.c:174 armv7m_restore_context():Debug: 401 719 armv7m.c:441 armv7m_write_core_reg(): write pmsk_bpri_fltmsk_ctrl value 0x00000001Debug: 402 719 armv7m.c:441 armv7m_write_core_reg(): write xpsr value 0x01000000Debug: 403 719 armv7m.c:441 armv7m_write_core_reg(): write pc value 0x20000000Debug: 404 719 armv7m.c:441 armv7m_write_core_reg(): write r4 value 0x2000002cDebug: 405 719 armv7m.c:441 armv7m_write_core_reg(): write r3 value 0x00002000Debug: 406 719 armv7m.c:441 armv7m_write_core_reg(): write r2 value 0x00000000Debug: 407 719 armv7m.c:441 armv7m_write_core_reg(): write r1 value 0x0000000cDebug: 408 719 armv7m.c:441 armv7m_write_core_reg(): write r0 value 0x08000cf0Debug: 409 719 target.c:1815 target_call_event_callbacks(): target event 18 (debug-resumed) for core stm32f1x.cpuDebug: 410 719 cortex_m.c:1392 cortex_m_resume(): [stm32f1x.cpu] debug resumed at 0x20000000Debug: 411 719 target.c:1815 target_call_event_callbacks(): target event 4 (resume-end) for core stm32f1x.cpuDebug: 412 719 cortex_m.c:803 cortex_m_debug_entry(): [stm32f1x.cpu]Debug: 413 719 cortex_m.c:544 cortex_m_clear_halt(): [stm32f1x.cpu] NVIC_DFSR 0x3Debug: 414 734 cortex_m.c:346 cortex_m_fast_read_all_regs(): [stm32f1x.cpu] read 20 32-bit registersDebug: 415 734 cortex_m.c:873 cortex_m_debug_entry(): [stm32f1x.cpu] entered debug state in core mode: Thread at PC 0x2000002e, cpu in Non-Secure state, target->state: haltedDebug: 416 734 target.c:1815 target_call_event_callbacks(): target event 17 (debug-halted) for core stm32f1x.cpuDebug: 417 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register primask with value 0x00000000Debug: 418 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register pmsk_bpri_fltmsk_ctrl with value 0x00000000Debug: 419 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register xpsr with value 0x01000000Debug: 420 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register pc with value 0x08000c08Debug: 421 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register r4 with value 0x2000002cDebug: 422 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register r3 with value 0x00002000Debug: 423 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register r2 with value 0x00000000Debug: 424 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register r1 with value 0x20004fd8Debug: 425 734 armv7m.c:704 armv7m_wait_algorithm(): restoring register r0 with value 0x40011000Debug: 426 734 target.c:2142 target_free_working_area_restore(): freed 52 bytes of working area at address 0x20000000Debug: 427 734 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 428 734 command.c:152 script_debug(): command - echo ** Verified OK **User : 429 734 command.c:690 handle_echo(): ** Verified OK **Debug: 430 734 command.c:152 script_debug(): command - poll offDebug: 431 734 command.c:152 script_debug(): command - echo ** Resetting Target **User : 432 734 command.c:690 handle_echo(): ** Resetting Target **Debug: 433 734 command.c:152 script_debug(): command - reset runDebug: 434 734 target.c:1834 target_call_reset_callbacks(): target reset 1 (run)Debug: 435 734 command.c:152 script_debug(): command - target namesDebug: 436 734 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-startDebug: 437 734 command.c:152 script_debug(): command - transport selectDebug: 438 734 command.c:152 script_debug(): command - transport selectDebug: 439 734 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event examine-startDebug: 440 734 command.c:152 script_debug(): command - stm32f1x.cpu arp_examine allow-deferDebug: 441 734 arm_adi_v5.c:825 mem_ap_init(): MEM_AP Packed Transfers: enabledDebug: 442 734 arm_adi_v5.c:836 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0Debug: 443 734 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event examine-endDebug: 444 734 target.c:5154 target_handle_event(): target(0): stm32f1x.cpu (cortex_m) event: 21 (examine-end) action:# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP |# DBG_STANDBY | DBG_STOP | DBG_SLEEPmmw 0xE0042004 0x00000307 0Debug: 445 734 command.c:152 script_debug(): command - read_memory 0xE0042004 32 1Debug: 446 734 command.c:152 script_debug(): command - mww 0xE0042004 775Debug: 447 750 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-assert-preDebug: 448 750 command.c:152 script_debug(): command - transport selectDebug: 449 750 command.c:152 script_debug(): command - stm32f1x.cpu arp_reset assert 0Debug: 450 750 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 451 750 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 452 750 cortex_m.c:1760 cortex_m_assert_reset(): [stm32f1x.cpu] target->state: halted, examinedDebug: 453 750 cortex_m.c:544 cortex_m_clear_halt(): [stm32f1x.cpu] NVIC_DFSR 0x1Debug: 454 750 cortex_m.c:1879 cortex_m_assert_reset(): [stm32f1x.cpu] Using Cortex-M SYSRESETREQDebug: 455 750 arm_adi_v5.c:754 dap_dp_init_or_reconnect(): stm32f1x.dapDebug: 456 750 arm_adi_v5.c:679 dap_dp_init(): stm32f1x.dapDebug: 457 750 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACKDebug: 458 750 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000Debug: 459 750 arm_adi_v5.c:719 dap_dp_init(): DAP: wait CSYSPWRUPACKDebug: 460 750 arm_adi_v5.h:641 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000Debug: 461 750 cmsis_dap.c:817 cmsis_dap_swd_write_from_queue(): refusing to enable sticky overrun detectionDebug: 462 852 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-assert-postDebug: 463 852 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-deassert-preDebug: 464 852 command.c:152 script_debug(): command - transport selectDebug: 465 852 command.c:152 script_debug(): command - stm32f1x.cpu arp_reset deassert 0Debug: 466 852 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 467 852 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 468 852 cortex_m.c:1932 cortex_m_deassert_reset(): [stm32f1x.cpu] target->state: reset, examinedDebug: 469 852 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-deassert-postDebug: 470 852 command.c:152 script_debug(): command - stm32f1x.cpu invoke-event reset-endDebug: 471 852 command.c:152 script_debug(): command - shutdownUser : 472 852 server.c:758 handle_shutdown_command(): shutdown command invokedDebug: 473 852 arm_adi_v5.c:1120 dap_put_ap(): refcount AP#0x0 put 0Debug: 474 852 target.c:2171 target_free_all_working_areas_restore(): freeing all working areasDebug: 475 852 target.c:1941 print_wa_layout(): 0x20000000-0x20000fff (4096 bytes)Debug: 476 852 cmsis_dap.c:1197 cmsis_dap_swd_switch_seq(): SWD-to-JTAGSo it seems more like a hardware problem for me now.

author: ataradov
author_rank: Super Contributor
timestamp: October 23, 2023, 03:34:07 pm
content: Your device fails basic JTAG-to-SWD switch sequence. This is the very first step in the SWD connection procedure.The only other thing I would look at is that the waveform on SWDIO/SWCLK look sharp and not distorted just in case.But after that, I would suspect that device is not functional. It is either damaged or simply fake.

author: glebkooo
author_rank: Contributor
timestamp: October 23, 2023, 06:39:19 pm
content: Found and fixed a short of SWCLK to GND- seems etching process defect on manufacturer side.Now programmer works fine and successfully flashed my firmware.Thanks a lot, guys!Code:Open On-Chip Debugger 0.12.0 (2023-10-02) [https://github.com/sysprogs/openocd]Licensed under GNU GPL v2libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3For bug reports, readhttp://openocd.org/doc/doxygen/bugs.htmldebug_level: 2adapter speed: 10 kHzInfo : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, serial=E66014A81F1E6925Info : CMSIS-DAP: SWD supportedInfo : CMSIS-DAP: Atomic commands supportedInfo : CMSIS-DAP: Test domain timer supportedInfo : CMSIS-DAP: FW Version = 2.0.0Info : CMSIS-DAP: Interface Initialised (SWD)Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0Info : CMSIS-DAP: Interface readyInfo : clock speed 10 kHzInfo : SWD DPIDR 0x0bb11477Info : [stm32f0x.cpu] Cortex-M0 r0p0 processor detectedInfo : [stm32f0x.cpu] target has 4 breakpoints, 2 watchpointsInfo : starting gdb server for stm32f0x.cpu on 3333Info : Listening on port 3333 for gdb connections[stm32f0x.cpu] halted due to debug-request, current mode: ThreadxPSR: 0xc1000000 pc: 0x08002794 msp: 0x20001000** Programming Started **Info : device id = 0x10006444Info : flash size = 32 KiBWarn : Adding extra erase range, 0x08003f0c .. 0x08003fff** Programming Finished **** Verify Started **** Verified OK **** Resetting Target **shutdown command invoked