Solder paste stencil thickness for BGA - Page 1
Forum section: electronics / general

author: tom66
author_rank: Super Contributor
timestamp: September 09, 2019, 06:43:59 pm
content: I'm using a board with a 0.8mm pitch BGA with 0.45mm copper diameter pads, non-solder mask defined. This is a Xilinx Zynq FPGA in CLG400 package.According to a bit of research I have done I would need a 0.12~0.13mm thickness. But I can't find any confirmation from Xilinx or in datasheets anywhere that confirms that.I did a few calculations according to IPC documentation and I came out with rather large aspect and area ratios. So I'm a little concerned that this stencil might not be so great.Has anyone had experience with selecting the thickness of stencils for moderate-pitch BGAs?

author: asmi
author_rank: Super Contributor
timestamp: September 10, 2019, 12:08:43 pm
content: I always use 0.1 mm electropolished stencils. BGAs are usually not the limiting factor, but QFNs are because their pitch is 0.5 or even 0.4 mm, while BGAs I use have pitch of 0.65 mm and up. Heck, you can solder BGAs even without any paste at allI highly recommend you to pay some extra for electropolishing - it's totally worth the price, especially if you have parts with very small stencil openings!

author: EEEnthusiast
author_rank: Frequent Contributor
timestamp: September 10, 2019, 12:13:58 pm
content: From my experience, soldering BGAs reliably has to do with the solder mask opening and the land pad size rather than the solder paste stencil thickness. The reason is as follows. Unlike other ICs like QFP or QFN, the BGA balls will actually melt during the reflow process. Hence you could be able to solder a BGA even without any paste on the pads as the BGA balls will themselves act like the solder paste when melted. In fact having a thicker stencil can cause problems in soldering due to shorts across adjacent balls.I have tried stencils with the BGA balls closed on the mask and never had any problems.

author: mrpackethead
author_rank: Super Contributor
timestamp: September 10, 2019, 07:49:55 pm
content: you can use no paste and it works, but a problem can become how you keep your part in place untill you reflow it. The 'wet' solder paste is 'sticky' enough that it holds things in place.

author: tom66
author_rank: Super Contributor
timestamp: September 10, 2019, 09:16:42 pm
content: That was my thought as well, it is better to use paste to hold part in place. Too much could cause a bridging issue, although my stencil diameter is only about the size of the BGA ball. Perhaps I should look at reducing the aperture for the stencil holes, but I am not certain.Experimenting with $100+ FPGAs is expensive, but it seems like (without much guidance from the manufacturer) I don't have much choice.I should say I am using a real PNP and reflow assembly for this project with a professional manufacturer, not just a hotplate/skillet or hot air at home.

author: asmi
author_rank: Super Contributor
timestamp: September 10, 2019, 09:47:04 pm
content: Quote from: tom66 on September 10, 2019, 09:16:42 pmWhat chip do you have in mind? Most FPGAs have pin-compatible siblings, so you can place the cheapest device from that line on a first prototype to make things easier in case there are problems with the board. Also - unless I've used that PD design before, I install only power delivery-related components on a very first board and check that all voltages are what they should be, and so placing the FPGA will be safe. All it takes is 0.1 V over the nominal on Vccint rail - and your FPGA is a toast.

author: mrpackethead
author_rank: Super Contributor
timestamp: September 11, 2019, 03:40:26 am
content: Quote from: asmi on September 10, 2019, 09:47:04 pmFind some similar $1 FPGA's on aliexpress and do some practice with them.

author: tom66
author_rank: Super Contributor
timestamp: September 11, 2019, 11:57:35 am
content: Sadly, I need a specific FPGA to implement my design fully.I could use a cheap FPGA but then I'd need to pay again to have the board assembled. Not worth it.But I'll look into some cheap pin compatible packages to see what I can get out of those.

author: Gribo
author_rank: Frequent Contributor
timestamp: September 11, 2019, 12:21:19 pm
content: There are empty packages, exactly for production testing purposes. I don't remember the manufacturer, but they had empty BGAs, QFN and even CSPs. I am sure they don't cost 100$/unit.

author: SMTech
author_rank: Frequent Contributor
timestamp: September 11, 2019, 12:35:28 pm
content: TopLine

author: asmi
author_rank: Super Contributor
timestamp: September 11, 2019, 01:04:52 pm
content: Quote from: Gribo on September 11, 2019, 12:21:19 pmXilinx sells empty packages as well - they are exact same packages as normal chips, just without the silicon. But they are far from being $1.

author: asmi
author_rank: Super Contributor
timestamp: September 11, 2019, 01:19:33 pm
content: Quote from: tom66 on September 11, 2019, 11:57:35 amDo you seriously expect your first ever FPGA design to be 100% functional on a first try?If not - you WILL have to do a respin and another round of assembly, so using smaller FPGA on a first revision saves money. And you don't need to implement full design - you merely need to confirm all peripheral interfaces work like they should, one at a time, and if they don't - figure out why so if it's a board issue, it can be fixed in rev B.Another common issue is power delivery system design. Those who never worked with modern SoCs don't fully appreciate just how tricky this issue can be, and how tight the margins are (typical converter itself will be 1% accurate, another 2% are added by two 1% feedback resistors, so you've got only 2% to work with!). The biggest problem here is DC-DC converters' performance depends not only from schematics, but from layout too. This is why when I design a brand new PD system that I've never used before, I always prototype it first and test the crap out of it to make sure all parameters (voltage at different currents, ripple voltage, response to large changes of current consumption) are what they should be. Especially the step test from high to low current is important, as there is always overshoot due to output capacitance, so I'd like to make sure this overshoot is not large enough to kill the chip. Then if you use MGTs, they are even more tricky to power (Vrms <10 mV is required!!!).