Interpreting Bode Plots. - Page 1
Forum section: electronics / projects

author: kvresto
author_rank: Regular Contributor
timestamp: October 19, 2014, 12:04:36 pm
content: Hi All.I’ve bee looking into op amp bode plots so I can determine if a particular inverting op amp configuration is stable. The intention is these amps will interface to sensors, and drive into an ADC, even perhaps another INS amp.Below are pics of two cct’s, one is configured to amplify the input, and the other is configured to attenuate the input. Included are the bode plots generated by the SPICE program.Sedra and Smith has a good write up on how to evaluate an amplifier set up with gain to amplify the signal via its bode plot for stability RE: phase, and gain margin, but I can’t find anything on evaluating an op amp configured as an attenuator.How do I interpret the bode plot of gain and phase relating to the attenuator? Can anyone help out?Cheerskv

author: LvW
author_rank: Frequent Contributor
timestamp: October 19, 2014, 12:30:00 pm
content: kvresto - for evaluation of the stability margin you must display the LOOP GAIN (instead of the closed-loop gain).Loop gain is the gain of the open loop - that means: Feedback network in series with the open-loop gain of the opamp.Hint: Because opening the loop will most probably destroy the dc operating point, it is recommended to place the AC voltage source BETWEEN the opamp output and the feedback network. In this case, the loop gain is simply the voltage ratio BETWEEN these both nodes (left and right to the source).

author: T3sl4co1l
author_rank: Super Contributor
timestamp: October 19, 2014, 12:33:47 pm
content: LMV358 is unity gain stable, by inspection alone, you will have no problem with phase margin.Tim

author: kg4arn
author_rank: Unknown
timestamp: October 19, 2014, 01:10:09 pm
content: kvrestoLike the others said before me: stability is not determined by the closed loop gain.Stability is determined by the loop gain which = op amp open loop gain * fraction of feedbackThe open loop gain curves are shown in figure 1 of the data sheet for resistive loads.The feedback fraction, Beta, for your circuit is 10 /(10 + 1.25) = 0.9 or 20Log 0.9 = -1dBYou evaluate the phase margin where 1 / Beta meets the open loop gain. 1 / Beta is –20Log 0.9 = +1dBYour circuit has a 1K resistive load. Open loop curves are shown for 200 ohm and 2K. The 1K curve would lie about between the two. Take the point where that curve intersects the 1dB point (slightly less than 2MHz) and look at the phase margin for that frequency (RED line). Looks like about 70 degrees of phase margin which is stable. The bandwidth is slightly less than 2 MHz.Doing the same thing for your gain circuit (PURPLE line), by my estimation, results in nearly 90 degrees of phase margin at the expense of lower bandwidth of about 200KHz.I hope this is helpful.

author: kvresto
author_rank: Regular Contributor
timestamp: October 19, 2014, 11:52:23 pm
content: Hi kg4arn, thanks for being generous with your time and providing an excellent explanation.What are the outer limits of phase margin before you begin to say to yourself, its to close for comfort?LvW, as I'm a pictures man, can you draw one for me? I want to plug it in to SPICE.cheerskv.

author: coppice
author_rank: Super Contributor
timestamp: October 20, 2014, 02:57:48 am
content: Quote from: kvresto on October 19, 2014, 12:04:36 pmYou said that you want to use the amp to feed an ADC. In that case you need to include a model of the input of the ADC in your circuit, otherwise any stability result from the model will be meaningless. The capacitive inputs of ADCs create serious problems for buffer amps. This issue is well documented, although the true cause and effective solutions are less well documented.

author: LvW
author_rank: Frequent Contributor
timestamp: October 20, 2014, 06:04:37 am
content: Quote from: kvresto on October 19, 2014, 11:52:23 pmAs mentioned, place an ac source between Vout and R4 and display the ac voltage vs. frequency for the ratio Vout/V(input R4).Thus, you get the loop gain which determines the phase margin.As to the question how many phase margin is needed: It depends on your application/requiremets.For example, a phase margin of 30 deg. might be sufficient to ensure stability (against self-oscillations) - however, in the time domain the step response will exhibit a remarkable overshoot. Such an overshoot will disappear for a margin larger than 65 deg.

author: kvresto
author_rank: Regular Contributor
timestamp: October 20, 2014, 08:05:55 am
content: Hi coppice, thank you I'll keep it in mind.LvW, and others, thanks for your input, you have given me some valuable information, I'll go away for a bit and run some SPICE tests.Cheerskv.

author: Smokey
author_rank: Super Contributor
timestamp: October 20, 2014, 10:00:26 pm
content: There are some good sections on SPICE simulation and real world applications of amplifier bandwidth and stability in the bookhttp://www.amazon.com/Designing-Audio-Power-Amplifiers-Cordell/dp/007164024XAudio power amplifiers are just like big opamps in a lot of ways.