Correlated Double Sampling 1987 circuit - Page 1
Forum section: electronics / projects

author: bmxsesh
author_rank: Regular Contributor
timestamp: October 03, 2024, 11:42:23 pm
content: Hello,I am trying to build the circuit from a Tektronix magazine for a CCD image sensor (Sony ICX415AQ 50 frames per second still camera).https://vintagetek.org/wp-content/uploads/2019/04/IntroToCCDs_Feb1987.pdfis the full articleSo regarding the first circuit, the "pre-amplifier", do I understand correctly that the opamp inputs due to ideal opamp rule V+=V- are forcing the pnp dual BJT collector currents to be equal. By this fact and the fact that the CCD output voltage changes the current in the JFET channel, CCD output voltage will force the opamp also to produce output current big enough to make the voltage at the 1.96K/90.9Ohm divider equal to the CCD voltage. Therefore, Vout is 1.96K/90.9=21.56 times the CCD output voltage.The amplifier presented is HA2520 the JFET input stage opamp. But instead another JFET input stage is added and in a configuration I see for the first time: all elements and especially the op amp are powered not directly to the +-15V rail but instead through a <=100 ohm resistor. But I still do see a lot of pulling action going on even through the series resistors on voltage sources.So I have two concerns here:1) What are the lantern-looking circuit symbols on the second screenshot, at the "post-amp" input and at the A to D buffer output?2) What could be a reasonable replacement for a slow CD4053 analog switch (for the 29.5MHz or 34ns pixel time to make both charge transfer operations and feed it to a 30MHz ADS930E)I have a fast switching Toshiba 2SC4250 npn bjt transistor at hand but the 0.1V Vce(sat) doesn't make a good single-throw (12,13,14) and even worse for the double-throw switch (3,4,5)

author: moffy
author_rank: Super Contributor
timestamp: October 04, 2024, 03:09:45 am
content: Because of the speed differences between the Tektronix 1987 CCD and the Sony ICX415Q, the Tektronix circuit is not suitable e.g the input buffer has about a 1MHz input bandwidth ( the HA2520 has a 20MHz gain bandwidth product and is being run at about a gain of 20). Your pixel clock time is 29.5MHz so I would estimate that you need an input BW of say 5x to10x that or 150MHz to 300MHz. You need a far more modern baseline circuit.

author: TimFox
author_rank: Super Contributor
timestamp: October 04, 2024, 03:11:31 am
content: The "lantern" symbol indicates a shielded wire, where the circle indicates the shield connection around the wire through its center.

author: bmxsesh
author_rank: Regular Contributor
timestamp: October 04, 2024, 11:30:05 am
content: Quote from: moffy on October 04, 2024, 03:09:45 amI'm going to replace the HA2520 with the THS4631 that has 210MHz gain-bandwidth product and could adjust the gain to 5? There is another FET-input OPA657 with GBWP=1600MHz but the output is limited to +-5V power rails so practically the same thing?

author: moffy
author_rank: Super Contributor
timestamp: October 04, 2024, 11:51:27 am
content: There appear to be more modern alternatives e.g. AD9826:https://www.analog.com/media/en/technical-documentation/data-sheets/AD9826.pdfwhich might be an older style chip by today's standards, but a better fit.

author: bmxsesh
author_rank: Regular Contributor
timestamp: October 04, 2024, 01:14:23 pm
content: Quote from: TimFox on October 04, 2024, 03:11:31 amHow would it be possible to implement on a PCB?Quote from: moffy on October 04, 2024, 11:51:27 amI've seen those, only drawbacks for me is that I'm buying a black box that I won't be able to debug if something on the circuit board doesn't workWorking with the CCD image sensor for the first time, I decided to actually have it all broken down to smallest piecesIt is also supposed to work from a 9V battery with 550 mAh current budget and these things can get somewhat power hungry with all the SPI interfaces and such

author: moffy
author_rank: Super Contributor
timestamp: October 04, 2024, 02:05:39 pm
content: Quote from: bmxsesh on October 04, 2024, 01:14:23 pmA quote from the datasheet "Low Power CMOS: 400 mW (Typ)" for 3 channel@15Msps and 16bit is very modest power. You will also need an FPGA to handle the digital data, there is a lot of work involved.

author: TimFox
author_rank: Super Contributor
timestamp: October 04, 2024, 02:14:21 pm
content: Quote from: bmxsesh on October 04, 2024, 01:14:23 pmYou can use a coaxial PCB connector (e.g., SMB) and an external coaxial cable.

author: bmxsesh
author_rank: Regular Contributor
timestamp: October 04, 2024, 06:12:53 pm
content: Quote from: TimFox on October 04, 2024, 02:14:21 pmDo you think that is what the authors meant, having a coaxial cable soldered onto a pcb? Or maybe they had that circuit broken down to several pcbs and/or the camera was removed from the sensing/computing circuit?On the side note, SN74AUC1G66 and SN74AUC2G53 seem to have <1ns switching time if I condition the signal within 0-3V range (approximately)

author: TimFox
author_rank: Super Contributor
timestamp: October 04, 2024, 07:18:24 pm
content: When I saw that symbol at that time, it usually meant a coaxial cable with the center and shield connected according to the drawing: probably soldered to the board in that drawing without a connector shown explicitly.

author: bmxsesh
author_rank: Regular Contributor
timestamp: October 05, 2024, 10:37:48 pm
content: Quote from: TimFox on October 04, 2024, 07:18:24 pmWell, I just realized I can strip most of that circuit including the coaxial cable if I use the 118MHz clock and double the sampling speed adcThis way I just fractionally divide the frequency and sample the signal twice within the 34 ns periodHere is a 29.5MHz 45 degrees phase shifted 1/8th pulse out of a 118MHz clock for the reset pulse mentioned in the articleSaves me a lot of power in terms of hungry op amps 10-20mA each and also won't need the 100mA Xilinx PLL with a slight increase in dynamic power for a tiny chunk of logicIt requires 2 extra double edge flip flops on top of 2 d.e.f.f.s for each bit of two base-8 counters to flip the reset signal