Programmable oscillators - stable, in-circuit adjustable, non-volatile? - Page 1
Forum section: electronics / projects

author: ebastler
author_rank: Super Contributor
timestamp: August 13, 2019, 10:29:09 am
content: For a rather niche vintage computing project (which I'm happy to describe on the forum once I have convinced myself it can actually work...), I need an adjustable clock. The frequency needs to be adjusted once when putting the computer together, then should be stable over time and temperature to better than 0.1%.The DS1085 looks good,https://datasheets.maximintegrated.com/en/ds/DS1085.pdf. It can be programmed in-circuit via I²C, then remembers its settings in a built-in EEPROM. For a MEMS-based device, the temperature compensation of its output frequency is surprisingly good. But the frequency does vary with the supply voltage; a 100 mV deviation from the nominal 5V supply brings it outside of my 0.1% tolerance limit.I had hoped to simply power the complete computer from an external 5V supply; I don't expect to need more than 1A total. The stability (voltage over time) of a typical switching wall wart is probably still good enough to keep the DS1085 happpy. But it would be embarrassing if the computer stops working when one swaps power supplies... To become independent of the characteristics of the external power supply, I could(a) Use a higher input voltage to the board and a decent on-board regulator to power the whole computer. Probably most straightforward, but looses the convenience of the very common 5V (USB?) supply.(b) Power the computer via 5V from the external supply, but provide a local regulator to get a "precision" 5V supply for the DS1085Z. (30 mA, setpoint 4.8 V to 5.2 V, stable to some 10s of mV.)(c) Any other way? Annoyingly, I could not find a programmable oscillator with the same features as the DS1085 but a 3.3V supply; that would be easy to integrate...What would be your recommendation? Regarding option (b), what would be the simplest way to implement that? A "proper" buck/boost regulator; a very-low-dropout linear regulator with a setpoint below 5V; any simple alternative?Thanks for your ideas!JuergenEdit: This discussion took a different (more interesting to me!) turn from my initial focus. I have changed the thread title to something more telling, for future reference.

author: niekvs
author_rank: Contributor
timestamp: August 13, 2019, 11:11:37 am
content: Why don't you use a variable clock generator that bases its timing on a crystal oscillator, like this:https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdfAs a bonus, this part requires 3.3V

author: mikerj
author_rank: Super Contributor
timestamp: August 13, 2019, 11:15:15 am
content: Since the input voltage could be above or below the output option (b) would require either a buck/boost switcher (e.g. SEPIC) or a boost converter followed by a linear regulator.A possible alternative would be to use a 3.3v programmable clock powered from a simple LDO, and then a suitable buffer on the output to get a 5v clock.

author: magic
author_rank: Super Contributor
timestamp: August 13, 2019, 11:32:22 am
content: Isn't DS1085 the same crap as DS1086 but for different voltage?That being said, of course use a quartz.

author: wraper
author_rank: Unknown
timestamp: August 13, 2019, 11:39:28 am
content: Quote from: ebastler on August 13, 2019, 10:29:09 amLook at SiTime products.

author: ebastler
author_rank: Super Contributor
timestamp: August 13, 2019, 04:09:22 pm
content: Quote from: niekvs on August 13, 2019, 11:11:37 amQuote from: mikerj on August 13, 2019, 11:15:15 amQuote from: magic on August 13, 2019, 11:32:22 amQuote from: wraper on August 13, 2019, 11:39:28 amRight guys, bring it on!Seriously though -- thank you all for your answers! That's extactly the line of thought I had when starting my search: "Want stable? Use crystal. Want choice? Look at 3.3V". Surprisingly, I did not find what I was looking for.Before I restate my requirements, I should probably explain what I want to build; otherwise they may seem a bit arbitrary. If you don't care, skip the next two paragraphs...In my exploration of vintage computer architectures (http://e-basteln.de/computing/), I'm moving further back in time, to the 1940s computers using ultrasonic delay line memory. Don't want an FPGA-based replica this time, but "real" sound waves travelling around, and discrete (TTL?) logic. I have managed to build a practical (ahem...) memory from the TV Chroma delay lines discussed on this forum before -- 320 bits per delay line, which is a nice fit for 16 * 20-bit-words of the scaled-down model of Turing's Pilot ACE which I intend to build.The delay lines are beautifully stable: The delay is rock-solid even if you blast them with a hairdryer. (It's also quite exact between different delay lines, 63.943±0.005 µs, which makes it practical to run a couple of them in parallel.) So the computer's system clock needs to be tuned to fit the desired, full number of bits into the delay time. Which leads to my requirements:I want to be able to adjust the delay myself (not factory-programmed). Preferably in-circuit, and if at all possible without a proprietary $200 programmer for just this purpose.The oscillator should then store the settings permanently and re-use them at power up.Yes, I could put a small microcontroller on board to store the parameters and re-program the oscillator at power-up, if that feature is missing from the clock chip. But putting a computer with many times the power of the Pilot ACE onto the board just to initialize the clock feelsjust plain wrong.Not a long list of requirements -- but to my annoyance, the DS1085 is the only kind-of-viable solution I found! I did not see any SiTime, SiLabs, or other products that seem to fit the bill. If anybody knows a suitable part, I would be much obliged!P.S.@magic -- the DS1086 is a similar oscillator, but with dithering, which is obviously undesirable here. Not sure in which respect the DS1086 has been "crap" for you? As mentioned earlier, I found the DS1085 specs surprisingly good for a MEMS oscillator; certainly much better than its older (?) sibling, the DS1077. But not quite good enough when it comes to varying supply voltage...

author: ejeffrey
author_rank: Super Contributor
timestamp: August 13, 2019, 04:43:51 pm
content: If you want to go old school why use a clock generator chip with its own built in processor that has to be programmed by an external computer? Just make a quartz crystal oscillator and a PLL. You can use DIP switches to set the division ratios.Alternately what would be somewhat more difficult but way cooler is to build a PLL that locks itself to the delay line.

author: ebastler
author_rank: Super Contributor
timestamp: August 13, 2019, 07:09:09 pm
content: Quote from: ejeffrey on August 13, 2019, 04:43:51 pmFair point; a crystal oscillator & PLL might fit the "discrete, low integration" theme better.If I head down that path, it would have to be the preset divider version you describe. I had thought about solutions which track the actual transmission time of the delay lines, which I agree would be very elegant. But in order to get the number of bits in the delay line right when starting up the PLL "cold", one would need to send in a bit pattern with defined properties to get the right lock. I.e. the clock tracking would need to overrule the computer's control; but I would prefer not to mess with the simple Pilot ACE architecture. And even once you have the clock rate established, you can only track it while you have "1" bits showing up regularly. If memory is cleared, the PLL would lose its lock; not good...

author: magic
author_rank: Super Contributor
timestamp: August 13, 2019, 07:42:09 pm
content: Quote from: ebastler on August 13, 2019, 04:09:22 pmThe spread spectrum thing can be disabled by pulling some pin to some voltage.I remember it being visibly jittery on the scope even though I was pretty sure I disabled SS. Maybe I failed to actually disable it properly or maybe a matter of my layout/construction, it was a few years agoBut it does work and is quite easy to program.

author: David Hess
author_rank: Super Contributor
timestamp: August 14, 2019, 01:29:06 am
content: Sometimes a precision "low 5 volt" supply is made locally with a low dropout regulator for this sort of application. The voltage is like 4.5 or 4.25 volts so below the expected input voltage but high enough to supply a typical 5 volt part.

author: edavid
author_rank: Super Contributor
timestamp: August 14, 2019, 02:20:56 am
content: Quote from: ebastler on August 13, 2019, 07:09:09 pmWhy not use a dedicated delay line as a simple oscillator, and multiply the output frequency up to the bit clock rate?

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 04:44:36 am
content: Quote from: David Hess on August 14, 2019, 01:29:06 amThanks! I had thought about that option, and mentioned it in my OP -- but thought that it felt a bit like a "dirty" solution. Reassuring to learn that it is an accepted approach.The DS1085 is only specified down to 4.75V supply voltage. But with a very-low-dropout regulator and somewhat tight specs on the external supply (> 4.9V or so), this should work.

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 05:34:44 am
content: Quote from: edavid on August 14, 2019, 02:20:56 amRight, a dedicated "reference" delay line is probably what it would take to derive the clock directly from the actual delay time. If the delay lines were drifting (say with temperature), and all of them doing so in sync, that would probably be the way to go. But with the delay lines being as stable as they are, a stable preset clock seems like the adequate approach.The main reason I'm reluctant to add another delay line is an aesthetic one, I think.Compared to the 74HC logic I intend to use for the computer, the delay lines are visually quite dominant -- photo of my test bed PCB, with just the delay line memory, attached. The full computer is meant to be a "single board computer", where the Pilot ACE architecture is directly visible from looking at the circuit board. (The ACE had a very characteristic architecture, with data continuously cycling through a "highway" bus and the sources/destinations for data storage and processing.) In the board layout, one will directly see the storage registers and memory "tanks" lined up between the data "highway" loop. An extra delay line would be a bit distracting, given that it's not how it was done in the original Pilot ACE.

author: forrestc
author_rank: Unknown
timestamp: August 14, 2019, 06:25:45 am
content: Just a couple of random thoughts:A common thing to do in the time-nut world is to clock a microchip PIC at some stable frequency (say 10Mhz), and then write some code to divide by a precise value. You can use a normal XTAL or a MEMS oscillator or a TCXO as suitable for your device. The code is actually rather simple, noops for a certain number of cycles, then toggle a bit, jump to the start again, and start over. This is a good way to divide as an example 10Mhz down to 1Hz with little phase noise.I had a hard time figuring out from your messages what the desired clock rate and adjustability is (i.e. around 100KHz, adjustable to nearest 100Hz). One possible solution if the range is fairly narrow is to incorporate a VCXO which is near your frequency of interest, or a multiple of the frequency of interest and adjust using a trimpot. Or combine this with the pic divider above to get several outputs which you can jumper, and still have some trimmable.And finally, many of the MEMS oscillators are programmable one time. However the programmers I've seen are in the couple/few hundred dollar range. I'm guessing there might be others out there which are either easier to reprogram, or have a cheaper programming tool, *and* are re-flashable. Just something to look for.

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 11:20:58 am
content: Quote from: forrestc on August 14, 2019, 06:25:45 amRight, I should have mentioned that. Around 5 MHz, adjustable in steps of about 1 kHz. 4.977 MHz is the sweet spot for my current test jig.(The original Pilot ACE ran at 1 MHz, blazing fast for the time. For my little functional model, the resonant frequency range of the TV delay lines, plus the desire to fit as many bits as possible into the available delay time, determine the frequency.)QuoteThat's an interesting option, but you were probably thinking of lower clock rates than the 5 MHz (which I had not mentioned)? And then there's my reluctance to put a processor into the clock generator which is more powerful than the whole vintage computer I want to replicate...QuoteYes, I'm aware of the options, and had briefly touched upon some of them in my original post. As mentioned, the Maxim/Dallas oscillators are the only ones I have found so far which can be programmed simply via I²C and then retain their configuration in non-volatile memory. Epson has similar oscillators which however require a $200 programmer; Digikey offers a programming service for those if I can settle on a clock rate ahead of ordering.Or there's the old-fashioned approach of getting a custom quartz made.More expensive than any of the programmable oscillators, however...

author: edavid
author_rank: Super Contributor
timestamp: August 14, 2019, 03:59:48 pm
content: Quote from: ebastler on August 14, 2019, 05:34:44 amOK, would it it be possible to superimpose low amplitude storage bits on the high amplitude timing clock, so one delay line could serve both purposes?

author: magic
author_rank: Super Contributor
timestamp: August 14, 2019, 04:06:00 pm
content: I wonder what's the state of the art in discrete RC oscillators?This simple topology appears like its period should depend only on passives as long as logic switching time is negligible. Use 74LVC series which switch in sub-1ns, NP0 cap, stable resistors. Trim to your heart's content by piling up 1M resistors on top of R2 or whatever.At the very least, it can run on well regulated 3.3V.

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 05:20:49 pm
content: Quote from: edavid on August 14, 2019, 03:59:48 pmNot with the simple "modulation" scheme I am currently using, I'm afraid. I am modulating the 5 MHz carrier frequency on a 1-bit-per-cycle basis: A "1" is represented by one 5 MHz cycle with full amplitude, and a "0" by a quiet cycle.This is nice and simple, because I directly get the bitstream for the Pilot ACE, which is of course a bit-serial computer architecture. A bit of trickery is needed to ramp up the oscillation quickly after a quiet period, and to dampen the oscillation after a series of "1s", but then discrimination of the two levels is robust. But I can't realistically get more than one bit per cycle.One could think about "proper" modulation schemes which use groups of a few cycles of the 5 MHz carrier to transmit multiple bits at the time (maybe via phase + amplitude modulation). But the required grouping and serializing of bit groups would add complexity, and move the design away from the Pilot ACE's simplicity. Turing was big on simplifying the hardware, and using smart software to work around some of the hardware's idiosyncrasies!

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 05:26:30 pm
content: Quote from: magic on August 14, 2019, 04:06:00 pmYou might have a point there! It would certainly be truest to what Turing & team used, I assume. (Although I am not sure I have seen documentation on the actual clock generator they employed. Their bigger concern was keeping the mercury-filled delay lines from drifting, via careful temperature control...)When I first looked into clocking, I thought I would need close to 100 ppm frequency stability, and RC oscillators seemed out of the question. Having thought about my re-timing circuit at the delay line output a bit more, I can probably get away with about 1000 ppm drift (peak-peak). That might be achievable with a discrete RC oscillator with some care?Time to read up on that, thanks for the idea!

author: edavid
author_rank: Super Contributor
timestamp: August 14, 2019, 06:31:41 pm
content: Quote from: magic on August 14, 2019, 04:06:00 pmA TLC555 would be more stable.

author: magic
author_rank: Super Contributor
timestamp: August 14, 2019, 07:17:02 pm
content: Maybe better, maybe not. It probably suffers all the same problems to some extent. And is rated up to 2MHz typical.BTW, my circuit as posted is totally lame and wouldn't work very well. The feedback network forms an RC with A1 input capacitance. This capacitance surely varies with voltage and perhaps with temperature too, so feedback resistance should be significantly reduced to avoid drift. Thankfully, it seems that making R1=R2 and R3=2·R1 isn't a big deal, little charging current will be stolen by them.Also, output resistance of A2 adds to R2 and isn't stable. Perhaps not a problem with R2=1k.Since 6 channel inverters are available, 2 channels in series can be used to make A1 and 4 channels in parallel for A2. This can reduce effects of output resistance (obviously) or input capacitance (if all resistors are reduced).A1 input noise will cause jitter. No idea how bad it is, maybe enough to kill the idea or force the use of some proper comparator.

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 07:54:54 pm
content: A stable RC oscillator won't be trivial to achieve. Here's one by Jim Williams (page 7 of the PDF):https://www.analog.com/media/en/technical-documentation/application-notes/an12fa.pdfAround 15 ppm/°C, and power supply rejection of 20 ppm/V -- impressive. But a fair bit of thought went into this one, and the author states that it only performs to those specs at low frequencies up to 10 kHz.

author: forrestc
author_rank: Unknown
timestamp: August 14, 2019, 08:29:32 pm
content: Quote from: ebastler on August 14, 2019, 11:20:58 amYes, that changes thingsDividing a reasonable clock down to 4.977 Mhz isn't really a option.I'd just throw a programmable mems on there, but I also have a programmer on the shelf so it isn't a big thing for me. I realize that isn't the best option for you.Some other out of the box brainstorming, might not fit what you want to do:In the spirit of the nature of the project I think I would experiment with pulling a 5Mhz (or similar) XTAL to see if you could get it in range. However 4.977 is far enough away from 5Mhz that I'm sort of skeptical that it would work.If you're willing to let the end user have an adjustment knob, a rc circuit (or resonator) might get you in range, especially if you can figure out a quick way to do some sort of phase detection with the delay line so you can provide a LED or other indication that the circuit is tuned. I don't know if this fits your model at all, but I expect an older machine to be somewhat fiddly.

author: magic
author_rank: Super Contributor
timestamp: August 14, 2019, 08:32:10 pm
content: http://www.avx.com/products/ceramic-capacitors/surface-mount/c0g-np0/NP0 is 30ppm/°C worst case and dirt cheap. Decent resistors are one buck apiece or so, and it only takes three.And it's frequency challenged because he used some dinosaur logic and a dog slow comparator. Probably with worse input parasitics than CMOS too. And subjected it to common mode swings, which may or may not make drift worse.I would give it a shot myself but I only have schmitt-triggered and unbuffered inverters now

author: ebastler
author_rank: Super Contributor
timestamp: August 14, 2019, 09:13:14 pm
content: Thank you all, once again! This is a much more rewarding topic than I had thought.So I have a lot to try:- Will give the DS1085 a go, because it would be convenient and I already have it on the shelf. Let's see how stable it is with a limited effort to regulate its supply, either at the nominal 5V or slightly low.- Let's see how good an RC can get with modern components. Magic's suggestion looks like a promising starting point. I will give some thought to simple "tuning indicators" for the user as well. Hopefully regular frequency tuning by the user won't be needed, but it would be reassuring to see that the clock is still "within range".- Pulling a quartz -- is it realistic to get that far? 4.977 MHz would be ~ 5000 ppm away from a 5 MHz nominal frequency, and the conventional wisdom seems to be that 1000 ppm is already pushing (pulling?) the limit?

author: David Hess
author_rank: Super Contributor
timestamp: August 14, 2019, 09:27:09 pm
content: Quote from: ebastler on August 14, 2019, 04:44:36 amIt is no more dirty than powering TTL with -5.2 volts in an ECL system or powering ECL with +5 volts in a TTL system. Using a supply voltage which is out of range means that the guaranteed specifications no longer apply but you can qualify parts yourself for proper operation.

author: edavid
author_rank: Super Contributor
timestamp: August 14, 2019, 10:03:21 pm
content: OP, do you have a datasheet for the delay line?

author: magic
author_rank: Super Contributor
timestamp: August 14, 2019, 10:50:27 pm
content: OK, this post will probably kill our voltnut RC oscillator projectI pulled out my two boards using DS1086L. Warmed up the scope for 10 minutes, sanity checked by probing a 36MHz quartz: reads solid 35.9999.One DS1086L is set up for 27MHz. Started up at 27.4504, wandered randomly between 27.4488 and 27.4547. In this moment, after 20 minutes, it's around 27.4460 and I've just seen it peak down to 27.4444. That's 0.036% p-p so far, might have a chance of meeting your spec.The other started up at 3.04693MHz and bounced between 3.04556 and 3.04646. No long term test.There is no visible jitter actually, at least within my ability to tell it apart from vertical noise. Not quite sure why I got different impression 3 years ago.

author: David Hess
author_rank: Super Contributor
timestamp: August 15, 2019, 03:18:14 am
content: Quote from: ebastler on August 14, 2019, 09:13:14 pmGetting good precision out of an RC oscillator is a good exercise. Various methods are used to compensate for the temperature coefficient of the capacitor. Consider checking out the various designs for the best voltage-to-frequency converters for some ideas.Note that the low Q produces noticeably more jitter than an LC oscillator. I wonder if a design based on a gyrator would avoid this problem.

author: ebastler
author_rank: Super Contributor
timestamp: August 15, 2019, 05:00:35 am
content: Quote from: edavid on August 14, 2019, 10:03:21 pmNothing comprehensive, and not for the particular part number I am using. But the PAL Chroma delay lines from different brands seem to be pretty well-standardized. (Obviously the PAL standard defines the carrier frequency and the delay time.) To the extent I have tested mine, their specs seem to match the YTS8C from this vendor, incl. e.g. the insertion loss:www.eectech.info/DocumentDownloas.aspx?id=YNjvLwD6n5BtaNw4QXUZ3LiNOytfWQ3ink6quaWab1xkcjliV44b6g==(See glass delay lines on page 5/6, YTS8C in the table on page 6.)Edit: That URL does indeed end with "==", which seems to confuse the forum software. I have not found a way to specify a clickable link which keeps the == intact. Please copy and paste the URL, sorry.

author: ebastler
author_rank: Super Contributor
timestamp: August 15, 2019, 05:23:34 am
content: Quote from: magic on August 14, 2019, 10:50:27 pmThank you for checking! And for amoment for me: So there is a 3.3V "L" version of the DS108x oscillators! How could I possibly have overlooked that when I searched for alternative oscillators with I²C programming and non-volatile storage of the settings?!Your results with the DS1086L are promising, but according to the datasheets the DS1085L hasmuchbetter frequency stability over temperature (same as the 5V "Z" version) which should easily meet my needs. And the 3.3V supply conveniently allows for a local voltage regulator to take care of the supply voltage dependence.Now all I need to do is make up 50 Euro of "needed" electronics parts to justify another Mouser order...

author: magic
author_rank: Super Contributor
timestamp: August 15, 2019, 05:33:38 am
content: For me tooI thought it's a matter of of 85 vs 86 rather than LWill have to check out the other versions now. Those devices are useful sometimes.BTW, I got mine from an auction site. I hope they are niche enough that there are no fakes. Can't promise that you will find any vendor at all, though.

author: mark03
author_rank: Frequent Contributor
timestamp: August 15, 2019, 07:50:24 pm
content: Wasn't there a thread here a while back where someone was reverse engineering one of the programmable oscillator protocols? That seems a worthy endeavor. How hard could it be? (I always say that)

author: ebastler
author_rank: Super Contributor
timestamp: August 18, 2019, 02:14:01 pm
content: Bad News Dept.:Unfortunately, the DS1085LZdoesexhibit significant jitter on its output. The fact that the datasheet does not specifiy jitter at all should have worried me... So your memory of the "crappy" DS1086 might have been right after all, Magic?The attached screenshot shows my sample, running at the 4.97x MHz needed for my planned application. There's a HCT buffer after the 3.3V oscillator, but it is not to blame for the jitter. The scope triggers on the positive edge and observes the signal 64µs downstream. That's equivalent to my need to keep consistent timing between the input and the output of the chroma delay line.Setting the scope to 10s persistence shows the spread of the timing jitter. While this would stilljustwork, i.e. allow me to capture and re-sync the right bit values, it painfully eats into my budget of timing tolerances. Add a few 100 ppm of temperature-induced frequency drift (which my DS1085LZ sample does incur over some 10 to 20 °C temperature change), and it fails.I will tinker with the settings (master oscillator vs. divider) a bit, but don't have high hopes for a major performance improvement. So, back on the quest...UPDATE: Played with different settings on the DS1085LZ, but as expected, there is not much to be gained. In fact, the higher the master oscillator frequency and divider value, the better the phase jitter. So my initial settings, which used the maximum values (65 MHz/13) to get to 5 MHz, were already optimal.

author: radix
author_rank: Contributor
timestamp: August 18, 2019, 02:19:36 pm
content: Just a silly thought that popped into my mind: what if you used some kind of Manchester encoding and a PLL?I haven't even tried to think if it would work, so it may be a shot in the dark...

author: ebastler
author_rank: Super Contributor
timestamp: August 18, 2019, 02:29:16 pm
content: Quote from: radix on August 18, 2019, 02:19:36 pmHmm... you mean, overlay a phase-modulated reference signal on the delay lines, say in addition to the amplitude-modulated data stream, and use that to sync the system clock to the actual delay (times the number of bits to fit into the delay line) via a PLL?That could work in principle, but would probably tighten my margins on both, timing and amplitude discrimination, quite a bit: Recovering the bit timing would need to work despite the jitter from the overlaid phase modulation. And in order to detect the phase at all times (even when the delay line data are all zeros), I would need to switch between two non-zero amplitudes to transmit the digital data.I'm sure it can be done, and there may be smarter ways than the ad-hoc modulation scheme I assumed above which make it a bit more robust, but I'm shying away from the added complexity. Given that the delay lines have a beautifully stable timing behavior, so I don't actually have to track them, this seems more complex than needed. I just need a stable, adjustable oscillator. ("Just", hah!)

author: magic
author_rank: Super Contributor
timestamp: August 18, 2019, 03:13:50 pm
content: No, that's not what I remember, I never even dared to see what happens 64µs after trigger. I remembered seeing the waveform stretch and contract on the screenI suspect I screwed something up back then. Noise, crap decoupling, wrong probing technique.

author: ebastler
author_rank: Super Contributor
timestamp: February 21, 2021, 07:23:42 pm
content: Digging up this old thread of mine, since I am revisiting that project now. Mainly for the benefit of readers who might find this thread later via a search, here's the solution I have now settled on:I have tried theSi5351Anow, a programmable PLL oscillator which uses an external quartz (25 MHz) as its reference. It beautifully meets my "stable" and "in-circuit adjustable" requirements. In contrast to the MEMS-based DS1085, I can't measure see any jitter from my ~ 5 MHz oscillator on the scope -- even when looking 64 µs downstream after a triggering edge, as required in my delay line application. The low jitter still holds true when one uses absurd fractional multiplier and divider values in the PLL, like 35.3844. I am impressed!I had to give up the "non-volatile" requirement: The Si5351A does not have non-volatile memory on board; it needs to be configured via I²C after every power cycle. So I will bite the bullet and put a small 8-pin microcontroller next to it.(Even if, in my intended application, that means to have a computer just for configuring the clock which is more capable than the vintage Pilot ACE mini-model I am trying to build... The plan is to put the Si5351 and microcontroller onto a separate piggyback PCB, with the form factor and pinout of the classic DIP-14 quartz oscillator packages, to keep the microcontroller well separated from the Pilot ACE logic.)

author: magic
author_rank: Super Contributor
timestamp: February 21, 2021, 07:26:47 pm
content: Sounds like a waste, look for a 6 pin microcontroller