EBAZ4205 questions / problem - Page 1
Forum section: electronics / general

author: Wawavoun
author_rank: Regular Contributor
timestamp: February 28, 2023, 09:54:22 am
content: Hello there,I have since 2 or 3 years in my shop a EBAZ4205 board.Yesterday I powered it up and connect it to a console.I got the linux boot message etc... til I get the prompt asking for login and password. "root/root" is not working.Then I do the operation described herehttps://github.com/xjtuecho/EBAZ4205for resetting the root passwd.This run smoothly but after cycling the power and normal reboot I cant use the new password I have set (login incorrect message)...I noticed during the normal boot a line with "chpasswd". Can this explain the problem ? If yes how can I do to gain access to the embeded linux ?I also have jffs2 error message about some nodes.The installed system is petalinux 2016.4.Thanks for help and advices.Philippe

author: lty1993
author_rank: Unknown
timestamp: March 02, 2023, 01:44:04 pm
content: You can build Linux yourself and flash it onto the onboard NAND flash.https://www.xilinx.com/content/dam/xilinx/support/documents/sw_manuals/xilinx2022_1/ug1144-petalinux-tools-reference-guide.pdf

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 05:21:32 am
content: You have to kill the miner program after changing the Root password. It is the miner program which sets the password back. Follow the steps in the article you linked.Petalinux is pain in the ass, it is too limited, it even does not retain settings such as a static IP - if you need to change the IP you have to recompile the entire image. Petalinux is more for a specific design, you design a gizmo and create a Petalinux image for it. Petalinux is not good for tinkering. At least this was my impression. And the entire process of setting up the toolchain is tedious. I found it is better to use a ready to use Ubuntu image from here:http://www.xillybus.com/xillinux(follow the Download link for the SD card image for Xillinux-2.0 . Estimate download size is 3.5 GB)The Linux image goes to the RootFS partition. For the Boot partition you can try the attached files that use the EBAZ4205 device tree and also route the clock for the Ethernet chip. (remove the JPG extention and then join the split kernel image.zip which was split and JPG extention added just to be able to attach the files to this post).

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 05:25:45 am
content: And in order to boot from SD card you solder the resistor R2577.I did not reprogram the NAND.

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 05:47:15 am
content: Attached is a boot log with the above Ubuntu 16.04 image.This comes as a bonus:Quote

author: Wawavoun
author_rank: Regular Contributor
timestamp: March 03, 2023, 07:08:23 am
content: Hi,My target is to learn fpga.At this moment I dont know anything to that and just want to check the hardware.I have move the resistor accordingly and now the board boot from sd.I have use the image found here, supposedly verified :https://embed-me.com/ebaz4205-recycle-cheap-crypto-miner-part-1/but the boot hang.I have to record the boot log but it seems that the "real" kernel (not the bootloader) did not find the sd board.I will try with the ubuntu image, thanks for the link and the advices.Regards.Philippe

author: Wawavoun
author_rank: Regular Contributor
timestamp: March 03, 2023, 07:50:11 am
content: Re,Sorry for the question but :I should put in the boot partition- boot.bin (found into boot.zip)- another file (I assume named "image.zip") made with image.zip.001 + image.zip.002 merged ?Is that right ?Regards.Philippe

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 07:58:11 am
content: Yes BOOT.binAnd merge image.zip.001 + image.zip.002, then unzip the combined zip file.

author: Wawavoun
author_rank: Regular Contributor
timestamp: March 03, 2023, 03:58:49 pm
content: Works well !I have to test network but eth0 is here so probably non problem...Great thanks.

author: bingo600
author_rank: Super Contributor
timestamp: March 03, 2023, 08:10:22 pm
content: Quote from: Bud on March 03, 2023, 05:21:32 amThanx for that super infoI just DL your "image" and the xilybus too. As you mentioned the xilybus is 3.8G (unpacked) , but your image is 4.8G ... Did you change the xilybus image og rebuilt the linux your self ??/bingo

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 08:11:57 pm
content: @Wawavoun : Great. But I think for general FPGA learning purpose it would be better to get a board that has community support and/or a youtube channel tutorials.

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 08:19:28 pm
content: Quote from: bingo600 on March 03, 2023, 08:10:22 pmI guess Linux folks use a confusing terminology. The split zip "image" file that was attached to my post is 4 MB, not GB. This is what i believe is called the Kernel, and it must be located on the boot partition. This is what is actually gets executed during boot process, then it uses the Linux Image part (often referred to as "Root FS") that resides on the second partition, that is the one you downloaded from xillybus 3.8GB. The boot partition is small, usually 100Mb or less.

author: Bud
author_rank: Super Contributor
timestamp: March 03, 2023, 08:25:04 pm
content: Quote from: bingo600 on March 03, 2023, 08:10:22 pmNo way I could do that madnessOn a scale of 0 to 10 my Linux knowledge is "-1"I think I only made the boot.bin , to enable the Ethernet PHY clock.

author: bingo600
author_rank: Super Contributor
timestamp: March 04, 2023, 06:49:21 am
content: Quote from: Bud on March 03, 2023, 08:19:28 pmDoohhhhThat was embarassingYou are 100% right.Wonder why i didn't even think of the EEVblog UL/DL file size limit when seeing 4MB ad 4GBThanx for setting this straight ....Btw: If i have the Ether Xtal mounted (can't remember) , will it conflict with the 25MHz you are generating in your adapted code ?/Bingo

author: Bud
author_rank: Super Contributor
timestamp: March 04, 2023, 07:08:40 am
content: I recall there is a resistor jumper that connects the PHY to an FPGA line that supplies 25MHz clock. The boards that have the PHY crystal do not have that jumper installed. So no there should be no conflict. You can check the jumper just in case.

author: Bud
author_rank: Super Contributor
timestamp: March 14, 2023, 05:48:47 am
content: A breakout board for EBAZ4205 with Gerbers and Kicad project files is here:https://git.sr.ht/~ajk/ebaz4205_minimal_breakoutFollow a link to Ali there to buy 2mm connectors.Another breakout board with some periferals added is on Ali here:https://www.aliexpress.com/item/1005004460394748.htmlThe listing is confusing as the seller sells several options in a same listing. To get just a breakout board you must select "Color: transfer screen" for a breakout board with a small LCD screen, or "Color: transfer no screen" for a breakout board without a screen under the price label.I've ordered one but do not know if the seller will supply any IP or instructions for Vivado to use the USB and HDMI periferals.