JFET input stage low noise amplifier - Page 1
Forum section: electronics / general

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: March 15, 2022, 05:25:19 am
content: I have been working on a low noise preamp based on the design by Cannata et al. (http://link.aip.org/link/doi/10.1063/1.3258197?ver=pdfcov) that I thought I would share in hopes that someone might benefit from it. The input stage is a cascoded diff pair using an IF3602 matched JFET pair with a high impedance current mirror load to keep gain high up to 100 kHz. The key features are:-Film caps at the input (no leakage testing of Al electolytics required, possible because of the low current noise of the JFET input pair)-Offset trim to compensate for Vgs differences between the two JFETs of the pair-HP filter resistor shorted when switching sources to decrease settling time-Antiparallel NPN pair for low leakage input protection-Switchable gain (80 and 100 dB)-Switchable 4th order Butterworth filter stage (<12 Hz, <100 kHz)-Runs on two series 3s Li batteries, draw is around 35 mA.It is not without issues, but as far as I can tell none of those issues compromise the validity of its measurements. The key component values have all been optimized in LTSpice. The HP filter at the input has -3 dB at around 20 mHz, so it is usable over a wide range of frequencies, which I have confirmed using a two stage active attenuator made from two inverting amplifiers to give -80 dB with low impedance. The low frequency noise is higher than a previous version I built using resistive loads in the diff pair, and I am not totally sure if that is from (a) more thermal EMF from running the diff pair at higher drain current, (b) more junctions/suboptimal layout giving more thermal EMF, or (c) higher 1/f corner frequency for the particular IF3602 in the more recent revision. I have bodged in a JFE2140 JFET pair on this board, but I have not fully tested that one yet. The noise floor will be higher, but probably still usable for most things. Power supplies are LT3042 and LT3093 using a 22 uF Cset to minimize LF noise, but I have not been impressed with the LF noise measurements I got with those.I am working on a revision at the moment. I may switch to an LT1678 as the op amp on the input stage to enable +/-5 V rails, possibly a different power supply arrangement, and fix some of the bugs.I have made some noise power spectra by capturing the the voltage trace on a 34465A and using a python script to plot the fft (using scipy.signal.welch). I have attached the noise floor from 0.1 Hz to 10 kHz here, and I'll add some more later. The deficiencies of my shielding setup will be pretty clear in that spectrum. I am happy to provide the design files to anyone who is interested, but I won't put gerbers up until I have fixed some of the issues and tested the revision. This is not my area of expertise, so if anyone has suggestions or sees errors, please let me know.Curtis

author: Kleinstein
author_rank: Super Contributor
timestamp: March 15, 2022, 08:48:02 am
content: The circuit looks nice.I found a few small points for possible improvements / mistakes:The capacitor C12 should likely better go towards ground instead of towards the 7.5 V supply. If the supply is very clean this would not make a large difference and the filtering is more for the higher frequency part. Ideally the supply decoupling would include an extra series resistor for the circuit parts, not just a capacitor. With a low frequency only crcuit this is likely not that relevant though.The resistors R17 and R20 could be combined to a single resistor.For the extra low frequency noise, the resistors R7 and R14 could contribute with current noise. Especially thick film resistors that have a significant DC voltage will show some extra 1/f noise that can become relevant. So R7 and R14 should be thin film types preferrably not the smallest form factor.Trimming of R7 or R14 could be used to reduce the temperature effect on the JFET. This would reduce the effect of thermal fluctuations at the FETs.I would personally skip the connection from wiper of RV1 to the center of the 2 2 ohms resistors. The trimmers wiper resistance would this way be less relevant.The output may want some extra resistance in series if the switch resistance is below some 100 Ohms to isolate capacitove loading the the OPs.The capacitors at the filter stage should not be X7R or similar types (hard to tell from the picture if they are C0G). Film caps may allow slightly larger values than C0G, otherwise C0G is good.There is no need for R19/R36 to be high accurracy or otherwise special type.For the input protection could also use a BAV199 dual diode instead of the 2 transistors. This low leakage diode is quite common.For the supply one may get away with a little less overall voltage, possibly a slightly asymmetric (like -2.5 V and +7.5 V). This could reduce the overall power consumption and thus heat related problems.

author: MK
author_rank: Regular Contributor
timestamp: March 15, 2022, 09:16:02 am
content: Hi, also look at Gerhards response in this thread:https://www.eevblog.com/forum/beginners/jfet-frontend-amplifier-stability/msg3720466/#msg3720466

author: magic
author_rank: Super Contributor
timestamp: March 15, 2022, 10:35:49 am
content: A random idea: are you sure that flicker noise of the BJTs isn't contributing meaningfully?Collector current noise is generally suppressed by local feedback loops (enough?), but base current noise of Q4 and Q5 is out of any loop.

author: Kleinstein
author_rank: Super Contributor
timestamp: March 15, 2022, 11:02:34 am
content: The noise current from the Q3 Q4 Q5 is rather similar: it can add current to the drain sides. Similar the voltage noise of Q3 can contribute, though usually still not relevant as the emitter resistors are large.With the base current noise the question is if it is really worth to have Q4. It makes the current more symmetric, but adds some current noise. With the rather large emitter resistors the symmetry is quite good anyway even without Q4. Some adjustment with a parallel resistor to R7/R14 should be as good or better. Perfect symmetry in the currents may still not be the point of lowest drift / temperature sensitivity.

author: magic
author_rank: Super Contributor
timestamp: March 15, 2022, 12:12:56 pm
content: The reason I thought about base current noise is because Burr-Brown used JFET cascodes in some of their JFET opamps (even though bootstrapped bipolar cascodes are cheaper and had been known for decades at the time) and mentioned the problem in US4550291.You can add Q3 to the list of potential offenders, because its base current isn't suppressed by the Wilson mirror. At this point it looks like removal of Q4 can only decrease noise (but worsen DC balance and maybe gain). A simple test for whether BJTs are problem is to try lower noise parts - perhaps 2222/2907 due to their larger geometry, or dedicated LN bipolars like Toshiba 2SC3324/2SA1312.R10 could be another potential noise injection point (by modulating tail current). I'm not sure if Q5 even adds anything? The 1st stage doesn't need to have ludicrous gain, just enough to suppress U1 voltage noise. Common mode rejection is not a large problem either if input levels are limited to <±0.5V anyway.The figure of merit for U1 noise is minimization ofen/G1 + in/gm1, where G1/gm1 is the gain/transconductance of the 1st stage. It's not clear if bipolar U1 wouldn't be better. A wideband opamp is helpful indeed if high bandwidth is to be attained.

author: Kleinstein
author_rank: Super Contributor
timestamp: March 15, 2022, 02:42:43 pm
content: I think the main incentive for using JFETs for the cascode is that one gets away without the extra voltage shift for the base. So no 2 V ref or R10, if there is suitable threshold.G1/gm1 is rather large - at least for the lower frequency part. One could also look at the ouput impedance that U1A sees : between a current mirror and the cacode this is a rather high impedance (> 100 K). So a FET type OP definitely makes more sense than a BJT based one. Due to the high gain from the discrete part low noise in general is not that important for this OP. The ADA4625 is noise wise way overkill here. The LT1678 is less suitable because of the current noise, but could still be good enough.Already on its own the ADA4625 (possibly 2 channels in parallel) could make a rather good low noise amplifier. The supply current is rather high and it runs quite warm, which could be a problem.

author: magic
author_rank: Super Contributor
timestamp: March 15, 2022, 05:09:41 pm
content: Quote from: Kleinstein on March 15, 2022, 02:42:43 pmThat's a valid reason in discrete design, but it doesn't explain Burr-Brown. On IC, die area matters more than component count. JFETs are large, JFETs capable of high drain current at high negative Vgs are larger still.OPA445 even uses an NPN emitter follower + series resistor to level-shift its P-ch JFET cascode gates (schematic in old datasheets, die imagehere). That being said, it is not a particularly low noise opamp, so I suppose they used JFET cascodes for lack a of good PNP device on this noncomplementary BiFET process. Unfortunately, we don't have teardowns of nice stuff like OPA111 or OPA2107 and to be completely fair, while they did have dielectrically isolated JFETs, I don't know if they had good PNP available on that process. The newer OPA627 uses several BJTs in the input stage signal path, so the whole cascode current noise thing could be a red herring after all - perhaps false justification for patent on an economically important circuit topology.Quote from: Kleinstein on March 15, 2022, 02:42:43 pmYou are correct, I will rephrase:A bipolar, or perhaps high-speed oriented rather than low noise JFET part, could be good enough, or even better, if factors like cost, bandwidth and BW/$ are added into considerationThe formula I posted is exactly the input-referred voltage noise contribution of U1, under assumptions:- inis the differential noise current between the input pins, rather than either individual ground-referenced noise current- gm1 is the differential transconductance, but it happens to be numerically equal to single-ended gm of each JFET- the + is RMS sum

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: March 15, 2022, 05:17:32 pm
content: Thanks for the detailed analysis! I will have to take more time than I have over lunch to dig into the thread MK linked. The motivation for changing to something like the LT1678 would be to get rid of the requirement for 2.5-3V headroom that comes with the ADA4625. I agree that op-amp is probably overkill, but I decided to play it safe given the BOM cost of this project (admittedly not helped by having the 4625 there). The nice thing about having a JFET op amp is the low current noise going through R19, and there is minimal cost difference between the 4625-1 and 4625-2The cascode is not only there for gain - clamping Vds for Q2 is meant to limit the amount of heat dissipated on the part. I opted for BJT because of better matching, but the matching on the JFE2140 is probably good enough to put it there.The configuration of the source resistors R9, R13, and RV1 is to keep options open for trimming. The Vgs differential on the IF3602 I used was about 3 mV (gm was about 50 mS averaged between 1.5 and 4 mA), but I wanted to be able to keep the source resistance as low as possible for noise while considering the limited availability of trimmers with the same footprint as the Vishay 1280G.Regarding the mirror, I have seen some references to using resistive loads in long tailed pairs for low noise (from memory in AoE chapter 3 and the 4625 data sheet). In LTSpice, adding the mirror decreased the input referred noise, and it did not show a significant contribution from those transistors. That said, I am more confident in the accuracy (and relevance) of my measurements than I am of the simulation results. The reason for having the "full-Wilson" mirror there was maintaining gain up to 100 kHz. Without the op amp, the gain of that structure is about 85 dB itself with a -3 dB around 250 kHz. I cannot confirm that it goes past 100 kHz in actual measurements because I limited the bandwidth of the gain stages with feedback capacitors, but the passband is pretty flat up to 100 kHz. I will try to build up some test circuits when I get a chance to see if I can get a feel for whether the mirror is contributing to noise. I am out of IF3602 at the moment (and until May apparently), but I've got some THAT300s that should work for building a test setup.For comparison, here is the circuit I used the first time around. The reason for the IF4500 setting the tail current was that it was what I had in stock. The LF noise performance was better for that previous version, and the key difference in the spectrum (to my eye) is the lower 1/f corner, but that gives RMS noise of 5.3 nV for the resistive load hybrid and 8.5 nV for the current mirror version. The cascode stage in the previous version was also biased relative to ground because I was more concerned about clamping Vgs than limiting the Miller effect at such a low bandwidth. And yes, I did use another ada4625-2 in the filter stage.Curtis

author: magic
author_rank: Super Contributor
timestamp: March 15, 2022, 05:43:30 pm
content: Quote from: CurtisSeizert on March 15, 2022, 05:17:32 pmNote that R19 is paralled with C16-R17, but that's not a lot of consolation - that branch also has 1MΩ impedance at the corner frequency, and low frequency is exactly where noise is worst.Quote from: CurtisSeizert on March 15, 2022, 05:17:32 pmPower dissipation could be reduced by simply lowering the mirror supply voltage, but input stage GBW will suffer with loss of cascoding. Maybe less critical than low frequency gain if high frequency noise of U1 is good.Quote from: CurtisSeizert on March 15, 2022, 05:17:32 pmIf the input stage gain is high. For that, sufficient voltage needs to be dropped across those drain load resistors. Input stage gain is simply gm·Rl - more resistance is more gain, and more voltage across the loads. In bipolars it's particularly simple: gain is the voltage across Rl divided by thermal voltage (20~40mV over military range).Active loading gives very high gain with low voltage loss.Quote from: CurtisSeizert on March 15, 2022, 05:17:32 pmAnd rightly so, because LTspice doesn't simulate flicker noise in discretes.It does in most opamp macromodels, even from other manufacturers.For experiments, you could try to mod the circuit on the existing board. For example, Q3 could have their collectors and emitters shorted, rendering Q4 an ordinary mirror. No problem with it until emitter differential voltage reaches hundreds of mV and Q3A BE junction is activated. Q5 could probably be treated similarly.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 16, 2022, 02:16:09 am
content: >And rightly so, because LTspice doesn't simulate flicker noise in discretes.>It does in most opamp macromodels, even from other manufacturers.In fact, it does simulate flicker noise in discretes. It's just thatmost models do not provide the numbers.Pic is Bob Widlar's trick to get less bias current from BJTs thanfrom FETs, at least at elevated temperatures.This was the basis for one National LM1?? op amp.Input transistors are super-beta and operate at Vce = 0.7V.I don't claim to have understood it to the full extend.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 16, 2022, 02:36:51 am
content: I have spent far too much money on IF3602, at €80+ a pop.They are all individuals.The new data sheet is closer to reality, but with these data it isno longer interesting.Yes, they offer a selection service. I guess, what we get at Mouseris what is left over. :-(The data sheet guarantees next to nothing. And this capacitance!You are better served with On Semi 3910, 4 pcs. in par.

author: magic
author_rank: Super Contributor
timestamp: March 16, 2022, 07:55:25 am
content: Quote from: Gerhard_dk4xp on March 16, 2022, 02:16:09 amIt's LM108 and LM112 (internally compensated) and there is really no trick there. It has 1nA input bias which is fairly stable with temperature as in most bipolar opamps because β actually improves with temperature. Later iterations like LT1008/LT1012 or OP97 pushed it down to <0.1nA with active bias cancellation, but that does nothing against current noise and only increases it in most cases.Such bias current simply happens to be less than the leakage of JFETs running at 100°C, because that's far from stable and increases exponentially with temperature. At low temperature you are better off with JFETs of course. With 20mA bias current you are better off with JFETs tooCollector voltage plays no role other than power dissipation and the fact that those IC superbeta transistors from 1969 couldn't sustain more than a volt or a few. Yours is rated for 20V as I see.

author: ch_scr
author_rank: Frequent Contributor
timestamp: March 16, 2022, 08:00:06 am
content: Quote from: Gerhard_dk4xp on March 16, 2022, 02:36:51 amI do not understand, why no one is intrested inLinear SystemsFET offerings?They are much more reasonably priced and have representatives in many countries through which one can order. The datasheets are also more constrained.But if you need the absolutely lowest possible noise (at the price of gate capacitance and matching) you have no other option I guess

author: MK
author_rank: Regular Contributor
timestamp: March 16, 2022, 05:32:47 pm
content: Hi,Well the Linear systems are only now really becoming available, and the CHP3910 has a 30Hz or so 1/f corner and I can buy 10 for £3.10 from a distributor in the UK, I could buy 30 for less than the price of one 3601 and select the best few for a low noise amp and have some spares for other jobs.

author: macaba
author_rank: Regular Contributor
timestamp: March 16, 2022, 06:00:30 pm
content: A bit of anecdata that may be useful to someone - I measured the automotive version of CPH3910 (NSVJ3910SB3) as having less noise than CPH3910. Different fab/tighter process perhaps?

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 16, 2022, 06:38:33 pm
content: I got abt. 320 pV/rtHz from 16 CPH3910, unselected, right from the tape.Simulation with ON semi spice parameters is 100 pV more optimistic.An array of 16 can happily oscillate at 650 MHz. Beads help against that.It was funny that each transistor had different RF voltages although theywere strictly in parallel, only separated by short traces, as seen on a 2.5GHzscope with 0.6 pF active probe. OK, the 4*4 layout looked somewhat likea Lange coupler.Beads do not help against low-MHz oscillations.The latest incarnation of this amplifier is only about half-way populated.Still soldering to do.I changed the cascode from folded to normal. I wanted to run it from+- pairs of Li batteries but I have given in to use a higher positive voltage.

author: Kleinstein
author_rank: Super Contributor
timestamp: March 16, 2022, 07:10:52 pm
content: With some scattering in the threshold voltage the current would not share perfectly without extra resistors. This reduces the effectiveness of a parallel combination of multiple non matched JFETs.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 16, 2022, 08:26:49 pm
content: In #11 one can see that this is a problem with IF3602. At a given Vgs,some samples may be WIDE open while others still are closed.BF862 were and CPH3910 seem to be much better behaved in this respect.An outlier does not poison the pot, but it does not add it's share to the total gmwhile adding its capacitance.The Widlar example was just to demonstrate 1/f in LTspice transistors.I had the file on the pc.Vce = Vbe = 0.7V does not create additional currents. The circuit does depend on it.It is not just to prevent breakdown.The 2SD2704 is not a typical superbeta transistor, but you can't buy much better ones.<https://www.digikey.de/de/products/detail/onsemi/CPH3910-TL-E/4847608?s=N4IgTCBcDaIMIAcAWBmAnARgAwgLoF8g>0 available. Chipageddon hits again.

author: 3roomlab
author_rank: Frequent Contributor
timestamp: March 16, 2022, 09:38:47 pm
content: maybe some of you have already seen this comparisonhttps://www.mvaudiolabs.com/diy/modern-jfet-noise-measurements/there is also the guy from japanhttp://tech-blog-en.sblo.jp/article/183391570.html

author: julian1
author_rank: Frequent Contributor
timestamp: March 16, 2022, 10:24:35 pm
content: Do the signal relays and analog muxes have better bandwidth properties at 100kHz than using dpdt toggle switches directly? Or perhaps the design was influenced for possible future digital/mcu control?

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 17, 2022, 10:08:03 am
content: Is this for Curtis or me?I had ADG1404 CMOS switches in earlier versions, with aXilinx Coolrunner2 as a decoder + opto coupled SPI interfacefor computer control. I think there was some crosstalk, evenleading to oscillations @80 dB+ gain.The Coolrunner needed programming which is a NoNo formost people even if I provide the JEDEC file. So I changedeverything to relays. Esp. at in the input section it is hard to tellif the analog switches are still OK or good enough at all.There is one relay that is controlled by a window comparatorthat checks the operating point of the input stage. Afterpower-on or gross overdrive it reduces the gate bias resistorby one or two decades; otherwise it takes a month to returnto the valid o/p. I seemed to have some problems withswitching kickback.There are also relays on the input to short it or to apply 60Ras a 1 nV/rtHz standard noise.I could not use mechanical switches since the amplifier andits Li cells are inaccessible in a Hammond alu box. Avoidingground loops helps tremendously to get clean spectra.

author: MegaVolt
author_rank: Frequent Contributor
timestamp: March 17, 2022, 10:14:48 am
content: Quote from: Gerhard_dk4xp on March 16, 2022, 06:38:33 pmCan you share the circuit diagram?

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 17, 2022, 10:32:24 am
content: Yes, I'll do when the semi-soldered version works.There are too many versions otherwise I have to keep track of.I don't want to usurp this thread.One more thing with the IF3602:Does anybody know how this plateau in the noise happens?X-axis is in KHz.

author: Kleinstein
author_rank: Super Contributor
timestamp: March 17, 2022, 11:39:43 am
content: From the little measurements I have done with JFETs I have seen quite some popcorn noise. The popcorn noise with a limited number of steps / active defects should have some lower frequency limit to where most of that noise happens. In the noise spectrum popcorn noise may look a bit like the shown curve with a 1/f like fall of to lower frequencies and some maximum at around the typical frequency for the jumps.With relatively fast processes the jumps may not be so obvious and identifiable as popcorn noise.

author: MK
author_rank: Regular Contributor
timestamp: March 17, 2022, 01:26:40 pm
content: Quote from: Gerhard_dk4xp on March 17, 2022, 10:32:24 amI think humps are G/R noise, the hump depends upon temperature and the recombination time for the impurity that is present.I believe that if you cooled or heated the hump would move frequency or even disappear.Some people have seen humps appear when they have cooled a device to improve its noise!MK

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: March 17, 2022, 10:50:27 pm
content: Quote from: Gerhard_dk4xp on March 16, 2022, 02:36:51 amLooking at that makes me wonder about paralleling a bunch of JFE2140s as another possible alternative. Much better matching, 20x cheaper, etc. To me, these new JFEx140 parts hold more appeal than the LSK389/LSK170 because the noise performance is similar, gate capacitance is lower, and the matching is much better.Have you noticed spread on the 1/f corner frequencies for these IF3602s?Quote from: julian1 on March 16, 2022, 10:24:35 pmOne of the relays is momentary. It shorts the resistor at the input HP filter and forces the current to go through a 2k2 resistor when changing sources (between the calibration jumper header and the SMA input). It is controlled by a 555 timer to activate the relay for 5s whenever the source toggle switch is flipped. The settling time of the first version was a major irritation (usually took overnight, sometimes required flipping the power switch), but this one always settles within about 30 min. The benefit to the other relay (K1) is that it doesn't get in the way of your thumb (as much) when you're unscrewing the SMA connector. I had originally put relays where the muxes are when I was doing layout, but the muxes are smaller, and the relays were a little more awkward to fit in with the shield, which is there to restrict air movement around the sensitive nodes.Quote from: magic on March 15, 2022, 05:43:30 pmThe corner frequency is below the range I was looking to measure for this reason - the impedance of C16 at 0.1 Hz is 234k, so current noise from the noninverting terminal at that frequency mostly does not get transformed to voltage noise by R19. Also, the signal is 200x larger at that point, so the effect would have to be very significant to have an impact. I did take the output signal of the first gain stage (between TP1 and TP2) run it through a G=50 inverting amplifier, and there was no effect on the voltage noise spectrum.If anyone is curious, here is the noise voltage spectrum for LF noise of the +7V5 rail (generated with an LT3042 with the set resistor bypassed by a 22 uF Ta cap). I measured noise up to 25 kHz on the positive rail, and it is actually quite good above 10 Hz, but I cannot find that trace at the moment. The positive supply rejection should be about the same as the CMRR of the op amp, which is >100 dB, but I wonder if in practice capacitive coupling might cause some of this to appear at the input. The 7V5 rail is actually the first inner copper layer (should have been ground, and was ground on the previous version). Perhaps I can bodge in some ridiculously large cap to bypass that set resistor and see if that has an effect also. The -7V5 rail is the same story in noise, but it's shielded from the input signal better (by the +7V5 rail) and supply rejection is improved by the current sink, so I believe if one of the rails is the culprit, it's probably the positive one. I may try a LT6655-5V driving the set pin of an LT3040 for future designs.CurtisCurtis

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 18, 2022, 10:05:23 am
content: Quote from: CurtisSeizert on March 17, 2022, 10:50:27 pmNo, that was quite consistent with my 15 or 16 samples and like typical in the data sheet.I did not test all of them.Note that the 1/f corner is somewhat unfair. Much noise in the flat part of the spectrumtends to improve the 1/f corner.Rubiola does not like it. He has a different set of coefficients.<http://rubiola.org/pdf-articles/journal/2004rsi(rubiola)low-flicker-dc-amplifier.pdf>That's a most interesting web site.

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: March 19, 2022, 04:30:37 pm
content: Quote from: Gerhard_dk4xp on March 18, 2022, 10:05:23 amThe reason I asked is because that was the major difference between the two IF3602 amps I built - the first had a 1/f corner around 1-2 Hz, the second was 10-20 Hz.In the end, this amp was meant to measure power supplies and voltage references, and the noise floor is adequately low to characterize the 1/f noise of those pretty well. Actually, the wideband noise density of 1 nV/rtHz is more of a limitation because it will add significant error to measuring the noise of, for example, the 7V5 rail of this amplifier, which is around 2 nV/rtHz using an LT3042. From using this a bit recently, the key advantages are the bandwidth and the settling time. The settling time is only about 2 minutes for most things, but it helps to wait up to 15 min for the quietest DUTs. The physical act of changing sources and putting everything back in the cookie tin takes about as long as settling.I did some captures on my scope to get measurements out past the Nyquist limit imposed by my 34465A, and I noticed a 27 kHz oscillation on an ADR1000 board I made that (I think) was actually appearing as popcorn noise when I measured the reference directly because of aliasing. I'll put a couple of the spectra below. I had a bunch saved up, but I need to reprocess the captures because I lost the plots when my computer crashed.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 19, 2022, 05:13:01 pm
content: 10-20 Hz 1/f corner sounds quite OK for a FET to me.Is the noise in the flat region comparable between the two amplifiers?Are the gate resistor and the input coupling capacitor the same?Having too small a coupling capacitor can result in a lower -3 dB frequencythat is still completely OK, but the noise behavior will be very different.Sub-1nV/rtHz amplifiers need the noise of their bias network shortedthrough the low impedance DUT. The DUT MUST be low impedanceor it would generate too much thermal noise alone from this and wouldnot be worth the amplifier.That noise rises faster than 1/f, more like 1/f**3 IIRC.I had that effect in my 10*2*ADA-4898 op amp amplifier with 10K bias-Rand 100 uF foil coupling cap. You see the effect in most of my early plots.Changing that to 4700uF wet slug tantalum removed the noise rise for good,but had other drawbacks.When your analyzer is 2 channels and can do cross correlation, you may notneed to drive amplifier noise very far. XC can bring you another 20+ dB.I tried it with my 89441A and it was spectacular. So good that I assumedoperator error. I will retry that.Gerhard

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 27, 2022, 01:48:06 pm
content: I have continued work on the 16 x 3910 this weekend.The horizontal part of the purple trace should be at -180 dBV, gain is not yet calibrated.All that counts is the difference between the two traces. 10 dB difference would saythat the amplifier's own voltage noise is 10 dB below the noise of a 60R resistor.10 dB below 1nV/rtHz is 316 pV/rt Hz.That*s in the range that could be expected, but the 1/f**3 part still starts somewhat early.NSVJ3910 and CPH3910 have identical data sheets and the same marks on the chip.Once taken from the tape it's impossible to tell them apart.The 0-TC point of the 2sk2394 is near Idss. That is too much current with 16 pcs. in parallel.Since I have no feedback around the FET, the 3910 seems better for my amplifier even ifthe 2SK2394 should feature slightly less noise.Gerhard

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 28, 2022, 01:48:00 pm
content: I could tame the steep noise rise below 50 Hz a little bit.My Agilent 89441A has less 1/f on the more sensitive ranges, i.e. full scale = -30 dBm.The preamp gain can then be reduced.The major change was at the LT3042 that feeds the input cascode. The 3042features 2nV/rtHz at 10 KHz, but below 20 Hz it quickly gets worse. I increased Creffrom 4.7 to 47uF tantalum. Now it takes two minutes until Vcc is stable, butprobably one can play with the PowerGood divider to speed it up somewhat.Then there is a now a 1000u oscon on the 13V5 line. It seems to help somewhat,but I'm not yet sure how much. There is no space to insert something really big.Gerhard

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: March 29, 2022, 03:39:03 am
content: Quote from: Gerhard_dk4xp on March 28, 2022, 01:48:00 pmIs that change in LF noise performance just from the increased bypass capacitance on the LT3042 Rset? Is your amplifier a diff pair-op amp input stage? If so, I would have expected more attenuation of Vcc noise. In any event, I would not consider 2 minutes of warm up time to be that big of a problem, so that is a nice improvement!Given the issues with designing around the IF3602, I am working on a major revision to the amplifier I am working on that uses 8 paralleled JFE2140s with independent current sinks on the tails for each in two paralleled gain stages (for 16 total JFET pairs). The matching between parts on these is at least as good as the matching between the two individual JFETs in the IF3602 - in a quick sample of five parts I got a spread from 798 mV to 810 mV VGS at 500 uA. The differential between VGS for all these was <1 mV, and 4/5 were <500 uV. In simulations, the noise reductions when increasing the tail current beyond 1 mA for each JFET pair seemed to be tempered by the need to lower the impedance of the current mirror load by decreasing the emitter degeneration resistor values if the supply voltage was to remain the same. What Is are you running the CHP3910s at?CurtisCurtis

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 29, 2022, 07:36:46 am
content: Yes, the only important change is the increase of the capacitor across Rset from 4u7to 4u7 + 47u. LT wrote "up to 22u" somewhere in the data sheet text. I'm not sureif this is a real limit or only a level of despair.FET current is abt. 45 mA.The picture is quite close to the actual circuit. There is a thermal noise generator on Vcc.The 2 nV/rt Hz are acceptable, but 20 nV/rtHz would be a desaster. A LM317 would delivermuch more, everywhere.Note that the LT3042 noise does not behave like 1/f. It rises much faster. When the capacross Rset is ineffective, you get the full broadside of 135K voltage noise (in my case with 13V5)Below 10 Hz, the noise of the 10Meg gate resistor also starts to play a role. (red trace)It is shorted by the 10u input C through the DUT. INCREASING the Resistor makes thenoise contribution smaller since the shorting is more effective. Same for a bigger coupling C.A differential setup would require 4 times the number of transistors for the same performance.Somewhere is a limit, although H&H have a differential amplifier with 64 BJTs in theirbook "Art Of Electronics", ed. 3.I have built an asymmetric quarter of it; it delivers the promised 70 pV/rtHz. I accepted theugly Cin since most interesting DUTs have DC offset anyway.The bottom right IF3602 pair in reply #11 has quite a lot of offset.

author: Kleinstein
author_rank: Super Contributor
timestamp: March 29, 2022, 12:03:20 pm
content: When using a differential pair, there is much less effect of the supply noise.The 1 FET amplifier has noise from the FET and noise from the supply / current source (LT3042 + resistor)The differential pair has the noise from 2 FETs and very little noise from the supply.So the 2 nd FET kind of competes with the LT3042 based current source and it is not clear which way is lower noise.For the higher frequency range the LT3042 can use filtering, but this does no longer work at the low frequency end.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 29, 2022, 01:09:15 pm
content: The differential solution takes 4 times the number of low noise transistorsfrom the start, with a corresponding increase in input capacitance.With the IF3602, that approaches a nF in just one.OTOH, having a clean VCC is easy. The LT3042 with a "large" cap == 47udoes it for the 300 pV level. If that should not be enough, I could returnto the capacitance multiplier with a Zetex 851 / 951, or the smaller SOT-23relatives. I just wanted fixed voltages for my operating point window comparator,which is kind of a luxury problem, just reducing waiting times.Full Lithium ion cells deliver 4.2 Volts and can be discharged down to < 3.5 V.That is quite a moving target.With a higher Vcc one could use a larger load resistor, both providing moregain before the noise injection point and better isolation of Vcc from the signal flow.Cheers, Gerhard

author: MK
author_rank: Regular Contributor
timestamp: March 29, 2022, 03:45:43 pm
content: Hi Gerhard,I noticed your comments about the noise figure being optimistic for the 3910's. I noticed the same thing with the BF862's, so I had a tweaked model where I adjusted the noise figures to better match the reported numbers, a computer crash lost the model, but you could tweak the parameters to match the numbers you see.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: March 30, 2022, 08:32:51 am
content: I've tried to massage the 2SD2704 in reply #10.Looking at my library I found that I have no models ofinteresting low noise / high gain transistors that include 1/f data.Does anybody else? Or has anybody measured that himself?The interesting parameters are AF and KF in the spice model.

author: MK
author_rank: Regular Contributor
timestamp: April 04, 2022, 01:09:58 pm
content: Quote from: Gerhard_dk4xp on March 30, 2022, 08:32:51 amThis page seems to help:https://www.youspice.com/spice-modeling-of-a-jfet-from-datasheet/5/

author: 3roomlab
author_rank: Frequent Contributor
timestamp: April 04, 2022, 06:06:55 pm
content: Quote from: MK on April 04, 2022, 01:09:58 pmyea the KF and AFI have tried to DIY the values before quite sometime ago by randomly trying values** edit : I think I maybe getting a hang of it.

author: MK
author_rank: Regular Contributor
timestamp: April 04, 2022, 06:40:20 pm
content: From memory the exponent value gives the steepness at low F, but they do interact, it would be helpful to have that pspice curve fitting program available to use! I never did get the corner frequency correct either., but could get it to give numbers that corresponded to the consensus values of noise found by several contributors.

author: 3roomlab
author_rank: Frequent Contributor
timestamp: April 08, 2022, 07:28:29 am
content: Quote from: Gerhard_dk4xp on March 30, 2022, 08:32:51 ami found some infineon models with AF / KF (2016 library)BFP183 BFP196 BFP193 etc 30++ modelsI did not browse the latest file at the website, there probably are others.

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: May 15, 2022, 12:55:20 am
content: Quote from: Gerhard_dk4xp on March 29, 2022, 01:09:15 pmI ended up doing a revision and replacing the IF3602 with 16x JFE2140, but I kept the differential amplifier input stage (with some modifications) so that measurements would be easier with my setup. The process control on the TI JFETs is much better. I measured 42 samples taken from three orders, and the highest and lowest VGS at 500 uA were 55 mA apart. The maximum VGS offset I found was 1.13 mV.The total tail current is rather large at 22 mA, but the noise and bandwidth performance are reasonably good. LF noise (0.1-10 Hz) was consistently between 3.0 and 3.1 nVRMS, and the wideband noise is a bit below 600 pVRMS. My single cookie tin is not fully shielding from 60 Hz pickup and odd harmonics in the 10Hz-10kHz spectrum.Total gate leakage current is comfortably below that of a single IF3602, so the amplifier settles faster after opening the switch that shorts in the input HP filter resistor. From the specs, the total gate capacitance should also be lower, but I have not measured this. The -3 dB point is about 2.5 MHz with OPA1655 gain stages. There is some peaking before gain rolls off, so I will likely reduce the bandwidth to flatten the response. I have not investigated which stage is responsible for this behavior yet. It may be possible from simulations to increase the bandwidth further, but I think this is good enough for me.Curtis

author: 1audio
author_rank: Frequent Contributor
timestamp: May 16, 2022, 01:35:25 am
content: Do you have a sense of the input C and input bias current with 16 JFETS? The original article is no longer at that link. Can you post your circuit?

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: May 17, 2022, 05:22:58 am
content: The total gate leakage current is in the neighborhood of 9 pA (92 uV across a 10M resistor), or about 500 fA per JFET, but that assumes no leakage to ground other than through that resistor. I haven't measured the total gate capacitance, but it should be 240 pF based on 16 JFETs at 15 pF apiece (datasheet values). I think that applications that required lower gate capacitance would work better with fewer paralleled FET pairs perhaps running at a higher tail current. The 10 Hz 4th order LP filter does not work as drawn, so I will likely change it to a higher frequency or delete it altogether.I simplified the schematic a bit and deleted the parts that I did not populate. I have been busy with other things, so I have not dealt with the gain peaking issue. My guess is that it is from the first stage because I kind of titrated the feedback capacitance up on that stage until it stopped oscillating (it took 45 pF).Curtis

author: 1audio
author_rank: Frequent Contributor
timestamp: May 17, 2022, 05:40:09 am
content: Impressive work.Looking at it I think the cascode could reduce the input capacitance significantly. Might be worth measuring. In any case 240 pF should not be an issue in most applications of something like this, nor the input leakage, however it will change a lot as the Jfets heat up.It looks like a natural for ferrite beads on the gates of all those FET's. I have had to deal with internal oscillations there a lot.In a similar application I used depletion mode mosfets for the cascode. They work really well and eliminate the bias stuff for the cascode.

author: Kleinstein
author_rank: Super Contributor
timestamp: May 17, 2022, 05:52:47 am
content: For the input capacitance the full data sheet value does not apply for the visible input capacitance. The value in the DS is usually for a common source circuit. With the differential amplifier the source moves essentially like the input and the capacitance is thus not effective.The gate capacitance can however still be effective in the very high frequency limit. The transition can be a reason for the sometimes observes negative input impedance, that can lead to osciallation.The choice of the OPs in the current sources is a bit odd: the OPA2191 has quite a bit of low frequency noise. My choice here would be more an OPA2202.There is no absolute need to fully separate current sources. A single current source and than resistors for current sharing between pairs should be good enough.

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: May 17, 2022, 09:08:51 am
content: Since the bias current seems to be important here:This is an heroic effort of someone at ETH Zürich in Switzerland:<https://arxiv.org/pdf/1708.06311.pdf>My own amplifier does not make big progress, I must first createa 100 MHz clock oscillator with extra low phase noise for a15GHz synthesizer.But 100u tantalum seems to work nicely to push down the noise cornerof a LT3042.That noise peak might be that stability problem that haunts meso long already. Try a much faster Op Amp or simulate thereal part of Zin. = re( Volt_input_signal/ current_input_signal).It could be negative at some frequencies.regards, Gerhard

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: May 17, 2022, 04:42:20 pm
content: I have not had much time to do a lot of in circuit testing outside of verifying gain and noise performance, so I can look into these things, but it may be a few days. From simulating the circuit with various op amps on the input stage, I suspect the gain peak is related to that. I attempted to make a DC-coupled version using an AZ stabilization scheme similar to the one in Linear AN-61 (using an LTC2058 and larger Cf on the bias control circuit), but I found the noise performance at <1 Hz to be far inferior. In that version I used LTC6240s as the op amps in the input stage, and those required larger feedback capacitance to ensure stability (I believe 100 pF was the minimum). Importantly, in both cases, the results were consistent with simulation. With more V+ headroom, there would be a larger choice of op amps that could be used, and some of these could allow operation at higher frequencies.That said, I wanted to be able to operate with most of the charge on 4 series Li batteries, and to me that was more important than pushing the limits on bandwidth, as the amplifier already covers 7 decades. Keeping the supply voltages down was another way to minimize power dissipation that might cause thermal gradients that could spoil the LF noise performance. Finding an op amp for the gain stage that has low Ib, reasonably low Is, and can operate with 2-2.5 V headroom on V+ took a lot of data sheet reading. I was a bit nervous that the poor LF noise performance of the OPA1655 would show through, but the gain of the input diff pair seems to have been large enough to avoid that issue.An observation I made that may be more informative to people who are more experienced in the art than I am (which I assume is probably everyone who responded to this post): Good LF performance (<1 Hz) is only accessible with magnetic shielding. Thermal shielding does not really improve things from having the board just sitting out. Outside of 60 Hz pickup (and harmonics), the HF noise is relatively unaffected by shielding. The board is a 4-layer with V- and most signals on the top, solid ground planes on both inner layers, and V+ (with some signal) on the bottom. I can post gerbers and project files when I've got some more time if anyone is curious about the layout. The input stage is about as tight as it can possibly be.For Ib and thermal performance, the overall current draw is 47 mA on both rails, and no parts get noticeably warm at the maximum battery voltage (8.4 V for both). Once I have drilled the necessary holes in the enclosure I plan to use, I'll get a thermocouple in there to see if that changes anything and provide more quantitative results. I had expected the thermal performance to be worse than it has been, so thankfully I will not have to machine any copper parts and add peltier cooling to keep things in check. That would probably be too much work anyways.Regarding the choice of the op amps for the current sources and the overall configuration thereof, I am satisfied but perhaps not pleased with that part of the design. I am relatively certain the op amps do not have a significant impact on the overall noise performance there as most of the noise comes from the voltage reference. I did simulations with variously mismatched JFE2140s to get an idea for attenuation of the noise of the current source. I cannot remember the exact numbers, but I do remember it was enough to prioritize supply current, package size, and worrying about other parts of the design more. Perhaps the OPA2202 would have been a better choice, but it would probably work well either way. Given the apparent level of process control on the JFE2140s, this may be overkill, but when one of the pairs was acting like a short I was very happy that I only had to pull off 2 JFET pairs instead of 8.Anyways, given that the performance of this design is already far beyond what I need, I am not sure how many iterations I will do. @1audio if you are interested in taking the design further, I am happy to share the kicad project files. The layout was quite time consuming.Curtis

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: May 22, 2022, 08:52:18 pm
content: Quote from: 1audio on May 17, 2022, 05:40:09 amI was doing some more testing and found that the circuit becomes susceptible to oscillation with increasing source impedance. This begins to show on the 60R calibration resistor and gets quite bad with the 1.5k resistor. The peak was originally at 1.78 MHz. Reducing the amplifier bandwidth by increasing feedback capacitance to 150 pF helped reduce the amplitude of the oscillation somewhat and the frequency of the main peaks is now 1.09 and 1.55 MHz. The -3 dB point is about 500 kHz for the first stage now. The behavior is the same when connecting sources with any significant length of coax (more than about 20 cm). A 50 ohm terminated length of coax is similar to the 60R calibration resistor. If I replace the termination with a short, the oscillation is still present, but some of the harmonics become larger in amplitude than the fundamental. For 1 m (with Cf=45 pF, with a fundamental of 1.78 MHz), a much larger oscillation occurs at 10.7 MHz. In this case the frequency of the oscillation depends upon the length of the cable used. The 10.7 MHz oscillation was about the same amplitude after the first stage (Av=201) as it was after the third stage (Av ~ 10k total).I took a couple screen captures from the scope with its integrated FFT function to show what this looks like in the frequency domain and processed a longer raw capture because this scope for some reason has no way of doing a log scale x-axis with FFTs. I made a Bode plot for the output of the 100 kHz LP filter also, which I will include for posterity, though it isn't really relevant to the oscillation issue.Is there a general solution to this type of problem that is more elegant than reducing the bandwidth of the first stage further? My sense is that these oscillations are at too low a frequency for ferrite beads to be effective, but my experience is limited on this. I have also seen lead networks between the legs of the differential pair that I assumed were put in place to ensure stability. Are there general approaches to troubleshooting this problem or good resources to check out?Curtis

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: May 23, 2022, 06:49:27 am
content: Quote from: CurtisSeizert on May 22, 2022, 08:52:18 pmThere are 2 oscillation mechanisms in these amplifiers. One is local to the FET group.The wiring of the 16 FETs allows a lot of feedback at VHF+ and gm is huge. This is helped againstby the beads in the gates and brutally by the capacitors from the drains to GND. The capacitors canbe huge in the 500 MHz world, but they won't limit bandwidth since the 2 Ohm input impedanceof the cascode is in parallel, at least a relatively low frequencies.The other mechanism is feedback around the op amp back into the sources. Don't deal with itbefoe you have solved mechanism 1. Leave the feedback loop open until this is done.The delay though the op amp creates a phase shift in the feedback loop that is too large for the attempted bandwidth. I have looked deeper into this in the single ended variation with feedback into the source. The differential version is probably the same.Symptom is you get a negative real part of the input impedance at mid-frequencies, 100 KHz or so. That happens in LTspice as well as with the vector network analyzer. It goes away if you limit the bandwidth of the FET/cascode to very poor values or improve the feedback amplifier to "very very fast". A TI 3 GHz THS43?? op amp worked for me but its 1/f noise was so large that the 35 dB gain of the FET stage would not mask it. By far.I could not find a solution to the feedback problem, and I tried exotic things. So I was fed up enough to go without feedback around the FETs. The gain of the FET stage varies with the square root of the drain current. If you stabilize the current, gain will stay where it is. I made a temp-stable IF3602 version that proved not to be necessary. The 45 mA for 16 pcs. 3910s was a lucky find in the simulator where a pos and a neg TC cancel. I did not verify this on real hardware because of operator fatigue.BTW voltage noise of the FETs improves with the root of the gain, or the 4th root of drain current.That makes it not so attractive to crank up the drain current.Quote from: CurtisSeizert on May 22, 2022, 08:52:18 pmThe beads behave like resistors at frequencies where they work. That means they also generate thermal noise like a resistor at the frequencies they work.

author: dzseki
author_rank: Frequent Contributor
timestamp: May 23, 2022, 07:00:36 am
content: Are you aware of this circuit already?https://www.beis.de/Elektronik/LNPA60dB/LNPA60dB-en.html(If you go further to the development page there is the schematic)The only thing I don't believe is that the input capacitance is only 5pF...

author: branadic
author_rank: Super Contributor
timestamp: May 23, 2022, 09:36:37 am
content: Quote from: dzseki on May 23, 2022, 07:00:36 amSeems to use BF862 (2Ap).-branadic-

author: dzseki
author_rank: Frequent Contributor
timestamp: May 23, 2022, 10:29:17 am
content: Quote from: branadic on May 23, 2022, 09:36:37 amYes.TI recently rolled out some new low noise (audio) JFETs too, JFE150 (single) and JFE2140 (matched pair), they are similar to the BF862, with 0.8nV/rtHz noise, but comes with more than double input capacitance (24pF).The good side is that they are so new that one can actually buy them from stock...

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: May 23, 2022, 11:25:36 am
content: 2AW is also BF862. I heard the last letter says HK or mainland China.But that is history.On DIYaudio.com is a thread in the commercial section triggered by 2 TI sales people.Maybe you can interest them for the Stuttgart meeting. Methinks the TI FET businessis historically near Munich.The Beis thingie is limited to 20 KHz. That removes most problems that arise whenyou want BANDWIDTH! And the input RC should be much larger for NOISE reasons.

author: dzseki
author_rank: Frequent Contributor
timestamp: May 23, 2022, 12:34:13 pm
content: Quote from: Gerhard_dk4xp on May 23, 2022, 11:25:36 amIs it?Quote

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: May 23, 2022, 12:49:22 pm
content: Then this needs some explanation:

author: dzseki
author_rank: Frequent Contributor
timestamp: May 23, 2022, 01:01:08 pm
content: Quote from: Gerhard_dk4xp on May 23, 2022, 12:49:22 pmI think he has been using his own DA-AD measuring system (also found on the page) which is eventually limited to 192kHz sample rate.

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: May 23, 2022, 02:23:00 pm
content: Quote from: dzseki on May 23, 2022, 10:29:17 amThe amplifier I am troubleshooting uses JFE2140s. I am a fan, not least of all because the parameter spread is reasonably tight. I will look at the link you included.@Gerhard_dk4xp I messed around with the circuit a bit more last night and was able to recreate the problem on LTSpice. I was able to fix it by adding a 100 pF cap between the input gates and ground and by lowering the feedback capacitance back down to 45 pF. I tried even lower values but the circuit was not stable below 45 pF.Curtis

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: May 23, 2022, 02:59:29 pm
content: I noted that also, that some capacitance on the input helps. If you force currentinto the source (and the diff amp makes that, too), then the gate must not float freelyin the universe, only connected by 1 Meg or so with the "real world". Then thegate potential would be AC-wise determined by stray capacitance.For the feedback to work at all, the gate potential must be at least somewhat defined.The capacitor makes that possible, at least in the short term.Other than that it is not really welcome.

author: MiDi
author_rank: Frequent Contributor
timestamp: October 13, 2023, 02:35:30 pm
content: Follow upLow noise 0.01Hz-1+MHz amplifier project

author: EC8010
author_rank: Frequent Contributor
timestamp: October 13, 2023, 04:58:20 pm
content: BF862 is now unobtainium, but the (dual) 2SK2145 is still available at a sensible price. I have made low noise amplifiers (<1nV per root Hz) using paralleled 2SK2145. A 2SK2145 can be soldered to a SOT23-6 adapter PCB, then six devices stacked by driving wirewrap pins through the board holes and soldering.Based on my measurements, the following LTspice model (adapted from 2SK170 model) works and gives realistic results for white noise and 1/f noise:.model 2SK2145 NJF(VTO = -0.88 Beta = 0.018 Lambda = 0.04 Rs = 8 Rd = 8 Is = 1E-17 Cgs = 10p Cgd = 3p Fc = 0.5 Pb = 1 Vk = 100 Alpha = 1E-7 Kf = 92.85E-18 mfg = Toshiba)From a sample of 150 2SK2145 VTO matching between their two devices was 3.9mV (one standard deviation) once six outliers (VTO mismatch >10mV) had been removed.

author: Kleinstein
author_rank: Super Contributor
timestamp: October 13, 2023, 05:47:14 pm
content: The SK2145 are parts with a relatively high voltage rating and as a consequence relatively large capacitance for the transconductance. They can still be good parts for a large signal amplifier.For very low noise I would more looks at the low voltage part like the SK3557 or NSVJ6904 (similar case to 2SK2145).Getting an idea on the quality of VGS matching is nice, as there is not much room for trim.

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: October 14, 2023, 02:03:17 am
content: Quote from: Kleinstein on October 13, 2023, 05:47:14 pmThe VGS matching on the NSVJ5908 (dual of the 3557 with common source) is not good. I had at one point intended to use them in a LNA project, but I decided that even with selection, yield would be very low. I didn't try many or write things down, but my recollection is several hundred mV mismatch. The JFETs in the same package are really no closer than two from different packages, so I am guessing this is indicative of the spread of the singles as well. I believe the automotive qualified 3557s have somewhat better 1/f noise than the normal ones. It is possible that the few I checked were aberrations, but the spec is a barn door, so I suspect not. I have some CPH6904s, but I haven't tested them.

author: macaba
author_rank: Regular Contributor
timestamp: October 21, 2023, 04:13:59 pm
content: I was in need of a weekend diversion, and was inspired by this thread... see attached simple amplifier schematic with NSD chart, using 4x JFE2140 and OPA210.Might be useful for someone needing to put something together in a hurry?

author: TimFox
author_rank: Super Contributor
timestamp: October 21, 2023, 04:18:37 pm
content: Was that measured with the input shorted to ground, and what was the DC offset at the output?

author: macaba
author_rank: Regular Contributor
timestamp: October 21, 2023, 04:21:41 pm
content: Quote from: TimFox on October 21, 2023, 04:18:37 pmYes and untrimmed offset is 600mV (so that gives you an idea of JFE2140 offset, although I didn't make any effort to match the resistors). I quickly trimmed it to 17mV, with large value resistor in parallel with 1.866k, so it would fit in the 100mV range of DMM6500 on digitize mode.

author: TimFox
author_rank: Super Contributor
timestamp: October 21, 2023, 04:23:52 pm
content: Any idea why the frequency spikes at 50 Hz and harmonics are so large?I would expect power supply problems to start at 100 Hz.Otherwise, nice amplifier!

author: tridac
author_rank: Regular Contributor
timestamp: October 21, 2023, 04:26:30 pm
content: It's been a while, but in pro audio design work, pnp transistors provide the best noise figure. They have a lower base resistance than npn, resistance which is effectively in series with the input source. There are also absolute limits on noise figure, due to the source resistance itself, with higher = worse. Fets were generally considered noisy compared to bipolar, but that may have changed.The classic book on low noise design is:Low Noise Electronic Design, by Mothchenbacher and Fitchen, which has many examples, as well as the theory...Chris

author: TimFox
author_rank: Super Contributor
timestamp: October 21, 2023, 04:31:22 pm
content: In general, the choice between a good JFET and a PNP BJT depends on the source impedance and the required input impedance.I had good luck with 2N4250 PNPs (later replaced by other prefixes on -4250), which score well in the Motchenbacher and Fitchen books, (as well as the TO-18 2N3964).However, very low noise voltage JFETs can compete with PNPs at, say, 1 k\$\Omega\$ source impedance: it's quantitative.

author: macaba
author_rank: Regular Contributor
timestamp: October 21, 2023, 04:38:21 pm
content: Quote from: TimFox on October 21, 2023, 04:23:52 pmAnecdotally, over the last few years I've noticed my lab area has a lot of 50Hz noise (even when I turn nearly everything off). I will try repeating the measurement in my garage (which I used once before, much quieter).With regards to the JFET/NPN/PNP, I wanted a JFET input so I can use something like 22uF + 1M HPF to measure voltage references.

author: TimFox
author_rank: Super Contributor
timestamp: October 21, 2023, 04:46:18 pm
content: Historical note: later, when working between 1 and 20 MHz, I had excellent noise results from the Sony 2SK152 JFET (of blessed memory, only the good die young) in tuned amplifiers.At the time, it had the best available ratio betweengmandCgd.Interfet may have a replacement in production.Unfortunately, discrete JFETs are no longer as fashionable as they used to be.

author: tridac
author_rank: Regular Contributor
timestamp: October 21, 2023, 04:55:56 pm
content: I found the only way to deal with noise is to build inside diecast or other screened boxes. Bnc connectors for signal in/out, rf chokes and caps for the power filtering. Ideally, run from batteries internal to the box. Even at a few miilivoilt levels, noise will find its way in otherwise...

author: TimFox
author_rank: Super Contributor
timestamp: October 21, 2023, 05:04:49 pm
content: For physically larger circuits, I assembled two aluminum cake pans (that have flat flanges) with hinges, held together by clips during operation.A rectangular cutout allowed changing aluminum plates that contained the BNC connectors and power connections for different applications.I usually mounted two threaded stand-offs to support boards being tested against shorting to the box.

author: tridac
author_rank: Regular Contributor
timestamp: October 21, 2023, 06:01:07 pm
content: No substitute for actually building the hardware to confirm the design. Much easier in the old thru hole component days, where most designs here were wirewrapped for easy modification, Getting the pcb done was always at or near the last step...

author: Gerhard_dk4xp
author_rank: Frequent Contributor
timestamp: October 22, 2023, 01:21:48 am
content: Quote from: TimFox on October 21, 2023, 04:46:18 pmThere are new JFETS from TI: (interesting thread)<https://www.diyaudio.com/community/threads/ultra-low-noise-jfets-from-texas-instruments.375079/>Gerhard

author: CurtisSeizert
author_rank: Regular Contributor
timestamp: November 02, 2023, 03:49:55 pm
content: Quote from: macaba on October 21, 2023, 04:13:59 pmNice. I have played with these a lot, and I think the sweet spot for drain current is around 0.5 mA per JFET if you're interested in low frequencies. That said, the zero tempco drain current is in the neighborhood of 7 mA for the JFE2140, so the tempco may be a bit worse at lower drain current. Note that this is not properly reflected in TI's model, which has VTOTC=-0.45m. I haven't run the simulation, but I think that would put you in the neighborhood of 1.2 nV/rtHz NSD. Also, the offset and drift averages for each pair are not centered around zero, so you can get a little better matching if you flip half the pairs around. This could help with the increased tempco from running at lower drain current.