bq24610 power management blown fet issue - Page 1
Forum section: electronics / projects

author: Siwastaja
author_rank: Super Contributor
timestamp: March 25, 2018, 10:00:40 am
content: Hi,I'm having a peculiar issue with bq24610-based li-ion charger / power management section.As I have said numerous times, I don't typically design in these "li-ion chips", since they are almost always broken in design. Well, this time I did, and have already found out the bq24610 I ended up using is a design failure in numerous ways (not going to enumerate them here since they are mostly irrelevent), and even when it conforms to datasheet, is useless for its intended purposes and requires work-arounds. Hence, it will be replaced to the next pcb revision with a custom solution.Right now, however, I'm having a rather serious issue of blowing the input selection back-to-back P-channel FET, and I need to solve it with a retrofit fix. Luckily, the production batch is very small (exactly to catch fuckups like this).Schematic is attached. It follows the recommended bq24610 application very closely, for example I didn't question the 1k gate resistors R35 and R37 for soft slew control.Now, hand-built prototypes worked fine for months, no issues whatsoever. The first production batch seems to work for some time as well, but after several dozens of times power is applied to P19, Q9 blows short - it's not an isolated incident, has happened to at least two units. This is, naturally, very catastrophic, since despite bold statements about gazillion of different protection schemes, the bq24610 does not do the simplest protection thing imaginable: disable Q10 (BATDRV) in the case of battery overvoltage - the block diagram confirms this, BAT_OVP only goes to PWM control logic, not "system power selector logic" as well. Hence, current flows directly from the 24V supply to the battery pack after this single point of failure.I designed in fuse F5 (8A) to catch this scenario, but it's of no help since we changed the power supply to something that's only rated to 5A - the original one would have blown this fuse. Furthermore, the power supply we use happens to have unlimited, continuous CC mode, which is kind of great thing in some cases (for example, it happily charges a battery!), and not always easy to find, but it's not desirable in this instance. Limited-time CC or hickup would offer at least some protection.Q8 and Q9 are IPD50P04P4-13 (https://www.infineon.com/dgdl/Infineon-IPD50P04P4_13-DS-v01_00-en.pdf?fileId=db3a30432f69f146012f781f908b2da3)After replacing the blown FET, everything's back to normal, so the bq24610 doens't seem obviously damaged.Having analyzed the situation, I can think about six ways of the FET blowing:1) Excessive Vds peaking during input power connectionPeculiar to this use case is that charging supply through P19 may bounce and spark more than "usual" due to the "connector" being a self-docking system.I emulated worst case sparking using different kinds of steel instruments to do the connection in a very shaky way, while probing Vd and Vs on the scope (with 100MHz BW, more or less). I can't seeanytrace of ringing or peaking - with Vin=23.0V, maximum voltage at Vs is 22.6V and Vd at 23.0V, while Vs-Vd is at maximum about 5V. While the sparks look quite nasty, it seems they are left at the input elcaps that provide damping with modest ESR.A lot of margin here.2) Excessive Vg peakingDoing the same test but measuring Vs and Vg, Vg-Vs ranges between about 0.5V and -5.5V, with no ringing or peaking visible. A lot of margin here, as well.3) Excessive IdVery unlikely as-is - as we can see, the input adapter is current limited to about 6-7A (not actually measured), and the FET is good for about 20-25A with 50% derating of datasheet Id of Tc=125, however...4) Vg too lowOne "interesting" feature in bq24610 is that TI brags about it's super magnificent "6V gate drive" all around the datasheet and other documentation like it's the greatest human achievement after visiting the Moon. Well, of course, when you design a system with this chip's intended operating range, you're going to use at least 40V, 30-40A rated FETs, and as well all know, these FETs do not tend to be available with usable "logic level" Vgs of less than 6V. Hence, this "6V gate drive" is actually the minimum which makes any sense!So when I actually measured only 5.1V of gate drive, I was strongly suspecting a counterfeit part. However, as always with datasheets, front page brag specs do not apply: the actual minimum gate drive is 4.2V! (Very confusingly, since there isanotherregulator REGN specified to that typical 6V number, andit'sminimum is specified at 5.7V.)So, AFAIK, it'stotallyimpossible to actually design a robustly working circuit using this chip, over the whole range of operating parameters: everyone's relying on that front page spec of 6V gate drive. In reality, with 4.2V available, good luck finding a MOSFET with enough Vds and low enough Rds(on) over the whole intended operating range.So, this is one possibility.However, even when I factor in these numbers, and account for the increased Rds(on) over what I'm originally designed - 30mOhm instead of 15 mOhm -, I'm not satisfied at the explanation:FET Id should be only about 5A, possibly 10-15A, but only for less than some tens of milliseconds (Vin supply would go to current limiting at that point, even if I failed the load side). Giving the heatsinking is fairly good - 8 0.4mm thermal vias, filled with solder, in a 4-layer 200x200mm board, completely coupled to a big aluminium plate using a 0.5mm thick thermal pad - and having never felt any heat in this region of circuit while poking it under expected operational load, I don't think it's a long-scale thermal issue or Rds(on) issue.5) AC SOA:However, the SOA is actually a bit tight. Since there is quite a lot of capacitance in the output (net VMOTS), about 3000uF, and about 3000uF at the input (assuming 2000uF in the power brick, and 1000uF on my board), there could be excessive die dissipation during the slow "soft" switching defined by the 1k gate resistor. The SOA curve is, after all, at Id=10A @ Vds=10V @ tp=1ms. This being said, this amount of capacitance should be very typical to the intended use case.6) Counterfeit bq24610:Component sourcing was done at the cheap Chinese fab; this is a real possibility. The markings on the chip look good, but they do actually look better than on the original part I bought from Digikey (which is very hard to read). However, there was about 9 months of difference in time between buying these parts so I expect they are from different batches and look different.However, I haven't seen this chip do anything wrong. Everything so far is clearly within specs, and haven't caught it pants down. Of course, itcouldblow the FET by applying even lower Vg, but what's the point in enumerating this option, as even the genuine in-spec bq24610 would do that.A counterfeit could do the deadtime between BATFET and ACFET wrong in some cases.So far, this doesn't look very probable, since the chip performs very well otherwise: the current and voltage accuracy, for example, are good, delay times match how the prototypes worked, etc. As this is a fairly complex chip, I would expect more obvious differences from a counterfeit.So, I have some possible culprits, and clearly some design faults, but haven't been able to prove anything. Any experience from others would help. I hope I have included enough info. Thanks!

author: diyaudio
author_rank: Frequent Contributor
timestamp: March 25, 2018, 12:03:05 pm
content: Sounds like a layout issue, layout parasitics interacting with the MOSFET, only way to really debug this problem is to probe all nodes under heavy charge currents and observe behavior.

author: Siwastaja
author_rank: Super Contributor
timestamp: March 25, 2018, 01:30:46 pm
content: I'd expect layout to affect the buck section most. I've looked at the buck waveforms earlier, it looks clean since the layout is fairly good.It doesn't require charging enabled at all to blow.Was finally able to reproduce failing FET. It fails in the (fairly rare) case battery is not connected, but the power supply is connected. So the buck doesn't even start up. Still no overshoot or ringing on the scope, but oh yes, another blown fet. In this case, the FET Vds sees the full 24V, and the output caps are charged from 0 using this highest voltage, resulting most inrush current.So, most likely a SOA issue due to inrush current. 11 x 330 uF elcap + 35 x 10uF MLCC in the output simply doesn't play along with a FET specified to Id=30A@Vds=20V@tp=100us. It was stupid to overlook this.Back-of-the-envelope approximated the "1k gate resistor driven soft start" tr:qgtot=51*10^-9 Cigavg=2.5V/1000ohmtrise=qgtot/igavg = 20 usApproximated the maximum theoretical inrush current limited by capacitor ESR and fuses at about maybe 1000A (mostly defined by the guesstimate of 24V brick output capacitance)I removed a bit of output capacitance that's unnecessary, down from 11x330uF to 8x330uF.Then I retrofitted 0.2ohm, 10W of resistance in the power supply input, which limits this (back-of-envelope approximation) to about 100A. Since the current is highest (and the Vds is highest, too) in the first 10us, the SOA shows 100 A is OK for 10us at Vds=25V. After adding this series resistor, I cannot reproduce the blown FET anymore, no matter how I try to surge it; I also went further to 27V input instead of the nominal 25V max. It would be best to add a bit more, but cannot afford more power loss right now.

author: diyaudio
author_rank: Frequent Contributor
timestamp: March 25, 2018, 08:20:24 pm
content: Great stuff. Thanks for the detailed updated.This is a good example and a lesson to all of us with over sizing capacitance and the consequences that comes with it.

author: Siwastaja
author_rank: Super Contributor
timestamp: March 26, 2018, 12:01:24 pm
content: Indeed, and even further, instead of thinking about minimizing "unnecessary" capacitance (often you cannot go arbitrary low; so you need to calculate or simulate how it behaves), designing necessary precharge circuits so that inrush transients cannot kill semiconductors (or weld relay contacts). This, in almost all cases, requires either active or passive current limiting, which is often overlooked. Passive limiting often happens through parasitic resistance such as capacitor esr, fuse, cable, connector resistance, although I think most people overestimate this (for example, I constantly hear people talking about power cable limiting current; when I ask them to approximate the resistance, I often hear "half an ohm" or something, even though it's typically in the range of tens of milliohms max for short extra low voltage cabling.In fact, now as I think about it, I have seen a few dead laptop docking stations with this very same "power selection logic" MOSFET problem.The next revision will avoid the messy 3xPFET "power selection" logic and instead, just charge the battery directly, and connect the loads to the battery; in this case, only one FET is needed to prevent DC input from energizing through the body diode of the charger switcher, and this FET can be after the bulk capacitance. The switcher has inherent current limitation by driving an inductor and feedbacking the current, so it also provides soft precharge.

author: senso
author_rank: Frequent Contributor
timestamp: March 26, 2018, 02:14:26 pm
content: Lots of laptops dont have AC PSU's due to those back to back FET's, give then 21v and they pop, and then it doesn't charge, replaced so many FET's on laptop mobos..The BQ series chips also seems a bit frail, and are easy-ish to kill, and there is so many variations of them :/