Battery Simulation - Page 1
Forum section: electronics / projects

author: adex44yrs
author_rank: Newbie
timestamp: December 07, 2011, 02:03:30 pm
content: Hello,I am try to design a battery simulation to test a lead acid battery charger. My design is similar to one found here:http://www.accelinstruments.com/Applications/TS200/Battery-Simulator-AppNote.html(figure 2A). Other than I used MOSFETs instead of the BJT and alot PMOS is connected in collected parallel (the current sink).I am having some of problems which I can't really figure out why. The charger will turn on for few seconds and then turns off without then repeat the cycle. Any help please?

author: phil_jp1
author_rank: Regular Contributor
timestamp: December 07, 2011, 04:06:17 pm
content: Hi!Can you provide the exact schematic of your battery simulator with part numbers?

author: phil_jp1
author_rank: Regular Contributor
timestamp: December 07, 2011, 06:02:12 pm
content: If I understood right, your input voltage (VS1) is 40V and you powering the positive rail of your U2 op-amp from 40V also. And you're using N-channel mosfet (T8) on a high-side to source current.If it is the case, then the mosfet on top just can't open, because it needs gate voltage to be about 7V(or whatever your mosfet spec is) higher than the drain voltage.You can't just simply replace BJTs with MOSFETs in push-pull configuration like that. I'd better put BJTs with current balancing resistors in there.(all that assuming if I understood everything correctly)

author: adex44yrs
author_rank: Newbie
timestamp: December 07, 2011, 07:35:02 pm
content: VS1 is the input and I have the intention of making as high as 60-65V. This way I will be able to fully test the charger. I could remove T8 and replace it with a diode and it wouldn't affect the design as much. What I assume is going on is, the virtual battery is not accepting the current from the charger which means the FETs T1-T7 and T9-T12 are not conducting. T1-T7 and T9-T12 are in source follower configuration which in theory do not need any biasing resistor.My question is why are the FET not conducting even though the voltage between the gate and the source is about 2 volt

author: phil_jp1
author_rank: Regular Contributor
timestamp: December 07, 2011, 07:51:15 pm
content: Quote from: adex44yrs on December 07, 2011, 07:35:02 pmI looked in datasheet for IRF9540 and they need gate voltage to be at least 4V lower than source voltage in order to start conducting.

author: adex44yrs
author_rank: Newbie
timestamp: December 07, 2011, 08:33:37 pm
content: I just checked my simulation now and it is within that range but still not giving expected result

author: phil_jp1
author_rank: Regular Contributor
timestamp: December 07, 2011, 09:05:41 pm
content: Quote from: adex44yrs on December 07, 2011, 08:33:37 pmWell, in terms of sinking current it should work no problems at all. What's the values of the zener diodes you used in your simulation?

author: bfritz
author_rank: Regular Contributor
timestamp: December 13, 2011, 07:26:30 am
content: adex44yrs,I think that you have a stability problem. I'm guessing that you haven't looked at time domain simulations of the actions of the circuit.What I believe is happening, is probably easiest to explain from a start up position. Assume that the non-inverting input of U3 (U3 pin 3 as shown in diag.jpg) is at 0V. (I'm going to call this voltage applied to U3 pin 3 the Target Battery Voltage, or just Tbatt. This is the battery voltage you are attempting to simulate.) Also assume that the voltage on C6 is 0V. At this point all the FET's, Q1 - Q10 are off (not conducting).Now assume we apply 15V to Tbatt. Since the non-inverting input is now at a higher potential, the output of U3 will go to 30V. When this occurs Q10 turns on, as well as Q1 - Q9. All the FET's are fully enhanced, and will exhibit very low Rds-on. As a result, a big current will flow from V1 thru Q10 thru D7, R3, R4, and finally Q1 - Q9.Once the current results in the voltage at the juntion of R3 and R4 being 15V, we want U3 to start moving Q10 into it's active region, by reducing the gate drive voltage, as well as moving Q1 - Q9 into their active regions. The problem is that C6, along with R5 and R6 provide a delay. U3 is seeing the voltage reach the Tbatt long after R3, R4 has reached the point. The time constant set there is very long. The AC time constant is R*C = 10K in parallel with 10K * 1000uF = 5K * 1000uF = 5 seconds. So, long before the non-inverting terminal sees anything close to the value on the non-inverting terminal, the current through the FET's has ramped up to a really high current, resulting in the source voltage of Q10 getting very high, which results in Q10 turning off.So, I suspect you have an unstable control loop. I think the first thing to do is to get the RC time constant of the R5, R6, C6 filter much faster. If you change C6 to 0.001uF, the time constant will be 5us. It may need to be even faster, but you'll be able to see better once you start looking at time domain simulations of the circuit.For now I'd suggest the charger just be an open circuit, and monitor the current through R3 or R4, along with the voltage at the junction between R3 and R4, and the output of U3. That should give you a better idea of what is taking place in the circuit. You will likely need to change the values of R5, R6, and C6, and the values you need will depend on the drive capability of U3, the gate capacitance of the FET's, and the loop gain bandwidth of U3.Let us know what you find out.Good Luck!

author: bfritz
author_rank: Regular Contributor
timestamp: December 14, 2011, 08:20:39 pm
content: I think you have created some new problems in your new circuit. You got rid of the cap, but then misconnected your circuit.The feedback to the op-amp through R5 and R6 are now connected to the wrong place in the circuit. They need to connect to the sources of all the FET's. You incorrectly have it now connecting to the output of the amplifier, which is what is driving the gates of the FET's. Your earlier circuit was correct in how it was connected. I didn't notice before, but you had formed a voltage divider in the earlier circuit with R5 & R6 that was a divide by two. This would also lead to problems in your earlier circuit. You really want a very low resistance for R5, and a fairly high resistance for R6.You also have a value problem now, as I think you accidentally changed the value of R6. R5 is10K and R6 is 10ohms. You have created a voltage divider, and the divider will present only 10/10010 or less than 0.1% of the signal to the op-amp. I would suggest R5 as zero ohms, and R6 as 10K, and change the location for the top side of R5 to the sources of Q1-Q10.If you continue to have problems, you really need to start looking at the time domain results. You would be able to see these kind of issues very quickly. Just looking with some voltage measurements is not very helpful in determining what is going wrong.Post your results, and we should be able to get this working for you.

author: adex44yrs
author_rank: Newbie
timestamp: December 15, 2011, 04:29:28 am
content: I returned the feedback loop to where it is suppose to be and then run some transient analysis with different values of R5/R6. At R5= 0 and R6 =10k, the Vs remains less than Vg and both increase progressively. At R5=10k and R6=10K, I ran the simulation, I saw Vg oscillating between 15V and 23V while Vs remains constant. If I make R5 2k and R6 10k, It oscillate till 1second and then becomes clear with Vg at 7.1V and Vs at 10.9V.Getting reed of the oscillation and increasing that voltage so that Q1-Q9 would be fully turned on is what I am trying to solve now. Thank you for your help.

author: bfritz
author_rank: Regular Contributor
timestamp: December 15, 2011, 06:29:10 am
content: Thanks for the transient analysis. That helps a great deal.I think you have a problem with the circuit. I don't think it will work when configured as shown... the good news is that I think with a small addition, it will work.Let's do a simple thought experiment:Attempt to get HB2/V+ at 15V.For this, Drop across Q10 must be 15V.Q10 is off, when it's gate is at 15V. It will start to turn on about 17V, and be fully enhanced at 19V. (I didn't look up the values, but they are pretty representative, and I don't think the exact values will matter.)So to get Q10 to only partially conduct, it's gate will need to be 17-18V.Q1-Q9 are off, when their gate is at 15V. They will start to turn on about 17V, and be fully enhanced at 19V. So to get Q1-Q9 to partially conduct, their gates will need to be 17-18V.This seems to say that this should work. I think the problem, is that the turn-on characteristics of Q10, is slightly different from Q1-Q9.Note that for a FET, the turn-on characteristic is highly temperature dependent. This is why putting many FET's in parallel works. As a FET heats, the Rds-on increases given a fixed Vgs. So, if the FET's have different turn-on characteristics, which is pretty much guaranteed, as the top is N-Ch, while the bottom are P-Ch, and the power dissipation in them will vary depending on HB2/V+ and the charging current. I think this is causing your instability, as the Vth of the FET's changes.So, why not create two seperate control loops? One that controls Q10, and the other which controls Q1-Q9. You simply add another Op-amp, with the same inputs as the one you have. The difference is that the output of one amp goes to the gate of Q10, while the output of the other op-amp goes to Q1-Q9. This allows the gates to be driven to different voltages, dependent on what the needs are of that FET.I hope this gets you closer. If this oscillates like crazy when you first try it, you might try slowing both control loops down a bit, by adding small capacitors in parallel with the R6 resistance, perhaps about 1nF.Let us know how this goes. You've got me interested! :-)

author: adex44yrs
author_rank: Newbie
timestamp: December 15, 2011, 01:16:00 pm
content: I do agree with the Q10 turning on when the gate voltage is around 19V. Ideally, for Q1-Q9 to turn on, I think the source voltage has to be around 19V while maintaining the gate voltage at 15V. (p-ch turns on when Vgs is negative right).

author: bfritz
author_rank: Regular Contributor
timestamp: December 15, 2011, 04:33:14 pm
content: You're right about the low side P's. It was too late when I was posting.So, the high side and low side then definitely need different voltages to be in their active region.Assuming 15V output...High Side N's need around 19V.Low Side Ps' need around 11V.So, using a single Op-amp, you're never going to get both on at once. To make it work the way you want, you need them to both possibly be on at the same time. So, you pretty much have to use two control loops. So, I think that two op-amps as I commented earlier if definitely the way to go.

author: adex44yrs
author_rank: Newbie
timestamp: December 16, 2011, 03:47:27 am
content: I just added the second opamp and to the design. The transient looks alot closer to ideal situation that I am expecting but not quite. I will run more test but this what I have so far. Let me know what you think

author: bfritz
author_rank: Regular Contributor
timestamp: December 17, 2011, 12:15:18 am
content: Great, looks pretty good!Looks like the first 5ms or so, things might be a bit unstable during start up. I think if you add capacitors in parallel with R4 and R6, it might also help what looks like a little instability on the high side. I'd probably try about 0.1uF to start, which I calculate as giving you a time constant of 166us. If that doesn't seem to make it better, I'd probably try increasing that by about 5x.But, looks like you have a circuit that should work!Are you just going to use this for designing your charger, or do you also plan to build it up, to test your charger circuit?

author: adex44yrs
author_rank: Newbie
timestamp: December 19, 2011, 04:27:05 am
content: Thank you so much. I only want to test the charger and not build it. I think my simulation is messing up somehow. I don't get consistent results from the transient analysis but I have on the scope looks good to me.