Spec2RTL-Agent: Automated Hardware Code Generation from Complex
  Specifications Using LLM Agent Systems
Authors: name: Zhongzhi Yu, name: Mingjie Liu, name: Michael Zimmer, name: Yingyan Celine Lin, name: Yong Liu, name: Haoxing Ren

Despite recent progress in generating hardware RTL code with LLMs, existing
solutions still suffer from a substantial gap between practical application
scenarios and the requirements of real-world RTL code development. Prior
approaches either focus on overly simplified hardware descriptions or depend on
extensive human guidance to process complex specifications, limiting their
scalability and automation potential. In this paper, we address this gap by
proposing an LLM agent system, termed Spec2RTL-Agent, designed to directly
process complex specification documentation and generate corresponding RTL code
implementations, advancing LLM-based RTL code generation toward more realistic
application settings. To achieve this goal, Spec2RTL-Agent introduces a novel
multi-agent collaboration framework that integrates three key enablers: (1) a
reasoning and understanding module that translates specifications into
structured, step-by-step implementation plans; (2) a progressive coding and
prompt optimization module that iteratively refines the code across multiple
representations to enhance correctness and synthesisability for RTL conversion;
and (3) an adaptive reflection module that identifies and traces the source of
errors during generation, ensuring a more robust code generation flow. Instead
of directly generating RTL from natural language, our system strategically
generates synthesizable C++ code, which is then optimized for HLS. This
agent-driven refinement ensures greater correctness and compatibility compared
to naive direct RTL generation approaches. We evaluate Spec2RTL-Agent on three
specification documents, showing it generates accurate RTL code with up to 75%
fewer human interventions than existing methods. This highlights its role as
the first fully automated multi-agent system for RTL generation from
unstructured specs, reducing reliance on human effort in hardware design.