-- Mathlib/.lake/packages/lean4/src/lean/Std/Sat/AIG/CachedGatesLemmas.lean
theorem mkOrCached_decl_eq idx (aig : AIG α) (input : BinaryInput aig) {h : idx < aig.decls.size}
    {h2} :
    (aig.mkOrCached input).aig.decls[idx]'h2 = aig.decls[idx]

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ (aig.mkGateCached (input.asGateInput true true)).aig.decls[idx] = aig.decls[idx]

Tactic:
rw [AIG.LawfulOperator.decl_eq (f := mkGateCached)]

Result:
case h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < (aig.mkGateCached (input.asGateInput true true)).aig.decls.size

Proof state:
case h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < (aig.mkGateCached (input.asGateInput true true)).aig.decls.size

Tactic:
apply LawfulOperator.lt_size_of_lt_aig_size

Result:
case h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < aig.decls.size

Proof state:
case h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < aig.decls.size

Tactic:
assumption

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls[idx] = aig.decls[idx]

case h1
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls.size

Tactic:
rw [AIG.LawfulOperator.decl_eq (f := mkConstCached)]

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ (aig.mkGateCached (input.asGateInput true true)).aig.decls[idx] = aig.decls[idx]

case h1
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < (aig.mkGateCached (input.asGateInput true true)).aig.decls.size

case h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls.size

Proof state:
case h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < (aig.mkGateCached (input.asGateInput true true)).aig.decls.size

Tactic:
apply LawfulOperator.lt_size_of_lt_aig_size

Result:
case h2.h.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < aig.decls.size

Proof state:
case h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls.size

Tactic:
apply LawfulOperator.lt_size_of_lt_aig_size (f := mkConstCached)

Result:
case h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < (aig.mkGateCached (input.asGateInput true true)).aig.decls.size

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ (((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.mkGateCached
            {
              lhs :=
                { ref := ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).ref, inv := false },
              rhs :=
                { ref := (aig.mkGateCached (input.asGateInput true true)).ref.cast ⋯, inv := true } }).aig.decls[idx] =
    aig.decls[idx]

Tactic:
rw [AIG.LawfulOperator.decl_eq (f := mkGateCached)]

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls[idx] = aig.decls[idx]

case h1
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.decls.size

Proof state:
case h2.h.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ idx < aig.decls.size

Tactic:
assumption

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ (aig.mkOrCached input).aig.decls[idx] = aig.decls[idx]

Tactic:
simp only [mkOrCached]

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
idx : Nat
aig : AIG α
input : aig.BinaryInput
h : idx < aig.decls.size
h2 : idx < (aig.mkOrCached input).aig.decls.size
⊢ (((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).aig.mkGateCached
            {
              lhs :=
                { ref := ((aig.mkGateCached (input.asGateInput true true)).aig.mkConstCached true).ref, inv := false },
              rhs :=
                { ref := (aig.mkGateCached (input.asGateInput true true)).ref.cast ⋯, inv := true } }).aig.decls[idx] =
    aig.decls[idx]