-- Mathlib/.lake/packages/lean4/src/lean/Std/Tactic/BVDecide/Bitblast/BVExpr/Circuit/Impl/Operations/Add.lean
theorem go_decl_eq (aig : AIG α) (curr : Nat) (hcurr : curr ≤ w) (cin : AIG.Ref aig)
    (s : AIG.RefVec aig curr) (lhs rhs : AIG.RefVec aig w) :
    ∀ (idx : Nat) (h1) (h2),
        (go aig lhs rhs curr hcurr cin s).aig.decls[idx]'h2 = aig.decls[idx]'h1

Proof state:
case isTrue.h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ <
    (mkFullAdderCarry (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig
            ({ lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }.cast ⋯)).aig.decls.size

Tactic:
apply AIG.LawfulOperator.lt_size_of_lt_aig_size (f := mkFullAdderCarry)

Result:
case isTrue.h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ < (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Proof state:
case isTrue.h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ < (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Tactic:
apply AIG.LawfulOperator.lt_size_of_lt_aig_size (f := mkFullAdderOut)

Result:
case isTrue.h2.h.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ < aig.decls.size

Proof state:
case isTrue.h2
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ < (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Tactic:
apply AIG.LawfulOperator.lt_size_of_lt_aig_size (f := mkFullAdderOut)

Result:
case isTrue.h2.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
      (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
      ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out) =
    res
idx✝ : Nat
h1✝ : idx✝ < aig.decls.size
h2✝ :
  idx✝ <
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size
⊢ idx✝ < aig.decls.size

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ ∀ (idx : Nat) (h1 : idx < aig.decls.size) (h2 : idx < (go aig lhs rhs curr hcurr cin s).aig.decls.size),
    (go aig lhs rhs curr hcurr cin s).aig.decls[idx] = aig.decls[idx]

Tactic:
generalize hgo : go aig lhs rhs curr hcurr cin s = res

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
res : AIG.RefVecEntry α w
hgo : go aig lhs rhs curr hcurr cin s = res
⊢ ∀ (idx : Nat) (h1 : idx < aig.decls.size) (h2 : idx < res.aig.decls.size), res.aig.decls[idx] = aig.decls[idx]