-- Mathlib/.lake/packages/lean4/src/lean/Std/Tactic/BVDecide/Bitblast/BVExpr/Circuit/Lemmas/Operations/ZeroExtend.lean
theorem go_denote_eq (aig : AIG α) (w : Nat) (input : AIG.RefVec aig w) (newWidth curr : Nat)
    (hcurr : curr ≤ newWidth) (s : AIG.RefVec aig curr) (assign : α → Bool) :
    ∀ (idx : Nat) (hidx1 : idx < newWidth),
        curr ≤ idx
          →
        ⟦
          (go aig w input newWidth curr hcurr s).aig,
          (go aig w input newWidth curr hcurr s).vec.get idx hidx1,
          assign
        ⟧
          =
        if hidx : idx < w then
           ⟦aig, input.get idx hidx, assign⟧
        else
           false

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
⊢ ⟦assign,
      { aig := (go aig w input newWidth curr hcurr s).aig,
        ref := (go aig w input newWidth curr hcurr s).vec.get idx hidx1 }⟧ =
    if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

Tactic:
generalize hgo : go aig w input newWidth curr hcurr s = res

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
hgo : go aig w input newWidth curr hcurr s = res
⊢ ⟦assign, { aig := res.aig, ref := res.vec.get idx hidx1 }⟧ =
    if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

Proof state:
case isTrue.inr.isFalse.isFalse
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝³ : curr < newWidth
h✝² : curr < idx
h✝¹ : ¬curr < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
h✝ : ¬idx < w
⊢ false = false

Tactic:
rfl

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
hgo :
  (if hcurr1 : curr < newWidth then
      if hcurr2 : curr < w then
        let s := s.push (input.get curr hcurr2);
        go aig w input newWidth (curr + 1) ⋯ s
      else
        let res := aig.mkConstCached false;
        let aig_1 := res.aig;
        let zeroRef := res.ref;
        let_fun hcast := ⋯;
        let input := input.cast hcast;
        let s := s.cast hcast;
        let s := s.push zeroRef;
        go aig_1 w input newWidth (curr + 1) ⋯ s
    else
      let_fun hcurr := ⋯;
      { aig := aig, vec := hcurr ▸ s }) =
    res
⊢ ⟦assign, { aig := res.aig, ref := res.vec.get idx hidx1 }⟧ =
    if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

Tactic:
split at hgo

Result:
case isTrue
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
hgo :
  (if hcurr2 : curr < w then
      let s := s.push (input.get curr hcurr2);
      go aig w input newWidth (curr + 1) ⋯ s
    else
      let res := aig.mkConstCached false;
      let aig_1 := res.aig;
      let zeroRef := res.ref;
      let_fun hcast := ⋯;
      let input := input.cast hcast;
      let s := s.cast hcast;
      let s := s.push zeroRef;
      go aig_1 w input newWidth (curr + 1) ⋯ s) =
    res
⊢ ⟦assign, { aig := res.aig, ref := res.vec.get idx hidx1 }⟧ =
    if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

case isFalse
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : ¬curr < newWidth
hgo :
  (let_fun hcurr := ⋯;
    { aig := aig, vec := hcurr ▸ s }) =
    res
⊢ ⟦assign, { aig := res.aig, ref := res.vec.get idx hidx1 }⟧ =
    if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

Proof state:
case hidx
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
heq : curr = idx
hsplit : ¬idx < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
⊢ idx = curr

Tactic:
omega

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
heq : curr = idx
hsplit : ¬idx < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
⊢ ⟦assign,
      {
        aig :=
          (go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
              ((s.cast ⋯).push (aig.mkConstCached false).ref)).aig,
        ref := (((s.cast ⋯).push (aig.mkConstCached false).ref).get idx ?hidx).cast ⋯ }⟧ =
    false

case hidx
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
heq : curr = idx
hsplit : ¬idx < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
⊢ idx < curr + 1

Tactic:
rw [AIG.RefVec.get_push_ref_eq']

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
heq : curr = idx
hsplit : ¬idx < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
⊢ ⟦assign,
      {
        aig :=
          (go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
              ((s.cast ⋯).push (aig.mkConstCached false).ref)).aig,
        ref := (aig.mkConstCached false).ref.cast ⋯ }⟧ =
    false

case hidx
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
w : Nat
input : aig.RefVec w
newWidth curr : Nat
hcurr : curr ≤ newWidth
s : aig.RefVec curr
assign : α → Bool
idx : Nat
hidx1 : idx < newWidth
hidx2 : curr ≤ idx
res : RefVecEntry α newWidth
h✝ : curr < newWidth
heq : curr = idx
hsplit : ¬idx < w
hgo :
  go (aig.mkConstCached false).aig w (input.cast ⋯) newWidth (curr + 1) ⋯
      ((s.cast ⋯).push (aig.mkConstCached false).ref) =
    res
⊢ idx = curr