-- Mathlib/.lake/packages/lean4/src/lean/Std/Tactic/BVDecide/Bitblast/BVExpr/Circuit/Impl/Operations/Add.lean
theorem go_le_size (aig : AIG α) (curr : Nat) (hcurr : curr ≤ w) (cin : AIG.Ref aig)
    (s : AIG.RefVec aig curr) (lhs rhs : AIG.RefVec aig w) :
    aig.decls.size ≤ (go aig lhs rhs curr hcurr cin s).aig.decls.size

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ aig.decls.size ≤
    (if hidx : curr < w then
            let lin := lhs.get curr hidx;
            let rin := rhs.get curr hidx;
            let res := mkFullAdder aig { lhs := lin, rhs := rin, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.out;
            let carryRef := res.cout;
            let s := s.cast ⋯;
            let lhs := lhs.cast ⋯;
            let rhs := rhs.cast ⋯;
            let s := s.push outRef;
            go aig_1 lhs rhs (curr + 1) ⋯ carryRef s
          else
            let_fun hcurr := ⋯;
            { aig := aig, vec := hcurr ▸ s }).aig.decls.size

Tactic:
dsimp only

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ aig.decls.size ≤
    (if hidx : curr < w then
            go (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).aig (lhs.cast ⋯)
              (rhs.cast ⋯) (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).cout
              ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).out)
          else { aig := aig, vec := ⋯ ▸ s }).aig.decls.size

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ aig.decls.size ≤ (go aig lhs rhs curr hcurr cin s).aig.decls.size

Tactic:
unfold go

Result:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ aig.decls.size ≤
    (if hidx : curr < w then
            let lin := lhs.get curr hidx;
            let rin := rhs.get curr hidx;
            let res := mkFullAdder aig { lhs := lin, rhs := rin, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.out;
            let carryRef := res.cout;
            let s := s.cast ⋯;
            let lhs := lhs.cast ⋯;
            let rhs := rhs.cast ⋯;
            let s := s.push outRef;
            go aig_1 lhs rhs (curr + 1) ⋯ carryRef s
          else
            let_fun hcurr := ⋯;
            { aig := aig, vec := hcurr ▸ s }).aig.decls.size

Proof state:
case isTrue
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Tactic:
apply AIG.LawfulOperator.le_size_of_le_aig_size (f := mkFullAdderCarry)

Result:
case isTrue.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤ (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Proof state:
case isFalse
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : ¬curr < w
⊢ aig.decls.size ≤ { aig := aig, vec := ⋯ ▸ s }.aig.decls.size

Tactic:
simp

Result:
no goals

Proof state:
case isTrue
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size

Tactic:
refine Nat.le_trans ?_ (by apply go_le_size)

Result:
case isTrue
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Proof state:
case isTrue.h
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤ (mkFullAdderOut aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig.decls.size

Tactic:
apply AIG.LawfulOperator.le_size (f := mkFullAdderOut)

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ ?m.49258 ≤
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size

Tactic:
apply go_le_size

Result:
no goals

Proof state:
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
⊢ aig.decls.size ≤
    (if hidx : curr < w then
            go (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).aig (lhs.cast ⋯)
              (rhs.cast ⋯) (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).cout
              ((s.cast ⋯).push (mkFullAdder aig { lhs := lhs.get curr hidx, rhs := rhs.get curr hidx, cin := cin }).out)
          else { aig := aig, vec := ⋯ ▸ s }).aig.decls.size

Tactic:
split

Result:
case isTrue
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : curr < w
⊢ aig.decls.size ≤
    (go (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).aig (lhs.cast ⋯) (rhs.cast ⋯)
            (curr + 1) ⋯ (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).cout
            ((s.cast ⋯).push
              (mkFullAdder aig { lhs := lhs.get curr h✝, rhs := rhs.get curr h✝, cin := cin }).out)).aig.decls.size

case isFalse
α : Type
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefVec curr
lhs rhs : aig.RefVec w
h✝ : ¬curr < w
⊢ aig.decls.size ≤ { aig := aig, vec := ⋯ ▸ s }.aig.decls.size