giseldo/neodataset huggingface dataset:
Reset original layer colors (lp:#1502656)

[Original report](https://bugs.launchpad.net/bugs/1502656) created by **lsmod (forum+ubuntu)**
```
This is not a bug and more a feature request.

Sometimes it is senseful to change the layer colors to get more contrast to
see or show something.

The last colors seems to be saved global immediately - what is senseful in
most of the cases.

But when you change some more colors you cannot set them back to the
original colors.
How can i do this?

Perfect would be an additional context option "reset colors".

There is no name for the actual color and the darker colors are heavy to
differ by eye.
It would be nice when the name of the actual color is shown in the window
to choose the color.

In the list of colors are many dark colors that give a bad contrast.
Is it possible to modify the colors?

Thanks a lot


____________________________________________________

Application: kicadneu
Version: (2015-09-10 BZR 6180)-product release build
wxWidgets: Version 3.0.2 (debug,wchar_t,compiler with C++ ABI 1002,GCC
4.9.2,wx containers,compatible with 2.8)
Platform: Linux 3.16.0-4-amd64 x86_64, 64 bit, Little endian, wxGTK
Boost version: 1.54.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=OFF
         KICAD_SCRIPTING=OFF
         KICAD_SCRIPTING_MODULES=OFF
         KICAD_SCRIPTING_WXPYTHON=OFF
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON
```

Story points: 18.0
No antialiasing in Windows (lp:#1501890)

[Original report](https://bugs.launchpad.net/bugs/1501890) created by **Richard (microbug)**
```
- Another one for the wishlist -

Being a cross-platform user, I have noticed that there is antialiasing in
OS X and Ubuntu for eeschema and pcbnew. This is not present in Windows,
except in OpenGL mode in pcbnew. The antialiasing actually provides quite a
bit more detail as text at a small size is readable.

This might be an inherent problem with Windows' font antialiasing, which
generally sucks. Hopefully it's not.
```
Original tags: cern gal opengl

Story points: 8.0
Backup file naming (lp:#1500570)

[Original report](https://bugs.launchpad.net/bugs/1500570) created by **xzcvczx (xzcvczx)**
```
Currently backup files are all named completely different based on the
source file

.sch -> .bak
.dcm -> .bck
.kicad_pcb -> .kicad_pcb-bak

to make it more clear which file is a backup of which should there not be a
common suffix, this would also make it safer and easier to add to
.gitignore than it is currently,
```

Story points: 34.0
Kicad manager: hotkey '?' doesn't work if I don't in focus to toolbar start of apps (lp:#1499855)

[Original report](https://bugs.launchpad.net/bugs/1499855) created by **Eldar Khayrullin (eldar)**
```
Application: kicad
Version: 0.201509241831+6216~30~ubuntu15.04.1-product release build
wxWidgets: Version 3.0.2 (debug,wchar_t,compiler with C++ ABI 1002,GCC
4.9.2,wx containers,compatible with 2.8)
Platform: Linux 3.19.0-28-generic x86_64, 64 bit, Little endian, wxGTK
Boost version: 1.55.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=OFF
         KICAD_SCRIPTING=ON
         KICAD_SCRIPTING_MODULES=ON
         KICAD_SCRIPTING_WXPYTHON=ON
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON
```
Original tags: hotkeys

Story points: 12.0
page limits visible (lp:#1499285)

[Original report](https://bugs.launchpad.net/bugs/1499285) created by **Novak Tamas (novak-7)**
```
I don't know if this is a bug. In pcbnew 2015-09-15 BZR6201 there is a
Preferences - Display - Show page limits checkbox. If this refers to
showing/hiding the double red frame with position numbers, then it doesn't
work (OpenGL mode, Win7).
That frame is very annoying, as (for abs coordinates apply to my board) I
place the top left corner of my pcb to (0;0), so frame covers my board.
I attached a printscreen, where two horizontal red lines at pin 56 and 60
are not tracks but the frame lines, and short segments at pin 57 and 59 are
part of position number "1".
Please make it be able to hide.
```
Original tags: cern gal pcbnew

Story points: 28.0
Eeschema does not show information of the selected wire. (lp:#1498017)

[Original report](https://bugs.launchpad.net/bugs/1498017) created by **yoneken (yoneken)**
```
When I click some wire, Eeschema should show the information ( label name
etc.. ) of the wire in the bottom bar.
However, the RC does not show it.
See an attached figure.

Application: kicad
Version: (2015-09-17 BZR 6202)-product release build
wxWidgets: Version 3.0.2 (debug,UTF-8,compiler with C++ ABI 1002,GCC
4.2.1,STL containers,compatible with 2.8)
Platform: Mac OS X (Darwin 13.4.0 x86_64), 64 bit, Little endian, wxMac
Boost version: 1.54.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=ON
         KICAD_SCRIPTING=ON
         KICAD_SCRIPTING_MODULES=ON
         KICAD_SCRIPTING_WXPYTHON=ON
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON

Maybe, it's a new function? I don't remember the function was already
implmented or not.
```
Original tags: eeschema feature.request

Story points: 22.0
No hint for top "Selection" icon on right vertical toolbar (lp:#1497737)

[Original report](https://bugs.launchpad.net/bugs/1497737) created by **Novak Tamas (novak-7)**
```
title tells the whole story:  if I hover over icons, all have a
hint..except the top one.
```
Original tags: eeschema pcbnew

Story points: 16.0
Global Visibility and Size Settings for Ref/Val/Text in eeschema (lp:#1493487)

[Original report](https://bugs.launchpad.net/bugs/1493487) created by **fluffyfrog (frotteefrosch)**
```
It would be great if the visibility and text size of Reference, Value,
Footprint and so on could be controlled globally in eeschema.

I am thinking of a check box that turns the visibility for these fields on,
off or the individual setting of the component.
```

Story points: 14.0
[OSX] default location of template files (lp:#1492576)

[Original report](https://bugs.launchpad.net/bugs/1492576) created by **fluffyfrog (frotteefrosch)**
```
BZR 6149

the default location for user templates is
/Users/[user]/Documents/kicad/template/

for System Templates its
/Applications/Kicad/kicad.app/Contents/SharedSupport/template

while the extras are installed into
/Library/Application Support/kicad

does it make sense to have a third location for the user templates only ?
The extras contain templates, why is nothing pointing to those?
```
Original tags: osx

Story points: 14.0
Default top/bottom copper layers are bad for color blindness (lp:#1491123)

[Original report](https://bugs.launchpad.net/bugs/1491123) created by **Jon Neal (reportingsjr)**
```
The top and bottom copper layers in pcbnew default to red and green. The
most common type of color blindness is red/green color blindness (8% of
males and 1% of females have this).

I think it would be a wise idea to switch the top and bottom color layers
to some other color since they will be used in every design.
```
Original tags: pcbnew

Story points: 22.0
Text wrapping in eeschema (lp:#1490050)

[Original report](https://bugs.launchpad.net/bugs/1490050) created by **Blair Bonnett (bcb)**
```
When redesigning the eeschema file format, would it be possible to add text
wrapping support for text blocks in eeschema? Either as an option to the
standard text item, or as a separate wrapped text object. Let the user
specify the width and alignment of the lines (left-, center-, or right-
aligned, or justified) and have eeschema break and space the lines to suit.

Paragraph behaviour would also need to be specified; maybe a single newline
(\r, \n, \r\n or whatever based on platform) is ignored, and two or more
consecutive are treated as a new paragraph?

As an example, in my latest design I have a three-paragraph novel
describing the buck converter, how various component values were
calculated, and current requirements for the inductor. It would be nice to
be able to just specify a width rather than have to wrap it manually.
```
Original tags: eeschema feature.request

Story points: 32.0
OpenGL canvas doesn't highlight net on all layers (lp:#1486993)

[Original report](https://bugs.launchpad.net/bugs/1486993) created by **Art (diametrix)**
```
When you go to highlight a net on default canvas in high contrast display
mode, it is highlighted on all layers, which makes it extremely convenient
to trace it.  In OpenGL canvas it is highlighted only on the current layer.
No bueno.

See pictures attached

Running KiCad 6097 on Windows 7 64 bit
```
Original tags: cern gal missing-gal-tool

Story points: 32.0
Page layout editor: impossible to create an empty page layout. (lp:#1486031)

[Original report](https://bugs.launchpad.net/bugs/1486031) created by **Konstantin Baranovskiy (baranovskiykonstantin)**
```
To reproduce:
1) launch pl_editor (will loaded default page layout);
2) delete all elements in tree on the left side bar;
3) after deleting last element, in preview area will shown default page
layout, but tree with elements are still empty.
4) save it to the file;
5) open the file - will loaded default page layout.

Application: kicad
Version: (2015-08-17 BZR 6097)-product release build
wxWidgets: Version 3.0.2 (debug,wchar_t,compiler with C++ ABI 1002,GCC
4.8.4,wx containers,compatible with 2.8)
Platform: Linux 3.13.0-61-generic i686, 32 bit, Little endian, wxGTK
Boost version: 1.54.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=OFF
         KICAD_SCRIPTING=ON
         KICAD_SCRIPTING_MODULES=ON
         KICAD_SCRIPTING_WXPYTHON=ON
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON
```
Original tags: pleditor

Story points: 32.0
Marker persistence/hiding (lp:#1484488)

[Original report](https://bugs.launchpad.net/bugs/1484488) created by **Simon Richter (sjr)**
```
Allow saving and restoring markers from ERC/DRC, and allow
negative/acknowledged markers that will be ignored if regenerated during a
check.

This allows users to run DRC, manually check errors and mark things as
manually inspected, which will hide the error.
```
Original tags: drc erc marker

Story points: 44.0
Default Net Classes (lp:#1481768)

[Original report](https://bugs.launchpad.net/bugs/1481768) created by **Justin Partain (justinwpartain1)**
```
Hi! It would be nice to have the ability to set up default net classes that
may be used on any layout. Every time I make a new board, I make the same
10, 12, 15, 20, and 25 mil trace net classes, which is fine, but the work
could be avoided by adding the ability to create user defaults.
```

Story points: 10.0
Wish : Double click middle mouse button to fit to screen. (lp:#1480868)

[Original report](https://bugs.launchpad.net/bugs/1480868) created by **Chris Goddard (chriy)**
```
Wish : Double click middle mouse button to fit to screen.

In Eeschema and PCBNew the middle mouse button/wheel is used for zooming in
and out and dragging the view around. It would be quite convenient to add
double clicking to fit the schematic/board to the screen (in Eeschema,
PcbNew and GeberView).
```
Original tags: starter

Story points: 16.0
Grab footprint at end of ratsnest line

[Original report](https://bugs.launchpad.net/bugs/1479091) created by **Simon Richter (sjr)**
```
For quicker component placement, it would be nice if there was a way to
quickly grab the component on the other end of a ratsnest line without
having to zoom out.

Would it be possible to interpret a double click on a ratsnest line as
grabbing the component on the far end, and centering it under the mouse?
```
Original tags: pcbnew

Story points: 12.0
Add different numbering option to "create array" function to create repetitive layouts (lp:#1474395)

[Original report](https://bugs.launchpad.net/bugs/1474395) created by **suckiden (stefan-jindra)**
```
hi,

the create array function in the PCB editor should offer a setting for
numbering with offset. This would allow to easy generate repetitive
designs. In this case I want to describe it by looking at a board that has
several stepper motor drivers on it. Instead of designing every driver by
hand it could be done nearly automatically as followed:

work flow description.

1. create numerous hierarchy schematics sheets for the repetitive circuit
parts (in our case the stepper driver)
2. use the annotation option "Start to sheet number*100" so that the same
components of every sheet hast the same end number (e.g. the driver IC of
the first sheet has the number IC201, the driver IC of the second driver
has the number IC301 and so forth)
3. design the layout for the first driver
4. select the components, tracks and copper areas of the first driver and
use the create array function to make an array
5. done!

currently it is possible to create the array but the numbering is wrong
because the numbering setting doesn't include a "offset" setting to be able
to achieve the same numbering as in the schematic editor. otherwise it
would be very easy to make repetitive designs. And I also  think that this
setting could be implemented very easily

Best Regards
Suckiden

P.S. I'm not sure how to label it as 'wishlist'
```
Original tags: pcbnew

Story points: 12.0
ERC: Voltage relative to other pin (lp:#1469531)

[Original report](https://bugs.launchpad.net/bugs/1469531) created by **Simon Richter (sjr)**
```
For components with multiple different supply voltages, it would be good to
have a tighter ERC.

Proposal:

- for power_out and power_in type pins, allow specifying a reference pin
(typically GND/AGND) and a relative voltage
- verify that all pins connected to the same net have consistent voltage
requirements
- create an analog to the PWR_FLAG that documents and enforces a certain
voltage
```
Original tags: eeschema erc

Story points: 16.0
ERC: Pins connected in parallel (lp:#1469525)

[Original report](https://bugs.launchpad.net/bugs/1469525) created by **Simon Richter (sjr)**
```
For voltage regulators and standardized connectors, there may be multiple
"power_out" type pins that need to be connected together in order to handle
the full current.

The ERC should be extended to allow

- flagging an error if these pins are not connected
- not reporting these connections as an error
```
Original tags: eeschema erc

Story points: 22.0
Automatically add newly created footprint libraries to the project fp-lib-table (lp:#1465868)

[Original report](https://bugs.launchpad.net/bugs/1465868) created by **Simon Richter (sjr)**
```
I find it confusing that after creating a new footprint and saving it to a
new library, I still cannot use the footprint because the library is not in
the project configuration.

I think this could be done automatically, and it might make sense to have
this in the release.
```
Original tags: fp-lib-table fpedit

Story points: 26.0
Add filtering to Footprint library browser (lp:#1465295)

[Original report](https://bugs.launchpad.net/bugs/1465295) created by **JsquaredZ (jsquaredz)**
```
In build 5747 CvPCB is deprecated and footprints are now assigned in
eeSchema.  Footprint selections/changes are made using the Footprint
library browser.

This library browser is missing the following useful filters from Cvpcb:
Filter by Keyword
Filter by pincount
Filter by library ( not really needed I think since the library browser
filters the library results into the next pane over.
```
Original tags: pcbnew

Story points: 62.0
BOM dialog should be pre-populated with plugins (lp:#1464893)

[Original report](https://bugs.launchpad.net/bugs/1464893) created by **Chris Pavlina (pavlina-chris)**
```
Can we make the BOM dialog pre-populate itself with the default plugins,
either at runtime or build time? I think having to search for plugins by
default (and not necessarily knowing where to find them) is going to trip
up beginners big time.
```
Original tags: eeschema

Story points: 64.0
BOM dialog should be pre-populated with plugins (lp:#1464892)

[Original report](https://bugs.launchpad.net/bugs/1464892) created by **Chris Pavlina (pavlina-chris)**
```
Can we make the BOM dialog pre-populate itself with the default plugins,
either at runtime or build time? I think having to search for plugins by
default (and not necessarily knowing where to find them) is going to trip
up beginners big time.
```
Original tags: eeschema

Story points: 10.0
Grouped-by-value BOM generators don't sort references correctly within a group (lp:#1464805)

[Original report](https://bugs.launchpad.net/bugs/1464805) created by **Ricardo Crudo (ricardocrudo)**
```
The BOM files generated by the python scripts does not sort the references
correctly.

For example, the following references:

R1, R2, R3, R4, R10, R11, R12, R20

will be sorted as:

R1, R10, R11, R12, R2, R20, R3, R4
```
Original tags: starter

Story points: 16.0
pcbnew: custom layer view preset feature (lp:#1464710)

[Original report](https://bugs.launchpad.net/bugs/1464710) created by **Rob Maris (maris-rob-x)**
```
Kicad offers the concept of selection of individual layers to view or hide
as well as render or not render object types (e.g. part references).

I'm missing a capability of storing a preset view combination, so that I
would be able to define a visibility set of layers/renders. I'd define
buttons for emphasizing views of front elements with and without silk,
bottom elements, inner layer, etc.
This allows for quick switching of layer views, and could make the so
called high contrast mode superfluous, when individual color setting would
be part of such custom presets.
```
Original tags: feature.request pcbnew

Story points: 50.0
Support knockout mode for text in PCBNew (lp:#1463857)

[Original report](https://bugs.launchpad.net/bugs/1463857) created by **JsquaredZ (jsquaredz)**
```
Wishlist item to have a feature that will create "inverted"(aka negative
image) text for etching text on the copper layer.

Inverted as in 'photographic negative' (etched text). Currently the copper
pour is removed & normal text is added.
```
Original tags: pcbnew

Story points: 60.0
Change of Design_Rules->Clearance in Pcbnew not working when in OpenGL/Cairo mode (lp:#1462929)

[Original report](https://bugs.launchpad.net/bugs/1462929) created by **Miloje Zecevic (miloje-zecevic)**
```
In Pcbnew in default canvas view, when changing Clearance value (Design
Rules->Design Rules->Clearance), everything works as expected, i.e.
clearance change is applied and routing lines takes new clearance into
account.
But when switched to OpenGL/Cairo mode and clearance is changed, new
clearance value is not taken into account but old value from default canvas
view is still active. Switching back to default view finally takes new
value into account.
This can be checked on any demo pcb that comes with KiCad.
I guess that correct behaving would be that current clearance value should
be taken into account regardless of viewing mode.

KiCad data:

Application: kicad
Version: (2015-06-07 BZR 5721)-product release build
wxWidgets: Version 3.0.0 (debug,wchar_t,compiler with C++ ABI 1002,GCC
4.8.2,wx containers,compatible with 2.8)
Platform: Windows 7 (build 7601, Service Pack 1), 64-bit edition, 64 bit,
Little endian, wxMSW
Boost version: 1.54.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=OFF
         KICAD_SCRIPTING=ON
         KICAD_SCRIPTING_MODULES=ON
         KICAD_SCRIPTING_WXPYTHON=ON
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON

Kind Regards,
Miloje
```
Original tags: gal pns

Story points: 14.0
Cross-hair pointer leaves a trace on screen in eeschema (lp:#1461698)

[Original report](https://bugs.launchpad.net/bugs/1461698) created by **Martin Sivak (mars-montik)**
```
When creating new or opening existing schema in eeschema, the mouse pointer
leaves multiple copies of the cross hair on the screen.

KiCAD built from source 31st of May 2015 using wxWidgets 3.0.2 on Fedora
19. The same happens on my Mac OS X 10.8  (Late 2009 Mac Mini with
dependencies from homebrew)

wxGTK3-3.0.2-2.fc19

Lenovo x220, 8 GB RAM, Intel i7 CPU
gcc (GCC) 4.8.3 20140911 (Red Hat 4.8.3-7)
Linux hostname 3.14.27-100.fc19.x86_64 #1 SMP Wed Dec 17 19:36:34 UTC 2014
x86_64 x86_64 x86_64 GNU/Linux
Intel Corporation 2nd Generation Core Processor Family Integrated Graphics
Controller (rev 09)

OpenGL vendor string: Intel Open Source Technology Center
OpenGL renderer string: Mesa DRI Intel(R) Sandybridge Mobile
OpenGL core profile version string: 3.1 (Core Profile) Mesa 9.2.4
```
Original tags: eeschema ui wxgtk3+gtk3

Story points: 18.0
Overlapping filled zones don't mesh properly (lp:#1460787)

[Original report](https://bugs.launchpad.net/bugs/1460787) created by **Art (diametrix)**
```
PcbNew Build: (after 2015-mar-04 ) running on 64-bit Windows 7

I have two overlapping filled zones.  The reason for two is that need to
have thermal reliefs on all of my pads but there is one pad with thermal
vias where I don' want thermals.  So I add a polygon in the middle of one
big GND polygon with no thermals.  The corners of this polygon don't mesh
properly with the rest of the GND pour.  This technique is also helpful
when you need different clearances in different areas of the board.  See
picture attached.
```
Original tags: pcbnew

Story points: 14.0
DRC: pick & place grid checking (lp:#1458661)

[Original report](https://bugs.launchpad.net/bugs/1458661) created by **Simon Richter (sjr)**
```
When taking an older project to a new fab house, the pick and place machine
they use might have limitations on component placement:

- grid resolution
- minimum required distance between components (courtyard to courtyard)

It would be great if that could be tested as part of the DRC.
```
Original tags: drc pcbnew

Story points: 6.0
create schematic symbols with a sheet (lp:#1458463)

[Original report](https://bugs.launchpad.net/bugs/1458463) created by **maxchen (trlsmax)**
```
Hope KiCAD have ability to create schematic symbols with a sheet, just like
OrCAD's spreadsheet. This can speed up the creation of large pin count
part.
```
Original tags: eeschema symbols

Story points: 28.0