Complementary Resistive Switches (2012)

Size reduction of transistors has been the main reason for a successful development of computer systems over the last decades. Since the downscaling of transistors is assumed to come to an end within the next years, alternative technologies involving significantly less area consumption and an ongoing scaling potential are required. The smallest feasible area consumption (4F^2) can be achieved by application of passive crossbar arrays. In combination with integrated resistive switches (also referred to as memristors) at each junction, highest possible density memory and logic applications would result. Resistive switches are two-terminal devices and offer a non-volatile switching behavior when applying short voltage pulses. Although individual devices have a low power requirement, passive crossbar arrays show significant power losses due to parasitic current sneak paths. This so-called ’sneak-path problem’ does not only lead to increased power consumption, but also complicates or even prevents proper array read operations. To solve this problem, the implementation of a rectifying diode-like selection device was suggested so far. However, this approach is difficult to realize for bipolar resistive switches, since high current densities (among other factors) are required. A completely new approach was developed within the framework of this dissertation. Here, two anti-serially connected bipolar resistive switches are applied to form a complementary resistive switch (CRS). Independent of the actual storing state, CRS cells are always high-resistive. Therefore, no parasitic sneak paths can occur. Proof-of-concept measurements were performed, showing CRS behavior for resistive switches based on both the electrochemical metalization effect and the valence change mechanism. For studying the interaction of anti-serially connected resistive switches, compact device models of resistive switches were developed. It could be shown that simple dynamic memristor-models are not suitable for simulating correct CRS behavior, whereas more complex, physics-based memristive models lead to realistic simulation results. CRS-based passive crossbar arrays are especially well suited for memory applications. It could be shown that large N•N-arrays (for example, N = 10^3), which are required for efficient implementations, are feasible with this concept. Two advantageous destructive read-out schemes could be identified: The first one is a level read scheme which is based on a conditional switching to the ON-state, whereas the second one is a spike read scheme applying a write pulse for each read operation. Additionally, an alternative non-destructive read-out could be implemented, but in that case, the possible array size is reduced. Aside from memory functionality, CRS cells can also be used to realize reconfigurable logic operations. In this case, complementary resistive switches can be considered as elementary state machines. Based on the logic implication function, which can be regarded as the basic function, several logic operations can be performed sequentially. It was evidenced that 14 of 16 Boolean functions can be realized by a single CRS cell, whereas two CRS cells are required to allocate all 16 functions; they are provided, for example, in a folded crossbar array.