Future of computer hardware (2011)

Summary form only given. Experienced prophets concerning the future. are careful with predictions With this statement in mind, in this paper recent developments in computer hardware are considered along their technical possibilities and limitations. Beyond available standard multicore CPU hardware, this involves the recent impact of specialized accelerator hardware: Currently, general purpose graphic processing units (GPGPUs) and programmable specialized hardware such as FPGA processors or e.g. IBM's Cell processor are successfully used in the field of high-performance computing. This specialized co processor technology gives rise to hybrid-type processors integrating CPU and GPUs. Upcoming candidates for such hybrid-architectures are Intel's SandyBridge processor architecture arising from the Larabee project, the upcoming systems from AMD including the graphics accelerator technology of ATI Technologies into their CPUS or the future fusion processors recently announced by the companies ARM and NVIDIA under project codename Denver. The data-level parallelism required for these architecture to achieve suitable high-performance levels has an impact on the development and use of computational electromagnetics (CEM) algorithms and simulation tools: The required use of Single Instruction Multiple Thread (SIMT) operations on massively parallel compute-kernel structures results in a severe performance sensitivity with respect to a controlled flow of the data streams. As a result, these specialized computer architectures will favour numerical schemes which implicitly support these features. High data locality and an intrinsic parallelism usually results in a good ratio between the computational workload for the floating point units (FPUs) and the need for data movement. This can be found e.g. in higher order Discontinuous Galerkin FEM time domain formulations. More generally, discretized field formulations using explicit time integration schemes commonly are easier to parallelize than those based implicit schemes, where complicated solution schemes are required for the algebraic systems of equations involved. Beyond the currently valid paradigm of massive parallelism which follows several decades of a steady increase in the average wall-clock speed of CPU architectures, current research on computational architectures also focuses on reconfigurable systems. First systems using hybrid-core computing by CPUs with programmable FPGAs are becoming available and are already in use for data intensive applications. Future systems featuring fully reconfigurable special-purpose cores that are capable to adapt to the computational task at hand are currently under development. The possible full impact of such reconfigurable core systems to the field of computational electromagnetics is yet an open subject to speculation, although some research results on FDTD implementations hard-coded on FPGAs have been published already in the past recent years. Another important topic to be addressed with future computer hardware is the need to optimize the ratio of computational performance in relation to the electric power consumption (Flop per Watt): On a technical system level, a high electric power density is cause for concern because of resulting thermal stresses and often results in the need for expensive cooling measures. On a macroscopic economical level, the costs of the electric energy consumption of the computer system itself and its external cooling systems result in increasing total costs of ownership (TCO). With an increasing need for very large scale CEM computations e.g. in computational electromagnetic compatibility testing, these TCO costs are no longer negligible even for medium scale compute-clusters in an industrial or research environment. In addition, the reduction of electric energy consumption of the compute cores is an essential technical necessity in the design of future high-performance computer systems in the exa-flop scale. With these future super computers to be available approximately in 2018 (following Moore's law) the contemporary peta-flop super computers are to be exceeded in terms of computational performance by three orders magnitude, but they may not so exceed these in terms of electric energy consumption.