A 500V, Very High Current Gain (β=1517) 4H-SiC Bipolar Darlington Transistor (2004)

This paper reports the demonstration of a record high current gain high voltage 4H-SiC hybrid bipolar Darlington transistor. The DC current gain of the bipolar Darlington was measured up to 1517 at Ic=27.3A (Jc=284A/cm 2 ) with Vce=20V at room temperature, which substantially surpasses the past record of a 500V Darlington with a DC current gain of 430. The differential specific on-resistance (RSP_ON) is 12.9mΩ⋅cm 2 up to Ic=25.6A (Jc=267A/cm 2 ) at Vce=7.0V. This high current gain SiC Darlington has a 7.8mA leakage current at a blocking voltage of 500V. At 150 o C, the Darlington still maintains a high current gain of 1015 at Ic=20.3A (Jc=211A/cm 2 ), Vce=20V, and a low leakage current of 6.5mA at 500V. The Darlington’s RSP_ON is increased to 19.0mΩ⋅cm at Ic up to 16.4A (Jc=171A/cm) at Vce=6.5V at 150C. An inductively-loaded halfbridge switching measurement (320V-50A) at RT and 150 o C is also reported. Introduction 4H-SiC has been exploited for high temperature and high power applications since late 1980’s due to its high critical field and large bandgap. 4H-SiC power bipolar junction transistors (BJTs) are gaining more and more interest in the recent years[1,2,3], partly because BJTs are free of gate oxide problems and have the potential to achieve a low on-state voltage at high current density. The main disadvantage of SiC BJTs, however, is the low current gain or the high base driving current requirement. Bipolar Darlington transistor can drastically reduce the base current requirement but at the expense of increased forward voltage drop (VF), making Darlington transistor attractive only at a relatively high voltage region. Among the best results of earlier efforts are: (i) a hybrid Darlington of 500V, >200A/cm 2 (>23A) at VCE=6.4V with a DC current gain of 430 at JC~200A/cm 2 [4], (ii) a monolithic 4H-SiC Darlington of 0.3A at VCE=7.5V with a corresponding DC current gain β~40 at JC ≥ 50A/cm 2 [5], and (iii) a hybrid Darlington of 1800V, 3.9A(278A/cm2) at VCE=6.3V with a maximum AC current gain of 500 (Estimated DC current gain is 367)[6]. This paper reports a Darlington transistor with a drastically increased current gain of β > 1517 (measurement set-up limited) at Ic=27.3A (Jc=284A/cm 2 ). Device Design and Fabrication The 4H-SiC BJT driving transistor (active area=1.2mm 2 ) and output transistors (active area=9.6mm 2 ) were fabricated on the same chip. The 4H-SiC wafer was purchased from Cree Inc. The emitter was formed by heavily-doped n-type epi-layer, with a thickness of 0.7μm. The base was a 0.8μm p-type epi-layer with a concentration of 3.0×10cm. The collector was formed by a 12μm drift layer with n-type doping of 6.0×10cm and the n-type 4H-SiC substrate. The emitter mesa was formed by inductively coupled plasma etching, and the mesa depth was 0.82μm. The base implanted region has a 5μm spacing to the emitter mesa edge. The base implantation was done by aluminum and carbon co-implantation at room temperature, and the implanted sample was annealed at 1550 o C for 30 minutes in Ar. The devices were isolated by a mesa etching of ~1.4μm into the drift layer. Device passivation included 2 hours wet thermal oxidation at 1100 o C, 1 hour Ar Materials Science Forum Vols. 457-460 (2004) pp. 1165-1168 online at http://www.scientific.net © (2004) Trans Tech Publications, Switzerland All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of the publisher: Trans Tech Publications Ltd, Switzerland, www.ttp.net. (ID: 204.52.215.2-21/02/07,16:10:59) annealing at 1100 o C, 3 hours low-temperature wet-oxygen re-anneal at 950 o C, as well as PECVD deposited 250nm SiO2 and 250nm Si3N4. Al-free Ohmic contacts (200nm Ti covered by 200nm TiN) were sputtered on both emitter and base. AlTi(20nm)/Ni(700nm) bi-layer was used as the collector contact metal. All the contacts were annealed in hydrogen and nitrogen forming gas for 8 minutes at 1050 o C. After the Ohmic contact formation, a thick layer of PECVD SiO2 (410nm) and Si3N4 (250nm) was deposited for insulation between the overlay metals. The final overlay metals were Ti(50nm) and Au(1.5μm) on the emitter and base, Ni(100nm) and Au(700nm) on the collector. After characterization on each BJT cells on the chip, the sample was then die mounted into a multipin metal package and ribbon-bonded. One BJT cell was used as the driving transistor(T1), and 8 other cells were used to form the output transistor(T2). The hybrid 4H-SiC bipolar Darlington transistor containing a monolithic multi-cell BJT chip was completed by connecting the emitter pin of the driving transistor(T1) to the base pin of the output transistor(T2) which contains 8 BJT cells in parallel. Fig.1 shows the formation of the hybrid Darlington transistor. Characterization and Discussion The high performance driver BJT I-V curves are shown in Fig.2. The peak current gain was 47 at IC1=4.7A (JC1=392A/cm 2 ) and VCE1=10V at room temperature. The specific on-resistance (RSP_ON) was 9.4mΩ⋅cm at IC1=6.36A (JC1=530A/cm 2 ) and VCE1=5.0V. Fig.3 shows the I-V characteristics of the output transistor. The peak DC current gain was 44 at IC2=35A (JC2=366A/cm 2 ) and VCE2=10V. The RSP_ON was 10.5mΩ⋅cm 2 for current up to IC2=55.1A(JC2=574A/cm 2 ) and VCE2=6.0V. Fig.2. I-V characteristics of the driver BJT(T1). Fig.3. I-V characteristics of the output BJT(T2). The hybrid BJT Darlington transistor’s RT and 150 o C I-V characteristics are shown in Fig.4. A record high DC current gain of 1517 was obtained at room temperature at IC=27.3A (JC2~284A/cm 2 ) at VCE2=20V, which is the highest high voltage SiC BJT Darlington current gain reported to date. The gain could be even higher at higher collector current level, as evidenced by the current gain curves shown in Fig.5(a) and (b), but the measurement was at present limited by the instrument. Fig.4(a) shows the Darlington has a differential RSP_ON of 12.9mΩ⋅cm 2 for current up to Ic=25.6A Fig.1. Formation of a Darlington transistor. Silicon Carbide and Related Materials 2003 1166 (JC2~267A/cm 2 ) at VCE2=7.0V. The current gain decreased at elevated temperatures, but still maintained a high gain of 1015 at Ic=20.3A (JC2~211A/cm 2 ) at 150 o C. The differential RSP_ON increased to 19.0mΩ⋅cm up to IC=16.4A (JC2~171A/cm 2 ) at VCE2=6.5V at 150 o C. The open base blocking performance was measured up to VCEO=500V at room temperature with a leakage current of 7.8mA. At 150 o C, the leakage current was 6.5mA at VCEO=500V. Fig.5 shows the DC current gain versus the collector current level at Vce=10V for the driver BJT, the output transistor and the BJT Darlington transistors, respectively. (a) At room temperature. (b) At 150 o C. Fig.4. I-V characteristics of the 4H-SiC Darlington BJT. The switching properties of this high power hybrid Darlington transistor has also been tested in an inductively-loaded half-bridge inverter with a SiC MPS (Merged-PiN-Schottky) serving as the freewheeling diode. A 1mH inductor load was used to simulate an induction electric motor. Fig.6 shows switching waveforms at room temperature and at 150 o C, with a bus voltage of 320V and a switching current of 50A. Results showed that the collector current (Ic) had a turn-on rise time of 0.16μs at both room temperature and 150C, and a turn-off fall time of 0.15μs at room temperature and 0.13μs at 150C. At room temperature, the turn-on switching energy loss was 5.68mJ, while the turn-off energy loss was 3.15mJ. Two different working modes of the Darlington transistor can be clearly distinguished from Fig.6. At room temperature, the Darlington worked in saturation mode with both base-emitter and base-collector junctions forward-biased which explains the high 0 167 333 500 667 833 25 30 35 40 45 500.0 2.0 4.0 6.0 8.0 10.0 at Vce=10V Collector Current (A)