Effect of Wafer Orientation on Near-Interface Oxide Traps in 4H-SiC Metal-Oxide-Semiconductor Capacitors (2018)

4H-Silicon carbide is one of the enabling materials for modern high voltage and high temperature power electronic devices due to its attractive material properties. A significant drawback to SiC MOSFET performance is the low channel conductance due to trapping of carriers by the high-density of near-interface traps (NITs) at the SiO 2 /4H-SiC interface. These states are spatially located within ~1 nm from the interface and energetically positioned near the conduction band edge of 4H-SiC. Constant capacitance deep level transient spectroscopy (CCDLTS) technique is appropriate for analysis of such defects as it can differentiate between trap types and measure trapped charge emission rates. In this study, we examined SiO 2 -4HSiC interfaces formed on the polar (0001) Si- face (100% Si) and non-polar (11-20) a-face (50% Si, 50% C) oriented 4H-SiC wafers using CCDLTS. For the NO annealed Si-face interface, there are two main types of NITs detected by CCDLTS, labeled “O1” and “O2” traps by Basile et al. [1]. The physical identities of these defects have been suggested to be carbon dimers substituted for O dimers (C O =C O ) and interstitial Silicon atoms in the near interfacial SiO 2 [2]. In this work, we observed both the O1 and O2 traps in the Si-face with activation energies of about 0.15±0.01 eV and 0.35±0.01 eV respectively, which are consistent with previous results[3]. The original result obtained in this study was that for the a-face; two new NITs (labeled A1 &amp; A2) positioned very close to the O1 peak were observed but the O2 peak was absent. For this study, 4H-SiC MOS capacitors were fabricated on Si-face and a-face oriented wafers. The samples underwent dry oxidation followed by nitridation with NO annealing at 1175°C. After that, circular Al gates were evaporated as gate contact. The oxide thickness was ~62 nm and ~54 nm for Si-face and a-face respectively. CCDLTS was measured on capacitors keeping a constant capacitance in deep depletion in a temperature range of 77 K to 298 K changing pulse voltages and emission rates. Using the analysis method detailed in [1], the activation energies of the A1 and A2 peaks were found to be 0.15±0.01 eV and 0.19±0.01 eV respectively, which is in the same range as the O1 trap in the Si-face. The capture cross-sections for all traps detected was in the 10 -16 -10 -14 cm 2 range. Qualitatively, this result is similar to the results reported in [4], which shows that nitrided SiO 2 formed on the (000-1) C-face (100% C terminated) also shows only one peak very similar to the O1 trap observed on the Si-face. This result points to the importance of interface structural differences due to different wafer orientation with respect to near-interface oxide traps. Acknowledgement: This work was supported by the II-VI foundation References: [1] A. F. Basile, J. Rozen, J. R. Williams, L. C. Feldman, and P. M. Mooney, J. Appl. Phys., 109, 064514, 2011. [2] P. Deák, J. M. Knaup, T. Hornos, C. Thill, A. Gali, and T. Frauenheim,” J. Phys. Appl. Phys., 40, 6242, 2007. [3] P. M. Mooney, Z. Jiang, A. F. Basile, Y. Zheng, and S. Dhar, J. Appl. Phys., 120, 034503, 2016. [4] T. Hatakeyama, M. Sometani, Y. Yonezawa, K. Fukuda, H. Okumura, and T. Kimoto, Jpn. J. Appl. Phys., 54, 111301, 2015.