Design of Planar Varactor Frequency Multiplier Devices with Blocking Barriers (1991)

Design principles for optimization of planar frequency triplers with symmetrical C V curves are presented. Role and limitation of various blocking barriers (oxide, Mott, heterojunction) are discussed. Devices with undoped drift regions (BIN+) have moderate efficiency but a broad range of power operation, whereas devices with doped drift regions (BNN+) have high efficiency in a narrow power window. In particular, an upper power limit of the BNN+ is caused by electron velocity saturation. Implementations in Si0 2 /Si and AlAs/GaAs and means for increasing the power of BNN+ structures are considered. In contrast to conventional varactor diodes with a Schottky barrier, diodes with a Mott or heterojunction barrier (B) allow one to construct devices with a symmetric capacitancevoltage (C V) characteristic of high Cmax/Cmin ratio by connecting two diodes backto-back. Each diode is constructed, top to bottom, of a Schottky metal contact, the * This work was performed at the Jet Propulsion Laboratory, California Institute of Technology, with support from the Director's Discretionary Fund and under contract with the Army Research Office. 4/ASESEUECKA r.iralEidtgliErdr po.Ong:S.h Barrier Drift Region : insulating: : Intrinsic or Doped : Insulating: : Dielectric: : ' ;-t-kiLli s'i., -'1. ,.., n+ Layer : Dielectric -.,r77,1174, . ......... . Etch Stop • • -• ;-• •-•••• --• 4 ---,-,•--:--:--:--.•--•--:--:-.-:--:--:-.--;;;.--.::::1-::::--:--:-.-.•;::-,:;;;:--:---:---: d':::::::*:;=;::::;-1•;:%*.*/*:.7-::-:;:•;:;:.-:;::-:.......',..-:...,:;::-:....-...-.,::-*::-. 1 :::::.:.;::.,*:•:::;;:;1•:::•'• **:•‘.••1••-•-• *--*-•.',•.::::-.•,:•;':•':::::::;.•••:;,::::::::::,..*:.... ‘.•;'* • ;*i;:•;.*:**.•;. e e.SubstrateZ::. • =:::.:.iF:::::...•::?:..•:%.-Z:•: ..::. -::.:•••••,-....-;.,e • .. ?*. :Z,-: --:: -4•:i.:•:: ••.„ et Second International Symposium on Space Terahertz Technology Page 271 barrier with a thickness dbar P.,' 10 ... 30 nm, an N-type doping sheet, a drift region ddrift 50 150 nm, and an N + back contact. This construction leads naturally to a planar back-to-back configuration with no ohmic contacts. No bias is required as the sheet doping controls the operating point of the diodes. A simple planar process is desirable for construction of highly reliable integrated multiplier structures with high yield for multidiode arrays. Fig. 1 shows the device structure and its equivalent circuit. Thanks to the favorable geometry the parasitic series resistance is minimal and does not degrade due to skin effect. Isolation can be achieved by mesa etching and deposition of Si0 2 . An optional etch stop layer allows the removal of the substrate for minimizing the parasitic capacitance and transmission line losses of the leads. Figure 1: Planar blocking barrier varactor: cross section and equivalent circuit If the drift region is intrinsic (I), electrons injected from the N back contact carry a space charge limited current with a transit time limited frequency response (BIN+ diode) [1]. The C — V characteristic in this case has a steep transition, (c1C/c1V)/C q/kT, between Crnin and Cm„, enabling to generate a frequency spectrum of high harmonic content suitable for triplers, quintuplers, etc. at low power levels. The validity of the BIN+ concept was proven earlier with a single Si0 2 /Si diode operating as a frequency -Jr/ 2k err= coceiciC (vc Ze (fp) Pin Page 272 Second International Symposium on Space Terahertz Technology doubler in a waveguide mount [2] and performing closely to the predictions of a large signal analysis for a stepfunction C — V [3]. A similar theory for pulse-like C — V, as exhibited by back-to-back BIN+ diodes, was developed by the same group [4] but proved to be unrealistic. Therefore we resorted to a simulator [5], shown in Fig. 2, which optimizes the embedding impedances at input and output frequencies for an arbitrary C(V) curve, a fixed series resistance R, and a given input power Pin in order to find the maximum output power P.