Fundamental Study on SiC Metal-Insulator-Semiconductor Devices for High-Voltage Power Integrated Circuits (2009)

Through the rapid progress in SiC process technologies, SiC-based devices have attracted increasing attention as high-voltage and ultra-low loss power devices.Although SiC power devices have been investigated as discrete devices, SiC-based high-voltage power integrated circuits (ICs), which include the lateral power devices and its drive, protection, control, and other circuits, provide additional benefits for power electronics.However, for the realization of SiC smart power ICs, there are many problems that need to be solved.(1) One of the simplest methods to improve metal-insulator-semiconductor field-effect transistor (MISFET) performance is by scaling down MISFET dimensions.However, shortchannel effects, which adversely affect the characteristics of MISFETs, may occur.To prevent those from occurring, investigations on short-channel effects in SiC MISFETs are strongly required.(2) In terms of n-channel SiC MISFETs, channel mobility has not reached a satisfactory level.In addition, only a limited number of p-channel SiC MIS-based devices have been reported.To improve the performance of both n-and p-channel SiC MIS-based devices, intensive study on gate insulators/SiC interface and insulators themselves is desired.(3) To realize smart power ICs, the most important component is the lateral power device.Until now, the reported SiC lateral power devices have not shown any significant advancement.Therefore, the performance of SiC lateral power devices needs to be improved.In this thesis, a systematic study on short-channel effects in SiC MISFETs is presented together with an investigation on deposited insulators for the gate materials of both n-and p-channel MIS devices, to enhance the MIS device performance.In addition, the design, fabrication, and characterization of SiC lateral high-voltage MISFETs is discussed, and the record performance of a lateral MISFET is reported.In Chapter 2, SiC MISFETs with submicron channel were fabricated and short-channel effects in SiC MISFETs were investigated.The critical channel length, for which the longchannel behavior can be observed, was also estimated from experimental and simulation results.The critical channel length of the fabricated metal-oxide-semiconductor FETs (MOS-FETs) was longer than that of simulated MOSFETs due to the high density of effective fixed charge at the MOS interface.Based on an original charge-share model, the influence of effective fixed charges at the MOS interface on the short-channel effects was clarified.In Chapter 3, the interface properties for MIS structures with thermally-grown and Abstract deposited insulators were characterized.In addition to N 2 O-grown oxides, deposited SiO 2 annealed in N 2 O and deposited SiN x /SiO 2 annealed in N 2 O were applied to gate insulators for SiC MIS capacitors to suppress formation of interfacial transition layer and influence of near-interface traps (NITs).By optimizing the formation process of the gate insulator, the n-MIS capacitors with deposited insulators adequately processed demonstrated an interface state density of 2 10 11 cm -2 eV -1 , which is one-tenth of the interface state density for n-MOS capacitors with N 2 O-grown oxides.P -MIS capacitors with deposited oxides were also investigated.In addition to the interface properties, the dielectric properties such as breakdown field and long-term reliability were studied.In Chapter 4, SiC MISFETs with thermally-grown and deposited insulators were investigated.SiC MISFETs with various insulators were fabricated and characterized.The nand p-channel MISFETs fabricated on 4H-SiC (0001) with deposited insulators adequately processed demonstrated a high channel mobility of about 30 cm 2 /Vs and over 10 cm 2 /Vs, respectively.The channel mobility was improved to 50 cm 2 /Vs in the n-channel MISFETs on 4H-SiC (000 1).An original method to estimate the interface state density near the minority-carrier band edge was proposed.The crystal face dependencies of channel mobility and interface properties were also discussed.In Chapter 5, SiC lateral high-voltage MISFETs with a new structure were designed.To decrease the drift resistance, double and triple reduced surface field (RESURF) structures were proposed.The double RESURF MISFETs exhibited superior characteristics to the triple RESURF MISFETs.After optimization of device structure by using device simulation, the simulated MISFETs exhibit a high breakdown voltage over 1.2 kV and a low drift resistance below 15 mcm 2 .The advantages of the proposed structure were also discussed.In Chapter 6, SiC lateral high-voltage MISFETs were fabricated and characterized.The double RESURF structure is effective not only to decrease the drift resistance but also to increase the breakdown voltage.From the temperature dependence, the additional advantages of the double RESURF MISFETs were found out.By utilizing 4H-SiC (000 1), the MISFETs demonstrated a high breakdown voltage of 1580 V and a low ON-resistance of 40 mcm 2 , which is the best performance among any lateral MISFETs ever reported.In Chapter 7, a summary of the present work is given, together with the issues yet to be solved and suggestions for future work.