Original sentence: For example a processor that issues two instructions per clock cycle (see Superscalar processors) can achieve a CPI of 0.5 when two instructions are completing every clock cycle.With pipelining we can improve the CPI by exploiting Instruction level parallelism.Without Pipelining, a new instruction is fetched in stage 1 only after the previous instruction finishes at stage 5
Edited sentence: For example a processor that issues two instructions per clock cycle (see superscalar processors) can achieve a CPI of 0.5 when two instructions are completing every clock cycle.With pipelining we can improve the CPI by exploiting instruction level parallelism.Without pipelining, a new instruction is fetched in stage 1 only after the previous instruction finishes at stage 5