## 4 Results and Discussion
### Using HPC Resources to Reduce the Time-to-Solution  
As already mentioned, simulation of the aerodynamics of human phonation within the larynx is computationally very expensive. To apply the computational model of the larynx in clinical routine, the use of high-performance computers is indispensable. These systems may involve single high-performance workstations with dozens of computing units up to very powerful supercomputers with hundreds or thousands of compute nodes each with tens of cores. In this study, the RRZE's Emmy cluster of Erlangen-Nurnberg University was employed to run the simulations. The Emmy cluster has a total of 560 compute nodes, each equipped with two Xeon 2660v2 Ivy Bridge chips (10 cores per chip + SMT) running at 2.2 GHz with 25 MB shared cache per chip and 64 GB of RAM. Hyper-Threading or SMT (Simultaneous Multithreading) permits a physical \begin{table}
\begin{tabular}{c c c c c c} \hline \hline \(\mathbf{Er_{rel}^{L2}}\) & **Q (Figure 11)** & **P1 (Figure 12a)** & **V1 (Figure 12b)** & **\(\overline{\mathbf{P}}\) (Figure 13a)** & \(\overline{\mathbf{V}}_{\text{profile}}\) (Figure 13b)** \\ \hline M1 & 0.014 & 0.047 & 0.118 & 0.030 & 0.121 \\ M2 & 0.025 & 0.049 & 0.163 & 0.063 & 0.157 \\ M3 & 0.012 & 0.044 & 0.146 & 0.026 & 0.086 \\ \hline \hline \end{tabular}
\end{table} 
Table 4: L\({}^{2}\) error norms of the flow quantities shown in Figures 11–13 for the meshes M1-M3 relative to the base mesh. Figure 13: Time-averaged (**a**) static pressure distribution at the center axis of the mid-coronal plane and (**b**) velocity profile in a cross-section of the mid-coronal plane 8 mm downstream of the glottal exit (P1 in Figure 1) for all the grids. core (a single computing unit) to execute two threads (instruction sequences) simultaneously and hence appears to work like two logical cores sharing execution resources [74]. According to [PERSON]'s law [75], parallel performance is restricted by the serial part of the work, the dependencies, communication between the working cores and imbalanced allocation of the threads to parallel cores, ineffective use of the shared resources, etc. Therefore, the parallel performance never increases linearly with the increase in the number of cores. Furthermore, as mentioned above, the cluster consists of multiple compute nodes, each equipped with many cores, integrated into two chips. Therefore, the scalability of the simulations in parallel execution depends on (1) the number of parallel cores in one compute node and (2) the number of nodes. In order to check the overall scalability, the simulation first ran on a single compute node with increasing number of cores. In the second step, the simulation was executed with different numbers of compute nodes, each with optimal number of cores from the first step. The parallel scalability of the simulation is shown on the basis of the elapsed simulation time (wall time) and the speed-up factor for increasing cores or nodes. The speed-up factor is the ratio of the wall time of the simulation with one core/node to the wall time with N cores/nodes. Figure 14a shows the wall time (in minutes) for a 0.1 ms simulation time and corresponding speed-up by increasing the number of physical cores within one compute node. The wall time sharply decreased for up to 10 cores, followed by a sudden increase on adding one more core. With further progress, the wall time decreased again slightly by requesting more cores. However, it never reached the minimum wall time obtained with 10 cores. The reason is that 20 threads fitted into the 10 cores of the first chip and adding more cores for computations led to the employment of the second chip. As a result, the communication time between the two chips were more than the gain on adding the extra cores which cause the drop in performance after 10 cores. Henceforth, only 10 cores of each requested compute node were employed for the following simulations.