## 3 REXA VM Architecture and Programming Language
### Architecture
The data stack (DS) holds most of the processing data and instruction operands;
2. The return stack (RS) used for function calls (not accessible from the programming level for security reasons);
3. Optional loop stack (FS) used for loop counters and secondary user data (can be merged with RS for memory efficiency). All non-temporary data are either embedded in the code frames or provided by the host application via the data input-output system layer (DIOS) API or by providing Io functions using the function input-output system layer (FIOS) API. All MLISA operations are attached to the VM using the FIOS; ADC buffers are attached by the DIOS. The data width of the stack cell is always 16 bit (single word width). The REXA VM also supports double-word operations (as a configurable option). Double words are composed of two single data words (word order depends on the native byte order of the underlying processor). The VM can read and write double words directly from and to stacks (single memory access). The access time of multiplexed single and double word access to the stacks by memory pointer casting is commonly identical (assuming 32-bit microprocessors). The push and pop operations involved in most of the VM instruction code words modify stack pointers (_dstop_, _rstop_, _stop_). For security reasons, the return  
Figure 3: Basic REXA-VM architecture with integrated JIT compiler, stacks, and byte-code processor [11; 12]. stack (which holds code pointers on function calls) should not be accessed directly by program code. Besides hardcore stacks implemented inside the VM, soft-core stacks can be implemented on the programming level in data arrays (embedded in code frames). Push and pop operations are provided by the core instruction word set:  
array mystack 100  
1 mystack push  
mystack pop. cr  
3 mystack get ( Gets copy of n-th value from top )  
The compiler translates the source code text into byte-code instructions. It is a just-in-time (JIT) compiler that can compile code incrementally and on demand. Since the ISA of stack processors consists mostly of zero-operand instructions, it supports fine-grained compilation at the token level, including ML models. The source text can be directly stored in the code segment referenced by a code frame (or any other data buffer, alternatively). Most instruction words can be directly mapped to a consecutively numbered operation code. Therefore, the compiler translates the source code into byte-code in place, i.e., by replacing the text with binary byte-code, saving additional target memory buffers. An instruction word consists of at least one character and thus can always be replaced by the op-code (one byte). Although a literal value can consist of only one digit and the data of a single word value occupies two bytes, there is always a space or newline character after a literal value, providing the required data space. Extension of the current code frame at the end is always possible (as long as there is free space in the CS). One exception is a double-word literal value requiring at least two characters and the suffix \"1\", followed by an obligatory separator character and the space, providing four bytes of data space in total. Data are either stored on the stacks during run-time or embedded in the code frame during translation. Scalar variables and initialized arrays can always be embedded in place. Non-initialized arrays are appended to the end of the compiled code frame (placing id delayed until the code frame is compiled).