# Reviews Based on the Reconfigurable Intelligent Surface Technical Issues
## 2 Technical Considerations for RIS
### Noise and Power in RIS
In 2019, in [105], the authors presented two computationally efficient energy efficiency (EE) maximization algorithms for BS transmit power allocation and RIS reflector values to show the total power consumption model of RIS-based MISO systems to help solve the EE maximization problem for active and passive beamforming designs. Based on the power consumption of conventional phase shifters, the authors in [105] argued that the RIS power consumption depends on the number of RIS unit cells and the resolution of individual unit cells. The power consumption of the RIS is then modeled as \(P_{RIS}=NP_{N}(b)\), where \(N\) is the number of identical RIS unit cells and \(P_{N}(b)\) represents the power consumption of each RIS unit cell with a resolution of \(b\) bits [146]. However, both the power consumption of the control circuit and the impact of unit cell coding on power consumption are not considered, and the specific relationship between \(b\) and power consumption is not clearly presented. In [147], the authors developed a total power consumption model that further considers the process and power consumption of CSI estimation and feedback compared to [105]. Nevertheless, this study still mainly focuses on solving the optimization problems of phase-shifting design, system transmission, and reception, channel estimation, and feedback of the RIS, and does not address the power consumption model of the RIS in detail. Specific measurements of the RIS power consumption are mentioned in [42; 79]. The authors of [42] show measurements of the RIS power consumption, indicating that different types of RISs have different power consumption characteristics. Varactor diode-based RISs have near-zero power consumption because they are driven by a reverse bias voltage; therefore, the varactor diode current in the unit cell during operation is negligible. The power consumption of a PIN diode-based RIS is related to the state of the unit cell, where the phase shift of each unit cell can be adjusted between 0 and \(\pi\) by electrically controlling the \"ON\" and \"OFF\" states of the PIN diodes. When all the diodes are in the \"OFF\" state, the current output from the DC voltage source is negligible; conversely, when a 0.7 V voltage signal is provided, all the diodes are in the \"ON\" state, which was measured to be 0.8 A for a size 50 \(\times\) 34 RIS in [42]. This indicates that the power consumption of each unit cell in the \"ON\" state is 0.33 mW. In practice, the controller providing control signals to the RIS also consumes energy, and the power consumption is related to the circuit design of the controller and the number of control signals output. The power consumption of a designed controller for a small RIS of size 8 \(\times\) 32 operating at 4.2 GHz was measured to be about 0.72 W, while the power consumption of a controller for a large RIS of size 50 \(\times\) 34 operating at 10.5 GHz was measured to be about 10 W [42]. The power consumption of a fabricated varactor diode-based RIS is discussed in [79]. Excluding the fabricated RIS board, the authors report that the FPGA control board using the Xilinx ZYNQ7100 consumes 1.5 W, and that the overall power consumption can be reduced to 1 W or less by using a low-power microcontroller rather than an FPGA. In the case of an FPGA control board with a built-in FPGA XC7K70T, which is often used as an RIS control board, the current is measured to be 0.2 A when the operating voltage is 24 V; therefore, the control board power consumption is \(P_{c}=4.8\) W. This kind of RIS consumes very little power and shows the great potential of the RIS for future communication systems. The power consumed by the RIS system can be divided into the dynamic power consumption \(P_{d}\), which is consumed by the RIS unit cell, and the static power consumption \(P_{s}\), which is the sum of the respective power consumption \(P_{c}\) and \(P_{td}\) of the control board and drive circuits that comprise the RIS controller, as shown in Figure 36a.