# High-Efficiency, Low-Power, Fully Integrated Neural Electrical Stimulation Circuit
## 4 Results
### High-Voltage-Generation Circuit Simulation  
Post-layout simulation was performed for the high-voltage-generation circuit. The CLK frequency of the high-voltage-generation circuit is 500 Hz. The output waveform with no-load is shown in Figure 13, whereas Figure 14 shows the output waveform when the load current is 1 mA. Under the no-load condition, the circuit converts the input voltage of 1.65 V into the output voltages of 4.20, 7.02, 9.86 and 12.69 V.  
Figure 11: Output driver circuit architecture. Figure 12: Circuit layout structure. The ripple of the output voltage after stabilization is lower than 0.244% (as shown in Figure 15). The proposed circuit supports four output voltages, up to 12.69 V with a maximum 1 mA load current. The efficiency of the circuit can be calculated from Equation (3). \[\eta=\frac{P_{out}}{P_{in}} \tag{3}\]  
The maximum efficiency of 74.9% is achieved when the output current is 1 mA; the output voltage is 12.69 V, at which the input voltage is 1.65 V; and the input current is 5.76 mA. It is particularly noteworthy that it has the characteristics of an ultra-low-voltage ripple, which is an important parameter for the application of nerve stimulation. An excessive ripple may lead to current fluctuation and affect the effect of stimulation. Figure 16, shows the efficiency of the high-voltage-generation circuit with different load conditions. At a light load, fixed losses dominate (capacitive dielectric time losses, parasitic capacitance charging and discharging losses, switching device turn-off losses), thus reducing efficiency. As the load increases, the variable losses (losses in switching  
Figure 14: Output voltage of charge pump under 1 mA current load. Figure 13: Charge pump output waveform with no load. device on-resistance, heat from capacitor charging and discharging, switching losses) are quadratically related to the current, which results in the efficiency decaying beyond the optimum point. Meanwhile, in order to evaluate the influence of the variation of the manufacturing process parameters on the circuit performance, we simulated the charge pump circuit over different process corners, and the simulation results are shown in Figure 17. It can be seen that the output voltage with no load is above 12.4 V over different process corners. The transistors have been sized to make sure that they operate under the desired operating region over different process corners. Figure 16: The relationship between high-voltage-generation circuit efficiency and current load. Figure 15: Ripple waveform. Table 1 summarizes the performance of the proposed high-voltage-generation circuit and compares it to the previously published charge pump IC that provides output voltages in excess of 10 V and a wide range of current loads. The circuit supports four output voltages, with high voltages up to 12.69 V, a maximum load current of 1 mA and an efficiency of 74.9%. The proposed circuit achieves an ultra-low-voltage ripple, an important criterion for neurostimulation applications. An excessive ripple may cause current fluctuation and affect the effect of stimulation. While the design in reference [8] achieves comparable output voltages, it has low efficiency and low load current. On the other hand, ref. [16] achieved a relatively high efficiency of 84.7% using a 0.18 \(\upmu\)m CMOS process. However, it has a lower voltage conversion ratio compared to our design and a relatively high-voltage ripple of 1% at maximum load. Reference [17] achieves lower voltage generation capability but lower peak efficiency. Reference [18] uses a dedicated 0.18 \(\upmu\)m CMOS high-voltage process to achieve a 20 V output. This high-voltage approach can simplify some aspects of high-voltage power generation but typically has high complexity and cost. This good power efficiency indicates that our charge pump can convert input power to output power with minimal energy loss over a wide range of load currents.