# A Review of Ku-Band GaN HEMT Power Amplifiers Development
## 2 Ku-Band GaN HEMT HPA Technology
### High Power Amplifier Design  
There are two main ways to implement HPAs. The first is the MMIC type, where both transistors and input/output matching circuits are designed and fabricated within a single integrated circuit [23; 24; 25; 26; 27; 28; 29; 30; 31; 32; 33; 34; 35; 36]. This approach reduces the overall circuit size, facilitates mass production, and significantly minimizes parasitic components generated by the connection between the transistor and the matching circuits [20; 37]. However, achieving a high dielectric constant (\(\varepsilon_{r}\)) is challenging with conventional semiconductor processes, making it difficult to use high-Q inductors. Additionally, employing passive elements with large inductance (L) or capacitance (C) values for matching and bias circuits increases costs due to the larger chip size. The second method is the microwave integrated circuit (MIC) or hybrid type, which utilizes packaged transistors while implementing the input/output matching circuit on the printed circuit board (PCB) [37]. This method leverages PCBs with low losses and high dielectric constants to reduce matching losses by using high-Q inductors and allows for the use of large inductors and capacitors. It also offers the advantage of being tunable after fabrication, enabling easy modifications and optimizations [37]. However, this method results in a bulkier overall circuit size, and matching is limited due to parasitic components caused by wire bonding when connecting the transistor and the matching circuit [37; 38]. As frequency increases, the impact of these parasitic components becomes more significant, degrading performance. To address this, the internally matched HPA design is often used, incorporating matching circuitry within the packaged transistors [39; 40; 41; 42; 43; 44; 45; 46; 47]. Table 4 summarizes the key performance characteristics of reported Ku-band GaN HEMT HPA MMICs. As shown in Table 4, Ku-band power amplifier MMICs have been implemented on silicon and silicon carbide substrates, with output power ranging from 7.2 W to 93 W and gate lengths from 0.1 um to 0.25 um. Notably, several papers using the 0.15 um process have demonstrated output powers exceeding 40 W while achieving power-added efficiencies (PAEs) of 30-40% [24; 36]. In references [29; 30], high efficiencies close to 40% were also reported at output powers above 10 W. GaN HEMT HPAs implemented with 0.25 um processes exhibit somewhat lower power efficiency but achieve high output powers of over 40 W, as seen in references [28; 32]. A recent paper [31] utilized a 0.2 um internal process to achieve output power close to 100 W in MMIC form. This demonstrates that MMIC technology has advanced to the point where it can achieve performance comparable to that of existing IM-PAMs, and it is expected to replace TWTAs in the Ku-band. Table 5 compares HPA MMIC papers with output powers exceeding 20 W from a circuit design perspective. All references adopted a multistage amplifier approach. Except for [32], which was designed as a four-stage amplifier, the other references used a three-stage configuration to drive the main power cell. For output powers up to 20 W, the main power cell combined the currents of eight GaN HEMTs in parallel, resulting in a total gate width of approximately 10 mm. For output powers above 40 W, the standard design approach employed sixteen GaN HEMTs in parallel, with a total gate width ranging from 10 to 25 mm. Notably, Ref. [31] presents a power cell with a total gate width of about 10 mm that achieved an output power of nearly 100 W, demonstrating excellent power density. Figure 4a,b show the HPA structure and schematic commonly used in the aforementioned papers. The HPA consists of a two-way GaN HEMT power cell in the first stage, a four-way configuration in the second stage, and an eight-way configuration in the third stage. In contrast, an HPA with a 16-way GaN HEMT as the main power cell replicates the previously described 2-4-8 structure, tying the inputs and outputs together.