# Machine Learning Based Energy-Efficient Design Approach for Interconnects in Circuits and Systems
## 2 Low Power Approach for Interconnect Design
### Low Power Approach for Interconnect Design  
According to the proposed approach in [10], an equivalent circuit with analytical formulas is inferred to evaluate the power performance. In this approach, the power dissipation is directly proportional to the transmitter supply voltage and the input impedance is a function of the interconnect characteristics and termination impedance. While the interconnect characteristics are frequency-dependent, the termination impedance comprises the transmitter output impedance and the receiver input impedance. The termination impedance is generally similar to the channel characteristic impedance to avoid reflection. This impedance value is typically 50 \(\Omega\) for the single-ended signal and 100 \(\Omega\) for the differential signal. As a result, the interconnect and the transmitter supply voltage are the controllable parameters for low-power interconnect design.  
Figure 2: Conventional Design Flow.  
The power consumption of transceiver system is mainly from the switching activity of the circuits and the leakage current from transistors. This power is directly supplied by the voltage source. Therefore, in addition to reducing the leakage current and switching actions, reducing the voltage source is an efficient method for power saving in which the power is a trade-off with the speeds. Thus, many efforts concentrate on reducing the transmitter supply voltage by advanced circuit techniques. However, a decrease in transmitter voltage swing without considering the interconnect results in unreliable function. This reduction will harm the transmitter signal quality and make it more sensitive to noise along the interconnect. Hence, this voltage reduction degrades the signal to noise ratio (SNR) and this may lead to an inapplicable in transceiver system. Because the interconnect deals with signal transmission, the power consumption throughout the channel is not provided by the voltage source supply. This power directly accounts for the input power leading to worsened signal quality at the receiver determined by the EH and EW. The power consumption in the interconnect comes from the loss throughout the channel including insertion loss, return loss, and noise. Consequently, saving the power-consumption in the interconnect is equivalent to minimizing the channel loss. Thus, the low-power interconnect design has the trade-off relation between performance and power. Therefore, an optimized interconnect should be designed for better power efficiency. As a consequence, it can be applied to design the low-power system without impacting the signal quality.  
In addition to the channel loss, the crosstalk also plays a vital role in the design procedure. The induced noise voltage produced by crosstalk can degrade the signal quality at the receiver. However, this signal is proportional to the transmitter supply voltage. Hence, eliminating this noise increases the transmitter supply voltage resulting in additional power consumption. As a consequence, the design procedure contains crosstalk analysis to deliver a low-power structure. In conclusion, the optimal low-power interconnect is a low-loss and low-noise structure that can operate at low transmitter supply voltage with acceptable signal quality.