## 4 Wireless Communication Protocol
### Flow Control and Deadlock Free Routing  
Routing protocols adopted for intra or inter-chip communication in a multicore multi-chip environment depends on the application and its performance goal. In most NoC-based systems, wormhole switching is adopted for wireline links in the multi-chip system where data packets are broken down into flow control units or flits [20]. Wormhole switching is known to reduce the buffering requirements which makes the switches consume low power and occupy lower area. We advocate the use of similar routing and switching protocols in both intra and inter-chip data communication in order to reduce overheads of protocol conversion and make the communication backbone seamless. An adaptive routing protocol might be preferred for application requiring reliability but not low latency. While shortest-path routing should be used for application requiring low latency communication. Another important concern in routing for such environments is deadlock. Many conventional NoC routing algorithms leverage turn-model routing to achieve deadlock freedom. Dimension-order routing (DOR) or X-Y routing is an example of a turn-model routing algorithm for regular NoC architectures like mesh. Tree-based NoCs adopt Least Common Ancestor (LCA) as a deadlock-avoidance routing methodology. DOR and LCA algorithms have low computational complexity but are dependent on specific topologies and are not easily generalizable across multiple kinds of topologies. For irregular NoC architectures such as small-world topologies, deadlock-avoidance routing such as South-Last [74] and Layered Shortest Path (LASH) [75] have been proposed. Turn-model-based routing algorithms restrict certain turns to avoid deadlocks and therefore, may eliminate shortest paths in some cases. Layered routing algorithms such as LASH can be effective in deadlock avoidance for any arbitrary network topology. However, VC utilization maybe reduced if separate VCs are reserved for packets in specific virtual layers. Intra-chip WiNoCs with irregular small-world architectures have adopted LASH-based routing algorithms [76]. [PERSON]'s algorithm, which extracts minimum spanning tree between any pair of node in a graph provides shortest path as well as deadlock free routing at the same time [77]. This because [PERSON]'s algorithm extracts and routes packets over a Minimum Spanning Tree (MST) from any regular or irregular topology. This ensures the paths are shortest possible and the MST being a tree is inherently free from cyclic dependencies. Only information about next-hop from the MST for every possible final destination computed at design time is necessary at each switch, typically in the form of a Look Up Table (LUT). This eliminates the need for non-scalable global routing information and expensive route computation for every packet. However, the MST-based routing requires relatively higher area overhead due to the necessity of the LUT with next-hop information. For multi-chip communication, intra and inter-chip communication should be seamless, and broadcast or multicast of latency sensitive messages should be given a preference. Broadcast or multicast traffic is commonly observed in multicore chips which can be generated by cache coherency and system management control or status update signals. Even a small number of broadcast/multicast messages can congest the whole interconnection as multiple copies of the same message are generated to ensure delivery to all destination cores [10; 78]. Wireless interconnect has inherent broadcast capability to handle such broadcast traffic due to the shared wireless channel. Here we discuss one such possible broadcast routing in brief. Therefore, a forwarding-table-based routing algorithm over pre-computed shortest paths determined by [PERSON]'s algorithm can be used totransfer broadcast messages over the multi-chip communication fabric. To accommodate one-to-many multicast/broadcast messages encountered in these systems a tree-based routing policy can be chosen.