## 1 Introduction
In addition, a bridge-type FCLC is composed of a DC voltage source, a DC reactor, and four groups of diodes (Figure 1b) [14]. Reference [14] shows that the DC biased current given by the DC power supply is considered to be the threshold value of the DC fault current in order to automatically activate the FCLC itself. The main advantage is that the DC reactor can be bypassed in its normal state and after turning off the main breaker of the DCCB. In addition, the idea of the FCLC is also reflected in the form of an SM [15], which is inserted into each arm in series. However, the FCL-SM can only limit a unidirectional fault current, and the surge voltage across FCL-SM must be given further attention. Moreover, an enhanced reverse blocking SM (ERBSM) topology has been proposed to extinguish a fault current arc by inverse voltage [16]. Control complexity is reduced because the ERBSM adopts the same modulation strategy. In Reference [17], thyristors have better performance than diode in withstanding overcurrent (Figure 1e), and the overcurrent pressure on freewheeling diode has been relieved via the shunting effect of a single-thyristor switch scheme (STSS) [17; 18; 19]. Although the STSS can protect semiconductor devices, the AC grid current fed into the DC side cannot be prevented. Thus, the double-thyristor switch scheme (DTSS) has been introduced to protect the DC overhead line (Figure 1f), which can eliminate the freewheeling effect of diodes, and the DC line fault current can freely decay to zero [20]. Then, the DC fault is transformed into an AC short circuit fault that can be cleared by switching off the thyristor. However, the high dv/dt across thyristors and the sharing current effect of bypassed diodes are ignored in the DTSS solution. To solve this problem, double-thyristor switches are combined and connected at the AC port of the converter instead of across the diode in the SM to isolate the AC side from the DC side when a fault occurs. Moreover, the feasibility of such a scheme has been verified via a case study that considers STSS and DTSS in a classical VSC-HVDC system, as well as MMC-HVDC. The superconducting fault limiter (SFCL) has attracted considerable attention because its nonlinear impedance characteristics can be used to limit the increase in fault current rate to provide a necessary time for relay protection. The SFCL can mainly be divided into resistive-SFCL (R-SFCL) and inductive-SFCL (I-SFCL) [21]. The study concludes that R-SFCL can constrain the amplitude of fault current, but reduces the increase in fault current rate differently, and I-SFCL can delay the increase in fault rate significantly [22]. Related research has been performed on the basis of the unique characteristics in SFCL. For example, R-SFCL has been thoroughly investigated on the basis of the current-limiting capability comparison and parameter influence, thus indicating that the use of R-SFCL is suggested for real applications, provided that it is sufficiently sensitive to develop an adequate quenching resistance [23]. Hybrid DCCB has been equipped with SFCL in the main line to limit the fault current until a fault is completely interrupted [24; 25]. In addition, the superconducting magnetic energy storage technique has been adopted to limit fault current, which is achieved via a power transform between the power system and superconducting coil [26]. A rapid limitation can be realized when controlled FCL (molded as pancakes) is isolated to maintain its dynamic stability. In contrast to the AC line fault current, the fault current under DC short circuit fault in the MMC-HVDC system does not have a natural zero crossing. Thus, applying DCCB has been limited given its high cost and technical immaturity [27]. Mechanical breakers can limit fault current in a few tens of milliseconds but cannot satisfy the demand in the VSC-HVDC system protection [28]. Although semiconductor circuit breakers have a large on-state loss, the operation speed requirement is satisfied.