## 4 Discussion
Furthermore, [74] does not provide details for the steps of implementing the CNN model in the AED, making it unclear whether the original model was quantized or how quantization might have influenced both accuracy and resource efficiency metrics. The resource efficiency metrics for all models optimized in this study (LiteRT DNN, IntQ, Full-IntQ) are compared with those reported in other published studies addressing \begin{table}
\begin{tabular}{c c c} \hline \hline  & **This Study (Full-IntQ)** & **[PERSON] et al. (2023) [74]** \\ \hline
**Test platform:** & & \\ Microprocessor & 32-bit @ 216 MHz & 32-bit @ 200 MHz \\ On-chip flash & 2 MB & 2 MB \\ SRAM & 512 kB & 512 kB \\ \hline
**DNN model:** & & \\ Input: one-lead ECG & 1250 samples (10 s @ 125 Hz) & 2100 samples (7 s @ 300 Hz) \\ CNN layers & 5 & 5 \\ Filters & [20, 15, 15, 10, 5] & 16 per layer (average) \\ Kernel size & 10 & 3 \\ Activation & ReLU & Leaky ReLU \\ Max-pooling layers & 5 & 5 \\ Output: one unit & sigmoid activation & SoftMax activation \\ \hline
**Performance metrics:** & & \\ Sensitivity & 98.6\% (408/414) & 98.0\% (350/357) \\ Specificity & 99.5\% (7031/7068) & 100\% (648/648) \\ Execution time & 614.6 \(\pm\) 0.483 ms & 383 \(\pm\) 29 ms \\ \hline \hline \end{tabular}
\end{table} 
Table 5: Comparison of microcontroller-embedded CNN models for the detection of ventricular fibrillation. The information from [PERSON] et al. [74] is presented as interpreted from the original article and its supplementary material. ECG processing models implemented on ARM-based platforms (Table 6). It is important to note that these comparisons are made under varying conditions in terms of model complexity and test platforms. The referenced studies primarily utilize CNN architectures with different number of convolutional blocks (comprising convolution and max or average pooling layers): one block in [7], four blocks in [58], five blocks in this study, and seven blocks in [57]. Additionally, [59] employs a combination of a convolutional layer and four residual blocks. Variations also exist in input size, which depends on the specific application, e.g., ranging from 64 samples for a single heartbeat classification in [7] up to 1250 samples for short-term arrhythmia detection in this study. Therefore, the data presented in Table 6 should be interpreted as providing a general impression of the ranges within which the evaluated metrics vary. These differences in architecture, input size, and application context preclude direct comparisons of the models' efficiency when deployed on different edge devices. In Table 6, the published model sizes range from 14 kB to 177 kB, with our IntQ and Full-IntQ models (20 kB) being comparable to the smallest sizes reported in [7]. These sizes \begin{table}
\begin{tabular}{c c c c c c} \hline \hline \multirow{2}{*}{**Model**} & \multirow{2}{*}{**Input**} & **TEST** & \multirow{2}{*}{**Model Size**} & \multirow{2}{*}{**SRAM Usage**} & \multirow{2}{*}{**Execution Time**} \\  & & **PLATFORM** & & & \\ \hline CNN for VF detection (this study) & 1250 samples (10 s @ 125 Hz) & Raspberry Pi 4 board based on ARM Cortex-A72 & & & \\  & & & & \\ \hline CNN for heartbeat (0.5 s @ 128 Hz) & 64 samples & Raspberry Pi 3 board based on ARM Cortex-A53 & & & \\  & & & & & \\ \hline MAT model & & & 27 kB & 12–24 MB *  & 1 ms \\ IntQ model & & & 14 kB & 21 MB *  & 0.65 ms \\ Full-IntQ model & & & 15 kB & 12–24 MB *  & 0.67 ms \\ \hline CNN for detection (this study) & 1250 samples (10 s @ 125 Hz) & STM32F7 board based on ARM Cortex-M7 & & & \\  & & & & \\ \hline CNN for heartbeat classification [58] & 140 samples (0.56 s @ 250 Hz) & STM32L475 board based on ARM Cortex-M4 & 36 kB & NA & 127 ms \\ \hline CNN for arrhythmia detection [57] & 640 samples (6 s @ 107 Hz) & nRF52832 SoC based on ARM Cortex-M4 & 196 kB & 9 kB & 379 ms \\ \hline MobileNetV2 for arrhythmia detection, optimized for size and speed [59] & & nRF52840 SoC (10 s @ 100 Hz) & & \\ \hline \hline \end{tabular}
\end{table}