# Low-Complexity High-Throughput QC-LDPC Decoder for 5G New Radio Wireless Communication
## 1 Introduction  
Low-density parity-check (LDPC) codes [1] were first introduced by [PERSON] in the early 1960s and later rediscovered by [PERSON] and [PERSON] [2] in 1996. Due to their excellent error correction performance and highly parallel implementation characteristics, LDPC codes have been considered as one of the most popular forward error correction (FEC) codes in the past several decades. Since then, LDPC codes served as a fundamental of modern coding theory, which relies mainly on Shannon theory [3] in addition to extremely sparse code characterization and probabilistic message-passing algorithms [4]. Moreover, LDPC codes inherently possess some of the good characteristics of linear block codes, for instance, the simple and sparseness structure of parity check matrix \(H\), which can be sketched in the shape of a bipartite model called Tanner graph [5]. A graphical approach makes it easier to analyze and visualize all complex mathematical formulations [6]. With higher data rates and acceptable error correction performance, the realizations of channel coding schemes have become crucial for all modern communication systems. The decoding of an LDPC can be deployed with a high degree of parallelism, which is essential to achieve high decoding throughput and low hardware complexity. Therefore, LDPC codes are promising solutions for high data rate applications such as wide-band wireless multimedia communications and magnetic storage systems [7, 8]. Generally, well-constructed irregular LDPC codes show much higher performance than the regular ones [9]. Although construction of very-large-scale integration (VLSI) architecture for irregular LDPC codes consumes higher complexity, many practical applications and standards suchas IEEE 802.16e [10] and IEEE 802.11n [11; 12] have considered irregular LDPC codes since they have greater performance. In addition, millimeter-wave (mmWave) Wireless Gigabit (WiGig) introduced by the IEEE 802.11 ad Working Group [13] considered LDPC codes as their favored option for FEC. Recently, LDPC codes have been deployed in the enhanced mobile broadband (eMBB) as the error correction coding scheme for fifth-generation (5G) data channels [14]. The third generation partnership project (3 GPP) has introduced two base graph (BG) matrices, namely BG1 and BG2 [15; 16; 17], to support the scalable and rate-compatible data transmission. In recent years, many studies concentrated on structured LDPC codes, also known as quasi-cyclic low-density parity-check (QC-LDPC) codes [18; 19; 20; 21; 22], which have been offered significant advantages over other types of LDPC codes in terms of hardware implementation and excellent error performance over noisy channels. Furthermore, QC-LDPC codes are relatively flexible and can be constructed with multiple code rates, numerous block lengths, and several different sizes of submatrix [23; 24], which are important features of the modern mobile and wireless communication systems. Structured codes also consist of block-LDPC codes and architecture-aware LDPC codes [25; 26]. The parity-check matrix \(H\) of QC-LDPC codes is composed of either cyclic permutation submatrices or zero matrices of the same size, which define the interconnection between the check node units (CNUs) and variable node units (VNUs). The 5G mobile communications systems offer a far higher performance level beyond former generations of mobile communications systems. Wireless data traffic is estimated to increase by 1000-fold by the end of 2020 with more than 50 billion mobile devices connected to these wireless networks with peak data rates up to 10 Gbps. Forward error correction plays an extremely crucial role in high-speed communication systems. The search for an efficient trade-off between high performance, high throughput capabilities, low hardware complexity, low cost, and low power consumption makes the hardware implementation of an LDPC decoder still challenging.