# A 4.1 W/mm\({}^{2}\) Hybrid Inductive/Capacitive Converter for 2-140 mA-DVS Load under Inductor +
Footnote †: This paper is an extended version of “[PERSON]; [PERSON]; [PERSON] High power-density, hybrid inductive/capacitive converter with area reuse for multi-domain DVS. In Proceeding of the 2014 IEEE Custom Integrated Circuits Conference (CICC)”.  
[PERSON]  
Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455, USA; [EMAIL_ADDRESS] (S.K.); [EMAIL_ADDRESS] (S.C.)  
1  
[PERSON]  
Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455, USA; [EMAIL_ADDRESS] (S.K.); [EMAIL_ADDRESS] (S.C.)  
1  
[PERSON]  
Correspondence: [EMAIL_ADDRESS]; Tel.: +1-612-625-4032  
2  
Footnote 10:  
+++ ==WARNING: Truncated because of repetitions==  
++  
powering digital circuits. The regulator along with being highly efficient needs to have fast transient response and wide output power range. Research in the field of computer architecture has shown that power savings is achieved by applying DVFS in a fine grained manner [6; 7]. This adds additional constraint on the power delivery network design to be able to support multiple independent voltage domains. Though on-board discrete component based regulators are highly efficient they are not well suited to support more than a few independent domains. Figure 1 shows the primary motivation for developing fully integrated DC-DC conversion solutions which are able to cater to a high output power range while maintaining both high efficiency and high power densities in DVFS loads. The regulator is also required to be area efficient and provide high power density to make the solution cost effective.  
Previous work in this area [3; 8; 9; 10; 11; 12; 13; 14] have attempted to achieve this goal but either had limited output power ranges or displayed degraded efficiency at lower output voltages. Other works such as [15; 16] have shown very high power densities but need additional fabrication steps to build the inductor in the interposer or the package substrate which increases the cost of the overall system. Recently, capacitive converters using high density trench capacitors have shown very high power density and efficiency [17]. However, in a capacitor converter the capacitor size has to increase linearly with load current for a given maximum operating frequency [18]. In contrast, we use a switched inductor converter for high power and switched capacitor converter for low powers. We show in Section 2 that an inductor can be placed above the digital circuits, hence achieving high power density.  
Some details of this fully integrated hybrid converter for DVS loads were presented in [19]. Also some variations of hybrid converter had been reported in works [20; 21; 22]. In this design for a DC-DC converter a capacitive converter is used to support lighter loads while an inductive converter is used to support higher loads as shown in Figure 2. In order to effectively utilize the large area under the inductor of the inductive converter, we propose to place digital load circuits under the inductor as shown in Figure 3. In this paper, we will first present the architecture of the hybrid converter in Section 2 where we will also explain the results from a testchip to understand the interaction between the digital circuits and power inductor placed above the digital circuits. Then we will present the capacitive and inductive converters which are connected in parallel to form the hybrid converter along with a prototype implementation details. The test setup used to characterize the hybrid converter is described in Section 3. Measurement results from the prototype testchip is reported in Section 4. Finally we will summarize this work in Section 5.  
Figure 1: DC-DC converter per power domain for best efficiency.