## 3 Multivalued Cartesian Genetic Programming (M-CGP)
### The Decoding of M-CGP Genotype  
CGP genotype decoding consists of calculations that allow us to obtain the output values for a given obtained system. Traditionally, these calculations consist of two stages: obtaining information about which nodes are active (they have a direct or indirect impact on the output value) and counting the output values of subsequent active nodes and system outputs. This is where the M-CGP approach proposed in this paper differs from classic CGP because it allows calculations for different groups of types of functions performed by nodes based on performance data obtained by this group or by other established groups. To make this possible, the calculation results of each group can be saved in separate memory places. In our case, separate groups are created with logic gates and flip-flops. The values of logic gates and flip-flops are calculated based on other data. This results directly from the way these two groups of elements work. In the adopted M-CGP model, any number of function type groups can be established, for which there will be different input data and the output data saved in a different place, but for sequential functions, three such groups are enough for digital circuits. The first group contains all the flip-flops, and the other two groups (the same) contain logic gates. The genotype decoding method adopted in this paper allows for calculation values corresponding to the output states of each node of the sequential system. All states of a sequential system include the values of all inputs of the system and outputs of all flip-flops and logic gates. The adopted procedure for decoding the M-CGP genotype is as follows:  
1. Determining which nodes are active, i.e., have a direct or indirect influence on the output value. This point is implemented in the same way as in classic CGP. 2. States corresponding to the system inputs are set. These inputs are assigned states with initial numbers, i.e., if there are, e.g., five inputs, the first five states correspond to these inputs. These states are stored in two memory tables, under \(VALUES\) and the \(VALUES\_ALPHA\). 3. If the RESET signal indicating the start of the system operation appears, the states of the outputs of all nodes (flip-flop outputs and logic gates) are reset to zero and stored in the \(ALPHA\_VALUES\) table. 4. The existing \(ALPHA\_VALUES\) of the flip-flop and logic gate outputs are copied to the \(VALUES\) table. 5. Consequently, the node values (flip-flop outputs and logic gates) are counted as follows:  
* The values of the flip-flop outputs are counted and changed only if the input data show that an activation signal has appeared on clk inputs. New values of the flip-flop outputs are calculated based on the previous states of their inputs contained in the \(VALUES\) table; however, they are stored in the \(ALPHA\_VALUES\) table. This method of operation results directly from the fact that the state of the output flip-flops changes only after some time (after the conventional alpha time). This means that if, for example, the output of flip-flop 1 is connected to the input of flip-flop 2, then when the state of these flip-flops changes synchronously, the state of the flip-flop 2 changes should take place based on the current state of the output of flip-flop 1 before its change, and this state is stored in the \(VALUES\) table. The same method of analyzing the operation of sequential systems is carried out, for example, in processes in the VHDL hardware description language. * The values of the logic gate outputs are calculated based on the data contained in the \(ALPHA\_VALUES\) table and are stored in the table \(ALPHA\_VALUES\). This is needed to determine the output states of the entire system based on the new flip-flop output states. * Additionally, for each gate, the values of their outputs are saved in the \(VALUES\) table, calculated based on the data contained in the \(VALUES\) table.