# Common-Mode Voltage Analysis and Reduction for the Quasi-Z-Source Inverter with a Split Inductor
## 3 CMV Reduction Strategies for the VSI  
Although the PV system with isolation between the PV arrays and the grid side can avoid the leakage current issue, the transformerless PV system is more attractive with higher efficiency and lower weight considering the installation cost. However, the CMV of the transformerless system should be limited to decrease the leakage current. The common-mode filter at the output side can realize CMV reduction, but the system size and cost are further increased. The amplitude of the CMV is related to the operation states, as shown in Table 1, making the modulation strategies available for CMV reduction. By appropriately locating the sequence of the operation states in a switching cycle, the fluctuation of the CMV in the VSI can be limited. Many modulation strategies for CMV reduction have been proposed for the conventional VSI, e.g., DPWM, AZSPWM, NSPWM and RSPWM, as shown in Figure 4. The conventional CMV reduction strategies are discussed in the following with exemplified switching patterns and CMV in a switching cycle. The conventional SVPWM uses all the vectors, as shown in Figure 3, while the CMV reduction strategies for the VSI adopt partial switching vectors to reduce the CMV. Figure 4a shows the switching signals for \(S_{1}\), \(S_{3}\) and \(S_{5}\) in the VSI (see Figure 1) and the corresponding CMV values. In the conventional VSI, the switches in the same leg, e.g., \(S_{1}\) and \(S_{2}\) in Figure 1, are complementary. In Sector 1, the DPWM uses two adjacent active states \(\mathbf{V}_{1}\), \(\mathbf{V}_{2}\) and a zero vector \(\mathbf{V}_{7}\), where the zero vector \(\mathbf{V}_{0}\) will not be included. The CMV, with the DPWM, varies from \(\frac{V_{\text{DC}}}{3}\) to \(V_{\text{DC}}\), for which the amplitude is shown in Table 1. All the active vector states, i.e., \(\mathbf{V}_{1}\)-\(\mathbf{V}_{6}\), are used in the DPWM, which makes the DC-link voltage utilization identical to the conventional SVPWM method. Figure 4b shows the switching signals and corresponding CMV values when AZSPWM is used. \(S_{3}\) and \(S_{6}\) are used to create an output state that is the same as the zero state, while the zero vectors \(\mathbf{V}_{0}\) and \(\mathbf{V}_{7}\) are eliminated to reduce the CMV amplitude. AZSPWM adopts only the active vector states, making the \begin{table}
\begin{tabular}{c c} \hline \hline
**Vectors** & **CMV Values** \\ \hline \(\mathbf{V}_{1}\), \(\mathbf{V}_{3}\), \(\mathbf{V}_{5}\) (odd vectors) & \(\frac{1}{3}V_{\text{DC}}\) \\ \(\mathbf{V}_{2}\), \(\mathbf{V}_{4}\), \(\mathbf{V}_{6}\) (even vectors) & \(\frac{2}{3}V_{\text{DC}}\) \\ \(\mathbf{V}_{7}\) (zero vector) & \(V_{\text{DC}}\) \\ \(\mathbf{V}_{0}\) (zero vector) & \(0\) \\ \(\mathbf{V}_{\text{st}}\) (shoot-through vectors) & \(0\) \\ \hline \hline \end{tabular}
\end{table} 
Table 1: CMVs with relevant vectors in the qZSI. CMV amplitude vary between \(\frac{V_{\text{DC}}}{3}\) and \(\frac{2V_{\text{DC}}}{3}\). More importantly, the maximum DC-link utilization ratio is the same as that with DPWM. Referring to Table 1, a constant CMV can be obtained when only odd or even switching patterns are used, i.e., NSPWM, as shown in Figure 4c. The CMV is \(\frac{V_{\text{DC}}}{3}\) with only odd vectors, i.e., \(\mathbf{V}_{1}\), \(\mathbf{V}_{3}\) and \(\mathbf{V}_{5}\), and \(\frac{2V_{\text{DC}}}{3}\) with only even vectors, i.e., \(\mathbf{V}_{2}\), \(\mathbf{V}_{4}\) and \(\mathbf{V}_{6}\). However, the maximum DC-link voltage utilization is reduced to 0.67, which is much smaller than that when the SVPWM is adopted. As shown in Figure 4d, NSPWM adopts three active vector states that are close to the output reference without using any zero vectors. There are two kinds of switching patterns with the NSPWM in the same space sector.