# Timing Analyses in FWE Evaluation
## 2 Problem Statement and Issues
The insertion loss for interconnections, denoted by \(IL\), represents the loss of power due to the transmission line, which is seen as a transmission channel with losses expressed for the dielectric and conductor and is related to the reflection coefficient [12] by:  
\[IL=20\cdot log|S_{21}| \tag{3}\]  
For maximum signal transmission, we must have insertion losses close to 0 dB. If the system impedance does not match the terminal impedance, then the signal is reflected at the input terminal. The input reflection loss, denoted by \(RL\), is the reflection coefficient of the signal at the input gate and is similarly expressed in dB. \[RL=20\cdot log|S_{11}| \tag{4}\]  
In general, to ensure a maximum transfer of power from source to destination, the reflection losses at the input gate should be as small as possible; in a standard communication system, an acceptable value for \(RL\) should be below \(-30\) dB. The purpose of our paper is to highlight the presence of the fiber tissue effect through graphic representations in the time domain. We will extract data from time domain representations and draw conclusions about rise times, fall times, and jitter. In [2], the authors presented different patterns for very high-speed buses designed in Double Data Rate (DDR) technologies--DDR5 operates at 8.4 GT/s and DDR6 works at 12.8 GT/s--and analyzed them in terms of delay and impedance variations, comparing different patterns of fiber weaves as 1030, 1080, 1078, and 3313 in terms of delay deviation exceedance and differential skew exceedance. Similar interconnection types are analyzed; single-ended and differential PCB interconnect as they are analyzed in our systems. The main point of interest here is the variation of skew, but this should be completed with information regarding jitter, eye corners figures in different substrates, microstrip, and stripline. The results can be easily extracted from the eye diagrams, making data rate and substrate type swappable, as will be demonstrated in Chapter 3. The same 10 GHz data rate was of interest in [2] and the S parameters were indicated to be represented with the frequency variation to extract information about the periodic response in terms of the reflection coefficient. Additionally, in [1], it was demonstrated that insertion loss should be analyzed to highlight the influence of the attenuation over a certain length with the increase of frequency. In [15], the authors turned their attention to the fiber weave effect only for high-speed PCBs, and compared different fiber wave patterns, such as 1035, 1078, 1080, and 2166, in terms of impedance fluctuations and phase difference on the traces at high data rates, over 56 Gbps. The dielectric constant fluctuation of different types of fiber weaves was analyzed for the mentioned patterns, affecting the impedance of the trace and signal propagation delay. In this research, the focus was oriented towards impedance fluctuation in time and phase difference in frequency, for rates up to 4 Gbps. Here, the study would also be complete if additional information regarding jitter was provided. To perform the simulations, we used the MWO environment from AWR [34]. Using this program, we designed circuits with two coupled and uncoupled lines in microstrip and stripline technologies for two materials, FR4 [35] and N4000-13 [36], and, using them, we performed simulations to obtain the eye diagram and the Smith chart and evaluated the performance of the designed circuits.