# Review of Task-Scheduling Methods for Heterogeneous Chips
## 6 Discussion  
### Challenges and Limitations  
The current research on scheduling frameworks for heterogeneous chips faces multifaceted challenges and limitations across both centralized and distributed paradigms. Centralized architectures inherently grapple with scalability bottlenecks due to single-point decision-making, where the exponential growth of scheduling latency under large-scale task queues severely constrains their practical deployment in modern many-core systems. This is further compounded by the curse of dimensionality in modeling heterogeneous resources, as contemporary architectures integrating GPU, FPGA, and domain-specific accelerators require joint optimization across 50+ hardware features, which lead to computationally intractable solution spaces. Distributed frameworks introduce new complexities through the global-local optimization paradox, where local node autonomy frequently conflicts with system-wide efficiency. Both paradigms struggle with dynamic environment adaptability, particularly in handling workload fluctuations and temporal task dependencies, while the energy-latency trade-off remains fundamentally unresolved. Emerging approaches exploring hybrid architectures and digital twin-enhanced scheduling show promise but face validation challenges in extreme heterogeneity scenarios. Existing static, heuristic, and optimized scheduling algorithms often focus on heterogeneous chips for specific applications and lack sufficient versatility and flexibility to adapt to rapidly evolving and diverse hardware architectures. At the same time, it is difficult to effectively balance performance optimization and energy efficiency in practice, especially in the face of large-scale and complex task loads. Due to its relative lack of adaptability to dynamic changes, the static algorithm finds it gradually difficult to meet the demand. In contrast, mixed and dynamic task-scheduling algorithms have more development potential. The hybrid algorithm can combine the advantages of various algorithms to deal with the complex task processing and load balance problems of heterogeneous chips, while the dynamic algorithm can better adapt to the dynamic environment changes of heterogeneous chips in the operation process and truthfully deal with the task load and dependence relationship. These two are usually able to meet the task-scheduling requirements of heterogeneous chips with multiple objectives, such as power management and load balancing. However, the time overhead of these two is also greatly increased. \begin{table}
\begin{tabular}{c c} \hline \hline
**Evaluation Metric** & **Content** \\ \hline Optimality & Finding the best or near-best task-scheduling method according to a certain optimization objective (such as minimizing completion time, maximizing resource utilization, minimizing energy consumption, etc.). \\ \hline Complexity & Measuring the complexity of the scheduling method and the additional overhead introduced during its execution. \\ \hline Online adaptability & The ability to dynamically adapt to the constantly changing environment and system status during runtime. \\ \hline Load Balancing & Balancing the workload between various processing units. \\ \hline Performance awareness & Considering the maximization of the overall performance of the heterogeneous chip. \\ \hline Power awareness & Optimizing the power consumption of the heterogeneous chip at a certain moment. \\ \hline Energy awareness & Optimizing the total energy consumption of the heterogeneous chip over a period of time. \\ \hline \hline \end{tabular}
\end{table} 
Table 6: Comparison of evaluation metrics. In addition, memory management considerations critically influence scheduling methods in heterogeneous chips by imposing constraints on data locality, access latency, and bandwidth partitioning across disparate memory hierarchies, necessitating adaptive scheduling strategies that optimize task-to-core mappings while balancing inter-kernel dependencies and memory coherence overhead.