# Lateral Capacitance-Voltage Method of NanoMOSFET for Detecting the Hot Carrier Injection
## 4 Simulations Results and Discussions  
The simulation result reveals that embedding a positive charge led to decreasing the threshold voltage, which depended on the size of the local charge (Figure 1). This effect is one of the main indicators of electrical stress in MOSFETs. Mainly in the experiments, the dependence of the change in threshold voltage on the stress time was measured. However, it is well known that increasing the stress time, under defined conditions, leads to an expansion of the charged area. In order to verify the conformity of the physical models used in the simulation with real cases, the dependence \(\Delta\)Vth on the length of the oxide-trapped charge was simulated. In the considered range (see Figure 1), the decrease of the threshold voltage with an increase in the linear size (d) of the oxide-charged area was in qualitative agreement with the experimental results in [28]. Here, the dependence of the threshold voltage on the stress time is investigated. As expected, embedding a charge into the gate oxide layer led to a change in the effective capacitance of the drain-substrate and source-substrate lateral junctions in the corresponding C-V dependencies of these junctions at low voltages. The effective capacitance of the aforementioned junctions means that the C-V dependence of the lateral junctions is not similar to the C-V dependence of a separate p-n junction (Figure 2). This is obviously the result of the significant impact of other MOSFET junctions at small sizes. For comparison, the C-V dependency of the drain-substrate junctions was simulated for different gate lengths (Figure 2). For a gate length of more than 300 nm, the C-V dependence of the drain-substrate junction was similar to the C-V dependency of a separate p-n junction. At shorter gate lengths, the capacitances of lateral junctions correspond to the effective capacitances. Therefore, in our case with a gate length of 100 nm, we have taken into account the effect of the local oxide charge on the effective lateral capacitance. The embedded charge located at the end of the gate oxide near the drain caused an increase in the lateral capacitance in the C-V dependence at low voltages (Figure 3). The presence of a trapped charge in the oxide layer resulted in a redistribution of charge carriers and, therefore, a curvature of the border/edge of the depletion layer of the lateral/side junction near the surface of the substrate. The curvature caused a change in the junction capacitance. To explain this effect, we can use the flat capacitor approach for lateral/side junctions. As mentioned above (see Equations (1) and (2)), the capacitance of the lateral drain-substrate junction can be expressed as the sum of three components:  
\[\text{Cds}=\text{Cswn}+\text{Cswc}+\text{Cbw} \tag{3}\]  
Figure 1: Dependence of the threshold voltage change on the linear size of charged area. The same expression (see Equation (3)) can be written for the capacitance of the source-substrate junction. It is obvious that the trapped charge mainly influences the capacitance associated with the side wall of the junction in contact with the channel Cswc. The latter, in the flat capacitor approach, can be expressed by Cswc = \(\varepsilon\varepsilon_{0}\)S/W, where \(\varepsilon\varepsilon_{0}\) is the dielectric constant of the substrate, and S and W are the area and the width of the depletion region of the junction, respectively. The curvature of the border of the depletion layer significantly affects the ratio S/W and therefore leads to changes in Cswc and Cds. At low voltages, the curvature of the considered border was considerable compared/relative to the border of other parts of the lateral junction (e.g., the part of the side wall not in contact with the channel and the bottom wall part) than at high voltages. This is clearly depicted in the C-V dependence in Figure 3 through a significant change of the capacitance at low voltages.