# Silicon Integrated Nanophotonic Devices for On-Chip Multi-Mode Interconnets
## 3 Silicon Multi-Mode Routing Devices
### Silicon Multi-Mode Splitters  
Single-mode power splitting can be easily realized by exploiting Y-junctions [61; 62; 206], directional couplers [207; 208; 209] and MMI couplers [50; 210]. However, these approaches cannot be directly employed in the multi-mode regime, because there are two underlying constraints for multi-mode power splitting: first, the splitting ratios (SRs) should be equivalent for all the input modes; second, the mode order should be preserved. The simplest case is a symmetric Y-junction, where the input \(\mathrm{TE}_{1}\) mode will convert to a pair of \(\mathrm{TE}_{0}\) modes in two branches, as shown in Figure 16. Hence, the Y-junction cannot serve as a multi-mode power splitter since the mode order is changed. Recently, a variety of multi-mode splitters have been reported, including ones based on directional couplers [211], adiabatic couplers [212], mode converter-assisted Y-junctions [213] and SWG transflectors [214], as summarized in Figure 17.  
The first silicon multi-mode power splitter was designed based a directional coupler [211], as shown in Figure 17a. The incident modes (i.e., \(\mathrm{TM}_{0}\), \(\mathrm{TM}_{1}\)) can be partially transferred to the adjacent waveguide with evanescent coupling. The problem is that the half-beat lengths are distinct for different mode orders. Thus, one has to carefully choose the structural parameters to ensure that the coupling length satisfies the following equation:  
\[\mathrm{L}_{\mathrm{c}}=(1/2+\mathrm{p})\cdot\mathrm{L}_{\pi,0}=(1/2+\mathrm{ q})\cdot\mathrm{L}_{\pi,1} \tag{12}\]  
where \(\mathrm{p}\) and \(\mathrm{q}\) are two integers, \(\mathrm{L}_{\mathrm{c}}\) is the coupling length, \(\mathrm{L}_{\pi,\mathrm{i}}\) is the half-beat length for \(\mathrm{TM}_{\mathrm{i}}\). Here, \(\mathrm{L}_{\pi,\mathrm{i}}\) can be obtained by using the super-mode theorem [70]. In this way, both \(\mathrm{TM}_{0}\) and \(\mathrm{TM}_{1}\) modes can be allocated to two waveguides with the same splitting ratio of \(\mathrm{SR}=50\%\). For the fabricated device, the insertion losses and crosstalk were measured to be \(\mathrm{IL}<-0.7\) dB and \(\mathrm{XT}<-14.3\) dB, respectively. The major disadvantage is the narrow bandwidth (BW \(<30\) nm) since \(\mathrm{L}_{\pi,\mathrm{i}}\) is strongly wavelength dependent. Moreover, this approach is not scalable, because it is difficult to find an optimal parameter for more than two modes. As an improvement, the adiabatic coupler was proposed to enhance the bandwidth and expand the capacity [212]. The input modes are firstly converted to the corresponding super-modes, which are then evenly split by a symmetric Y-junction, as shown in Figure 17b. In theory, this adiabatic coupler-based structure can provide an ultra-broad bandwidth (BW \(>165\) nm) as well  
Figure 16: The calculated light propagation profiles for a Y-junction when \(\mathrm{TE}_{0}\) (**left panel**) and \(\mathrm{TE}_{1}\) (**right panel**) are launched. The mode order cannot be preserved in the splitting process. Figure 17: The schematics for different silicon multi-mode splitters based on (**a**) directional coupler [211], (**b**) adiabatic coupler [212], (**c**) mode converter-assisted Y-junction [213], (**d**) subwavelength grating (SWG) transflector [214]. as an arbitrarily large capacity. The insertion losses and crosstalk are also quite low (IL \(<\) 0.12 dB, XT \(<\) \(-\)18.5 dB). However, for this scheme, the coupling length has to be extremely long (\(>\) 800 \(\upmu\)m) to meet the adiabatic condition. In [213], the mode converter-assisted Y-junction was proposed to realize a scalable multi-mode splitter with a smaller footprint as well as a broad bandwidth. The input TM\({}_{\rm i}\) is firstly converted to the TM\({}_{\rm 2i+1}\) mode as a transition, which is then divided into two beams and reverted to the TM\({}_{\rm i}\) mode through a symmetric Y-junction, as shown in Figure 17c. The TM\({}_{\rm i}\)-TM\({}_{\rm 2i+1}\) conversion can be achieved for any higher-order mode by bridging two groups of cascaded ADCs.