# Towards Large-Scale Fast Reprogramable SOA-Based Photonic Integrated Switch Circuits
## 6 InP MRR-Based Switching Cross-Point Matrices  
Micro-ring resonator (MRR) elements have been considered extensively, given the increased availability of silicon on insulator technology for photonic circuits. Higher-order ring resonators offer a flattened-passband response that enables wavelength-tolerant, broadband routing in a cross-grid array [41]. Faster actuation has proven more challenging with cross-point architectures generally because the physical size of the switching elements has largely precluded the use of fast electro-optic switching. One potential exception is the vertically coupled SOA switch [42]. Recently, we have explored the use of photonic integrated circuits based on ring-resonators on the InP photonics platform. By using InP integrated phase shifters for phase matching and switching activation, these switch matrices provide fast switching and potential low electrical power consumption. Prior work in InP photonics has focused on using first-order micro-ring resonators for this purpose [43; 44], but higher-order resonators have been shown to decouple bandwidth and the signal extinction implying that both parameters can be optimized individually. As an added incentive, the enhanced bandwidth of such devices also increases their tolerance to variations in fabrication [41]. Recently, we have designed and fabricated the first 4 \(\times\) 4 InP switch matrix based on third-order resonators [45; 46]: three race-track-like ring resonators are coupled through directional couplers (Figure 7a). The local refractive index changes due to the electric field and the carrier depletion of a reverse biased junction is used to tune the resonant-based switch elements and represents an attractive power-efficient alternative. Figure 7b indicates the phase modulator placement. Fast electro-optic tuning at close-spaced phase modulators is used to allow data to drop to the next port or pass through. The matrix is made of sixteen switching elements which are based on these third-order ring resonators. The full mask layout and a photograph of the realized entire switch matrix are shown in Figure 7c,d, respectively. The desired coupling coefficients are determined by varying the gap separating the directional couplers, while keeping fixed the coupling lengths. The total chip size is about 4.5 \(\times\) 3.8 mm\({}^{2}\) and includes 500 \(\upmu\)m long SOAs placed after each input-output port to compensate for coupling losses and  
Figure 7: **(a)** Single switching element composed of three race-track micro-rings; **(b)** Electrodes (in red) placed on the top of directional coupler for fine tuning; **(c)** Full layout of the chip, including the optical wiring layer (in black) and the metal wiring (in red); **(d)** Photograph of the fabricated chip; **(e)** Spectral responses of four measured paths: 1 \(\times\) 1, 1 \(\times\) 2, 2 \(\times\) 1, and 2 \(\times\) 2.  
for power equalization at the optical outputs. Figure 7e shows the measured spectra for all the four paths. The total 12 dB (2 \(\times\) 6 dB) fiber-to-chip coupling losses are already subtracted from the plots. All four symbol curves are centered at 1549.87 nm and a 3 dB pass-bandwidth of 11.25 GHz (0.09 nm) is measured for each of the switch elements, which is close to the nominal value. The stop-band part of the higher loss spectra is believed to be limited by the SOA noise. On-state on-chip losses for the single switching element are of the order of 6 dB. To enable high connectivity switching fabrics, smaller and lower-loss switch elements will become important. Techniques to further reduce the on-chip losses are currently being investigated: the use of high resolution lithography is being explored to enable higher density and lower on-chip losses.