## 2 NB-IoT System Detailed Design and Implementation
### NPUSCH Transmitter Chain Implementation
#### 2.1.2 Turbo Encoder  
In recent years, turbo codes are the most potentially leading development in coding theory, as introducing turbo codes has provided a new way to look at the problem of constructing good codes and decoding them with low complexity. Due to the performance  
Figure 1: Detailed block diagram of the NB-IoT transceiver.  
Figure 2: CRC block diagram [12].  
of turbo codes, which is close to the Shannon limit, this coding technique is used in various storage and communication systems to help the receiver correct the received data [13]. The turbo encoder, which is recommended by 3 GPP standardization for NB-IoT communication systems, consists of two recursive systematic convolutional encoders, which are usually identical but not necessary. Both convolutional encoders comprise three shift registers XOR-ed with the polynomials in (3) and (4), and one internal interleaver to change the order of the input bits before entering the second convolutional encoder. In addition, the coding rate of the turbo encoder is \(1/3\), and therefore, it has three outputs with one output sequence of a systematic channel code that is always identical to the input sequence [11; 12].  
The transfer function of the 8-state constituent code for the parallel concatenated convolutional code (PCCC) is as follows:  
\[G(D)=[1,\frac{g_{1}(D)}{g_{0}(D)}] \tag{2}\]  
where:  
\[g_{0}(D)=1+D^{2}+D^{3} \tag{3}\]  
\[g_{1}(D)=1+D+D^{3} \tag{4}\]  
When starting to encode the input bits, the shift registers of the 8-state constituent encoders shall initially have all zeros values. The turbo encoder's output is \(d_{k}^{(0)}=x_{k}\), \(d_{k}^{(1)}=z_{k}\), \(d_{k}^{(2)}=z_{k}^{{}^{\prime}}\), \(for\)\(k=0,1,2,K-1\)[10]. The input bits of the turbo encoder are denoted by \(c_{0},c_{1},c_{2},c_{3},\ldots,c_{(K-1)}\), while the output bits from the internal interleaver are denoted by \(c_{0^{{}^{\prime}}}^{{}^{\prime}}c_{1}^{{}^{\prime}},\ldots,c_{(K-1)}^{{}^{ \prime}}\), which are the input to the second 8-state constituent encoder. The relationship between them is as follows [10; 11]:  
\[c_{i}^{{}^{\prime}}=c_{\pi(i)},\quad i=0,1,(K-1) \tag{5}\]  
The relationship between the input index \(\pi\) and the output index \(i\) implies the following quadratic form:  
\[\pi(i)=(f_{1}.i+f_{2}.i^{2})modK \tag{6}\]  
where the \(f_{1}\) and \(f_{2}\) are based on the the block size, \(k\). The trellis termination bits appended to the turbo encoder's output are as follows:  
\[d_{K}^{(0)}=x_{K}\qquad\qquad d_{K+1}^{(0)}=z_{K+1}\qquad\qquad d_{K+2}^{(0)} =x_{K}^{{}^{\prime}}\qquad\qquad d_{K+3}^{(0)}=z_{K+1}{}^{\prime} \tag{7}\]  
\[d_{K}^{(1)}=z_{K}\qquad\qquad d_{K+1}^{(1)}=x_{K+2}\qquad\qquad d_{K+2}^{(1)} =z_{K}^{{}^{\prime}}\qquad\qquad d_{K+3}^{(1)}=x_{K+1}{}^{\prime} \tag{8}\]  
\[d_{K}^{(2)}=x_{K+1}\qquad\qquad d_{K+1}^{(2)}=z_{K+2}\qquad\qquad d_{K+2}^{(2) }=x_{K+1}^{{}^{\prime}}\qquad\qquad d_{K+3}^{(2)}=z_{K+2}{}^{\prime} \tag{9}\]  
The turbo encoder detailed block diagram, consists of [11]:  
* A lookup table (LUT) to store the values of f1 and f2.
* A buffer for storing the input stream and a restoring division unit for index calculation.
* A block for shifting and XOR-ing the input stream. Therefore, it consists of a shift register, a multiplexer to release the input data after \(K\) cycles for generating the trellis termination bits, and a counter to count of TBS.
* An output controller block to assign the positions of the 12 trellis terminations bits in the proper locations in the three streams.