# The Eye-Opening Arbiter-PUF FPGA Implementation with Auto Error Detection
## 5 PUF Stability Evaluation and Automatic Detection of Unstable Bits
### Stability Evaluation  
To evaluate the robustness of PUF readouts, each challenge is applied \(N=250\) times to each PUF instance and then compared to a _reference response_\(R_{\text{ref}}\), for which we have chosen the median of all readouts at the largest deadzone. The stability is evaluated by computing the error rate via the intra-Hamming distance (\(\text{HD}_{\text{intra}}\))  
\[\text{HD}_{\text{intra}}(c)=\frac{1}{N}\cdot\left(\sum_{i=1}^{N}r_{i}(c)\
eq R _{\text{ref}}(c)\right)\cdot 100\% \tag{4}\]  
for each CRP [3; 11]. An \(\text{HD}_{\text{intra}}\) of 0% means that all readouts were the same, whereas an \(\text{HD}_{\text{intra}}\) of 100% means all readouts differ from the reference. The \(\text{HD}_{\text{intra}}\), averaged over all challenges, is plotted over varying \(dz\) in Figure 12 as blue line. If only the intrinsic deadzone of the arbiter is used and no additional deadzone (\(dz=0\)) is adjusted by the PDLs, the \(\text{HD}_{\text{intra}}\) is \(\approx\)10%. For an increasing deadzone by PDL, an \(\text{HD}_{\text{intra}}\) of \(\approx\)2% can be achieved, but not less. Figure 11: Distribution of correlation coefficients, indicating the relation to other responses. The correlation coefficents of all CRPs per PUF instance are plotted in orange. The correlation coefficients of all PUF responses per challenge are plotted in blue. A value of 0 means that no correlation is present. Close investigation revealed that the HD\({}_{\text{intra}}\) was largely dominated by a limited number of very unstable bits on a limited number of PUF instances. Such unstable bits are highlighted for the exemplarily shown PUF instance in Figure 9 with red circles. There, it is obviously seen that RO\({}_{\text{A}}\) and RO\({}_{\text{B}}\) have almost identical frequencies for some challenges and thus remain indistinguishable for a long time. The experiment on this particular instance revealed that their frequency difference is \(\leq\)\(\frac{1\text{[counter edge]}}{\text{Ims}}\) with a standard deviation between 1.5 and 2 [counter edges]. For such challenges, the impact of \(\Phi_{\text{ab}}\) compared to noise is very small. For reliable bit extraction, a large deadzone would be required together with a very large evaluation time to allow the tiny frequency difference to be integrated to a sufficiently large phase difference. Hence, such unstable bits can be blanked to exclude them from the final key. Blanking is a known technique from the SotA [5; 6], and, usually, the unstable bits, which need to be blanked, have to be found by time-consuming repetitive measurements. The unique feature of the EoA-PUF is the possible auto-detection of unstable bits, which will be explained in more detail in Section 5.2. After blanking of the unstable bits, the averaged error rate of all PUFs decreased to \(<\)\(10^{-4}\) when using the largest \(dz=20\,\text{bits}\), which is shown in Figure 12 with the green solid line. Also, the much larger error rate of the unstable bits is shown in red for completeness' sake. In addition, Figure 13 shows the relation of stable and unstable bits per FPGA-board. As can be seen, a minimum of 85% of the bits are stable per evaluated FPGA. For other than the largest deadzone, it can be seen in Figure 12 that the error rate decreases with increasing \(dz\). With a deadzone configuration greater than 6 bits, the error rate starts flattening. This can be explained by the fact that the minimal required phase  
Figure 12: Averaged error rate of PUFs for varying deadzone steps. The red line shows the blanked bits, while the green line represents the usable ones. In the blue line, all are combined. As the deadzone is adjusted with PDLs based on H-SDE, the average delay per deadzone configuration bit is \(2\cdot 7\,\text{ps}=14\,\text{ps}\). Figure 13: Relative amounts of stable and unstable bits per FPGA board. The amount of stable bits is \(>\)83% per board.