## 4 Experimental Validation  
In this section, an implementation with an FPGA evaluation board is presented. The general implementation set up is shown Figure 16, and laboratory test bench in Figure 17. As seen in this figure, a Zedboard FPGA board (ZedBoard Zynq(r)-7000 ARM/FPGA SoC Development Board [45]) was connected to a computer running Matlab R2016b simulation tool. This connection can be established using the 10/100/1000 Ethernet port [46]. The Zedboard was connected to an AD-FMCOMMS2-EBZ board [47], which is a FMC board for the AD9361, a highly integrated agile RF transceiver [48]. However, due to the limitation of the instantaneous bandwidth less than or equal to 56 MHz, this limits implementation of DPD, in this experiment to 5 MHz bandwidth signals.  
Figure 15: CCDF of PAPR reduction performance of PSI technique on multi signals.  
The signal was passed through to the power amplifier (PA). In this work, an RTP26010-N1 RFHIC was used for amplification [49]. This power amplifier from class Doherty [50] has maximum output power of 47 W.  
A major component of the experimental validation is to confirm that the PSI technique does not apply additional distortion outside the main channel. As such, it is beneficial to experimentally validate the PSI technique on the bench with a nonlinear PA. Additional DPD linearisation was also applied to the signal in order to linearise the PA output and perform as close a test to a real world scenario as possible. The resulting spectrum and amplitude/amplitude (AM/AM) behaviour of PA was compared with and without DPD, and PSI technique. The DPD linearisation is widely used in many applications, such as cellular telecommunications and satellite linking, because of its relatively simple implementation [51; 52; 53]. Here a DPD based on the least squares (LS) optimisation technique was used [54]. For simplicity the number of coefficients was minimised; the AM/AM behaviour of PA is plotted in Figure 18b. The inverse of this dynamic nonlinearity was applied to the signal prior passing it through the PA. As mentioned earlier, as DPD relies on the initial response of PA, in order to operate, a wide-bandwidth should be considered; for example, if the signal generated has 5 MHz  
Figure 16: PA and DPD test diagram.  
Figure 17: FPGA laboratory test bench set up.  
bandwidth, the bandwidth allowed for FMCOMM and FPGA should be able to compute 5 times that [47]. Therefore, the test signal presented in Figure 18a,b, had a 25 MHz bandwidth. It is seen in Figure 18a, that when a signal is passed through the PA, the distorted output signal has an ACPR or ACLR of approximately \(-30\) dBc. Once DPD is applied, this distortion is reduced to \(-55\) dBc. Applying the PSI to the signal also does not distort the spectrum beyond that of the pre-distorted signal. The PA AM/AM behaviour with and without DPD and PSI are shown, and again, the PSI technique does not impair the overall performance. It is important to note that by applying PSI technique allows the PA has to operate longer in more efficient mode. This can be seen by more frequent data points in the saturation region, as illustrated in the zoomed rectangle frame in Figure 18b. The test presented in Figures 17 and 18a showed that about 1 dB increment in the output of PA was achieved by applying the PSI algorithm.