# Integrated Communication and Measurement System with BOC-Assisted OFDM
## 3 Reception of the Composite Signal
### Tracking of the BOC Signal  
Based on the roughly estimated code phase offset and Doppler frequency offset results, the tracking stage estimates the parameters of the received signal with high precision. Figure 6: Auto-correlation function of the BOC signal and correlation function of the BOC and OFDM signals (BOC (4,1) is adopted; the square-wave subcarrier frequency is 4.096 MHz; the code frequency is 1.023 MHz). (**a**) shows the auto-correlation function of the BOC signal. (**b**) shows the correlation function of the BOC and OFDM signals. Figure 7: Parallel code phase acquisition algorithm. There are three major traditional tracking algorithms for the BOC signal: BPSK-Like [29], ASPECT [30], and Bump-Jump [31]. However, these approaches have limitations. For example, BPSK-Like occupies a large amount of hardware resources and does not fully utilize the benefits of the BOC signal, ASPECT is designed only for sin-BOC(n,n) signals and is not suitable for other types of BOC signal, and Bump-Jump cannot be applied in highly dynamic scenarios. To compensate for the deficiencies of these tracking algorithms, a subcarrier phase-locked loop (SPLL) three-loop tracking algorithm is proposed to estimate the code phase offset and Doppler frequency offset with high precision. As shown in Figure 8, the SPLL three-loop tracking algorithm is mainly composed of a carrier tracking loop, a subcarrier tracking loop, and a code tracking loop. The numerically controlled oscillators (NCOs) of the three loops can generate a local signal based on the feedback from their respective discriminators. The carrier tracking loop uses a second-order frequency-locked loop (FLL) to assist a third-order phase-locked loop (PLL) [32] and has excellent performance under highly dynamic conditions. The fast tracking capability of the FLL and the high tracking precision of the PLL are fully exploited in the carrier tracking loop. A Costas loop design is used in both the FLL and PLL, and the discriminators are shown in Equations (11) and (12), respectively:  
\[\Delta f=a\tan 2\Big{(}\frac{cross}{dot}\Big{)} \tag{11}\]  
\[\Delta\varphi=a\tan 2\Big{(}\frac{W_{QIP}}{W_{IIP}}\Big{)} \tag{12}\]  
In Equation (11), \(cross\) and \(dot\) are the cross product and dot product of the \(I/Q\) branches, respectively, as shown in Equations (13) and (14):  
\[cross=W_{IIP}(i-1)\cdot W_{QIP}-W_{QIP}(i-1)\cdot W_{IIP} \tag{13}\]  
\[dot=W_{IIP}(i-1)\cdot W_{IIP}+W_{QIP}(i-1)\cdot W_{QIP} \tag{14}\]  
where \(W_{IIP}\) and \(W_{QIP}\) represent the integration and dumping results for the \(I/Q\) in-phase prompt branches, respectively, and \(W_{IIP}(i-1)\) and \(W_{QIP}(i-1)\) are the integration and dumping results, respectively, for the \(I/Q\) branches at the last integration time. The subcarrier tracking loop employs a third-order PLL, and the phase discriminator is shown in Equation (15):  
\[\Delta\theta=\frac{1}{2}\arctan\Bigg{[}\frac{2\big{(}W_{IQP}\cdot W_{IIP}+W_{ QIP}\cdot W_{QQP}\big{)}}{\Big{(}W_{IIP}^{2}+W_{QIP}^{2}\big{)}-\Big{(}W_{QQP}^{2}+W_{ IQP}^{2}\Big{)}}\Bigg{]} \tag{15}\]  
Figure 8: SPLL three-loop tracking algorithm. where \(W_{IQP}\) and \(W_{QQP}\) represent the integration and dumping results for the \(I/Q\) orthogonal prompt branches, respectively. The code tracking loop adopts a delay-locked loop (DLL), which adjusts the code NCO in accordance with the code phase offset between the received signal pseudocode and the local signal pseudocode. Subsequently, the phase of the received signal is kept consistent with the phase of the local signal through cyclic feedback to achieve the tracking and locking of the code phase.