## 4 Description of the Visible Light Communications System
### Discussion of the VLC Emitter Structure
The structure of the proposed data frame is illustrated in Figure 8. The frame begins with a synchronization header, which informs the VLC receiver that a new data frame is being received. In order to provide a high frame delivery ratio, the synchronization header is transmitted with a fixed pulse width, as opposed to the payload transmission's case. However, the dimming factor must be maintained; therefore, only for the synchronization header, the mechanism based on the insertion of compensation symbols is used. The duration of the idle period is dynamically determined, based on the duty cycle valuecalculated for payload, to attain a certain light intensity. The main software program will determine the idle pattern needed, which will be inserted after the synchronization header, followed by a start bit, which informs the VLC receiver that the data message is about to begin. The frame also contains a byte that transmits the length of the data frame to the VLC receiver. Finally, the frame contains a variable-length data message, followed by a short tail bits' sequence that separates different data frames. Special care must be taken in determining the idle pattern, in order to prevent any light flickering. Therefore, it is mandatory to limit the light intensity fluctuations through the Maximum Flickering-Time Period (MFTP). The proposed data frame has a short synchronization sequence, which ensures the whole range of dimming with an idle pattern only formed with ones or zeros, as seen in Figure 8. Therefore, if the average brightness needed is less than or equal to 50%, the main software program will determine the low-level compensation time needed, which will be inserted after the synchronization header, followed by a high-level start bit, as seen in Figure 8a. If the average brightness needed is greater than 50%, the number of bits calculated and inserted will have a high-level value, and these will be followed by a low-level start bit, which precedes the payload, as seen in Figure 8b. Figure 6: The VPPM standard scheme: (**a**) Average brightness less than 50%; (**b**) Average brightness equal to 50%, the same as Manchester coding; (**c**) Average brightness greater than 50%. Figure 7: The scheme implemented in this work: (**a**) Average brightness less than 50%; (**b**) Average brightness equal to 50%, the same as Manchester coding; (**c**) Average brightness greater than 50%. \begin{table}
\begin{tabular}{c c c c} \hline \hline \multirow{2}{*}{**Logical Value**} & \multirow{2}{*}{
\begin{tabular}{c} **Duty Cycle Value** \\ \(d\) **is the Duty Cycle** \\ \end{tabular} } & \multicolumn{2}{c}{**Physical Value**} \\  & & \multicolumn{2}{c}{**T Is the Bit Period**} \\ \hline \multirow{6}{*}{0} & \multirow{3}{*}{\(1\%\leq d\) < 50\%} & Low & \(0\leq t<(0.5d)T\) \\  & & High & \((0.5-d)T\leq t<0.5T\) \\  & & Low & \(0.5T\leq t<T\) \\ \cline{2-4}  & & High & \(0\leq t<(1-d)T\leq t<T\) \\ \cline{2-4}  & & Low & \(0\leq t<(1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & Low & \(0\leq t<(1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \(0\leq t<(1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \(0\leq t<(1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \(0\leq t<(1-d)T\leq t<T\) \\ \hline \multirow{6}{*}{1} & \multirow{3}{*}{\(1\%\leq d\) < 50\%} & Low & \(0\leq t<(1-d)T\) \\  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & Low & \(0\leq t<(1-d)T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \((1-d)T\leq t<T\) \\ \cline{2-4}  & & High & \(0\leq t<(1-d)T\) \\ \cline{2-4}  & & Low & \((1-d)T\leq t<T\) \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Definition of data mapping for the proposed code.