## 2 Proposed Resistive-Bridge Readout Integrated Circuit
### Top Architecture of the Proposed Resistive-Bridge Microsensor ROIC  
Three types of the IAs are mainly utilized: the capacitively-coupled, conventional 3-opamp, and current feedback IAs. To prevent signal distortion, high-input impedance is an important parameter. In Figure 3a, showing the capacitive-coupled instrumentation amplifier (CCIA) scheme, the input impedance at the input node of the amplifier is reduced, owing to the shunt-shunt feedback. The input impedance of the CCI can be expressed as:  
\[Z_{IN(CCIA)}=\left|\frac{2}{sC_{in}}\right|=\left|\frac{2}{2\pi f_{CH}C_{in}}\right| \tag{3}\]  
Figure 2: Chopping principle in the time domain (**a**) chopper; (**b**) amplifier with chopper; (**c**) ideal time domain signal waveforms. Adapted from [9].  
Its input impedance is typically in the order from several hundred k\(\Omega\) to several M\(\Omega\), determined by the impedance of the input capacitors and the chopping frequency. To increase the input impedance, the input impedance boosting schemes, using positive feedback or input pre-charge techniques, are used; however, the complexity of the stability and circuits are drawbacks [10; 11]. As shown in Figure 3b,c, the 3-opamp IA and the CFIA receive input signals directly from the gate input node of the amplifier, and only the small gate input capacitances are only shown at the input node; thus, much higher input impedance can be achieved than with the CCIA.  
The input impedance of the 3-opamp IA and CFIA can be expressed as (4):  
\[Z_{IN(3-opamp,CFIA)}=\left|\frac{2}{SC_{g}}\right|=\left|\frac{2}{2\pi f_{C}C_{ g}}\right| \tag{4}\]  
where \(C_{g}\) is the gate input capacitance of input transconductance, \(G_{m1}\). In this design, the gate capacitance, \(C_{g}\), is simulated to 272.8 FF, which is total gate capacitance (\(c_{gg}\)). From the power consumption perspective, the CFIA is more efficient than 3-opamp IA because the output stages are shared. Moreover, by converting the input differential voltage signal through the input transconductance, \(G_{m1}\), to differential current, the input common-mode and the feedback common-mode can be separated, thus CFIA achieve the higher CMRR, compared to 3-opamp IA [12; 13].  
The top block diagram of the proposed resistive-bridge microsensor ROIC is shown in Figure 4. It consists of a chopper-stabilized CFIA, low-pass filter (LPF), ADC driving buffer, and 12-bit successive-approximation-register (SAR) analog-to-digital converter (ADC). First, the resistive sensor converts the resistance to the voltage signal, the input signal is amplified through the first stage (which is the proposed, fully differential CFIA). The gain of proposed CFIA is determined by the feedback resistors \(R_{f}\) and \(R_{c}\), and the gain can be  
Figure 3: (**a**) Instrumentation amplifier topologies: (**a**) block diagram of CCIA; (**b**) 3-operational amplifier IA; (**c**) block diagram of a CFIA.  
adjusted to 4-bits (_DIN_<3:0>) via the programmable resistance, \(R_{c}\), through the SPI. The gain of the proposed CFIA can be expressed as:  
\[gain=1+2\cdot\frac{R_{f}}{R_{c}} \tag{5}\]  
Figure 5 shows the transfer function of the CFIA, in which the gain is adjusted from 70.6 (_DIN_<3:0> = 1111) to 220.3 (_DIN_<3:0> = 0000). The amplified signal goes through the 2 nd-order LPF, with 500 Hz cutoff frequency and buffer, and finally converts to the digital signal through the 12-bit SAR ADC.