## Operating Principle of the Proposed Dual-Mode Control Strategy for the DAB Converter
### Medium-to-Full Load  
As the load condition changes from light load to medium-to-full load, the SPS control is used to operate the DAB converter, controlling the direction and magnitude of the transferred power. Figure 7 demonstrates the theoretical waveforms of the proposed control strategy for the DAB converter in SPS mode under medium-to-full load conditions.  
State 1 (\(t_{0}\leq t\leq t_{1}\)):  
As shown in Figure 7, due to the discharge of energy stored in \(C_{OSS1}\) and \(C_{OSS4}\) to zero during the dead time in the previous state, switches \(S_{1}\) and \(S_{4}\) are turned on with ZVS at  
Figure 7: Theoretical waveforms of the proposed control strategy for the DAB converter in SPS mode under medium-to-full load conditions.  
\(t=t_{0}\). Since inductor \(L_{K}\) has not discharged its stored energy completely, current \(i_{LK}\) keeps flowing in the same direction as that in the previous state until the energy stored in \(L_{K}\) is discharged to zero. The detailed current path is shown in Figure 8a.  
State 2 (\(t_{1}\leq t\leq t_{2}\)):  
As shown in Figure 7, at \(t=t_{1}\), switches \(S_{1}\), \(S_{4}\), \(S_{6}\), and \(S_{7}\) remain on. The energy stored in \(L_{K}\) has been discharged to zero, causing \(L_{K}\) to change its state from discharging to charging. At this time, \(V_{DCbus}\) charges \(L_{K}\). Therefore, current \(i_{LK}\) changes its direction and increases linearly. The detailed current path is shown in Figure 8b.  
State 3 (\(t_{2}\leq t\leq t_{3}\)):  
Figure 8: (a–g) The current flow path of the DAB converter in SPS control mode.  
As shown in Figure 7, at \(t=t_{2}\), switches \(S_{1}\) and \(S_{4}\) remain on, switches \(S_{6}\) and \(S_{7}\) are turned off. The period from \(t_{2}\) to \(t_{3}\) is the dead time of the low-voltage side switches. At this time, the low-voltage side current discharges \(C_{OSS5}\) and \(C_{OSS8}\), charging \(C_{OSS6}\) and \(C_{OSS7}\), and providing energy to the load. The detailed current path is shown in Figure 8c.  
Note that after the energy stored in \(C_{OSS5}\) and \(C_{OSS8}\) has been discharged to zero, intrinsic diodes \(D_{5}\) and \(D_{8}\) conduct the current during the remainder of this state. The detailed current path is shown in Figure 8d.  
State 4 (\(t_{3}\leq t\leq t_{4}\)):  
As shown in Figure 7, switches \(S_{1}\) and \(S_{4}\) remain on. Due to the discharge of energy stored in \(C_{OSS5}\) and \(C_{OSS8}\) to zero during the dead time in the previous state, switches \(S_{5}\) and \(S_{8}\) are turned on with ZVS at \(t=t_{3}\). The detailed current path is shown in Figure 8e.  
State 5 (\(t_{4}\leq t\leq t_{5}\)):  
As shown in Figure 7, at \(t=t_{4}\), switches \(S_{5}\) and \(S_{8}\) remain on, while switches \(S_{1}\) and \(S_{4}\) are turned off. The period from \(t_{4}\) to \(t_{5}\) is the dead time of the high-voltage side switches. At this time, the high-voltage side current discharges \(C_{OSS2}\) and \(C_{OSS3}\), charging \(C_{OSS1}\) and \(C_{OSS4}\) and transferring energy to the low-voltage side to provide the load, and then flows back to \(V_{Dchus}\). The detailed current path is shown in Figure 8f.  
Note that switches \(S_{5}\) and \(S_{8}\) remain on in this state. After the energy stored in \(C_{OSS2}\) and \(C_{OSS3}\) has been discharged to zero, intrinsic diodes \(D_{2}\) and \(D_{3}\) conduct the current. The detailed current path is shown in Figure 8g.  
States 6 to 10 operate similarly to states 1 to 5, but there are some notable points as follows:  
Switches \(S_{2}\), \(S_{3}\), \(S_{5}\), and \(S_{8}\) in state 6 and state 7 operate the same way as switches \(S_{1}\), \(S_{4}\), \(S_{6}\), and \(S_{7}\) in state 1 and state 2.  
Switches S\({}_{2}\), S\({}_{3}\), S\({}_{6}\), and S\({}_{7}\) in states 7, 8, 9, and 10 operate the same way as switches \(S_{1}\), \(S_{4}\), \(S_{5}\), and \(S_{8}\) in states 2, 3, 4, and 5.  
Therefore, there will be no further explanation.