## 2 Impedance-Based Model of Multi-Converter Grid-Tied System  
### Equivalent Model of VSC  
Figure 1 illustrates the system structure of the VSC controlled in the \(dq\) frame. In Figure 1, \(V_{\text{dc}}\) is a DC voltage source. \(L_{f}\) is the filter inductance. \(L_{\text{g}}\) is the grid impedance. \(U_{\text{g}}\) is the grid voltage. \(u_{\text{pcc}}\) is the point of common coupling (PCC) voltage. \(u_{\text{pccd}}\) are the PCC voltage in the \(dq\) frame. \(\theta_{\text{pll}}\) is the output angle of the phase-locked loop (PLL). \(H_{\text{pll}}=k_{\text{pllp}}+k_{\text{pll}}/s\) is a proportional-integral (PI) controller, where \(k_{\text{pllp}}\) is the proportional coefficient and \(k_{\text{pll}}\) is the integral coefficient. \(i_{\text{o}}\) is the output current of the VSC. \(i_{\text{o,dq}}\) are the PCC current in the \(dq\) frame. \(I_{\text{dqref}}\) are the instruction reference values in the \(dq\) frame. \(I_{\text{dqref}}\) are controlled by a PI controller \(H_{\text{cl}}=k_{\text{ip}}+k_{\text{li}}/s\), where \(k_{\text{ip}}\) is the proportional coefficient and \(k_{\text{li}}\) is the integral coefficient. \(v_{\text{m,dq}}\) are the modulation signals output by current loop control in the \(dq\) frame. In this article, the frequency range considered is within 1000 Hz which is much smaller than the switching frequency of VSC. Therefore, pulse-width modulation (PWM) can be approximated as a linear element [16]. \(v_{m,dq}\) can be written as follows:  
\[v_{m,dq}=\frac{u_{\text{pccd}}-\omega_{1}L_{f}i_{q}}{K_{\text{PWM}}} \tag{1}\]  
\[v_{m,q}=\frac{\omega_{1}L_{f}i_{d}+u_{\text{pccd}}}{K_{\text{PWM}}} \tag{2}\]  
where \(K_{\text{PWM}}\) is the proportional gain of the PWM. \(\omega_{1}\) is the fundamental frequency of the power grid. The PLL is used to obtain the amplitude and phase information of the grid voltage and ensure the synchronous operation of the VSC and the power grid. When small-signal perturbations are added to the grid voltage, the system \(dq\) frame defined by the grid voltage and the controller \(dq\) frame defined by the PLL do not align with each other. Therefore, the state variables in the system \(dq\) frame and the state variables in the controller \(dq\) frame need to be unified through a coordinate transformation. The relationship between the state variables in the system \(dq\) frame, controller \(dq\) frame, and the phase difference \(\Delta\theta\) can be deduced:  
\[ \begin{cases}\Delta\gamma_{d,s}=\Delta\gamma_{d,c}-\Delta\theta\gamma_{q0,s}\\ \Delta\gamma_{q,s}=\Delta\gamma_{q,s}+\Delta\theta\gamma_{d0,s}\end{cases}  \tag{3}\]  
Figure 1: Structure diagram of VSC controlled in \(dq\) frame. where \(\gamma\) denotes the state variables such as voltage, current, and duty cycle. \(\Delta\) represents the fluctuation signals. The \(d\) and \(q\) in the subscript represent the state variables in the \(d\)-axis and \(q\)-axis, respectively. The 0 in the subscript represents the steady state of the state variables. The \(s\) and \(c\) at the end of the subscript represent the state variables in the system \(dq\) frame and the controller \(dq\) frame, respectively. Combined with the Equation (3) and the PLL model shown in Figure 1, the PLL output angle can be derived as  
\[\Delta\theta=\frac{H_{\text{Pl}}(s)}{s+H_{\text{Pl}}(s)U_{\text{pccd},s}} \Delta u_{\text{pccd},s} \tag{4}\]  
where \(U_{\text{pccd},s}\) is numerically equal to the phase voltage amplitude of the power grid. \(s\) is the Laplacian operator. Substituting Equation (4) into Equation (3), the transformation relationship between the variables in two \(dq\) frames can be represented by  
\[ \begin{bmatrix}\Delta\gamma_{d,s}\\ \Delta\gamma_{q,s}\end{bmatrix} = \begin{bmatrix}\Delta\gamma_{d,c}\\ \Delta\gamma_{q,c}\end{bmatrix} + \begin{bmatrix}0&-\frac{H_{\text{pl}}(s)^{ \gamma_{q,s}}}{s+H_{\text{pl}}(s)U_{\text{pccd},s}}\\ 0&\frac{H_{\text{pl}}(s)^{\gamma_{d,s}}}{s+H_{\text{pl}}(s)U_{\text{pccd},s}} \end{bmatrix}\begin{bmatrix}\Delta u_{\text{pccd},s}\\ \Delta u_{\text{pccd},s}\end{bmatrix}