## 3 DC Circuit Breakers
### Solid-State Circuit Breakers
#### 3.3.2 Recent Developments of SSCBs
[41], a semiconductor DC circuit breaker using SiC static induction transistor (SiC) SITs was investigated in applications for data centers at 400 V. SiC SITs have extremely low on-state resistance and a very large safe operating area. The experimental results showed that the SiC SIT's fault current decayed to 0 A within 20 \(\upmu\)s.  
The authors in the Ref. [15] experimentally demonstrated the feasibility of using 650 V GaN bidirectional devices in SSCB applications. GaN devices outperform silicon MOSFETs with regard to the on-resistance value during operation (\(Rds\)) versus the breakdown voltage, allowing a further increase in switching frequency and efficiency, and reduction in physical size. The authors reported a new bidirectional SSCB, which comprises a single 650 V, 200 m\(\Omega\) dual-gate, bidirectional, normally-on, GaN-on-Si HEMT as the static switch, and a fast-starting isolated DC/DC converter and a diode bridge as the fault detection and protection driver. When a fault occurs, the switch opens, bringing the current to zero in 0.8 \(\upmu\)s.  
In the Ref. [57], a discussion on the basic concept and general design methodology of the intelligent tri-mode SSCB (iBreaker) was provided. Commercial LVDC GaN FETs in various SSCB designs that offer m\(\Omega\)-resistance and passive cooling were presented. The SSCB ibreaker identifies and exploits a distinct pulsewidth modulation (PWM) current-limiting (PWM-CL) state in addition to conventional on and off states in a bidirectional common-inductor buck topology without needing additional semiconductor power devices. The IBreaker can operate in the \"on\" state for continuous conduction of normal load currents, or in the \"off\" state to interrupt fault currents. In addition, it can operate in the PWM-CL state with a moderate overcurrent for a short period of time to facilitate intelligent functions, such as soft startup, fault authentication, and fault location. The iBreaker switches from the PWM-CL to the off state if it deems the overcurrent condition to be a true short-circuit fault rather than a startup scenario after a short time-period. The tri-mode iBreaker quickly limits a detected overcurrent to 2-3 times of the rated nominal current within a few microseconds, and conducts a fault authentication process within a preset time window (typically a few milliseconds) while operating at a relatively low overcurrent. This significantly reduces the stress on the wiring and power semiconductor devices, and reduces the current rating and cost of semiconductor switches. In the Ref. [79], the formation of Ohmic Contacts in SSCBs was presented. Ohmic contacts are necessary since they ensure the flow of signals and power from the semiconductor to the peripherals. However, the arrangement of ohmic contacts in p-type 4 H-SiC is still a highly discussed subject, due to the intrinsic challenge of acquiring a low value of specific contact resistance in p-type WBG semiconductors. Moreover, the shortage of metals that provide a low Schottky barrier to p-type SiC and high ionization energy of the Al dopant renders the arrangement of a tunneling contact to a p-type SiC extremely troublesome. In the Ref. [80], a 4 H-SiC MOSFETs low-inversion channel mobility was reported. This 4 H-SiC MOSFETs revealed stable behavior when at room temperature, as well as for moderate stress periods. However, with rising temperature (>150 \({}^{\circ}\)C) and stress periods, a significant threshold voltage instability was found to occur [81]. In the Ref. [80], it was indicated that CBs based on GaN should ensure much better efficiency with respect to CBs based on SiC because of its higher critical electric field and greater electron mobility. However, GaN also suffers from many manufacturing problems concerning the more advanced SiC technology, such as the insufficiency of high-quality freestanding substrates, which prohibits the advancement of vertical structures in the internal design of transistors [79; 82].