# Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology
## 3 Stochastic-Based Logic Block (SLB)
### Detailed Circuit Design of SLB  
Figure 6 depicts one possible circuit architecture of stochastic-based logic block (SLB). Specifically, each MTJ device implements an exponential Random variable, whose random samples will subject to simple AND or OR logic operations with CMOS gates. In general, the number of required Taylor terms equals to the the number of needed STT devices, with specific Taylor coefficients are configured with setting different \(V_{\text{i}}\). As shown in Figure 6b, each Stochastic-Based Lookup Table (SLB) exploits multiple streams of carefully controlled random bits, instead of deterministic Boolean algebra used in a conventional FPGA technology to accomplish reconfigurable logic operations. As depicted in Figure 6, the key element of a typical \(N\)-input STL circuit consists of \(N\) controllable random sample generators, each of which corresponds to one logic input. Each random bit generator is implemented with two MTJ devices, where one MTJ device emits random bits with certain probability determined by the other MTJ device. The detailed circuit design of each random sample generator is also shown in Figure 6c. Note that our design of a reconfigurable random sample generator contains two MTJ devices and their detailed operations are discussed in Subsection 3.2. Subsequently, all these \(N\) streams  
Figure 5: Circuit design of random bit stream generation. (**a**) Configuration mode; (**b**) Operation mode. Devices in gray area are active for each mode. Red curves depict signal directions. of random bits will be aggregated with simple analog circuits and fed into a simple capacitive voltage integrator. The final logic output value will be computed by comparing the integrated value with a predetermined voltage reference \(V_{\text{ref}}=T\). Given the circuit design of our stochastic-based logic block (SLB), we can perform the detailed mixed-mode HSPICE circuit simulation using the model of MTJ devices in Cadence from [21]. The specific device parameters include: \(I_{\text{d0}}=0.1\) nA, \(n=2\), the critical current \(I_{\text{c0s}}=50\)\(\mu\)A, the characteristic resistance \(R_{\text{P}}=1\) K\(\Omega\), \(R_{\text{AP}}=2\) K\(\Omega\), \(E/k_{\text{B}}T=60\), the relaxation time \(t_{\text{relax}}=50\) ps, and the attempt time \(t=1\) ns. To illustrate, in Figure 7, we plotted the HSPICE simulations results from a STL circuit that implements \(F=A+BC\). The first four subfigures, Figure 7a-d present the random signals generated from four constant coefficients \(c_{0}\), \(c_{1}\), \(c_{2}\), and \(c_{3}\). Similarly, three additional random sample streams, Figure 7e-g, represent the three power terms. The aggregated and integrated random signals are plotted in Figure 7h. Finally, after thresholding, the resulting logic outputs are presented in the Figure 7i. Note that each of these nine subfigures comprises of eight input epochs and all logic values corresponding to these input epochs are printed in green squares. Two circuit blocks are essential: log-amplifier block and analog-to-stochastic converter block. The log-amplifier naturally fits an input current into the exponential form of the Taylor series, so that the input analog current \(I_{in}\) and the output voltage \(V_{\text{out}}\) satisfy \(V_{\text{out}}=-m\times V_{T}\times\ln(\frac{I_{\text{B}}}{I_{\text{s}}})\), where \(m\) is correction factor, \(I_{\text{s}}\) is the theoretical reverse-saturation current, and \(V_{T}\) is the temperature equivalent voltage. In the stochastic converter block, when the logarithmic voltage is applied to a MTJ device, the resulting current for controlling stochastic switching follows \(I_{\text{w}}=\frac{V_{\text{dd}}-V_{\text{bias}}}{R_{\text{MTJ}}}-\frac{m \times k_{\text{B}}\times T\times\ln(I_{\text{w}}/I_{\text{s}})}{q\times R_{ \text{MTJ}}}\). Therefore, \(\ln(\overline{P_{\text{w}}})=\beta\ln(\frac{I_{\text{bn}}}{I_{\text{s}}})+ \alpha(I_{\text{c0s}}-\frac{V_{\text{dd}}-V_{\text{bias}}}{R_{\text{MTJ}}})\), where \(\beta=am\frac{k_{\text{B}}T}{R_{\text{MTJ}}}\).