# Decision Optimization for Power Grid Operating Conditions with High- and Low-Voltage Parallel Loops
## 4 Evaluation for Parallel Loop Opening Schemes  
### Comprehensive Evaluation Model  
There are many factors that should be considered to evaluate the candidate parallel loop opening schemes. The most principal one is the contradictory relationship between system stability and short-circuit current. In this paper, a comprehensive evaluation model is established based on AHP, which can reflect all of the principal factors. The model is shown in Figure 2.  
The details of this evaluation model are discussed below:  
1. Static security  
Static security should be analyzed with the premise that the system is transferred from a steady state before the fault to another steady state after the fault immediately. The transient process during the fault is not considered. Static security is used to examine whether the operation constraints are satisfied after faults. Operation statuses of key components after specified faults, including line overload, transformer overload and bus voltage limit violation, can be used to evaluate the static security. Thus, two indicators are defined, which are shown below:  
Indicator \(C_{11}\): over load indicator of line or transformer. \[C_{11}=\sum_{m\in\gamma}\ (\sum_{l\in\alpha}\omega_{\text{P},l}(\frac{S_{l}}{S_{l }^{\text{max}}})^{2n})_{m}, \tag{13}\]  
where \(\gamma\) is the set of specified faults; \(\alpha\) is the set of key transmission lines and transformers; \(\omega_{\text{P},l}\) is the weighted factor; \(S_{l}\) is the power flow of branch \(l\); \(S_{l}^{\text{max}}\) is the upper limit of power flow of branch \(l\); and \(n\) is a positive integer. Indicator \(C_{12}\): bus voltage limit violation indicator. \[C_{12}=\sum_{m\in\gamma}\ (\sum_{i\in\beta}\omega_{\text{U},i}(\frac{U_{i}-U_{i }^{\text{sp}}}{\Delta U_{i}^{\text{lin}}})^{2n})_{m}, \tag{14}\]  
\[U_{i}^{\text{sp}}=\frac{U_{i}^{\text{max}}+U_{i}^{\text{min}}}{2}, \tag{15}\]  
\[\Delta U_{i}^{\text{lim}}=\frac{U_{i}^{\text{max}}-U_{i}^{\text{min}}}{2}, \tag{16}\]  
Figure 2: Comprehensive evaluation model for candidate opening schemes. where \(\gamma\) is the set of specified faults; \(\beta\) is the set of buses; \(\omega_{\text{U},i}\) is the weighted factor; \(U_{i}\) is voltage of bus \(i\); \(U_{i}^{\text{max}}\) and \(U_{i}^{\text{min}}\) are the upper and lower limits of voltage of bus \(i\); and \(n\) is a positive integer. 2. Transient stability  
Transient stability considers the ability of a system to remain stable during the transient process from a steady state before the fault to another steady state after the fault. The transient stability of a power system is composed of voltage stability and power angle stability. Voltage stability is mainly determined by load distribution and load characteristics, which can be measured by transient voltage safety margin. Power angle stability is used to evaluate the interaction between generators with long electrical distance, which can be represented by transient angle deviation. These two indicators are defined as below:  
Indicator \(C_{21}\): transient voltage safety margin indicator. \[C_{21}=\sum_{m\in\gamma}\;(\sum_{k\in\eta}\omega_{\text{TV},k}\varepsilon_{k} )_{m}, \tag{17}\]  
where \(\gamma\) is the set of specified faults; \(\eta\) is the set of voltage curves of monitored buses; \(\omega_{\text{TV},k}\) is the weighted factor; and \(\varepsilon_{k}\) is the transient voltage dip acceptable margin of bus voltage curve \(k\). Indicator \(C_{22}\): transient angle deviation indicator. \[C_{22}=\sum_{m\in\gamma}\omega_{\text{\tiny\@slowup},m}(\text{max}|\theta_{i} -\theta_{j}|)_{m}, \tag{18}\]  
where \(\gamma\) is the set of specified faults; \(\omega_{\text{\tiny\@slowup},m}\) is the weighted factor; \(\theta_{i}\) and \(\theta_{j}\) are the power angles of two generators in the transient process of a specified fault, respectively. 3. Short circuit current should be limited to not exceed the interrupting capacity of electrical equipment, such as circuit breakers. It can be represented by short circuit current limit violation.