## 2 Non-Integer Oversampling Receiver Architecture in the Frequency Domain  
The proposed coherent signal processing structure is shown in Figure 1. Four analog-to-digital converters (ADC) convert the analog output of the coherent receiver's front-end to the digital domain. The four signals correspond to in-phase and quadrature components of x- and y-polarization. These four channels are converted to the frequency domain by a discrete Fourier transform (DFT). For a reliable timing recovery, we apply the following synchronization algorithms beforehand: chromatic dispersion compensation, coarse polarization alignment, coarse carrier frequency offset correction [9], and matched filtering. Then, the timing recovery operates in a feedback loop. The timing recovery consists of the modified Godard estimator and the timing correction block. The timing correction block performs a frequency domain resampling of the signal. After the timing correction, the signal can be downsampled to one sample per symbol. Then an inverse discrete Fourier transform (IDFT) converts the signal back to the time domain. A 2\(\times\)2 equalizer equalizes the signal and does fine polarization demultiplexing. The carrier recovery corrects the frequency and phase offsets of the signal. Finally, demapping converts the complex symbols back to binary information. The advantage of frequency domain processing for the timing correction becomes clear when looking at the mathematical operations required for resampling. While resampling in the time domain requires a convolution with a sinc-function, frequency domain processing is much simpler. Here, a time shift corresponds to applying a linearly increasing phase shift as a function of frequency. The phase slope describes the strength of the timing shift. This is explained by Equation (1). \[\mathcal{F}(y(t-t_{0}))(f)=\mathcal{F}(y(t))(f)\cdot\exp(-\mathrm{j}2\pi ft_{0}) \tag{1}\]  
Here, \(\mathcal{F}(y(t))(f)\equiv\widetilde{y}(f)\) is the Fourier transform of the time domain signal \(y(t)\), and \(t_{0}\) is the time shift. The implementation complexity of Equation (1) is influenced by two aspects. First, a variable digital filter is needed to handle the varying time shift. Second, downsampling to one sample per symbol is needed for the final symbol decision. When performing the timing recovery in the time domain, an efficient implementation for the variable digital filter is the Farrow structure [10]. Here, a change in \(t_{0}\) results in an update of only one scalar value, whereas in the general case, all finite impulse response (FIR) filter coefficients have to be adapted with respect to the time shift. The filter coefficients could be determined with the Lagrange interpolation, however this brings in some band limitation [11]. Additionally, when the conversion factor for the downsampling to one sample per symbol is a ratio of very large integers, fractional delay filters become difficult to implement and computationally expensive [12]. The increased complexity results out of the higher amount of filter coefficients that are needed to sustain a desired performance. However, in the frequency domain, oversampling factors consisting of large integers can be efficiently handled by adapting the ratio of DFT to IDFT size. The delay with a certain time shift is done by manipulating the phase according to Equation (1). Figure 1: Overview of the receiver signal processing chain with the timing synchronization in the frequency domain. Four analog-to-digital converters (ADC) sample the analog input. A discrete Fourier transform (DFT) converts the signal to the frequency domain. Subsequently, the synchronization blocks for chromatic dispersion (CD) compensation, coarse (crs) polarization alignment, coarse carrier frequency offset (CFO) synchronization, and matched filtering are applied. Then, the timing synchronization feedback loop estimates and corrects the sampling phase offset. An inverse discrete Fourier transform (IDFT) converts the signal back to the time domain.