## 4 Conclusions  
This paper proposes a chip grading method based on weighted failure rates within an effective space, which improves the accuracy in chip grading, reduces testing time and costs, and provides a suitable, economical way to grade chips in the semiconductor industry. By introducing failure rates within a dynamically effective space and combining weighted failure rates with the exponential decay functions, the proposed method enhances the accuracy of evaluating chip performance and reliability, making it a novel solution for the semiconductor domain. Dynamically adjusting the evaluation space and filling in missing data parts could enhance grading accuracy, especially for chips on the edge. The proposed method is characterized by its capability to adapt to varying testing ambient conditions and diverse performance criteria for chips, thus making it suitable for the production of high-density and high-performance chips. Future research can introduce more environmental variables, chip characteristics, and multidimensional data to increase the accuracy and applicability of the evaluation. Furthermore, adding advanced machine learning and artificial intelligence algorithms can increase the degree of intelligence and automation in chip grading, increasing grading accuracy and efficiency. Conceptualization, W.Z. and Q.Z. ; Methodology, W.Z. ; Software, J.Z. ; Validation, X.C. ; Formal analysis, W.Z. ; Writing--original draft, Y.Z. ; Writing--review & editing, W.Z. ; Supervision, X.W. All authors have read and agreed to the published version of the manuscript. This work was funded by the National Natural Science Foundation of China (62474002), the National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology (KFJJ20230101), the State Key Laboratory of Integrated Chipls and Systems (SKLICS-K202316) and the Natural Science Research Project of Anhui Educational Committee (2023 AH050500, 2023 AH050581). Not applicable. Not applicable  
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