# Micro-LEDs, a Manufacturing Perspective
## 5 Current Challenges and Prospects  
Despite the above-discussed technological advancements, there are still some remaining critical bottlenecks which need to be overcome for high volume manufacturing of micro-LED displays. The major one is the pixel yield of the display. To control the dead pixel number less than 5 in an RGB full-color full high definition (FHD) display (1920 \(\times\) 1080 pixels), the yield should be 99.9999%, which is too high for today's achievable level. A dead pixel can appear at different stages of the fabrication, such as epitaxy, LED chip process, transfer process. For example, in the case of monolithic fabrication, in a passive-matrix micro-LED array fabricated by flip-chip bonding of a GaN micro-LED array on a silicon submount with common p-electrode stripes, numerous dead pixels are formed because of physical disconnection from the p-electrode line caused by severe bonding failures [67]. As another example, the photoresist residue inside the gaps between the LED elements can greatly undermine the yield of the display [29]. Without adding an O\({}_{2}\)-based plasma ashing step, for the arrays with 170 \(\upmu\)m gaps between mesas, the micro-LED element yield in the array is approximately 90%. However, when the gap width is reduced to 6 \(\upmu\)m, the yield drops to around 67%. Introduction of the ashing step to  
Figure 7: Process flow of a full-color microdisplay. (**a**) The structure of the micro-LED arrays. (**b**) Aligning the mold to the UV micro-LED array. (**c–e**) Consequently jetting the RGB QDs inside the mold window to form the full-color pixels. Reprinted from reference [64], with the permission of Chinese Laser Press. remove the photoresist residues improved the yield to 100% and over 95% for the 170 \(\upmu\)m and 6 \(\upmu\)m gap arrays, respectively. Another challenge is the defect management and repair technology. For a zero dead defect display, even assuming an extremely high yield, a repair process is unavoidable. A straightforward solution is to increase the redundancy by doubling the number of micro-LED element for each pixel. However, the effectiveness of the built-in redundancy depends on the initial defectivity yield. If the yield is 99.99%, doubling the number of micro-LED can reduce the number of dead pixels from 5000 to five pixels in an FHD display. However, if the yield is only 99.9%, the number of dead pixels would be still 500 [68]. Since doubled, number-wise, micro-LEDs are used, the cost of the display would be greatly increased. Alternatively, some developers have proposed individual pixel repair technologies. Unfortunately, this approach is also costly, and cannot be applied for displays produced by monolithic fabrication. The cost remains to be a formidable obstacle. The success of micro-LED display insertion hinges on its cost competitiveness against the competing technologies such as the conventional LCD/OLED displays, but at the time of this writing cost competiveness is not yet realistic. The cost of micro-LED displays naturally encompasses wafer and chip processing cost, repair cost, post-processing cost, and transfer cost in the case of pick-and-place approach [69]. Figure 8 shows the calculated LED and mass transfer cost versus micro-LED size for a 5.8\" 2560 \(\times\) 1440 resolution quad high definition (QHD) smartphone display and 3840 \(\times\) 2160 resolution 4K TV display by IHS Research and Veeco [21]. Based on the assumption of $400 per 6\" processed epitaxy wafer and a LED gap of 2 \(\upmu\)m, a size of 3 \(\upmu\)m \(\times\) 3 \(\upmu\)m and 9 \(\upmu\)m \(\times\) 9 \(\upmu\)m is needed for smartphone and TV, respectively, to meet the competitive cost targets with OLED. Continual technology advancements can be expected to provide the pathways to realize the cost expectation, but more time is needed to be in a position for us to select which of the strategies touched upon in this paper would get the technology of choice where it needs to be.