## 5 Proposed Quadrature Bandpass Continuous-Time Delta-Sigma ADC
### Quadrature Bandpass Continuous-Time Delta-Sigma ADC Circuit Design
#### 5.2.2 Active-RC Integrator with Proposed OTA  
Continuous-time loop filters can be implemented using either active-RC or Gm-C integrators, as shown in Figure 10a,b, each with distinct characteristics and trade-offs. For the proposed QBP-CT\(\Delta\)M, active-RC integrators are the preferred implementation approach, as they deliver enhanced linearity at comparable power consumption levels and can handle larger signal swings compared to Gm-C integrators. Additionally, operational transconductance amplifiers (OTAs) create more stable virtual grounds through closed-loop operation, independent of input conditions. While Gm-C integrators excel in terms of power efficiency and can achieve higher operational speeds, active-RC integrators are the more suitable choice for high-speed CTDSM due to their higher maximum stable input amplitude. A two-stage amplifier can provide a higher overall gain compared to a single-stage amplifier. This is crucial for active-RC integrators, as it enhances accuracy and linearity in the integration process. However, two-stage amplifiers often employ Miller compensation to stabilize the circuit and prevent oscillations. Miller compensation typically requires a  
Figure 10: (a) Active-RC and (b) Gm-C integrators and (c) transconductance amplifier (OTA). Figure 9: FBDAC bias circuit. larger compensation capacitor, leading to increased power consumption because more power is needed to charge and discharge the larger capacitor. To address this, a fully differential OTA without Miller compensation is employed in this work, as shown in Figure 10c. The OTA utilizes conventional differential difference amplifier-based common-mode feedback (CMFB). During DC operation, the boosting capacitors (C\({}_{\text{B}}\)) act as open circuits, while the bias resistors (R\({}_{\text{B}}\)) and common-mode feedback (CMFB) circuit establish proper biasing conditions for the fully differential amplifier. In AC operation, the boosting capacitors C\({}_{\text{B}}\) cause the load transistors of the first stage to operate as diode-connected loads at high frequencies. This diode-connected operation reduces the output impedance of the first stage, pushing its pole frequency higher than the second stage's output pole frequency. With the first-stage pole at a higher frequency than the second-stage pole, Miller compensation becomes unnecessary. Moreover, the input signals are uniquely connected to the second stage through AC coupling capacitors C\({}_{\text{AC}}\). This configuration enables higher gain by bypassing the first stage's gain limitations. Additionally, the cross-coupled structure in the second stage further enhances the overall gain of the amplifier. It achieves a unity-gain BW of 200 MHz and a noise level of \(<\)30 nV/\(\surd\)Hz while consuming 70 \(\upmu\)W.  
RC calibration of the active-RC integrator plays a crucial role in the QBP-CT\(\Sigma\Delta\)M, as it determines the frequency characteristics of the overall signal through resistance and capacitance values [30]. These values are significantly affected by PVT variations. Both integrator transconductance [31] and capacitance tuning were commonly implemented [32] in gm-C integrators. To compensate for variations in an active-RC integrator, the system employs an active-RC oscillator that integrates resistors, capacitors, and operational transconductance amplifiers (OTAs) in a straightforward switching configuration. The calibration process relies on an external reference frequency of 32 MHz (f\({}_{\text{REF}}\)), which remains relatively stable under PVT variations. The calibration methodology operates by comparing the ratio of reference clock cycles (N) to internal oscillator cycles (K), expressed mathematically as Equation (3). \[\frac{\text{f}_{\text{REF}}}{\text{N}}=\frac{\text{f}_{\text{GSC}}}{\text{K}} \tag{3}\]  
To ensure accurate detection of capacitor variations, the system requires that N must be greater than or equal to 1, specifically to detect changes in capacitor LSB value corresponding to 2% capacitive variation, following Equation (4).