# A Ku-Band Fully Differential Low-Power High-Input TdB Low-Noise Amplifier
## 1 Introduction  
In modern society, there is an increasing demand for advanced wireless communication for the rapid delivery of large amounts of data. In this respect, 5G communication using the FR2 band has an advantage in data transmission speed because the carrier frequency and bandwidth are higher than the FR1 band and other communication methods. However, the 5G FR2 band has low cell coverage due to its high attenuation characteristics. These characteristics act as an economic burden for the establishment of communication infrastructure such as base stations and repeaters, challenging commercialization. Therefore, in 5G-Advanced and 6G, the FR3 band is expected to emerge as a realistic candidate for near-future deployment. Compared to the FR2 band, the FR3 band has an appropriate transmission speed, relatively good attenuation characteristics, and improved cell coverage [1; 2; 3]. Factors such as low cost, low power consumption, integration capability, and mass production are required to build a wireless infrastructure covering a large area [4]. CMOS technology is recognized as a core technology that can be used to produce RFICs for wireless communication [5]. In this paper, we introduce a low-noise amplifier (LNA) design that operates in the Ku-band within the FR3 band using bulk CMOS technology. The signal received by the antenna is amplified by the first gain stage, the low-noise amplifier, with a minimal increase in the noise figure. In state-of-the-art communication systems, a base station transmits significant power-level signals, taking into account dense urban area and high-frequency attenuation characteristics [6]. As a result, an LNA with a low input P1 dB is prone to saturation. Consequently, enhancing techniques for input P1 dB are required when dealing with signals with such large dynamic ranges. This allows for the prevention of signal distortion, thereby expanding the linear operating range of the LNA. Additionally, low power consumption is also essential. However, the previously designed LNA includes a single-ended stage, which shows limitations when handling high dynamicrange signals and is vulnerable to common-mode noise [7; 8; 9; 10; 11; 12]. Therefore, we aim to introduce a fully differential LNA structure that enhances stability against common-mode noise and improves the input P1 dB [13]. The differential structure effectively leverages the increased total width of the transistor compared to the single-ended structure, which is advantageous for power handling. Moreover, they exhibit better ground plane quality, lower parasitic effects of chip interconnections, and easier coupling between stages [14]. The proposed two-stage low-noise amplifier is a fully differential common-source (CS) structure with a gain of 19.92 dB. A large transistor technique was employed to secure a low noise figure. A large transistor is implemented by connecting multi-finger transistors in parallel [15]. At the same time, capacitive neutralization utilizing the advantages of differential structures was applied. This method ensures sufficient gain while maintaining stability. Along with this, class AB bias is applied to the output stage, allowing for sufficient P1 dB and low-power characteristics simultaneously. The remainder of this article is organized as follows: Section 2 covers the detailed circuit design of the proposed LNA. Section 3 presents the measurement results and a comparative analysis of performance with the latest LNAs. Lastly, Section 4 concludes this paper by summarizing the key findings and contributions of this research.