## 6 Analysis Considering Hardware Counters  
We have performed several measurements and extended the paper with results of those and corresponding comments that include measurements of both:  
1. Hardware counters referring to the CPU side measured with the perf tool. Selected metrics: 1. Cache misses--how often data in cache were unavailable or out of date (prefetch requests included); 2. Context switches--number of CPU context switches from one process or task to another; 3. Instructions--average number of instructions executed for each clock cycle; 4. Task clock--CPU utilization during program execution. 2. Communication performance. For this test, we included results of the MPI communication benchmark measuring point to point performance with contention, i.e., communicating pairs of processes ([[https://www.mcs.anl.gov/research/projects/mpi/tutorial/mpiexmpl/src3/pingpong/C/mass/main.html](https://www.mcs.anl.gov/research/projects/mpi/tutorial/mpiexmpl/src3/pingpong/C/mass/main.html)]([https://www.mcs.anl.gov/research/projects/mpi/tutorial/mpiexmpl/src3/pingpong/C/mass/main.html](https://www.mcs.anl.gov/research/projects/mpi/tutorial/mpiexmpl/src3/pingpong/C/mass/main.html)), accessed on 22 July 2022) which we believe very much corresponds to our cases since in SPMD code pairs of processes of neighboring subdomains exchange data in parallel in respective dimensions, in divide-and-conquer pairs of processes exchange data in successive steps of the divide-and-conquer tree (various numbers at various levels) and in master-slave, we deal with master-slave exchanges (one at a time but MPI can buffer messages from many slaves). For the hardware counters, we see interesting results with various metrics better either for the Docker or host cases, for the selected compilation flags. For DAC results presented in Figure 15, cache misses and context switches are larger for host, task clock is slightly higher or same for Docker, while instructions per cycle same or larger for host. For the master-slave application and slave (i.e., performing majority of computations), the results shown in Figure 16 cache misses are same for 128 processes, but larger for host up to 64 processes, context switches larger for host, instructions per cycle larger for host for 32-128 processes and task clock slightly lower for host for 32-128 processes. For SPMD results presented in Figure 17, cache misses are very similar, marginally better for Docker, context switches larger for host, instructions per cycle are larger for host for 64-128 processes, task clock very similar for both cases. In general, we can conclude that instructions per cycle are higher for host for larger numbers of processes, while cache misses and context switches either similar or larger for host. For the communication tests in Figure 18, we present results for various numbers of processes, from 1 to 128 (without oversubscription) for selected data sizes which correspond to our tested applications. Specifically for master-slave and divide-and-conquer--processes exchange data corresponding to start and end of range to be integrated or result--1-2 doubles; for geometric SPMD--processes exchange data of 2D walls with direct neighbors processing neighboring subdomains. In this case, for instance, for 64 processes and domain of 200 \(\times\) 400 \(\times\) 600 message sizes are 120-160 KB while for 128 processes and the same domain size message sizes will be 60-120 KB. It should be noted that for the same domain size and a smaller number of processes, sizes of messages will increase and will be, e.g., 640-960 KB for four processes. Following these values, we present measured bandwidths for the following data sizes: 16 B, 16 KB, 32 KB, 64 KB, 128 KB and 1 MB. We have noted in the measurements that for messages of size smaller than 16-64 KB measured host bandwidths are higher but then for larger message sizes and specifically smaller number of processes Docker configurations exhibit slightly better values, apparently due to internal mechanisms.