# Highly Linear Loaded-Line Phase Shifter Utilizing Impedance Transformer and PIN Diode
## 2 Distortion in PIN Diodes  
PIN diodes introduce distortion in both their ON and OFF states, with noticeably worse linearity in the OFF state. Particular emphasis is placed on improving the OFF-state linearity of the PIN diodes, which typically governs the overall IIP3 performance due to their inherently lower linearity [3, 22, 23, 24, 25, 26, 27, 28]. Digital phase shifters employing PIN diodes as switching elements can be implemented using various topologies, including switched-line, reflective, and loaded-line techniques. Phase shifting is achieved by toggling the states of the PIN diodes. Several studies have examined the factors affecting the linearity of PIN diode-based RF switches. In [2, 9], it was demonstrated that the switch topology--illustrated in Figure 1--is a critical factor influencing linearity performance. It is worth noting that in the parallel topology (Figure 1b), the OFF state is achieved by turning the PIN diode ON, thereby presenting a low-impedance shunt path to ground that reflects the incoming signal, effectively blocking transmission to the output. The comparative analysis in [2, 9] showed that in the parallel topology, the IIP3 in the OFF state was significantly higher than in the series topology, indicating better linearity. However, the main drawback of the parallel topology is its poor isolation, as it does not effectively block signals in the OFF state. This limitation makes it less suitable for applications requiring high isolation. Nonetheless, in a loaded-line phase shifter, the switching element does not need to fully block the signal. Instead, it is used to connect or disconnect an impedance element from the main transmission line. Therefore, the parallel topology becomes a practical choice for loaded-line architectures, where the switch only needs to insert or remove a segment without affecting signal loss, while still enabling the desired phase shift.  
Figure 1: Two configurations of PIN diode switches: (**a**) series to the ground and (**b**) parallel to the ground.  
In [3; 19; 21], the impact of the impedance seen by the PIN diode on its linearity was examined in detail. The studies revealed that the IIP3 in the ON state increases with higher impedance, whereas the IIP3 in the OFF state decreases. Conversely, lowering the impedance leads to a reduction in IIP3 (ON) but an improvement in IIP3 (OFF). Although 50 \(\Omega\) is commonly used as the characteristic impedance (\(Z_{0}\)), these findings suggest a potential strategy for enhancing the linearity of PIN diodes in the OFF state by deliberately reducing the impedance they see. By doing so, the IIP3 (OFF)--often the limiting factor in overall phase shifter linearity--can be significantly improved, even if it comes at the expense of a slightly lower IIP3 (ON). This trade-off ultimately benefits the total linearity performance of the phase shifter [3; 19; 21]. This impedance optimization inevitably involves a trade-off: reducing the impedance improves the OFF-state IIP3 by minimizing voltage swings, while slightly reducing ON-state IIP3 by limiting RF current. Since the ON-state linearity is intrinsically better, this trade-off is acceptable and ensures the overall phase shifter performance is governed by an improved, higher OFF-state IIP3, as detailed in [3; 19].  
The combination of a parallel-loaded-line phase shifter with a coupler-based impedance transformer directly mitigates nonlinear distortion leakage--a key challenge in shared Tx/Rx phased array systems--by reducing voltage swings across the PIN diodes.