## 3 Discussion  
In this paper we have primarily addressed the performance of the micro-transceiver in high-temperature environments, including, in particular, the channel speed, total throughput and low power consumption, where increasing the data rate per channel reduces the power consumption per bit of optical interconnect. It should be noted that the micro-transceiver is particularly very well suited to integration in board-mountable and co-packaged optical modules, which are currently of great importance to hyperscale data centers, and this has been reported by [PERSON] et al. [3].  
In addition to these important performance metrics, we also focused on the required operating conditions. Here, in particular, there is a need for high-temperature operation combined with high reliability which exceeds that of pluggable components by an order of magnitude and enables a substantially lower cost solution than conventional single-mode silicon photonic devices. In order to meet these requirements, we have proposed a silicon photonic micro-transceiver with a multimode interface. Stable operation, without the need for temperature control systems, is possible at temperatures up to 105 \({}^{\circ}\)C. Furthermore, the introduction of a redundant laser circuit ensures over an order of magnitude higher reliability than a system with a non-redundant laser circuit. Thus, the reported micro-transceiver meets two of the key requirements outlined above.  
To achieve the all-important low cost point, we need to consider both the device and mounting/assembly costs. On the device side, a reduction in the chip size is crucial as it enables a lower cost than conventional devices. This is of particular importance for high-volume applications such as optical interconnects, where small cost differences will quickly scale. On the packaging side, we can achieve low-cost assembly through the use of a multimode interface, which eliminates the high costs associated with high-precision single-mode fiber-to-chip assembly of conventional silicon photonics transceivers. The final important factor affecting the device cost is the fabrication and assembly yield. We have presented a micro-transceiver with very robust processing and assembly schemes, enabling the requisite high yield.  
Although it is possible to implement Tbps with more channels in a single micro-transceiver chip by applying this technology, we are actively working towards transceivers with aggregate data rates above 1 Tbps whereby multiple \"standard\" four-channel micro-transceivers are mounted into different module form factors. Since the four-channel micro-transceiver chip size is small, many chips can be incorporated into standard module packages, allowing bandwidths to be scaled. This allows modules with n x four-channel micro-transceiver building blocks to address a wide diversity of applications beyond 5G and 6G, where n can be anything from '1' (e.g., for internal optical communication in automotive applications) to '64' (and beyond) for co-packaged optical ASICs in hyperscale data centers.  
The development of 128 Gbps (4 \(\times\) 32 Gbps/ch) transceivers with the same configuration as the 4 \(\times\) 25 Gbps/ch transceivers reported in this paper is planned to be completed before 2022, and the development of 50 Gbps NRZ/ch 200 Gbps chips and 2.4 Tbps modules is in progress.  
In the future, optimization of the optical wiring system in housing will become an important consideration in the realization of micro-transceivers. Here, we anticipate the use of multimode optical wiring because of its ease of connection, low cost and increased reliability, but the transmission medium and optical connector present areas of further research and development.