# A Resource Constrained Neural Network for the Design of Embedded Human Posture Recognition Systems
###### Abstract
On the other hand, pressure sensors not only allow the design of much more compact systems which can be embedded in specific supports like chairs and beds, but they are also able to capture small body deformations more accurately than cameras [23]. Indeed, for the study of the posture of the human body on a mattress, a pressure pad between body and mattress is often used whose data is analyzed in different ways [17; 24] to prevent the formation of bedscores in long-term patients. The same approach [25] can be used in the case of the sitting posture since contact pressure is the only way to support body weight and influence posture and comfort [26]. However, recent works have demonstrated that the accuracy of such HPR systems strongly depends on the careful distribution of the sensors in specific key-points of the chair, bed or any other kind of support equipped with the system, in order to acquire data from as many body parts as possible and avoid an excessive number of sensors [27]. Therefore, the reliability of pressure-based HPR systems appears much too dependent on the shapes of the specific supports. Moreover, despite of the reduced number of sensors, the overall extension of the system is not negligible, considering the processing unit and the connections between this and the sensors. On the other hand, other solutions exhibit a computational load scarcely compatible with embedded systems with autonomous power supplies [3; 4; 5]. In this paper, a custom HW design of a tiny Fully Convolutional Network (FCN) is presented to implement a HPR system, which better combines high recognition accuracy and low-energy and low-area requirements with respect to the existent literature, in order to extend the application range. Indeed, the FCN achieves state-of-the-art recognition accuracy both for laying and sitting postures, by exploiting only pressure sensors grouped in a small area close to the FCN, according to the edge-computing paradigm [28; 29], without any particular distribution strategy. The FCN implements an end-to-end classification by exploiting a base-2 quantization scheme for weights and binarized activations [30; 31] to meet the optimal trade-off between high recognition accuracy, the number of mapped physical resources and low power consumption [32; 33]. The FCN achieves an average accuracy of 96.77% and 98.88% to classify laying and sitting postures, respectively. The main advantages of the proposed system over the existent literature can be summarized in the following points:  
* the capability of the FCN to achieve high recognition accuracy by monitoring only the footprint of the human body in a limited space region covered by a reduced number of pressure sensors. * Any sensor placement strategy is unnecessary, namely the system reliability is not dependent on the specific support. * FCN can be easily reconfigured to different applications. Case studies are presented on laying and sitting postures recognition. * FCN provides end-to-end classification by using a quantization scheme that overcomes binarized and ternary counterparts in terms of accuracy and meets the optimal trade-off between accuracy and employed physical resources for HW implementation. Implemented on a small Xilinx Artix 7 FPGA, FCN dissipates 10.40 mW dynamic power and achieves a maximum operation frequency of 26.6 MHz, corresponding to sensors with Output Data Rate (ODR) of 9.13 kHz, when used for laying posture recognition. When used for sitting posture recognition, the FCN is reconfigured to use less physical resources and achieves 6.88 mW dynamic power dissipation and a maximum operation frequency of 47.64 MHz, compatible with a sensor Output Data Rate (ODR) of 16.50 kHz, which is very important for critical applications requiring a continuous monitoring and a real-time action in an emergency. In order to explore the possibility to embed the proposed accelerator for in-sensor circuitry, analysis with a conservative TSMC LP-HVT CMOS 130 nm technology has been done, which is compatible with that of the glue logic in modern MEMS.