## 3 Circuit Design  
### Transimpedance Amplifier  
As shown in Figure 2, a single-ended shunt-shunt feedback TIA architecture with emitter degeneration followed by a cascode configuration was designed. The feedback resistor \(R_{F}\) provides a good trade-off between the low noise and wideband characteristics of the TIA [18]. It is necessary to insert cascode Q\({}_{2}\) for better isolation and to avoid excessive collector-emitter voltage, followed by an emitter follower Q\({}_{3}\) for the sake of driving the next stage. Considering that the input voltage of TIA is around 1 V, a level-shift circuit is needed in the feedback loop. Therefore, a diode-connected bipolar transistor, Q\({}_{4}\), is inserted into the feedback loop in series for level shifting, which saves the power by avoiding the introduction of an additional emitter follower stage for level shifting. Considering the ISI and harmonic distortion due to bad linearity, a tantalum nitride resistor with good linearity was chosen as \(R_{F}\) to avoid the degradation of deterministic jitter. An ideal TIA must satisfy the requirements of low noise, high gain, relatively wide bandwidth, and small deterministic jitter. Hence, there is an inevitable trade-off [19] among them, and a circuit model is helpful to optimize the TIA. Considering the time constants of the nodes in the TIA feedback loop, the input pole (NODE0) of the TIA and the output pole (NODE1) of common emitter (CE) stage Q\({}_{1}\) with emitter degeneration dominate the bode plot of the TIA feedback system. Meanwhile, the capacitance at the input node of the optical receiver has the largest value among all the nodes, which provides the largest time constant and leads to the dominant pole. Thus, the small-signal equivalent circuit of the input TIA can be simplified into a second-order system, which is shown in Figure 3.  
Figure 2: Schematic of the input transimpedance amplifier (TIA) stage. The transfer function of the simplified small-signal equivalent circuit is derived as  
\[\frac{v_{out}}{i_{in}}=\frac{\frac{g_{m}R_{L}}{(1+g_{m}R_{E})C_{T}R_{L}C_{L}}}{s^{ 2}+\frac{R_{F}C_{T}+R_{L}C_{L}}{R_{F}C_{T}R_{L}C_{L}}s+\frac{R_{F}C_{T}+R_{L}C_{L }}{(1+g_{m}R_{E})R_{F}C_{T}R_{L}C_{L}}}, \tag{1}\]  
where \(C_{T}\) denotes the total input capacitance and \(g_{m}\) denotes the transconductance of Q\({}_{1}\). \(C_{T}\) consists of \(C_{EX}\) (the capacitance of the pad, the photodiode) and \(C_{b}\) (the input capacitance of Q\({}_{1}\)). Derived from Equation (1), the damping factor \(\xi\) of the input TIA is given by  
\[\xi=\frac{1}{2}\frac{\frac{C_{T}R_{F}+1}{R_{L}C_{L}}+1}{\sqrt{\frac{g_{m}R_{L} C_{T}R_{F}}{(1+g_{m}R_{E})R_{L}C_{L}}}}. \tag{2}\]  
As Equation (2) shows, \(\xi\) is improved by the emitter degeneration term \(g_{m}R_{E}\), i.e., the stability of the input TIA, and \(\xi\) must be larger than 0.71 for PVT (process voltage temperature) variation. Assume that 1/(\(R_{L}C_{L}\)) is larger than the bandwidth of the input TIA stage \(BW\); then \(BW\) is given by  
\[BW=\frac{g_{m}R_{L}}{1+g_{m}R_{E}}\frac{1}{R_{F}C_{T}}=\frac{A_{V}}{R_{F}C_{T}}. \tag{3}\]  
The \(-3\) dB bandwidth (\(BW\)) of the input TIA commonly depends on the input pole [20] and the gain (\(A_{V}\)) of CE stage Q\({}_{1}\) with emitter degeneration from Equation (3). Considering that the bandwidth requirement of the input TIA is 0.7 times the data rate [21], the value of \(A_{V}\) is derived from given \(R_{F}\) and \(C_{T}\). Considering the noise of the optical receiver, the noise of the first stage (the input TIA) dominates the noise performance [22]. With the given requirement of \(\xi\) and \(BW\), optimum performance of the input TIA can be obtained by optimizing the noise. Moreover, the \(1\!f\) noise of the transistors in Figure 2 is ignored for high-speed applications, such that the thermal noise dominates [23]. The thermal noise of the CE stage and \(R_{F}\) contributes most to the total noise of the TIA without emitter degeneration [24].