## 1 Introduction
This is achieved by using a feedforward compensation term and integrating load power information into the current control of the converter. Moreover, there is a phase shifting between the carrier waves of the dc-dc converter and voltage source inverter in order to minimize the current of the dc-link capacitor between these modules [12]. Since rectifier or dc-dc converters are used to eliminate the harmonics of the inverters in these proposed methods, the usage area is limited, for example, they are not applicable for the systems where the input is a battery. By optimizing the voltage space vector in the SVPWM technique, a new SVPWM strategy reduces the harmonics of the inverter input current in a two-level three-phase voltage source inverter to extend the lifetime of the dc-link capacitor [13]. However, the new SVPWM technique requires separate optimizations for low and high modulation indices, making it more complex. Some studies introduce the carrier phase shifting method for dual inverter systems driving only one motor [14; 15]. Additionally, the carrier phase shifting method is investigated to decrease the vibration noise of the dual branch motors [16; 17]. In these methods, there is a phase shift between the carrier waves of the parallel three-phase inverters to decrease torque ripple and vibration noise, as well as to reduce electromagnetic interference. Although this technique reduces the dc-link capacitor current, this research has focused on the motor side of the three-phase inverters rather than the dc side. In these applications, the motors are either multi-phase or segmented PMSMs, allowing two VSIs to drive a single motor rather than operating two motors independently. The study in [18] investigates interleaved voltage source inverters by applying the carrier phase shifting method for different PWM techniques for an asymmetrical dual three-phase machine to decrease stress on the dc-link capacitor in electric vehicle applications. Moreover, another researcher in [19] explains the use of the passive notch filter to decrease the voltage ripple over the dc-link. In addition, interleaved parallel inverters with 90-degree phase shift for triangular carrier waves and 180-degree phase shift for sawtooth carrier waves are studied in a simulation program to reduce the dc-link capacitor current. This research lacks the harmonic information of the inverter input current and experimental results of this research. In addition, the motors are segmented motors, as shown by the above research, so only one motor exists. On the other hand, the phase-shifted pulse width modulation technique is implemented in the dual inverter drive system in EV applications to minimize the harmonic components of the dc-link capacitor in [20]. In this study, only 0- and 180-degree phase shifts of the carrier are investigated, and the detailed harmonic spectrum of the dc-link capacitor current is not given. The phase shifting of the carrier waves is analyzed by using resistive-inductive (RL) load, and it is shown that the proposed approach decreases the volume and cost of the DC capacitor bank by 50% and extends its lifespan by four years [21]. However, this article focuses on single-phase inverters using the SPWM technique and does not cover three-phase VSIs with the SVPWM technique driving PMSMs. This paper presents a carrier wave phase shifting method to reduce the dc-link capacitor current of dual three-phase VSIs using the SVPWM technique to control two PMSMs, as shown in Figure 1. Firstly, the harmonic spectrum of the input current of a three-phase VSI is examined using the double Fourier series method to observe the frequency spectrum of the capacitor ripple current. The significant harmonic component is determined by these analyses. Then, the carrier wave phase shifting method is proposed for the dual motor driver system to reduce the significant harmonic component and thus decrease the dc-link capacitor current.