## 3 Simulation Results and Discussion
### Hump Suppression by Rounding NW Corners and Reducing Gate Insulator Thickness  
In order to improve the \(SS\) and \(I_{\text{on}}\) of the gate-normal NWTFETs, the hump behavior must be suppressed. In this paragraph the radius of curvature (\(R\)) of an NW and \(T_{\text{ins}}\) are optimized for the suppression of the hump behavior. The normalized \(R\) (\(R_{\text{norm}}\)) is defined as \(2R\)/\(W_{\text{inner}}\). The three \(R_{\text{norm}}\) values are discussed as shown in Figure 8: 0, 0.4, and 1. Figure 9 shows the simulated transfer curves of the gate-normal NWTFETs with various \(R_{\text{norm}}\)s ranging from 0 to 1. As the \(R_{\text{norm}}\) increases, the hump behavior becomes weaker because the surface potential difference between the corner and side becomes smaller, as shown in Figure 10. The surface potential difference in an NW becomes 0 as \(R_{\text{norm}}\) becomes 1. In addition, as the corner behavior is alleviated, the short channel behavior is suppressed down [22, 23]. Thus, it is observed that the \(V_{\text{turn-on}}\) increases, the \(SS_{\text{avg}}\) improves, the \(I_{\text{on}}\)/\(I_{\text{off}}\) ratio increases, and the \(DIBT\) decreases, as shown in Figure 11. In the case of a cylindrical NW whose  
Figure 6: (**a**) 2D contour of electrostatic potential distribution at \(V_{\text{G}}\) = 1.5 V, (**b**) electrostatic potential of cut line as \(V_{\text{G}}\) increases (0.5 V–1.5 V), (**c**) surface potential at the corner and side.  
Figure 7: Energy band diagrams of the gate-normal NWTFETs extracted at the (**a**) corner and (**b**) side.  
\(R_{\text{norm}}\) is 1, the gate-normal BTBT evenly occurs on the entire surface. The gate-normal NWTFET whose \(R_{\text{norm}}\) is 1 shows a twofold higher \(I_{\text{on}}\) and a 5.4-fold higher \(I_{\text{on}}\)/\(I_{\text{off}}\) than that whose \(R_{\text{norm}}\) is 0.  
Figure 8: Cross-section of NWs with different \(R\)s.  
Figure 10: Surface potential difference between the corner and side with the variation in \(R_{\text{norm}}\).  
Figure 9: Transfer characteristics of gate-normal NWTFETs with the variation in the normalized radius of curvature of the corners (\(R_{\text{norm}}\)) from 0 to 1. It is shown that the hump is suppressed with the increasing of \(R_{\text{norm}}\).  
Another way to suppress the hump behavior is to reduce the \(T_{\text{ins}}\). Figure 12 shows the simulated transfer curves with various \(T_{\text{ins}}\)s. As \(T_{\text{ins}}\) decreases, that hump is suppressed and the \(SS\) is improved because the gate's controllability over the channel becomes better. The surface potential on the gate-source overlap region increases as the \(T_{\text{ins}}\) decreases. However, as shown in Figure 13a, the potential at the side becomes higher than that at the corner as the \(T_{\text{ins}}\) decreases. It should be noted that the potential at the corner is less sensitive to \(T_{\text{ins}}\) than that at the side because the corners of an NW are surrounded by the gate [17]. Thus, as shown in Figure 13b, the surface potential difference between the corner and side decreases as the \(T_{\text{ins}}\) decreases. In other words, the difference in BTBT turn-on voltages in an NW is reduced, which means less hump behavior.  
Figure 12: Transfer characteristics of NW gate-normal TFETs with the variation in thickness of gate insulator (\(T_{\text{ins}}\)).