# Resource-Efficient FPGA Architecture for Real-Time RFI Mitigation in Interferometric Radiometers
## 3 Implementation Optimization
### Fixed-Point Design  
The data processing chain (Figure 6) shows characteristic bit-width changes through fixed-point operations. It demonstrates strategic fixed-point scaling choices, with bit-width expansion in multiplication-heavy operations (windowing, Stokes), and controlled reduction in statistical computations (kurtosis) and power measurements (PMS). As previously introduced, the radiometric signal is quantized at 1 bit. The effects of this choice in terms of radiometric sensitivity have been discussed in the introduction, but conversely, it also offers substantial hardware efficiency advantages. The reduced bit width directly translates to smaller hardware footprints in critical components, including adders, accumulators, and associated routing resources. This architectural choice cascades into practical system-level benefits: decreased memory requirements, optimized FPGA resource utilization, enhanced timing performance through simplified logic paths, and reduced overall power consumption. The radiometric data processing chain in the Observable Generation block begins with windowing, applying a Hamming window to shape the temporal response for subsequent STFT analysis. The window function reduces spectral leakage and improves frequency resolution, though expanding the word length to fi(0,16,15) due to the multiplication with window coefficients. The FFT stage introduces bit growth proportional to \(\log_{2}(N)\) through its butterfly additions, but after scaling by \(\sqrt{N}\), it settles at fi(1,15,11). This follows from the theoretical maximum growth in FFT processing, where the twiddle factor multiplications introduce negative values into the computation. The fraction length is reduced to avoid excessive growth in later stages. The RFI Detection block implements two key operations: the computation of Stokes parameters and the estimation of spectral kurtosis in both time and frequency domains. The Stokes parameters computation requires careful management of numerical growth through the processing chain. Starting from an initial fixed-point representation of fi(0,16,11) for the input samples, the word length expands significantly due to the successive multiplication operations. The most demanding case occurs in the computation of the \(S_{4}\) parameter, where the bit-width grows up to fi(1,68,44) to maintain precision through the complex products. This expansion is necessary to prevent arithmetic overflow and preserve the detection sensitivity across the full dynamic range of the input signals. The most numerically challenging aspect lies in the kurtosis computation, which requires extensive accumulation of fourth-order moments. While this accumulation inherently demands high numerical precision during intermediate calculations, the final kurtosis values are represented using fixed-point format fi(0,16,12). This reduced precision is justified by the detection mechanism itself: kurtosis-based RFI detection relies on threshold comparison rather than precise magnitude estimation. When the kurtosis deviates significantly from its theoretical value for Gaussian signals, indicating the presence of RFI, the exact magnitude of this deviation becomes irrelevant for detection purposes. This implementation consideration  
Figure 6: Fixed-point implementation of radiometric data processing chain. The diagram shows bit-width evolution through signal processing stages. Block colors indicate inputs and outputs (blue), lossless processing (gray), and precision loss: green for low, yellow for medium, and orange for significant precision reduction. significantly reduces hardware resources while maintaining detection effectiveness. Finally, the thresholding stage converts the kurtosis values into binary decisions, resulting in the binary blanking masks. In the PMS Blanking block, the implementation of gamma calculations (Equations (8) and (9)) is optimized for FPGA resources by separating the numerator and denominator computations, avoiding direct division operations in hardware.