## 3 Compact Model Validation
### De-Embedding Procedure
#### 3.1.2. \(\mathrm{GalInAsSb}/\mathrm{InP}\) UTC-PD De-Embedding  
In order to apply de-embedding on the \(\mathrm{GalInAsSb}/\mathrm{InP}\) UTC-PDs, one-port \(S\)-parameter measurements were performed up to 67 \(\mathrm{GHz}\) on Open and Short test structures. The \(S\)-parameter measurements were preceded by an off-wafer LRRM (line/reflection/match) calibration [27] in order to bring the measurement reference plane up to the RF probe tips. For the \(\mathrm{GalInAsSb}/\mathrm{InP}\) UTC-PDs, the electrical elements equivalent to the Open and Short test structures (Figure 7a) are found to be almost frequency independent in the frequency range of study (up to 67 \(\mathrm{GHz}\)) (Figure 7b). The use of the classical Open-Short/Short-Open de-embedding methods allows extraction of the junction capacitance, but they do not provide reliable results for the compact model validation over the entire frequency range. This is because of the fact that the use of the Short test structure leads to an under/over de-embedding at high frequency, which in turn results in an intrinsic junction capacitance that depends on the frequency as shown in Figure 7c. This is an unphysical behavior and cannot be captured by the UTC-PD compact model.  
Modeling the pads and access lines using only single \(RLC\) network (Open-Short case) is not adequate enough to capture the actual frequency dependence of the UTC-PDs. Therefore, the pads and access lines were modeled by a cascaded \(R_{n}L_{n}C_{n}\) network consisting of \(N\) sections as shown in Figure 8a. Such implementation has been demonstrated up to 40 \(\mathrm{GHz}\) in [28]. In the present study, three cascaded \(R_{n}L_{n}C_{n}\) elements were identified, and this was achieved by ensuring that the resulting intrinsic junction capacitance of the UTC-PDs does not exhibit a frequency dependence. The \(R\) value was extracted from the real part of \(Z_{Short}\). \(L\) and \(C\) values were determined by optimization on the imaginary part of \(Y_{Open}\) as shown in the Figure 8b, leading to three cascaded \(R_{n}L_{n}C_{n}\) elements. As presented in Figure 8b, the sum of the capacitances, \(\sum_{i=1}^{N}C/N\), tends to \(Y_{Open}/\omega\) at low frequencies and the sum of the inductances, \(\sum_{i=1}^{N}L/N\), was determined through an optimization at high frequency. The extracted parameter values are listed in Table 3. Once the equivalent network is accurately modeled, two-port \(S\)-parameter simulations of the cascaded network are used to determine the intrinsic parameters of the UTC-PD using Equation (9). Figure 8c  
\begin{table}
\begin{tabular}{c c c c c c c} \hline \(L_{Pad}\) & \(C_{Pad}\) & \(R_{access}\) & \(L_{access}\) & \(C_{meas}\) & \(L_{mesa}\) & \(C_{mesa}\) \\ \hline
18.0 \(\mathrm{pH}\) & 15.0 \(\mathrm{fF}\) & 0.83 \(\mathrm{\SIUnitSymbolOhm}\) & 28.0 \(\mathrm{pH}\) & 11.0 \(\mathrm{fF}\) & 5.0 \(\mathrm{pH}\) & 5.0 \(\mathrm{fF}\) \\ \hline \end{tabular}
\end{table}
Table 2: Extracted values of the lumped electrical elements, equivalent to the pads and access lines for the \(\mathrm{InGaAs}/\mathrm{InGaAsP}\) UTC-PDs.  
Figure 6: Extraction of parasitics equivalent for: (**a**) the Pad Open and the Pad Short; (**b**) the mesa-free access lines.  
shows the UTC-PD junction capacitance de-embedded using the cascaded network. The results clearly reflect an improvement through the correction for the over de-embedding discussed earlier.  
Figure 8: (**a**) Equivalent circuit of the UTC-PD connected to cascaded pads and access lines; (**b**) extracted parasitic elements associated with the Pads and access lines; (**c**) extracted UTC-PD junction capacitances at various reverse bias.  
Figure 7: (**a**) Open and Short test structures; (**b**) Extraction of parasitic capacitance, inductance and resistance equivalents to the Open and Short test structures; (**c**) Extraction of the UTC-PD junction capacitance.