###### Abstract  
This paper presents a Doherty power amplifier (DPA) integrated circuit (IC) designed to have enhanced gain, efficiency, and AM-AM characteristics through a dynamic power dividing technique, which can control the power dividing ratio according to the input power. Since this multi-purpose dynamic power dividing network also provides the phase offset and impedance matching at the interstage network needed for appropriate DPA operation, the active IC area could be reduced. To verify the proposed technique and its analysis, the DPA was implemented with a 28 nm bulk CMOS process for the fifth-generation (5G) new radio (NR) millimeter-wave frequency band of 23.5-27.5 GHz. The measured results showed a gain of 20.3-21.9 dB, saturated output power of 14.0-15.2 dBm, power added efficiency (PAE) of 22.8-26.7% at the peak power, and PAE of 14.6-17.6% at the 6 dB output power back-off (OBO). Doherty power amplifier; millimeter-wave (mm-wave); CMOS; output power back-off extension technique +
Footnote †: journal: _electronics_  
0000-0002-4319-9300-0002-4  
a higher data rate even with a relatively lower fractional bandwidth, compared to the sub-6 GHz systems. However, DPA design at mm-wave frequencies can be very challenging due to limitations such as device speed or high insertion loss of impedance matching networks. Degradation of the DPA main stage power gain will reduce the overall efficiency, and many of the efficiency improvement techniques used at lower frequencies cannot be applied. Multi-way and multi-stage techniques will have low power gain due to the multi-branch power dividing networks, and asymmetric DPAs will have to select the trade-off of reduced power gain or poor AM-AM characteristics in many cases. Increasing the peaking periphery for efficiency improvement in itself will not be as successful as at sub-6 GHz frequencies since the performance downgrading of enlarged transistors is more critical at mm-wave. There are also reported works that focus on extending the DPA OBO range, even with symmetric transistors, through matching complex impedances at the DPA power combining node [10; 19]. But these methods do not fundamentally solve the issue since DPAs at mm-wave cannot depend on DPD, and the peaking amplifier bias cannot be lowered as desired. In this paper, a dynamic power dividing network is proposed, which has intentionally removed the isolation between the carrier and peaking amplifiers in order to use the variation of the input impedance of the peaking amplifier according to input power. The dynamic power dividing network is designed to drive more power to the carrier amplifier at the low input power level while driving more power to the peaking amplifier at the peak power level. This can improve the trade-off situation between the AM-AM and overall efficiency of the Doherty power amplifier. Since it has uneven power dividing at the low and peak power levels, the AM-AM can be flattened even when the peaking amplifier is put at a lower bias, which results in high efficiency. As a result, this dynamic power dividing can enhance the power gain, especially at the low input power level, even while flattening the overall AM-AM characteristics. The improved AM-AM characteristics allow the peaking amplifier to have a deeper operation class toward Class-B or -C, which results in efficiency improvement and also opens the possibility of benefitting from applying various OBO extension techniques. The proposed DPA consists of a single drive amplifier that drives both the carrier and peaking amplifiers through the dynamic power dividing network, which was implemented at the interstage network. The appropriate phase offset, which was needed between the carrier and peaking amplifiers for load modulation and for the in-phase power combining at the load network, was also realized in the dynamic power dividing network, which made the overall topology compact.