# Algorithms for Simulation of Shunt Currents in a Vanadium Redox Flow Battery
## 4 Methods
### Algorithms
#### 4.4.2 Codification of Node Equations
\begin{table}
\begin{tabular}{c c c c c c c c c} \hline \hline \multirow{2}{*}{\begin{tabular}{c} **Number of** \\ **Stacks** \\ \end{tabular} } & \multirow{2}{*}{\
\begin{tabular}{c} **Number of** \\ **Cells** \\ \end{tabular} } & \multirow{2}{*}{
\begin{tabular}{c} **Number of** \\ **Variables** \\ \end{tabular} } & \multicolumn{3}{c}{**Object + Nodes**} & \multicolumn{3}{c}{**Nets + Solving**} \\ \cline{3-10}  & & & **Worst** & **Best** & **Average** & **Worst** & **Best** & **Average** \\ \hline
1 & 5 & 41 & 0.026150 s & 0.007174 s & 0.009173 s & 0.005379 s & 0.002113 s & 0.002686 s \\
2 & 5 & 94 & 0.045931 s & 0.015634 s & 0.019205 s & 0.020645 s & 0.004925 s & 0.006057 s \\
4 & 10 & 372 & 0.069442 s & 0.039403 s & 0.041965 s & 0.020572 s & 0.014175 s & 0.015209 s \\
10 & 4 & 396 & 0.091467 s & 0.044869 s & 0.050066 s & 0.033695 s & 0.016368 s & 0.018800 s \\
4 & 30 & 1092 & 0.189200 s & 0.111410 s & 0.118100 s & 0.122330 s & 0.050881 s & 0.056295 s \\
30 & 4 & 1196 & 0.195240 s & 0.131630 s & 0.138790 s & 0.113220 s & 0.061115 s & 0.06227 s \\
5 & 35 & 1591 & 0.245290 s & 0.162310 s & 0.175380 s & 0.244050 s & 0.093107 s & 0.109930 s \\
35 & 5 & 1711 & 0.307980 s & 0.186170 s & 0.206200 s & 0.225120 s & 0.109450 s & 0.126120 s \\
10 & 40 & 3636 & 0.637060 s & 0.374170 s & 0.434660 s & 0.525830 s & 0.454310 s & 0.482610 s \\
40 & 10 & 3756 & 0.667190 s & 0.409510 s & 0.478100 s & 0.673530 s & 0.477010 s & 0.535770 s \\
10 & 100 & 9036 & 1.347400 s & 0.960930 s & 1.104900 s & 4.651700 s & 3.922800 s & 4.126100 s \\ \hline \hline \end{tabular}
\end{table} 
Table 8: Execution times of different cases. Figure 6: Comparison with the data of article [8] for 54 amperes of discharge current and a SoC 0.5. As can be seen, the times relative to the instantiation of the objects, together with the codification of the equations of the nodes, follow a fairly linear pattern, for the codification of the net equations and the resolution of the equation system is different as the number of variables increases. This is to be expected, since to solve the system of equations, the calculation of the inverse of a matrix of dimensions equal to the number of variables must be performed. As previously mentioned, before addressing the problem in the manner shown in the article, a code was implemented which, based on the parameters of the number of stacks and cells per stack, carried out the construction of the equivalent circuit in Simulink. The problem with that is that the model compilation times were already very high, with the order of hours for a cell count at around 120. Once compiled, execution was also very slow, which is why these results are very positive. Finally, it is worth highlighting the linearity with respect to the number of variables with which the times of object creation increase, not to mention the introduction of the coefficients of the node equations. This was something to be expected, since, in the end, the algorithms are linear. However, in the times relative to the insertion of the coefficients of the net equations and the resolution, this linearity does not exist, because an inverse of a matrix is performed in the resolution. ## 7 Conclusions

This work arises from the need to model the shunt currents of a generic vanadium flow redox battery. While there are quite a few articles that discuss modeling shunt currents, many of them make simplifications that limit the possibility of testing different hypothetical cases. In addition, none of the articles consulted by the authors on this topic showed how they had carried out the implementation, possibly due to its complexity, the use of external tools to simulate, or that they have only been able to carry out the implementation for a specific case. This article has shown a way to implement the resolution of shunt currents in a generic way for batteries with any number of cells and stacks (except for the special case of one cell per stack, since it was thought that it did not make much sense). The factors to be

Figure 7: Graphical representation of case execution times.