# Energy Management Integrated Circuit for Multi-Source Energy Harvesters in WBAN Applications
## 5 Measurement Results  
The proposed energy management circuit with dual outputs was designed and fabricated using a 0.13 \(\upmu\)m TSMC CMOS technology. A layout and a die micrograph are shown in Figure 9, and the die size was 960 \(\times\) 910 \(\upmu\)m. An I/O pad with minimum leakage power and capacitance was selected to reduce power consumption. The newly developed IC was packaged with 4 \(\times\) 4 mm quad-flat no-leads (QFN) with 24 leads. When all input ports were enabled, the power consumption of the packaged IC was just 1.5 \(\upmu\)W with 1.2 Vdd. The frequency of the internal oscillator was 32 kHz, and the digital control circuit checked the state of the input harvester every 125 \(\upmu\)s.  
Figure 8: Block diagrams for the digital control logic. (**a**) trigger signal generator; (**b**) control signal generator for low power switch; (**c**) control signal generator for high power switch. Figure 9: Layout and die micrograph of the energy management IC. To measure the functional operation of the newly developed IC, an evaluation board was designed with three input ports. Each harvester was modeled with a power supply. The capacitance of each input was 10 nF. The load in a low-power path was modelled with a resistor to consume power of 55 \(\upmu\)W. The power more than 55 \(\upmu\)W was supplied to a high-power path, and charged a battery. The battery in a high-power path was modelled with a small size resistor to consume much more power than the load in the low-power path. In this experiment, the power consumption of the battery in high power was set up at five times of that of the load in low-power path (275 \(\upmu\)W). To show the functionality of the energy management circuit described in previous section, three types of experiment was tested, and the waveforms were acquired with four channel digital oscilloscope. The first experiment was conducted to show the internal operating waveforms of the IC with one energy harvester. The second experiment shows the waveforms of dual outputs according to the magnitude of input harvesting energy in case of multi-source energy harvesters. In the last experiment, power distributing ratio between low-power path and high-power path and the energy combining efficiency from multi-source energy harvesters in the developed IC is depicted as the magnitude of the input harvesting energy. The first experiment involved a single energy harvester. The waveforms for the experiment are shown in Figure 10a. When an input energy harvester in low state starts to generate energy, the voltage of the input capacitor increases to the threshold voltage, Vth. The frequency of an internal oscillator can be tuned by changing the bias voltage with an external resistor. In this experiment, the internal oscillator generated a 32 kHz clock signal with a 10 M\(\Omega\) bias resistor. With a 32 kHz internal clock, the digital control logic checked the input capacitor voltage in every 125 \(\upmu\)s. If the voltage of the input capacitor was higher than the Vth, the digital control logic turned off the low-power path switch, and the energy stored in the input capacitor was supplied to a load on a low-power path. While supplying the energy in the input capacitor to a load, the input capacitor discharges. Therefore, the input capacitor is repeatedly charged and discharged near the Vth level, and at the load stage, the harvested power is available at times. According to the magnitude of the input power harvested, the duty rate at a load stage can change. With high harvest power, the on-time for a switch increases, and with low harvest power, the time becomes shorter. Figure 10: Energy managing waveforms in the newly developed IC. (**a**) Internal waveforms in EMIC with one energy harvester; (**b**) IN1: low power, IN2: low power; (**c**) IN1: low power, IN2: high power; (**d**) IN1: high power, IN2: high power.