## 1 Introduction  
Recent technologies driven by artificial intelligence, cloud-computing, and big-data, require terabyte/s (TB/s) bandwidth. Therefore, the data rate of DRAM and the number of parallel buffers have increased to support TB/s bandwidth. To support TB/s, data rates per pin in DRAM are continuously increasing regardless of DRAM types. Specifically, the data rate per pin in the Graphic DRAM (GDDR) for high-resolution image signal processing and artificial intelligence is increasing rapidly. High bandwidth memory (HBM), which is in the form of a 2.5-dimensional integrated circuit (2.5D-IC) based on through silicon via (TSV) and interposer technologies, is also key to realizing recent technologies [1; 2; 3; 4; 5; 6; 7]. It is expected that the data rate of the HBM channel will increase up to 12 gigabits per second (Gb/s). In order to maintain the TB/s system bandwidth, maintaining signal integrity and power integrity (SI/PI) in the high-speed interconnect is crucial. The high-speed channel suffers from various noise degrading SI, such as impedance mismatch, channel losses, cross-talks, and inter-symbol interference (ISI). Recently, due to the reduced noise margin associated with increasing data rates and decreasing operation voltages, noises related to PI must be considered together with SI. Switching of numerous logic circuits and input/output (I/O) buffers sharing the same power delivery network (PDN) generate simultaneous switching output (SSO) noise. Among non-linear power/ground noises, the power/ground noise induced by the SSO degrades the signal integrity of the high-speed interconnect severely and causes amplitude uncertainty in the output voltage of the transmitting or receiving buffers [8; 9; 10; 11]. These noises are dominated by the occurrence probabilities of the buffer combinations, hierarchical PDN impedance, and bit patterns. To estimate a case that generates extremely large power/ground noise, large computational cost and time are required, since the occurrence probability of such a case is very low. An accurate eye-diagram simulation/estimation is extremely important, since it includes various SI/PI factors, and it is widely used to judge the SI/PI and electrical performance of the high-speed interconnect. In some cases, conventional transient simulators and eye-diagram estimation methods fail to accurately estimate the eye-diagram considering these noise effects, which is depicted in Figure 1.  
As the number of SSO buffers increases similarly to the HBM, large computational resources are needed to simulate accurate output responses and eye-diagrams of high-speed interconnect using conventional transient simulators. The input/output buffer information specification (IBIS) model is also known to be inaccurate under the impact of large power/ground noise. Statistical eye-diagram estimation methods based on single bit response (SBR) such as peak distortion analysis (PDA) enable fast and accurate SI analysis in the high-speed interconnect [12; 13; 14; 15]. However, the SBR method is only applicable for the linear and time invariant (LTI) systems; therefore, the non-linear power/ground noise and PI factors cannot be considered for the SBR method. Double edge response (DER) and multiple edge response (MER) methods are capable of capturing the non-linearity impacts, but they are difficult to reflect the impacts of SSO noise [16; 17; 18; 19]. In previous works [20; 21], the statistical eye-diagram estimation method, which is capable of considering SSO impact, is proposed for the first time. However, the steady-states response affected by the SSO are not considered. When the number of parallel buffers increases, even though the victim buffer is in steady-state (digital state 'zero' or 'one'), SSO buffers generate large amount of voltage fluctuations which affect not only eye-diagram contours but also overshoot/undershoot voltage characteristics. In this article, a novel statistical approach is proposed and applied to co-design signal and power integrity (SI/PI) in high-speed interconnects.