## 3 Analog Fronthaul Based on the Development of a Real-Time A-IFoF Transceiver  
As discussed in the previous sections, in order to surpass the bandwidth bottleneck of B5G fronthaul networks, two alternative approaches have emerged. The first one considers the evolution of the current D-RoF fronthaul through moving the functionality and processing stages to the RUs or to intermediate DUs resulting in new protocols, such as the enhanced CPRI (eCPRI). The second approach involves the migration to analog fronthauling solutions and goes far beyond the propagation of digitized on-off keying (OOK) streams, leaving room for transmission enhancements by the physical layer modifications that are driven by the adoption of emerging technologies and innovative layouts. [26]  
While the evolution of eCPRI interfaces is driven by industry cooperation that is aimed at defining publicly available specifications [27] mainly from the market consensus [28], A-RoF interfaces have been revisited in the past years by academic and research groups that are targeting bandwidth-efficient fronthaul interfaces. Beyond these lab-scale experiments  
Figure 1: A WSS-based hybrid optical transport architecture. and demonstrations, in the last years the RoF systems that are suitable for access network applications have been also moved towards the standardization phase [29]. The key for A-RoF systems to further penetrate into the application and market landscape is the use of deployment-oriented A-RoF baseband processors that are based on state-of-the-art processor platforms and their interfacing with optoelectronics. Through the past years, multiple A-IFoF fronthaul implementation ideas have been presented in this direction [26; 30; 31]. In all of these implementations, the efficiency of the scheme in densified deployments, stemming from the removal of digital-to-analog conversion (DAC) and analog-to-digital conversion (ADC) units from the RUs, the advanced bandwidth availability and the possibility for the convergence of multiple optical and radio technologies have been highlighted and demonstrated through proof-of-concept experiments. Indicatively, an A-RoF fronthaul implementation, which is based on the development of a real-time A-IFoF signal processor, has been recently reported in [26] employing an Intel Arria 10 SoC development board that provides Cyclic Prefix-OFDM (CP-OFDM) signals for external baseband (BB)-to-intermediate frequency (IF) up-conversion through an analog mixing unit that is operating in the range of 2.25 GHz to 5.5 GHz. In general, the coexistence of both analog and legacy optical transceivers in the same core infrastructure remains a challenging step for the migration to hybrid transport implementations [32; 33]. For this purpose, real-time reconfigurable FPGAs have been investigated as Ethernet-compatible baseband processor platforms for the creation and processing of IF-upconverted signals and their integration into legacy infrastructures for the delivery of real-world services [34]. In the next paragraph, the implementation of an A-IFoF transceiver comprising a state-of-the-art Radio Frequency System-on-Chip (RFSoC) board for the baseband processing functionalities and low-cost IM/DD optoelectronic components is described. The key part of the transceiver implementation was the FPGA-based real-time network adaptor (Figure 2) that served both as an Ethernet bridge and as a DSP engine. The full stack of DSP functions was implemented in order to realize efficient fiber/Over-the-Air (OTA) transport through OFDM waveforms. A network adapter was implemented in order to realize the conversion of the Ethernet packets into complex native radio waveforms (and vice versa) via a single integrated, high power and efficient RFSoC platform. This platform (a Xilinx Zynq UltraScale+ RFSoC device on a ZCU111 development board, manufactured by Xilinx (San Jose, CA, USA) [30]) consisted of a 10G/25G Ethernet core, an FPGA board and DACs/ADCs and it served as a bidirectional Ethernet to IF-upconverted OFDM bridge.