## 6 Simulation Results  
The functionality of the proposed mixed-mode universal filter in Figure 3 was validated by the PSPICE circuit simulation program. The VDBA was modeled using the CMOS structure mentioned in Figure 2 with \(\pm\)V = 0.75 V and \(I_{A}\) = 15 \(\mu\)A. In all simulations, the capacitor values were chosen with \(C_{1}\) = \(C_{2}\) = 50 pF. The circuit was designed for \(f_{o}\) = \(\omega_{o}/2\pi\) = 1.52 MHz and \(Q\) = 1; the active and passive components were chosen as: \(g_{m1}\) = \(g_{m2}\) = 0.48 mA/V (\(I_{B1}\) = \(I_{B2}\) = 50 \(\mu\)A), and \(R_{1}\) = \(R_{2}\) = 2 k\(\Omega\). Figures 5 and 6 illustrate the ideal and simulated LP, BP, HP, BS, and AP frequency responses for VM and TAM (i.e., when the input is voltage), respectively. Figure 7 shows the ideal and simulated LP, BP, and HP gain responses for CM and LP and BP in TIM (i.e., when the input is current). The simulated \(f_{o}\) of the BP filter was measured as 1.44 MHz, which is an error of 5.26% concerning its theoretical value. The simulation results of Figure 6 also show that the passband gain \(H_{1}\) of the LP response for TAM is obtained as \(-\)66 dBS, which depends on \(H_{1}\) = 20 log\({}_{10}\) (\(1/R_{1}\)). Similarly, the passband gains \(H_{2}\) for BP, HP, BS, and AP responses are the same as the gain \(H_{1}\) of the LP filter because of \(H_{2}\) = 20 log\({}_{10}\) (\(g_{m2}\)) due to \(g_{m2}\) = \(1/R_{1}\). To examine the transient behavior of the proposed filter, the LP, BP, and HP responses were carried out for the VM operation. The sinusoidal input voltage of 50 mV (peak) at a frequency of 1.52 MHz was applied and the corresponding output current waveforms are given in Figure 8. As can be monitored, the phase differences between the input and LP, BP, and HP outputs are found to be \(-\)92.73\({}^{\circ}\), 5.45\({}^{\circ}\), and 87.29\({}^{\circ}\), which are consistent with ideal values equal to \(-\)90\({}^{\circ}\) 0\({}^{\circ}\), and 90\({}^{\circ}\), respectively. The percentages of the total harmonic distortion (THD) for the three filter outputs are 0.22% for LP, 1.12% for BP, and 0.64% for HP. In addition, the THD variations of the LP, BP, and HP output voltages on the input signal amplitudes are also shown in Figure 9. It is shown that when the applied input signal amplitude increases by 100 mV (peak), the THD values are within 2.2%. Through the simulation results, the circuit has a total power consumption of 0.373 mW. As indicated in Equations (19) and (20), the parameters \(\omega_{o}\) and \(Q\) of the proposed filter can be set orthogonally. Figure 10 shows the \(Q\)-factor adjustability of the BP responses in VM for various values of \(R_{2}\). In this case, the \(Q\)-factors are set as 0.5, 2.4, 9.5, and 95.5 with the \(R_{2}\) value of 1 k\(\Omega\), 5 k\(\Omega\), 20 k\(\Omega\), and 200 k\(\Omega\), respectively. The results demonstrate that the high-\(Q\) tuning can be achieved by adjusting \(R_{2}\) without influencing \(f_{o}\). Figure 11 represents the VM gain responses of the BP filter for three different values of \(I_{B}\) and \(R_{2}\). The BP filter is designed for \(f_{o}\) = 1.12 MHz, 2.15 MHz, and 3.72 MHz, while keeping \(Q\) fixed at 9.5. Table 4 gives the component values used in Figure 11 and the corresponding calculated and simulated \(f_{o}\). Figure 5: Ideal (dashed line) and simulated (solid line) frequency responses for VM: (**a**) LP, BP and HP; (**b**) BS; (**c**) AP. \begin{table}
\begin{tabular}{c c c c c c} \hline \hline \(I_{B}=I_{B1}=I_{B2}\) & \(g_{m}=g_{m1}=g_{m2}\) & \(R_{2}\) & \(f_{o}\) (MHz) & **Deviation** \\ (\(\mu\)A) & **(mA/V)** & **(kC)** & **Ideal Value** & **Simulated Value** & **in \(f_{o}\) (\%)** \\ \hline
30 & 0.37 & 25.7 & 1.12 & 1.09 & 2.67 \\
100 & 0.67 & 14 & 2.15 & 2.24 & 4.18 \\
300 & 1.17 & 8.12 & 3.72 & 3.52 & 5.38 \\ \hline \hline \end{tabular}
\end{table}