## 4 Experimental Results  
The performance of the control and protection algorithms of the driver was tested experimentally using a specialized test bench, which was designed for commissioning the driver in [20]. The functional diagram of the test bench is shown in Figure 6. A small IGBT is installed on the test bench, and the load is provided by a resistor. The applied voltage between the collector and emitter of the transistor is approximately 680 V due to a voltage drop across the internal resistance of the test bench. The test bench is capable of generating a control signal from the IGBT to the driver through the optical channel, receiving an optical feedback signal from the driver, and analyzing the result. Several resistors are installed on the test bench that can be shunted by the corresponding relays to simulate fault operating modes in the transistor. Resistor R6 and capacitor C1 are used to load the gate circuit with the rated power of the gate driver. Inductance is commutated by relay K2 and used to produce overvoltage over the IGBT during its turn off and to check for active clamping. Relays K1 and K3 are used to change the parameters of the load formed by R1, R2, and R3 and imitate short-circuiting by varying the voltage drop across the collector-emitter circuit. Relay K4 and resistor R4 are used to imitate the power loss fault. Figure 5: Timing diagram of feedback signal implementation by PWM module (blue—control command; red—feedback signal). The transient signals on the driver board are shown in Figures 7-10. In the presented oscillograms, the control signal has inverse logic: the low state of the signal corresponds to the switched-on state of the transistor or the presence of light at the input of the optical receiver. The generation of a feedback impulse with a 700 ns duration occurs with each appearance of the edge of the control signal in normal operation mode (see Figure 7). The duration of the feedback impulse is equal to 700 ns (see Figure 7a). A short circuit is imitated using the test bench. The collector voltage is increased by means of disconnecting relay K1. During the turn-on phase, the voltage drop across resistor R1 is equivalent to the fault operation mode of the IGBT with a short circuit. The transient signals in the short-circuit operation mode are shown in Figure 8. As shown in the oscillograms, at the instance in time of 6.78 us after the appearance of the edge of the control signal, a feedback pulse with a duration of 9 us is produced. The transistor is switched off, and a fault pulse is generated because the voltage across the collector is greater than 51 V and equal to 66.3 V at that instance in time (see cursor 2 in Figure 8). The driver blocks the control signal to the IGBT, and the gate voltage begins to decrease from +15 V to -9 V. The transistor goes into the switched-off state, and the collector voltage increases. In the normal operation mode, a gate current pulse occurs while the transistor is turning on (see the red graph in Figure 9a). The appearance of this pulse is checked by the driver, and if it is missing, a feedback fault pulse is generated. Using relay K5 installed in the test bench, the driver gate pin can be disconnected from the gate of the transistor. In the case of no gate current pulse, as shown in Figure 9b, a feedback fault signal pulse with a 1 us duration is produced. Figure 6: Functional diagram of the test bench. Figure 7: Transient signals of the gate driver in normal operation mode: yellow—control signal; blue—gate voltage; red—collector–emitter voltage; green—driver feedback signal. (**a**) Enlarged picture. (**b**) Narrowed picture. Figure 8: Transient signals in the short-circuit operation mode: yellow—control signal; blue—gate-voltage; red—collector-emitter voltage; green—driver feedback signal. Figure 9: _Cont._  
Figure 10: _Cont_. Figure 9: (a) Transient signals of the gate driver in normal operation mode.