## 1 Introduction  
The rapid growth of smart devices that are interconnected over the internet has opened up new application fields such as wearables, smart home, smart grid, connected cars, and others. Therefore, the superior term Internet of Things (IoT) as a megatrend has gained more and more attention during the past few years. In general, the IoT includes a wide range of devices from simple interconnected sensors to complex systems as such mobile devices, vehicles, and smart labels, to name a few [1, 2]. Interconnected devices carry sensitive data that can be a target of cyberattacks [3]. Typical countermeasures include cryptographic methods, often based on random numbers used to generate public and private keys. At this point, one should note that a secret is just as trustworthy as its origin.  
For that reason, researchers started to use the random intrinsic variations of electronic circuits to generate unique and unclonable identifiers (IDs). These hardware-based security primitives are called Physical Unclonable Functions (PUFs) and have been introduced in recent works for authentication, identification, and cryptographic applications [4; 5; 6]. One of the great advantages of PUFs is that there is no necessity for non-volatile memory, since the PUF generates keys on demand while being stimulated. The general behavior of a PUF includes a system's unpredictable response \(R\), due to the intrinsic variations, with respect to the system's input stimulus, namely the challenge \(C\), hence we can conclude \(R=f(C)\), where \(f\) is not known and only influenced by the system or device-specific variations [7; 8].  
Many existing PUFs, such as ring oscillator (RO) [9; 10; 11] and arbiter-based [7; 12] designs, are complex and hard to integrate for device manufacturers into their application ICs, due to great design overheads or poor performance in security metrics. In the past years, analog-based PUF circuits have been proposed that use lower complexity circuit designs while achieving very good results in PUF security metrics. This property makes analog-based PUFs strong candidates as lightweight security primitives for constrained devices [13].  
In this work, we propose a real-hardware evaluation platform for an analog-based PUF, implemented in a highly scalable design. The herein presented PUF as an embedded system covers the entire software and hardware implementation and is verified through PUF security metrics as a viable PUF design. Due to the discrete device approach, reconstruction of the platform is of relatively low complexity compared to integrated circuit prototyping. This helps to enable applied research on a highly stable analog PUF and allows for experimentally embedding this PUF system into existing software frameworks at very low cost.  
We provide the following contributions:  
* The PUF evaluation platform as a scalable design with low design complexity.
* Detailed presentation of the peripherals and interfaces of the system.
* Software design and fabrication of 30 PUF cores.
* Experimental characterization and testing of internal analog voltages that are the basis of response bit generation and discussion of the reliability metric on the analog level.
* Testing and evaluation of PUF security metrics including reliability, uniqueness, and bit errors in the temperature range of \(-20\,^{\circ}\)C to \(80\,^{\circ}\)C.  
The remainder of this paper is structured as follows: Sections 2 and 3 explain the related work and discuss the PUF design. The software and hardware implementation are addressed in Section 4. In Section 5, the security analysis and experimental results are shown and Section 6 compares our work with related PUFs. Finally, Section 7 concludes this paper.