# High-Aspect-Ratio Silicon Metasurfaces: Design, Fabrication, and Characterization. _Applied_
## 3 Fabrication Process for High-AR Silicon Metasurfaces  
The fabrication of the tri-layered all-silicon THz metasurfaces, with a straight sidewall and correct VTD, was carried out with a three-step process based on standard photolithography and the Bosch silicon etch process, as shown in Figure 4a. Firstly, a spin-coating photoresist (PR) layer (AZ5214) is covered and patterned on the top side of the double-sided polished (DSP) silicon wafer with a thickness of 500 \(\upmu\)m. A set of cross-shaped silicon marks is transferred onto the silicon wafer using the standard RIE process. Next, the pattern of silicon micro-resonators is transferred onto the bottom side of the silicon wafer, making good alignment with the help of the cross-shaped marks on the top side of the wafer. Then, the silicon resonators with a height of 30 \(\upmu\)m on the bottom side of the wafer are realized by utilizing the Bosch etching process with the advanced silicon etcher (Surface Technology System, MUC-21). In the third step, after making good alignment with both the top and bottom structure, we transfer the patterns of the micro-pillar onto the thick PR (AZ 4620)  
Figure 3: Simulated spectra of the polarization conversion ratio (**a**) and phase difference (**b**) between x- and y-polarized transmissive THz wave, and the transmission amplitudes for the x-polarized (**c**) and y-polarized (**d**) THz wave of the meta-atom with different thickness of the connecting layer characterized by d\({}_{3}\), the gray area in the figure covers the meta device working frequency. covered with a wafer for protection. Finally, the high-AR silicon micro-pillar array on the top side of the wafer is carried out with another optimized Bosch etch process. As shown in Figure 4b, the Bosch process is a time-multiplexed silicon etching procedure consisting of multiple switches between the etching cycle and the passivation cycle [40; 41; 42] to guarantee a highly directional etch. In the passivation active cycle, a thin film of fluorocarbon, also called the inhibitor, is deposited all over the structures. In the following etch-active cycle, the reactant will first remove the inhibitor, then etch the silicon in depth. In return, the etch rate in the horizontal direction is dramatically different from the vertical direction, since the sidewall of the silicon has been well protected by the inhibitor. Therefore, the anisotropic etch in the vertical and lateral directions in the silicon substrate can be realized by switching these two cycles in time. In the Bosch process, side effect control is the key technique to promoting the etch profile. Usually, when the balance between etch step and passivation step is disturbed, the side effects occur [51]. We perform different fabrication processes to find the influence of fabrication setting parameters on the etch profile of a fabricated sample. The comparison experiments on different fabrication parameters, as shown in Figure S1 in Supplementary Materials, shows that the sidewall slope will decrease with the increase in the platen power, because the platen can accelerate the reactant ion to enhance the lateral etch. Although, adjusting the platen power can make the high-AR micro-pillar with a straight sidewall slope, it also risks inducing the presence of a micro-grass effect on the bottom of the silicon substrate. By gradually increasing the passivation active time in each cycle, we find that the long passivation time can enhance the micro-masking, which will also induce a micro-grass effect. Figure S1 illustrates that the etch rate will drop with the increasing passivation in the whole working cycle, because the overclosed residual inhibitor will slow down the etching reaction on the bottom side of the substrate and make the etch reaction more difficult. To the best of our knowledge, the experimentally realized THz silicon metasurfaces reported in recent literature possessed an etch depth of barely larger than 200 \(\upmu\)m with AR values larger than 10:1 [17; 24; 28; 29; 30; 31; 32; 33; 34; 35; 36; 37; 38].