# A Finite State Machine-Based Improved Cryptographic Technique
## 3 Proposed Methodology
\begin{array}{c}l_{1}\\ w\end{array} \right)\). Now, the output of the multiplexing unit is permuted by the interleaving unit \(\pi_{2}\) with a length of \(\lambda(N+K)\). Therefore, the CWEF of the interleaving unit \(\pi_{2}\) is given by Equation (5). Where \(w_{5}\) and \(w_{6}\) characterize the input weights of the tracks \(P_{2}\) and \(P_{5}\), respectively, which are connected to the puncturing module. In this context, \(w_{a}\) and \(w_{b}\) represent output weights of the bit strings coming from the puncturing unit. The weight of the output code sequence impending from the post-encoding unit is signified by \((h-w-w_{a}-w_{b})=w_{3}\). Additionally, \(w^{\prime}_{1}\) and \(w^{\prime\prime}_{1}\) characterize the input weights of the tracks \(P_{3}\) and \(P_{4}\), respectively, which are connected to the puncturing module. The straitened higher bound on the BEP for the ML soft decoding technique under the Additive White Gaussian Noise (AWGN) channel condition can be evaluated by the Input Output Weight Enumerator Function (IOWEF) coefficients \(B^{s}_{w,k}\). The straitened higher bound of 3D-TC assuming BPSK modulation is specified by  
\[P_{b}\leq\frac{1}{N}\sum_{=}\sum_{h}w_{5}*w_{6}^{s}B^{S}_{w,h}*Q\sqrt{2*R_{C* \pi_{2}}*h*\frac{E_{b}}{N_{0}}} \tag{5}\]  
where \(R_{C}\) signifies the code rate. A flowchart of the proposed work is shown in Figure 2.  
To provide security and dependability, RDH and the FSM combine to provide excellent security but with a drop in dependability compared to the original implementation of FSM. As the RDH-128, RDH-192, and RDH-256 all use keys of length 128, 192, or 256 bits to encrypt and decode 128-bit data blocks, this makes sense. This limits the 4-FSM's error-correcting capability by limiting the maximum frame length of the FSM to 128 bits. A longer input bit sequence may improve the MCTC-error-correcting FSM's performance. Nevertheless, encoding a bit sequence longer than 128 bits necessitates many iterations of MCTC, which increases the time and energy needed to process the data. In this scheme, the \(m\) length-based input sequence is passed through the Serial-to-Parallel (S/P) unit. Thereafter, symbols impending from the S/P unit are moved through the Binary Phase-Shift Keying (BPSK) segment. Next, the amplitudes are assigned to each of these symbols. Finally, these symbols are linearly superimposed to generate a finite-alphabet output symbol \(Y\). This whole modulation arrangement can be mathematically articulated by the expression  
\[Y=\sum_{i=1}^{\text{m1}}\,C_{i\text{1}}=\sum_{i=1}^{\text{m1}}\,\beta_{i\text{1 }}d_{i\text{1}}=\sum_{i=1}^{\text{m1}}\,\beta_{i\text{1}}(1-2b_{i\text{1}}) \tag{6}\]  
where \(\beta_{i\text{1}}\) indicates the magnitude of the \(i\text{1}^{\text{th}}\) binary chip and \(b_{i\text{1}}\in\{0,1\}\). Three power distribution techniques, namely Equal Power Allocation (EPA), Unequal Power Allocation (UPA), and Grouped Power Allocation (GPA), have been successfully used for the design of the efficient 3D-TC. Instead, one might modify the existing FSM implementation in such a manner that it provides security and error correction at a reduced computational cost. The only function that the conventional FSM can achieve is to correct errors in the data during transmission; this is a limitation. However, the random shuffling that the random FSM conducts may be used for encryption as well, so it is not only for fixing mistakes.