## Appendix A Simulation Example  
This section provides an example of an entire cycle of the simulation setup for clarity. As described in Table 11, several input data words were considered. Based on the chosen symbol size (i.e., 3), these data words are then encoded to their corresponding code words. After converting them into their binary formats (e.g., \([2,2,2,2,2,2]\) converts to \([010,010,010,010,010,010]\)), the code words convert to voltages using the Non-Return to Zero Level encoding, i.e, a logical '0' is converted to 0 V and a logical '1' to 1 V. \begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline \# & **Amplitude** & **f\({}_{\text{EMD}}\)** & **Input** & **Transmitted** & **Received** & **Possible Output** & **Output** \\  & **(V)** & **(MHz)** & **Data Word** & **Code Word** & **Code Word** & **Code Word(s)** & **Data Word** & **Category** \\ \hline
1 & 1 & 300 & \([2]\) & \([2,2,2,2,2,2,2]\) & \([2,2,2,2,2,2,2]\) & \([2,2,2,2,2,2]\) & \([2]\) & DTP \\ \hline
2 & 0.6 & 280 & \([0]\) & \([0,0,0,0,0,0,0]\) & \([1,0,2,0,4,1,0]\) & \([0,0,0,0,0,0]\) & \([0]\) & DTN \\ \hline
3 & 1 & 204 & \([6]\) & \([6,6,6,6,6,6,6]\) & \([\underline{Z},\underline{7},6,6,6,6,6]\) & \([\underline{6},\underline{6},6,6,6,6,6]\) & DFP \\ \hline
4 & 1 & 200 & \([7]\) & \([7,7,7,7,7,7,7]\) & \([7,7,7,7,7,7]\) & \([7]\) & CTP \\ \hline
5 & 1 & 202 & \([3]\) & \([3,3,3,3,3,3,3]\) & \([\underline{Z},\underline{Z},\underline{Z},\underline{Z},\underline{Z},3]\) & \([7,7,7,7,7,7]\) & \([7]\) & CTN \\ \hline
6 & 1 & 250 & \([4]\) & \([4,4,4,4,4,4]\) & \([4,6,\underline{3},\underline{1},4,6,\underline{3}]\) & \(\begin{cases}[\underline{3},3,3,3,3,3,3]\\ [4,4,4,4,4,4,4]\) & \(\begin{cases}[4,4,4,4,4,4,4]\\ [6,6,6,6,6,6,6,6]\end{cases}\end{cases}\) & NA & CTN \\ \hline
7 & 1 & 204 & \([0]\) & \([0,0,0,0,0,0,0]\) & \([\underline{Z},\underline{6},0,0,0,0]\) & \([0,0,0,0,0,0]\) & \([0]\) & CFP \\ \hline
8 & 1 & 200 & \([1]\) & \([1,1,1,1,1,1]\) & \([\underline{Z},\underline{Z},\underline{Z},\underline{Z},\underline{Z},\underline{Z}, \underline{Z}]\) & \([7,7,7,7,7,7,7]\) & \([7]\) & CFN \\ \hline \hline \end{tabular}  
* In these Example, symbol size = 3, \(K=1\), phase = 270\({}^{\circ}\), and bit-rate = 200 MHz. Under-bar is used to demonstrate the error positions. Furthermore, differences between the possible output(s) and the received code word are indicated in bold.  
\end{table} 
Table 11: Examples to demonstrate the impact of EMD on the data during the transmission. The resultant code words then pass through the corrupter where they are exposed to a single-frequency disturbance with a phase of 270 degrees. In cases where the resultant voltages are greater than or equal to the specified threshold (i.e., 0.5 V), they convert to logical '1', and voltages less than 0.5 V are converted to logical '0'. Subsequently, the binary code words convert to their decimal formats or symbol-based code words. For this example, eight different scenarios were selected, which resulted in different categories. For the first three examples, the data are in control, and for the rest, the channel is in control. As can be seen, in row 1, at a frequency of 300 MHz (\(f_{\text{bit}}\) is 200 MHz), the code word is not affected by the EMD; thus, no correction is required (i.e., syndrome = 0), and the output would be the same as the input (i.e., DTP). In row 2, at a frequency of 280 MHz, although four symbols become corrupted due to EMD, the data are still in control. Accordingly, RS Codes chose the code word with the minimum symbol distance (i.e., 4) to the corrupted code word. Note that other valid code words in the dictionary have a minimum symbol distance of at least five relative to the corrupted code word. Unlike other categories, due to the required conditions for the occurrence of DTN, this category does not occur under most setups, and in case it occurs, the ratio of it is comparatively smaller than other categories.