# Analysis of Subharmonic Oscillation and Slope Compensation for a Differential Boost Inverter
## 2 Differential Boost Inverter under Two-Loop Control  
The system under study in this paper consists of a differential boost inverter which is obtained by connecting two identical DC-DC boost converters in parallel supplied from a common electrical energy source and feeding a floating voltage load connected between the outputs of the two converters [47; 50]. Its schematic diagram is shown in Figure 1. The current drawn by the input is shared properly between the two boost converters by the action of a CMC scheme using the difference between the two inductor currents, as will be detailed later. For that, two complementary control signals are considered to control the switches of the differential inverter. Let us denote the two connected converters as Converter 1 with inductor \(L_{1}\) and inductor current \(i_{1}\) and Converter 2 with inductor \(L_{2}\) and inductor current \(i_{2}\). Both converters are controlled in a complementary way using CMC via single Pulse-Width Modulation (PWM) scheme so that Converter 2 is phase shifted \(2\pi D\) with respect to Converter 1 at the switching time scale, \(D\) being the operating duty cycle. Namely, the difference between \(i_{1}\) and \(i_{2}\) (scaled by a sensing resistance \(r_{s}\)) is controlled using a conventional peak CMC by comparing the signal \(r_{s}(i_{1}-i_{2})\) to the signal \(r_{s}i_{\text{ref}}\). A periodic ramp signal \(v_{\text{ramp}}\) with amplitude \(V_{M}\) and period \(T\) is subtracted from \(r_{s}i_{\text{ref}}\) for slope compensation. The comparison of the signal \(r_{s}(i_{1}-i_{2})\) with the signal \(r_{s}i_{\text{ref}}-v_{\text{ramp}}\) by using a comparator and a set-reset flip-flop generate the high and low values of the pulses driving the switches as shown in Figure 1 where the block diagram of the inner current control together with the outer voltage control are depicted. The reference current for the difference between the two inductor currents is provided by an external voltage loop. The activation of the switches Q\({}_{1}\), Q\({}_{2}\), Q\({}_{3}\) and Q\({}_{4}\) is carried out as follows: the signal \(r_{s}(i_{1}-i_{2})\) is connected to the non inverting pin of the comparator whereas the signal \(r_{s}i_{\text{ref}}-v_{\text{ramp}}\) is applied to the inverting pin. The output of the comparator is applied to the reset input of a set-reset flip-flop and a periodic clock signal is connected to its set input, as shown in Figure 1, in such a way that the switch Q\({}_{2}\) and Q\({}_{4}\) are on at the beginning of each switching cycle and are turned off whenever \(r_{s}(i_{1}-i_{2})=r_{s}i_{\text{ref}}-v_{\text{ramp}}\). The state of the switches Q\({}_{1}\) and Q\({}_{3}\) are complementary to the switches Q\({}_{2}\) and Q\({}_{4}\) respectively. To fulfill the requirements of the underlying electronic application, a DC-AC inverter has to produce a periodic sinewave-shaped output voltage under normal operational conditions. Let \(v_{\text{ref}}(t)\) be the voltage reference that can be expressed as \(v_{\text{ref}}(t)=V_{\text{ref}}\sin(2\pi f_{S}t)=V_{\text{ref}}\sin(\varphi)\), where \(\varphi=2\pi f_{S}t\in(0,2\pi)\), \(V_{\text{ref}}\) is the peak value of the output voltage reference, \(\omega_{0}\) its angular frequency and \(\varphi\) its phase angle. In practical applications, the switching frequency is much higher than the AC output voltage frequency. This condition is met in this paper and it allows the use of quasi-static approximation. The error voltage \(v_{\text{ref}}-v_{o}\) is the input signal to the voltage controller of which the task is to make the output voltage of the inverter an AC sinusoidal signal with zero DC component. Therefore, the load connected between the converters outputs will be subjected to an AC sinusoidal voltage with a zero DC component. This control strategy is different from the one used in most of the published works about this inverter topology such as [44; 45; 47] where the control is performed such that each boost converter generates a DC bias and an AC component.