# Qubit-Based Clock Synchronization for QKD Systems Using a Bayesian Approach
## 4 Synchronization Simulations  
To verify that our algorithm returns an accurate probability of synchronization, we run 1000 simulated trials with a known synchronization index and compare the average calculated probability of synchronization \(p(S_{j}|B_{1},...,B_{M+N})\) to the average rate of finding the correct index, which we denote by \(f(S_{j}|B_{1},...,B_{M+N})\), in Figure 2. If our model is accurate, then \(p(S_{j}|B_{1},...,B_{M+N})\sim f(S_{j}|B_{1},...,B_{M+N})\), in which case we can take \(p(S_{j}|B_{1},...,B_{M+N})\) to be a reliable metric for quantifying our confidence in obtaining the correct \(\Delta\). We see that \(p(S_{j}|B_{1},...,B_{M+N})\sim f(S_{j}|B_{1},...,B_{M+N})\) to within our errorbars for moderate channel loss (Figure 2a). However, \(p(S_{j}|B_{1},...,B_{M+N})\) is consistently larger than \(f(S_{j}|B_{1},...,B_{M+N})\) for the case of zero channel loss (Figure 2b), a condition that is unlikely to be encountered in an experiment but highlights the limitation of our algorithm. This  
Figure 2: Bob’s required data record length needed to determine synchronization for two different channel transmissions of (**a**) \(\eta=0.05\), corresponding to \(\mu=0.05\) and (**b**) \(\eta=1\), corresponding to \(\mu=1\). We also show the probability of not obtaining synchronization, which better highlights transition to high-certainty synchronization. result is not surprising given that our derivation given in Section 2 assumes low \(\mu\) to arrive at Equation (9). Assuming a transmitted mean photon number of 1, Figure 2b corresponds to a zero channel loss system. This represents an upper limit on \(\mu\) encountered in a typical decoy state protocol where \(\mu_{A}\lesssim 1\) and thus, also serves as a lower bound on the accuracy of our calculated synchronization probability. A lower received mean photon number means a lower density of detected events. Because detected events provide more information than no-detection events, a lower \(\mu\) requires us to consider a larger set of sampling bin widths \(N\) to achieve the same synchronization confidence. Despite the fact that \(p(S_{j}|B_{1},...,B_{M+N})\) does not match \(f(S_{j}|B_{1},...,B_{M+N})\) as well at higher values of \(\mu\), we can still achieve equivalent average values of \(f(S_{j}|B_{1},...,B_{M+N})\) at lower values of \(N\). This fact is also illustrated in Figure 3, where we see a direct correlation between \(\mu\) and the \(N\) at which the synchronization probabilities converge to one. The higher values of \(\mu\) converge at lower values of \(N\). Another way to view this relation between \(\mu\), \(N\), and \(p(S_{j}|B_{1},...,B_{M+N})\) is to consider the string length \(N\) required to achieve a particular synchronization confidence as a function of \(\mu\) as shown in Figure 4. For high \(\mu\) and low \(N\), we observe an approximately linear relation between \(log_{10}\mu\) and \(log_{10}N\) with a slope of \(\sim\!\!-1\), which means that \(N\sim 1/\mu\). For lower \(\mu\), where there are fewer events and dark counts play a larger role, the probability curves exhibit steeper slopes, demonstrating that synchronization becomes increasingly difficult. This data can be used to estimate whether it is possible to synchronize over an experimentally measured temporal block length \(T_{b}\) and, if it is possible, how low a value of \(\mu\) can be tolerated while still synchronizing reliably. As a concrete example, [PERSON] needs 33,110 sampling bin widths, or about 4140 communication bin widths, to achieve a 95% confidence for clock synchronization for \(\mu=0.01\) and \(d=8\times 10^{-4}\). This means we can tolerate clock drifts approaching 1 part in 4140, or 242 us of drift per second, because our method assumes that the clock drift is much less than one communication bin width. For context, we measure the rate of clock drift between two phase lock loops driven by crystal oscillator clocks on DE10 Standard field programmable gate arrays (FPGAs), and find the average clock drift rate to be 13.5 us per second.