# FPGA Applied to Latency Reduction for the Tactile Internet
## 6 Implementation Description
### KKinesthetic Feedback Force (KFF-HMD)  
As illustrated in Figure 4, the hardware associated with the master device (HMD) implements the kinesthetic feedback force through the KFF-HMD module. Based on  
Figure 16: Proposed circuit to perform the calculation of \(\alpha[F32](n)\) (Equation (23))—IK-HSD. Figure 14: Proposed circuit to perform the calculation of \(\gamma[F32](n)\) (Equation (21))—IK-HSD. Equation (26), the KFF-HMD module was implemented in FPGA through the generic circuit illustrated in Figure 17. This circuit is composed of sub-circuits that correspond to parts of Equation (26). The sub-circuit called JM, described in Equation (28), is responsible for calculating the Jacobian matrix. The KFF sub-circuit makes the relationship between the Jacobian matrix (JM) module and the force array from Equation (38). The circuit shown in Figure 17 has the input signals \(\theta_{1}^{MD}[F32](n)\), \(\theta_{2}^{MD}[F32](n)\) and \(\theta_{3}^{MD}[F32](n)\) that are received from the master device (MD) and also the \(F_{x}[F32](n)\), \(F_{y}[F32](n)\) and \(F_{z}[F32](n)\) signals that are received from the hardware associated to the slave device (HSD). The three output signals are: \(\tau_{1}^{HMD}[F32](n)\), \(\tau_{2}^{HMD}[F32](n)\) and \(\tau_{3}^{HMD}[F32](n)\). The JM module that represents the sub-circuit responsible for performing the Jacobian matrix calculation consists of nine elements: \(J_{11}[F32](n)\), \(J_{21}[F32](n)\), \(J_{31}[F32](n)\), \(J_{12}[F32](n)\), \(J_{22}[F32](n)\), \(J_{32}[F32](n)\), \(J_{23}[F32](n)\) and \(J_{33}[F32](n)\). The calculation of \(J_{21}[F32](n)\) based on Equation (30) does not have an associated circuit since its value is 0, i.e., \(J_{21}[F32](n)=0\). Based on Equation (29), the algorithm for calculating \(J_{11}[F32](n)\) was implemented in FPGA according to the generic circuit illustrated in Figure 18. The circuit was designed to work with three input signals and one output signal. It uses the constants \(L_{1}\) and \(L_{2}\) and has three TFB sub-circuits: two for performing the cosine calculation and one for obtaining the sine value. Figure 17: Proposed circuit to calculate kinesthetic feedback force (Equation (26))—KFF-HMD. Figure 18: Proposed circuit to calculate the Jacobian matrix \(J_{11}[F32](n)\) (Equation (29))—JM. The calculation of \(J_{31}[F32](n)\), based on Equation (31), was implemented in FPGA according to the generic circuit illustrated in Figure 19. The circuit was designed to work with three input signals and one output signal. The circuit has three TFB modules, two for sine calculation and one for cosine value and uses the \(L_{1}\) and \(L_{2}\) constants. The generic circuit illustrated in Figure 20 was implemented in FPGA to perform the calculation of \(J_{12}[F32](n)\) and is based on Equation (32). The circuit was designed to work with two input signals and one output signal. The circuit has two TFB sub circuits to perform sine calculation and uses the \(L_{1}\) constant. Based on Equation (33), the algorithm for calculating \(J_{22}[F32](n)\) was implemented in FPGA according to the generic circuit illustrated in Figure 21. The circuit was designed to work with one input signal and one output signal. The circuit has a TFB sub-circuit to perform cosine calculation and uses the constant \(L_{1}\). The calculation of \(J_{32}[F32](n)\) based on Equation (34) was implemented in FPGA according to the generic circuit illustrated in Figure 22. The circuit was designed to work with two input signals and one output signal. In addition to the use of the constant \(L_{1}\), the circuit has two TFB sub circuits, one for performing the cosine calculation and one for the sine. Figure 19: Proposed circuit to calculate the Jacobian matrix \(J_{31}[F32](n)\) (Equation (31))—JM. Figure 14:0 Proposed circuit to calculate the Jacobian matrix \(J_{12}[F32](n)\) (Equation (32))—JM. The generic circuit illustrated in Figure 23 was implemented in FPGA to perform the calculation of \(J_{13}[F32](n)\) and which is based on Equation (35).