# Adhesion Behavior between Multilayer Graphene and Semiconductor Substrates
## 3 Results and Discussions
Once the number of graphene layers exceeds three, the total number of graphene layers cannot be exfoliated together; only the topmost layer can be freed. For one layer of graphene, the critical V\({}_{\text{up}}\) was 4.3 A/ps. In a two-layer graphene system, the critical values of V\({}_{\text{up}}\) to exfoliate both layers and only the topmost layer were 5.2 A/ps and 12 A/ps, respectively. In a three-layer graphene system, the critical V\({}_{\text{up}}\) to exfoliate all three layers increased to 6.98 A/ps, and the critical exfoliation velocity of the topmost layer was 12 A/ps. The critical exfoliation V\({}_{\text{up}}\) values for four layers to ten layers of graphene were in the range of 10 A/ps-12 A/ps. If the number of graphene layers was less than three, all graphene layers could be exfoliated together if the V\({}_{\text{up}}\) was in the range between the two critical exfoliation velocities. So, we propose a new bonding mechanism according to the different numbers of graphene layers: In a system where the number of graphene layers is two or three, there are two critical exfoliation velocities. Graphene cannot be exfoliated when the velocity is less than the first critical V\({}_{\text{up}}\); all graphene layers can be exfoliated together when the V\({}_{\text{up}}\) is in the range between the two critical velocities; and only the topmost layer can be freed from the Si surface if the velocity is greater than the second critical V\({}_{\text{up}}\). In systems where the graphene layer number is four to ten, only the topmost layer can be exfoliated if the V\({}_{\text{up}}\) is high enough. This means that, for two-layer or three-layer graphene systems, it is not the case that a faster exfoliation velocity will make it easier to exfoliate graphene. If the applied external velocity is in the range between the first and second critical velocities, a relatively low velocity can be used to peel all of the graphene. If the velocity is higher than the second critical V\({}_{\text{up}}\), only the topmost layer can be exfoliated, no matter the magnitude of the V\({}_{\text{up}}\). The adhesion force needed to exfoliate the topmost layer of graphene is minimal in a monolayer graphene system, with a value of 25.04 nN. This is because monolayer graphene is only subjected to the force from the Si substrate. The maximum adhesion force of 74.75 nN to exfoliate the topmost layer occurred in a three-layer graphene system, due to the maximization of the resultant forces from the Si substrate and underlying layers. If the graphene layer number is more than three, the adhesion force decreases with the increasing graphene layer number. The reason for this is mainly that the distance between the topmost layer and Si substrate increases with increasing layer numbers, so the interaction of the Si substrate with the topmost layer is decreased. Therefore, the adhesion forces needed to exfoliate the topmost layer in one-layer to ten-layer graphene systems are in the range of 25.04 nN-74.75 nN. From Figure 17, it can be seen that the adhesion energies needed to exfoliate the topmost layer in one-layer to ten-layer graphene systems are in the range of 73.5 mJ/m\({}^{2}\)-188.45 mJ/m\({}^{2}\), which is consistent with the results in the literature [11]. Figure 3:6 The critical velocities required to exfoliate the topmost layer and all layers of graphene for different numbers of graphene layers. Whether the adhesion between graphene and semiconductor substrates is firm or not will affect the yield, life, and performance of graphene-based MEMS/NEMS devices. This was deeply felt when we were fabricating a graphene-based MEMS device. In contrast, when we were fabricating traditional silicon MEMS sensors, the silicon piezoresistor was N/P-doped in the silicon substrate. Thus, the sensitive resistance bar and the substrate were all one, and it was not necessary to consider the bonding mechanism between the silicon sensitive resistance bars and the silicon substrate.