# Review of Physical Layer Security in 5G Wireless Networks
## 3 Literature Review
They examine multiple threats and attacks and offer matching countermeasures to guarantee the confidentiality, integrity, and availability of 5G networks. The main conclusions show that, in comparison to other wireless network generations, the design of 5G networks presents new security challenges. The paper gives a summary of important elements such as base stations, the core network, and user devices, as well as the security issues that are related to them. In the context of 5G networks, several security concerns and attacks, such as identity spoofing, denial-of-service assaults, and eavesdropping, are examined in order to successfully address the security challenges posed by 5G networks. The study highlights the significance of collaboration between network operators, equipment vendors, and regulatory bodies. It also emphasizes the importance of applying countermeasures and security mechanisms including secure key management, authentication protocols, and network slicing. In order to secure Internet of things (IoT) devices, [PERSON]'s [28], review study provides an overview of lattice-based algorithms as post-quantum cryptosystems. The authors discuss typical cryptographic algorithms that are vulnerable to quantum attacks and present lattice-based encryption as a viable alternative. They provide a thorough analysis of different lattice-based algorithms, including NTRU, LWE, and RLWE, emphasizing their security attributes and computing needs. The main conclusions highlight the necessity to investigate post-quantum cryptosystems because typical cryptographic algorithms are vulnerable to attacks from quantum computers. Lattice-based cryptography has the ability to protect against quantum attacks and is appropriate for IoT devices with limited resource availability. The study covers the difficulties of implementing lattice-based algorithms in IoT contexts, taking into account factors such as key size, memory needs, and energy usage. It also highlights how crucial it is to carry out more research in order to improve lattice-based algorithms for effective deployment on IoT devices while retaining the appropriate level of security. Study [29] illustrates that in order to achieve high performance, the suggested microarchitecture design for the Curve448 and Ed448 elliptic curves on the ARM Cortex-M4 CPU combines parallelization and pipelining. The elliptic curve operations are carried out in parallel by employing several datapaths. By segmenting the elliptic curve operations into stages and carrying out the stages sequentially, the pipelining is accomplished. An innovative approach to lowering the area overhead of the finite field multiplier is also suggested by the design under consideration. The new approach is based on employing a finite field multiplier with fewer bits. The proposed concept was put into operation with a Xilinx Artix-7 FPGA and proved to be up to 2.5 times faster than the prior state-of-the-art implementation. This study makes use of a 32-bit microcontroller called the ARM Cortex-M4 CPU. The article suggests a brand-new microarchitecture for this processor's Curve448 and Ed448 elliptic curves. Paper [30] shows that compression and acceleration techniques are combined to achieve great performance in the proposed Supersingular Isogeny Key Encapsulation (SIKE) Round 3 implementation on the ARM Cortex-M4 CPU. The compression is accomplished by representing the points on the elliptic curves using fewer bits. A variety of methods, such as pipelining, parallelization, and the usage of unique hardware accelerators, are used to accelerate the process. It was demonstrated that the proposed implementation, which was put into use on a Xilinx Artix-7 FPGA, could speed up processes by up to 1.5 times compared to the prior state-of-the-art implementation. Another CPU used in this study is an ARM Cortex-M4. For the SIKE Round 3 scheme on this CPU, a new compression method has been proposed in the paper.