## 3 Oscillation Analysis of FSC-VSPSU
### DC Voltage Loop and Current Loop Parameters of the Grid-Side Converter  
When changing the proportional parameter of the DC voltage loop of the grid-side converter (\(K_{\mathrm{pv}}\)), the relevant Bode diagram of the impedance matching analysis is shown in Figure 8. Specifically, the red and blue lines depicted in the figure correspond to the impedances of the grid network and the FSC-VSPSU, respectively. Additionally, the pink line denotes the phase margin curve. It is to be noted that the line designations are consistently applied across subsequent figures, and thus they will not be reiterated in their descriptions. As it can be seen, at the intersections of the impedance amplitude curves, the corresponding phase margins are relatively small at around \(0^{\circ}\), which indicates that the system will experience oscillation.  
The specific analyses are as follows. (1) When \(K_{\mathrm{pv}}\) is set to 0.5, the phase margin is approximately negative, which indicates that the system may experience oscillation. (2) When \(K_{\mathrm{pv}}\) is increased to 1, the phase margin is slightly increased and higher than \(0^{\circ}\), and thus the oscillation will be suppressed. (3) When \(K_{\mathrm{pv}}\) is further increased to 2, the phase margin slightly increases, and the oscillation will be further weakened.  
Figure 6: Equivalent impedance model of the grid-connected FSC-VSPSU.  
Figure 7: The criterion for stability based on the phase difference.  
When changing the integration parameter of the DC voltage loop of the grid-side converter (\(K_{\text{iv}}\)), the relevant Bode diagram of the impedance matching analysis is shown in Figure 9. As it can be seen, at the intersections of the impedance amplitude curves, there is a relatively significant increase in the phase margin when \(K_{\text{iv}}\) is reduced. When \(K_{\text{iv}}\) is set to 80, the phase margin is weak and close to 0; hence, this system has a risk of oscillation. Furthermore, when \(K_{\text{iv}}\) is decreased to 40, the phase margin increases to around \(15^{\circ}\), and the oscillation phenomenon that occurs in the system will be weakened to some extent. At last, when \(K_{\text{iv}}\) is decreased to 20, the phase margin further increases accordingly, and the oscillation will be further weakened.  
When changing the proportional parameter of the current loop of the grid-side converter (\(K_{\text{pc1}}\)), the relevant Bode diagram of the impedance matching analysis is shown in Figure 10. As it can be seen, when \(K_{\text{pc1}}\) is set to 2, the phase margin is relatively minimal and close to \(0^{\circ}\), which indicates that the system will oscillate. Furthermore, when \(K_{\text{pc1}}\) is increased to 4, the phase margin is increased, and thus the oscillation will be suppressed. However, when \(K_{\text{pc1}}\) is further increased to 8, the phase margin decreases, and the oscillation will reappear. Therefore, the regularity of the influence of \(K_{\text{pc1}}\) on oscillation is not significant.  
Figure 8: Bode diagram when the proportional parameter of the DC voltage loop changes.  
Figure 9: Bode diagram when the integration parameter of the DC voltage loop changes.  
When changing the integration parameter of the current loop of the grid-side converter (\(K_{\text{ic1}}\)), the relevant Bode diagram of the impedance matching analysis is shown in Figure 11. As it can be seen, when \(K_{\text{ic1}}\) is set to 50, the phase margin is weak and close to 0; thus, this system has a risk of oscillation. Furthermore, when \(K_{\text{ic1}}\) is decreased to 25, the phase margin is increased, and the oscillation phenomenon that occurs in the system will be suppressed.