# Active Equalization of Lithium-Ion Battery Based on Reconfigurable Topology
## 1 Introduction
[17] proposed a method combining Buck-Boost converters with switching matrices, which reduces the number of components and cost compared with conventional inductor equalization circuits, but the balancing speed is relatively slow. Ref. [18] put forward a DSSCE (Delta-Structured Switched-Capacitor Equalizer) circuit, which sets a separate capacitor balancing circuit for every two adjacent cells. Although the equalization speed and efficiency are improved, the complexity and cost of the system are greatly increased. The method proposed in Ref. [19] uses forward-flyback converter as the energy transfer device and can automatically balance the cells at any position in the group during charging or discharging, but the cost is high. In conventional equalization circuits, the energy to be equalized transmits from cell to cell, which leads to extra energy loss. The failure of one battery cell will lead to the failure of the whole battery pack because the cells in the battery pack are permanently connected in series [20]. Therefore, the conventional active equalization methods are not suitable for retired battery energy storage systems, which are highly unbalanced and require high robustness. To solve these problems, in this study, we adopted a new battery balancing topology called reconfigurable topology, which can isolate the lowest SOC (state of charge) battery cell or the faulty battery cell without affecting the normal operation of other cells in the pack. The earliest reconfigurable equalization topology provides the flexibility to connect or isolate any single cell from the pack while allowing arbitrary cell connections in series, parallel, or hybrid configurations. Although this topology has high flexibility, its cost, energy loss, and complexity are relatively high because every single cell needs five MOSFETs to control [21]. Later, new reconfigurable equalization topologies were developed, including series topology, DESA (Dependable, efficient, scalable architecture) topology, graph-based topology, and matrix topology [22; 23; 24]. Each topology has its advantages and disadvantages in terms of cost, flexibility, speed, efficiency, and control complexity. This paper develops the reconfigurable topology into a double-layer equalization method to enhance the efficiency and robustness of the equalization process of retired batteries. A series reconfigurable equalization topology with two MOSFETs per battery cell is selected as the topology of the inner layer. It is suitable for large-scale energy storage applications because it can improve the balancing efficiency with low cost and control complexity. Buck-Boost converters are chosen in the outer layer to solve the problem that the single reconfigurable circuit cannot output a stable voltage. The improvement of the equalization efficiency by the proposed method is verified by calculation in Section 4. Finally, the feasibility of the proposed method is validated by the simulation of a 4-series 3-parallel equalization circuit on MATLAB/Simulink in Section 5. In this paper, the battery pack means the whole battery system, a battery group is a group of \(n\) battery cells, and the working part of a battery group consists \(n\) or \(n-1\) battery cells depending on the phase of equalization. Here are some notations used in the rest of this paper. 1. \(n\): The number of cells in each battery group. 2. \(m\): The number of battery groups. 3. \(SOC_{i}\): The SOC of the \(i\)th cell in the battery group. 4. \(SOC_{gj}\): The average SOC of the \(j\)th battery group. 5. \(SOC_{\text{avg}}\): The average SOC of all the \(n\times m\) battery cells. 6. \(v_{i}\): The output voltage of the \(i\)th cell in the battery group. 7. \(V_{gj}\): The output voltage of the \(j\)th battery group (the input voltage of the \(j\)th DC/DC converter). 8. \(V_{cj}\): The output voltage of the \(j\)th DC/DC converter. 9. \(V_{\text{out}}\): The output voltage of the battery pack. 10. \(\alpha_{j}\): The duty cycle of the MOSFET in the \(j\)th DC/DC converter. 11.