## 3 Candidate Generation in Parallel Decoding of Rate-1 Nodes
### Candidate Generation Based on Partially Ordered Candidate Sets
The 17 candidates, considered with \(S_{\text{Rate-1}}=2\) and \(k_{c}=3\), are the ones not colored in red in Figure 6b. When \(k_{c}=4\), the number of candidates decreases to \(15\) as shown in Figure 6c. Setting \(S_{\text{Rate-1}}=1\) and \(k_{c}=8\) results in Figure 6d, where only the eight HDD estimates and the one candidate \(j=1\) of input path \(l=0\) are considered. ## 4 Results and Discussion

This section presents the results of error-correction performance simulations and complexity estimations in terms of the number of candidates generated in Rate1-nodes with different parameters and the number of comparators needed in the dedicated sorting units. Furthermore, we present hardware implementation results to show that applying POS- and ExPOS-based candidate generation in the Rate-1 node architectures results in decoder implementations that outperform state-of-the-art decoders. ### Error-Correction Performance

To show the error-correction performance of the presented algorithms, we evaluate Polar codes with code length \(N=1024\) and code rates \(R\in\{1/6,1/2,5/6\}\). All codes are constructed according to [23] with a design SNR of \(0\,\mathrm{dB}\) for an Additive White Gaussian Noise (AWGN) channel. Furthermore, all codes are concatenated with an outer CRC of length \(C=16\), which is placed in the most reliable bit channels of \(\mathcal{F}\). We restrict the presented results to the aforementioned parameters, due to a large design space. However, further simulations have shown that the presented results are transferable to other Polar codes \(\mathcal{P}(N,K)\). Note that the choice of \(C\) affects the error-correction performance twofold. On the one hand, CRC bits assist the selection of the correct decoding path with larger list sizes, but, on the other hand, they degrade the performance of the inner polar code by increasing its rate [17]. However, the choice of CRC is not a subject of this study and does not influence the conclusions on the presented work. Error-correction performance simulations are carried out with floating point precision. The applied simulation model uses Binary Phase Shift Keying (BPSK) modulation and an AWGN channel, which is commonly used in literature for the analysis of error-correction performance to enable fair comparisons of error-correcting codes. Using other modulations schemes or channel models is possible but is beyond the scope of this work. We simulate a maximum of \(10^{8}\) pseudo-random information words. A stopping condition of \(10^{3}\) erroneous decoded blocks is applied. To show that PO-Fast-SSCL decoding matches the error-correction performance of SCL decoding, the FERs for code rates \(R\in\{1/6,1/2,5/6\}\) of both decoding algorithms are shown in Figure 8.

In Figures 9-11, all plots exhibit the FER of LLR-based SCL decoding [17] with list sizes \(L\in\{2,4,8,16\}\) as reference. The curves labeled with \"POS\" and \"ExPOS\" result from POS-Fast-SSCL and ExPOS-Fast-SSCL decoding, respectively. All values in the set of \(S_{\text{Rate-1}}\) belong to the corresponding value in the set of list sizes \(L\). We omit the subscript of \(S_{\text{Rate-1}}\) in the legends of the plots for lack of space. For the sets of \(k_{c}\), the same applies as for the sets of \(S_{\text{Rate-1}}\). The combination of \(L=2\) and \(S_{\text{Rate-1}}=1\) is a special case, since \(S_{\text{Rate-1}}=P=L-1\), and, therefore, PO-based candidate generation directly provides the minimal number of candidates. Thus, PO-, POS- and ExPOS-based candidate generation are equal for \(L=2\). As input to the threshold approximation for ExPOS-Fast-SSCL decoding presented in Algorithm 2, we chose the target \(\text{FER}=10^{-5}\) and \(\Delta=0.02\,\mathrm{dB}\). In Figures 9-11, the curves plotted in violet and orange represent the FER observed for the parameter sets of \(S_{\text{Rate-1}}\) being rated as insufficient and sufficient, respectively, by Algorithm 2 for POS-Fast-SSCL decoding.