A High-Efficiency GaN-on-Si Power Amplifier Using a Rapid Dual-Objective Optimization Method for 5G FR2 Applications  
[PERSON]  
School of Electronics and Communication Engineering, Guangzhou University, Guangzhou 510006, China; [EMAIL_ADDRESS] (L.P.) gzu_jian@gzhu. many benefits, mmWave technology faces high-frequency-related problems, including severe path, penetration, and blockage losses [3]. Moreover, modern wireless systems impose stringent requirements on size, weight, power, and cost (SWaP-C), creating considerable challenges for designing mmWave front-end modules [4; 5], particularly the power amplifier (PA), which directly affects signal quality, coverage, and energy consumption. Therefore, to address the ever-growing demand for data, support multiple communication standards, and ensure a high-quality user experience, the development of efficient mmWave PAs with a small footprint and a watt-level output power (P\({}_{\text{out}}\)) over a wide bandwidth has become a key research focus. The performance bottleneck for PAs is essentially dictated by the device technology. As a leading third-generation wide-bandgap semiconductor, gallium nitride (GaN) offers outstanding properties, including a high breakdown electric field, high saturation velocity, and good thermal conductivity. These inherent advantages enable GaN high-electron-mobility transistors (HEMTs) to achieve a better frequency response, operate at higher bias voltages, and sustain greater power densities [6]. Compared to silicon-based processes such as CMOS and SOI, which typically require transistor stacking to increase the voltage swing under the same current conditions [7; 8], or gallium arsenide (GaAs) counterparts, which rely on bulky and lossy power-combining networks to attain comparable P\({}_{\text{out}}\)[9; 10], the adoption of GaN devices simplifies the circuit design and eases thermal management. These features make GaN PAs ideal for mmWave communication systems that demand compact, lightweight, and high-efficiency solutions [6; 11; 12; 13; 14; 15; 16]. In addition to device-level considerations, the pursuit of both broadband operation and high efficiency in PAs necessitates careful circuit design. Nevertheless, these two goals are often mutually restrictive. Ensuring broadband impedance matching and a flat frequency response may result in reduced efficiency over part of or even the entire operating band, whereas optimizing the matching network (MN) for peak efficiency at specific frequencies inevitably sacrifices bandwidth. Numerous studies have illustrated this inherent contradiction. For instance, distributed amplifiers utilize artificial transmission lines to absorb the parasitic capacitance of transistors, enabling a multi-octave bandwidth but at the expense of low gain, poor power-added efficiency (PAE), and large chip area [17]. Balanced amplifiers leverage a pair of quadrature couplers to cancel the reflections caused by mismatches at the circuit's input and output, thereby achieving an excellent broadband voltage standing wave ratio and stability, but they also incur a higher insertion loss, which degrades the PAE [5]. Others, comprising switch-mode PAs (Class E, F, F\({}^{-1}\), etc.) that rely on harmonic control or waveform shaping to minimize the overlap between the output voltage and current [18; 19], as well as Doherty PAs that use a load modulation technique, have also been extensively researched [20]. Overall, taking all of the necessary trade-offs into account, the most cost-effective solution lies in the design and optimization of the MN. One category relates to a CAD-dependent numerical optimization methodology, with the simplified real-frequency technique (SRFT) as a notable example. The SRFT enables the construction of a broadband MN by optimizing the transducer power gain function based on acquired load data, without predefining any topology [21]. However, a robust and computationally expensive optimization algorithm ought to be employed in order to obtain the globally optimal solution.