# Safety-Oriented System Hardware Architecture Exploration in Compliance with ISO 26262
## 2 Related Works  
To implement the safety-oriented system architecture exploration framework, there are two infrastructural technical bases; one is the safety analysis and the other is the safety improvement. In this section, related works for these two technical bases are discussed and compared to our proposed framework. In [5], an accurate and well-explained practical guide to the specific techniques appropriate for PMHF (probabilistic metric for hardware failure) calculation using FTA was proposed. This paper presented a structured and systematic quantitative FTA while showing various schemes for calculating the PMHF considering both single-point faults and dual-point latent faults. In [6], the author performed quantitative assessments of ISO-26262 hardware architecture metrics by means of a fault tree analysis. A custom coverage gate was firstly proposed to represent the diagnostic coverage related to a safety mechanism. The advantage of introducing the coverage gate is to reduce the complexity of fault tree construction. The author of [7] presented generalized formulas for the calculation of PMHF in non-redundant and redundant subsystems using observable parameters, such as the failure rate of a mission function and a safety mechanism, the diagnostic coverages of the primary and secondary safety mechanisms, and the diagnostic period of the secondary safety mechanisms to expand the scope of the application according to ISO 26262. A mixed model based on FTA and the Markov chain was proposed in [8] to evaluate random hardware failures of the whole-redundancy system in ISO 26262. The mixed model presented in [8] tried to solve the problem of calculating the PMHF in the whole-redundancy system, whose fault tree only contains several dynamic logic gates. Another study [9] illustrated the application of hardware reliability calculation procedures according to the ISO 26262 standard. This paper described computational procedures with the derivation and explanation of mathematical formulas for various hardware architectures of electronic systems. The described formulas consider the impact of multiple failures and the impact of self-tests, but the formulas are relatively simple. The research in [10] aimed to provide a framework for quantitative FTAs, while considering periodic inspections and repairs, which are the key assumption of the standard. The framework is based on models of the Markov stochastic process and the PMHF equations derived from those models. Further research [11] considered the design-phase safety analysis of vehicle guidance systems. The proposed approach constructed dynamic fault trees (DFTs) to model a variety of safety concepts and E/E architectures for drive automation. Our previous work [12] proposed an FTA-based weak-point analysis methodology for the safety-critical automotive systems, but only the safety metric, PMHF, was considered. On the other hand, previous literature [13; 14; 15; 16; 17; 18; 19; 20; 21; 22; 23] has demonstrated how to accomplish safety improvement through architecture exploration, which take both the overall system safety and hardware overhead as the design metrics. Reference [13] was a survey paper that collected and compared the published literatures addressing the safety-oriented system architecture exploration in recent years. According to [13], combined with our survey results, we find that recent studies [14; 15; 16; 17; 18; 19; 20; 21; 22; 23] have proposed the feasible solutions for safety-aware hardware cost-optimization techniques. The main idea of [14; 15; 16; 17] is to identify the removable hardware elements in an existing system hardware architecture so the system safety and operation performance requirements can still be met. For example, a processor core is removable if the tasks allocated to this processor can be ported to other processors without violating the safety and timing requirements. Therefore, the hardware overhead can be reduced after removing these identified hardware elements.