## 5 Performance Evaluation
### Prototype Implementation  
The comparison of ranging accuracy and data transmission reliability has been simulated in the previous subsections, and here, we focus on the validation of the feasibility of the proposed navigation receiver architecture in a practical system. We implement a prototype of the INAC system for DDBDM based on the SDR, and develop a software receiver utilizing the architecture proposed in Section 4. The hardware system based on the SDR is shown in Figure 13. The system includes two universal software radio peripherals (USRPs), transmitting and receiving terminals (Tx and Rx computers), a radio frequency (RF) attenuator, and a low-noise amplifier (LNA). The transmitting terminal generates the DDBDM discrete-time baseband signal file. The USRP hardware driver (UHD) program transmits the signal to the USRP via a network cable, and conducts digital-to-analog conversion. Another USRP down-converts and samples the analog signal, which passes through an RF attenuator and LNA. Subsequently, the UHD transmits the signal to the receiving terminal and saves it as a signal file. Finally, the software receiver processes the signal file to verify the feasibility of using DDBDM for navigation. The RF attenuator and LNA in the RF link jointly form an AWGN channel, where the RF attenuator can be adjusted to obtain the desired SNR. The effects of the high-mobility channel (maximum Doppler shift and Doppler rate of 0.91 ppm and 0.09 ppm/s, respectively) are considered in the INAC signal generation. As the navigation receiver processes LOS signals, it is justified for the validation of the navigation function in this channel. The Ka-band exceeds the carrier frequency of most commercial SDRs, and the RF is reduced from 20 GHz to 2 GHz. The maximum Doppler shift and Doppler rate are  
Figure 13: A photograph of the INAC system prototype. still set to 0.91 ppm and 0.09 ppm/s, respectively [54]. The master clock rate of USRP N210 is 100 MHz, and the sampling rate supported is limited to dividing the master clock rate by an integer factor. Therefore, the sampling rate of the transmitted signal is set to \(f_{\mathrm{s}}\) = 20 MHz, the subcarrier spacing is \(\Delta f\) =100 kHz, and the numbers of total subcarriers, navigation subcarriers, and zero-padding subcarriers are \(M\) = 188, \(M_{n}\) = 88, and \(M_{p}\) = 12, respectively. The sampling frequency for the navigation signal receiver is set to 10 MHz, and the RF center frequency should be offset by half of the navigation signal bandwidth, i.e., 1.995 GHz, based on 2 GHz. The SNR is 5 dB, and the CNPR is 23 dB, so the \(C/N_{0}\) of the navigation signal is 55 dB-Hz. The coherent integration time \(T_{coh}\) = 0.16 ms (a signal frame duration), the noncoherent integration time is 1.6 ms, and the Doppler frequency search step of the PCS method is set to 6.25 kHz. The equivalent noise bandwidth of DLL is 0.2 Hz, the early-late spacing of the correlator is 0.5 chip, the PLL bandwidth is 60 Hz, and the other parameters are consistent with Table 2.  
Figure 14 shows the acquisition result of the DDBDM signal. The code phase (delay) is at the 2863 rd sample. The peak of the correlation values is located at \(-\)12.5 kHz and the fine Doppler frequency is calculated as \(-\)12.6 kHz. This result is used to initialize the tracking loop. Figure 15 shows the corresponding tracking results. The navigation message demodulation constellation and message bits are located on the top-left and top-right of the panel, respectively. The result indicates that even if the transmitted navigation message is spread by the PRN code mapping in the DD domain, the UE still measures the pseudo-range and demodulates the navigation message in the time domain. The bottom-left of the panel shows the Doppler frequency output by the PLL through the loop filter, which is consistent with the dynamic of 1.8 kHz/s (0.09 ppm/s \(\times\) 20 GHz). The bottom-right of the panel shows the magnitude of the correlation function output from the DLL.