# A g\({}_{m}\)/I\({}_{\rm D}\)-Based Low-Power LNA for Ka-Band Applications
## 4 Conclusions  
The design of a low-power Ka-band cascode LNA using the g\({}_{m}\)/I\({}_{D}\) methodology is discussed in this work. The proposed circuit achieves a very low power consumption of only 1.98 mW. In addition, it is the first time the g\({}_{m}\)/I\({}_{D}\) approach is applied at Ka-band frequencies. The proposed circuit is developed with the 45 nm SOI PDK components. The LNA has a central frequency of 28 GHz as the circuit operates in the n257 frequency band defined by 3 GPP NR for European mm-wave communications. The design approach presented involves the g\({}_{m}\)/I\({}_{D}\) methodology to exploit the advantages of sub-threshold operation in a high-frequency scenario, biasing devices in the moderate inversion region for a remarkable performance trade-off. A single MATLAB script is used to generate all the sweeps and the simulation netlists, to run the SPECTRE simulations, and to map the desired parameters in a multidimensional.MAT file containing all the LUTs needed to perform automated circuit design. We explore the procedure by providing a design example, from scratch to post-layout simulations, of a Ka-band cascode LNA obtaining a very-low-power, high-performance amplifier. The final circuit draws 1.98 mW from a DC supply of 0.9 V with a chip size of 0.43 mm\({}^{2}\) excluding pads. After post-layout parasitic extraction and EM analyses, the circuit exhibits a gain of 11.4 dB, an NF of 3.8 dB, and an IRL better than 12 dB across the band of interest. Finally, a comparison is made with similar works available in the literature. The proposed circuit shows a very high performance, since the amplifier obtains a gain and NF in line with other works and a very low power consumption of only 1.98 mW.  
**Author Contributions:** Methodology, J.d.P., S.L.K. D.G.-S. and J.T.-C.; Investigation, J.d.P., S.L.K., D.G.-S. and J.T.-C.; Supervision, J.d.P., S.L.K. D.G.-S. and J.T.-C.; Writing--original draft, D.G.-S. and J.T.-C.; Writing--review and editing, S.L.K. and J.P.; Visualization, J.d.P., S.L.K., D.G.-S. and J.T.-C.; Project administration, J.d.P., S.L.K., D.G.-S. and J.T.-C.; Funding acquisition, J.d.P. and S.L.K. All authors have read and agreed to the published version of the manuscript.  
**Funding:** This work has been partially supported by grants PID2021-127712 OB-C21 and PDC2023-145828-C22 funded by MCIN/AEI/10.13039/501100011033 (ERDF a way of making Europe, European Union Recovery and Resilience Mechanism), by the Canary Agency for Research, Innovation, and Information Society (ACIISI) by the TESIS2019010100 grant (European Social Fund) and by the Spanish Research Program \"INVESTIGO\" awarded to the \"Fundacion Canaria Parque Cientifico Tecnologico\" funded by the Canarian Employment Service.  
\begin{table}
\begin{tabular}{c c c c c c c} \hline
**Reference** & **This Work** & [41] & [42] & [43] & [44] & [29] \\ \hline \multirow{2}{*}{Tech.} & 45 nm & 45 nm & 65 nm & 22 nm & 22 nm & 45 nm \\  & SOI & SOI & CMOS & SOI & SOI & SOI \\ \hline BW (GHz) & 25.5–29.5 & 21–28 & 23.5–32.5 & 24–28 & 26.6–31.6 & 14–31 \\ \hline Centre Freq. (GHz) & 27.5 & 24.5 & 27.5 & 26 & 29.1 & 22.5 \\ \hline Supply (V) & 0.9 & 1 & 1 & 0.8 & 1.6 & 1.5 \\ \hline Max Gain (dB) & 11.4 & 19.5 & 17.2 & 7 & 19.3 & 12.8 \\ \hline Threshold Gain (dB) & 8.4 & 16.5 & 14.2 & 4 & 16.3 & 9.8 \\ \hline NF (dB) & 3.5–3.8 & 4.7 & 2.8–3 & 5 & 5.2 & 1.4 \\ \hline IRL (dB) & 12.7 & – & 25 & 6 & 10 & 10 \\ \hline ORL (dB) & 10 & – & – & – & 10 & 10 \\ \hline P\({}_{DC}\) (mW) & 1.98 & 59 & 28.5 & 4.6 & 11.4 & 15 \\ \hline Meas./Sim. & Sim & Meas. & Meas. & Meas. & Meas. & Meas. \\ \hline FoM\({}_{IC}\) & 3.03 & 0.14 & 0.4 & 0.608 & 0.65 & 2.08 \\ \hline Core area (mm\({}^{2}\)) & 0.43 & 0.42 & 0.157 & 0.1 & 0.27 & 0.3 \\ \hline \end{tabular}
\end{table}
Table 2: Overview of similar state-of-art LNAs with the proposed circuit.