## 6 Discussion  
This article proposed inserting \(\pi/2\) rad phase difference between the carrier waves of dual VSIs driving dual PMSMs to reduce the dc-link capacitor current. The harmonic of the inverter input current is analyzed mathematically by the double Fourier series method to determine the frequency spectrum of the dc-link capacitor current and then simulated in MATLAB program to observe the dominant harmonics of the inverter input current. The mathematical analyzes and simulation results show that inserting \(\pi/2\) rad phase difference between the carrier waves of the VSIs cancel the dominant harmonic of the dc-link capacitor current. In addition, two PMSMs are driven by the FOC algorithm and SVPWM technique in the PLECS simulation program. The simulation results of the PLECS are compatible with  
Figure 19: Dc-link capacitor current for varying speed of PMSM-2. Figure 20: Temperature of dc-link capacitor. the mathematical analysis and results of the MATLAB. The PMSMs are driven for different scenarios, and the results show that the dominant harmonics of the dc-link capacitor current are eliminated or decreased so that the ripple current of it is reduced. Two PMSMs are used in the experiments for different operating conditions similar to the simulations. In the simulations, the maximum reduction in the capacitor current is around 75%, while in the experiments, it is approximately 60%. One of the reasons for this difference is that the impedance of the battery bank and dc-link capacitor is not measured correctly for different frequencies and not simulated with the exact values. As a result, all the pulsating current, i.e., harmonics, flows through the dc-link capacitor in the simulation. However, some of this current comes from the power supply in the experiments. In addition, even though the VSIs and PMSMs are the same in this experiment, there are slight differences between these two modules due to the experimental setup. For these reasons, the reduction in the dc-link capacitor current in the experiment is slightly less than the simulation results. According to the experimental results, the proposed method reduced the capacitor temperature by 20 \({}^{\circ}\)C. The most commonly used capacitor lifetime equation is expressed as follows [3]:  
\[L=L_{0}\bigg{(}\frac{V}{V_{0}}\bigg{)}^{-n}\times 2^{\frac{T_{0}-T}{10}} \tag{29}\]  
where L\({}_{0}\) and L represent the initial and resulting lifetimes, V\({}_{0}\) and V are the base and applied voltages, and T\({}_{0}\) and T indicate core temperatures under the test and operating conditions. The parameter \"n\" is the voltage stress exponent. Based on this formula, the proposed method increases the lifetime of the capacitor by a factor of four. The proposed method introduces a phase shift between the carrier waves of the VSIs, in particular to reduce the second carrier harmonic component of the dc-link capacitor current. Since the two VSIs operate independently, and one of the carrier references is delayed with respect to the other, there is no effect of extreme operating conditions or disturbances on the proposed method. In other words, both PMSMs operate independently like a single motor and a single VSI. Therefore, this approach is independent of the motor dynamics and controller parameters of the VSIs. This technique focuses on the interaction of carrier signals rather than real-time motor operation. Therefore, both VSIs and PMSMs can continue to operate independently and stably without being affected by this technique. Furthermore, non-standard load configurations or extreme operating conditions do not have any impact on the effectiveness of the proposed method. The proposed method requires that there is a \(\pi/2\) radian phase difference between the carrier waves, which should be constant in real time. To achieve this, both inverters should be controlled by the same controller or both carrier waves should be synchronized.