## 7 Experimental Verification  
Figure 32 shows the prototype of the designed digitally controlled PFC boost converter with the input EMI filter, boost converter, DSP control board, 20 A Hall current sensor and the designed isolated input output voltage sensors. The experiments were performed under the same operating conditions and circuit components values as those for the PSIM simulations shown in Table 1. The manufacturing description and part numbers for the components which used in the implementation of the boost converter are shown in Table 3.  
The photograph for the experimental setup of the PFC boost converter with the designed voltage sensors and DSP interface board using TMS320 F28335 DSP from Texas instruments is shown in Figure 33.  
The designed converter performance was tested with using the maximum available load in our lab with power rating about 1000 W KIKUSI PLZ, Japan, 2019, DC electronic load at the rated input voltage of (220 V, 60 Hz). The DSP code for TMS320 F28335 was debugged and uploaded to the MCU using code composed studio (CCS), the PI controller was implemented in the voltage loop control with the different control techniques in the inner current control loop. The implemented voltage control loop able to control the output voltage to about 400 V with ripple voltage (peak to peak) of about 2.93% (11.70 V) which is less than the design specification of the output voltage ripple (20 V) as shown in the input-output voltage waveforms in Figure 34. \begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline
**Parameter** & \multicolumn{3}{c}{**With Conventional PI Controller**} & \multicolumn{3}{c}{**With Proposed IP Controller**} \\ \hline Load condition (W) & 625 & 1250 & 1875 & 2500 & 625 & 1250 & 1875 & 2500 \\ THD\% & 34.80 & 26.50 & 21.39 & 19.37 & 30.20 & 20.70 & 11.00 & 5.23 \\ PP\% & 93.86 & 96.38 & 97.52 & 98.31 & 94.50 & 96.60 & 99.12 & 99.93 \\ Power Losses (W) & 15.69 & 22.90 & 30.90 & 38.40 & 11.40 & 18.00 & 26.10 & 34.00 \\ Efficiency\% & 97.48 & 98.17 & 98.35 & 98.47 & 98.18 & 98.57 & 98.13 & 98.66 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Performance of the designed CCM-PFC with different loading conditions. Figure 32: Prototype of the designed digitally controlled PFC boost converter. With using of the conventional PI current controller and with using load of 1000 W, the designed converter total power losses were about 33 W with efficiency about 96.70% and input power factor of about 96.10%. The implementation of the proposed IP controller in the inner current control loop reduced the total power losses to about 24.50 W, increased the efficiency to about 97.55% and the input power factor to about 97%. And, the highest budget (10.5 W) of these losses was accounted by the bridge rectifier internal resistance. Figures 37 and 38 shows the experimental results for the input supply voltage and current with using the conventional PI and the proposed IP controllers respectively at 25% loading condition, which we can clear notice the zero-crossing distortion period (ZCD) of about 3.25 ms due to the slow dynamic response of the PI controller, and also notice the distortion in the current waveform due to operation mode transfer of the boost converter from CCM to DCM with light load condition [34]. The proposed IP controller reduced the ZCD period to about 3.05 ms but the current waveform still contains some distortions due to converter working in the DCM mode at light load condition. Figure 37: Experimental waveforms of the supply voltage-current with the conventional PI current controller at 25% loading condition. Figure 36: Experimental waveforms of the supply voltage-current with the proposed IP controller. The designed PFC boost converter based on the IP current controller in the inner current controller present lower THD with high efficiency, even higher than the conventional techniques based on the PI controller.