# Design and Analysis of Heavily Doped n+
## 2 The Proposed Device Structure  
### Proposed Heavily Doped n\({}^{+}\) Pocket AJ DG MOSFET  
Heavily n\({}^{+}\)-doped pocket AJ DG MOSFET has two gates arranged in such a way that they are asymmetrical to each other, as shown in Figure 1. A heavily doped n\({}^{+}\) pocket region is introduced towards the source side of the MOSFET. The gate contact material used is p\({}^{+}\) polysilicon. HfO\({}_{2}\) is a high-k dielectric material and is used as a gate oxide. Thin-film Si silicon is used as material for the drain, source and channel. The doping concentration of the source region is kept high, equal to that of the n\({}^{+}\) pocket region, which improves the ON current of the device. The doping of the drain region is lowered, as that lowers the OFF-state current, therefore providing better I\({}_{\text{ON}}\)/I\({}_{\text{OFF}}\). The channel length of the devices varies depending on the ON and OFF state. During the ON state of the MOSFET, the channel length is the length of the overlap region between the two asymmetrical gates, and during its OFF-state, the channel length is the total channel length excluding the length of overlap between the gates. Figure 2 shows the meshing of the device in Visual TCAD, which is based on Genius Device Simulator and is capable of 3D simulation on a colossal scale. The advantages of this simulator are scalability, parallelism and extensibility. Parallel computation used in Genius makes the simulation faster by ten times. The meshing of the channel and oxide is kept tight and should be equal to \(\frac{1}{10}th\) of their area, as is shown in Figure 2. The device is simulated in 3D and extended up 1 \(\upmu\)m in the z-direction. Table 1 shows the dimensions of the heavily doped n\({}^{+}\) pocket AJ DG MOSFET. The length of the gate (Lgate) is 20 nm, the length of the overlap region(Loverlap) is 10 nm, the thickness of the silicon (Tsilicon) is 6 nm, the length of the source/drain (Lsource = Ldrain) is 8 nm, the thickness of the oxide (Toxide) is 1 nm, the doping concentration of the pocket region (n\({}^{+}\) doping) is \(1\times 10^{22}\) cm\({}^{-3}\) and the doping concentration of channel region II (n\({}^{+}\) doping) is \(1\times 10^{19}\) cm\({}^{-3}\). The total channel length(Lchannel), i.e., the length of channel region I plus the length of channel region II, is 30 nm. \begin{table}
\begin{tabular}{c c} \hline \hline
**Region** & **Dimension** \\ \hline Gate length (Lgate) & 20 nm \\ Length of the overlap region (L-overlap) & 10 nm \\ The thickness of silicon (Tsilicon) & 6 nm \\ Length of the pocket region & 10 nm \\ Length of source/drain & 8 nm \\ Gate oxide thickness (Toxide, HfO2 as Dielectric material) & 1 nm \\ Doping Concentration of pocket region & \(1\times 10^{22}\) cm\({}^{-3}\) \\ The doping concentration of channel region II & \(1\times 10^{19}\) cm\({}^{-3}\) \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Dimensions of the AJ DG MOSFET with n\({}^{+}\) pocket region. Figure 1: Structure of heavily n\({}^{+}\)-doped pocket AJ DG MOSFET. Figure 2: The meshing of the heavily n\({}^{+}\)-doped pocket AJ DG MOSFET in TCAD. Performance Analysis of Heavily Doped n\({}^{+}\) Pocket AJ DG MOSFET  
Figure 3 compares the ON and OFF state of the device with and without the n\({}^{+}\) pocket region. It is observed that AJ DG MOSFET with an n\({}^{+}\) pocket region shows a higher I\({}_{\text{ON}}\)/I\({}_{\text{OFF}}\). ratio compared to AJ DG MOSFET without an n\({}^{+}\) pocket region. Table 2 represents a comparison of performance parameters between the different device structures. I\({}_{\text{ON}}\)/I\({}_{\text{OFF}}\), the ratio of the heavily doped n\({}^{+}\) pocket AJ DG MOSFET, is 10\({}^{13}\), which is higher than other structures, which indicates that the performance of the proposed device is better. Subthreshold slope (SS) is a short-channel effect which occurs in the subthreshold region due to leakage of current. It is calculated by the formula \(\frac{dV_{gs}}{d(logI_{d})}\).