## 1 Introduction  
Satellite communication (SATCOM) can be used to build a global coverage, high-capacity, low-latency space-based communication system to provide high-speed Internet services worldwide. SATCOM is expected to represent an indispensable connectivity option in the future, particularly for areas with high population densities or inadequate telecommunication facilities [1, 2, 3]. Historically, mechanical structures have mostly been used for satellite alignment at SATCOM terminals; however, this method requires bulky motors and servos, and is incapable of quickly switching between different satellites [4, 5]. The new generation of SATCOM systems, such as the Starlink platform, are expected to operate by deploying satellites with faster travel speeds into low-earth orbit. Recently, more advanced active phased arrays have begun to be used for SATCOM, achieving fast beam-steering and tracking via electronic scanning [6, 7]. And for portable usage, ground terminals are required to achieve lower profiles and higher reliability [8, 9, 10, 11]. Planar phased arrays can achieve very low-cost and profile terminal applications by benefiting from advances in silicon-based multichannel beamformer chip technology, as well as multilayerprinted circuit board (PCB) manufacturing. The modern PCBs used for SATCOM applications not only include antenna and radio frequency (RF) interconnection components, but also the control and power supply lines of the RF chip. This has led to increasingly complex multilayer PCB designs. The antenna elements and beamformer chips are distributed on both sides of modern multilayer SATCOM PCB, and the RF signal is connected through the RF lines and vertical interconnection structure inside the PCB--which further increases their complexity and difficulty to design. The research team of Prof. [PERSON] at the University of California San Diego has designed a number of planar phased arrays that have been used in 5G- and SATCOM-based applications [7; 12; 13; 14]; however, most of these have relied on the traditional PCB manufacturing process, which is not very flexible in terms of designing vias. Although it can be designed through vias, blind vias and buried vias of three types of vias, but each type of vias must penetrate through a single-layer substrate on both sides. In addition, this process is also limited in the number of PCB laminations it can handle, as too many laminations can lead to a range of processing problems during fabrication. In addition, when the traditional multi-layer PCB uses the vias to interconnect the layers, there are often some redundant stubs, which will lead to the mismatch of the RF link and affect the transmission of the RF signal. Some planar array use a back drill process to mechanically remove these stubs [15]. However, the precision of this process is difficult to control, and it is not possible to completely remove the stubs. This can result in parasitic parameters that can affect the impedance matching of RF circuits. There are also paper that uses HDI (High Density Interconnection) technology to design the planar phased array [16; 17]. Although this approach can flexibly utilize micro-vias for interconnections between different PCB layers, its strict requirements for prepregs and limitations in via depths often hinder its use for multilayer PCB design. As a result, the HDI process is often used to design the RF feed sections of multilayer PCBs, but not the more complex antenna sections. In this article, a SATCOM receive (RX) phased array based on a novel copper paste sintering interconnection technology [18; 19; 20; 21] is designed for \(Ku\)-band application. Compared with the traditional PCB process and HDI process, the copper paste sintering process has greater flexibility in the design of multilayer PCB. This process can reduce the profile thickness of the PCB by reducing the number of laminations, and can also avoid the generation of copper stubs, and can be applied to any stackup position of the multilayer PCB.