# Fast Performance Evaluation for Switched-Capacitor Converter Based on Convolutional Neural Networks
## 2 Power Loss and Efficiency Analysis of Switched-Capacitor DC/DC Converters
* The switches and all other conductive interconnects are ideal. * The current flowing between the input and output are impulsive. * The voltage of each capacitor and all sources are constant. SSL is used to describe the capacitor charging and discharging losses. The output impedance of an SCC can be analyzed through the synergy between FSL and SSL. These assumptions can only be applied to SCCs, not to other circuits, because of their substantive characteristics. SCCs feature high-order state equations and few operation phases, which makes their analytical expression difficult to obtain. Moreover, the capacitor voltage is approximately constant because the capacitor value is large enough, while the capacitor voltage in other types of circuits is time-varying. The core idea behind the FSL and SSL approach is the decoupling of voltage and current by assuming that the voltage of each capacitor and source is constant without being affected by current condition. These assumptions simplify the high-order differential equations to linear equations based on [PERSON]'s current law (KCL) and [PERSON]'s voltage law (KVL), overcoming the existing analytical calculation problem. Hence, the charge flow condition can be described by the charge transfer vector (CTV). The CTV corresponds to the charge flow in each respective phase of the SCC. Each element in the vector corresponds to a specific capacitor or independent voltage source, and describes the charge flow normalized by the output charge in one switching cycle \(q_{out}\). CTV can be defined as  
\[a^{1}=[q_{out}^{1}\quad q_{1}^{1}\quad\dots\quad q_{n}^{1}\quad q_{in}^{1}] \tag{4}\]  
where superscript means that the charge transfer occurs in phase 1 of the switching period. The acquisition of output impedance is on the basis of charge flow condition presented by CTV. Unfortunately, the calculation of CTV is not as simple as expected [18]. The volt-ampere characteristic of the element is lost due to the assumption that the voltages are constant, making it impossible to calculate each element by CTV in certain topologies; these are called ill-posed SCCs. Contrary to mainstream opinion, the charge flow condition in ill-posed circuits is both determined by the configuration and influenced by electrical parameters such as the switching frequency, capacitor value, etc. As shown in Figure 2, the simplest ill-posed SCC is the interleaved Doubler. It is evident that an interleaved Doubler is composed of two identical subcircuits which operate in complementary mode to down-convert a DC voltage to half, as shown in Figure 2. In order to obtain the CTV of an interleaved Doubler, the node current equation can be presented using [PERSON]'s current law (KCL), as follows:  
\[a_{out1}+a_{out2}=1 \tag{5}\] \[a_{c1}=a_{out1}-a_{c2}\] \[a_{c2}=a_{out2}-a_{c1}\]  
where \(a_{out1}\) and \(a_{out2}\) are the output charge coefficient in phase 1 and phase 2, respectively. After a simple calculation, we can obtain  
\[P_{\text{gate}}=\sum_{Q_{i}}\frac{V_{gs}Q_{g}}{T_{s}} \tag{1}\]0 \[P_{\text{gate}}=\sum_{Q_{i}}\frac{V_{gs}Q_{g}}{T_{s}} \tag{1}\]1  
From the above calculation, we can only obtain the sum of capacitor charge coefficients \(a_{c1}\) and \(a_{c2}\) instead of each precise value. It is interesting that the two capacitors are parallel equivalently without sharing the same voltage in two phases. This type of circuit is classified as an ill-posed SCC, as the number of independent capacitors is more the number of KCL equations derived from the topology. In the case of voltage and current decoupling, it is not possible to find the flow condition of the charge on the capacitors. In order to analyze the charge flow condition, the equivalent series resistance (ESR) of the capacitor must be taken into consideration as well. The equivalent circuit in each phase is shown in \[P_{\text{gate}}=\sum_{Q_{i}}\frac{V_{gs}Q_{g}}{T_{s}} \tag{1}\]2 The state equation for phase 1 can be calculated as  
\[\left\{