## 7 Discussion  
A novel deterministic design methodology is introduced to enhance the performance of a two-stage low-noise amplifier (LNA). The primary objective is to develop a three-stage LNA that achieves the lowest possible noise figure and the maximum available gain, while ensuring proper input and output impedance matching to the reference impedance. The first and second stages utilize a deterministic design based on inductive feedback, whereas the third stage is designed using load-pull simulations to optimize the input and load impedances for maximum output power and gain. Small-signal and noise measurements were conducted, along with electromagnetic (EM) simulations under continuous-wave (CW) and pulsed excitations, to evaluate the reliability and robustness of the LNA when exposed to high-intensity electromagnetic pulses.  
The bias voltages and currents of the transistors were carefully selected to ensure optimal performance in terms of gain, noise figure, and bandwidth. Specifically, the biasing points were chosen to strike an effective balance between achieving a low noise figure and maintaining adequate power gain. However, we recognize that power consumption remains a critical consideration in modern circuit design, particularly for energy-efficient systems, as highlighted in Table 6. To reduce power consumption, several strategies can be considered, including:  
* Optimize the biasing points to minimize the total current while maintaining performance. This could involve fine-tuning the VGS and VDS values based on a more detailed optimization process, considering the specific trade-offs for noise, gain, and power efficiency.
* Exploring the use of lower power transistors or alternative technologies that offer similar performance with reduced power requirements.  
These techniques can help reduce power consumption without sacrificing performance, and we will consider them in future iterations of the design.  
**Author Contributions:** Conceptualization, F.A. and P.E.L.; methodology, F.A.; software, F.A.; validation, F.A., P.E.L. and E.L.; formal analysis, F.A. and P.E.L.; investigation, W.C., S.C. and A.S.; measurements, W.C., S.C. and A.S.; resources, P.E.L.; writing--original draft preparation, F.A.; writing--review and editing, P.E.L.; supervision, E.L.; project administration, E.L.; funding acquisition, P.E.L. and E.L. All authors have read and agreed to the published version of the manuscript.  
**Funding:** This research received no external funding.  
**Data Availability Statement:** Data are contained within the article.  
**Acknowledgments:** The authors thank [PERSON] and the Customer Engineering Department at WIN Semiconductors Corp. for granting access to technology within the Mm Wave for Select Universities program for the Microwave Engineering Center for Space Applications (MECSA). They would also like to thank [PERSON] and [PERSON] for their support in characterizing the low-noise amplifier.  
\begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline \multirow{2}{*}{**Ref.**} & **Gate Length** & **Frequency** & **Gain (dB)** & **Noise Figure** & **Survivability** & **DC Power** & **Area (mm\({}^{3}\))** & \(FoM_{Area--mm^{2}}\) \\  & **(mm)** & **(GHz)** & & **(dB)** & & **(mW)** & **Area (mm\({}^{3}\))** & \(FoM_{Area--mm^{2}}\) \\ \hline
[25] & 150 & 15.0-18.0 & 20.4 (avg) & 3.4 (avg) & N/A & 113.52 & 6.0 & 0.41 \\
[26] & 70 & 14.5-14.8 & \(>\)18.8 & \(<\)0.9 & N/A & 54 & 6.325 & 0.29 \\
[27] & 250 & 14.0-18.0 & 13.1 (avg) & 4.45 (avg) & N/A & 695 & 3.33 & 0.02 \\
[28] & 200 & 11.5 & 19.9 & 1.51 & N/A & 95.7 & N/A & N/A \\ This work & 100 & 13.0-15.0 & 25 & \(<\)1.7 & 18 6 hm (CW), & 362.8 & 4.2 & 0.933 \\ \hline \hline \end{tabular}
\end{table}
Table 6: Comparison of the proposed amplifier with previously published Ku-band low-noise amplifier GaAs MMICs.  
**Conflicts of Interest**: The authors declare no conflicts of interest. This paper reflects the views of the scientist and not those of the company or institute.