# High-Precision Pseudo-Noise Ranging Based on BOC Signal: Zero-Bias Mitigation Methods
## 4 Zero-Bias Mitigation Method
### Sampling Frequency Design  
In satellite navigation receivers, the local phase is controlled by a numerically controlled oscillator (NCO). In order to save computing resources, the correlator interval is designed to be (1/2)\({}^{\rm n}\) chips. At the same time, the impact of the limited bandwidth of the RF front end needs to be considered  
Figure 6: Standard deviation of zero-bias of BOCs (1, 1) signal corresponding to different correlation intervals (\(F_{s}=11.251\) MHz, \(F_{c}=1.023\) MHz, \(F_{sc}=2.046\) MHz, \(2d_{0}^{sc}=0.25\) chip, \(T_{coh}=1\) ms).  
while choosing the relevant intervals. Therefore, an optimal sampling frequency design method for suppressing zero-bias is proposed below:  
1. Determine specific parameters such as spreading code rate \(F_{c}\), correlator interval \(2d_{0}^{c}\), and coherent integration time \(T_{coh}\);
2. Limit the range of sampling frequency to \([F_{1},F_{2}]\), according to the actual resource conditions;
3. Select the available noncommensurate sampling frequency \(\hat{F}_{s}=kF_{0}\), \(k\in Z\) according to Formula (7);
4. Design the optimal sampling frequency to suppress zero-bias according to Equation (18).
5. For multi-system satellite navigation receivers, different spreading code rates and systems might be necessary for signal receiving [28; 29; 30]. In addition, in a multi-stage loop tracking design, it may be necessary to select different discrimination intervals. When multiple constraints need to be met, the above design method can still be used to select a relatively good sampling frequency.  
Figure 7 shows the simulation results of a digital code phase discriminator for BOCs (1, 1) signals at different sampling frequencies. The code phase correlation interval is set to 1 chip and the parameter configuration is the same as that in Figure 6. The simulation results show that if the sampling frequency is selected appropriately, the zero-bias of the code phase discriminator also can be effectively suppressed. When the sampling frequency is 10.231 MHz, the resolution of the digital code phase discriminator is 95.5 ps (\(9.8\times 10^{-5}\) chips), and the resolution of the digital subcarrier phase discriminator is 47.8 ps (\(4.9\times 10^{-5}\) chips), and in this case the standard deviation of the zero-bias of the code phase discriminator is only 11.4 ps (\(1.2\times 10^{-5}\) chips).  
According to [PERSON]'s conclusion in [11], the implementation of compensation-free zero-bias mitigation method requires that the sampling ratio should be designed to be 1/8 + 1/8176. Among them, the sampling frequency is 8.176 MHz, and the standard deviation of the zero-bias is 36.1 ps (\(3.8\times 10^{-5}\) chips). The sampling frequency design given in this paper is 8.185 MHz, and the standard deviation corresponding to the zero-bias is 14.3 ps (\(1.5\times 10^{-5}\) chips). From the aspect of standard deviation of zero-bias, the algorithm of this paper is superior to the method in [11]. Like the correlation interval design method, the purpose of the sampling frequency design method proposed in this paper is not to be confined to reveal the optimal sampling frequency but to quantitatively evaluate the zero-bias performance of different sampling frequencies.  
Figure 7: Standard deviation of the zero-bias of the BOCs (1, 1) signal corresponding to different sampling frequencies (\(F_{c}\) = 1.023 MHz, \(F_{sc}\) = 2.046 MHz, \(2d_{0}^{c}\) = 1 chip, \(2d_{0}^{sc}\) = 0.25 chip, \(T_{coh}\) = 1 ms).