## 5 Dataset Generation
The next two 4-bit chunks ('0010_0010' in TC-2), from left to right, in the training and test vectors, also separated by an underscore ('_), represent the system's outputs: first confirming payment and the other returning any necessary change. The outputs are determined by combining the inputs and the system's state, as depicted in Figure 1 and discussed in Section 2. For input sequence TC-2 '0_01? ', the first output sequence, '0010', with '1' at the third bit from left to right, reflects that the drink is served in the third cycle when the payment of EUR 1.50 is completed. This is because the consumer consumed the first two cycles, selecting the product and adding coins. Hence, the output is '0' in those two cycles. Since the payment of EUR 1.50 is more than the price of water, which is EUR 1, the '1' at the third bit from left to right in the following output sequence '0010' tells that in the third cycle, the customer has been paid with a change of EUR 0.50 along with the product. The vending machine can only ever issue EUR 0.50 change. In this instance, EUR 0.50 was issued, and it happened in the same cycle as the drink being delivered. The change will always be issued in the same cycle as the delivered drink in the proposed system. Similarly, if there is no change, the final four bits will always be all zeroes. Since in the discussed TC here, the fourth bit in the input sequence is a don't-care bit, the outputs stay the same for the TCs with input sequences of '0_010', '0_011', or '0_01x'. Note that we assume that the customer can only use EUR 0.50 and EUR 1 coins and that the vending machine will accept a specific amount of these coins in each cycle. Other coins are ignored. On the right side of the dataset shown in Figure 4, each 12-bit TC from the left side is broken into four 3-bit vectors. Each vector has three bits, separated by '_', where the first bit indicates the input, and the remaining two bits represent the relevant outputs of the system for that input. For example, the four input bits '0_011' from TC-2 on the left side are reflected in the leftmost bit of the four distributed vectors on the right side. Similarly, the four bits '0010' shown in the middle of TC-2 on the left side of Figure 4 are represented in the middle bit of the vectors on the right side of the figure. Finally, the four bits '0010' from the rightmost part of TC-2 on the left side are reflected in the rightmost bit of the distributed vectors on the right side. These three sections of the distributed vectors of TC-2 are enclosed in ovals and are properly labelled as shown on the right side of Figure 4 for a better understanding. In this defined way, the TCs are distributed and fed into the system during each cycle, determining the system's fitness value against each TC. There are 16 12-bit TCs on the left side, which, when distributed according to the system's requirements, result in 64 3-bit vectors on the right side, which are fed into the system in each cycle. Thus, the maximum fitness value is 64. The maximum fitness value for an individual is only achieved if the individual correctly resolves all the TCs. The pseudocode to generate the train/test dataset for a complex FSM, such as the one presented here, is shown in Algorithm 1. The process begins by initialising the FSM configuration, such as the vending machine logic discussed earlier. The input encoding is defined such that the first bit represents the product selection (with '0' for water and '1' for a fizzy drink), while the next three bits represent the payment sequence, where '0' and '1' correspond to EUR 0.50 and EUR 1 coins, respectively, and '?' denotes a don't-care condition. The output encoding is similarly defined, where the first four bits represent the delivery signal across clock cycles, and the next four bits represent the issuance of a return change if applicable. An empty dataset list is then initialised, and for each valid product and payment scenario, an input sequence is generated.