# Resonant Asymmetrical Half-Bridge Flyback Converter
## 4 Experimental Results
The detailed results are shown as Table 3. According to [34, 35], the experimental results of GM of 6 dB and PM of 45\({}^{\circ}\) can make sure the closed-loop system is stable. Figure 16 shows the experimental results of the load transient response. \(v_{Cr}\) is the current reference of the inner current-loop controller. \(V_{o(\text{AC})}\) and \(v_{Cr(\text{AC})}\) are the ac coupled signals from \(V_{o}\) and \(v_{Cr}\) to enlarge the ripple waveforms, respectively. Due to the weak sampling rate and the memory depth of the oscilloscope, the waveforms are measured with significant glitch. The measured results show the close loop response is stable under load transient at different input voltages. Table 4 shows the comparison of the proposed and other topologies. Figure 17 shows the photographs of the power stage of the proposed prototype, not showing the part of the controller. \(Q_{1}\)\(\sim\)\(Q_{3}\) and SR IC are soldered to the PCB in an upside-down placement, and only the bottom of the components can be seen externally. There is a buck module to power the FPGA control board. Figure 8: Measured curves of conversion efficiency and switching frequency: (**a**) conversion efficiency; (**b**) switching frequency. Figure 9: Measured waveforms of \(v_{gs1}\), \(v_{bs1}\), \(v_{gs2}\), and \(v_{bs2}\) at input 24 V under (**a**) \(Q_{1}\) turned-on at 10% load; (**b**) \(Q_{1}\) turned-off at 10% load; (**c**) \(Q_{1}\) turned-on at half load; (**d**) \(Q_{1}\) turned-off at half load; (**e**) \(Q_{1}\) turned-on at full load; and (**f**) \(Q_{1}\) turned-off at full load. Figure 10: Measured waveforms of \(v_{gs1}\), \(v_{ds1}\), \(v_{gs2}\), and \(v_{ds2}\) at input 48 V under (**a**) \(Q_{1}\) turned-on at 10% load; (**b**) \(Q_{1}\) turned-off at 10% load; (**c**) \(Q_{1}\) turned-on at half load; (**d**) \(Q_{1}\) turned-off at half load; (**e**) \(Q_{1}\) turned-on at full load; and (**f**) \(Q_{1}\) turned-off at full load. Figure 11: Measured waveforms of \(v_{g81}\), \(v_{g82}\), \(v_{Cr}\), and \(i_{Cr}\) at input 24 V under (**a**) 10% load; (**b**) 20% load; (**c**) half load; and (**d**) full load. Figure 12: Cont. Figure 12: Measured waveforms of \(v_{g1}\), \(v_{g2}\), \(v_{Cr}\), and \(i_{Cr}\) at input 48 V under (**a**) 10% load; (**b**) 20% load; (**c**) half load; and (**d**) full load. Figure 13: Measured waveforms of \(v_{g1}\), \(v_{g2}\), \(v_{d33}\), and \(i_{N2}\) at input 24 V under (**a**) 10% load; (**b**) 20% load; (**c**) 50% load; and (**d**) 100% load. Figure 7:0 Measured waveforms of \(v_{g51}\), \(v_{g52}\), \(v_{d33}\), and \(i_{N2}\) at input 48 V under (**a**) 10% load; (**b**) 20% load; (**c**) 50% load; and (**d**) 100% load. Figure 7:1 _Cont._  
Figure 7:2 _Cont._  
Figure 7:3 Measured curves of gain margin and phase margin under (**a**) 10% load at input 24 V; (**b**) full load at input 24 V; (**c**) 10% load at input 48 V; and (**d**) full load at input 48 V. \begin{table}
\begin{tabular}{c c c c c} \hline \hline
**Item** & **Proposed AHB** & **Conventional AHB** & **LLC** & **ACF** \\  & **Flyback** & **Flyback** & **LLC** & **ACF** \\ \hline Active switch & 2/1 & 2/1 & 2/2 & 2/1 \\ Primary side/secondary side & 2/1 & 2/1 & 2/2 & 2/1 \\ \hline Modulation & PFM & PWM & frequency modulation & PWM \\ \hline Voltage stress on switches & medium & medium & medium & high \\ Input voltage range & medium & narrow & narrow & medium \\ \hline ZVS range at light load & good & medium & medium & medium \\ (without burst mode) & medium & constant & high & constant \\ \hline Frequency variation range & medium & constant & high & constant \\ \hline Output ripple current & high & high & medium & high \\ \hline \hline \end{tabular}
\end{table} 
Table 4: Comparison of the proposed method and other topologies.