## 4 Simulation Experiment and Results Analysis
### Performance Evaluation Indicators  
According to the actual working environment and task execution, the task scheduling needs to meet the following conditions:  
1. A task is assigned to work on one processor;
2. The execution cost of all tasks on each processor cannot be greater than the maximum processing capacity of the processor itself;
3. Tasks on the processor are not allowed to terminate until execution is complete.  
We use scheduling length (makespan), speedup, and efficiency as evaluation indicators to measure the quality of task scheduling in heterogeneous signal processing platforms.  
The scheduling length (makespan) reflects the completion time of all tasks on the platform. The smaller the scheduling length, the shorter the scheduling time for the system to complete all tasks, as shown in Formula (11).  
\[\text{makespan}\ =\ \text{EFT}(v_{exit}) \tag{11}\]  
where \(v_{exit}\) represents the exit node, EFT represents the completion time of the task on the target processor, and it is the sum of the EST and execution time of task \(v_{i}\), as shown in Formula (12).  
\[\text{EFT}(v_{i},p_{k})\ =\ \text{EST}(v_{i},p_{k})+w(v_{i})/r(p_{k}) \tag{12}\]  
where \(w(v_{i})\) represents the computational cost of the task, \(r(p_{k})\) represents the processing power of the processor \(p_{k}\), \(w(v_{i})/r(p_{k})\) represents the execution time of task \(v_{i}\) on the processor \(p_{k}\), and EST represents the earliest start time of the task on the target processor, as shown in Formula (13).  
\[\text{EST}(v_{i},p_{k})\ =\ \max\{\text{Available}(v_{i},p_{k}),\max_{v_{j} \in\text{pred}(v_{j})}(\text{EFT}(v_{j},p_{f})+c_{j,i})\} \tag{13}\]  
\begin{table}
\begin{tabular}{c c c} \hline \hline
**Algorithm** & **Parameter** & **Numerical Value** \\ \hline HSP-QGA & population size & 40 \\  & iterations & 500 \\ \hline  & population size & 40 \\  & iterations & 500 \\ PA-CGA & crossover probability & 0.35 \\  & mutation probability & 0.1 \\ \hline  & population size & 40 \\  & iterations & 500 \\ ACO & \(\alpha\) & 0.1 \\  & \(\beta\) & 1 \\  & \(\rho\) & 0.3 \\  & \(Q\) & 1 \\ \hline  & learning rate \(\alpha\) & 0.1 \\ Q-learning & discount factor \(\gamma\) & 0.8 \\  & exploration factor \(\epsilon\) & 0.05 \\ \hline \hline \end{tabular}
\end{table}
Table 5: Basic parameter setting table of each algorithm.  
where \(\text{Available}(v_{i},p_{k})\) represents the earliest time block that the processor allows task \(v_{i}\) to execute, \(\textit{pred}(v_{i})\) represents the set of all the predecessor tasks of \(v_{i}\), and \(c_{j,i}\) represents the communication time from task \(v_{j}\) (scheduled on the processor \(p_{f}\)) to task \(v_{i}\) (scheduled on the processor \(p_{k}\)).  
The speedup represents the ratio of the earliest completion time and the scheduling length of the task execution on a single processor, which can well reflect the algorithm performance. When the speedup is greater than 1, heterogeneous computing is better than homogeneous computing, and the larger the speedup, the better. As shown in Formula (14), where \(w_{i}\) represents the computation cost of the \(i\)-th task.  
\[\text{speedup}\ =\ \frac{\sum_{v_{i}\in v}\overline{w_{i}}}{\text{ makespan}} \tag{14}\]  
The scheduling efficiency is the ratio of speedup to the total number of processors, representing the performance and fitness of the processing platform, as shown in Formula (15), where \(p\) represents the total number of processors in the processing platform.  
\[\text{efficiency}\ =\ \frac{\text{speedup}}{p} \tag{15}\]