## 2 SAR Data Access Efficiency Analysis
### DDR3 Data Access Characteristics Analysis  
Section 1 mentioned that DDR3 SDRAM is an ideal memory for spaceborne SAR real-time processing. The SAR raw data and the processing results of each step need to be stored in DDR3. In DDR3, the specific memory cell is determined according to the row address, column address, and bank address Therefore, DDR3 is a three-dimensional (row, column, bank) storage space. Each DDR3 chip has 8 or 16 banks, and each bank consists of thousands of rows and columns. The reading or writing of data in DDR3 is based on the burst transmission mode, that is, starting from a specified address, the contents of several consecutive memory cells are sequentially read or written. The burst length of DDR3 can be set to four or eight as needed. Generally, the burst length is set to eight in order to obtain a higher data bandwidth. Therefore, DDR3 will continuously read or write the data of 8 memory cells at the rising edges and the falling edges of four clock cycles [26]. In addition, there are two basic concepts in DDR3 read and write operations: active and precharge [26]. Active means that when reading and writing data in a row in DDR3, an active command must be issued to the row. Precharge means that the reading and writing of a certain row of data is completed in DDR3, and when it is necessary to change to the next row, a precharge command must be issued to close the previous row. When reading and writing the entire row of data, the required operation and sequence are as follows: \"activate\(\rightarrow\)read/write command\(\rightarrow\)data transmission\(\rightarrow\)precharge\". For the read and write time of each row of data in DDR3, the active time, read or write command time, precharge time, and the minimum interval between them are all determined values. The only variable is the length of the continuous read and write data. We assume that the burst is read and written n times and the burst length is set to eight. Figure 4: Sequence diagram of data processing. (**a**) The system has single-channel memory; (**b**) the system has dual-channel memory. Write operations and read operations can be completed in parallel. Then, due to the fact that the data can be sampled at the rising edges and the falling edges in DDR3, the data transmission will be completed within time \(n\times 4t_{CK}\). When writing the data, the time interval from the active command of one row to the active command of the next row is  
\[t_{WRITE}=t_{RCD}+t_{\text{CWL}}+n\times 4t_{CK}+t_{WR}+t_{RP} \tag{1}\]  
When reading the data, the time interval from the active command of one row to the active command of the next row is  
\[t_{READ}=t_{RCD}+t_{RTP}+n\times 4t_{CK}+t_{RP} \tag{2}\]  
where \(t_{RCD}\) is the delay time from the active command to the read or write command; \(t_{\text{CWL}}\) is the delay time from the write command to the first data transmission; \(t_{WR}\) is the minimum interval from the last data transmission to the precharge command; \(t_{RTP}\) is the minimum interval from the read command to the precharge command; \(t_{RP}\) is the minimum interval from the precharge command to the next active command; \(t_{CK}\) is the working clock of DDR3 [26]. SAR data are stored and processed in the form of a matrix. The two dimensions of the matrix are the range direction and the azimuth direction. \"Range\" means the across-track direction of the radar platform. \"Azimuth\" means the along-track direction of the radar platform. In the SAR algorithm, these two dimensions are converted to the time domain or frequency domain. For the convenience of presentation, \"range\" and \"azimuth\" are used in this paper. They only represent the two dimensions of the matrix, which can be the data in time domain or frequency domain, and the data before or after pulse compression. Each row of the SAR data matrix is called a range line, and each column is called an azimuth line.