# S-Band Class-C-F Power Amplifier with 2 nd Harmonic Control at the Input
## 4 Discussion  
The feasibility of gate harmonic control adopted to class-C-F PA is validated by the design and measurement results in the previous section. However, there is a crucial aspect that characterizes the present contribution, represented by the class-C biasing condition. In fact, in this case, both the input power level and the gate biasing point have an important role in the waveform shaping.  
Different from simulation, a behavior presented in measurement is the slight \"trigger\" effect at the low input power region, as shown in Figure 12a-c. It is believed that the non-linearity becomes strong enough only after certain input power level (in this case, \(\approx\)10 dBm) to generate a 2 nd harmonic that starts to properly shape the input voltage waveform. The conduction angle is too small to reach the available range for class-C-F PA at low the input power level. Moreover, after the input power level exceeds 12 dBm, the generated 2 nd harmonic has the amplitude high enough and the proper phase with respect to the fundamental one, which is sufficient to form a class-C-F PA that has higher DE, output power, and gain than the one biased at class-AB biasing range, as presented in Figure 13. Before that, the waveform of the input signal almost remains sinusoidal, which is unsuitable to drive a class-F PA at class-C biasing range. While in the high input power region, both class-AB-F PA and class-C-F PA reach the same output power and gain level. However, due to the contribution of proper harmonic manipulation, class-C-F PA still achieved higher DE than class-AB-F PA. Figure 14 shows the load lines simulated at the intrinsic of the active device, exhibiting a typical class-F shaping when the input power level is increased.  
Figure 14: Load lines of class-C-F PA with respect to different input power level.  
Figure 13: Comparison between simulated class-AB-F PA and measured class-C-F PA.  
Another parameter affecting non-linearity is the gate biasing point. A theoretical gate bias range is calculated in Section 2, where it is practically around \(-3.5\) V to \(-3.9\) V. \(-3.3\) V of the gate bias, which is too shallow to generate enough non-linearity; thus, class-C-F PA can only be developed after deep saturation acting like an over-driven PA, as shown in Figure 15.  
A deeper class-C biasing can result in a higher peak efficiency, as shown in Figure 15a, where for \(V_{GG}=-4.1\) V an efficiency level of 66% was registered. However, such a deeper biasing point leads to a less conductive time, which in turn results in a lower output power, as shown in Figure 15b, as well as a lower gain reported in Figure 15c. Moreover, due to the usage of 2 nd harmonic at the input, an asymmetrical gate waveform is shaped on the gate junction. Thus, a deeper class-C biasing condition could be risky for the gate junction breakdown itself.  
Despite the different gate biases, the PA almost reaches the same DE, output power, and gain in deep saturation, as shown in Figure 15. As it can be noted by the reported experimental measurements, it is clear that from a design point of view that there should be a proper trade-off to balance the desired output power level, gain, and efficiency according to the applications before achieving the saturation by using different biasing sets.  
Figure 15: Measured performances of the designed class-C-F PA with respect to different gate bias.