## 1 Introduction  
In the last years, Wireless Sensor Networks (WSNs) have emerged in the academic environment, being transferred from military applications based on identification, classification and tracking of objectsin the battlefield. Thanks to the flexibility of wireless links, WSNs are used in several fields [1] such as industrial control, precision agriculture, analysis of vital parameters in medicine, and dataset generation for modelling of ecosystems and prediction in environmental monitoring applications [2].  
A sensor network consists of a set of sensor nodes made up of one or several processing elements, sensors, a small battery and a wireless transceiver which sends measurements from the sensors to a gateway that routes the data towards a logging system. Communications are typically based on the IEEE 802.15.4 standard [3] due to its focus on low-power communications and simplicity. However, 802.11 links are also used in gateways for high-speed data transmission. The upper layers are usually based on the ZigBee Alliance stack [4] or on optimized research layers such as S-MAC [5] or T-MAC [6] in the case of the Medium Access Layer (MAC).  
However, sensor nodes suffer from several critical requirements: the fabrication cost of the node, energy consumption and its processing capabilities, both individual and distributed [7]. Energy efficiency in a sensor node is essential, given that either recharging or replacing the battery of hundred nodes can be a time-consuming task. Consequently, the main challenge in WSNs is reducing the power consumption of the nodes. A typical strategy consists of reducing the transmission of data among the sensor nodes [8]. Thus, an additional intelligent layer is required in order to provide an extra level of processing with the aim of compressing the sensor measurements into short messages, alerts or information about events. Other power minimization strategies consist of reducing the duty cycle, changing dynamically the frequency [9] and turning on the radio transceiver selectively [10]. In this respect, since the processing capabilities of sensor nodes are quite limited and rely on microcontrollers [11], Field-Programmable Gate Arrays (FPGAs) can play a key role.  
Nowadays, FPGAs are crossing the 28 nm CMOS threshold (particularly those of Xilinx and Altera) and vendors provide optimized platforms in energy consumption that are able to run on ultra low-power such as the Actel IGLOO board. Such platforms can add extra processing capabilities to a typical sensor node with a reduced energy consumption if they are turned on when required by a microcontroller. Moreover, state-of-the-art FPGAs consist of powerful processing capabilities, based on ASIC arithmetic components such as high-speed multipliers and adders. Hence, the FPGAs can provide strong cryptography capabilities and high-speed acceleration of algorithms such as compression, image processing, and routing.  
This survey explores the use and possibilities of FPGAs in sensor node architectures and their applications, focusing on the level of power consumption and the proper optimization of the current embedded resources of novel FPGAs.  
In Section 2, we describe the current capabilities of FPGAs of the three main vendors, _i.e._, Xilinx, Altera and Actel. Section 3 links the main challenges of sensor networks with the current capabilities of novel FPGAs and we propose several applications. Section 4 gives a survey of the state-of-the-art of research sensor nodes either based on FPGA, _i.e._, standalone, or in combination with a commercial off-the-shelf (COTS) microcontroller. In Section 5, we summarize the features of the sensor nodes described in Section 4. Finally, we end in Section 6 with some conclusions.