# An MMIC LNA for Millimeter-Wave Radar and 5G Applications with GaN-on-SiC Technology
## 2 Analysis and Design of MMIC LNA
### Device Characteristics  
The MMIC LNA was meticulously designed utilizing coplanar waveguide (CPW) transistors within the 0.15 \(\upmu\)m GaN-on-SiC process, provided by WIN foundry. The initial version of the CPW transistor utilized [S] parameter file, which imposed certain limitations on the available choices for bias voltage and current [32]. It should be noted that reducing the gate width of the CPW transistor has the potential to lower the minimum noise figure (NFmin). However, this reduction may also result in a compromised bandwidth of the LNA. Hence, it becomes imperative to strike a delicate balance between NF and bandwidth, taking into account the specific design requirements and objectives. To address this tradeoff, the three-stage amplifier in this design adopted the use of a \(2\times 50\)\(\upmu\)m GaN HEMT, which has a breakdown voltage exceeding 120 V, a current gain cutoff frequency (\(\mathrm{f_{T}}\)) of approximately 34.5 GHz, and a maximum oscillation frequency (\(\mathrm{f_{MAX}}\)) of around 125 GHz. Additionally, this process provides two interconnected metal layers, high-reliability-metal-insulator-metal capacitors, and precision tantalum nitride (TaN) resistors for comprehensive MMIC designs. On one hand, the active intrinsic core of the GaN HEMT lends itself to being ideally modeled as noiseless two-ports housing correlated noise sources at both the input and output. As for the modeling of nonlinear parasitic effects associated with the GaN HEMT transistor, an intricate network comprising lumped elements was employed. Leveraging the well-established theory of inductive source degeneration, the CPW transistor's source was connected to an inductor. To make the pre-appraisal of the GaN HEMT noise characteristic more accurate, a simplified representation of the GaN HEMT's noise equivalent circuit model [16; 17; 18; 19] is presented in Figure 2, incorporating a source series inductor [1; 33; 12]. This model only considers the shot noise and channel diffusion noise since the channel diffusion noise accounts for a large proportion of device noise. This comprehensive design approach ensures that both the active and passive elements of the MMIC LNA are appropriately characterized and optimized for performance. By carefully considering the tradeoffs and leveraging established theoretical frameworks, researchers can make informed decisions to achieve desired outcomes in terms of noise figure, bandwidth, and overall performance characteristics. The impact of \(\mathrm{R_{d}}\) on noise can be ignored compared to the thermal noise of the channel, as \(\mathrm{R_{d}}\) is at the output node (drain) of the GaN HEMT. Since we only applied for a rough estimate of the noise impedance, the effects of parasitic parameters such as inductance of  
Figure 2: Noise equivalent circuit model of GaN HEMT with source series inductor. the source and inductance of the gate are ignored. The \(Z_{\text{opt}}\) (optimum noise impedance) of the circuit is found to be as follows:  
\[Z_{\text{opt}}=\frac{\sqrt{g_{m}(R_{\text{S}}+R_{\text{G}})+\frac{PR(1-\text{C}^ {2})}{P+R-2\text{C}\sqrt{PR}}}}{P+R-2\text{C}\sqrt{PR}}\frac{1}{w\text{C}_{gs}}+ j\frac{1}{w\text{C}_{gs}}\frac{P-R\sqrt{PR}}{P+R-2\text{C}\sqrt{PR}} \tag{1}\]  
P and R are the factors jointly determined by both the internal and external elements of the model [16; 17; 18; 19]. Since the noise current source is not independent, C is the noise correlation coefficient of \(\text{I}_{\text{g}}\) and \(\text{I}_{\text{d}}\). As shown in Equation (1), we can optimize the \(Z_{\text{opt}}\) by modulating the \(\text{C}_{\text{gs}}\) which can be adjusted by changing the gate width of transistor. \[\begin{array}{c}Z_{\text{in}}=\frac{V_{\text{in}}}{I_{\text{in}}}=R_{i}+ \frac{1}{jw\text{L}_{\text{gs}}}+jw\text{L}_{\text{S}}+\frac{g_{m}\text{L}_{ \text{S}}R_{\text{d}}}{\text{C}_{gs}.