# A Low-Overhead Countermeasure against Differential Power Analysis for AES Block Cipher
### Existing Solutions with Respect to Side-Channel Attacks and Their Countermeasures  
**Solutions described only the SCA attacks. ** In [10], a wireless interceptive SCA is performed to break the AES-128 key. They analyzed the correlation electromagnetic analysis (CEMA) of the cryptographic device for the SCA attack and successfully revealed the encryption key in 20,000 electromagnetic traces. The solutions, published in [11; 12; 13], perform a correlation power analysis (CPA) attack on AES by analyzing the power leakage of the device during the execution of the encryption process, and successfully retrieve the entire secret key. Generally, the CPA is an attack that allows attackers to perceive a secret encryption key that is stored on a victim device. The solutions described in [14; 15; 16; 17] perform different orders of the DPA attack to find the encryption key. They use the CPA method to reduce the processing time for successful DPA attacks. In [18], a CEMA based attack is performed based on the correlation of energy traces and intermediate data in the AES implemented on the SAKURA-G FPGA (field-programmable gate array). Recently, a deep-learning SCA was performed in [19]. It recovers the secret key using a combination of different convolutional neural network (CNN) classifiers with different attack points, which reduce the number of power traces required to recover the key. In [20], a fault analysis attack on the FPGA implementation of AES is performed. Moreover, the temporal and spatial analyses of the rounds impacted by the fault injection process are analyzed. A DPA attack using flash-based FPGA technology on AES is performed in [15]. For FPGAs, a lightweight AES architecture is presented in [21], which uses a partial separated dynamic differential logic (partial-SDDL) technique. In [22], a new method is presented that follows the sbox-reuse concept to secure the sbox of a block cipher. They first turned the multi-sbox into 4 \(\times\) 4 permutations, then utilized permutations with more than one algebraic degree to create a special reusable sbox, and then numbered the 4 \(\times\) 4 permutation as input again. **Solutions provide the SCA attacks with their countermeasures. ** The power consumption of the target device depends on the data it processes and the operation it performs (it exposes the algorithm to SCA). To prevent this situation, several countermeasures have been developed/proposed in the literature to reduce the possibility of an attack on the cryptography algorithm. A DPA attack on FPGA implementation of AES is given in [23]. Additionally, two different countermeasures, i.e., (i) register swapping, and (ii) random recharging, which increases the complexity of the attack, were provided. The solution published in [24] proposed a new countermeasure based on the phase-locked loop (PLL) technique. In this method, they placed a PLL in the power path of an AES, which suppresses the power characteristics of the encryption operation. In [25], a SPA attack on AES is performed to obtain the secret key. Moreover, a countermeasure based on adiabatic logic (implemented in the AddRoundKey block of AES) is provided. This breaks the dependency between the power consumption of the device and the secret key. Concerning the solution given in [26], the CPA and DPA attacks on AES are presented using Arduino devices. It is analyzed that both forms of the attack are feasible on the Arduino. The RTL (register transfer level) based countermeasures are designed in [27]. In [28], various on-chip voltage converters as a countermeasure against DPA attacks are described. Moreover, a comparison with the security strength of the proposed on-chip converter-reshuffling (CoRe) regulator to the security of conventional on-chip voltage regulators is provided. Similarly in [15], the authors check the vulnerability of AES against first order and second-order DPA attacks. They specify some principles to demonstrate the weak positions of AES which are vulnerable to DPA attack. In [29], researchers develop techniques at the logic level.