## 1 Introduction  
W wafer-level packaging is an important solution in the chip packaging process due to its advantages of high density, smaller package size and lower production costs. In this major process, bumps are crucial components, as the electrical connections between chips to ensure the transmission of information [1, 2]. With a gigantic number of bumps deposited on a die or wafer, with greater than 2000 bumps per die, the coplanarity of the bump height becomes one of the most important parameters in the bumping process. The taller bumps may lead to strong stress, while the bumps with smaller height will cause insufficient connection during the bonding process. Both the situations mentioned above will result in the potential insecurity of chips. Additionally, these failure modes will become even more significant for the bumps with smaller dimension and height [3]. Therefore, it is essential to accurately measure the heights and coplanarity of bumps [4, 5]. The traditional inspection method to measure bump height for small, intricate chips is that using a confocal microscope [6] and optical interferometry [7], which requires a series of repeated adjustments to control the light intensity, focusing position, incident angle, and other parameters. The methods mentioned above fail to meet industrial real-time measuring demand for online detection, as dozens of wafers need to be detected per hour in the packaging defect detection production line. Although this method has a high measuring accuracy, it is a costly and time-consuming solution that prevents companies from meeting the needs of high measuring speed in mass production. Meanwhile, it takes a lot of time to train workers in these methods and in routine maintenance, which means a major investment in engineering resources. [PERSON] [8] researched fringe projection with phase-shifting technology for three-dimensional measurement of micro solder bumps. However, the spherical geometry and textureless specular surface of bump caps causes the loss of phase information, which further results in huge measurement errors. Additionally, the phase unwrapping and phase matching require greater computation. In [9; 10; 11], the bump height was calculated from the shadow images of the bump; meanwhile, another image without a shadow was needed to fit the circle contour of the bump. Due to the different lighting conditions of these two images, images needed to be acquired successively at the same location in this method, meaning an inefficient operation in the inspection process. [PERSON] [12] pointed out that the coplanarity of the bump heights was only related to the top points of bumps, and not to the 3D contour profile. Consequently, the author proposed a conversion from the bump height calculation to the top point detection of bumps, and then the investigation of two planes and coplanarity calculated from two images based on the biplanar disparity matrix. In this way, explicit 3D reconstruction can be avoided. However, this method is sensitive to the wafer location and wafer title, and as a result, the measurement is highly dependent on the motion accuracy of the stage. Triangulation technology has been used in the three-dimensional data acquisition of solder bumps in BGA packaging due to its high speed and high precision advantages. [PERSON] [13; 14] introduced the laser triangulation method in bump height measurement of micro bumps. It requires extremely complex algorithms to eliminate the speckle effect in the image due to exceedingly small laser spots. This work aims to provide a new system for micro bump height measurement based on the triangulation method, in order to provide bump height metrology with high speed and precision. The triangulation method explained in this study is a linear stripe with the ability to measure multiple 3D bump height along the scan line. The results of an application study of 50 \(\upmu\)m bump height and 100 \(\upmu\)m bump pitch are reviewed.