## 2 Circuit Description  
### Proposed 0.45 V CDTA  
The electrical symbol of the CDTA is shown in Figure 1, and its equivalent circuit is illustrated in Figure 2. The ideal characteristics of the CDTA can be described as follows:  
\[ \begin{array}{c}V_{p}=V_{n}=0\\ I_{z}=I_{zc}=I_{p}-I_{n}\\ I_{x\pm}=g_{m}V_{z}\end{array}  \tag{1}\]  
where \(g_{m}\) is the transconductance gain, \(I_{p}\) and \(I_{n}\) are the input currents, and \(I_{z}\), \(I_{zc}\), and \(I_{x}\) are the output currents of the CDTA. The \(z_{c}\)-terminal of the CDTA is introduced to enhance its functionality in current-mode circuit applications. Therefore, in the design of the CDTA, the \(p\)- and \(n\)-terminals should ideally exhibit low impedance (ideally zero), while the \(z\)-, \(z_{c}\)-, and \(x\)-terminals should have high impedance (ideally infinite). Figure 1: Electrical symbol of the CDTA. Figure 3 shows the CMOS implementation of the proposed CDTA. The circuit consists of a minus-type current conveyor (CCII\(-\)), a plus-type (CCII+), and a transconductance amplifier (TA). Both the CCII\(-\) and CCII+ form a current differencing unit (CDU) [21], with their output \(z\) connected to the TA. Even though the proposed CDTA is composed of known blocks, it includes a \(z\)-copy terminal, which enhances its functionality in current-mode circuits, and this feature is demonstrated in the proposed filter design. The CCII+ functions as a current follower (\(I_{n}=I_{z+}\)), while the CCII\(-\) functions as an inverted current follower (\(I_{p}=I_{z-}\)). Since the outputs of the CCII+ and CCII\(-\) are connected at the z- terminal, the function of the CDU is realized, such that \((I_{z}=I_{p}-I_{n})\). The \(z_{c}\)-terminal of the CDTA is implemented using complementary current mirrors. The \(z\)-terminal of the CDU is connected to the non-inverting terminal of the TA, while the inverting terminal is grounded. When the \(z\)-terminal is loaded with an impedance, the current \(I_{z}\) is converted into a voltage \(V_{z}\). This voltage is then converted into a current \(I_{x}\) at the \(x\)-terminal of the TA. Consequently, the ideal characteristic \(I_{x}=g_{m}V_{z}\) of the CDTA is achieved. The MOS differential pairs of the CCIIs are implemented using bulk-driven MOS transistors (M\({}_{1}\) and M\({}_{2}\)). These differential pairs are loaded by transistors M\({}_{4}\) and M\({}_{5}\) and supplied by transistor M\({}_{3}\). This configuration is based on the flipped voltage follower (M\({}_{1}\)-M\({}_{5}\)), which enables operation with a minimal supply voltage. Consequently, the proposed  
Figure 3: Proposed current differencing transconductance amplifier. Figure 2: Equivalent circuit of the CDTA. CCII achieves a reduced minimum supply voltage, given by the sum of the source-gate voltage of M\({}_{3}\) and the drain-source voltage of M\({}_{4}\), as follows:  
\[V_{DD(\min)}=\left(V_{SG-M3}+V_{DS(sat)-M4}\right) \tag{2}\]  
where \(V_{SG-M3}\) is equal to at least \(V_{DS(sat)-M3}+V_{DS(sat)-M1}\). For circuit stability, [PERSON] frequency compensation is applied using the capacitance C\({}_{\rm C}\). Assuming unity-gain current mirrors in the current conveyors, with identical transistors (M\({}_{6}\) = M\({}_{8}\) = M\({}_{9}\)-M\({}_{11}\) and M\({}_{7}\) = M\({}_{12}\)-M\({}_{15}\)), the input resistance at the \(p\)-terminal (\(r_{p}\)), the input resistance at the \(n\)-terminal (\(r_{n}\)), and the output resistance at the \(x\)-terminal of the CDTA can be expressed, respectively, by  
\[r_{p}=r_{n}=\frac{1}{g_{m6}(g_{mb1,2}(r_{ds2}\|r_{ds5}))} \tag{3}\]  
\[r_{z}\cong\frac{1}{2\left(g_{ds8,10}+g_{ds12,14}\right)} \tag{4}\]  
\[r_{zc}\cong\frac{1}{2(g_{ds9,11}+g_{ds13,15})} \tag{5}\]  
\[r_{x}=(r_{ds8}(1+g_{m8}r_{ds8c}))||\ (r_{ds14}(1+g_{m14}r_{ds14c})) \tag{6}\]  
where \(g_{mj}\), \(g_{mbj}\), and \(r_{dsj}\) are, respectively, the gate transconductance, bulk transconductance, and output resistance of the \(j\)th MOS transistors.