# A 28-nm CMOS Low-Power/Low-Voltage 60-GHz LNA for High-Speed Communication
## 4 Layout Description and Expected Performance
### Expected Performance  
Figures 7-9 illustrate the LNA performance at nominal supply voltage and room temperature. The overall LNA current consumption at a 0.9-V supply voltage is as low as 11.6 mA, including 3.2 mA for the output buffer. The input (\(S_{11}\)) and output (\(S_{22}\)) scattering parameters (\(S\)-parameters) are shown in Figure 7. They confirm the soundness of the adopted input/output transformer-based networks, which guarantee wideband matching centered at 60 GHz. Figure 8 depicts the voltage gain of the two-stage LNA, which is as high as 20 dB with a \(BW_{\rm 3 dB}\) of more than 7 GHz, and compares it with the LNA power gain, \(S_{21}\) (i.e., 50 \(\Omega\) input/output matching), including the output buffer. The amplifier achieves a power gain of 13.5 dB, while preserving a 7-GHz \(BW_{\rm 3 dB}\) centered at 60 GHz.  
Figure 6: Simplified design procedure adopted for the 60-GHz LNA.  
Figure 7: Input (\(S_{11}\)) and output (\(S_{22}\)) matching versus frequency.  
The noise figure of the LNA is shown in Figure 9 and is primarily determined by the first two amplification stages. It reaches approximately 8.4 dB at 60 GHz and remains below 10.5 dB across the entire _ISM_ frequency band. Notably, this performance is achieved with very low power consumption--approximately 10.4 mW--enabled by the _PE-SNIM_ technique. It is worth mentioning that in an actual 60-GHz OOK receiver, such _NF_ performance enables a sensitivity of about \(-40\) dBm, which is better than typical sensitivity values reported in the state of the art. The linearity of the LNA is assessed using the input 1-dB compression point (\(IP_{\rm 1 dB}\)), as illustrated in Figure 10. The LNA demonstrates an \(IP_{\rm 1 dB}\) of around \(-15\) dBm, which exceeds the maximum input levels encountered in typical application scenarios (i.e., about \(-25\) dBm). The stability of the LNA, including layout parasitics, has been verified by using [PERSON]'s stability factor. Simulations in nominal and worst-case conditions indicate that the amplifier is unconditionally stable.  
For the sake of completeness, the sensitivity of the proposed LNA is verified by means of Montecarlo (_MC_) simulations. Figure 11 summarizes the _MC_ results for the main LNA performance parameters, i.e., power gain, _NF_, \(S_{\rm 11}\) and \(S_{\rm 22}\) at 60 GHz, \(BW_{\rm 3 dB}\) and \(IP_{\rm 1 dB}\).  
A comparison of the proposed 60-GHz LNA with the recent state of the art is summarized in Table 2. The LNA shows an excellent trade-off between the main design parameters, which are evaluated through several figures of merit (FoMs) introduced in [14; 15; 16; 17; 18]. The proposed FoMs consider the most critical LNA design parameters including gain, frequency bandwidth, noise, linearity and DC power consumption (\(P_{\rm DC}\)). Thanks to the _PE-SNIM_ technique, despite having ESD protection and a differential structure, the proposed LNA consumes considerably lower power, \(P_{\rm DC}\), with respect to recent state-of-the-art works. Moreover, ESD protection, which is guaranteed through input/output transformers at the  
Figure 8: Two-stage LNA voltage gain and power gain, \(S_{\rm 21}\), of the two-stage LNA with the buffer.  
Figure 9: Noise figure, \(NF\), versus frequency.  
expense of a higher \(NF\), is often neglected in most of the 60-GHz LNA designs., Although the LNA in [19] guarantees HBM ESD protection up to 3 kV ESD, it consumes at least three times more power than the proposed LNA, given that ESD protection is more challenging in nanoscale technologies.  
Figure 11: _Cont._  
Figure 10: LNA power gain versus input power.