## 4 Simulation Results and Discussion
### Functional Verification
For the specific values of the sequence, we ensure that each target appears at least once in the input data through careful design. However, in practical scenarios, the selection of the input data length and target length is determined based on actual application requirements. To demonstrate the superiority of our proposed system more clearly, we conducted simulations that compared our proposed system with prior works [25]. After obtaining the bit-recognition results, the AND gate and regenerator in the recirculating loop of both systems, along with their corresponding parameter settings, are completely identical. Figure 8 shows the simulation results of recognizing 4-bit bit-flip BPSK targets in the input data using the reconfigurable system at frequencies of 192.8 THz and 193.4 THz. As shown in Figure 8a, when the input signal frequency is 192.8 THz, the input data and targets are the same as those in Figure 6a. However, in Figure 8a, through a single configuration of the target, a logic \"1\" in the output of each loop indicates that the input data has recognized the target symbols presented to the system. Consequently, when a complete target is recognized in the input data, a logic \"1\" appears in the output of the final loop, aligned with the position of the last symbol in the target sequence. According to  
Figure 6: Simulation results of recognizing 4-bit bit-flip BPSK targets in the input data using the proposed system at frequencies of (**a**) 192.8 THz and (**b**) 193.4 THz. the final output in Figure 8a, the reconfigurable system can only recognize a single target {0, \(\pi\), 0, 0} under a single configuration. When the input signal frequency is 193.4 THz, as shown in Figure 8b, the input data and targets are set to be identical to those in Figure 6a. Moreover, to obtain accurate bit-recognition results, we set the frequency of the target to be consistent with the frequency of the input signal. However, the final simulation results indicate that the reconfigurable system fails to recognize input signals at another frequency without changing the parameters of the recirculating loop. Figure 7: Simulation results of recognizing 8-bit bit-flip BPSK targets in the input data using the proposed system at frequencies of (**a**) 192.8 THz and (**b**) 193.4 THz. The simulation results in Figures 6 and 7 demonstrate that the proposed system can recognize bit-flip BPSK targets simultaneously in the input data with tunable frequency, which greatly improves the efficiency and flexibility of the system. As attacks in optical networks become increasingly sophisticated, the limitations of existing systems that can only identify a single target at a time become apparent. To recognize multiple targets, multiple systems are typically cascaded. However, this approach not only substantially increases the cost of an optoelectronic firewall but also significantly raises its size and complexity. Therefore, our proposed system can improve recognition efficiency without increasing structural complexity. Meanwhile, as a key transmission technology in the physical layer of optical networks, WDM has become an indispensable part of backbone transmission and data center optical interconnections. However, current related research mainly focuses on processing optical signals with a specific frequency. Since the all-optical sequence recognition system primarily consists of all-optical logic gates, BPF, and other components, the parameters and performance of these components are highly dependent on the frequency of the input signal. If the parameters of these components need to be adjusted individually to accommodate optical signals of different frequencies, not only will the operational complexity be extremely high, but it will also significantly increase the maintenance cost of the system. Our proposed all-optical pattern recognition system can be reconfigured to support the recognition of input signals with tunable frequency in WDM optical networks, thereby improving the flexibility and versatility of the system.