# Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET
## 4 Experimental Verification
Next, Figure 9 presents the photo of the experimental setup in the DPT configuration during experiments. Figure 7: Photo of the designed AGD. 1—filtering and logical signal board (AGD input), 2—DC/DC boost converter 15/30 V, 3—isolated power supply, 4—optical receivers HFBR 2531-Z, 5—output of the AGD. The first test was conducted with the CGD--Figure 10 (\(V_{\rm DD}\) = 700 V, \(I_{0}\) = 270 A) presents the turn-on cycle for a standard gate voltage of \(V_{\rm CGG}\) = 15 V. After the drain current overshoot, continuous, weakly damped oscillations can be observed, and they are continued after the end of the turn-on process where the impact on the drain-source voltage is also visible. The voltage fall time is slightly above 300 ns. Comparing it to the same turn-on cycle from Figure 11, the impact of the AGD on \(i_{\rm D}\) and \(v_{\rm DS}\) can be noticed. As expected, the AGD increased the speed of the \(v_{\rm DS}\) voltage decrease (<200 ns) and shortened the cycle without causing any negative effects on the transient. Individual influences of the AGD on the \(di_{\rm D}/dt\) and \(dv_{\rm DS}/\rm dt\) ratios and drain current oscillations are marked on the waveforms  
Figure 8: Experimental setup of the DPT with a medium-voltage (MV) SiC MOSFET CAS300M17 BM2 module. Figure 9: Photo of the experimental setup. 1—CAS300M17 BM2 module, 2—DC bus and blocking capacitors. presented in the following Figure 12 (\(V_{\rm DD}\) = 900 V, \(I_{0}\) = 270 A). The shown voltage \(V_{\rm GG+}\) is the positive rail of the gate driver and, as it can be seen, the switching from a value of 15 to 30 V was obtained in proper moments of the cycle. The first decrease in the \(V_{\rm GG}\) voltage was delayed on purpose to increase the \(d_{\rm ID}/dt\) ratio which occurs in the turn-on energy depletion without \(i_{\rm D}\) overshoot in crucial moments. The AGD had the most visible impact on the \(dv_{\rm DS}/dt\) ratio, decreasing ipso facto the falling time of \(v_{\rm DS}\). Moreover, the AGD delay between the ideal point of the switching \(V_{\rm GG+}\) voltage can be noticed in Figure 12. In addition, the response time of the AGD can be noticed, which is visible as a result of the summary delays of used electronical components and filtering subcircuits. Comparing both obtained waveforms for the AGD, the damping of the drain current oscillations is greater in the case with \(V_{\rm DD}\) = 900 V, contrary to the case with \(V_{\rm DD}\) = 700 V. However, in both shown AGD cases, the impact on the drain current oscillations can be seen. Figure 11: The turn-on cycle of the SiC MOSFET from module CAS300M17 BM2 with AGD. \(V_{\rm DD}\) = 700 V, \(I_{0}\) = 270 A.  
Figure 5:0 The turn-on cycle of the SiC MOSFET from module CAS300M17 BM2 with CGD. \(V_{\rm DD}\) = 700 V, \(I_{0}\) = 270 A. In summary, the experimental measurements of the turn-on energy \(E_{\rm on}\) of the AGD and CGD in the same switching conditions (\(V_{\rm DD}\), \(I_{0}\) and probes' tolerances) are shown in Figure 5:1 The turn-on energy of the CAS300M17 BM2 MV SiC MOSFET using the AGD was decreased in all of the measured conditions compared to the CGD. The turn-on energy was decreased even by 10.1%, with an average of 7% for all measured turn-on energies. Comparisons of the obtained results from experimental and simulation studies are presented in Figure 5:2 \begin{table}
\begin{tabular}{c c c c} \hline \(V_{\rm DD}\) & \(I_{0}\) & \(E_{\rm on}\) CGD & \(E_{\rm on}\) AGD \\ \hline
700 (\(\pm\)14) V & 170 (\(\pm\)3.4) A & 23.5 (\(\pm\)0.94) mJ & 21.5 (\(\pm\)0.86) mJ \\
700 (\(\pm\)14) V & 270 (\(\pm\)5.4) A & 37.9 (\(\pm\)1.52) mJ & 36.0 (\(\pm\)1.44) mJ \\
900 (\(\pm\)18) V & 170 (\(\pm\)3.4) A & 32.3 (\(\pm\)1.29) mJ & 29.0 (\(\pm\)1.16) mJ \\
900 (\(\pm\)18) V & 270 (\(\pm\)5.4) A & 53.9 (\(\pm\)2.16) mJ & 50.0 (\(\pm\)2.0) mJ \\ \hline \end{tabular}
\end{table} 
Table 2: The turn-on energy losses of AGD and CGD comparisons from the experimental test.