# A New Control Scheme for the Buck Converter
## 5 Conclusions  
In this paper, a new control scheme of the buck converter was proposed. This converter uses an alternative method to control the \(\mathrm{T_{ON}}\), and \(\mathrm{T_{OFF}}\). The converter has three features/advantages. First, the \(\mathrm{T_{OFF}}\) is controlled to keep the switching frequency constant. The constant switching frequency feature can alleviate the EMI issue in applications. In addition, it is not difficult to implement, requiring only the PFD, charge pump, and low pass filter. Second, the control method is based on CMC technique, but does not require the actual current sensor, which greatly reduces the complexity of the circuit. Third, the circuit is easy to realize and does not have special layout considerations; thus, it is suitable for mass production. Finally, the converter was verified by SIMPLIS. From the simulation results, the control topology has good transient performance. In future, the scheme can be implemented with UMC 0.18 \(\upmu\)m 1P6M CMOS processes.  
\begin{table}
\begin{tabular}{c c c c c c c} \hline \hline
**References** & **2018 [23]** & **2020 [24]** & **2021 [15]** & **2021 [22]** & **2022 [21]** & **This Work** \\ \hline Results & simulation & simulation & simulation & simulation & simulation & simulation \\ Control scheme & AOT & AOT & AOT & AOT & AOT & AOT \\ Process (\(\upmu\)m) & 0.35 & 0.18 & 0.35 \({}^{\star}\) & 0.18 \({}^{\star}\) & 0.35 \({}^{\star}\) & 0.18 \({}^{\star}\) \\ Input voltage (V) & 12 & 3.3–5.0 & 3.0–3.6 & 3.0–3.6 & 3.0–3.6 & 3.0–3.6 \\ Output voltage (V) & 1.2 & 1.8 & 1.0–2.5 & 1.0–2.5 & 1.0–2.5 & 1.0–2.5 \\ Inductor (\(\upmu\)H) & 1 & 1.5 & 4.7 & 4.7 & 4.7 & 4.7 \\ Output Capacitor (\(\upmu\)F) & 47 & 20 & 10 & 10 & 10 & 10 \\ Switching Frequency (MHz) & 1 & 1 & 1 & 1 & 1 & 1 \\ Switching frequency variation (\%) & N/A & N/A & N/A & 1 & 3.5 & 1.2 \\ Max. Load current (mA) & 5000 & 2000 & 500 & 500 & 500 & 500 \\ Load current step (mA) & 4000 & 800 & 400 & 400 & 400 & 400 \\ Undershoot/Overshoot (mV) & 20/26 & 13/14 & 23/26 & 20/24 & 21/30 & 21/21 \\ Recovery time (\(\upmu\)s) (rise/fall) & \textless{}3 & 6/2 & 1.98/1.6 & 1.69/1.62 & 1.8/1.5 & 1.57/1.34 \\ \hline References & 2019 [25] & 2021 [11] & 2021 [26] & 2021 [27] & 2022 [28] & \\ \hline Results & measurement & measurement & measurement & measurement & measurement & \\ Control scheme & Current-Mode & Hysteretic & COT & COT & AOT & \\ Process (\(\upmu\)m) & 0.065 & 0.35 & 0.13 & 0.18 & 0.18 \\ Input voltage (V) & 3.3 & 3.3–3.6 & 7–15 & 4.25–15 & 1.6–2.2 \\ Output voltage (V) & 0.6–2.0 & 0.9–2.5 & 5–7 & 1.1 & 0.4–1.2 \\ Inductor (\(\upmu\)H) & 2.2 & 4.7 & 2.2 & 0.47 & 0.33 \\ Output Capacitor (\(\upmu\)F) & 10 & 10 & 10 & 47*3 & 10 \\ Switching Frequency (MHz) & 1 & 1 & 2 & 0.5–1.25 & 3 \\ Switching frequency variation (\%) & N/A & 1 & N/A & 42 & N/A \\ Max. Load current (mA) & 1500 & 600 & 2000 & 5000 & 500 \\ Load current step (mA) & 900 & 400 & 2000 & 5000 & 450 \\ Undershoot/Overshoot (mV) & 106/87 & 30/60 & 85/72 & 30/15.7 & 20/20 \\ Recovery time (\(\upmu\)s) (rise/fall) & 3.4/3.6 & 2.6/2.2 & 3/2.7 & 80/45 & 3.4/3.6 \\ \hline \hline \end{tabular}  
* This work is system level simulation with SIMPLIS.  
\end{table}
Table 3: Performance Comparisons with Reported Converters.  
**Author Contributions:** Conceptualization, H.-H.C.; Data curation, J.-Y.C. and T.-H.T. and J.-Y.Y. and X.Y.; Methodology, H.-H.C. and J.-Y.Y.; Validation, H.-H.C. and S.-F.W.; Formal analysis, J.-Y.Y. and J.-Y.C.; Writing--original draft, J.-Y.Y. and J.-Y.C.; Writing--review & editing, H.-H.C. and S.-F.W. All authors have read and agreed to the published version of the manuscript.  
**Funding:** This research received no external funding.  
**Institutional Review Board Statement:** Not Applicable.  
**Informed Consent Statement:** Not Applicable.  
**Data Availability Statement:** Not Applicable.  
**Conflicts of Interest:** The authors declare no conflict of interest.