# A Review of Sharp-Switching Band-Modulation Devices
## 6 Reconfigurable Sharp-Switching Modes
### Tfet  
A band-modulation device can also be operated in the TFET mode, without any structural changes; the device anatomy and gate voltage polarity are preserved, but the anode is reverse biased. Figure 24 again shows a hocus-pocus diode with a positive V\({}_{\text{FG}}\) > 0, a floating V\({}_{\text{BG}}\) (no back-gate voltage), and a variable anode voltage V\({}_{\text{A}}\). The I\({}_{\text{A}}\)-V\({}_{\text{A}}\) characteristics are highly asymmetric, denoting fundamentally different operation mechanisms. When V\({}_{\text{A}}\) is positive, we obtain the sharp-switching feedback-based \(Z^{2}\)-FET characteristic described earlier, with a nearly vertical transition from I\({}_{\text{ON}}\) to I\({}_{\text{OFF}}\). On the other hand, the negative V\({}_{\text{A}}\) produces a TFET mode, where the I\({}_{\text{A}}\) is generated via band-to-band tunneling (BTBT) at the anode junction and flows between the heavily \(P^{+}\) anode and the electrostatically doped electron-rich region under the front gate.  
Figure 23: Current vs. gate voltage measured in a \(P\)-type I-MOS fabricated on FD-SOI (adapted from [57]).  
The TFET mode of the band modulation device in Figure 24 has the merit of emphasizing the extreme reconfigurability of the band-modulation device, but the SS obtained experimentally is disappointing, as is the low \(\mathrm{I_{ON}}\). These drawbacks are common to all experimentally realized Si-based TFETs. While numerical simulations relying on ideally abrupt junctions (and favorable adjustable parameters in the interband tunneling transmission coefficients) have led to predictions of SS below the 60 mV/decade limit over a wide range of current densities, including practically relevant \(\mathrm{I_{ON}}\)[60], the reality is rather different. Due to the large Si bandgap and relatively heavy tunneling masses, no all-silicon TFET has delivered an \(\mathrm{I_{ON}}\) exceeding 1 \(\upmu\)A/\(\upmu\)m, while maintaining sharp SS over several decades of \(\mathrm{I_{D}}\). Attempts to improve \(\mathrm{I_{ON}}\) by moving to lower \(\mathrm{E_{G}}\) channel materials or by employing heterostructures, where the BTBT process would occur in a lower bandgap material (like Ge), while retaining CMOS compatibility have met with limited success [61; 62].  
Even moving further afield from Si, experimentally realized TFETs with III-V channels have not provided a compelling combination of \(\mathrm{I_{ON}}\) and low SS over a reasonable number of \(\mathrm{I_{D}}\) decades. A comparison of TFET performance with room-temperature CMOS is provided in Figure 25, using the simple benchmarking technique proposed by [PERSON] and co-workers [63]. The transfer characteristic at a fixed source-drain (i.e., anode-cathode) voltage \(\mathrm{V_{D}}\) is analyzed by finding the average SS between \(\mathrm{I_{OFF}}\) and \(\mathrm{I_{ON}}\), which is plotted against \(\mathrm{I_{ON}}/\mathrm{V_{D}}\). The lower-right corner, with SS slightly above the 60 mV/decade value and \(\mathrm{I_{ON}}\) higher than 100 \(\upmu\)m/(\(\upmu\)\(\cdot\)V) is the domain of modern FinFET or FD-SOI CMOS transistors. Despite persistent efforts by researchers in a number of academic and industrial laboratories, including a recent tour-de-force of hybrid co-integration of III-V TFETs and MOSFETs on Si [64], no TFET to date has come close to outperforming CMOS at digital switching. This rather disappointing performance of the experimentally reported TFETs to date may spur the development of alternative CMOS-compatible sharp-switching devices, such as the band-modulation devices described in this article. One solution however for TFETs might consist in using the bipolar-enhanced TFET structure known as the BET-FET [66]; the tunneling current forms the base current and is naturally amplified by the internal gain of the bipolar transistor.  
Figure 24: Experimental current vs. anode voltage characteristics showing the same device operating as a TFET (for \(\mathrm{V_{A}}<0\)) and a \(Z^{2}\)–FET (for \(\mathrm{V_{A}}>0\), adapted from [12]).