# All-Optical Non-Inverted Parity Generator and Checker Based on Semiconductor Optical Amplifiers
## 3 Experimental Result and Discussion  
The experimental scheme of all-optical non-inverted parity generator and checker are presented in Figure 2.  
The parity generator is shown in Figure 2a, the three inputs include signal light \(A\), \(B\), and probe light Clk. The polarization state is adjusted by polarization controller (PC). The 10 GHz optical Clk pulse modulated by the intensity modulator 1 (IM1) and amplified by erbium-doped fiber amplifier (EDFA), then it modulated as 10 Gbit/s pseudo-random code sequence (PRBS) of 27-1 length by IM2. In the same way, the probe light Clk enters the wave-decomposition multiplexer (WDM) together with PRBS light after PC and IM2 through a 50:50 optical coupler. It is divided into 3 channels for modulation respectively. Among them, PC controls the polarization state, ODL controls the relative delay, and variable optical attenuator (VOA) adjusts the optical power. The three light waves include (1) light \(A\), 1550.9 nm wavelength with data code \"0111001\", (2) light \(B\), 1551.7 nm wavelength with data code \"1100101\", and (3) the probe light with data code \"1111111\". After, they are injected into SOA1, using the FWM effect and XGM effect of SOA1 and the center wavelength through the tunable optical band pass filter (TOBPF) with 0.26 nm narrow band is selected, the output results \(Pe\) and \(Po\) are obtained, as shown in Figure 2b the parity checker is used as a parity bit for verification.  
The circuit of the parity checker is shown in Figure 2b. The input \(\lambda_{out}\) is connected with the output \(\lambda_{out^{\prime}}\) of the parity generator, so the parity generator can be realized by the extension of the parity generator. \(Pe^{\prime}\) and \(Po^{\prime}\) is the output of the parity generator. Use an optical switch as a selector to control the output of the parity checker (Ce or Co). The OSC (oscilloscope: Agilent-86100A) and OSA (optical spectrometer analyzer: Agilent-86142B) are used to observe the signal waveform and spectra of the output of the logic gate, respectively. The main device parameters are given: the bias current of SOA is 300 mA. The maximum power of EDFA is 20 dBm. The bandwidth of TOBPF is 0.26 nm. The adjustable attenuation range of VOA is from 1.5 dB to 25 dB. The maximum delay of the optical delay line is 660 ps. The SA consists of a 3 dB coupler and a 5 m erbium-doped fiber. The experimental parameter settings of all logic gates are shown in Table 4.  
Figure 2: The experimental setup of all-optical non-inverted parity generator (**a**) and checker (**b**) (PC polarization controller, EVOA electrical variable optical attenuator, IM intensity modulator, CLK electronic clock, ODL optical delay line, VOA variable optical attenuator, TOBPF tunable optical band pass filter, WDM wavelength division multiplexer, SMF single-mode fiber, EDFA erbium-doped fiber amplifier, OSW optical switch, SA saturable absorber).  
OSNR are improved to about 2 dB difference for the original value with the SA. For the implementation of the \(Pe\) and \(Ce\), they keep the good performance by the amplified effect of SOA.  
This solution uses continuous wave (CW) as the probe light which can balance the power relationship of each light and keep the power constant, and avoid the XGM effect caused by carrier concentration changed in the active region when multiple lights incident on the SOA at the same time. Meanwhile, we need to keep the clock and signal dynamics consistent during the experiment.