# Arrayable TDC with Voltage-Controlled Ring Oscillator for dToF Image Sensors
## 1 Introduction  
TDC is an important component of systems based on Light Detection and Ranging (LIDAR) using the direct time-of-flight (dToF) principle [1], and an on-chip integrated TDC is usually used to accurately measure the time in flight of photons [2]. The LIDAR system emits photons and receives the returned photons through a photodetector, generating START and STOP signal pulses, respectively. Photon flight time is equal to the time interval between the START and STOP pulses, and the photon flight time is converted into a digital code by the TDC to indicate the distance to the target. At present, the dToF ranging method has become a popular feature development direction of 3D depth vision technology by virtue of its long ranging distance and better low-light performance, while the performance of TDC directly determines the ranging accuracy and error of dToF LIDAR [3, 4, 5, 6].  
Common types of TDCs are as follows [7]: (1) clock-period counter-type TDC, which uses a fixed-frequency clock to drive the counter counting principle, and the period T of this clock is the smallest unit of time quantization, with the advantage of a simple structure and a large measurement time range, and the disadvantage of a limited accuracy. (2) Delay line-type TDC: this adopts a series of CMOS gate delays in the delay line as the basic unit, with its minimum resolution depending on the gate delay time. Typically, in a 180 nmprocess, the transmission delay of an inverter is only about 50 ps. This structure overcomes the issue that the resolution index of traditional counter-type TDCs is restricted by the clock frequency. (3) Vernier TDC: its functional principle is analogous to that of a vernier caliper. It extends the gate-level delay line-based TDC to two delay lines, and its resolution is equal to the difference between the delay time of the fast delay line unit and that of the slow delay line unit, enabling a resolution lower than the gate delay. However, it is susceptible to process and environmental factors, which lead to variations in the delay time of each delay unit. Eventually, the difference between the two delay lines becomes larger, resulting in poorer linearity of the TDC [8]. (4) Counter-type + delay-lines type TDC: this hybrid structure of a multi-stage measurement TDC can improve the measurement accuracy while expanding the maximum measurement time range [9].  
In summary, the combination of each single-mode TDC and segmented TDC constitutes a wide dynamic range and high-resolution TDC, and in the multi-segment TDC system architecture. The time to be measured in the lower segment TDC is actually the remaining time of the higher segment TDC, which is in essence the quantization of the time to be measured by a variety of TDCs with different resolutions. The key to realization is the articulation between the TDCs of each segment, that is, to satisfy the phase matching between adjacent segments [10]. Based on the foundation of multi-segment TDC realization, many novel structures have been born. For example, the ring oscillator type TDC, which has the advantages of a simple structure and robustness [11], is the most suitable type of TDC to be integrated into large-scale arrayed LiDAR chips.  
In this paper, a high-performance gated ring oscillator type TDC for LIDAR applications is proposed. Based on gated edge triggering, a phase arbiter circuit is used to sample and hold the corresponding eight-phase rising edge positions in the VCRO at the moment of the onset of the START and STOP pulse signals, which effectively avoids the sampling error and improves the linearity of the TDC. Section 2 discusses the proposed TDC architecture and its operating principle. Section 3 describes the circuit implementation and design ideas. The simulation results are further analyzed in Section 4. Finally, Section 5 draws the conclusions.