# A g\({}_{m}\)/I\({}_{\rm D}\)-Based Low-Power LNA for Ka-Band Applications
## 2 Design Procedure
Since the Ka-band frequency range spans from 26.5 GHz to 40 GHz and the n257 frequency band (26.5 to 29.5 GHz) defined in the 3 GPP 5G NR specification is particularly interesting for European mm-mave communications, a central frequency of 28 GHz is considered for the LNA design. To achieve high gain with a low NF and reasonable power consumption, a cascade topology, as shown in Figure 2, is selected [32; 33; 34; 35; 36]. It provides a high output impedance and higher input/output isolation compared to common-source and common-gate amplifiers, which allows the designer to cascade several stages if a higher gain is needed. Figure 1: Schematic diagram of the setup used to obtain the I\(-\)V curves of the FB\(-\)FET from GlobalFoundries 45 RFSOI PDK (**a**) and representation of the device capacitances (**b**). The inversion coefficient (IC) is used to identify the sub-threshold operation region of a MOSFET and is expressed using Equation (1), with \(W/L\) being the MOSFET aspect ratio and \(I_{spec\square}\), the specific current defined as (2) [37]. Details regarding the obtaining of \(I_{spec\square}\) for a given process can be found in [37]. The definition of \(IC\) results in the definition of three inversion regions: weak inversion (for \(IC\leq 0.1\)), moderate inversion (for \(0.1<IC\leq 10\)), and strong inversion (\(10<IC\)). \[IC=\frac{I_{DS}}{I_{spec\square}\cdot W/L} \tag{1}\]  
\[I_{spec\square}=2n\mu_{0}C_{ox}U_{T}^{2} \tag{2}\]  
Following [14], a figure of merit for RF performance (FoM\({}_{RF}\)) can be defined, as shown in Expression (3), which can be employed to find the optimal inversion coefficient IC value for a given transistor in a high-frequency design. \[FoM_{RF}=(g_{m}/I_{D})\cdot f_{T} \tag{3}\]  
The values of \(g_{m}/I_{D}\), \(t_{T}\), and FoM\({}_{RF}\) are presented in Figures 3a, 3b and 3c, respectively. Note that, as seen in Figure 3a, \(g_{m}/I_{D}\) is maximal in the weak inversion region and it decreases as IC moves toward the strong inversion region. On the other hand, the \(t_{T}\) value (Figure 3b) is remarkably low in weak inversion and it rises as IC moves towards strong inversion. The result, as expressed in (3) and presented in Figure 3c, is that the moderate inversion region achieves the optimal trade-off and it benefits from the best combination of transistor efficiency \(g_{m}/I_{D}\) and high-frequency performance (\(t_{T}\)). However, with this approach, the value of the input impedance (\(Z_{11}\)) and optimal NF impedance (\(Z_{opt}\)) are not known yet. Impedance selection is critical in the design process, as the input matching network implementation severely affects the gain and noise performance of the LNA. Figure 2: Schematic diagram of the cascode LNA developed. In conventional cascode amplifier design, where a common-source and a common-gate amplifier are used in series, simultaneous minimum NF and maximum gain matching can be achieved if source degeneration (L\({}_{S}\)) is applied. Generally, the drain current density and transistor width are increased to move \(Z_{opt}\) to the 50 \(\Omega\) circle, and then a single gate inductance (L\({}_{G}\)) can be employed to match the circuit [38]. Therefore, a \(Z_{opt}\) with a real part close to 50 \(\Omega\) is desired to facilitate impedance matching with a single gate inductor. To consider device geometries that allow this condition, assume the input impedance of a CS amplifier is given as (4) and the real part of the optimum source impedance is (5) [38; 39]. From the state of the art, at Ka-band frequencies, an L\({}_{G}\) under 500 pH and an L\({}_{S}\) between 50 and 250 pH are conventionally used. Notice the parameters in (5) are known, and thus, the required width for \(Z_{opt}\) = 50 \(\Omega\) can be obtained.