## 3 Comparison with Existing Schemes  
The attractive feature of the proposed circuit arrangement includes a reduction in the solid-state devices compared to the topologies realized with a similar approach. This reduction not only reduces the size and cost but also lowers the control and circuit complexity. Turning on and off of a switching transistor requires the use of a gate driving circuit and a separate isolated dc supply. A large number of devices and components are to be employed in the development of gate driving and dc supply circuit. Therefore, their size and cost are much larger than the cost and size of a switching transistor. The number of switching transistors employed in the suggested circuit is four, so only four gate driving circuits and four dc supplied are required. The switching transistors and diodes employed in [17] and [18] are eight and six, respectively. Therefore, there is a need for eight and six gate driving and dc supply circuits, respectively. The cost against reducing the switching transistors in [19] is paid with an additional bulky low-frequency center tap transformer. The current and voltage rating of all operating diodes and transistors in the proposed circuit and converter in [17; 18; 19] equals load rms voltage and load rms current. The power losses caused by the solid-state devices are switching, conduction, and leakage losses. The leakage losses are off-state losses that are normally ignorable as leakage current is negligible. The conduction losses of an operating transistor and diode in a high-frequency PWM interval (\(t_{sw}\)) with output current (\(i_{o}\)), diode forward voltage (\(v_{f}\)), diode on resistor (\(R_{f}\)), and transistor on resistors (\(R_{tr}\)) are calculated in Equation (13) as realized in [21]. \[P_{cond}(tr)=\frac{1}{t_{sw}}\int_{0}^{t_{sw}}i_{o}^{2}R_{tr}dt \tag{13}\]  
\[P_{cond}(tr)=R_{tr}I_{o(\text{rms})}^{2} \tag{14}\]  
\[P_{cond}(d)=\frac{1}{t_{sw}}\int_{0}^{t_{sw}}v_{f}i_{o}+i_{o}^{2}R_{f}dt \tag{15}\]  
\[P_{cond}(d)=v_{f}I_{o(avg)}+R_{f}I_{o(\text{rms})}^{2} \tag{16}\]  
The switching losses of a transistor depend on the switching frequency (\(f_{s}\)), operating voltage (\(V_{o}\)), operating current (\(I_{o}\)), turn-on time (\(t_{on}\)), and turn-off time (\(t_{off}\)). Here the operating voltage and current are considered quasi dc as the switching frequency is much  
\begin{table}
\begin{tabular}{c c c c c c c c c c c c c c c} \hline \hline \multicolumn{1}{c}{} & \multicolumn{4}{c}{**Non-Inverting Output**} & \multicolumn{4}{c}{**Inverting Output**} \\ \hline \multicolumn{2}{c}{**Positive Input**} & \multicolumn{4}{c}{**Negative Input**} & \multicolumn{4}{c}{**Positive Input**} & \multicolumn{4}{c}{**Negative Input**} \\ \multicolumn{2}{c}{} & \multicolumn{4}{c}{**Voltage**} & \multicolumn{4}{c}{**Voltage**} & \multicolumn{4}{c}{**Voltage**} & \multicolumn{4}{c}{**Voltage**} \\ \hline \(Q_{1}\) & on & \(D_{1}\) & on & \(Q_{1}\) & off & \(D_{1}\) & off & \(Q_{1}\) & off & \(D_{1}\) & on & \(Q_{1}\) & on & \(D_{1}\) & off \\ \hline \(Q_{2}\) & on & \(D_{2}\) & on & \(Q_{2}\) & off & \(D_{2}\) & off & \(Q_{2}\) & off & \(D_{2}  
higher than the source frequency. The switching losses of a transistor are realized with a similar approach employed in [21]. \[P_{sw}(tr)=\frac{1}{2}V_{o}I_{o}f_{s}(t_{on}+t_{off}) \tag{17}\]  
The switching losses of a diode are directly associated with reverse recovery transition. Therefore, they depend on the reverse recovery charge (\(Q_{rr}\)) and are computed with a similar approach [21]. \[P_{sw}(d)\approx V_{o}f_{s}Q_{rr} \tag{18}\]  
The conduction of two transistors and two diodes in the proposed topology and converters in [17; 18; 19] helps realize the operation in any operating mode.