## 3 Device Measurement Results
We conducted an APD bandwidth simulation based on our proposed linear model, which included the bandwidth limiting factors of the avalanche delay time, secondary hole transit time, and RC-delay time [18]. For sensitivity measurement, samples of device C with both the top- and back-side illuminated structures were fabricated. These chips were integrated with 25 Gbit/s trans-impedance amplifiers (TIA) (Semtech; 200 Flynn Road, Camarillo, CA 93012. Product: GN1085) in a packaged ROSA module. During measurement, we adopted a commercial 25 Gbit/s electro-absorption modulated laser (EML) (2 Source Photonics; 8521 Fallbrook Avenue #200, West Hills, CA 91304) to serve as the light source with a 4.8 dB extinction ratio (ER) adjusted to maintain the averaged power to be the same as the optical modulation amplitude (OMA). Figure 8b shows the measured bit error rate (BER) values versus the OMA. A pseudorandom binary sequence (PRBS) of length 2\({}^{31}\)-1 with a 25.78 Gbit/s date rate was used for testing. The green line shows the essential BER value (5 \(\times\) 10\({}^{-5}\)) needed to meet the KR4 forward error correction (FEC) coding. To measure BER, the APDs were integrated with a clock and data recovery (CDR) unit. The BER curves were measured using a commercially available APDs device integrated with the ROSA package [4; 9] also shown for reference. Figure 7: The measured O-E frequency responses for (**a**) Devices A and (**b**) device B under low power 20 (1) μW and high gain operation. During BER measurement under 20 \(\upmu\)W of optical input power, the optimized bias voltage of each ROSA module was near \(-\)15.5 and \(-\)16 V with a corresponding \(\sim\)6 and 13 A/W responsivity to obtain the highest sensitivity for the top- and back-side illuminated chips, respectively. Here, under the optimized bias point for high sensitivity operation, the corresponding GBP value of device C, with its backside-illuminated structure, is around 288 GHz (0.7 A/W for unit gain). The two structures achieved a sensitivity of around \(-\)20.6 dBm OMA which meets the specifications for 100 GbE-ER4-Lite (40 km) applications (40 km) [19], which requires the receiver operate under a BER value of 5 \(\times\) 10\({}^{-5}\) at an optical wavelength of 1.31 \(\upmu\)m with a \(-\)18.5 dBm OMA sensitivity for 25 Gbit/s operation. Of the three devices (A to C) studied here, Device A has the thinnest active layer, representing the fastest intrinsic speed performance. In order to further improve the high-speed performance of our APD structures (A to C), we utilized the equivalent-circuit modeling technique to investigate whether the carrier transit time or RC-bandwidth limits the speed of Device A. Figure 9a shows the equivalent circuit models adopted for fitting of the microwave reflection coefficient (S\({}_{22}\)) parameters for Device A. The Smith chart in Figure 9b shows the fitted and measured frequency responses corresponding to the S\({}_{22}\) parameters for Device A. Clearly, there is a good match between the simulated and measured results. The fitted values for each circuit element in Device A are shown in Table 1. During the process of device modeling for the extraction of the extrinsic f\({}_{\text{RC}}\) of the PD chips, the two artificial circuit elements, R\({}_{\text{T}}\) and C\({}_{\text{T}}\), are removed. This is because they are used to mimic the low-pass frequency response of the internal carrier transient time [16; 20]. By choosing the proper values of R\({}_{\text{T}}\) and C\({}_{\text{T}}\) to fit the measured O-E frequency response, we can then determine the internal transient time limited frequency responses of our devices. Figure 9c shows the measured O-E, fitted O-E, RC-limited and transient time limited frequency responses. As can be seen, under \(-\)13 V, Device A has an RC-limited O-E bandwidth. A wider 3-dB O-E bandwidth can be expected by further downscaling of the active diameter.