## 3 Applications
### Phase-change Memory (PCM)
#### 3.1.1 Device Architectures  
To overcome the scaling limits for conventional Flash memory technology, one of the most attractive approach is the cross-point memory architecture, which allows for the most compact storage with \(4F^{2}\) cell size where \(F\) is the minimum half pitch. The cross-point PCM devices generally require a selector device within each memory cell to reduce the unwanted leakage current through unselected cells during the read operation. As shown in Figure 13, each memory cell comprises a PCRAM device using a conventional mushroom-type device and a selection transistor. The cell can be accessed by a  
Figure 12: (**a**) The required writing current and phase transition cell size as a function of the design rule of the PCM devices. Adapted with permission from Reference [68]. ©2005 IEEE. (**b**) I-V curve of a GST PCM cell in the crystalline and in the amorphous states. Adapted with permission from Reference [69]. ©2004 IEEE. bit line connected to the gate of the transistor and a word line connected to the top electrode of PCM element [70; 71]. Metal-oxide-semiconductor field-effect transistors (MOSFETs) and bipolar transistors (BJTs) are the transistors that have been used in the industry for decades for selector devices. Since MOSFETs are voltage-controlled (field driven), there is little to no power waste in MOSFETs-based selectors when powered on/idling as opposed to BJTs where a little current is consumed during power on/idling. The other advantage of MOSFETs is it only operate with one type of charge carrier, hole or electron, which leads to significant noise reduction. A 4-Mb MOSFET-selected phase-change memory was reported by [PERSON] et al. [72]. More recently, FET access devices with PCM memory cells were used to perform arithmetic operations using an accumulator-based computational scheme (computational memory) [73]. Like other resistive memories, the common PCRAM cell is a two terminal device, as shown in Figure 14 (left). It generally consists of a bottom and top electrodes, the PCM layer, and a conductive element plug (also called \"resistor\", \"heater\") which contributes to the heating of the phase-change material in the different phases and provides the electrical access to the phase-change material. As fabricated, the phase change material is generally in the crystalline state, since the process temperature of the (BEOL) metal interconnect layers is sufficient to crystallize the material [76]. One of the most promising approaches to the reduction of programming current is placing the PCM in a small confined structure [68], which gives a better thermal confinement of PCM and thus increasing the efficiency of Joule heating, as shown in Figure 14 (right). The bottom pillar-shaped electrode is often made of tungsten or TiN. In the case of TiN, special attention must be paid to the potential Ti-rich regions where Ti can easily chemically react with Te to produce Ti-Te compounds. Figure 14: **(Left)** The conventional planar cell structure. **(Middle)** Confined cell structure. **(Right)** The comparison of reset current between confined and planar cell structure along with contact diameter. Adapted with permission from Reference [77]. ©2008 IEEE. Figure 13: **(Left)** Schematic of 10\(\times\) 10 PCM cell array. Adapted with permission from Reference [74]. ©2014 Frontiers. **(Middle)** Schematic of a single memory cell. Adapted with permission from Reference [74]. ©2014 Frontiers. **(Right)** TEM image for a 90 nm node mushroom PCM cell. Adapted with permission from Reference [75]. ©2010 IEEE. Ti ions may also migrate due to the electric field during the operation. As an added benefit, the size of the phase transition cell for a confined cell structure is decreased, which enables the high storage density. In 2015, Intel and Micron jointly announced that they produced 3D Xpoint PCRAM chips with a storage capacity of 128 Gbit, and memory density of 0.62 Gb/mm\({}^{2}\). Other structures and auxiliary materials have shown a path towards hybrid optical-electrical memories.