## 3 Analysis of Semiconductor Power Loss
### Switch and Diode Current  
Figure 5 presents the switch and diode current of the proposed TSBB converter in each topology. In the buck topology, the inductor current flows through S\({}_{1}\) and D\({}_{2}\) during the switch-on section and through D\({}_{1}\) during the switch-off section. The inductor current \(I_{L}\) is the output current \(I_{o}\) and \(\Delta I_{L}=\frac{V_{o}(1-d)}{L-f_{sw}}\) by the volt-sec balance law at switching frequency \(f_{sw}\), the inductor current \(I_{max}\), \(I_{min}\) flowing through switch S\({}_{1}\) and diode D\({}_{1}\)/D\({}_{2}\) can be expressed as:  
\[I_{max}=I_{o}+\frac{\Delta I_{L}}{2}=V_{o}\bigg{(}\frac{1}{R}+\frac{1-d}{2L \cdot f_{sw}}\bigg{)} \tag{1}\]  
\[I_{min}=I_{o}-\frac{\Delta I_{L}}{2}=V_{o}\bigg{(}\frac{1}{R}-\frac{1-d}{2L \cdot f_{sw}}\bigg{)} \tag{2}\]  
The inductor current flows through S\({}_{1}\) and D\({}_{2}\) during the switch-on section and through D\({}_{1}\) during the switch-off section in the boost topology. Since the inductor current  
\begin{table}
\begin{tabular}{c c c c c} \hline \hline \multirow{2}{*}{**Topology**} & \multicolumn{4}{c}{**Ref. [5]**} \\ \cline{2-5}  & \(\mathbf{S_{1}}\) & \(\mathbf{S_{2}}\) & \(\mathbf{D_{1}}\) & \(\mathbf{D_{2}}\) \\ \hline Buck & \(\frac{C_{min,02}}{C_{min,51}+C_{min,02}}V_{i}\) & - & \(V_{i}\) & \(\frac{C_{min,51}}{C_{max,51}+C_{min,02}}V_{i}\) \\ \hline Boost & - & \(V_{o}\) & - & \(\frac{C_{min,51}}{C_{max,51}+C_{min,02}}V_{o}\) \\ \hline Buck-Boost & \(\frac{C_{min,02}}{C_{min,51}+C_{min,02}}V_{i}\) & \(V_{i}+V_{o}\) & \(V_{i}+V_{o}\) & \(\frac{C_{min,51}}{C_{max,51}+C_{min,02}}V_{o}\) \\ \hline \multirow{2}{*}{**Topology**} & \multicolumn{4}{c}{**Proposed**} \\ \cline{2-5}  & \(\mathbf{S_{1}}\) & \(\mathbf{S_{2}}\) & \(\mathbf{D_{1}}\) & \(\mathbf{D_{2}}\) \\ \hline Buck & \(\frac{C_{min,02}}{C_{min,51}+C_{min,02}}V_{i}(\cong V_{i})\) & - & \(V_{i}\) & \(\frac{C_{min,51}}{C_{max,51}+C_{max,02}}V_{i}(\cong 0)\) \\ \hline Boost & - & \(V_{o}\) & - & \(V\(I_{L}\) is \(\frac{I_{o}}{1-d}\) and \(\Delta I_{L}=\frac{d\cdot V_{L}}{L\cdot f_{sw}}\), the inductor current \(I_{max}\), \(I_{min}\) flowing through switch S\({}_{1}\)/S\({}_{2}\) and diode D\({}_{2}\) can be expressed as:  
\[I_{max}=I_{o}+\frac{\Delta I_{L}}{2}=V_{i}\Bigg{[}\frac{1}{(1-d)^{2}\cdot R}+ \frac{d}{2L\cdot f_{sw}}\Bigg{]} \tag{3}\]  
\[I_{min}=I_{o}-\frac{\Delta I_{L}}{2}=V_{i}\Bigg{[}\frac{1}{(1-d)^{2}\cdot R}- \frac{d}{2L\cdot f_{sw}}\Bigg{]} \tag{4}\]  
In buck-boost topology, the inductor current flows through S\({}_{1}\) and D\({}_{2}\) during the switch-on section and through D\({}_{1}\) during the switch-off section. Since the inductor current \(I_{L}=\frac{I_{o}}{1-d}\) and \(\Delta I_{L}=\frac{d\cdot V_{L}}{L\cdot f_{sw}}\) same as boost topology, the inductor current \(I_{max}\), \(I_{min}\) flowing through switch S\({}_{1}\)/S\({}_{2}\) and diode D\({}_{2}\) can be expressed as:  
\[I_{max}=I_{o}+\frac{\Delta I_{L}}{2}=V_{i}\Bigg{[}\frac{d}{(1-d)^{2}\cdot R^{ 1}}+\frac{d}{2L\cdot f_{sw}}\Bigg{]} \tag{5}\]  
\[I_{min}=I_{o}-\frac{\Delta I_{L}}{2}=V_{i}\Bigg{[}\frac{d}{(1-d)^{2}\cdot R^{ 1}}+\frac{d}{2L\cdot f_{sw}}\Bigg{]} \tag{6}\]  
The power loss of a TSBB converter includes the losses of the switch, diode, inductor, and capacitor when various parasitic components in the circuit are ignored. The power loss of the two converters is determined by the power loss of the semiconductors assuming that the losses of the inductor and capacitor are the same between the conventional and proposed TSBB converters. Therefore, the increase or decrease in the power efficiency is determined by the operation of the switch and diode. The losses of semiconductors are divided into switching and conduction losses. A switching loss occurs during the transient time of the switching operation. Although the switching loss is 0 in the ideal condition, it is caused by the time delay attributed to the parasitic resistance and parasitic capacitance at the time of turn-on or turn-off [14; 15].