## 5 Computational Results for the TS/VNS-ATM Algorithms  
Tables 7 and 8 present the best results over 20 runs of the hybrid TS/VNS and the complementary ATM module. The algorithms were coded in VB.NET and were run on a low-end 3.10 GHz dual-core system with 4096 MBs of RAM. The parameter settings of the TS/VNS algorithms were _maxiters = 10,000_, _n(E) = 8, tabu_list1 = 6, tabu_list2 = 6, vns_counter = 60, cycle_counter = 75_. The same two random sequential PPPs were chosen for all functional groups, and two sets of experiments were conducted. In the first (Table 7), the late orders accumulated over the course of the previous PPPs were included, whereas in the other (Table 8), they were not released for dispatch. This approach highlighted one interesting aspect regarding the shop floor mentality of the case study leading up to the G-DSS implementation: Functional groups such as seizure and nailing and intermediate phases may have as little as 0 late orders, while casting, assembly, and cutting have as many as 38. Additional computational results showed that for the former groups, 0 late orders are neither a rarity nor the norm, ergo it just so happened that for the two PPPs chosen, no late orders had accumulated. For statistical reasons, the end results are presented solely for those two periods. \begin{table}
\begin{tabular}{c c c c c c c c c c c c} \hline \hline \multicolumn{2}{c}{**Functional**} & \multicolumn{8}{c}{**Late Orders Released**} \\ \multicolumn{2}{c}{**Group**} & \multicolumn{8}{c}{**Late Orders Released**} \\ \hline Two PPPs & Total Orders & Father Chid Pairings & TS/VNS \(\delta\) = 1 & TS/VNS \(\delta\) = 0 & SPT & LPT & PSF & ATM Result \\ \hline Intermediate Phases & 63 & 18 & 8/18 (34 s) & 12/18 (32 s) & 3 & 23 & 96 & 74 & 1 & 3 & 6/10 & 3/6 \\ \hline Cylinder Components & 65 & 33 & 20/33 (37 s) & 23/33 (36 s) & 33 & 51 & 9 & 34 & 58 & 15 & 9/13 & 7/10 \\ \hline Seizure and Nailing & 48 & 18 & 9/18 (29 s) & 11/18 (27 s) & 29 & 14 & 30 & 31 & 41 & 55 & 5/9 & 4/7 \\ \hline Cutting & 145 & 24 & 7/24 (75 s) & 12/24 (72 s) & 14 & 32 & 45 & 34 & 41 & 34 & 10/17 & 7  
The tables show the functional group, the total number of orders and \(p(i,j)\) pairings, and the number of correct orientations achieved by TS/VNS with the running time given in the brackets. Two executions of TS/VNS are performed: In the first, parameter \(\delta\) is set to 1, i.e., late orders due to the first- or second-level dispatching are prioritized, and in the second, \(\delta=0\). The next three columns show the percentages (weights) with which each PDR participates in the best synthesis of rules for each execution. The final column depicts the ATM results. No ATM runs were performed if TS/VNS reached the optimum number of proper \(p(i,j)\) orientations. The maximum running time of ATM was 9 s, and due to this very small value, running times are not included. At first glance of the results, what becomes apparent is the strong effect \(\delta\) has on the solution quality. If late orders stemming from initial dispatching, even if previous PPP late orders are not released, are prioritized, then fewer pairs will be properly oriented. Since no machine idle time is allowed during schedule construction, a late order would be scheduled first in a work center compared to a child, whose father may be constrainedly first on its relative work center if no other orders are present. Therefore, this \(p(i,j)\) pair could become wrongly oriented. The same applies if there are additional orders in the father's work center, but their cumulative processing time is insufficient to surpass both the late orders and the child's time. This was particularly evident in the cutting group where the capacity of work center A511 (see Table 4) is sizeable, leading to a very large number of short production orders. In general, if late orders are not released (Table 8), TS/VNS performs slightly better, see for example, the assembly group, but the overall average performance is similar.