## 1 Introduction  
The current technology trends push towards the realization of integrated circuits (ICs) characterized by smaller size, lower power supply voltages, and higher operating frequencies [1]. In addition, conventional solutions are no longer applicable and, therefore, a great amount of effort is given to finding new materials (such as the use of nanomaterials [2]) and/or new architectures (e.g., the 3D integration [3]).  
These design trends are followed to strongly enhance IC performance, but give rise to serious electromagnetic compatibility (EMC) issues, such us unwanted conducted and radiated emissions and, in general, undesired electromagnetic interference (EMI) problems [4; 5; 6]. The reduction and mitigation of IC emissions have recently become of great interest in application fields, like automotive or consumer electronics, since it allows to fulfill the EMC requirements without the burden of the classical solutions to such problems, such as the use of filters or shields.  
Therefore, nowadays an IC-level characterization of EMC issues is needed, whereas, in the past, these issues have been typically studied at the printed circuit board (PCB) level [7]. The IC-conductedemission is mainly due to the switching activity, hence, an accurate modeling must be implemented to evaluate the switching pulsed current flowing from the IC to the PCB [8]. The conducted emission is also dangerous because it can easily convert into radiated emission when such currents flow across PCB traces and cables that can act as emitting antennae. As for the radiated emission, the contribution of the radiation coming from the package lead frame or circuits routed at the silicon level (\"direct radiation\") is no longer negligible with respect to the radiation coming from the PCB (\"system level radiation\") and must be taken under control, to avoid any interference with nearby circuitry. Therefore, both direct IC radiation [9; 10] and system-level radiation [11; 12] have been studied by means of measurements and numerical simulations.  
The requirements and limits imposed by the EMC norms are set for the final product and not for the single subpart, therefore, traditionally EMC testing (including EMI analysis) was usually performed at a very late stage of product development, namely, on the complete prototype. As a consequence, only at that stage was it possible to choose the solutions needed to mitigate these problems. Given today's operating frequencies, such an approach can be very costly and time consuming and, hence, the EMC/EMI issues must be included at the design level. This can be done, in principle, by means of a full-chip simulation, which, however, results in being extremely cumbersome. Therefore, several alternative approaches have been proposed, typically based on a segmentation technique, where any single subpart of the system is described with a proper equivalent circuit model.  
This paper proposes two models: a circuital model to simulate the currents flowing from the IC to the package pins, where the IC and the package is modeled by a lumped circuit and the board by a distributed one. An electromagnetic model is then derived to estimate the far-field direct emission from the IC, using the outputs of the circuital model (i.e., the package currents), regarded as the sources of the field problem.  
The paper is organized as it follows. Section 2 illustrates the circuital and the electromagnetic models and discusses the design and setups of the experiments. In Section 3, the identification of the model parameters is carried out and the experimental validation of the models is presented. A detailed discussion of the simulation and the measurement results is also provided.