## 3 Physical Layer Design
### Channel Characteristics  
The medium of communication between chips is envisioned to be partially through the air between the chips and through a stack of silicon/silicon dioxide or packaging and encasement of the individual chips. Due to the wide variety of materials used in the fabrication of chips even more diversified by integration of heterogeneous chiplets in a multi-chip system specific channel models need to be developed to fine-tune consequent antenna and transceiver design. This introduces challenges in having universal solutions that will fit all environments. The distance between the chips will be the dominant factor affecting the path loss. For normal out-door and in-door communications, there are many channel models such as log-normal or Saleh-Valenzuela (SV) model [48]. One important requirement of channel model is that it should not contain any effects of antennas or circuits. Since, the on-chip antennas once fabricated are fixed in a dielectric, the usual techniques for removing antenna effects from channel models such as, compensation with the free-space characteristics of the antenna, cannot be adopted. This makes removing antenna effects on the channel model for both inter and intra-chip communication challenging, and we get an antenna-dependent channel model.  
In modern processing platforms, chip encapsulant (epoxy mold), substrate (organic, ceramic, PTFE), underfill (epoxy composites), and other materials are used to securely pack the silicon die in an end-user package. Therefore, it is required to characterize their complex permittivity i.e., dielectric constant and loss tangent in the mm-wave spectrum as in [49]. Furthermore, reflections from the metallic components in package and encapsulations such as heat-sinks, heat-spreaders, can cause multipath propagation which may cause delay spreads and therefore, create inter-symbol interference (ISI). The delay-spread and ISI in these environments also need to be captured with small-scale channel model for transceiver designs. All these factors make the channel in a multi-chip environment quite hostile and extreme for wireless communication. Simple path-loss-based channel models for chip-to-chip wireless communication in mm-wave frequencies are presented in [11; 50]. A small-signal channel model for the 3-10 GHz band for inter-chip wireless model was developed in [51]. A time-domain channel model at 15-24 GHz is presented in [52]. However, specific frequencies and structures make it difficult to generalize channel models to be used in other frequencies and scenarios.  
In [53] the idea of using quilt packaging to enable direct through-air wireless communication between antennas is envisioned. Quilt packaging leaves patterns on the die not covered by the encasement materials, enabling direct radiation into the air, potentially reducing path loss. In [54] it is noted that the transmission from on-chip antennas mostly remain trapped as surface waves at the boundary of the dielectric and the silicon substrate of the dies. This reduces loss due to wasted radiation in space considerably favoring the communication across the dies. Etching waveguides in heat sinks or metal chucks sitting on top of the dies channeling radiation between transceivers can provide communication channels between chips. However, waveguides require layout and are not truly wireless in principle although they may improve power efficiency due to a reduction in path loss.