## 4 Proposed Design Pattern of Vectorization  
In this section, we propose a new vectorization pattern in FIR image filtering with kernel subsampling, which we call _loop vectorization_. We summarize characteristics of the previous vectorization patterns and our new one in Table 1. The proposed pattern encounters none of the constraints that exist in the previous patterns. In this proposed pattern, reference pixels are extracted in the kernel and the pixels are grouped as a 1D vector. This vector must be multiple times as long as the SIMD register size. To adjust the length of the vector, extra data are padded with zero. We collect the vector for all pixels and construct volume data using the vectors. This rearrangement scheme is called loop vectorization. Figure 6 indicates an example of loop vectorization for kernel loop, which is called kernel loop vectorization. As a prepossessing for filtering, we transform an input image into volume data by loop vectorization. Let the number of elements in the kernel be \(K\) and the size of the image be \(S\). The volume data size is \begin{table}
\begin{tabular}{l l l} \hline \hline
**Vectorization Pattern** & **Arbitrary Parameter/Non-Limitation** & **Restriction Parameter/Limitation** \\ \hline loop vectorization & image width, kernel width, kernel shape, aligned load & long preprocessing time, huge memory usage \\ color loop unrolling & image width, kernel width, kernel shape, aligned load & requiring color image with padding \\ kernel loop unrolling & image width & kernel width, kernel shape, non-aligned load \\ arbitrary kernel loop unrolling & image width, kernel shape & kernel width, inefficient load, non-aligned load \\ pixel loop unrolling & kernel width & image width, kernel shape, non-aligned load \\ arbitrary pixel loop unrolling & kernel width, kernel shape & image width, inefficient load, non-aligned load \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Characteristics of the vectorization patterns of vectorization in finite impulse response image filtering. \(KS\). Figure 7 depicts the code of proposed pattern. The pattern on color images is shown in Figure 6c. This pattern interleaves individual R, G, and B vectors whose length is the size of an SIMD register. Zero paddings in kernel loops are required for each color channel. The proposed pattern has a data structure that is the array of structure of array (AoSoA) [37]. AoSoA is preferable for contiguous memory access, and its data structure has a high spatial locality in memory. Therefore, AoSoA has the greater efficiency than SoA and AoS in memory prefetching. The FIR filtering is related convolutional neural network (CNN) [38] based deep learning. The proposed pattern is similar approach to convolution lowering (_im2 col_) [39; 40; 41], which is CNN acceleration method. In the proposed pattern, we convert it to a data structure specialized for vector operation in CPU by considering data alignment and data arrangement of the color channel. In addition, parallelization efficiency is improved by the proposed pattern for the pixel loop. Therefore, the proposed pattern can also be effective for CNN-based deep learning in CPU. The proposed pattern can also vectorize pixel loop. In the proposed pattern of pixel loop vectorization, a vector is created with the accessed pixels through pixel loop unrolling; thus, a vector is created in the units of the pixels of interest to be unrolled. Pixel loop vectorization is highly parallelization efficient because it parallelizes the outermost loop as well as the case of pixel loop  
Figure 6: Kernel vectorization. (**a**) Rearrange approach; (**b**) Data structure of a pixel in gray image; (**c**) Data structure of a pixel in color image. The size of the SIMD register is 4. Figure 7: Code of loop vectorization. (**a**) Loop vectorization for kernel loop; (**b**) Loop vectorization for pixel loop. The size of the SIMD register is 4. LV represents the data structure transformed by loop vectorization.