# Three-Phase PV CHB Inverter for a Distributed Power Generation System
## 3 Numerical Analysis  
The operation of the proposed topology and the control strategy described in the previous sections were analyzed by exploiting the Matlab Simulink(r) (2012a, Mathworks, Natick, MA, USA) environment. The simulated circuit was a three-phase system with three solar panels connected to each phase, each of them feeding a devised H-bridge, so that single-panel conversion was investigated. It was built by exploiting both specially suited elemental blocks taken from the Xilinx [44] library and custom homemade Verilog [45] modules. The main advantage of this approach is that the control code could be straightforwardly implemented on a Xilinx field-programmable gate array (FPGA) platform; moreover, it allowed very realistic simulations because the actual behavior of the hardware implementation of the control code on the FPGA was emulated by performing the circuit synthesis. Table 1 reports the parameter of the simulated CHB inverter. A detailed model for the PV panels, accurately describing the current voltage and the power voltage curves of commercially available solar modules [45] as a function of the illumination level and, eventually, of partial shading condition, was also adopted. Table 2 shows the details of PV panel models. Three sets of operating conditions were analyzed: (i) uniform illumination over all solar panels; (ii) non-uniform illumination; (iii) dynamically changing illumination. The features that were monitored were the capability of tracking the MPP of individual solar panels, power balancing, and quality. The first set of results is given in Figures 5-7. \begin{table}
\begin{tabular}{c c} \hline \hline
**Parameter Description** & **Value** \\ \hline Line inductance \(L\) (mH) & 5 \\ DC-link capacitance \(C_{i,j}\) (mF) & 4.32 \\ Carrier frequency (kHz) & 5 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: CHB (Cascaded H-Bridge) inverter: simulation parameters. \begin{table}
\begin{tabular}{c c} \hline \hline
**Parameter Description** & **Value** \\ \hline Inherent diode saturation current (A) & 1e-9 \\ Series resistance (\(\Omega\)) & 2 \\ Shunt resistance (k\(\Omega\)) & 7 \\ Ideality factor & 1.06 \\ Photogenerated current (A) & 4.8 \\ Number of cells & 72 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: PV (photovoltaic) panel model: simulation parameters at standard conditions. Figure 5: Sunny case: the operating point position corresponding to three panels in the \(p\)-th phase leg (namely, panel 1, \(p\) (pink squares), panel 2, \(p\) (orange circles), and panel 3, \(p\) (green triangles)) is highlighted with respect to the individual panel P–V curves (solid line). (**a**) Phase leg 1; (**b**) phase leg 2; (**c**) phase leg 3. Figure 6: Sunny case: time behavior of the output currents compared to the grid voltages related to (**a**) phase 1; (**b**) phase 2; and(**c**) phase 3. The curves shown in Figure 5a-c refer, respectively, to the three legs of the circuit. Since uniform illumination (625 W/m\({}^{2}\)) was considered, all of the P-V curves coincide each other; thus, for example, the P-V curves of the three solar panels connected to the first leg (Figure 5a) are represented by a unique curve. Nevertheless, the maximum power points of the solar panels were independently tracked; therefore, the operating points actually assumed by each solar panel are shown by means of different symbols (squares, circles, triangles). As can be seen, all solar panels operate very close to their respective MPP, small oscillations being ascribable to the limit cycle of the P&O tracking algorithm. The three grid currents--superposed to the respective grid voltages--are shown in Figure 6.  
As can be observed, the power factor is unity, thus demonstrating the effectiveness of the active power transfer to the grid. The reliability of the proposed approach can be better appreciated by looking at Figure 7, which shows the phase relation among the three currents (Figure 7a) and the modulated voltage waveforms produced by the sorting algorithm (Figure 7b).