## 4 Circuit Simulations
The approximated fractional-order capacitor was realized on a custom printed-circuit board (PCB) interfaced to the breadboard setup. This experimental test setup is shown in Figure 13a with the circuit implementation detailed in Figure 13b. The fractional-order capacitor PCB implementation is outlined in Figure 13b using the dashed box. The magnitude responses collected from both SPICE simulations and experimental implementations, using LT1361 operational amplifiers, are given in Figure 14a as dashed and dashed-dotted lines, respectively. For comparison to the simulation and experimental results, the theoretical magnitude response given by Equation (8) is a solid line in Figure 14a. Note that both simulations and experimental results show very good agreement with the theoretical response. The simulations show less than 0.21 dB difference compared to the theoretical for frequencies below 70 kHz with a maximum deviation of 1.73 dB occurring at 100 kHz. \begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline \(\boldsymbol{\kappa}\) & \(\boldsymbol{C_{1}\left(F\,s^{\boldsymbol{\alpha}-1}\right)}\) & \(\boldsymbol{C_{2}\left(nF\right)}\) & \(\boldsymbol{R_{1}\left(\Omega\right)}\) & \(\boldsymbol{R_{2}\left(\Omega\right)}\) & \(\boldsymbol{R_{3}\left(\Omega\right)}\) & \(\boldsymbol{R_{4}\left(\Omega\right)}\) & \(\boldsymbol{R_{5}\left(\Omega\right)}\) & \(\boldsymbol{R_{6}\left(\Omega\right)}\) \\ \hline
0.8 & 62n & 10 & 1k & 680 & 90.8k & 8.08k & 492 & 562 \\
0.2 & 46.9\(\mu\) & 6.8 & 4.7k & 1k & 3.17k & 65k & 428 & 2.38k \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Component values to realize Equation (7) for the Figure 2 coefficients when \(\alpha=0.8\) and 0.2 using the topologies in Figure 11a,b, respectively. Figure 12: Foster-I circuit topology to realize a fifth order approximation of a fractional-order capacitor. Figure 13: (**a**) Experimental setup to measure magnitude responses of approximated \((1+\alpha)\) order filters; and (**b**) breadboard implementation of topology using fifth order approximation of a fractional-order capacitor (outlined using the dashed box). Further, the topology in Figure 11b with transfer function given by Equation (12) was used to realize a \((1+\alpha)=1.2\) order filter. For this case, the utilized coefficients were \(a_{1}=0.01320\), \(a_{2}=1.1037\), \(a_{3}=-0.3208\), and \(a_{4}=0.5055\), selected from coefficients returned using the \(10^{-5}\) rad/s to \(10^{5}\) fitting bandwidth given in Figure 2. Using these coefficients, the necessary resistances and capacitances for the topology were calculated using the system of equations built by equating coefficients in Equation (12) (i.e., \(C_{1}C_{2}R_{1}R_{2}^{2}/R_{4}=a_{1}/\omega_{0}^{1+\alpha}\); \(C_{1}C_{2}R_{2}^{2}R_{6}/R_{5}=a_{2}/\omega_{0}^{1+\alpha}\); \(-C_{1}R_{2}R_{6}/R_{3}=a_{3}/\omega_{0}^{\alpha}\); \(R_{6}/R_{1}=a_{4}\)). The specific resistors and capacitors are given in Table 1 when a frequency of \(\omega_{0}=(2\pi)10\) krad/s is used and the \(C_{1}\), \(C_{2}\), \(R_{1}\), \(R_{2}\) values are initially chosen, and the other values are computed. The circuit components required to realize the \(\alpha=0.2\) device are also given in Table 2. The magnitude responses collected from both SPICE simulations and experimental implementations are given in Figure 14b as dashed and dashed-dotted lines, respectively, compared to the theoretical response given as a solid line. Again, both simulation and experimental results show very good agreement with the theoretical response. The simulations show less than 0.1 dB difference compared to the theoretical for \(100\text{ Hz}<f<100\text{ kHz}\) with a maximum deviation of 0.49 dB occurring at 10 Hz. From the experimental results of both filters in Figure 14, the deviation at frequencies above 1 MHz are likely a result of parasitics in the breadboard implementation of these circuits.