## 2 Materials and Methods
### RF Stage Design  
During the design stage of the RABE subsystem prototype, the necessary requirements for the development of the PCB (Printed Circuit Board) were specified to guarantee correct operation, allowing interoperability between the subsystem devices. The requirements are detailed in Table 1.  
Figure 1: Communication system model. A block sequence about the communication system model and its architecture. Figure 2: Radio frequency model. RF PCB scheme and AD9364 architecture. In general, the design of the RABE features two interfaces; the first one is the digital I/O data, control, and synchronization interfaces between the prototype and the SoC; the second one is the analog RF output with an SMA connector. The 1U CubeSat standard is restricted to 10 cm\({}^{2}\), as can be seen in Figure 3a. Due to this and considering the physical structure of the CubeSat, it is necessary to implement the PCB inside it, leaving the dimensions shown in Figure 3b. The RABE has a read/write register interface carried out via the Serial SPI. Therefore, one of the preliminary tasks was to implement the SPI port in the BBP since it is not a native protocol in the FPGA. The data lines for the PCB of the RF stage are divided into two sets: the differential and single-ended lines, as shown in Figure 4. The maximum data transfer frequency achieved is 245.76 and 61.44 MHz for the differential bus and single-ended, respectively. However, it depends on the IP-Core processing speed of the SoC and FPGA used by the implementation. The RF output feeds the next stage (it is not the scope of the work) comprised of power amplifiers, filters, and antennas, in order to achieve a high signal-to-noise ratio (SNR) and considering a link range of 2000 km in the free-space Low Earth Orbit (LEO) satellite. \begin{table}
\begin{tabular}{c c c} \hline \hline
**Request** & **Value** & **Units** \\ \hline Power Supply Vcc & 5.000 & V \\ PCB size & 9.500 \(\times\) 9.500 & cm \\ Frequency range & 2.200–2.300 & GHz \\ Output Power & \(-\)20.000–5.000 & dBm \\ BW & 0.200–56.000 & MHz \\ Input connector & FMC ASP-134604-01 & \\ RF connector & female SMA & \\ Reference CLK & 40.000 & Mhz \\ IC & AD9364 & \\ PCB & 6 layers & \\ \hline \hline \end{tabular}
\end{table} 
Table 1: General requirements of the RABE. Figure 3: Structure and PCB measurements in mm. (**a**) CubeSat structure. (**b**) PCB size. The RF stage of the RABE prototype uses the AD9364 transceiver, internally composed of ADC converters, DACs, filters, GPOs, PLLs, and an SPI communication control ports [12], as illustrated in Figure 5.  
In this work, the transmission, data entry, DAC, filters, and SPI serial communication stages are used. The radio transmitter is implemented with the ability to operate in various frequency bands, mainly S-band. In addition to this, the configuration to modify in the application of the IC data such as the transmission power, the filtering, and, most importantly, that the prototype design must comply with the size proposed for the CubeSat standard. The IC AD9364 from Analog Devices(r) [12] is configured as an RF transceiver, operating in the 0.070 to 6.00 GHz frequency range with the ability to tune the bandwidths (BW) from 0.2 to 56.0 MHz and allowing applications proposed by the manufacturer such as point-to-point communication systems, base stations (BS) for femto/pico/microcells and general-purpose radio systems. Further, the AD9364 IC is set by reading/writing into the registers set described in [13]. According to the manufacturer, the IC has a list of almost 1014 (0x3F6) 8-bit registers with configuration capabilities intended for diverse applications. These IC-specific application steps are initialization, configuration, transmission, reception, and analog records in reception (see Table 2). Record data flow modes can be: read, write, or both. The SPI port of the AD9364 operates at a recommended maximum speed of 50 MHz, according  
Figure 4: Schematic design of the RABE.