## 6 Practical Realizations of Piezoelectric Power Conversion Circuits
### Examples of Custom Micro-Power Electronic AC-DC Converters  
In the last 2 years, various practical realizations of piezoelectric power conversion devices have been published [85; 94; 99; 100; 101; 102; 103]. In this section, seven devices for piezoelectric energy harvesting are presented and compared. Most of them also include a prototype realization and real-word estimation of achieved parameters. A comparative study was performed in order to present a clear estimation of the main parameters for the selected topologies. A schematic representation of each device is presented, as well as a brief description of the mode of operation and achieved results. The first selected work [101] was developed by [PERSON] et al. and represents a non-linear switching circuit (INLSC) for the active rectification of voltage in a piezoelectric energy harvesting (PEH) system. The proposed schematic is presented in Figure 35.  
The particularity of this topology is the use of a polarity detector for the input voltage which controls the switches M\({}_{3}\) and M\({}_{4}\), so their state is strongly related with the polarity of the input voltage. The other two switches (M\({}_{1}\) and M\({}_{2}\)) are controlled by the external circuits. The eight possible modes of operation are described in detail in [99]. The presented  
Figure 34: Block diagram of a low-power circuit configuration for energy harvesting using AD5091 [97]. topology uses a classical H-bridge with enchanted logic control which optimizes the power extraction from the piezo generator. The authors show a practical realization of this approach which is capable of powering a seven-segment display. In some of the proposed regimes, the circuit was capable of delivering more than 450 \(\mu\)W to the load by applying to the input a voltage of 0.44 V with 100 Hz frequency. The second work [100] which was conducted by [PERSON] et al. represents a modified voltage-doubled boost converter which claims to have a better performance in terms of efficiency and power extraction. Adding a voltage doubler as a first stage improves the work of the circuit in low-input-voltage conditions. The proposed schematic is presented in Figure 36.  
The main advantage of this topology is the minimized number of diodes which reduces the forward voltage loses. This schematic has six modes of operation. The detailed principle of operation could be found in [100]. The authors suggest the use of this circuit for low-voltage applications with an output voltage of 1-3 V. In those conditions, they were  
Figure 36: Existing and proposed circuits: (**a**) voltage doubler; (**b**) voltage-doubled boost converter (VDBC) [100]. Figure 35: Schematic of the proposed INLSC [99]. capable of converting 12.321 uW, which is much more in comparison with a test condition in which 11.7 V voltage was required. These circuits were mostly tested with low AC frequencies in the range of 5-20 Hz. Another topology which represents a voltage doubler coupled with a boost converter was presented by the same author, [PERSON] et al. [101]. In this design, a reduced number of switching elements (transistors) was used. The proposed topology is shown in Figure 37.  
The presented circuit has four modes of operation, which are described in [101]. In this work, the authors succeed in extracting 3.61 mW at an input frequency of 50 Hz and 0.396 mW at an input frequency of 1 Hz, which is better compared to their previous work. The fourth selected work [102] was conducted by [PERSON] et al. They proposed a topology called full-bridge joule thief (FBRJT). In this topology, the authors used a full-bridge rectifier with a buck/boost converter. The proposed schematic is presented in Figure 38.  
The schematic consists of two stages, a classical full-bridge rectifier and a buck/boost converter, and conducts six modes of operation, as described in [102].