## 3 The False Lock
causes two symptoms with regard to the tracking loop. First, it degrades the power (_i.e_., a relatively lower signal-to-noise ratio). Second, it gives biased velocity information to the code-tracking loop (e.g., the carrier-aided first-order DLL) and to the navigation filter. The scale factors for the carrier-aided codes are 1/1, 540 and 1/154 for the C/A code and the P(Y) code, respectively. If there is a Doppler error of 1 kHz, the velocity biases in the code NCO are 0.65 Hz and 6.5 Hz for the C/A and the P(Y), respectively. This will likely have minor effects on the loop. However, the velocity bias is converted to approximately 190 m/s assuming the L1-band range domain. Because our system did not use the L1-band to avoid possible jamming attacks, the velocity bias will have different values with the above example; however, it is unquestionably a critical error source for the navigation filter. If the number of coherent integrations \(K\) is larger than one, the power degradation becomes critical, and the tracking loops may experience a frequent loss of lock. In the frequency-locked loop, the distance between the zero crossing points of the discriminator decreases; consequently, the locked point can be located in the middle of the sinc main lobe or on small side lobes. To prevent a false lock in the frequency domain, we used additional correlator arms in the fast signal-acquisition module implemented in the FPGA. This concept is similar to the concept of the bump-and-jump technique, which was proposed to find a possible false lock in the code chip domain during the GNSS BOC signal acquisition and tracking processes. Figure 9 shows the proposed channel block diagram, which serves to detect a false lock in the frequency domain. The additional correlator arms located at adjacent peaks of the side frequency lobe are compared to the prompt frequency correlator arm to find the maximum peak position or they can be combined to compose more complex comparators to use the slopes between the lobes. In this paper, we refer to the former as the maximum peak finder and the latter as the slope comparator. Figure 10 presents two schemes graphically to assist with the understanding of this. The values of \(n\) and the \(m\) for frequency separation are assumed to be one for simplicity. Figure 8: Estimated Doppler: (**a**) correctly locked; (**b**) falsely locked. The maximum peak finder uses the same logic as the bump-and-jump (BJ) method suggested earlier [15], while the slope comparator is similar to the heuristic detection metrics of the SQM (signal quality monitoring) scheme with multi-correlator functionality, also proposed in an earlier work [16]. In the BJ method, early and late correlators are used in the code-tracking loop, and very late (VL) and very early (VE) correlators are used to monitor the power of other possible peaks close to the puncture correlator. Here, two additional correlator arms (VE and VL) are used only for the false lock, with a simple up/down counter mechanism applied for the decision. Counting is performed for all integrate and  
Figure 10: The false lock detection schemes: (**a**) The max peak finder; (**b**) The slope comparator. Figure 9: Channel block diagram for the false lock detection. dump periods during the code-tracking process in the BJ. However, in the false lock detection scheme used here, the decision is designed to be made in the signal-acquisition module to reduce the computational burden. We used a hard decision rule instead of a simple up/down counting mechanism and fully utilized all correlator arms to ensure the maximum peak finding performance (e.g., five arms for I-channels, five for Q-channels). Several linear combinations to compose the heuristic test metrics have been suggested [16]. These can be categorized as follows:  
1. Delta (\(\Delta\)) metrics: differential between two symmetric slopes (normalized by a puncture). 2. Average ratio metrics: ratio between a symmetric slope and the puncture correlator. 3.