# A Novel Battery-Supplied AFE EEG Circuit Capable of Muscle Movement Artifact Suppression
## 4 Simulation and Results: Comprehensive Analysis
### Simulation of Novel EEG-B3V3S/C1 Circuit Design
#### 4.1.1 Simulation in a 50 Hz Electrical Grid Environment  
In this part, the simulation in a 50 Hz environment was performed. The CMRR of the circuit was assessed by short-circuiting the two input channels with a voltage source of 0 V DC offset and 1 V AC amplitude across all frequencies. This method of quantifying CMRR was chosen, in order for the measurement to be independent of the differential gain. Otherwise, due to the limitations of the simulation software (Analog Devices's LTSpice version XVII x64), when taking into account the differential gain, it yields an unrealistic result. More precisely, the simulation would have given a CMRR higher than the one of the chosen instrumentation amplifier, when in reality, an equal or worse CMRR is expected. The differential gain was defined as the division of the output of the overall circuit with the differential input at the point where the electrodes contactthe circuit. While performing AC analysis, the CMRR yielded a frequency response function dependent on the frequency variable. In the band of interest of alpha, beta and theta waves, CMRR was approximately 97 dB. In frequencies greater than 110.5 Hz, CMRR dropped below 90 dB and at 3 kHz reached 66 dB. Meanwhile, in the area below 1 Hz, CMRR reached levels up to 163 dB at 10 mHz. The simulated notch depth was measured at 48.5 dB, which is a really satisfactory result based on [56], which defines realistic expectations for maximum realizable notch depth between 40 dB and 50 dB. The above statements for CMRR and Notch depth can be assessed visually in Figure 17, in which Differential Gain (Blue) and CMRR (Red) are depicted. Figure 17 also presents an example of how the measurements were performed with the use of cursors (dashed measurement lines). In particular, a measurement with Cursor 2 at the frequency of 17 Hz inside the wavebands of interest and a measurement with Cursor 1 at 110.5 Hz as the point of transition below 90 dB can be seen in the measurement windows contained in Figure 17. This measurement methodology, with the use of cursors, was utilized in all the quantitative assessments that were not performed graphically/indirectly. Apart from the above evaluations, noise analysis was performed on the circuit. The result of 1.4887 \(\upmu\)VPP noise in 0.1 Hz to 10 Hz before amplification was identified in a 50 Hz environment, as it can be seen in Figure 18, along with the used measurement cursor methodology. The total power consumption was measured at approximately 20.5 mWatt, measured with similar methods as the ones described above and presented in Figures 17 and 18. More precisely, power consumption was calculated as the integral of the active power consumption integrated upon the time duration of the particular experiment performed in each case (50 Hz and 60 Hz grid). The simulation at 50 Hz produces results in the time domain by performing a transient analysis (see Figures 19 and 20). Consequently, with the use of FFT algorithm, the Fourier transform results in the Fourier plane are also generated (see Figures 21-25). Figure 17: AC analysis of the proposed circuit at a 50 Hz environment. Waveforms: Differential Gain—Blue, CMRR as defined in the text—Red. Figure 19: Time response of the simulation. Waveforms: Raw EEG channel 1 signal (V\({}_{\rm ch1}\)—gold), Raw EEG reference channel signal (V\({}_{\rm drief}\)—purple), Ground truth EEG signal magnified 300 times (V\({}_{\rm eeg}\)—red), Output of the EEG circuit (V\({}_{\rm out}\)—blue). Figure 18: Input noise in 0.1 Hz to 10 Hz before amplification at a 50 Hz environment. Consequently, with the use of FFT algorithm, the Fourier transform results in the Fourier plane are also generated (see Figures 21-25). Figure 21: Frequency response of the simulation (in a range from 4 Hz to 30 Hz).