## 5 Summary
### Sensor Nodes Based on Microcontroller and FPGA  
Table 7 depicts the details of sensor nodes based on a combination of microcontroller and FPGA in the form of a coprocessor. In order to estimate the advantages of using hardware acceleration instead of a software implementation based upon microcontroller, the improvement is provided when it was investigated by the authors. \begin{table}
\begin{tabular}{l l l l l l l l} \hline
**Work** & **Platform** & **Model** & **Communication** & **Power consumption** & **Frequency (MHz)** & **Sensors** & **Application** \\  & & & & **(mW)** & & & \\ \hline
[61] & Cyclone I (Nios-II) & EP1C6 & Bluetooth (RS-232) & - & - & - & General \\
[62] & Cyclone II (OpenRisc) & EP2C70 & ZigBee (RS-232) & 221 & - & Temperature & General \\
[63,64] & Spartan-3 & XC3S2000 & ZigBee (XEMCICS) & 700 - 1,100 & 11 & - & General \\
[67] & Cyclone II (Nios-II) & EP2C3 & nRF24 2.4 GHz ISM & - & - & CMOS image sensor & Multimedia \\
[81] & Spartan-3E & XC3S1600E & - & 2,850 & 50 & - & Environmental monitoring \\
[83] & Cyclone II (Nios-II) & EP2C70 & Bluetooth (RS-232) & - & - & Temperature & Environmental monitoring \\
[84] & Cyclone II (Nios-II) & EP2C5 & nRF24 2.4 GHz ISM & - & - & CMOS image sensor & Security \\
[25] & Spartan-3E & XC3S500E & ZigBee (CC2430) & - & - & - & Security \\ \hline \end{tabular}
\end{table} 
Table 6: FPGA Standalone sensor nodes. \begin{table}
\begin{tabular}{l l l l l l l l l} \hline
**Work** & **Microcontroller** & **FPCA Platform** & **FPGA Model** & **Communication** & **Standby** & **Power** & **FPGA** & **Execution** & **Microcontroller** & **Execution** & **Application** \\  & & & & & **Consumption (mW)** & **Power Consumption** & & **Power Consumption** & & \\ \hline
[41,42] & ADUC841 & Spartan-3 & XC3S200 & ZigBee (ETRX2) & 60 & - & - & General \\
[71] & ATMega & IGLOO & AGL600 & - & 35.97 & 12.36 mW & 382.94 mW & Multimedia/FFT \\
[70] & AT91 & Spartan-3 & XC3S100E & - & - & - & - & Multimedia/Image \\
[72] & SENT032 (AVR32) & IGLOO & & ZigBee (CC2520) & - & 5.93 mW & 77.5 mW & Multimedia/Image \\  & & & & & & & Processing \\
[74] & 8-bit AVR & FPSILC & AT40K & - & - & 4.48 mJ & 8.93 mJ & Multimedia/Image \\  & & & & & & processing \\
[79] & 8-bit AVR & Accel & - & ZigBee & - & - & - & Industrial \\
[82] & 8-bit AVR & ProxSIC3 & - & ZigBee & 87.12 & - & - & Environmental/Image \\  & & & & & & Processing \\
[27] & 8-bit AVR & Spartan-3 & XC3S200 & - & - & 9.60 mJ & 1373 mJ & Security/Chypography \\
[9] & MSP430 & IGLOO & AGL125 & ZigBee (CC2420) & - & 5 mW & 20 mW & Communication/CRC32 \\ \hline \end{tabular}
\end{table} 
Table 7: Sensor nodes based on a combination of microcontroller and FPGA coprocessor. According to Table 7, the best results are produced using the IGLOO FPGA, _i.e._, [71, 72], where the power reduction implementing an FFT and image processing tasks was 30 and 13 times smaller respectively. Moreover, the authors of the PowWow sensor node measured the power consumption of the CRC32 algorithm in both microcontroller and FPGA [9]. In the case of the MSP430, it required 3 \(\mu\)J (20 mW) running at 8 MHz. On the other hand, the IGLOO board required only 0.004 \(\mu\)J (5 mW) clocked at 20 MHz. In the other cases, the controlled execution of FPGA implemented tasks was also acceptable. Hence, based on the FPSLIC platform, [74] performs video processing that requires 4.48 mJ in the FPGA, which is almost half compared with the microcontroller execution (8.93 mJ). However, as the authors claimed, the FPGA reconfiguration (which must be full since partial reconfiguration is not supported therein) consumes more power (25 mJ). Finally, [27] greatly improved the power consumption for the implementation of an involutional block cipher (particularly KHAZAD), consuming 8.60 nJ per block in comparison to the software execution (1,373 nJ per block). However, since the authors did not provide the execution time per block, the power consumption is only provided in nJ instead of mW.