# A Review of Sharp-Switching Band-Modulation Devices
## 4 Sharp-Switching Performance  
The steady-state transfer characteristics \(\mathrm{I_{A}(V_{FG})}\) in Figure 5c demonstrate exceptionally sharp turn-on capability. The switching to \(\mathrm{I_{OFF}}\) is also abrupt, but more challenging because the energy barriers need to be reconstructed. The gate voltage required to turn off the \(\mathrm{Z^{2}}\)-FET is markedly higher than to turn it on. This hysteresis becomes larger as the anode voltage increases. Figure 14a shows that a small increase of 50 mV in \(\mathrm{V_{A}}\) (from 0.95 V to 1 V) requests a more than 1 V increase in \(\mathrm{V_{FG}}\), to abruptly suppress the current. A too high anode voltage renders the gate unable to turn off the device. These problems can be avoided by using fast pulses on the gate [32]. Figure 13: (**a**) Current-driven \(\mathrm{Z^{2}}\)–FET characteristics predicted by the compact model and by TCAD simulations. (**b**) Voltage-driven characteristics obtained from model and measurements (adapted from [29]). Figure 14b shows the current variation in the time domain in response to gate pulses of 0.5 V amplitude. The device turns sharply from an I\({}_{\text{OFF}}\) to I\({}_{\text{ON}}\) state as V\({}_{\text{FG}}\) is pulsed down. Then, pulsing the gate voltage up, turns the device off. A fast gate pulse, together with the absence of hysteresis, is essential for logic circuits. It is worth noting that during the rise time of the gate signal, the electron concentration cannot be adjusted promptly enough, and the hole barrier is temporarily taller than in DC mode. This explains why the gate voltage needed to block the device is much smaller in pulsed mode than in DC mode. As a result, a gate pulse of 0.5 V is only effective in switching the device back and forth. Systematic measurements reveal the importance of the pulse time constants. It is the collapse of the hole injection barrier that makes the device turn on. The discharge current that sweeps away the electrons stored under the gate contributes to the feedback mechanism that suddenly collapses the barrier. This discharge current is obviously amplified for very short fall times of the pulse. The device turn-off is less spontaneous and critically dependent on the rise time of the pulse. In Figure 14b, a relatively long pulse (>1 \(\upmu\)s) is inefficient, as it tends to keep the device locked in conductive mode with high leakage-like current. Instead, a very short pulse (<50 ns) produces a perfect spike in current. Very fast rise times succeed in restoring tall energy barriers, before the anode and cathode can supply fresh holes and electrons. This means that switching the device off requires a pulse rise time shorter than the transit time of carriers between the terminals. Simulations predict successful operation in the pico-second range. The effectiveness of the switch depends on the balance between the anode and front-gate voltages. Figure 15a shows a \(Z^{2}\)-FET biased with 0.8 V on the anode. Ideal switching properties, without leakage, are measured when the upper level of the gate pulse is higher than 1.3 V. A lower gate voltage (V\({}_{\text{FG}}\) = 1.1 V) is insufficient to build strong energy barriers that would block the device; the minimum current in the OFF state is no longer zero, leading to unacceptable leakage. Increasing the anode voltage to ensure a higher I\({}_{\text{ON}}\) (increasing V\({}_{\text{A}}\) by 0.2 V roughly doubles the current drive) makes the barrier reconstruction more difficult, leading to rising leakage currents. The solution is to concomitantly increase the gate pulse. Figure 14: (**a**) Turn-off transfer characteristics in DC mode. (**b**) Current switch vs. time in response to gate pulses with variable rise time shown above (V\({}_{\text{FG}}\) from 1.3 V to 0.8 V and back): V\({}_{\text{A}}\) = 0.8 V, t\({}_{\text{si}}\) = 7 nm, t\({}_{\text{BOX}}\) = 25 nm, L\({}_{\text{G}}\) = L\({}_{\text{UG}}\) = 500 nm, adapted from [32].