## 4 General Multi-Stage ASA Switch Architecture  
### Construction of a General Multi-Stage ASA Switch  
Assume \(N\) is odd. A construction method for a general multi-stage \(N^{t}\times N^{t}\) ASA switch architecture using only \(N\times N\) AWGs and \(N\times N\) space switches is proposed in this section. The method consists of three steps:  
**Step 1:** Construct an A(\(N\), \(N\), \(N^{t-1}\)) switch (see Figure 3). **Step 2:** Decompose each \(N^{t-1}\times N^{t-1}\) space switch in the middle stage into a C(\(N\), \(N\), \(N^{t-2}\)) network if \(N^{t-1}>N\) (see Figure 4). **Step 3:** Continue to decompose each space switch in the middle stage until its size is reduced to \(N\times N\). Figure 3: An A(3, 3, 9) switch. From the above construction method, each middle \(N^{t-1}\times N^{t-1}\) space switch of the A(\(N\), \(N\), \(N^{t-1}\)) switch architecture is decomposed into an \(N^{t-1}\times N^{t-1}\) Benes network [29]. Thus the general multi-stage \(N^{t}\times N^{t}\) ASA switch architecture adopts the \(N^{t}\times N^{t}\) Benes topology and consists of \(2t-1\) stages numbered from \(1\). There are \(N^{t-1}\)\(N\times N\) AWGs in the first and the last stages, and \(N^{t-1}\)\(N\times N\) space switches in each of the middle \(2t-3\) stages. An example where \(N=3\) and \(t=2\) is given in Figure 4. It is worth noting that all the paths in the A(\(N\), \(N\), \(N^{t-1}\)) switch exhibit a constant transmission delay. Similar to the A(\(N\), \(N\), \(N^{t-1}\)) switch, for each signal [[\(g_{\text{s}}\), \(m_{\text{s}}\)], \(w\), [\(g_{\text{d}}\), \(m_{\text{d}}\)]] in a multi-stage \(N^{t}\times N^{t}\) ASA switch, member fields are used for wavelength routing in the first and the last stages (Equation (3)). As for the space switching in the middle stages, a looping algorithm [29] is applied for signals with the same wavelength in each \(N^{t-1}\times N^{t-1}\) Benes network. **Theorem 2**. : _Assume \(N\) is odd and \(t\) is a positive integer. A general multi-stage \(N^{t}\times N^{t}\) ASA switch is RNB if signals from inputs with the same member field are destined to distinct outputs._  
Proof. : Recall that the general multi-stage \(N^{t}\times N^{t}\) ASA switch is obtained by replacing each middle nonblocking \(N^{t-1}\times N^{t-1}\) space switch of an A(\(N\), \(N\), \(N^{t-1}\)) architecture with an \(N^{t-1}\times N^{t-1}\) Benes network. Since a Benes network is RNB [29] and the A(\(N\), \(N\), \(N^{t-1}\)) switch with an odd \(N\) is nonblocking, provided signals from inputs with the same member field are destined to distinct outputs (Theorem 1), then the general multi-stage \(N^{t}\times N^{t}\) ASA switch with an odd \(N\) is still nonblocking, (i.e., is RNB), if signals from inputs with the same member field are destined to distinct outputs. Similar to the general 3-stage \(N^{t}\times N^{t}\) ASA switch, the total capacity of the general multi-stage \(N^{t}\times N^{t}\) ASA switch architecture is close to \(N^{t+1}\times\) the bandwidth of a wavelength channel, provided that signals from inputs with the same member field are destined to distinct outputs (Theorem 2). Note that the scheduler design proposed for the 3-stage ASA switch [24] is mainly based on adopting a matching algorithm to set up the maximum number of signals passing through the same AWGs in the first and last stages, provided that these signals are nonblocking to each other. Note also that many matching algorithms [17; 30] can be used for the scheduler design, but choosing a matching algorithm is not discussed in [24], for it is an independent issue. Since a matching algorithm used for the 3-stage ASA switch can also be applied for the signals passing through the same AWGs in the first and last stages in the proposed RNB general multi-stage \(N^{t}\times N^{t}\) ASA switch, the scheduler design of the general multi-stage \(N^{t}\times N^{t}\) ASA switch is similar to that proposed in [24], and we omit it in this paper. Figure 4: A general multi-stage \(27\times 27\) ASA switch.