# All-Optical Non-Inverted Parity Generator and Checker Based on Semiconductor Optical Amplifiers
## 2 Principle
### Parity Checker  
As shown in parity checker in Figure 1, 2-bit parity checker is implemented with SOAs and the outputs are parity check bits. In order to realize a 2-bit parity checker, the redesign formula is as follows:  
\[Ce=Pe^{\prime}\oplus(A\oplus B)=Pe^{\prime}\odot(A\odot B) \tag{3}\]  
\[Co=\overline{Po^{\prime}\oplus(A\oplus B)}=Po^{\prime}\oplus(A\odot B) \tag{4}\] \begin{table}
\begin{tabular}{c c c c} \hline \hline \(A\) & \(B\) & _Pe_ & _Po_ \\ \hline
1 & 1 & 0 & 1 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Truth table of parity generator. where the even check bit is \(Ce\) which is generated using the XOR gate of the second SOA. The odd check bit is \(Co\) which is generated using the XNOR gate of the second SOA. This formula can also achieve the expected purpose by checking the truth table. At the same time, it avoids the instability caused by too many lights of different wavelengths under the XGM effect in the XOR logic. This solution can make the design more compact, more stable, and easier to implement into integrated circuits. The \(Pe^{\prime}\) and \(Po^{\prime}\) (same as \(Pe\) and \(Po\) in the parity generator) are applied to the parity checker. When the optical switch (OSW) selects \(Pe^{\prime}\), the even parity check bit output will be obtained. When the optical switch selects \(Po^{\prime}\), it gets an odd parity check bit. According to the properties of XOR or XNOR summation of the number of \"1\" codes, the conclusion can be clearly shown: if the parity checker output result is 0, it means that the received data is completely correct; if the parity checker output result is \"1\", it means that the data has an error or noise during transmission. The truth table of the parity checker has been given in Tables 2 and 3, we consider all possible logical combinations of \(A\) and \(B\). The Principles of XOR and XNOR gates based on SOA implementation:  
\(A\) and \(B\) are two signal lights which wavelengths are \(\lambda_{A}\) and \(\lambda_{B}\), while the Clk light is the wavelength of \(\lambda_{clk}\) with 50 ps RZ pulse. When signal light \(A\) and \(B\) are injected in SOA, gain, and phase modulation of Clk light is performed. All-optical logic gates are obtained by switching the center wavelength of TOBPF. Table 1 is the corresponding logical truth value. The realization principle of different logic function are as follows:  
XNOR: Due to the FWM and XGM effects, the output is different under different code type combinations. When data \(A\) and \(B\) both are \"1\" code, the output is \"1\" code due to FWM in the SOA. Meanwhile, the relationship between the wavelength of idle light generated by FWM and the wavelength of the clock detection light is \(\lambda_{clk}=\lambda_{FWM}\). Due to the XGM, when data \(A\) and \(B\) both are 0 and 1 codes (1 and 0 codes), the output is 0 (1) code when small signal probe light is magnified, respectively. When data \(A\) and \(B\) both are \"0\" code, the output is \"1\" code due to small probe light is magnified. XOR: When the peak powers of the two wavelengths are different, the low-power wavelength is modulated by the XGM effect of the high-power wavelength. \(A\) is modulated to achieve \(A\bullet\overline{B}\) when the center wavelength of the TOBPF is \(\lambda_{A}\). Conversely, \(B\) is modulated to achieve \(\overline{A}\bullet B\) when the center wavelength of TOBPF is \(\lambda_{B}\). \(A\bullet\overline{B}\) and \(\overline{A}\bullet B\) are output together to realize XOR logic gate. \begin{table}
\begin{tabular}{c c c c c} \hline \hline \(A\) & \(B\) & \(Pe^{\prime}\) & \(Ce\) & **Result** \\ \hline
1 & 1 & 1 & 1 & Error \\
1 & 1 & 0 & 0 & \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Truth table of even parity checker. \begin{table}
\begin{tabular}{c c c c c} \hline \hline \(A\) & \(B\) & \(Po^{\prime}\) & \(Co\) & **Result** \\ \hline
1 & 1 & 1 & 0 & \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Truth table of odd parity checker.