## 2 Proposed Circuit Arrangement  
The block diagram of the developed circuit arrangement is shown in Figure 4a. The role of the first stage full-wave diode rectifier is to convert the sinusoidal input (both positive and negative half-cycles) to absolute value at its output that may be mathematically formulated as:  
\[v_{o}(\omega t)=\left\{\begin{array}{c}+V_{m}Sin(\omega t)\:0\leq\omega t\leq\pi \\ -V_{m}Sin(\omega t)\:\pi\leq\omega t\leq 2\pi\end{array}\right. \tag{1}\]  
The voltage at the upper terminal of the H-bridge inverter is always positive with respect to any polarity of the input voltage. This feature eliminates the use of a polarity sensing circuit of the input voltage. There is no need for the synchronization of the control inputs \(s_{1}\) (\(s_{2}\)) and \(s_{3}\) (\(s_{4}\)) with the input voltage. These control signals are the outputs of the four separate gate driving circuits. The input of each gate driving circuit may be generated with any low-cost digital or analog controller as they are generated without sensing the input voltage. Here two control signals \(a_{1}\) and \(a_{2}\) are generated with Arduino as a PWM generator. A small value inductor at the intermediate power converting stage eliminates possible shoot-through of the switching transistors operated in complementary mode. This requires a small overlapping interval in the two switching signals, as seen in Figure 4b, to avoid the current interruption issue due to the inherent mismatching of the switching transistor in both legs of the high-frequency H-bridge inverter. The two switching signals generated by the Arduino are complementary except for a small overlapping time (\(t_{ov}\)) required to avoid the current interruption problem of the inductor. In this period, all switching transistors conduct. The total conduction period of any switching signal is \(t_{pr}\), and \(t_{con}\) is the non-overlapping interval. The whole conduction interval is the sum of overlapping and non-overlapping intervals.  
\[t_{pr}=t_{ov}+t_{con} \tag{2}\]  
Figure 5 illustrates the circuit arrangement of the proposed circuit. The input side of this circuit arrangement consists of four diodes employed to obtain pulsating dc from the sinusoidal ac input voltage (\(v_{s}\)). The other side of this circuit arrangement is a full-wave H-bridge inverter consisting of four high-frequency switching transistors that convert the  
low-frequency input voltage to high-frequency output voltage (\(v_{o}\)). The rms values of the output voltage (\(v_{o}\)) and input voltage (\(v_{s}\)) are almost equal except for some voltage drops in the switching devices. Therefore, the rms value of the output current (\(i_{o}\)) and input current (\(i_{s}\)) are also the same. The detail of the operation of the proposed circuit is discussed with the help of its operating modes.  
Mode of Operation: The discussion of operating modes of the suggested circuit is divided into its voltage non-inverting and inverting behavior for any polarity of the source voltage. Details are discussed below.  
Figure 4: (a) Block diagram of the suggested converter topology; (b) gating signals.  
Figure 5: Circuit arrangement of the proposed topology.