## 1 Introduction  
### Background  
Constant growth and evolution of telecommunication market has set new requirements for wireless connection devices. One of the main requirements--hardware deployed in the field--must have the ability to be re-configured, thus enabling support of new or developing technologies. One of the widely developed and promising technologies is a software defined radio (SDR) [1]. The main idea behind this technology--a wide range of physical level functions--can be supported and implemented using the same hardware. Ideally, support of various physical level functions would be then defined and limited only by the software. In reality, the hardware used in the SDR still defines what physical level functions can be controlled with software, but it is designed in a way that enables access to various parameter changes via digital control.  
SDR transceivers are already used in the telecommunication industry as base stations, test and measurement equipment, and intelligent transport system frameworks to transmit and receive data in a wide frequency range, usually implemented as a single integrated circuit (IC) [2, 3, 4]. An important economic problem lies behind this approach--designed hardware must have competitive price and market introduction time, which does not fall within existing standards of telecommunication market. The competitive price is achieved by a decreasing number of discrete components, which is needed to implement software defined radio, e.g., by increasing scale of integration. It is made by employing fast-improving manufacturing technologies of integrated circuits to combine various hardware components into a single chip [5, 6].  
Transceivers used in SDRs are usually referred to as multi-standard, since they can be configured to work with different channel bandwidths, modulation, channel access methods, and other configurations of communication channel [7; 8]. Due to the versatility of its configuration, direct conversion transceiver architecture is best suited and most widely used in SDR implementations [9; 10; 11]. A common structure of a direct conversion transceiver is shown in Figure 1. It is composed of a digital signal processing (DSP) stage, followed by a digital to analog or vice versa conversion interface (DAC or ADC), then an analog baseband, which is composed of a set of variable gain amplifier (VGA) and channel selection filter stages. The analog baseband is connected to a quadrature signal mixer (QMIX), used for baseband signal frequency conversion, where the radio frequency (RF) is set by the local oscillator (LO) signal generator. Depending on the radio link direction, the RF signal is amplified either by a power amplifier (PA) or low noise amplifier (LNA) stage.  
Channel selection filters in SDR transceivers, alongside tuneable band selection filters (BPF), are used to suppress unwanted out-of-band signals and images, what prevents desensitization of receiver and allows meeting adjacent channel power ratio (ACPR) requirements [12]. Requirements for channel selection filters are changing with an increasing number of wireless standards. Channel bandwidth can be dynamically changed to distribute the available resources across the entire network. Due to this dynamic nature of modern wireless traffic, channel selection filters used in SDR applications have to meet one main requirement--their parameters have to be controllable. Thus, the reconfigurable nature of the SDR requires that the baseband channel selection filters, which in direct conversion transceivers are usually implemented as low-pass filters (LPF), should have a high degree of filter configuration capabilities, mainly focused, but not limited to bandwidth, power dissipation, and order of the filter [13].