# Substrate-Driven Atomic Layer Deposition of High-\(\kappa\) Dielectrics on 2D Materials
## 4 Challenges for Applications  
The above-discussed substrate-enhanced ALD provides a unique way to obtain uniform and compact films of high-\(\kappa\) dielectrics with very good insulating properties directly on the pristine surface of 1 L graphene or MoS\({}_{2}\). However, some challenges need to be faced for the application of the obtained high-\(\kappa\)/2D material stacks in electronic devices. Firstly, the substrate-enhanced ALD growth is observed especially on the monolayers of these 2D materials, whereas less uniform and compact films are typically obtained on the bilayer of the multilayers. Although graphene CVD on copper and the sublimation growth of epitaxial graphene on SiC(0001) have been widely investigated in the last decade, but obtaining uniform 1 L graphene on a large area still remains a challenge. In fact, a small percentage (1-2%) of the copper or SiC surface, typically corresponding to surface defects in the crystals, is covered by 2 L or a few layers of graphene. In the case of MoS\({}_{2}\) exfoliated from the bulk crystal on a gold substrate, the obtained membrane is mostly composed of monolayers, with a significant fraction being 2 L or multilayer regions. As a matter of fact, even the presence of few percent of areas with poor-quality high-\(\kappa\) films  
Figure 11: Schematic of the C-AFM measurement set-up (**a**). AFM image of a step between the Al\({}_{2}\)O\({}_{3}\)/1 L MoS\({}_{2}\) stack and the underlying Au substrate, from which a deposited Al\({}_{2}\)O\({}_{3}\) thickness of \(\sim\)3.6 nm was estimated (**b**). C-AFM current map acquired with a bias V = 3 V (**c**). Local I-V characteristics collected at different positions on the Al\({}_{2}\)O\({}_{3}\)/MoS\({}_{2}\)/Au stack, showing the current breakdown at biases between 3.7 and 4.5 V (**d**). C-AFM current map collected on the Al\({}_{2}\)O\({}_{3}\)/MoS\({}_{2}\)/Au stack at bias values of 3 V (upper region), 4 V (middle region), and 3 V (bottom region). A significant increase in the current leakage with the appearance of localized breakdown spots is observed at 4 V (**e**). Images adapted with permission from [22], copyright [PERSON], 2021.  
represents a critical point for some device applications, such as field effect transistors or vertical hot electron transistors. Hence, further optimization of graphene and MoS\({}_{2}\) synthesis methods to achieve full monolayer coverage will be crucial to take full benefit of the substrate-enhanced ALD growth. A second key challenge to be addressed will be the development of reliable procedures for the integration of the high-\(\kappa\)/2D material stacks in electronic devices. In fact, while the ALD-grown dielectrics on EG/SiC(0001) can be immediately employed for the fabrication of top-gated field effect transistors, the transfer of the high-\(\kappa\)/2D material stacks to an insulating or semiconductor substrate is required in the case of metal-supported 2D materials. Recently, [PERSON] et al. [75] also adopted the transfer procedure typically used for CVD-grown graphene on copper in the case of graphene coated by ALD-deposited Al\({}_{2}\)O\({}_{3}\). As schematically illustrated in Figure 12, after direct ALD of the oxide on 1 L graphene/Cu, a poly-methyl methacrylate (PMMA) film was spin-coated on the oxide surface in order to protect the stack during the handling process. Therefore, the copper layer was removed by an etching solution and, after a series of rinses in DI water, the PMMA/Al\({}_{2}\)O\({}_{3}\)/graphene was transferred on the final substrate (SiO\({}_{2}\)/Si). The polymer support was finally removed by solvents. The same authors demonstrated a beneficial effect of the Al\({}_{2}\)O\({}_{3}\) encapsulation of 1 L graphene/Cu on the final electrical performance of the graphene devices.