## 4 Illustrative Example and Experimental Results  
A prototype of the proposed asymmetrical half-bridge dimmable LED driver was implemented and tested. The driven load is specified as 115 W (96 V/1.2 A), and the associated circuit specification is listed in Table 1. The parameter design, including the transformer turn ratio, the PFC inductor, and the output inductor, is based on the derivation in Section 3. The input filter inductor \(L_{f}\) and input filter  
Figure 4: The simplified circuit of the proposed asymmetrical half-bridge converter. capacitor \(C_{f}\) are selected with reference to [22]. By assigning the voltage ripple to be less than 5%, the value of the dc-link capacitor \(C_{bus}\) is obtained with reference to [23]. The component parameters of the practical implementation are listed in Table 2.  
Figure 5 shows the dimming control circuit that mainly consists of a pulse-width-modulation controller (TL494) and a half-bridge driver (IR2302). The TL494 outputs a square-wave voltage of which the oscillation frequency is determined by the capacitor (\(C_{2}\)) connected to pin 5 and the resistor connected to pin 5 (\(R_{2}\)), and the pulse width is determined by the voltage at pin 4. The output of TL494 is connected to pin 2 of the IR2320. The IR2320 features a high-pulse current buffer stage designed for minimum driver cross-conduction. It outputs two complementary square-wave voltages (HO and LO) used to drive the high and low side MOSFETs (S1 and S2), respectively. The high-side gate driver (HO) is in phase with the logic input (pin 2). Therefore, by varying the resistor \(R_{1}\) to adjust the pulse width of the TL494 output (E1), ASPWM control is achieved with respect to dimming the LEDs. \begin{table}
\begin{tabular}{c c} \hline \hline Input voltage \(V_{in}\) & 110 +/\(-\) 10\% V\({}_{\text{rms}}\), 60 Hz \\ Rated output current \(I_{o}\) & 1.2 A \\ Rated output voltage \(V_{o}\) & 96 V \\ Rated output power \(P_{o}\) & 115 W \\ Switching frequency \(f_{s}\) & 50 kHz \\ Full-load duty cycle \(D\) & 0.45 \\ DC-link Voltage \(V_{Chus}\) at full load & 310 V \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Circuit Specification. Figure 5: Control circuit. Figure 6 shows the measured voltages of the active switches \(v_{GSI}\), \(v_{GSS2}\), \(v_{DSI}\), \(v_{DS2}\). It is obvious that prior to the instant when the gate voltages reach a high level, the voltages across the power switches reach nearly zero. This ensures ZVS operation of the active switches. Figure 7 shows the measured diode currents. As expected, these waveforms are consistent with the theoretical ones. The LEDs are dimmed from 100% to 4% rated power. Figure 8 shows the waveforms of the gate voltage of \(S_{2}\), the transformer secondary winding current, and the output filter inductor current at different output powers. It can be seen that the LED power is controlled by varying the duty ratio of \(S_{2}\). From (15), for a given PFC inductor, the output power is proportional to the square of the duty ratio. As seen in Figures 7 and 8, there are negative and positive spike currents in the transformer secondary winding and the diodes on its secondary side. In addition, the negative and positive spike currents happen simultaneously. The spike current is the reverse recovery current of the diode. It is seen that the negative spike current happens when a pair of diodes are turned off, and this spike current flows through the transformer secondary winding and the other pair of diodes. Therefore, the positive spike current can be seen in the secondary winding and the other pair of diodes. Figure 9 shows the measured waveforms of the input voltage and PFC inductor current under heavy and light loads. Regardless of a heavy or light load, the peak values of PFC inductor currents always follow the track of the input voltage. Also, the PFC inductor is energized and de-energized at a very high frequency which is hundreds of multiples higher than the input-line frequency.