## 4 Results and Discussion  
In this work, MATLAB-Simulink platform (R2012a) was applied to perform an exhaustive simulation study. By using basic SimPowerSystems blocks, a simulation model which consists of circuit connection of SAPF in three-phase four-wire system and the control algorithms applied was developed as in Figure 5. For the SAPF topology, a standard two-level three-leg inverter with two split capacitors of 3300 \(\mu\)F (each) sharing a common neutral-point was adopted. A simple 5 mH \(L\)-typed output filter was interfacing between the SAPF and PCC to minimize switching ripples. Meanwhile, the dc-link reference voltage was set at a total value of 880 V (440 V each). For load setting, two types of non-linear loads were considered, and the particulars are summarized in Table 1. As presented, Load A was developed by connecting three single-phase rectifier loads and a three-phase rectifier load in parallel to the power system. Meanwhile, Load B contained only three single-phase rectifier loads with a common neutral. A line inductor with the value of 1 mH was interfacing between the load and power system. Note that the unbalanced load scenarios were created by connecting different setting of single-phase rectifier load to each operating phase. Figure 4: Control structure of the enhanced-ADALINE algorithm. Figure 5: Simulation model of SAPF in a three-phase four-wire system: (**a**) connection of power circuits, and (**b**) control algorithms that constituted the control system. The performance of the proposed algorithm was assessed by observing the total harmonic distortion (THD) value achieved by the SAPF. According to IEEE standard 519 [29], the maximum allowable THD limit for current is 5%. In other words, harmonics mitigation by SAPF is considered to be effective only if the resulting THD value of the mitigated source current is 5% and below. The assessment is performed in comparative manner, where the performance demonstrated by the SAPF when it is controlled by the proposed algorithm is benchmarked with the performance demonstrated by the SAPF when it is controlled by the existing STF-dq0 algorithm [22]. In this regard, the STF-dq0 algorithm was developed and tested under similar test scenarios. Steady-state simulation studies were conducted, considering three non-ideal source voltage scenarios. Scenario I: balanced and distorted source voltage. Scenario II: unbalanced and sinusoidal source voltage. Scenario III: unbalanced and distorted source voltage. Figure 6 clearly shows the magnitude and waveform of the applied source voltages. Note that the source voltage applied in Scenario I contains harmonic distortion of THD = 20.80% (similar for each phase), whereas the source voltage applied in Scenario III contains harmonic distortion of THD = 16.80% for phase \(a\), THD = 15.74% for phase \(b\), and THD = 6.99% for phase \(c\). \begin{table}
\begin{tabular}{c c c c} \hline \hline \multicolumn{2}{c}{**Load Configuration**} & \multicolumn{2}{c}{**Details**} \\ \hline Load A: & Phase \(a\) & & 80 \(\Omega\) resistor and 1500 \(\upmu\)F \\ Three single-phase loads & & & capacitor in parallel \\ \cline{2-3} with a common neutral & Phase \(b\) & Uncontrolled single-phase & 20 \(\Omega\) resistor and 50 mH \\ connected in parallel with a three-phase load & & rectifier feeding: & inductor in series \\ \cline{2-3}  (refer Figure 5a) & & & 40 \(\Omega\) resistor and 1100 \(\upmu\)F \\ \cline{2-3}  & Phase \(abc\) & Uncontrolled three-phase & 30 \(\Omega\) resistor and 80 mH \\  & & rectifier feeding: & inductor in series \\ \hline \hline \end{tabular}
\begin{tabular}{c c c} \hline \hline \multicolumn{2}{c}{Phase \(a\)} & \multicolumn{2}{c}{20 \(\Omega\) resistor and 50 mH \\  & & inductor in series \\ \cline{2-3}  & Phase \(b\) & Uncontrolled single-phase & 80 \(\Omega\) resistor and 1500 \(\upmu\)F \\  & & rectifier feeding: & capacitor in parallel \\ \cline{2-3}  & Phase \(c\) & & 40 \(\Omega\) resistor and 80 mH \\  & & inductor in series \\ \hline \hline \end{tabular}
\end{table}