# Real-Time Volumetric Ultrasound Research Platform with 1024 Parallel Transmit and Receive Channels
## 2 Materials and Methods
### Multi-Channel Electronics
#### 2.3.2 Front-End Boards  
The front-end board integrates the analog/digital interfaces for a total of 16 parallel transmit and receive circuits each. A Spartan-6 FPGA with integrated MicroBlaze soft processor (running at 50 MHz) is used for control and data processing. The front-end FPGA, synchronized and controlled by the main board FPGA, handles the entire timing of a scan, such as pulse-echo measurement. For this purpose, a corresponding state machine consisting of reset, initialization, transmit and receive phases (user configurable), as well as a wait state, was implemented. The logic contents of the front-end FPGAs are stored centrally in a flash device on the main board, which is programmable via a JTAG interface. At the moment of switch-on, an initialization routine configures the front-end FPGAs in the way the main board does. The parameterization of a scan is done via the programming and user interface of the PC software. Commands are generated for each channel based on the user's input, describing the transmit and receive properties in detail. These commands are transmitted to the corresponding individual sub-systems via four PCIe interfaces. On each 256-channel sub-system, the commands are first managed by the main board FPGA and forwarded to the corresponding front-end FPGAs. There, the commands are interpreted by the integrated  
Figure 3: Circuit for internal clock generation of each 256-channel sub-system. MicroBlaze soft processor and the sequence control characteristics and the transmit signals of each channel are programmed according to the user-defined settings. To store the transmit patterns, a separate FPGA internal block RAM (16 \(\times\) 2048 bit) is used for each channel. This has the advantage that during the transmission phase a signal can be read out individually from the memory for each channel at different times. Thus, it is possible to first count down the coarsely resolved delay values, which are stored in a separate internal block RAM (16 \(\times\) 1024 bit) per channel, using a 60 MHz clock accuracy. After this, the actual transmit signal is read out from the transmit memory at a clock rate of 120 MHz and routed to the external pulser output stages via 4:1 serializers at a high clock rate of 480 MHz. To realize a high delay resolution, a specially developed sorting algorithm is used. In addition to the coarse delay already counted down, this algorithm shifts the transmit signal read from the memory by several 120 MHz clocks, depending on the delay set, before the signal is then clocked out at high resolution by the serializers at the I/O interfaces. Shift operators and an AND gate are used in the FPGA for this purpose. This principle allows a high delay resolution of 2 ns to be achieved. In total, transmit patterns with up to 32 \(\upmu\)s signal length can be stored in the transmit memories per channel, together with a total of 1024 different delay values. The pulser output stages are capable of generating rectangular tristate burst signals that can be programmed in frequency, amplitude, number of cycles and delays per channel. A total of eight MAX4940s from the manufacturer Maxim Integrated are used as pulser output stages per front end, each integrating four transmit channels per chip. Each transmit output stage consists of a transistor circuit that switches through either a positive or a negative DC high voltage, depending on the digital control of the Spartan-6 FPGA (Figure 4, Figure 5 upper part). The voltage level can be set up to +/\(-\)100 V for all channels together. To increase the output current per channel to a maximum of 4 A, two outputs are always connected together. This also allows a higher frequency excitation of the ultrasound transducer. In total, a front-end board integrates 16 parallel transmit channels. Figure 4: Simplified design of the front-end TX firmware. In the receive path (Figure 5, lower part), a T/R switch is used to protect the sensitive input circuits from too high voltages of the transmit power stages.