# Substrate-Driven Atomic Layer Deposition of High-\(\kappa\) Dielectrics on 2D Materials
## 2 Atomic Layer Deposition on 2D Materials
### Electrical Behavior and Interface Quality of High-\(\kappa\) Dielectrics by ALD on 2D Materials  
The quality of grown high-\(\kappa\) dielectrics and of their interface with the 2D material strongly influences the electrical performances of the final devices. The seed layer deposition, typically carried out ex situ, can introduce impurities and particles, which act as charge traps compromising the reliability of the high-\(\kappa\) dielectrics subsequently grown by ALD. [PERSON] et al. explained that the HfO\({}_{2}\) deposited on graphene by the evaporated Al seed layer presents a relatively low permittivity (\(\epsilon=5.5\)) and a low-quality interface, which is characterized by impurities and defects responsible for mobility degradation [37; 59].  
Figure 2: AFM images and height line profiles of ALD Al\({}_{2}\)O\({}_{3}\) films deposited on (**a–d**) MoS\({}_{2}\), (**e–h**) WS\({}_{2}\), and (**i–l**) WSe\({}_{2}\) multilayer samples at different temperatures (150, 200, and 250 \({}^{\circ}\)C). Images adapted with permission from [32], copyright the Royal Society of Chemistry, 2017.  
Alternatively, a method based on the in situ deposition of a metal oxide H\({}_{2}\)O-assisted seed layer has been proposed [41; 42]. This approach involves the physical adsorption (by Van Der Walls interactions) of a continuous layer of H\({}_{2}\)O molecules, which acts as a site of nucleation for a seed layer of high-\(\kappa\) dielectrics at a low temperature (100 \({}^{\circ}\)C), followed by conventional deposition at 200-250\({}^{\circ}\)C. [PERSON] et al. [42] demonstrated that this approach ensures the optimal electrical features of the deposited dielectric on graphene, with a favorable permittivity (\(\varepsilon\) = 7.45) and breakdown field (E\({}_{\text{BD}}\) = 7.4 MV/cm). On the other hand, significant charge trapping at the Al\({}_{2}\)O\({}_{3}\)/graphene interface has been observed during the operation of top-gated field effect transistors (Figure 3a). In particular, the density of negative trapped charges up to -4 \(\times\) 1012 cm\({}^{-2}\) was evaluated by capacitance voltage (C-V\({}_{\text{TG}}\)) measurements when increasing the forward and backward gate bias sweeps (Figure 3b,c).  
Additionally, high-\(\kappa\) layers grown on 2D materials pre-functionalized by reactive gas species are subjected to charge trapping phenomena both at the interface and inside the dielectrics. As an example, the HfO\({}_{2}\) top gate dielectric grown on a MoS\({}_{2}\) surface after UV-O\({}_{3}\) treatment [60] shows significant charge trapping, which can be ascribed to impurities and defects generated during the reactive gas exposure. Additionally, O\({}_{2}\)-plasma pretreatments have been shown to have an effect on the interfacial properties and, consequently, the performance of the dielectric [51; 52]. As an example, [PERSON] et al. [61] demonstrated that remote O\({}_{2}\)-plasma is effective for the ALD growth of Al\({}_{2}\)O\({}_{3}\) on graphene, but on the other hand, they found the formation of a defective interfacial layer, resulting in a low breakdown field for the oxide (1.2 MV/cm). As previously discussed, the temperature used during the ALD process plays an important role in the uniformity of the dielectric coverage. In particular, as demonstrated in [32; 53; 54], growth temperatures lower than 150 \({}^{\circ}\)C allow for achieving better uniformity, but at the same time, they result in a significant increase of trapping phenomena and, consequently, a degradation of the passivation degree [60; 62].