# Review of Substrate Integrated Waveguide Circuits for Beam-Forming Networks Working in X-Band
## Fundamental Theory  
Figure 1 shows an illustration of a substrate integrated waveguide with the main dimensions.  
The propagation inside a SIW strongly resembles the propagation inside a classical hollow waveguide with some important differences. In fact, the propagating modes are very close to the TE\({}_{0}\) modes of the waveguide, as they are the fundamental mode of the TE\({}_{10}\). Since the height of the substrate waveguide is very small, the cutoff frequency of the TE\({}_{min}\) modes with \(n\geq 1\) is shifted to very high frequencies and usually are not taken into consideration. Moreover, the gaps on the lateral walls prevent the propagation of TM modes [11; 12] because the strong radiation does not allow longitudinal currents.  
In the literature there are some empirical formulas that relate the size of a SIW with an equivalent, or effective, waveguide with continuous lateral walls. One of the most commonly used is [13]:  
\[W_{eff}=w-\frac{d^{2}}{0.95s}, \tag{1}\]  
where \(w\) is the width of the SIW, \(d\) is the diameter of the vias, and \(s\) is the spacing among vias (see Figure 1). \(W_{eff}\) is the effective width of a rectangular waveguide with the same propagation characteristic, i.e., same propagation constant and electromagnetic field profile. This formula allows the design of devices using and equivalent waveguide with continuous lateral walls, thus simplifying the synthesis process.  
Figure 1: Sketch of a substrate integrated waveguide (SIW).  
From Equation (1), the cutoff frequency of the TE\({}_{10}\) mode can be easily computed using the following:  
\[F_{c}=\frac{c}{2\sqrt{\varepsilon_{r}}}\bigg{(}w-\frac{d^{2}}{0.95s}\bigg{)}^{-1}. \tag{2}\]  
These formulas are very accurate when:  
\[\frac{d}{w}<0.2. \tag{3}\]  
Other formulas have been proposed, by using different analytical or numerical methods [14; 15; 16], improving the accuracy over a wider range of the \(d/w\) ratio.  
There are three different mechanisms that cause losses in SIW [17; 18]: conductor losses, dielectric losses, and radiation. Conductor losses depend on the metal used (usually copper), the roughness of the metal, and the height of the SIW. The first two cannot be directly controlled by the designer since they depend on the quality of the copper lamination of the substrate. Of course the thickness of the metallization should be suitably chosen depending on the frequency and the skin depth. On the other hand, the thicker the substrate is, the lower the losses are, so there is a tradeoff between the losses and the size and weight of the final device, especially in the case of multilayer PCBs. Dielectric losses depend only on the quality of the substrate because they are independent on the cross-section of the waveguide. The choice of the substrate is always a tradeoff between performance and cost. Radiation losses are caused by the scattering from noncontiguous lateral walls. Negligible radiation losses occur when the diameter of the vias is big enough and the spacing among them is small enough. An empirical formula can be used to set the via spacing dependent on the diameter [18]:  
\[\frac{s}{d}<2.5. \tag{4}\]