# Supercapacitor-Based Energy Storage in Elevators to Improve Energy Efficiency of Buildings
## 4 Energy Storage System
### DC/DC Converter  
For bidirectional DC/DC converters used in EESS, there are three common topologies: basic buck/boost, interleaved buck/boost, and dual active bridge (DAB) [24]. The topology chosen in this paper is a six-phase interleaved DC/DC converter. With the interleaved DC/DC converter, it is possible to achieve no turn-on losses of the transistor, and the total inductor volume is smaller than the inductor volume in the basic buck/boost topology [39]. By reducing the volume of the DC/DC converter, the EESS can be more compact and fit into tighter spaces. The schematic of a six-phase interleaved DC/DC converter is shown in Figure 9. It consists of six phases, where each phase is constructed from a half-bridge and an inductor.  
For the design of the DC/DC converter, the operating voltages and currents must be specified. The operating voltages of the DC/DC converter for the EESS under study are determined by the DC-link voltages of the elevator VFD (500-800 V) and the SC bank operating voltages (150-300 V). The current value is determined by the required peak power of the DC/DC converter. If the constant power of the supercapacitor is to be maintained over the full range of the operating voltage, the current must vary with the voltage. Therefore, the peak output power for the DC/DC converter used in the EESS was set at about 80 % of the nominal power of the elevator. In this case, this corresponds to a peak power of 8 kW. With a maximum supercapacitor voltage of 300 V, this results in an SC bank current of about 27 A.  
The load of the DC/DC converter changes according to the requirements of the elevator, which are very dynamic. The dynamic load change of the DC/DC converter can affect the temperature change profile of the semiconductor. The dynamic load change of the DC/DC converter can affect the temperature change profile of the semiconductors. Continuous temperature changes of the semiconductors can shorten the lifetime of the semiconductors [40; 41; 42].  
In the simulation model, the transistors are modeled as ideal, but the transistor conduction and switching losses are modeled with a variable current source connected to the DC  
Figure 9: Schematic of a six-phase interleaved buck/boost DC/DC converter.  
bus. In this way, the complexity of the simulation model is reduced, which helps increase the simulation speed. Considering all modeled losses, the efficiency of the DC/DC converter at maximum power and 600 V on the DC bus is approximately 95 %. The parameters of the modeled DC/DC converter are given in Table 3.  
As described in [34], control of the interleaved DC/DC converter is achieved by a phase shift between the PWM signals controlling each phase with a phase shift of \(2\pi/N\), where N is the number of phases. In this case, the phase shift is \(\pi/3\). The PI controller is used to control the supercapacitor current by controlling the duty cycle of the PWM signal of each phase. Each mode (buck and boost) has its own PI controller to control the charge and discharge current of the SC bank. In buck mode, the T\({}_{2n}\) transistors (for n in the range of 1 to 6) are turned off, while the T\({}_{2n-1}\) transistors are controlled by PWM. In boost mode, it is the other way around: the T\({}_{2n-1}\) transistors are turned off, while the T\({}_{2n}\) transistors are controlled by PWM. In each mode, i.e., buck and boost, the SC bank current is measured, based on which the duty cycle for PWM is determined. To control each phase, each phase of the interleaved converter has its own PWM generator, which has a phase shift. Since the DC/DC converter must be able to switch between modes, the PI controller has a function to reset the integral function of the controller in each mode.