## 3 Design and Implementation of Emulators in Hardware in the Loop
### Photovoltaic Panel  
For the design and implementation of the PVPE, an analysis was carried out on the operations and variables involved in the PVP model. For the analysis of the variables \(V_{oc}\), \(V_{mpp}\), \(I_{sc}\) and \(I_{mpp}\), the technical characteristics of 43 commercial PVPs with powers between 100 and 440 W, offered by five different suppliers (Coradir, Jinko Solar, Solar Energy, Techno Sun and Topsun) were considered as a reference. The results obtained for these variables and the weights assigned to their data types are summarized in Table 1, in this table five characteristics are presented for each of the parameters: column two shows the maximum value observed in the data sheets of suppliers; column three shows the minimum value; column four shows the configuration of the fixed point data type selected for the numerical representation of the parameter, the plus sign means that it is an unsigned numerical representation, the number preceding the sign represents the word length of the data and the last number represents the number of bits used to represent the integer part; the column five shows the maximum value that can be represented with the selected data type; finally, column six shows the resolution of the parameter, which is a function of the selected data type. With the weight of the data type assigned to the input variables, it is possible to introduce values within the range observed in the analysis of the commercial PVPs. For example, for the variable \(V_{oc}\) that operates in a range from 22.42 to 61.97 V, 6 bits were selected to represent the integer values, this allows for working in a range from 0 to 63 V. The number of bits destined for the fractional part is obtained from the difference between the word size and the bits used for the integer part, continuing with the example of the variable \(V_{oc}\), this difference is 3 bits, which allows dividing the integer into 8 values and having variations of 0.125 V. To obtain this resolution, minimization of the number of resources used in the FPGA was sought generating a model of PVPs that behaves similar to commercial PVPs. A reduction in the number of bits used for their representation has a significant impact on the consumption of resources in the FPGA. \(V_{oc}\), \(V_{mpp}\), \(I_{sc}\) and \(I_{mpp}\) were taken because all the operations included in the PVP model depend on them. Figure 6: DC-DC PEC with a proportional integral (PI) controller. With the information obtained on the behavior of the variables \(V_{\infty}\), \(V_{mpp}\), \(I_{sc}\) and \(I_{mpp}\), of the 43 commercial PVPs, the operating ranges of the variables \(R_{s}\), \(a\) and \(N\) (Equations (2)-(4)) were evaluated. Figure 7 shows the graphs of the values obtained for these variables considering all possible values. When analyzing these values, the following operating ranges are defined: the variable \(R_{s}\) works between 0.43 and 1.44, the variable \(a\) between the values 0.955 and 0.975, while the variable \(N\) operates between 28.85 and 56.58. In the three graphs, it was observed that the variables take similar values for each of the PVPs. This trend allows defining the weight of the data type assigned to each one. To define the number of bits used in the integer part, the largest value obtained in the calculations was taken as a reference. When comparing the decimal part of each set of values, variations of the order of 0.01 were observed. One byte was allocated to the fractional part of each variable, in this way the resolution is less than the observed variations. Table 2 shows the weights assigned to these variables. The model used for the design of the embedded PVPE system described by Equations (1)-(4) contains operations of the type \(n^{x}\) and \(\ln(x)\), to implement these functions it was necessary to carry out the following considerations: the operation \(n^{x}\) used the base change shown in Equation (7).