# Energy-Efficient Amplifiers Based on Quasi-Floating Gate Techniques
## 3 Energy-Efficient Amplifiers Based on QFG Techniques
### Single-Stage Class AB Amplifiers  
In terms of energy efficiency and silicon area, single-stage amplifiers are the best option, since they are load-compensated [65] and can feature near-optimal current efficiency if properly designed [5]. The single-stage differential pair amplifier provides simplicity and high current efficiency. A class AB QFG fully differential implementation can be achieved, as shown in Figure 6a [17], where the common-mode feedback (CMFB) circuit is not shown. Transistors M\({}_{\text{1A}}\)-M\({}_{\text{2A}}\) are adaptively biased using two cross-coupled DC level shifters implemented by flipped voltage followers (FVF) [66] M\({}_{\text{1B}}\)-M\({}_{\text{1C}}\) and M\({}_{\text{2B}}\)-M\({}_{\text{2C}}\). This adaptive biasing doubles the gain-bandwidth product (GBW) and allows dynamic currents in M\({}_{\text{1A}}\) and M\({}_{\text{2A}}\) larger than \(I_{\text{B}}\). The active load is implemented by adaptive QFG current sources M\({}_{\text{3B}}\) and M\({}_{\text{3C}}\), like in Figure 4b.  
Figure 6: Single-stage class AB amplifiers. (**a**) Differential pair amplifier. (**b**) Telescopic cascade amplifier. (**c**) Current mirror amplifier. (**d**) Folded cascode amplifier.  
To provide more DC gain, preserving current efficiency, a class AB telescopic cascade implementation can be used, as shown in Figure 6b [20]. In this case, adaptive biasing of the differential pair is also implemented by two FVFs, but in this case, the FVF outputs are connected. Hence, both FVFs act as a winner-take-all (WTA) circuit [67], setting the maximum of the input voltages level shifted by a DC voltage \(V_{B}=V_{\text{SGT},8}Q\) to the common source of M\({}_{1}\)-M\({}_{2}\). This, again, allows differential pair currents much larger than the quiescent current \(I_{B}\). Dynamic QFG cascode biasing, as in Figure 4d, is used to avoid that transistors M\({}_{1}\)-M\({}_{2}\) and M\({}_{3}\)-M\({}_{4}\) enter triode region when such large dynamic currents are generated.  
Despite the high power efficiency of the amplifiers of Figure 6a,b, output swing is limited, since the input transistors are at the output branch. Alternative single-stage configurations with increased output swing can be obtained by including a current follower or a current amplifier to convey (and eventually scale) the differential pair current to the output terminal. This current follower/amplifier can be implemented by either a current mirror or a common-gate configuration, leading to the current-mirror (symmetric) and folded cascode amplifiers, respectively [22]. An example of class AB current mirror amplifier is presented in [23]. If high gain is required, a cascode current mirror implementation can be used, as shown in Figure 6c, in fully differential version (CMFB circuit not shown) [22]. The same adaptive biasing of Figure 6a is used, and two class AB cascode current mirrors, following the idea of Figure 4e, convey the current of the input transistors to the output terminals. A class AB folded cascode topology is shown in Figure 6d [19]. The same adaptive bias circuit is used for the input pair, and the NMOS current sources at the folding nodes are replaced by adaptively bias current sources following the scheme in Figure 4b. Dynamic biasing of cascode transistors can be used in Figure 6c,d to prevent slew rate (SR) degradation, as done in Figure 6b.