## 4 Measurement Results
The two-dimensional (2-D) optical scanning test was performed using the test fixture as shown in Figure 14. The 16 partitioned APD cells and the prototype receiver were mounted on a wire-bonded COB module. The illuminated spot on the APD was changed at a time using the mechanical two stepper motors in two directions (X and Y), and its optical focusing was controlled in Z direction. The output peak voltage of the prototype chip was measured using an oscilloscope. Figure 15 shows the 2-D scanned intensity images of two prototype chip samples. The 2-D output voltages were collected at a position behind the focal point from a 2500 \(\upmu\)m \(\times\) 2500 \(\upmu\)m area with a scan resolution of 50 \(\upmu\)m \(\times\) 50 \(\upmu\)m. As the range information could not be obtained in the space between the partitioned cells, the spot size of the focused laser beam had to be set to be larger than the space between the partitioned cells by adjusting the focusing level in Z direction (Z-3000 \(\upmu\)m). Figure 14: Two-dimensional optical pulse scanning measurement setup. Figure 13: Dependences of TICA output on optical laser power sweep: (**a**) time axis and (**b**) attenuation axis. However, as the InGaAs APD was implemented as 16 partitioned cells in the prototype chip, the variation of APD is larger than the conventional one inducing the fixed pattern noise (FPN) [19], as shown in Figure 15a,b). It makes it difficult to clarify the distinction of the range information. In order to reduce the FPN of the prototype APD, the off-chip digital offset adjustment was performed as in Refs. [20,21] so that the variation of APD can be reduced from 3.9 % to less than 0.1 % as shown in Figure 16.  
The total power consumption of the prototype receiver was measured as approximately 86 mW under the supply voltage of 1.8 V, which is dissipated by a 16-to-1 TICA into approximately 15.4 mW of power. In this work, two types of response tests, the electrical response test and optical response test, were performed for verifying the prototype STUD-based LADAR receiver. The operation of the proposed 16-to-1 TICA receiver was only verified in an electrical response test with an electrical current pulse, and the prototype STUD-based LADAR sensor as a front-end circuit was verified for the largest area photodetector with CPDT of 32 pF through the PPC method. Table 1 shows the performance summary of the prototype chip with a comparison to other works [7, 11, 22, 23, 24, 25]. Compared to other works, the prototype of the proposed 16-to-1 TICA covers the largest area photodetector of 32 pF for high spatial resolution and worked well as the general TIA. Figure 8:0 Variation of prototype APD with off-chip digital offset adjustment. Figure 8:1 Captured 2-D intensity images from two samples of the prototype chip: (a) sample-1 and (b) sample-2. In the next step of this work, the full LADAR system will be implemented for real 3D imaging including a transmitter, time-to-digital converter (TDC), signal processor, etc. In order to enhance the accuracy of 3D information, the timing error compensation technique will be applied in the STUD receiver embedding the PPC method.