## 3 Circuit Design
### Manchester-Coded FSK Modulator  
The \(1.25\) Mbit/s bit stream is transmitted using a Manchester-coded binary Frequency Shift Keying (MC-2 FSK) modulation at a carrier frequency of \(400\) MHz. The transmitter (see Figure 10) consists of a voltage-controlled oscillator (VCO) directly modulated by the digital data, inserted in a Phased-Locked Loop (PLL). Since the modulator is a power-hungry system, the design of the whole PLL, and in particular of the high-frequency oscillator, has to be carried out with great care. The oscillator has a current-biased topology with double cross-coupled pair transconductor. This oscillator architecture allows to minimize the current consumption for a given phase noise with respect to the topology featuring a single differential pair transconductor [28]. In order to accurately set the PLL output frequency at the desired value of \(400\) MHz and to compensate for process, temperature and power-supply variations, the oscillator has to span over \(\pm 10\%\) of its central frequency, _i.e._, a band of about \(\pm 40\) MHz. This means that the capacitance has to be varied as:  
\[\frac{|\Delta C|}{C}=2\frac{\Delta f_{0}}{f_{0}}=40\% \tag{21}\]  
where \(f_{0}\) is the central oscillation frequency (\(400\) MHz), \(\Delta f_{0}\) the covered band of \(80\) MHz and \(C\) the tank capacitor. To make the oscillation frequency insensitive to the parasitic capacitance of the active devices, routing, pads and package pins (the inductor is off-chip), the tank capacitance has to be set in the pF range. Thus, we designed the oscillator with \(C\) tunable from \(6\) pF to \(11\) pF, determining an inductance value of about \(20\) nH. The tank capacitance is implemented by three digitally-controlled binary-weighted NMOS inversion-mode varactors that perform coarse tuning of the oscillation frequency and an analog NMOS inversion-mode varactor for fine-tuning of the frequency, enabling to close the loop of the PLL. Another small NMOS varactor is also adopted for frequency modulation. Figure 10: Schematic of the Phased-Locked Loop adopted as frequency synthesizer and modulator. The Manchester-coded data stream directly modulates the VCO. The Power Amplifier adopts an external resonant filter to efficiently deliver power to the antenna allowing long transmission range. Once the tank parameters have been determined, the current \(I_{BIAS}\) of the tail generator and the \((W/L)\) ratio of the pair transistors have to be chosen taking into account the following considerations:  
* The small-signal loop gain or excess gain [29] of the oscillator (\(g_{m}R_{TANK}\), where \(g_{m}\) is the small-signal transconductance of the double differential-pair and \(R_{TANK}\) is the tank equivalent parallel resistance) has to be larger than \(1\) in order to assure the oscillation start-up. Since the common-mode output voltage of the oscillator is set to the half of the power supply to maximize the oscillation swing, _i.e._, \(V_{DD}/2=1.5\) V, we have: \[g_{m}R_{TANK}=\frac{I_{BIAS}R_{TANK}}{V_{ov}}>1\] (22) corresponding to a current larger than \(\cong 220\)\(\mu\)A. Note that in Equation (22) it was assumed that the overall transconductance \(g_{m}\) of the double differential-pair is equal to the single MOS transconductance and that NMOS and PMOS transistors have the same overdrive voltage, \(V_{ov}\) = \(V_{GS}-V_{T}\) = \((1.5-0.7)\) V \(\cong 0.8\) V.
* The differential oscillation amplitude, \(A_{0}\), has to be sufficiently large (\(>\)\(1.5\) V) to drive the subsequent stages, _i.e._, the frequency dividers and the power amplify. Since \[A_{0}\cong\frac{4}{\pi}I_{BIAS}R_{TANK}=\frac{4}{\pi}I_{BIAS}\cdot\omega_{0}LQ\] (23) where \(Q\) is the tank quality factor [30], the current \(I_{BIAS}\) is minimized adopting an inductor with the maximum quality factor. We opted for an off-chip inductor of \(21\) nH featuring a \(Q\) of about \(70\) at \(400\) MHz. This choice results in a current larger than \(320\)\(\mu\)A to achieve the desired voltage amplitude.