## 2 Micro-Si Thin Film Fabrication Process  
The step by step process of the fabrication of a micro-Si thin film crystallized by copper induction is shown in Figure 1. In the first step, a 60-nm layer of a-Si was deposited on two types of substrate by the direct current (DC) magnetron sputtering of a p-type Si target at a power level of 250 W for 180 s. The first type of substrate was a high-quality one-side polished monocrystalline n-type Si wafer, made by the Czochralski (CZ) method with a \(<\)100\(>\) crystal orientation, a 2-inch diameter, a thickness of 300 \(\upmu\)m, and a resistivity of 10 \(\Omega\).cm. The second substrate was a group of quartz glass pieces with dimensions of \(10\times 10\) mm\({}^{2}\). The samples made on the first type of substrate were later used for electrical and PV characterizations of the fabricated thin films, while the second type of samples were used for material characterization purposes. Following the deposition of the a-Si layer, 10 nm of Cu was deposited by DC sputtering at a power of 200 W for 30 s in the same round of sputtering without breaking the vacuum of the sputtering chamber. The substrates were heated to 170 \({}^{\circ}\)C using the sample holder heater of the sputtering machine. The as-deposited samples after this step are shown in Figure 2a. We also deposited 200 nm of aluminum zinc oxide (AZO) over the Cu layer (for a selected group of samples with a C-Si wafer as the substrate). This transparent conductive layer was formed by the sputtering of AZO that lasted for 250 s at a DC power of 250 W (Figure 2b). Consequently, two structures of (n-type C-Si/p-type a-Si/Cu/AZO) and (glass/p-type a-Si/Cu) were created, as shown in Figure 1.  
Figure 1: Step by step process of CuIC micro-Si thin film fabrication in this research: (top row) deposited p-Si/Cu/AZO tandem layers on n-type C-Si wafer, and (bottom row) deposited p-Si/Cu tandem layers on quartz glass. Prior to loading the substrates (i.e., n-type C-Si wafers and quartz glass) inside the sputtering chamber, they were cleaned using a three-step procedure employing carbon tetrachloride/acetone/ethanol in an ultrasonic cleaning machine; each step of the cleaning process lasted 10 min. To remove the native oxide layer from the surface of the n-type C-Si wafers, they were dipped into a buffered hydrofluoric acid (HF) solution for 30 s. Finally, all the samples were washed with deionized water and dried with high purity nitrogen blow to avoid the risk of contamination which can drastically reduce the quality of the final fabricated product. All the aforementioned deposition processes were carried out with an MSP3200P magnetron sputtering machine under the conditions listed in Table 1. The base vacuum pressure was set to \(5\times 10^{-4}\) Pa, while it increased to 2 Pa and 1.2 Pa during the sputtering of Cu and Si respectively, by flowing Ar gas at a rate of 40 sccm. We used a p-type Si target with a diameter of 80 mm, a purity of 99.999% and a resistivity of 0.01 \(\Omega\).cm. The Cu and AZO targets had the same diameter as that of the Si target, but with much lower purity, i.e., 99.99%. When the deposition process was complete (and the tandem layers of Si and Cu were laminated by AZO), the fabricated samples were cut into several pieces with approximate dimensions of 1 cm \(\times\) 1 cm. In the next step, the deposited thin films went under thermal annealing treatment. This was done in a FURNACE-1200 electrical annealing system equipped with a quartz vacuum tube which can heat the samples to 1200 \({}^{\circ}\)C. As shown in Figure 3, several thermal treatments were applied to the fabricated samples in an N\({}_{2}\) environment (to prevent oxidization) kept at a pressure of \(\sim\)10 Pa. The applied annealing temperature was increased from room temperature to the desired crystallization temperature (450 to 950 \({}^{\circ}\)C) at a rate of 10 \({}^{\circ}\)C/min. The annealing process continued at the defined