## 3 Optimized Dual-Channel Data Storage and Access Method
### Dual-Channel Pipeline Processing  
With the continuous development of integrated circuit technology, the volume, power consumption, and reliability of memory chips have improved significantly. SAR imaging systems often have dual-channel memory units. \"Dual-channel\" means that two different  
\begin{table}
\begin{tabular}{c c c} \hline \hline
**Performance** & **Conventional Method** & **Ours** \\ \hline Writing efficiency(range) & 92.25\% & 67\% \\ Reading efficiency(range) & 94.64\% & 82\% \\ Writing efficiency(azimuth) & 8.51\% & 67\% \\ Reading efficiency(azimuth) & 12.12\% & 82\% \\ \hline \hline \end{tabular}
\end{table}
Table 2: Comparison of theoretical efficiency between conventional method and the method proposed.  
Figure 12: De-cross access and caching in azimuth direction.  
data channels can be addressed and accessed separately without affecting each other. This section mainly discusses the dual-channel pipeline processing method.  
The dual-channel pipeline processing method requires independent dual-channel DDR3 (hereinafter referred to as DDR3A and DDR3B), and a dual-channel cache RAM that matches the dual-channel DDR3. The schematic diagram of dual-channel pipeline processing is shown in Figure 13; the four steps of this procedure are as follows:  
* Step 1: Store the SAR raw data in DDR3A using the mapping method proposed;
* Step 2: Read the required data from DDR3A and save them to RAM for caching. Send data to the processing engine for calculation when the RAM is full; after the calculation is completed, the data are written into the RAM corresponding to DDR3B, and the next batch of data to be processed is read from DDR3A at the same time, so as to create a loop until the entire SAR data matrix is processed. The processing results are all stored in DDR3B;
* Step 3: Read the required data from DDR3B and save them to the RAM for caching. Send data to the processing engine for calculation when the RAM is full; after the calculation is completed, the data are written into the RAM corresponding to DDR3A, and the next batch of data to be processed is read from DDR3B at the same time, so as to create a loop until the entire SAR data matrix is processed. The processing results are all stored in DDR3A;
* Step 4: Repeat Step 2 and Step 3 until all calculations related to the SAR data matrix in the SAR algorithm flow are completed.  
The dual-channel pipeline processing method has higher processing efficiency compared with the single-channel processing method. Assuming that the time for DDR3 to read a piece of data is \(t_{rd}\), the time for writing a piece of data is \(t_{wr}\), and the processing time for the processing engine to calculate a piece of data is \(t_{p}\). In the single-channel processing method, the data need to be written back to DDR3 after the calculation is completed, and then the next batch of data can be read. The total processing time of the entire data matrix is \(N\cdot(t_{rd}+t_{p}+t_{wr})\), where \(N\) is the number of batches of processed data. In dual-channel pipeline processing, the reading and writing of the two channels can be performed at the same time. At this time, the total processing time of the entire data matrix is \(t_{rd}+N\cdot(t_{p}+t_{wr})\), which is significantly improved compared with the single-channel processing method.  
Figure 13: Schematic diagram of dual-channel pipeline processing.