## 2 Materials and Methods
### Design and Fabrication of the Resonator  
Figure 2a shows an exploded view of the resonator constituted by the silicon substrate, an aluminum nitride interlayer of 186 nm, a molybdenum bottom electrode of 220 nm, a piezoelectric aluminum nitride layer, and an Aluminum top electrode.  
Because of technological limitations, the piezoelectric thickness design requirement is restricted to a range between 1.35 \(\upmu\)m and 1.5 \(\upmu\)m.  
Figure 2b reports all the possible solutions the decision algorithm provides. It is underlined that a total algorithm computational time of less than one minute providing 21 configurations of the resonator with piezoelectric thicknesses within the range of interest can be observed. The chosen solution is characterized by a piezoelectric thickness equal to 1.36 \(\upmu\)m having a 187 nm thick aluminum top electrode (see Figure 2c). Because the thinner piezoelectric layer reduces the deposition times, using a thicker top electrode decreases the electrical losses, increasing the performance of the resonator.  
Figure 2d shows the P.D.F. returned by the random perturbator, where layer thicknesses vary with a maximum error of 5%. The 95% confidence interval of the resonance frequency is equal to 2546 \(\pm\) 23.5 MHz. In this case, the computational time is also less than one minute.  
The microfabrication processing for the proposed resonator exploits an organic sacrificial layer made of Lift-Off Resist (LOR) coated with a polyimide protection layer. The role of the polymeric layer is two-fold: on one side, it prevents the dissolution of the sacrificial layer during the following steps; on the other side, the use of a flexible support layer prevents the cracking of the membrane and the collapsing of the structure.  
The resonator is fabricated using four lithographic steps: the sacrificial layer, the bottom electrode, the piezoelectric layer, and the top electrode. The fabrication steps are illustrated in Figure 3.  
Figure 2: Resonator design using proposed innovative approach: (**a**) sketch of the resonator, (**b**) set of solutions returned by the decision algorithm, (**c**) cross-section of the selected solution, and (**d**) PDF of the resonance frequency.  
As a first step, an n-doped highly resistive silicon wafer is coated with the LOR sacrificial material. A spin-coated photosensitive resist layer on the wafer is patterned using optical lithography. During the development stage, the pattern is transferred from the photosensitive material to the sacrificial layer (Figure 3a).  
After that, the resist is stripped by dipping the sample in acetone. The sacrificial layer is covered with a 2.5 um thick polyimide protective layer (Figure 3b).  
The FBAR stack form of the bottom electrode, the piezoelectric layer, and the top electrode is fabricated as described in the following paragraphs. A 186 nm thick aluminum nitride interlayer is deposited, followed by the 220 nm thick molybdenum bottom electrode. The metal and the interlayer are patterned using direct lithography and BCI3-based Inductively Coupled Plasma (ICP) etching (Figure 3c).  
The piezoelectric layer is fabricated by depositing a 1.36 um thick layer of aluminum nitride through Direct Current (DC)-pulsed sputtering and patterned with the same approach as the previous layers (Figure 3d).  
The top electrode is realized with negative optical lithography, followed by the deposition of a 187 nm thick aluminum layer and a lift-off step in acetone (Figure 3e).  
Finally, the polyimide protective layer is etched by an O\({}_{2}\)-based ICP etching followed by dipping the sample in PG-Removal for 2 h to dissolve the sacrificial material (Figure 3f).