## 2 Related Work
### Classifications by CPU Architecture
Tables 1 and 2 summarize the general features that denote differences between ARM and RISC-V architectures. It should be noted that 8-bit microcontrollers do not support the RISC-V architecture due to their restrictive and limited hardware features. To our knowledge, no reliable bibliographic references show which year the TinyML approaches and their applications address several tasks in the AI field using algorithms that deal with ANN. However, the first implementation using constrained embedded systems for applications of TinyML considered 32-bit and 64-bit architecture devices. The 8-bit architectures for TinyML applications were not contemplated until 2015 [21] due to the limited capacity of their hardware, such as memory usage or clock speed [32]. In 2015, with the contributions of several works such as [21; 32; 33], the techniques for implementing TinyML in embedded systems with 8-bit architectures demonstrated reliable results. \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Embedded System Type** & **Applications Area** & **General Features** & **Characteristics** \\ \hline \multirow{4}{*}{8-bit Architectures} & Real-time dynamic control systems, data acquisition, signal generation, FFT analysis & 1–16 KB SRAM, up to 256 KB EEPROM, up to 40 MHz clock frequency & Low power consumption, low cost, simple implementation, low performance with high computational processing demand \\ \cline{2-4}  & Real-time dynamic control systems, TinyML, signal processing, FFT analysis, real-time embedded vision & 16 KB–1 MB SRAM, up to 512 KB EEPROM, up to 480 MHz clock frequency & Medium power consumption, high cost, high cost, low cost, optimal performance with high computational processing demand \\ \hline \multirow{4}{*}{64-bit architectures} & Smart mobile devices, GPUs, FPGAs, microprocessors, real-time embedded vision & 1 MB–up to 64 GB SRAM, up to 16 MB flash, up to 2.5 GHz clock frequency & Medium power consumption, high cost, high cost, optimal performance with high computational processing demand \\ \cline{1-1} \cline{2-4}  & Smart mobile devices, GPUs, FPGAs, microprocessors, real-time embedded vision & 1 MB–up to 64 GB SRAM, up to 16 MB flash, up to 2.5 GHz clock frequency & Very high power consumption, high cost, optimal performance with high computational processing demand \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Characteristics of ARM architectures. An important point regarding the hardware comparisons in this review is that the ARM and RISC-V architectures are based on the same ISA (Instruction Set Architecture) philosophy. They differ because ARM is used in privately licensed embedded systems, such as devices manufactured by the STMicroelectronics company (Geneva, Switzerland). RISC-V is an architecture that has ventured into open source platforms as an efficient, low-cost, and powerful alternative for brands such as Espressif Systems, Arduino, and Rasberry Pi. It is necessary to mention a history fragment to understand the evolution of hardware architectures and explain why architectures such as RISC-V are considered novel, improved versions of ARM architecture. In the second part of the 1980s, the research community dedicated to developing devices with high performance and low power consumption in computer control embedded applications turned to look at the new approach that consisted of using the ARM architecture, implemented in commercial computer microprocessors since the mid-1970s, in embedded systems with hardware-constrained. This trend increased all throughout the 1990s. The ARM architecture allowed the implementation of several experimental prototypes and, subsequently, massive manufacturing of CPU and microcontrollers used in the industry dedicated to the development of data processing systems and complex mathematical calculations carried out by several electronic systems such as industrial controllers, medical diagnosis, and semi-autonomous transportation, among others.