# Artificial Neural Network Assisted Error Correction for MLC NAND Flash Memory
## 2 Channel Model
### Proposed Artificial Neural Network-Assisted Error Correction (ANNAEC) Scheme  
The main idea of the proposed ANNAEC scheme is shown in Figure 7. In general, the flash memory controller uses soft-decision error correction [12], read-retry [1; 16] and voltage optimization, which has been widely used in practical systems, to ensure the reliability of data stored in NAND flash memory. When these techniques are not effective in suppressing flash channel noise, the flash memory controller attempts to operate the proposed ANNAEC scheme to correct error bits. Moreover, it can reduce the power consumption and computation burden of the controller, since the cells in an overlap region take a relatively small part of the cells on a page. In general, the host implements data writing and reading to the NAND flash memory chip by communicating with the memory controller, which communicates with the NAND flash memory chip. First, the host transfers data to the flash controller. The flash controller then encodes the data and writes it into the NAND flash memory chip. When the host reads the data, the flash controller communicates with the NAND flash chip. During this process,  
Figure 7: Block diagram of the proposed ANNAEC scheme in NAND flash memory. the NAND flash chip reads the data from the cell and sends it to the flash controller by reading the sensing circuit. After that, the flash controller corrects and restores the original data through the decoding algorithm and sends it to the host. The proposed a neural network assisted error correction algorithm is used as an alternative decoding algorithm. When the decoding of the flash controller fails, the neural network model is used to first correct the data and then perform decoding. We label the positions of the cells in an overlap region, which is at the \(N\)-th word-line and the \(M\)-th bit-line in the block as \((N,M)\), shown in Figure 7. The input parameters of the neural network are summarized in Table 1. \(X_{1}\) and \(X_{2}\) are the bits of cell-\((N,M)\) in MLC memory, respectively. \(X_{3}\)\(\sim\)\(X_{8}\) are the LLRs of LSB and MSB of the immediate adjacent cells, i.e., cell-\((N+1,M-1)\), cell-\((N+1,M)\) and cell-\((N+1,M+1)\). \(X_{9}\) is the flag of page type. If the current reading page is LSB, we set \(X_{9}\) to \"\(0\)\"; otherwise, \(X_{9}\) is set to \"\(1\)\". \(X_{10}\) is the number of PE cycles. There are two reasons for choosing those parameters: (1) the threshold voltage is difficult to be obtained in a practical system, but the LLR and bits in a cell can help to locate the range of threshold voltage; (2) the vertical and the diagonal neighboring cells contribute about 81% of the CCI [17; 18]. Afterward, we send the parameters into the back propagation neural network to correct error bits. The sigmoid function is selected as the activation function of the back propagation neural network, given as  
\[f(x)=\frac{1}{1+e^{-x}}. \tag{17}\]  
The cost function is chosen as the typical mean square error (MSE) cost function [19], given by  
\[E=\frac{1}{2}[(T_{y_{0}}-y_{0})^{2}+(T_{y_{1}}-y_{1})^{2}], \tag{18}\]  
where the outputs of neural networks \(y_{0}\) and \(y_{1}\) are the reliabilities of \"\(0\)\" and \"\(1\)\", and \(T\) denotes the desired reliability in the data set. The relative LLR is calculated offline in the flash memory controller. It is difficult to recalculate the relative LLR, since the online characteristic estimation of the memory channel causes longer read latency. Since the accurate relative LLR is hard to recalculate, we update relative LLR by  
\[LLR_{update}=(-1)^{\epsilon+1}\Big{|}LLR_{original}\Big{|}, \tag{19}\]  
where \(LLR_{original}\) denotes original relative LLR obtained in the sensing operation, and \(\epsilon\) is given by  
\[\epsilon=\left\{ \begin{array}{ll}1&\text{if }y_{1}>y_{0}\\ 0&\text{else}.\end{array} \right. \tag{20}\]  
Although (19) does not update the accurate LLR to decode, it can estimate the value of LLR.