# Enhancing the SRAM PUF with an XOR Gate
## 4 Results
### Enrollment
#### 4.1.1 Discharge Timings  
One of the challenges encountered when implementing the SRAM PUF is the discharge time of the SRAM. This timing has implications for the enrollment process of SRAM, as it can influence the determination of stable and flaky cells. For instance, if a cell is initially read as a '1' and then flips to a '0' when read consecutively, there is a possibility of erroneously reading it as a '1' before the cell fully discharges to '0'. To address this issue, it is necessary to introduce an adequate time gap between power cycles, allowing the energy from previous reads to dissipate and ensuring more accurate readings.  
To investigate the impact of discharge on our SRAM devices, we enrolled the same devices using different power cycle times at various testing temperatures. We quantified the discharge time by analyzing the number of stable and flaky cells during each enrollment. It was expected that a shorter time interval between power cycles would result in less discharge time for each cell and for less flaky cells to be detected. The outcomes of these tests are presented in Figure 7.  
Upon analyzing Figure 7, we identified a significant pattern concerning SRAM enrollments, the time interval between power cycles, and different temperatures. At each temperature, we observed a sharp increase in the number of stable cells as the time between power cycles increased, reaching a specific threshold point that varies with each temperature. Beyond this threshold point, the number of detected flaky cells marginally decreased.  
Enrollments conducted with almost zero seconds between power cycles demonstrated nearly no cell discharge, reducing the number of flaky cells detected. This phenomenon  
Figure 6: An SRAM device connected to the client device using standard GPIO jumper cables for thermal testing.  
can be attributed to the charges trapped within each cell, where the cells retain information from previous reads, making them less likely to change. As the charges trapped within the cell are assumed to diminish over time, it can be inferred that the number of flaky cells increases as the charge from previous reads dissipates. The objective is to use only stable cells in key generation, which implies that enrollments with a higher number of flaky cells detected will produce low-error-rate keys.  
Observations of flaky cells at various temperatures provided valuable insights into the discharge timings of the ISSI SRAM chip. At a temperature of 0 \({}^{\circ}\)C, the number of flaky cells peaked after 21 s. At 23 \({}^{\circ}\)C, the peak occurred between 2 and 3 s, while at 80 \({}^{\circ}\)C, it was observed after just 1 s. These findings indicate that the dispersion of the cell charge takes longer at lower temperatures.  
To accommodate these temperature-dependent characteristics, the enrollment process will be adapted to utilize different power cycle times. Specifically, at 0 \({}^{\circ}\)C, the power cycle time for enrollment will be set to 21 s. At 23 \({}^{\circ}\)C, it will be 3 s, and at 80 \({}^{\circ}\)C, it will be 1 s. By adjusting the power cycle times according to the temperature, the enrollment process can effectively address the discharge times and ensure reliable and accurate results.