## 6 Cryptography
### Algorithms for Images
#### 6.2.3 Hardware-Implemented Cryptographic Algorithms  
In addition to the previous algorithms, others have been directly implemented on hardware circuits, as we show in the three following examples. In [126], Cicek implemented the Lozi, Tinkerbell, and Barnsley Fern two-dimensional discrete chaotic maps on a microcontroller. Then, he implemented a microcontroller-based random number generator (RNG) using these three different maps. For RNG design, the outputs of the \(x\) and \(y\) state variables of the chaotic maps are first multiplied by 1000 to magnify the variables. Second, the output of these magnified variables is converted to a 32-bit single floating-point binary number, as in Figure 7 of [126]. After that, the first 24 bits \((0,1,2,3,\ldots,23)\) of the 32 bits of this floating-point binary number are used for the preprocessing algorithm, which is shown schematically in Figures 8 and 9 of [126]. In the first case, the EXOR operation is performed mutually from the zeroth bit of the \(x\) state variable of Lozi map and the twenty-third bit of the \(x\) state variable of the Tinkerbell map \((0\longrightarrow 23,1\longrightarrow 22,2\longrightarrow 21,\ldots)\). The result obtained here is applied to EXOR processing with the zeroth bit of \(x\) from the Barnsley map. The other bits are applied to the same processing in order. In this way, the first 24-bit RNG output is obtained. Then, a similar algorithm is applied for the second 24-bit RNG output. The subsequent 48-bit sequences are obtained from the chaotic map output values after every 95 iteration calculations. In this way, different random values are obtained simultaneously. The implemented RNG design was run on the microcontroller and the obtained random numbers were tested for validity using the NIST SP800-22 test package. Merah et al. [127] proposed a stream cipher based on chaotic synchronization of the Lozi map. Their technique consists of feeding back the ciphertext to the cryptosystem and incorporating it on the driver signal for synchronization. The driver system (corresponding to (3)) is provided by  
\[\left\{ \begin{array}{l}x_{n+1}=1-a|x_{n}|+y_{n},\\ y_{n+1}=bx_{n},\end{array} \right. \tag{88}\]  
whereas the response system is provided by  
\[\left\{ \begin{array}{l}x^{\prime}_{n+1}=1+y^{\prime}_{n}-\alpha s(x_{n}),\\ y^{\prime}_{n+1}=\beta x^{\prime}_{n},\end{array} \right. \tag{89}\]  
The driver signal \(s(x_{n})=|x_{n}|\) is used to drive the response system. Note that \(e_{1}=x_{n+1}-x^{\prime}_{n+1}\) and \(e_{2}=y_{n+1}-y^{\prime}_{n+1}\) are the synchronization errors. By assigning different initial conditions to the driver and response systems, \(e_{1}\) and \(e_{2}\) vanish after some number of iterations. Therefore, the coupled systems synchronize and the difference between the outputs of the master and slave systems tends to zero. The authors took the driver signal \(|x_{n}|\), which has 64 bits of length, then divided it into two parts, the first containing the lower bits \(m\) and the second containing the upper bits \(d\), where \(d+m=64\) bits. For encryption purposes, the \(m\) lower bits are XORed with those of the plaintext, the resulting ciphertext (which has \(m\) bits of length) is concatenated with the \(d\) upper bits of \(|x_{n}|\), and a new sample is made which is 64 bits in length (\(d\) upper bits of the previous and \(m\) lower bits of the ciphertext). The new \(|x_{n}|\) is then fed back to chaotic system and sent to the receiver at the same time for synchronization and to bear the ciphertext. On the receiver side, the response system synchronizes with the driver one, then the plaintext is recovered by XORing the \(m\) lower bits of the driver signal with \(m\) lower bits of the signal generated from the response of the chaotic system. Simulation results showed that the proposed stream cipher has good confusion/diffusion properties and provides a strong key. Xiao et al.