# Resource-Efficient FPGA Architecture for Real-Time RFI Mitigation in Interferometric Radiometers
## 5 Conclusions  
The implementation of an RFI detection and mitigation system for interferometric radiometers has been successfully demonstrated, achieving significant optimization of FPGA resources while maintaining detection performance. The Observable Generation stage, through overclocking techniques operating at 230.775 MHz, achieved a reduction in DSP block usage compared to conventional implementations. Resource-sharing strategies in the FFT computation resulted in total DSP utilization of 76 blocks per receiver, enabling the processing of 14 receivers within a single FPGA. Memory optimization through strategic use of BRAM resulted in 968 memory Look-Up Tables (LUTs) per receiver. Resource utilization remained balanced across the FPGA, with maximum BRAM utilization at 3.88%, DSP blocks at 3.96%, and logic elements at 6.80%.  
\begin{table}
\begin{tabular}{l c c c c} \hline  & **X AND** & **X OR** & **Y AND** & **Y OR** \\ \hline RFI Detection contribution & \(1.91\times 10^{-6}\) & \(8.48\times 10^{-4}\) & \(1.91\times 10^{-6}\) & \(4.88\times 10^{-4}\) \\ \hline Cumulative error & \(3.54\times 10^{-6}\) & \(1.76\times 10^{-3}\) & \(2.15\times 10^{-6}\) & \(8.81\times 10^{-4}\) \\ \hline \end{tabular}
\end{table}
Table 4: Mask error in an RFI scenario (BER).  
Figure 8: Comparison of the Simulink OR Mask (**left**) with the full-precision MATLAB reference (**right**).  
Figure 9: Comparison of the Simulink AND Mask (**left**) with the full-precision MATLAB reference (**right**).  
The modular design approach proved particularly valuable during testing and validation, allowing independent optimization of each processing stage. The ability to scale horizontally by replicating processing blocks provides flexibility for future mission requirements, while the standardized interfaces facilitate integration with existing radiometer systems.  
The successful implementation demonstrates the feasibility of complex RFI mitigation algorithms in FPGA hardware, providing a pathway for future interferometric radiometer missions. The achieved balance between processing capability and resource utilization establishes a baseline for similar implementations, while the modular architecture ensures adaptability to evolving mission requirements. This implementation provides a foundation for future development of RFI mitigation systems, particularly in scenarios where resource optimization and reliability are of great importance.  
Conceptualization, A.P.-P., J.Q. and A.C.; data curation, A.P.-P.; formal analysis, J.Q. and A.C.; funding acquisition, J.Q. and A.C.; investigation, A.P.-P., J.Q. and A.C.; methodology, A.P.-P., J.Q. and A.C.; project administration, J.Q.; resources, J.Q. and A.C.; software, A.P.-P. and J.Q.; supervision, J.Q. and A.C.; validation, A.P.-P., J.Q. and A.C.; visualization, A.P.-P.; writing--original draft, A.P.-P., J.Q. and A.C.; writing--review and editing, A.P.-P., J.Q. and A.C. All authors have read and agreed to the published version of the manuscript.  
This research was funded by ESA, grant number ITT AO9359, by project \"GENESIS: GNSS Environmental and Societal Missions--Subproject UPC\", Grant PID2021-126436 OB-C21, sponsored by MCIN/AEI/10.13039/501100011033/ and EU ERDF \"A way to do Europe\", and grant for recruitment of early stage research staff of Agencia Gestio d'Ajuts Universitaris i de Recerca (AGAUR) Generalitat de Catalunya, Spain (FISDUR2020/105).  
Not applicable.  
The datasets presented in this article are not readily available.  
[PERSON], [PERSON] and [PERSON] were employed by MITIC Solutions S.L.