## 4 DASH7 Alliance Mode
### Implementation Details  
One of the key aspects of D7 AM is to implement certain aspects of the protocol using low-power microcontrollers, because the standard has been designed to be transceiver agnostic. Some transceivers already implement hardware that is compatible with features defined in the standard and, in such cases, the implementation is both time and energy efficient. Examples of such transceivers are the CC1101 of Texas Instruments and the Spirit1 by ST Microelectronics. However, other transceivers do no implement such features, and thus, these need to be implemented in the microcontroller. One example is the CC430 system on chip (SoC) by Texas Instruments, which includes a 16-bit MSP430 microcontroller and a reduced version of the CC1101 transceiver. One particular case is implementing the FEC encoding scheme at the physical layer, which is based on two subsystems connected in series, as depicted in Figure 7. First, a non-recursive convolutional encoder with a rate \(r=1/2\) and a constraint length \(k=4\). Second, a 4 \(\times\) 4 matrix interleaver that separates adjacent data to ensure that bursty data errors caused by fading can be treated by the convolutional code error corrector. Compared to an uncoded channel, the FEC encoding scheme provides an asymptotic coding gain of 4.8 dB in an AWGN (additive white gaussian noise) channel [26], thus enabling to extend the communication distance under ideal conditions. However, such a gain is reduced in real-life conditions to 2-3 dB, due to channel impairments, such as fading and shadowing. The FEC encoding and decoding process is asymmetric, that is, the code to implement the coder and the decoder are different. During the encoding process, the microcontroller first shifts the data stream through a nibble mapper that selects the appropriate output given the input bits. Such a process can be implemented using a mapping table and, thus, is computationally efficient. Next, the output of the encoder is passed through the interleaver. The process is also computationally efficient, because the matrix transformation is small, and thus, it takes a few steps. Upon reception, the deinterleave process is similar to the interleave process. However, the decoding process is much more computationally intensive. Because the errors introduced by the channel are random, a Viterbi algorithm needs to be executed to select the path in the output stream that has the maximum likelihood decoding. Considering the implementations of D7 AM that are currently available [22], we have observed that PN9 encoding and decoding (as presented earlier) and the FEC encoding process can be implemented in software without any impact on system performance using an MSP430 microcontroller. However,the implementation of FEC decoding executing the Viterbi algorithm has an impact on the response time and energy consumption of the system. Other microcontrollers with more advanced computational characteristics, such as those based on the Cortex-M3 architecture, may be able to execute the Viterbi algorithm in real time. Thus, it is important to take into account the appropriate selection of the microcontroller and the radio transceiver when designing a low-power wireless system based on D7 AM. Another key aspect of implementing D7 AM is the query system. In contrast to other low-power wireless technologies, where querying is typically done at the data-link layer based on the node address, D7 AM enables to treat the network as a distributed database. Such an approach enables to query nodes in the network based on certain parameters at the application layer in a standardized way, e.g., trigger a response only from nodes that have a temperature sensor whose current value is, for example, between 0 \({}^{\circ}\)C and 24 \({}^{\circ}\)C. The benefits of such an approach are two-fold. First, only nodes that match the request will reply to the query, thus enabling to save the energy of the remaining nodes that are not involved in the query.