## 3 Proposed Design Methodology
### Two-Stage LNA Design  
In this design, a two-stage LNA consists of two similar common-source transistors (2 \(\times\) 50 \(\upmu\)m gate width) connected to the ground through a feedback inductor. A simplified schematic of the two-stage LNA is presented in Figure 4. The FET transistor with its source terminal connected to the ground through an inductor, \(L_{S,k}\), will be denoted as the \"Active Device\" (AD1 and AD2, respectively) in this article. The second step in the design is to evaluate the stability of the device to ensure that it operates within its stable region and avoids oscillations during operation. This assessment can be performed by analyzing the input and output stability circles, as illustrated in Figure 5. It is evident that the device is not inherently stable at the design frequency of 15 GHz. Therefore, a stabilization element must be introduced to enhance transistor stability. In this work, a feedback inductor is added to the source terminal of the transistor to ensure stable operation. Other figures of merit of stability are the Rollet stability factor, K, and the stability measure [10]. The necessary and sufficient conditions for unconditional stability are that the stability factor is greater than unity and that the stability measure is positive [15]. Various inductor values are tested to find the minimum value that can stabilize the transistor under the design frequency, and it can be shown from Figure 6, left side, that 0.20 nH is the minimum inductance value needed to stabilize the transistor at the design frequency. For confirmation, the input and output stability circles with the addition of a 0.311 nH inductor  
Figure 4: Two-stage LNA schematic with inductive feedback and matching networks. Figure 3: Performance over frequency for transistor with gate widths: 2 \(\times\) 50 \(\upmu\)m (red solid line) and 4 \(\times\) 75 \(\upmu\)m (blue dashed line): (**a**) Minimum noise; (**b**) Maximum gain. are also presented to verify that the transistor is unconditionally stable from 13-15 GHz, as shown on the right side of the Figure 6.  
The FET transistors in Figure 4 used in the first and second stages are from the WIN foundry PIH1-10 design kit with a gate width of 2 \(\times\) 50 \(\upmu\)m. Their noise and small signal parameters are reported in Table 1. For simplicity, the same transistor model is used in the first and second stages; however, the method is applicable to be used with different transistor models. It is important to mention that adding a feedback inductor in series will change the small-signal and noise parameters for the active device. Formulas for determining the small signal and noise values for the active device are accessible in [19]. Figure 5: Input and output stability circles for 2 \(\times\) 50 \(\upmu\)m transistor model. Figure 6: (a) The active device stability measures vs. inductive feedback values at 15 GHz. (b) The input and output stability circles after the addition of the 0.311 nH feedback inductor to the 2 nd stage transistor at 13–15 GHz. The input (IMN), output (OMN), and inter-stage (ISMN) matching networks are assumed to be lossless. This assumption has the effect of requiring that each MN's input and output ports have the same mismatch levels. The reason behind this is that the passive elements in the matching network cannot dissipate or generate power; thus, the incident electrical wave is either reflected or transmitted. \(IM_{1}\) and \(OM_{2}\) in Figure 4 represent the input and output mismatch levels of the two-stage LNA, respectively. \(OM_{1}\) and \(IM_{2}\) are the levels of mismatch before and after \(ISMN1\). \(IM=0\) means a perfect conjugate match at the input port, \(IM=1\) implies a purely reactive input reflection coefficient, while \(IM>1\) indicates a negative resistance [10]. A similar explanation is applied to \(OM\). The scenario in which \(IM\) and \(OM\) are greater than unity is avoided since it could be detrimental to the RF system.