# Extending the Performance of Hybrid NoCs beyond the Limitations of Network Heterogeneity
## 1 Introduction
These operations lead to the non-ideal zero-load delays in conventional adaptive routers. Recently proposed networks [11; 12] develop simpler pipelines to reduce zero-load latency. However, these designs perform poorly under high-load traffic. Moreover, these routers do not support the virtual channel (VC) to reduce complexity and pipeline latency. A low-complexity adaptive router that can avoid congestion yet maintain low zero-load latency is desirable for CMPs. CMP demands NoC to have both low queuing and pipeline delays under the non-uniform and dynamic traffic of CMP workloads. CMP also requires VC support to isolate messages of different classes. Moreover, inhomogeneous 3D NoCs (or WiNoCs) require the multi-hop 2D routers to deliver packets to the 3D routers (or wireless routers) with high efficiency to fully exploit the benefit of the short inter-layer wires (or single-hop wireless layer). We propose SlideAcross, a three-stage adaptive VC-compatible router with a single-cycle bypassing mechanism to meet the communication needs of emerging communication fabrics for modern CMPs. The proposed router integrates adaptive routing with low-latency bypassing in a cost-effective way to overcome the drawbacks of existing adaptive routing and low-latency architectures. The proposed router mainly consists of an input buffer, crossbar and allocators for the crossbar and virtual channel. In addition, there is a set of bypass datapaths to facilitate intra-layer traversal. The bypass datapath is extended from the low-cost dimension sliced router (DSR) [11]. A packet that takes advantage of bypass datapaths does not need to wait for crossbar setup and experiences single-cycle delay per hop (including link traversal). If bypassing is not available or not applicable for a packet, the packet is stored in an input buffer and then follows the adaptive routing pipeline. SlideAcross uses a simple VA scheme to allow VA to be performed after switch allocation (SA) in the same cycle non-speculatively. In brief, this paper proposes a non-speculative three-stage adaptive router and a low-complexity single-cycle bypassing mechanism to efficiently reduce the contention among the 2D routers and wireline layer for emerging inhomogeneous 3D NoCs and WiNoCs, respectively, that can handle the communication dynamics of various CMP workloads. In summary, in this paper:  
1. We propose a low-complexity single-cycle bypassing mechanism for adaptive routers without using sideband lookahead signals. The bypass datapath applies DoR on packets to exploit the pre-setup intra-dimension crossbar connections. Consequently, bypass paths help escape the long adaptive routing pipeline and effectively reduce packet delay at low loads. By introducing a dedicated VC in the router's micro-architecture, the path delay for bypassing logic implemented in the 45-nm standard cell library was reduced by 50%. 2. We present a three-stage non-speculative high-throughput adaptive router that supports the proposed bypassing mechanism. By employing a tagging mechanism, the proposed router is able to either avoid congested nodes under high traffic conditions or employ the single-stage bypassing technique under low traffic conditions. 3. We extend the performance of three promising communication fabrics for NoCs: low-cost 3D NoCs, mm-wave WiNoCs and surface wave WiNoCs. We replaced the slow 2D routers in inhomogeneous 3D NoCs (or multi-hop wired nodes in WiNoCs) with the proposed router to provide fast transfer between remote nodes and high performance nodes (3D routers or wireless routers). 4. We perform cycle-accurate-based evaluations of the proposed router in high performance communication fabrics for NoCs and compare with emerging 3D NoCs, WiNoCs, as well as conventional low area wireline communication fabric. Even without any additional router port (as in the case of the SmallWorld network) or complex micro-architecture, the proposed router can reduce applications' execution time of existing router architectures by an average of 16.9%.