## 3 Time-Slotted Channel Hopping
### Implementation Details
This is depicted in Figure 3. To compensate for this lack of synchronization, the child node will change the length of its current time slot, so that it ends earlier or later, according to the shift detected. In the second case, a child node transmits a packet to its time source neighbor, and the parent node timestamps the time of arrival of the packet,  
Figure 2: IEEE 802.15.4e time slot template. This defines the sequence of actions that take place in a time slot in both the sender and receiver nodes. detecting its offset with respect to the ideal time _TsTxOffset_. The parent then embeds a synchronization information element (SIE) in the ACK packet, including the time correction to be applied at the child node (see Figure 4). Upon reception of the ACK, the child node applies the time correction by changing the length of the current time slot. A key consideration is to ensure that the TSCH MAC layer minimizes the radio duty cycle and also the overall platform energy consumption. Figure 5a shows the measured energy consumption of a more during an inactive and idle listen slot. In turn, Figure 5b shows the measured energy consumed by a more during a active slot, either transmitting or receiving a packet of 127 bytes in length. In both experiments, the current flow has been obtained by measuring the voltage drop across a 1-\(\Omega\) shunt series resistor with an oscilloscope. It is important to note the importance of using the adequate low-power modes of the radio and microcontroller when there is nothing to be done during the slot or between actions in a slot. Figure 4: Acknowledge (ACK) synchronization diagram. (**a**) ACK synchronization: enlarging the time slot. (**b**) ACK synchronization: shortening the time slot. Figure 3: Packet synchronization diagram: (**a**) Packet synchronization: enlarging the time slot. (**b**) Packet synchronization: shortening the time slot. Key considerations when selecting a microcontroller are its ability to maintain a precise timer running in the lowest energy model that it is able to wake up the microcontroller and a ramp up time under 1 ms of the microcontroller when transitioning from deep sleep mode to normal run mode operation. To avoid timer impreciseness, a stable 32,768 Hz crystal should be used as the time source for the low-power timer peripheral. These considerations are fundamental to be able to implement TSCH MAC layers in off-the-shelf microcontrollers. As can be seen in Figure 5, inactive periods show an energy consumption close to 0 mA, as the radio and microcontroller are in deep sleep mode. When designing a TSCH MAC layer, it is also important to decouple the actions that occur in a slot from the slot frame structure and management of the MAC layer. A higher MAC component is in charge of handling IPHC and higher layer packets and inserting them into a queue. In addition, it manages higher MAC services, such as neighbor discovery, scheduling and network bootstrapping by means of periodically sending EBs. In its turn, the lower MAC executes the activities that conform a slot, the beginning of which determines the type of slot (TX, RX, _etc._) and reads from the queue to determine the action to be taken (e.g., checks if there is something to be transmitted in the case of a TX slot). This decoupling makes the lower MAC layer operate independently of the higher MAC, thus facilitating its implementation.