## 3 Technology Background
### Fun
### Standalone ARTICo3

The ARTICo3 solution space for single-node deployments represents all possible combinations of computing performance, energy consumption, and fault-tolerance level (i.e., hardware redundancy) when changing the number of accelerators and their configuration for a given kernel. However, the results presented in this section are only focused on computing performance and energy consumption. Table 9 shows the obtained results for the single-node scenario, where a single-core software version of the reduction-based FUN algorithm has also been implemented to complement the analysis. As it can be seen, for small hyperspectral images, the software version is equivalent (in terms of computing performance) to the ARTICo3-powered one using a single hardware accelerator. However, energy consumption is almost 50% less for the hardware-accelerated solution. For large hyperspectral images, on the other hand, the ARTICo3-based solution outperforms the software in terms of computing performance (even when having only one accelerator), while maintaining a good energy-efficiency ratio. Although execution time is reduced when increasing the number of hardware accelerators for a fixed input image, it is possible to notice that the scalability factor is not linear. This is due to the combination of kernels changing from computing- to almost memory-bounded behavior (in the solution space), and the memory-management overheads introduced by the ARTICo3 runtime. Nevertheless, energy consumption is also reduced, a fact that would still motivate the use of more hardware accelerators for processing in a real-world scenario. ### Networked ARTICo3

In this second scenario, the small-size high-performance embedded computing cluster has been used. The cluster has eight nodes, each of them able to host one ARTICo3 instance with up to four hardware accelerators. As a result, it is possible to evaluate the two-way scalability of the system (changing the number of nodes, or changing the number of hardware accelerators per node). Figure 4 shows a picture of the Ethernet-based multi-FPGA embedded computing cluster. \begin{table}
\begin{tabular}{c c c} \hline \hline
**Component** & **ARTICo3** & **FUN Kernel** \\ \hline \multirow{2}{*}{**Info**} & \multicolumn{2}{c}{64 KiB memory} \\  & – & 0 registers \\  & & C + HLS \\ \hline
**LUTs** & 4158 & 4502 \\
**FFs** & 2366 & 4207 \\
**DSPs** & – & 18 \\
**BRAMs** & – & 20 \\ \hline \hline \end{tabular}
\end{table} 
Table 8: Resource utilization: ARTICo3 infrastructure overhead versus FUN kernel. \begin{table}
\begin{tabular}{c c c c c c c c c c c} \hline \hline \multirow{2}{*}{
\begin{tabular}{c} **Nz \(\times\) Ny \(\times\) Nx** \\ \end{tabular} } & \multicolumn{4}{c}{**Execution Time (s)**} & \multicolumn{4}{c}{**Energy Consumption (J)**} \\ \cline{2-11}  & **SW** & **1 acc** & **2 accs** & **3 accs** & **4 accs** & **SW** & **1 acc** & **2 accs** & **3 accs** & **4 accs** \\ \hline
256 \(\times\) 128 \(\times\) 128 & 1.05 & 1.05 & 0.75 & 0.66 & 0.58 & 1.44 & 0.98 & 0.79 & 0.76 & 0.75 \\
256 \(\times\) 256 \(\times\) 256 & 4.33 & 4.35 & 3.11 & 2.66 & 2.38 & 5.88 & 3.95 & 3.09 & 2.85 & 2.65 \\
256 \(\times\) 512 \(\times\) 512 & 69.44 & 46.4 & 29.12 & 22.97 & 19.75 & 92.99 & 38.42 & 27.17 & 23.16 & 21.2 \\ \hline \hline \end{tabular}
\end{table} 
Table 9: Execution performance and energy consumption—ARTICo3 (single node @ 166.67 MHz) versus software-based implementation (single-node, 1 ARM core @ 666.67 MHz). The first set of tests performed with the cluster aims to show the aforementioned two-way scalability of the system. Table 10 reports the execution times for different configurations of input image sizes, number of ARTICo3 nodes, and number of hardware accelerators per node. It also reports, for each image size, the overall improvement of each configuration with respect to the solution with one node and one hardware accelerator (1\(\times\)).