## 3 Circuit Design
### Analog Front-End
#### 3.1.1 Noise Analysis and First Stage Sizing  
In order to minimize the amplifier array power consumption while maintaining the input-referred noise specifications, a rigorous noise analysis of the preamplifier and filter has to be carried out following the approach adopted in [10]. The noise performance of the whole LNA depends on the design of the first-stage OTA, whose input noise power density is mainly determined by a compromise between its thermal and flicker noise. To explain this point, let us denote as \(C_{p}\) the input parasitic capacitance to ground of each input terminals of the first-stage OTA [11]. If we neglect the noise contribution due to the two pseudo-resistors (this term will be addressed in a next step), we can write the input-referred noise of the overall amplifier as:  
\[\overline{E^{2}}_{n_{eq}}=\left(\frac{C_{p}+C_{1}+C_{2}}{C_{1}}\right)^{2}\ \overline{E^{2}}_{n_{eq,OTA}}=\left(1+\frac{1}{|G_{1}|}+\frac{C_{p}}{C_{1}} \right)^{2}\ \overline{E^{2}}_{n_{eq,OTA}} \tag{1}\]  
where \(\overline{E^{2}}_{n_{eq,OTA}}\) is the input-referred voltage noise of the first-stage OTA. Equation (1) highlights that \(C_{p}\), which is mainly determined by the input transistor dimensions, cannot be increased too much  
Figure 3: Schematic of the low-noise band-pass neural pre-amplifier. without compromising the overall input-referred noise. On the other hand, it is well known that large-area input transistors are required to minimize the OTA flicker noise. Therefore, to achieve the best overall performance these two contradictory requirements have to be balanced. Furthermore, according to Equation (1), the first stage gain, \(G_{1}\), can be increased maximizing \(C_{1}\). Its value is limited by the electrode impedance, whose capacitive component is in the \(160\)-\(320\) pF range. The choice of \(C_{1}\) = \(10\) pF, \(C_{2}\) = \(150\) fF, thus \(G_{1}\approx-67\), results in an upper limit of \(0.5\) pF for the parasitic capacitance \(C_{p}\). which guarantees sufficient margin to keep under control the \(1/f\) noise at a cost of a marginal \(10\%\) increase in the overall amplifier noise with respect to the ideal OTA [see Equation (1)]. In such a design, \(\overline{E^{2}}_{n_{eq}}\) and \(\overline{E^{2}}_{n_{eq,OTA}}\) are almost the same; therefore, both terms will be denoted with the same symbol, \(\overline{E^{2}}_{n_{eq}}\). To minimize the noise, the first OTA stage has been designed as a simple telescopic cascade amplifier (see Figure 3). This well-known configuration guarantees excellent noise performance thanks to its few transistors, while cascading and proper transistor sizing ensure enough gain. Straightforward analysis relates the input-referred noise power spectral density to the noise sources of the transistors, leading to:  
\[\overline{E^{2}}_{n_{eq}}\cong\frac{8 kT\gamma}{g_{mp}}+\frac{8 kT\gamma g_{mn} }{\left(g_{mp}\right)^{2}}+\frac{2K_{p}^{(1/f)}}{C_{ox}^{\prime}W_{p}L_{p}} \frac{1}{f}+\frac{2K_{n}^{(1/f)}}{C_{ox}^{\prime}W_{n}L_{n}}\left(\frac{g_{mn} }{g_{mp}}\right)^{2}\frac{1}{f} \tag{2}\]  
The result has been derived by taking into account that the transistors \(M_{bias}\) and \(M_{cas}\) do not significantly contribute to the overall noise. To minimize the noise, the condition \(g_{mp}\gg g_{mn}\) must be fulfilled, _i.e._, \((W/L)_{p}\gg(W/L)_{n}\). Under this assumption the total noise power density results:  
\[\overline{E^{2}}_{n_{eq}}=\frac{8 kT\gamma}{g_{mp}}+\frac{2K_{p}^{(1/f)}}{C_{ox }^{\prime}W_{p}L_{p}}\frac{1}{f} \tag{3}\]  
with \(\gamma\) equal to \(2/3\) for transistors working in strong inversion or \(1/(2\kappa)\) in weak-inversion (\(\kappa\approx 0.7\)) [12]. In order to minimize the thermal noise without increasing the current consumption, the \(M_{p}\) transistors have to work in the weak inversion region, where the transconductance is maximum.