# Characterization of Tiled Architecture for C-Band 1-Bit Beam-Steering Transmitarray
## 3 Unit Cell Design and Characterization  
The detailed description of the unit cell design and preliminary results of the measurements inside the rectangular waveguide were reported in [10]. This unit cell structure has been employed in the current study. It is noteworthy that the proposed unit cell structure was conceived as a blank of a reconfigurable pixel of single-panel transmitarrays, using surface-mount solid-state switches to add functionality. However, in the context of the tiled transmitarray, power routing is much more challenging and thus is not addressed in this work. The unit cell design, first reported in [10], was implemented in a stacked 6-layer structure, Figure 1a. The receiving and transmitting antennas were represented by square-ring microstrip elements with electromagnetic (proximity coupled) feeds in the form of open-ended half-wavelength semi-annular (U-shaped) microstrip loops in the layer beneath the square-ring antenna. The proximity coupling allowed a wider bandwidth when the feed loop and ring were properly aligned, [16]. The track widths of the square ring and feed loops were numerically optimized for the maximum return-loss bandwidth and low insertion loss, using CST Microwave Studio simulations with Floquet periodic boundary conditions (FPBCs) and assuming infinite ground plane. The pair of loop resonators were connected to each other by a buried via hole. The receiving and transmitting sides of the tiled unit cell were separated by two ground plane electrodes bonded together using a 0.2 mm layer of Rogers RO4350B and protruded by the buried via. The redundancy of the two ground planes was imposed by the manufacturing process. The metallic patterns of the square-ring radiators and feed loops were formed on and between dielectric layers of 0.51 mm thick Rogers RO4003 material (dielectric constant Dk = 3.5, dissipation factor Df = 0.0018). The layers of 0.1 mm bonding film Rogers RO4003C (Dk = 3.38) were used to stack the RO4003 layers. The lateral size of the unit cell of the single-panel transmitarray was 24 mm \(\times\) 24 mm (\(\sim\)0.46 \(\lambda\) at the design frequency of 5.75 GHz) and its thickness was \(<\)0.045 \(\lambda\). The tiled unit cells were trimmed by 0.5 mm around the edge in order to keep the same array period in both single-panel and tiled transmitarrays. In the proposed unit-cell design, a 180\({}^{\circ}\) phase shift is implemented by switching the feed point of the U-shaped resonator on the receiving side of the transmitarray, Figure 1b,c. The state when the resonators at the receiving and transmitting sides are connected such that the currents flowing in the patches are codirectional is referred to as the phase state I (or 0\({}^{\circ}\) state). In the reciprocal phase state II, the resonators are connected at the opposite ends, so that the currents flow in the opposite directions thus imparting a 180\({}^{\circ}\) phase shift with respect to the phase state I. Two pairs of feed loops are used on each side of the structure, placed orthogonal to each other so that the unit cell can support two orthogonal linear polarizations for each phase state. The transmission and reflection coefficients measured in the waveguide were similar in both phase states and for both polarizations. The 10 dB return-loss bandwidth spanned 160 MHz from 5.67 to 5.83 GHz. The differential phase error did not exceed \(\pm\)6\({}^{\circ}\) across the operating band. The transmitarray design approach adopted in our study is based upon the unit cell characterization in terms of insertion loss and differential phase shift (i.e., the phase shift in one phase state with respect to the other)-numerical with full-wave electromagnetic simulations (CST Microwave Studio), as well as experimental inside a rectangular waveguide. The tiled transmitarray has slotted dielectric substrate and ground plane, as well as additional dielectric frame 3D-printed in ABS (acrylonitrile butadiene styrene, DK = 2.35 as measured), see Figure 1d, necessary to arrange the tiles in desired planar phase pattern.