# A Single-Bit Incremental Second-Order Delta-Sigma Modulator with Coarse-Fine Input Buffer
## 1 Introduction  
Analog-to-digital converters (ADCs) have attracted considerable attention for their potential in applications that require high resolution, such as wearable bio-signal sensors [1] or biosensor arrays [2, 3]. Delta-sigma modulation (DSM) ADCs are often chosen for processing low-frequency signals, which are within a few kilohertz [4]. Many high-precision sensors were reported with high-resolution DSM, such as the Hall sensor [5], electrochemical sensor [6], bridge sensor [7], and so on. Among the various DSM architectures, the incremental DSM [8, 9] is widely used for multiplexing between multichannel inputs [10, 11, 12]. To achieve high resolution, the DSMs with second or higher-order noise shaping have been employed for achieving high-resolution [13, 14]. The delta-sigma input stage is designed for continuous time (CT) or discrete time (DT) [15]. Oversampling and noise shaping are widely used to realize low-noise characteristics, so the input stage of the DSM acts as the high-frequency switching load at the point of the input buffer view. Assuming tens to thousands of oversampling rates (OSRs), the input buffer inside the DSM should operate as fast as the OSR times the output rate of the DSM. Fast operations cause higher power consumption, making the implementation of the buffer design a challenge in high-resolution ADC design. Moreover, when converting an analog input signal, the input signal is often corrupted by kickback noise [16] from the conversion. To prevent signal degradation, an input buffer with precise settling characteristics within the desired sampling period is highly desired. Figure 1 shows the conventional and proposed input buffer schemes. In the conventional input buffer scheme, the input buffer drives the input-switching loads of the DSM input stage. A buffer is required to drive the input stage, and a high slew rate, power, and speed are required to achieve high-resolution performance. High power is required to drive the CT and DT input stages using a single buffer. As shown in Figure 1a, a pre-charge scheme has been reported to relax buffer requirements [17,18]. The internal pre-charge buffer relaxes the external buffer specifications [19,20]. Fast charging has been performed with the assistance of a pre-charge buffer [17, 18, 19, 20]; the external buffer settled only a small voltage to the final desired value. In [21], the low noise fully differential amplifier (THP210, Texas Instruments, Dallas, TX, USA) drives the DSM (ADS127L11, Texas Instruments, Dallas, TX, USA), which includes the pre-charge buffer, and the current consumption of the driving amplifier is 950 uA. In this paper, a single-bit incremental second-order DSM with a coarse-fine input buffer is proposed. The proposed input buffer with a parallel coarse fine buffer scheme is shown in Figure 1b. In existing technologies, DSM performance is limited by the driving ability of the external fine buffer. In the proposed scheme, the coarse-fine input buffer is integrated; thus, no external buffer is required. The coarse-fine input buffer includes two buffers: a pre-charge buffer and a fine settling buffer. Using the coarse-fine input buffer, both the fast settling and low noise characteristics can be achieved. Considering the circuit area and power consumption of the external buffer in the conventional scheme, the area and power consumption penalty of the proposed coarse-fine buffer is negligible. In our proposed DSM ADC, the input buffer and secondary DT DSM are integrated. The operational concept of the coarse-fine buffer-based input buffer circuit is shown in Figure 2. In this paper, the pre-charge and fine paths were placed in parallel; coarse pre-charge was performed by the pre-charge path buffer according to the timing, and then fine settling was performed by the low-noise fine buffer. A fast buffer that drives the coarse path and a low-noise fine path buffer were built in parallel, and the internal voltage was precisely settled with the fine buffer after charging most of the voltage with the coarse buffer.