# A Hybrid-Cryptography Engine for Securing Intra-Vehicle Communications
## 5 Conclusions  
In this paper we proposed a security solution for intra-vehicle networks, the _Crypto-Engine_: it provides hybrid-key encryption and source authentication in point-to-point and cluster-wise communications with low impact on communication latency. The Crypto-Engine is based on the ECTAKS scheme, which uses standard-approved elliptic curve cryptography and a key distribution mechanisms to define a logical topology of nodes and the admissible communication links. The Crypto-Engine has been implemented to be used in an industrial research and innovation project, EMERGE, to secure the communication links related to non-GNSS sensor data sources. The experimental results show that the Crypto-Engine implementation described in this paper can achieve good performance results with ECTAKS encryption and authentication when deployed in general-purpose embedded computational platforms such as the tested Raspberry PI 3B+ and the Intel NUC 11 Pro. The deployment on application-specific platforms is currently in progress, for instance, on the AURIX Tri-core platforms (AURIX Tri-core product page: [[https://www.infineon.com/cms/en/product/microcontroller/32-bit-tricore-microcontroller/](https://www.infineon.com/cms/en/product/microcontroller/32-bit-tricore-microcontroller/)]([https://www.infineon.com/cms/en/product/microcontroller/32-bit-tricore-microcontroller/](https://www.infineon.com/cms/en/product/microcontroller/32-bit-tricore-microcontroller/)) (accessed on 27 November 2023)) and the NXP S23 platforms (NXP S23 automotive platforms: https://www. Figure 9: Crypto-Engine signature generation/verification performance on Intel NUC 11 TNHi3: time (\(y\)-axis, in seconds) versus payload size (\(x\)-axis, in bytes)w.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform:S32 (accessed on 27 November 2023)). Those results demonstrate that the adoption of the Crypto-Engine concept, along with ECTAKS could bring significant advantages in securing intra-vehicle networks thanks to its flexible architecture, the definition and enforcement of an authenticated topology (i.e., the ANT), and the support of state-of-the-art elliptic curve cryptography with a negligible overhead on the latency introduced by encryption and authentication primitives. Moreover, the support for hardware accelerators for cryptographic operations can help to further improve performance and to extend the support to novel solutions in terms of on-chip/off-chip cryptographic acceleration. Despite the results obtained, a pure software implementation is only a starting point. We are currently working on a FPGA-based implementation for the Crypto-Engine. In particular, we aim to integrate an on-going work on a ECC HW accelerator into the Crypto-Engine to provide faster modular arithmetic operations on large numbers, improved and secured ECC point-based operations, random number generation and secure hashing primitives. At the same time, we are considering GPU-based acceleration for a comparative performance analysis between SW, HW, and GPU versions of the Crypto-Engine. For future works, an additional aspect we aim to consider is _energy consumption_. In the experimentation results, it is evident that the NUC platform performs better, mainly because of its better hardware components. On the other hand, the better performance comes with a price in terms of energy consumption: the power required by the NUC can be much higher (e.g., the i3 CPU can consume up to 28 W) than the energy/power required by the RPI that hosts a 7 W System-on-Chip as MCU. The power gap further increases when considering the power required by fully loaded (including peripherals) platforms: the NUC is designed for a maximum of 65 W of power, while the RPI can be fully powered with \(\sim\)15 W. The comparison and trade-offs of performance and energy consumption in this context is a hot topic and requires a more in-depth analysis.