## 3 Circuit Design
### Digital Signal Processing  
The implemented data reduction system takes advantage of the low duty cycle of the neural activity to eliminate transmission of useless signal containing only noise. Spike duration and firing rates are typically lower than \(1\) ms and \(100\) Hz [22], respectively. A finite-state machine (FSM in Figure 6) compares each incoming digital sample with a user-programmable digital threshold, _i.e._, an \(8\) bit word stored in the embedded SRAM. When the threshold is crossed, \(20\) samples of the signal from the same channel are recorded, covering a \(1\) ms time frame (see Figure 7). This strategy was chosen taking into account that a clear identification of APs requires the detection of three features, namely the amplitude of the peak and the trough and the time interval between them [22], which can be extracted with enough resolution by using \(20\) samples, even for the fastest spikes. The threshold can be set by the user before the recording starts, choosing among four predefined digital words: \"\(x1000000\)\", \"\(x0100000\)\", \"\(x0010000\)\" and \"\(x0001000\)\" (corresponding to \(1/2\), \(1/4\), \(1/8\) and \(1/16\) of half the ADC full scale range). Since the spike can have a first peak either positive or negative and the baseline is at the middle of the ADC range, the threshold is either positive and negative for each sample. For example, considering the first threshold,  
Figure 4: Schematic of the two-stage comparator. A preamplifier is followed by a cascaded semi-latch to avoid kickback noise and metastability. Figure 5: Time diagram of conditioning circuit and ADC. the FSM is triggered if the incoming sample is larger than \"\(11000000\)\" or lower than \"\(01000000\)\". If the gain of the amplification chain is set to the maximum value (\(83\) dB \(\cong 14000\)), these four thresholds correspond to an input-referred amplitude of \(\pm\)\(54\)\(\mu\)V, \(\pm\)\(27\)\(\mu\)V, \(\pm\)\(13\)\(\mu\)V and \(\pm\)\(7\)\(\mu\)V.  
The recorded samples are stored in a \(2\) kbit embedded memory (SRAM in Figure 6) together with the channel address and the timing stamp, both with a \(8\) bit resolution. Each spike is then compressed in \(22\) bytes. The SRAM is continuously read at \(1\) Mbit/s rate by the control logic block, which adds service  
Figure 6: Block diagram of Digital Signal Processing. Figure 7: Data compression algorithm: when a spike is detected, \(20\) digital samples are stored in the embedded memory, together with channel address and timing stamp information. bits for synchronization at the receiver and then performs Manchester encoding of the bit stream. The final data rate reaching the transmitter is \(1.25\) Mbit/s. The memory read speed was determined by taking into account two aspects:  
* the lower the read speed, the higher the compression factor is; \(1\) Mbit/s read speed results in a compression factor of \(10\) (from \(10.24\) Mbit/s, corresponding to \(64\) channels sampled at \(20\) kHz per channel and \(8\) bit per sample, to \(1.25\) Mbit/s data rate) and allows saving a considerable amount of power and bandwidth at the transmitter side;
* considering the worst-case scenario of \(64\) channels firing at \(100\) spike/s and \(20\) samples per spike with an \(8\) bit resolution, the average data throughput is about \(1\) Mbit/s. The memory was sized to reduce missed spikes when burst activity is present. Monte-Carlo simulations were performed considering that the neural firing rate follows a Poisson statistics. Figure 8 shows the missing spike percentage as a function of the average firing rate for each of the \(64\) channels and for different memory sizes. Opting for \(1\) Mbit/s read speed and \(2\) kbit RAM size, the missing spike percentage is less than \(0.1\%\) for \(64\) channels firing at \(50\) spikes/s and less than \(10\%\) for all channels firing at \(100\) spikes/s. With these choices, the memory is able to store spikes that occur in the same \(1\) ms frame in \(11\) consecutive channels before missing a spike.