# Requirements and Hardware Limitations of High-Frame-Rate 3-D Ultrasound Imaging Systems
## 1 Introduction  
Ultrasound imaging systems have become fundamental in several medical specialties thanks to their capability of providing, noninvasively and in real-time, tens of frames/s of the human tissues. These systems involve high-speed data transfer between a multi-element probe, a transmission (TX) section, which drives the probe with appropriate signals, and a reception (RX) section, which collects the backscattered echoes [1, 2]. The RX section includes signal conditioning, analog to digital conversion, data storage into memories, and all processing stages needed for the formation of the final image (from dynamic beamforming to filtering) [3, 4, 5, 6]. There are two main approaches to implementing all the above RX functionalities. In \"software-based\" ultrasound scanners, each function is implemented in programmable devices such as the graphic processor units (GPUs) [7, 8, 9]. In the so-called hardware-based scanners, specific devices such as field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and GPUs are used [10, 11, 12]. Both approaches are valuable for standard real-time ultrasound echography. However, recent studies have highlighted the possible advantages derived from the real-time reconstruction of thousands of frames per second (High Frame Rate--HFR--imaging), which is typically based on the transmission of defocused waves, such as plane or diverging waves [6, 13, 14, 15], or multiple simultaneously focused beams [16, 17, 18]. These techniques enable the high temporal resolution useful in echocardiography to capture rapid cardiacevents or in blood flow measurements to identify flow abnormalities in the cardiovascular system [19; 20; 21; 22; 23; 24; 25; 26; 27; 28]. HFR imaging is also mandatory for 3-D imaging with 2-D probes [29; 30; 31; 32], in which the scan of the region of interest, i.e., one volume, heavily increases the number of reconstructed 2-D frames per second. In a 2-D probe, hundreds/thousands of small transducers are included. To electronically scan any volume with adequate flexibility, these transducers should be individually controlled both in TX and RX. Such a task can be optimally performed by powerful hardware-based scanners, possibly containing special (and expensive) application-specific integrated circuits (ASICs) [33; 34; 35; 36; 37] and, typically, a high number of TX/RX channels. The design of a hardware-based scanner with a high-channel count and capable of HFR imaging involves critical aspects, especially in terms of data storage, processing, and transfer. A high number of channels involves memories that should be sufficiently large to store the raw echo data received during multiple cardiac cycles and, at the sampling rates that are typically used (several tens of MHz), they must sustain fast write/read cycles. HFR imaging requires the processing of thousands of lines per second, involving the computation of billions of operations per second, even for the most efficient beamforming algorithm. Therefore, the combination of high-channel count and HFR imaging imposes strict requirements on processing devices and their communication channels. For these reasons, ultrasound data processing and data transfer bandwidths must be accurately designed and balanced to avoid bottlenecks that compromise the overall system performance. In this paper, we first examine the fundamental requirements in receiving sections of hardware-based scanners facing high-frame-rate imaging applications. Examples of 2-D and 3-D imaging requirements are discussed, and the complexity of the problem is highlighted. As a case study, ULA-OP 256 [11], one of the most powerful hardware-based programmable research platforms was analyzed in detail, and the related possible bottlenecks and performance limitations when performing HFR and 3-D imaging are identified.