# Modeling a Dual-Mode Controller Design
## 4 Circuit Simulations and Experimental Verifications  
Computer simulations were applied to validate the controller design criteria and the formula derived from the small-signal analysis model. The actual hardware specifications are presented in Table 1. MATLAB, a simulation tool, was used to obtain the Bode plot of the converter. Moreover, the mathematical equation of the transfer function was as follows: \begin{table}
\begin{tabular}{c c c c} \hline
**Symbol** & **Value** & **Symbol** & **Value** \\ \hline Vin & 127\(\sim\)380 Vdc & Lm & 170 \(\mu H\) \\ Vo & 19V dc & Co & 2000 \(\mu F/63V\) \\ Po(max) & 100 W & Dmax & 0.4 \\ Io(max) & 5.26 A & fsw(min) & 40 kHz \\ \hline \end{tabular}
\end{table} 
Table 1: Converters specifications. The frequency response of the fly-back converter was simulated using the open-loop transfer functions \(G_{v_{1}v_{2}v_{3}}\) and \(G_{v_{4}d}\) at input voltages of \(127V_{dc}\) and \(380V_{dc}\) and at an output voltage of \(19V_{dc}\). For the compensator, a zero- and two-pole compensator (Type II) was used for the QRF converter:  
\[C_{ compensator}(s) = \frac{1}{R_{f4}C_{bl}}.\frac{(s+\omega_{z})}{s\big{(}s+\omega_ {p}\big{)}} \tag{41}\]  
This compensator can ensure closed-loop system stability, such as by increasing the low-frequency gain. For fly-back converter stability, the phase margin should be positive. As in [23], for an unconditionally stable switch mode, power conversion causes a gain margin of 6 dB and a phase margin of \(45^{\circ}\). The design parameters of components were derived, and a real circuit was simulated and verified to determine the performance of a QRF converter when it is operated in the AC small-signal mode. A frequency domain response was obtained by substituting the component design parameters into the voltage open-loop transfer function and the voltage closed -loop transfer function of the fly-back converter. The responses of the voltage open- and closed-loop transfer functions of the fly-back converter are presented in Figures 7 and 8, respectively. As presented in Figure 8, the fly-back converter is stable in voltage closed-loop mode, when the proposed design criterion is used because the phase margin is greater than \(45^{\circ}\). Moreover, the figure can be used to validate the accuracy of the derived voltage closed-loop control, because the frequency response of the simulation is consistent with the principles of Bode plots. The principle of a valley-switching detection technique is examined in this research. The valley-switching detector of the circuit in Figure 6 comprises a switch (\(Q_{2}\)), comparator (\(U_{1}\)), and resistors (\(R_{f8}-R_{f16}\)). First, a voltage level (\(V_{ref1}\)) was applied to the valley voltage of the resonance at a half-resonance period. Then, the comparator captured the auxiliary winding feedback (\(V_{aux}\)) at the inverting input (\(-\)) pin and compared \(V_{aux}\) with the non-inverter input voltages (\(V_{ref1}\)) in the valley-switching detector. Each comparator had a non-inverting input (\(+\)), an inverting input (\(-\)), and an output. During the duration of \(t_{resonant}\) shown in Figures 2a and 6, if \(V_{ref1}\) is higher than \(V_{aux}\), the comparator's output is at a high level, and \(Q_{2}\) is turned on. When the GD's output is at a high level, \(Q_{1}\) is turned on while the ZCD pin voltage of L6561, \(V_{ZCD}\) is lower than the internal voltage of L6561, \(V_{ZCD\_{trigger}}\) (0.7V). Figure 9 shows the valley-switching waveform of the QRF converter at a light load when the input DC voltage is \(380V_{dc}\). However, when the trigger voltage signal (\(V_{g2}\)) is sufficiently  
Figure 7: Frequency domain response of the voltage open-loop transfer function of the fly-back converter. higher than \(V_{th}\) (the gate threshold voltage of the power switch, \(V_{th}\)), \(Q_{2}\) will turn on. Also, the power switch \(Q_{1}\) will be turned on.