## 5 Performance Analysis of MSD Algorithm Based on Hybrid SC
### Power Consumption and Computational Latency Analysis  
In addition to comparing the hardware resource overheads, this paper also compares the power consumption and computational latency under the hybrid SC and the binary computation scheme.  
Table 9 illustrates the power consumption of different computing paradigm. When the sequence length is 500, energy consumption of hybrid SC is lower than that of binary  
\begin{table}
\begin{tabular}{l l l l l l} \hline \hline
**3-Symbol MSD** & \begin{tabular}{l} **Hybrid SC** \\ **(Length = 500)** \\ \end{tabular} & \
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1000)** \\ \end{tabular} &
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1500)** \\ \end{tabular} & **8-Bit Binary** & **9-Bit Binary** \\ \hline LUT & 10,631 (54\%) & 20,614 (105\%) & 30,441 (155\%) & 19,585 (100\%) & 23,582 (120\%) \\ \hline FF & 13,846 (69\%) & 26,860 (134\%) & 40,344 (201\%) & 20,050 (100\%) & 30,315 (151\%) \\ \hline BRAM & 2 (200\%) & 2 (200\%) & 2 (200\%) & 1 (100\%) & 1 (100\%) \\ \hline \hline \end{tabular}
\end{table}
Table 6: Hardware resource overhead of 3-symbol MSD.  
\begin{table}
\begin{tabular}{l l l l l l} \hline \hline
**5-Symbol MSD** & \begin{tabular}{l} **Hybrid SC** \\ **(Length = 500)** \\ \end{tabular} & \
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1000)** \\ \end{tabular} &
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1500)** \\ \end{tabular} & **8-Bit Binary** & **9-Bit Binary** \\ \hline LUT & 50,577 (40\%) & 100,336 (79\%) & 144,929 (114\%) & 127,325 (100\%) & 153,194 (120\%) \\ \hline FF & 58,604 (45\%) & 117,173 (90\%) & 175,140 (135\%) & 129,732 (100\%) & 195,827 (151\%) \\ \hline BRAM & 4 (400\%) & 8 (800\%) & 12 (1200\%) & 1 (100\%) & 1 (100\%) \\ \hline \hline \end{tabular}
\end{table}
Table 7: Hardware resource overhead of 5-symbol MSD.  
\begin{table}
\begin{tabular}{l l l l l l} \hline \hline
**7-Symbol MSD** & \begin{tabular}{l} **Hybrid SC** \\ **(Length = 500)** \\ \end{tabular} & \
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1000)** \\ \end{tabular} &
\begin{tabular}{l} **Hybrid SC** \\ **(Length = 1500)** \\ \end{tabular} & **8-Bit Binary** & **9-Bit Binary** \\ \hline LUT & 249,464 (35\%) & 501,631 (71\%) & 751,951 (107\%) & 703,214 (100\%) & 847,415 (121\%) \\ \hline FF & 257,363 (36\%) & 514,703 (72\%) & 771,395 (108\%) & 714,168 (100\%) & 1,080,104 ( 151\%) \\ \hline BRAM & 20 (1000\%) & 40 (2000\%) & 60 (3000\%) & 2 (100\%) & 2 (100\%) \\ \hline \hline \end{tabular}
\end{table}
Table 8: Hardware resource overhead of 7-symbol MSD.  
computing. However, when the sequence length exceeds 1000, energy consumption of hybrid SC is greater. Compared with its advantages in resource overhead, the energy efficiency of hybrid SC is slightly lower. Nevertheless, when the sequence length is short, it can still reduce energy consumption while reducing resource overhead.  
Table 9 also illustrates the computational latency of different computing paradigm. Compared with binary computation, the computational latency of hybrid SC is significantly increased. As the sequence length increases, the computational latency also increases linearly. But even when the sequence length is 1500, its computational latency is less than 10 microseconds. This latency is of negligible significance in the communication systems.