# Safety-Oriented System Hardware Architecture Exploration in Compliance with ISO 26262
## 4 Safety-Oriented System Hardware Architecture Exploration Framework
### System Hardware Architecture Exploration with Safety and Hardware Overhead Consideration
#### 4.3.2. ASIL-Oriented Hardware Architecture Exploration Algorithm
```
1:\(PT\_d\leftarrow\) set of all hardware elements with safety mechanism deployment in the system hardware architecture derived from the Algorithm 1; \(ite\_d\gets 0\);
2: Rank all the elements in \(PT\_d\) by the hardware overhead in unit from high to low;
3: Calculate \(HO\_Total_{ite\_d}\) for \(PT\_d\);
4:\(p_{down}\gets 1\); \(p_{up}\gets no\_d\); SM\(HO(HO\_Total_{ite\_d}\), down)//Select the first hardware element in \(PT\_d\) as the target to adjust
5:Function SM\(HO(HO\_Total_{ite\_d}\), strategy)
6:while\((p_{up}\geq p_{down})\)//check if \(p_{up}<p_{down}\)then stop the search; it means that the design space has been comprehensively explored and no solution can be found when \(p_{up}<p_{down}\) occurs.//
7:{if (strategy = down)and (downgrade the \(SM_{PT\_d(p_{down})}\) is allowable)then
8: downgrade \(SM_{PT\_d(p_{down})}\) to reduce \(HC\big{(}SM_{xyz}(PT\_d(p_{down})))\);
9:elseif (strategy = up)and (upgrade the \(SM_{PT\_d(p_{up})}\) is feasible)then
10: upgrade \(SM_{PT\_d(p_{up})}\) to improve \(DC_{RF_{PT\_d(p_{up})}}\) or \(DC_{DPF\_{LPT\_d(p_{up})}}\) or both;
11:else//both SM downgrade and upgrade are not allowable. In this case, the other candidate will be selected. 12:{if (strategy = down)then\(p_{down}\gets p_{down}+1\); SM\(HO(HO\_Total_{ite\_d}\), down); //Try next element
13:else\(p_{up}\gets p_{up}-1\); SM\(\_HO(HO\_Total_{ite\_d}\), up)//Try previous one element.} 14:\(ite\_d\leftarrowite\_d+1\); update \(HO\_Total_{ite\_d}\) and ASIL metrics;
15:if\((HO\_Total_{ite\_d}\leq HO\_Max_{sys})\)and (Target ASIL has been achieved)then
```

**Algorithm 2** HO-oriented system hardware architecture exploration In the following, we will illustrate how to perform Algorithm 2 with the example presented earlier. Before performing Algorithm 2, the hardware overhead of existing safety mechanisms for each hardware element are provided by the system engineers as shown in the Table 9. Here, the hardware overhead constraint \(HO\_Max_{sys}\) is set up for 15%. According to Tables 9 and 10, the overall hardware overhead can be computed as follows:

\[HO\_Total_{it\_d}(\%)=\frac{\sum_{e=1}^{4}HC\big{(}SM_{xyz}(PT\_d(e))\big{)}}{ \sum_{i=1}^{5}HC(i)}=\frac{1.2+0.32+1.44+2}{6+4+8+10+3}=\frac{4.96}{31}=16.0\%\] \begin{table}
\begin{tabular}{c c c c c} \hline \hline \multirow{2}{*}{\(PT\_d\)} & \multirow{2}{*}{**HC(\(i\))**} & \multirow{2}{*}{**HO(\(SM_{xyz}(PT\_d(e))\)) (\%)**} & \multirow{2}{*}{\(HC\big{(}SM_{xyz}(PT\_d(e))\big{)}\)} \\ \hline \(\{C(1)\),\(SM_{C(1)}\}\) & 6 & \(HO(SM_{MMM}(C(1)))=20\%\) & 1.2 \\ \(\{C(2)\),\(SM_{C(2)}\}\) & 4 & \(HO(SM_{LL}(C(2)))=8\%\) & 0.32 \\ \(\{C(3)\),\(SM_{C(3)}\}\) & 8 & \(HO(SM_{MMM}(C(3)))=18\%\) & 1.44 \\ \(\{C(4)\),\(SM_{C(4)}\}\) & 10 & \(HO(SM_{HHH}(C(4)))=20\%\) & 2.0 \\ \hline \hline \end{tabular}
\end{table} 
Table 10: List of \(PT\_d(e)\) and their \(HC\big{(}SM_{xyz}(PT\_d(e))\big{)}\). \begin{table}
\begin{tabular}{c c c c c} \hline \hline \multirow{2}{*}{\(PT\_d\)} & \multirow{2}{*}{**HC(\(i\))**} & \multirow{2}{*}{**HO(\(SM_{xyz}(PT\_d(e))\)) (\%)**} & \multirow{2}{*}{\(HC\big{(}SM_{xyz}(PT\_d(e))\big{)}\)} \\ \hline \(\{C(1)\),\(SM_{C(1)}\}\) & 6 & \(HO(SM_{MMM}(C(1)))=20\%\) & 1.2 \\ \(\{C(2)\),\(SM_{C(2)}\}\) & 4 & \(HO(SM_{LL}(C(2)))=8\%\) & 0.32 \\ \(\{C(3)\),\(SM_{C(3)}\}\) & 8 & \(HO(SM_{MMM}(C(3)))=18\%\) & 1.44 \\ \(\{C(4)\),\(SM_{C(4)}\}\) & 10 & \(HO(SM_{HHH}(C(4)))=20\%\) & 2.0 \\ \hline \hline \end{tabular}
\end{table} 
Table 10: List of \(PT\_d(e)\) and their \(HC\big{(}SM_{xyz}(PT\_d(e))\big{)}\).