# Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET
## 4 Experimental Verification
Thus, one of the comparators detects the drain current rising moment \(t_{1}\) which corresponds to \(V_{\rm{GG}}\) depletion from 30 to 15 V. The role of the second comparator is to sense when \(i_{\rm D}\) starts to fall, which is caused by the overshoot of current \(i_{\rm D}\) at \(t_{2}\) and it is responsible for the \(V_{\rm{GG}}\) increase from 15 to 30 V. Since voltage \(V_{\rm{Ls}}\) represents the dynamics of the drain current \(V_{\rm{ref1}}\) and \(V_{\rm{ref2}}\) can be set to persistent values, the comparator answering to sense the \(t_{2}\) role is not to define the exact value of \(V_{\rm{Ls}}\), but rather to sense the moment when \(di_{\rm D}/dt\) begins to reach a negative value (see Figure 2). Subsequently, the signal is provided to the logical gate circuit and then connected to an X4340 high-speed driver. The logical subcircuit is based on high-speed logical gates, which are responsible for detecting the rising edge of the comparators' outputs and for protecting the \(V_{\rm{GG}}\) switching sequence. The purpose of that is so that \(V_{\rm{GG}}\) would not set inappropriate values at unsuitable moments of the turn-on cycle. It is shown as a block to make the diagram more simplified and clearer. X4340 handles switching the voltage from 15 to 30 V dependently on the logical signal on its input with a low propagation delay. Voltage levels 15/ \(-\)5 V are supplied by isolated DC/DC converters, MGJD241505. The supply voltage of 30 V is provided from the boost DC/DC converter TP61175. The last part of the circuit is the IXDN630 current amplifier whose role is to turn on or turn off the device according to the value of the \(DS\) signal. The gate resistance \(R_{\rm{G}}\) of the AGD was constant and equal to 20 \(\Omega\). Summary propagation delays of the used components were calculated from the data provided from the manufacturers. The response times of the AGD were under consideration during the design stage of the research, in correspondence with the turn-on time of the studied SiC MOSFET. Even with the low switching period of the chosen device components, the AGD operated properly. Figure 6: Simplified diagram of the AGD. A photo of the designed AGD with the detailed marks of its visible components is shown in Figure 7. The AGD was optically isolated from the logical signal \(DS\) using HFBR-2531 optical receivers. As it can be noticed, the AGD consists of two connected PCBs (Printed Circuit Boards). The role of the first two-layer PCB (blue) is to provide a power supply to all integrated circuits of the device, switch the voltage from 15 to 30 V and amplify the logical signal \(DS\). The second subcircuit of the AGD is a four-layer PCB (black), and it is directly connected to the power source of the \(T_{2}\) MOSFET. Filtering, conditioning and logical circuits were placed onto this board of the AGD. The main purpose of that was to suppress any disturbances in the \(V_{\text{Ls}}\) measurements. The experimental setup with a half-bridge module (CAS300M17 BM2) and a suitable inductor (\(L\) = 110 \(\mu\)H) connected in the DPT circuit is presented in Figure 8. Both the CGD and AGD were controlled by a microcontroller (uC) unit. Measurements were made using a Tektronix MSO56 scope with differential medium-voltage probes (P5205A) with a measurement tolerance of \(\pm 2\%\) and a Rogowski coil (CWTMini HF3B) with a tolerance of \(\pm 2\%\). Delay times of the probes were calculated from the datasheets and were further included in the measurements to provide correct results. The AGD and CGD were compared in the same experimental conditions. Thus, the tolerances of the used probes can be omitted when both devices are compared. The drain current \(i_{\text{D}}\), drain-source voltage \(v_{\text{DS}}\) and positive bus of the \(V_{\text{GG}}\) voltage were measured. A 2 kV DC power supply was provided by a Magna Power TSD 2000-22.5/380 with the output connected in parallel to the energy storage (\(C\) = 150 \(\mu\)F).