# Radiation Hardened Read-Stability and Speed Enhanced SRAM for Space Applications
## 2 Proposed RHRSE-20T SRAM
### Double Node Upset Recovery Analysis
#### 2.6.2 Single Event Transient Occurs Simultaneously at Nodes Q and S0  
Q changes from '1' to '0', and S0 changes from '0' to '1'. This activates transistor P3, N5 and deactivates P6. However, since N4 is configured with a wider channel width than P3, node QB maintains its '0' state. Except for nodes Q and S0, all other nodes retain their originally stored values. Therefore, S3 retains the value of '1', which deactivates transistor P1, and S1 retains the value of '1', which activates transistor N1. As a result, S0 is restored to '0', deactivating transistor N5, and ultimately, Q is restored to '1'via P4. Through this process, all nodes are restored to their original states. Figure 5: Double node upset recovery when SET occurs at nodes (**a**) Q and QB (**b**) Q and S0 (**c**) Q and S1 (**d**) Q and S3 (**e**) S0 and QB (**f**) S0 and S3 (**g**) S1 and QB, and (**h**) S3 and QB. 2.6.3. Single Event Transient Occurs Simultaneously at Nodes Q and S1  
Q changes from '1' to '0', and S1 changes from '1' to '0'. This activates transistors P3 and P5. However, these changes do not affect the other nodes, so the stored values in nodes other than Q and S1 remain unchanged. Consequently, node S2 activates transistor P2, leading to the recovery of S1 to '1'. Additionally, QB maintains its '0' state, activating transistor P4 and allowing Q to recover to '1'. 2.6.4. Single Event Transient Occurs Simultaneously at Nodes Q and S3  
Q changes from '1' to '0', and S3 changes from '1' to '0'. This activates transistors P1 and P3. Since transistor N4 is deactivated in this scenario, QB changes to '1'. However, nodes S1 and S2 remain unchanged, preserving their original values. As a result, transistor N1 remains firmly activated, keeping S0 at '0'. Consequently, transistor P6 is activated, allowing S3 to recover to '1'. The recovered S3 then activates transistor N4, leading to the recovery of QB to '0', and ultimately, Q also recovers to '1'. Through this process, all nodes are restored to their original states. 2.6.5. Single Event Transient Occurs Simultaneously at Nodes QB and S0  
QB changes from '0' to '1', and S0 changes from '0' to '1'. However, these changes do not affect the values stored in the other nodes. As a result, node S3 maintains its '1' state, activating transistor N4, which in turn restores QB to '0'. Additionally, node S1 retains its '1' state, activating transistor N1 and restoring S0 to '0'. Through this process, all nodes are restored to their original states. 2.6.6. Single Event Transient Occurs Simultaneously at Nodes QB and S1  
QB changes from '0' to '1', and S1 changes from '1' to '0'. This activates transistor P5 but does not affect the values stored in the other nodes. Since node S2 maintains its '0' state, transistor P2 is activated, and S3 also activates N2. Consequently, S1 is restored to '1'. Simultaneously, S3 activates N4, which restores QB to '0'. Through this process, all nodes are restored to their original states. 2.6.7. Single Event Transient Occurs Simultaneously at Nodes QB and S3  
QB changes from '0' to '1', and S3 changes from '1' to '0'. This activates transistor P1. However, the stored values in the other nodes remain unchanged. Node S1 maintains its '1' state, ensuring the strong activation of transistor N1, which keeps S0 at '0'. Node S0 then activates transistor P6, leading to the recovery of S3 to '1'. The recovered S3 activates transistor N4, which restores QB to '0'. Through this process, all nodes are restored to their original states. 2.6.8. Single Event Transient Occurs Simultaneously at Nodes S0 and S3  
S0 changes from '0' to '1', and S3 changes from '1' to '0'. This activates transistor P1 and deactivates P6. These changes in node values do not affect the values stored in the other nodes, even though transistor P1 is temporarily activated. However, since S1 remains unchanged and continues to hold a '1', transistor N1 remains continuously activated as well. This leads to the recovery of S0 to '0'. This activation also triggers transistor P6, ultimately restoring S3 to '1'.