## 3 Methodology
### R&D Process of VPC  
IC chip testing requires accuracy, rapidity, and cost reduction. Therefore, the case company designs the wafer probe cards in such a way that it can test multiple IC chips at the same time if the test platform structure allows. The key part in a wafer probe card determining the number of IC chips able to be tested simultaneously is the PCB. New IC chip quality tests are needed after the R&D for a new IC chip. To ensure IC chip qualities, customers will provide circuit diagrams of IC chip relevant substrates and IC chip relevant tables (e.g., IC pin XY coordinate tables and solder ball array tables) of the case company to this research for PCB design and manufacturing. In the initial state of the project (see Part 1), the salesmen turn in the IC information provided by customers to the VPC R&D department. Then, the VPC R&D department transforms the information from the customer into the forms written in the internal common language and tables of the case company; it also evaluates if the probe fabrication capability of the case company satisfies the IC product testing needs of the customer. If the answer is yes, the VPC R&D department will send the information to the VPC mechanical engineering sector to evaluate and design stiffeners and the part keep-out area. After the mechanical engineering sector finishes the relevant mechanical design diagrams and tables (including stiffeners, stiffener mounting holes, part keep-out area, height limits, and other relevant design requirements), they are sent to the PCB R&D team for evaluation. This evaluation integrated the works by the VPC R&D department and the mechanical engineering sector, including the information of pricing, layer numbers, specifications, and time needed for design and manufacturing of the PCB. This information will be sent to the sales department and the customer for their consideration. When customers place orders, they provide complete design information, such as the arrangement coordinates on the wafer, testing speeds and frequencies, and other special requests. The VPC R&D department then sends the design information integrated from the customer's information to the mechanical engineering sector and PCB R&D department (the major department managing the whole PCB R&D project). The mechanical engineering sector needs to complete the relevant mechanical design of PCB testing by estimating the machine depth, mechanical parts, and corresponding stresses. The three departments examine the diagrams, confirm the design completeness, and send the design to the customer for the final evaluation. Once the customer agrees, the company starts manufacturing the PCBs, assembling the parts, inspecting and checking them, and delivering the finished PCBs to the customer. The case company also keeps tracking the customer's usage experiences. The PCB R&D department usually communicates and discusses with the PCB design house the relevant engineering problems of PCB design, such as PCB fabrication limits, special needs during PCB testing, and the materials required for the PCB. The time needed for the case company to communicate and clarify the relative engineering problems with the PCB design companies is two to three days. The design company starts the work after explicating the details of PCB design and manufacturing. Usually, the three major parts of PCB design are circuit schematic, part placement, and PCB layout. (1) Circuit Schematic  
It takes three days for the outsourcing PCB manufacturing to finish sketching a wafer circuit schematic, which is then verified by both the PCB R&D department and the design department of the case company. The PCB R&D department provides feedback (i.e., go or no-go) to the outsourcing company. If it is a go, the outsourcing company expands the sketch to multiple wafer testing circuit schematics, which are again sent to the PCB R&D department. The circuit schematics are then verified by the customer. After the customer's approval, the outsourcing company is allowed to continue the PCB design.