# Elliptic-Curve Crypto Processor for RFID Applications
###### Abstract  
This work presents an Elliptic-curve Point Multiplication (ECP) architecture with a focus on low latency and low area for radio-frequency-identification (RFID) applications over \(GF(2^{163})\). To achieve low latency, we have reduced the clock cycles by using: (i) three-shift buffers in the datapath to load Elliptic-curve parameters as well as an initial point, (ii) the identical size of input/output interfaces in all building blocks of the architecture. The low area is preserved by using the same hardware resources of squaring and multiplication for inversion computation. Finally, an efficient controller is used to control the inferred logic. The proposed ECP architecture is modeled in Verilog and the synthesis results are given on three different 7-series FPGA (Field Programmable Gate Array) devices, i.e., Kintex-7, Artix-7, and Virtex-7. The performance of the architecture is provided with the integration of a schoolbook multiplier (implemented with two different logic styles, i.e., combinational and sequential). On Kintex-7, the combinational implementation style of a schoolbook multiplier results in power-optimized, i.e., 161 uW, values with an expense of (i) hardware resources, i.e., 3561 look-up-tables and 1527 flip-flops, (ii) clock frequency, i.e., 227 MHz, and (iii) latency, i.e., 11.57 us. On the same Kintex-7 device, the sequential implementation style of a schoolbook multiplier provides, (i) 2.88 us latency, (ii) 1786 look-up-tables and 1855 flip-flops, (iii) 647 uW power, and (iv) 909 MHz clock frequency. Therefore, the reported area, latency and power results make the proposed ECP architecture well-suited for RFID applications. elliptic-curve cryptography; crypto processor; RFID; hardware accelerator; FPGA +
Footnote †: journal: Applied Sciences  
From the security perspective, there exist several protocols/algorithms. However, two types of security algorithms are commonly involved and these include symmetric and asymmetric algorithms [13]. The symmetric algorithm contains a single key to perform encryption/decryption while the asymmetric algorithm requires a different pair of keys (public and private) for the said purpose. However, as the number of RFID tags increases, the potential risk in storing several symmetric keys also increases. Furthermore, it also adds up to the hardware cost and power consumption [11] of the system. Therefore, symmetric algorithms such as the Advanced Encryption Standard (AES) are not useful for RFID-related applications. In other words, asymmetric algorithms are more beneficial to achieve security and system requirements [14]. While the asymmetric algorithms provide better security for RFID applications, they infer higher computational overhead [11]. For example, the passive RFID tags take the energy they require from the radio signals where the power supply is limited [2]. Subsequently, these tags cannot utilize the energy-demanding asymmetric algorithms such as the Rivest-Shamir-Adleman (RSA) algorithm. Consequently, the Elliptic-curve Cryptography (ECC) algorithms are employed in many RFID applications due to their advantages over the traditional asymmetric algorithms [15; 16]. For example, ECC offers smaller key sizes as compared to the RSA for the same security, i.e., the security of 163-bit ECC is considered equivalent to 1024-bits RSA [11]. That is why ECC is a considered a better choice for implementation of RFID tag chips. Elliptic-curve cryptography involves four layers of operation [17]. The fourth layer is responsible to perform encryption and decryption. The most crucial operation is point multiplication (PM) which is computed in layer three. The point addition (PA) and point doubling (PD) as required for PM computation are performed in layer two. Layer one contains finite-filed (FF) arithmetic operators (i.e., addition, multiplication, square and inversion). In addition, two types of coordinate systems, i.e., affine and projective, are involved.