# FPGA-Based Pulse Compressor for Ultra Low Latency Visible Light Communications
## 1 Introduction  
Visible Light Communications (VLC) represents a novel technology [1, 2] where a data channel is established by means of visible light. The information is modulated over the light by quick radiation modulations that do affect the mean intensity and are undetectable by the human eye. The recent ubiquitous substitution of incandescent and fluorescent lamps with the more efficient Light Emitting Diodes (LED) lamps, which are inherently compatible with VLC [3], represents another push in the direction of the adoption of this new technology. The fields of use and the new possibilities that this technology opens are very wide. For example, VLC can sustain or substitute the Wi-Fi or Bluetooth standards in homes and offices by exploiting the same lamps that are used for the ambient lighting. This approach not only implements more efficient energy consumption (the same energy source is exploited for both lighting and communication) but also frees frequencies from the overcrowded electromagnetic spectrum and helps to relax the frequency congestion [4]. The applications that can benefit the several advantages of the VLC technology are numerous and typically divided into indoor [5] and outdoor [6]. They include, for example, biomedical data communication in air [7] or even through the skin [8], objects and people localization [9], mussel [10], data networks in harsh environments [11], vehicular communications [12], and many others. Most of the applications presented in recent literature employ the On-Off Keying (OOK) modulation [13] for coding the informative bits in the light. This is a simpleapproach where the light is rapidly switched on/off, and it is implemented with basic electronics. In spite of its simplicity, this approach has been shown to be capable of supporting a bandwidth of hundreds of Mb/s over a short distance [14]. However, higher rates can be attained only through more complex modulation schemes. For example, Orthogonal Frequency Division Multiplexing (OFDM) modulation, or wavelength division multiplexing (WDM), applied to a RGB LED allowed bandwidth well beyond the Gb/s [15; 16]. Other experiments focus on achieving high communication distance, though with lower bandwidth: for example, a 50 m link is reported in [17] at 19.2 kb/s rate. In general, bandwidth performance is limited by the Signal-to-Noise Ratio (SNR), which, in turn, depends on distance. An improvement on SNR can be capitalized for a higher bandwidth, a longer distance, or a better trade-off between the two of them. Chirp coding and pulse compression represents a well-known technique for transmitting and recovering the data from noisy signals. Chirp coding has been developed especially in radar and applied for improving its penetration [18], but it is now exploited in many other fields like, for example, biomedical investigations [19] or sonar [20]. At the best of our knowledge, the advantages that this method can provide to VLC applications are still to be investigated. A possible reason can be that real-time chirp coding and pulse compression is quite demanding for the calculation effort it requires. For example, a 10 \(\upmu\)s chirp sampled at 10 Msps is compressed through a 100-tap correlator that needs 1000 M of operation per s (MOPs). Fortunately, Field Programmable Gate Arrays (FPGAs), thanks to the hundreds of Digital Signal Processors (DSPs) they are equipped with, support easily such a heavy calculation load [21]. Thus, they represent a likely choice for the implementation of real-time chirp-modulated VLC applications. In this paper we present an ultra-low latency VLC link realized in real-time in FPGA through chirp coding in transmission (TX) and pulse compression in reception (RX). The data were subdivided in 24-bit packets, chirp-modulated in the FPGA, analog-converted, and transmitted through a phosphorous white LED (5000 K) [3] powered with 1 A mean current. In reception, the signal received from a photodetector was amplified, digital-converted, and, in the FPGA, compressed and reconverted in packets of bits.