# Edge Computing: A Survey On the Hardware Requirements in the Internet of Things World
## 3 Ultra-Low Power MCU Architectures
### Power Management  
Power management is a feature of many CPUs and it consists of turning off or switching to a low energy regime parts of the core, peripherals or even sections of the memory hierarchy.  
There are many reasons to perform such optimization:  
* to reduce the power consumption by excluding elements that are not involved in the current task;
* to enhance the lifetime of the battery and consequently of the embedded system;
* to tone down the noise produced by all the components forming the system;
* to reduce the effort and requirements of the cooling apparatus.  
Since usually IoT nodes are represented by mobile, wearable battery-based devices, having an onboard unit able to dynamically control the energy consumption is extremely precious. Furthermore, since algorithms and tasks are performed in a sequential fashion, not all the units will be used at the same time. As a consequence, switching off these parts becomes essential for the above-listed reasons. MCUs are already equipped with some low power modes that consist of turning the entire system in a suspended state, in which peripherals can work independently, while no operation is performed by the core. This situation is usually referred to as deep-sleep status. MCUs can enter this state when no task has to be performed, and, typically, the wake-up signal is produced by an internal timer (deep-sleep for a known period) or by an external interrupt (event wake up).  
The aforementioned mode has become very popular in the embedded systems community, despite the fact that it is not always effective with some of current benchmarks. Indeed, entering and exiting the deep-sleep mode comes at a certain power cost, so, depending on the application, it is not always advantageous.  
Many other low power techniques exist, such as clock gating Figure 5, which consists of stopping the clock from the part of the circuit that is not necessary to the current task. Since the dynamic power is related to the internal activity of combinational circuitry, no transition occurs by disabling the clock. However, leakage current still persists, but, since, in general, the dynamic power is greater than the static one, the energy saving will be consistent. Furthermore, clock gating intrinsically retains the state of the circuit, allowing for restoring normal operation by just reasserting the clock. The hardware overhead needed to control the clock signal is negligible, and, thanks to its fine granularity, this solution turns out to be very effective. In addition, leakage power can be reduced by combining clock gating and dynamic voltage scaling, as explained in Section 3.5. However, despite a small overhead is required in the power supply management unit, the time needed to restore the normal state of the circuit is greater as a stable supply voltage is required to have the circuit behaving correctly.  
Figure 4: Non-volatile Flip-Flop with shadow latch.  
The best approach to reduce power consumption is power gating, in which the supply voltage is disconnected from the circuit. In this case, there is no dynamic power consumption and only a small leakage power is present in current CMOS technology. While the hardware overhead is negligible, as in clock gating, the time to restore the previous status of the circuit could be significant. This aspect must be kept into account since it may affect system performance. In particular, the power gating mode must be entered and exited in a safe way, in order to avoid damaging the circuit and to ensure a correct behavior.  
As depicted in Figure 6, the hardware overhead of power gating consists of an MOS transistor to be applied between the logic circuit and the supply line. Generally, a header and a footer are applied in order to completely insulate the circuit. MOS transistors behave like switches, namely, when the MOS transistor is open, the voltage is no longer applied to the circuit. As a consequence, the circuit is in a frozen state and no power dissipation occurs.