# Lightweight Conversion from Arithmetic to Boolean Masking for Embedded IoT Processor
## 2 Background
### The A2B Algorithm Based on the Ripple-Carry Adder
#### 2.3.2 [PERSON]'s A2B Algorithm
\begin{table}
\begin{tabular}{c c c c} \hline \hline  & [17] & [22] & **Proposal** \\ \hline Table size(RAM) & \((2^{k})\)\(k\)-bit & \((2^{(k+1)})\)\(k\)-bit & \((2^{k})\)\(k\)-bit \\ \hline \multicolumn{4}{l}{[Pre-computation Phase]} \\ ADD & \(2^{k}\) & \(3\cdot 2^{k}\) & \(2^{k}+n\) \\ XOR & \(2^{k}+1\) & \(5\cdot 2^{k}+1\) & \(2^{k}+2\) \\ SHIFT & \(2^{k}\) & \(4\cdot 2^{k}+1\) & \(2^{k}+n+2\) \\ \hline \multicolumn{4}{l}{[Conversion Phase]} \\ ADD/SUB & \(3\cdot n+2\) & \(n+1\) & \(2\cdot n+2\) \\ XOR/AND & \(8\cdot n+6\) & \(12\cdot n+2\) & \(6\cdot n+1\) \\ SHIFT & \(3\cdot n\) & \(5\cdot n\) & \(4\cdot n\) \\ Look-up Table & \(n+2\) & \(n\) & \(2\cdot n\) \\ \hline \multicolumn{4}{l}{[ATMega Simulator]} \\ Pre-computation Phase & 26,502 & 56,177 & 30,113 \\ Conversion Phase & 1508 & 1466 & 1335 \\ \hline \multicolumn{4}{l}{[MSP430 Simulator]} \\ Pre-computation Phase & 11,349 & 26,681 & 13,736 \\ Conversion Phase & 704 & 735 & 557 \\ \hline \multicolumn{4}{l}{[ARM Simulator]} \\ Pre-computation Phase & 5147 & 10,259 & 5670 \\ Conversion Phase & 228 & 251 & 197 \\ \hline \end{tabular}
\end{table} 
Table 6: Comparison of the total number of operations and table sizes. ## 6 Conclusions and Future Work

In this paper, we proposed an A2B algorithm using a pre-computation table with low memory usage. This algorithm has a comparable overhead in terms of execution time in various environments, and it compactly optimizes the memory in a real environment. Given that the threat of side-channel attacks is increasing, masking techniques are also advancing. However, the high-order masking methods used by conversion algorithms to convert between arithmetic and Boolean masking using pre-computation tables are still being challenged. Therefore, optimization studies for the high-order masking of conversion algorithms should continue. Conceptualization, H.K. ([PERSON]); methodology, H.K. ([PERSON]) and H.K. ([PERSON]); software, H.K. ([PERSON]); validation, H.K. ([PERSON]) and S.H. ; investigation, H.K. ([PERSON]); writing--original draft preparation, H.K. ([PERSON]); writing--review and editing, H.K. ([PERSON]), H.K. ([PERSON]) and S.H. ; supervision, H.K. ([PERSON]) and S.H. This research received no external funding. This work was supported by Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government (MSIT) (No. 2017-0-00520, Development of SCR-Friendly Symmetric Key Cryptosystem and Its Application Modes). The authors declare no conflict of interest. ## References

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