# Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection
## 2 Silicon Photonics for High-Speed Data Communications
### Silicon Photonics
In 2015, a more sophisticated work was performed by collaboration among several research groups in academia and industry [48]. They demonstrate good feasibility of future processor-memory links by implementing a processor, a memory, interface circuits, and photonic devices altogether onto a'single microchip in a commercial 45-nm CMOS SOI process without any changes to the foundry process as shown in Figure 8. The implemented chip reliably integrates 70 million transistors and 850 photonic components. The functionality of the processor-memory link is also verified by demonstrating actual read and write operations between the processor and the memory at 2.5 Gb/s. Although only a single-wavelength operation is demonstrated, the total aggregate bandwidth can be increased by more than 10 times without using additional fibers. A single external laser source is employed to supply 1180-nm continuous wave for both processor and memory sides using the 50/50 power splitter. The receiver incorporating a SiGe PD exhibits a sensitivity of \(-5\) dBm for the bit-error rate (BER) of \(10^{-12}\). At the transmitter, a micro-ring resonator with reverse bias is employed and showed an ER of 6 dB. Since the resonant wavelength of the ring structure is sensitive to not only physical dimension but also temperature, a continuous stabilization of the wavelength is essential. In this work, a small part of the modulator output power is monitored and the resonant wavelength is tuned in a way that maximizes the output power by digitally controlling an embedded resistive heater inside the ring. Despite several limitations, the contribution of this work is evident and further development is expected to realize more practical silicon photonic systems in the near future. On the other hand, the bulk CMOS platform has been relatively less popular than the SOI counterpart primarily due to the difficulty of implementing low-loss silicon waveguides. However, the realization of silicon photonics in bulk CMOS would be preferred because the bulk CMOS technology has been the mainstream so that most electronic parts are optimized in bulk CMOS processes with the lowest cost. On the other hand, the floating-body effect of SOI CMOS may lead to non-linear  
Figure 7: Monolithic receiver with PD splitting [46]. characteristics of the active transistors and heat dissipation can be problematic, thus rendering the SOI platform inadequate for the extremely high level of integration. Therefore, photonic systems on the bulk CMOS platform have also gathered significant attention. In 2014, the first monolithic integration of photonic and electronic devices on the bulk CMOS was reported [49]. The most challenging part is the waveguide integration with a low propagation loss. Figure 9 shows the cross-section of the implemented silicon photonic devices. For the formation of a polysilicon-based waveguide, a lower cladding and an upper cladding are implemented using deep trench isolation (DTI) and silicon nitride barrier films between the inter-level dielectric (ILD) layers, respectively. Several optimization processes such as the crystallization of amorphous polysilicon and low-pressure chemical vapor deposition (LPCVD) of silicon nitride are also performed to further reduce the loss of the waveguide. The resulting waveguide achieves a record attenuation of 10.5 dB/cm which is sufficiently low to support resonant ring modulators. A polysilicon resonant detector and a SiGe p-i-n detector are both implemented. The fully functional optical transceiver operates at 5 Gb/s exhibiting an energy efficiency of 2.8 pJ/b. Subsequently, a more advanced work was demonstrated by incorporating a DWDM system into the bulk CMOS platform [50]. A DWDM optical transceiver is monolithically integrated on a 0.18-\(\upmu\)m bulk CMOS process with all the optical devices implemented using polysilicon without relying on the epitaxial crystallization of silicon or the introduction of Ge.