# Low-Cost Underwater Communication System: A Pilot Study
## 2 System Design
### Quadrature Phase Shift Keying (De)Modulator  
Due to the need to increase the bandwidth efficiency, this paper touches the implementation of the QPSK communication system on the Cortex M4 microcontroller. The bandwidth efficiency of \(M\)-state PSK signals can be calculated according to the formula  
\[\rho=\frac{\log_{2}M}{2}, \tag{5}\]  
where \(M=2\) for the BPSK signal and \(M=4\) in the case of the QPSK signal. The bandwidth efficiency is defined as the ratio between the transmission bit rate and frequency bandwidth of an MPSK signal. Therefore, the higher \(M\) value is taken, the higher bandwidth efficiency is reached, but at the cost of higher complication of the decision block. Therefore, the choice of QPSK modulation is a kind of trade-off between the bandwidth efficiency of a transmitted signal and complications in the software, which implements modulation and demodulation, using the limited resources of the microcontroller. In theory, the QPSK modulation signal is defined according to (1) with four possible phase values \(\phi(s)=\{0,\pi/2,\pi,3\pi/2\}\). The block diagram of the modulation procedure is shown in Figure 1. The information intended for transmission is converted into a bit stream, which is then divided into two streams, namely, odd and even bits. Next, these bits are used to control the hardware timer of the Cortex M4 processor. Similar to the BPSK modulation process, the hardware timer runs at the carrier frequency \(f_{c}\), which is also the resonant frequency of the ultrasound transducer used for transmission. It is worth noting that the Cortex M4 processor does not have enough computing power necessary for the software generation of sine wave and switching its phase in real time. It is because the microcontroller has to process lots of other information, and not only calculate a consecutive value of sine wave at consecutive time instants. The built-in floating point co-processor also does not solve this problem. Thus, the traditional implementation of QPSK modulation using only software is not possible at all. Software implementation of the QPSK modulation procedure is only slightly more complicated compared to the BPSK modulation procedure. The hardware timer is programmed to generate a square waveform at the output pin, and a counter counts the period of the symbol. At the end of the symbol's period, an interrupt is raised. Its handling routine decodes two-bit symbols, i.e., extracts the odd and even bits and configures the hardware timer by changing the output compare register value. Thus, together with checking some condition values and clearing the respective interrupt flags, the whole interrupt routine is quite short and does not disturb the real-time processing of the modulation procedure. Regarding Figure 1, the output pin of the hardware timer is connected to an amplifier and then directly to the piezoelectric transducer. It was mentioned that the final stage of the amplifier contains some passive elements which, together with the piezoelectric transducer, play the role of a band-pass filter. This part of the project, however, is beyond the scope of the paper. The demodulation process of a received QPSK signal is also more complicated when compared to the BPSK. In Figure 2, the simplified idea of the QPSK demodulation is shown. First, the received QPSK signal is sampled and multiplied by the cosine and sine function to obtain the IQ signal. Next, a low-pass filter is applied and the integral is calculated over the period of a symbol. The final block is a decision block. Comparing this procedure with the BPSK demodulation, it has to discriminate between the four possible states. Moreover, because PLL is not implemented, the decision block has to properly guess which state represents a particular symbol. In Figure 3, one can see a constellation diagram. It shows the integrated values of the IQ signal, where \(k\in\{0,\ldots,127\}\) means the consecutive number of a symbol. The data come from hardware-in-the-loop (HITL) simulations.