# Analysis of Non-Minimum Phase System for AC/DC Battery
## 5 Control Design  
System block diagram of the small signal model can be shown in Figure 13. This section discusses the design of the current and voltage controller \(G_{Ci}(s)\)and \(G_{CV}(s)\), respectively. The converter has two loops, the inner current loop, and the outer voltage loop. Thus, the inner current loop should be designed first by design the \(G_{Ci}(s)\). In order to reshape the input current and maintain a high PF for all operating modes, the loop gain of the inner current loop should have a high bandwidth and its crossover frequency should be lower than the switching frequency. Additionally, regarding robustness, it should have a phase margin higher than 45\({}^{\circ}\). The loop gain for the inner, fast current loop is a good approximation at frequencies below the switching frequency (\(F_{s}\)) and around the input voltage used in calculations. This loop gain is varying with input voltage and must have good stability margins for all input voltages. In boost mode, the transfer function for the current control \(G_{Ci}(s)\) can be presented as follows:  
\[G_{Ci}(s) = \frac{s+2011}{s}, \tag{18}\]  
Figure 14a represents the loop gain transfer function of the current loop. Wherein the cross over frequency is almost 100 kHz with phase margin 90\({}^{\circ}\). The closed loop transfer function \(G_{i_{1}d-CL}(s)\) for the inner current becomes:  
\[G_{di_{inf}}(s) = \frac{G_{Ci}(s)}{1+G_{Ci}(s)}\frac{G_{Ci}(s)}{G_{Li}d(s)}. \tag{19}\]  
The outer, slow voltage loop is directly affected by input voltage variations at twice the line frequency (double line), it is a good approximation only at frequencies below this. Thus, the cross over frequency should be less than the double line frequency with phase margin more than 45\({}^{\circ}\). Therefore, design of the output voltage control \(G_{CV}(s)\) is achieved  
Figure 14: Bode plots transfer functions for boost loop gain of: (**a**) Current loop \(G_{Li1}d\_u\_RC(s)\)\(G_{Ci}(s)\). (**b**) Voltage loop \(G_{vi_{inf}}(s)G_{CV}(s)K_{sense}\). Figure 13: System block diagram of the small signal model. by using (19) and (14) to obtain the current reference to output voltage transfer function \(G_{vi_{ref}}(s)\) as follows:  
\[G_{vi_{ref}}(s) = G_{vd}(s)G_{i_{L1}d-CL}(s). \tag{20}\]  
The transfer function of the voltage control loop \(G_{CV}(s)\) is designed to obtain a phase margin of 50\({}^{\circ}\) at a crossover frequency of 55 Hz, which can be expressed as:  
\[G_{CV}(s) = \frac{0.125s+25}{0.005s}, \tag{21}\]  
The \(G_{CV}(s)\) transfer function is first order with integrator and zero at low frequency. Figure 14b represents the loop gain for voltage loop transfer function, confirming the bandwidth is 55 Hz and phase margin 50\({}^{\circ}\). For the control simplicity, the same \(G_{CV}(s)\) and \(G_{Ci}(s)\) will be used in controlling the buck mode as well. Unlike implementation in [13] for the control circuit, wherein two different controller loops are used for the boost mode and another loop for buck mode. Thus, increasing the control complexity and computation time from the digital control point of view. Figure 15a,b show the bode plots loop gain of the current and voltage transfer functions in the buck mode, respectively. Figure 15a is the bode plot of the critical loop, which is the current loop, wherein the bandwidth is 100 kHz with phase margin is almost 90\({}^{\circ}\). Figure 15b is the bode plot transfer function of the voltage loop gain wherein the bandwidth is 25 Hz and the phase margin is 68\({}^{\circ}\). Figure 16 shows the block controller diagram. It consists of two loops, current control loop and voltage control loop. The input voltage \(v_{g}(t)\), output voltage \(v_{o}(t)\) and inductor current \(i_{L1}(t)\) are sensed to be processed in the controller. First, a peak detector circuit is used to detect the peak of the sensed input voltage then divide the sensed input voltage by its peak to have a normalized rectified sine waveform voltage reference \(v_{rect\_Ref}(t)\).