## 3 Results and Discussion  
Figure 1 shows the transfer characteristics of the a-IGZO TFTs fabricated with 0%, 20%, and 40% P\({}_{\rm N/O}\). The corresponding device parameters are extracted in Table 1. In this study, the \(V_{th}\) is determined by the gate voltage (\(V_{GS}\)) at which the drain current (I\({}_{\rm DS}\)) reaches 10 nA. The subthreshold swing (SS) can be calculated by the equation:  
\[\text{SS }=\left[\frac{\partial\log(I_{DS})}{\partial V_{GS}}\right]^{-1} \tag{1}\]  
Figure 1: The transfer characteristics of the a-IGZO thin film transistors (TFTs) fabricated with different nitrogen/oxygen partial pressure ratios (P\({}_{\rm N/O}\)). The inset shows the schematic of the fabricated TFTs structure. It can be seen that the \(V_{th}\) and SS of the a-IGZO TFT with 20% P\({}_{\rm N/O}\) are improved than that of the undoped a-IGZO TFT, where the \(V_{th}\) is decreased from 5.0 V to 3.8 V, and the SS is reduced from 0.8 V/dec to 0.6 V/dec. It has been demonstrated that the \(V_{th}\) and SS in TFTs are mainly associated with the density of trap states in the active region and at the a-IGZO/SiO\({}_{2}\) interface [14]. Therefore, the improved electrical properties of a-IGZO TFT fabricated with 20% P\({}_{\rm N/O}\) can be determined by the decrease of trap density in the device active region. In contrast, the \(V_{th}\) and SS of the a-IGZO TFT with 40% P\({}_{\rm N/O}\) are increased, which indicates that the new trap states are generated by excess N-doping. The reliability of the a-IGZO TFTs with different P\({}_{\rm N/O}\) are evaluated by positive-bias-stress temperatures. During the bias stress process, the devices are applied at \(V_{GS}\) = 15 V for 5000 s at T = 30 \({}^{\circ}\)C, 50 \({}^{\circ}\)C, and 70 \({}^{\circ}\)C, respectively. Figure 2a-c selectively show the transfer characteristics for the a-IGZO TFTs with different P\({}_{\rm N/O}\) against the PBS time at T = 70 \({}^{\circ}\)C. The transfer curves of the TFTs show a parallel shift toward the positive direction with no apparent degradation in SS and field effect mobility (\(\mu_{\rm{FE}}\)) after PBS, which indicates that the \(\Delta V_{th}\) of the TFTs after PBS should be ascribed to the field-induced electron trapping at the a-IGZO/SiO\({}_{2}\) interface [5; 11]. Meanwhile, it is clearly observed that the a-IGZO TFT with 20% P\({}_{\rm N/O}\) apparently exhibits better electrical stability compared with the undoped and 40% P\({}_{\rm N/O}\) devices after PBST at T = 70 \({}^{\circ}\)C. Correspondingly, the \(\Delta V_{th}\) of the a-IGZO TFT fabricated with 20% P\({}_{\rm N/O}\) (1.12 V) is lower than that of the undoped a-IGZO TFT (3.0 V) and 40% P\({}_{\rm N/O}\) device (2.75 V). Figure 3a-c show the quantity of the \(\Delta V_{th}\) for the a-IGZO TFTs with different P\({}_{\rm N/O}\) against the bias-stress time at different temperatures. It is observed that the relationship between \(\Delta V_{th}\) and time is fitted by a stretched-exponential equation, which reveals the mechanism of the carrier trapping near the active layer/dielectric interface [15; 16]. The stretched-exponential function is described as below  
\[\Delta V_{th}\ =\ \Delta V_{th}\big{[}1-exp\big{[}-(t/\tau)^{\beta}\big{]} \big{]} \tag{2}\]  
where \(\Delta_{\rm V/H0}\) is the \(\Delta V_{th}\) at infinite stressing time, \(\beta\) is a stretched-exponential exponent, and \(\tau\) is the time content for the charge trapping process, which is given by \(\tau\ =\ \tau_{0}exp(E_{\tau}/k_{\rm B}T)\). In this expression, \(E_{\tau}\) is the average effective interface energy barrier, which needs to exceed for channel carrier to inject into \begin{table}
\begin{tabular}{c c c c c} \hline \hline
**P\({}_{\rm N/O}\) (\%)** & **V\({}_{\rm th}\) (V)** & **\(\mu_{\rm{FE}}\) (cm\({}^{2}\)/Vs)** & **SS (V/dec)** & **I\({}_{\rm{on/off}}\)** \\ \hline
0 & 5.0 & 2.2 & 0.8 & \(>\)10\({}^{8}\) \\
20 & 3.8 & 8.0 & 0.6 & \(>\)10\({}^{9}\) \\
40 & 7.0 & 1.2 & 0.9 & \(>\)10\({}^{7}\) \\ \hline \hline \end{tabular}
\end{table}