## 2 Proposed Circuit and Operating Modes
### Voltage Control with Non-Inverting Characteristics  
In this mode, the regulated voltage with boost characteristics and input voltage are in phase with each other. This output voltage feature may be ensured with control algorithms, as shown in Figure 7a. In this figure, \(v_{zcd}\) is the output of a voltage-sensing circuit that detects the polarity of the input voltage. This voltage is logically high and low once the input voltage waveform passes through the positive and negative cross-over points, respectively. This is applied to the signal generator (microcontroller) as input; thus, all the control outputs of the signal generator are synchronized or aligned with the grid AC voltage. The control voltages \(v_{s1}\) and \(v_{s3}\) ensure the on states of the switching transistors \(Q_{1}\) and \(Q_{3}\) once the input voltage has positive and negative values. Similarly, the control voltage \(v_{s4}\) and \(v_{s2}\) are high-frequency PWM signals that switch transistors \(Q_{4}\) and \(Q_{2}\), respectively. These control signals operate the switching transistors in a pulse width modulation (PWM) manner when the input voltage is positive and negative, respectively,  
Figure 6: Proposed circuit topology. to stabilize the output according to the requirement. The maximum off-state voltage across the turned-off switching transistors (\(Q_{1}\) to \(Q_{4}\)) is restricted to the peak value of the output voltage. The details of the power transfer from input to output are explored in the highlighted loops of Figure 8a-d when the value of the input is positive and negative, respectively. Figure 8: In-phase voltage boost operation during (**a**,**c**) shoot-through interval of positive and negative input voltage, respectively; (**b**,**d**) energy transfer interval of positive and negative input voltage, respectively. Figure 7: Switching control signals for (**a**) non-inverted output and (**b**) inverted output. For a positive input voltage, the diodes \(D_{1}\) and \(D_{2}\) are forward-biased, and the switching transistor \(Q_{1}\) is on. The PWM switching of transistor \(Q_{4}\) during the time interval '\(kT\)', stores the input power in inductor '\(L\)' through the current loop formed by the diodes \(D_{1}\), \(D_{2}\), and \(D_{5}\) and switching transistors \(Q_{1}\) and \(Q_{4}\), as shown in Figure 8a. Here, '\(k\)' and '\(T\)' are the pulse width and switching period of the high-frequency PWM control signal, respectively. The peak reverse voltage across the reverse-biased diodes (\(D_{3}\) and \(D_{4}\)) of the diode bridge is equal to the peak value of the input voltage. \[V_{P(D_{3},D_{4})}=V_{s(P)} \tag{1}\]  
Similarly, the maximum reverse voltage across the \(Q_{3}\) and \(D_{6}\) is the peak output voltage. \[V_{P(D_{6},Q_{3})}=V_{o(P)} \tag{2}\]  
In the '\(kT\)' interval, although the switching transistor \(Q_{2}\) is on, it is in the non-conducting state as its series-connected diode \(D_{6}\) is reverse-biased due to the polarity of the output capacitor. This transistor is maintained in conduction mode to eliminate the possible interruption of the inductor's current as diode \(D_{6}\) becomes forward once the switching transistor \(Q_{4}\) turns off in the '\((1-k)\)\(T\)' interval. During this interval, the stored power in the inductor is forwarded to the output through the power transfer loop highlighted in Figure 8b. The maximum voltage across the series-connected switching transistor \(Q_{4}\) and diode \(D_{5}\) is \(V_{o(P)}\). During the negative half-cycle of the input voltage, the operating states of diodes \(D_{3}\) and \(D_{4}\) are changed from off to on and diodes \(D_{1}\) and \(D_{2}\) become reverse-biased with a break-over value of peak input voltage. The operating transistor \(Q_{3}\) conducts, and \(Q_{1}\) remains reverse-biased. Its value cannot exceed the maximum output voltage level during the entire negative half-cycle of the input voltage. The regulation of the output voltage is ensured with the PWM control of the switching transistor \(Q_{2}\).