An Efficient Algorithm and Architecture for the VLSI Implementation of Integer DCT That Allows an Efficient Incorporation of the Hardware Security with a Low Overhead  
[PERSON]  
1 Technical Sciences Academy of Romania--ASTR, Academy of Romanian Scientists--AOSR, Faculty of Electronics, Telecommunication and Information Technology, \"[PERSON]\" Technical University of Iasi, 700506 Iasi, Romania; [EMAIL_ADDRESS]  
1 Technical Sciences Academy of Romania--ASTR, Academy of Romanian Scientists--AOSR, Faculty of Electronics, Telecommunication and Information Technology, \"[PERSON]\" Technical University of Iasi, 700506 Iasi, Romania; [EMAIL_ADDRESS]  
1 Technical Sciences AcademyThe performances of a VLSI algorithm are determined even more by the communication complexity and structure and then by its arithmetic complexity. Hence, using regular and modular computational structures can lead to good hardware implementation solutions for the discrete transforms [2; 3; 4; 5; 6; 7] using systolic arrays [8] or distributed arithmetic [9]. As can be seen, this approach offers reduced hardware complexity with low I/O cost and high speed with good topological features. It was shown that the VLSI implementation advantages specific to circular correlation or cycle convolution can be extended to other related structures such as pseudo-cycle convolution, band-correlation, skew-circular, and pseudo-circular correlations. The main VLSI implementations' advantages of these regular and modular computational structures stem from their particular data flow management, consisting of efficient input/output and data transfer operations, which are successfully utilized in distributed arithmetic systems and systolic arrays. One important problem in the VLSI implementation of the DCT is that some elements of the transform kernel are irrational, which increases the computational cost and may cause a mismatch between the encoder and decoder as well as drifting errors. Integer discrete cosine transform (Int-DCT) [10; 11] was designed to solve this problem and has been adopted in the recent coding standards such as H.264/Advanced Video Coding (AVC) [12], Audio and Video Streaming (AVS) [13], Video Codec-1 (VC-1) [14], and high-efficiency video coding (HEVC) [15], which uses 4-point to 32-point Int-DCT. Several 8-point approximated DCTs are proposed in [16; 17; 18] with different techniques to derive efficient transforms with a lower number of required additions. Larger transforms such as 16-point DCT can offer better performances as more coding gains compared with 4-point or 8-point transforms [19; 20; 21]. The importance of protecting designs and products has increased nowadays such that the search for measures to protect intellectual property (IP) from counterfeit, malicious alteration, or reverse engineering using hardware security techniques has intensified. While there are several hardware security solutions, one of the most efficient solutions for improving hardware security is the obfuscation [22; 23; 24; 25; 26; 27; 28]. In this paper, we describe a new integer algorithm for DCT suitable for an efficient hardware implementation of DCT. One aspect of the obtained VLSI algorithm is the possibility to have only multiplications with small integer constants that have low complexity of signed digit representations and can be realized with adders and shift operations. The proposed integer algorithm was decomposed into five pseudo-cycle convolutions of length \(N=4\) and one pseudo-cycle convolution of length \(N=2\) that can be computed in parallel, leading to a reduced hardware complexity with high processing speeds. The obtained computational structures present the advantages of the cyclic convolution and circular correlation structures-based VLSI. Moreover, the particular tag control mechanism facilitates the efficient integration of the obfuscation technique based on the method introduced in [27].