## 5 Discussion and Conclusions  
This study demonstrates that adding capacitors within the ground planes is an effective method for reducing crosstalk between UCPW lines. The proposed method of placing capacitors between ground planes rather than between signal lines offers a viable and efficient alternative for engineers, particularly in high-density PCB designs where space constraints are critical. The experimental results indicate S\({}_{31}\) improvements of up to 40 dB, as shown in Figures 7 and 9. Additionally, improvements of 20-25 dB were observed in Figures 6 and 8. These findings highlight the significant impact of capacitor placement and value on crosstalk mitigation. While the effect varies with frequency and positioning, the capacitors demonstrate their potential to effectively reduce interference within specific frequency bands. It should be noted that the measurements were conducted using the Siglent SSA3032X Plus VNA, which has an amplitude accuracy of \(\pm\)0.7 dB, as specified in its datasheet. To enhance measurement stability and mitigate the effects of random noise and transient variations, the VNA was configured to perform an average of 100 sweeps per measurement. This averaging process reduces short-term fluctuations and improves result consistency; however, the fundamental measurement uncertainty remains governed by the inherent amplitude accuracy of \(\pm\)0.7 dB. Therefore, the reported S\({}_{31}\) improvements should be interpreted within this measurement uncertainty range. This tailored performance makes the proposed method a practical solution for diverse high-frequency applications. The findings of this study underscore the practical and technical advantages of the proposed method. Compared to the literature shown in Table 3, methods such as those involving guard traces or perforated vias, the addition of capacitors exclusively within the ground plane structure provides significant improvements while avoiding increased circuit size, production complexity, and additional costs. Furthermore, the ability to integrate capacitors post-production offers flexibility in iterative design processes and high-frequency applications, where maintaining signal integrity is crucial. While the proposed method demonstrates strong performance, further research could expand its applicability. Future studies could investigate its performance across different dielectric materials, explore its effects in multi-layered or more complex PCB designs, and assess its scalability for larger systems. These directions would help establish a broader foundation for implementing this method in diverse electronic applications. Since this study was conducted using FR4 as the PCB substrate, its applicability to other materials with different dielectric constants and loss characteristics remains an open \begin{table}
\begin{tabular}{c c c} \hline \hline
**Study** & **Method** & **Optimum S\({}_{31}\) Improvement (\(-\)dB)** \\ \hline [PERSON] et al. [38] & Vias of serpentine guard trace & 30 \\ [PERSON] et al. [39] & Updating the number of vias to 25 & 15 \\ [PERSON] et al. [40] & Fourier-based non-uniform victim line & 25 \\ [PERSON] [41] & Dogbone via structure & 15 \\ [PERSON] [42] & Serpentine split structure of ground planes & 30 \\ [PERSON] et al. [30] & Making the via angle 45 degrees & 6 \\ This study & Adding capacity between ground planes & 40 \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Optimum near-end crosstalk improvements obtained in literature and this study. question. The effectiveness of capacitors in reducing crosstalk may vary depending on the electrical properties of alternative substrates such as Rogers, Teflon-based laminates, or other high-frequency PCB materials. If different dielectric materials are used, impedance calculations must be re-evaluated following the methodologies outlined in this study to ensure optimal crosstalk reduction and signal integrity. Future research should examine these variations to further validate the generalizability of the proposed approach.