# Conception of a System-on-Chip (SoC) Platform to Enable EMG-Guided Robotic Neurorehabilitation
## 4 Experimental Results
### Latency Assessment  
This test involved capturing time measurements during data transmissions in MATLAB(r) R2024b. Note: This is necessary to be done, otherwise it will affect publication. The setup included sending a continuous data stream from the prototype to a client and comparing the elapsed time for transmission with the effective signal duration captured. The effective duration was calculated based on the known data acquisition rate of 8 kSPS, verified during the functional validation test. The measurements demonstrated that capturing 58 s of effective signal required an average total time of 101 s (1 min and 41 s). This latency highlights the enhanced efficiency of the UART-based transmission system combining DMA concept. The prototype architecture uses a regular DMA-UART-based system to transfer data between the proposed SoC architecture and the computer, minimizing latency between frames. Experimental tests were conducted to measure statistical latency metrics and evaluate the system's ability to meet timing requirements for critical applications. Two latency perspectives were analyzed, byte-level and burst-level (3 bytes) metrics, to understand  
Figure 3: Signal acquisition for functional validation: Channels 1–8. Channel 2 corresponds to the Vastus Lateralis muscle, Channel 3 to the Rectus Femoris muscle, and the remaining channels have the same response because are dedicated to internal test signals. the effects of system jitter and bursts, respectively. The results highlight the importance of transmission speed and stability in ensuring data integrity and reliable system performance. The UART system was tested with 9 data channels (8 channels and a status word channel), each transmitting 24-bit samples. Due to UART protocol overhead, each sample expands to 30 bits (including start and stop bits). Data were continuously transmitted for one minute at two baud rates: 115,200 bps and 230,400 bps. The maximum number of data points transmitted per channel in one minute was calculated for both baud rates. The operating system (OS) and receiver hardware affect the accuracy of the measurement. Non real-time OSs, like Windows or Linux, introduce jitter due to multitasking, causing latency variability. Interrupt-driven processes can delay serial data handling, especially under heavy system load. UART buffer management is also crucial if the buffer fills faster than it can be processed, data loss or delays occur, particularly at high baud rates. Additionally, hardware receiver performance (CPU, memory, UART controller) affects data processing speed, with older or limited systems struggling to handle high-speed transmissions, leading to inaccuracies or dropped data. Table 1 shows statistical metrics describing latency behaviour at two baud-rates: 115,200 bps and 230,400 bps. The values include typical latency statistics measured both by byte-level and burst-level during the continuous transmission of 24-bit data. The observed latencies were generally low for both cases, with medians below 1 ms, indicating consistent performance. However, the higher speed (223,400 bps) showed slightly greater variations in maximum latency, possibly due to buffer management or system interruptions. These findings emphasize the importance of considering both byte-level and burst-level metrics to evaluate typical performance and detect rare delays in time-sensitive applications. The latency analysis demonstrates that the system operates well within the required response time needed for real-time operation, even under the highest measured latency conditions. Both baud rates (115,200 bps and 230,400 bps) deliver consistent performance, with median and mean latencies significantly below 1 ms, highlighting the system's suitability for time-sensitive applications. While higher transmission speeds slightly increase maximum latency, the variations remain minimal and manageable, ensuring reliable data transfer and real-time response capabilities. To address issues such as jitter and buffer overflow, practical solutions can be implemented.