## 4 Simulation and Experimental Validation  
To verify the correctness of the design of the DC-side capacitance and the effectiveness of the three-closed-loop control when the load of a three-phase four-wire inverter is unbalanced, a MATLAB/Simulink model was built for simulation and analysis. The model was built according to the parameters in Table 1, and the loads were adjusted to \(R_{\rm a}=30\ \Omega\), \(R_{\rm b}=20\ \Omega\) and \(R_{\rm c}=15\ \Omega\) for verification. The higher harmonics and DC components of the voltage content were ignored in the calculation of the unbalanced current, and only the fundamental component was considered. Also, according to Equation (16), the amplitude of the DC-side capacitance voltage fluctuation was selected in accordance with the critical value of the national standard. In order to be better than the critical values specified in the national standard, the actual values were, therefore, taken to be approximately 1 to 1.2 times the theoretical calculated values. The unbalanced current was calculated to be \(I_{\rm o}=2.5\ \mathrm{A}\). According to the splitting capacitance selection method proposed in this paper, after calculation, it is known that the splitting capacitance on the DC-side was \(C=919\ \mathrm{\upmu F}\). When the DC-side capacitance was taken to be \(500\ \mathrm{\upmu F}\) (less than \(919\ \mathrm{\upmu F}\)), the load voltage waveforms of the system from startup to stabilization and from load fluctuation to stabilization are shown in Figure 12. From the graph it can be seen that the phase deviation was large. When the DC-side capacitance was taken to be \(919\ \mathrm{\upmu F}\), the load voltage waveforms of the system from startup to stabilization and from load fluctuation to stabilization are shown in Figure 13. From the graph it can be seen that the phase deviation was small. Through the above simulation experiments, it can be shown that the three closed-loop control strategy effectively ensures the stability of the load voltage, and the DC-side capacitance selection method proposed in this paper can effectively suppress the phase error. Within 0-0.04, the time from system start-up to stabilization, and at 0.12 s, the load voltage changed and \(R_{\text{b}}\) changed. from 20 \(\Omega\) to 40 \(\Omega\), and, in one cycle, the system stabilized. According to the parameters in Table 1, the experimental prototype was built, the size of the load was changed, and the load voltage waveform, THD value and voltage unbalance \(\varepsilon_{\text{u}}\) (%) were observed. When the three-phase load was balanced (\(R_{\text{a}}=R_{\text{b}}=R_{\text{c}}=20\)\(\Omega\)) and the system was stabilized, the load power was 1084 W; at this time, the load voltage waveform and THD value are shown in Figure 14, and the voltage unbalance is shown in Figure 15.  
Figure 12: Simulated waveform with a capacitance value of 500 \(\mu\)F.  
Figure 13: Simulated waveform with a capacitance value of 919 \(\mu\)F.  
Case 1: The three-phase load was adjusted to \(R_{\text{a}}\) = 30 \(\Omega\), \(R_{\text{b}}\) = 20 \(\Omega\), \(R_{\text{c}}\) = 15 \(\Omega\); at this time, the load power was 1082 W, the unbalanced current was calculated to be \(I_{\text{o}}\) = 2.5 A, the DC-side capacitance was \(C\) = 919 uF and the nominal value was taken as 1100 uF capacitance. The difference between nominal and actual values should be noted in the experiment. The load voltage waveform and THD values after system stabilization are shown in Figure 16, and the voltage unbalance is shown in Figure 17.  
Case 2: The three-phase load was adjusted to \(R_{\text{a}}\) = 10 \(\Omega\), \(R_{\text{b}}\) = 20 \(\Omega\), \(R_{\text{c}}\) = 10 \(\Omega\); at this time, the load power was 1806 W, the unbalanced current was calculated to be \(I_{\text{o}}\) = 4.2 A, the DC-side capacitance was \(C\) = 1592 uF, and the nominal value was taken as 1100 uF capacitance (connected to 1000 uF with two 450 uF in parallel).