## 3 Results and Discussion  
### Material Characterizations  
The total GaAs buffer thickness was maintained at 2.1 \(\upmu\)m to avoid thermal cracks in the full device sample because a typical GaAs solar cell adds approximately another 3 \(\upmu\)m-thick III-V layers on top of the buffer. Reducing the GaAs buffer thickness typically results in higher TDDs [26]. Therefore, it was important to modify the GaAs buffer structure so that the 2.1 \(\upmu\)m-thick GaAs/Si template used in this work could still serve as a virtual substrate with a low TDD. ECCI was performed to investigate the TDD. Figure 1b shows a representative ECCI image where white speckles are individual threading dislocations (TDs) propagating to the surface. The TDDs were calculated by taking more than five images per sample for high statistical accuracy. We achieved a TDD of 1.86 \(\times\) 10\({}^{7}\) cm\({}^{-2}\) from the 2.1 \(\upmu\)m GaAs buffer layer. Figure 1c shows a comparison of TDD in GaAs/Si material system reported by other groups. Figure 2a shows the schematic structure of one-junction GaAs solar cell grown on Si substrate with optimized TCA and In\({}_{0.1}\)Ga\({}_{0.9}\)As SIL. The p-on-n GaAs solar cell has an upside-down structure for metal wafer bonding and ELO process. Figure 2b shows a Nomarski image of the surface with few oval defects and hillocks, which are extremely detrimental to solar cell performance by increasing electrical shunts. The cross-sectional SEM image of Figure 2c reveals the entire GaAs solar cell structure grown on the Si substrate. We also confirmed that the growth of the 50 nm AlAs sacrificial layer for the ELO process did not roughen the layer interface, as seen in the reflection high energy electron diffraction patterns (not shown here). The interfaces in GaAs/Si system were investigated by two-beam condition TEM (Tecnai, FEI) measurement for more clarity to measure the defects. The TEM sample was prepared with Helios G4 HX dual beam (FEI) to make the cross-sections from the actual GaAs buffer on Si. Figure 2d shows a cross-sectional bright field TEM image of the TDs propagating into the GaAs solar cell layer, which were generated at the interface between the GaAs buffer layer and the Si substrate. The compressive strain state of the GaAs buffer was fully relaxed by forming misfit dislocations, as observed in the selected area diffraction image (inset of Figure 2d). We performed a large area micro-PL on the fully grown sample at room-temperature, as shown in Figure 3a, using a 532 nm green laser as a pump source. The wafer was specular and had no cracks induced by thermal expansion mismatch. Figure 3b shows a 1.5 \(\times\) 1.5 cm\({}^{2}\) PL peak intensity mapping measured from the GaAs layer (\(\uplambda\) = -840 nm), confirming absence of thermal cracks in the fully grown sample. Furthermore, the PL peak intensity varied within a relatively small range from \(\sim\)3800 to 4200, except for a small spot on the right corner. Raman spectroscopy (In Via Raman Microscope, Renishaw) was also carried out to investigate the strain state of the III-V layer, especially the residual thermal tension (Figure 3c). Five different locations were probed, as shown in Figure 3a, and were compared with the GaAs solar cell sample grown on a GaAs substrate as a reference. Figure 2: (**a**) Schematic illustration of GaAs one-junction solar cell grown on Si substrate. (**b**) Differential interference contrast optical microscopy image. (**c**) Cross-sectional SEM image of the entire solar cell structure. (**d**) Cross-sectional bright-field TEM image. Inset shows the selected area diffraction pattern. Transverse optical phonon peaks at 268 cm\({}^{-1}\) and longitudinal optical phonon 290 cm\({}^{-1}\) peaks were clearly detected from both [27]. The slight red-shifts from the Si substrate sample compared to the GaAs sample were attributed to the small residual thermal tension in the GaAs epitaxial layer on Si [28].