# Efficient Implementation of Matrix-Based Image Processing Algorithms for IoT Applications
## 2 The Algorithm Description
The second method ensures the halving of the computation time. This goal is achieved by partitioning the computation in matrix operations (multiplications, addition)- performed in CNN and non-matrix operations (all the remaining computations)--performed in ARM. Two blocks are processed in parallel in ARM and CNN, alternatively, as shown in Figure 16b. For relatively small image sizes and frames per seconds, the algorithm can operate for videoclips in real time for small noise levels. ## 7 Conclusions

This paper focuses on the analysis of the possibility of accelerating the necessary processing in algorithms based on matrix operations. Accelerating these operations can be achieved using neural network processing units (NPUs) integrated into the architecture of today's high-performance microcontrollers. The aim of the work was to investigate how much the performance increases if an accelerator integrated in the microcontroller is used and under what conditions it can adapt to perform calculations not specific to the role for which it was designed. As an example, the paper presents implementations and performance analysis of an image compression and noise removal algorithm based on compressive sensing and CS-RANSAC. This algorithm was validated as a good algorithm in terms of noise removal and image compression using infinite precision implementation (e.g., MATLAB simulations). The main goal of this work is to evaluate if a microcontroller implementation is feasible in terms of processing accuracy and computation time to be used in IoT applications that involve hardware nodes with resource constraints. The obtained results show that good quality of the reconstructed image can be obtained for medium to relatively high noise levels (specific in IoT systems) in a calculation time of the order of seconds or tenth of seconds. Additionally, the paper proposes methods to improve the algorithm: (1) by selectively applying DCT or the CS-RANSAC to each block in the image (without degrading the quality of the image), and (2) by using the ARM microcontroller and CNN cores in parallel or using a dual core Blackfin microcontroller. For relatively small values (matrices of order tens), all implementations are scalable. The dimensions of the matrices are changed in code (written in C language) with only the limitation of the size of the memories in the microcontroller or CNN. The method proposed by using CNN has certain advantages compared with a classical implementation, but it has better results for algorithms that work in fixed point. The data transfer to feed the CNN can slow down the computation time. Future research will focus on ways to organize calculations to make this data transfer more efficient and should investigate different accelerator hardware implementations and the power consumption of such implementations. Additionally, different noise models and removal noise algorithms for IoT (including static images and videoclips) will be investigate in future research. Conceptualization, S.Z. ; methodology, R.Z. ; software, S.Z. ; validation. R.Z. ; formal analysis, R.Z. ; investigation, S.Z. ; resources, S.Z. ; data curation, R.Z. ; writing--original draft preparation, S.Z. ; writing--review and editing, R.Z. and S.Z. ; visualization, R.Z. ; funding acquisition, S.Z. All authors have read and agreed to the published version of the manuscript. The research leading to these results received funding from the Research Centre on Systems Software and Networks in Telecommunication (CCSRST). Not applicable. Data Availability Statement: The raw data supporting the conclusions of this article will be made available by the authors on request. The authors declare no conflicts of interest. ## References

* (1) IoT Frequency Bands.