## 4 Experimental Results and Discussion  
A prototype with around 100 W was implemented and Figures 14-17 show the results. The switching frequency was set to 50 kHz. Inductors \(L_{X}\) and \(L_{Y}\) were fixed to 200 uH, the capacitor \(C_{1}\) value was considered as 1 uF, and the output capacitor C2 as 47 uF. Figure 14 presents the hardware prototype. Figure 15 shows the gate source and drain source pulses of the structure in 50% and 75% of duty cycles and as we expected, different values of ON and OFF intervals of power MOSFET and as a result, different duty cycles for the voltages of drain-source pins were obtained. Figure 16 illustrates the voltage waveforms for the capacitors and currents of the inductors. In Figure 16a, under 25 V as the input voltage, by applying the proposed controller method, the output voltage was set to 120 V. So, as expected based on Equation (30), half of this value was measured on the first capacitor and the second half of the proposed converter doubled this value on capacitor \(C_{0}\). This test was undertaken on a 120 \(\Omega\) resistive load, so the voltages on the capacitors, especially the voltage on capacitor \(C_{1}\), had fluctuations on switching times. The load value was set to 240 \(\Omega\) and the input voltage was increased to 35 V for Figure 16b, and as shown, these sudden ripples decreased. This event is normal because not only was the input voltage increased, but the output current was also a lower level in comparison with the first test. Figure 16c presents the current waveforms of the inductors for a 150 \(\Omega\) resistive load with 120 V and 25 V as the output and input voltages, respectively. As the results show, the current of the inductor \(L_{Y}\) was less and the result confirmed Equations (34) and (35). Additionally, ripple values were reported of around 1.3 and 1.8 A for \(L_{X}\) and \(L_{Y}\), respectively, which is in agreement with the mathematical analysis presented in Table 1. Figure 16d reports the results of the same process with a 250 \(\Omega\) resistive load, 35 V input, and 120 V output voltages. The obtained currents and ripple values confirmed the same equations mentioned for Figure 16c. Figure 17 shows the status of the power diodes \(D_{1}\) and \(D_{2}\) and confirms the conductivity theory of these diodes in different work principles that was presented in Section 2.1 in 50% of the duty cycle. Based on this result, when the power diode \(D_{1}\) is in ON mode, \(D_{2}\) is in OFF mode and vice versa. A comparison was done in this part between the proposed PI controller and several other controllers in order to assess the performance of the projected structure. Different controllers have been investigated for DC-DC boost converters. The authors in [23] presented a fault tolerant-based DC-DC boost converter. This structure uses an extra Triode for Alternating Current (TRIAC) and an auxiliary power  
Figure 17: Oscillation domain of output DC voltage in the 50% duty cycle and switching frequency of 50 kHz. switch with a DC gain closed to the conventional boost converter. The optimal switching frequency of this converter was adjusted to 20 kHz and the efficiency of the controller was calculated as around 87 percent for low power applications. In [24], a field-programmable gate array control technique was presented for non-isolated DC-DC converters. The basis of this controller was established on time and the current of the inductor and the robustness of the system was investigated. The controller worked in low switching frequencies around 15 kHz and is suitable for high power applications. The inductor value was comparatively high and at the same time, several internal controller blocks worked to fix the output voltage. The study in [25] suggested a model-based state estimator approach for the DC-DC converter where the mathematical complexity and specifications of this converter such as switching frequency and inductor value were similar to the method presented in [24].