# Improving Hardware in LUT-Based Mealy FSMs
## 6 Experimental Results  
In this section, there are shown the results of experiments which were conducted to compare the characteristics of \(U_{3}\)-based Mealy FSMs with the characteristics of FSM circuits based on some other models. The benchmark FSMs from the library [56] are used for these experiments. This library includes 48 benchmarks represented in the format KISS2 taken from the practice of logic design. Although the library dates back to the 1990s of the twentieth century, it has been used by various authors for 30 years to compare the new and existing methods of implementing FSM circuits. Let us indicate only some examples of articles and monographs, where the library [56] is used in experimental research. Such  
To conduct the research, we use a personal computer with the following characteristics: CPU, Intel Core i7 6700 K [EMAIL_ADDRESS] GHz and memory, 16 GB RAM 2400 MHz CL15. As a platform for FSM circuits implementation, the Virtex-7 VC709 Evaluation Platform (xc7 vx690 ttffg1761-2) [60] is used. As a CAD tool, we use the package Vivado v2019.1 (64-bit) of Xilinx [47]. The circuits are implemented using CLBs from the slices SLICEL. They include LUTs having six inputs. To create the tables with research results, the reports of Vivado are used. To link the initial KISS2-based files with Vivado, we create VHDL-based descriptions of these models. To do it, the CAD tool K2F [40] is used. Using the Vivado reports, we compare some parameters of produced FSM circuits. These parameters are (1) the required chip area occupied by an FSM circuit (the LUT count represents this characteristic); (2) the maximum operating frequency achievable for a particular FSM; (3) the required number of flip-flops; (4) the power consumption; (5) the area-time products; and (6) the power-time products. In our experiments, we use the following FSM models: (1) auto of Vivado (it is based on the maximum binary state codes); (2) one-hot of Vivado (in this case, \(R=M\)); (3) JEDI; (4) \(U_{2}\)-based FSMs [15]; and (5) \(U_{3}\)-based FSMs proposed in this article. As it is in our previous research [15], the benchmark FSMs are divided by five groups. The groups are determined by the value of a parameter \(D(R,L,I)\). This parameter is calculated as  
\[D(R,L,I)=L+R-I. \tag{19}\]  
Using (19), we create the following groups. The relation \(D(R,L,I)\leq 0\) determines the group of trivial FSMs (the group G0). The relation \(0<D(R,L,I)\leq 6\) determines the group of simple FSMs (G1). The relation \(6<D(R,L,I)\leq 12\) determines the group of average FSMs (G2). The relation \(12<D(R,L,I)\leq 18\) determines the group of big FSMs (G3). The relation \(D(R,L,I)>18\) determines the group of very big FSMs (G4). As research [15] shows, the larger the group number, the greater the gain from the use of methods of structural decomposition. The results of the experiments are shown in Tables 8-20. We have organized these tables in the following way. In the table columns, we show the names of the methods used. The table rows are marked by the names of benchmarks. At the intersection of a column with a method and a row with a benchmark, we show the result of a specific experiment obtained from the Vivado report. Inside each table, the benchmarks are listed in alphabetical order and sorted by ascending group number. The rows \"Total\" contain the results of summation of values for each column. The row \"Percentage\" includes the percentage of summarized characteristics of FSM circuits produced by other methods, respectively, to \(U_{3}\)-based FSMs. We use the model of Mealy FSM \(U_{1}\) for methods auto, one-hot, and JEDI.