## 2 BIRDS 1U Standard Bus System
### 3U-Size Configurable Backplane  
The BIRDS bus system is not only intended for 1U CubeSats but is designed to scale up to a 3U platform with minor modifications [24]. One modification is in the design of the backplane, where a larger CubeSat provides more space for mission boards than in a 1U. A 3U configurable backplane prototype was developed, as shown in Figure 6. The backplane is a six-layer PCB and measures 320 mm \(\times\) 90 mm \(\times\) 1.6 mm, and all internal boards and deployment switch connectors are placed on the top side of the board, which is the same as the 1U standard bus. In addition, the bus system components (FAB, OBC/EPS, COM, and RAB) and their arrangement were kept unchanged. Lastly, the space between the COM board and the RAB was allocated for the 13 mission boards. Since the 3U platform would require more power for the mission payloads, the battery capacity would also increase, leading to a bigger battery box than in the 1U. Therefore, the space for the battery box, which is between the FAB and OBC/EPS board, is wider than in the 1U backplane. A standard pin assignment for all mission boards is described in detail in Table 3. While 12 power pins are pre-assigned based on the power distribution from the OBC/EPS board, the developers have the flexibility to assign the remaining pins to CPLD, miscellaneous, and umbilical connections. In addition, the 20 pins assigned to CPLD connections are configurable even after the backplane is fabricated. This number of pins allows the payload developers to assign any kind of serial digital interface to link over the bus. \begin{table}
\begin{tabular}{c c} \hline \hline
**50-Pin Mission Board Allocation** & **No. of Pins** \\ \hline CPLD connections & 20 \\ Miscellaneous (e.g., analog, direct connections) & 8 \\ Power & 12 \\ Umbilical (programming and debugging) & 10 \\
**Total** & **50** \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Standard 50-pin assignment for mission boards. Figure 5: Digital line routing using a CPLD. Four CPLDs are laid on the bottom side of the backplane, while the battery is placed on the other side. Cumulatively, the CPLDs provide the interface between the bus system and mission payloads. A voltage regulator supplies 1.8 V to all CPLDs, and each device has its JTAG pins for programming. Figure 7 shows the logical connections between the bus and the mission payloads. The SPI (from the shared FM) and \(11\) digital interfaces (from the main PIC) in the bus system are directly connected to CPLD1. The CPLDs are cascaded to each other through the 15 I/O pins. These are later configured to correspond to the bus system SPI and 11 digital interfaces. The remaining I/O pins of the CPLD are distributed to the mission (MSN) boards. CPLD1 to CPLD3 manage three mission boards, while CPLD4 manages four. To manage the bus system digital interfaces, the CPLDs are programmed to function as four-to-one multiplexers with four select (SEL) lines. Table 4 shows the truth table of how the CPLDs function. A total of 4 of the 11 digital interfaces (SELO to SEL3) in the bus are used as select pins of the multiplexer function of the CPLDs. A specific logic state of the select pins allows a mission payload to access the  
Figure 6: The 3U configurable backplane (**top** and **bottom** sides). Figure 7: Logical connection of bus system and payload through CPLDs. seven remaining digital interfaces and the SPI in the bus system. For example, if the select pin logic values are 0001, CPLD1 allows MSN1 to access the bus system. Conversely, if the select pin logic values are 0110, CPLD1 routes all 15 digital lines to CPLD2. CPLD2 then routes the digital lines to MSN6. There are 13 combinations of select pin logic states corresponding to the 13 mission boards. Verifications were conducted on the backplane to test the performance. First, a functional test was performed to check whether the multiplexing function worked. Signal propagation delay and overall power consumption were also measured. Lastly, a bit error check was performed.