# Analysis of AC DC Four-Switch Boost-Buck Battery Charger Converter for EV Applications
## 9 Simulation Results  
To thoroughly assess the effectiveness and practicality of the suggested power conversion approach, simulation tests were executed using the PSIM software platform. These tests are pivotal for verifying theoretical design choices and for predicting system behavior under various conditions. The simulation setup integrates the power stage as delineated in Figure 10 with the control circuitry detailed in Figure 16, following the specifications listed in Table 1. To enhance the realism of the simulation, equivalent series resistances (ESRs) are assigned to the inductors and capacitors to reflect actual component losses, and the switching elements are modeled to encompass their non-ideal behaviors. Additionally, parasitic effects are factored into the diode models. Figure 17 showcases the boost mode's steady-state behavior by illustrating the waveforms of the intermediate voltage \(v_{c}\) alongside its Fast Fourier Transform (FFT) analysis. The FFT is instrumental in identifying the spectral components of the voltage waveform, providing insights into the harmonic content and the effectiveness of the snubber circuit in mitigating high-frequency oscillations. Similarly, Figure 18 presents the steady-state waveforms and FFT analysis for the buck mode. When operating at full load and with the RC snubber circuit in place, both Figures 17 and 18 offer a comparison to previous states depicted in Figures 8 and 9. The inclusion of the snubber circuit is particularly noteworthy as it addresses the intermediate voltage \(v_{c}\) internal dynamic stability issues, a critical aspect for the reliable operation of power converters. One of the key observations from the simulation is the absence of internal dynamic instability concerns in both operational modes, which is an essential criterion for a successful design. Furthermore, the FFT distribution for \(v_{c}\) demonstrates uniformity, indicating that the snubber circuit effectively suppresses undesirable harmonic frequencies, thereby validating the design's efficacy. This uniformity in the frequency spectrum signifies that the voltage across the intermediate stage does not exhibit excessive harmonic distortion, which could otherwise impact the performance of the power stage and the load it drives. These simulations confirm that the proposed design operates as intended, with the power stage and control circuit working harmoniously to manage the load dynamically without introducing instability or significant harmonic distortion. The results serve as a proxy for real-world performance, offering confidence in the proposed solution's viability for practical applications. Figure 17: Intermediate voltage \(v_{c}\) in boost mode without oscillation and its normalized FFT. (**a**) Intermediate voltage \(v_{c}\). (**b**) Normalized FFT of intermediate voltage \(v_{c}\). Figure 19 presents the boost mode steady-state waveforms of the output voltage \(v_{o}(t)\), output current \(i_{o}(t)\), input voltage \(v_{g}(t)\), and input current \(i_{g}(t)\) at full load. The peak input voltage is 300 V and the output voltage is 200 V, while the output current is 8 A. The waveforms illustrate how the input current waveform is in phase with the input voltage, exhibiting low distortion. The PF is measured to be 0.99 with 4.3% THD, indicating efficient power utilization. Figure 20 shows buck mode steady-state waveforms of output voltage \(v_{o}(t)\), output current \(i_{o}(t)\), input voltage \(v_{g}(t)\), and input current \(i_{g}(t)\) at full load. The peak input voltage is 300 and the output voltage is 200 V, while the output current is 8 A. The waveforms illustrate how the input current waveform is in phase with the input voltage, exhibiting low distortion. The PF is measured to be 0.99 with 4.3% THD, indicating efficient power utilization. Figure 19: Boost mode steady-state waveforms of output voltage \(v_{o}(t)\), output current \(i_{o}(t)\), input voltage \(v_{g}(t)\), and input current \(i_{g}(t)\) at full load.