# The Fast Discrete Tchebichef Transform Algorithms for Short-Length Input Sequences
## 4 Results  
We used the MATLAB R2023b software for the experimental research of the proposed algorithms. The correctness of the designed algorithms was tested. For this, the DTT matrices were obtained using Equations (4)-(6) for \(N=3\), \(4\), \(5\), \(6\), \(7\), \(8\) at first. Next, the factorizations of 1D DTT matrices were calculated with the expressions (7), (10), (20), (32), (46), and (58). The correctness of the proposed algorithms was indicated via the coincidence of the elements of 1D DTT matrices and the elements of the products of the matrices included in the factorizations of the DTT matrices for the same \(N\). Further, the computational complexity of the developed algorithms was evaluated, and the results are illustrated in Table 1. In parentheses, we show the difference in the number of operations as a percentage. The minus sign indicates a reduction in the number of operations compared to the direct method, while the plus sign indicates an increase. As can be seen from Table 1, the number of multiplications decreased by an average of 78% for \(N=3\), \(4\), \(5\), \(6\), \(7\), \(8\). At the same time, the number of additions decreased by an average of 5% for the same \(N\). The calculation of the direct matrix-vector product for \(N=4\) additionally requires 8 shifts. After evaluating the effectiveness of the solutions by calculating the number of arithmetic operations required to implement the obtained algorithms, the additional evaluations' memory consumption is provided in Figure 7. The proposed real DTT algorithms required 54% less memory than the direct matrix-vector product. The evaluation of memory costs for the proposed algorithms demonstrates their limitations. However, unlike the evaluation of arithmetic complexity, the memory costs depend on the method of implementing the algorithm and the platform on which the algorithm is implemented. In addition, memory consumption is also affected by the skill and experience of the designer. In general, the proposed algorithms allow both software and hardware implementation. Moreover, both software and hardware implementation can use various approaches and tricks, that lead to certain memory costs, time delays, and hardware resource usage. As for memory, the calculations can be implemented so that the same memory cells are used at each subsequent stage of algorithm implementation if such a possibility exists. The proposed algorithms can be implemented sequentially, in parallel, or in parallel sequentially, depending on the structure and capabilities of the implementation platform. This implementation affects the time delay in obtaining results. \begin{table}
\begin{tabular}{c c c c c c} \hline \hline \multicolumn{1}{c}{**N**} & \multicolumn{2}{c}{**Direct Method**} & \multicolumn{2}{c}{**Proposed Algorithms**} \\ \hline  & **Adds.** & **Mults.** & **Adds.** & **Mults.** & **Shifts** \\ \hline
3 & 5 & 8 & 5 (0\%) & 3 (\(-62\%\)) & 1 \\ \hline
4 & 12 & 8 & 9 (\(-25\%\)) & 2 (\(-75\%\)) & 5 \\ \hline
5 & 18 & 23 & 19 (\(+5\%\)) & 5 (\(-78\%\)) & 6 \\ \hline
6 & 30 & 36 & 27 (\(-10\%\)) & 6 (\(-83\%\)) & 15 \\ \hline
7 & 37 & 44 & 37 (0\%) & 7 (\(-84\%\)) & 22 \\ \hline
8 & 56 & 64 & 53 (\(-5\%\)) & 8 (\(-87\%\)) & 27 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: The number of multiplications, additions, and shifts performed by the proposed algorithms and the direct matrix-vector products. A deeper analysis shows that when implementing the proposed algorithms at the hardware level using maximum parallelization of calculations, intermediate memory in asynchronous mode may not be needed. If we organize pipeline processing, then we have to insert time delays that align the data flow. In this case, additional buffer memory will be needed. Thus, the evaluation of the efficiency of algorithmic solutions in terms of memory requirements, although it somehow characterizes these solutions, is very subjective.