## 1 Introduction  
As the amount of data to be processed by the development of an information technology (IT) industry increases, demands on memory chips with high performance and miniaturization have increased rapidly. Accordingly, studies on next-generation memories based on new structures and materials have been actively conducted [1; 2; 3; 4]. In terms of scaling down the limitation of silicon-based memories, the two-dimensional (2D) van der Waals (vdW) layered transition metal dichalcogenide (TMD) materials have received great attention due to their excellent properties, such as atomically thin thickness [5], high mobility [6], various bandgaps [7], transparency [8], flexibility [9] and free dangling bonds [10]. This enables the potential development of various nano-scaled high-performance devices not only in memories, but also in field-effect transistors [11], photodetectors [12], biosensors [13], diodes [14], and so on. However, most of the studies until now have been mainly based on mechanical exfoliation methods with limitations of flake size and low yield, which restrict their application to commercialized-devices. Thus, synthesis on mass-produced 2D materials for large scale and low cost through the chemical vapor deposition (CVD) method has been proposed [15; 16; 17].  
Among them, there has been a demand for utilizing metallic 2D materials for fabricating metal-insulator-metal (MIM) structures for next-generation memory, resistive switching random-access memory (ReRAM) [18; 19], which has been spotlighted with attractive advantages, such as fast switching speed, low operation voltage, and good scalability, making it one of the most promising candidates for next nonvolatile memory devices [1; 2; 3; 4]. Despite such favorable demands, the sensitive metallic 2D materials were easily degraded due to poor stability in ambient conditions [18]. To address such poor stability of metallic TMDs, passivation or interfacial engineering have been introduced [20; 21; 22]. Nonetheless, to achieve both high device performance and long-term stability is still hugely challenging. Thus, another alternative way to develop both unavoidable native oxide and metallic TMDs is under consideration for new era research. In this respect, the sensitive metallic TMD vdW material can be utilized as resistive memory by forming an ultra-thin native oxide on the surface of host materials under ambient conditions, which can act as a memristive surface memristor with an oxygen vacancy, forming a conductive filament [23; 24].  
In this study, we have experimentally demonstrated the synthesis of NbSe\({}_{2}\) flake by the CVD approach with highly uniform, good shape distribution and layer controller ranging from 2 layers to 10 layers. Furthermore, for the first time, we proposed the NbO\({}_{\text{x}}\)/NbSe\({}_{2}\) heterostructure memristor device based on the native NbO\({}_{\text{x}}\) oxide on the interface of multi-layer NbSe\({}_{2}\) flake. The ultra-thin native NbO\({}_{\text{x}}\) oxide of 3 nm was formed after a period of oxidation time under air condition, which acts as a memristive surface in the Au-NbO\({}_{\text{x}}\)-Au lateral memristor device, in which oxygen vacancies forming a conductive filament. Our NbO\({}_{\text{x}}\)/NbSe\({}_{2}\) heterostructured memristor exhibits a stable memory window with reversible switching processes at a low working voltage of 1 V. Furthermore, the memristor shows a low-resistance-state (LRS)/high-resistance-state (HRS) ratio of about 20 and non-volatile properties via a retention test of 3000 s. Moreover, good endurance without any degradation up to 20 endurance cycles was demonstrated. Our strategy to fabricate feasible memristor for next-generation memory devices suggests new opportunities based on the CVD-grown 2D metallic materials.