# Hard SyDR: A Benchmarking Environment for Global Navigation Satellite System Algorithms +
## 1 Introduction  
Nowadays, many kinds of electronics use satellite positioning systems or GNSSs for positioning and timing purposes [1]. Off-the-shelf GNSS receiver chips are available in a great variety for integration in embedded devices and for different applications, e.g., high-precision, autonomous driving, low-power, etc. The chips are implemented as Application-Specific Integrated Circuits (ASICs) for maximum energy efficiency but, as a result thereof, they allow neither inspection nor modification of their internal features. This is ideal from the point of view of an industry that wishes to protect its intellectual property but obstructs or hinders research, as it makes infeasible the exploration of the processing algorithm design space on this kind of platform.  
Understanding the performance-energy trade-offs in GNSS receivers is becoming increasingly important as GNSS receivers are expected to be integrated into an ever-increasing number of battery-powered embedded devices [2]. Yet today, GNSS receivers remain some of the most energy-consuming sensors [3]. A GNSS receiver's software and power consumption are influenced by several factors such as the user requirements, operating environment, and receiver electronics. Identifying the software configuration thatmaximizes performance and minimizes computational burden is complex and it may differ for each use case.  
Software-Defined Radios (SDRs) are used extensively to test new Digital Signal Processing (DSP) algorithms in all fields of communication, including a GNSS. However, despite how several such tools are available in open-source [4; 5; 6; 7; 8], most of them suffer from at least one of these issues, as reviewed in [9]: lack of maintenance, little-to-no hardware integration, architecture different from an actual receiver, or not being designed for benchmarking. By benchmarking we refer to comparing the performance of various algorithms over a set of Key Performance Indicators (KPIs) of interest. Benchmarking is particularly interesting for our research goal of exploring the GNSS processing chain to find points where energy consumption could be reduced, for example, through approximation.  
The interest in using approximation to increase the performance computing systems has grown with the decline in the historical trends in Moore's law and Dennard scaling [10]. Nowadays, approximation, a term contained in the Approximate Computing (AxC) paradigm, refers to trading off small, constrained computational errors for reductions in the execution time, circuit area, or energy consumption of applications resilient to such errors [11]. While such techniques have been applied extensively to the Machine Learning (ML) and DSP domains [10], we notice a distinct lack of work using AxC in GNSS processing and highlight this as a promising direction for future work.  
The goal of this paper is to provide additional details on our motivations for mixing software and hardware for benchmarking purposes in the field of GNSS processing and to document our conversion progress using High-Level Synthesis (HLS) and _PYNQ_[12] targeting an Field-Programmable Gate Array (FPGA), describing the barriers and ways around them that we have explored, the current architecture, and the initial results from its hardware implementation. We keep our prior focus on a partial conversion that enables collecting hardware-related KPIs of core algorithms implemented on FPGA while keeping benchmarking tasks in a rich and high-level environment. In summary, our contributions are as follows:  
* Highlight the computation-heavy tasks in GNSS processing;
* Design a workflow for porting high-level code to a hardware design;
* Review the advantages/challenges of HLS and PYNQ;
* Provide a hybrid Python-FPGA GNSS receiver benchmarking platform.