## 2 Design Considerations for the SUZI Prototype
### The Architecture of the Control System  
The control system was designed for the 79 segments that had been grouped into 16 zones in order to comply to the recommendations of the EN ISO 14505/2 standard [8]. Each HE was instrumented with five temperature sensors. The control system maintained the manikin surface temperature at a constant setpoint hat was based on the signal that had been recorded by these sensors. A multiplexer interface (Figure 12) collected data from 395 temperature acquisition channels. The main advantage of the interface is that it miniaturizes the electronic system, making it suitable to fit inside the manikin. Figure 11: Response at thermal solicitations over time of TSic TO92 sensors: (a) without calibration, (b) with calibration. Figure 10: Distribution of the TSic T501 temperature sensors on the patches: (a) temperature sensors, (b,c) example of positions of the sensors on the patches. The control part of the thermal manikin uses FPGA technology (Field Programmable Gate Array), which is a semi-conductor that is based integrated circuits using logical elements and I/O (Input/Output) blocks. FPGA can be configured by the user and can be implemented in advanced digital automation systems. Moreover, being a flexible programming language, FPGA provides an easy design for the hardware architecture and for the control concept in relation to the CPUs. The architecture of the control system was designed by the Mechatronics Department of the National Institute of Aerospace Research (INCAS), and it was developed together with the team from the CAMBI Research Center. The proposed solution comprises two systems that were provided by National Instruments (NI) and is based on FPGA technology. The advantage of this solution compared to the use of the microcontrollers is that it represents a significant improvement in terms of its big data collection capacity (up to 400 channels, signal, filters, bias, etc. ), with appropriate signal generation for all 80 channels being represented during the software implementation of the acquisition boards (16). Another advantage is the possibility of using sequential/parallel calculations for the signal generation for all 80 channels--Pulse Width Modulation (PWM) for the transistor, and MOS gates activation in accordance with the output of a neuro-fuzzy controller. Two National Instruments boards (myRIO and sbRIO) were used. Each of them was provided with a sequential computing unit (\(\times 86\)) and a matrix computing unit (FPGA). In order to interconnect the boards with the temperature transducers, a multiplexing interface was developed using HEF 4067B circuits. An interface based on SN7407 circuits was achieved to control and to send commands to the MOS transistors that were used for the execution system. The basic architecture of the manikin system is presented in Figure 13, and the thermostatic system architecture is shown in Figure 14.  
Figure 12: Multiplexer simplified circuit diagram. Figure 13: The basic system architecture of the manikin. The power supplies used for the manikin are shown in Figure 15a(A) presents the main power supply that was used for the heating patches (Mean Well RSP-2400-24 24V/100A 2400W). In Figure 15a(B), the power supply that was used for the myRIO boards (temperature controller) can be seen (TENMA 72010500, 2 Ch, 30 V, 3 A), and in Figure 15a(C), the power supply that was used for the sbRIO boards (temperature acquisitions) is shown (PS3 Axiomet AX-3003D-3). The FPGA software on the sbRIO 9636 board was used to acquire and record the signals from the multiplexer interface, which collects all of the inputs and separates them by shifting the register in the temperature data memory instead of by requesting one input at a time. The software from the myRIO 1900's FPGA creates the Pulse Width Modulation that is used to control the patch surface. The acquisition device processes the data in order  
Figure 14: The thermostatic system architecture.