## 2 Ge Growth Techniques
### Other Ge Growth Methods  
Many attempts to modify the two-step Ge growth procedure have been reported. An UHV-CVD growth of high quality Ge on Si substrate using modified two-step Ge growth method combining with intermediate thin SiGe buffer layers was proposed first by [PERSON] _et al_. in 2004 [26].The buffer region consisted of 0.6-\(\upmu\)m-thick Si\({}_{0.45}\)Ge\({}_{0.55}\) and 0.4-\(\upmu\)m-thick Si\({}_{0.35}\)Ge\({}_{0.65}\) layers. _In-situ_ annealling for 15 min at 750 \({}^{\circ}\)C was carried out to further reduce the dislocation density. The thickness of the SiGe buffer was further reduced by [PERSON] _et al_. [27] by employing a 13 nm-thick Si\({}_{0.5}\)Ge\({}_{0.5}\) buffer layer grown at 450-520 \({}^{\circ}\)C. After post-deposition annealling of 800 \({}^{\circ}\)C/15 min, the Ge layer shows a low roughness of 0.44 nm. [PERSON] _et al_. [28] also reported an epi-Ge layer based on the SiGe buffer method, where the SiGe buffer is grown at low temperature of 350-400 \({}^{\circ}\)C with the thickness of around 30 nm (Figures 2(a,b)). \begin{table}
\begin{tabular}{|c|c|c|c|c|c|c|c|c|c|} \hline \multicolumn{2}{|c|}{**Group**} & \multicolumn{1}{c|}{**Year**} & \multicolumn{1}{c|}{**Ref. **} & \multicolumn{1}{c|}{**Tool**} & \multicolumn{1}{c|}{**Low Temp. **} & \multicolumn{1}{c|}{**High Temp. **} & \multicolumn{1}{c|}{**Aanneal condition**} & \multicolumn{1}{c|}{**RMS**} & \multicolumn{1}{c|}{**TDD**} \\  & & & & **buffer** & **Ge** & **(**)** & **(**)** & **(**)** & **(**)** \\ \hline \multirow{10}{*}{**Si**} & IEF & 2004 & [13] & RPCVD & 400 \({}^{\circ}\)C & \(<\)750 \({}^{\circ}\)C & \multirow{2}{*}{yes} & 750/875 \({}^{\circ}\)C, \multirow{2}{*}{10 cycles} & \multirow{2}{*}{2.2} & \(<\)2 \(\times\) 10\({}^{8}\) \\  & IEF & 2009 & [20] & RPCVD & 400 \({}^{\circ}\)C & 730 \({}^{\circ}\)C & \multirow{2}{*}{yes} & not specified & & \\  & & & 40 nm Ge & 300 nm & & & & & \\ \cline{2-10}  & Intel & 2006 & [21] & RPCVD & 400 \({}^{\circ}\)C & 670 \({}^{\circ}\)C & \multirow{2}{*}{yes} & 900 \({}^{\circ}\)C, 15 min & & \(-\) & \(-\)1 \(\times\) 10\({}^{7}\) \\  & & & 100 nm Ge & 1.2 \(\upmu\)m & & & & & \\ \cline{2-10}  & IBM & 2004 & [22] & UHVCVD & 350 \({}^{\circ}\)C & 600 \({}^{\circ}\)C & \multirow{2}{*}{yes} & 780/900 \({}^{\circ}\)C, \multirow{2}{*}{10 cycles} & \multirow{2}{*}{-} & \(-\)1 \(\times\) 10\({}^{8}\) \\  & Univ. stuttgart & 2005 & [14] & MBE & thin LT & 550 \({}^{\circ}\)C & \multirow{2}{*}{no} & \multirow{2}{*}{-} & \multirow{2}{*}{-} \\  & & & buffer & 1 \(\upmu\)m & & & & \\ \cline{2-10}  & MIT & 1999 & [16] & UHVCVD & 350 \({}^{\circ}\)C & 600 \({}^{\circ}\)C & \multirow{2}{*}{yes} & 780/900 \({}^{\circ}\)C, \multirow{2}{*}{10 cycles} & \multirow{2}{*}{-} & \(-\)2 \(\times\) 10\({}^{7}\) \\  & MIT & 2007 & [23] & UHVCVD & 360 \({}^{\circ}\)C & 730 \({}^{\circ}\)C & \multirow{2}{*}{yes} & 650/850 \({}^{\circ}\)C, \multirow{2}{*}{-} & \multirow{2}{*}{-} \\  & & & 60 nm Ge & 1.1 \(\upmu\)m & & & & & \\ \cline{2-10}  & Luxetera & 2007 & [24] & RPCVD & no buffer & 350 \({}^{\circ}\)C 200 nm & no & & & \\ \cline{2-10}  & Kotura & 2010 & [19] & CVD & 400 \({}^{\circ}\)C & 670 \({}^{\circ}\)C & \multirow{2}{*}{yes} & not specified & & \\  & ETRI & 2009 & [25] & RPCVD & 400 \({}^{\circ}\)C & 650 \({}^{\circ}\)C & \multirow{2}{*}{no} & \multirow{2}{*}{-} & \multirow{2}{*}{1.3} & \multirow{2}{*}{-} \\  & Univ. Roma Tre & 2006 & [18] & UHVCVD & 350 \({}^{\circ}\)C & 600 \({}^{\circ}\)C & \multirow{2}{*}{no} & \multirow{2}{*}{-} & \multirow{2}{*}{-} & \multirow{2}{*}{-} \\  & Univ. Roma Tre & 2006 & [18] & UHVCVD & thin Ge & 1 \(\upmu\)m & & & & \\ \hline \multirow{10}{*}{**Si**} & Unvi.