# Pixel Circuit Designs for Active Matrix Displays
## 3 OLED Pixel Circuits
### OLED Novel Pixel Circuits
#### 3.2.4 Double-Gate TFT OLED Pixel Circuits  
The display frame rate of the display can be increased by decreasing the RC time constant. Conventional methods include increasing the TFT active layer width and reducing the capacitance driving the TFT [85]. The disadvantage of increasing the TFT active layer width is that it reduces the aperture ratios. Reducing the parasitic capacitance of TFTs can be achieved by introducing device structures with self-aligning properties, such as coplanar structures. However, coplanar MO TFTs usually require higher drive voltages, leading to higher power consumption and shorter device lifetime [86]. DG TFTs exhibit better electrical characteristics, such as steeper SS, than conventional SG TFTs [87]. Studies show that the switching speed of DG IGZO TFT circuits with the TG offset structure is more than tripled [88]. Thus, the DG structure can improve the display frame rate. LGD developed the DG structure (Figure 3), which has higher mobility (29 cm\({}^{2}\)/Vs) and a smaller SS (0.2 V/dec) for the BG of the DG TFT than that of the TG. LGD proposed a simple 3T2C pixel circuit (Figure 7d) by utilising the properties of this structure [54]. The driver TFT (T2) is a DG IGZO TFT. The circuit uses the source tracking method to extract the \(V_{\text{TH}}\). The source tracking method works on the principle that the voltage at the source (i.e., the output voltage) follows the gate voltage using the relationship between the source and gate of the TFT. Specifically, the TFT's source voltage will be approximately equal to its gate voltage minus the threshold voltage (\(V_{\text{TH}}\)). This allows the source voltage to follow the input signal over a range of variations. Pixel circuits in OLED displays typically use source tracking to stabilise pixel currents and voltages, ensuring that the display is clear and consistently bright. The circuit employs a more mobile BG in the compensation process, which shortens the \(V_{\text{TH}}\) sampling time (4 to 5 \(\upmu\)s) and enables fast \(V_{\text{TH}}\) compensation. Based on Apple's LTPO pixel circuit, [PERSON], [PERSON] et al. at Seoul National University developed a novel LTPO 4T2C pixel circuit (Figure 7e) utilising a synchronous emission scheme by combining DG LTPS TFTs and LTPO [89]. In this circuit, T2 and T3 are low-leakage-current IGZO TFTs constituting switching TFTs, and T1 and T4 are DG LTPS TFT and SG LTPS TFT devices, respectively, constituting the driving branch. The circuit cleverly regulates the potential high and low between the source and drain of the DG LTPS TFT, thus switching the current flow direction and putting T1 into two different operating states,i.e., positive depletion mode or enhancement mode. In the initial phase, the G-node is discharged to \(V_{\text{SS}}\) using the positive depletion mode. In the compensation phase, the G-node is charged using the enhancement mode, and the G-node potential is changed to \"\(V_{\text{DD}}+V_{\text{TP}}\)\". When the data voltage is transmitted to the pixel, the voltage difference \"\(V_{\text{DATA}}-V_{\text{REF}}\)\" is transmitted to the G-node through C\({}_{\text{VT}}\) capacitive coupling, and the G-node voltage becomes \"\(V_{\text{DD}}+V_{\text{TP}}+V_{\text{DATA}}-V_{\text{REF}}\)\". Therefore, the \(V_{\text{GS}}\) of T1 becomes \"\(V_{\text{DATA}}-V_{\text{REF}}+V_{\text{TP}}\)\", and the current of T1 is determined by \"\(V_{\text{DATA}}-V_{\text{REF}}\)\", which is not affected by the characteristics of T1. In the emission phase, since the OLED is connected to the drain of T1, even if T1 is driven in saturation mode, the degradation of the OLED current and voltage characteristics does not have any effect on the emission current, which improves the uniformity of the display.