# Harnessing FPGA Technology for Energy-Efficient Wearable Medical Devices
###### Abstract  
Over the past decade, wearable medical devices (WMDs) have become the norm for continuous health monitoring, enabling real-time vital sign analysis and preventive healthcare. These battery-powered devices face computational power, size, and energy resource constraints. Traditionally, low-power microcontrollers (MCUs) and application-specific integrated circuits (ASICs) have been used for their energy efficiency. However, the increasing demand for multi-modal sensors and artificial intelligence (AI) requires more computational power than MCUs, and rapidly evolving AI asks for more flexibility, which ASICs lack. Field-programmable gate arrays (FPGAs), which are more efficient than MCUs and more flexible than ASICs, offer a potential solution when optimized for energy consumption. By combining real-time reconfigurability with intelligent energy optimization strategies, FPGAs can provide energy-efficient solutions for handling multimodal sensors and evolving AI requirements. This paper reviews low-power strategies toward FPGA-based WMD for physiological monitoring. It examines low-power FPGA families, highlighting their potential in power-sensitive applications. Future research directions are suggested, including exploring underutilized optimizations like sleep mode, voltage scaling, partial reconfiguration, and compressed learning and investigating underexplored flash and hybrid-based FPGAs. Overall, it provides guidelines for designing energy-efficient FPGA-based WMDs. p 2024 13 4094 1  
for analyzing multi-physiological data is also on the rise. Traditionally, sensors' data are transferred to the cloud for AI-based analysis. However, due to power consumption and privacy-related issues, edge intelligence has been introduced [7; 8; 9], forcing all computations to be executed on a WMD. These growing requirements and associated challenges in the context of computational power and flexibility are summarized below:  
* Integrating multiple or multimodal health sensors for comprehensive physiological analysis while performing edge computing over cloud computing to address privacy and security concerns regarding personal medical data necessitates increased parallelism and computational power for wearable devices. * Incorporation of AI techniques for real-time decision and feedback demands more computational power for accuracy of results, while the continuous evolution of AI techniques and frequent customization of WMD features for individual patients demands flexibility. Additionally, competition among WMD manufacturers to reach users faster necessitates a shorter time to market. Such increasing and rapidly changing requirements demand not only more computational power and parallelism but also system flexibility for reconfigurability, adaptability, and scalability, along with a shorter time to market. In power-sensitive designs, designers face the challenge of meeting these requirements without incurring additional power consumption costs. Therefore, a need arises to increase the computational power and energy efficiency of WMDs by using suitable computing platforms. Computations can be executed using various hardware platforms, including general purpose processors (GPPs), graphic processing units (GPUs), digital signal processors (DSPs), microcontrollers (MCUs), field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) [10; 11]. ASICs have traditionally been used by designers to meet the energy constraints of power-sensitive devices. They are specifically designed and optimized for particular applications, outperforming all other options in terms of both performance and power efficiency. Additionally, they have lower costs for mass production. However, despite their numerous advantages, ASICs also have some limitations:  
* Lack flexibility or reconfigurability;
* Higher development cost and longer time to market.