# High-Temperature Annealing Effects on Atomically Thin Tungsten Diselenide Field-Effect Transistor
## 3 Results and Discussion
The presence of hysteresis in the transfer curve is an indicator of charge traps in a device, so we investigated the hysteresis behavior of our device, as shown in Figure 3b. It is defined as the threshold voltage difference between the forward and reverse gate voltage sweep. Three distinct regions are also visible here; from 300 K to 350 K, hysteresis reduces, indicating the removal of traps and surface contaminants from WSe\({}_{2}\). It gradually increases from 350 K to 590 K and increases exponentially from there onwards. Since hysteresis is an indicator of traps, it can be said that as WSe\({}_{2}\) becomes oxidized beyond 350 K, new traps are created, which degrade device performance by causing a reduction in electron mobility and on/off ratio. Figure 3c presents the off current as a function of annealing, which remains almost constant except at temperatures beyond 630 K, where chemical changes in WSe\({}_{2}\) result in complete loss of gate control. The comparison of Raman (Figure 1d) and AFM measurements (Figure 3d) before and after the annealing give insight into the chemical changes induced by the thermal stress. In the Raman spectrum, the quenching of Raman peaks after annealing points to partial oxidation of WSe\({}_{2}\) and the formation of new traps [44]. The average surface roughness before annealing was 320 pm, which was increased to 450 pm after annealing. The increased surface roughness in AFM measurement also corresponds to the formation of new traps. The observations such as quenching in the Raman spectrum, increased overall conductivity of WSe\({}_{2}\), an increase in p-type behavior and an increase in surface roughness can be attributed to partial oxidation of WSe\({}_{2}\) to WO\({}_{\text{x}}\) as reported in previous studies [45; 46; 47; 48; 44]. Based on these observations, it can be assumed that in our WSe\({}_{2}\) device, the WSe\({}_{2}\) became oxidized during high-temperature annealing. However, this could be one of the reasons, and the exact nature of chemical changes still needs to be established. Figure 3: (**a**) The field-effect mobility of the WSe\({}_{2}\) device as a function of annealing temperature. (**b**) The hysteresis of the device as a function of annealing temperature. (**c**) The off current of the device as a function of annealing temperature. (**d**) Surface roughness of WSe\({}_{2}\) as measured by AFM before and after annealing. Thus far, we have discussed the positive gate region of Figures 2 and 3 mostly. For the negative region, the mobility and on/off ratio do not vary substantially with the annealing indicating that the hole transport is not limited by the channel imperfections. As shown in Figure 2, the bottleneck in hole transport is the Schottky contacts. Ti is used as a contact metal that can form a relatively large Schottky barrier with the valence band of WSe\({}_{2}\), thus limiting the hole transport. This Schottky barrier results in low mobility and low current in the negative gate region and cannot be improved with annealing. Therefore, annealing does not affect the hole transport other than at temperatures beyond 590 K, where chemical changes in WSe\({}_{2}\) result in the channel becoming accumulated with the carriers completely and also results in a reduction in the effective Schottky barrier. This reduction results in enhanced hole current and hole mobility, as seen in Figure 3.