# Effects of Fractional Time Delay as a Low-Power True Time Delay Digital Beamforming Architecture
## 6 Analysis  
The analysis performed is based on simulated results and FPGA place and route due to the difficulty of empirical testing. As most articles in the literature are based on simulation and place-and-route data, this article aims to provide a valid comparison to the literature and provide a path towards fabrication and experimental verification. Typically, programmable FIR filters can reduce the number of multipliers required by exploiting the symmetry of the sinc impulse response. For example, sinc functions can be designed such that coefficients of zero always appear in the same location. As a result, these multipliers can be removed from the design. Additionally, coefficients of equal magnitude can use the same multiplier, only needing a sign change. However, the mechanism of fractional delay outlined in Section 2 does not lend itself to these kinds of optimizations. When the sinc function is adjusted in the time domain, these symmetries no longer exist, as demonstrated in Figure 1b. Bandwidth is also reduced when compared to [10] due to their multi-rate architecture. The multi-rate architecture increases bandwidth at the expense of increased complexity. In order to keep power consumption as low as possible, this work targets a single-rate implementation with the maximum possible bandwidth and throughput. The proposed architecture is not designed to be an all-encompassing solution. Instead, it provides engineering trade-offs for power and thermally constrained SATCOM applications at the cost of beamforming performance and bandwidth. When comparing the proposed architecture to similar peer-reviewed designs, these trade-offs can be highlighted. [PERSON] et al. design a filter using a floating point coefficient structure [19]. While this should produce the least possible quantization error, the design is significantly pipelined to keep resource consumption competitive, and thus has high processing latency, from 11.4 us to 0.220 us, depending on filter configuration. Additionally, this filter is not designed for fractional delay which contributes to its low throughput. [PERSON] et al. produce a paralleled Farrow architecture with impressive bandwidth and power consumption but requires approximately 350% additional resources compared to this work [16]. These comparisons show that the VFD filter in this work boasts minimum power and resource consumption, at the expense of some filter bandwidth. To further reduce resource and power consumption, memory optimizations could be performed by reusing filters with an equal magnitude of delay, reducing the number \begin{table}
\begin{tabular}{c c c c c c c c c} \hline \hline
**Work** & **Slices/CLBs** & **LUT** & **LUTRAM** & **BRAM** & **FF** & **DSPs** & \
\begin{tabular}{c} **Bandwidth** \\ **(MHz)** \\ \end{tabular} &
\begin{tabular}{c} **Dynamic** \\ **Power (mW)** \\ \end{tabular} \\ \hline This Work & 298 & 326 & 0 & 0.5 & 2106 & 29 & 117.5 & 67 \\
[10] & - & 8393 & 952 & 0 & 10,489 & 6 & 241.6 & 722 \\
[19], m = 4 & - & 1501 & 0 & 6 & 1131 & 16 & - & - \\
[16], Ex. 2 & 748 & - & - & - & - & - & 226.95 & 68.57 \\
[17] & 17,108 & 61,342 & 11,292 & 0 & - & - & 12.79 & - \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Resource comparison of selected designs. of entries required by half. Further optimizations could be conducted by determining the minimum required coefficient fixed-point resolution needed to continue minimizing quantization error. If less bandwidth is needed, the length of each filter could be reduced, further eliminating LUT memory requirements, as well as multiplier count. Future VFD filter research that targets increased filter bandwidth whilst maintaining comparable resource utilization to the proposed architecture could produce a promising well-rounded solution to future SATCOM applications. Additionally, with the development of 6G wireless standards, there is research pressure for architectures that can cover the wide bandwidths of the 6G network whilst maintaining minimum power for satellite applications [28].