## 6 Discussion  
Integrating LET and TDMA models in multicore systems represents a significant advancement in managing inter-core communication. This study demonstrates that combining these methodologies can effectively address the inherent challenges of synchronization and data consistency in real-time critical systems. At first glance, it is evident that tasks on different cores significantly benefit from the implementation of the LET model, ensuring temporal predictability with fixed operation times for read and write operations. According to the results obtained, there is no data loss when maintaining constant read/write operation rates. However, a variable that still requires improvement is data transfer latency when implemented in multicore systems. The LET model faces challenges due to variability in initialization and execution times on each core, as well as in dispatcher times, which can introduce variable latencies in data communication between cores. These challenges depend on the application and the operating system, especially in heterogeneous core configurations.  
The proposed method combines LET with TDMA-managed buffers to mitigate variable latency issues in inter-core communication. This is achieved by synchronizing the read operation of the consumer task on one core with the write operation of the producer task on another core, ensuring each task has defined access times to the communication channels. According to the results obtained, it is evident that the LET model greatly benefits from integration with TDMA when applied in multicore systems. This integration not only reduces variability in response times but also improves the system's consistency and predictability. Fixing the latency also makes the system more deterministic, as variability in read and write operations can affect the performance of time-critical algorithms.  
TDMA also provides efficient resource usage since global buffers can be shared across several tasks from different cores due to the temporal isolation provided by this scheme, which allows for the reuse of buffers across time slots while eliminating waiting times introduced by synchronization mechanisms, such as semaphores or spinlocks. Considering various example scenarios such as producer-consumer tasks, real-time data acquisition in industrial control systems, and synchronized data transmission in telecommunications, buffer usage can be optimized. For instance, in a scenario with four pairs of tasks with execution periods that are the same or multiples, buffer usage can be reduced by up to 75% if all pairs can use the same buffer if the required buffer sizes are the same or lower  
Figure 13: Calculation of time differences between write and read operations between cores using a 16-bit shared buffer with the LET-TDMA method implementation. This plot highlights the low variability between data transfer operations, which directly impacts the latency calculations.  
than the maximum buffer size. Similarly, in industrial control systems, synchronization of sensor data acquisition and actuator control can be enhanced using these principles.  
In microcontrollers, defined operation times and the absence of resource locks may lead to lower energy consumption, but that is not the focus of this work. As mentioned at the beginning of this document, low latency and determinism are crucial to ensuring the safety of critical embedded systems. These systems, found in the automotive and aviation industries, require high predictability and consistency in data transfer to guarantee system performance and safety. Integrating LET with TDMA provides a strong and efficient solution, ensuring that tasks distributed across different cores can communicate predictably and without data loss, thus optimizing overall system performance.