# On Improving Reliability of SRAM-Based Physically Unclonable Functions
## 5 Results and Case Studies
### Design Area/Performance Comparisons  
In this subsection, we present a design example along with estimates on other metrics. The 45 nm technology Nangate open cell library [29] is used for all area calculations. We use 4-bit UP/DOWN for the estimation, which can correct initial error rate of 15% to less than an order of \(10^{-6}\). First, we obtain the statistics on the number of trials required for decision using the UP/DOWN counter in the presence of noise (which is related to the analysis presented in Label (5)). Ten thousand SRAM cells were instantiated with PVT variations modeled as Gaussian threshold voltage, \(V_{thr}\), variations with 3\(\sigma\) value of 150 mV. The voltage supplies connected to the source of \(M_{5}\) and \(M_{6}\), of Figure 4 were each used as noise sources. This is done to simulate the differential thermal noise that introduces errors across various evaluations of an SRAM cell [31]. One hundred such outputs were generated with varying supply noise, and the outputs were fed to a 4-bit UP/DOWN counter. The histogram for the number of outputs that each SRAM cell needed to reach saturation in the presence of supply noise is shown in Figure 10. The results indicate that the majority of the cells (99.7% or \(\pm\)3\(\sigma\)) take \(\leq\)50 counts, for a 4-bit UP/DOWN counter, to reach a decision. Hence, if a 4-bit UP/DOWN counter is used, 50 counts are adequate to cover the majority of the cells. This empirical number for trials is used in key generation time calculations below. To make a comparison with a fuzzy logic based implementation, we chose the fuzzy extractors proposed by [PERSON] et al. [32] for generating a stable key from SRAM PUFs, given 15% error probability. The authors make use of concatenated codes. Based on the results presented in the work, we estimated the areas for Golay, \(G_{23}\), and Reed Muller, \(RM\), decoder implementations, where the code parameters were set to yield a final error rate of \(\leq\)10\({}^{-6}\). The initial number of SRAM cells needed were 3105 and 5040 cells for Golay and Reed Muller implementations, respectively, to generate 171 stable bits. For this comparison, we do not consider the hashing function area from the work. Considering that 5% of the total cells are beyond correction by our scheme, our implementation requires a minimum  
Figure 10: Histogram of the number of times that a SRAM cell was read before saturation. of 180 PUF cells to get 171 stable bits. We consider 192 cells (\(\in\)16\(\mathbb{Z}\)) for ease of implementing our multiplexing solutions. The total area of the PUF system comprises an area of the PUF cells, the area for UP/DOWN counter, selection multiplexers and the clock generator/controller logic. For calculating the PUF cell area, we approximated a 50% overhead for our design over the regular 6T SRAM cell area used for previous ECC solutions [32]. In addition, the different multiplexing options are built using the 2:1 Muxes from the Nangate library [29], and their areas are obtained accordingly. Table 2 tabulates all the results and shows that our implementation offers 1.7\(\times\)-2.9\(\times\) range of improvement in area. The penalty for fuzzy logic implementations comes from the large number of SRAM PUFs needed to generate reliable keys. However, for high reliability systems, our voting scheme can be combined with fuzzy extraction and ECC based schemes to create efficient hybrid techniques. [PERSON] et al. [30] have shown significant timing improvements compared to fuzzy logic-based works with data obtained from test chips. Hence, we compare our work against theirs for key generation time. The authors load mask data, termed _reliability map_, and generate the key by obtaining 171 bits. Similar to their work, we consider loading mask information in 4-bits/cycle sequence. Hence, in our case, for 192 bits, we need 48 cycles. We take 50 cycles as the maximum number of times that each PUF cell is read.