## 4 Architecture of Software Receiver
### Software Architecture
#### 4.1.2 Software Correlator  
In the software correlator, the code and carrier of IF signals are wiped off. The 16-bit complex data (I/Q) are correlated with local code and carrier replica. Due to its high computational complexity, the software correlator is programmed in assembly using SIMD instructions. Based on the SIMD library correlator in Hecker and Garrison [15], an assembly code architecture optimized for the specific code and carrier tables are created prior to execution. The structures of code, carrier table and input IF data are depicted in Figure 6. These tables are formatted as 16-bit short integers. The code table is made by \(N_{s}+2P_{s}\) phase for each PRN code where \(P_{s}\) is the number of samples between Early-to-Prompt spacing and \(N_{s}\) is the number of samples in one ms. The carrier table is divided by sine and cosine tables and starts from zero phase for each Doppler frequency. I and Q of IF data are bundled together to make a pair. The correlation operation is done between IF data with the nearest sample to zero carrier phase and local Early/Prompt/Late replicas according to code phase measurement. Figure 6: Structure of code table, carrier table, and IF data used in the software correlator. The correlation operation with complex IF data is performed as follows:  
\[ \begin{split}&\underline{CI}+j\underline{CQ}=\sum_{k=0}^{N_{x}-1} CO_{k}\big{(}CS_{k}+jS_{k}\big{)}\big{(}I_{k}+jQ_{k}\big{)}\\ &\underline{CI}=\sum_{k=0}^{N_{x}-1}CS_{k}\times CO_{k}I_{k}-S_{k }\times CO_{k}Q_{k}=\sum_{k=0}^{N_{x}-1}CI_{k}\\ &\underline{CQ}=\sum_{k=0}^{N_{x}-1}CS_{k}\times CO_{k}Q_{k}+S_{k }\times CO_{k}I_{k}=\sum_{k=0}^{N_{x}-1}CQ_{k}\end{split}  \tag{11}\]  
where \(\underline{CI}\) and \(\underline{CQ}\) are the real part and imaginary part of correlator output, respectively. The other terms are defined in Figure 6.  
Using SIMD instructions and 128-bit-wide SSE registers [21], one can simultaneously operate on eight 16-bit-wide words by a single instruction. For example, in the step 3 in Table 2, the complex data format for executing the parallel multiply-and-add (PMADDWD) instruction is depicted in Figure 7. In total, eight multiplications and four additions are performed in one instruction cycle for processing two complex IF samples, so it would reduce computational load approximately 12x. An assembly code of the software correlator, which is compatible to SSE2, SSE3, and SSE4.1 [21], is programmed and shown in Figure 8 as an example. This code is built upon the library in Heckler and Garrison [15]. Additionally, instructions from the new version of SSE such as interleaving and parallel addition are incorporated to further increase performance. This code implements the inner part of the summation in Equation (11) and follows the operation procedure in Table 2. \begin{table}
\begin{tabular}{l l l} \hline \hline
**Step** & **Description** & **Operations** \\ \hline
1. & Multiply I and Q of IF data by PRN code and interleave the result & 1 multiplications 2 interleaving \\ \hline
2. & Arrange Sine and Cosine tables in complex data format & 4 interleaving \\ \hline
3. & Perform complex multiplication by multiply-and-add & 2 multiply-and-add \\ \hline
4. & Accumulate the complex results & 3 additions 1 interleaving \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Procedure to implement software correlator with complex IF data for a single sample. Figure 7: Complex data format for executing PMADDWD instruction and operations inside PMADDWD. processed in parallel within 30 instructions. This code is the key component to process 60 tracking channels in real time and thus its complete description has been included. In order to avoid performing correlation across data bit transition point, two ms long buffers are used in parallel and one ms segment is selected to perform the correlation. The selection approach is to use the code phase measurement to set the starting sample of correlation window.