## 3 Results and Discussion
### Device Structure Dependence of RTN
#### 3.6.1 Buried Channel MOSFETs  
Figure 23 shows the structure of buried channel MOSFETs studied in this work. To discuss the effects of n-Si layer widths and the distance between the channel and \(\mathrm{SiO_{2}/Si}\) interface, n-Si layer width was varied to be 0, 10, 25, and 60 nm for standard, narrow, middle, and deep samples formed by arsenic ion implantation, respectively, and the high-energy ion implantation created not only a deep channel, but also a wide channel in the vertical direction to the \(\mathrm{SiO_{2}/Si}\) interface. Figures 24 and 25 show the Gumbel plots of \(\mathrm{V_{RMS}}\) for the standard, narrow, middle, and deep samples and the \(\mathrm{V_{BS}}\) dependance of \(\mathrm{V_{RMS}}\) for the narrow, middle, and deep samples, respectively [57; 65].  
Figure 22: (a) Histogram of the \(\mathrm{V_{RMS}}\) difference between continuous on-state and periodically off-state (\(\Delta\mathrm{V_{RMS}}\)), and (b) schematic waveform of RTN in continuous on-state and periodically off-state.  
the channel pushes onto the SiO\({}_{2}\)/Si interface, and the channel thickness decreases. The buried channel is extremely effective for decreasing RTN because the channel is separated from SiO\({}_{2}\)/Si interface and the wide channel becomes difficult to form the percolation path. Furthermore, the buried channel MOSFET in the isolated well was employed to evaluate V\({}_{\text{BS}}\) dependance [64], and V\({}_{\text{BS}}\) can be varied from 0 V in this structure because the well voltage can be changed freely. The gate length and gate width of the MOSFETs are 0.32 and 0.32 \(\mu\)m, respectively, I\({}_{\text{DS}}\) was 1 \(\mu\)A, vs. was 1.5 V, and V\({}_{\text{well}}\) of the normal well and isolated well were 0 and 1.5 V, respectively; thus, V\({}_{\text{BS}}\) was set at \(-1.5\) and 0 V for the normal well and isolated well, respectively.  
Figure 26 shows the Gumbel plot of the V\({}_{\text{RMS}}\) for the buried channel and surface channel MOSFETs with the back bias conditions of 0 and \(-1.5\) V. V\({}_{\text{RMS}}\) of the buried channel MOSFETs at V\({}_{\text{BS}}=-1.5\) V is significantly less than those of surface channel; however, that at V\({}_{\text{BS}}=0\) V is larger than those of the surface channel even though those of the surface channel do not depend on V\({}_{\text{BS}}\). Figure 27 shows the normal probability plot of the subthreshold swing for the same sample of Figure 26. The subthreshold swing of buried channel MOSFETs with V\({}_{\text{BS}}=0\) is much smaller than the others. A strong relationship between the subthreshold swing and V\({}_{\text{RMS}}\) has been reported [64]. The result strongly suggests that the increase in V\({}_{\text{RMS}}\) is enlarged by the physical origin, which increases the subthreshold swing, and the origin is an enhancement of the percolation path formation [64]. Note that RTN has to be enhanced by a minimal small gate control effect on the channel. Furthermore, the variability of the threshold voltage is increased using the buried channel MOSFETs; thus, we cannot introduce buried channel MOSFETs when the fixed pattern noise is critical for device performance.  
Figure 27: V\({}_{\text{BS}}\) dependance of V\({}_{\text{RMS}}\) for the narrow, middle, and deep samples.