## 3 Design Concept and Operation of Enhanced-ADALINE Algorithm
### Integration of ADALINE, HSF, and Averaging Function for Generating Reference Current  
Figure 4 provides a block diagram showing the particulars of the enhanced-ADALINE algorithm. As clearly illustrated, the ADALINE and HSF synchronizer modules as presented in Sections 3.1 and 3.2, respectively, are important constituents of the proposed algorithm. In the enhanced-ADALINE algorithm, three ADALINE modules are applied (one for each phase) to extract the magnitude of fundamental load current component from each phase of the three-phase system. From the extracted magnitude for each phase, the mean value is taken so that equal magnitude can be distributed to each phase to ensure balanced operation of the three-phase system. Note that this is important especially when unbalanced load is connected to the system as the load current will be unbalanced in terms of magnitude.  
In addition, to further enhance ability of the proposed algorithm, an averaging function is added to filter out higher frequency elements (ripples) from the extracted magnitude. In a highly harmonic-distorted environment, the extracted fundamental magnitude is most likely to contain a high number of ripples which would require an additional filter to minimize them. In this aspect, the added averaging function will perform according to the following expression:  
\[I_{Lfund\_mag\ (average)}=\ \frac{1}{3T}\ \int_{0}^{T}\Big{(}I_{La\ fund\_mag}+\ I_{ Lib\ fund\_mag}+I_{ LC\ fund\_mag}\Big{)}dt, \tag{10}\]  
where \(I_{La\ fund\_mag}\), \(I_{Lib\ fund\_mag}\), and \(I_{LC\ fund\_mag}\) represent the magnitude of fundamental component extracted from each phase, \(I_{Lfund\_mag(average)}\) is the resulting average value, and \(T\) is the period of the processed signals. At this stage, the proposed algorithm is said to be ready for generating reference current signal.  
For generating reference current signal, the proposed algorithm needs to work closely with all the other algorithms in the control system. As described in Section 2, \(I_{dc}\) and \(I_{balance}\) are needed to regulate all dc-side voltages. In this regard, \(I_{dc}\) is estimated by using a PI controller (PI\({}_{1}\)) which minimizes the voltage difference \(e_{v1}\) between reference dc-link voltage \(V_{dc,\ ref}\) and the total instantaneous dc-link voltage (\(V_{dc1}+\ V_{dc2}\)). Similarly, another PI controller (PI\({}_{2}\)) is applied to estimate \(I_{balance}\) by minimizing the voltage difference \(e_{v2}\) between the two split dc-link capacitors. In a mathematical manner, the dc-side voltages control approaches can be expressed as  
\[I_{dc}=\ k_{p1}e_{v1}+\ k_{l1}\int_{0}^{t}e_{v1}dt, \tag{11}\]  
\[I_{balance}=\ k_{p2}e_{v2}+\ k_{i2}\int_{0}^{t}e_{v2}dt, \tag{12}\]  
\[e_{v1}=\ V_{dc,\ ref}-(V_{dc1}+\ V_{dc2}), \tag{13}\]  
\[e_{v2}=\ V_{dc2}-\ V_{dc1}, \tag{14}\]where \(k_{p1}\), \(k_{i1}\), \(k_{p2}\), and \(k_{l2}\) are the constant values that respectively symbolize proportional \(k_{p}\) and integral \(k_{i}\) gains for PI\({}_{1}\) (first PI) and PI\({}_{2}\) (second PI) controllers. The gain values are set to be 0.3, 2, 0.02, and 0.1, respectively [22].  
Finally, by utilizing all the available signals, the reference current signal \(i_{S,ref}\) can be generated according to  
\[i_{S,ref}=\Big{(}I_{Lfund\_mag(average)}+\ I_{dc}\Big{)}sin(\omega t\ +\ \theta)\ +\ I_{balance}, \tag{15}\]  
where \(sin(\omega t+\theta)\) is the synchronization signals (unity sine function) delivered by the HSF synchronizer module.