## 4 Optical CAM Technology
### Ternary CAM Cell and Matchline Architecture  
In this section, we move from the all-optical B-CAM cell to the presentation of the all-optical T-CAM cell architecture and its interconnection in an all-optical T-CAM row arrangement targeted for  
Figure 6: Experimental results of the optical CAM cell demonstration at 10 Gb/s: Comparison operation: time traces (200 ps/div) of (**a**) CAM cell stored bits; (**b**) search bits; (**c**) CAM outputs and (**d**) output eye diagrams (15 ps/div). Write Operation: Time traces at 10 Gb/s (300 ps/div) their corresponding eye diagrams (20 ps/div) of (**e**) the _Set_; (**f**) the _Reset_; (**g**) FFOut1 and (**h**) FFOut2; and BER measurements of (**i**) the Content Comparison and (**j**) the Write operation. use in AL tables such as the one presented in Figure 1a, enabling the essential subnet-masked operation needed in modern router applications. The proposed optical T-CAM cell architecture comprises two optical FFs and an optical XOR gate; the 1 st FF is used for storing the actual T-CAM cell contents and the 2 nd FF for implementing the \"\(X\)\" state support. The XOR gate, on the other hand, enables the T-CAM cell search capability. Moving to the complete row arrangement, the proposed all-optical T-CAM row architecture comprises an indicative number of four T-CAM cells followed by a novel WDM-encoded ML design, providing a comparison operation for complete 4-bit optical words. In order to achieve this, an AWG is utilized to multiplex all the T-CAM cell XOR outputs in a common multi-wavelength row output signal that determines whether a success comparison result is achieved throughout the complete T-CAM row. Figure 7 presents the proposed all-optical T-CAM cell consisting of two FF modules and one XOR gate. The XOR gate is necessary for realizing the comparison operation between the _search-bit_ and the value stored in the T-CAM cell. The lower FF is named XFF and is necessary for implementing the third state \"\(X\)\", while the upper FF is named T-CAM Content FF (TCEFF) and stores the actual content that can be either a logical _\"0\"_ or _\"1\"_. When a subnet-masked operation is desired, the XFF's content equals 0, implying that the TCFF respective content has to be ignored. As such, the respective XOR operation does not take into account the TCFF content and the comparison result is equal to a logical _\"0\"_, independently of the value of the _search-bit_. On the contrary, in the case where the TCFF value has to be taken into account, the XFF content is equal to a logical _\"1\"_ and the XOR output depends upon the comparison between the TCFF value and the respective _search-bit_. For both FFs, the previously described _Set_/_Reset_ pulse mechanism is used in order to switch between the two possible logical states. The XFF and TCFF are each powered by two CW laser beams: \(\lambda e\) is used as the input signal at the right-side switches of both XFF and TCFF, while a CW signal at \(\lambda a\) and \(\lambda f\) is launched as the input signal at the left-side SOA-MZI switches of the XFF and TCFF, respectively. As such, the content of the XFF and the TCFF gets encoded on \(\lambda a\) and \(\lambda f\) wavelengths as the FF output signals, respectively. The XFF output signal is then fed as the input signal at the XOR gate, after being filtered in an OBF. On the other side, the TCFF output at \(\lambda f\) enters the XOR gate as the control signal of the upper-branch SOA. The lower branch SOA of the XOR gate is being fed with the input _search bit_ that acts as the second control signal. In this way, the TCFF output and _search bit_ values get logically XORed and the comparison result gets imprinted on the XFF output signal at \(\lambda a\), which is used as the XOR input. Whenever the T-CAM cell is in the \"\(X\)\" state, the XFF output is equal to a logical _\"0\"_, resulting in a logical _\"0\"_ at the final XOR output, irrespective of the TCFF and _search bit_ values.