# Hardware Prototyping and Validation of a W-\(\Delta\)DOR Digital Signal Processor
## 2 Thales Alenia Space Transponder Platform  
The core of the novel Wideband \(\Delta\)DOR (W-\(\Delta\)DOR) will be integrated in the new Thales Alenia Space (TAS) Transponder Platform based on the TAS deep-space transponder architecture and depicted in Figure 3.  
This transponder has been conceived as a common platform, composed of common blocks coupled with custom parts. The common platform includes: the Digital Section (ASIC, FPGA, DACs, ADC), the Transmitter Radio Frequency (RF)/Intermediate Frequency (IF) section and the Receiver RF/IF section. The custom parts include: the DC/DC Converters, the Programmable Read-Only Memory (PROM) Interface, the RF Front-End and Back-End sections and the Interface Card. The platform approach allows the TAS transponder to be very flexible and reconfigurable  
Figure 2: Systematic error in \(\Delta\)DOR measurements.  
in terms of physical modules and mapped cores on the internal FPGA. Different missions will require different sets of DC/DC Converters, programmable read-only memories, interfaces and RF front-end and back-end. Conversely, the transponder core, composed of the digital and RF/IF sections, will remain unchanged [11; 12]. The new transponder named Flexible Autonomous Transponder (FAT) has been derived from the TAS transponder heritage regarding Deep-Space, Radio-Science, Near Earth and Secure Spread-Spectrum TT&C product lines. The different functions are implemented in the following modules:  
* Dual Band Receiver Analogue Module
* Digital Module
* X-Band Transmitter Analogue Module
* Ka-Band Transmitter Module
* Baseplate Module  
The FAT architecture has been conceived to support, by means of the same hardware, different mission scenarios and applications. For example, deep-space missions such as BepiColombo and JUICE feature regenerative ranging with low chip rate (3 Mcps) and radio science experiments with high chip rate regenerative ranging (24 Mcps) for accurate ranging measurements. The FAT digital core is conceived around the Ka-band Transponder (KaT) ASIC that fully supports all required modulation schemes and processing needs. The KaT ASIC has been developed in the frame of BepiColombo/MORE program, in which a new digital platform has been developed by TAS aiming to cover all TT&C modulation standards (spread-spectrum, FM, and PM) and mission profiles, from deep-space to near-Earth.  
Moreover, it includes a powerful microprocessor, i.e., the LEON2-FT [13], implementing the first System-on-Chip (SoC) devoted to on-board TT&C missions. Through the AMBA bus, the LEON2-FT is able to configure and control the different DSP functional blocks such as: carrier processing (that receives samples from the ADC), telecommand processing, ranging channels, telemetry block (that receives telemetry data from the on-board computer for down-link modulation), DDS parameters and functions for the Rx and Tx blocks. Moreover, through the memory bus, the KaT embedded microprocessor can access external devices for configuration and control. In particular, the LEON2-FT can access the FPGA where the novel W-ADOR core is loaded.  
Figure 3: TAS-I transponder platform architecture.