# Determination of Cycle to Cycle Battery Cell Degradation with High-Precision Measurements
## 3 Experiments
### Determining Leakage Charge and Calendrical Aging  
The resulting capacity degradation of the high-SoC-scheme and the C/x-scheme measurements are shown for comparison in Figure 14 where the charge and discharge capacity curves of both schemes are displayed. Figure 14: Capacity degradation for the C/x-scheme measurements with a cycling current C/4, C/12 and C/36 and high-SoC-scheme at 40 °C. With the C/x-schemes, almost no leakage charge or charge cycling losses occur. The high-SoC-scheme degrades faster than the C/x-schemes indicating significant calendrical aging and also has a significant amount of leakage charge. Figure 13: Capacity degradation at cycling current C/4, C/12 and C/36 at 40 °C. This capacity degradation in the C/x-schemes corresponds to the cycle aging of the cells. Because all aging rates are approximately equal at given cycle, it is concluded that the cells have a more or less current-independent cycle aging rate (at least for the selected magnitude of the cycling currents). What is striking about the C/x-scheme results in Figure 14 is that, for all cycling currents, in the charging interval, the line remains almost horizontal. A detailed examination of these intervals can be found in Figure 15.  
As previously demonstrated in Section 3.3, all C/x-scheme measurements show the same cycle aging. Therefore, it is assumed that all C/x-scheme measurements have the same charge capacity loss at the same number of cycles. Where the measurements differ is in their amount of leakage charge because this depends on the measurement duration. Accordingly, the leakage charge in the C/36 measurement is 9 times bigger than in the C/4 measurement--this is illustrated for a general case in Figure 15. Because, even for the longest lasting C/36 measurement in the charging interval, the leakage charge is negligible (slope is almost horizontal and not inclined), it is also negligible for the shorter C/12 and C/4 measurements. Because we could demonstrate that virtually no leakage occurs, the C/4 measurement can be used to show that the charge capacity loss is also negligible. This is because the curve in the charge-discharging intervals (magenta arrow) is also horizontal. This explains why the leakage charge and the charge capacity losses are almost non-existent for all the C/x-schemes. Since, as shown in Section 3.3, the calendrical aging of the C/x-scheme with an average SoC of 50% is negligible, the question arises as to what the calendrical aging looks like when operating cells at higher average SoC. Therefore, the cells are cycled according to the high-SoC-scheme shown in Figure 9 with an average SoC close to 100%. It is found that the capacity loss for the high-SoC-scheme takes place much faster than for the C/x-schemes (see Figure 14). In addition, it can be seen that the leakage charge losses are also very pronounced in the high-SoC-scheme (which can be seen from the incline between discharge and charge as described in Section 3.2) in contrast to the measurement results of the C/x-scheme. As mentioned in Section 3.3, it is assumed that the high-SoC-scheme has the same cycle aging as the C/x-scheme. This means that the high-SoC-scheme differs only from the C/x-scheme due to calendrical aging. This calendrical capacity degradation is shown in Figure 16 indicated with the cyan area. If the calendrical charge loss is subtracted from 1 (which is the normalized initial capacity), the dashed cyan curve is obtained. This dashed cyan curve displays the capacity degradation of the high-SoC scheme purely by calendrical aging. Figure 15: Here, two charging cycles of the C/x-scheme are compared in terms of leakage charge and charge capacity loss. For different C/x-cycling-schemes, the degradation during charging is the same for different cycling rates at the same cycle. However, the leakage charge increases with the measurement time. Because it was previously shown that no cycle-related charge capacity loss occurs when cycling with the C/x-scheme, it is assumed that this is also the case with the high-SoC-scheme.