## 1 Introduction  
During the last few decades, power electronic devices are more often used at residential houses, industries, including electric vehicles, portable battery-operated electronic equipment, photovoltaic systems, energy storage systems, variable-speed air conditioners, etc., [1]. Therefore, increasing demand for power electronic devices also leads to new challenges to be solved or to solutions to be improved; such as power losses, power efficiency, voltage, current regulation, and high operating frequency. Moreover, these power electronic devices with high-efficiency requirements and low noise dependence use DC-DC converters in order to satisfy the requirements. To fulfill these demands, DC-DC converters must operate at high efficiency over a wide load range. In other words, in order to achieve high power density, the high operating frequency is required. Thus, it is necessary to select the correct inductance and capacitance values, as explained in [2, 3]. Yet, the higher and higher required response speed in DC-DC converters (as explored in [4]), lead to large overshoots in the inductance current at the initial state. Hence, Ref. [4] explains that the issue can be dealt through current limiter hardware elements, which adds cost to the converter implementation and adds parasitic elements that may reduce the efficiency of the circuit. Nevertheless, knowing that for a DC-DC converter the resistance, inductance, and capacitance elements, are all key components for the ripple and efficiency performance of the converter, a correct inductance selection is the most critical part of designing switching converters; since, as discussed in [5], the inductor is the circuit element responsible of the operating mode in terms of the duty cycle and the switching frequency of the converter, where most of the applications require to operate in Continuous Conduction Mode (CCM), which implies that the inductor does not fully discharge during the switching-off time (as discussed in [5,6]). Hence, in many of the typical design methodologies (as validated in [7]), the mathematical expressions for a correct inductor selection are focused on a given expression in the form of a mathematical inequality, which looks for the minimum value of the inductor without considering the one that would represent its optimal parameter. Nonetheless, the parameter selection is a contradictory optimization issue, because in order to work higher switching frequency, the inductor value should be lower, leading to lower design sizes and with lower Equivalent Resistance Value (ESR); which is the parasitic element referred to as \(R_{L}\) in this work. Additionally, as explained in [8], as the current in the load decreases the converter reduces the duty cycle, causing an undesired behavior when approaching the Discontinuous Conduction Mode (DCM). Therefore, when low currents are required, the inductor value must be bigger (as detailed in [6]). Thus, in order to reduce power losses, an efficiency optimization methodology is required to find achieve a correct design, as discussed in [9]. Notwithstanding, the novel designs studied in [8,10,11] show dynamic improvements in the performance and efficiency of energy conversion (focused in their particular applications); still, an optimal designing method of topologies is not specified, which is a constant even in classical topologies (as shown in [6]). The above, because DC-DC converters are usually designed thinking about fulfilling the operating mode requirements (CCM or DCM), power requirements, and even thinking about a maximum allowed ripple; however, there is no certainty of having an optimal design regarding the selection of the components (particularly the Inductance). On the other hand, Ref. [12] shows a design methodology for a non-inverting DC-DC converter, with the objective of charging a supercapacitor using the energy flow from the Inductance.