## 7 Hardware Complexity Optimization for MIMO
### Single-Stage Architecture  
In this subsection, we discuss the complexity optimization using the single-stage architecture of CD and DMGD joint compensation. The equalization of CD and DMGD can be performed together using FFT for efficient implementation of convolution, as a favorable structure for digital coherent receivers, for sparing the CD compensation modules and, hence, reducing the total DSP implementation complexity [43].  
The schematic diagram of a coherent receiver for the compensation of the linear channel effects such as CD and DMGD is exemplified in Figure 26. To attain a lower computational complexity, the equalization of CD and DMGD can be implemented together, compared with the conventional  
Figure 24: The finite impulse response (FIR) filter illustration, along with Q\({}^{2}\)-factor vs. tap number for both 2 \(\times\) 2 and 4 \(\times\) 4 MIMO cases [42].  
Figure 25: The number of taps per carrier for MIMO DSP vs. distance in recent few-mode fiber (FMF) transmission experiments [19].  
two-stage FDE structure, using FFT for an efficient implementation of convolution; thus, \(m\) independent static CD compensation modules would be spared. Subsequently, a joint MIMO FDE of the static CD along with the dynamic DMGD would be an auspicious configuration for digital coherent receivers, because it would save a separate CD compensation module, thereby decreasing the total DSP implementation complexity.  
Above and beyond, Figure 27 provides the comparison of the required complex multiplications per output symbol at different transmission distances for the two-stage and single-stage FD-RLS algorithms. For a transmission distance rising from 100 km up to 1000 km, the single-stage method continuously consumes fewer complex multiplications than the conventional two-stage method, because both methods use the same FFT size for DMGD compensation for the same transmission distance, whereas the FFT size of static FDE in the two-stage method is determined by the FMF-induced CD. For instance, the two-stage FD-RLS method consumes 323 and 351 complex multiplications per output symbol at 400-km and 800-km transmissions, whereas our proposed single-stage method takes only 297 and 328 complex multiplications per output symbol at the same transmission distances, respectively.  
Furthermore, Figure 28 irradiates the Q-value versus the step size of adaptive FD-RLS algorithms in both two-stage and single-stage methods for compensating for DMGD and CD. To attain a <0.5-dB Q-penalty at 400-, 700-, and 1000-km transmissions, the maximum step sizes are 4.5 \(\times\) 10\({}^{-5}\), 3 \(\times\) 10\({}^{-5}\), and 1.5 \(\times\) 10\({}^{-5}\), respectively. In addition, for the same transmission distance, the maximum step sizes required to achieve the same Q-value after equalization are identical for both approaches.  
Figure 27: The required complex multiplications per output symbol of the two-stage and single-stage frequency-domain (FD)-RLS approaches as a function of transmission distance in an FMF-based transmission system [10].  
Figure 26: The representation of a coherent receiver with the joint compensation of chromatic dispersion (CD) plus differential mode group delay (DMGD) through a single-stage MIMO architecture [10].  
Last but not least, Figure 29 exhibits the convergence speed comparison among three algorithms at different OSNR levels, from which we learnt the time required for convergence grows more slowly for FD-RLS than FD-LMS algorithms as the OSNR increases, equivalent to plummeting the overall training sequence overhead by approximately 30%.