# Quantum Circuit Implementation of Multi-Dimensional Non-Linear Lattice Models
## 6 Extension to Two- and Three-Dimensional Lattice Models
### Design Considerations for Quantum-Circuit Implementation of \(u^{2}+v^{2}\) Calculation  
To achieve a term of the form \(u^{2}+v^{2}\) in the floating-point format, a number of different approaches can be used. The different approaches considered in the present work are:  
* Design _Ekin2D1_, based on the sequential computation of \(u^{2}\) and \(v^{2}\) with each term temporarily stored in the quantum floating-point format. This is followed by a floating-point addition to obtain \(u^{2}+v2\). From a classical computational point of view, this appears to be the most obvious design approach. Figure 8 shows the overall layout of the quantum circuit based on this design. As before, \(SQ4\) and \(ISQ4\) represent the mantissa squaring operation and its reverse. \(CC_{u}2\) and \(CC_{v}2\) are used to define \(u^{2}\) and \(v^{2}\) in the floating-point format starting from the \(2N_{M}\) output of squaring. To facilitate the re-use of workspace qubits, the mantissa qubits of \(u\) and \(v\) are temporarily swapped by \(SW_{uv}\). Based on the difference in the exponent of \(u^{2}\) and \(v^{2}\) (evaluated by \(DEsq\)--result temporarily stored in qubits defining the exponent of \(v^{2}\)), \(PS\) prepares the floating-point addition of \(u^{2}\) and \(v^{2}\), with \(FA4\) and \(UFA4\) representing 4-qubit full adder and its reverse. \(UDEsq\) returns exponent \(v^{2}\) to the state before \(DEsq\). Not shown here for brevity are the subsequent steps needed to un-compute the calculations of \(u^{2}\) and \(v^{2}\) needed to return the qubits involved back to the initial state \(|0\rangle\);
* Design _Ekin2D2_, based on the sequential computation of \(u^{2}\) and \(v^{2}\) with temporary storage using two separate \(2N_{M}\)-qubit registers of the mantissa-squaring operations for \(u^{2}\) and \(v^{2}\). Based on these two registers, as well as the exponents of \(u\) and \(v\) (and their difference), the summation \(u^{2}+v^{2}\) in the floating-point format can be performed. The motivation for this design is that compared to Design Ekin2D1, the complexity involved in the setting results in quantum floating-point format can potentially be reduced, as found previously for the 1D lattice implementations. Figure 9 shows the overall layout of the quantum circuit based on this design. Compared to _Ekin2D1_, the summation of \(u^{2}\) and \(v^{2}\) now uses the difference in the exponent of \(u\)- and \(v\)-velocity since exponents of \(u^{2}\) and \(v^{2}\) are no longer formed explicitly. A key further observation that can be made is the reduction in un-computation steps needed up to the point of setting the desired output. The gate operations to the right of \(UDE_{uv}\) represent the first steps of the un-computation used to 'clear' the qubit registers defining the mantissa-squaring output for \(u^{2}\) and \(v^{2}\);
* Design _Ekin2D3_, where the term \(u^{2}+v^{2}\) is constructed using shift-and-add-based squaring involving both \(u\) and \(v\) directly. Clearly, the design needs to account for the possibility of \(u\) and \(v\) having different exponents. The main motivation for this design is that compared to Designs Ekin2D1 and EKin2D2, it can be expected that the quantum-circuit width can be reduced by eliminating the temporary storage of the terms \(u^{2}\) and \(v^{2}\) separately. However, the shift-and-add-based squaring of the mantissa will be more complex, as detailed here. A further motivation relates to the potential reduction in rounding and truncation error in defining \(u^{2}+v^{2}\). This aspect is considered in more detail in Section 7.  
Based on the considerations detailed, as well as the circuit-width analysis shown in the next section, design _Ekin2D3_ was selected for further detailed analysis. Its quantum circuit implementation is described in Sections 6.3, 7 and 8.