## 4 Error Analysis and Processing
### Time Error Analysis and Digital Pre-Processing  
In this circuit design, when the output switching time is completely ideal, the multi-plexer output waveform is shown in Figure 5, which can be expressed as:  
\[x(t)=\left\{ \begin{array}{ll}A\cdot\sin\left(2\cdot\pi\cdot\frac{1}{5T} \cdot 0\right)+b,&0\leq t<\frac{T}{4};\\ A\cdot\sin\left(2\cdot\pi\cdot\frac{1}{5T}\cdot\frac{T}{4}\right)+b,&\frac{T}{4 }\leq t<\frac{T}{2};\\ A\cdot\sin\left(2\cdot\pi\cdot\frac{1}{5T}\cdot\frac{T}{2}\right)+b,&\frac{T}{ 2}\leq t<\frac{3T}{4};\\ \ldots&\ldots\\ A\cdot\sin\left(2\cdot\pi\cdot\frac{1}{5T}\cdot\frac{19\cdot T}{4}\right)+b,& \frac{19\cdot T}{4}\leq t<5\cdot T;\end{array} \right. \tag{5}\]  
Which can be reduced to:  
\[ \begin{array}{ll}x(t)&=A\cdot\sin\left(2\cdot\pi\cdot\frac{1}{5T}\cdot \frac{n\cdot T}{4}\right)+b\\ &=A\cdot\sin\left(\frac{n\cdot\pi}{10}\right)+b,\\ \frac{n\cdot T}{4}\leq t<\frac{(n+1)\cdot T}{4};&n=0,1,2\cdot\ldots\ldots 18,19; \end{array}  \tag{6}\]  
In the formula, when \(n\) is 0, 4, 8, 12, 16, the corresponding output from DAC1 is the output value after channel switching; when \(n\) is 1, 5, 9, 13, 17, the corresponding output from DAC2; When \(n\) is 2, 6, 10, 14, 18, the corresponding output from DAC3 is the output  
Figure 8: Output waveform after channel switching. (**a**) The amplitude is not calibrated. (**b**) After the amplitude is calibrated. value after channel switching; when \(n\) is 3, 7, 11, 15, 19, the corresponding output value from DAC4 is output after channel switching. When the switching time of the multiplexer is uneven, the duration of each channel will be uneven, as shown in Figure 9.  
In the figure, it can be found that the width of the waveform output by each DAC, that is, the output duration, is not the same. In this case, small burrs with depressions or protrusions will appear on the final output waveform, which will affect the quality of the output waveform. Therefore, the time error needs to be tested and calibrated. Due to the low frequency of this circuit, the time delay error can be measured with a high-speed digital oscilloscope. The output delay is mainly measured from the output pin of the DAC to the output pin of the multiplexer. So, you can let the DAC output a fixed frequency clock signal, use the two acquisition channels of a dual-channel high-speed oscilloscope to measure the output pin of the DAC and the output pin of the multiplexer at the same time and measure the delay through the measurement function of the oscilloscope. Assuming that the output delay of DAC1 is taken as the standard, first control the multiplexer to select the output channel of DAC1, then measure the output of DAC1 and the output of the multiplexer at the same time and record the time delay as t1; then, control the multiplexer in turn. The multiplexer selects the output channels of DAC2, DAC3 and DAC4, respectively, and then respectively measures the delay between the output pin of the DAC and the output pin of the multiplexer when the corresponding DAC is strobed, which are respectively marked as t2, t3 and t4, then we can obtain:  
\[\Delta t_{2}=t_{2}-t_{1};\ \Delta t_{3}=t_{3}-t_{1};\ \Delta t_{4}=t_{4}-t_{1}; \tag{7}\]  
In the formula, \(\Delta t2\), \(\Delta t3\) and \(\Delta t4\) are, respectively, the output time error of DAC2, DAC3 and DAC4 output through the multiplexer and DAC1 output through the multiplexer. Therefore, the time error \(\Delta t\) of different channels can be obtained by measuring the time delay, as shown in Figure 10.  
Combined with Figure 10, using the reflection of the time error on the amplitude error, the time error is quantitatively analyzed and researched. It can be seen from the figure that when the time error is \(\Delta t\), the corresponding value of curve 1 has a difference of \(\Delta y\) from the actual output value.