## 3 Results and Discussion
Those values are far improved from the highest values, 0.6 \({}^{\circ}\)C and 0.5 \({}^{\circ}\)C at a pitch of 0.2 mm and 0.1 mm, respectively. The full trends in \(T_{\text{LED}}\), \(\Delta T_{\text{LED}}\), \(T_{\text{sub}}\), and \(\Delta T_{\text{sub}}\) as a function of the thermal via pitch are shown in Figure 8. In the five-via configuration, the temperature variations on both the LED and substrate were minimal across all pitches (Figure 8a). Specifically, \(T_{\text{sub}}\) remained nearly constant at 76.1 \({}^{\circ}\)C for pitches of 0.2 mm, 0.4 mm, and 0.6 mm, with a slight decrease to 75.7 \({}^{\circ}\)C at a pitch of 0.3 mm. The corresponding \(\Delta T_{\text{sub}}\) values were 13.1 \({}^{\circ}\)C for 0.2 mm,  
Figure 7: Thermal analysis of the LED module with varying pitches of thermal vias. (**a**) Schematic diagrams of simulation models with five thermal vias and (**b**) corresponding temperature distributions on the LED surface (Monitor 1). (**c**) Schematic diagrams of simulation models with nine thermal vias, and (**d**) corresponding temperature distributions on the LED surface (Monitor 1). In (**b**,**d**), solid lines indicate isothermal contours, and dashed circles indicate the positions of thermal vias. The labeled values indicate the lowest temperature represented in the isothermal contours. 0.4 mm, and 0.6 mm and 12.7 \({}^{\circ}\)C for 0.3 mm. These results suggest that adjusting the pitch alone does not significantly improve heat dissipation when the overall via density is low. In contrast, with nine thermal vias, thermal performance became more sensitive to pitch variation (Figure 8b). At pitches of 0.3 mm and 0.4 mm, \(T_{\text{sub}}\) reached the lowest value of 70.8 \({}^{\circ}\)C, with \(\Delta T_{\text{sub}}\) decreasing to 7.8 \({}^{\circ}\)C, indicating improved heat spreading and more uniform temperature distribution. At a pitch of 0.2 mm, \(T_{\text{sub}}\) slightly increased to 71.3 \({}^{\circ}\)C, with \(\Delta T_{\text{sub}}\) of 8.3 \({}^{\circ}\)C. Thermal vias located outside the heat-generating area contributed less to heat conduction, despite a higher number of vias. When the pitch increased to 0.6 mm, the outermost vias were positioned outside the LED chip, leading to degraded thermal performance. \(T_{\text{sub}}\) rose to 71.6 \({}^{\circ}\)C, and \(\Delta T_{\text{sub}}\) returned to 8.3 \({}^{\circ}\)C, offsetting the benefits of additional vias. The optimal pitch condition varied depending on the number of vias. For example, the five- and nine-via configurations exhibited the best thermal performance at different pitches (0.4 mm and 0.3 mm, respectively). Therefore, the number and pitch of vias are interdependent design parameters, and adjusting one without considering the other may lead to suboptimal thermal behavior. The thermal sensitivity to misalignment of thermal vias was investigated by laterally shifting the via array away from the center of the LED chip (Figure 9). Two configurations were examined: five vias with a pitch of 0.3 mm and nine vias with a pitch of 0.2 mm. The center of the via array was offset by (0.1 mm, \(-\)0.1 mm), (0.2 mm, \(-\)0.2 mm), and (0.4 mm, \(-\)0.4 mm) relative to the LED center (Figure 9a,c). In the five-via configuration, the spatial distribution of the LED temperature on the Monitor 1 plane ranged from 75.4\(-\)75.8 \({}^{\circ}\)C, 75.4\(-\)76.3 \({}^{\circ}\)C, 75.3\(-\)76.6 \({}^{\circ}\)C, and 75.3\(-\)78.1 \({}^{\circ}\)C for offset of (0 mm, 0 mm; no offset), (0.1 mm, \(-\)0.1 mm), (0.2 mm, \(-\)0.2 mm), and (0.4 mm, \(-\)0.4 mm), respectively (Figure 9b). In the case of the nine-via configuration, the corresponding distributions were 70.6\(-\)70.9 \({}^{\circ}\)C, 70.8\(-\)71.8 \({}^{\circ}\)C, 70.4\(-\)72.4 \({}^{\circ}\)C, and 70.4\(-\)73.9 \({}^{\circ}\)C (Figure 9d). Notably, the nine-via configuration exhibited greater temperature variation under misalignment than the five-via case.