# Doherty Power Amplifier Design via Differential Combining
## 1 Introduction  
The increasing demand for higher data rates and broader bandwidths in modern communication systems, particularly at millimeter-wave (mmW) frequencies, has driven the need for efficient and reliable power amplifiers (PAs) [1; 2]. As frequencies rise, the parasitic effects of transistor output capacitances become more pronounced, leading to challenges in maintaining the PA performance. These parasitics can degrade the amplifier's efficiency and output power, making effective compensation essential. Traditional design approaches often struggle to address these parasitic effects across varying frequencies, limiting the versatility and efficiency of the resulting amplifiers.  
On the other hand, achieving high output power at very high frequencies, particularly in the millimeter-wave (mmWave) spectrum, is a formidable challenge, primarily due to the limitations in transistor technology at these frequencies. As the operating frequency increases, the intrinsic gain of transistors diminishes, requiring innovative circuit topologies and design techniques to compensate. Additionally, the physical scaling of transistors to operate at higher frequencies often results in reduced power handling, making it difficult to achieve the desired output power levels. Moreover, the efficiency of power amplifiers tends to decrease as frequency rises, necessitating careful design to balance power output with efficiency. This challenge is compounded by the stringent demands of modern communication systems, which require power amplifiers that can deliver both high power and wide bandwidth, pushing the limits of current design approaches.  
In power amplifier design, using parallel combining structures to increase power comes with some issues. Parasitic elements like inductances and capacitances can cause problems with phase and impedance, which can reduce efficiency and stability. Matching networks help address these issues, but add complexity and may cause extra losses. Stacked configurations, where transistors are layered on top of each other, have their own set of problems. Managing voltage distribution is tough, and uneven voltage sharing can lead to device failures or inefficiency. Additionally, simulating these stacked structures is challenging, even with advanced tools, due to the complex interactions between layers [3; 4; 5; 6; 7]. Both methods require careful design to work effectively and reliably.  
In response to the challenges posed by parasitic capacitances at high frequencies, this work presents a novel differential combiner that effectively compensates for these capacitances at any chosen frequency. By integrating a capacitor with a value of \(2C_{OUT}\) at the midpoint of a \(\lambda/4\) transmission line, the proposed design ensures precise capacitance cancellation, significantly simplifying the design of Doherty Power Amplifiers (DPAs). This approach not only eliminates the need for complex parasitic compensation techniques, but also enhances the applicability of the design across a wide range of frequencies, including but not limited to mmWave bands. The proposed combiner has been rigorously validated through simulation, demonstrating good performance and highlighting its potential as a versatile and efficient solution for next-generation communication systems [8; 9; 10]. A DPA was designed and simulated using the proposed combiner, showing competitive results alongside a simplified approach. Table 1 shows a comparison between the designed DPA and some state-of-the-art DPAs.