## 2 Materials and Methods
### Sample Preparation  
In this study, the bulk X-cut LN (produced by CQT, China) was used as a substrate for developing appropriate process regimes of plasma etching because of the expensiveness of  
Figure 1: The numerical simulation results: (a) distribution of the real part of the E-field for a straight waveguide (cross-section); (b) distribution of the real part of the E-field for a bent waveguide (cross-section). LNOI substrates. In the future, the obtained process regimes will be transferred to X-cut LNOI for producing basic integrated optical building blocks. The sample preparation in this research consisted of the following stages: substrate cleaning and the formation of a hard mask. The stages are schematically shown in Figure 2 and their descriptions are given below. First, the cleaning procedure of LN wafers was carried out in Piranha solution (H\({}_{2}\)SO\({}_{4}\):H\({}_{2}\)O\({}_{2}\) = 3:1; 5 min cleaning time) followed by isopropyl alcohol with an intermediate rinsing of substrate in deionized (DI) water and blowing with dry N\({}_{2}\)[31]. After LN cleaning, the 80 nm-thick chromium layer was deposited on the substrate surface (Figure 2, stage 2). The deposition process was carried out with DC magnetron sputtering using the following conditions: the applied DC magnetron power was 500 W, the Ar flow was set equal to 0.7 L/h and the substrate temperature was 200 \({}^{\circ}\)C.  
To eliminate the residual stress in the chromium thin film, the samples after deposition were annealed at 300 \({}^{\circ}\)C over 1 h in a dry nitrogen atmosphere (with N\({}_{2}\) flow at 2 L/h). The residual stress in the chromium film (as the hard mask) may be able to affect the undercut (an unwanted side effect) during the following etching process. The abovementioned conditions of magnetron sputtering and thermal annealing were obtained during a huge set of experiments and verified with published data. At the stage of the etching technology transfer from bulk LN to LNOI wafers, it is important to pay attention to the additional stress in the stack of thin films, which occurs during the annealing step (because of different thermal expansion coefficients of the materials). In order to minimize the risk of defect formation in the LNOI waveguide films, it is important to follow the instructions for the thermal treatment of LNOI wafers provided by the NanoLN vendor. The heating/cooling rate should be kept at \(\sim\)3 \({}^{\circ}\)C/min in all thermal steps of the process. In the next stage, the samples were coated with a 500 nm-thick negative resist layer AZnLOF 2020 diluted with PGMA. The pattern of the variety of test structures and topology of the optical waveguides were formed in a resist layer with contact lithography (Figure 2, stage 3). The design of the topology was developed based on numerical simulation of the optical waveguides on an LNOI substrate. A detailed description is provided above. It was revealed during the set of experiments that hard-baking the resist improved the repeatability of the following process of etching the chromium layer. This is why after the resist development, it was hard-baked on a hot plate according to the technical datasheet at 150 \({}^{\circ}\)C over 1 min. After the lithography stage, the chromium layer was etched in a solution of cerium ammonium nitrate (CAN) (50 g CAN powder compound, 10 mL of acetic acid and 500 mL of DI water), which has good selectivity for AZ nLOF 2020 and other used materials (Figure 2, stage 4). The etching was carried out at 50 \({}^{\circ}\)C over 1.5 min with constant stirring. The mask profile after the etching of the chromium layer was investigated with a scanning electron microscope (SEM) Tescan Mira. The SEM image of the cross-section of the LN sample after this stage is shown in Figure 3a.