# Fabrication Tolerances' Impact on an ODAC-Based PAM-4 Transmitter
## 1 Introduction
The process variation that was modelled here depends on lithography imperfections resulting from resist age, sensitivity and thickness as well as other factors such as etching and exposure change. The model was evaluated by designing and fabricating a chip with several identical microresonators which are subjected to passive process variations and subsequently tested for system-level variation with a WDM-based SiP interconnect. The findings established a relationship between the optical signal-to-noise ratio of several WDM-based SiP interconnects modelled and the thickness and width variations of Silicon Photonics waveguides. Such models can also be used for other passive-based SiP devices. Other works in [15; 16] also presented similar models to investigate and predict the performance of Silicon Photonic devices using the variability of passive device parameters. In both studies, several similar resonators were fabricated on a single chip and their manufacturing variabilities were studied. In [15], a Monte Carlo simulation approach was used to predict the device performance in relation to fabrication variabilities by measuring the spectral response of each device among several fabricated PICs on a 200 mm \(\times\) 200 mm SiP wafer. Also, in [16], a device enhancement model was developed to improve the overall system performance of microresonators in optical interconnect networks by exploring different design waveguide parameters that can impact the performance and reliability at the device level. The model estimated the degree of the impact of the waveguide width and thickness variation on the resonant wavelength shift slop of the microresonators. The results, which presented a linear behaviour between the waveguide width/thickness and the wavelength shift slop, can be optimized to improve the optical signal to noise ratio (OSNR) of a WDM-based optical interconnect networks. The task of characterizing the fabrication variation of PIC devices is highly challenging due to the cost and time required to carry out the process [15]. The advent of programmable photonics introduces a more robust generic template that can be exploited to implement a variety of functionality through software which can be used to optimize or predict chip performance before fabrication [17]. Just like we have field programmable gateway arrays (FPGA) in electronics, which can be reconfigured to meet specific use cases of customers, programmable photonics introduce such generic functionality known as field programmable photonic gateway arrays (FPPGA) for widespread PIC design in optical communications [18]. These FPPGAs are electronically reconfigurable basic elements that allow for the flexible configuration of a set of passive devices in order to mine several circuits without undergoing the long-term conventional fabrication circle [7; 19; 20]. MostFPPGA architectures are based on cascaded Mach Zehnder modulator (MZM) structures in various shapes and dimensions [21; 22]. In this paper, a four-level pulse amplitude modulation (PAM-4) transmitter based on oDAC will be analysed using the hexagonal FPPGA mesh developed by iPronics [19; 22]. This type of transmitter is an alternative design to replace a power-hungry and bandwidth-limited eDAC that is required in the conventional PAM-4 signal generation [23; 24]. The oDAC devices are based on digital modulators and passive devices such as couplers and splitters [23]. Therefore, as a result of the light-interfering nature of such devices, precision is not guaranteed due to slight deviation during fabrication, which may result in performance degradation and a low yield [9; 25]. The programmability and reconfigurability of iPronics' FPPGA, as reported in [19; 20], are applied to an oDAC PAM-4 transmitter in order to investigate its potential fabrication tolerances and predict its production yield, as a continuation of our work in [26].