# 0.5-V High-Order Universal Filter for Bio-Signal Processing Applications
## 2 Proposed Circuit
### Mi-Ota
For frequencies above \(1/C_{Bi}R_{MOSi}\) and identical capacitances \(C_{Bi}\), the AC voltage at the bulk terminal of M\({}_{1}\) (M\({}_{3}\)) can be expressed as:  
\[V_{B1(3)}=\beta_{1}V_{+(-)1}+\beta_{2}V_{+(-)2} \tag{3}\]  
where \(\beta_{i}\) is the AC voltage gain of the input capacitive divider from the \(i\)-th input equal to:  
\[\beta_{i}=\frac{C_{Bi}}{C_{B1}+C_{B2}} \tag{4}\]  
Assuming identical capacitances \(C_{Bi}\), which entails \(\beta_{1}=\beta_{2}=\beta\) and \(\text{I}_{\text{D5}}=\text{I}_{\text{D6}}=\text{I}_{\text{set}}\), the quasi-static transfer characteristic of OTA from the \(i\)-th differential input, with the other differential input shorted to ground, can be expressed as:  
\[I_{O}=\frac{I_{set}}{2}tanh\left(\beta\cdot\eta\frac{V_{+i}-V_{-i}}{2n_{p}U_{ T}}+\frac{lnm}{2}\right)+\frac{I_{set}}{2}tanh\left(\beta\cdot\eta\frac{V_{+i}-V_{-i}}{2 n_{p}U_{T}}-\frac{lnm}{2}\right) \tag{5}\]  
Figure 4: MI-MOS transistor: (**a**) symbol, (**b**) realization, (**c**) realization of R\({}_{\text{MOS}}\). Figure 3: CMOS implementation of MI-OTA. From (5), the small-signal transconductance of the OTA, around \(V_{+i}-V_{-i}=0\) can be calculated as:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]0  
For the optimal case (\(m=3.732\)), the above expression simplifies to:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]1  
where \(\beta\) for a 2-input OTA with identical capacitances \(C_{Bi}\) is equal to \(1/2\). As it can be concluded from (7), the circuit transconductance is proportional to the biasing current \(I_{set}\) and can be easily regulated using this current. The OTA could be realized using a current mirror topology; however, to simplify the overall structure, a simpler architecture of a single differential stage has been chosen. Its output voltage without load is equal to \(V_{SS}+V_{GS7C}\); therefore, to maintain its value equal to zero, \(V_{GS7C}\) should be equal to \(|V_{SS}|\) at the operating point. On the other hand, the \(V_{SG}\) voltages for M\({}_{1}\)-M\({}_{4}\) were chosen to be equal to about 1 \(V_{DD}/2\), which allows operating M\({}_{5}\) and M\({}_{6}\) in saturation, also with possible \(g_{m}\) (\(I_{set}\)) adjustments and PVT changes. As mentioned previously, transistors M\({}_{7}\) and M\({}_{8}\) are realized as composite SC devices, which allows increasing their output resistance without limiting output swing. Only n-channel transistors were realized in this way, because for p-channel transistors this could affect linearity. Moreover, output conductances of n-channel devices are larger; therefore, their impact on the output resistance of OTA and consequently its voltage gain is more significant. The low-frequency voltage gain of OTA, from one differential input, is given by:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]2  
The input referred noise of the OTA can be expressed as:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]3  
where \(\overline{I_{o}^{2}}\) is the mean-square output noise current, which, assuming perfect symmetry and neglecting second-order effects, can be expressed as:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]4  
Note that due to the non-symmetry of input pairs, transistors M\({}_{5}\) and M\({}_{6}\) contribute to the overall noise. The noise current of an MOS device consists of thermal and \(1/f\) components and, in weak inversion is given by:  
\[I_{o}=g_{m}(V_{+1}+V_{+2}-V_{-1}-V_{-2}) \tag{1}\]5  
where \(q\) is the electron charge, \(I_{Di}\) is the quiescent drain current of the \(i\)-th device, \(g_{mi}\) is its transconductance, \(C_{OX}\) is the oxide capacitance per unit area, \(K\) is the flicker noise constant, and \(W\) and \(L\) are the channel width and length, respectively. In LV and LP designs, due to low biasing currents and relatively large transistor sizes, usually the thermal noise component is dominant in the frequency range of interest.