## 3 Results and Discussion
This diminishing, in turn, emphasizes a fundamental trade-off between thermal performance and manufacturing efficiency. Adding vias becomes impractical due to the increasing PCB complexity and fabrication costs, so the via configuration should remain minimal to ensure feasibility. Building on the analytical model that explains the overall saturation trend, finite element simulations can further evaluate local temperature distributions according to specific geometric parameters of vias. Figure 4: The trend of LED and substrate temperature with varying numbers of thermal vias. (**a**) \(T_{\rm LED}\) and \(\Delta T_{\rm LED}\) as a function of the number of thermal vias. (**b**) \(T_{\rm sub}\) and \(\Delta T_{\rm sub}\) as a function of the number of thermal vias. We analyzed the temperature response with respect to the number of thermal vias using a high thermal conductivity substrate, aluminum nitride (AlN) (180 W/m\(\cdot\)K), as shown in Figure 5. Due to the significantly higher thermal conductivity of AlN compared to FR4, the presence or number of vias has a relatively minor influence on the overall thermal performance. Both \(T_{\text{LED}}\) and \(T_{\text{sub}}\) remain around 63 \({}^{\circ}\)C, which is comparable to the performance of a 25-via configuration on an FR4 substrate. This result implies that the inherent thermal spreading capability of the AlN substrate effectively dissipates heat even without a large number of vias, indicating minimal thermal bottleneck within the substrate. Mechanical fatigue, such as delamination or cracking, typically occurs at interfaces between materials with mismatched coefficients of thermal expansion [46; 47]. These defect sites can propagate rapidly under repeated thermal cycling conditions [48]. Therefore, minimizing temperature fluctuations is essential for enhancing reliability. As shown in Figure 6, during the transient heating stages at 100 s and 400 s, the presence of thermal vias substantially reduces the temperature rise compared to the no-via case. Specifically, \(T_{\text{LED}}\) decreases from over 110 \({}^{\circ}\)C to below 50 \({}^{\circ}\)C at 100 s, and from over 130 \({}^{\circ}\)C to below 70 \({}^{\circ}\)C at 400 s when more than five vias are implemented. The saturation behavior observed in the quasi-steady-state (at 1500 s) is similarly reflected during these transient stages. This reduction in temperature variation is expected to alleviate thermomechanical stress and enhance reliability under thermal cycling conditions. Temperature distribution as a function of pitch of the thermal vias was evaluated. Here, five- and nine-via configurations were selected as representative cases for optimized design (Figure 7a,c). For each case, the pitch was varied from 0.2 mm to 0.6 mm. In the five-via configuration, the spatial distribution of the LED temperature on the Monitor 1 plane was 75.5\(-\)76.1 \({}^{\circ}\)C, 75.4\(-\)75.8 \({}^{\circ}\)C, 75.8\(-\)76.1 \({}^{\circ}\)C, and 75.8\(-\)76.1 \({}^{\circ}\)C for 0.2, 0.3, 0.4, and 0.6 mm pitch, respectively (Figure 7b). In the nine-via configuration, this distribution  
Figure 5: The trend of LED and substrate temperature with varying numbers of thermal vias implemented in the AlN substrate. (**a**) \(T_{\text{LED}}\) and (**b**) \(T_{\text{sub}}\) as a function of the number of thermal vias. Figure 6: The trend of LED temperature at transient states with varying numbers of thermal vias. \(T_{\text{LED}}\) at (**a**) 100 s and (**b**) 400 s.  
was 70.8\(-\)71.3 \({}^{\circ}\)C, 70.7\(-\)70.8 \({}^{\circ}\)C, 70.6\(-\)70.9 \({}^{\circ}\)C, and 71.0\(-\)71.5 \({}^{\circ}\)C, respectively (Figure 7d). The general trend in temperature variation across the Monitor 1 plane became smaller with a higher number of vias. The smallest temperature variations occurred at 0.4 mm pitch for the five-via case (0.3 \({}^{\circ}\)C) and at 0.3 mm for the nine-via case (0.1 \({}^{\circ}\)C).