## 2 Circuit Design
From Equations (3) and (4), \(\theta_{1}\) is 60\({}^{\circ}\) and \(Z_{\rm T1}\) is 75.1 \(\Omega\) due to a C\({}_{\rm d}\) equal to 43.7 fF in this work. Figure 1c shows the simplified layout of the \(\lambda\)/4-TL-C-based coupler in Figure 1a. A compact spiral TLqw (with size of 73.6 \(\times\) 76.1 \(\upmu\)m\({}^{2}\) and metal width/space of 3/2 \(\upmu\)m) and a C\({}_{\rm c}\) (with size of 32 \(\times\) 36 \(\upmu\)m\({}^{2}\) and equivalent capacitance of 1.76 pF) are used. Figure 1d shows the simulated reflection coefficients (S\({}_{\rm 11}\), S\({}_{\rm 22}\), and S\({}_{\rm 33}\)) and gain (S\({}_{\rm 21}\) and S\({}_{\rm 31}\)) of the coupler. The coupler achieves decent S\({}_{\rm 21}\) and S\({}_{\rm 31}\) of \(-\)3.595 dB at 28 GHz and S\({}_{\rm 21}\) and S\({}_{\rm 31}\) better than \(-\)4 dB for 8.7-46.9 GHz. At 56 GHz, decent second-harmonic suppression (S\({}_{\rm 11}\) of \(-\)0.22 dB, S\({}_{\rm 22}\) and S\({}_{\rm 33}\) of 0 dB, and S\({}_{\rm 21}\) and S\({}_{\rm 31}\) of \(-\)89 dB) is achieved. Figure 2a,b show the circuit diagram and chip of the down-conversion mixer with the important component parameters labeled. The chip area is 0.879 \(\times\) 0.562 mm\({}^{2}\), i.e., 0.494 mm\({}^{2}\). The mixer comprises a double-balanced Gilbert-cell-based mixer core (with a differential RF gm stage using the BSFB technique, two \(\lambda\)/4-TL-C-based couplers, and a CCPT-RL-based core IF load), two Wilkinson-power-divider-based baluns, and differential output buffer amplifiers. The mixer was designed and implemented in 90 nm CMOS. This process offers nine metal layers, named MT\({}_{1}\) to MT\({}_{9}\) from bottom to top. The interconnection lines, as well as the TL inductors, were implemented with the 3.4 \(\upmu\)m-thick upmost metal (MT\({}_{9}\)) to minimize the resistive loss. The Momentum three-dimensional (3D)-planar EM simulator in ADS (Advanced Design System) is used for EM-circuit cosimulation. Substrate and layer parameters of ADS Momentum are set up according to the process information provided by the foundry. This ensures the post-layout simulation results of the mixer close to the measurement ones. Instead of the transformer coupling approach (with a pair of \(\lambda\)/4 TLs for harmonic suppression) [7], a straightforward \(\lambda\)/4-TL-C-based coupler introduced in Figure 1 is used between the RF gm stage and the LO switch transistors. The BSFB technique, also shown in Figure 1, is used in the RF gm stage for V\({}_{\rm th}\) and V\({}_{\rm DD}\) reduction, as well as substrate leakage suppression. CG and NF enhancement at the same or even lower P\({}_{\rm D}\) is achieved because lower V\({}_{\rm DD}\) and higher gm (due to larger bias current) are used. To enhance \(Z_{\rm L}\)/CG and keep a low P\({}_{\rm D}\) and decent IF bandwidth, a CCPT-RL-based core IF load is used. At V\({}_{\rm DD}\) = 0.8 V and V\({}_{\rm D1}\) = V\({}_{\rm D2}\) = V\({}_{\rm G1}\) = V\({}_{\rm G2}\) = 0.4 V, the mixer dissipates 6.4 mW. Compared with the traditional mixer for the direct-conversion receiver, the mixer consumes low P\({}_{\rm D}\) and achieves significant CG and NF enhancement. Figure 3 presents the illustrative diagram of the 28 GHz-band Wilkinson-power-divider-based balun [12]. It is used as the RF and the LO baluns. The compact Wilkinson power divider constitutes a noninverting coupled line with an electrical length (\(\theta\)) of 22\({}^{\circ}\), a parallel grounded capacitance C\({}_{\rm P1}\) at the input, and a parallel R\({}_{\rm P}\)C\({}_{\rm P}\) between the outputs. The coupled line, i.e., two noninverting spiral or meandering TLs with inductance of L\({}_{\rm L}\), has a positive mutual inductance (M) and an equivalent parallel inductance L\({}_{\rm P}\) (=L\({}_{\rm L}\)(L\({}_{\rm L}\) - 2M)/M) between the outputs. This leads to a significant TL-length reduction (from about \(\lambda\)/10 to \(\lambda\)/16) for the power divider.