## 4 Simulation Results  
We started by generating a user bit data sequence, denoted as u\({}_{k,l}\), with a length of 4096 bits, which corresponds to one data sector. This sequence of user bits was recorded onto the center track, while random bits were recorded on both side tracks. During the channel estimation process, one data sequence was used to design the 1D equalizer and 1D target, while multiple data sectors were utilized to evaluate the BER performance of our proposed methods. In this context, the BER performance was assessed as the number of erroneous bits compared to the total number of bits considered. An error bit refers to any bit that differs when comparing the user bit, u\({}_{k,l}\), to the estimated user bit, \(\hat{u}_{k,l}\). The simulations were conducted on a computer equipped with an i9-11900 CPU running at 2.5 GHz and 32 GB of RAM, using the 2023a version of the software. In this study, six systems were evaluated: System I (1D conventional and 2D conventional systems, without LLR enhancement), System II (HIF), System III (MSI), System IV (BSD), and System V (MLP). Our evaluation was based on an AD of 3.0 Tb/in\({}^{2}\). Figure 11 illustrates the LLR distributions of the five systems under the same conditions, with SNR = 12 dB, and the media noise was neglected. In Figure 11, the blue dots represent correct LLRs, while the red cross symbols denote erroneous LLRs. The x-axis represents the bit number, set at 50,000 bits, whereas the y-axis displays the LLR values generated from the 1D SOVA detectors, except for the 2D conventional system in the LLR values generated by the 2D SOVA detectors [36]. Figure 11a-f correspond to Systems I to V, respectively. Upon observing Figure 11, it is evident that the conventional system exhibited higher erroneous LLRs than the other systems. Conversely, System V demonstrated superior LLR performance, with only 94 erroneous bits, as shown in Figure 11f. Figure 11: LLR distributions of (**a**) System I: 1D conventional, (**b**) System I: 2D conventional, (**c**) System II: HIF, (**d**) System III (MSI), (**e**) System IV: BSD, and (**f**) System V: MLP, for SNR = 12 dB and AD = 3.0 Tb/in\({}^{2}\). Next, we explored the BER performance of the proposed systems without position and size fluctuations, as shown in Figure 12, where each BER point was computed using as many data sectors as were needed to collect 500 error bits. The proposed systems exhibited significant performance improvements when compared to the 1D and 2D conventional systems. In this process, a 2D equalization combined with 2D detection, utilizing a 2D minimum mean square error (MMSE) equalizer [9] and a 2D SOVA detector [36], is applied to process the retrieved readback signals. The size of the 2D MMSE equalizer coefficient is 3 \(\times\) 11 taps, and the size of the target coefficient of the 2D SOVA detector is 3 \(\times\) 3 taps, which means that the side track information is used to jointly design the detection process. It is very important to note that the following simulated results from employing our proposed techniques were only obtained from simulations. However, there are many factors that must be considered in real experiments. Three retrieved readback signals are also read using three readers, as similarly used in 1D processing. Specifically, Systems II, III, IV, and V achieved gains of 3.2, 4.0, 4.6, and 5.1 dB, respectively, over the 1D conventional system at BER = \(10^{-5}\). Moreover, the proposed MLP technique can approximately gain 2.0 dB over the 2D conventional system. The 2D conventional system offers better BER performance compared to the 1D conventional system because it can deal with the effect of ITI. Additionally, it also outperforms the proposed techniques--HIF, MSI, and BSD--at lower SNRs. However, at higher SNRs, the proposed techniques demonstrate improved performance, indicating their effectiveness in managing the effects of ITI. Notably, the proposed MLP technique consistently achieves the best performance across all SNR levels.