# Towards Large-Scale Fast Reprogramable SOA-Based Photonic Integrated Switch Circuits
## 1 Introduction  
The global Internet Protocol (IP) traffic is increasing at incredible rates: Cisco projected that global mobile traffic will increase from 3.7 exabytes per month to 30.6 exabytes per month in 2020 [1] and there are no signs that this trend will stop anytime soon [2]. It is not easy to predict implications of this trend in data transmission, but it is clear that Internet traffic is evolving from a relatively steady stream traffic to a more dynamic traffic pattern [3]. New bursty types of packet-based traffic require network flexibility and reconfigurability at a high-speed, as well as high connectivity at low power consumption. This scenario, however, is not sustainable through packet routing and switching in the electronic domain only. Hybrid solutions have been proposed for decades now [4]: photonic hardware is introduced for massive-bandwidth data transport and switching, while routing is handled at more modest GHz rates in the electronic domain.  
Planar integrated photonic circuits offer an exciting opportunity to create single chip switching solutions for high capacity packet-compliant data routing [5], since they can potentially reduce the high costs and delays associated with opto-electronic conversion and electronic de/serialization. In the last ten years photonic technologies have quickly matured to the point that an increasing number of components per chip up to few thousands has been demonstrated for function diversity and sophistication [6; 7; 8; 9] in the optical communication field where requirements are more severe and urgent.  
However, further scalability must be ensured to provide the requested connectivity in future optical switching engines, while maintaining high performance.  
In this work, the progress made in electronically actuated monolithic switching circuits based on the use of semiconductor optical amplifiers (SOAs) is reviewed, focusing on circuit-level functionality. After reviewing the integration technologies that have enabled high-connectivity routing in planar optoelectronic circuits in Section 2, we focus on circuits that exploit the indium phosphide (InP) integrated photonics platform. In particular, in Section 3 we address broadband implementations with connectivity of up to sixteen ports in a packet-compliant SOA multi-stage switching matrix. A comprehensive study of the circuit-level gain, loss, and noise performance provides insight into the future scalability of these circuits. In Section 4, the opportunity of scaling connectivity by combining monolithically integrated wavelength- and space-selective elements is described, including demonstrations of packet time-scale reconfigurability. Opportunities for developing a distributed network for intra-chip monitoring and equalization for next generation photonic circuits are discussed in Section 5. In Section 6 we introduce a complementary matrix topology based on resonant elements as developed in the same platform to provide a route for power efficient switching. The strategies for improvements and challenges for future deployment of large-scale fast re-configurable power efficient switch matrices are discussed all over the sections, by looking at figures like connectivity, performance, power consumption, distributed on-chip optical monitoring, and interconnectivity.