## 3 System Concept and Hardware
### The Neuromorphic Processor  
The neuromorphic processor used for our application was the NM500, developed by Nepes and General Vision. The decision to use this chip was made based on the three main features of this chip: **low power consumption** (7 mW), **fixed latency** (classification in 19 clock cycles, only requiring 9.1 \(\upmu\)s for classification and readout), and **self-learning** (the chip can perform learning operations on its own within the time it takes to perform a classification). Figure 3: Black–body spectrum for different temperatures. Temperature of the Sun is marked in yellow, and typical ambient temperature is marked in red [10]. The chip's architecture was based on the NeuromMem technology developed by General Vision [12]. In contrast to multipurpose processors, the NM500 utilizes 576 identical components called neurons, forming a neural network which can approximately be described as a three-layer radial basis function (RBF) network. Additionally, the chip can switch between RBF and k-nearest-neighbors (KNN) classification. Each neuron contains memory for storing a feature vector called a _model_, an arithmetic unit, and registers for configurations. This configuration allows each neuron to perform operations independent of each other. Multiple chips can be used in parallel to increase the capacity of the network. For added flexibility, the neurons can be configured as subnetworks, called context, either within one single chip or within a cluster of multiple chips. This allows performing multiple classification tasks without the need of loading a new network from memory or retraining the chip. This is helpful if multiple sensors are used for classification or to accommodate certain conditions, such as night and day. When performing a classification, a feature vector is transmitted to the network together with a context identifier. After receiving the feature vector, each neuron in the requested context will calculate the distance between the input vector and the stored model. The arithmetic unit of each neuron is capable of calculating the distance using Supremus- or L1-Norm:  
\[\mathrm{D}_{\mathrm{Lsup}}(\bar{\mathrm{M}},\bar{\mathrm{V}})=\mathrm{max} \left|\mathrm{M}_{\mathrm{i}}-\mathrm{V}_{\mathrm{i}}\right| \tag{1}\]  
\[\mathrm{D}_{\mathrm{L1}}(\bar{\mathrm{M}},\bar{\mathrm{V}})=\sum_{\mathrm{i}} \left|\mathrm{M}_{\mathrm{i}}-\mathrm{V}_{\mathrm{i}}\right| \tag{2}\]  
Based on the chip's setting and the distance, the neuron decides if it enters the firing stage. In KNN mode, every neuron will fire, while in RBF mode, only neurons with a distance inside the active influence field will fire. The active influence field is set during training. All neurons in the firing stage will then compete for the lowest distance, and the chip will signal when it is ready. When querying the results, the chip will always return the neuron in the firing stage, starting with the lowest distance. This way, it is not necessary to read numerous neurons after each classification. A powerful feature of this architecture is the capability of performing supervised learning with no external processing required. To perform learning, the process is similar to the process of classification described above. In addition to a feature vector and context identifier, a class ID is transmitted to the chip. The network will then perform a regular classification. Depending on the classification results, the chip will either commit a new neuron or adapt the active influence fields of the neurons already committed. If no neuron is in the firing stage, a new neuron will be committed, and the active influence field will be set to the default value of the maximum influence field. A new neuron will also be committed if only neurons with wrong class IDs are in the firing stage. The active influence field of the new neuron will be set to the distance value of the first neuron in the firing stage. Then, the active influence field of each neuron in the firing stage will be reduced below the active influence field of the new neuron.