# Modeling Intelligent Control Switch IEC 61850 Based Substation Automation Communication
## 4 Switch Architecture Design  
The main objective of the switch is receiving the arrived packets from the input ports and forwarding them to the output ports. Normally, when a single packet arrives at specific periods of time, there will be no collisions between packets in the switch and forwarding the packets directly to the output ports with minimum latency. Unfortunately, in the SAS, this scenario is not applicable because of the sudden changes. Therefore, when the number of events increases, the possibility of collision increases as well. Furthermore, when multiple packets are orientated to the same output ports and arrive from different input ports of a switch at almost the same time, both packets cannot send instantly, and only the single packet can be forwarded through the output ports. Therefore, one of the packets must be kept in the buffer to be forwarded later. The highest rate that the switch can operate on depends mainly on the effectiveness of the switch, namely if it is capable of resolving the collisions between packets within a short time. In this work, the parameters of the switch architecture design are set as follows [23]: the processor service time is set to 20 ms, buffer capacity is set to 164 packets per second and the inter-arrival time between packets is 4 ms.  
In addition, the block diagram of GOOSE protocol transmitter and receiver is designed by using Matlab/Simevents software. The functionality of the GOOSE transmitter relies on several factors, such as the modeling accuracy of the generation events, reliability and security of forwarding events from the generation side to the receiver part. In the GOOSE protocol, a group of signals generated from the Signal Generator block represents the input data. The input data will be combined together in a single path through the Path Combiner. Consequently, there will be a single path from the path combiner to the next block. A processor (CPU) processes the events coming from the path combiner and forwards them to the output ports. A question that arises at this stage is, if the CPU is busy and more events are coming in, what will happen to those events (packets)? The answer is that these events would simply drop before being processed.  
However, if the number of the drop packets increases, then the system reliability is compromised. Therefore, we seek a solution to solve such a problem. In line with this, a buffer block with defined  
Figure 4: Network connection multifunction architecture [9].  
size is utilized and located between the path combiner and the CPU. In other words, it is a storage block for GOOSE packets to store them while the CPU is busy. The waiting time of the events (packets) inside the buffer depends on the processor speed. All the buffers in the switches have potential sizes that are dependent on the manufacturing and case study requirements. In this research, the proposed size of the buffer is 2 Mbits (164 packets) drawn from the industrial switch (RUGGEDCOM) [23]. The proposed switch architecture of the substation automation is fully managed by the Ethernet switch with eight I/P and O/P ports. The switch is designed to work in a highly reliable manner in harsh industrial environments, as well as with a high level of immunity to electromagnetic interferences. Figure 5 demonstrates the proposed switch diagram. In addition, two scenarios have been conducted in this work to address the robustness of our proposed switch. In the first scenario, a normal switch with one buffer and with two buffers has been used to store the packets while the CPU is busy with processing other events. In the second scenario, however, four switches are connected internally through a developed control technique to process the packets (events) and prevent packet collision between switches. Finally, the two scenarios are compared with other industrial switch to verify our proposal.