# Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET
## 1 Introduction  
Nowadays, medium-voltage (MV) silicon carbide (SiC) MOSFET power modules are used in a significant amount of power applications, including electric vehicle power systems and small renewable power plants based on photovoltaics [1]. Manufacturers of MV SiC MOSFETs provide new devices with short switching times counted in hundreds of nanoseconds which is related to low switching energies and power losses. On the other hand, high values of the drain current and drain-source voltages of those devices are the reason for significant \(di/dt\) and \(dv/dt\) values observed in power circuits. Parasitic elements under large \(di/dt\) and \(dv/dt\) ratios cause oscillations and overshoots [2, 3, 4]; thus, fast switching MV SiC MOSFETs are the source of EMI problems [5, 6, 7]. There are many ways to suppress these negative effects, for example, by decreasing the switching speed through an increase in the gate resistance, but the price is higher power loss. Another possibility is active gate driving, discussed in this paper. A conventional gate driver (CGD) with fixed gate voltage and resistances has no dynamic control of the gate current of the device. However, some drivers can manipulate the gate current in open loop by the change in the gate resistance in the specified moments of the switching cycle [8]. A number of open-loop gate drivers are dependent on the fixed value of the feedback signal which makes them impractical in most power converter applications. Nonetheless, the most preferable way is to use an active gate driver (AGD) which adjusts the gate resistance or the gate voltage in a closed loop. A number of AGD topologies have been presented in the literature [9, 10, 11, 12, 13, 14, 15]. They differ from short circuit protection [12] by means of feedback signals and, especially, considering the main purpose of those circuits, improvement in the switching performance of the transistors [15]. Thus, AGDs can be used in many applications to solve the commonly found issues in power electronics. Some of the mentioned problems are short circuitprotection, \(v_{\text{DS}}\) and \(i_{\text{D}}\) overshoot or oscillations caused by a short switching period due to parasitics. In [9], active control of the gate-source voltage was realized via voltage injection to the gate: at the turn-on cycle, the AGD pulls down the gate potential to the ground to slow down the \(di/dt\) ratio. The aim of this research was to reduce the switching speed of a 1.2 kV/33 A SiC MOSFET in order to suppress voltage and current overshoot at turn-off and turn-on, respectively. Both simulation and experimental results showed that the authors reduced those negative effects significantly. On the other hand, switching losses were increased, since \(di/dt\) and \(dv/dt\) ratios were reduced as well. Furthermore, the AGD proposed by the authors was designed for a low-power SiC MOSFET. The switching trajectory improvement of an AGD for a 1.2 kV/40 A SiC MOSFET was discussed in [10], where the feedback loop of the driver was based on the resistive measurement derived from the drain-source voltage \(v_{\text{DS}}\) and drain current \(i_{\text{D}}\). Then, the gate resistance was changed to manipulate the gate current and, in consequence, the AGD influenced the \(di/dt\) and \(dv/dt\) ratios. This type of measurement would be hard to implement in a MV SiC MOSFET since an auxiliary circuit is necessary. Furthermore, resistive measurements of the drain current and drain-source voltage generate additional power losses, which is undesirable in power electronic applications. The same type of the feedback signal was applied in an AGD where the purpose was to minimize the effects of parasitic inductances in a converter layout with a 1.2 kV/40 A discrete SiC MOSFET [11]. The authors used the same method as in [10] to modulate the gate current value in specified moments of the switching cycle. The researched AGD was experimentally validated by the authors with a double-pulse test and SiC MOSFET-based inverter with motor load.