## 2 System Modeling
### Modeling of Power Electronic Converter  
For this work, it has been assumed that the active rectifier is of a two-level voltage source converter topology, as shown in Figure 3. For a metal-oxide-semiconductor field-effect transistor (MOSFET), the losses of a given device can be estimated as the sum of the switching and conduction losses of both the MOSFET and internal body diode.  
In most MOSFET datasheets, the manufacturer provides an estimate of total switching energy as a function of device drain current, which can be compiled into a lookup table to reduce the complexity of the model. Using this provided information, the switching losses of the MOSFET \(P_{sw,m}\) can be estimated using (8), where \(f_{sw}\) is the switching frequency, \(E_{tot}(\langle I_{DS}\rangle)\) is the total switching energy at a given average drain current \(\langle I_{DS}\rangle\), and \(k_{v}\) is a linear scaling term used to estimate how the operational drain-source voltage of the device affects the overall switching energy value provided by the manufacturer at some test voltage \(V_{DS,test}\)[30]. As a worst case, it can be assumed that the drain-source voltage that the device will experience in the two-level topology is equal to the DC bus voltage \(V_{DC}\).  
\[P_{sw,m}=f_{sw}\cdot k_{v}\cdot E_{tot}(\langle I_{DS}\rangle),\qquad k_{v}= \frac{V_{DC}}{V_{DS,test}} \tag{8}\]  
Assuming (i) there is no dead-time when neither of the MOSFETs that comprise a phase leg of the converter are engaged, (ii) the majority of the current flows through the channel of the MOSFET rather than its internal body diode, and (iii) a sinusoidal pulse width modulation scheme is used to generate the high-frequency switching signals that engage the MOSFETs in the power electronic converter \(\langle I_{DS}\rangle\) and the RMS drain current (\(I_{DS}\)) of the MOSFET can be estimated from the RMS phase current and the current modulation index value \(m_{a}\) as follows, where \(cos(\phi)\) relates to the power factor of the PMSG, which can be assumed to be 1 in most PMSG applications, as shown in (9).  
\[\langle I_{DS}\rangle=m_{a}\cdot\frac{\sqrt{2}I_{ph}}{4}\cdot cos(\phi),\qquad I _{DS}=\frac{I_{ph}}{\sqrt{2}} \tag{9}\]  
MOSFET conduction losses \(P_{cd,m}\) are equal to the \(I^{2}R\) losses caused by the on-resistance of the MOSFET \(R_{DS,mn}\), as shown in (10).  
\[P_{cd,m}=I_{DS}^{2}\cdot R_{DS,mn} \tag{10}\]  
The switching losses of the body diode \(P_{sw,d}\) are largely related to the diode's reverse-recovery time, which occurs when the MOSFET switches off. The charge accumulated during this time is denoted as \(Q_{rr}\) and is often provided in the datasheet for the device. From this, the diode switching losses can be estimated as presented in [31] and shown in (11).  
\[P_{sw,d}=\frac{1}{4}\cdot f_{sw}\cdot Q_{rr}\cdot V_{DC} \tag{11}\]  
Similar to the MOSFET, body diode conduction losses are related to the \(I^{2}R\) losses of the diode. However, under the assumption that the majority of the current flows directly through the MOSFET rather than the internal body diode, the conduction losses of the body diode can be assumed to be zero.  
Figure 3: Schematic of a two-level voltage source converter.  
Overall, the total losses of a single device \(P_{dev}\) can be estimated using (12) below.  
\[P_{dev}=P_{sw,m}+P_{ed,m}+P_{sw,d} \tag{12}\]