# Mini-Review: Modeling and Performance Analysis of Nanocarbon Interconnects
## 2 Graphene Nanoribbon (GNR) Interconnects
### Vertical Graphene Nanoribbon (VGNR) Interconnects  
Although the MLGNR interconnects show excellent electrical properties in terms of low resistance and high reliability, they may hinder the heat dissipation in vertical direction due to the anisotropic property [43]. To resolve this issue, the scheme of vertical graphene nanoribbon (VGNR) interconnect, as shown in Figure 6, was proposed and studied in [44]. Unlike the top-contacted MLGNR interconnect shown in Figure 2b, each layer in VGNR interconnect can participate in the electron transport, thereby reducing the contact resistance. Figure 5: Time delay ratios of MLGNR interconnects and Cu wires at the (**a**) intermediate level and (**b**) global level [28]. As described in [45], the vertical graphene layers have been realized experimentally. Definitely, further improvement in the fabrication of long and highly aligned VGNRs is still required for their practical usage as on-chip interconnects [46]. A possible fabrication process is outlined briefly in the following. First, a catalyst layer is sputtered to grow graphene layers. Then, the vertical graphene layers grow below these layers, which are removed subsequently. VGNR interconnects are obtained finally by patterning the vertical graphene layers. As aforementioned, VGNRs can also be assumed to be decoupled [33; 34; 39], and the resistance is a parallel connection of the resistance of each layer. Figure 7a shows the p.u.l. resistance of a monolayer GNR interconnect with a 400 \(\upmu\)m length and the 0.2 eV Fermi level. It is shown that the resistance of a monolayer GNR increases with the decreasing width. For GNRs with \(p<1\), the resistance increases superlinearly with the decreasing width when the width becomes smaller than 10 nm. This superlinear relationship between GNR resistance and width becomes more significant as \(p\) decreases. Note that for on-chip interconnect applications, the aspect ratio is always larger than 1 [2]. Therefore, it can be concluded that VGNR, which has a larger GNR width, possesses smaller resistivity than horizontal MLGNR. Figure 7b shows the time delay of Cu, horizontal MLGNR, and VGNR interconnects at the intermediate level. It can be found that the decrease in specularity parameter can effectively improve the electrical performances of GNR interconnects. When \(p=1\), the horizontal MLGNR and VGNR show similar performances. As is well known, however, the perfectly specular edges are difficult to fabricate [47]. Therefore, in practical applications, for \(p<1\), the VGNR interconnect can provide smaller time delay than horizontal MLGNR interconnect. In other words, VGNR interconnect requires smaller specularity parameter than the horizontal MLGNR one, thereby reducing the process difficulty. As described earlier, the graphene is an anisotropic material, and its out-plane thermal conductivity is much lower than the in-plane one. Here, the in-plane and out-plane thermal conductivities of graphene are assumed as 1750 W/m-K and 10 W/m-K, respectively [48]. Under such circumstance, the  
Figure 6: Schematic of vertical graphene nanoribbon (VGNR) interconnect. Figure 7: (**a**) Per-unit-length resistance of the monolayer GNR with different specularity parameters. (**b**) Propagation delay of intermediate level Cu, horizontal MLGNR, and VGNR interconnects at the 7.5 nm technology node [44]. horizontal MLGNR would hinder heat dissipation in vertical direction, thereby threatening the IC performance and reliability. It has been found that VGNR interconnects are likely to solve this problem. Figure 8a depicts the unit cell for simulation performed in commercial software COMSOL Multiphysics, with the geometrical parameters adopted at the 7.5 nm technology node from ITRS projection [2]. In the simulation, an equivalent packaging layer is considered, and the bottom junction temperature and the top ambient temperature are assumed as 378 K and 318 K, respectively.