# Throughput and Packet Loss Probability Analysis of Long Range Wide Area Network
## 2 LoRaWAN System Model  
A typical LoRa physical layer provides configuration parameters, including carrier frequency, spreading factor, bandwidth, and coding rate. Actual packet transmission time in LoRaWAN is determined by spreading factor, bandwidth, and coding rate. The carrier frequency (CF) is the center frequency that can be programmed in units of 61 Hz between 137 MHz and 1024 MHz. Spreading Factor (SF) is a ratio between a symbol rate and a chip rate, and has a value ranging from 6 to 12. The number of chips per symbol is defined as \(2^{SF}\). As SF increases, the transmission radius of an ED increases due to the increase of SNR. However, in this case, the packet transmission time also increases; therefore, the energy consumption of the ED increases as a consequence. Bandwidth (BW) is the frequency width of the transmission band and the available bandwidth is 500 kHz, 250 kHz, and 125 kHz in LoRaWAN. As BW increases, the packet transmission rate increases, but the SNR decreases due to an additional noise. LoRaWAN includes a forward error correction (FEC) code that is used for controlling errors in data transmission. Coding rate (CR) of the FEC is the proportion of the useful information and the total data bits and it can be set to either 4/5, 4/6, 4/7, and 4/8 in LoRaWAN. As CR increases, the information protection function improves, but the transmission time increases due to large amount of redundant bits. In LoRaWAN, the packet transmission time is denoted by a time-on-air (ToA), which is the sum of the length of the preamble (\(T_{pb}\)) and the length of the actual packet payload (\(T_{pl}\)) [11], which is given by  
\[ToA=T_{pb}+T_{pl}. \tag{1}\]  
Let \(n_{pb}\), \(n_{pl}\), \(T_{S}\), SF, and \(CR\) be the number of preamble symbols for LoRaWAN, the number of payload bits, the duration of a symbol, the spreading factor, and the coding rate, respectively. Then \(T_{pb}\) and \(T_{pl}\) are calculated by  
\[T_{pb}=(n_{pb}+4.25)\cdot T_{S},\ \ \ T_{pl}=n_{pl}\cdot T_{S}, \tag{2}\]  
where \(n_{pl}=8+\max\left(\lceil\frac{8 PL-4 SF+28+1 GRCR-20 IH}{4(SF-2 DE)}\rceil(CR+4),0\right)\), \(T_{S}=\frac{1}{R_{S}}\), and \(\lceil\cdot\rceil\) is a ceiling function. In (2), CRC = 1 if cyclic redundancy check functionality is enabled, or CRC = 0 otherwise. IH specifies the presence of PHY header; IH = 1 (0) for implicit (explicit) operation mode. DE indicates the using of data rate optimization; DE = 1 if enabled, or DE = 0 otherwise. \(R_{S}\) is the symbol rate composed of the BW and the number of chips per symbol, which is calculated by  
\[R_{S}=\frac{BW}{2^{SF}}. \tag{3}\]  
PL is the number of bytes in the payload, and is calculated as  
\[PL= MH+FH_{addr}+FH_{ctl}+FH_{cnt}\] \[+FH_{opt}+F_{port}+FRM_{pl}+MIC, \tag{4}\]  
where \(MH\), \(FH_{addr}\), \(FH_{ctl}\), \(FH_{cnt}\), \(FH_{opt}\), \(F_{port}\), \(FRM_{pl}\), and \(MIC\) are the MAC header length, the frame header address field length, the frame control field length, the frame counter field length, the optional field's length, the port identifier length, the frame payload length, and the message integrity code length, respectively [11]. Here, all parameters except \(FRM_{pl}\) have fixed value; therefore, (4) is re-written by  
\[PL=13+FRM_{pl}. \tag{5}\]  
By combining (1), (2), (3), and (5), we have  
\[ToA=\frac{2^{SF}}{BW}\bigg{(}20.25+\text{max}\left(\lceil\frac{8(13+FRM_{pl})-4 SF+44}{4(SF-2 DE)}\rceil\cdot 5,0\right)\bigg{)}, \tag{6}\]  
where \(DE=0\) for \(6\leq SF\leq 10\), and \(DE=1\) for \(11\leq SF\leq 12\).