# A Low-Power Read-Decoupled Radiation-Hardened 16T SRAM for Space Applications
## 1 Introduction  
With the advancement of science and technology, satellite systems have become essential infrastructure supporting various aspects of modern life, including communication, military surveillance, weather observation, and disaster monitoring. As the demand for lightweight satellites increases, there is a growing need for high-density and energy-efficient electronic circuits capable of delivering high performance within limited area and power constraints [1]. Among these, static random-access memory (SRAM) is widely employed in satellite systems for control and digital data processing due to its high packing density and fast access speed [2, 3]. However, the harsh space environment--characterized by extreme temperature variations and highly energetic radiation--poses significant challenges to the reliability of integrated circuits [4]. When energetic particles strike sensitive nodes in an SRAM cell, they can generate electron-hole pairs that induce transient voltage pulses. If the amplitude and duration of these pulses exceed the switching threshold of logic circuits, they may flip the stored data, resulting in a single-event upset (SEU) [5]. Such soft errors can cause functional failures and compromise the reliability of the entire system. Moreover, continued scaling of CMOS technology has led to reduced spacing between transistors,making SRAM cells increasingly susceptible to single-event multi-node upsets (SEMNU), where a single particle strike affects multiple closely spaced nodes [5]. Due to the low node capacitance and high integration density of SRAM designs, existing approaches often fail to provide sufficient protection against SEU and SEMNU. To mitigate SEU, techniques such as triple modular redundancy (TMR) and error correction codes (ECC) have been employed [6]. The ECC approach, although effective, requires additional circuitry for encoding and decoding, leading to significant penalties in area and power consumption, which makes it unsuitable for most designs [7]. Similarly, TMR utilizes three replicated memory cells and performs majority voting to determine the correct output value. Even if one copy is flipped due to an SEU, the other two dominate the voting process [8]. However, this method also incurs substantial area and power overhead, making it impractical for resource-constrained applications. While effective, these approaches incur significant penalties in terms of area, power, and delay, making them impractical for resource-constrained satellite platforms. As a result, structurally enhanced radiation-hardened SRAM cells have emerged as promising alternatives, offering soft-error resilience with lower overhead [9]. The conventional 6T SRAM cell, based on cross-coupled inverters, suffers from strong positive feedback [2]. As a result, a bit flip at one storage node due to an SEU automatically alters the complementary node, leading to complete data corruption. Furthermore, the low critical charge of the sensitive nodes makes the 6T SRAM cell prone to radiation-induced transients. Consequently, 6T SRAM cell is inherently limited in its ability to withstand SEU and SEMNU in radiation-intensive environments. These challenges highlight the need for new SRAM architectures that offer robust error recovery capabilities while maintaining low power and area overhead. Over the past few years, numerous radiation-hardened SRAM cells have been proposed by researchers. For instance, the QUATRO-10T cell employs negative feedback to enhance SEU resilience; however, its immunity is limited to the logic high state [10]. The '0'-storing node remains susceptible to upsets, resulting in partial immunity and suboptimal read/write performance. The WE-QUATRO cell improves write ability compared to its predecessor but still lacks full SEU protection for the '0'-storing node and provides only marginal enhancement in read stability [11]. The QUCCE12T cell focuses on minimizing layout area through complex routing schemes [12].