## 3 Materials and Methods
### Interleaved Boost DC-DC Converter  
The Schematic representation of the interleaved boost DC-DC converter is shown in Figure 3b. Due to its increased efficiency with reduced voltage/current ripples, an interleaved boost DC-DC converter topology is most suited for EMI suppression, which also reduces the size of both the inductor and the capacitor. In this design, the three-phase interleaved boost DC-DC converter [31] topology has been utilized to generate the control signals for the switching activities. The EMI attenuation in the converter is done through the application of a periodic dithering technique, where the controlled oscillation of the switching duty cycle or switching frequency is utilized to spread the spectral energy. This decreases peak electromagnetic emissions by spreading harmonics across a broader frequency band, hence minimizing interference. On the converter side, the smaller output ripple current requires a smaller capacitor at the load side. But, the common EMI is generated according to the high voltage at the components of switches and diodes in the converter. During this process, the switching frequency is maintained with a constant value by dithering the frequency of the PWM signal. Due to the increased number of switches and phase-shifting operations, the converter could be noisy under a fixed switching frequency. To satisfy the EMI standard, a dithering-based filtering technique is employed in this model to minimize the significant amount of space. When compared to other costly filtering techniques, the frequency dithering model is used to reduce the EMI at reduced cost. Moreover, the dithering parameters considered in this design are the bandwidth of the switching frequency, phase of dithering signal, and sweep. Then, the converter's frequency variation is assessed based on the amplitude of the modulating signal. The key parameters used for designing this converter topology are as follows [32]: bandwidth, contrast, and sweep, in which the bandwidth is determined based on the frequency range of the dithered signal. As depicted in Figure 3a, the PWM function \(\mathrm{P(f)}\) can be generated with respect to the duty cycle \(\mathrm{D_{c}}\) and switching period \(\mathrm{S}\) by using the following equation:  
\[\mathrm{P(f)}=\sum_{n=-\infty}^{+\infty}M_{n}e^{\mathrm{i}\varphi_{n}}, \tag{5}\]  
where \(\mathrm{M_{n}}\) indicates the magnitude of the nth harmonic and \(\varphi_{n}\) represents the phase of the nth harmonic. Based on dithering, the switching frequency of the PWM signal has been modulated, and its nth is estimated as follows:  
\[\alpha\Delta=2\pi\frac{\mathrm{D_{ma}}-\mathrm{D_{mi}}}{2}, \tag{6}\]  
where \(\alpha\Delta\) represents the frequency of the dithering signal, \(\mathrm{D_{ma}}\) and \(\mathrm{D_{mi}}\) are the maximum and minimum values of the signal, respectively. Consequently, the modulation index \(\delta\) has been computed as shown below:  
\[\delta=\frac{\alpha\Delta}{\alpha_{d}}, \tag{7}\]  
where the sweep is defined as the frequency of dithering; if it increases, the value of the modulation index can be decreased. Similarly, the contrast has been estimated based on the phase shift between the dithering signals.