# MLoF: Machine Learning Accelerators for the Low-Cost FPGA Platforms
## 4 Comparison of Development Platforms  
The specifications of 10 different FPGA platforms from seven different producers are thoroughly analyzed. The key features of these FPGA cores are listed in Table 3. It is worth  
Figure 8: Block diagram of SNLF. Figure 9: SVM algorithm implementation. (**a**) Block diagram of SVM. (**b**) Scheduling of the SVM processing. noting that Intel MAX and Xilinx Artix-7 FPGA have the richest LUTs and DSPs, which are beneficial for the parallel implementation of multi-input machine learning algorithms. Additionally, on-chip Random Access Memory (RAM) resources are important. Otherwise, a large amount of pre-trained data must be pre-fetched from memory to the cache and limited LUTs resources cannot be used as buffers to cache data during the calculation. Pango PGL12G, Lattice MachXO2, and Anlogic EG4S20 all have limited RAM capacitances. Anlogic EG4S20 has an internal SDRAM module that satisfies the need for additional caching. In addition, static power consumption is a critical metric for endpoint platforms, and Anlogic FPGAs, Intel Cyclone 10 LP, and Microchip M2S010 perform well in this regard. Moreover, two Lattice FPGA platforms consume the least static power, which is quite competitive for endpoint implementations. Finally, both Anlogic EF2M45 and Microchip MS010 are equipped with an internal Cortex-M3 core, which significantly improves their general performance in terms of driving external devices and communication. \begin{table}
\begin{tabular}{c c c c c c c} \hline \hline
**Producer** & **Device** & **Manufacturer** & **Board Name** & **Memory** & **Interface** & **Price** \\ \hline \multirow{3}{*}{Anlogic} & EF2M45 & Nanjing & Sparkroad-M & / & / & \$25.9 \\ \cline{2-7}  & EG4S20 & \begin{tabular}{c} Ingen \\ Integrated \\ Circuit \\ \end{tabular} & Sparkroad & \begin{tabular}{c} SPI Flash, \\ microSD \\ \end{tabular} & \begin{tabular}{c} ADC, VGA, \\ DVP Arduino, \\ Raspberry Pi \\ \end{tabular} & \$49.9 \\ \hline \multirow{2}{*}{Gowin} & GW2A & MYMINIYE & Combat & \begin{tabular}{c} DDR3, SPI \\ Flash, microSD \\ \end{tabular} & \begin{tabular}{c} RJ45, HDMI, \\ MIPI \\ \end{tabular} & \$169 \\ \hline \multirow{2}{*}{Intel} & Cyclone10 LP10 CL & QMTECH & Starter Kit & \
\begin{tabular}{c} SDRAM, SPI \\ Flash \\ \end{tabular} & ADC, MIPI & \$49.9 \\ \cline{2-7}  & MAX10M50 DAF & Terasic & DE10-Lite & SDRAM,
\begin{tabular}{c} VGA, \\ Accelerometer \\ \end{tabular} & \$85 \\ \hline \multirow{2}{*}{Lattice} & ICE40 UP5 & TinyFGA & TinyFPCA BX & SPI Flash & / & \$38 \\ \cline{2-7}  & MachXO2 & STEPFPGA & STEP-MXO2 & / & / & \$29.9 \\ \hline \hline \end{tabular}
\end{table} 
Table 4: The specification of 10 different FPGA boards. \begin{table}
\begin{tabular}{c c c c c c c} \hline \hline
**Producer** & **Device** & **LUTs** & **DSPs** & **RAM** & \
\begin{tabular}{c} **Static Current** \\ **(mA at 12 V, 25 °C)** \\ \end{tabular} & **Distinction** \\ \hline \multirow{2}{*}{Anlogic} & EF2M45 & 4480 & 15 & 700 Kb & 5 & Inside Cortex-M3 unit \\ \cline{2-7}  & EG4S20 & 19,600 & 29 & 156.8 Kb & 5 & Inside SDRAM unit \\ \hline \multirow{2}{*}{Gowin} & GW2A & 20,736 & 48 & 828 Kb & 35 & / \\ \cline{2-7}  & Cyclone10 LP10 CL & 6272 & 30 & 270 Kb & 5 & Low-power design \\ \cline{2-7}  & MAX10M50 DAF & 49,760 & 144 & 1638 Kb & 35 & / \\ \hline \multirow{2}{*}{Lattice} & ICE40 UP5 & 5280 & 8 & 128 Kb & 0.075 &
\begin{tabular}{c} Ultra low-power \\ design \\ \end{tabular} \\ \cline{2-7}  & MachXO2 & 6864 & / & 92 Kb & 0.08 & Low-power design \\ \hline Microchip & M2S010 & 12,084 & 22 & 512 Kb & 6.9 & Inside Cortex-M3 unit \\ \hline Pango & PGL12G & 12,480 & 20 & 85 Kb & 13 & / \\ \hline Xilinx & Artix-7 & 33,280 & 240 & 1800 Kb & 14 & / \\ \hline \hline \end{tabular}
\end{table} 
Table 3: The resource of 10 different FPGAs. All seven producers develop their own Electronic Design Automation (EDA) software, among which Lattice develops a completely different EDA software for different devices. In addition, the final resource consumption is determined by synthesis tools.