## 2 Proposed TSP Readout System
### Sensing Back-End  
Although a filtering effect is implemented in the sensing front-end using CCII and C2V, which performs bandpass filtering to mitigate external noise, the noise environment can be varied in modern commercial mobile devices. In particular, the VRR driving in the DDI necessitates a more systematic adaptive filtering approach in the TSP readout system. The sensing back-end comprises a Gaussian-shaped sample and hold (S/H) circuit, and a successive approximation register (SAR) ADC. The Gaussian-shaped S/H circuit features both a discrete-time (DT) finite impulse response filter (FIR) effect and voltage sampler for A-D conversion by successively sampling the output of C2V onto the reconfigurable sampling capacitor C\({}_{\text{GS}}\), as shown in Figure 6. The C\({}_{\text{GS}}\) is composed of 15 unit capacitors C\({}_{\text{GS,u}}\) [14:0] to enhance matching accuracy, with their values continuously increasing and decreasing in a Gaussian-shaped manner synchronized to twice the frequency of f\({}_{\text{TSP}}\). The operating timing diagram and the schematic of the Class AB op-amp are also presented in Figure 6. First, the control signal V\({}_{\text{S}}\) and V\({}_{\text{S,Pre}}\) are applied to input and feedback switches during the sampling phase. In this phase, the output (V\({}_{\text{S/H,O}}\)) is maintained at half the supply voltage (=V\({}_{\text{CM}}\)) due to the unity-gain feedback configuration, while V\({}_{\text{C2V}}\) is sampled on the left-side plate of C\({}_{\text{GS}}\). After disabling V\({}_{\text{S,Pre}}\) and then V\({}_{\text{S}}\) to eliminate input-dependent charge injection, the sampled charge on C\({}_{\text{GS}}\) is transferred to C\({}_{\text{F}}\), generating an output of V\({}_{\text{C2V}}\)\(\times\) (C\({}_{\text{GS}}\)/C\({}_{\text{F}}\)). Since C\({}_{\text{GS}}\) varies in each S/H phase, the generated output level V\({}_{\text{S/H,O}}\) is adjusted according to the Gaussian coefficients gains G\({}_{\text{GCTR}}\) [14:0] applied to C\({}_{\text{GS}}\), effectively implementing a DT FIR filter of the digital signal processor (DSP) in the analog signal. Therefore, when G\({}_{\text{GCTR}}\) [14:0] reaches its maximum value 0 \(\times\) 7 FFF, the S/H gain is maximized with all C\({}_{\text{GS,U}}\) enabled, and subsequently decreases to its minimum within the scan-time. The scan time is determined by the product of twice the inverse of f\({}_{\text{TSP}}\) and the number of Gaussian filter coefficients (N\({}_{\text{Gauss}}\)). The primary goal of implementing Gaussian filtering in the analog domain is to achieve an area- and power-efficient solution compared to its digital counterpart. However, as the number of Gaussian coefficient levels increases, the design complexity in the analog domain also rises. Therefore, a careful trade-off must be made to balance efficiency and complexity. Figure 7a illustrates the frequency response based on the Gaussian coefficient quantization levels, comparing the results from 4-bit (4b) and 7-bit (7b) discrete Gaussian levels with a continuous-time (CT) Gaussian waveform. In 4b quantization, the filter coefficients range from \(-\)7 to 7, while in 7b quantization, the range extends from \(-\)63 to 63, offering improved approximation of the continuous-time Gaussian waveform at the cost of increased implementation complexity. Here, the TSP driving frequency f\({}_{\text{TSP}}\) is set to 200 kHz, with the number of filter taps set to 64, resulting in 160 us scan-time. The bandwidth within the main lobe frequency is measured to 40 kHz, which remains consistent across all three cases. However, the external noise immunity at 1.4 times the main frequency (=200 kHz), or the sideband ripple in the 4b quantization, is degraded by 16.4 dB compared to the ideal CT Gaussian waveform. This issue can be mitigated using the previously mentioned analog BPF, which is implemented with a CCII and C2V, making the 4-bit design a practical trade-off between performance and complexity.