# Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors
## 5 Analogue Counter Cumulative Noise  
Through noise measurement and iterative modelling, it is established that the analogue integrator circuits employed in SPAD-based counting pixels suffer from cumulative noise. For each SPAD event, noise affecting the counter circuit modulates the circuit sensitivity, and as the pixel integrates, the noise cumulates. Although the passive CTA pixel suffers from the \"in-filling\" distortion mechanism described in the previous section, all analogue integrator structures such as CTAs or switched current sources (SCS) [36; 37] circuits will suffer from cumulative noise to a certain degree. The two main sources of cumulative noise are thermal noise through the switched path (which exhibits as a kT/C noise on the in-pixel capacitor, with the SPAD dead time, or counter switch time, controlling the thermal noise bandwidth) and systematic temporal noise on the common supplies. Of course, for long integration times, 1/_f_ noise in the counter circuit and low frequency temporal noise on the common supplies will also modulate the integrator sensitivity and contribute cumulative noise. The PSW method is employed on one pixel in the test array in [15] to evaluate for this cumulative and signal dependent noise source. Multiple experiments were captured (each with an individual PCH as seen in Figure 3), and for each experiment the integration time (from 1 us to 100 us) was increased to obtain greater number of SPAD events. An example of the combined PCH is modelled in Figure 5a. Figure 5b extracts the increasing peak width indicating the presence of a cumulative noise source (\(\sigma_{\text{C}}\)) from measured data. A linear fit (solid black line) identifies an \(\sigma_{\text{C}}\) = 86.9 V RMS noise increase per SPAD event. The model shown in Figure 5a is matched with 86.9 V RMS noise per counter step and the modelled FWHM response is shown alongside (dashed red line) in Figure 5b. The cumulative noise modelled response \(S_{N}\) after \(N\) steps can be modelled to first order by expanding Equation (4) into an iterative expression assuming the cumulative noise is Gaussian. The initial reset level \(S_{0}\) (\(N=0\)) is assumed constant with no FPN and no noise terms (a Dirac function). The first modelled counter step \(S_{1}\) has \(\sigma_{\text{C}}\) cumulative noise applied. The second step \(S_{2}\) is the convolved response of the first counter step with the same Gaussian cumulative noise, and so on, as an iterative convolution for subsequent counter steps as shown in Equation (8):  
\[S_{N}\left(v_{N}\right)=\frac{1}{\sigma_{\text{C}}\sqrt{2\pi}}\cdot exp\left( -\frac{\left(v_{N}-S_{N-1}\left(v_{N-1}\right)\right)^{2}}{2\sigma_{\text{C}} {}^{2}}\right) \tag{8}\]  
where the \(v_{N}\) represents the voltage range of interest. The same PSW procedure is performed for the full 320 \(\times\) 240 image sensor in [16]. The imager has 700 \(\upmu\)V RMS noise per SPAD event, an increase of approximately 8 times. This is attributed to an increase of kT/C noise due to both the main and parasitic capacitors decreasing in size between the sensors, the capacitance ratio increasing from approximately doubling from 0.013 to 0.03, and an increase in temporal noise due to many more pixels active on the same supplies. Although it is \begin{table}
\begin{tabular}{c c c c c} \hline \hline \(V_{SOURCE}\)**Bias** & **Linear Full Well** & **Sensitivity from** & **Input Referred** & **Equivalent Linear** \\
**Voltage (mV)** & **Voltage (mV)** & **Linear Fit** & **Read Noise** & **Full Well** \\  & & **(mV/SPAD Event)** & **(SPAD Events)** & **(SPAD Events)** \\ \hline
200 & 802.8 & 14.26 & 0.064 & 56 \\
300 & 722.1 & 11.23 & 0.082 & 64 \\
400 & 651.4 & 8.21 & 0.113 & 79 \\
500 & 648.3 & 5.19 & 0.178 & 125 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Photon counting performance of 320 \(\times\) 240 SPAD-based image sensor [16].