# Low-Cost COTS GNSS Interference Monitoring, Detection, and Classification System +
## 3 Hardware Design
### Power Consumption and Optimization
Therefore, a central processing unit (CPU) may not be the best processing platform. A possible improvement of the system is to replace the Raspberry Pi 4B with a more power-efficient SBC, such as a Raspberry Pi Zero 2 W (according to [81], it has half the power consumption in idle mode), and to use an efficient co-processor for the SDR operations such as a field-programmable gate array (FPGA) [82], a dedicated digital signal processor (DSP) [83], a graphics processing unit (GPU) [84], or tensor processing unit (TPU) [85; 86]. The core concept is to leverage the strengths of different architectures for efficient processing [87]. However, all such approaches require significant hardware and software redesign, which results in higher development costs. Nevertheless, for energy efficiency and large-scale deployment, such optimizations are crucial. Another approach is to change the architecture to minimize the SDR processing. A simple approach is to transmit the raw IQ data from the SDR to a server for processing, thereby omitting the SDR processing on the monitoring node altogether. However, it requires more data to be transmitted over the communication link, resulting in more power consumption from communication (e.g., WiFi transmission), higher data throughput (i.e., it is a burden on the network), and, if an external communication link is used (e.g., mobile networks using LTE or 5G), considerably more costs. The benefit is that it may reduce power consumption on the receiver and facilitate higher fidelity classification algorithms on the server. Given these aspects, such an inefficient system motivates processing on the SBC to limit data throughput. Alternatively, the SDR processing is only applied when an interference signal is expected. In such an architecture, the SDR is switched off by default, and the initial interference detection is based only on the GNSS pHat measurements. Once an interference signal is detected, then the SDR processing is enabled for improved detection and interference classification. It could potentially save 25% of the power consumption in the default mode. Figure 5: Average power consumption of the different parts of the monitoring station, in [W]. However, this approach limits performance to only the GNSS receiver and applies to interference signals that are present longer. An interference signal only present for a short duration will not be recorded if there is a delay in enabling the SDR processing. An example is a roadside monitoring station to detect PPDs in passing vehicles: a vehicle may only be observed for a second or two while traveling on a highway. With the 1 Hz update rate of the GNSS receiver (or the worst case 5 s delay from ML detection, see Section 4), it may be too slow to realize that an interference signal is present and switch the SDR processing on. Therefore, dynamically enabling the SDR may save power, but has limitations for several applications. This concept may also be extended by periodically switching the entire platform off or into sleep mode. An application could also be the roadside monitoring case, where the interference monitoring station is only online in peak traffic. It would improve the number of vehicles observed to the system power consumption ratio, resulting in an efficient engineering solution. However, it significantly reduces the POI, which reduces system coverage. The third largest part is the power used by the NeSDR RFFE. It shows that the idle hardware power requirements should not be underestimated. A possible improvement is to select a more power-efficient SDR RFFE, but it is challenging to find an RFFE that is both power-efficient and low-cost, such as the NeSDR. However, suppose the co-processor idea of the previous paragraph is combined with using a different RFFE.