# Ultrasound-Based Smart Corrosion Monitoring System for Offshore Wind Turbines
## 4 Smart Ultrasound Sensor Design
### Design Methodology  
The design of a highly integrated monitoring system involves the collaboration between several design teams: analog circuits, digital signal processing, FPGA and microcontroller development, PCB prototyping and design, validation, etc. To coordinate the efforts from different teams, it is very important to have a system design methodology that takes you from the conceptual design to the final device to be deployed. We have used a prototype-based design methodology in which the system is first designed from large building blocks that allow us to define the system using high-level abstraction languages, such as MATLAB or C/C++. As can be seen in Figure 4, the main blocks of the system prototype include a PC/Laptop and an Ultrasound Testbed. The latter is composed of a high-performance embedded processor that is able to generate and acquire ultrasound signals. The embedded processor runs a Linux system with the Debian distribution and includes an SD card for mass storage, Ethernet and Wi-Fi connections, and access to an internal FPGA that serves the purpose of buffering the ultrasound data from a high-speed 14-bit ADC. The Ultrasound Analog Front End (AFE) is composed of a pulser generator, adaptation circuitry, and a variable gain amplifier. The system prototype permits us first to set up an experiment and gather raw ultrasound data for a variety of steel samples with different coatings, to test different piezo sensors, and change the experiment conditions, such as temperature, signal frequency, number of pulses, etc. The raw data is stored as a JSON file in a data repository that can be accessed from MATLAB to design and test signal processing and detection algorithms with the aim of estimating the time-of-flight from the ultrasound response. Secondly, thanks to the embedded system, it is possible to run a C/C++ implementation of the algorithm in the Red Pitaya microprocessor and test it for quantization effects. In this case, the embedded system is responsible for estimating the time-of-flight, and the data obtained can also be uploaded to the data repository as a JSON file. The hardware architecture of the final implementation is designed by analyzing the computing requirements of the algorithms designed in the prototype phase. We have chosen an architecture that includes a low-power Cortex-M4-based microcontroller (\(\upmu\)C), an FPGA that interfaces with the \(\upmu\)C using an SPI link and the AFE devices. The \(\upmu\)C is in charge of supervising the system, i.e., powering on and off the different devices (FPGA, AFE, memories), launching measurements and gathering the results and raw data from the FPGA using the SPI interface and providing communication interfaces with the external world (UART and wireless communications). The high-speed sampling of the ultrasound signals has called for the use of an FPGA. Ultrasound signal generation is also handled by  
Figure 3: Block diagram of the signal processing chain. the FPGA to produce synchronized signals for the pulser. The processing of ultrasound data requires intensive computation that is more efficiently performed in the FPGA. By having models of the processing of ultrasound signals at different abstraction levels (MATLAB, C/C++, and FPGA), it is possible to perform validations at different stages of the design process as it advances towards the final implementation using the raw data stored in the data repository (see Figure 4). In this way, we can feed the MATLAB model with the real data from the miniaturized system and compare the ToF results obtained for verification. Finally, after validating the ultrasound test method and algorithm implemented in UT, it has been migrated to a miniaturized system, as shown in Figure 5 (right), being able to place it inside a wind turbine to conduct ultrasound tests in the real scenario. The performance specifications of the miniaturized solution are given in Table 3.