# Reduced Complexity Sequential Digital Predistortion Technique for 5G Applications
###### Abstract
Recently, several research efforts have focused on the reduction of the required bandwidth of the feedback path, also referred to as the observation bandwidth, in order to enable the predistortion of power amplifiers driven by wideband signals using architectures with observation bandwidths that are less than five times that of the transmitted signal [17, 18, 19, 20, 21, 22, 23]. In [17], a sub-band decomposition technique is proposed to divide the signal spectrum into different ranges to be processed separately. These ranges are overlapping in the frequency domain due to the nature of decomposition filters. Compensating for this overlap and ensuring signal reconstruction once the predistortion function is applied typically requires significant computational overhead. In [18], extended correction bandwidth is achieved while using analog to digital converters operating at a reduced sampling rate. However, this leads to a significant hardware overhead by requiring two feedback paths as well as the use of an analog predistortion function. The bandlimited DPD system proposed in [19] uses a relaxed sampling rate and does not add significant computational overhead. The main drawback in this technique is that the correction bandwidth of the digital predistorter is identical to the observation bandwidth of the feedback path. This issue was addressed in [20, 21] where a correction bandwidth larger than the observation bandwidth was reported. However, this was achieved at the expense of complex signal spectral extrapolation technique [20] and hardware overhead [21]. The authors in [22] proposed a low-complexity technique to extend the correction bandwidth of digital predistortion system through the use of a synthetic test signal. This made this technique valuable for laboratory experiments but not useful for field deployed systems. A two-box DPD system with extended correction bandwidth was proposed for an LTE-A power amplifier [24]. This predistortion system uses a bank of look-up tables (LUT)-based memoryless predistortion functions that are pre-calculated from offline measurements, which represents a limitation. Accordingly, previously reported techniques suffer either from a degradation in the correction bandwidth due to the limitation of the observation bandwidth, or a significant computational/hardware complexity overhead in order to maintain the correction bandwidth while operating the DPD feedback path at a relaxed sampling rate. This represents a major limitation in state-of-the-art work. Hence, a low-complexity digital predistortion technique in which a reduced sampling rate can be used without limiting the correction bandwidth is needed. In this paper, a sequential digital predistorter (S-DPD) system built using a twin nonlinear two-box (TNTB) predistorter able to achieve an extended correction bandwidth is proposed. The proposed predistorter system contrasts with previously reported TNTB predistorters [23, 24] in several major aspects. Firstly, the predistortion function is identified in two sequential steps: two consecutive characterizations using reduced feedback bandwidth are used to derive the static predistortion sub-function implemented as a memoryless look-up table, and then the dynamic nonlinear sub-function implemented as a memory polynomial (MP). Secondly, the S-DPD system does not require any hardware overhead to implement the predistortion function. Indeed, only a single standard feedback loop is needed to derive the predistortion function since the sequential characterization is performed within the digital domain. Thirdly, the computational complexity associated with the proposed S-DPD system is reduced by adopting a coarse delay estimation and alignment algorithm while calculating the coefficients of the memory polynomial sub-function of the predistorter and alleviating the need for data de-embedding when identifying the second predistortion sub-function.