## 2 Computational Simulation Models
### Smart Transformer
#### 2.1.1 Medium Voltage Inverter  
An overall representation of the ST's MV inverter model and associated control structure is shown in Figure 3. The power stage of the ST's MV inverter is modeled in the _AC/DC Inverter_ block. The MV inverter is operated in grid-tied mode, thus controlling the active and reactive current injected in the MV network. For that reason, the interface of the MV inverter with the MV AC network was modeled using controlled current sources. According to the DAM approach, the low-level voltage control loop and the modulation mechanisms (e.g., PWM, SPWM or others) can be neglected without affecting the dynamics of the controller of the MV inverter [34]. The interface of the MV inverter with the MV DC bus is modeled using a controlled current source. Equations (1)-(3) define the power balance between the MV inverter and the remaining elements connected to the MV DC bus. \[IDC_{MVinv}=\frac{PMV_{Inv}}{VDC_{MV}}=\frac{1}{VDC_{MV}}\left(Va_{MV}\cdot Ia _{MV}+Vb_{MV}\cdot Ib_{MV}+Vc_{MV}\cdot Ic_{MV}\right) \tag{1}\]  
\[VDC_{MV}=\frac{1}{C_{MV}}\int IMV_{cap}dt \tag{2}\]  
\[IMV_{cap}=IDC_{MVinv}+IDAB_{MV}+IDC_{MVg} \tag{3}\]  
Figure 2: Smart Transformer—overall structure of the developed computational model. The power transference between the MV network and the MV DC bus is determined by Equation (1), where \(IDC_{MVinv}\) is the DC current in the controlled current source interfacing the MV DC bus, \(PMV_{Inv}\) is the active power in the MV inverter, \(VDC_{MV}\) is the DC voltage in the MV DC bus, \(Va_{MV},Vb_{MV},Vc_{MV}\) are the MV AC voltages in each phase and \(Ia_{MV},IB_{MV},Ic_{MV}\) are the AC currents in each phase. The relation between \(IDC_{MVinv}\) and the MV DC bus is given by Equations (2) and (3), where \(C_{MV}\) is the capacitance of the MV DC bus, \(IMV_{cap}\) is the current flowing to \(C_{MV}\), \(IDAB_{MV}\) is the current exchanged between the MV DC bus and the isolated DC/DC converter and \(IDC_{MVg}\) is the current exchanged between the MV DC bus and the MV DC network. By controlling \(IDC_{MVinv}\), it is possible to control \(VDC_{MV}\) in order to follow the reference value for the voltage in the MV DC bus (\(VDC_{MVn}\)). The LC filter coupling the MV inverter to the upstream MV AC grid was also considered in the model, since it affects the main dynamics of the MV inverter's controller. The LC filter was dimensioned according to Equations (4) and (5), where \(L\) is the filter inductance, \(C\) is the filter capacitance, \(f_{c}\) is the cut-off frequency and \(Z_{0}\) is the characteristic impedance of the filter. \(Z_{0}\) is given by Equation (6), where \(VDC_{MVn}\) is the nominal voltage of the MV DC link of the MV inverter and \(IMVmax_{p}\) is the maximum AC current peak value of the MV inverter. A \(f_{c}\) value of 2 kHz was also considered, providing an acceptable rejection of the harmonic content which would derive from the power inverter switching at 20 kHz (\(-40\) dB/decade) while preserving an acceptable control bandwidth for the power inverter. \[f_{c}=\frac{1}{2\pi\sqrt{LC}} \tag{4}\]  
\[Z_{0}=\sqrt{\frac{L}{C}} \tag{5}\]  
\[Z_{0}=\frac{VDC_{MVn}}{IMVmax_{p}} \tag{6}\]  
Regarding the control structure, three main control structures are identified: _VDC Control_, _Current Control_ and _ESS Control_. Since voltage/VAr support is not addressed in this paper, reactive power injection is set to zero. Figure 3: Smart Transformer’s (ST) Medium Voltage Inverter model and respective control structure. The _VDC Control_ is responsible for regulating \(VDC_{MV}\), by generating a reference for the active power (\(P_{\mathit{rf}}\)). A PI controller is used to calculate \(P_{\mathit{rf}}\) using the error between \(VDC_{MV}\) and \(VDC_{MVn}\). \(P_{\mathit{rf}}\) is used by the _Current Control_ to determine the reference for the active current (\(Id_{\mathit{ref}}\)) to be followed by the MV inverter. The reference for the reactive current (\(Iq_{\mathit{rf}}\)) is set to zero, since voltage/VAr support is not addressed in this paper.