# A Low Phase Noise Frequency Synthesizer with a Fourth-Order RLC Loop Filter
## 3 Scheme Design  
The microcontroller (MCU) chip is C8051F330 from SILICON. The reference frequency source is a 50 MHz oven controlled crystal oscillator (OCXO). The reference signal is not frequency-divided, and the phase detection frequency is 50 MHz. The voltage regulator chip HMC1060 LP3E provides the circuit voltage. Figure 2 shows the system architecture. The MCU controls the PLL through its registers. The SPI protocol communicates between the MCU and the PLL. The OXO generates the reference signal through the R divider of the PLL. The PD outputs a voltage signal by comparing the reference signal with the output signal of the VCO after the N divider. This voltage signal is linearly related to the phase difference between the two signals. The loop filter eliminates the noise and high-frequency components of the voltage signal. The filtered signal is fed into the VCO, and the VCO outputs the corresponding signal at a specific frequency. This signal is then fed back to the PD. The PD compares the feedback signal with the reference signal to make their phase difference zero. The loop circuit goes into a locked state. At this point, the VCO outputs a stable single-frequency signal, which is output via the K divider. \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Loop Circuit Type** & **Noise (AMP)** & **Phase** & **Adjustable** \\  & & & **Parameter** \\ \hline RC integral filter & no & phase lag & 1 \\ passive proportional-integral filter & no & lead correction & 2 \\ active proportional-integral filter & yes & lead correction & 2 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Loop filter characteristics (first-order). The system's frequency division is described as follows [16]:  
\[ \begin{cases}f_{PD}=f_{REF}=\frac{f_{QSC}}{R}=\frac{f_{VCO}}{N}\\ \qquad\quad\quad f_{QUT}=\frac{f_{VCO}}{K}\\ f_{VCO}=\frac{f_{QSC}}{R}\Big{(}N_{int}+N_{frac}\Big{)}\end{cases}  \tag{6}\]  
In order to alleviate the impact of phase noise on the system, a new passive fourth-order RLC filter is proposed as the loop filter. ADIsimPLL is utilized to design the two types of loop filters. ADIsimPLL is the software for the simulation design of PLL frequency synthesizers. In the passive fourth-order RC filter, C1, C2, C3, and C4 are filter capacitors, and R1, R2, and R3 are filter resistors, forming a \(\pi\)-type RC filter circuit. The signal is first filtered by C1, which filters out most AC components. R1 and C2 form a passive proportional-integral filter. R2, C3, R3, and C4 form a two-stage voltage divider circuit. Due to the small capacitive reactance of C3 and C4, the voltage divider attenuates the AC component significantly, thus realizing the filtering. The topology and components of this loop filter differ from the passive fourth-order RC filter. The passive fourth-order RLC filter comprises a pre-filter C3 and an inverted L filter (L1, C2). The filter is coupled with a series inductor to obtain a better roll-off characteristic [17]. The inductor has a self-inductance effect and high inductive resistance to AC. However, it cannot reduce the output voltage compared to the resistor. When passing current, the inductor generates an electromotive force at each terminal to suppress the current changes such that it can operate as a filter. As the current increases, some of it will be stored in the inductor, gradually increasing the current. Meanwhile, as the current decreases, the reverse electromotive force hinders its decrease. Accordingly, a smooth DC current is obtained. Let us compare these two filter circuits. The filter resistor has the same resistance to DC and AC. In contrast, the filter inductor has a large inductance to AC and a small resistance to DC. This improves the filtering effect without reducing the DC output voltage. Therefore, the RLC filter is superior to the RC filter and obtains a smoother signal. Figure 3 compares the two circuit topologies. The closed-loop stability can be realized if, and only if, all roots of the characteristic equation of the closed-loop system have negative real parts [18].