# An Energy-Efficient Strategy for Microcontrollers
## 2 Related Studies and Motivation
### Related Work
In embedded SoCs, there usually exist several operating modes or power modes that can be used to save energy. Different modes require different electric currents to work with and take different periods of time to return to the normal mode. Generally, modes that consume less energy will take a longer time to return to normal mode [19]. A large amount of research has been performed to find the balance of energy-savings and real-time performance. [PERSON] et al. [20] proposed a method for selecting power modes for the optimal power management of embedded systems under timing and power constraints. [PERSON] et al. [21] proposed an interface for the power management of hardware and software components. [PERSON] et al. [22] propose an energy-savings technique that works by adaptively controlling the power mode of the embedded system according to the historical arrival of tasks. [PERSON] et al. [23] present an online framework to integrate DVFS with a power-mode management (PMM) scheme to save energy in embedded systems. [PERSON] et al. [24] propose a technique to save both leakage and dynamic energy in embedded systems by integrating DVFS and PPM. In 2013, [PERSON] et al. [25] proposed a method to save energy in the user equipment, whereby the user equipment switches to sleep mode during their nonactivity periods and wakes up when required. They also discussed a strategy to prolong the sleep period of the sensors for better energy efficiency. [PERSON] et al. [26] assumed that different ARM instructions have similar power consumption and proposed a framework for static-analysis-based smartphone application energy estimation. [PERSON] [27] conducted a test on ARM926 EJS among different types of data, operators, and function types and obtained a result that achieved the same function using different instructions that could have different energy consumption. In addition, modern compilers such as the GNU C Compiler (GCC) [28] and ARM Compiler (ARMCC) [29] also provide optimization options, whereby the compiler can attempt to optimize for small code size and high performance. However, lowering power consumption does not necessarily mean saving energy. [PERSON] et al. [30] researched the relationship between energy consumption and the program executing efficiency and pointed out that, in some situations, the growth rate of the power consumption is not always as high as that of the program execution efficiency. Thus, in this situation, the energy consumption can be lowered by improving the program execution efficiency. [PERSON] et al. [31] researched the relationship between the processor frequency and the energy consumed by program execution and pointed out that, with an increment in the processor frequency, the power consumed by the processor is increased, while the execution time of a program is reduced. The energy consumed by program execution can increase or decrease, varying based on the processor frequency. They proposed that the most energy-efficient processor clock frequency is below the designed maximum frequency, and the relationship between the energy consumption and frequency presents a U-shaped curve. In addition, because the voltage transitions can require time on the order of tens of microseconds [32], [PERSON] et al. [33], [PERSON] et al. [34], and [PERSON] et al. [35] pointed out that the operation of processor frequency scaling can also introduce additional energy consumption because of the transition time overhead. These studies have taken the overhead introduced by applying low-power technologies into account, but they focused more on designing low-power strategies from the perspective of system performance, especially system capacity and real-time performance. We believe that the overhead is not only a problem of system performance and energy consumption; it also has impacts on the DVFS strategy because it could be fairly significant and cannot be ignored.