# A 0.18 um CMOS Millimeter Wave Antenna-on-Chip with Artificial Magnetic Conductor Design
## 1 Introduction
In [19], based on the 130 nm CMOS process, a miniaturized broadband monopole antenna for the W-band was proposed. This paper reduces the size by 16.2% by using the hexagonal grid structure, and analyzes the angle of the grid to optimize impedance matching. For the bandwidth, the capacitance effect of the sixth and first layers of metal is used to achieve broadband, and the antenna bandwidth is 31.5%. In [20], it could improve the gain of 7 dBi at 85 GHz, and the maximum gain measured at 81.5 GHz is 1.61 dBi by coupling with the feed antenna by adding a square resonant ring. Ref. [21] analyzed the influence of the number of twists of the monopole antenna on the operating frequency. According to the simulation results, there was resonance at 28 GHz and 60 GHz, achieving the purpose of dual frequency. In addition, considering the chip layout, the packaging substrate was selected and placed under the silicon substrate to radiate coherently and constructively at two frequencies, to enhance the antenna gain and efficiency. In [22], the voltage-controlled oscillator and frequency multiplier were used as the back-end circuit to improve the gain of 7 dBi. In [23], a switching circuit was introduced, and the total bandwidth was increased to 53.4% under two working conditions. In [24], the thickness of the AMC was reduced through two methods, namely, the metal post and an embedded guiding structure, and the gain at 94 GHz was 5.8 dBi, which was 9.1 dBi higher than that without the AMC. In [25], the parasitic capacitance generated by the double-layer AMC regulated the impedance and bandwidth. It was confirmed that the bandwidth increased to 5.8 GHz, and an input impedance consistent with the measurement was obtained. In [26], different AMC elements were analyzed and compared. The results showed that the back-to-back E-shaped (B2 BE) framework proposed in this paper had the best bandwidth (75 GHz-125 GHz) and reflection coefficient, and it was applied to the antenna. In [27], efficiency improved by more than 90% through the air-filled substrate synthesis waveguide technology. In [8], the slot and antenna on the PCB board were embedded and integrated into the back-end circuit, which improved the total gain of 21.6 dBi. In this paper, a small-size broadband slot monopole chip antenna is proposed, using the 0.18 \(\upmu\)m CMOS manufacturing process, with an antenna sized 1.2 \(\times\) 1.2 (mm\({}^{2}\)). The Metal_1 layer is used as an AMC to improve the impedance matching of the antenna. The proposed design of the slot and external branch improves the bandwidth performance. The measurement results show that the bandwidth is 33.8 GHz-110 GHz, and the fractional bandwidth is 103.4% under the spec. of reflection coefficient of \(-\)10 dB. At 72 GHz, the maximum gain is \(-\)6.3 dBi. The frequency covers 5G NR FR2 (24.2 GHz-52.6 GHz) and W-band (75 GHz-110 GHz). The proposed chip antenna is small and easy to integrate with a millimeter wave system and can be used in near-field sensing applications. The rest of this paper organized as follows: The second chapter describes the geometry, simulation result, parameter analysis, and current distribution of the proposed chip antenna. The third chapter compares measurement and simulation results and explains the differences between measurement and simulation. The fourth chapter describes the performance compared with recent literature and points out the advantages of the proposed chip antenna. Finally, the performance and characteristics of this antenna are summarized in chapter five.