## 1 Introduction  
The role of the LNA is vital in radio frequency (RF) and microwave (MW) receivers. Its performance directly affects the receiver sensitivity as it is generally the first active element to process the received signal. The main function of the LNA is to perform proper impedance matching with the antenna while providing a noise figure (_NF_) as low as possible and sufficiently high gain to attenuate the noise contribution of the upcoming stages. However, usually the LNA consumes most of the power available to provide such high performance, leaving the other components in the system with a small DC power budget [1]. A feasible solution, as seen in [1; 2; 3], consists of reducing the supply voltage so that the power budget available for the rest of the components in the receiver is relaxed. By adopting this approach, circuit integration is improved as the LNA can be introduced in a wide range of devices and systems since it can be biased with a very low voltage. Another concern in LNA design is the area needed for the final circuit since conventional LNA design involves the use of bulky inductors to perform impedance matching, source degeneration, inductive neutralization, gain peaking or resonate internal transistor capacitances, among other techniques [4; 5]. Although the inductor size is reduced as the operating frequency increases, the area use can be further improved if a transformer-based approach is introduced, bringing multiple advantages to the designer as it allows higher gain and bandwidth and lower noise as well [6]. The differential architecture presents advantages such as a high common mode rejection ratio (CMRR), better ground plane quality, lower parasitic effects of chip interconnections, wider dynamic range and easier coupling between stages, among others. Differential circuits allow direct coupling between stages, avoiding the need for DC isolation capacitors and complex interstage matching networks. As a result, it reduces the area of the integrated circuit and, therefore, its manufacturing costs. Numerous works available in the scientific literature introduce differential LNAs to facilitate system-on-chip integration since they provide high resilience to power supply and common-mode noise [7; 8; 9; 10]. However, in differential circuits, the number of components and the power consumption are doubled. In addition, the use of a balun (BALanced-to-UNbalanced) is necessary to transform the single-ended (SE) input signal into a differential signal. Integrated transformer design is gaining prominence in mm-Wave circuit design. Several works have been published recently regarding the design and modeling of integrated transformers for various applications [11; 12; 13]. Nevertheless, this element produces extra losses in the signal path due to the limited values of the magnetic coupling coefficient (\(k\)) and quality factor (\(Q\)) achievable in integrated technologies, which can negatively impact the _NF_ of the LNA. In contrast to traditional bulk silicon (Si) complementary metal-oxide-semiconductor (CMOS) processes, SOI technologies present multiple advantages, such as reduction of parasitic capacitances, improvement of device performance and speed, downsizing to nanometer dimensions, reduction of device operating voltage and lower power consumption, among others [14]. Therefore, the proposed circuit is implemented using an SOI process design kit (PDK) from Global Foundries. In this work, a fully differential LNA with transformer-based interstage matching networks for K-band applications is presented. The LNA is based on a two-stage CS (common source) topology and is developed in a 45 nm SOI (45 RFSOI) process from Global Foundries. The main features of the proposed circuit are a _NF_ as low as 2.2 dB, a gain of 12.9 dB, input and output return losses (IRL and ORL) above 10 dB, an IIP3 of \(-\)4 dBm, and power consumption of 11.7 mW from a 0.38 V DC supply in a very compact area (0.15 mm\({}^{2}\)).