# Sub-Milliwatt Transceiver IC for Transcutaneous Communication of an Intracortical Visual Prosthesis
## 3 Implanted Transceiver
### Non-Coherent BPSK Receiver  
Similarly to the transmitter design for uplink, the requirements for downlink can be met by taking a system approach aimed at designing a low-power implementation. This involves using low frequency (<100 MHz), an inductive link, phase shift keying (PSK), and a nearly digital receiver with non-coherent demodulation after sampling and by means of edge detection, as introduced in [19; 33; 34]. The sampling of the received signal makes it possible for a non-coherent demodulation in the BPSK signal by using only edge detection, as described in [35]. We say the receiver is nearly digital because of the use of predominately digital components. Figure 5 shows the block diagram of the receiver. At the receiver side, the entire signal is sampled. The sampling is essentially done using a comparator, sometimes also called a 1-bit analog to digital converter (ADC). This comparator is a dynamic comparator as in [36]. Its threshold, which is the input common mode voltage, can be set by Vcntrl comparator, as shown in Figure 5, and the sensitivity is found to be below 50 mV (in simulations). The comparator shares the same clock with the non-coherent digital demodulator. Figure 6 shows the circuit schematic of the 1-bit ADC which is based on [36]. After this 1-bit ADC stage, the resulting signal is non-coherently digitally demodulated. The non-coherent digital demodulator is the central part of the receiver, and it will be detailed next. Figure 7 shows the schematic of the non-coherent-digital demodulator. The non-coherent digital demodulator detects if a '0' or a '1' was transmitted by detecting the type of edge it encounters in the digitized received modulated signal. Note that the digitized modulated signal has a falling edge for the '0' and a rising edge for the '1'. While detecting which type of edge is present, the sub-system must take care to avoid the transition points between symbols so that these are not detected as edge types. It is comprised mainly of  
Figure 4: IC layout of the IR-UWB transmitter. Figure 3: Schematic diagram of the 5-stage current-starved single-ended ring oscillator for receiver and transmitter. an edge detector, a reset generator, and an oscillator. A similar concept was presented in [35], but in our case, the data rate to carrier frequency ratio is not 100% due to practical bandwidth limitations and losses in inductive links. Inductive coils that are designed for transmission and reception create a bandwidth for which the BPSK signal is communicated, and this is band limited by design which leads to about 5-70% data rate to carrier frequency ratio in practice [34]. We aim to be within this range, as delivering a sufficient data rate is the main priority, and because the carrier frequency can be scaled appropriately. The edge detector uses a rising edge D-type flip-flop and a falling edge D-type flip-flop to detect if an edge occurs and which type of edge it is, using an OR logic gate and an AND logic gate, respectively. These logic gates will take the outputs of the flip-flops as their input. The inputs of both flip-flops are a logical '1' while the rece  
Figure 5: Schematic diagram of the BPSK receiver.Note: IC excludes the coil. Figure 6: Schematic diagram of the 1-bit ADC. Figure 7: Schematic of non-coherent digital demodulator. signal is fed as its clock input. This configuration yields the desired effect of edge detection in a power efficient way. The asynchronous clear input of the flip-flops is connected to the reset generator. Asynchronous clearing implies that the flip-flops are cleared decoupled from clock ticks. This is done to reset the flip-flops to avoid detecting the transition point between symbols. The role of the reset generator module is to provide a reset signal to reset the edge detector at a time after an edge detection at \(t=0\), between \(t=0.5T_{PSK}\) and \(t=T_{PSK}\). Here, \(T_{PSK}\) is the period of the carrier frequency. To achieve this, it counts, using an asynchronous counter.