## 3 Technology Modules
### Characterization of the Si/SiO\({}_{2}\) Interface Quality  
The electrical charge of single atomic bond defects is a source of potential disorder and can lead to the formation of unintentional QDs [15]. Therefore, the quantification and reduction of these charged defects is an important issue for quantum computing devices. To probe the quality of our oxides, we perform high-frequency capacitance-voltage measurements on macroscopic metal-oxide-semiconductor capacitors (MOSCaps) [46]. We characterize SiO\({}_{2}\) thermally grown at temperatures of 1050 \({}^{\circ}\)C, as well as CVD-SiO\({}_{2}\) deposited at temperatures of 350 \({}^{\circ}\)C. Furthermore, we quantifie defect concentrations on [111] facets (corresponding to our proposed device) in comparison to the {100} facet usually used for planar MOSFET devices. To improve the overall quality of our oxides, we perform a post-metal annealing in forming gas and measure the effect of defect passivation. The conceptual layout of such a MOSCap is shown in Figure 4a. We measure the parallel capacitance \(C_{\text{p}}\) and conductance \(G_{\text{p}}\) by an HP 4284A Precision LCR meter at room temperature, as displayed in Figure 4b. A voltage \(V\) is applied to the patterned top-electrode. The global metallic back contact is forced to a virtual ground potential using an auto-balancing bridge. We use \(n\)-type silicon substrates to be sensitive to defects that trap and emit electrons. Varying \(V\), the MOSCap can be tuned into different working regimes of accumulation, depletion, and inversion [46] (pp. 71-78). By applying \(V>0\) V, electrons are accumulated at the SiO\({}_{2}\) interface (accumulation region). By decreasing \(V\), the electrons are repelled from the interface, and the capacitive contribution of the semiconductor increases (depletion). Within this region, we identify the flat band voltage \(V_{\text{fb}}\) at which the band bending of the semiconductor at the interface is zero. By decreasing \(V<0\) V further, a hole inversion layer is induced at the MOS-interface (inversion). The quasi-static theoretical capacitance over all working regimes is indicated by the red dashed lines in Figure 4. To perform high-frequency capacitance measurements, an oscillating signal of amplitude of 20 mV is added to \(V\), and its frequency \(f\) is varied between 20 Hz and 1 MHz, effectively suppressing the hole inversion layer [46] (pp. 99-155). Hence, the resulting discrepancies of the quasi-static theoretical model and the measured high-frequency data can be attributed to this suppression of inversion and additional influences of defects within the oxide-semiconductor layer stack. Using the electrical model shown in Figure 4b, we extract the dielectric constant of the oxide \(\varepsilon_{\text{r}}\), defects within the oxide at a fixed location \(D_{\text{f}}\), rechargeable defects \(D_{\text{r}}\) as a subset of \(D_{\text{f}}\), and interface-induced defects \(D_{\text{i}}\)[46]. The dielectric constant is determined by tuning the MOSCap in accumulation and measuring the oxide capacitance. By comparing the measured data and the theoretical expectation in flat band condition, we calculate \(D_{\text{f}}\) and \(D_{\text{r}}\) by evaluating the overall shift and the hysteresis between forward and backward voltage sweeps of \(V\). The interface defect density \(D_{\text{it}}\) is determined using the conductance method described in [46] (pp. 176-234). The measured capacitance and conductance of an Al/SiO\({}_{2}\)/Si capacitor are shown in Figure 4b,c. Here, SiO\({}_{2}\) is deposited by chemical vapor deposition on (111) substrates with a thickness of \(17.0\pm 0.1\) nm measured with ellipsometry. Square-shaped aluminum electrodes with an area of 0.52 mm\({}^{2}\) are patterned with electron-beam evaporation and lift-off. The frequency of the oscillating voltage bias changes from low frequencies encoded in light blue towards high frequencies encoded in dark blue.