# Effect of Process Parameters on Mode Conversion in Submicron Tapered Silicon Ridge Waveguides
## 1 Introduction  
In recent years submicron silicon-on-insulator (SOI) platform is becoming widely used for ultra-compact complementary metal-oxide-semiconductor (CMOS) compatible Photonic Integrated Circuits (PICs) driven by low cost, low power, and high-bandwidth interconnects [1]. It is possible to design ultra-compact PICs on SOI due to their intrinsic high-index-contrast (\(\Delta\)) in silicon waveguides. In a high-\(\Delta\) optical waveguide with vertical asymmetry, mode hybridization is observed at some particular widths, which may cause mode conversion in tapered structures [2, 3]. This property can cause problems in TM-type PICs but can be favorable for realizing compact mode converters. Silicon photonics PICs are mainly demonstrated to work for the TE-polarization due to their strong mode confinement. However, TM-polarization is also very beneficial for many applications, and it has some unique advantages over TE-polarization. PICs operating in the TM-fundamental mode are more tolerant to fabrication variations and demonstrate low propagation losses [4]. Additionally, the TM mode has a stronger evanescent field making it more suitable for sensing applications [5]. An adiabatic taper is an indispensable basic circuit design element for both polarizations [6, 7]. However, to construct adiabatic tapers for the TM-polarization, extra care needs to be given. Mode hybridization in adiabatic tapers can cause an undesired conversion between the TM-fundamental and higher-order TE-modes, which results in excess losses and channel cross-talks [8]. Therefore, thisunwanted mode conversion needs to be suppressed by carefully designing tapers so that TM-mode is maintained throughout with near 100% efficiency (TM-preserving tapers) [9]. On the other hand, by tailoring the mode hybridization in an adiabatic taper, several polarization splitters-rotators (PSRs) have been realized [10; 11; 12; 13; 14; 15; 16; 17; 18; 19; 20; 21; 22; 23; 24]. The PSR components are required to mitigate birefringence in the SOI platform [25; 26]. In a PSR, light is coupled with arbitrary polarization, where it is first split into two orthogonal components. Then, one polarization state is rotated 90 degrees while the other remains unchanged. Waveguide-type integrated PSRs are challenging to realize, as it is not easy to rotate the orthogonal modes in a planar waveguide. Most polarization rotation approaches need complex, non-even standard fabrication steps such as additional Si layer deposition, etching with high alignment accuracy, multistep lithography, non-vertical etching [27; 28]. However, the design technique employing the concept of mode hybridization does not involve any complex fabrication. The difference lies in the input TM-polarization is first transferred to high order mode (TE\({}_{1}\)) before converting it to TE\({}_{0}\). The devices based on mode hybridization have the advantages of fabrication tolerance and low insertion loss. Here, the key is the mode evolution in the adiabatic taper as a result of mode hybridization. This enables an efficient conversion from TM\({}_{0}\) to TE\({}_{1}\) mode. The latter is then transferred to the TE\({}_{0}\)[10; 11; 12; 13; 14; 15; 16; 17; 18; 19; 20; 21; 22; 23; 24]. Note that the footprint of the adiabatic taper can limit the overall dimension of the PSR. Therefore, reducing the size of the adiabatic taper is much desired. The two most common waveguides in a PIC design are strip and ridge types. In an SOI platform, the under cladding is always SiO\({}_{2}\) (silicon oxide). It is possible to have upper cladding with different materials like silicon nitride, silicon oxide, and air (no cladding). Mode conversion in an SOI strip waveguide with an upper air cladding is reported previously, as this makes it asymmetrical in the vertical direction [2; 3]. It is also possible to avoid this mode conversion by introducing SiO\({}_{2}\) top cladding instead of air to eliminate vertical asymmetry [3].