# Effect of Thermal via Design on Heat Dissipation of High-Lead QFN Packages Mounted on PCB
## 1 Introduction
[PERSON] [17] also analyzed the effect of the choice of cooling system on the thermal parameters of thermally coupled power field effect tubes, and the results showed that the use of an active cooling system reduced the thermal resistance of the transistor under test by a factor of 20. Most of the more established methods of heat dissipation today involve adding a heat sink to the component. The heat sink can improve heat dissipation by increasing thermal convection. We intend to improve the heat dissipation of components by improving the heat conduction process. It has been demonstrated that PCBs with thermal vias can significantly reduce thermal resistance during heat conduction [18]. [PERSON] [19] designed a congestion-minimizing hot-channel planning algorithm, which proved to be very effective in directly eliminating local hot spots. [PERSON] [20] investigated the effect of different numbers of heat vias on the thermal resistance improvement of PCBs. [PERSON] [21] investigated the heat dissipation effect of four thermal via designs for power devices. [PERSON] [22] used carbon nanotubes (CNT) instead of copper as vertical heat sinks in a 3D chip and investigated its heat dissipation potential through finite element analysis. Simulation results show that carbon nanotube vias have better heat dissipation performance in 3D chips compared to conventional copper vias. [PERSON] [23] predicted solder joint thermal reliability through studying PCB pad design layouts for multi-row QFN packages. [PERSON] [24] analyzed the effect of different design parameters on the thermal resistance of the through-hole and proposed an optimal design trajectory to minimize the thermal resistance of the through-hole. [PERSON] [25] measured gaps within the thermal pad of various solder alloy compositions and microvia configurations in test boards, indicating that vias might introduce gaps without compromising the reliability or thermal resistance of QFN. [PERSON] [26] used finite element analysis to show that increasing PCB thickness and bottom thermal pad thickness can enhance the heat dissipation capacity of QFN packages. [PERSON] [27] studied PCB thermal resistance influenced by designing PCBs with nine different thermal via layouts, and the results showed that it was possible to reduce the thermal resistance value by 34% just by changing the layout of the PCB. Currently, most of the research objects for thermal vias are traditional packages, which are not fully adaptable to various kinds of packages. Moreover, the design of thermal vias is mostly limited to the thermal pad, which does not fully utilize the excellent heat dissipation performance of thermal vias. This study aims to conduct three-dimensional simulation analysis on QFN packages soldered onto PCB, with a focus on exploring the impact of thermal vias on the heat dissipation characteristics of high-lead QFN packages, followed by comparative analyses with conventional QFN and dual-row QFN. Firstly, reference parameters for the dimensions and material properties of the three QFN packages are provided, and model construction is achieved. In this paper, the influence of thermal via placement on the heat dissipation process of the high-lead QFN package is analyzed. It then describes two types of thermal via distribution (square and circular) located below the thermal pads and compares their heat dissipation effects. Subsequently, conventional QFN, dual-row QFN, and high-lead QFN packages are presented around the thermal vias placed around the 1/O pads to illustrate the relationship between the maximum temperature of the three QFN packages and the diameter of thermal vias, as well as the thickness of copper plating.