## 4 Conclusions  
The fitting capability here became possible only when the conventional I-V characteristic formulas were modified in the triode region [7; 8; 17; 19]. Even so, some confusingly ambiguous results arose, such as the associated size and process-related issues, thus the suggestion that only transistors with fin width W = 0.120 microns are taken into account [20]. Therefore, the three width splits including 0.120 microns, 0.115 microns, and 0.110 microns were examined in detail and produced the conclusion that only availability of W = 0.120 microns is fully supported [23]. One of the three parameters (Kn, Vth, and lambda) is individually fixed and the other two are tuned to find the corresponding minimum deviations as collected in Tables 1 and 2, followed by three conclusive results as follows:  
For fixed Kn, three respective Kn values of the three transistors with the most minimum deviations are found to be linear against the inverse of channel lengths, as shown in Figure 4a; additionally, the thickness of strong inversion layer in the channels is able to be calcu-lated and determined to be 203 angstroms [23].  
For fixed lambda, three respective lambdas of the three transistors with the most minimum deviations determine the corresponding Early voltage values, which are plotted linearly against the inverse of channel lengths, as shown in Figure 4b. That characterizes the channel-length-dependent leakage current, i.e., the shorter the channel length, the leakier the transistor across source and drain. This Early-voltage-related leakage current may get larger, which is not expected as the channel length gets shorter.  
For fixed Vth, three respective Vth values of the three transistors with the most minimum deviations are plotted linearly against channel lengths (100 nm, 160 nm, and 240 nm) in Figure 5a, which include another transistor whose channel length is 500 nm with a 120 nm wide fin to determine whether the tendency is still true. The measured \(\mathrm{I_{DS}}\)-\(\mathrm{V_{GS}}\) curve suggests 0.25 Volts threshold voltage, as presented in Figure 5c. Negative Vth values for shorter channel length in NFinFET may be interpreted as pro-cess-related size issues addressing dry-etching consuming processes since the thresh-old voltage depends on space charge in the depletion region [23]. That means Vth may b as low as \(-\)0.4 Volts as channel length approaches 10 nanometer scales, which may lead to extra current beyond the control.  
The modified current-voltage formula used for fitting I-V characteristic curves is quite encouraging and remarkable. The fitting capability help give some underlying physical interpretations, which, unfortunately, set up a limitation for how far FinFET can go. In addition, FinFET also suffers from generated heat, and thus, down-graded performance and reliability issues. Therefore, effective heat dissipation substantially needs to be stressed. By applying bias-induced depletion techniques, GAA and Nanosheet FET may be alternative approaches in the future.  
Conceptualization, H.-C.Y., S.-C.C. and W.-S.L.; methodology, H.-C.Y., S.-C.C. and W.-S.L.; software, H.-C.Y., S.-C.C. and W.-S.L.; validation, H.-C.Y., S.-C.C. and W.-S.L.; formal analysis, H.-C.Y., S.-C.C. and W.-S.L.; investigation, H.-C.Y., S.-C.C. and W.