# Improved Performance of High-Voltage Vertical GaN LEDs via Modification of Micro-Cell Geometry
## 2 Experimental Procedures  
In this study, the epitaxial structures of blue LEDs with an emission wavelength of 450 nm were prepared on c-plane (0001) sapphire substrates (Wafer Works Corporation, Taoyuan, Taiwan) by metalorganic chemical vapor deposition. The epilayers included a Si-doped n-type GaN layer (3 \(\upmu\)m), ten pairs of InGaN/GaN MQWs with a 3-nm-thick un-doped well and a 12-nm-thick n-doped barrier as active regions, and the Mg-doped p-type GaN layer (150 nm). For the device process, the Ni/Ag/Ni/Pt (15/500/50/80 nm) metal multilayer deposited by e-beam evaporation on the p-type GaN was used as the contact layer. The Ni/Ag layer acted as both an Ohmic contact layer and a reflective mirror layer. The reflectivity of the mirror was measured to be 92% at 450 nm. Additionally, after the sample was annealed at 550 \({}^{\circ}\)C in N\({}_{2}\) ambient for 3 min, a specific contact resistance as low as 5 \(\times\) 10\({}^{-5}\)\(\Omega\)-cm\({}^{2}\) can be obtained. To enhance the light extraction, a NaOH solution (4M) was employed to roughen the surface of the n-type GaN layer at 80 \({}^{\circ}\)C for 6 min. The LED device was fabricated using standard photolithography and etching processes in sequence.  
To prepare the vertical HV-LED, the wafer bonding and laser lift-off techniques were applied as follows. For the wafer bonding process, In/Au and Au layers were grown on a metal substrate and LED sample, respectively, and then diffusion-bonded to each other at 200 \({}^{\circ}\)C. A laser lift-off process was used immediately to detach the sapphire substrate and LED sample. At this stage, the LED sample was successfully transferred to a Cu metal substrate. Figure 1a displays a diagram of this device (single cell). Next, the HV-LED was constructed in a 2 \(\times\) 2 micro-cell LED configuration. The mesa pattern of each micro-cell LED was subsequently defined as having a size of 1016 \(\times\) 1016 \(\upmu\)m (Figure 1b). Moreover, as shown in Figure 1c, a SiO\({}_{2}\) layer was used as the passivation layer for the flatness of trenches between cell chips. The 2 \(\times\) 2 cell LED array was connected using a Ti/Al/Ti/Au (20/1500/20/200 nm) channel electrode (Figure 1d). Finally, the Cr/Au (20 nm/200 nm) was grown by thermal evaporation to form the n-pad electrode (Figure 1e). Meanwhile, the Cu metal substrate plays the role of a p-pad electrode. To improve the optoelectronic performance of vertical HV-LEDs, the geometry of micro-cell was modified. Figure 1f shows the images of the HV-LEDs with various cell shapes and chip arrangements before operating, denoted as Samples A-F, respectively. Several micro-cell geometries consisting of square, rectangle, triangle, and L shapes were designed. In Samples A-E, a single-line electrode was prepared on a single cell. However, Sample F was fabricated by combining four L-shaped cell chips. To enhance the current spreading effect of the L-shaped cell, a two-line electrode was formed on the single cell.  
The current-voltage (I-V) characteristic of the device was measured by a semiconductor parameter analyzer (Keithley 2400 Sourcemeter, Keithley Instruments, Cleveland, OH, USA), and the output power was analyzed using a calibrated integrating sphere. The surface morphology of the roughened n-type GaN layer was observed by scanning electron microscopy (SEM) (S-3000H, Hitachi, Tokyo, Japan). The spatial distribution image of the light output for the HV-LED was obtained using a near-field optical microscope (Beamstar FX-50, Ophir-Spiricon, North Logan, UT, USA) combined with a charge-coupled device. The temperature distribution of the HV-LED sample surface was determined using thermal infrared imaging under a sealed atmosphere at room temperature. To obtain reliable data, these images were taken after a sufficiently long waiting time to reach the thermal steady state.