## 2 Single-Phase Grid-Connected Power Conversion System
In case of unidirectional AC-to-DC power conversion, a grid-interfacing converter is often realized by a diode bridge rectifier followed by a boost DC-DC converter, as shown in Figure 1c. In case of DC-to-AC energy flow, the grid-interfacing converter operates as an inverter and should be realized in a bridgeless manner, e.g., as shown in Figure 1d. It should be mentioned, however, that unidirectional rectifiers may also be realized by bridgeless topology circuits. The corresponding control structures are depicted in \[p_{L}(t)=v_{L}(t)i_{L}(t),\ \ \ p_{G}(t)=v_{G}(t)i_{G}(t),\ \ \ v_{DC}(t)i_{DC}(t)=p_{G}(t)-p_{L}(t), \tag{5}\]1 In case a bridge-rectifier-based topology is utilized, all the measurements are taken at the DC side of the converter. The outer (voltage) loop regulates the DC link voltage by feeding the difference between the corresponding set point \(V_{DC}^{*}\) and the measured value \(\
u_{DC}\) into the voltage controller \(C_{V}\), which calculates the mains current magnitude value \(I_{M}^{*}\) required to maintain the power balance (cf. (10)). On the other hand, the rectified mains voltage \(\left|\
u_{G}\right|\) is sensed and the corresponding unity magnitude template \(\left|\sin f\right.\omega(t)dt\)\(\left|\right.\) is extracted and multiplied by \(I_{M}^{*}\) in order to generate the reference signal for the rectified grid-side current \(\left|i_{G}\right|^{*}\). The inner (current) loop regulates the rectified grid-side current by feeding the difference between the corresponding reference \(\left|i_{G}\right|^{*}\) and the measured value \(\left|i_{G}\right|\) into the current controller \(C_{I}\), which calculates the required modulating signal. The output of the PWM modulator is then fed to the switch of the boost DC-DC converter (cf. Figure 1c). In case a bridgeless topology is utilized, grid-side measurements are required. While the outer (voltage) loop is similar to that of the bridge-rectifier-based topology, here the main voltage \(v_{G}\) is sensed and the corresponding unity magnitude template \(sin\int\omega(t)dt\) is extracted and multiplied by \(I_{M}^{*}\) in order to generate the reference signal for the grid-side current \(i_{G}^{*}\). The inner (current) loop regulates the grid-side current by feeding the difference between the corresponding reference \(i_{G}^{*}\) and the measured value \(i_{G}\) into the current controller \(C_{I}\), which calculates the required modulating signal. The outputs of the PWM modulator are then fed to the switches of the AC/DC converter (cf. Figure 1d). It was shown in [53] that the attainable bandwidth \(\omega_{CI}\) of a typical current loop is given by  
\[p_{L}(t)=v_{L}(t)i_{L}(t),\ \ \ p_{G}(t)=v_{G}(t)i_{G}(t),\ \ \ v_{DC}(t)i_{DC}(t)=p_{G}(t)-p_{L}(t), \tag{5}\]2  
where \(PM_{I}^{*}\) is the desired phase margin of the current loop and \(T_{d}\) is the total switching and sampling delay, the worst case of which equals 1.5 times the sampling period. Considering the typical values of \(PM_{I}^{*}=\frac{\pi}{4}\) and switching frequency of 50 kHz, the attainable current loop bandwidth would be \(2\pi\)-4167 rad/s, which is about two decades higher than the attainable voltage loop bandwidth. Consequently, it may be assumed that  
\[p_{L}(t)=v_{L}(t)i_{L}(t),\ \ \ p_{G}(t)=v_{G}(t)i_{G}(t),\ \ \ v_{DC}(t)i_{DC}(t)=p_{G}(t)-p_{L}(t), \tag{5}\]3  
with a high degree of accuracy. Noticing that  
\[p_{L}(t)=v_{L}(t)i_{L}(t),\ \ \ p_{G}(t)=v_{G}(t)i_{G}(t),\ \ \ v_{DC}(t)i_{DC}(t)=p_{G}(t)-p_{L}(t), \tag{5}\]4  
holds for (1) and combining (15) with (6) while taking Figures 1b and 2 into account, the corresponding simplified closed-loop system representations are depicted in Figure 3 [51]. \[p_{L}(t)=v_{L}(t)i_{L}(t),\ \ \ p_{G}(t)=v_{G}(t)i_{G}(t),\ \ \ v_{DC}(t)i_{DC}(t)=p_{G}(t)-p_{L}(t), \tag{5}\]5 Typical dual-loop control structures for (**a**) a bridge-rectifier-based AC/DC converter, and (**b**) a bridgeless rectifier/inverter.