## 2 Proposed Simulation and Experimental Methods
### Finite-Element Modeling of Packaging Structure  
A three-dimensional finite-element model of a ball grid array (BGA) package was developed, consisting of the package substrate, solder pads, solder balls, and printed circuit board (PCB), as illustrated in Figure 2a.  
The package substrate is the core carrier of the chip package, which is mainly used to realize the electrical interconnection between the die and the external circuit, mechanical support, and heat dissipation functions. In this simulation, we use a 5 mm \(\times\) 5 mm \(\times\) 0.8 mm rectangular block to construct the outer size of the package substrate. Compared with the size of the package substrate, the size of the die is small and can be ignored in terms of geometric scale.  
Solder pads, represented as cylindrical copper structures with a diameter of 0.5 mm and thickness of 0.1 mm, were arranged in a 4 \(\times\) 4 grid on the bottom surface of the substrate with a 1 mm pitch. These pads serve as electrical and mechanical interfaces for solder ball connections. The solder balls were modeled as bulging spheres with a diameter of 0.56 mm and thickness of 0.4 mm, simulating their deformed shape after the reflow process. The PCB, modeled as a 10 mm \(\times\) 10 mm \(\times\) 1.6 mm FR-4 block, supports the package and facilitates system-level interconnection. These geometric parameters are consistent with typical specifications used in BGA package designs. Additionally, the same structural configuration was adopted in the experimental setup to ensure comparability between the simulation results and infrared thermal measurements.  
An adaptive meshing strategy was employed to refine the mesh in regions with high thermal gradients (Figure 2b), ensuring accurate capture of localized temperature variations. Material properties, including density, thermal conductivity, and specific heat capacity, were defined based on Comsol's material library and are summarized in Table 1. Considering that the packaging substrate is the main source of heat, the boundary conditions are set as follows:  
1. Heat source conditions: A constant temperature of 100 \({}^{\circ}\)C or 200 \({}^{\circ}\)C was applied to the entire top surface of the package substrate. This setting aims to emulate a uniform thermal load environment, such as that generated during accelerated aging or worst-case thermal testing, and facilitates clear differentiation of defect-induced temperature variations;
2. Heat dissipation conditions: The initial temperature of all external boundaries is room temperature 20 \({}^{\circ}\)C, and the convection heat transfer coefficient between the external 20 \({}^{\circ}\)C air is 5 W/(m\({}^{2}\)-K). And the additional contact thermal resistance between the package substrate, pads, solder balls, and printed circuit boards is not considered. Finally, the thermal radiation phenomenon of the packaged chip is ignored.  
Figure 2: Three-dimensional finite-element model of the BGA chip package: (**a**) geometric structure showing substrate, pads, solder balls, and PCB, and the unit in the figure is mm; (**b**) mesh division highlighting refined meshing in regions with expected thermal gradients to improve simulation accuracy.