## 2 Literature Review  
Over the past two decades, many different techniques have been developed to detect wafer map failure patterns. In this section, several previous studies about the recognition of wafer map failure types are briefly introduced. For instance, fault patterns have been recognized using the KNN rule-based technique (FD-KNN) for semiconductor manufacturing processes, since it is able to overcome several limitations of principal component analysis (PCA)-based methods, such as the nonlinearity of most batch processes, and multimodal batch trajectories due to product mix, etc., in the semiconductor manufacturing industry [7]. In addition, a principal component-based KNN (PC-KNN) was developed by combining the advantages of PCA with respect to dimensionality reduction with those of FD-KNN with respect to nonlinearity and multimode handling [26]. A recognition system using multi-class SVM with a defect cluster index was presented to efficiently and accurately recognize wafer defect patterns [27]. An RF algorithm was used to build prediction models exploiting wafer map features as input variables in order to better predict the die-level failures in the final test [28]. Several ML-based detection approaches, such as Gaussian density estimation, Gaussian mixture model, k-means Clustering, LR, stochastic gradient descent, etc., have been used to detect faulty wafers in semiconductor manufacturing [29; 30]. Moreover, ensemble learning-based ML approaches have also shown great performance in the recognition of wafer map failure pattern types. For example, a decision tree ensemble learning-based wafer map failure pattern recognition method was proposed based on radon transform-based features, such as max, min, average, standard deviation, where random sampling was used to select the experimental dataset [4]. A voting ensemble classifier was developed to identify wafer map failure pattern types by combining several popular ML classifiers, such as random forest (RF), logistic regression (LR), gradient boost machines, and ANN with multiple feature types [8].  
Additionally, with the rapid developments taking place within the semiconductor industry, manifold approaches have been designed using DL-based techniques for the recognition of wafer map failure pattern types, such as different CNN structures, convolution-based autoencoders, etc. As an example, [31] proposed a CNN-based method for automatic wafer surface failure classification and the detection of unknown failure classes. The results showed that it was able to outperform the multilayer perceptron, SVM, and stacked autoencoder methods. A novel CNN-based method was also used to automatically recognize the failure pattern types on wafer maps while using density-based spatial clustering of applications with noise (DBSCAN) to reduce the effects of noise, and applying data augmentation to improve the performance of the CNN method [1]. Moreover, a method using CNN for the classification of 22 wafer map failure pattern types and image retrieval has been proposed [17]. A DL-based CNN for automatic wafer defect identification (CNN-WDI) was generated using a data augmentation technique to overcome the class imbalance problem [9]. A CNN-based wafer bin map classification model, as well as a neural network-based bin coloring method called Bin2 Vec, have been proposed and designed [32]. Additionally, a deep convolutional encoder-decoder neural network architecture was proposed for detecting and segmenting the eight basic abnormal wafer map failure patterns [33]. Furthermore, a novel methodology using deep selective learning for wafer map failure pattern classification was presented, while proposing a convolutional autoencoder model to build a data augmentation framework for synthetic sample generation [34]. A convolution-based variational autoencoder (CVAE) was also developed for the identification of wafer map failure patterns while solving the data imbalance issue [18].