## 2 Implementation of FPGA-Based On-Board SAR Processor  
FPGA has unique characteristics of reconfigurability, application power efficiency and high throughput rate. This allows users to perform various direct-control operations for the implementation of a digital system, including the digital SAR processor. NASA and USAF identified that on-board processing is an indispensable technology that requires improvement of the performance of SAR systems [16]. In 2007, [PERSON] and [PERSON] showed that the main advantage of FPGA is its reprogrammability, which makes it the best matched candidate for the implementation of real-time processing systems. In particular, researchers from JPL proposed an on-board FPGA-based SAR processing system to be implemented for the application of SAR [16]. The proposed architecture consists of the major objectives and several challenges for an FPGA-based SAR processor. This proposal shows that the implementation of an FPGA-based on-board processor in SAR mission is feasible. [PERSON] et al. from the Military University of Technology, Poland designed and implemented a real-time SAR image processor with commercial off-the-shelf (COTS) hardware, i.e., the Xilinx FPGA Virtex-5 SX95T and Texas Instruments C6455 DSP in 2012 [17]. In 2016, NASA has developed an airborne SAR testbed called UAVSAR. In this project, the UAVSAR on-board processor (OBP) design was derived from a JPL-developed ground-based software processor, which comprised a commercial uP board, a custom FPGA processing board and a custom interface board. This was a hybrid architecture, where computations were divided between FPGAs, which are better suited to rapid, repetitious computations, and a uP with a floating-point coprocessor, which is better suited to less frequent and irregular computations [18]. The Beijing Institute of Technology developed an onboard real-time SAR processor using a field-programmable gate array--application-specific integrated circuit (FPGA-ASIC) hybrid, heterogeneous, parallel accelerating architecture in 2017 [19]. In 2019, Nanjing University of Aeronautics and Astronautics, China successfully implemented a miniaturized synthetic aperture radar (MiniSAR) signal-processing system via a Virtex7-XC7 VX690T evaluation board [20]. The main advantages of FPGA are its reprogrammability, which makes it the best matched candidate for the implementation of real-time processing systems [21].  
By implementing an FPGA-based SAR on-board processor, it can be adapted to different SAR systems with different specifications, as the processor is scalable and reconfigurable according to user requirements. As long as the hardware resources are sufficient, the processor can be reconfigured at any time in order to match the desired requirement. Scalable is defined as the ability of processing power and architecture of the processor to be easily reconfigured within a single hardware platform and without any physical hardware modifications. Besides, an FPGA-based SAR processor has the ability to make trade-offs between hardware and software in order to maximise the efficiency and performance of the processor. For instance, if a bottleneck is identified to be caused by the SAR software algorithm, a customised FPGA-based coprocessor can be designed for the specific algorithm. The copro processor is attached to the main processor through low-latency channels for real-time on-board processing due to high throughput rate.