## 6 Simulation Results  
To validate the performance of the designed VDBA-based mixed-mode universal filter, it was designed and simulated in Silterra Malaysia 0.18 \(\upmu\)m technology using Cadence Virtuoso software. The supply voltages \(\pm\)1.25 V are used. The width and length of the MOS transistors in Figure 1b are given in Table 5, while the design metrics of the VDBA active block are listed in Table 6.  
The developed filter is designed for a pole frequency of 16.631 MHz by selecting component values as \(C_{1}=C_{2}=10\) pF, \(R_{1}=1\,\mathrm{k}\Omega\), and \(g_{\mathrm{m(I-3)}}=1.045\) mA/V. It must be mentioned that results provided for the filter are pre-layout results considering the nominal values as provided in the Silerra Malaysia PDK. The proposed filter is suitable for wide variety of applications in industrial signal processing and wireless communication, etc. The frequency-domain responses of the filter in all four modes are presented in Figures 5-8. To test the quality factor tuning independent of the frequency BP response is plotted for different values of the bias current \(I_{\mathrm{Bias1}}\). It can be inferred from Figure 9 that the quality factor can be tuned without disturbing the frequency. \begin{table}
\begin{tabular}{c c} \hline \hline
**Parameters** & **Values** \\ \hline Parasities at nodes P and N @ 1 kHz: & \\ \(R_{\mathrm{P}}=R_{\mathrm{N}}\) & 25 G\(\Omega\) \\ \hline Parasities at W node: \(R_{\mathrm{W}}\), \(L_{\mathrm{W}}\) & 140.89 \(\Omega\), 0.923 \(\upmu\)H \\ \hline Parasities at nodes Z, ZC+, ZC \(-\): & \\ \(R_{Z}=R_{ZC+}\) = \(R_{ZC-}\), C\({}_{ZC+}\) = C\({}_{ZC-}\) & 64.4 k\(\Omega\), 26.3 fF \\ \hline Voltage gain: \(V_{\mathrm{W}}/V_{\mathrm{Z}}\) & 0.985 \\ \hline Voltage transfer bandwidth: \(V_{\mathrm{W}}/V_{\mathrm{Z}}\) & 3.0262 GHz \\ \hline DC voltage range: \(V_{Z}-V_{\mathrm{W}}\) & \(\pm\)900 mV \\ \hline Static power dissipation & 1.618 mW \\ \hline \hline \end{tabular}
\end{table} 
Table 6: Performance metrics of the VDBA. Figure 4: Non-ideal model of VDBA. Figure 5: Frequency response of the MISO VM Filter: (**a**) LP, BP, HP, and BR (**b**) AP. Figure 6: Frequency response of the MISO CM Filter: (**a**) LP, BP, HP, and BR (**b**) AP. Figure 7: Frequency response of the MISO TAM Filter: (**a**) LP, BP, HP, and BR (**b**) AP. As the OTA offset current can cause frequency and phase deviation in the designed filter, Monte Carlo analysis is carried out for 200 runs to obtain an accurate measure of the offset current at the (Z, ZC+) terminals of the OTA. The \(I_{\text{bias}}\) of OTA is set at 120 \(\upmu\)A. The results show minimum offset current \(=1.08\)\(\upmu\)A, maximum offset current \(=18.131\)\(\upmu\)A, mean offset current \(=10.87\)\(\upmu\)A and standard deviation \(=4.20\)\(\upmu\)A. To verify the signal processing capability of the filter, transient analysis is performed for BP responses in the VM and CM mode. In VM, a sinusoidal signal of 16.6 MHz frequency and 200 mV peak-to-peak is applied at the input and the output waveform is observed as given in Figure 10. In CM, a sinusoidal signal of 16.6 MHz frequency and 100 \(\upmu\)A peak-to-peak is applied and the output waveform is presented in Figure 10. It can be observed that the filter functions correctly. To study the effect of process spread on the designed filter, Monte Carlo analysis is done for 200 runs for VM BP and CM AP configurations as presented in Figure 11,b. It can be deduced from the figures that there is no large variation in the pole frequency of the filter due to process variations. The THD of the proposed filter for LP, HP, and BP responses is plotted for different input signal amplitudes for VM, as shown in Figure 12. The THD plot for CM-BP/LP is presented in Figure 12. As per the IEEE Std 519-2014 [55] the THD of the filter remains within acceptable limits (\(\leq\)5%) for a considerable input signal range. Moreover, the THD performance of the filter is at par with other reported mixed-mode filters [10; 11; 13; 14; 15; 19].