# A Sub-50 nW Implantable Body Temperature Sensor and Its Application to a Rat
## 2 System Design  
### System Top Configuration  
Figure 1 is an image of an electroeticals application that is implanted with a body temperature sensor. The electroeticals used for verification in this paper consist of a cuff-type electrode attached to the sciatic nerve and an implantable device. The cuff-type electrode is equipped with a part that can be electrically connected to the nerve and a thermistor for measuring body temperature. The cuff-type electrode is also equipped with a fastening mechanism for easy fastening to the sciatic nerve. An implantable device equipped with a self-made chip is inserted into a rat's body and wirelessly transmits nerve and body temperature signals measured by electrodes to the outside of the body. We will use anesthesia to check the normal operation of the body temperature sensor. When anesthesia is applied, the body temperature of the rat will drop, and when anesthesia is removed, the body temperature of the rat will rise. Figure 2 shows the top block diagram of the implantable module (MOD_IMP10) that can measure neural signals and body temperature in real time. The implantable module (MOD_IMP10) consists of a flexible printed circuit board (FPCB_ELEC10) that detects neural signals and body temperature, and a main device (DEV_NA10) that converts the signals from the FPCB (FPCB_ELEC10) into electrical signals and wirelessly transmits the converted data to an external device (PC). The main device (DEV_NA10) consists of a power supply section, an application-specific IC (NA10), and a wireless communication  
section. The power supply section consists of a battery and several power management integrated circuits (PMICs). The PMICs are powered by the battery and generate the operation voltages of 0.6 V, 1.8 V, and 3.3 V required in the main device (DEV_NA10). The ASIC (NA10) consists of a channel for measuring neural signals (CH_N), a channel for measuring body temperature (CH_T), and a DIG block for communicating with an external chip. The neural signal measurement channel (CH_N) consists of a circuit configuration of an instrumentation amplifier (IA), an additional amplifier stage (programmable gain amplifier, PGA), and an analog-to-digital converter (ADC). The existence of a channel CH_N corresponding to the neural interface part of the FPCB (FPCB_EELC10) is indicated in the top configuration of the implantable module (MOD_IMP10), but it will not be discussed in detail as it is outside of the interest of the paper. The body temperature measurement channel (CH_T) consists of a bridge circuit (BRG) for converting the temperature-dependent resistance change in the thermistor into voltage, a sample circuit (SMP) for sampling and holding the voltage value in the BRG, a voltage-controlled oscillator (VCO) for generating a clock with a frequency proportional to the voltage held in the SMP, and a time-to-digital converter (TDC) for counting the frequency of the clock. The DIG block is equipped with a serial peripheral interface (SPI) for communicating with an external chip. The registers that set the channels (CH_N, CH_T) can be changed via the SPI. The data generated from the channels (CH_N, CH_T) are organized into predefined packets, buffered, and can be transmitted to an external chip via SPI. When the buffering reaches the preset capacity, a memory full signal is output so that the SPI master chip reads the data accumulated in the buffer. The wireless communication section consists of a commercial BLE chip (nRF52840) and an antenna that supports Bluetooth communication protocol 5.3. The BLE chip operates as an SPI master and the ASIC (NA10) operates as an SPI slave. The channel data are buffered in a ring buffer structure and periodically transmitted wirelessly to an external PC. Two approaches have been implemented to achieve low-power deep sleep mode when the main device (DEV_NA10) is not in use.