## 2 Proposed Topology and Working Principle
Interval 5 (Figure 5e, \(t_{4}\)-\(t_{5}\)): At \(t_{4}\), the main switch S\({}_{4}\) is turned off, and the current \(i_{\text{A2}}\) and \(i_{\text{Lr}}\) will charge \(C_{4}\) and discharge \(C_{3}\) until the voltage of \(C_{3}\) reaches zero; thus, the zero-voltage turn-on condition for the switch S\({}_{3}\) is realized. Interval 6 (Figure 5f, \(t_{5}\)-\(t_{6}\)): At \(t_{5}\), the main switch S\({}_{3}\) is turned on at zero-voltage condition. The current \(i_{\text{A2}}\) will decrease until S\({}_{3}\) is turned off. During this interval, current \(i_{\text{A2}}\) will decrease from the maximum value \(i_{\text{A\_peak}}\) to \(-i_{\text{A\_peak}}\). The power is transferred from the block capacitor \(C_{\text{b}}\) to the load. Interval 7 (Figure 5g, \(t_{6}\)-\(t_{7}\)): At \(t_{6}\), the main switch S\({}_{3}\) and the auxiliary switch S\({}_{\text{A2}}\) are turned off simultaneously and S\({}_{\text{A2}}\) is turned off at zero-voltage condition. The current \(i_{\text{A2}}\) and \(i_{\text{Lr}}\) will charge \(C_{3}\) and discharge \(C_{4}\) until the voltage of \(C_{4}\) reaches zero; thus, the zero-voltage turn-on condition for the switch S\({}_{4}\) is realized. Interval 8 (Figure 5h, \(t_{7}\)-\(t_{8}\)): At \(t_{7}\), the main switch S\({}_{4}\) is turned on at zero-voltage condition and the converter reaches a freewheeling stage. The auxiliary current \(i_{\text{A2}}\) increases linearly and will reach zero quickly. Interval 9 (Figure 5i, \(t_{8}\)-\(t_{9}\)): At \(t_{8}\), the auxiliary switch S\({}_{\text{A1}}\) is turned on at zero-current condition and the current \(i_{\text{A1}}\) will be built up quickly. At \(t_{9}\), the main switch S\({}_{2}\) is turned off and the current \(i_{\text{A1}}\) reaches the maximum value \(i_{\text{A\_peak}}\). Interval 10 (Figure 5j, \(t_{9}\)-\(t_{10}\)): At \(t_{9}\), the main switch S\({}_{2}\) is turned off and the current \(i_{\text{A1}}\) and \(i_{\text{Lr}}\) will discharge \(C_{1}\) and charge \(C_{2}\) until the voltage of \(C_{1}\) reaches zero; thus, the zero-voltage turn-on condition for the switch S\({}_{1}\) is realized. At \(t_{10}\), the main switch S\({}_{1}\) is turned on at zero-voltage condition and a new cycle begins. With the ACACs, all the main switches achieved zero-voltage turn-on. Considering that the equivalent parallel capacitors \(C_{1}\)-\(C_{4}\) limit the rising slope of the voltages across the main switches, the main switches are turned off at quasi zero-voltage condition. The auxiliary switches realized zero-current turn-on and zero-voltage turn-off. The auxiliary current is controllable by adjusting the turn-on time of the auxiliary switch S\({}_{\text{A}}\). As shown in Figure 4, the intervals (\(t_{3}\)-\(t_{4}\)) and (\(t_{8}\)-\(t_{9}\)) are used to build the auxiliary current; these intervals can be marked as \(t_{\text{A\_buildrel}}\). During the constant-current stage, the charging current is large enough to realize ZVS naturally, the auxiliary switch S\({}_{\text{A}}\) will not turn-on and the auxiliary circuit does not work. During the constant-voltage stage, the charging current is small, and the auxiliary circuit will work to realize ZVS of the main switches; thus, the full load range ZVS can be realized.