## 3 Experimental Method
In the upcoming soldering experiment (Figure 3), three distinct levels of substrate temperature (200 \({}^{\circ}\)C, 215 \({}^{\circ}\)C, and 230 \({}^{\circ}\)C) were selected for the introduction of vapor into the chamber. Additionally, three varied durations were chosen for the cleaning (100 s, 200 s, and 300 s) of surfaces once atmospheric pressure was achieved. These parameters are crucial for determining the optimal conditions under which the vapor interacts with the substrate, ensuring effective cleaning and preparation for soldering. By experimenting with different temperature levels and cleaning durations, the process aims to identify the most efficient combination that enhances the quality and reliability of the soldered connections. Substrate temperature was measured in each chamber of the PINK furnace with 4 thermocouples connected to the soldering carrier from the bottom side; however, the substrate temperature is different to the real temperature measured on the module assembly. To determine the actual temperature on the copper baseplate, thermocouples need to be fixed on the baseplate and measured during the reflow process. The main goal of the  
Figure 3: Measured void area using the C-SAM scanning software and analyzed using Minitab statistical software. Summarized statistical data from the measured void area for different temperature and time settings for preform alloy from “Supplier A”. The presented results are built for one solder preform lot/batch only. experiment was to identify the process parameters that have the main influence on the measured void area. Figure 3 illustrates that the most effective reduction in void area was obtained with extended activation time and elevated temperature during the formic acid treatment. This comparison involved a series of eleven experimental runs (with different parameter settings), with each run comprising the soldering of eight modules. The results highlight the significant impact of both activation duration and temperature on minimizing voids, thereby improving the overall quality of the soldered connections. As the duration within the reduction atmosphere extended, there was a notable decrease in voids within the solder joint, reaching a minimal percentage of the Direct Copper Bonded (DCB) area (Figure 3, Group 5, orange color). This observation suggests that longer exposure to the formic acid environment effectively mitigates void formation, potentially indicating the presence of surface contamination on the materials being joined. The prolonged interaction with formic acid appears to enhance the cleaning process, allowing for the more thorough removal of contaminants that could otherwise contribute to void formation. The better the reduction number of the void area, the better performance operation that the power semiconductor module can be expected to achieve naturally. Therefore, our recommendation for industrial applications is to perform 300 s of cleaning time at 230 \({}^{\circ}\)C.  
To verify the input material quality and surface impurities' impacts, various solder batches were tested as well (Figure 4) for different formic acid cleaning times. Higher impacts from the solder preforms' surface quality can be seen when lowering the cleaning time to 300 s, where the tested batches have higher values for their average void areas (BG5673--1.6775%, BG5687--1.0025%, BG5705--1.01533%, BG5708--2.11167%, BG5711--1.1225%, BG5732--0.897321%, BG5754--2.56958%, GB5808--0.39375%, BG5833--1.78437%, BG5894--0.928125% and BG5920--0.75652%). The impact of improved cleaning time is more visible for times up to 860 s, where the soldering process is more stable and the average void drops below 1%. In a comparison of the same test batches, the overall values are similar (BG5732--0.823125%, BG5808--0.51375%, BG5894--0.969%, BG5920--0.608125%). For the test samples with higher values, they have increased cleaning time, showing a positive impact with reductions in total void area for BG5754--1.945% and BG5833--1.19625%.