# Power Amplifier Predistortion Using Reduced Sampling Rates in the Forward and Feedback Paths
## 1 Introduction
Furthermore, the bandwidth of the signals tends to emulate stronger memory effects in the power amplifier's behavior. This calls for the development of more advanced predistortion functions that can compensate for such distortions. Some of the recent work involved with developing new digital predistortion algorithms include developing a bivariate Volterra digital predistorter [7], reduced complexity sequential predistortion [8], MIMO phased arrays focused DPD [9; 10; 11], developing behavioral models into predistortion models [12], agnostic envelope linearization [13], and a recent paper that delves into the linearization of a 400 MHz bandwidth 5G NR signal [5]. However, one thing that most of the presented works have in common is that they require a feedback signal that is oversampled by as much as five times in order to train the digital predistorters appropriately, such that they account for the adjacent channel spectral regrowth. The work reported in [5], in particular, required a 2 Gsps feedback signal to linearize a 400 MHz signal. Of course, this suggests that to realize a practical DPD solution for signals of wider bandwidths, both the feedback's analog-to-digital converter (ADC) and forward path's digital-to-analog converter (DAC) have to accommodate much higher sampling rates. This results in a significant increase in the initial cost of deploying wireless base stations, and it could potentially result in increased power consumption to accommodate the faster data rates, as required with the increased data throughput. On the other hand, another concern with DPD systems is the computational requirement that increases as the bandwidth increases. As discussed above, the increased intensity of the memory effects that require linearization indicates that more robust DPD algorithms must be used. This comes at the cost of increasing the computational cost of training and utilizing the predistorter. Hence, numerous studies have been conducted in order to alleviate this problem. Some of the proposed solutions include the peak-to-average power reduction techniques presented in [14], the reduced complexity DPD presented in [8], linearization under high data sparsity [15], and the feature selection methodologies presented in [16]. The concept of feature selection [16], in particular, is of great interest, as it attempts to limit the amount of basis functions in a DPD model required for adequate linearization. This utilizes the fact that for many DPD algorithms, most of the defined basis functions contribute insignificantly to linearizing the power amplifier. Hence, eliminating said features, or performing a linear projection of the extracted basis functions into a lower feature space, can help in reducing the computational requirement increase associated with linearizing signals of wider bandwidth. In addition, if this is coupled with relaxing the sampling rates of both the forward and the feedback paths, the practicality of DPD for next-generation wireless communications can be further highlighted. Consequently, accommodating lower sampling rates for both feedback and forward paths is of utmost interest, as it would simplify deploying efficient next-generation wireless infrastructure. Digital predistortion's shortcomings when it comes to the feedback and forward paths sampling rates have had some potential solutions suggested in previous research works. However, most research focused on reducing the sampling rates in either the forward or the feedback path separately, which limits their practicality. For instance, the works in [17; 18; 19] present a novel band-limited feedback approach to reduce the feedback path ADC sampling rate. This was effectively completed by utilizing a bandpass filter prior to the feedback path's ADC and implementing varying forms of band-limited DPD functions. However, it must be noted that most of the presented work requires additional iterations to create a better estimate of the actual output signal and additional hardware is required to achieve this.