## 3 Enhanced SoC-Balancing Strategy with Saturation
### Theoretical Comparisons of Balancing Performance  
In DSP28335 chips, the bit number of the analog-to-digital converter is 12, and the analog input voltage ranges from 0 to 3 V. The rated current of the adopted current sensor, LA50P, is 50 A. Through signal conditioning, 50 A is transformed to 3 V on DSP pins. As a result, 1 LSC = 50 A/(212 - 1) = 0.012 A, which is mentioned in Inequation (10). Based on the actual test, 1000 multiplications require about 170 us. This means \(t_{\text{mul}}\) is 0.17 us. When \(i_{\text{satt0}}\) = 33 A, \(i_{\text{sum0}}\) = 50 A, and \(t_{\text{else}}\) = 37 us in parallel applications, it can be derived that \(n\leq 54\) based on Inequations (8) and (10), while \(n\geq 9\) based on Inequation (9). When \(i_{\text{satt0}}\) = 33 A, \(i_{\text{satt0}}\) = 6 A, \(i_{\text{sum0}}\) = 45 A, and \(t_{\text{else}}\)= 39 us in series applications, we can acquire that \(n\geq 11\) based on Inequation (14) and \(n\leq 64\) based on Inequation (8). Furthermore, \(i_{\text{sattu}}\) was calculated as 24.2 A. The practical \(i_{\text{satt0}}\) is adopted as 24 A for series applications. For fast convergence, \(n\) is set as 50 for both applications. As shown in Figure 7, a numerical simulation was carried out to acquire theoretical curves under various conditions. For simplicity, power losses are ignored. Moreover, it is assumed that \(i_{k}\) follows its reference current immediately and \(u_{k}\) is constant at its nominal value (12 V). Figure 8 gives the theoretical curves when the proposed strategy is used in parallel scenarios. As seen in Figure 8a,d, the equilibrium point is not accessible if \(i_{\text{satur}}=18\) A because Inequation (16) is not fulfilled. In addition, a higher \(i_{\text{satur}}\) contributes to shorter balancing duration because higher current deviations enable a faster approaching speed of SoC levels. As Figure 8b,e exhibit, a larger \(n\) also helps to accelerate the balancing process among unsaturated ESUs, but the improved effect is no longer remarkable if \(n\) is large enough. When load is reduced at 200 s and then restored at 1000 s, current balance and SoC equalization are still achieved. The relevant process is shown in Figure 8c,f. Figure 9 displays the ideal waveforms when the proposed strategy is utilized in series scenarios. Figure 9a,d reveal that step reference currents are generated if \(i_{\text{satur}}>24.2\) A, e.g., \(i_{\text{satur}}=30\) A. If \(i_{\text{satur}}\) is fixed as 24 A under load variation, this may also lead to step reference current even if the load is restored. This is seen in Figure 9b,e. To fix this issue, a variable \(i_{\text{satur}}\) is applied. In Figure 9c,f, the undesired step references are avoided, and the corresponding balancing duration is not obviously lengthened. Figure 8: Ideal curves in parallel applications: (**a**) currents under different values of \(i_{\text{satur}}\), (**b**) currents under different accelerating factors, (**c**) currents under load change, (**d**) SoC under different values of \(i_{\text{satur}}\), (**e**) SoC under different accelerating factors, and (**f**) SoC under load change. Figure 7: Schematic diagram of numerical simulation. In Figure 10, ESU#1 is the master unit. Here, \(i_{\text{satur}}\) is 33 A in parallel applications and 24 A in series applications, respectively. When ESU#2 is suddenly stopped (letting \(d_{2}=0\)), the \(SoC_{2}\) is subsequently set to zero so that the energy of ESU#1 and ESU#3 can be redistributed for SoC balance. Under the proposed strategy, the balanced point is still reached between the rest units after a slave ESU exits the microgrids. Battery degradation is commonly existent after numerous charge and discharge cycles. Furthermore, the usable capacity thereupon decreases. Thus, it is important to evaluate the  
Figure 10: Ideal curves when ESU#2 is ceased: (**a**) currents in parallel applications, (**b**) currents in series applications, (**c**) SoC in parallel applications, and (**d**) SoC in series applications.