## 3 Equalization Schemes  
The most common linear equalization filter structure used in transmitters is the Feed-Forward Equalizer, as shown in Figure 5. It is basically an FIR filter and works by shaping the pulse response in such a way that, in the optimal case, all pre- and post-cursors are reduced to zero, eliminating all ISI. Figure 4: VCSEL equivalent circuit [13]. \begin{table}
\begin{tabular}{c c l} \hline \hline
**Component** & **Unit** & **Description** \\ \hline \(L_{p}\) & H & Series inductance of pad connection \\ \(C_{p}\) & F & Parasitic pad capacitance \\ \(R_{m}\) & \(\Omega\) & Mirror resistance \\ \(R_{a}\) & \(\Omega\) & Active area resistance \\ \(C_{a}\) & F & Active area capacitance \\ \(V_{j}\) & V & Intrinsic diode voltage \\ \(I_{s}\) & A & Diode reverse saturation current \\ \(n\) & - & Diode ideality factor \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Components of electronic interface. FFEs are very popular because of the simple and wide range of implementation architectures. The delay elements can be implemented either with synchronously clocked flip-flops, transmission lines or by analog delay elements. The summing and scaling of coefficients can be implemented by parallel connection of scaled switched current sources either before or inside the final driver. Alternatively, the filter functions can be realized in the digital domain (as an FIR either through an equivalent circuit or a simple Lookup Table (LUT)) which is then followed by a DAC-driver. As previously discussed, FEEs are not able to filter the relaxation oscillations for all biasing and input data conditions. It was demonstrated that 112 Gbit/s PAM-4 VCSEL data transmission is possible with the use of a Volterra non-linear equalizer [15; 16]. However, the implementation of a Volterra filter requires a power-hungry digital signal processor and cannot easily be implemented in the output driver, as would be the case with an FEE. A much more efficient technique is to dynamically adapt FFE coefficients based on the input data. Adaptive, UI-based FFE pre-emphasis was already implemented for NRZ-modulated signaling [17; 18; 19]. These filters are made adaptive by switching the tap coefficients based on current and subsequent NRZ digital values. This is simple as only two code levels have to be considered. It is debatable though if these filter structures are really necessary for NRZ transmission, since an asymmetric data eye is not a problem as long as the BER is sufficiently low. On the contrary, for higher PAM modulation formats, equalization becomes essentially mandatory. The eye amplitude becomes a fraction of the full scale signal, overshoots can decrease the size of adjacent eyes and asymmetric rise-and-fall times have a much more severe effect. A proposal for an adaptive PAM-4 FFE [20] is shown in Figure 6. It works just like a linear FFE, but the actual coefficients \(c_{1,x}\dots\ c_{4,x}\) are selected depending on the state of the main tap 0, 1, 2 or 3 (00b,...,11b). As can be seen in Figure 3, the resulting relaxation oscillation amplitude and frequency differs for the four PAM levels. The oscillation frequency ranges from 11 GHz for level 0 to 20 GHz for level 3 (as a result of the bias dependent transfer function shown in Figure 2). The main tap is used to decide on one set of coefficients, as it directly correlates with the operating current, therefore defining the oscillation behavior of the VCSEL. This equalizer design could be incorporated into standard Current-Mode Logic (CML) FFE  
Figure 5: Block diagram of a n tap FFE. Figure 6: Block diagram of adaptive FFE, \(n\) pre and \(m\) post-taps, four sets of coefficients for PAM-4 signaling. implementations as in [11], or as a digital adaptive FIR filter followed by a baud rate current-steering DAC with an extra VCSEL bias current source.