## 1 Introduction  
Reliable processes have been used to manufacture MOSFET transistors, which are followed by FinFET for chasing speed. The structure from planar to 3D is appreciated owing to controllability because of exceptionally leaky current of the short channel effect. There are several other ways to improve the speed of integrated circuit (IC), especially by enhancing the performances of transistors. The value \(\mathrm{k_{n}}\) is proportional to the product of mobility and capacitance per m\({}^{2}\), and the current appears to be increased by promoting either the mobility of carriers or the di-electric constant of the capacitor. The mobility of carriers may be higher if the silicon channel is replaced with Ge whose mobility is from 2.5 to 4.0 times that of epi-silicon. In addition, the di-electric constant of tantalum oxide mixed with Hf is approximately 25 to 27, which is approximately five times that of conventional nitridded silicon di-oxide. The advanced techniques mentioned above can be used to enhance FinFET devices, making them even more promising [1; 2; 3; 4; 5; 6; 7; 8; 9; 10; 11].  
Nevertheless, there still exist some limitations, e.g., heat dissipation. As electrical signals or power flow, Ohm's heat inevitably increases as the size shrinks. The temperature may soar up, and electrical performances of a single transistor may simply degrade unless heat sink is found and the heat dissipation gets resolved. GAA (gate-all-around) MOSFET thus provides a possible solution using \(\mathrm{Al_{2}O_{3}}\) as an insulator compared with \(\mathrm{HfO_{2}}\) and \(\mathrm{SiO_{2}}\)[12].  
To realize characteristics of a transistor or even to design an integrated circuit, a useful model (I-V formula) has to be proposed. More than fifty years ago, the conventional formula for describing electrical characteristics of transistors was introduced. However, fitting may not be possible for potential analysis unless certain modification are implemented, as presented in Equations (1) and (2) [7; 8]. In the model, three basic primary parameters (\(\rm{k_{N}}\), \(\rm{V_{th}}\), and \(\lambda\)) are presented even though the model has been progressively modified many times by using equivalent circuits. However, in a sense, the conventional formula has been evolving, making many contributions in the past. Therefore, the modified basic model in Equations (1) and (2) is preferred here; model-fitting is carried out for analysis as well as used to examine the transistor.  
On the one hand, \(\rm{K_{n}}\) values linked to the sizes are considered to be proportional to channel width and inversely proportional to channel length. On the other hand, the threshold voltage is linearly dependent on the depth of depletion region as gate bias is applied to the gate, which may be related to process-induced dimension loss. Furthermore, short channel effects and the so-called Early voltage (\(1/\lambda\)) may be responsible for the corresponding leakage current. Three parameters mentioned in the I-V formula can be deliberately chosen to be separately fixed, and the minimum total deviation in Equation (3) is utilized to compare and provide important information [10; 11; 12; 13; 14; 15; 16; 17; 18; 19].  
In this paper, we consider only FinFET transistors with 0.120 micron-wide fins, whose channel lengths may be 100, 160, or 240 nanometers (W120L100, W120L160, or W120L240). Those are measured, fitted, analyzed, and compared. Some physical implications may then be concluded.