# A Forwarding Latency Optimization Method for Software Data Plane Based on Spin-Polling
## 3 Motivation
### The Effects of Batch Processing Mechanisms  
In this section, we use DPDK, a high-performance IO framework with classic spin-polling architecture, to build our experimental environment. DPDK provides an ip_pipeline application, an excellent base case that can be used to implement SDN software switch. We implemented an L4 forwarding application based on the ip_pipeline as a test program for this paper.The testbed is shown in Figure 3. Our software data plane is deployed in a Dell R740 server with an Intel E810 NIC that provides a maximum data rate of 100 Gbps, and we configure the NIC to 4 \(\times\) 25 Gbps mode. The NIC receives traffic from an lxia XGS12 network test platform, a separate packet generator connected to the NIC ports. The detailed experimental configuration is shown in Table 1. The queue configuration is shown in Figure 3.  
We experiment with one CPU core, one Rx queue and one Tx queue to explore the effect of the batch processing mechanism. We use 512-byte fixed-length IPv6 TCP packets for experiments, and some flow tables and flow entries are installed on the data plane to support packet forwarding.  
First, we rewrite part of the code of DPDK to collect the performance parameters of the data plane under different \(\theta_{Rx}\) and \(\theta_{Tx}\). Then, we use the control variables method to explore the effect of \(\theta_{Tx}\) and \(\theta_{Rx}\) on the performance of the data plane respectively. We fix \(\theta_{Tx}\) to 64 and collect the performance parameters for \(\theta_{Rx}\) = 4, 8, 16, 32, and 64, as shown in Figure 4. Similarly, we fix \(\theta_{Rx}\) to 64 and collect the performance parameters for \(\theta_{Tx}\) = 4, 8, 16, 32, and 64, as shown in Figure 4. It is clear that the maximum throughput of the data plane increase with the two batch size. This result is consistent with the analysis above and also reflects the advantages of the batch processing mechanism. At the same time, we also observe that the average latency increases with increasing \(\theta_{Tx}\) and decreases with increasing \(\theta_{Rx}\).  
\begin{table}
\begin{tabular}{c c} \hline \hline
**Environment** & **Information** \\ \hline CPU & Intel Xeon Silver 4216 CPU @2.10 GHz \\ NIC & Intel Ethernet Connection E810 Series \\ DPDK Version & 21.11.1(LTS) \\ Ixia Network Version & 8.30 \\ \hline \hline \end{tabular}
\end{table}
Table 1: The Detailed Experimental Configurations.  
Figure 3: The experimental configurations. (**a**) The testbed topology. (**b**) The queue configuration.  
Figure 5 shows the average latency of packets forwarded through the data plane under different input rates. For simplicity, we denote the average latency curve in Figure 5 by \(T_{\theta_{Tx}}(r)\). When the traffic rate \(r\) is in the range [1, 8] Gbps, \(T_{\theta_{Tx}\theta\theta}(r)\), \(T_{\theta_{Tx}\theta\theta\theta}(r)\), and \(T_{\theta_{Tx}\theta\theta}(r)\) almost overlap, so the \(\theta_{Tx}\) has little effect on the average latency of packets in this rate range. At the same time, we noticed that, in this range, the average latency of packets decreases with rate \(r\). When \(r\) is in the range [10, 15] Gbps, the average latency of packets increase with the \(\theta_{Tx}\). Moreover, in the range [8, 15] Gbps, the average latency of packets increases with rate \(r\).  
From the above experiments, we can conclude that in the spin-polling system, unlike \(\theta_{Rx}\), \(\theta_{Tx}\) is not always the larger, the better. The average latency is related to the size of \(\theta_{Tx}\), which motivates us to look for a mechanism to adjust \(\theta_{Tx}\) to optimize the average latency of packets dynamically.