Advanced Doherty Power Amplifier Architectures for 5G Handset Applications: A Comprehensive Review of Linearity, Back-Off Efficiency, Bandwidth, and Thermal Management  
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In a Doherty power amplifier (DPA) configuration, the carrier amplifier is typically designed to operate in Class-AB mode, which provides a balance between linearity and efficiency. However, this operational mode introduces gain compression as the input power increases, leading to a nonlinear relationship between input and output power levels. Conversely, the peaking amplifier is designed to operate in Class-C mode, which allows for higher efficiency at the cost of linearity, often resulting in gain expansion. This inherent asymmetry between the two amplifiers leads to significant amplitude and phase distortion. The resulting nonlinear characteristics manifest in two key ways: amplitude modulation to amplitude modulation (AM-AM) distortion and amplitude modulation to phase modulation (AM-PM) distortion [5]. AM-AM distortion affects the output power in relation to the input power, causing deviations from the ideal linear response. Similarly, AM-PM distortion introduces phase shifts that can adversely affect signal integrity, particularly in communication systems that rely on precise phase information, such as 5G New Radio (NR). To mitigate these nonlinear distortions, advanced techniques have been developed. One effective approach is to implement dynamic power division strategies, where the power distribution between the carrier and peaking amplifiers is adjusted in real time based on the input signal conditions [1; 2; 3]. Additionally, harmonic suppression techniques can be employed to manipulate the amplifier's harmonic responses, aligning the phase relationships of the intermodulation distortion components from both amplifiers to enhance cancellation effects. These strategies not only improve the linearity of the DPA, but also ensure that the overall system meets the stringent Adjacent Channel Leakage Ratio (ACLR) requirements essential for 5G applications. Efficiency and Bandwidth Degradation Under 3.4 V Supply Compared to Traditional 5 V Systems  
The transition to lower supply voltages such as 3.4 V in modern 5G handsets brings significant challenges for both efficiency and bandwidth in Doherty amplifiers. Firstly, the reduced supply voltage limits the output voltage swing, leading to a decrease in both the maximum output power and the overall efficiency of the amplifier compared to traditional 5 V systems [3]. For a given power output, as the peak voltage is reduced, the corresponding current must increase. This lowering of load impedance leads to the second contribution to performance reduction: lower load impedance bring higher loss as transformation ratio is increased. Accordingly, bandwidth is almost always compromised as load impedances are lowered. To address these efficiency and bandwidth challenges, several innovative strategies are being explored. One approach is the optimization of output-matching networks to enhance bandwidth at lower supply voltages [4; 6]. Techniques such as adaptive bias control can also be employed, where the biasing of the amplifier is dynamically adjusted based on the input power level [7; 8; 9]. This ensures that the amplifier operates in the most efficient region of its performance characteristics, even at reduced supply voltages. On the other hand, the efficiency-optimized design relies on precise impedance transformations between the carrier and peaking amplifier paths, which are inherently frequency-sensitive. Specifically, the quarter-wave transformers and compensating networks required for proper load modulation exhibit narrowband characteristics, restricting the operating bandwidth [10; 11; 12]. Thermal Management in Chips  
Effective thermal management is critical for maintaining the reliability and performance of Doherty amplifiers in 5G applications.