## 4 Discussion
When both area and performance need optimization, the CPLD mode is the best choice. Figure 6 illustrates the number of best and unique solutions in terms of FSM area achieved by the sequential encoding methods developed. Figure 5: The number of best and unique solutions for the code selection modes (**a**) in terms of area, and (**b**) in terms of performance. Figure 6: Number of best and unique solutions in terms of the FSM area achieved by sequential state encoding methods. As shown in Figure 6, the methods are ranked in the following order in terms of area efficiency:  
P_C_FPGA;  
max_C_diff_w;  
C_FPGA;  
P_C_max_w;  
max_C_FPGA;  
max_X_FPGA;  
P_FPGA;  
max_C_CPLD;  
C_max_w;  
C_CPLD;  
max_C_max_w. The ranking was determined by the number of Best results each method achieved in terms of area efficiency. Methods were ranked according to how often they produced the most optimal area outcomes. When multiple methods had the same number of Best results, the Unique value was used to differentiate them. This ranking effectively highlights the methods that are most successful in minimizing FPGA resource utilization, providing valuable insights into the best techniques for area optimization. Notably, among the best area methods, the state selection modes P_C and max_C are prominent, but the C, max_X, and P modes also appear. Similarly, besides the FPGA and CPLD modes for code selection, the diff_w and max_w modes are also present. Therefore, to identify the best area solutions, it is advisable to consider not only the recommended P_C, max_C, FPGA, and CPLD modes but also the state selection modes C, max_X, and P, along with the code selection modes diff_w and max_w. Figure 7 illustrates the number of best and unique solutions in terms of FSM performance achieved by the developed sequential encoding methods. Based on Figure 7, the methods are ranked in terms of performance efficiency as follows:  
P_C_max;  
max_C_diff_w;  
Figure 7: Number of best and unique solutions in terms of the FSM performance achieved by sequential state encoding methods. max_C_max_w; C_CPLD; P_max_w; P_C_CPLD; max_C_CPLD; P_CPLD; P_diff_w; C_max_w; P_C_diff_w; max_C_FPGA; C_FPGA; P_C_FPGA; max_X_FPGA. The performance ranking was established by counting how often each method achieved the Best results in terms of maximum operating frequency. Methods were ranked according to the number of top performance results they produced. In cases where methods had the same number of Best results, the Unique value was used to determine the ranking. This ranking highlights which methods are most effective in maximizing the FSM's operating frequency, thus offering useful guidance for performance optimization. It is important to note that among the top-performing methods, in terms of performance, the state selection modes P_C and max_C are not the only ones present. The C, P, and max_X modes are also found to be among the best. Similarly, for code selection modes, besides max_w and CPLD, the diff_w and FPGA modes also appear frequently. Therefore, to achieve the best performance, one should consider not only the recommended P_C, max_C, max_w, and CPLD modes but also the C, P, and max_X state selection modes along with the diff_w and FPGA code selection modes. Although the diff_w mode is not consistently among the top code selection modes for either area or performance, it is frequently found in state encoding models that yield the best solutions.