## 5 Laboratory Tests and Real-Time Validation  
### FPGA Design and BEE-Cube SDR  
Because of its simple logical design, the proposed detector can be implemented on a FPGA easily. The simplified Welch algorithm allows for small and laboratory devices to benefits from the smooth and flexible power spectrum and fits to the current FPGA design libraries. As it can be seen, the proposed detector contains the basic logical elements in embedded design libraries. All the proposed detectors and the mitigation block that contains the adaptive notch filters, are transferred to a worthy FPGA design based on the Xilinx Digital Signal Processing (DSP) Generator. Throughout the real-time tests and validations, a software defined radio (SDR) was used to run the FPGA design in a real-time test bench. The utilized SDR is the Nano BEE-Cube made by National Instruments. The target of this paper is to propose a practical detector that can protect a narrowband modulated signal from MCWI. Thus, it is necessary to install a standard digital receiver after the detector chain and carefully study its behavior in harsh situation. The DVB-S2 receiver is selected as the promising candidate and all of its physical layer is implemented in the FPGA core after the detector. Actually, the proposed detector is utilized to protect the DVB-S2 against MCWI with variable center frequency and power. The DVB-S2 physical layer represents typical digital receivers and contains all of the necessary blocks [15]. This implementation allows us to study the SNR improvement in a real digital receiver. Besides detectors and the mitigation block, all the FPGA design of the DVB-S2 physical layer is also transferred to BEE-Cube SDR. Actually, the BEE-Cube SDR is converted to a DVB-S2 receiver that is protected with the proposed detector and mitigation system. To validate and test the interference removal properly, an official test bench is set up at the LASSENA Laboratory at Ecole de technologie superieure (ETS), in Montreal, Canada. Figure 17 presents the overview of the set-up and configuration to fulfill the practical part study. To generate real DVB-S2 RF signals, the real-time video stream is modulated and processed by GNU radio and transmitted using a Universal Software Radio Peripheral (USRP-N210) [35]. This implemented demo contains all DVB-S2 transmitter block and allows for amplitude and bandwidth adjustments of transmitted signal from GNU radio. A signal generator is responsible to generate the AWGN signal with different SNR. With the help of this signal generator, noise is added to the transmitted signal with desired power. Another BEE-Cube SDR device, which runs with Matlab from a desktop computer, generates the MCWI with variable power and center frequency. Then, the transmitted noisy signal is mixed with MCWI with variable power and hopping center frequency and passes through the nanoBEE, which contains the FPGA design created. After being processed by the BEE-Cube receiver, the output is sent to a computer equipped with Matlab for representation of the processed data. It should be mentioned that all mitigation and processing steps are fulfilled in the heart of BEE-Cube device and Matlab is utilized simply for visualization purposes. Moreover, the quality of power spectrum before and after filtering is monitored with the help of the Tektronix [36] spectrum analyzer. Table 2 represents the utilized parameters in the practical test. Moreover, in the practical test, three CWIs with hopping center frequency and variable power are utilized. Variation speed of the center frequency is from 500 Hz to 3 kHz and the power of each CWI changes from \(-60\) to \(-40\) dBm that is equivalent to JSR between \(-20\) to 0 dB. Table 3 represents the detector performance in the practical test. In this test, three hopping frequency CWIs are generated by the jammer. This test tries to explain the detector capabilities in both weak signal detection and interferences with fast center variation.