## 2 Virtual Wafer-Based Method
### Approach to Deal with Chamber Cleaning Requirements
Then, by the backward strategy, the robot performs a sequence of robot tasks (i.e., \(M_{i(i\ + 1)}\to L_{i\ + 1}\to M_{(i\ + 1)(i-1)}\to W_{i-1}\to U_{i-1}\to M_{(i-1)i}\)) such that it moves to the PM again for loading a wafer. When the robot starts to perform a loading task, the chamber cleaning operation ends. Thus, for this case, the time can be scheduled for cleaning the chamber in the PM at Step \(i\) is \(O_{i}^{\mathit{0}}=\alpha\)\(+\beta+3\mu+\omega_{i-1}\). Assume that after a real wafer is unloaded from a PM at Step \(i\), there is a single virtual wafer being loaded into the PM only to deal with chamber cleaning before another real wafer is loaded into the PM for processing. For this case, when a real wafer is unloaded from the PM, the chamber in the PM starts to clean its internal environment. Then, the robot sequentially performs the following robot task sequence: \(M_{i(i\ + 1)}\to L_{i\ + 1}\to M_{(i\ + 1)(i-1)}\to W_{i-1}\to U_{i-1}\to M_{(i-1)i}\to L_{i}\) such that a virtual wafer is loaded into the PM. Note that the time for the virtual wafer staying in the PM is \(\tau_{i}\), which is determined by the one-wafer cyclic schedule. By the backward strategy, when the robot comes to the PM again, the robot performs the following robot tasks: \(U_{i}\to M_{i(i\ + 1)}\to L_{i\ + 1}\to M_{(i\ + 1)(i-1)}\to W_{i-1}\to U_{i-1}\) such that the robot moves to the PM again carrying a real wafer. At this time, the cleaning operation ends, and the real wafer is loaded into the PM by performing \(L_{i}\). In this case, the time that can be scheduled for the chamber cleaning at a PM at Step \(i\) equals the time needed for the following consecutive activities: \(M_{i(i\ + 1)}\to L_{i\ + 1}\to M_{(i\ + 1)(i-1)}\to W_{i-1}\to U_{i-1}\to M_{(i-1)i}\to L_{i}\) the virtual wafer staying in the PM \(\to U_{i}\to M_{i(i\ + 1)}\to L_{i}\)\(+\ 1\to M_{(i\ + 1)(i-1)}\to W_{i-1}\to U_{(i-1)i}\). Therefore, with Equation (1), we have \(O_{i}^{\mathit{1}}=\tau_{i}+3\alpha+3\beta+6\mu+2\omega_{i-1}=n_{i}\times\theta _{i}+\alpha+\beta+3\mu+\omega_{i-1}\). Similarly, if there are \(d\) virtual wafers being consecutively loaded into a PM at Step \(i\), \(i\)\(i\)\(\in\)N\({}^{+}\)\({}_{n}\), the scheduled time for the chamber cleaning in the PM is  
\[\mathcal{O}^{d}_{i}=d\times n_{i}\times\theta_{i}+\alpha+\beta+3\mu+\omega_{i-1 },d\geq 0 \tag{4}\]  
Expression (4) gives the time that can be scheduled for the chamber cleaning at a PM at Step \(i\), \(i\)\(\in\)N\({}^{+}\)\({}_{n}\), if there are \(d\) virtual wafers being consecutively loaded into the PM. Let \(d_{i}\) denote the minimal number of virtual wafers to be consecutively loaded into the PM such that there is enough time scheduled for chamber cleaning. Assume that the chamber cleaning time at parallel PMs at Step \(i\) is same. If the exact time required for the chamber cleaning at a PM at Step \(i\), \(i\)\(\in\)N\({}^{+}\)\({}_{n}\), is given, by Equation (4) we have  
\[d_{i}=\underset{d}{arg\,min}(h=d\times n_{i}\times\theta_{i}+\alpha+\beta+3\mu +\omega_{i-1}-C_{i}|h\geq 0),\ i\in\text{N}^{+}\text{${}_{n}$}, \tag{5}\]  
In Equation (5), \(\theta_{i}\) and \(\omega_{i-1}\) are determined by the one-wafer cyclic schedule. Now, the question is how to obtain a schedule by introducing virtual wafers such that chamber cleaning requirements are ensured while the throughput is maximized. In real semiconductor fabs, a periodic schedule for cluster tools is preferred since it is easy to be implemented and WRTCs are easily met in order to avoid the quality problem. It is necessary to note that, in this work, wafers (including both real and virtual wafers) are loaded into cluster tools based on the one-wafer cyclic schedule defined by Definition 1. In addition, there is a sequence of real and virtual wafers loaded into a cluster tool periodically. Thus, we have the following definition. **Definition 2**.