# A Short Review of Through-Silicon via (TSV) Interconnects: Metrology and Analysis
## 3 TSV Reliability
### Thermal Management
Microstructural examination showed that the microcracks were the result of Cu-Si compounds formed during the annealing process and that the cracks were caused by Si oxidation at the crack tips' extension (Figure 9) [48; 49]. Initially, silicon (Si) reacts with oxygen to form a layer of silica, which subsequently experiences fracture due to slow crack growth following the mechanism proposed by [PERSON] [48]. Moreover, the failure of micrometer-thick polysilicon films under fatigue loading and environmental conditions can be attributed to the thickening of the oxide layer and subsequent fracture. This fracture occurs due to a subcritical crack extension induced by moisture within the oxide layer. The oxidation of Si primarily occurs in a narrow region along the crack, leading to the reasonable assumption that Si undergoes oxidation only near the crack tip. The presence of Cu\(-\)Si compounds results in consistently high residual stress at the crack tip, thereby significantly accelerating oxidation kinetics. As the average free velocity of oxygen under ambient conditions is 480 m/s, the supply of oxygen to the crack tip does not pose a limiting factor influencing the relatively rapid rate of slow crack extension in CF-TSV samples. The influence of temperature on protrusion is more pronounced compared to that of annealing time. Additionally, the impact of annealing temperature on residual stresses in the TSV structure is significant. Higher annealing temperatures give rise to increased stresses and deformations, both at elevated temperatures and at room temperature. When the annealing temperature surpasses 350 \({}^{\circ}\)C, the protrusion height experiences a sharp increase. This occurs because, under the constraint of the surrounding Si substrate, the Cu can only expand continuously and vertically as the annealing temperature rises. The significant coefficient of thermal expansion (CTE) mismatch between Si and Cu generates greater stresses in the Cu as the TSV undergoes heat treatment. At a sufficiently high temperature, when the thermal stress in the Cu TSV exceeds the yield stress of Cu, irreversible and permanent plastic deformation occurs. Consequently, the Cu material extrudes from the TSV structure. Upon cooling the wafer to room temperature, the elastic deformation recovers, but the irreversible and permanent deformation in the Cu material remains, preventing it from returning to its original shape or length. Thus, a Cu protrusion forms, disrupting the electrical connection of the device and resulting in the failure of the substrate protrusion. When 3D ICs structures undergo thermal cycling during the processing stage, it can cause residual mechanical stresses to form in the active silicon region. These mechanical stresses have the potential to alter the carrier mobility in the active silicon, which ultimately impacts the device's performance. The degree to which mechanical stresses and carrier mobility are affected is dependent on the thermal excursions during processing and the physical properties of the constituent materials. It is also worth noting that during the formation of Cu-Si compounds, which occurs when copper diffuses into the silicon, a large compressive stress is generated in the silicon. This stress can lead to the nucleation of microcracks in the silicon wafer near its sharp edges. Over time, the microcracks in the silicon wafer along the [1 1 0] direction grow slowly, leading to the merging of cracks produced by different TSVs. To prevent or delay the cracking of the diffusion barrier layers, thicker barrier layers, silicon walls with flatter scallops, and lower fabrication and operating temperatures can be implemented. By doing so, the likelihood of microcrack formation and subsequent merging of cracks can be reduced [13]. The current insulating dielectric layer material used in TSV technology is primarily silicon dioxide (SiO\({}_{2}\)). However, SiO\({}_{2}\) has a significant thermal expansion coefficient (CTE) mismatch with copper, which can lead to reliability issues.