# A High Gain Modified Quadratic Boost DC-DC Converter with Voltage Stress Half of Output Voltage
## 6 Results and Discussion
### Experimental Results and Discussion  
In this section, the experimental results are discussed. To validate the potential performance of the proposed converter, a prototype capable of providing 200 W output power was developed in our lab and was tested in the laboratory environment. The Hardware prototype is shown in Figure 18. The Experimental results for the 150 W output power were measured and they are thoroughly discussed in this section. The experimental waveform was obtained from the digital oscilloscope and is presented in the later section step by step. The hardware parameters starting from passive components to the power MOSFET switch and power diodes have the same specification as in the simulation parameters and are shown in Table 2. This proposed study was tested by feeding 48 V DC input voltage and extracting 400 V DC of output voltage (i.e., range 395-405 V). The corresponding duty cycle's value was measured and then selected to obtain the desired output from the non-ideal gain voltage formula (i.e., Equation (31)). Referring to the non-ideal voltage gain Equation (31), the calculated duty cycle was 0.4 or 40%, which refers to the exact desired output voltage. The PWM signal generated from the STMicroelectronics microcontroller unit was directly fed to the MOSFET driver circuit using the driver IC (i.e., TLP 250H) mentioned in Table 3. The electronic DC load was used for taking all the measurements. Figure 18: Hardware prototype developed in our lab. In Figure 19, the gate pulse, input voltage, switch's voltage stress, and output voltage are shown. A 402 V output voltage is measured at the load side experimentally and is shown in Figure 19. At duty 0.4, the actual output voltage gain is about 426 V, and, in this case, a reduction of 26 V can be seen in the experimental results, which is due to the diode's forward voltage (i.e., due to non-ideal voltage gain, Equation (31)) as well as including some small drops associated with passive components. Figure 20 represents the voltage stress of diodes D1, D2, and D3. For the above-mentioned rated power rating, the corresponding voltage stress of the diodes are 75 V, 123 V, and 202 V, respectively. In Figure 21, the voltage stress across diodes D4, D5, and D6 are plotted. The measured values are V\({}_{\text{D4}}\) = 201 V, V\({}_{\text{D5}}\) = 75 V, and V\({}_{\text{D6}}\) = 202 V, respectively. The voltage across capacitors C1, C2, and C3 are plotted in Figure 22. The corresponding measured voltages are \(V_{C1}\) = 47 V, \(V_{C2}\) = 200 V, and \(V_{C3}\) = 125 V. \begin{table}
\begin{tabular}{c c c} \hline \hline
**Components** & **Simulated Results** & **Experimental Results** \\ \hline Output voltage (V\({}_{0}\)) & 408 V & 402 V \\ \hline The voltage across the switch (V\({}_{\text{DS}}\)) & 205 V & 201 V \\ \hline Voltage stress across diode D1 & 76-76.5 V & 75 V \\ \hline Voltage stress across diode D2 & 126 V & 123 V \\ \hline Voltage stress across diode D3 & 203.5 V & 202 V \\ \hline Voltage stress across diode D4 & 203.5 V & 201 V \\ \hline Voltage stress across diode D5 & 76.3 V & 75 V \\ \hline Voltage stress across diode D6 & 203 V & 202 V \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Comparison table of voltage stress of simulated results and experimental results. Figure 19: Experimental waveform of input voltage (\(V_{in}\)), (**1**) Duty cycle (\(V_{gs}\)) at d = 0.4, (**2**) Input Voltage (\(V_{in}\)), (**3**) Drain to Source voltage and (**4**) output voltage (\(V_{0}\)). Figure 22: The experimental waveform of **(1)** Duty cycle (\(V_{\rm gs}\)) at d = 0.4, **(2)** Capacitor (C\({}_{1}\)) voltage (\(V_{C1}\)), **(3)** Capacitor (C\({}_{2}\)) Voltage (\(V_{C2}\)), and **(4)** Capacitor (C\({}_{3}\)) Voltage (\(V_{C3}\)). Figure 20: The experimental waveform of **(1)** Duty cycle (\(V_{\rm gs}\)) at d = 0.4, **(2)** Diode (D\({}_{1}\)) voltage (V\({}_{\rm D1}\)), **(3)** Diode (D\({}_{2}\)) voltage (V\({}_{\rm D2}\)), and **(4)** Diode (D\({}_{3}\)) Voltage (V\({}_{\rm D3}\)).