# Complementary Cooperation of Dual Power Circuits to Drive Active Magnetic Bearings
## 3 Pulse Width Modulation-Tuning Processors (PWM-TPs)  
Since DC\({}^{2}\) conducts under two distinct operation modes, i.e., DDM and ADM, two pulse width modulation-tuning processors (PWM-TPs) are required to appropriately tune the output current to the AMB unit. In addition, a switch is applied to determine the timing of change between these two modes, i.e., DDM and ADM. The schematic diagram for the PWM-TPs of DC\({}^{2}\) is shown in Figure 4. \(i_{AMB}^{ref}\) is the desired current applied to the AMB coils while \(u_{AMB}^{ref}\) is the corresponding voltage command. On the other hand, \(i_{AMB}\) is the actual current at the AMB coils, and \(\hat{u}_{AMB}\) is the converted voltage with respect to the measured current by the equipped current sensor (CS) upon \(i_{AMB}\). If the error between \(u_{AMB}^{ref}\) and \(\hat{u}_{AMB}\) is significant, DC\({}^{2}\) operates under DDM so that the output current by DC\({}^{2}\), \(\hat{u}_{AMB}\), an _quickly_ catch up the desired quantity, \(u_{AMB}^{ref}\). On the contrary, once the output current gets close to the desired quantity, DC\({}^{2}\) operates under ADM to generate a relatively stable current. The design procedure of PWM-TPs is shown in Figure 5.  
The steps to determine the PI gains for DDM and ADM are described by Remark#1 and Remark#2 respectively as follows:  
**Remark 1**.: _The steps to tune the PI gains for DDM_  
1. Based on the step-wise reference shown in Section 4, the gain, \(K_{P}\), with respect to proportional action at PI controller is tuned from zero to infinity.
2. As \(K_{P}\) is tuned from zero to \(K_{P}^{*}=300\), the steady-state errors are all decreased gradually. By contrast, as \(K_{P}\) is tuned from \(K_{P}^{*}\) to infinity, the corresponding steady-state errors are all increased gradually.
3. It is concluded that \(K_{P}^{*}=300\) is the gain finally chosen.
4. Secondly, the gain, \(K_{I}\), with respect to the integral action at PI controller is tuned from zero to infinity.
5. It is observed that the steady-state errors are altered from negative values to positive values as \(K_{I}\) from zero to infinity while \(K_{P}^{*}=300\) is fixed. Therefore, \(K_{I}^{*}=1000\) is chosen since the corresponding steady-state errors are approximated to zero.  
**Remark 2**.: _The steps to tune the PI gains for ADM_  
1. Based on the step-wise reference shown in Section 4, the gain, \(K_{P}\), with respect to proportional action at PI controller is tuned from zero to infinity.
2. As \(K_{P}\) is tuned from zero to \(\hat{K}_{P}=100\), the steady-state errors are all decreased gradually. By contrast, as \(K_{P}\) is tuned from \(\hat{K}_{P}\) to infinity, the corresponding steady-state errors are all increased gradually.  
Figure 4: Schematic diagram for two PWM-TPs (pulse width modulation-tuning processors) embedded in DC\({}^{2}\) (dual cooperative drive circuit).  
* Different from the DDM, as \(\hat{K}_{P}\geq 95\), the tracking errors of output current would be more than the threshold such that ADM is cut off and then switched to DDM. In this case, we finally choose \(K_{P}^{*}=90\) to prevent any potential switch to DDM.
* Secondly, the gain, \(K_{I}\), with respect to the integral action at PI controller is tuned from zero to infinity.
* It is observed that the steady-state errors are altered from negative values to positive values as \(K_{I}\) from zero to infinity while \(K_{P}^{*}=90\) is fixed. Therefore, \(K_{I}^{*}=300\) is chosen since the corresponding steady-state errors are approximated to zero.  
Figure 5: Design procedure of PWM-TPs (pulse width modulation-tuning processors).