# Design of W-Band GaN-on-Silicon Power Amplifier Using Low Impedance Lines
## 1 Introduction  
W-band frequencies, especially higher than 90 GHz, allow for short wavelength and propagation windows for electromagnetic waves. Thus, they are well-suited for high-resolution active imaging, phased array radars, and high-data rate wireless communications [1]. For these commercial and military applications of the W-band, the solid-state high-power amplifiers are one of the key components for low-cost and lightweight wireless transceivers. Instead of the conventional Si-based transistor technologies, the advanced wide-band gap gallium-nitride (GaN) high-electron mobility transistors (HEMTs) are widely adopted in the design of W-band high-power amplifier ICs, because they present high breakdown voltage, which permits high power generation. They also exhibit a high electron saturation velocity, providing high gain at high frequency [1, 2]. Therefore, there have been extensive research on the design of high power GaN power amplifier ICs operating even up to W-band frequencies. Recently, it was reported in [3] that 6 W output power was achieved at 95 GHz using the distributed common-source GaN HEMTs. In [4], a high power density of 3.6 W/mm was obtained from 80-nm GaN HEMT at 86 GHz, with an output power of 1.15 W and power added efficiency (PAE) of 12.3%. The W-band GaN power amplifiers can accomplish high PAE as well; for example, the PAE of 21% with output power of 1.66 W at 93 GHz from 100-nm GaN HEMTs [5]. It was also found that a wideband GaN power amplifier IC covering a full W-band was presented using broadband radial stubs, providing output power of 27 dBm and PAE of 6.1% [6]. It is worthwhile to emphasize that the W-band power amplifier ICs mentioned above are based on GaN on silicon carbide (SiC) HEMT technologies [1; 2; 3; 4; 5; 6; 7], where a GaN channel is grown on the SiC substrate with a buffer layer in between [4]. They present the superior performance to GaN-on-Si HEMTs, which are grown on the Si substrate, in terms of output power, power density, and PAE at all frequency ranges [8]. The SiC substrate also exhibits lower loss and better thermal conductivity compared to the Si substrate. However, the former has some drawbacks, such as high fabrication cost and uncompatibility with other Si-based IC technologies. On the contrary, GaN-on-Si technologies can benefit from the low-cost Si substrate, and they can be easily integrated with other Si-based ICs, thus allowing a high integration and reducing the packaging complexity. Therefore, they can be low-cost solutions for the commercial application. There are several reports on GaN-on-Si power amplifier ICs at millimeter-wave frequencies: a Ka-band 8 W power amplifier in 100-nm GaN HEMT [9], a 40 GHz 12 W power amplifier with a PAE of 30% at 40 GHz (power density of 3.2 W/mm) [10], and a W-band power amplifier in 50 nm GaN HEMT producing output power of 18.3 dBm with power density of 1.35 W/mm at 94 GHz [11]. It can be concluded that the reported GaN-on-Si power amplifiers exhibit the inferior performance to GaN-on-SiC technologies at all frequencies [8]. The performance gap widens at higher frequencies like the W-band. That is, GaN-on-Si power amplifiers have been rarely reported at high frequency such as the W-band. This is because they have several problems such as the poor growth quality of GaN on Si, low thermal conductivity and high substrate loss compared to GaN-on-SiC technologies. In this work, we design a W-band power amplifier IC using a commercially available GaN-on-Si HEMT technology, achieving high performance in the output power, PAE, and power density. Load-pull simulations are carried out to locate the optimum load impedance of the transistor. In order to reduce the effect of the loss of Si substrate, low-impedance microstrip lines are adopted for the impedance matching networks. They also permit wideband impedance transformation from low input and output impedances of the wide-gate transistors. Common-source FETs are cascaded in three stages with the device size ratio of 1:1:2.