esa-sceva/satcom-chunk-collection huggingface dataset:
# Retransmission Avoidance for Reliable Data Delivery in Underwater WSNs
## 3 FLMPC: Proposed Protocols  
In this section, we first describe the network architectures of existing and proposed schemes. As network architecture of both FLMPC-One and FLMPC-Two is the same, therefore, we use term FLMPC to generalize while describing the architecture. Then, we explain propagation model of underwater acoustic signals. Later, we propose two schemes; FLMPC-One and FLMPC-Two,  
\begin{table}
\begin{tabular}{|c|c|c|c|} \hline
**Protocol Name** & **Features** & **Achievements** & **Limitations** \\ \hline GEDAR [17] & Multi-hopping & Void holes coverage & High energy consumption due to nodes movement \\ \hline HYDROCAST [18] & Multi-hopping through multiple paths & Reliable transmission and PDR & High delay and energy consumption \\ \hline SHORT [19] & Multi-hopping & High throughput and extended network lifetime & High delay \\ \hline \end{tabular}
\end{table}
Table 3: Comparison of Void Avoidance Routing Protocols.  
FLMPC-One makes routing decision using information of two hop neighbors. Whereas, FLMPC-Two forwards the data packet after making sure that the forwarder node has neighbor information up to three hops. Both schemes increase reliability of transmission and reduce the chance of data packet entrance in void hole region. Moreover, the energy consumption is reduced by generating binary tree from the node exists at the closest layer of the source node.
# Effect of Fiber Wave Structure in Printed Circuit Boards on Signal Transmission Characteristics
## 2 Materials and Methods
### Methods  
In the design of the tested multilayer board, the thicknesses of the laminate cores were 0.08 mm to 0.20 mm, and different styles of prepreg were used. The style of the fiber weaves contained prepreg 1035, prepreg 1080, prepreg 3313, prepreg 2116, and prepreg 1078.  
The graphic design for the Dk test show as Figure 1: \(X\) was the width of the fiber weave bundle, and \(x_{0}\) was the transmission line width on the circuit board. Most transmission line were designed <10 mil, significantly less than most of the sizes of the fiber weaves (see Table 1, \(X2\) and \(Y2\)). This would cause the transmission lines directly above the warp or weft fiber weave or in the middle of two fiber weaves (see Figure 1). Dk vary with the location of the transmission line. From Table 1, we can see that most spaces of the fiber weaves (the value of \((X3-X2)\) or \((Y3-Y2)\) in Table 1) <10 mil (0.4 mm), so we could design the spaces of single-ended microstrip lines to \(X+0.4\) mil to obtain the single-ended impedance across different positions of the fiber weaves.  
We also designed differential microstrip lines (the other type of impedance line, other than a single-ended line) with different spaces to discuss impedance fluctuations influenced by the fiber weave effect.  
The tested boards were produced by the following procedure: CCL (short for copper-clad laminate) cutting \(\rightarrow\) inner layer process \(\rightarrow\) Laminating \(\rightarrow\) drilling \(\rightarrow\) PTH (short for plating through hole) \(\rightarrow\) electronic plating \(\rightarrow\) back drilling \(\rightarrow\) outer layer process \(\rightarrow\) solder mask \(\rightarrow\) component mark \(\rightarrow\) surface finishing \(\rightarrow\) test.
# A Survey of of Side-Channel Attacks and Mitigation for Processor Interconnects
## 4 Interconnect Contention Side Channel
### CPU Cache Architecture
#### 4.1.2 Cache Inclusivity  
Most Intel CPU caches are inclusive, meaning data contained in L1 and L2 caches must also reside in the LLC [62]. Private caches and LLCs are set-associative, meaning they are divided into fixed numbers of cache sets, each containing a fixed number of cache ways. Each cache way can be mapped to a cache line, with the cache line size typically being 64 bytes, constituting the basic unit of cache transactions. Cache sets and the LLC slice storing each cache line are determined by their addresses. Since private caches usually have fewer sets than LLC, cache lines mapped to different LLC sets may map to the same L2 or L1 set. When a core executes a load from a memory address, it first checks if the data associated with that address is available in L1 and L2. If available, the load results in a hit in the private cache, and the data are serviced locally. If not, it results in a miss in the private cache, and the core checks if the data are available in the LLC. If there is an LLC miss, the data need to be fetched from DRAM via the memory controller. Memory controllers are integrated into system agents responsible for managing communication between the main memory and the CPU. Some Intel processors also implement hardware prefetching, which may result in additional cache lines being copied from memory or LLC to the private cache during a single load operation.
## 4 Results and Discussion
### Better Bearing Estimation and Some Questions  
Through the analysis of the relationship between the bearing estimation error and the value of the horizontal peak displacement, it can be seen that to obtain a good bearing estimation of the source, it is necessary to select an appropriate frequency band of the acoustic source. It is better to avoid some frequency bands with low horizontal displacement peaks. If the value of the horizontal peak displacement is too small, the acoustic energy entering the ice is often too small, which is unfavorable to the bearing estimation for the underwater acoustic source, and the bearing estimation error will be larger. Second, it is necessary to make good use of the Lamb waves. When the incident angle and ice thickness meet certain conditions, some modes of the Lamb waves of the ice plate will be excited, and the acoustic energy entering the ice will be increased, which is conducive to bearing estimation of the source.  
In the results of the experiments, we also found that some peak displacements are larger, but the bearing estimation errors are also slightly larger in the corresponding frequency bands. For example, at site S1, when the frequency is 200 Hz, the value of the \(x\)-direction peak displacement is greater than the threshold, but the bearing estimation error is close to 20\({}^{\circ}\), as shown in Figure 5a. In addition, during the experiments at sites S1 and S2, no obvious bimodal distribution was observed in the \(y\)-direction displacement. This may be caused by the ice being inhomogeneous or the fact that the real bearing is too small (the real bearing is \(-5^{\circ}\) at sites S1 and S2), which makes the y component of the corresponding angle relatively small; thus, the \(y\)-direction peak displacement is too small to be observed. These problems will be further explored in future research work.
## 3 Modeling and Analysis
### Simulation Results Analysis
#### 3.4.4 Analysis of Contact Surface Pressure  
Research of the contact surface pressure has always been a difficult problem in the field of ultrasonic motors. The software ADINA is especially good at contact surface non-linear analysis. The impact dynamics model can be used to extract the contact surface force of each motor subjected to the impact process, as shown in Figure 10.  
It is revealed from the Figure 10a,b that during the impact process, the contact force of TRUM-1 gradually increases from the initial 135 N to the maximum 185 N, then becomes smaller, and the final pressure is about 140 N. Contact surface force variation trend of TRUM-3 is consistent with TRUM-1, but the maximum value is 167 N. For TRUM-2 and TRUM-4, the contact surface pressure gradually decreases from the initial pre-pressure 135 N to 0 N, is maintained for a certain period of time, then continues to increase, and finally, the contact force is around 140 N. This means that in the process of impacting, there is a short period of time in which the stator and rotor contact surfaces are separated, and then the contact is resumed. The process time is extremely short, and there is relative vibration between the stator and the rotor. The duration time of TRUM-4 contact surface pressure of 0 N is shorter than that of TRUM-2 during the impact process as shown in Figure 10b-d. This phenomenon is caused by the difference in the structure of the two motors, mainly, the differences of the rotors' structure. The rotor web of TRUM-4 is thinner and more elastic than TRUM-2's. When the stator and rotor contact surfaces are instantaneously separated due to the impact force, the rotor of TRUM-4 with better elasticity can recover to contact with the stator more quickly than rotor in TRUM-2.
# A Level-Set-Based Density Method for Buckling Optimization of Structure with Curved Grid Stiffeners
###### Abstract  
Curved grid stiffeners, compared to straight stiffeners, offer greater flexibility in adjusting the force transmission paths and give better structural performance. In this paper, a level-set-based density method is employed to generate layouts of curved grid stiffeners so that the critical buckling load factor (BLF) of the stiffened structures is improved. During the optimization process, volume constraint is incorporated to control material utilization, and gradient constraints are employed to maintain uniformity in the width of the stiffeners. Finally, the proposed method is demonstrated through several numerical examples.  
structural optimization; grid stiffener; level set method; buckling load optimization
## 3 Results and Discussion
### Effect of Drainage Condition  
The essence of soil consolidation is the dissipation of excess pore water pressure. Therefore, drainage conditions have an important influence on the rate of consolidation. In this section, both of the soil surface and bottom can drain, which is dual drainage (DD). The effect of the drainage condition on skin friction and axial load of pile are shown in Figure 9a,b, respectively. When the consolidation time is relative short, the distribution of skin friction and the axial load of pile in SD condition is almost same as that in DD condition. When \(t\) = 500 d, both the skin friction and the axial load of pile in SD condition are obviously smaller than that in the DD condition due to the different degree of consolidation, as mentioned above. When \(t\) = 1000 d, the difference between them is narrowed because the degree of consolidation is getting close. It is worth noting that the maximum axial load of the pile in DD conditions is larger. It is believed that a larger pile settlement occurs in dual drainage conditions. In the case of a single drainage condition, SD, the water seeps upward, which produces an upward seepage force on the soil particles and the soil has an upward tendency to move. However, in the case of dual drainage, DD, the soil has a downward movement trend because part of the water seeps downward and the pile draft is subjected to downwards drag force. Thus, the settlement increases.  
Figure 8: Normalized maximum axial load and normalized position of neutral point versus friction coefficient.
## 2 Background
### Single-Event Upsets on SRAM-Based FPGAs  
Field-programmable gate arrays (FPGAs) are configurable integrated circuits based on high-density logic structures that can be customized by end users to implement a variety of designs. FPGA architecture is built upon customizable logic block arrangements and connections via logic blocks and programmable switches. Among these, SRAM (synchronous random-access memory)-based FPGAs are most commonly used. SRAM-based FPGAs utilize programmable switches implemented as pass transistors or multiplexers controlled according to the SRAM bit status.  
SRAM-based FPGAs consist of a configuration logic block (CLB), routing, Block RAM, digital signal processing (DSP), and a set of control and management logic. The CLB comprises a look-up table (LUT) that implements combinational logic and a flip-flop (DFF) that implements sequential elements. The routing architecture is highly complex, consisting of millions of predefined wires, allowing the construction of desired routing using multiplexers and switches.  
The configuration of all CLBs, routing, Block RAM, DSP blocks, and IO blocks is performed using a set of configuration memory bits known as the bitstream. Depending on the FPGA device's size, the bitstream can contain millions of bits. The memory bits that store the bitstream inside of the FPGA are composed of SRAM memory cells and are, therefore, reprogrammable and volatile. As shown in Figure 2, tthis bit flip can occur when a single-event effect (SEE) affects the configuration memory bits of an SRAM-based FPGA. This bit flip can alter the configuration of a routing connection or a CLB's LUT or flip-flop. Such alterations can have a detrimental impact on the designed circuit, potentially leading to changes in the circuit's function due to SEE.  
Figure 1: Radiation effects on FPGA.  
Single-event effects (SEEs) on the configuration memory bits of an SRAM-based FPGA have persistent effects and can only be modified when a new bitstream is loaded into the FPGA. The effect of SEE on combinational logic is associated with a persistent fault (either 0 or 1) in one or more constituent bits of the look-up table (LUT). This indicates that single-event upset (SEU) occurs in the LUT configuration bits and the bits controlling the routing connections. SEEs in a routing architecture can either connect or disconnect wires within a matrix. These effects are also long-lasting and may resemble changes in logic or short circuits in the combinational logic implemented by the FPGA. It may take many clock cycles to detect a persistent error and initiate a recovery operation, during which time the error may propagate to the rest of the system. Bit flips can also occur in the flip-flops in the CLB that implement the sequential logic. In this case, the bit flip has a temporary effect, and the next flip-flop load modifies it.
# Application of Sorbent-Based Extraction Techniques in Food Analysis
## 3 SPE in Food Analysis--Main Fields of Applications
### Processing Contaminants
This organic compound is present in various food matrices such as potatoes and coffee but a close relationship between its quantity and processing is observed. Acrylamide has many properties (polar molecule, hydrophilic properties, low molecular weight, low volatility) that make its analysis difficult by using regular analytical techniques. A particularly problematic case is the extraction of acrylamide with water because, at the same time, interferents are also extracted. To eliminate interferences, SPE is used as a regular sample clean-up step in the determination of acrylamide in coffee, French fries, grilled asparagus and potato chips. The majority of the sample preparation stage requires the use of two or more classic SPE. For potato samples of a strongly hydrophilic polymer, unique HLB cartridges were used; and for grilled asparagus samples, d-SPE with alumina Al\({}_{2}\)O\({}_{3}\) sorbent was suitable [73].
# Towards Flexible Distribution Systems: Future Adaptive Management Schemes
## 4 Market Schemes for Adaptive Control and Management Methods Collaborative TSO-DSO Use
### Tso-Dso Collaborative Market Scheme
However, some of the functionalities may also complement each other, i.e., be in the same direction. \begin{table}
\begin{tabular}{c c c c c} \hline \hline \multirow{2}{*}{**Stage**} & **General Market Structure** & **DER Participation on** & & **Other New Local (DSO** \\  & **Participation of DER** & **TSO Frequency Control** & & **Level) Mar-** \\  & **Active Power Resources** & **Markets** & & & **kets/Traiffs/Agreements** \\ \hline \multirow{8}{*}{1} & \multirow{4}{*}{1} & Pilots regarding local & Principles and & \multirow{4}{*}{1.3 s} & \multirow{4}{*}{1.0 s} \\  & & flexibility markets & prioritization (e.g., & & \\  & aggregated participation & location and DSO & & & \\  & of distribution & network-based, & & & \\  & network-connected DER & & & & \\  & to existing TSO level & network-connected & & & \\  & markets & flexible energy resources & & & \\  & & participation to TSO & & & \\  & & frequency control services & & & \\  & & provision through FFR, & & & \\  & & FCR-N, and FCR-D *** & & & \\  & & marketplaces & & & \\
2 & Local (e.g., microgrids) & Frequency levels 1-4 and & 1 ** & 2 ** & 3 ** & 4 \\  & flexibility and regional * & prioritized use of DSO & & & & \\  & flexibility market & network-connected DER & & & \\  & implementations & (Tables 2–4) & & & & MV and LV network local \\  & & & regional * marketplaces & & & \\
3 & & consisting of multiple & & & & \\  & local flexibility & & & & \\  & marketplaces & & & & \\ \hline \hline \end{tabular}  
* Here, regional means one TSO network area (region) in which one or more DSOs can be present. ** All frequency level/range markets are symmetric (support for under- and over-frequencies), minimum bid size could be 0.05–0.1 MW, and time to full activation is dependent on the level, type, and size of the resource (e.g., at stage 2: Level 1/0.5–5 s, Level 2/0.5–10 s, Level 3/0.5–30 s), see Figure 8. *** Currently used TSO frequency control markets in Europe/Nordic countries (FFR, FCR-N, FCR-D, AFRR, and mFRR, where FFR is fast frequency reserve, FCR-N is frequency containment reserve-disturbance, AFRR is automatic frequency restoration reserve, and mFRR is manual frequency restoration reserve).  
\end{table} 
Table 6: Collaborative (TSO-DSO) and adaptive control and management methods compatible (Tables 2–5) market schemes evolution during different stages 1–3 with special focus on frequency control markets (see Figures 3 and 8).
## 3 Converting a Pyramidal Horn Antenna into a Circularly Polarized Antenna
### Simulation and Measurement Results
#### 3.3.3 Polarization  
The polarization of the antenna under test can be determined by rotating the linearly polarized probe antenna in the E-plane.  
Figure 18 plots the magnitude of the axial ratio as a function of the rotation angle of the probe antenna (\({}^{\circ}\)) and shows that our horn-FSS antenna provides a circular polarization, as expected. The root mean square error for each structure is: 0.26 for version (a), 0.16 for version (b), 0.58 for version (c), and 0.28 for version (d). Figure 19 exhibits an axial ratio close to 1 and quasi-constant between 11 and 12 GHz for version (a), which means that the objective of changing the polarization of a conventional horn antenna by adding successive layers of frequency-selective surfaces has been achieved over the frequency range assigned to the intended applications. A full comparison between simulated and measured figures of merit is presented in Table 4.  
Figure 17: Simulated and measured gain in the main direction of radiation: versions (**a–d**).  
Figure 19: Simulated axial ratio as a function of frequency for \(\theta=0^{\circ}\) and \(\Phi=0^{\circ}\).  
Figure 18: E-plane axial ratio as a function of azimuth angle (\(\varphi\)) at 12 GHz: versions (**a–d**).
# Multi-Satellite Task Parallelism via Priority-Aware Decomposition and Dynamic Resource Mapping
## 5 Experiment Results
### Simulation Scenario and Dataset Details
The task data section decomposes each remote sensing task into several subtasks, which not only indicate the type (such as observation or compression), priority, and required resources, but also clearly define the start and end time windows of the task and the dependencies between tasks. As shown in Table 2, we can intuitively understand how the dataset comprehensively reflects the satellite orbit characteristics, resource distribution, and key parameters in task scheduling. In order to evaluate the performance of this paper under each evaluation metric, we conducted simulation experiments on 14 datasets with different numbers of satellites and numbers of missions. Table 3 shows the details of the datasets used for the experiments. \begin{table}
\begin{tabular}{l c c c c c c} \hline \hline \multirow{2}{*}{**Real Dataset**} & \multirow{2}{*}{**Task ID**} & \multicolumn{2}{c}{**Region**} & \multicolumn{2}{c}{**Discrete Time Range**} & \multicolumn{1}{c}{**Resource Type**} \\ \cline{3-8}  & & **Latitude (deg)** & **Longitude (deg)** & **Start Time (s)** & **End Time (s)** & **All** \\ \hline \multirow{8}{*}{\(D_{real}\)} & \multirow{2}{*}{T1} & 0 & \(-0.280806\) & \multirow{8}{*}{10} & \multirow{2}{*}{86,450} & \multirow{2}{*}{1,2,3} \\  & & 0 & 89.5788 & & & \\ \cline{1-1}  & & 59.8026 & 89.5788 & & & \\ \cline{1-1}  & & 59.8026 & \(-0.280806\) & & & \\ \cline{1-1} \cline{2-8}  & \multirow{2}{*}{T2} & 0 & 59.8128 & \multirow{2}{*}{10} & \multirow{2}{*}{86,450} & \multirow{2}{*}{1,2,3} \\ \cline{1-1}  & & 29.6053 & \(-0.0468\) & & & \\ \cline{1-1}  & & \(-0.592105\) & \(-30.0468\) & & & \\ \hline \hline \end{tabular}
\end{table} 
Table 1: A detailed description of remote sensing tasks. \begin{table}
\begin{tabular}{l c c} \hline \hline \multicolumn{2}{c}{**Satellite Data**} \\ \hline
**Field Name** & **Notation** & **Value Range** \\ \hline Satellite ID & \(s_{i}\) & 1–300 \\ Computation Resource & \(rb(s_{i})\) & 70–150 \\ Storage Resource & \(C_{i}\) & 300–500 MB \\ Payload Resource & \(rp(s_{i})\) & 1–3 \\ Task ID & \(m_{i}\) & 1–300 \\ Subtask ID & \(T_{ij}\) & – \\ Subtask Type & – & compression, observation \\ Priority & \(\omega_{ij}\) & 1–5 \\ Computation Requirement & \(rb(T_{ij})\) & 32–100 \\ Storage Requirement & \(D(T_{ij})\) & 173–294 \\ Payload Requirement & \(rp(T_{ij})\) & 0–3 \\ Start Time & \(E_{k}\) & 2024-09-06 T 18:29:44 Z \\ End Time & \(L_{k}\) & 2024-09-06 T 20:29:44 Z \\ Dependencies & dependencies & empty or list of Subtask IDs \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Field definitions and value ranges.
# Provably Secure ECC-Based Anonymous Authentication and Key Agreement for IoT
## 4 The Proposed Protocol  
The proposal involves three phases: initialization, registration, and authentication and key agreement. To begin, TA generates and releases parameters for the system during the initialization phase. In the registration phase, each end device \(S_{s}\) or server \(SP_{sp}\) acquires its private key and both parties' public key with the assistance of \(TA\). Ultimately, \(S_{s}\) and \(SP_{sp}\) will authenticate each other and negotiate a session key.
## 3 Materials and Methods
### Overview of PinSAGE  
PinSAGE [9] is a highly successful improved algorithm of a GCN which has been successfully applied in the industrial field. Traditional GCNs perform better when dealing with small graphs, but they are somewhat inadequate when dealing with large graphs because they require computation of the entire graph. In order to use the GCN method in recommendation systems involving billions of nodes/items, the PinSAGE algorithm was designed. PinSAGE is closely related to GraphSAGE. In terms of implementation details, the two algorithms are quite similar, but there are also some differences. In the sampling stage, GraphSAGE uses uniform and unbiased sampling, while PinSAGE uses importance sampling and records the number of visits to the sampled nodes as edges' weight during sampling. In the aggregation stage, the upper-level features are aggregated after passing through the fully connected layer, taking into account the weight of the edges during the aggregation process. That is, edges with higher weights propagate more information. In addition, the paper [9] also proposes some new training techniques to improve performance. These features enable PinSAGE to have faster training speed, lower resource consumption, and better performance on large graphs compared to prior GCN methods.