# An Interleaved DC/DC Converter with Soft-switching Characteristic and high Step-up Ratio
## 2 Proposed Circuit Configuration and Operation Analysis
### Circuit Analysis  
In order to simplify the circuit analysis, some assumptions are made as follows. * The semiconductor devices are ideal in spite of considering the intrinsic diode and the parasitic capacitance of the MOSFETs. * The leakage inductances are equal (\(L_{1}=L_{2}=L_{l}\)). The mutual inductance \(L_{M}\) is large enough and the magnetic exciting current \(i_{LM}\) is constant. * The output capacitance \(C_{o}\) is large enough. Hence, the output voltage \(V_{o}\) is regarded as constant. According the conducting status of the semiconductor devices, there are eigth operation modes in one high-frequency cycle at steady-state operation. Figure 4 shows the current loops for each operation mode and Figure 5 illustrates the conceptual voltage and current waveforms of the main components. Figure 4: Operation modes. A. Mode I (\(t_{0}<t<t_{1}\))  
Before the beginning of Mode I, both active switches \(S_{1}\) and \(S_{2}\) are on. There are two current loops. One is \(i_{L1}\) flows through \(S_{1}\). The other is \(i_{L2}\) flows through \(S_{2}\). Since \(S_{2}\) is turned on before \(S_{1}\), most of the magnetic exciting \(i_{LM}\) are supplied by \(i_{L2}\). Mode I starts at the instant when \(v_{GS2}\) drops to zero volts to turn off \(S_{2}\). The equivalent circuit is shown in Figure 4a. The current in the secondary winding \(i_{L2}\) diverts from \(S_{2}\) to flow into its parasitic capacitance \(C_{DS2}\). Since the parasitic capacitance is generally very small, it takes a very short time for the voltage across \(C_{DS2}\) being charged to equal the output voltage \(V_{o}\). Thereafter, \(i_{L2}\) diverts from  
Figure 5: Conceptual waveforms. \(C_{DS2}\) to flow through \(D_{2}\) and the output capacitance \(C_{o}\). During this period, \(C_{o}\) is charged. The voltage equations of the two converters are as follows. \[V_{in}=v_{L1}+v_{T}, \tag{5}\]  
\[V_{in}=v_{L2}+v_{T}+v_{DS2}=v_{L2}+v_{T}+V_{o}, \tag{6}\]  
where \(v_{L1}\) and \(v_{L2}\) represent the voltages across the leakage inductances \(L_{1}\) and \(L_{2}\), respectively. Adding Equations (5) and (6) gives  
\[2V_{in}=(v_{L1}+v_{L2})+2v_{T}+V_{o}, \tag{7}\]  
From Equation (3), the following equation is obtained. \[v_{L1}+v_{L2}=\frac{L_{l}di_{L1}}{dt}+\frac{L_{l}di_{L2}}{dt}=\frac{L_{l}di_{ LM}}{dt}, \tag{8}\]  
The voltage across the mutual inductance can be obtained by substituting Equations (4) and (8) into Equation (7). \[v_{T}=\frac{L_{M}}{L_{l}+2L_{M}}(2V_{in}-V_{o}), \tag{9}\]  
By designing \(V_{o}\) to be higher than two times of \(V_{in},v_{T}\) would be negative and \(i_{LM}\) would decrease linearly in this mode. The voltages across the leakage inductances can be expressed as Equations (10) and (11) by substituting Equation (9) into Equations (5) and (6), respectively. \[v_{L1}=\frac{L_{l}V_{in}}{L_{l}+2L_{M}}+\frac{L_{M}V_{o}}{L_{l}+2L_{M}}, \tag{10}\]  
\[v_{L2}=\frac{L_{l}V_{in}}{L_{l}+2L_{M}}-\frac{(L_{l}+L_{M})V_{o}}{L_{l}+2L_{M}}, \tag{11}\]  
From Equations (10) and (11), \(v_{L1}\) is positive and \(v_{L2}\) is negative since \(L_{m}\) is much larger than \(L_{l}\). Hence, \(i_{L1}\) rises and \(i_{L2}\) decreases linearly. It means that the magnetic exciting current diverts form the secondary winding to the primary winding. As soon as \(i_{L2}\) decreases to zero, \(D_{2}\) turns off and the circuit operation enters Mode II. B. Mode II (\(t_{1}<t<t_{2}\))  
This mode describes the short transient for the \(C_{DS2}\) discharging from \(V_{o}\) to \(-0.7\) V. The equivalent circuit is shown in Figure 4b. During this mode, the voltage across \(L_{2}\) can be expressed as  
\[v_{L2}=V_{in}-v_{T}-v_{DS2}, \tag{12}\]  
The voltage \(v_{L2}\) is negative and \(i_{L2}\) continuously decreases from zero. In other words, \(i_{L2}\) changes polarity and becomes negative. The current loop of \(i_{L2}\) is \(C_{DS2}\), the secondary winding, \(V_{in}\).