## 3 Circuit Implementation
### On-Chip Transformer Matching Circuit  
The input, interstage, and output matching in this design are accomplished through the utilization of transformers and capacitors. The incorporation of transformers offers several significant advantages. Firstly, transformers inherently provide isolation between the primary and secondary DC paths. Secondly, they exhibit excellent impedance transformation characteristics, thereby enhancing the flexibility of the design. Thirdly, transformers possess wide bandwidth capabilities. Lastly, transformers can be employed as baluns, enabling conversion between single-ended and differential signals. The Z-parameter matrix of a practical transformer can be represented as follows (The orientation of primary current and secondary current is consistent with Figure 13):  
\[Z= \begin{bmatrix}R_{1}+j\omega L_{1}&-j\omega M\\ j\omega M&-(R_{2}+j\omega L_{2})\end{bmatrix} M=k\sqrt{L_{1}L_{2}}\]  
Figure 11: Simulated NMOS capacitance, PMOS capacitance, and total capacitance. Figure 12: Simulated comparison of the IMD3 according to the output power with/without PMOS. where k represents the coupling coefficient between the primary and secondary coils in the transformer. When the secondary coil is connected to the load, the equivalent circuit diagram can be represented as follows:  
Consequently, the load resulting from the conversion after the primary coil can be obtained as follows:  
\[Z_{in}=\left\{R_{1}+\frac{(\omega M)^{2}(R_{2}+R_{L})}{\left(R_{2}+R_{L}\right) ^{2}+\left(\omega L_{2}+X_{L}\right)^{2}}\right\}+j\Bigg{\{}\omega L_{1}-\frac {(\omega M)^{2}(\omega L_{2}+X_{L})}{\left(R_{2}+R_{L}\right)^{2}+\left(\omega L _{2}+X_{L}\right)^{2}}\Bigg{\}}\]  
\[Z_{load}=R_{L}+jX_{L},\]  
\[\text{M}=\text{k}\sqrt{L_{1}L_{2}}\]  
where k represents the coupling coefficient between the primary and secondary coils in the transformer. By selecting different values for the inductance and the coupling coefficient (k), it is possible to achieve various impedance transformations, thereby providing a significantly high degree of design flexibility. However, part of the reason why integrating a power amplifier is challenging is due to the low-Q of the on-chip transformer or inductor, which has a significant impact on the overall linearity and efficiency of the PA. To address this issue, this design adopts the following techniques for on-chip transformer design: First, both the primary and secondary coils are made of the top metal layer, which has the lowest sheet resistance and highest current capacity. Second, a poly shielding is used underneath the coils to reduce the impact of the substrate. Third, to prevent induced currents in the substrate due to electromagnetic fields, a low doping concentration substrate is used beneath the transformer coils. Finally, this work superimposes the AL RDL layer on the primary coil, which slightly increases the Q value of the primary coil. Figure 14 shows the layout of the output transformer and Table 2 shows EM-simulated transformer parameters. \begin{table}
\begin{tabular}{c c c c} \hline
**Lp** & **526.69 pH** & **Ls** & **1.68 nH** \\ \hline Qp & 10.96 & Qs & 15.22 \\ k & 0.726 & & \\ SRF & \textgreater{}10 G & & \\ \end{tabular}
\end{table} 
Table 2: Simulated transformer parameters. Figure 13: Transformer equivalent circuit. enhancing the IMD3's performance, particularly under conditions of high signal output power. Similarly, reference [41] utilized a dynamic bias control circuit to regulate the common-gate bias voltage at different power levels, thus achieving linearity optimization of the circuit. This research demonstrates that integrated bias circuits can be effectively employed to optimize the overall linearity of the circuit. The integrated bias circuit utilized in this design is depicted in the figure below (Figure 11). Figure 16a shows the common-source bias circuit, which employs a specific circuit structure for generating the desired voltage.