## 3 Designs
A 20-bit digital delta-sigma (\(\Delta\)\(\sum\)) modulator is employed for the fractional-N frequency generation. Details of this PLL can be found in the author's prior work [26]. The voltage controlled oscillator (VCO) covers 1.4-1.8 GHz, which is 4\(\times\) higher than the MedRadio RF band of 401-406 MHz. The automatic frequency calibration (AFC) searches for an optimal sub-band out of the 32 sub-bands through 5-bit switched capacitor bank of the VCO. The divide-by-4 LO generator circuit after the VCO buffer generates I/Q LO signals with 25% duty cycle for driving the mixer FETs. The 25% duty-cycle LO signal improves the conversion gain and noise figure performances of the quadrature mixer [17]. Figure 5 shows the detailed circuit schematic of the RF front end. The LNA is based on the single-ended cascode structure with M\({}_{1,2}\) (gate width = 128 \(\upmu\)m, gate length = 60 nm) and a resistive load R\({}_{\text{D}}\) (408 \(\Omega\)), dissipating 520 \(\upmu\)A. The source degeneration inductor L\({}_{\text{s}}\) of 9 nH and the additional gate-to-source capacitor C\({}_{\text{gsx}}\) of 0.74 pF are used for simultaneous noise and power matching. The input impedance matching is achieved only by a single off-chip inductor L\({}_{\text{ext}}\) (132 nH). The G\({}_{\text{m}}\) stage with M\({}_{4,5}\) (gate width = 5.6 \(\upmu\)m, gate length = 60 nm) and M\({}_{6,7}\) (gate width = 16 \(\upmu\)m, gate length = 60 nm) performs a single-to-differential conversion for interfacing between the single-ended LNA and differential mixer. It also prevents a severe degradation of the LNA performance that can be otherwise caused by the low input impedance of the passive mixer. The passive mixer with M\({}_{11,14}\) (gate width = 14 \(\upmu\)m, gate length = 60 nm) is adopted for the benefits of the low power dissipation and low 1/f noise. The differential I/Q LO signals LOI\({}_{\text{p,m}}\) and LOQ\({}_{\text{p,m}}\) are fed to the mixer via ac-coupling capacitors C\({}_{\text{b}}\) (10 pF). Figure 4: Complex biquad. (**a**) Block diagram, (**b**) transfer characteristics, (**c**) operational amplifier schematic. The TIA comprises an operational amplifier A\({}_{1}\) and feedback components R\({}_{1}\) and C\({}_{1}\). The R\({}_{1}\) and C\({}_{1}\) are designed in a switched value structure for achieving the bandwidth tunability between 3.4 and 9.5 MHz. R\({}_{1}\) is switchable among 2, 8, 9, and 10 k\(\Omega\), and C\({}_{1}\) is switchable between 0 and 3.5 pF with 0.5 step. The A\({}_{1}\) is a fully differential two-stage structure with its gain bandwidth product of 21.6 MHz. The total gain of the RF front end is +42.2 dB. The IM2 calibration at the mixer is designed to minimize the IM2 distortion. It is generally known that the IM2 distortion created by FET non-linearities is manifested by the differential mismatches in FETs, dc bias voltages, passive impedances, and layout routings. Thus, the differential mismatches need be minimized to suppress the IM2 distortion at the receiver output. In this design, as proposed in [27; 28], the dc gate bias voltages V\({}_{\text{gp}}\) and V\({}_{\text{gm}}\) for the switch FET's M\({}_{\text{11-14}}\) are controlled by employing a 6-bit R-2R digital-to-analog converter (DAC). The DAC needs to have a fine-tuning resolution for precise IM2 calibration, but a higher number of total bits will make the calibration process slow. Thus, in order to overcome the two conflicting requirements of the fine resolution and lower number of control bits, we set the full scale of the DAC to a significantly reduced value of only 50 mV, while its common-model level is tunable for a wider range between 0.5 and 0.9 V by using another 3-bit DAC. As a result, the gate bias tuning resolution is as fine as 0.78 mV. In this work, the IM2 calibration is done manually by monitoring the IM2 level with respect to the mixer gate bias voltages. In a practical mass-production stage, this IM2 calibration can be done more efficiently by using automatic test equipment (ATE).