## 1 Introduction  
AC-DC power converters are widely used in industry, communication, medical treatment, and consumer electronics. When their power exceeds 75 W, power factor correction (PFC) is necessary in power electronic equipment; otherwise, the equipment will inject harmonic current into the power grid and degrade the power quality [1]. Boost PFC is the most widely used converter because of its small current pulsation and simple control [2; 3; 4]. However, the large conduction loss of the rectifier bridge in boosting PFC severely degrades power efficiency and induces serious electromagnetic interference (EMI) [5; 6; 7]. To solve these issues, extensive research has been carried out to explore PFC converter topologies [8; 9; 10]. Among various topologies, totem-pole bridgeless PFC is attractive owing to its advantages of high device utilization and low conduction loss [11; 12; 13]. To further improve power efficiency, SiC MOSFET currently tends to replace Si MOSFET in power converters [14; 15; 16]. However, these improvements bring new challenges to PFC converters and their control strategy. Traditional average current mode (ACM) control is widely used in high-power applications owing to its advantages of fixed switching frequency and insensitivity to the inductor current sampling noise [17; 18]. However, due to the limited current loop bandwidths under continuous conduction mode (CCM) and the influence of input filter capacitors, the input current and voltage have a non-neglectable phase difference, resulting in current distortion and efficiency degradation [19; 20]. Additionally, with the phase difference, the PFC converter will operate in discontinuous conduction mode (DCM) near the input voltage zero-crossing point [21]. In this situation, the transfer function of the PFC converter would be different from that of the CCM, which further degrades the current-tracking ability. Moreover, the sampled input voltage is directly used to generate reference current. Thus, input voltage sampling noise and delay directly affect the performance of the current loop [22]. As the load decreases, the PFC converter current decreases and the current distortion becomes more serious [23]. To improve the current loop performance of power converters, feedforward compensation was used [24]. The sampled input voltage is directly used to generate the feedforward term, which induces the sampling noise to input current and degrades the power factor of the PFC converter. To reduce the feedforward interference caused by input voltage sampling noise, the input voltage is reconstructed by detecting its zero-crossing point and storing sinusoidal table in a DSP controller [25]. However, the output of the zero-crossing detection circuit contains multiple high-frequency pulses due to sampling noise, which is even worse under high output power. A voltage-senseless feedforward method is proposed, which calculates the feedforward duty cycle based on the input current [26]. But, it requires a voltage estimator to calculate the input voltage phase, which induces error in the estimation result during mode change and causes incorrect gate driving signals. Conventional feedforward methods cannot solve the problem caused by input voltage sampling noise and do not provide an in-depth theoretical analysis. Moreover, there are few studies in the literature examining the current distortion caused by input filter capacitors. To solve the above issues, this paper proposes virtual admittance feedforward compensation (VAFC) and reference current phase correction for totem-pole PFC converters. With in-depth modeling for current and voltage loops, it was found that the limited current loop bandwidth and input filter capacitor cause a phase difference between input current and voltage. It leads to the presence of a susceptance component in the input admittance. Furthermore, VAFC and reference current phase correction are proposed to adjust the input admittance to pure conductance.