# Linked Coupling Faults Detection by Multirun March Tests
## 1 Introduction  
Memory devices occupy a dominant place among the hardware components of modern computer systems. Demand for high-speed, highly integrated, low-power memory is growing unprecedentedly because cloud computing, artificial intelligence, and fifth-generation (5G) communications, among others, are positioned as the main directions of the fourth Industrial Revolution. To ensure the characteristics of modern memory of computer systems that meet the requirements of new technological advances, the necessity and importance of testing memory devices have increased sufficiently [1; 2]. The main task of memory testing is to detect faulty states described by various models of their failures [3; 4; 5]. Among the large variety of memory faults, coupling faults, _CFs_, involve two memory cells, \(a_{i}\) and \(a_{j}\). The types of such faults are discussed below [3; 6; 7; 8; 9]. First, in an inverse coupling fault, _CFin_, two cells, \(a_{i}\) and \(a_{j}\), with addresses \(i\
eq j\) participate in the model \(CFin(a_{i},a_{j})\) in the fault; here, one cell \(a_{i}\) influences the second \(a_{j}\) and is called the aggressor (\(A\)), and the second \(a_{j}\), which is affected, is the victim (\(V\)). In this fault, a logical transition from 1 to 0 (\(\downarrow\)) or from 0 to 1 (\(\uparrow\)) in the aggressor \(a_{i}\) leads to inverting \(\updownarrow\) the logical value in the victim cell \(a_{j}\), which is described by two models of inverse faults \(CFin(a_{i},a_{j})\): \(<\uparrow,\updownarrow>\) and \(<\downarrow,\updownarrow>\)[3]. To represent the relation of address \(i\) of the aggressor and \(j\) of the victim, in the memory address space, the symbols \(\wedge\) and \(\vee\) are used, which define four inverse faults \(CFin(a_{i},a_{j})=\{\wedge<\uparrow,\updownarrow>,\wedge<\downarrow,\updownarrow>, \vee<\uparrow,\updownarrow>,\vee<\downarrow,\updownarrow>,\vee<\downarrow,\updownarrow>\}\). According to the classical definitions, the symbol \(\wedge\) indicates that the address of the aggressor is less than the address of the victim \(i<j\). In contrast, for the symbol \(\vee\), it is greater, \(i>j\). One-run march tests implement sequential access to memory cells by enumerating all addresses in an increasing or decreasing sequence. Therefore, the relation\(i<j\) compares the values of the cells \(a_{i}\) and \(a_{j}\) addresses and the time of accessing them. When implementing an element of a march test with an increasing sequence of addresses (\(\Uparrow\)) and the relation of addresses is \(i<j\), the address for cell \(a_{i}\) is generated initially, and only after some time is the address of cell \(a_{j}\) generated. Second, in an idempotent coupling fault, \(C\)_Fid_, during a logical transition from 1 to 0 or from 0 to 1 in the aggressor cell \(a_{i}\), a certain logical value 0 or 1 is forced to be set in the victim cell \(a_{j}\)[3]. Eight faults of direct action are recognized: \(C\)_Fid_(\(a_{i}\), \(a_{j}\)) = {\(\wedge\)\(<\)!,0\(>\), \(\wedge\)\(<\)!,1\(>\), \(\vee\)\(<\)!,0\(>\), \(\vee\)\(<\)!,1\(>\), \(\wedge\)\(<\)!,0\(>\), \(\wedge\)\(<\)!,1\(>\), \(\vee\)\(<\)!,0\(>\), \(\vee\)\(<\)!,1\(>\)} [3]. Third, in a static, \(C\)_Fst_, the transition of a victim cell to any state \(a_{j}\) {0,1} occurs at a certain value \(a_{i}\) {0,1} of the aggressor cell. Eight faults are possible: \(C\)_Fst_(\(a_{i}\), \(a_{j}\)) = {\(\wedge\)!,0,0\(>\), \(\wedge\)!,0,1,>, \(\vee\)!,0\(>\), \(\vee\)!,0,1\(>\), \(\wedge\)!,1\(>\), \(\wedge\)!,1\(>\), \(\vee\)!,0\(>\), \(\vee\)!,1,1\(>\)} [3]. There are single coupling faults, which can be any of the above fault models, and multiple coupling faults, consisting of a subset of single coupling faults [3]. In the set of multiple faults, unlinked multiple coupling faults are distinguished. Thus, a particular memory cell is involved in only one coupling fault included in the considered multiple faults. In general, \(n\) unlinked coupling faults involve an even number \(r=2n\) of memory cells, half of which are aggressors and half are victims.