## 2 Layout Issues of Low-Power LC-Based DCO  
### Determine Location of \(\mathrm{g_{m}}\) Cell  
In terms of phase noise performance, the voltage swing of the LC tank can be described as tank energy. A low noise-to-carrier ratio (NCR) describes the relationship with tank energy as:  
\[\frac{\left(V_{n}^{2}\right)}{\left(V_{tank}^{2}\right)}=\frac{1}{E_{tank}} \tag{1}\]  
where \(V_{n}\) is the noise voltage, \(V_{tank}\) is the voltage swing level, and \(E_{tank}\) is the energy of the LC tank. As shown in Equation (1), as \(E_{tank}\) increases, \(V_{n}\), the noise factor, should be reduced. The phase noise at the offset frequency is:  
\[L\Big{\{}F_{offset}\Big{\}}=\frac{g_{L}^{2}}{I_{bias}} \tag{2}\]  
where \(F_{offset}\) is the offset frequency of the oscillation frequency and \(g_{L}\) is a loss of the inductor. To reduce the phase noise and power consumption, \(g_{L}\) should reduce the loss of the inductor, as shown in Equation (2). The inductor in the LC tank, which affects the phase noise and output signal power, was designed with various types of inductor for high-Q design [6; 7]. A high-Q inductor using the embedded wafer level ball grid array (eWLB) package inductor was implemented due to its excellent phase noise and higher voltage swing, but its power consumption was large [6]. Conversely, the 3D helical inductor was smaller and low-power, but did not have excellent phase noise with a low Q-value [7]. The design of the inductor was critical, but the layout with a small coupling capacitor and a small metal resistance increased the area of the inductor because it was designed with a wide metal layer and little mutual coupling between metals. However, chips in low-cost applications have limitations on chip size, making it impossible to use a relatively large inductor. Therefore, an optimal-sized inductor must be designed that includes appropriate losses, and a large \(\mathrm{g_{m}}\) cell structure must be selected that can compensate for the losses. Here, the capacitor in the LC tank had a high Q and could be neglected. In LC-based oscillator design, as shown in Figure 1, Complementary metal-oxide-semiconductor (CMOS) architectures are conventionally employed for low power consumption because they can have double the \(\mathrm{g_{m}}\) compared with other architectures, such as N type MOSFET (NMOS)- and P type MOSFET (PMOS)-type \(\mathrm{g_{m}}\)-cell architecture. Fabricated DCOs also adopt a complementary architecture for low power consumption and use bonding-wire degeneration inductors (Ls) to reduce chip area instead of using spiral tail inductors. The left side of Figure 1 shows a schematic of a DCO with three capacitor banks, i.e., the most significant bit (MSB) bank, the least significant bit (LSB) bank, and the fine bank. The largest switched capacitor is located near the main inductor for linear frequency change and chip area efficiency. In the layout of the DCO on the right side of Figure 1, the NMOS- and PMOS-type \(\mathrm{g_{m}}\) cells can be placed in either the tail of the capacitor bank or the neck of the inductor. The DCO located at the tail of the capacitor bank is the tail-DCO (TDCO) and the DCO located at the neck of the inductor is the neck-DCO (NDCO). The LC resonant circuit is the key circuit that determines the oscillation frequency of the DCO, and consists of a main inductor and a bank of capacitors for frequency selection. The maximum frequency of the DCO is oscillated under the condition that all switches in the capacitor bank are turned off, and the minimum frequency is oscillated under the condition that all switches in the capacitor bank are turned on. Figure 2a shows the TDCO with the g\({}_{\text{m}}\)-cell circuit after the main inductor and capacitor banks. This creates an additional parasitic inductance between the main inductor and capacitor banks in the designed LC resonant circuit. As shown in Figure 2a, the maximum frequency shifts to a lower oscillation frequency under the condition that all switches are turned off by the added parasitic inductance.