## 3 Proposed Multi-Modulus Multiplier Based on Radix-8 Booth Encoding
### Proposed Radix-8 Multi-Modulus Multiplier  
In this subsection, the proposed radix-8 multi-modulus multiplier is discussed. Let \(X\) be the multiplicand and \(Y\) the multiplier. The modulo \(m\) of \(X\times Y\) is expressed as \(\left|X\times Y\right|_{m}\). Using the representation of radix-8, \(Y\) can be expressed as \(Y=2^{3i}(y_{3i-1}+y_{3i}+2y_{3i+1}-4y_{3i+2})\), and the modulo \(m\) of \(X\times Y\) can be expressed as:  
\[\left|X\times Y\right|_{m}=\left|X\times 2^{3i}(y_{3i-1}+y_{3i}+2y_{3i+1}-4y_{3i+2 }\right|_{m} \tag{26}\]  
Figure 9: For \(i>0  
The truth table of the four-codes interpretation based on radix-8 is presented in Table 1[20]. The multiplication by 1 (\(\times\)1), multiplication by 2 (\(\times\)2), multiplication by 3 (\(\times\)3), multiplication by 4 (\(\times\)4), and sign signal are obtained from the BE circuit, which is shown in Figure 10[20]. The BS is designed as shown in Figure 11a based on the corresponding signals from the BE. In order to reduce the gate count of the BS in the (\(\lfloor n/3\rfloor+1\))th row, when \(n=6k+4\) and \(n=6k\), where \(k\) is a positive integer, the BE of the {\(\lfloor n/3\rfloor+1\)}th row is [\(Y_{3i-1}\ Y_{3i-2}\ 0\ 0\)] and [\(Y_{3i-1}\ 0\ 0\ 0\)], the BS can be redesigned as shown in Figure 11b,c, respectively. The hardware area can be effectively reduced as shown in Figure 11b,c. In the BS block, the input signal is multiplication by 1 (\(\times\)1), multiplication by 2 (\(\times\)2), multiplication by 3 (\(\times\)3), multiplication by 4 (\(\times\)4), and the sign bit (s). Multiplication by 2 (\(\times\)2) and multiplication by 4 (\(\times\)4) shift one bit and two bits of the original signal to the left, respectively. Multiplication by 3 (\(\times\)3) is produced from the proposed multi-modulus HMG structure. The sign bit is used to produce the positive or negative multiple. The output of the BS block is the partial product (\(pp\)). The end-around-carry is operated based on modulo {\(2^{n}-1\), \(2^{n}\), \(2^{n}+1\)} = {\(x_{-1}\), 0, \(\overline{x_{-1}}\)} regulation. SM2 (S1, S0), as depicted in Figure 4, is used to select the modulo multiplier, which is (S1, S0) = {00, 01, 10} = modulo {\(2^{n}-1\), \(2^{n}\), \(2^{n}+1\)} = {\(pp\), 0, \(\overline{pp}\)}. A weighted representation of the system structure is adopted for the proposed modulo (\(2^{n}-1\)), modulo (\(2^{n}\)), and modulo (\(2^{n}+1\)) multipliers. \begin{table}
\begin{tabular}{c c c} \hline  & \(\boldsymbol{Y_{3i+2}\ Y_{3i+1}\ Y_{3i}\ Y_{3i-1}}\) & **Operation** \\ \hline
0000 & 1111 & 0 \\ \hline
0001 & 0010 & \(\times\)(+1) \\ \hline
0011 & 0100 & \(\times\)(+2) \\ \hline
0101 & 0110 & \(\times\)(+3) \\ \hline  & 0111 & \(\times\)(+4) \\ \hline  & 1000 & \(\times\)(\(-4\)) \\ \hline
1001 & 1010 & \(\times\)(\(-3\)) \\ \hline
1011 & 1100 & \(\times\)(\(-2\)) \\ \hline
1101 & 1110 & \(\times\)(\(-1\)) \\ \hline \end{tabular}
\end{table} 
Table 1: Truth table for the proposed radix-8 Booth encoder [20]. Figure 10: The Booth encoder of the radix-8 Booth-encoding-based architecture [20]. For the modulo \((2^{n}+1)\) multiplier, the compensation value is used to compensate for the general output of the partial product. The compensation circuit that produces the compensation value of C1 and C2 in the proposed approach is discussed below. From Equation (3), the compensation for circuit \(K_{i}\) can be rewritten as follows and divided into two parts, denoted as \(C_{1}^{\prime}\)(the first two rows of the equation) and \(C_{2}^{\prime}\):  
\[ \begin{split}\sum\limits_{i=0}^{\lfloor n/3\rfloor}K_{i}=& \{\underbrace{\sum\limits_{i=0}^{\lfloor n/3\rfloor}2^{3i}(\overline{m2_{i }+m4_{i}})+(\overline{m3_{i}+m4_{i}})\cdot 2^{3i+1}}_{C_{1}^{\prime}}\\ &\underbrace{+\sum\limits_{i=0}^{\lfloor n/3\rfloor}s_{i}(m2_{i }+m4_{i})2^{3i+1}+s_{i}(m3_{i}+m4_{i})\cdot 2^{3i+2}}_{(C_{1}^{\prime})} \}\\ &+\{\underbrace{\sum\limits_{i=0}^{\lfloor n/3\rfloor}2^{3i+1} \cdot s_{i}+\sum\limits_{i=0}^{n/3}-2^{3i}-2^{3i+1}-2^{3i}+1}_{C_{2}^{\prime}} \}\end{split}