## 5 Parasitic Effects and Compensation Techniques  
A typical MEMS resonator that is fabricated on SOI substrate has parasitic effects that limit the performance (e.g., the port-to-port isolation) of a capacitive or piezoelectric micromechanical resonator. The imperfect ground shielding provided by the SOI wafer's silicon handle layer contributes to a capacitive feedthrough signal between the drive and sense electrodes, which increases the port-to-port feedthrough noise floor to such an extent  
Figure 4: (**a**) Top-view microscope image of the fabricated hybrid resonator after etching the ZnO piezoelectric transducer and silicon device layer to define the disk resonator body, (**b**) Zoomed-in view of the device showing piezoelectric and capacitive transducers. (**c**) Further zoomed-in view photo showing the resonator body with piezoelectric and capacitive electrodes, and the capacitive air gap between the resonator body and the capacitive electrode. that the resonance peaks of the resonator device layer are often strongly distorted by the parasitic feedthrough noise floor. These parasitic effects demand special compensation. Figure 5 illustrates the feedthrough signal paths for both capacitive and piezoelectric resonators. The air gap in the capacitive resonator limits the RF signal path of the feedthrough signal to traveling primarily through the SOI substrate under each device. Since the capacitive air gap provides superior signal isolation than that of piezoelectric thin film with higher capacitive coupling between piezoelectric electrodes, the overall parasitic feedthrough signal is considerably lower for resonators equipped with capacitive air-gap transducers, since the RF feedthrough signal predominantly travels between the actuation and sensing electrodes through the SOI wafer handle layer (i.e., the silicon layer underneath the buried oxide layer). Conversely, piezoelectric resonators heavily rely on the two closely positioned input and output electrodes that sit next to each other on top of the piezoelectric transducer thin film for actuation. Thus, the RF feedthrough signal can travel through the SOI substrate and the piezoelectric transducer layer. Additionally, Figure 6 presents the equivalent circuit models within an SOI wafer for both capacitively and piezoelectrically transduced resonators, while depicting inductance-capacitance-resistance (LCR) circuit components in the form of Butterworth-Van Dyke (BVD) model for the resonator as well as the key parasitic elements between electrodes and through the substrate. The hybrid MEMS resonator design herein significantly mitigates parasitic effects by leveraging the distinct advantages of both capacitive and piezoelectric transduction mechanisms. The design strategically integrates these mechanisms to reduce both parasitic  
Figure 5: Conceptual illustration of the primary feedthrough signal paths with different strengths for (**a**) a capacitively transduced resonator, and (**b**) a piezoelectrically transduced resonator. Figure 6: Cross-sectional schematic of a resonator device fabricated in an SOI wafer depicting the LCR circuit components, showing the key parasitits between electrodes and through the substrate, for (**a**) a capacitively transduced resonator, and (**b**) a piezoelectrically transduced resonator. capacitance and acoustic modal coupling, which are prevalent in standalone systems. By physically isolating the capacitive and piezoelectric transducers, inserting an interlayer ground plane as the bottom electrode of the piezoelectric transducer, and optimizing the capacitive and piezoelectric electrode placements, the hybrid resonator design mitigates the direct electrical feedthrough paths that often lead to unwanted capacitive coupling. This isolation is enhanced by employing advanced materials and fabrication techniques that inherently limit electrical crosstalk and mechanical acoustic modal interference.