# Robust Symbol Timing Synchronization for Initial Access under LEO Satellite Channel
## 3 Robust Symbol Timing Synchronization
### The Proposed Structure
Fine-timing estimation to find the expected maximum position located in the transparent blue stick from Figure 7 as the second step, can be expressed in  
\[\hat{\tau}=\frac{F_{n-1}-F_{n+1}}{2F_{n}-F_{n-1}-F_{n+1}}, \tag{6}\]  
where \(F_{n-1}=FFT\{\Lambda(\tau_{n-1})\}\), \(F_{n}=FFT\{\Lambda(\tau_{n})\}\) and \(F_{n+1}=FFT\{\Lambda(\tau_{n+1})\}\). After the fine-timing estimator works, the sampling epoch can be adjusted by the parabolic interpolator in the time domain. As aforementioned, its complexity issue can be raised. However, it can improve the estimation range and accuracy together under a large Doppler offset even though the transmission packet size is short. As shown in Figure 6, the operational flow is as follows. The received sample signal is fed into the  
Figure 6: The proposed coarse and fine symbol timing estimator process for the initial access network. Figure 7: Magnitude of \(FFT\) output in discrete time and frequency grid. Rx sample buffer, and it is multiplied by complex conjugated preamble and postamble symbols on a multiple oversampling rate basis. Some partial correlation sum in complex components during the subcorrelation window should be a complex signal vector, and _FFT_ computation is performed after zero padding according to the predetermined _FFT_ size. After _FFT_ computation, signal power is calculated with a complex vector, \(I+jQ\), in the frequency domain. The outcome can be quite reliable because it is measured in a frequency domain that is not vulnerable to the CFO. Moreover, _FFT_ computation is simplified because most of the samples in the time domain are filled with zero. After coarse STR by burst detector, the process is operated to find a peak of signal power during a limited timing offset interval in the frequency domain. The discretized peak value can be found through threshold crossing like Figure 6 or MAX strategy (i.e., find maximum value in a given duration), and the timing offset estimate \(\hat{\tau}\) is refined by interpolating more accurate peak position (\(n+\hat{\tau}\)) through fractional oversampling time positions (\(n-1,n,n+1\)) indexed from the maximum correlation peak and its adjacent peak value, as in Figure 6. At first glance, the _FFT_-based algorithm looks challenging in terms of H/W implementation because the processing latency of _FFT_ computation is quite large. Therefore, it can have time constraints in Field Programmable Gate Array (FPGA) due to consecutive operation during a limited range by residual timing offset after coarse STR. However, since its processing interval is not significantly large, it can be solved through the appropriate pipeline design to relax timing constraints. The DVB-RCS2 standard operates in Frequency Division Duplexing (FDD) mode, similar to conventional satellite communication. However, if the proposed scheme is required to operate in Time Division Duplexing (TDD) mode, as in terrestrial networks, it is essential to consider that the complexity may increase due to the need for parallelization of operations. This parallelization is necessitated by the processing time constraints imposed by the demodulator.