## 4 Results  
The TWTA has been used with \(\alpha_{||}=2\), \(\beta_{||}=1\), \(\alpha_{PM}=4\) and \(\beta_{PM}=9\)[10], while the SSPA used is the NEC GaAs Power Amplifier used for standardization with parameters: \(g=19\), \(A_{sat}=1.4\), \(s=0.81\), \(\alpha=-48000\), \(\beta=0.123\), \(c_{1}=3.8\) and \(c_{2}=3.7\)[10]. To evaluate the performance of our implementation, several metrics have been used, namely: the FPGA resources consumption, the bit error rate and finally the power spectral density. Table 1 shows the consumed resources on virtex-4, virtex-5 and virtex-6 FPGAs. The table also shows the maximum frequency supported (it is worth noting that the maximum frequency stands for the maximum throughput supported by the designs). From Table 1, it can be concluded that the TWTA pre-distorter is faster and less resources consuming than the SSPA. This can be justified by the use of radial basis function based on exponential function approximation, leading to slower and more complex calculation. Since the HPA is usually imposed by the application, we need to guarantee that both design can be efficiently implemented. Table 2 and Figure 11 show the power consumption for TWTA and SSPA pre-distorters. It is worth noting that the TWTA pre-distorter consumes less power than the SSPA pre-distorter. It can also be seen in Figure 11 that the novel FPGA architectures (Spartan) are more efficient than older ones, and our proposal can better exploit the optimization characteristics on these devices. It is especially relevant that in Spartan 6 boards, the power consumption of our proposal could even be neglected, which is a relevant contribution in this context. The power estimation has been obtained with Xilinx Power Analyzer, using Simulation Activity Files (SAIF or VCD) for accurate power analysis, which guarantees enough accuracy on the results. The proposed MLP NNs have been simulated and implemented on FPGA, following ECMA-368 standard. If nothing is indicated in other sense, the \(IBO\) has been fixed to 2 dB, a very optimistic value for realistic systems. Figure 12 shows the transmitted constellation after the TWTA and SSPA without the pre-distortion (warped constellation), and when using our proposal (close to the original constellation). It can be seen that, even in this taught conditions, the proposed design is able to work properly. \begin{table}
\begin{tabular}{c c c c c} \hline \hline
**Solutions** & **FPGA** & **DSP Blocks** & **LUTs** & **Max Freq (MHz)** \\ \hline \multirow{3}{*}{TWTA predistorter} & Virtex-6 xc6 vlx130 & 0 (0\%) & 1560 (1\%) & 492 \\  & Virtex-5 xc5 vlx110 & 0 (0\%) & 1611 (2\%) & 425 \\  & Virtex-4 xc4 vlx100 & 0 (0\%) & 1796 (1\%) & 344 \\ \hline \multirow{3}{*}{SSPA predistorter} & Virtex-6 xc6 vlx130 & 52 (10\%) & 2744 (1\%) & 200 \\  & Virtex-5 xc5 vlx110 & 52 (81\%) & 2805 (4\%) & 157 \\ \cline{1-1}  & Virtex-4 xc4 vlx100 & 78 (81\%) & 3285 (3\%) & 122 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Resources consumption. \begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline
**Device** & **Virtex5** & **Virtex6** & **Virtex6** & **Virtex4** & **Spartan3** & **Spartan6** & **Spartan6** \\  & **5 vfx100t** & **6 vcx130t** & **6 vcx130 tL** & **4 vfx100** & **XC35 4000** & **XC6 SLX 100** & **XC6 SLX 100 L** \\ \hline SSPA power consumption (W) & 1.97 & 1.343 & 0.932 & 0.944 & 0.564 & 0.198 & 0.134 \\ \hline TWTA power consumption (W) & 1.66 & 1.23 & 0.83 & 0.84 & 0.272 & 0.081 & 0.058 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Power consumption. In Figure 12, it can be concluded that using the proposed NN pre-distorters, the constellation is like the original signal without distortion, which will greatly improve the bit error rate. To make sure that our implementation for both designs does not affect the performance of the ECMA-368 wireless communication system, the Bit Error Rate (BER) is also obtained and analyzed for different standard channels CM1, CM2, CM3 and CM4.