## 4 Algorithm Flow
### Basic Flow
Further, compare the results of the CAPCOM and TPSPOM methods when using triple-threshold voltage. The result is shown in Table 2, Figures 11 and 12. \begin{table}
\begin{tabular}{c c c c c c c c c c} \hline \hline  & \multicolumn{3}{c}{**CBLPRP**} & \multicolumn{3}{c}{**CAPCOM**} & \multicolumn{3}{c}{**TPSPOM**} \\ \cline{2-10}
**Period** & **Power** & **LVT** & **LVT** & **Power** & **LVT** & **LVT** & **Power** & **LVT** & **LVT** \\
**(ns)** & **(_mW_)** & **C-** & **S-** & **(_mW_)** & **C-** & **S-** & **(_mW_)** & **C-** & **S-** \\  & & & & & & & & & & **Cells** & **Cells** \\ \hline
1.2 & 4.3813 & 108,354 & 2182 & 4.3818 & 65,112 & 10,284 & 2.6220 & 47,326 & 3804 \\ \hline
1.1 & 5.5906 & 128749 & 4394 & 5.4998 & 85,966 & 12,923 & 3.5008 & 64558 & 5545 \\ \hline
1.0 & 6.9498 & 146,037 & 8001 & 6.9088 & 109,385 & 16,035 & 4.8008 & 88315 & 7858 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Static power consumption, the number of low-threshold voltage (LVT) combinational cells and LVT sequential cells of the 28 nm circuit using CBLPRP, CAPCOM, and TPSPOM procedures with dual-threshold voltage. Figure 10: Percentage of LVT cells of the 28 nm circuit using CBLPRP, CAPCOM, and TPSPOM procedures with dual-threshold voltage. Figure 9: Static power consumption of the 28 nm circuit using CBLPRP, CAPCOM, and TPSPOM procedures with dual-threshold voltage. The results show that the TPSPOM method is more effective when using triple-threshold voltage. The results indicate that under the shortest 1 ns delay constraint, compared to the all-LVT circuit, CAPCOM's static power consumption is reduced to 24.91%, while TPSPOM's is reduced to 9.75%. The percentage of the SVT cells for CAPCOM is 11.30%, while for TPSPOM is 29.61%. Meanwhile, the percentage of the LVT cells for CAPCOM is 21.2%, while for TPSPOM is 4.95%. \begin{table}
\begin{tabular}{c c c c c c c c c c c} \hline \hline  & & \multicolumn{4}{c}{**CAPCOM**} & \multicolumn{4}{c}{**TPSPOM**} \\ \cline{2-11}
**Period** & **Power** & **SVT** & **SVT** & **LVT** & **LVT** & **Power** & **SVT** & **SVT** & **LVT** & **LVT** \\ (ns) & **(_mW_)** & _C-_ & _S-_ & _C-_ & _S-_ & _(_mW_)_ & **C-** & **S-** & **C-** & **S-** \\  & & **Cells** & **Cells** & **Cells** & **Cells** & **Cells** & **Cells** & **Cells** & **Cells** & **Cells** \\ \hline
1.2 & 3.074 & 23,650 & 5190 & 41,462 & 5094 & 1.3285 & 47,141 & 4027 & 9848 & 860 \\ \hline
1.1 & 3.8933 & 30,022 & 6080 & 55,944 & 6843 & 1.5586 & 71,128 & 6335 & 12,588 & 1175 \\ \hline
1.0 & 4.9298 & 36,291 & 7311 & 73,094 & 8724 & 1.9289 & 105,021 & 9216 & 17,459 & 1617 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Static power consumption, the number of LVT/standard-threshold voltage (SVT) combinational cells and LVT/SVT sequential cells of the 28 nm circuit using CAPCOM, and TPSPOM procedures with triple-threshold voltage. Figure 11: Static power consumption of the 28 nm circuit using CAPCOM, and TPSPOM procedures with triple-threshold voltage. Figure 12: Percentage of SVT/LVT cell of the 28 nm circuit CAPCOM, and TPSPOM procedures with triple-threshold voltage. The CAPCOM method prioritizes swapping cells from LVT to HVT, then considers swapping cells from LVT to SVT. Moreover,the CAPCOM method will have a higher percentage of LVT compared to the priority replacement of SVT and then HVT. However, the difference in power consumption between LVT and SVT is much more significant than that between SVT and HVT, and priority should be given to swapping cells from LVT to SVT. For example, in this circuit, the value of static power consumption for a particular inverter is \(6.403*10^{-10}\)\(W\) for HVT, \(6.561*10^{-9}\)\(W\) for SVT, and \(9.663*10^{-8}\)\(W\) for LVT. The delay difference between HVT and SVT is \(0.03235\) ns, while the value is \(0.01265\) ns between SVT and LVT. Calculate the ratio of static power consumption difference to delay difference, and the result is that swapping from SVT to LVT is \(38.9\) times higher than that of swapping from HVT to SVT.