# Design and Implementation of DSLMS Algorithm Based Photoelectric Detection of Weak Signals
## 5 Experimental Verification
### FPGA System Test of DSLMS Filter  
In order to verify the excellent filtering effect of the DSLMS filter in the FPGA system, we packaged the DSLMS filter into an IP core based on the one designed in Section 4 and completed the Block Design construction of the multi-channel signal acquisition board. Through this experimental platform, we not only realized the physical verification of the adaptive filter at the hardware level but also deeply analyzed its performance in real engineering applications.  
Figure 18 shows the multi-channel signal acquisition board. The boards are designed and manufactured in-house to meet the specific needs of the experiments, which include the following main parts: (1) The role of the AD converter is to convert the analog signal generated by the signal generator into a digital signal. (2) The FPGA (Field Programmable Gate Array) is the core part of the experiment, which is used to implement the adaptive filtering algorithm. In the FPGA, the step factor can be adjusted according to the relevant characteristics of the noise to optimize the filtering effect. (3) The ethernet transmission module is used for the communication between the host computer and the FPGA to transmit the filtered data processed by the FPGA to the host computer for storage.  
Figure 19 shows the test hardware platform. The platform includes not only a multi-channel signal acquisition board, but also a dedicated signal generator, which is purchased based on performance specifications and whose main function is to generate superimposed signals. The experiments need to simulate a variety of noise conditions under the transmission of the signal; the signal generator can generate a signal with a specific noise characteristic for the multi-channel signal acquisition card to provide input signals.  
Finally, the bin file saved by the host computer was analyzed using Matlab data analysis software. In this way, the efficacy of the adaptive filter in removing noise can be evaluated, as well as its adaptability and performance in noisy environments. Preliminary estimates suggest that the uncertainty in the simulation results may be in the range of 3.5% to 5%, depending on the specific noise conditions of the signal and the settings of the filtering algorithms [38; 39].  
Figure 17: Comparison of traditional fixed-step LMS algorithm, variable-step LMS algorithm with Signoid function, and traditional fixed-step filtering with ideal output signal curve. (**a**) Comparison of the variable-step-size LMS algorithm for the Sigmoid function with the ideal output signal profile after filtering with the DSLMS algorithm. (**b**) Comparison of the ideal output signal curve after filtering between the conventional fixed-step LMS algorithm and the DSLMS algorithm.  
Figure 20 shows the convergence of the DSLMS filter deployed in Matlab and the FPGA for data signal processing, from which it can be seen that the DSLMS algorithm filter implemented on the FPGA proposed in this paper is close to the simulation results of Matlab, which demonstrates the effectiveness of the FPGA hardware filter in signal denoising.  
Figure 19: Test hardware platform.  
Figure 18: Multi-channel signal acquisition board.  
Figure 20: LMS algorithm performance comparison chart.