# Mini-Review: Modeling and Performance Analysis of Nanocarbon Interconnects
## 3 CNT Interconnects
It was demonstrated that the ESC model can accurately predict the time delay and facilitate the simulation speed although it would result in an overestimation of peak crosstalk [72]. Based on the ESC model, [PERSON], et al. [73] characterized the performance of MWCNT interconnects by using the finite-difference time-domain (FDTD) method. Figure 10: (**a**) Parasitic capacitances of Cu and monolayer SWCNT interconnects. (**b**) Energy-delay product ratio between Cu and monolayer SWCNT interconnects at the 19 nm technology node [60]. Figure 9: Cross-sectional views of (**a**) monolayer SWCNT, (**b**) bundled SWCNT, and (c) MWCNT interconnects. Further, some studies have been conducted to analyze the crosstalk, variability, Joule heating, and electrostatic discharge (ESD) reliability of CNT interconnects [74; 75; 76; 77; 78; 79; 80; 81; 82; 83]. On the other hand, to reduce the interconnect delay, the repeater insertion is usually employed in the design of high-performance VLSI [42]. Previous studies have been carried out to investigate the optimal repeater insertion for CNT interconnects [75; 84]. Unfortunately, these studies didn't consider the impact of metal-CNT contact resistance, which would be added along with each inserted repeater and surely influence the time delay, as shown in Figure 11[85]. To resolve this issue, an analytical expression of the optimal repeater number was derived based on the Elmore delay equation in [86]. Furthermore, the influence of inductance on the repeater design in an MWCNT interconnect was considered [87]. Using the multivariable curve fitting technique, the closed-form expressions of optimal repeater size and the optimal number of segments can be obtained. Definitely, the smaller contact resistance is, the better performance can be achieved. Here, the maximum tolerant contact resistance of MWCNT interconnect is defined, beyond which the total time delay of MWCNT interconnect would be larger than that of Cu counterpart. Figure 12 gives the minimum time delay of an MWCNT interconnect versus contact resistance. It is shown that the maximum tolerant contact resistance increases from 3.3 k\(\Omega\) to 10.5 k\(\Omega\) as the technology node scales from 14 nm to 7 nm. Considering the size effect, however, the contact resistance will be scaled up 4 times from 14 nm node to 7 nm node. In other words, more efforts should be put on reducing the contact resistance with the technology advanced. As the IC feature size scales down, interconnects consume more and more power. Simply ignoring the power consumed by repeaters would cause an overestimation of optimal repeater number. Therefore, some repeater insertion methodologies have been developed targeting in reducing power dissipation of conventional Cu interconnects [88; 89]. Further, a repeater design methodology to reduce delay and power of CNT interconnects has been proposed in [90], with the metal-CNT contact resistance treated appropriately. In [90], the particle swarm optimization (PSO) algorithm was employed to capture the optimal values of repeater size and repeater number. To facilitate the simulation speed, the obtained data was then used to train a neural network, as shown in Figure 13a. It was demonstrated that the trained neural network can predict the optimal repeater size and number rapidly and accurately, as shown in Figure 13b. Figure 11: Repeater insertion in a long global nanocarbon interconnects. Figure 12: Minimum time delay versus contact resistance for 2000 \(\upmu\)m-long Cu and MWCNT interconnects [87].