# Hybrid LLC Converter with Wide Range of Zero-Voltage Switching and Wide Input Voltage Operation
## 5 Experimental Verification of the Presented Converter  
The hardware circuit of the presented circuit shown in Figure 7 is setup and the circuit specifications are shown in Table 1. The prototype is tested and the measured waveforms are provided to confirm the effectiveness of the presented resonant converter. The PWM signals of active switches at 50 V input (low voltage input region), 190 V input (medium voltage input region) and 400 V input (high voltage input region) and full load are shown in Figure 8a-c respectively. For \(\mathrm{V_{in}}\) = 50 V input (low voltage range), \(\mathrm{S_{ac1}}\) is off, \(\mathrm{S_{ac2}}\) is on and \(\mathrm{S_{1}}\)-\(\mathrm{S_{4}}\) are active with switching frequency \(\mathrm{f_{sw}}\approx\) 65 kHz shown in Figure 8a. For \(\mathrm{V_{in}}\) = 190 V input (medium voltage range), \(\mathrm{S_{ac1}}\) and \(\mathrm{S_{ac2}}\) are off and only \(\mathrm{S_{1}}\)-\(\mathrm{S_{4}}\) are active with switching frequency \(\mathrm{f_{sw}}\approx\) 102 kHz (Figure 8b). For \(\mathrm{V_{in}}\) = 400 V input (high voltage range), \(\mathrm{S_{ac1}}\) is on and \(\mathrm{S_{1}}\), \(\mathrm{S_{2}}\) and \(\mathrm{S_{ac2}}\) are off. Only \(\mathrm{S_{3}}\) and \(\mathrm{S_{4}}\) are active with switching frequency \(\mathrm{f_{sw}}\approx\) 108 kHz shown in Figure 8c. Figures 9 and 10 give the experimental waveforms of input-side and output-side, respectively, at \(\mathrm{V_{in}}\) = 50 V, 190 V and 400 V under full load. For 50 V input (low voltage range), \(\mathrm{S_{ac2}}\) is on so that \(\mathrm{D_{1}}\) and \(\mathrm{D_{2}}\) are active and \(\mathrm{D_{3}}\) and \(\mathrm{D_{4}}\) are in the off state as shown in Figure 10a. For 190 V and 400 V input conditions, \(\mathrm{S_{ac2}}\) is off so that \(\mathrm{D_{1}}\) and \(\mathrm{D_{2}}\) are reverse biased and \(\mathrm{D_{3}}\) and \(\mathrm{D_{4}}\) are active (Figure 10b,c). From the measured waveforms in Figure 10, the output capacitor voltages \(\mathrm{V_{C01}}\) and \(\mathrm{V_{C02}}\) are balanced well. Figure 11 gives the PWM signals of power switch \(\mathrm{S_{1}}\) or \(\mathrm{S_{3}}\) at 50 V, 190 V and 400 V input under 20% and 100% loads. It can observe the ZVS operation of \(\mathrm{S_{1}}\) and \(\mathrm{S_{3}}\) is realized for both 20% and 100% loads. Figure 12a shows the input voltage \(\mathrm{V_{in}}\) and the gating voltage \(\mathrm{v_{Sac2,g}}\) between \(\mathrm{V_{in}}\) = 50 V and 400 V. When \(\mathrm{V_{in}}\)\(\geq\) or \(<\) 100 V, \(\mathrm{S_{ac2}}\) is off (medium or high voltage range) or on (low voltage range). Figure 12b provides the input voltage \(\mathrm{V_{in}}\) and PWM voltages \(\mathrm{v_{Sac1}}\), \(\mathrm{v_{S1,g}}\) and \(\mathrm{v_{S2,g}}\) between \(\mathrm{V_{in}}\) = 0 V and 400 V. When \(\mathrm{V_{in}}\)\(\geq\) 200 V (high voltage input region), \(\mathrm{S_{ac1}}\) is turned on and \(\mathrm{S_{1}}\) and \(\mathrm{S_{2}}\) are turned off. The converter efficiencies for different input voltages and loads are given in Table 2. Under low voltage input region, the \(\mathrm{2n_{s}}\) winding turns are used on the output-side. Therefore, the higher primary-side current is introduced and the conduction losses on switches and winding turns are increased compared to the \(\mathrm{n_{s}}\) winding turns used on the output-side under medium and high voltage input regions. Thus, the circuit efficiency at low voltage input region is less than the medium or high voltage input region under the same load. The measured switching frequency at different loads and input conditions are provided in Table 3. On each input voltage region, the higher input voltage results in the higher switching frequency under the same load. Figure 7: Presented LLC converter (**a**) picture of laboratory prototype (**b**) picture of the experiment setup.