## 3 Proposed Overload Control Algorithm  
Proposed NFP module consists of a microprocessor; combined NFP core, ROM, NVRAM, I/O expander bus, and serial port; and combined parallel DMA, AFP, and I/O section (See Table 1). Our proposed NFP module includes the NFP Core and AFP, while the Bailey Inc. MFP does not include them. This is the main difference between the two modules. First, the NFP module incorporates a combined compressed function processor (CFP), ROM, and NVRAM to overcome the overload problem, because this algorithm improves memory efficiency. However, the memory management algorithm is not integrated into the processor module due to the interrupt processing speed. We investigated about overload control algorithm for the DCS using the proposed NFP module first. To know all the operations of the entire system, it is necessary to investigate the system level of the power plant system, and at the same time, it is necessary to first understand the structures of each memory and processor operating at the hardware level. After that, the power plant control principles and systems must be investigated in more detail. Table 1 Comparison of hardware specifications between the MFP (multi-functional processor) module and the BRC (bridge controller card) module. The table highlights key differences in memory capacity--both NVRAM and RAM--while showing that both modules share the same microprocessor width and power consumption. The substantial increase in memory resources in the BRC module reflects a hardware-level response to growing system complexity and the need for improved performance in the DCS. In the Figure 2, the dashed circle highlights a control block labeled SEGCRM within the automation architect environment, which is part of a DCS logic diagram. The arrow extending from the dashed circle indicates a zoom-in or logical tracing operation that transitions the viewer's focus to a magnified black background version of the same SEGCRM block for detailed inspection. In this magnified view, several numerical values are displayed along the right-hand side, representing various operational metrics. Most notably, the number 83.84 (highlighted in a red-colored box) denotes the processor utilization percentage, indicating that the controller's CPU is currently operating at 83.84% capacity. Additional values such as 0.25, 15, and 0.222 are likely related to input/output scaling, loop timing, or internal set points, but the 83.84% utilization is the critical parameter for overload diagnosis in this context. In order to investigate more about reliability and safety issue, we designed the NFP core based on hardware that will increase the processing speed. In addition, Table 3 shows that the proposed CFP memory efficiency is exactly 50% better than that of the conventional memory management algorithm [5]. This is because the memory equation of the proposed CFP is  
\[T_{MUI}=2(LN-1)(SL+1) \tag{2}\]  
where \"\(T_{MUI}\)\" is total memory usage, \"\(LN\)\" is leaf node number, and \"\(SL\)\" is symbol length at the CFP binary structure. In addition, hardware-based CFPs are designed according to clock speed: the faster the clock speed, the faster the processing speed. Table 3 presents a quantitative comparison between a conventional compression algorithm and the proposed algorithm in terms of memory utilization and computational complexity. In resource-constrained environments such as distributed control systems, minimizing memory usage and reducing execution time are critical to preventing processor overload and ensuring real-time responsiveness. The table demonstrates that the proposed algorithm significantly reduces memory consumption--from 14 bytes to 7 bytes--by introducing a parameterized optimization factor, (d + 1), in the equation. Additionally, the calculation complexity is reduced through normalization, making the algorithm more efficient for embedded control applications.