## 4 System Implementation and Simulation Results
### System Level Simulation  
Simulations were performed in the Spectre simulator, a widely used industry simulator from the Cadence Design Systems suit. This simulator employed an adapted version of the BSIM4 SIC model for the MOSFETs. These models were provided in the proprietary PDK. In Figure 5, the simulated digital input signals \(V_{51,2}\) and the output voltage of the gate drivers \(V_{G1,2}\) for single-channel gate drivers are depicted. Here, the circuit demonstrates the expected behavior of elevating the digital input voltage from 12 V to 20 V.  
Another important factor to consider is the propagation delay introduced by the gate driver, along with the turn-on and turn-off delay times of the power transistors. These were determined by switching the power transistors independently as described in [47]. Figure 6a shows the propagation delay times of \(V_{G1}\) and \(V_{G2}\), while Figure 6b illustrates the turn-on and turn-off delay times of \(M_{1}\) and \(M_{2}\). Both figures were obtained through simulations within the model's valid operating temperature range. Specifically, \(T_{PdR1}\) and \(T_{PdR2}\) denote the propagation delay rise times for \(V_{G1}\) and \(V_{G2}\), respectively; \(T_{PdF1}\) and \(T_{PdF2}\) represent the propagation delay fall times for \(V_{G1}\) and \(V_{G2}\). Additionally, \(T_{d,on,M1}\), \(T_{d,on,M2}\) and \(T_{d,aff,M1}\), \(T_{d,aff,M2}\) represent the turn-on and turn-off delay times of \(M_{1}\) and \(M_{2}\), respectively.  
Figure 7 specifies the criteria used for measuring these times, as described in [47]. This behavior is a critical factor to consider in the operation and control of the converter, as it influences the overall switching efficiency and timing, as will be discussed in Section 4.3.  
Figure 5: Digital input signals and output voltage of the gate drivers for single-channel gate drivers. Gate drivers: \(M_{1}\) (**left**) and \(M_{2}\) (**right**) at \(25\,\mathrm{\SIUnitSymbolCelsius}\).  
Figure 6: (**a**) Propagation delay (rise and fall) times of \(V_{G1,2}\) across the valid operating temperature range. (**b**) Turn-on and turn-off delay times of \(M_{1}\) and \(M_{2}\) across the valid operating temperature range.  
In Figure 8, the steady-state signals of a single channel are shown, illustrating the conversion of \(V_{dc}=20\) V to \(V_{o}=12\) V and a total output current of 300 mA (100 mA per channel). This includes the voltage drops and the current across the power transistors, the input PWM signals (\(V_{G1}\), \(V_{G2}\)), and the inductor current (\(i_{L1}\)). These waveforms provide insight into the real-time operation of the converter, showcasing the expected interaction between the switching transistors and the inductor current under steady-state conditions.  
Due to the emerging feature of this PDK, the used version does not include the option to extract parasitic elements, which limits the transient analysis, which can be useful for estimating the ringing effects of semiconductor devices. Additionally, the components \(L\) and \(C\) were considered ideal to focus solely on the effect of the power transistors and gate drivers on the converter's behavior.