## 1 Introduction
[17] introduced YOLO-SSW, incorporating P2 high-resolution features, Conv SPD for fine-grained retention, and SimAM-enhanced backbone with Wise-IoU, achieving 98.4% accuracy (a 0.8% improvement). [PERSON] et al. [18] developed EPD-YOLO with a FIT structure and SF-Head, demonstrating 97.6% mAP at only 5.13M parameters and a 7.4 ms inference time. [PERSON] et al. [19] proposed LPCB-YOLO, a lightweight and high-performance model for PCB defect detection, which integrates CSPELAN modules for feature extraction, a C-SPPF module for multi-scale feature fusion, and a C2f-GS module to enhance semantic and detail feature integration. LPCB-YOLO achieves a 24% reduction in model size while maintaining 97.0% precision and recall. [PERSON] et al. [20] developed YOLO-DFA, an enhanced YOLOv10-based PCB defect detection algorithm. It employs a dual-backbone architecture to reduce information loss, a fine-grained feature enhancement method with dynamic weighting, and an adaptive scale-enhanced loss function. The experimental results show that the model attains a 96.4% mAP. [PERSON] et al. [21] presented PCP-YOLO, a network that incorporates the lightweight PotentNet feature extraction module, the C2f_ParallelPolarized fusion module based on self-polarization attention, and the CARAFE up-sampling technique, demonstrating superior performance over existing methods. [PERSON] et al. [22] proposed SSHP-YOLO, a high-precision PCB defect detector for small samples. It integrates ELAN-C and ASPPCSPC modules with SIoU loss, achieving 97.80% mAP and 11.84% higher recall than YOLOv7, effectively reducing missed/false detections. [PERSON] et al. [23] proposed MAS-YOLO, a lightweight PCB defect detector based on YOLOv12. It introduces MECS attention for subtle features, AHFIN for adaptive fusion, and SAL loss for localization, greatly improving mAP and FPS for real-time industrial inspection. A comprehensive review of the literature reveals that existing models for PCB defect detection have demonstrated high performance. Through the integration of advanced feature extraction modules, multi-scale feature fusion techniques, enhanced attention mechanisms, and optimized loss functions, these models have demonstrated high detection accuracy and efficiency. Nevertheless, they are inadequate for dealing with PCB background interference, and their preservation of small-target features is restricted to fusion within the backbone network, indicating that there is still room for further improvement in this field. To tackle the crucial problems, this paper proposes a high-precision PCB detection algorithm, termed PCES-YOLO. This novel framework brings together four key innovative elements: the custom-designed C3k2-Pre-convolution Receptive Field Enhancement (PRFE) module, the integration of ConvNeXtBlock, the self-constructed Efficient Feature Fusion and Aggregation Network (EFAN), and the Shape-IoU loss function. Collectively, these components substantially boost detection precision while reducing model parameters. The specific contributions of this paper are outlined as follows:  
1. Enhanced Feature Extraction: The C3k2-PRFE module combines the C3k2 framework with the constructed PRFE module. In this design, a 3 \(\times\) 3 convolution is placed before the Receptive Field Enhancement (RFE) module to perform initial local context fusion. This effectively reduces the pixel-level interference at the edges of small targets. The pre-processing enables cleaner and more semantically explicit feature processing in subsequent receptive field enhancement while preventing detail feature dilution caused by large receptive fields. Moreover, the ConvNeXtBlock modules are integrated into the backbone network to capture more extensive semantic information. The synergistic operation between C3k2-PRFE and ConvNeXtBlock evidently lessens the complex PCB background interference during the feature extraction process. 2. Advanced Feature Fusion: The innovative EFAN feature fusion network presents three new fusion paths.