# A Fast, Decentralized, Self-Aligned Carrier Method for Multicellular Converters +
## 5 Experimental Result
### Experiment with DSA-LSC Method  
Figure 38 shows the connection diagrams for DSA-LSC method; each cell is controlled by a DSP controller and communicates with other cell via the pins described in Table 10. Parameters of five-level converter (Figure 11a) with the algorithm DSA-PSC are presented in Table 11.  
Figure 36: Load voltage and load current waveforms when removing cell 3. Figure 37: Load voltage and load current waveforms when reinserting cell 3. \begin{table}
\begin{tabular}{c c c} \hline \hline
**Parameter** & **Pin on DSP** & **Function** \\ \hline count\_in & GPIO 97, 94, 65 & Get information of cell index from the previous cell \\ \hline count\_out & GPIO 130, 63, 64 & Send information of cell index to the next cell \\ \hline number\_in & GPIO 52, 41, 40 & Get information of total number of cells \\ \hline number\_out & GPIO 26, 27, 25 & Send information of total number of cells \\ \hline EN & GPIO 66 & Enable to Activate/Deactivate a cell \\ \hline clk\_in & GPIO 14 & Receive synchronous clock pulse \\ \hline clk\_out & GPIO 04 & Send information of synchronous clock pulse to the next cell \\ \hline Teta\_base & ADCA15 & Get information of phase from the previous cell \\ \hline Send\_eta & DACB & Send information of phase to the next cell \\ \hline Vrf\_in & ADCA14 & Get information of modulation index from the previous cell \\ \hline Vrf\_out & DACA & Send information of modulation index to the next cell \\ \hline Frf\_in & GPIO 105, 104, 95, 139, 56, 10, 11 & Get information of frequency from the previous cell \\ \hline Frf\_out & GPIO 29, 131, 05, 24, 16, 06, 07 & Send information of frequency to the next cell \\ \hline B signal & GPIO 0 & IGBT control signal B \\ \hline H signal & GPIO 1 & IGBT control signal H \\ \hline \hline \end{tabular}
\end{table} 
Table 11: Parameters of five-level DC/AC converter with algorithm DSA-LSC. Figure 38: System experimental diagram using DSA-LSC method. Figure 39a describes the arrangement of carrier levels (\(A_{n}\)) when the system has four cells, and Figure 39b shows the triggering pulses sent to the IGBTs of cells, which are correctly interleaved, and accordingly to a four-cell five-level converter. Figures 40-42 show the system response of a reconfiguration event, the output voltage levels, and the cell IGBT PWM control signals when adding or removing one or more cells. Figure 40 shows the system response when the system is reconfigured from four cells to three cells (by removing cell 3). Figure 41 shows the system response when cell 3 is added into an operating three-cell system. Figure  
Figure 43 shows the output voltage and the load current of the converter when all four cells of the converter operate. In this case, the output voltage has five levels, as shown in Figure 43a. Figure 44 shows the output voltage and the load current waveforms when one cell is removed and the system has 3 cells left, resulting in four-level output voltage, as shown in Figure 44a. Figure 41: The system response of restructuring when reinserting cell 3 by using DSA-LSC method, (**a**) carrier levels; (**b**) PWM control signals. Figure 42: Control signal of IGBT when removing and reinserting cell 4 by using DSA-LSC method, (**a**) PWM control signals; (**b**) PWM control signals. Figure 45 shows the transients of output voltage and load current when cell 3 is removed and reinserted; in this case, the DSA-LSC method is applied for each cell controller. Figure 46 shows the FFT analysis of the output voltage, where Figure 46a shows the voltage FFT spectrum within the frequency range from 0 to 450 Hz, and Figure 46b shows the voltage FFT spectrum within the range from 0 to 20 kHz. The FFT analysis results show that the output voltage has low harmonic distortion. Figure 46: FFT analysis of output voltage, (**a**) spectrum of nine first harmonics; (**b**) spectrum of 400 harmonics. Figure 44: Experimental results of three level-shifted carriers using DSA-LSC method, (**a**) output voltage; (**b**) output current.