# Development of Multi-Channel Seismic-Electrical Combined Rolling Coverage Measurement System
## 2 Design of the Combined Measurement System
### Program Design  
The overall program framework of the instrument is shown in Figure 16. The instrument program is mainly divided into the upper computer program, embedded ARM program, and FPGA program. The embedded ARM program includes function modules such as file saving, GNSS synchronization, and instrument status control. The FPGA program is mainly responsible for high-voltage output control, data acquisition control, channel switching control, and other functions directly related to the analog circuit hardware. This system uses the Xilinx xc3s2000-4 fg456 FPGA chip, so the program is designed and implemented in the Vivado development environment [31; 32; 33].  
Developed in C#, the upper computer handles data reception, waveform display, and instrument control. C# is a strongly typed, object-oriented language widely used for professional development on Windows platforms [34]. The functional architecture of the upper computer software control system designed for this system is shown in Figure 17. The upper computer display interface is shown in Figure 18.  
\begin{table}
\begin{tabular}{c c c c} \hline
**Process** & **Centralized Cable** & **Coverage Cable** & **Difference** \\ \hline Bury electrode & \(8+4+4=16\) times & \(8+4+4=16\) times & 0 times \\ Connect electrode & \(8+8+8=24\) times & \(4+4+8=16\) times & 8 times \\ Disconnect electrode & \(8+8+8=24\) times & \(8+4+4=16\) times & 8 times \\ Move electrode & \(4+4=8\) times & \(4+4=8\) times & 0 times \\ Move cable & \(2+2=4\) times & \(1+1=2\) times & 2 times \\ Move instrument & \(1+1=2\) times & 0 times & 2 times \\ \hline \end{tabular}
\end{table}
Table 2: Comparison of the number of processes required for centralized cable and coverage cable measurements.  
Figure 15: Diagram of the cable system for seismic measurements. Numbers indicate pin positions on the connector. Colored lines represent signal paths from geophones (gray arrows) to the instrument (blue box), and black dots denote grounding points.  
the FPGA, which executes data collection and returns the results to the ARM layer. The ARM layer packages and stores the data locally, then sends it to the PC, where the upper computer software visualizes it for the user.  
The system collects seismic and electrical signals simultaneously through separate channels. To ensure synchronization, the SoPC module sends trigger signals to each acquisition circuit at the same time, with equal-length signal lines designed to minimize delay mismatches. This architecture achieves temporally coherent multi-modal data acquisition, laying the foundation for joint inversion and integrated interpretation.  
Although the current field validation focuses on DC resistivity acquisition, preliminary work has also been performed on the seismic data processing workflow. The system supports high-resolution, timestamped seismic waveform acquisition, with data saved to the PC via the upper computer software. In the initial processing stage, standard preprocessing steps such as band-pass filtering, baseline correction, and time windowing  
Figure 19: Overall program flow of the instrument.  
are applied using MATLAB (R2024b). Future work will incorporate automatic first-arrival picking and waveform inversion modules as part of the ongoing system integration and enhancement plan, enabling more comprehensive seismic analysis.