## 3 Control Program Representation Accommodated for Direct Hardware Synthesis
### Constructing the Data Flow Graph from Ladder Diagram Components  
The ladder diagram language requires a systematic method of building the EFG during the analysis process of the language statements (rungs). The fast LD method requires tracing a variable value assignment, that assures returning appropriate graph node for requestors. The other aspect that requires addressing is merging multiple logic signals by the node of a diagram. The above issues are illustrated in Figure 4.  
The variable value access procedure returns the EFG arc, according to the recent value assignment. Case A shows the situation when the requested variable has not been assigned until the access. This requires creating the variable value read node (if does not exist) and returning an arc coming from it. When a variable is associated with an output or internal marker, the previous value is accessed. A variable associated with an input holds the current input value and is read-only. Value assignment to such variables is prohibited. Case B depicts the situation when the requested variable has been already assigned. The write variable value node exists and enables tracing back to the node that is a source of the value. The read variable value procedure returns the arc, with respective attributes sourcing to the value source node. Passing the logic result back to a ladder network node requires implementing a node assignment procedure. This procedure creates the logical OR of all signals, driving a ladder diagram node. Initial value assignment is depicted in Case C of Figure 4. An implied node variable \(n\) is created and a logical OR node is connected to it. The next component node,  
Figure 3: EFG representation of: logic expression (**A**,**B**), arithmetic expression (**C**,**D**), and conditional flow of processing (**E**). sourcing a value to the network node \(n\), is connected to the logic OR node. Connecting additional driving components to the node is depicted in Case D. The implied name is used to look up the variable associated with node \(n\) during EFG construction. Next, the driving source (\(d_{2}\)) is connected to the existing logical OR node. This operation can be repeated iteratively until all components, driving the same ladder diagram node, are connected. The LD network is composed of connected switches and coils. Those components, independent from the placement, are translated to a data flow diagram, using the patterns shown in Figure 5. Cases A and B depict the switches NO (normally open) and NC (normally closed) that enable building logic functions. The energy flow through the switch depends on the associated variable, resulting from the logical AND driving signal (\(n_{i}\)) and the switch controlling signal (\(a\)). The only difference between NO and NC switches mapping is an inversion attribute, placed on the edge, that links the driving variable for the NC switch, shown in Case B. The energy flow in the diagram node can be assigned to a variable using a coil. A simple coil and an inverting coil EFG mapping are shown in Cases C and D, respectively. It should be noted the signal flow is retained by implementing a node signal assignment. The IEC61131-3 standard also defines complex switches [1; 11]. To show the flexibility of the data flow representation for other components a set coil and a reset coil mapping are depicted in Cases E and F. The standard allows for those components to be used multiple times, assigning the highest priority to the last coil type. To meet the standard requirements, the  
Figure 4: General EFG construction rules for LD mapping of variable access, according to fast LD (**A,B**) and multiple logic outputs driving a common node (**C,D**). Figure 5: The EFG construction rules for: NO and NC switches (**A,B**), simple coils (**C,D**), and set–reset coils (**E,F**). set coil is a logical OR of the driving node state and driven variable. This suggests the order of variable access and assignment during an EFG construction.