# A Tile-Based Multi-Core Hardware Architecture for Lossless Image Compression and Decompression
## 3 High-Efficiency Parallel Processing Architecture
### Dynamic State Machine-Based Decompression Architecture  
The functionality of the core is enhanced by integrating three parallel finite state machines (FSMs), with each FSM responsible for a critical phase of the decompression cycle, as shown in Figure 7. In the figure, dashed lines indicate the return of each state machine to the idle state. All three FSMs operate in parallel. FSM1 is tasked with identifying the appropriate decoding mode and switching between run-length, predictive, and non-coding modes. In the first clock cycle, one bit of data is read. If the bit is \"1\", it indicates that the current compression was produced using the predictive mode. Once the decoding mode is determined, neighboring pixels are read. After four clock cycles, four neighboring pixels are obtained, and the calculations for parameters mQ and mErrval are initiated. These calculations are completed after three clock cycles. Subsequently, FSM3 is activated, while FSM1 continues to operate in parallel. After seven clock cycles, FSM1 returns to the idle state and begins decoding new data. During this time, FSM3 uses three clock cycles to read parameters A and N from the parameter matrices by indexing with mQ. Two additional clock cycles are used to calculate parameters k and m. Another two clock cycles are required to decode the Golomb-Rice code and obtain the decompressed pixel. At this point, FSM1 has already returned to the idle state and is ready to receive new data. FSM3 uses two more clock cycles to output the decompressed pixel and simultaneously update the parameter matrices A and N.  
When FSM1 returns to idle, it continues receiving one-bit data. If the next bit is \"0\", an additional bit is read. If the second bit is also \"0\", the run-length mode is selected. Data are continuously read one bit at a time, with each bit checked for \"0\" or \"1\". If a \"1\" is encountered, the value of A is output as the decompressed result. If a \"0\" is encountered, the value of A is output, and FSM1 returns to the idle state to decode new data. If two consecutive bits \"1\" and \"1\" are received, the non-coding mode is selected. In this case, four clock cycles are used to read the pixel components A, B, C, and D. One additional clock cycle is used to output the non-coded pixel data. During data output, three clock cycles are used to calculate mQ and mErrval. In the non-coding mode, if mErrval is less than or equal to 127, the parameter matrices must be updated. After completing the calculations, one clock cycle is used to allow FSM1 to return to the idle state. Immediately after the calculation, FSM2 is triggered. FSM2 checks whether mErrval is less than or equal to 127. If not, the state machine continues to execute. If the condition is met, four clock cycles are used to update the A and N matrices before FSM2 returns to idle. These three FSMs operating in parallel form a dynamic state machine system. FSM1 acts as the main controller, continuously selecting the decoding mode, outputting decompressed data, and delegating parameter calculations and updates to FSM2 and FSM3. The offloading of certain computations to FSM2 and FSM3 accelerates FSM1's return to the idle state, significantly improving decoding speed. Certain delay clock cycles are intentionally inserted into FSM1 to prevent data from being received too quickly. This ensures that parameter updates can be completed before new data are processed, avoiding the use of outdated parameters. Figure 7: Dynamic state machine of decompression core. The term dynamic refers to the behavior of the three parallel finite state machines within the decompression module, which interact and adapt their execution paths in real time based on the input data. Specifically, FSM1 dynamically determines the decoding mode based on the incoming flag bits. Upon selecting a mode, it delegates different computational tasks to FSM2 and FSM3 while continuing to receive new data, thus enabling continuous decoding without waiting for parameter updates to complete.