## 1 Introduction  
The growing demand for ultra-fast and energy-efficient data processing in modern optical communication systems has accelerated the development of all-optical logic gates (AOLGs). These gates eliminate the need for optical-to-electrical conversion, significantly reducing latency and power consumption while improving system throughput, making them indispensable in photonic networks and next-generation computing systems. AOLGs are essential for high-speed data routing and switching and are also increasingly applied in areas such as encryption, neuromorphic computing, and real-time signal processing [1, 2, 3, 4, 5, 6, 7, 8, 9, 10]. While traditional electronic systems have limitations in bandwidth and speed, photonic approaches offer parallelism and high data rates. Semiconductor optical amplifiers (SOAs) have been widely investigated among various technologies due to their nonlinear behavior, compactness, and integrability. However, conventional SOAs suffer from limitations such as slow carrier recovery times and gain saturation effects, which degrade their performance at high bit rates [11]. To overcome these drawbacks, the carrier reservoir semiconductor optical amplifier (CR-SOA) has emerged as a promising alternative. By incorporating an additional reservoir section, the CR-SOA facilitates faster carrier replenishment, leading to improved gain recovery and stronger nonlinear effects such as cross-phase modulation (XPM) and cross-gain modulation (XGM). These characteristics make CR-SOAs suitable for all-optical signal processing beyond 100 Gb/s [12]. When integrated into a Mach-Zehnder interferometer (MZI) configuration, CR-SOAs enable high-speed, low-power, and scalable logic operations due to the phase-sensitive interference properties of MZIs [13; 14]. The CR-SOA-MZI combination has been shown to offer high extinction ratios and excellent signal integrity, rendering it a key component for realizing AOLGs [15; 16; 17; 18; 19; 20; 21]. In our previous work [21], we explored the use of CR-SOA-MZI architecture for designing a high-speed all-optical half-adder. That study focused specifically on implementing XOR and AND logic functions for basic arithmetic operations. In contrast, the present work expands upon that foundation and explores the potential of the same device configuration in a broader logical context. Specifically, we numerically demonstrate an all-optical encoder (in the form of one-hot logic minterm generation) and comparator system capable of operating at 120 Gb/s, which supports five essential logic operations: \(\overline{\text{AB}}\), \(\overline{\text{AB}}\), AB (AND), \(\overline{\text{A}}\)\(\overline{\text{B}}\) (NOR), and AB + \(\overline{\text{A}}\)\(\overline{\text{B}}\) (XNOR). It is important to note that the term \"encoder\" is used here in a broad sense to describe the generation of logical minterms (one-hot encoded outputs) from two binary inputs. This functionality corresponds directly to that of a standard 2-to-4 decoder in digital logic, where each output line represents a unique input condition. We have retained the term \"encoder\" to emphasize the mapping of binary inputs into distinguishable logic states, while also clarifying its equivalence to decoding behavior. This shift from arithmetic to comparative and encoding logic operations represents a new configuration and functionality, leveraging the same device in a novel and more complex application domain. Recent research has made significant progress in developing all-optical encoders and comparators using both conventional SOAs and quantum-dot SOAs (QD-SOAs) [22; 23; 24; 25; 26]. For instance, [PERSON] et al. [22] demonstrated an ultrafast all-optical digital comparator based on QD-SOAs, achieving an enhanced speed and extinction ratio due to the discrete energy levels and fast carrier dynamics of quantum dots.