# Energy Efficiency Analysis of MIMO Wideband RF Front-End Receivers
## 2 Preliminaries  
### Receiver Circuit Designs  
Figure 1 illustrates the typical blocks for the LNA and LNTA architecture. In the figure, only the front-end part of the receiver is considered, i.e., until the intermediate frequency (IF). Seeking for a more realistic communication model, we selected some GHz band design examples from the state-of-the-art. The main features of these silicon-proven RF circuits are included in our model, according to Table 1. It is worth noting that our methodology for choosing the wideband RF front-end receivers is based on the power consumption and noise figure performance results presented by the circuit designs. Moreover, we have chosen three RF circuits for each architecture presenting similar receiver sensitivity. Common to all architectures is the fact that the receiver circuit designer works to optimize the RF front-end, with a special focus on the first block of the receiver chain, since it directly affects the receiver sensitivity and noise figure. The receiver sensitivity is the lowest received signal power at the antenna, for which the signal can be correctly decoded, and can be calculated (in dBm) as  
\[S_{\text{rx}}=N_{0}\;[\text{dBm}]+F_{\text{rx}}\;[\text{dB}]+10\;\log_{10}(B)+ \zeta_{0}\;[\text{dB}], \tag{1}\]  
where \(N_{0}=kT\) is the thermal noise power spectral density, in W/Hz, with \(k\) being the Boltzmann's constant and \(T=290\) K the temperature, \(B\) is the channel bandwidth and \(\zeta_{0}\) is the minimum signal-to-noise ratio (SNR) required for correct decoding. Moreover, \(F_{\text{rx}}\) is the cascaded noise figure of the receiver. In the nomenclature for circuit design, the noise figure is expressed in dB, while the noise factor is its linear form. Nevertheless, for simplicity, throughout this paper we will employ only the term noise figure, which is given by the Friis formula [20]  
\[F_{\text{rx}} =F_{\text{FirstBlock}}+\frac{F_{\text{SubsequentBlocks}}-1}{G_{ \text{FirstBlock}}} \tag{2}\] \[\approx F_{\text{FirstBlock}},\]  
where \(F_{\text{FirstBlock}}\) is the noise figure of the first block, which depends on the RF front-end receiver architecture, \(F_{\text{SubsequentBlocks}}\) is the combined noise figure of the subsequent blocks, which is divided by the power gain of the first block \(G_{\text{FirstBlock}}\). In addition, the total noise figure mainly depends on the first block, and the approximation is valid since \(G_{\text{FirstBlock}}\) is usually high, according to Table 1. Also, we consider that the RF receivers are operating in their linear region and interference is implicitly handled by an upper layer multiple access protocol, so that any residual interference can be accounted for as additional noise in our system model. Figure 2 illustrates the sensitivity of the RF circuits shown in Table 1 as a function of the power consumption, considering \(B=20\) MHz and \(\zeta_{0}=0\) dB. As we observe, small sensitivity can be obtained with both architectures, e.g., considering the LNA design from [12] and the LNTA from [17]. However, the advantage of improved receiver sensitivity is not always evident to maximize the EE, so that small power consumption may be of greater importance and the LNTA from [18] may also be interesting design choice. Such situation may be of particular interest when the communication distance increases, so that the transmitted power becomes much larger compared to the power consumption of the circuits. As a consequence, the relative advantages and disadvantages of each RF circuit design will be evaluated in order to maximize the EE.