## Appendix A  
Here, we show how we simulated Benes and dilated Benes numerically in order to test the accuracy of our \(\hat{\mathcal{C}}R\) expression. Also, we discuss the results of the simulations. A switch topology can be represented as a matrix decomposition of multiple stages and interconnections, as shown in Figure A1. Figure 10: \(\hat{\mathcal{C}}R\) expected using our technology. With \(\left(m,\ n_{j}\right)\in\mathbb{N}^{*}\times\mathbb{N}^{*}\) and \(j\in\left\{1,m\right\}\). The transfer matrix of the switch network can be seen as a product of the stage matrices:  
\[\prod_{j=1}^{m}I_{m-j+1} \tag{11}\]  
With,  
\[I_{j}=\left\{ \begin{array}{c}S_{j}\text{ {if }}j\text{ {an odd number}}\\ T_{j}\text{ {otherwise}}\end{array} \right. \tag{12}\]  
We define,  
\[S_{j}=\left\{ \begin{array}{c}M_{1j}\\ M_{2j}\\.\\.\\ M_{njj}\end{array} \right\} \tag{13}\]  
For \(i\ \in\left\{1,n_{j}\right\}\):  
\[M_{ij}=\left\{ \begin{array}{c}l_{MZI}\left(\begin{array}{cc}1-m&m\\ m&1-m\\ m&1-m\\ m&1-m\\ 1-m&m\\ \end{array}\right)\text{in {cross state}}\end{array} \right. \tag{14}\]  
The State of each \(M_{ij}\) depends on the network configuration. \(T_{j}\) is the interconnection matrix connecting two following stages, \(S_{j-1}\) and \(S_{j+1}\). This matrix model is detailed through the example of \(4\times 4-\) Benes (Figure 6). The following interconnection in Figure 12 can be modeled with the matrix \(T\) defined as:  
\[T=\left( \begin{array}{cccc}1&0&0&0\\ 0&xl_{X}&(1-x)l_{X}&0\\ 0&(1-x)l_{X}&xl_{X}&0\\ 0&0&0&1\\ \end{array} \right) \tag{15}\]  
Figure 11: Switch network represented by a matrix decomposition of multi-stage of MZIs and interconnections, \(S_{j}\) is a matrix of MZIs in a stage. \(T_{j}\) is the interconnection matrix connecting two stages, \(S_{j-1}\)_and_\(S_{j+1}\). We note: \(P_{out1}\),\(P_{out2}\),\(P_{out3}\),\(P_{out4}\), the four powers of the structure outputs. The expression of \(4\times 4\) - Benes can therefore be written as follows:  
\[\left( \begin{array}{c}P_{out1}\\ P_{out2}\\ P_{out3}\\ P_{out4}\end{array} \right)=\left( \begin{array}{c}M_{15}\\ M_{25}\end{array} \right)T\left( \begin{array}{c}M_{13}\\ M_{23}\end{array} \right)T\left( \begin{array}{c}M_{11}\\ M_{21}\end{array} \right)\left( \begin{array}{c}P_{in1}\\ P_{in2}\\ P_{in3}\\ P_{in4}\end{array} \right) \tag{10}\]  
and,  
\[M_{ij}=l_{MZI}\left( \begin{array}{cc}1-m&m\\ m&1-m\end{array} \right)\text{for }i,j\epsilon\left\{1,2\right\}\times\left\{1,3,5\right\} \tag{11}\]  
We have applied the matrix approach to implement Benes and dilated Benes for 2, 4, 8, and 16 switch sizes. Then we have tested several permutations of MZIs, corresponding to various possible paths, with the consideration that only one signal passes through an MZI in dilated Benes. The performance parameters used are: \(Xtalk_{MZI}=-20\) dB, \(Xtalk_{X}=-25\) dB, \(Loss_{X}=~{}0.03\) dB. The implementation of the matrix models was developed with Python, and the simulations were limited to N \(\leq 16\) because of the time requirement. The matrix simulation results, in black square dots on Figure 10 for both architectures, fit well to our \(\hat{SCR}\) model ones plotted as the solid blue line. In order to investigate the waveguide crossings effects, Figure 10 traces the \(\hat{SCR}\) values of Benes without taking into account the effects of waveguide crossings (solid red line), i.e., \(x~{}=~{}0\) and \(l_{x}=1\). As we can notice, the difference between the two curves increases with the number of inputs/outputs; this is due to the number of waveguide crossings becoming high in a large network. For dilated Benes, the results are presented in Figure 10. We observe that the gap between the two curves is even higher (from 15 to 18 dB to be compared to 5 dB max for Benes), that is because the waveguide crossing count in this architecture is much higher. As mentioned in Section 4.2, the accuracy of our model could decrease when waveguide crossing losses are important.