# Distributed Load-Balancing Method for CCA Parallel Component Applications
## 2 Materials and Methods
### Aggregation of the Computing Nodes
\begin{table}
\begin{tabular}{l l l l l} \hline \hline
**Location Module** & **In for Loops** & \
\begin{tabular}{l} **In While** \\ **Loops** \\ \end{tabular} &
\begin{tabular}{l} **In Recursive** \\ **Structures** \\ \end{tabular} & **Other** \\ \hline Pre & 9 & 8 & 3 & 5 \\ Topographic & 10 & 8 & 2 & 2 \\ PREinter & 8 & 5 & 6 & 3 \\ Inter & 9 & 7 & 4 & 6 \\ Background & 7 & 4 & 9 & 5 \\ VERinter & 8 & 7 & 2 & 8 \\ MM5 & 10 & 8 & 2 & 5 \\ Post & 11 & 9 & 3 & 7 \\ Pre & 9 & 8 & 3 & 5 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Location statistics of parallel component calls. Figure 7: Weather forecast application structure. 10-core servers (Intel Xeon Silver 4114 @ 2.20 GHz, 256 GB memory; nodes 34-36). The input data included weather information such as altitude, temperature, relative humidity, air pressure, and wind field within 48 h from 7 August to 8 August 2021, in Sichuan, China. The output was 48 h of precipitation data from 9 August to 10 August 2021. Table 3 presents the results of node aggregation on this heterogeneous cluster. Based on the results of the aggregation operation, we deployed a component application on Sc2. For the initial threshold values, we set LT = 2, MT = 10 for a single-core node, LT = 4, MT = 20 for a dual-core node, and LT = 16, MT = 80 for an 8-core node. Node 33 was selected as the startup node. During the application execution, the task information of the component instances was sent to the low-load nodes in Sc2, which generated the corresponding component instances and executed them. In multicore nodes, the CPU core is the basic unit that performs the tasks of the component instances. We counted the number of component instances completed on each CPU core and the time required to complete these tasks. In Figure 8, the 52 points on the \(x\)-axis each represent a CPU core. Points 1-28 represent the CPU cores on the first 14 dual-core nodes of sub-cluster Sc2. For example, points 1 and 2 represent the two CPU cores of node 8 (the first dual-core node in Sc2). Points 29-52 represent the CPUs of the last three 8-core nodes on Sc2; that is, the twenty-four CPU cores on nodes 31, 32, and 33. The \(y\)-axis represents the number of component instances completed by each CPU core. For the first 14 dual-core nodes, the CPU frequency is 3.60 GHZ, the average number of component instances completed by each CPU core is 34, and the variance is 3.6. As shown in Figure 8, the number of component instances completed on these CPU cores is approximately evenly distributed, which reflects the effect of our load-balancing mechanism. For the last three 8-core nodes, the average number of component instances completed by each CPU core is 28, which is slightly lower than that for the dual-core nodes. This is because the CPU frequency of the 8-core nodes is low (2.10 GHz). The variance in the number of component instances completed by the CPU cores of the 8-core nodes is 5.02, which is approximately evenly distributed. Our load-balancing mechanism embodies the principle of \"able people should do more work\". A CPU core with a strong processing capacity can quickly complete its existing tasks, thus returning to a low load status and becoming able to accept more new tasks. Meanwhile, our approximately even distribution does not imply that the numbers of component instances completed by the cores with the same frequency are identical. As Figure 8 reveals, CPU cores with the same frequency complete different numbers of instances. This is because the component instances vary in size. For CPU cores with the same frequency, over the same period, a core may be able to complete multiple small instances, whereas another core with large instances may only be able to complete one large instance. Figure 9 shows the statistics of the effective working time on each node. The effective working time refers to the total time spent running all component instances assigned to a CPU core.