## 4 Flat-Panel Beam-Steering Antennas with Low-Profile Phase Shifters with Fast Response
### Fast Tuning Low-Profile Planar Delay Line Phase Shifter  
To overcome the response time limitations for on-the-move applications, innovative approaches and concepts are required for LC-based phase shifters. An early approach in [61] was introduced with a finline-based phase shifter. Using MDA-03-2838, \(\tau_{\text{on}}\) and \(\tau_{\text{off}}\) have been 0.09 s and 14.3 s compared to 0.035 s and 4.7 s for K15, respectively, measured at 40 GHz. However, these values are still too slow. Very promising line topologies for fast LC-tunable phase shifters are periodically loaded lines [74; 175; 228], e.g., slot lines or microstrip lines with periodically thin overlapping areas filled with LC, which builds up LC varactors, as sketched in Figure 22.  
A very promising approach involves coplanar waveguides loaded with periodically arranged, very thin LC varactors with heights \(h_{LC}<5\) um [72; 175; 185; 225; 226; 227; 228]. This provides a significant reduction in switch-off response times down to less than 35 ms, when third-generation LC-filled varactors and a standard LCD process are used for production (see Section 4.3). A further advantage is the possibility of reducing the physical length of LC-based phase shifters due to the slow-wave effect of those structures. The schematic depiction of this concept is shown in Figure 23.  
Figure 22: Schematic of a serially loaded microstrip delay line with LC varactors, build up by an overlapping area of an interrupted microstrip line filled with LC. For the design, the waveguide is split into alternating \"pure\" CPW segments A and capacitive loaded (grounded CPW) segments B, having different line impedances \(Z_{lA}=\sqrt{\frac{L_{A}}{C_{A}}}\) and \(Z_{lB}=\sqrt{\frac{L_{B}}{C_{B}}}\). If those two segments are electrically short, the overall inductance \(L^{\prime}\) of the loaded line is approximately \((L^{\prime}_{A}+L^{\prime}_{B})/2\approx L^{\prime}_{A}/2\) and the capacitance corresponds to \((C^{\prime}_{A}+C^{\prime}_{B})/2\approx C^{\prime}_{B}/2\). Therefore, the relation between the specific capacitance \(C^{\prime}\) and inductance \(L^{\prime}\) of a homogeneous line can be decoupled in favor of a higher tunability by preserving a desired input impedance of the loaded line at the same time. The complex propagation constant for the entire structure becomes:  
\[\gamma\approx\sqrt{\left(\left(R^{\prime}_{A}+j\omega L^{\prime}_{A}\right)+ \left(R^{\prime}_{B}+j\omega L^{\prime}_{B}\right)\right)\left[\left(G^{\prime} _{A}+j\omega C^{\prime}_{A}\right)+\left(G^{\prime}_{B}+j\omega C^{\prime}_{B }\right)\right]}. \tag{11}\]  
It can be evaluated by using the aforementioned simulation tool, treating the dielectric and ohmic loss mechanisms in each of the line segments independently to calculate \(R^{\prime}_{A/B}\) and \(G^{\prime}_{A/B}\) for each tuning state, which results in four RF-eigenmode calculations for each section. A detailed analysis and a proof-of-concept of such CPWs loaded with periodically arranged LC varactors along the line was first reported in [185; 227; 228]. The design schematic of a realized unit element is illustrated in Figure 24 (right), where the dark gray printed patch is a floating electrode of dimension (\(w_{V,1}\times L_{V,1}\)) processed on the top layer and biased by Indium-Tin-Oxide (ITO) strips of 10 \(\upmu\)m width and 30 nm thickness (white colored). On the bottom layer, the CPW with width \(w\) and gap \(g\) is processed, where the center line widens to width \(w_{c}\) along the length \(L_{V,1}\) beneath the floating electrode. The relatively large overlapping area of \(w_{c}\times L_{V,1}\), where the center line underlies the floating electrode form the parallel plates of the capacitor with a small height \(<5\)\(\upmu\)m, being filled later with LC. Moreover, there are also ITO bias lines (gray) on the bottom layer, connecting the center line and the ground conductors, to assure that the center line is kept on the ground potential for DC or low AC bias voltages.