# Development of a Datalogger for Submarine Glider: Integration of Fault-Tolerant Software Layers
## 2 Datalogger Design
### Data Read  
For data reading, DMA was not used as the decoding time was higher than the data reading time, so the operations of reading and decoding a NAND flash page cannot be  
Figure 11: Finite state machine of writing in NAND Flash for writing. For the encoding and writing process of the NAND flash chip it is necessary to activate the DMA process. Note that the pointer reading process must be done before writing begins. At the end of writing, the pointer address always needs to be updated. performed on the microcontroller concurrently. In the case of reading NAND flash memory, the bottleneck is decoding and there is no significant improvement between using DMA or not using it. However, the reading process is not critical except that as in writing, a falling edge of R/B# event occurs and can be very fast. Instead of waiting for the falling edge and then the rising edge of R/B#, a delay time is placed. This prevents the microcontroller from waiting for the falling edge of R/B#. The data read from the NAND Flash memory are temporarily stored in a vector \(R\), which contains the codes stored by the encoder: message and parity bits. Once the memory chip is read and the R vector of 2040 bytes (8 \(\times\) 255 bytes) is filled, the decoding composed of the following:  
1 Syndrome computation. 2 Computing of the coefficients of the error locator polynomial. 3 Finding roots and reciprocals of the error locator polynomial. With the consequence of the reciprocals of the error locator polynomial, the error vector is obtained, where the erroneous positions take a value of logic one '1' in the coefficients of the error vector. The error vector is represented as the polynomial:  
\[e(x)=e_{0}+e_{1}x+e_{2}x^{2}+\cdots+e_{n-1}x^{n-1} \tag{9}\]  
Then, the XOR operation between vector \(e\) and \(R\) is performed to obtain the \(CP\) vector that contains the decoding of the vector received from the NAND flash memory chip. In case the error correction capability is greater than the added errors, which in our case are a maximum of 4 errors, then the \(CP\) vector will be the same as \(C_{PAG}\), which is the code written in the NAND flash memory chip. As can be seen in Figure 12, the 2040-byte \(CP\) code is processed and the parity bits are removed. Then, the transmission consists on send 1784 (8 \(\times\) 223) bytes. These data are of interest to the user: the message. The syndrome calculation is the very first step to perform the decoding process which involves replacing the value \(\alpha^{i}\) in the polynomial expression \(r(x)\). \(\alpha^{i}\) are elements of the \(GF(2^{8})\) generated by a primitive polynomial \(p(x)\). The replacement is  
\[S_{i}=r(\alpha^{i}) \tag{10}\]  
where \(i=1,2,\ldots,2t\), for our case, \(i=1,2,3,4,5,6,7,8\), having eight elements for the syndrome \(S_{1},S_{2},\ldots,S_{8}\). To determine the coefficients \(\Lambda_{i}\) of the error locator polynomial \(\Lambda(x)=1+\Lambda_{1}x+\cdots+\Lambda_{n-1}x^{n-1}\), a Peterson's algorithm with a correction of \(t=4\) is used, the equation to solve is \(A\cdot\Lambda=S\) that can also be written as follows:  
\[ \begin{vmatrix}1&0&0&0\\ S_{2}&S_{1}&1&0\\ S_{4}&S_{3}&S_{2}&S_{1}\\ S_{6}&S_{5}&S_{4}&S_{3}\\ \end{vmatrix}\begin{vmatrix}\Lambda_{1}\\ \Lambda_{2}\\ \Lambda_{3}\\ \Lambda_{4}\\ \end{vmatrix} = \begin{vmatrix}S_{1}\\ S_{3}\\ S_{5}\\ S_{7}\\ \end{vmatrix}  \tag{11}\]  
Once the coefficients of the error locator polynomial are determined, its associated roots are now estimated. Therefore, the found polynomial is  
\[\Lambda(x)=1+\Lambda_{1}x+\Lambda_{2}x^{2}+\Lambda_{3}x^{3}+\Lambda_{4}x^{4} \tag{12}\]  
Figure 12: Block diagram of the reading NAND flash memory chip process. If the correction capability is grater than the errors, the error vector \(e\) contains the erroneous bits to be corrected. To calculate each root, \(x\) is substituted by the value of the Galois-extended-field roots. This process is implemented to find all roots is the Chien algorithm where each value \(x\) is substituted in the error locator polynomial.