# Area-Efficient Universal Code Generator for GPS L1C and BDS B1C Signals
## 5 Experimental Results  
Using the CMOS 65 nm process, the proposed universal code generator, a memory-based universal code generator (MB UCG) [14; 15], a Legendre-generation universal code generator (LG UCG) [16], and a Weil-generation universal code generator (WG UCG) [17] were implemented using Verilog HDL and simulated with Cadence NC-Verilog 13.1.  
To verify valid code generation, all the codes generated from the proposed universal code generator, MB UCG, LG UCG, and WG UCG are compared with the code provided from the official ICD. According to the experiments, all the codes generated from code generators and provided from the official ICD are the same. For instance, Figure 6 shows the snapshot of the first and last 24 chips for the BDS B1C codes of PRN1, and each of the 24 chips are the same as those from the official BDS B1C ICD [7]. As a result, we verified that all the codes are correctly computed, and it implies that all the codes can be used for acquisition and tracking in a GNSS receiver.  
Figure 5: Proposed universal code generator.  
Table 5 summarizes the results of the synthesis using Synopsys Design Compiler 2015.06-SP2 with the operating frequency 200 MHz. Since the memory-based universal code generator [14; 15] stores the codes by signal (GPS L1C, BDS B1C), by channel (Data, Pilot), and by satellite (1-63) in the ROM, it has a 925K equivalent gate count, which is the largest area among the universal code generators. The Legendre-generation universal code generator [16] reduced the size of the entire ROM by storing the parameters by signal (GPS L1C, BDS B1C), by channel (Data, Pilot), and by satellite (1-63) in the ROM but has a 279K equivalent gate count due to the RAM necessary to generate Legendre sequences on the fly and store the generated Legendre sequences, and due to the generation circuit. Next, the Weil-generated universal code generator [17] has a 46K equivalent gate count because the RAM was completely removed, although it uses a ROM larger than that of the Legendre-generated universal code generator [16].  
Lastly, the proposed universal code generator reduced the hardware complexity to a 19K equivalent gate count by sharing the Legendre ROMs and associated circuitry that is used repeatedly in the Weil-generated universal code generator [17]. In summary, the proposed universal code generator has an area reduced by 98%, 93%, and 60% compared to the memory-based universal code generator [14; 15], the Legendre-generated universal code generator [16], and the Weil-generated universal code generator [17], respectively. From the viewpoint of the system, if the code generator in the GNSS receiver provides throughput not smaller than several Mbps, the entire system is not degraded. The proposed universal code generator requires six clock cycles per code bit at the maximum for time  
\begin{table}
\begin{tabular}{c c c c} \hline \hline
**Metrics** & **MB UCG**[14; 15] & **LG UCG**[16] & **WG UCG**[17] & **Proposed UCG** \\ \hline Operating frequency & 200 MHz & 200 MHz & 200 MHz & 200 MHz \\ Critical Path Delay & 4.91 ns & 4.92 ns & 4.93 ns & 4.92 ns \\ Equivalent Gate Count & 925K & 279K & 46K & 19K \\ Normalized EGC a  & 100\% & 30.1\% & 4.97\% & 2.05\% \\ Max Additional CC b  & 0 & 0 & 6924 CC & 6 CC \\ Throughput c  & 200 Mbps & 200 Mbps & 200 Mbps & 33 Mbps \\ \hline \hline \end{tabular}
\end{table}
Table 5: Synthesis results.  
Figure 6: Simulation results. (**a**) First 24 chips for BDS B1C codes of PRN1. (**b**) Last 24 chips for BDS B1C codes of PRN1.  
multiplexing, but there is no degradation in the overall receiver performance. The code rate of GPS L1C signals and BDS B1C signals is 1.023 Mbps, and the proposed universal code generator has a code rate of 33 Mbps. Consequently, the proposed code generator has the least hardware complexity by removing redundant hardware without affecting the overall system performance.