## 1 Introduction  
Tri-gate FinFET structures have been adopted in industry since the 22 nm technology node, due to their three-dimensional design that improves short-channel effect control and reduces leakage currents. However, this also leads to more pronounced hot carrier injection (HCI) effects in short-channel devices [1]. HCI-induced degradation causes threshold voltage drift and reduced mobility, significantly impacting device performance and life. It also contributes to delayed degradation in circuits, affecting their operational speed. Increasingly, research and circuit design are incorporating the effects of the aging of HCI early in the design phase and physical implementation, requiring the support of relevant aging models [2]. In 1985, [PERSON] et al. proposed the lucky electron model (LEM), which includes the Si-H bond breaking process. According to this model, electrons in the channel gain sufficient energy from the maximum electric field to overcome the interfacial potential barrier, causing the Si-H bond to dissociate. Consequently, the maximum electric field in the channel becomes a key parameter in this model [3]. In addition to modeling chemical bond dissociation, many researchers have focused on the carrier energies responsible for bond dissociation. In 2002, [PERSON] proposed a model for generating interfacial traps through multiple electron vibrations. This model links the lifetime of the device to the magnitude of the source leakage current, suggesting that a larger leakage current increases the probability of multiple electron vibrations, which, in turn, accelerates bond dissociation and device degradation [4]. Subsequently, instead of an electric-field-driven mechanism, a model based on an energy-driven mechanism was proposed. This highlights the significant impact of electron-electron scattering on the energy distribution function (EDF) [5]. Through continuous refinement, single vibrational excitation (SVE), electron-electron scattering (EES), and multiple vibrational excitation (MVE) have been integrated, highlighting the significant role of carriers in a low-energy state in the degradation caused by cold channel carriers (CHC). It also effectively explains the transition of the worst stress condition for hot carriers injected at low-tech nodes, from \(V_{\rm G}=\frac{V_{\rm D}}{2}\) to \(V_{\rm G}=V_{\rm D}\)[6]. The model has been widely used in HCI studies, showing strong predictive performance for reliability data in LDMOSFETs, devices of high and low thresholds, and devices in various nodes of technology [7; 8]. Also, it is used in Sentaurus technology CAD (TCAD) and the reliability simulation tool MOSRA, showing a good fit to the experimental data [9]. At low technology nodes, the HCI effect is inadequately described by previous models in two main ways. First, the structure of FinFETs introduces additional reliability and process challenges, including the following:  
1. The three-dimensional structure of FinFETs leads to varying crystal orientations in the silicon substrate, creating multiple interfaces between the silicon and oxide. This increases the number of sidewall traps on the fins, thereby enhancing HCI degradation [10]. 2. The use of high-K and metal gates (HKMG) alters the dominant HCI degradation and trap generation mechanisms. 3. The heat generated by current flow through the channel is difficult to dissipate, resulting in self-heating. In FinFETs, the complex fin heat dissipation structure causes a more obvious increase in channel temperature, making self-heating a significant coupling effect that must be considered [11]. On the other hand, most of the aforementioned models have limitations. The aging function is typically expressed as Age \(\propto\left(\frac{I_{\rm sh}}{I_{\rm ds}}\right)^{m}\) in both electric-field-driven models and energy-driven models, where the aging lifetime under HCI is written as \(\tau\propto\left(I_{\rm sub}^{m}\right)^{-l}\)[12].