## 2 Structure of the EVLONE140W Charging System  
Figure 1 shows a block diagram of the EVLONE140W [35] dedicated charging system for mobile device batteries with the main components highlighted, manufactured by ST Microelectronics. The circuit is a cascade combination of a PFC controller, a High-Voltage DC to Low-Voltage DC converter in the Flyback topology, and a USB PD 3.1 technology controller performing the fast charging function with Extended Power Range (EPR) for mobile device batteries. A detailed schematic diagram of the EVLONE140W circuit solution is given in [35]. The PFC circuit was developed using the L6563S [36] controller operating in the transition mode PFC. This driver controls a high-voltage STL36N60M6 [37] n-type MOSFET. This transistor has a maximum voltage between the drain and the source V\({}_{\text{DSmax}}\) = 600 V and a maximum drain current I\({}_{\text{Dmax}}\) = 25 A. The on-channel resistance R\({}_{\text{DSon}}\) of the transistor under consideration has a value equal to 91 m\(\Omega\). The transistor is mounted in an 8 \(\times\) 8 mm PowerFLAT enclosure dedicated to high-voltage (HV) solutions. A key component of the dedicated charging circuit is the Flyback converter driver with the manufacturer's designation ST-ONEHP. This circuit includes a Zero-Voltage Switching (ZVS) inverter controller and a 32-bit Advanced Risc Machine (ARM) Cortex M0+ core microcontroller in its structure. The microcontroller is used to generate control waveforms for the MOSFETs operating as switches on the primary side of the Flyback converter, and there is also a USB PD 3.1-based controller in its structure. Figure 1: Block diagram of the EVLONE140W dedicated charging system. The converter under consideration is controlled on the primary side, and the switching devices are two series-connected p-MOSFETs. These transistors are contained in a single Quad Flat No-Leads (QFN) housing with the dimensions of 9 \(\times\) 9 mm. The transistor module used, designated MASTERGAN1 [38], was fabricated using the GaN technology and features a maximum drain-to-source voltage of V\({}_{\text{DSmax}}\) = 600 V, a maximum drain current I\({}_{\text{Dmax}}\) = 10 A, and an on-channel resistance value R\({}_{\text{DSon}}\) = 150 m\(\Omega\). Figure 2 shows a view of the Printed Circuit Board (PCB) of the EVLONE140W circuit with the most important components of the topology used marked. The PCB area of the charging circuit under test was 4.1 dm\({}^{2}\). The operating parameters of the EVLONE140W charging system under consideration are summarized in Table 2.  
The charging system under study was supplied with AC voltage from the power grid with an RMS value V\({}_{\text{inRMS}}\) ranging from 90 to 250 V and a power grid frequency f\({}_{\text{line}}\), whose value can vary from 47 to 63 Hz. The USB PD 3.1 technology allows the charging system to operate with different output voltages V\({}_{\text{out}}\), and the tested system delivers voltages of 5, 9, 15, 20, and 28 V with output currents I\({}_{\text{out}}\) equal to 3.75 A @ (5, 9, and 15 V) and 5 A @ (20 and 28 V), respectively. The topology tested allows for operation with a maximum output power P\({}_{\text{out}}\) not exceeding 140 W. The average energy efficiency \(\eta_{\text{avg}}\) of the tested system when operating at the maximum output power does not exceed 92.58% and does not depend on the RMS value of the power grid voltage.