# An Efficient On-Chip Data Storage and Exchange Engine for Spaceborne SAR System
## 2 Analysis of Storage and Exchange Efficiency for SAR Data
### Analysis of Storage Access Characteristics for DDR3 SDRAM
The direction of radar antenna irradiance is frequently known as the range, and the direction of radar satellite flight is referred to as the azimuth. Each range line in the data matrix corresponds to a row, and each azimuth line corresponds to a column. Therefore, the range direction and the azimuth direction can be regarded as two directions of a two-dimensional matrix, respectively. In the following section, we will investigate the cause of the two-dimensional data's unbalanced access efficiency by calculating the access efficiency of range and azimuth of the traditional SAR data that are stored sequentially. The data on one range or azimuth line must be stored in multiple rows of DDR3 storage cells due to the massive amount of data in the SAR two-dimensional matrix. The burst length in a typical DDR3 storage structure is set to 8 and contains 1024 cells per row. For traditional two-dimensional data access, the data in the range direction only need to be accessed in the order of DDR3 rows, but the data in the azimuth direction can only be accessed through multiple row-crossing. Therefore, the burst transmission for the range access is \(n=1024/8=128\). The read and write efficiency of access in the range is calculated using the MT8 KTF51264 HZ-1G9 memory chip datasheet by converting its above parameters (\(t_{RCD}\), \(t_{CWL}\), \(t_{WR}\), \(t_{RP}\), and \(t_{RTP}\)) into multiples of \(t_{CK}\) as follows:  
\[\eta_{WRITE\_range}=\frac{128\times 4t_{CK}}{t_{RCD}+t_{CWL}+128\times 4t_{CK}+t_{ WR}+t_{RP}}=92.25\% \tag{3}\]  
\[\eta_{READ\_range}=\frac{128\times 4t_{CK}}{t_{RCD}+t_{RTP}+128\times 4t_{CK}+t_{ RP}}=94.64\% \tag{4}\]  
For the azimuth access, only one burst transmission per range line is required for azimuth data access on the next range line; therefore, \(n=1\). The following formula calculates the read and write efficiency of access in the azimuth. \[\eta_{WRITE\_ azimuth}=\frac{1\times 4t_{CK}}{t_{RCD}+t_{CWL}+1\times 4t_{CK}+t_{WR}+t_{ RP}}=8.51\% \tag{5}\]  
\[\eta_{READ\_ azimuth}=\frac{1\times 4t_{CK}}{t_{RCD}+t_{RTP}+1\times 4t_{CK}+t_{ RP}}=12.12\% \tag{6}\]  
As shown in Figure 2, the CS imaging algorithm must execute various range and azimuth transposition operations. The traditional SAR data sequential storage method was calculated as shown in the above, and the range access efficiency showed a small efficiency loss compared to the ideal efficiency. However, the efficiency of azimuth access showed a large loss due to the need for frequent row-crossing access. The maximum bandwidth of azimuth access is only about 12% of the peak bandwidth of DDR3 read and write. The theoretical peak read or write bandwidth is:  
\[B=800\text{ M}\times 64\text{ bit}\times 2=12.5\text{ GB}/\text{s} \tag{7}\]  
After considering the loss of efficiency caused by row activation, pre-charging, etc., the actual DDR3 read and write bandwidth is:  
\[B_{\eta}=B\times\eta \tag{8}\]  
Figure 2: Procedure of sequential storage mapping. When the calculated reenge and azimuth read and write efficiency are substituted into the above formula, the two read and write bandwidths listed in Table 1 can be obtained.