# Constrained Optimization of FPGA Design for Spaceborne InSAR Processing
## 5 Experimental Results and Discussion
### Verification and Comparison of System Performances
\begin{table}
\begin{tabular}{c c c c c} \hline \multicolumn{5}{c}{**Accuracy**} \\ \hline  & & & **Relative Error** & **Absolute Error** \\  & Phase & & 2.7 \(\times\) 10\({}^{-3}\) & 2 \(\times\) 10\({}^{-7}\) \\  & Coherence coefficient & & 4.4 \(\times\) 10\({}^{-3}\) & 1 \(\times\) 10\({}^{-7}\) \\ \hline \multicolumn{5}{c}{**Efficiency**} \\ \hline  & & Ours & [24] & [42] \\  & FPGA & DSP & GPU NVIDIA \\  & Platform & Virtex-7 & TMS320C6678 & GTX Titan Black \\  & & 100 MHz & multicore 1 GHz & 980 MHz, 2880 cores \\ \hline \multirow{3}{*}{\
\begin{tabular}{c} Interferogram generation \\ (\(\times\)10\({}^{6}\) points/s) \\ \end{tabular} } & Image (points) & 16,384 \(\times\) 4096 & 2048 \(\times\) 2048 & 1494 \(\times\) 1505 \(\times\) 1510 \(\times\) 21,478 & 25,392 & 24,531 \\  & Time (ms) & 164.7 & 710 & 866.52 & 83.41 & 98.92 & 97.31 \\  & Throughput & 407.46 & 94.52 & 4.84 & 384.70 & 386.32 & 380.66 \\ \hline \multirow{3}{*}{
\begin{tabular}{c} Coarse registration \\ (\(\times\)10\({}^{6}\) points/s) \\ \end{tabular} } & Image (points) & 512 \(\times\) 512 & & 512 \(\times\) 1024 \(\times\) 2048 \(\times\) & n/a & n/a & n/a \\  & Time (ms) & 9.24 a  & 11.16 b  & 39.75 c  & 7.182 & 17.79 & 57.52 & n/a & n/a & n/a \\  & Throughput & 28.37 & 23.49 & 6.59 & 36.50 & 58.94 & 72.92 & n/a & n/a \\  & (\(\times\)10\({}^{6}\) points/s) \\ \hline \end{tabular}
\end{table} 
Table 11: Comparison of the accuracy and efficiency of FPGA, DSP, and GPU. the throughput of DSP (i.e., 72.92 \(\times\) 10\({}^{6}\) points/s) was over twice as large as that of FPGA (i.e., 28.37 \(\times\) 10\({}^{6}\) points/s), which showed that DSP had better processing capacity in the coarse registration. However, the time of coarse registration only took up less than 10% of the entire time, which meant that coarse registration had little influence on the overall processing capacity of the system. Therefore, it was feasible to realize coarse registration and interferogram generation based on FPGA to process remote sensing images efficiently. The processing capacity could be further improved when the working clock frequency of FPGA rose. The experimental results indicated that the proposed method could be applied to InSAR on-board processing in the field of ocean observation. With a broader area, the amount of global ocean observation data was much larger than that of land observation. That said, the traditional processing methods on the ground were unsuitable because of the limited satellite-ground communication network speed. By reducing the volume downlink data, on-board processing could fulfill the requirements in ocean observation. Thus, the proposed method could contribute to ocean observation research by improving the performance of spaceborne remote sensing processing  
To our best knowledge, little research has applied on-board processing technology to other fields, such as landslide detection, planetary mission, and volcano monitoring, etc. These fields prioritize obtaining high-precision tiny deformations to extract landslide, planetary, and volcano information. In other words, these fields put more emphasis on high resolution instead of real-time performance at the current stage. However, with the development of on-board processing and multi-satellite collaboration technology [57; 58], more complex algorithms of InSAR could be realized. In the future, it is possible that on-board processing technology could also be applied in other InSAR scenarios, which requires more research to balance the needs for accuracy and timeliness. Focusing on the key issue of on-board processing, that is, the trade-off between resources and processing capacity, this method could be applied in on-board processing technology. Besides, the method can also be applied to other fields, such as edge computing [59; 60] and UAV platforms [61] etc.