# Free Space Optic Receiver with Strongly Overlapped Photodetectors' Field of View
## 3 FSO Receiver Assembly  
The discussed FSO receiver consists of several blocks (Figure 8). Given \(s\) photodetectors used, there are \(s\) follow-up amplifiers, in other words, \(s\) PDAs. The PDA count is determined by the truncated pyramid wall count. Here, \(s\) = 6. PDA amplification is kept constant with well-defined circuit parameters and feasible noise optimization. PDA outputs are summed and amplified with a variable gain amplifier (VGA). Due to the FSO receiver's mobility, the VGA block is essential. The input optical useful signal power does not have the same value over time; it changes with the distance of the optical transmitter from the receiver and the optical channel's parameters. The receiver's gain must therefore be permanently adjusted, otherwise either a lack or excess of the receiver's output signal power would occur. A lack of power would mean loss of the connection, whereas an excess would deteriorate the signal to noise ratio. To provide correct and invariable output signal power, the power is measured by the detector block and compared to the reference voltage block \(V_{ref}\). The optimal gain value of the VGA is set according to the obtained voltage difference \(V_{diff}\).  
Figure 8: FSO receiver block diagram.  
_Detailed Circuit Diagram of the FSO Receiver_  
Since this paper deals mainly with PDA design, only a PDAs circuit diagram is provided. The remaining blocks are rather universal and may be substituted by any circuit that fulfils their function. Notably, low noise circuits are required.  
A detailed circuit diagram is shown in Figure 9. At the right of Figure 9 are six PDA cells, each including a photodiode BP104F (D1-D6), operational amplifier OPA627 BP (IC1-IC6), feedback resistors 3 \(\times\) 13 k\(\Omega\) (R1-R18), and feedback variable capacitor 1.5-5 pF (C1-C6). The feedback resistance and capacitance values are listed in Table 2. No standard series 42 k\(\Omega\) resistor was available, so it was replaced by the closest lower value resistor of 39 k\(\Omega\). Three 13 k\(\Omega\) resistors were used in order to minimize intrinsic terminal capacitance and PCB stray capacitance. This was necessary because of the low predicted capacitance \(C_{fb}\) = 2.53 pF and a non-zero capacitance of 1.5 pF in the variable capacitor. At the left of Figure 9 are the voltage reference MC1404U10 (ON Semiconductor, Phoenix, AZ, USA, 2006) (IC7) and reference voltage inverter OP27 (IC8). Both are low noise devices.  
The next step included innovations to reduce noise to a minimum and for uncorrelated elementary PDAs. The photodiode cathode voltages were fixed, whereas the anode voltages varied according to the resistive divider branch selection (R39-R48). There is no variable resistor because of excessive noise coming from its wiper and resistive lane connection. Even though the maximum allowed reverse voltage was recommended, it decreases exactly when higher flicker noise photodiodes are encountered [1]. To keep the PDA noise uncorrelated, the photodiodes were fed through low-pass filters (R19-R30, C7-C18). Capacitors C13-C18 also eliminate noise currents in the operational amplifier noninverting inputs. Resistors R31-R36 separate possible external capacitive loads and operational amplifier outputs. As a result, the stability of the operational amplifiers is independent of the load conditions and cabling. The PDA outputs are summed in the next stage (VGA circuit).  
Figure 9: PDAs circuit diagram. PDAs: photodetector assemblies.