# DC Converter with Wide Soft Switching Operation, Wide Input Voltage and Low Current Ripple
## 5 Design Steps and Experimental Verifications  
The proposed circuit was created and experimented in a laboratory prototype with \(V_{in}\) = 20-80 V (4:1 ratio), \(V_{o}\) = 400 V, series resonant frequency \(f_{r}\) = 100 kHz and the maximum output power \(P_{o}\) = 500 W. Two boost circuits with interleaved PWM are employed on the input side to achieve a ripple-free input current. For low input voltage mode, the input voltage range \(V_{in}\) is between 20 and 40 V. The full-bridge-type \(LLC\) converter is operated to control load voltage. When input voltage \(V_{in}\) = 40 V-80 V, the proposed circuit is worked under the high voltage mode with the half-bridge-type \(LLC\) converter. Since the duty cycle \(d_{S1}=d_{S2}=d_{S3}=d_{S4}=0.5\), the inductances \(L_{1}\) and \(L_{2}\) are obtained in Equation (7) with the defined inductor ripple currents \(\Delta i_{L1}=\Delta i_{L2}\) = 4 A at resonant frequency \(f_{sw}\) = 100 kHz. \[L_{1}=L_{2}=\frac{V_{in,\min}T_{sw}}{2\Delta i_{L1}}=\frac{80\times 10^{-5}}{2 \times 4}\approx 100\mu H \tag{7}\]  
Figure 4: Gain curves of presented converter at \(V_{in}\) = 20–80 V.  
To design the resonant converter, the inductor ratio \(L_{n}=5\) is adopted at maximum power under the full-bridge converter. The curves of voltage gain at the presented converter are demonstrated in Figure 4 with the normalized gain \(G_{n}=nV_{o}/4V_{in}\). The transient voltage between high and low input voltage modes is set at 40 V. The voltage comparator (schmitt trigger circuit) with \(\pm 2\) V voltage tolerance is used at 40 V to achieve transient voltage detector. Therefore, the input voltage range at low voltage mode operation is from 20 to 42 V. Similarly, the input voltage range at high voltage mode operation is from 38 to 80 V. The transfer function of voltage gain \(G\) for each voltage mode is expressed in (5). Since the input voltage range at high voltage mode is two times the input voltage range at low voltage mode \(V_{in,\,H}=2V_{in,\,L}\), it can obtain that voltage gain \(G_{H}\) at high voltage mode is identical to the voltage gain \(G_{L}\) at low voltage mode. Hence, the circuit design for two input voltage modes are identical. The full-bridge \(LLC\) converter is operated for low input voltage mode. \(S_{1}\)\(\sim\)\(S_{4}\) are controlled to make \(V_{o}=400\) V. It is assumed that the voltage gain at 40 V input is unity. The necessary turn ratio \(n\) is calculated in Equation (8). \[n=\frac{4 GV_{in,L}}{V_{o}}=\frac{4\times 1\times 40}{400}=0.4 \tag{8}\]  
TDK (Tokyo Denki Kagaku) EER 42 core is used to implement transformer \(T\) with \(N_{p}=14\) and \(N_{s}=35\). The maximum and minimum voltage gain under low voltage mode operation are expressed in Equations (9) and (10). \[G_{\max}=\frac{nV_{o}}{4V_{in,L,\min}}=\frac{0.4\times 400}{4\times 20}=2 \tag{9}\]  
\[G_{\min}=\frac{nV_{o}}{4V_{in,L,\max}}=\frac{0.4\times 400}{4\times 42}\approx 0.95 \tag{10}\]  
The fundamental resistance \(R_{ac}\) in (4) is calculated as:  
\[R_{ac}=\frac{2n^{2}}{\pi^{2}}R_{o}\approx 10.38\Omega \tag{11}\]  
Based on voltage gain in Figure 4, the load voltage \(V_{o}\) is controlled well under \(Q<0.22\). The circuit parameters \(L_{r}\), \(L_{m}\) and \(C_{r}\) are obtained in (12)-(14) according to the selected values \(f_{r}=100\) kHz, \(L_{n}=5\) and \(Q=0.2\). \[L_{r}=\frac{QR_{ac}}{2\pi f_{r}}=\frac{0.2\times 10.38}{2\pi\times 100,000} \approx 3.3\mu H \tag{12}\]  
\[L_{m}=L_{n}L_{r}=5\times 3.3=16.5\mu H \tag{13}\]  
\[C_{r}=\frac{1}{4\pi^{2}L_{r}f_{r}^{2}}=\frac{1}{4\pi^{2}\times 3.3\times 10^{-6 }\times\left(100,000\right)^{2}}\approx 768 nF \tag{14}\]  
Owing to the fact that voltage double rectifier topology is used on the output side, the voltage ratings of switches and diodes are obtained in Equations (15)-(17).