## 3 Circuit Design
### Principle of Distributed Amplifier
The reverse gain is the gain from the signal input port  
Figure 5: Model of double transmission line: (a) Double transmission line, (b) Equivalent model. to the terminal impedance of the drain transmission line [13]. The existence of reverse gain is one of the factors of low efficiency. The authors of [7] show that the circuit can be matched to the best load by adjusting the size of different transistors. The current flow diagram of any two adjacent transistors in an inhomogeneous structure can be seen in Figure 3:0 According to the principle of the microwave, the positive and negative currents in Figure 8 can be expressed as Formulas (7) and (8). When the characteristic impedance of each drain transmission line in the non-uniform structure satisfies Formula (9), the reverse current offsets almost all the current flows to the load, which improves the efficiency of the distributed amplifier. Figure 3:1  
Figure 3:2  
Figure 3:3  
As shown in Figure 9, in order to better absorb the reverse current of the drain transmission line, some scholars replace the absorption impedance with a nonuniform  
Figure 3:4 Current flow diagram of adjacent transistors in non-uniform structure. Figure 3:5 Equivalent circuit of gate ATL. Figure 3:6 Equivalent circuit of drain ATL. drain transmission line, by changing the characteristic impedance \(Z_{0,n}\) of each transmission line. On account of the parasitic capacitance, the transistor can affect the cut-off frequency of the amplifier and the \(C_{ds}\) is much smaller than the \(C_{gs}\), so the gate ATL cutoff frequency is the most important factor limiting NDPA bandwidth. In order to improve the cutoff frequency, most scholars connect small capacitors in series at the gate to reduce the value of the equivalent capacitance \(C_{gn}\). Additionally, the series resistor \(R_{gn}\) supplies power to the gate bias voltage, and the RC structure can also improve the stability of the entire circuit. Due to a large resistor, \(R_{g}\) is connected in parallel to provide a bias path. If the NDPA adopts the method of ATLAS to absorb C, the device can be simply equivalent to pure resistance characteristics. Therefore, the nTH power-saving circuit can be simply equivalent as shown in Figure 10[9; 10]. It is assumed that if all devices in the NDPA have the same bias conditions and excitation levels, to ensure the best match of the NTH tube, then  
Figure 3:7  
Which defines the output impedance per millimeter of the device,  
Figure 3:8  
Figure 3:9  
Figure 5.0 Equivalent circuit diagram of the nTH core. Figure 5.1 A typical NDPA topology for improving cutoff frequency. In order to ensure maximum power transmission to the load, so  
Figure 5.2  
It can be seen from Figure 10 that the total gate width of the NDPA is determined by the output impedance of each millimeter wave of the device and the terminal impedance of the circuit, and the output power is determined by the total gate width of the device. The output impedance per mm is determined by the material and process. Through the simulation of the DC characteristics of the model, when the drain bias is 28 V, the gate width is 0.5 mm and the point of the current is 146 mA. At this time, the impedance per millimeter of the 0.25 \(\upmu\)m GaN HEMT is calculated to be 94 Ohm\(\cdot\)mm, and only this result is used for approximate calculation. The total gate width of the device was calculated and determined as 1.88 mm according to Equation (13). In order to trade-off chip size and gain, a four-section topology is adopted. Figure 11 shows the simulation values of each device in the actual simulation schematic. Since the DA sacrifices efficiency to expand bandwidth, the efficiency of the DA is generally low. In order to improve efficiency, a harmonic suppression network is added to the drain output port in the actual design.