# An Automatic Detection Method for Cutting Path of Chips in Wafer
###### Abstract  
Microscopic imaging is easily affected by the strength of illumination, and the chip surface qualities of different wafers are different. Therefore, wafer images have defects such as uneven brightness distribution, obvious differences in chip region characteristics, etc., which affect the positioning accuracy of the wafer cutting path. For this reason, this thesis proposes an automatic chip-cutting path-planning method in the wafer image of the Glass Passivation Parts (GPPs) process without a mark. First, the wafer image is calibrated for brightness. Then, the template matching algorithm is used to determine the chip region and the center of gravity position of the chip region. We find the position of the geometric feature (interlayer) in the chip region, and the interlayer is used as an auxiliary location to determine the final cutting path. The experiment shows that the image quality can be improved, and chip region features can be highlighted when preprocessing the image with brightness calibration. The results show that the average deviation of the gravity coordinates of the chip region in the \(x\) direction is 2.82 pixels. We proceeded by finding the interlayer in the chip region, marking it with discrete points, and using the improved Random Sample Consensus (RANSAC) algorithm to remove the abnormal discrete points and fit the remaining discrete points. The average fitting error is 0.8 pixels, which is better than the least squares method (LSM). The cutting path location algorithm proposed in this paper can adapt to environmental brightness changes and different qualities of chips, accurately and quickly determine the cutting path, and improve the chip cutting yield. microscopic vision; visual inspection; chip; wafer cutting; interlayer 2021 4 59 10.3390/114010059 10.3390/114010059 10.  
determined. Correctly locating the position and attitude of the Mark point or chip region is the prerequisite for determining the cutting path. Its positioning accuracy determines the accuracy of the cutting path. The higher the accuracy, the less likely the chip will be damaged, and the higher the yield of the chip production. The number of Mark points on the wafer is mostly one or two. We use the \(x\), \(y\) translation stage to find the Mark points and determine the rotation angle and street location of the wafer according to the position and attitude of the Mark points [3; 4]. When there is only one Mark point on the wafer, the rotation angle of the wafer is the same as that of the Mark point. When there are two Mark points, the angle between the connecting line between the two Mark points and the horizontal direction is used as the rotation angle of the wafer. We repeatedly measure the rotation angle of the wafer and straighten it until the rotation angle is less than a certain threshold, and the street location is determined by the location of the Mark point (the Mark point is located in the center of the block). When there is no Mark point in the wafer, the wafer rotation angle and block position are determined by the chip area, or directly determine the block position in the image. Common methods for detecting the wafer rotation angle and cutting path include the template matching algorithm [5], the contour edge detection algorithm [6; 7; 8; 9; 10; 11], and the establishment of neural networks [12; 13]. [PERSON] et al. (2005) first smoothed the image, enhanced the image with histogram equalization, and finally determined the location of the chip region in the image with the Sum of Squared Differences (SSD) template matching algorithm. The edge detection algorithm mainly uses the Canny operator to extract the outline edge of the chip and uses robust statistics methods to eliminate outliers, reduces the impact of uneven edges on the chip location accuracy, and finally, uses a rectangle fitting algorithm to find the chip region 6 or obtain the maximum connected domain of the edge and calculate the four vertices of the detected rectangular box to determine the rotation angle of the wafer [8].