## 3 The Proposed Undersampling Method
The encoding and interleaving scheme followed in this work has also to take into account the fact that pilot and padding symbols will be added before the IDFT transform. These pilot and padding symbols do not affect the proposed undersampling method if they are defined equal to the \(X_{cv}\) value. In the following, a Recursive Convolutional Systematic (RSC) encoder is used with a systematic and a parity output of data rate \(R\) = 1/2. The original data bits are available at the systematic output while the parity bits are generated by the feedforward path described by the polynomial \(1\) + \(D\) + \(D^{2}\) + \(D^{3}\) and the feedback path that is described by \(1\) + \(D\) + \(D^{2}\). A small 8-bit buffer at the output of the encoder groups the 4 data and 4 parity bits into a pair of 16-QAM symbols. Figure 3: Order of (**a**) padding symbols, (**b**) parity and data symbols after a pilot at even position, and (**c**) parity and data symbols after a pilot at odd position. The 16-QAM data symbols can be reordered by a channel interleaver and then placed at odd positions. Similarly, the 16-QAM parity symbols can be potentially reordered and placed at even positions. Such channel interleavers will be tested in the framework of different \(Q\)-QAM modulations in our future work. The bit and channel interleavers described above can have a fixed routing from their inputs to their outputs for lower complexity. The order of the intermediate data and parity symbols may be reversed if necessary since a number of padding and pilot symbols have to be inserted as shown in Figure 3. In Figure 3a, it is shown that \(X_{cv}\) values will anyway be placed at the odd positions in the region of the padding symbols, since the padding value is selected to be \(X_{cv}\). At a region that starts with a pilot at even position, the order of the following \(Q\)-QAM symbols must follow the recurring pattern \(<\)data, parity\(>\) (see Figure 3b). The proposed undersampling method is not affected if a pilot is placed at an odd position provided that its value is chosen to be \(X_{cv}\). The following symbols have to the recurring pattern: \(<\)parity, data\(>\) (see Figure 3c). In this way the same \(X_{cv}\) value will be placed in the majority of the odd positions at the set of points that will serve as input to the IDFT. The interleaving policy described above can be implemented with trivial hardware without increasing the system complexity. At the side of the receiver, the sampling of the \(F\), \(x_{2t+1}\) symbols by the ADC may be omitted as they can be substituted by the \(F\) symbols: \(x_{2t+1+N/2}\) or vice versa. The original and the substituted \(x_{n}\) values form the input of the DFT. A low complexity finite state machine implemented in hardware can control the sampling rate of the ADC preventing the sampling of the values that can be substituted by others. In this way, 50% of the time interval that is needed to receive the \(N\), \(x_{n}\) symbols, the ADC operates at half of its normal sampling rate lowering its power consumption. If a smaller number of \(x_{n}\) values are substituted by others the lower ADC sampling rate will be applied in a shorter time interval. For example, if only half of the \(x_{2t+1+N/2}\) symbols are substituted (e.g., the \(x_{2t+1+N/2+N/4}\)) in order to achieve a better BER, the lower ADC sampling rate will be applied to the 25% of the time interval that is needed to receive all the \(x_{n}\) symbols required for a \(N\)-point DFT. The power consumption of the ADC may be reduced to the half during these intervals as it is proportional to the sampling frequency. In addition to the ADC power consumption reduction, the buffering memory where the ADC samples are stored can be smaller (by up to \(F\) locations) and the FFT implementation of the DFT can be simpler as will be discussed in the next section.