# Experimental Studies on Low-Latency RIS Beam Tracking: Edge-Integrated and Visually Steered
## 2 System Architecture
### Visually Steered RIS Control Mechanism  
Although the EIR-CM has significantly improved the system performance (by more than 50%), the system still suffers from some latency. This latency is mainly due to the double TCP feedback overhead: the UE needs to send feedback to the RIS to trigger beam scanning, and the RIS also needs to provide feedback acknowledgement. In addition, since the system has to traverse all the codebook beams to determine the optimal beam direction, this process further increases the response time of the system. To solve this problem, VSR-CM is proposed to utilize the YOLOv7 target detection model and the Intel RealSense D435i depth camera to achieve more efficient user tracking and beam steering. As shown in Figure 3, this scheme uses computer vision to detect the presence of a user and directly infer its position information to quickly determine the optimal beam direction without traversing all the codebooks or relying on the extra delay caused by TCP feedback. The YOLOv7 target detection model is used for real-time user detection and location determination, and an Intel RealSense D435i depth camera captures the user's 3D coordinates. The user's spatial coordinates are then quickly mapped to the optimal RIS reflection beam using a predefined codebook in the experimental environment. The optimal beam information is then sent directly to the RIS control system, eliminating the need to traverse all codebook beams. Figure 3: VSR-CM mode application scenarios. Figure 2: An RIS feedback timing diagram with EIR-CM architecture. In this study, a vision-based RIS beam dynamic tracking algorithm is proposed. This algorithm leverages the YOLOv7 object detection model and the Intel RealSense D435i depth camera to quickly identify the location of the UE and dynamically adjust the RIS reflection mode to optimize wireless signal coverage [32]. Algorithm 2 consists of four core steps: object detection, grid partitioning, position mapping, and mode control. ```
1:Configure YOLOv7 model and Intel RealSense D435i Camera: Enable RGB and depth streams. 2:Initialize UART with the RIS control board. 3:Load RIS reflection patterns from \"Patterns.txt\". 4:_last_grid_position_ = None % Tracks the historical position of the UE and does not re-config the RIS if the UE is at the same grid position
5:While(1):
6: The YOLOv7 model start detect people. The model outputs the coordinates of bounding box: \([(x_{1},y_{1}),(x_{2},y_{2})]\) and class
7: Divide the image into 8 horizontal grid cells: _cell_width_ = _frame_width_/8, %cell_height = _frame_height_. We only treat the image space into 8 parts according to the horizontal area. 8: Calculate the bounding box center \((c_{x},c_{y})\) % \(c_{x}=(x_{1}+x_{2})/2\), \(c_{y}=(y_{1}+y_{2})/2\)
9: Determine the grid column based on \(c_{x}\): \(column=\text{int}(c_{x}/cell\_width)\)
10:current_grid_position_ = (0,\(column\)) % Determine which grid area the user is in
11:If (\(current\_grid\_position\
eq last\_grid\_position\)) % Check if there is a move to a new cell
12:last_grid_position = current_grid_position_ % Update the last position
13:pattern_index = column % mapping each grid index directly to the codebook index
14:pattern = patterns[pattern_index] % Read the corresponding RIS pattern instructions from \"Patterns.txt\"
15:UART_write(pattern) % Send the pattern to the RIS control board via UART
16:EndIf
17:EndWhile
```  
**Algorithm 2** The VSR-CM mode tracking algorithm  
Algorithm description:  
1. Pre-processing stage: First, the system initializes the YOLOv7 target detection model, loads the pre-trained YOLOv7 model, and starts the RGB and depth data streams from the Intel RealSense D435i camera; the RGB images are used for target detection, while the depth information is used for the subsequent spatial coordinate calculation. In addition, the system initializes UART communication to establish a serial connection between the RIS control system and the FPGA control board for transmitting beam control commands.