# Application of Surge Arrester in Limiting Voltage Stress at Direct Current Breaker
## 5 Experimental and Simulation Results  
A 500 V, 1500 A power supply is built to validate the performance of the proposed breaker when used in a circuit with upstream and downstream inductors. A 500 V, 0.12 F capacitor bank provides a maximum 500 VDC and is charged via a rectifier from a 480 V three-phase source. After being fully charged, the three-phase power is disconnected and the stored energy in the capacitor bank is utilized for the generation of the fault current. A 2.27 mH, 0.21 \(\Omega\) and a 2.72 mH, 0.25 \(\Omega\) air-core inductor represents the upstream and downstream DC line inductances. The hybrid DC breaker uses two contacts of a 15 A, 480 Vac, 240 VDC three-phase circuit breaker with 20 kA breaking capacity. Two 1000 V, 150 A diodes with a 1.5 kA, 8 ms non-repetitive peak current rating as well as two 500 V, 1100 \(\mu\)F bypassing capacitors are used as redirecting and bypassing elements. The selection of the capacitors is based on experimental observations, as the smaller capacitors suggested in Section 4 lead to significant arcing, especially in 500 V tests, since the selected three-phase breaker is not a fast mechanical switch. Based on the experiment fault voltage level, a 240 V, 12 kA, 20 mm disc surge arrester was selected for the 260 V experiment. For the 480 V experiment, two surge arresters were connected in series to provide the required protection voltage. The circuit of Figure 1b was then established. Upon connecting the capacitor bank to the faulty circuit, a fault current is established in the circuit. A trip command is externally sent to the breaker through its shunt trip signal shortly after and when the fault current is at maximum in the resultant circuit. As soon as the fault current is established, the waveforms are captured via an oscilloscope. Figure 4 illustrates the experimental test setup and measurement circuits diagram. The performance of the surge arrester in limiting voltage overshoots is evaluated. Tests are conducted under two different voltage levels, i.e., 280 V and 500 V (with some variations). The tests scenarios are explained next. separation, the breaker's input-terminal voltage rapidly increases (see Figure 6), this time to a lower voltage than the original voltage due to the capacitor bank's partial discharge. A significant arc is observed between the switches' contacts, which is also confirmed by the noisy current waveforms, as all the fault energy (energy stored in the inductors) is released there in the form of an arc (heat). The measured fault clearing time is approximately 7.7 ms and 17.7 ms for 280 V and 500 V tests, respectively. The prolonged arcing indicates that significant contact erosion occurs in this scenario. Case 2: Original Hybrid DCCB  
The original hybrid DCCB [11] has a similar structure to that shown in Figure 1, except no surge arrester is used. The original topology is efficient only if placed close to the source, where the upstream inductance is negligible. Figure 7 depicts the current and voltage waveforms for faults under both 280 V and 500 V tests. As soon as the trip command is issued, SW1 and SW2 start to open; however, due to the inherent mechanical differences, SW2 operates faster, and the current is bypassed via C2 increasing \(V_{\text{C2}}\), which in turn causes D1 to turn on and clamp \(V_{\text{C2}}\) at the breaker input-terminal voltage level. Due to the upstream line inductance the terminal voltage rises excessively in the absence of any other current path. Figure 7 shows 700 V and 1100 V switch voltages for 280 V and 500 V tests, respectively. Due to the presence of arc across SW1, \(V_{\text{C1}}\) does not build up, and diode D2 cannot turn on until the fault current decays and the breaker terminal voltage decreases. However, it is noted that the arc has significantly reduced (from current waveform and visual inspection) in the hybrid DC breaker compared to Case 1 at the cost of excessively high capacitor (and switch) voltages.