# A Sub-50 nW Implantable Body Temperature Sensor and Its Application to a Rat
## 2 System Design
### Body Temperature Measurement Channel (CH_T) Design  
The measurement range is 8 \({}^{\circ}\)C and the accuracy is 0.1 \({}^{\circ}\)C, so the signal-to-noise ratio (SNR) to be secured is low at 80, making it an application that can focus on low power consumption. Thermal fluctuations within the body are not rapid, allowing measurement times of a few seconds, so spiky thermal noise does not affect the measurement results. In order to improve the SNR in the thermistor bridge, it is better to flow a large current. During the 2 ms of sampling the voltage value of the thermistor bridge, about 16 \(\upmu\)A (28 \(\upmu\)W) is passed through the thermistor bridge, but for most of the total measurement time of 4 s, no current is passed through the thermistor bridge. Therefore, the average power consumption is less than 50 nW, but the quality of the sampled signal is not related to 50 nW, but to 28 \(\upmu\)W, resulting in better SNR quality. Since the differential signal is processed by double sampling over a short period of 2 ms, low-frequency common noise is canceled out. Afterwards, noise from the VCO appears as a clock jitter. The effects of high-frequency jitters are averaged out over the 4 s-clock counting time. The subsequent counter circuit is a digital circuit, so it consumes sufficiently little power and is not affected by noise. The conventional Wheatstone bridge creates a bridge with two resistors connected in series and configures the two bridges in parallel. The two bridges are always powered, and two common nodes of the series-connected resistors are formed, from which the differential signal is measured. Since the Wheatstone bridge is always powered, power consumption is high. In order to place thermistors on the two bridges of the conventional Wheatstone bridge, multiple thermistors must be mounted on the neural electrodes, which requires additional wiring configuration. On the other hand, the dynamic virtual Wheatstone bridge technique configures one physical bridge by mounting only one thermistor on the neural electrode and generates a differential signal that is continuously formed by changing the direction of the power supplied to the bridge only for a short time. Therefore, low power consumption can be achieved on average. In other words, the dynamic virtual Wheatstone bridge method is a technology that can obtain a differential signal through dynamic driving of a single transducer bridge and implement low average power consumption. Figure 2: Top block diagram of implantable module (MOD_IMP10). IA (instrumentation amplifier), PGA (programmable gain amplifier), ADC (analog-to-digital converter), DIG (digital logic), BRG (bridge), SMP (sampler), VCO (voltage-controlled oscillator), TDC (time-to-digital converter), PMIC (power management integrated circuit). Figure 3 shows the operating principle of the BRG block and the SMP block in CH_T. Figure 3a shows the configuration connection between the BRG block, and the thermistor (Rth) mounted on the FFCB over time. Physically, it is a voltage divider composed of a resistor (R\({}_{\text{trm}}\)) and a thermistor (Rth), but it outputs a differential output signal like a Wheatstone bridge using PHASE_P and PHASE_N for a short consecutive time. During phase PHASE_P (\(t_{1}<t<t_{2}\), \(t_{5}<t<t_{6}\)), voltage \(VDDH\) (1.8 V) is supplied to the thermistor node \(E5\), and voltage 0 V is supplied to the node \(N\_SW\) of resistor R\({}_{\text{trim}}\). At this time, the output \(V_{mp}\) of the BRG block is sampled and held in the SMP\({}_{\text{P}}\) block. Thermistor resistance value varies depending on temperature, and R\({}_{\text{trm}}\) value can be adjusted so that the output \(V_{mp}\) becomes \(VDDH/2\) at normal body temperature. Immediately after the phase PHASE_P is completed, during the phase PHASE_N (\(t_{3}<t<t_{4}\), \(t_{5}<t<t_{8}\)), voltage 0 V is supplied to the thermistor node \(E5\) and voltage \(VDDH\) (1.8 V) is supplied to the node \(N\_SW\) of the resistor R\({}_{\text{trim}}\).