## 2 Proposed Multimodal Reconfigurable Sensor Readout Circuit
### Reconfigurable Structure  
The reconfigurable structure of the first stage according to the sensor application is shown in Figures 2 and 3. Depending on the voltage/resistive-, current-, or capacitive-sensing modes, the chopper-stabilized, multi-path operational amplifiers, \(A_{\text{1M}}\) and \(A_{\text{2M}}\) can be reconfigured to three amplifier types: a voltage buffer, trans-impedance amplifier (TIA), and a CDS scheme. The reconfiguration of the amplifier is manually controlled by switches. Figures 2 and 3 illustrate the configurations of the possible sensing modes. To describe the readout operation, the sensor in the voltage/resistive-, current-, and capacitive-sensing modes in Figures 2 and 3 is expressed by the resistive bridge, diode, and capacitive sensor, respectively. The configuration of the voltage/resistive-sensing mode is shown in Figure 2a. The A\({}_{\text{1M}}\) and A\({}_{\text{2M}}\) amplifiers are converted to TIAs, which have a programmable feedback register R\({}_{\text{1}}\). R\({}_{\text{mid}}\) is connected to the negative input of the TIAs by switches such that the output signal is amplified by the ratio of R\({}_{\text{1}}\) to R\({}_{\text{mid}}\). The output voltage of the voltage/resistive-sensing mode is expressed using the following equation:  
\[\text{V}_{\text{ov1}}=\left(\text{1}+\frac{2\text{R}_{\text{1}}}{\text{R}_{ \text{mid}}}\right)\times\text{V}_{\text{idv}} \tag{1}\]  
Figure 1: Block diagram of the proposed multimodal reconfigurable sensor readout circuit. ADC: analog-to-digital converter, LPF: low-pass filter. Figure 2: (**a**) Configuration of the voltage/resistive-sensing mode (**b**) Configuration of the current-sensing mode. GND: ground, VDD: dc supply voltage. The configurations of the current-sensing and capacitive-sensing modes are shown in Figures 2b and 3 respectively. These configuration modes are available in both single-ended and differential modes. For simplicity, both modes are described using the single-ended mode. In the current-sensing mode configuration, the A\({}_{\text{1M}}\) amplifier is converted to a TIA and the A\({}_{\text{2M}}\) amplifier is converted to a voltage buffer. The output current of the sensor is converted into a voltage through the TIA. The ratio of the output voltage to the input current can be adjusted using programmable resistor R\({}_{1}\), and is expressed using the following equation:  
\[\text{V}_{\text{oil}}=\text{R}_{1}\times\text{I}_{\text{in}} \tag{2}\]  
In the capacitive-sensing mode configuration, the A\({}_{\text{1M}}\) amplifier is converted to the CDS scheme and the A\({}_{\text{2M}}\) amplifier reconfigures as a voltage buffer. In this mode, as the CDS scheme is operated by non-overlapping CDS clocks, P\({}_{\text{1 CDS}}\) and P\({}_{\text{2 CDS}}\), the capacitive-sensing mode is driven under the discrete-time mode. If an offset exists in front of the A\({}_{\text{1M}}\) amplifier input, the CDS scheme can reduce the offset by subtracting the offset charges stored in capacitor C\({}_{1}\) at the P\({}_{\text{1 CDS}}\) and P\({}_{\text{2 CDS}}\) clocks. Its output is amplified by the ratio of the input capacitance to a programmable capacitor C\({}_{1}\), such that the output voltage is expressed using the following equation:  
\[\text{V}_{\text{oc1}}=\text{V}_{\text{DD}}\times\frac{2\Delta\text{C}}{\text {C}_{1}} \tag{3}\]  
In this mode, resolution degradation can be caused by the parasitic capacitance of the capacitive sensor. The parasitic capacitance is an unwanted component due to a process mismatch and random variations. The parasitic capacitance can often be greater than the change of input capacitance, resulting in a poor resolution. In extreme cases, the output voltage of the readout circuit can be ground or DC supply voltage.