## 2 VCO Implementation with Linearized Transconductance and Capacitive Tuning  
Figure 3 indicates the schematic of the proposed VCO with the linearized transconductance technique. The oscillation condition of an LC-based VCO can be represented as (1):  
\[g_{m}\geq 1/R_{tank} \tag{1}\]  
where \(g_{m}\) and \(R_{tank}\) are the transconductance of the active part and equivalent resistance of the passive part, respectively. In an LC-VCO, considering the noise produced by the parasitic resistance and cross-coupled pair as presented in [7], the output noise can be driven as in Equation (2):  
\[dV_{out}{}^{2}[\omega]=KTR_{pur}[1+A]\Big{(}\frac{\omega_{0}}{\omega}\Big{)} ^{2}df \tag{2}\]  
where \(K,\ T,\ R_{pur}\), and \(A\) are Boltzmann's constant, temperature, parasitic resistance, and multiple noise factor of the cross-coupled pair, respectively. Therefore, the ratio of the output noise and signal power is equal to (3):  
\[\frac{dV_{out}{}^{2}[\omega]}{P_{sig}}=\frac{KTR_{pur}[1+A]\Big{(}\frac{\omega _{0}}{\omega}\Big{)}^{2}df}{\frac{V_{amp}^{2}}{2}} \tag{3}\]  
As can be easily observed, increasing the oscillation amplitude improves the phase noise performance of the VCO effectively. For a given current, the class-C VCO provides high oscillation amplitude characteristics. In the proposed architecture, the maximum achievable oscillation amplitude, through the famous saturation condition \(V_{D}>V_{G}-V_{th}\), can be obtained, wherein \(V_{D},\ V_{G}\), and \(V_{th}\) are the Drain, Gate and threshold voltages, respectively. When the Drain voltage is minimum, the Gate  
Figure 3: Top block diagram of the proposed linear transconductance voltage controlled oscillator (VCO). voltage is maximum, and A represents the voltage gain from Gate to Drain of the feedback path, Equations (4) and (5) can be realized. \[VDD-V_{amp}>V_{bias,Cate}+AV_{amp}-V_{th} \tag{4}\]  
\[V_{amp}<\frac{VDD-V_{bias,Cate}+V_{th}}{1+A} \tag{5}\]  
As can be seen, if the gate of the cross-coupled pair is biased at lower voltages, the proposed architecture provides a larger oscillation amplitude. According to Equation (5), if the gate of the cross-coupled pair is directly connected to the LC tank, to keep the transistors out of the triode region, the oscillation amplitude should be small. In this case, the amplitude is not allowed to be more than Vth/2. As shown in Figure 4, the DC isolation of the Gate and Drain through the coupling capacitance lets the Gate be biased lower than the Drain, thereby reducing the nonlinearity of the active part. Besides, this provides a high efficiency of DC current conversion into class-C current waveforms, and minimizes the generation of effective noise. The \(g_{m}\) drops with increasing oscillation amplitude, and cross-coupled pairs become nonlinear when entering the deep triode region. The \(g_{m}\) determines the active part noise power at the zero-crossing point, where the sensitivity of the phase noise is high [8]. Therefore, the proposed technique shrinks the operation of the LC-VCO in the triode region by extending the saturation region. In contrast, the transconductance linearization approach optimizes the design by eliminating the deep triode region, introducing larger amplitude, lowering noise generation, and improving the quality factor of the tank compared to conventional LC-VCOs. The sizes of the cross-coupled pairs are chosen to be large enough to provide almost ideal switch characteristics. Since the topology provides high swing, the VDD is 0.8 V, and considering the tank load, its safe operation, which avoids Gate-breakdown inside the frequency tuning range, is guaranteed. The trade-off between the quality factor of the switched capacitor bank and VCO's tuning range is an unavoidable issue in wide tuning range VCOs. The MOS switches introduce on-resistance in the signal path, which lowers the quality factor of the tank. To lower the on-resistance of the switch, a MOS transistor with a large size is required, considering the reduction of phase noise.