# RT Engine: An Efficient Hardware Architecture for Ray Tracing
###### Abstract  
The reality of the ray tracing technology that leads to its rendering effect is becoming increasingly apparent in computer vision and industrial applications. However, designing efficient ray tracing hardware is challenging due to memory access issues, divergent branches, and daunting computation intensity. This article presents a novel architecture, a RT engine (Ray Tracing engine), that accelerates ray tracing. First, we set up multiple stacks to store information for each ray so that the RT engine can process many rays parallel in the system. The information in these stacks can effectively improve the performance of the system. Second, we choose the three-phase break method during the triangle intersection test, which can make the loop break earlier. Third, the reciprocal unit adopts the approximation method, which combines Parabolic Synthesis and Second-Degree interpolation. Combined with these strategies, we implement our system at RTL level with agile chip development. Simulation and experimental results show that our architecture achieves a performance per area which is 2.4 \(\times\) greater than the best reported results for ray tracing on dedicated hardware. machine vision; computer graphics; hardware architecture; rendering; ray tracing; graphics accelerators +
Footnote †: journal: Applied sciences  
performance of ray tracing [8]. This test occupies nearly 70-80% of total calculation time. Therefore, many studies are concerned about the ray traversal and intersection tests that achieve higher performance. In the past few decades, many researchers worldwide have carried out significant research into ray tracing software and hardware acceleration. Various platforms are used at the hardware acceleration level, including central processing units (CPUs), GPUs, and dedicated hardware. Due to the hardware features, GPUs and dedicated hardware show significant performance advantages. There is a lot of research on optimizing GPUs' acceleration. Ray tracing was challenging to implement on GPUs because early GPUs did not support general-purpose computation. [PERSON] et al. [9] made the first attempt to implement ray tracing on a GPU. However, they only implemented the intersection test. This unit reconfigured the geometry engine into a ray engine that efficiently intersects caches of rays for many host-based rendering tasks. [PERSON] et al. [10] studied the mapping of elementary acceleration structure traversal and primitive intersection onto wide Single Instruction Multiple Data (SIMD)/Single Instruction Multiple Threads (SIMT) machines. [PERSON] et al. [11] proposed the Dynamic Ray Shuffling (DRS) architecture for GPUs to address ray tracing control flow divergences. The critical insight was that the primary control flow divergences caused by inconsistent ray traversal states of a warp could be eliminated by DRS. Experimental results show that, for an estimated 0.11% area cost, DRS significantly improves the SIMD efficiency for the tested benchmarks from 41.06% to 81.04% on average. [PERSON] et al. [12] explored integrating the ray prediction strategy into existing GPU pipelines and improving the predictor effectiveness by predicting nodes higher in the tree and regrouping and scheduling traversal operations in a low-cost, reasonable manner. They found that GPU platform optimization pays more attention to the calculation part of the algorithm. Reducing the processing of branches and reducing the redundant operation through the optimization strategy of architecture to maximize the hardware characteristics has achieved good profits in academic research. In addition, commercial GPUs have also introduced accelerated architectures for ray tracing. In 2018, NVIDIA launched the first ray tracing GPU with the first-generation RT Core in Turing architecture [13]. In 2021, the Ampere architecture with the second-generation RT Core was established [14]. The RT Cores replace that software emulation, performing the tree traversal and the ray/box and ray/triangle intersection tests.