## 5 Experimental Results and Discussion
### Comparison of Performance between SEB Array and DC-Decoupled SET  
For practical applications we need to make sure that the advantages of the \(N\)-sized SEB array approach, such as doubling of operating temperature and a smaller footprint per device are worth pursuing compared to more conventional approaches that utilize an RF SET as a sensing element. Here, we exploited a variation of the RF SET, which we call a \"DC decoupled-SET\" (DCD SET), Figure 17a. The key feature of this design is the lack of DC path through the SET device: either one or both junctions are connected to the outside only through a coupling capacitors \(\sim\)0.5 pF between bonding pads defined by optical lithography. This resulting device is protected against accidental ESD due to the lack of a DC path. The impedance of the 0.5 pF capacitor at high frequencies (2 k\(\Omega\) at 160 MHz) became negligible compared to \(R_{SET}>\) 50 k\(\Omega\), so it has little effect on the measured impedance at these frequencies. To compare performance of DCD SET with a SEBA, we set up an experiment a circuit diagram for which is shown in Figure 17b and a physical layout is represented by a micrograph Figure 17c. The performance of the array composed of four SEBs is directly compared with that of two SETs AC drain-coupled to the same resonator. In an SEB the capacitance between the gate and the SEB island is a part of the total \"island to outside world\" capacitance, and thus while larger gate capacitance has the benefits of enhancing the total admittance of the device \(Y(V_{g})\), it also leads to a reduction of charging energy. By contrast, in the DCD SET the maximal admittance is set primarily by the resistance of the tunnel junctions and is independent of the gate capacitance. Note that for the structure shown in Figure 17c the gate capacitance for the SETs is approximately 2 times smaller than that of SEB due to different gate proximity. The results of the RF reflectometry measurements of a combined structure composed of four SEBs and two DCD SETs are presented in Figure 18. The distinct beating pattern is clearly visible in Figure 18a (upper panel, magnitude plot). FFT analysis of the spectral composition of this signal shows that it is predominantly composed of two prime components (8.5 V\({}^{-1}\) and 10.5 V\({}^{-1}\), red curve in Figure 18b) and several higher frequency components of much smaller magnitude bunching around 18 V\({}^{-1}\) and 36 V\({}^{-1}\)  
Figure 16: **(a)** Simplified circuit diagram of the counter-parallel connection of SEB arrays. **(b)** A sketch of the design featuring the interdigitated design with alternating placement of islands overlapping either source or gate regions. The different shades of blue represent the two evaporation steps of the Dolan bridge technique. The tuning gate is not shown and it can be placed above or below the structure to ensure dissimilar coupling. **(c)** Experimental 2D map obtained from connecting two nominally identical arrays connected as shown in the circuit diagram. Both arrays nominally contain 200 SEB each. These higher frequency components are also present in the FFT of phase (blue curve in Figure 18b), while one of the lower frequency components (10.5 V\({}^{-1}\)) became practically undetectable. To identify the origin of the observed signals a 2D maps of the derivatives \(d|\Gamma|dV_{g}\) and \(d\Theta|dV_{g}\) in coordinates \(V_{gS}\) and \(V_{gT}\) are obtained (Figure 18c). The pattern on the left panel shows the appearance of two distinct sets of lines: the one with a positive slope and another one with a negative slope, corresponding to a 10.5 V\({}^{-1}\) and 8.5 V\({}^{-1}\) spectral component in the FFT in Figure 18b. This set of lines is exactly what is expected from the counter-parallel connection of SETs. The signal stemming from a \"fully-floating\" DCD device yields a different phase compared to the SET DC-drain coupled to \(V_{gT}\) in Figure 17c. On closer inspection a series of faint lines are also visible in the phase plot of Figure 18c.