## 3 Results and Discussion  
### Tunneling-Based Ternary CMOS with Ferroelectric-Gate Field Effect Transistor  
Before identifying the operations of TCMOS, the electrical characteristics of TNMOS (tunneling-based ternary NMOS) and TPMOS (tunneling-based ternary PMOS) were first verified (Figure 2). Compared to conventional N/PMOS for CMOS, TNMOS/TPMOS have the larger V\({}_{\text{t}}\) (close to V\({}_{\text{DD}}\)) and the constant IOFF regardless of gate voltage (V\({}_{\text{G}}\)). As aforementioned, the IOFF is generated by the BTBT at the drain-side tunnel junction and hence the IOFF increases with the larger V\({}_{\text{D}}\) (Figure 3). For the stable TCMOS operations, the IOFF of TNMOS /TPMOS needs to be almost the same at V\({}_{\text{D}}\) = -half V\({}_{\text{DD}}\) because the third V\({}_{\text{out}}\) state between V\({}_{\text{out}}\) = 0 V and V\({}_{\text{out}}\) = V\({}_{\text{DD}}\) is formed using V\({}_{\text{DD}}\) divided by the resistance difference (namely, the IOFF difference) between them [2], if the TNMOS/TPMOS are simplified as variable resistors with respect to V\({}_{\text{D}}\). Thus, the doping concentration modulation for the tunneling layer is essential to adjust the IOFF in the TCMOS fabrication process.  
The ferroelectric material (e.g., doped HfO\({}_{2}\)) can have the larger permittivity by a polarization switching than the general high-k dielectric material (e.g., HfO\({}_{2}\)). The slope of the P-E curve refers to the permittivity of the dielectric, and the slope of the P-E curve in the ferroelectric material is larger than that of the high-k dielectric. Therefore, when the high-k dielectric is replaced with the ferroelectric layer in the gate stack of a MOSFET, the larger I\({}_{\text{ON}}\) and the steeper SS are achievable. Figure 4a shows the comparison of the transfer characteristics between conventional TNMOS/TPMOS and FE-TNMOS (ferroelectric-gate field effect transistors-TNMOS)/TPMOS. As expected, the larger  
\begin{table}
\begin{tabular}{c c c} \hline
**Parameter** & **Description** & **Value** \\ \hline L\({}_{\text{G}}\) & Gate Length & 1 \(\mu\)m \\ N\({}_{\text{S}}\) & Source Doping Concentration & 10\({}^{20}\) cm\({}^{-3}\) (Arsenic) \\ N\({}_{\text{D}}\) & Drain Doping Concentration & 10\({}^{20}\) cm\({}^{-3}\) (Arsenic) \\ N\({}_{\text{B}}\) & Body Doping Concentration & 10\({}^{17}\) cm\({}^{-3}\) (Boron) \\ N\({}_{\text{T}}\) & Tunneling Layer Doping Concentration & 5\(\times\)10\({}^{19}\) cm\({}^{-3}\) (Arsenic) \\ T\({}_{\text{TNL}}\) & Tunneling Layer Thickness & 20 nm \\ T\({}_{\text{OX}}\) & Interfacial layer Thickness & 1 nm \\ T\({}_{\text{FE}}\) & Ferroelectric Thickness & 10 nm \\ P\({}_{\text{s}}\) & Saturation Polarization & 18 \(\mu\)C/cm\({}^{2}\) \\ P\({}_{\text{r}}\) & Remenant Polarization & 30 \(\mu\)C/cm\({}^{2}\) \\ E\({}_{\text{c}}\) & Coercive Field & 0.75 MV/cm \\ \(\tau_{\text{p}}\) & Relaxation Time for Polarization & 250 ns \\ \(\epsilon_{\text{b}}\) & Permittivity Constant of Ferroelectric Material & 25 \\ \hline \end{tabular}
\end{table}
Table 1: Simulation Parameters.  
Figure 2: The transfer characteristics of conventional NMOS/PMOS and TNMOS/TPMOS. Due to the IOFF generated from the tunnel junction, the IOFF increases with the larger drain voltage. Compared with conventional NMOS/PMOS, TNMOS/TPMOS are designed to have larger voltage (V\({}_{\text{t}}\)).  
Ion and the improved SS are observed in the FE-TNMOS/FE-TPMOS (ferroelectric-gate field effect transistors-TPMOS) (Figure 4a). Considering that the high Vt is inevitable for TCMOS operations, it is expected that FE-TCMOS can be operated at the more scaled VDD. In other words, at a specific VDD, FE-TCMOS might have a faster operation speed and a larger static noise margin than conventional TCMOS.