# A Design for an Internet Router with a Digital Optical Data Plane
## 8 Discussion  
This exploration demonstrates the need for an optical data plane for Internet routers and the viability of optical processing. For each component, including forwarding, hop count decrement, checksum computation, and multiplexing, we have demonstrated the feasibility of a relatively simple approach, either through experiment or simulation. Practical optical header matching will depend on the ability to efficiently compress the forwarding table into a very small number of cached entries, each of which considers a fairly small number of bit values, and there is evidence that this may be feasible [15; 16; 17]. The alternative would require both very large scale integration to support larger, more complete forwarding tables, as well as the ability to efficiently optically replicate packet headers to support a large number of concurrent correlators. Internet hop count decrement is the closest to being immediately practical in optics. A more complete solution would require integration of an optical S/R FF, but the current approach is otherwise sufficiently simple and direct. It would additionally benefit from being extended to support multi-bit encodings, such as M-PSK or QAM, to natively support common high bandwidth, long-distance transmission formats. Using an M-PSK encoding changes the inverter to a '\(-1\)' (subtract one) transform ('\(-1\)' is the same as conjugate generation for binary values, but requires a phase shift of \(2\pi/\mathrm{M}\) for M-PSK encodings) and changing the S/R FF from a binary device (Figure 18, left) to one that treats the set input as either zero or nonzero (Figure 18, right). The Internet checksum may be challenging to implement in optics, but shows the promise of support for other checksum approaches, especially those that might be more directly tailored to optical  
Figure 18: Extending hop count decrement from binary (**left**) to multi-bit data (**right**). processing. The two impediments for checksum development are signal integrity and extension to multi-bit formats. The checksum currently requires the partial carry and partial sum to be recirculated \(K\) times for a \(K\)-word input (for \(K\) recirculations, with one final recirculation to allow the carry to propagate through the final sum). This may be practical for the 20-byte default IPv4 header, but it would be difficult to extend to support packet rewriting that requires updating the transport layer (TCP, UDP) checksum over the full packet body. We are in the process of developing a proprietary mechanism that effectively folds the feedback loop, reducing the number of recirculations from O(\(K\)) to O(\(log(K)\)). The checksum also needs to be extended from binary to multi-bit encodings. Although binary half- and full-adders have been demonstrated [22], multi-bit adders, e.g., for M-PSK encodings, are currently limited to modular arithmetic [41]. Extending these to a full-adder requires concurrent carry-out generation, resulting in a half-adder, and composition of multi-bit half-adders to create a multi-bit full-adder. Our team has explored a potential approach to M-PSK carry generation, in which incoming signal phases are halved, added, then squeezed and shifted to create the corresponding carry-out value (Figure 19, left to right) [42]. Two binary half-adders can be combined, joining the carry-outs in an OR gate (Figure 20, left), but it takes three multi-bit half-adders to create a multi-bit full-adder (Figure 20, right). Sufficiently efficient multiplexing can be implemented in optics using as few as 6000 bytes of optical delay. At low bandwidths, e.g., 10 Gb/s RZ encoding, this can be unwieldy (2.2 km), but as symbol rates and encoding density increase, this decreases quickly. At 40 G symbols/s using 8-PSK, 6000 bytes of delay is only 121 m; at 1 T symbols/s, the same delay requires only 5 m. It will be challenging to implement this delay in 10 equal units with as many low-loss switches in series.