## 2 Proposed TSP Readout System  
### Whole System Architecture  
The top of Figure 2 illustrates the proposed overall system architecture of the TSP sensing front-end. The sensing front-end is divided into two sections: TSP AFE Right (R), which handles dot-matrix TSP channels (CH\({}_{\text{Dot}}\)[20:1]), and TSP AFE Left (L) for CH\({}_{\text{Dot}}\)[40:21]. This division is essential due to the integration with the display driver IC (DDI) as a TDDI, centrally located within the system. Each front-end section comprises key functional blocks, including a 2-to-1 multiplexer, a second-generation current conveyor (CCII), a current-to-voltage converter (C2V), a sample-and-hold circuit (S/H), and an ADC. Additionally, a dot-matrix Cs-compensator is integrated and its output cells generate compensation charges of Q\({}_{\text{CPO}}\)[9:0] to each CCII input to effectively nullify the baseline Cs, ensuring accurate signal processing and minimizing capacitance nonuniformity.  
First, the CCII converts the capacitance C\({}_{\text{S}}\) into current and amplifies it. The CCII's inherent low-pass characteristics suppress high-frequency coupled noise. Simultaneously, the baseline Cs is nullified before current conversion, ensuring that only the capacitive variations from finger touch (C\({}_{\text{F}}\)) are transferred to the C2V for further processing. The subsequent C2V stage consists of an operational amplifier (op-amp) with a feedback integral capacitor (C\({}_{\text{INT}}\)) and resistor (R\({}_{\text{INT}}\)). The parallel combination of C\({}_{\text{INT}}\) and R\({}_{\text{INT}}\) converts the current from the CCII into a proportional voltage while introducing a high-pass pole at a low frequency. Consequently, the poles at the CCII input and the C2V output collectively form a band-pass filter centered at the TSP driving frequency (f\({}_{\text{TSP}}\)). The S/H functions as a voltage sampling circuit for subsequent analog-to-digital (A/D) conversion while incorporating a reconfigurable Gaussian filtering effect. Operating as a discrete-time (DT) circuit, the S/H can implement Gaussian coefficients using a discrete-level sampling capacitor array, synchronized with a clock operating at twice the frequency of f\({}_{\text{TSP}}\).  
The bottom of Figure 2 shows the frequency translation of the capacitance signal across each AFE stage, emphasizing the frequency range of the TSP signals and the dominant noise sources at each front-end stage. First, the capacitance-induced signal is up-modulated to f\({}_{\text{TSP}}\) to shift its frequency spectrum away from low-frequency noise sources, such as DC offsets from the charger and hum noise from power lines (50-60 Hz). Then, band-pass filtering within the AFE removes out-of-band noise, while the dot-matrix C\({}_{\text{S}}\) compensator isolates the capacitive change by finger (C\({}_{\text{F}}\)), ensuring accurate touch detection. After discrete-time Gaussian filtering in the sample-and-hold (S/H) and A/D conversion stages, demodulation is performed in the digital domain through +1/\(-\)1 coefficient multiplication. Since the +1/\(-\)1 multiplication is synchronized to twice the frequency of f\({}_{\text{TSP}}\), intrinsic noise at the baseband, such as DC offset and 1/f noise, is up-modulated to f\({}_{\text{TSP}}\) during this process. The resulting noise components are then removed through decimation filtering,ensuring that only the desired baseband signal components (C\({}_{\rm S,Digital}\)) are retained for further processing.