## 2 TDC Architecture
### One-Counter Encoder  
Normally, the TDL state changes from \"0\" to \"1\" in the order of taps, as shown in Figure 3a. However, Figure 3b shows that there are bubble errors in the TDL when simulating the timing of the delay line. It attributes to process, skew and jitters of the clock, or metastability of the D flip-flops. For example, under normal conditions, the D flip-flops will capture \"111100\", whereas under the conditions of a bubble problem, the D flip-flops will capture \"111010\".  
The ones-counter encoder has been proposed as a remedy for bubble errors in the flash ADC [28]. The example illustrated in Figure 3 demonstrates the principle of the ones-counter encoder to solve this problem, with the state of each tap indicated as T0, T1,..., and T5. The TDL output is a perfect thermometer code when the tap sequence matches the actual delay sequence, as shown in Figure 3a. In Figure 3b, the TDL output has bubbles (if the tap sequence does not match the sequence). In fact, the output codes of the two situations have the same number of ones. The output \"1\" indicates the number of taps covered by the hit. It is not difficult to predict the ones-counter encoder will generate the same binary code no matter if there is a bubble error or not. It simpli  
Figure 2: Architecture of a CARRY4 block.  
TDC design. Unlike the flash ADC design, this paper focuses on which encoder can best balance resources, power consumption, and operating speed to accomplish high speed measurement in a reasonable manner.  
Figure 4 shows the ones-counter encoder used in this experiment. In stage 1, three 6 look up tables (6-LUT is an FPGA primitive) connect to six taps in parallel, encoding the six thermometer codes into a 3-bit binary code. The other stages are inputted into the pipelined adder tree structure, which accepts the 3-bit binary array as input and creates the 8-bit output. Due to the dynamic range of the final result being 8-bit (192 taps in total), only the 8-bit binary code is fed into the following calibration.  
The initialization parameter for the 6-LUT primitive is what gives the LUT its logical value. By default, this value is zero, thus driving the output to a zero regardless of the input values. However, a new initialization value needs to be determined in order to specify the logic function. In this paper, the initialization contents of three 6-LUTs are configured to x\({}^{\prime}\)699696699669969696\", x\({}^{\prime}\)81177/E177E/EE8\", and x\({}^{\prime}\)FEE8E80808000\". These three Hex numbers give the configuration of the 6-LUT initialization contents, which is applicable to all different Xilinx devices. The function of the three 6-LUTs is to convert the six thermometer codes with bubble errors into binary codes.  
Figure 4: The proposed ones-counter encoder.  
Figure 3: Timing diagram of a tapped delay line: (**a**) the tap sequence is consistent with the order of taps; (**b**) the tap sequence is not consistent with the order of taps.  
Table 2, the six taps inputted are \"111010\", which corresponds to the 59-th bit of initialization value (made with green), therefore, the three 6-LUTs output are \"100\".