## 7 Migrating Existing OSH Designs to SensoTube Architecture
### Design and Implementation of a PDL Shield  
The aim of this design was to create a single shield which could accommodate, firstly, the various types of JTAG connectors for the most popular MCUs, and secondly the MCUs used in various Arduino main-boards, such as the AVR Atmega328 which is mentioned in the previous sub-sections. Table 8 presents the four different types of JTAG connectors that were decided to incorporate in this PDL shield. Therefore, this PDL could be used to program and debug any ARM, ARM-Cortex, AVR (using Atmel's JTAG tools), and MSP430 MCUs (from Texas Instruments), which may exist at any of the SensoTube functional layer shields. The first column of the Table 8 gives the specific names of the aforementioned JTAG headers during the design of the PCB of this PDL shield. The implementation of the PDL shield was based on the design template which was explained in Sections 4 and 7.2. The sheet symbol of the circuitry of the new PDL shield is shown in the middle of the Figure 44. As it is depicted, the sheet port entities created in this sheet symbol are relevant to  
Figure 43: Schematic drawing of the CC430F5137 SoC showing the specific signal names and required circuits for the MCU (MSP430) component of the chip. \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Name** & **Description** & **Number of Pins** & **Supported MCUs/CPUs** \\ \hline P14 & JTAG ARM & 20 (2 \(\times\) 10) & ARM, ARM-Cortex \\ P12 & MSP430 JTAG & 14 (2 \(\times\) 7) & MSP430 \\ P15 & AVR JTAG ICE mkII & 10 (2 \(\times\) 5) & ATMEL AVR MCUs \\ P13 & JTAG Spy-Bi-Wire & 5 (1 \(\times\) 5) & MSP430 MCUs \\ \hline \hline \end{tabular}
\end{table} 
Table 8: The PDL shield’s four different JTAG connectors for the programming and debugging of the most popular MCUs for WSAN nodes. the UART, the SPI and the JTAG signals. Additionally, for extra reconfigurability, the UART TX and RX signals of the shield have been also routed to the other two pairs of UARTs which are present to the stacking BECs of the S-BEC 1. In the case of this PDL there is no power monitoring requirements, that's why the P-BEC mechanism is not connected to the sheet symbol of the shield's circuitry. The schematic drawing of the shield's circuitry is given in Figure 45. Obviously, a MCU does not need to be present in this PDL shield. Some extra pin-headers were added, in order to ensure that the target processors could be powered either from the external JTAG devices or from its own system's voltage source. Furthermore, pin 19 of the JTAG ARM connector was handled in order to be driven either at logic high (+5 Vdc) or low (0 Vdc, i.e., GND). This facilitates the challenging technique of power profiling, or else power debugging, which is supported by the IAR JTAG debuggers [133]. In parallel with the JTAG facilities, this PDL shield could also support the use of other development hardware tools that may use the I2C-bus, or SPI-bus, or even the UART port. The signals of these interfaces already exist in the S-BECs connectors. The circuitry incorporates a UART-to-USB converter chip, i.e., the CP2102 from Silicon Labs, which can be used to program AVR MCUs which they primarily flashed with the Arduino bootloader. Alternatively, this converter can be occasionally connected to one of the three UARTs of the system pins in order to allow a shield to interface with a personal computer. This facility is very convenient during the system's firmware development processes. Figure 44: Using the design template of SensoTube towards the design of a new PDL shield with support to Arduino main-boards’ MCUs and JTAG-enable MCUs. The final PCB design of this shield is presented in Figure 46. The semicircular cut at the top side of the board was intentionally made in order to allow any external antenna that may exist in a WNL shield, under the PDL shield. The name _Pelti_ was given in this board, inspired by the shape of ancient Greek archers' shields. The PCB was designed as a double-layer board.