# Modeling Intelligent Control Switch IEC 61850 Based Substation Automation Communication
## 5 Implementation of Switch Architecture in Matlab/SimEvents
### Scenario II: Four Switches Mechanism  
Installing two buffers in the same switch can help to minimize the drop packets in the networks but will not minimize the processing time of the events. Furthermore, adding an extra buffer will cause other issues, such as costing extra money; or major device failure, which would mean any power interruption to the switch would shut down the network; or performance issues (CPU), increasing the number of buffers will not make a difference on the CPU processing speed especially if the time of generating events is faster than the time of processing the incoming events; or hardware complexity, which would mean adding a new hardware in the switch that will increase the complexity of the switch.  
Seeking a solution for these problems has been carried out in this section. The four switches technique is proposed as an improved technique for scenario one, that has one master switch and three salves switches working as a single system, as shown in Figure 8. Building a sophisticated controller that monitors and synchronizes the switches' operation is essential in this study. The four switches are connected internally with each other as well as with the controller. This connection helps to maximize the system reliability, security and minimize the drop packets in the network. The events enter the \"output switch\" block that has one input and four outputs at first and then forwards these to the receiver side. The function of that block is to forward the events to the available buffers of the switches. Each output of the \"output switch block\" is connected to a gate. These gates open only when the paths that are connected to them are ready to receive events. The gates are connected with a \"signal latch\" block that sends signals to the gates to open them after ensuring the availability of the connected switches.  
The controller in this switch works to facilitate and smooth out the events travelling between the paths, as shown in Figure 9. When the simulation runs, the \"initial value block\" sends an order to gate 1 to open and prepare to receive events from the input ports. The initial value block generates a random value before any signals hit its input port, then after the first signal enters, the output signal will be identical to incoming signals. The events are sent to the FIFO queue of switch 1 and then to the processor. Whenever the events leave the queue to the processor, the queue block sends a signal from (#d port) to (rvc port) to close the gate of the unavailable path. At the same time, it sends another signal to (wvc port) of the available path to open the gate and receive the events from input ports. In addition, after the processor of the master switch finished processing the events, it sends the events to the output ports and at the same time sends the signal from (#d port) to (wvc port) of the Single latch 1 to open the gate 1 and send single to (rvc port) to close the gate of the busy path to let the events forward to gate 1.  
Figure 8: Four switches technique in SimEvents.