# Roadmapping of Nanoelectronics for the New Electronics Industry
## 15 Beyond Dimensional Scaling
### Overall Roadmap Systems and Technology Characteristics (ORSC and ORTC)
\begin{table}
\begin{tabular}{|l|c|c|c|c|c|c|c|c|} \hline
**2020 IRDS Executive Summary Drivers–ORTC** & \multicolumn{1}{c|}{**VER OF PRODUCTION**} & \multicolumn{1}{c|}{**2019**} & \multicolumn{1}{c|}{**2020**} & \multicolumn{1}{c|}{**2022**} & \multicolumn{1}{c|}{**2025**} & \multicolumn{1}{c|}{**2028**} & \multicolumn{1}{c|}{**2031**} & \multicolumn{1}{c|}{**2032**} & \multicolumn{1}{c|}{**2034**} \\ \hline
**NAND Flash** & 2D NAND Flash unconcected poly 1/2 & 15 & 15 & 15 & 15 & 15 & 15 & 15 & 15 \\ pitch-Finn/2D & & & & & & & & & \\ Flash Product highest density (independent of 2D or 3D) & 512G & 1T & 1T & 1.5T & 3T & 4T & 4T & 4T+ \\ \hline Flash Product Maximum bbell (2D\_3D) & 2,4 & 2,4 & 2,4 & 2,4 & 2,4 & 2,4 & 2,4 & 2,4 \\ Flash 3D NAND Maximum Number or Monory Layers & 48-65 & 64-96 & 96-128 & 128-192 & 256-384 & 384-512 & 384-512 & 512+ \\ \hline \end{tabular}
\end{table} 
Table 2: _Cnt._17. IRDS: Summary of the International Focus Teams (IFT)  
17.1. Applications Benchmarking (AB)  
The aim of the AB IFT in the IRDS is the identification and periodic update of key application drivers, and to the performance of these applications as a function of the time horizons. 17.2. Systems and Architecture (SA)  
A top-down, system-driven 15-year roadmapping addressing key market drivers of the semiconductor industry is performed in the SA IFT. 17.3. Outside System Connectivity (OSC)  
In the OSC IFT in the IRDS the identification and assessment of capabilities needed to connect very different elements in the Internet of Everything (IoE) era is carried out together with the highlight technology needs and gaps. Applications include mobility, aerospace, home, factory, data centers and warehouses. 17.4. More Moore (MM)  
The physical, electrical and reliability requirements for logic and memory technologies are at the core of the MM IFT in order to sustain More Moore applications (Power, performance, area, cost scaling for big data, mobility, cloud, IoT and server), including the transition from 2D to 3D integration. 17.5. Beyond CMOS (BC)  
The mission of the BC IFT is to survey and assess the most promising future information processing technologies, which could be useful to overcome some CMOS limits, for instance in the field of power consumption. 17.6. Cryogenics Electronics and Quantum Information Processing (CE&QIP)  
The catalog and evaluation of CEQUIP technologies is the goal of this IFT. It assesses the status of technologies in the areas of low temperature electronics and quantum information processing. It covers cryogenic electronics for temperature below \(-150\)\({}^{\circ}\)C, including semiconductor and superconductor devices. On the other hand, quantum information processing using qubits is also addressed in this chapter. 17.7. Packaging Integration (PI)  
This IFT is devoted to packaging integration, which is the last manufacturing process for functional products. Packaging includes electrical connections for signal transmission, power input and voltage control. It also aims to overcome thermal dissipation and reliability issues. 17.8. Factory Integration (FI)  
The focus of factory Integration focus is to ensure that the semiconductor-manufacturing infrastructure is able to produce items at affordable cost and high volume. This includes yield improvement to near 100% and wafer size increases. 17.9. Lithography (L)  
The Lithography IFT focuses on patterning technology for the production of high-performance logic, DRAM, and Flash chips. EUV (Extreme Ultraviolet Lithography) is now the leading-edge technique thanks to the reduction of the development cycle and manufacturing cycle times, the decrease of the numbers of patterning levels and overall complexity. 17.10. Yield Enhancement (YE)  
The Yield Enhancement is devoted to the optimization of the semiconductor manufacturing. The production of the maximum number of functional units if at the center of the YE IFT. Avoiding defects, contamination and variability is the main goal of the manufacturing techniques.