# Study About the Performance of Ascon in Arduino Devices
## 5 Performance Analysis of the Ascon Implementation
### Analysis of the Results
The consistent observation that Ascon-128a outperforms the other variants in terms of cycle efficiency across all tested platforms suggests that it may be the most suitable option when execution speed and low power consumption are critical. This makes Ascon-128a a compelling candidate for devices operating on limited battery life,  
Figure 8: Comparison in terms of speed on Arduino Nano ESP 32. Figure 7: Comparison in terms of speed on Arduino Nano Every. such as remote sensors or wearable technology, where optimizing computational overhead is essential for extending operational longevity. In contrast, although Ascon-80 pq offers higher theoretical guarantees against quantum adversaries, due to its higher safety margin, it has significantly higher cycle counts and higher computational demands. This overhead may restrict its practicality on ultra constrained 8-bit microcontrollers like the Arduino Mega2560 or Nano Every, where CPU speed and memory availability are inherently limited. Nonetheless, its deployment may still be justified in scenarios where post-quantum resilience is a critical requirement, such as secure firmware updates or long-lifecycle industrial systems. Furthermore, the throughput gains observed on 32-bit platforms, particularly on the Arduino Nano ESP32, highlight the ability of Ascon to scale effectively with improvements in hardware capabilities. With over 10,000 operations per second and efficient memory utilization, the ESP32 results demonstrate that Ascon can support real-time or high frequency cryptographic tasks when deployed on more capable devices. On 8-bit platforms, while the performance is understandably more limited, encryption still works within acceptable flash and RAM constraints, validating its usability even in the most limited environments. These findings underscore the versatility and scalability of the Ascon family. They show that, by carefully selecting the variant and hardware platform, developers can strike an effective balance between security requirements, computational efficiency, and system constraints. This flexibility makes Ascon a strong candidate for a wide range of embedded applications, from basic authentication on low-power nodes to high-performance encryption on more powerful IoT gateways. Moreover, to assess the efficiency of the Ascon cipher on Arduino-based embedded platforms, it is essential to compare its performance with previous implementations targeting more powerful microcontrollers or specialized cryptographic hardware. Previous studies have demonstrated that Ascon performs efficiently on 32-bit architectures such as ARM Cortex-M processors. For instance, in the reference implementation presented at the NIST Lightweight Cryptography Workshop, Ascon-128 was installed on a 100 MHz Cortex-M4, with an approximate throughput of 17.5 kbps, which translates to around 137 encryption operations per second with a code size of 9.6 KB and RAM usage less than 2 KB [15]. In contrast, the experimental results obtained from four different Arduino boards, Mega2560, Nano Every, DUE, and Nano ESP32, demonstrate that Ascon executes efficiently across a range of architectures, despite their constrained resources. On 8-bit AVR microcontrollers, such as the Mega2560 (16 MHz) and Nano Every (48 MHz), encryption throughput reached approximately 75 to 80 operations per second, with flash memory usage ranging from 11 to 15 KB and dynamic memory usage below 750 bytes, depending on the Ascon variant. While modest, these figures confirm that Ascon remains viable even on low-performance platforms without hardware acceleration. Substantial gains were observed on 32-bit boards. The Arduino DUE, equipped with a Cortex-M3 at 84 MHz, achieved an average of \(\sim\)2500 encryption operations per second, representing a significant improvement over 8-bit boards. The Arduino Nano ESP32, based on a dual-core Xtensa processor clocked at 240 MHz, achieved over 10,800 operations per second, showcasing the advantage of a more advanced memory system and processing architecture.