# Hot Carrier Photocurrent through MOS Structure
## 3 Results and Discussion  
The measured _C-V_ characteristics of the fabricated MOS structures are presented in Figure 2. The dependencies have shapes typical of the classical metal-insulator-semiconductor structure which, as shown in the inset of Figure 2, is composed of two capacitors connected in series: \(C_{S}\) related to a semiconductor, and another, \(C_{i}\), associated with an insulator. The total capacitance of the structure \(C_{tot}\) is equal to  
\[C_{tot}=\frac{C_{S}\ C_{i}}{C_{S}+C_{i}}. \tag{1}\]  
In this pair, only \(C_{S}\) is dependent on applied voltage. At reverse voltage (as a rule, reverse bias voltage agrees with its positive potential applied on the p-type semiconductor of a MOS structure [25]), holes of the p-Si are accumulated at the semiconductor surface, \(C_{S}\) increases and exceeds the value of \(C_{i}\), and the total capacitance of the structure gets close to \(C_{i}\)[25]. The difference in _C/A_ magnitude of two representative samples, MOS-1 and MOS-2, can be explained by their different _I-V_ characteristics (Figure 3). The SiO\({}_{2}\) oxide of the MOS-1 is a perfect insulator, and no detectable dc current flows across the sample. In contrast, the MOS-2 sample demonstrates leakage current both under forward and reverse bias voltages. Since the semiconductor is of p-type conductivity, stronger current flows in the reverse bias case. Photocurrent is induced when the MOS structures are exposed to the pulsed CO\({}_{2}\) laser light. In the case of \"perfect\" MOS-1 sample, photovoltage of negative polarity with respect  
Figure 3: Current-voltage characteristics of the MOS structures. Figure 2: Capacitance of the MOS structures versus applied voltage. In inset: diagram of a MOS structure as a series circuit of two capacitors, variable \(C_{S}\) and fixed \(C_{i}\). to the grounded terminal is detected when reverse bias is applied (see measurement scheme in Figure 1), and the corresponding photocurrent maximum value increases sharply with the reverse bias and then saturates (Figure 4a, blue solid dots). Much weaker photosignal of opposite polarity (blue open dots) is observed under the forward bias. Typical photocurrent pulse through the MOS-1 sample is shown in Figure 4b. Its dual-polarity shape is similar to an inherent feature of a charging-discharging capacitor. Comparison of curves of MOS-1 in Figures 2 and 4a implies that the photocurrent is most probably related to the capacitance of the structure. The main noteworthy difference in the course of these two dependencies is higher reverse voltage values at which saturation of the \(C\)-\(V\) characteristic begins. Most of the bias voltage applied on the MOS structure falls on the insulator, and the only capacitance that is varied by the voltage is that of the semiconductor surface. To find how \(C_{S}\) varies with the applied voltage, we used Equation (1) and data of the \(C_{tot}\)-\(V\) dependence (Figure 2). The result is depicted in Figure 5 in open orange symbols. For comparison, photocurrent versus the voltage is also shown in the picture. Good agreement between the calculated and measured results is seen. Figure 4: (**a**) Photocurrent versus applied bias voltage. In the legend: “positive” and “negative” indicate photovoltage potential on the load resistor with respect to the ground (see Figure 1). (**b**) Laser pulse (dotted green) and photocurrent pulse (solid blue) through the MOS-1 sample. (**c**) Photocurrent through the MOS-1 sample versus laser intensity (\(P_{0}=1.2\) MW/cm\({}^{2}\)) at \(-2\) V bias voltage. The straight line is guide for the eye of linear dependence. The origin of the photocurrent through the \"perfect\" MOS-1 structure can be explained as follows. When reverse bias is applied, holes accumulate at the p-type semiconductor surface. When heated by the laser, they diffuse to the bulk of the semiconductor, in this way decreasing the accumulated charge (Figure 6a). Capacitance of the structure \(C_{S}\) is altered, and the displacement current flows in the circuit.