# FPGA Implementation of a BPSK 1D-CNN Demodulator
## 3 FPGA Implementation
### Implementation of a Single Neuron  
Neurons play an important role in the hidden layer. Assuming that \([p_{1},p_{2},\ldots,\ p_{n}]\) are the inputs of each neuron, \([W_{1},W_{2},\ldots,\ W_{n}]\) are the weights of the synapses, \(b\) is the bias, and \(f(x)\) is the activation function, the structure of the neuron can be indicated as in Figure 7. Each neuron is fully connected to every convolution kernel output through synapses, and each synapse has its own weight. The weighted results are successively summed, biased, activated, and finally output. In FPGA implementation, a full adder circuit is used to achieve the summing operation. The fixed-point multiplication IP core is used for multiplication.  
Figure 6: Timing sequence of the time delay network. X: input; W: convolution kernel.  
Figure 7: The structure of the neuron. _P_: neuron inputs; _W_: weights of synapses; _b_: bias; _f_(_x_): activation function.  
In this paper, two activation functions are used, which are:  
\[\text{sigmoid}(x)=\frac{1}{1+e^{-x}} \tag{3}\]  
\[\text{ReLU}(x)=\text{max}(0,x), \tag{4}\]  
The implementation method of the ReLU function is very simple, so we mainly discuss the implementation method of the sigmoid function. Two methods are combined to realize the sigmoid function: the LUT method and the piecewise liner function method.  
In the implementation of the LUT method, we mainly used the internal block RAM in the FPGA. First, we made a table from the input to the output, according to the resolution. Then, letting the input of the function be the address, the corresponding function value was written to the memory cell of this address. In this way, the complicated calculation process was simplified to the straightforward addressing process. By using the symmetry of the sigmoid function, only the positive part of the function was written to the LUT, whereas the negative part could be obtained by some simple adjustments according to the input data. This method has the advantages of high precision and ultrashort delay. However, the disadvantage is that the hardware resource cost is too high.  
In the implementation of the piecewise liner function method, we used several linear functions for piecewise fitting of the sigmoid function. It is obvious that the more the function was segmented, the higher the accuracy, and the higher the resource consumption. This method is suitable for functions with good linearity. As for the sigmoid function, part of the interval can be replaced by linear functions, especially in sections near or far from the longitudinal axis.  
In order to combine the advantages of the two methods, the LUT together with the piecewise function were adopted to achieve the sigmoid function. In three intervals with good linearity, which were \(x\in(-1.3,1.3)\cup(-7.5,-4)\cup(4,7.5)\), three linear functions were used to replace the sigmoid function; in the intervals with bad linearity, i.e., \(x\in(-4,-1.3)\cup(1.3,4)\), the LUT was used to implement the sigmoid function; and in other intervals that were far away from the longitudinal axis, the sigmoid function converging to constants was replaced by constants. The structure of the sigmoid function implementation is shown in Figure 8. The control block firstly analyses the range of the input, then places the multiplexers (MUXs) at the right gear and adjusts the output value of the ROM. The output first-input/first-output (FIFO) is used to adjust the output delay of the LUT method. It aims to synchronize the two paths, and then synchronize the outputs of all neurons. This method takes into account both resource consumption and accuracy. The implementation result is shown in Figure 9.  
Figure 8: The implementation structure of the sigmoid function. C: constant;MUX: multiplexer.