# An LLC Converter with Capacitive Insulation
## 4 Experimental Results
The experimental setup of the safety test method is shown in Figures 1 and 7. The front-end bridge rectifier and the power factor correction stage are included during the safety test. Finally, the leakage current of the proposed circuit with 3 kV/60 Hz hipot test conditions is 80 \(\mu\)A. The leakage current test is operated with a working DUT with an input voltage of 264 V/60 Hz and full load conditions. The experimental leakage current of the proposed circuit is only 10 \(\mu\)A, which is far below the limitation of 0.5 mA. Figure 14a,b show the photos from the top view and bottom view, respectively. The resonant capacitors \(C_{r1}\) and \(C_{r2}\) provide 8 mm creepage to meet the reinforced insulation requirements [13; 14; 26]. The two photo couplers work as signal isolators on the feedback path. Figure 14: _Cont._  
Figure 12: Power density comparison. Figure 13: Curves of efficiency versus load current for proposed LLC and 150 W LLC. The resonant capacitors used in this paper are ceramic capacitors, which generally have a high temperature coefficient, so the capacitance value is affected by component temperature, and this should be taken into consideration in the circuit design. Figure 15a,b correspondingly show the thermography photos from the top view and bottom view under full load operation and natural convection, respectively. As shown as Figure 15, the actual operation of \(C_{r1}\) and \(C_{r2}\) is around 56 \({}^{\circ}\)C to obtain capacitance variation of \(-20\%\). The hotpot is at the SR control IC, which is located too close to the heat sources of \(T_{1}\), \(Q_{3}\), and \(Q_{4}\). In a conventional LLC converter design, the switching frequency decreases as the output load increases, and the switching frequency shifts to region II to increase the voltage gain. The higher the output power, the higher the thermal radiation from \(L_{r}\) and \(T_{1}\), the higher the temperature of \(C_{r1}\) and \(C_{r2}\), the lower the capacitance of \(C_{r1}\) and \(C_{r2}\), and the higher the \(f_{s}\) will rise, causing the \(f_{sw}\) to move to region II. When the rate of increase in \(f_{s}\) due to the decrease in capacitance is equal to the decrease in \(f_{sw}\) due to the increase in the  
Figure 14: Photos of the proposed prototype: (**a**) top view, (**b**) bottom view. Figure 8:0 Thermography photos of the proposed prototype: (**a**) top view, (**b**) bottom view. output load, it can be observed that the \(f_{sw}\) decreases insignificantly after the half load of the proposed circuit, as shown in Figure 8:1  
In terms of circuit design, the temperature of the components can be obtained from the heat flow simulations by the mechanical engineer, and then the temperature change curve provided by the data sheet can be used to estimate the change in capacitance caused by the temperature. In addition, during the period of the PCB layout, the capacitor should be placed upwind of the cooling air flow to avoid being close to heat-generating components such as switch devices or magnetic components to reduce the temperature rise. If a more stable capacitance value is required, the X7R grade capacitor [27,28] is recommended, with a capacitance variation of less than 15% and 20% over the temperature range of \(-\)55 \({}^{\circ}\)C to \(+\)125 \({}^{\circ}\)C, respectively. Table 6 shows the comparison between the proposed and the existing methods. It can be found that the proposed method can satisfy the safety requirement of the IEC60950-1 standard and achieve higher conversion efficiency and power density. Figure 17 shows the four possible derivative circuits of the proposed circuit in this research. Because they all have the same operating principles, they are considered to have high feasibility.