## 2 Single-Phase NPC Converter Structure and Conventional MPC Approach
\[i_{c1}=\frac{S_{a}(S_{a}+1)-S_{b}(S_{b}+1)}{2}i_{s} \tag{2}\]  
\[i_{c2}=-\frac{S_{a}(S_{a}-1)-S_{b}(S_{b}-1)}{2}i_{s} \tag{3}\]  
The dynamics of capacitor voltage in dc link are expressed as follows:  
\[\frac{dv_{cx}}{dt}=\frac{1}{C}i_{cx}\ (x=1,\ 2) \tag{4}\]  
Using a constant sampling period \(T_{s}\), the capacitor voltage dynamics in the discrete-time domain is describe as  
\[\frac{dv_{cx}}{dt}\approx\frac{v_{cx}(k+1)-v_{cx}(k)}{T_{s}}\ (x=1,\ 2) \tag{5}\]  
where \(v_{cx}(k)\) and \(v_{cx}(k+1)\) represent the capacitor voltages at \(k\)th and \((k+1)\)th instant, respectively. Using Equation (5), the Equation (4) is described in the discrete-time domain as:  
\[v_{cx}(k+1)=v_{cx}(k)+\frac{T_{s}}{C}i_{cx}(k)\ (x=1,\ 2) \tag{6}\]  
Additionally, capacitor voltage variations during one sampling period, \(\Delta v_{cx}(k)=v_{cx}(k+1)-v_{cx}(k)\), from Equations (2), (3) and (6), is determined by the switching states, \(S_{a}\) and \(S_{b}\), and the source current. The variance among the upper capacitor voltage and the lower capacitor voltage at the \(k\)th instant is described as:  
\[v_{c(gap)}(k)=v_{c1}(k)-v_{c2}(k). \tag{7}\]  
Furthermore, the difference between the two capacitor voltages in each sampling instant, \(\Delta v_{c(gap)}(k)\), can be deduced using Equations (2), (3) and (6) as:  
\[\Delta v_{c(gap)}(k)=\Delta v_{c1}(k)-\Delta v_{c2}(k)\ =\ \frac{T_{s}}{C} \Big{(}S_{a}^{2}-S_{b}^{2}\Big{)}i_{s}(k). \tag{8}\]  
The ac source current of the converter is obtained as follows:  
\[v_{s}=R_{s}i_{s}+L_{s}\frac{di_{s}}{dt}+v_{ab}. \tag{9}\]  
The source current dynamic is deduced in the discrete-time domain as follows:  
Figure 1:0  
The predicted source current in Equation (10) can be changed following five possible values of the converter input voltage. Therefore, from Equations (7) and (8), the capacitor voltage balancing task can be carried out by adjusting the switching states \(S_{a}(k)\) and \(S_{b}(k)\), whereas the source current is regulated  
By shifting Equation (19) one step forward for delay compensation [34; 35], the \(a\)-phase reference voltage at \(k+1\) sampling instant, which can force the source current to follow the reference current, can be written as:  
Figure 1:1  
The resulting cost function can be described in Equation (21) with the reference voltage and actual voltage in each phase. Figure 1:2  
where \(v_{a}(k+1)\) and \(v_{b}(k+1)\) denote the \(a\)-phase and \(b\)-phase voltages of the converter at the \((k+1)\)th step with respect to the neutral point \"o\". The voltage-based cost function in Equation (21) compares reference voltages with the possible voltage candidates. Although there are two control objectives in Equation (21), the two terms are for the \(a\)-phase and \(b\)-phase voltage control in the converter, which always has the same weighting. As a result, the two terms do not use the weighting factor. The phase voltages of the converter, \(v_{a}(k+1)\) and \(v_{b}(k+1)\), can take the values in Equation (22):  
\[v_{x}(k+1)=\left\{ \begin{array}{rl}\frac{V_{dc}}{2}\ (S_{x1},S_{x2}=1)&\\ 0\ (S_{x2},S_{x3}=1)&\\ -\frac{V_{dc}}{2}\ (S_{x3},S_{x4}=1)&\end{array} \right. (x=a,\ b) \tag{22}\]  
It can be seen that the optimal switching state in the voltage-based cost function of Equation (21) is determined from the reference voltage because the MPC method selects a switching state resulting in the minimum cost function. For instance, if the \(a\)-phase reference voltage, \(v_{diff}^{a}\), is higher than \(V_{dc}/4\) and lower than \(V_{dc}/2\), as in Figure 2, the \(a\)-phase switching state \(S_{a}\) becomes one as seen from Equations (22) and (23).