# AI Makes Crypto Evolve
## 4 Airc  
This stage attempts to ensure resilience in cryptosystems against AI-based attacks. In this stage, protective provisions are added to cryptographic systems and mechanisms in the design phase. Figure 4 illustrates this stage and its properties. In the rest of this section, we focus on ML-Resilient PUFs because of the attention they received from the research community. _PUFs Resilient against ML Attacks_  
In the previous section, we discussed the many ways PUFs can be targeted by ML attacks. This motivated several research works aiming to improve the resilience of PUFs against these attacks. The authors of [70] proposed a PUF that utilizes the strong nonlinearity of the convergence time of Bistable Rings (BRs) with respect to variations in the threshold voltage. Their simulations returned a prediction accuracy of 50% for SVM in the responses of the proposed PUF. This indicated that SVM cannot perform better than a random guessing algorithm. Another PUF was proposed in [71; 72] with the goal of reducing the accuracy of ML attacks to 50%. The authors of [73] presented a practical smooth-routing PUF authentication procedure in the settings where the server authenticated the device and when the authentication number was limited during the manufacturer's lifetime. The CRPs would not be available  
Figure 4: AIRC: Resilient Against ML and DL Attacks. for ML attacks in the same way as other PUFs. They would instead be encrypted using protocols to limit their availability. AN ML-resistant PUF was designed using Linear Feedback Shift Registers (LFSRs) in [74]. The PUF takes \(n\) as the challenge from the input and clocks the LFSR \(n\) times with no output. In this way, the state of the LFSR is kept unknown to the attacker. At the \(n\)-th stage, it would send all the output bits to the APUF. A Configurable Tristate PUF (CTPUF), proposed in [75], is also resilient to ML attacks. It contains structures from APUF, Configurable RO PUF, BR PUF, to dual-mode PUF. It uses \(n\) stages inverters and multiplexers at the front of the design to determine the signal transmission path. According to the path or the position of the response bit, different types of PUF would be used to generate the challenge and response bit. It uses a bitwise XOR obfuscation mechanism to prevent matching between challenging and response pairs for further protection. The complexity of this design makes it more secure than other PUFs. However, it requires more computing power as a tradeoff. Furthermore, the short function proposed in [76] provides a subtramentive intention-between backed by the relentlessly powerful PUF. The PUF derives its uniqueness from the random mismatch of the threshold voltage with the inverted gate and drain drains and checking in the underground region. The nonlinear current relations in the underground tunnel region of the proposed PUF are also supported by ML resistance (ML) attacks. The prediction accuracy of the PUF response with logistic regression SVM and MLP is close to 51%. The PUF prototype fabricated at 65 nm consumes only 0.3 pJ/bit and achieves the optimum combination of energy efficiency and ML impact resistance. An Ising-PUF is a PUF that imitates the Ising model originating from the field of physics. A PUF of this type was designed in [77] to be robust against ML attacks. The authors used some small PUFs as spins in the Ising model. Each PUF would send its value as a challenge signal to its adjacent PUFs. The value of the PUFs would be random since they interact with each other. The results demonstrated that it possessed ML resistance due to its chaotic property. The authors of [71] argued that there is a tradeoff between AM-resistance and error rate. They employed a two-stage non-linear cascaded structure to manage this tradeoff. Additionally, a stability-aware challenge pruning technique was used in [78] to keep the temperature steady. Similar to two-staged PUFs, the proposed Two-Round SRAM PUF (2 SPUF) uses two rounds of implementations for PUFs to reduce the correlation between CRPs.