## 2 Materials and Methods
### Soil Electrical Conductivity Prototype Design
#### 2.2.2 Hardware Design of Soil Electrical Conductivity Prototype  
As depicted in Figure 3, the soil electrical conductivity prototype comprises several modules, as follows: a conductivity detection module, a temperature detection module, a main control module, a storage module, a communication module, and a power control module. The core of the main control module is a low-power, high-performance STM32 chip. The main control module interfaces with the detection modules (soil electrical conductivity and temperature), the storage module, the communication module, and the power control module via communication protocols such as I2C, SPI, and UART. Figure 3: Schematic diagram of prototype hardware system structure. Figure 2: Ring probe structure diagram. The primary focus of this paper is the design of the soil electrical conductivity detection module. Traditional four\(-\)terminal conductivity measurement systems typically comprise discrete components, including an excitation signal generation circuit, an AC constant\(-\)current drive circuit, a range switching circuit, and an RMS detection circuit. This approach results in a sensor with numerous components, leading to high circuit complexity and elevated costs, thereby hindering widespread application and adoption. In this thesis, the soil electrical conductivity detection module utilizes the low\(-\)power analog front\(-\)end chip AD5941 from Analog Devices Inc. (ADI, USA), which incorporates a high\(-\)precision excitation loop, a programmable switching matrix, a general\(-\) purpose ADC channel, and a DFT module, among other features [25]. This chip offers extensive reprogramming capabilities. Leveraging the principles of the improved \"four\(-\)terminal method\" for soil electrical conductivity detection, our team strategically combined the chip's on\(-\)board resources to implement absolute impedance measurement, thereby facilitating accurate soil electrical conductivity measurement, as illustrated in Figure 4.  
The working process is as follows:  
1. The waveform generator within the AD5941, in conjunction with the high\(-\)speed DAC, is configured to form a digital frequency synthesizer (DDS), capable of producing a 100 kHz sine wave excitation signal with a 30\(-\)bit resolution;
2. The sine wave excitation signal is routed through a programmable gain amplifier (PGA) and an excitation amplifier, emerging from the F+ (CE0) port. Subsequently, it passes through the isolation capacitor C1, forming an AC signal (I) that is applied to the impedance to be measured (soil probe, Ztest);
3. The AC signal (I) then flows through F\(-\) (AIN1) and is converted into a voltage signal via a high\(-\)performance transimpedance amplifier (HPTIA). This signal is biased to 1.11 V to ensure compatibility with the ADC's input range;
4. After the ADC samples this voltage signal, the data are processed by the DFT module, yielding the real and imaginary components of the current frequency;
5. Subsequently, the ADC's input source is switched to the voltage measurement paths S+ (AIN2) and S\(-\) (AIN3) by closing N2 and disconnecting T2 via the multiplexer (MUX);
6. The voltage (V) at the current frequency is then measured, sampled by the ADC, and processed by the DFT module to obtain the corresponding real and imaginary voltage components;  
Figure 4: Schematic diagram of soil electrical conductivity measurement principle. From these real and imaginary components of the voltage (V) and current (I), the respective amplitude and phase are calculated and stored in the FIFO register. The microcontroller unit (MCU) retrieves the real and imaginary components of the voltage and current from the FIFO registers, converts these components into amplitude and phase, and then applies the following formula to determine the magnitude and phase of the measured impedance, as presented in Equation (4). \[\left\{ \begin{aligned} &|Z_{test}|=\frac{Voltage\;Magnitude}{ Current\;Magnitude}\times R_{TIA}\\ &\theta=Voltage\;Phase-Current\;Phase+C_{TIA}\end{aligned} \right.