# Online Learning-Based ANN Controller for a Grid-Interactive Solar PV System
## 5 Results and Discussion
#### Hardware Implementation: Balanced Non-Linear Load  
The above case was implemented using the experimental set-up. The developed scheme was realized using a dSPACE set-up for a balanced loading condition, as shown in Figure 14. The FPGA controller produced the wanted gating pulses for all six IGBT switches of voltage source converters to attain the expected performance, and demanded less sampling time, needing only 10 microseconds to perform the developed control algorithm. This section includes the experimental performances of the adaptive learning backpropagation-based control algorithm for a three-phase three-wire system feeding a non-linear balanced load. The ratings and specifications of the experimental set-up are presented in the Table 2.  
Figure 11: Single phase: (**a**) VS: supply voltage; (**b**) IS: supply current; (**c**) IC: compensator current; (**d**) VC: compensator voltage.  
Figure 12: Three phase: (**a**) VS: supply voltage; (**b**) IS: supply current; (**c**) IL: Load current; (**d**) IC: compensator current.  
Figure 13: (a) Load current THD; (b) source current THD.  
The prototyping set-up developed for testing the ANN-BP controller implementation comprised four parts: DSTATCOM; an FPGA board; a dSPACE Board; and two computers. Quartus software was used to design the controller for implementation on the FPGA board. The plant set-up, developed by MATLAB/SIMULINK, was copied to the dSPACE board via the interface. The test information set was transferred between the dSPACE and the FPGA using a serial link, and results were supervised using a DSO (digital storage oscilloscope).  
As shown in Figure 15, whenever DSTATCOM was activated and started delivering the compensation current, the source current became purely sinusoidal. Before operating DSTATCOM, the non-sinusoidal current could be observed at the source side, the same as the currents drawn by the non-linear load. The change in the shape of the source current reflects the improvement of THD at the source side.  
The load currents of the three phases are shown in Figure 16, which are purely non-sinusoidal, as load current is non-linear by nature. The three source currents are shown in Figure 17, and are purely sinusoidal.  
The simulation results were validated using experimentation, and the values are tabulated in Tables 3 and 4 for the purpose of comparison and also shown in graph i.e., Figure 18. The DSTATCOM using the ANN-BP-based controller was implemented using a hardware set-up and the results were satisfactory. Comparison charts are displayed in Figures 19 and 20.  
\begin{table}
\begin{tabular}{c c c} \hline  & **Component Name** & **Specification Details** \\ \hline
01 & Shunt Active Filter (DSTATCOM) & 10 KVA, 1000 V DC Link Voltage, 1800 Micro Farads (Cdc) \\ \hline  & & EP4 CE6 FPGA Board with \\
02 & Controller & Programmer Altera Cyclone IV, \\  & & programmed using the schematic \\  & & editor of Quartus software \\ \hline
03 & Coupling Inductance & 0–20 Mh, 10 A with tapings \\ \hline \end{tabular}
\end{table}
Table 2: Hardware components and their details.  
Figure 14: Experimental set-up of the DSTATCOM.  
Figure 16: Load currents of the three phases.  
Figure 15: Single phase: (**a**) supply voltage; (**b**) supply current; (**c**) compensator current; (**d**) compensator voltage.  
Figure 17: Supply currents of the three phases and their THD.  
\begin{table}
\begin{tabular}{c c c} \hline \hline
**Parameters/Signals** & **Without** & **DSTATCOM with PI** & **DSTATCOM with** \\  & **DSTATCOM** & **Controller** & **ANN Controller** \\ \hline THD of Is\({}_{\text{cyb}}\) (\%) & 21.8 & 6.4 & 3.6 \\ \hline \hline \end{tabular}
\end{table}
Table 4: Source current THD for various conditions.  
Figure 18: THD comparison of the simulated model and the experimental set-up.