# A Unified PUF and Crypto Core Exploiting the Metastability in Latches
## 1 Introduction  
A secure system's root of trust (RoT) requires some primitives to guarantee a minimum level of security [1; 2; 3]. For example, true random number generators (TRNG), physical unclonable functions (PUF), and cryptography algorithms can be used in a system's key generation and booting processes. Typically, each secure primitive is implemented in a standalone peripheral in the system, increasing the area overhead. In addition, a performance reduction is generated by moving the key into the respective usage module. Therefore, an approach consisting of unifying such modules with hardware security primitives is adopted to reduce the area overhead, exploiting different physical phenomena in the original peripheral. For example, a static random access memory (SRAM) can be used to generate a TRNG-PUF, exploiting the bit line's time response and leakage current [4; 5; 6]. In addition, a TRNG and a non-volatile random access memory (NVRAM) can be unified, exploiting the metastability in the sense amplifier [7] or reading the bit cell noise [8]. On the other hand, a PUF-NVRAM is unified using the initial charges into the floating gates' bit cells [9]. Another method consists of the unification of a TRNG-crypto core based on the metastability response using hold violations [10]. The static and dynamic entropies used in PUFs and TRNGs, respectively, are generated with different physical phenomena. Additionally, depending on the physical phenomena, the entropy source of the PUFs and TRNGs needs calibration or the utilization of particular techniques in the implementation to reduce the undesirable effects. For example, the metastability in flip-flops (FFs) can be used to generate a TRNG using two clocks with different frequencies [11; 12; 13]. In addition, a clock manager can generate a PUF, calibrating the clock frequencies to obtain a stable and unique response [14]. In another way, a TRNG based on frequency collapse can be implemented with a noise generator to guarantee that physical phenomena occur [15]. However, the mismatch causes an increase in thestatic entropy, generating a stable and unique response in the physical phenomena of the PUF implementation [16]. Therefore, some strategies have been proposed to mitigate the systematic mismatch to generate a robust TRNG [17; 18]. Furthermore, the implementation of an FPGA introduces an additional mismatch, increasing the implementation difficulty in the entropy source [19]. On the other hand, the cross-coupled inverter pair [20] and the NAND [21; 22] latches are used in many TRNG implementations. However, TRNGs based on the metastability of latches require a calibration step due to the static entropy generated by the mismatch. Because of the many potential problems caused by the mismatch in the TRNG application, a calibration step or technique is mandatory in the implementation. Nevertheless, the mismatch can be exploited to generate a PUF implementation without a calibration step, reducing resource utilization. Cryptography algorithms are used in data transmission, providing a secure end-to-end channel for vital information. However, side-channel attacks affect software implementations [23; 24; 25]. Therefore, new approaches are proposed to mitigate the vulnerabilities using in-memory computation [26] or hardware implementations [27; 28; 29]. The cipher most used in Transport Layer Security (TLS) is the advanced encryption standard (AES) [30]. Nonetheless, a new approach is proposed in TLS version 1.3, generating another alternative to the AES cipher [31; 32]. The new cipher is the ChaCha20 based on Salsa20 [33], using 20 rounds in the operational matrix. This work presents a unified PUF-ChaCha20 crypto core in an FPGA implementation. The main contribution of the current work is the unification of the PUF and crypto core without a significant area overhead, providing a new security approach in internet security in the one-time key (OTK) generation of the ChaCha20-Poly1305 AEAD into TLS version 1.3.