# Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA
###### Abstract  
In cryptography, elliptic curve cryptography (ECC) is considered an efficient and secure method to implement digital signature algorithms (DSAs). ECC plays an essential role in many security applications, such as transport layer security (TLS), internet protocol security (IFsec), and wireless sensor networks (WSNs). The proposed designs of ECC hardware implementation only focus on a single ECC variant and use many resources. These proposals cannot be used for resource-constrained applications or for the devices that need to provide multiple levels of security. This work provides a multi-functional elliptic curve digital signature algorithm (ECDSA) and Edwards-curve digital signature algorithm (EdDSA) hardware implementation. The core can run multiple ECDSA/EdDSA algorithms in a single design. The design consumes fewer resources than the other single-functional design, and is not based on digital signal processors (DSP). The experiments show that the proposed core could run up to 112.2 megahertz with Virtex-7 devices while consuming only 10,259 slices in total. s +
Footnote †: journal: _Cryptography_  
**Citation:** [PERSON]; [PERSON] [PERSON]; [PERSON]; [PERSON]; [PERSON] Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA. **Copyright**  
**2022**, 6, 25. [[https://doi.org/10.3390/cryptography6020025](https://doi.org/10.3390/cryptography6020025)]([https://doi.org/10.3390/cryptography6020025](https://doi.org/10.3390/cryptography6020025))  
Academic Editor: [PERSON]  
Received: 16 March 2022  
Accepted: 5 May 2022  
Published: 10 May 2022  
**Published:**  
**Published:**  
Montgomery ladder algorithm is used for elliptic curve point multiplication (ECPM). In this design, two separate cores are deployed for point adding and point doubling to increase the throughput. Although the authors try to implement the whole system of ECDSA, a clear structure of scalar multiplication or the number of digital signal processors (DSPs) usage are not reported. In 2015, [PERSON] et al. suggested a hardware-software co-design approach for ECDSA with the National Institute of Standards and Technology (NIST) P-163 curve [10]. Their improvement version that was published in 2017 can run all NIST recommended field sizes from 192 to 521 bits [11]. Their ECDSA design relies on a general purpose processor (GPP), which is Microblaze in their work, and a hardware accelerator for some functions of ECDSA. Such an approach could take advantage of GPP, which can run at high frequency, and heterogeneous hardware, which provides a high level of parallelism. Their design provides a high performance, but it encounters some drawbacks. Firstly, the GPP cannot perform another task while the ECDSA core is working, and the design suffers too much overhead because many data exchanges between GPP and FPGA are performed through the communication bus. Secondly, the design consumes too many resources, with 24,135 slices and 234 DSP for NIST p-521. Although the design can be reconfigurable, another synthesis is required for a different configuration. The design in [12; 13; 14] targets a high-performance design with Curve25519. While the authors of [14] proposed a multicore design, the authors in [12; 13] optimized the scalar multiplication by using the Karatsuba multiplication algorithm. In 2019, [PERSON] and [PERSON] provided a compact and flexible FPGA implementation of Ed25519 [15]. Although their work targets embedded and IoT devices, the resource consumption is still high. All the mentioned designs rely on the DSP of the FPGA. Although the DSP-based architectures provide high performance, they can be adjusted in the low-profile hardware platforms, where the number of DSPs is limited or not supported. On the contrary, the non-DSP architectures could be deployed on all devices. In [16], [PERSON] et al. reports a high-performance design of ECPM for Curve25519. The core consumes 8900 slices on Virtex-7 without using any DSP. [PERSON] et al. in [17] provided a novel method to apply the residue number system (RNS) to implement ECPM.