## 2 Experimental  
Figure 1a shows a schematic cross-section of the short-channel OFETs fabricated in this study. We used a heavily doped \(n\)-type Si wafer with a thermally-grown SiO\({}_{2}\) insulating layer (200 or 50 nm thick), which served as the gate electrode and gate insulator, respectively. Ti/Au (1-2 nm/30 nm) source-drain electrodes with different values of \(L\) (5 um to 30 nm) were fabricated on the Si/SiO\({}_{2}\) substrates by using electron-beam lithography and a lift-off process. The bottom Ti layer was employed to promote the adhesion of the Au electrodes to the SiO\({}_{2}\) surface. To ensure that carriers can be injected from the Au source electrode into the organic semiconductor layer [21], the thin Ti adhesion layer was used in our devices. The channel width (\(W\)) was scaled to maintain \(W/L=10\) to adjust the dimension of the output current in devices with different \(L\).  
Figure 1b shows the chemical structures of organosilanes used to form dipole SAMs on the SiO\({}_{2}\) surfaces. We used phenethyltrichlorosilane (PETS) and 3-chloropropyltrichlorosilane (CPTS), which have different polarities of dipole moments and form SAMs with similar levels of hydrophobicity [15; 16]. CPTS has a large dipole moment pointing from chlorine toward trichlorosilane; this forms strong electron-withdrawing surfaces and leads to the accumulation of holes [15; 16; 18; 22]. PETS has a relatively small dipole moment pointing toward the phenyl end group [16; 23; 24], which can form weak electron-donating surfaces. After the Si/SiO\({}_{2}\) substrates with Ti/Au source-drain electrodes were cleaned with acetone and isopropanol in an ultrasonic bath and with an UV/O\({}_{3}\) cleaner, the substrates were immersed in ~10 mM toluene solutions of the organosilanes in capped bottles for ~14 h to form SAMs on the SiO\({}_{2}\) surfaces. After SAMs were formed, the substrates were washed ultrasonically with fresh toluene, acetone, and isopropanol to remove any excessive layers and then baked at 150 \({}^{\circ}\)C for 1 h in a vacuum to enhance the cross-linking of the organosilane molecules. The water contact angles of the Si/SiO\({}_{2}\) substrates treated with PETS and CPTS SAMs were 92\({}^{\circ}\) and 84\({}^{\circ}\), respectively.  
For the organic semiconductors, we used \(p\)-type polymer semiconductors with different ionization potentials (IPs), as shown in Figure 1c: regioregular poly(3-hexylthiophene) (P3 HT) (IP = 4.9 eV) and poly(9,9-dioctylfluorene-co-bithiophene) (F8T2) (IP = 5.5 eV) [25]. The organic semiconductor films were deposited on the SAM-treated Si/SiO\({}_{2}\) substrates by spin-coating from 0.5-1 wt % toluene solutions. The obtained films were followed by thermal annealing in a vacuum to remove residual solvent and dopants such as oxygen and water from the semiconductor films [26]. The annealingtemperature of 100 \({}^{\circ}\)C was used to avoid the degradation of field-effect mobility in P3 HT FETs caused by high-temperature annealing [27].  
The electrical measurements of the fabricated OFET devices were performed in a vacuum at a probe station (Lake Shore Cryotronics TTP4 (Westerville, OH, USA)) by using source meters (Keithley 2611 and 2400 (Cleveland, OH, USA)) at room temperature. The field-effect mobility (\(\mu\)) was calculated from the transfer characteristics in the saturation region by using the following standard FET equation:  
\[I_{D}=\ \frac{\mu C_{i}W}{2L}(V_{G}-V_{th})^{2} \tag{1}\]  
where \(C_{i}\) is the capacitance per unit area for the gate insulator, \(V_{G}\) is the gate voltage, and \(V_{th}\) is the threshold voltage.