# Improved DRUS 4H-SiC MESFET with High Power Added Efficiency
## 3 Results and Discussion
### Mechanism to Improve Device Parameters  
Through the analysis of Figures 4 and 5, it can be acquired that when \(H_{1}\) = 0.05 \(\upmu\)m, \(H_{2}\) = 0.05 \(\upmu\)m, \(N_{\text{d}}=6\times 10^{17}\) cm\({}^{-3}\), the power added efficiency reaches the maximum value of 64.1%. It can be seen from Equation (1) that PAE is an efficiency that considers DC and AC parameters [18]. The parameters \(V_{\text{t}}\), \(g_{\text{m}}\) and \(C_{\text{gs}}\) simulated above have an impact on power added efficiency. The larger the absolute value of the threshold voltage of the device, the more difficult it is that the gate voltage is pinched off, which results in higher DC power consumption and smaller PAE. As the maximum transconductance of the device increases, the power-added efficiency of the device tends to decrease linearly. This is because when the device transconductance increases, it means that the ability of the gate to control the current is increased, and the channel resistance is increased, resulting in an increase in the DC power consumption of the device, and the power added efficiency of the device is reduced. The larger the \(C_{\text{gs}}\), the greater the energy lost when charging and discharging the capacitor, resulting in a larger \(P_{\text{dc}}\), which in turn reduces the PAE. The LDUS-MESFET has a smaller threshold voltage and capacitance than the DRUS-MESFET. Although the transconductance is improved compared with the DRUS-MESFET, it can be seen from the simulation that the threshold voltage \(V_{\text{t}}\) and \(C_{\text{gs}}\) have a greater influence on the PAE than the transconductance. So the PAE of the LDUS-MESFET is 85.8% higher than the DRUS-MESFET.  
\[\text{PAE}\ =\ \frac{P_{\text{out}}-P_{\text{in}}}{P_{\text{dc}}} \tag{1}\]  
where \(P_{\text{out}}\) is output power, \(P_{\text{in}}\) is input power and \(P_{\text{dc}}\) is DC power.  
It can be seen from Table 2 that the saturation current is increased by 27.4% compared with the DRUS-MESFET. It can be obtained from Equation (2) that the saturation current is proportional to the amount of charge in the channel and the effective thickness of the channel [14]. Heavy dopingunder the lower gate and reducing the thickness of the undoped region in the channel increase the saturation current. The breakdown occurs at the edge of the gate near the drain side, and the thickness of the undoped region has a certain influence on the breakdown voltage. So the LDUS-MESFET has a lower breakdown voltage than the DRUS-MESFET. But the range of reduction is acceptable. The transconductance reflects the gate voltage's ability to control the channel current of the device. The partly high doping under the lower gate makes the transconductance of the LDUS-MESFET larger than the DRUS-MESFET. The threshold voltage refers to the gate-source voltage when the channel is pinched off. Since the LDUS-MESFET has a longitudinal concentration gradient in the channel, the concentration gradient produces a longitudinal electric field that weakens the pinch-off voltage, which results in a decrease in the absolute value of the threshold voltage. So the LDUS-MESFET has a smaller threshold voltage than the DRUS-MESFET. Compared with the DRUS-MESFET, the LDUS-MESFET has a reduced thickness of the undoped region near the drain side of the gate. So that the drain side depletion layer can be expanded and the source side expansion is reduced, this makes \(C_{\text{gs}}\) decrease.  
\[I_{\text{dsat}}\ =\ Q(x)v(x)\ =\ Zb(x)\text{q}n(x)v(x) \tag{2}\]  
where \(Z\) is the channel width, \(b(x)\) is the effective depth of the channel, q is the electron charge, \(n(x)\) is the electron density, and \(v(x)\) is the electron velocity.