## 4 Results and Discussion  
Modules related to cryptography are among the highest in terms of logic resources consumption compared to other modules in IoT edge devices [41]. Therefore, plenty of attention is paid to the cryptographic modules in resource-constrained devices to satisfy their limitations. We have presented detailed discussions of the proposed AE, and further parameters were considered in addition to synthesis and simulation on different platforms. The block cipher (LED) and hash function (PHOTON) were combined to create an authenticated encryption with the aim of utilizing and reusing the common operations between the two cryptographic primitives. Therefore, a lightweight authenticated encryption primitive is implemented on the register transfer level (RTL) using Verilog Hardware Description Language (HDL). The most lightweight variants, the LED-64 block cipher and the PHOTON-80/20/16 hash function, are merged to compose the proposed authenticated encryption. The generic composition method used in this architecture design is the encrypt-then-MAC method, which is the most provably secure. The architecture is synthesized and simulated on several Altera FPGA devices with the help of their provided software. Figure 11 and Table 3 demonstrate the results of the proposed authenticated encryption. The results of the single architectures of the LED block cipher and the PHOTON hash function, as well as the composite authenticated encryption, are generated by Altera Quartus II. The results of the resource utilization and maximum operating frequency are taken directly from the analysis generated by Quartus II. Power consumption was measured using the power analyser tools (PowerPlay) provided by Quartus II. The percentages of the reduction rates of the resource utilization and power consumption are found by comparing the composite architecture to the single architectures. The efficiency is obtained from the input data, maximum allowable frequency, latency, and logic utilization. The authenticated encryption is processed in 140 permutation rounds. LED-64 encrypts the 64-bit input block in 32 rounds. PHOTON-80/20/16 processes the input data in two phases, the absorbing phase and the squeezing phase. The absorbing phase processes a single 20-bit message in 12 rounds, resulting in 48 rounds for all four input messages. The squeezing phase also takes 12 rounds for each 16-bit output, resulting in 60 rounds for the whole concatenated hash digest of 80 bits. Therefore, the ciphertext takes 32 rounds to be generated, whereas the hash digest is produced in another 108 rounds, as illustrated in the simulation waveform in Figure 11.  
The performance of the proposed AE scheme is proportional to the performance of our architectures for the single LED cipher and the PHOTON hash function. The performance metric is based on the maximum operating frequency of the single architectures and the composite architecture of the proposed AE. PHOTON runs at a high frequency, whereas LED runs at a slightly lower frequency. If the encryption of the LED block cipher is authenticated by the PHOTON hash function, it will run within the frequency of the lower primitive, regardless of the generic composition method used. Therefore, the proposed  
Figure 11: Simulation waveform of LED–PHOTON authenticated encryption.