## Silicon-Based Technologies  
Regarding silicon-based technologies, it is easy to carry out the complete functions of a MMW transceiver due to their natural of high-level integration for putting baseband digital, analog and RF circuits together. Thus, the demonstration of the multi-functions in a MMIC becomes easier, for instance, adaptive bias for a PA, configurable input matching for optimum noise figure (NF) for a LNA, and so on. Note that the specification of the output power of a transmitter should not be too high or the PA in the transmitter has to be designed in III-V based technologies. Consequently, silicon-based technologies have attracted a lot of research interest. With the high-level integration capability of the Si-based technologies, system-on-chip (SoC) becomes a popular topic in these two decades. Among the circuit components in a MMW transceiver, radio frequency (RF) and baseband SoCs are of great importance [13, 22]. For instances, some W-band image sensing systems [23, 24, 25, 26, 27] and V-band transceivers [28, 29, 30], which are designed for IEEE 802.15.3c, are implemented in silicon based technologies such as a 65-nm complementary metal oxide semiconductor (CMOS) or a silicon-germanium (SiGe) process. From the technology point of view, silicon-based technologies include CMOS and BiCMOS technologies. Regarding CMOS technology, the parasitics contribute to inferior performances in implementing MMW or sub-MMW monolithic integrated circuits. However, it has some unique properties that the SiGe BiCMOS technology cannot take over nowadays. In general, the BJTs in SiGe BiCMOS technologies have better noise performance than that in the CMOS technologies [31]. Regarding the low noise characteristic of the SiGe technologies, the reduction of base resistance \(R_{\mathrm{B}}\) can be attributed to the lateral scaling and hence, the power gain as well as trans-conductance can be intensified. Thus, the minimum noise figure (NF\({}_{\mathrm{min}}\)) will be improved in SiGe BiCMOS technologies. However, with the aggressive scaling down of the gate length in CMOS technologies, the NF\({}_{\mathrm{min}}\) of the MOS transistor in 65 nm, 40 nm or even 28 nm CMOS process has transcended the record maintained by the SiGe 0.13-\(\upmu\)m BiCMOS technologies. Note that 90 nm SiGe BiCMOS technology has been proposed to implement a MMW switch [32]. It demonstrates a comparable performance with 0.15-\(\upmu\)m III-V based technologies. Accordingly, the advanced CMOS technologies are perfect matched for the circuits, which are designed for the low-noise applications [27]. Although the devices in 40 nm or even 28 nm CMOS process have higher \(f_{\mathrm{f}}\) and \(f_{\mathrm{max}}\), they are made for advanced digital circuits. Therefore, the top thick metal, which is for MMW circuits, is not essential in these technologies. On the other hand, the loss of the passives such as transmission line and inductors can be reduced by utilizing thick metal layer, which is provided by the foundry in advanced CMOS process like 65 nm process. 28 nm or 40 nm CMOS process usually do not provide top thick metal layer for the RF designers; hence, the 65 nm CMOS process is still popular for RF circuit designs. Note that NF\({}_{\mathrm{min}}\) in CMOS technologies is more sensitive than that in the SiGe technologies due to its property of layout dependence [33]. In general, the multi-finger devices are utilized in CMOS technologies and thus result in large parasitic capacitances owing to the parallel combinations. In contrast, SiGe HBTs has low parasitics owing to their physical structure of the devices. In other words, CMOS devices are more sensitive to the parasitics than SiGe HBTs. The measured NF\({}_{\mathrm{min}}\) will not be the same unless the layout of each LNA is identical [14, 34]. SiGe BiCMOS technologies have a unique advantage for high temperature operation due to the Ge grading and profile shape at the emitter base boundary [35].