# Power Amplifier Predistortion Using Reduced Sampling Rates in the Forward and Feedback Paths
## 5 Conclusions  
In this work, a hybrid digital/analog predistorter was presented. The motivation behind this was to facilitate lower sampling rates in both the forward and feedback paths in preparation for next-generation wireless communication infrastructure development. The proposed hybrid predistorter is composed of a memory polynomial function implemented in the digital domain, and a memoryless nonlinear function in the analog domain. The memoryless nonlinear function linearizes a significant portion of the memoryless nonlinear behavior such that the forward DAC is required to linearize a much smaller bandwidth. Furthermore, experimental validation was performed for two cases in which a 20 MHz and 40 MHz bandwidth signals were utilized. The results of the first case study with the 20 MHz bandwidth signal indicates a possible reduction in sampling rate in both the forward and feedback paths by 60% when compared to the standard RTNTB model. Although the results showed some noticeable linearization degradation as the sampling rates were reduced, the linearization performance still remains within the standard requirements for spectrum emission mask. Furthermore, the second case study with the 40 MHz signal shows a similar trend with a sampling rate commensurate to \(3\times BW\) in contrast with the typical \(5\times BW\). A major advantage of the proposed predistortion scheme is that a consistent reduced sampling rate is adopted in both the forward and the feedback paths, hence, reducing the computational complexity needed when different sampling rates are used in these paths. Conceptualization, O.H. and S.B. ; methodology, S.A. and M.A. ; validation, S.A. and M.A. ; formal analysis, S.A.; writing--original draft preparation, S.A. and M.A. ; writing--review and editing, O.H. and S.B. ; supervision, O.H. ; project administration, O.H. ; funding acquisition, O.H. All authors have read and agreed to the published version of the manuscript. This research was funded by the Research Office at the American University of Sharjah under Grant FRG20-M-E85. The work in this paper was supported, in part, by the Open Access Program from the American University of Sharjah. Figure 18: Measured adjacent channel leakage ratio at the output of the linearized amplifier as a function of the number of coefficients in the memory polynomial function for the benchmark digital predistorters and the proposed predistorter derived and implemented using various reduced sampling rates (Case II: 40 MHz test signal): (**a**) ACLR in the adjacent channel; (**b**) ACLR in the alternate adjacent channel. * _[PERSON] et al. (2016)_ [PERSON]; [PERSON]; [PERSON]; [PERSON]; [PERSON] A Modified Band-Limited Digital Predistortion Technique for Broadband Power Amplifiers. _IEEE Commun. Lett._**2016**, _20_, 1800-1803. [CrossRef]
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