## 1 Introduction
The involved methodologies could be classified under three paradigms: the techniques based only on iterative tuning process (assisted by simulating or prototyping of the amplifiers) [30], the methods based only on analytical equations [6; 11; 28], and the procedures that combines the first two approaches [12; 13; 29]. The main advantage of the first approach is its accuracy (when the iterative process converges) because the directly tuning of the prototype (or a good model) allows obtaining the design goals. However, this approach is very time and resource consuming. The second approach is low-cost and low-complexity because it avoids iterative cycles using analytical equations. These equations could be explicit or implicit functions of the model parameters. Furthermore, when they are implicit, their calculation could be made with minimum computer resources. The main drawback of the second approach is the math complexity involved in the analytical circuit solution. Therefore, the design procedures must be developed assisted by a mathematical software tool, especially if the analytical model cannot summarize in an explicit set of analytical equations. The mixed approach combines the advantages of the first two methods because it uses an analytical solution of a low-complexity PA model (e.g., a fixed value of D, ideal switching device, a high value of LSH) to find the start point of an iterative design process with a more accurate PA model (or prototype). Indeed, through the involved analytical equations, the PA designer could explore the PA design  
Figure 1: Ideal model of the Class-E Power Amplifier (PA) with finite DC-feed inductance. space to calculate the initial component values of the amplifier. Then, an iterative tuning process starts under the circuit logic embedded in the analytical model. In this process, the PA components are tuned in simulation (or in an experimental prototype). As a result, the overall iterative process converges in few steps. The analytical expressions proposed in [9] are commonly used in low-complexity analytical design approaches because of its simplicity and high accuracy under fixed duty cycle (\(D\)) operation of 50%. The resulting solution was based on the ideal Class-E PA with FDI model and fitting tools to simplify the analytical equations proposed by [6]. Furthermore, the circuit solution are collected in a set of explicit analytical equations (usually called as the PA design set [6; 7; 28]) that relates all the circuit components (e.g., \(L_{SH}\), \(L_{0}\)) to some circuit constrains (e.g., \(V_{DD}\), \(P_{OUT}\) and \(\omega\)) using ad-hoc coefficients (i.e., \(K_{L}\), \(K_{C}\),\(K_{P}\),\(K_{X}\)), which are explicit functions of the model parameter known as \(q\)[6; 9]. In addition, the authors optimize the amplifier under some application scenarios and found optimum values of the \(q\) parameter for each analyzed context. The resulting methodology provides accurate and simple analytic equations (i.e., polynomial explicit equations of the \(q\) parameter). Recently in [8], the authors proposed an analytical methodology to design the ideal Class-E PA with FDI without the fixed duty cycle restriction. They reported a systematic method to explore the search space of the proposed model in [6] using a Maple(tm) implementation (which is available online [8]). The authors involve in their method the specifications and restrictions in some of their study cases, they use the analytical expression of the maximum voltage of the switch proposed in [14] to involve the breakdown limit of the VLSI fabrication process as a design restriction. Although they did not develop math expressions for other common amplifier restrictions or specifications (e.g, as maximum rating constraints of the passive amplifier components or 1 dB compression point), if a math expression is available, it could be added to its code easily. The resulting methodology provides accurate and simple analytic equations (i.e., polynomial and trigonometric explicit equations of the \(q\) and \(D\) parameter).