## 2 DAB DC/DC Resonant Converter TPS Close Loop Control Scheme
### DAB LCC Resonant Converter TPS Control Implementation in PLECS RT Box  
The working principle of the phase shift PWM modulator has been explained in the previous section in the contents related to Figure 2.  
Figure 10 shows the FPGA-based triple phase shift PWM modulator connection and configuration for PLECS RT box implementation. The PLECS RT BOX library PWM modulator with variable modulation index inputs, variable frequency ratio input, and variable phase shift angle inputs are used to implement this triple phase shift PWM modulation. The frequency ratio is set to \"1\" to operate the inverter and rectifier at a single resonant frequency. The symmetrical triangle PWM carrier signals in the range of [\(-\)1 1]  
Figure 8: DC input/output voltages/currents vs. AC load resistance change. Figure 9: DC input/output power and efficiency vs. AC load resistance change. are configured for the PWM modulator. The modulation index signals for all inverter and rectifier legs are set to zero to generate 50% duty cycle gating signals. The phase shift value settings for all inverter and rectifier Legs are all referenced to the phase of the PWM carrier signal of the inverter Leg 1. The phase shift of the PWM carrier signal between inverter Leg 1 and Leg 2 is Beta_p (\(\beta\)p). The phase shift of PWM carrier signals between rectifier Leg 1 and Leg 2 is Beta_s (\(\beta\)s). Rectifier Leg 1 and Leg 2 PWM carrier signal phase will shift together of delta (\(\delta\)) phase angle relative to the inverter Leg 1. Figure 11 shows inverter phase shift angle \(\beta\)p generation in the PLECS RT box for experimental test purposes. In the wireless charging system's regular operation, automatic CCCV mode switching is selected to decide CC and CV mode based on comparing the measured battery voltage with the CV mode threshold and hysteresis threshold as given in (37). \[\left\{ \begin{matrix}if\ Vo(k)<Vo\_min&CC\_CV\_AUTO=0&Beta\_p=Beta\_p(CC)\\ if\ Vo(k)>Vo\_min+\Delta Vo\_min&CC\_CV\_AUTO=1&Beta\_p=Beta\_p(CV)\end{matrix} \right. \tag{37}\]  
Manual CC and CV mode switching can also be configured to individually test out the dynamic performance of the CC/CV mode controller. A configuration switch is added to enable/disable the CC/CV feedback control to test DAB converter performance for inverter phase shift angle open loop control. Figure 12 shows the rectifier phase shift angle \(\beta\)s generation in the PLECS RT Box real-time control for experimental test purposes. The DAB DC output voltage Vo (Vdc_rec) and current Io (Idc_rec) are measured from current/voltage sensors. The sensor measurement  
Figure 10: PLECS-RT BOX phase shift PWM modulator signal connection and configuration. signals are sampled to the PLECS RT box through its high-speed individual 10 bits +/\(-\)10 V ADC convention. Before starting of TPS control, the current and voltage sensor signals are calibrated with sensor scaling and sensor offset applied. The voltage sensor ADC sampling result is calibrated for the voltage sensor scaling and offset using differential voltage probe measurement. The current sensor ADC sampling result is calibrated for the current sensor scaling and offsets using the current probe measurement. In real-time control at \"k\" sample, the DC output charging current sensor signal in the unit of \"A\" at \"k\" sample is obtained as \"Io_raw (k)\"; the DC output battery charging voltage sensor signal in the unit of \"V\" is obtained as \"Vo (k). A low limit saturation function is applied on the battery current measurement to avoid divided-by-zero error, as shown in (38). The estimated \(\mathrm{R_{dc}}\) signal is constructed using (39)  
\[I_{O}(\mathrm{k})=\min(I_{o\_raw}(k),\;1e-6) \tag{38}\]  
\[R_{dc}(k)=\frac{V_{o}(k)}{I_{O}(\mathrm{k})} \tag{39}\]  
The rectifier AC resistance signal \"\(\mathrm{R_{ac}}\)\" (LCC AC load resistance) is calculated using (40), which is a digital implementation of Equation (11).