## 2 Circuit Design and Analysis
### Proposed Switched-Resonator Triple-Band Load Network  
We designed an LNA that utilizes a double-peak single-notch network with a switch as the load impedance to have the same characteristics of the input network. The schematic of a load network controlled by a switched transistor M\({}_{sw1}\) is shown in Figure 1a. The simplified single-band and dual-band network are shown in Figure 1b,c, respectively. The single-band load impedance \(Z_{L\_sw(off)}\) is simplified to an LC tank operated at \(\omega_{3}\) = 3.5 GHz when the switch is off. Similarly, when the switch is on, the dual-band load impedance \(Z_{L\_sw(on)}\) operated at \(\omega_{1}\) = 2.5 GHz and \(\omega_{2}\) = 5.2 GHz is chosen. The load impedance \(Z_{L\_sw(on)}\) and \(Z_{L\_sw(off)}\) can be expressed as shown in Equations (1) and (2), respectively:  
\[Z_{L\_sw(on)}=\frac{j\omega L_{d}(1-\omega^{2}L_{1}C_{1})}{\omega^{4}L_{d}C_{ d}L_{1}C_{1}-\omega^{2}(L_{d}C_{d}+L_{1}C_{1}+L_{d}C_{1})+1}, \tag{1}\]  
\[Z_{L\_sw(off)}=\frac{-j\omega L_{d}}{\omega^{2}L_{d}C_{d}-1} \tag{2}\]Equation (1) shows that the two poles \(\omega_{1}\) and \(\omega_{2}\) and one zero \(Z_{L\_sw(on)}\) can be obtained by letting the denominator equal null. \(\omega_{1}\) and \(\omega_{2}\) can be written as  
\[{\omega_{1}}^{2},{\omega_{2}}^{2}=\frac{L_{1}C_{1}+L_{d}C_{d}+L_{d}C_{1}}{2L_{ 1}C_{1}L_{d}C_{d}}\pm\frac{\sqrt{\left(L_{1}C_{1}+L_{d}C_{d}+L_{d}C_{1}\right) ^{2}-4L_{1}C_{1}L_{d}C_{d}}}{2L_{1}C_{1}L_{d}C_{d}} \tag{3}\]  
and \(\omega_{z\_sw(on)}\) can be written as  
\[\omega_{z\_sw(on)}=\frac{1}{\sqrt{L_{1}C_{1}}} \tag{4}\]  
From Equation (2), \(\omega_{p\_sw(off)}\) can be written as  
\[\omega_{p\_sw(off)}=\frac{1}{\sqrt{L_{d}C_{d}}}=\omega_{3} \tag{5}\]  
The proposed triple-band load network has three given target frequencies for the four load components, implying that there is one degree of freedom, say \(C_{d}\), left for the circuit design. Figure 2 shows the load impedance versus frequency with different \(C_{d}\) parameters. As shown in Figure 2a, the dual-band network provides double-peak amplitudes of load impedance when the switch is on. Figure 2b shows the load impedance of a single-band network when the switch is off. In general, the first step in the design criteria of the proposed load network is to select a lower \(C_{d}\) on account of the higher load impedance (i.e., the LNA gain). However, a drawback of the design is the high implementation cost due to the requirement of large inductance \(L_{1}\) and \(L_{d}\). Therefore, the trade-off between the gain and die area should be considered [18]. Figure 1: Schematic of the load network. (**a**) The proposed triple-band load network with an additional switched component, (**b**) single-band network, (**c**) and dual-band network. Conventional Gyrator-Based Active Inductor and Proposed Gyrator-Based Triple-Band Input Matching Network  
The conventional gyrator-based active inductor [18] is shown in Figure 3a. Transistors M\({}_{1}\)-M\({}_{3}\) were employed to establish a back-to-back transconductor stage, where M\({}_{1}\) is a common-drain stage, functioning as the feedback element, and M\({}_{2}\)-M\({}_{3}\) comprise a cascode stage, which is the gain element. The transistor M\({}_{3}\) is used as a gain booster. The inductive impedance in the Smith chart and the equivalent circuit comprising an inductor, capacitor, and resistor are shown in Figure 3b,c, respectively. The gyrator-based circuit topology can be simplified as shown in Figure 3d. In the proposed input matching network, the gyrator topology comprises a feedback (\(G_{m1}\)) and feedforward gain (\(G_{m2}\)) element to convert the capacitive impedance into inductive impedance.