# A Low Phase Noise Crystal Oscillator with a Fast Start-Up Bandgap Reference for WLAN Applications
## 2 Circuit Composition of Low Phase Noise Crystal Oscillator
### Design of Low Phase Noise Crystal Oscillator  
#### 2.2.1 Analysis of Noise Contribution of LDO  
LDO is an effective means of attenuating the input power supply ripple and mitigating noise. In WLAN chips, the crystal oscillator is typically employed as the reference clock source of PLL, and it is subject to stringent phase noise requirements. The major contributors to the oscillator noise are LDO power supply noise, device noise within the oscillation circuit, and resistive thermal noise. Since these sources of noise are uncorrelated, the phase noise of the crystal oscillator can be formulated using Equation (11). \[L_{\text{TOTAL}}=\sqrt{L_{\text{LDO}}{}^{2}+L_{\text{TRAN}}{}^{2}+L_{\text{R}} {}^{2}} \tag{11}\]  
Figure 5: Simulation results of start-up circuits at different process corners and temperatures: (**a**) tt 55 \({}^{\circ}\)C, (**b**) tt (\(-40\)\({}^{\circ}\)C), (**c**) tt 125 \({}^{\circ}\)C, (**d**) ss 125 \({}^{\circ}\)C, (**e**) ff (\(-40\)\({}^{\circ}\)C). \(L_{TOTAL}\), \(L_{LDO}\), \(L_{TRAN}\) and \(L_{R}\) are the total output phase noise of the crystal oscillator, the LDO output phase noise, the noise of transistors and resistors in the oscillator at a frequency offset \(f_{m}\), respectively. When the crystal oscillator is used as the reference clock source of the PLL in the WLAN chip, its integral noise range is often 10 kHz-10 MHz [23; 24], and the phase noise of crystal oscillators mainly affects the in-band noise of the PLL, while the bandwidth of the PLL is generally a few hundred kHz to a few MHz. Thus, in this paper, \(f_{m}\) is selected as 100 kHz. The traditional LDO using NMOS power tube is shown in Figure 6.  
The output noise of the LDO consists of three main components: \(\overline{V_{n,BG}^{2}}\) is the noise of the bandgap reference output voltage, \(\overline{V_{n,EAMP}^{2}}\) is the equivalent input noise of the error amplifier (EAMP), and \(\overline{V_{n,R_{1}}^{2}}\) and \(\overline{V_{n,R_{2}}^{2}}\) are the noise of resistors. Since there is no correlation between these types of noise, the equivalent output noise of the LDO can be expressed as Equation (12) [25]. \[\overline{V_{n,LDO}^{2}}=\int_{f_{1}}^{f_{2}}\left[\left(\overline{V_{n,BG}^{ 2}}+\overline{V_{n,EAMP}^{2}}\right)\left(1+\frac{R_{1}}{R_{2}}\right)^{2}+ \overline{V_{n,R_{1}}^{2}}+\overline{V_{n,R_{2}}^{2}}\left(\frac{R_{1}}{R_{2} }\right)^{2}\right]df \tag{12}\]  
The expression (12) reveals that the resistors \(R_{1}\) and \(R_{2}\) in the feedback network themselves introduce some thermal noise and also affect the contribution of the LDO equivalent input noise to the output voltage noise. Secondly, the two resistors will have a large area overhead. Due to the \(V_{BG}=V_{LDO}\) of this design, the LDO can use a non- resistive-non- resistivefeedback structure, then we can obtain the feedback coefficient \(\beta=1\). For the impact of a non-resistive feedback structure, we need to connect a resistor in series with the compensation capacitor to solve the stability problem. As shown in Figure 7, removing the LDO feedback resistors, the equivalent output noise of the LDO can be changed as in Equation (13). \[\overline{V_{n,LDO}^{2}}=\int_{f_{1}}^{f_{2}}\left(\overline{V_{n,BG}^{2}}+ \overline{V_{n,EAMP}^{2}}\right)df \tag{13}\]  
As demonstrated by Equation (13), the impact of the bandgap reference and EAMP-generated noise on the LDO output voltage noise cannot be overlooked. In order to mitigate this impact, it is customary to introduce an RC low-pass filter with a sufficiently low cutoff frequency at the LDO input. To select an appropriate RC low-pass filter, this study presents a design in the subsequent section. Additionally, PN is the control signal of the system and is accessed via SPI. When the LDO output is normal, the PN signal is low and the NMOS tube is cut off to prevent the LDO output from shorting out and the noise contribution from  
Figure 6: The structure of traditional LDO. BG: bandgap reference. this NMOS is very low and negligible. When the LDO output is turned off, the PN signal is high.