# Harnessing FPGA Technology for Energy-Efficient Wearable Medical Devices
## 2 Background
### FPGAs in Wearable Medical Devices
#### 2.3.3 Low-Power FPGA Families
\\ \hline QuickLogic & PolarTools [23, 27] & – & – & SLAM & 1019\(\times\) LCs & 73 & - & 1.2V & 55 pA\({}^{1}\) & Targets power and low latency, \\  & & & & & & & & & & & \\ \hline \multirow{3}{*}{Incl (Abbrevi)} & Cyglows [28] & SCB42 & 26 ms & SLAM & 25,000\(\times\) LEs & 1700 & 25-DISP Slos & 1.1V & 32 mA\({}^{1}\) & \\  & & & & & & & & & & & & \\ \cline{2-11}  & MAX10[25, 20] & 10 MBDC & 55 ms & Hybrid & \multirow{2}{*}{8000\(\times\) LEs} & \multirow{2}{*}{378} & \multirow{2}{*}{24-Mid (IS \(\times\) 18)} & \multirow{2}{*}{12.5V} & \multirow{2}{*}{3.9 mA\({}^{1}\)} & \multirow{2}{*}{55} & \multirow{2}{*}{3.9 mA\({}^{1}\)} & \multirow{2}{*}{55} \\  & & & & & & & & & & & & \\ \hline \multirow{4}{*}{Lattice-Semiconductor} & K200 & Hybrid & \multirow{2}{*}{5200\(\times\) LUTs} & \multirow{2}{*}{120} & \multirow{2}{*}{8-DISP Slos} & \multirow{2}{*}{1.2V} & \multirow{2}{*}{75 pA\({}^{1}\)} & \multirow{2}{*}{45} & \multirow{2}{*}{45} & \multirow{2}{*}{45} \\  & UltraPla [31] & UPSK & 40 nm & (SRAL \(\times\) 19) & & & & & & & & \\ \cline{2-11}  & K200 & UPSK & 40 nm & (SRAL \(\times\) 19) & & & & & & & & \\ \cline{2-11}  & K200 & UPSK & 40 nm & (SRAL \(\times\) 19) & & & & & & & & \\ \hline \multirow{4}{*}{Lattice-Semiconductor} & K200 & UPSK & 40 nm & Hybrid & \multirow{2}{*}{7000\(\times\) LUTs} & \multirow{2}{*}{128} & \multirow{2}{*}{-} & \multirow{2}{*}{1.2V} & \multirow{2}{*}{250 pA\({}^{1}\)} & \multirow{2}{*}{Features 2- low power modes (ECGaT and FLI)} \\  & & & & & & & & & & & & \\ \cline{2-11}  & MachX02[23] & L6 MOO2- & \multirow{2}{*}{65 nm} & Hybrid & \multirow{2}{*}{6500\(\times\) LUTs} & \multirow{2}{*}{240} & \multirow{2}{*}{-} & \multirow{2}{*}{1.2V} & \multirow{2}{*}{189 pA\({}^{1}\)} & \multirow{2}{*}{1.2V} & \multirow{2}{*}{189 pA\({}^{1}\)} \\  & & & & & & & & & & & & \\ \cline{2-11}  & & & & & & & & & & & & \\ \hline \multirow{4}{*}{Muxenity Technology Technology} & K200 [24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 40, 41, 42, 43, 44, 46, 48, 49, 40, 41, 42, 43, 44, 45 Table 1 provides a detailed comparison of various low-end, low-power FPGA families, focusing on their logic resources and static power consumption. It has been observed that SRAM-based FPGAs focus on shrinking process technology to reduce dynamic power consumption. However, their static power consumption is increasing due to sub-threshold leakage and quantum tunneling. Despite this, the reprogrammability of SRAM technology allows for partial reconfiguration, which can be beneficial in delaying deployments until necessary, keeping unused logic powered off to lower power consumption. Additionally, they offer voltage scaling opportunities. For example, in the Artix-7 series, the voltage can be scaled down from 1.0 V to 0.95 V, resulting in 10% dynamic power savings and up to 40% static power savings. On the other hand, it has been observed that flash-based FPGAs have extremely low static current consumption and offer flash-freeze modes for further standby current savings. Some FPGA families combine the features of both SRAM and flash technologies, providing on-chip non-volatile memory along with SRAM fabric in hybrid mode. Devices from Lattice Semiconductor utilize this technology to offer the non-volatility of flash-based FPGAs along with the reconfigurability of SRAM-based FPGAs. It is noted that hybrid and flash-based FPGAs exhibit lower static consumption compared with SRAM-based FPGAs, along with a reasonable amount of logic resources. The observation that various manufacturers offer different low-power families of FPGAs, each with a distinct range of power consumption characteristics, provides motivation for this literature review. This review aims to investigate the application of FPGAs in wearable medical devices, explore additional strategies for optimizing FPGA-based designs to enhance the energy efficiency, and examine existing review works on this subject.