# An Adaptive 24 GHz PSO-Based Optimized VCO in Next-Generation Wireless Sensor Networks
## 3 The Proposed Adaptive PSO Algorithm
### Circuit Design  
The designed VCO's schematic is depicted in Figure 10. The proposed VCO's LC tank circuit is composed of capacitors \(C_{1}\) and \(C_{2}\) and inductor \(L_{1}\). To make up for the losses of the LC tank circuit of VCO, the negative transconductance is provided by the PMOS transistor (\(MP_{cr}\)) and NMOS transistor (\(MN_{cr}\)). These transistors (\(MP_{cr}\) and \(MN_{cr}\)), along with the LC tank circuit, formed a traditional current reuse VCO architecture. The traditional current reuse topology is selected for this VCO study because of its low power consumption. In this VCO topology, the current consumption is 1/2 compared to other VCO topologies. This can be understood by the functioning of the designed VCO, which is realized with an LC tank circuit with a PMOS transistor \(MP_{CR}\) and NMOS \(MN_{CR}\) as a switch. The PMOS switch and NMOS switch are turned ON during the output oscillation's positive half cycle, and during this time, the current flows supply voltages to the ground and charges the LC tank circuit of the VCO. Later, during the output oscillation's  
Figure 10: Proposed VCO design and operational behavior of the VCO. Figure 9: Time complexity analysis between GA, SA, and the adaptive PSO algorithm. negative half cycle, the PMOS switch and NMOS switch will be turned OFF, and VCO's LC tank circuit discharges in this period. So, the power consumption is cut to 1/2 during the positive half cycle of the output oscillations. To further decrease the power consumption of the designed VCO, the transistor \(MP_{CR}\) and \(MN_{CR}\) are biased as \(VGS<VTH\), where VGS is the gate to source voltages and \(V_{TH}\) is the threshold voltage of transistors \(MP_{CR}\) and \(MN_{CR}\); this biasing configuration of the transistor is known as subthreshold biasing. In this, the VGS and drain current \(I_{ds}\) of the \(MP_{CR}\) and \(MN_{CR}\) transistors follow an exponential relation. However, the VGS and Ids of transistors exhibit a square law relation in the saturation region. The \(I_{ds}\) of the transistors in the subthreshold region are shown in Equation (3). \[I_{ds}=e^{\left(\frac{Vg_{gs}-V_{ds}}{4I_{t}}\right)}\left(1-e^{\left(\frac{Vt _{ds}}{4I_{t}}\right)}\right), \tag{3}\]  
where \(U_{t}\) is the thermal voltage, and n is the subthreshold slope coefficient. The magnitude of \(I_{ds}\) is very small, so it further reduces power consumption. In addition to power saving, the subthreshold region biasing of transistors \(MP_{CR}\) and \(MN_{CR}\) also has advantages in decreasing the phase noise of the VCO in the \(\frac{1}{I^{2}}\) region. This is because of a small flowing current, as the MOS transistor's thermal noise is analogous to the shot noise in the subthreshold region. The traditional VCO current reuse topology offers many benefits of low power and low phase noise, but it suffers from low transconductance, which is inadequate for smooth oscillations, as it consists of P/NMOS transistors, which both have mismatched transcontances. To solve this issue and to have enough transconductance for smooth VCO oscillations, the designed VCO is integrated with cross-coupled NMOS transistors MN1 and MN2. This inclusion of NMOS transistor pairs helps to provide the required transconductance, but it also contributes to increasing the phase noise of VCO, so to eliminate this phase noise contribution in designed VCO, a source inductive degeneration technique is implemented by using inductor \(I_{s}\). The oscillation condition for the startup of the proposed VCO must satisfy Equation (4). \[R_{p1,2,s}+\left(Z_{int1}\right)/Z_{in2})\geq 0, \tag{4}\]  
where \(R_{p1}\), \(R_{p2}\), and \(R_{ps}\) are the parasitic resistance of inductors \(L_{1}\), \(L_{2}\), and \(L_{s}\). Zin1 is the input impedance of transistors \(MP_{cr}\) and \(MN_{cr}\), which is provided by Equation (5), and Zin2 is the input impedance of transistor \(MN_{1}\), which is provided by Equation (6).