# Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA
## 4 Results
\begin{table}
\begin{tabular}{c c c c c c c c c c c} \hline \hline  & & \multicolumn{6}{c}{**This Work**} & \multicolumn{3}{c}{**[11]**} & \multicolumn{3}{c}{**[15]**} & \multicolumn{3}{c}{**[21]**} \\ \hline  & EdDSA & 25,519 & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\bullet\) \\ \cline{2-11} Support & \multirow{3}{*}{ECDSA} & P-256 & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) \\ \cline{2-11} Mode & & \multirow{3}{*}{ECDSA} & P-384 & \(\circ\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) \\  & & P-521 & \(\circ\) & \(\circ\) & \(\bullet\) & \(\bullet\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) \\ \hline \multirow{3}{*}{Support \begin{tabular}{c} Func. \\ \end{tabular} } & Sign & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) \\  & Verify & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) \\  & Keygen & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\bullet\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\circ\) & \(\bullet\) & \(\circ\) \\ \hline \multicolumn{11}{c}{FPGA} & Virtex-6 & Virtex-7 & Virtex-6 & Virtex-7 & Virtex-6 & Virtex-6 & Virtex-6 & Artix-7 & Artix-7 \\ \hline \multicolumn{11}{c}{Slices} & 4327 & 4276 & 8610 & 10,259 & 10,625 & 16,747 & 23,633 & 4303 & 11,277 \\ \hline \multicolumn{11}{c}{DSP} & 0 & 0 & 0 & 0 & 136 & 196 & 280 & 16 & 220 \\ \hline \multicolumn{11}{c}{Slices equivalent} & 4327 & 4276 & 8610 & 10,259 & 24,225 & 36,347 & 51,633 & 5903 & 33,277 \\ \hline \multicolumn{11}{c}{Frequency (MHz)} & 116.72 & 122.05 & 72 & 112.2 & 100 & 83.3 & 71.5 & 82 & 100 \\ \hline \multicolumn{11}{c}{Slices\({}^{2}\)/MHz \(\times 10^{-3}\)} & 160 & 150 & 1030 & 938 & 5869 & 15,860 & 37,286 & 425 & 11,074 \\ \hline \multirow{11}{*}{\
\begin{tabular}{c} Opera- \\ per sec. \\ (Ops) \\ \end{tabular} } & Sign & 127 & 132 & 78 & 122 & - & - & - & 118 & - \\  & Verify & 55 & 57 & 34 & 53 & - & - & 78 & - \\  & Keygen & 125 & 131 & 77 & 120 & - & - & - & 90 & 21,686 \\ \cline{2-11}  & ECDSA & Sign & 108 & 113 & 67 & 104 & 787 & - & - & - & - \\  & P-256 & Verify & 55 & 57 & 34 & 53 & 674 & - & - & - & - \\  & Keygen & 109 & 113 & 67 & 104 & - & - & - & - & - \\ \cline{2-11}  & ECDSA & Sign & - & - & 30 & 47 & - & 292 & - & - & - \\  & P-384 & Verify & - & - & 15 & 23 & - & 276 & - & - & - \\ \cline{2-11}  & ECDSA & - & - & 30 & 47 & - & - & - & - & - \\  & P-521 & - & - & 16 & 25 & - & - & 109 & - & - \\ \hline \multirow{11}{*}{
\begin{tabular}{c} Slices\({}^{2}\) \\ \end{tabular} } & Sign & 148 & 138 & 950 & 865 & - & - & - & 295 & - \\  & Verify & 341 & 318 & 2188 & 1994 & - & - & - & 447 & - \\  & Keygen & 150 & 140 & 960 & 875 & - & - & - & 387 & 51 \\ \cline{1-1}  & ECDSA & Sign & 173 & 161 & 1109 & 1011 & 746 & - & - & - & - \\ \cline{1-1}  & ECDSA & Verify & 342 & 320 & 2198 & 2003 & 871 & - & - & - & - \\ \cline{1-1}  & Keygen & 173 & 161 & 1107 & 1009 & - & - & - & - & - \\ \cline{1-1}  & ECDSA & Sign & - & - & 2474 & 2254 & - & 4524 & - & - & - \\ \cline{1-1}  & ECDSA & Verify & - & - & 4936 & 4497 & - & 4790 & - & - & - \\ \cline{1-1}  & Keygen & - & - & 2471 & 2251 & - & - & - & - & - \\ \cline{1-1}  & ECDSA & Sign & - & - & 4532 & 4129 & - & - & 24,458 & - & - \\ \cline{1-1}  & Verify & - & - & 9067 & 8260 & - & - & 32,120 & - & - \\ \cline{1-1}  & Keygen & - & - & 4528 & 4125 & - & - & - & - & - \\ \hline \hline \end{tabular}
\end{table} 
Table 1: ECDSA/EddSA comparison, \(\bullet\)/\(\circ\) represents for supported/not-supported. supports all functions of DSA, including sign, verify, and key generation (Keygen). The authors of [21] proposed a multi-core architecture that can generate up to 21,686 keys per second.