# Design and Application of a Distribution Network Phasor Data Concentrator
## 4 The Test of the Key Performance Indicators of DPDC
### Time Difference Tolerance Test  
Essentially speaking, the time difference tolerance is equivalent to the multi-channel access capability. In the distribution network, the \(\upmu\)MPMUs connected to the same DPDC may use different communication media and routes. The different data packets with the same timestamp would reach DPDC at different times. The laboratory cannot directly reproduce the real situation of the power line network and the wireless network, so we use the PMU Emulator for further testing. The connection diagram of this test is shown in Figure 8; the DPDC directly connects to the PC1 and PC2 via a network cable. The Main station Emulator runs on the PC1, and the PMU Emulator runs on the PC2.  
Figure 8: DPDC time difference tolerance test.  
Figure 7: DPDC access capability test.  
\begin{table}
\begin{tabular}{c c c c c c} \hline \hline \multirow{2}{*}{**Number of Connected PMUs**} & \multicolumn{3}{c}{**CPU Utilization (\%) at Different Reporting Rates (fps)**} & \multirow{2}{*}{**RAM Utilization (\%)**} \\ \cline{2-2} \cline{4-6}  & **10** & **25** & **50** & **100** \\ \hline
3 & 2 & 5 & 9 & 18 & 0.3 \\
5 & 3 & 7 & 15 & 29 & 0.3 \\
10 & 6 & 15 & 22 & 50 & 0.5 \\
15 & 9 & 20 & 42 & 50 & 0.6 \\
20 & 11 & 26 & 50 & 50 & 0.8 \\ \hline \hline \end{tabular}
\end{table}
Table 3: DPDC access capability test results.  
Eight PMUs were simulated on the PMU Emulator, and different delays for the simulated PMUs to test were set. The eight simulated PMUs are numbered sequentially and then divided into two groups. The odd-numbered PMU does not set the delay, and the even-numbered PMU sets the same delay to simulate the delay in the actual channel. After DPDC establishes communication connections with each simulated PMU, the simulated main station summons the DPDC data and observe whether the DPDC can correctly aggregate and forward PMUs data frames of different delays. Delays of 50, 100, 150, 200, and 300 ms were set respectively to test, and PMUs' reporting rate was 100 fps. Table 4 shows the results.  
The test results showed that when the time difference between the simulated PMU data is within 200 ms, the DPDC can correctly aggregate the data, and when the time difference reaches 300 ms, the DPDC aggregate data is abnormal. When data aggregation is abnormal, the DPDC aggregates data arrives at different times separately and outputs two data streams, one of which contains PMU data arriving earlier and the other containing PMU data arriving later. It can be observed from the Main station Emulator that the reporting rate of DPDC is increased to 200 fps (twice the normal value), and each data frame contains only half the number of PMU data after parsing. The cause of the abnormality is that the time difference between the PMU data exceeds the depth of the DPDC buffer. When the data that arrives earlier fill each layer of the buffer, the continued arrival of data prompted DPDC to push the data at the top of the buffer away, and the data that arrives later has no opportunity to aggregate with the data that has been pushed away. When the data aggregation is normal, the increase in PMU data delay is positively related to the delay of PMU data arriving later. When the data aggregation is abnormal, the increase in PMU data delay is the depth of the DPDC buffer. The reason why there is no change in CPU and RAM Utilization is the same as the analysis in Section 4.1. With a fixed number of PMUs and reporting rate, if there are no other data processing tasks, CPU and RAM Utilization will not change significantly. According to the test results, the time difference tolerance of DPDC reaches the requirement. When the time difference between \(\upmu\)MPMUs connected through different channels is within 200 ms, DPDC can correctly aggregate data.