# Barrel Shifter Physical Unclonable Function Based Encryption
## 1 Introduction  
Encryption/decryption algorithms form the backbone of modern public key infrastructure, which supports a broad set of activities such as e-commerce and digital currency. Mathematical cryptosystems such as RSA can take millions of clock cycles. Even symmetric encryption/decryption through AES takes 10-20 clock cycles. Moreover, even though their security is predicated on a hard mathematical problem such as prime number factoring, a mathematical model exists for an adversary [1]. Physical unclonable functions (PUFs) source physical randomness of a silicon foundry with a potential appeal of unmodelable, physical functions. They have been used to generate unique physical identities, and to seed key generation [2]. Such PUFs offer both inter-chip variability and same-chip reproducibility. The variability ensures that distinct devices produce different outputs given the same input. Reproducibility, on the other hand, is valuable for predictability and determinism in device authentication behavior. As a result, PUFs based on complex physical systems provide significantly higher physical security over the traditional systems that rely on storing secrets in nonvolatile memory.  
So far, the use of PUFs in cryptography is somewhat limited--the most common being key generation or random number generation. [PERSON] used analog circuits to support cryptography with some elements of PUF-like randomness [3]. [PERSON] et al. deployed a variant of arbiter PUF to replace symmetric encryption in the RFID domain as an authentication mechanism [4]. This was based on the earlier work of [PERSON] et al. which deployed PUFs for anti-counterfeiting in RFIDs [5]. [PERSON] et al.  
described another authentication protocol based on PUFs [6]. [PERSON] et al. [7] developed an IoT communication protocol based on PUFs. Several high-performance PUFs are designed for IoT [8; 9]. [PERSON] et al. [10] developed a code encryption engine based on PUFs for supporting a secure execution environment similar to AEGIS. The key difference between a processor's secure execution environment and general encryption is that for the former scenario the processor platform is both the source and destination for communications. In a processor's secure execution environment, both the sender and receiver have access to the same PUF on the same platform. However, for general encryption, this assumption is violated. Both the sender and receiver possess distinct and different PUFs. We show a general encryption protocol based on invertible and commutative PUFs.  
The key contributions of this paper are: (1) exploration of a PUF-based encryption protocol; (2) requiring PUFs to be both invertible and commutative. We develop a framework for invertible and commutative PUFs based on shifting permutation networks; (3) we evaluate shifting permutation networks based an invertible and commutative PUF framework with a primitive shifting network using logarithmic barrel shifters; and (4) the results show good same chips, same path delay reproducibility; good differentiation between different chips, same path delay and same chip, different path delay; delays within 1-bit accuracy for the logic high and logic low propagation through the same path demonstrates physical commutativity; and good pseudo-random number generation properties for the delay. To the best of our knowledge, this is the first VLSI implementation evaluation of an invertible and commutative PUF.  
This paper is organized as follows: Section 2 introduces a general encryption protocol. Section 3 describes a mechanism for the BS-PUF based asymmetric and symmetric encryption. The BS circuit design is presented in Sections 4 and 5. Variability, reproducibility, uniqueness, randomness and commutativity test results based on post-layout simulations are presented in Section 6. Section 7 shows the behavior of BS-PUF encryption under a modeling attack. Section 8 discusses future work and conclusions.