### Motivation and Challenges  
Deep learning is penetrating the Internet of Things (IoT) paradigm, and interest in mapping trained models to edge devices has recently surged. Microcontrollers (MCUs) have even found applications in keyword spotting or even video applications [13]. Of the RNNs, Long Short-Term Memory (LSTM) networks are one of the most popular variants of RNNs. LSTM networks are known for their long-term memory capability, and they also overcome the most common RNN training challenges, the vanishing and exploding gradients problems. However, they are not readily deployable models for the edge. LSTM networks are memory and compute-intensive. As an illustration, LSTM for a speech recognition system may consist of an input vector of length 153, an output vector of length 512, 1024 hidden units, and 2 layers. From the example shown in Tables 1 and 2, numbers marked in red show that the computation and memory needs are huge for the LSTM chosen. To cater to such hardware needs [14] and be capable of accurately performing the trained task, RNNs have to be simplified or compressed.  
In practice, there has been a fundamental understanding of how the Recurrent Neural Networks like the LSTM networks [15; 16], GRUs [17; 18; 19], Unitary RNNs [20] and so on show outstanding performance, but their portability on edge devices remains insufficient. The exact training procedures, compression, and evaluation methods to host RNN models on edge devices need to be created and benchmarked.  
From an implementation standpoint, we are in the transition period of ML. The transition is clear in four important frontiers: _data, models, frameworks_, and _devices_. We have mant DL tools available for training (TensorFlow, Theano, PyTorch, Caffe, and so on) and RNN-based source code repositories. However, the core component or \"labeled data\" is still proprietary. Furthermore, we have interpreter-based frameworks (Google TensorFlow Lite Micro [21]) and compiler-based frameworks (Microsoft ELL library [22]) as _inference frameworks_ on which to run DL models on embedded System-on-Chip (SoC) devices and MCUs. Conversely, there has been no unified framework that particularly caters edge  
\begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline \multirow{2}{*}{**Computation**} & **Recurrent Weights** & **Recurrent Nodes** & **Nonrecurrent Weights** & **Nonrecurrent Nodes** & **Deep-Hole Diagnosis Weights** & **Bias** \\ \hline \(f_{t}=[W_{th}\tau_{t-1}+W_{fx}x_{t}+W_{fx}c_{t-1}+b_{f}]\) & \(W_{fr}\) & \(\tau_{t-1}\) & \(W_{fx}\) & \(x_{t}\) & \(W_{fx}\) & \(c_{t-1}\) & \(b_{f}\) \\ \hline Weight Matrix Dimensions & [1024,512] & [512,1] & [1024,153] & [153,1] & [1024,1] & [1024,1] & [1024,1] & [1024,1] \\ \hline \(i_{t}=[W_{th}\tau_{t-1}+W_{ix}x_{t}+W_{ix}c_{t-1}+b_{f}]\) & [1024,512] & [512,1] & [1024,153] & [153,1] & [1024,1] & [1024,1] & [1024,1] \\ \hline \(g_{t}=[W_{th}\tau_{t-1}+W_{cx}x_{t}+b_{c}]\) & [1024,512]ML models or applications in products. Ref. [21] provides a list of various issues with existing frameworks for edge mapping. For an RNN, SRAM is related to the activation size (read and write), whereas Flash is related to the model size (read only) [23]. If the device's external memory is also chosen, memory accesses have adverse implications on inference speed and power consumption.  
This study aimed to evaluate and optimize RNNs to target edge platforms. We chose HAR since wearable-sensors-based systems are essential in many healthcare monitoring applications like elderly care support, fitness tracking, sleep quality assessment, predictive health, etc. Edge-based and adept HAR systems can replace expensive healthcare monitors if the solutions are accurate, reliable, low-powered, and small. However, the lacks of standard workflows and differences in evaluation protocols, evaluation metrics [24], data generation methods, and their quality make comparison of different approaches a challenging task and do not allow fair comparison of results [25; 26].