# Recent Developments in Low-Power AI Accelerators: A Survey
## 4 Results
### Power, Area, and Clock Frequency  
The next aspect that we would like to observe is to take a deeper look into the relationship between power and area. In Figure 7, the ratio of power vs. area over the years is plotted. In Figures 7-9, the red line denotes the median, the box represents the interval between the first quartile (\(Q_{1}\)) and the third quartile (\(Q_{3}\)). The boundaries of the whiskers are based on \(1.5\times\) IQR, where the interquartile range (IQR) is defined as \(\text{IQR}=Q_{3}-Q_{1}\). The rings outside the whiskers are outliers. In Figure 7, we can observe that there has not been much change with regard to power per square milliliter; there is an overall increase. The reason for this increase is related to the power consumption, i.e., there is an increase in power consumption every year for all accelerators, independent of the accelerator's affiliation. For the company affiliated accelerators, the increase in power consumption is substantial, as shown in Figure 8, with a peak in 2021 (company affiliated accelerators from 2022 is missing from our data set). It increases every year, excluding NVIDIA's Jetson Nano [33] from 2019, which has the highest overall power consumption reported. Meanwhile, non-company affiliated accelerators have not had such a clear increase in power over the years. Figure 6: Power efficiency of AI accelerators throughout the years. Left figure: Data from accelerators created by different companies. Right figure: Data from accelerators published as research papers and not affiliated with a company. \begin{table}
\begin{tabular}{l l l l l l l} \hline \hline  & \multicolumn{2}{c}{**Power \({}^{a}\)**} & \multicolumn{2}{c}{**Performance \({}^{b}\)**} & \multicolumn{2}{c}{**Power Efficiency \({}^{c}\)**} \\ \hline  & **Mean** & **Median** & **Mean** & **Median** & **Mean** & **Median** \\ \hline All & 1654.6 & 478.0 & 5008.6 & 639.7 & 6060.7 & 1264.0 \\ \hline Company & 2928.0 & 1931.2 & 11,912.1 & 4423.5 & 5558.8 & 4125.0 \\ Non Company & 1270.2 & 206.0 & 2027.5 & 148.8 & 6272.0 & 1020.7 \\ \hline SNN & 938.9 & 155.8 & 1172.8 & 1214.1 & 9389.3 & 1278.0 \\ Non SNN & 1748.5 & 500.0 & 5200.4 & 622.2 & 5864.9 & 1250.0 \\ \hline \hline \end{tabular} \({}^{a}\) Power is measured in mW. \({}^{b}\) Performance is measured in GOPS. \({}^{c}\) Power Efficiency is measured in GOPS/W.  
\end{table} 
Table 3: Power consumption, performance, and power efficiency for selected accelerator groups. Plotting the clock frequencies with regard to year, the cause for the increase in power is uncovered. Depicted in Figure 9, the clock frequencies for both company and non-company affiliated accelerators are plotted. Similar to power, the clock frequencies used in low-power accelerators also increase over time. As the power consumption is proportional to the clock frequency, it follows that higher clock frequencies require more power to operate. This is especially true since Dennard scaling [34] does not hold anymore, thus we cannot obtain higher performance and clock frequencies as we reduce the technology nodes. Therefore, the clock frequency also contributes to the overall increase in power per square millimeter over time. Figure 8: Power consumption throughout the years. Left figure: The data are from accelerators created by different companies. Right figure: The data are from accelerators published as research papers and not affiliated with a company. Figure 7: Power per square millimeter over the years. Regarding clock frequencies, an observation can be done. The four accelerators that differ significantly from the rest in terms of power (\(<\)10 mW), i.e., WAX [29], SNAFU-ARCH [6], TIMELY [32], and IMPULSE [28], also have very low clock frequencies; between 40 MHz and 200 MHz. This shows that low-frequency accelerators use significantly less power at the cost of lower throughput. However, there exist accelerators in the middle of the cluster, such as [PERSON] et al.