## Instrument Description
### Control and Recording System
#### 2.5.2 Recorder
The 320 MB of data of each second are divided into blocks of 64 KiB-4 bytes = 65,532 bytes, which results in 4883.1105 blocks for every second. As only complete blocks can be sent through the PCIe bus, and the last block is used to transmit ancillary data instead of raw signal data, the total amount of raw data blocks transmitted is 4882. Thus, the actual amount of recorded raw data is 319,927,224 bytes, which corresponds to 99.98% of the available data. The raw data gap has a duration of 227 us. The transmission sequence of blocks from the data recorder module through the PCIe interface is shown in Figure 6. In the recording mode, when a 1 PPS pulse is received, the data recorder transmits 4882 blocks of 64 KiB-4 bytes of raw data through the PCIe bus, plus one block of ancillary data. Then, the data recorder waits until the next PPS pulse to transmit a new second of data. The recorder generates a synchronization signal, which is active at the start of the transmission of the ancillary data. This synchronization signal is used by the Instrument Controller to reprogram the different sub-modules with the new programming values. The use of 64 KiB blocks allows using circular buffers at the different stages of the data transmission from the FPGA towards the file in the PC hard disk. The different stages are shown in Figure 7. The first stage collects and formats the data into blocks (64 KiB) with the ID according to the current instant. Each of these blocks is then transferred to the circular buffer of four blocks within the FPGA. The block is stored until the PCIe-DMA transfer is triggered, which is when the block is sent to the kernel memory space allocated by the Linux driver. Similar to the FPGA circular buffer, the kernel memory is structured in a circular buffer of 64 blocks (4 MiB). At this point, the user application is in charge of emptying the driver circular buffer and arranging the blocks (using their ID) to build the one-second files in RAM. Once a complete second has been received, it is written to the computer's hard disc for later post-processing. A RAID 0 array of disks is used to achieve a high-speed writing with medium-speed disks, as actual writing to the individual disks is done in parallel in RAID 0. Using pointers and circular memory buffers enables one to automatically transfer the new data to the next stage by polling. This approach was selected to ensure that the later stages (right in Figure 7) retrieve the data as soon as it is generated at the previous stage, avoiding an overrun of the buffers of previous stages. Figure 6: Data Recorder GPS one-second cycle. Clock-Ticks Counter  
The data recorder has a counter that is set to zero on start-up, to count the total number of clock ticks that have elapsed since the recorder was started. The clock tick corresponding to the first tick within each second is stored in the ancillary data block. In this way, it is possible to link the time (ticks) of consecutive seconds, despite the fact that the last part of the second is not recorded. This mechanism provides the means necessary to maintain data continuity without compromising the synchronism with the 1 PPS pulses.