## 5 Results
### Loss Assessment
It shows that the switching loss (both turn-on and turn-off) exhibit distinctive increases with the increase in \(R_{g}\), which is due to the slower switching speed resulting from larger \(R_{g}\). For the same reason, the voltage and current overshoot will all decrease (see Figure 13b). It is necessary for designers to make a trade-off between switching speed and switching loss. The double-gate-resistances is a useful solution; a proper turn-on resistance to ensure the switching speed and a low turn-off resistance to discharge the \(C_{gs}\) fast. Loop Parasitic Inductance  
\(L_{p}\) denotes all the stray inductances along the power loop and the parasitic inductances of the terminal of the power devices. Figure 14a illustrates the power losses with varied \(L_{p}\). It can be seen that the turn-on loss decreases obviously with the increase in \(L_{p}\), because the greater \(L_{p}\) will induce a larger voltage drop in stage 2, so that the voltage falling time will be shorter. However, as shown in Figure 14b, the larger \(L_{p}\) will generate a larger voltage overshoot and current voltage. Common Source Stray Inductance  
\(L_{s2}\) differ from other stray inductances of PCB traces since it co-exists in both the power stage and the gate drive stage. When the MOSFET works in the saturation region (the channel equivalent to a voltage-controlled current source), the fast-changing drain current will induce a voltage drop across \(L_{s2}\), which provides a negative feedback to the gate drive stage. Hence, the effect of \(L_{s2}\) on switching loss is similar to \(R_{g}\), as shown in Figure 15. In common engineering practice, the gate driver is normally placed next to the power device as close as possible to reduce this inductance. Figure 14: Comparison between experiment and calculation under the influence of loop parasitic inductance \(L_{p}\). (**a**) Power losses. (**b**) Voltage overshoot and current overshoot. Figure 13: Comparison between experiment and calculation under the influence of external driver resistance \(R_{g}\). (**a**) Power losses. (**b**) Voltage overshoot and current overshoot. _External Gate Stray Inductance:_ The comparison of power losses, voltage overshoot and current overshoot between experiment and calculation with varied external gate stray inductance \(L_{g2}\) is illustrated in Figure 16a,b, respectively. There is no recognizable difference with varied \(L_{g2}\). In fact, according to the circuit design guidelines, \(L_{g2}\) should be kept small to avoid the oscillations between \(L_{g}\) and \(C_{gs}\). According to the aforementioned experimental and analytical investigation, the effects of the varied elements including the \(T_{j}\), \(R_{g}\), \(L_{p}\), \(L_{s2}\) and \(L_{g2}\) on the power losses and voltage and current overshoot in the switching transients are summarized in Table 6.  
\(\uparrow\)/\(\downarrow\) denotes increase/decrease with the increase in the varied element; \(\rightarrow\) denotes no obvious change the with the increase in the varied element. \begin{table}
\begin{tabular}{c c c c c c} \hline \hline
**Elements** & \(\mathbf{T}\) & \(\mathbf{R_{g}}\) & \(\mathbf{L_{p}}\) & \(\mathbf{L_{s2}}\) & \(\mathbf{L_{g2}}\) \\ \hline \(E_{\text{stw-on}}\) & \(\downarrow\) & \(\uparrow\) & \(\downarrow\) & \(\uparrow\) & \(\rightarrow\) \\ \(E_{\text{stw-off}}\) & \(\uparrow\) & \(\uparrow\) & \(\rightarrow\) & \(\uparrow\) & \(\rightarrow\) \\ \(E_{\text{total}}\) & \(\rightarrow\) & \(\uparrow\) & \(\downarrow\) & \(\uparrow\) & \(\rightarrow\) \\ \(V_{\text{gs}}\) & \(\downarrow\) & \(\downarrow\) & \(\uparrow\) & \(\downarrow\) & \(\rightarrow\) \\ \(I_{\text{gs}}\) & \(\rightarrow\) & \(\downarrow\) & \(\uparrow\) & \(\downarrow\) & \(\rightarrow\) \\ \hline \hline \end{tabular}
\end{table} 
Table 6: Quantitative comparison of loss, voltage and current overshoot. Figure 16: Comparison between experiment and calculation under the influence of external gate stray inductance \(L_{g2}\). (**a**) Power losses. (**b**) Voltage overshoot and current overshoot.