## 7 Common-Mode Voltage Analysis
### Experimental Results  
This section is devoted to the laboratory-designed experimental setup and the measurements. Figure 9 shows the photograph of the experimental setup. The symmetrical nine-phase induction motor was obtained by rewinding the stator of an existing 1.5 hp three-phase squirrel cage machine; the rotor was kept the same. Moreover, the nine-phase VSI was constructed using discrete semiconductors and based on Power MOSFET-IRFP460. The inverter was powered by a three-phase phase autotransformer via an uncontrolled rectifier. The dc-link comprised two series, 4700 \(\upmu\)F/600 V, to obtain positive, negative, and midpoint terminals. The PWM schemes and their gating signals were implemented via the DS1104 dSPACE platform. Six of the nine phases had LEM current sensors for measuring the output phase current, whereas the phase voltage and the CMV were measured via TERCO-1971 differential voltage probes. Finally, a Tektronix DPO2024 Oscilloscope was used to show the voltage and current waveforms. In the experiment, the motor operated at no-load conditions with a frequency of 20 Hz, and the inverter was fed from 100 \(V_{dc}\). Due to the capability of the dSPACE platform, the switching frequency was set at 3 kHz. Figure 10 shows the measurement of the phase voltage waveforms for the motor phase-\(a\) voltage, the currents of phase \(a\) and \(b\), and the CMV waveforms for the analyzed PWM techniques. Moreover, to evaluate the quality of the inverter outputs, the Fast Fourier Transform (FFT) spectrum for the captured motor current for each scheme is shown in Figure 11. It can be observed that a near sinusoidal current with about THD of 5.6% was achieved with the SVM scheme but with a high CMV magnitude. However, the proposed AZS and SV-10L schemes that reduced the CMV have multiple low-order harmonics in the motor currents with high THD. Figure 11: Fourier Transform analysis for the motor current for the analyzed PWM schemes. Figure 10: Experimental results of phase voltage, two of the line currents, and the CMV waveforms for the analyzed PWM schemes. It is worth mentioning from the experimental results that although the duty cycles and the analyzed modulation schemes' implementations ensured sinusoidal output voltage with zero \(x-y\) components, the motor currents' experimental waveforms were distorted. This is why:  
1. The motor was initially a three-phase machine. Only the stator winding was replaced to configure a symmetrical nine-phase machine, and the rotor was kept the same. This resulted in some induced \(xy\) current components and increased mutual inductance coupling effects. 2. Application of deadtime for the inverter switching signal to prevent short-circuits between the upper and lower switches of the same leg, and
3. Parasitic effects of the semiconductors. 4. It seems that the largest peaks appeared at periodic intervals. Is there a possibility that it was due to a loss of controllability? Is it possible that the distortion was due to the possible delay in the changes of current direction when changing state or sequence? Authors are asked to describe whether or not these are a possibility. It is requested that they include an additional figure where the switching signals are shown, and the dead time considered can be clearly observed
5. Another comment is that the voltage and current spikes in Figure 10 were due to the PWM schemes' deadtime effects. It can be concluded that the simulation and experimental results showed a good agreement, and a notable reduction of CMV was observed in the proposed SV-10L scheme at the expense of additional current harmonics. Therefore, low efficiency is expected when the reduced CMV schemes are used. A further comment made here is that in this paper, we focused primarily on designing PWM modulation schemes to reduce common-mode voltage effects; however, to achieve a robust drive system, a voltage regulation and a current control loop must be designed.