## 6 Validation of the Hardware Implementation  
In this section, we present the results of the FPGA implementation of the same examples given in Section 4. We validate those examples by using MATLAB.  
Figures 18-22 show the examples from Section 4. Figures 23-25 show the error between the recovered sources using MATLAB and the FPGA.  
Figures 19, 21, and 26 show the recovered sources without regularization provided by the FPGA. We can see that the recovered sources are far from the exact source from the MATLAB implementation. Figures 18, 20, and 22 show the recovered sources provided by the FPGA implementation using regularization. We emphasize that we obtained similar results from MATLAB.  
We define the norm of maximum absolute error (NMAE) between the regularized recovered source \(g_{\alpha,N}\) and the recovered implemented source \(g_{\alpha,N}^{I}\) as follows:  
\[\text{NMAE}=\max_{\theta}\{\left|g_{\alpha,N}(\theta)-g_{\alpha,N}^{I}(\theta )\right|\}.\]  
We define the maximum absolute error (MAE) as:  
\[\text{MAE}(\theta)=\left|g_{\alpha,N}(\theta)-g_{\alpha,N}^{I}(\theta)\right|,\text{for all }\theta\in[-\pi,\pi].\]  
Figures 23-25 show the MAE between the sources recovered using MATLAB and the sources recovered using the FPGA implementation. We observe that the NMAE is less than \(10^{-3}\). This result confirms that the FPGA implementation of the algorithm is reliable.  
Figure 17: Left: Power, Mode 1. Right: Power, Mode 2. We observe that Mode 2 has lower current consumption. For both modes, Artix-7 has the lowest consumption.  
Figure 19: Exact source is shown in red, whereas the blue line shows the approximate source obtained by the implementation in the FPGA using Equation (11) (without regularization). Results similar to those from the MATLAB implementation are obtained. Thus, we validate the FPGA implementation. The recovered source is obtained by applying the algorithm to the measured data.  
Figure 20: Exact source is shown in red. Source recovered by the FPGA implementation using Equation (17) with regularization is shown in blue. Results similar to those from the MATLAB implementation are obtained. Thus, we validate the FPGA implementation.  
Figure 18: The exact source is shown in red, and the result provided by the FPGA implementation using Equation (17) with regularization is shown in blue. Results similar to those from the MATLAB implementation are obtained, thus validating the FPGA implementation.  
Figure 21: Exact source is shown in red, whereas the blue line shows the approximate source obtained by the FPGA implementation using Equation (11) without regularization. Results similar to those from the MATLAB implementation are obtained. Thus, we validate the FPGA implementation.  
Figure 22: Exact source is shown in red, and result provided by the FPGA implementation using Equation (17) with regularization is in blue. Results similar to those from the MATLAB implementation are obtained. Thus, we validate the FPGA implementation.  
Figure 24: MAE between the source recovered using MATLAB programs and the one recovered by the FPGA implementation. Note the scale. The NMAE is less than \(10^{-3}\), which shows that the FPGA implementation gives almost the same results as the MATLAB implementation.  
Figure 25: MAE between the source recovered using MATLAB programs and the one recovered by the FPGA implementation. Note the scale. The NMAE is less than \(10^{-3}\), which shows that the FPGA implementation provides results that are comparable to the MATLAB implementation.