# An Automatic Detection Method for Cutting Path of Chips in Wafer
## 2 Materials and Methods
### Definition of Cutting Path  
Visual inspection is an important method to determine the wafer-cutting path. It requires that the cutter does not damage the chip when cutting along the cutting path. Therefore, in the process of visual solution, the positioning accuracy of the cutting path determines the yield of the final chip production. When cutting, it is considered that the chip pattern, geometric shape, and brightness distribution in the ideal wafer image are highly similar; otherwise, it is a real wafer image. To process an ideal wafer, it is only necessary to determine the center of gravity position of the chip region to determine the cutting path, which meets the accuracy requirements. The definition of the cutting path is shown in Figure 2. In Figure 2, the image coordinate system is _o-xy_, where \(o\) is the origin, \(x\) is horizontally positive to the right, and \(y\) is vertically positive in the downward direction. Assuming that the number of chips in the image is \(M\) (rows) \(\times\)\(N\) (columns), the center of gravity position of each chip region \(A_{ij}(x_{ij},y_{ij})\) was determined by the template matching algorithm of calculating the frequency domain correlation, in which \(i\) represents the row index and \(j\) represents the column index, the center of gravity position of each column of chips is fitted using the Least Square Method (LSM), and the fitting line \(L_{j}\) of the column \(j\) is obtained. The equation of the straight line is \(y_{j}=a_{j}x+b_{j}\). We correct the fitting of the straight line. The slope of the corrected straight line is the same. The corrected straight line \(L_{xj}\) of column \(j\) is obtained, and the equation is \(y_{xj}=a_{x}+b_{xj}\), where \(a_{x}\) is the average slope of all fitted straight lines. Then, we determined the cutting path \(L_{F}\) from the modified lines \(L_{x1}\) and \(L_{x2}\) on both sides of the first column of the street. The cutting path equation is \(y_{F}=a_{Fx}+b_{F}\), \(a_{F}=a_{x}\), and \(b_{F}\) is the mean of the intercept of the two straight lines.  
When determining the cutting path of the real wafer image, the overall brightness distribution, geometric shape, and surface quality of the chip region are significantly different due to the influence of external light and wafer surface pollution, as shown in Figure 3. The brightness distribution in the \(A_{MN}\) chip region in the image is uneven as the left side is bright and the right side is dark. The areas marked C and D represent surface contamination in the chip region.  
Based on the above analysis, due to the influence of light and surface pollution, the positioning deviation of the chip region is more than 10 pixels, or even higher. Therefore, it is necessary to preprocess the image, adjust the gray distribution, and highlight the chip region. After the chip region is determined, the interlayer is used as an auxiliary to positioning to determine the cutting path. The trace is shown in the area marked \(B\) in Figure 3. In the real case, the template matching algorithm is used to determine the center of gravity \(A_{ij}\) of the chip region, which is the same as the ideal positioning method. The peak detection algorithm is used to find the interlayer in the determined chip region, and discrete points are used to mark it. The discrete points are divided into \(P_{jL}^{q}\) and \(P_{jR}^{q}\) according to the left and right sides of the chip in column \(j\), as shown by the green dot in Figure 3. We used the ANSAC algorithm [16] to fit the discrete points on each column of chips to obtain the straight line \(L_{jL}^{O}\) and \(L_{jR}^{O}\), corrected to \(L_{jL}^{X}\) and \(L_{jR}^{X}\) according to the correction line on both sides of the first street \(L_{1R}^{X}\) and \(L_{2L}^{X}\), to determine the cutting path \(L_{F}\).  
Figure 3: Definition of cutting path on the real wafer image.  
Figure 2: Definition of cutting path on the ideal wafer image.