# Impact of Silicon Substrate with Low Resistivity on Vertical Leakage Current in AlGaN/GaN HEMTs
## 3 Results and Discussion
Figure 2: Temperature-dependent current-voltage (I-V) characteristics of p-type (**a**), n-type samples (**b**). The AlN nucleation layer is very important for the growth of AlGaN/GaN-on-Si, but it leads to the formation of an additional AlN/Si interface. For the AlN/p-Si interface, the inversion channel responsible for VLC has been widely discussed in literature. [PERSON] et al. found that a weak inversion channel would form at the high electric field in the AlN/Si interface, and the injection electrons originate from impact ionization of Si [19]. [PERSON] et al. thought the inversion channel exists even without applying bias, which was confirmed by Hall measurements [20]. While several groups have already pointed out that the inversion channel could form under a certain voltage region, it could not be clearly characterized by capacitance voltage measurement, owning to the fact that the interface has a high acceptor trap density [11; 12]. Thus, the existence of an inversion channel at the AlN/p-Si interface has been confirmed. In the present work, we found that the inversion channel at the AlN/Si interface appears for p-type samples, leading to the electron injection increasing [16], as shown in Figure 4c. When the applied voltages continue increasing, the electrons in the Si are accelerated because they obtain enough energy from the higher applied voltage (green arrow in E\({}_{\rm c}\)). The electron hole pairs are generated due to impact ionization (blue arrow between E\({}_{\rm c}\) with E\({}_{\rm v}\)). A lot of electrons coming from the impact ionization are injected into AlN layer, as shown in Figure 1a. However, the impact ionization in n-Si substrate does not occur for n-type samples [12], as shown in Figure 4d. So the E\({}_{\rm a}\) in n-type samples changes a little with voltages compared to p-type samples which drops quickly. As a result, the slope for p-type samples drops more quickly than that for n-type samples. In short, the substrates play a key role on VLC at the whole region of 0-600 V.  
We summarize the recent state of the arts in Table 1. According to the results above, we can find that the difference in our work is that: (1) We find and clarify that the leakage mechanisms are different in the low and high bias ranges, and (2) we show a comparative study for AlGaN/GaN HEMTs on both  
Figure 3: E\({}_{\rm a}\) extracted from ln J-1/T at different biases of p-type (**a**), and n-type (**b**) samples, (**c**) E\({}_{\rm a}\)-V(T) plots of p-type and n-type samples. p-type and n-type substrates with low resistivity, while the literatures show the case of buffer only on both substrates. \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Sample Structure** & **Si Substrate** & **Vertical Leakage Mechanisms** & **Reference** \\ \hline TL/AlN/Si & n\({}^{+}\) & (i) p-type: SRH carrier generation in Si & \\ AlN/Si & n\({}^{+}\) & (ii) n\({}^{+}\)-type: electron injection through & [11] \\ GaN-on-Si(p) & p & AlN/Si barrier & \\ \hline AlN/Si & n\({}^{+}\), p\({}^{+}\) & SCLC, VRH, and TAT models & [12] \\ \hline GaN-on-Si & p Low resistivity & SCLC model & [14] \\ \hline \multirow{3}{*}{GaN-to-Si} & \multirow{3}{*}{p Low resistivity} & (i) weak inversion in AlN/Si interface & \\  & & (ii) impact ionization in Si & \\  & & (iii) electron injection from Si into the & \\  & & Buffer & \\ \hline \multirow{3}{*}{GaN-on-Si} & \multirow{3}{*}{P} & (i) carrier injection from an inversion & \\  & & (ii) PT conduction & [20] \\ \hline GaN-on-Si & p & PF conduction & [21] \\ \hline (Al)GaN-on-Si & & PF conduction (\(>\)200 V) & [22] \\ \hline GaN-on-Si & n High resistivity & a combination of PF and hopping & [23] \\ \hline \multirow{3}{*}{(Al)GaN-on-Si} & \multirow{3}{*}{p\({}^{+}\)} & (i) SCLC model at 0–400 V and PF & \\  & & conduction at 400–600 V for p-type & \\ \cline{1-1}  & n\({}^{+}\) & (ii) SCLC model at 0–600 V for n-type & \\ \cline{1-1}  & & (iii) impact ionization in p-Si & \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Research status of vertical leakage mechanisms on Si substrate.