## 1 Introduction  
In the last few decades, the conventional downscaling of complementary metal-oxide-semiconductor (CMOS) transistors dominantly relied on the reduction of size to improve the performance as well as to reduce the costs and the power consumption of devices. With the end of physical scaling of field-effect transistors (FETs), further device performance enhancement is expected to be based on new concepts. These concepts include new materials (e.g., high mobility channel materials [1; 2; 3] such as 2D materials), metal gates with high-k gate dielectrics [4], new device architectures (e.g., 3D integration) [5], new computation principles (e.g., spintronics) [6], and new functionality (e.g., reconfigurability) [7]. Reconfigurability, in particular, can be achieved by selectively injecting a chosen type of charge carrier in the channel and controlling the concentration of these charge carriers at Schottky junctions [8]. This concept is typically implemented by fabricating Schottky junction-based FETs, also known as reconfigurable FETs (RFETs) [9]. In RFETs, undoped silicon nanowires (SiNWs) are nickel (Ni) silicided from both ends using annealing, and the Ni diffusion process creates a silicide-silicon-silicide structure with two Schottky junctions. The observed silicide phases vary in terms of the sheet resistance, Schottky barrier height, built-in strain etc. [10; 11]. Hence, the phase of the silicide influences the performance of devices as the injection and the extraction of charge carriers in the silicide-silicon junction depend on the properties of the phase [12; 13]. Since the performance of RFETs strongly depends on the quality of the Schottky junctions, proper control over the silicidation process (silicide phase, sharpness of the silicide-Si interfaces, silicide length along the nanowire) in these devices is very important but remains a challenge [14]. This work aims at understanding the Ni-silicide diffusion mechanism and attaining specifically the NiSi\({}_{2}\) phase in top-down fabricated SiNWs by studying the silicide-Si interfaces. The formation of NiSi\({}_{2}\)-Si contacts is attractive because NiSi\({}_{2}\) exhibits similar electron and hole barriers [10]. It also has a low lattice mismatch of 0.4% with respect to Si at room temperature, which allows the formation of single-crystalline structures [10; 15]. NiSi\({}_{2}\) forms an abrupt heterojunction to Si, thus enabling its use in unipolar devices such as RFETs [16]. To understand the sequence of phase formation within the desired temperature range, various studies have been reported for bottom-up grown nanowires [17; 18; 19; 20; 21; 22; 23; 24; 25; 26; 27; 28; 29; 30; 31]. However, fewer studies are available for top-down fabricated nanowires [32; 33]. In addition to the formation of the suitable silicide phase, control over the sharpness of silicide-Si interfaces, and the silicide length is important for applications such as RFETs and Schottky barrier FETs [34]. Silicides are mostly formed by a temperature-induced interfacial reaction of a transition metal with Si. This process is called the reactive phase formation, which indicates diffusion between two adjacent phases leading to the formation of a single or multiple products along the chemical gradient between those phases [35; 36]. Silicidation is governed by diffusion [37; 38] and nucleation [35; 39] and can be controlled by steps involved in the reaction phase formation. Ni-silicide formation on bulk Si substrates has been extensively studied in the past [39; 40; 41; 42; 43]. Moreover, Ni-silicided nanowires can be produced by direct synthesis or by solid-state reaction of Ni with SiNWs. [PERSON] et al. [44] reported single-crystalline NiSi nanowires produced by radial silicidation of vapor-liquid-solid grown SiNWs, which were coated with thermally-evaporated Ni and annealed at 550 \({}^{\circ}\)C in forming a gas atmosphere to produce single-crystalline NiSi NWs.