# Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors
## 4 Analogue Counter and Photon Counting Performance  
Single photon counting is achieved in the analogue domain with a SPAD avalanche pulse triggering an integrator circuit based on the principle of the charge transfer amplifier (CTA) whose operation is briefly described here, and in further detail in [15; 16]. In reference to Figure 2, the SPAD is connected to a passive quench and recharge transistor with static DC bias voltage \"\(V_{\text{Q}}\)\" controlling the recharge or \"dead\" time of the diode. This is connected to the analogue counting CTA circuit via a two transistor global shutter time gate. The CTA is reset by pulling the main capacitor \"\(C\)\" to the high reset voltage \(V_{RT}\). The CTA operates by the input gate voltage (in this case the SPAD anode voltage) increasing above the threshold voltage of the input source follower. Charge flows from the main capacitor \"\(C\)\" to the parasitic capacitor \"\(C_{P}\)\" and the voltage rises on the parasitic node. The rising voltage pushes the source follower into the cut-off region and the charge flow halts, causing a discrete charge packet to be transferred from the main capacitor for each input pulse. The SPAD anode begins recharging and the lower transistor in the CTA discharges the parasitic capacitance which is achieved with a static bias voltage \"\(V_{DC}\)\" applied keeping this transistor, below threshold, in weak inversion. Figure 2: Charge transfer amplifier (CTA) analogue integrator pixel with active pixel sensor (APS) readout for global shutter or time-gated SPAD-based photon counting imaging. The voltage step sensitivity (CVF equivalent) of CTA pixels is determined by the fixed capacitor ratio (parasitic capacitance \"\(C_{P}\)\" divided by integration capacitor \"\(C\)\") scaling down the input voltage spike. The CTA voltage step (\"\(\Delta V_{CTA}\)\") is bias controllable by \"\(V_{SOURCE}\)\" and given to a first order by the equation:  
\[\Delta V_{CTA}=\left(\frac{C_{P}}{C}\right)\ \cdot\ (V_{EB}-V_{SOURCE}-V_{TH}) \tag{7}\]  
where \(V_{EB}\) is the excess bias of the SPAD above the breakdown voltage \(V_{BD}\), \(V_{SOURCE}\) is the global CTA source bias voltage, and \(V_{TH}\) is the threshold voltage of the CTA input transistor. Figure 3a illustrates an example of the output of one test structure pixel recorded with 1000 repetitions of 30 \(\upmu\)s integration time and ADC conversion from [15]. 1000 repetitions were chosen to give an adequate number of data samples versus experimental time. The SPAD is biased at 2.7 V \(V_{EB}\) above breakdown voltage \(V_{BD}\approx 13.4\) V. The discrete peaks under a classical Poisson distribution are clearly evident indicating the photon counting in this example is shot noise limited. Figure 3b is the side-by-side modelled PCH from a manual regressive modelling and fitting method analysis. The parameters were chosen for the closest found fit, although an offset in the \(x\)-axis is still present. In Figure 3a, there is a slight \"in-filling\" of some data values between the peaks. This is attributed to a distortion mechanism in the passively operated CTA circuit due to the imperfect reset, or incomplete discharge, of the parasitic capacitance \(C_{P}\) for short inter-arrival times of two SPAD avalanche events less than 100 ns apart. The PSW method is performed for the image sensor in [16] to determine the response of the analogue counter to the SPAD excess bias and the source bias voltage. Figure 4 illustrates the relationship of the mean peak separation or image sensor sensitivity to both the SPAD excess bias and the CTA source voltage. The absolute value of the linear gradient fitting parameter indicates the capacitor ratio whilst the offset parameter indicates the other terms in the CTA equation. Figure 4: Measured mean peak separation from a set of PCHs, (**a**) The relationship of counter sensitivity to SPAD operating voltage; (**b**) The relationship to CTA \(V_{SOURCE}\) voltage.