# A Reconfigurable Framework for Hybrid Quantum-Classical Computing
## 5 Conclusions and Future Work  
In this research, we proposed a generalized FPGA-based framework aimed at accelerating classical computations in hybrid quantum-classical algorithms. By overcoming the limitations of algorithm-specific implementations, our methodology harnesses FPGA's inherent advantages of high throughput and low latency to effectively support diverse computational scenarios. Furthermore, we introduced a unified high-level framework, integrating classical FPGA and quantum resources, thereby simplifying resource management and improving the accessibility of quantum-classical workflows. We have also investigated a quantitative comparison with a state-of-the-art quantum software framework running on a server-grade CPU, which demonstrated a 8\(\times\) improvement in runtime when compared to the CPU baseline.  
For future work, we envision the development of dedicated FPGA kernels optimized to accelerate quantum circuit simulations. Our preliminary experiments have demonstrated successful simulations of gradient and loss computation up to 15 qubit circuits. However, by leveraging the full available on-board memory, we anticipate the extension of these simulations to handle significantly larger quantum circuits. Given that each state amplitude requires storage for complex numbers (using four bytes each for the real and imaginary components), it is feasible to simulate quantum circuits up to 24 qubits utilizing available on-board memory (64 GB) and other resources. Additionally, we plan to experiment directly with actual quantum processing units (QPUs), such as those provided by IBM, facilitating practical experiments and providing comparisons to hybrid quantum  
Figure 10: Projected speedup for larger QML circuits.  
classical computations. Alongside hardware advancements, we also recognize theoretical challenges in training deep variational quantum circuits, particularly the barren plateau phenomenon [32], that can hinder effective gradient-based optimization. To mitigate this, our current implementation restricts the circuit depth to five layers and incorporates PCA-based input normalization and mini-batch stochastic gradient descent to preserve meaningful gradient flow. Future studies will thus focus on assessing the practical limits and performance improvements achievable through FPGA acceleration in hybrid quantum classical computing. In addition to classification tasks, we envision the extension of the proposed framework to support other key quantum computing applications. Specifically, we plan to implement FPGA-accelerated classical components for VQEs, which are central to quantum chemistry simulations, and for quantum generative models such as quantum Boltzmann machines (QBMs) and quantum generative adversarial networks (QGANs). These extensions would enable the benchmarking of the framework across a broader set of problem classes and provide further evidence of its generality and effectiveness in hybrid quantum-classical workflows. We also plan to explore advanced training strategies such as layer-wise optimization and heuristic parameter initialization, which are promising techniques to further alleviate barren plateau effects and enable more scalable learning in quantum-classical hybrid models.  
Conceptualization, P. and N.M.; methodology, P.; software, P.; validation, P.; formal analysis, N.M.; investigation, P.; resources, N.M.; data curation, P.; writing--original draft preparation, P. and N.M; writing--review and editing, N.M.; visualization, P.; supervision, N.M.; project administration, N.M. All authors have read and agreed to the published version of the manuscript.  
This research received no external funding.  
The original contributions presented in this study are included in the article. The dataset and code-base has not yet been deposited in a public repository but will be made available upon request. Further inquiries can be directed to the corresponding author.  
The authors declare no conflicts of interest.