# A Novel Top-Down Fabrication Process for Vertically-Stacked Silicon-Nanowire Array
## 4 Discussion and Conclusions  
In this paper, a novel top-down method for fabricating vertically-stacked silicon-nanowire arrays was presented. This method enables the fabrication of lateral silicon-nanowire arrays in a vertical direction, as well as the fabrication of an increased number of silicon nanowires on a finite dimension, which, in turn, results in increased sensitivity and a dynamic range. This paper also deals with the considerations in each process when manufacturing nanowires with different dimensions. The proposed fabrication process used single UV lithography, DRIE, and wet-oxidation processes. First, the patterns of the silicon-nanowire array were defined by photolithography. However, the UV lithography has limited resolution, so the number of silicon nanowires that can be fabricated per unit area is limited. The silicon-nanowire arrays in this paper were fabricated at the wafer-level and used as one building block for the purpose of integration with other electronic devices. Therefore, this paper dealt with a process method of increasing the number of silicon nanowires per unit area by vertically stacking to improve the sensing characteristics. Then, the structures in which the silicon nanowires form were defined by DRIE, where the number of vertically-stacked arrays can be adjusted by the number of dry-etching repetitions. Finally, the silicon nanowires were formed through a wet-oxidation process, where the silicon-nanowire dimensions can be precisely controlled by the process time. The uniformity  
Figure 5: Fabrication of vertically-stacked silicon-nanowire array. (**a**) Cross-sectional view (oxidation for exact time); (**b**) cross-sectional view (excessive wet-oxidation case). Figure 6: Fabrication result after oxide-layer removal. (**a**) Released silicon-nanowire array; (**b**) top-view and cross-sectional view (inset) of released structure. of the silicon nanowires created on each layer is, in turn, most affected by the uniformity of the scallop with the depth of the DRIE process. Through various experiments in this paper, the process conditions in which the scallop can be produced most uniformly according to depth were derived, and the size of the protrusion and support produced when it was done in accordance with this condition were measured and evaluated. Depending on the oxidation process time, the dimension of the silicon nanowires is also affected. To this end, we measured the width of the protrusion and support and conducted the oxidation process only for the optimal time for isolating the layer. Figure 5 discusses the possible imbalance when the oxidation process is carried out for the optimum time and excessive time. Using the proposed method, the fabrication results of the vertically-stacked silicon-nanowire array consisting of three vertical layers are shown. It is expected that the amount of current output from the sensor can be increased when implementing chemical or optical sensors using it. Each layer is equipped with twenty well-aligned diamond-shaped silicon nanowires with the dimensions of a single nanowire of approximately 300 nm in width and 20 \(\upmu\)m in length. Indeed, this should lead to highly sensitive, reproducible, and low-cost silicon-nanowire sensors that can be used for a number of applications. In this paper, we created a three-layered silicon-nanowire array, but using this process, it is possible to produce more than three layers. The latest DRIE equipment is capable of deep silicon etching with a scale of up to tens of um uniform size scallops, and the depth of the silicon-nanowire array on the third floor produced in this paper is approximately 5 \(\upmu\)m. Therefore, the proposed method is expected to fabricate silicon-nanowire arrays with a more vertically-stacked structure. In addition, the proposed method can reduce the process complexity and facilitate monolithic integration when combining silicon nanowire-based sensors and CMOS circuits.