# Effect of Thermal via Design on Heat Dissipation of High-Lead QFN Packages Mounted on PCB
## 4 Conclusions  
The study employs finite element analysis to investigate the impact of thermal via design on the heat dissipation performance of high-lead QFN packages in comparison with conventional QFN and dual-row QFN packages. A systematic examination of four factors--thermal via distance, quantity, diameter, and copper plating thickness--was conducted, employing fundamental steady-state thermal analysis and static structural analysis techniques. Corresponding models were established using Ansys software, yielding a series of valuable outcomes.  
In this paper, we verify the effectiveness of thermal vias and the superiority of heat dissipation in high-lead QFN packages. The analysis results indicate that, within the high-lead QFN package, a closer proximity of thermal vias to the heat source corresponds to more significant heat dissipation effects. Thermal vias situated beneath the thermal pad exhibit enhanced heat dissipation effectiveness. When designing thermal vias, we should try to arrange the thermal vias as close as possible to the heat source and try to ensure complete contact between the thermal vias and the heat source. Increasing the quantity of thermal vias enhances heat dissipation, with square distribution layouts showing more distinct advantages over circular ones, particularly when the quantity of thermal vias is  
Figure 13: Maximum temperatures for thermal vias with different copper plating thicknesses.  
substantial. When components that require heat dissipation are soldered to the PCB, we should maximize the number of thermal vias and arrange them in a square distribution.  
We verified the effectiveness of combining I/O pads and thermal vias. This design not only reduces the junction temperature of the QFN packages but also significantly lowers the temperature of the solder joints, thus reducing the thermal stress at the solder joints. In cases where solder joints are prone to failure due to high temperatures, we can use this design to improve the solder joint life. Enlarging the thermal via diameter contributes to improved heat dissipation. However, elevating the copper plating thickness may amplify the PCB's thermal resistance, exerting adverse effects on QFN heat dissipation. In general, under consistent conditions of thermal via diameter and copper plating thickness, the high-lead QFN package demonstrates optimal heat dissipation performance. All of these conclusions are based on a model with uniform thickness, homogeneous structure, and perfect contact between the materials.  
In summary, this study provides a solid theoretical foundation and practical guidance for designing new QFN packages and optimizing PCB structures. This study helps to improve the heat dissipation performance of QFN packages for manufacturing more reliable electronic components. The investigations were performed for the PCB containing only one copper layer. The thermal vias could be more important when the PCB with two copper layers is used. In our future work, we will continue to improve the heat dissipation of QFN packages through the combined optimization of the heat convection process and the heat conduction process. In future work, we will design experiments to verify the obtained computation results.  
Conceptualization, D.D.; formal analysis, W.Z. and Z.Y.; investigation, Z.Y.; writing--original draft, Z.Y.; writing--review and editing, W.Z. and Z.Y.; project administration, D.D. All authors have read and agreed to the published version of the manuscript.  
This research was funded by the SJTU-Zhongmu Joint Research Center for Materials and Technology of Intelligent and Connected Vehicles (No.202310) and Suzhou Aeroton Technology Co. Ltd.  
Not applicable.  
The data is contained within the article.  
The authors declare no conflict of interest.