# Designed on 0.18 um CMOS Process Small Size Broadband Millimeter Wave Chip Antenna
###### Abstract
By conducting resonance analysis on the antenna, the best method to improve antenna performance can be determined. By adjusting the impedance and bandwidth through the use of parasitic capacitance generated by double-layer artificial magnetic conductors, it has been confirmed through measurement that the bandwidth has increased to 5.8 GHz and a consistent input impedance has been obtained [22]. Reference [23] analyzed and compared different artificial magnetic conductor units, and the results showed that the proposed (back-to-back E-shaped, B2 BE) architecture had the best reflection coefficient (75-125 GHz) and was applied to antennas. With the assistance of artificial magnetic conductors, the gain and efficiency of chip antennas can be improved to a certain extent. However, in recent years, there have been studies and designs that integrate printed circuit boards and active circuits, which can overcome the disadvantages of low gain and low efficiency of chip antennas. For example, the use of air-filled substrate synthesis waveguide technology combined with chip antennas results in the better resonance of chip antenna radiation, with an efficiency improvement of over 90% [24] Alternatively, integrate the chip antenna with the active circuit and embed it into the printed circuit board to improve the overall antenna gain [25]. Reference [26] introduced a switching circuit in the chip antenna, which achieved an overall bandwidth of 53.4% in two operating states. Switching circuits can increase the operating mode of chip antennas and improve bandwidth performance. By using a hexagonal grid structure to reduce the size, [27] analyzed the angle of the grid to optimize impedance matching, and proposed a miniaturized broadband monopole antenna for the W-band. Additionally, the capacitance effect between the sixth layer of metal and the first layer of metal was utilized to achieve broadband, with an antenna bandwidth of 31.5%. Chip antennas can be miniaturized using different architectures, and the capacitance effect between metal layers can be used to enhance bandwidth. In this article, it is proposed that 1 \(\times\) 2 broadband monopole chip antennae use 0.18 \(\upmu\)m CMOS manufacturing process with an antenna area of 1.2 \(\times\) 1.2 (mm\({}^{2}\)), which improves antenna radiation performance through array mode. The proposed triangular patch antenna design and circular slot holes enhance bandwidth performance. Measurements have verified that the bandwidth is 57.6-93.8 GHz, with a fractional bandwidth 54%, below the reflection coefficient \(-\)10 dB standard. Additionally, the proposed antenna has \(-\)0.4 dB gain at 64 GHz. The antenna radiation efficiency is 40%. The frequency band covers the millimeter wave frequency band of 5G NR FR2. The explanation framework of this article is as follows: the second chapter explains the topology, simulation results, evolution, and parameter analysis of the proposed antenna. The third chapter compares the results of measurement and simulation to illustrate the differences between measurement and simulation. The fourth chapter describes the performance comparison with the recent literature and proposes the advantages of this antenna. Finally, in fifth chapter, the performance and characteristics of this antenna are summarized.