# Improvement of Electrical Performance in Heterostructure Junctions TFET Based on Dual Material Gate
## 3 Results and Discussion  
### The Operating Mechanism of DMMG-HJLTFET  
A basic analytical formulation for band to band tunneling probability T (E) is shown in Equation (1):  
\[\text{T}(\text{E})\propto(-\frac{4\sqrt{2\text{m}^{*}}\text{E}_{\text{g}}^{ \frac{3}{2}}}{3|\text{e}|\text{h}(\text{E}_{\text{g}}+\Delta\Phi)}\sqrt{\frac{ \varepsilon_{\text{si}}}{\varepsilon_{\text{ox}}}\text{t}_{\text{si}}\text{t}_ {\text{ox}}})\Delta\Phi \tag{1}\]  
where m* is the effective carrier mass, Eg is the bandgap, \(\Delta\Phi\) is the energy range over which tunneling can take place, and tox, tsi, \(\varepsilon_{\text{ox}}\), and\(\varepsilon_{\text{si}}\) are the oxide and silicon film thickness and dielectric constants, respectively. As can be seen from the above formulation that small m*and small Eg in source region is required in the source region, and appropriate materials need to be selected in source/channel interface to ensure the appropriate \(\Delta\Phi\).  
Based on theoretical analysis, we propose a dual material gate heterostructure junctionless TFET (DMMG-HJLTFET) in this paper.  
The physical mechanism of DMMG-HJLTFET is explained in Figures 2a-d and 3a,b. Figure 2a,b shows the BTBT rate of electron and hole of DMMG-HJLTFET when Vds = 1 V. It is obvious that BTBT occurs at source and channel interface, and the rate of BTBT increases significantly due to heterojunction between source and channel. Figure 2c shows the electric field distribution when Vgs = 2.0 V and Vds = 1.0 V, it is not difficult to find that the value of electric field is markedly improved near hetero junction and hetero dielectric, resulting in a higher ON-state current and a lower OFF-state current in DMMG-HJLTFET. Figure 2d shows the total current density of DMMG-HJLTFET when Vgs = 2.0 V and Vds = 1.0 V, as can be seen from the Figure 2d, the current mainly flows in the middle region of this device, introducing the sandwich stack structure (GaAs/Si/GaAs) for DMMG-HJLTFET not only guarantees the large ON-state current, but also guarantees the small OFF-state current, which benefits from combining the advantages of silicon and GaAs.  
Figure 2: _Cont._  
The comparative analysis among devices JLTFET, HJLTFET and DMMG-HJLTFET for the energy band diagram at the device surface is shown in Figure 3a. From observing this figure, it is not difficult to find that the conduction band and valance band of HJLTFET and DMMG-HJLTFET in the tunneling region are very close to each other, resulting in the tunneling distance of both devices being much smaller than that of JLTFET, this is because both devices employ germanium as their source and a heterojunction is introduced at the channel/source interface, which leads to the tunneling possibilities and ON-state current of HJLTFET and DMMG-HJLTFET being much larger than that of JLTFET. Moreover, the difference in DMMG-HJLTFET is that the gate electrode is divided into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3), with workfunctions \(\Phi_{\text{M1}}\), \(\Phi_{\text{M2}}\) and \(\Phi_{\text{M3}}\), which further improves the tunneling possibilities at channel/source interface and produces an extra barrier height at channel/drain interface in DMMG-HJLTFET. Together with sandwich stack structure (GaAs/Si/GaAs), divided gate electrode obviously increases the ON-state current and decreases the OFF-state current of DMMG-HJLTFET. Figure 3b shows the energy band diagram of JLTFET, HJLTFET and DMMG-HJLTFET at the middle region of the device, as can be seen from this figure, the variation of energy band of source region at the middle is similar to Figure 3a, however, variation of energy band of channel and drain region is very different to Figure 3a. The reason for this is that the extra barrier introduced by divided gate electrode only exists in the surface region of DMMG-HJLTFET.