# An Efficient On-Chip Data Storage and Exchange Engine for Spaceborne SAR System
## 5 Experiments and Results
### Experimental Results and Performance Evaluation
#### 5.2.2 The SAR Imaging Processing System with Heterogeneous \"CPU + FPGA\" Architecture  
To complete the experiment and result evaluation, we embed the superscalar pipeline data storage exchange engine as an IP into the SAR imaging processing system platform with heterogeneous \"CPU + FPGA\" architecture for experimental verification and result evaluation. After deploying the complete heterogeneous imaging processing system to the ZCU106 platform and VC709 platform, the resource utilization on the VC709 side after the synthesis and implementation steps in Vivado 2020.2 is shown in Table 8.  
The resource utilization of the ZCU106 side after the synthesis and implementation steps in Vivado 2020.2 is shown in Table 9.  
The Block RAM resource usage is high on the VC709 side because the superscalar pipeline data storage exchange engine is deployed on the VC709 side for data buffer exchange. The calculation engine is also deployed to the VC709 side, and there are operations such as FFT and multiplication in the calculation engine, so there is some usage for DSP resources. The ZCU106 side mainly performs data transfer and algorithmic process control applications, and does not perform arithmetic and buffer exchange operations. Therefore, the ZCU106 side requires less resource consumption. \begin{table}
\begin{tabular}{c c c c} \hline
**Resource** & **Utilization** & **Available** & **Utilization (\%)** \\ \hline Slice LUTs & 153,282 & 433,200 & 35.38\% \\ LUT RAM & 21,036 & 174,200 & 12.1\% \\ Flip Hop & 212,947 & 866,400 & 24.58\% \\ Block RAM & 1283 & 1470 & 87.28\% \\ DSPs & 580 & 3600 & 16.11\% \\ \hline \end{tabular}
\end{table} 
Table 8: Hardware resource utilization of Xilinx Virtex-7 FPGA VC709 development platform. The SAR imaging processing experiment was carried out according to the above-mentioned test procedure. The SAR data with a granularity of 16,384 \(\times\) 16,384 in the experiment were provided by the Taijing-4 01 satellite. The Taijing-4 01 satellite was successfully launched at Wenchang Space Launch Site on 27 February 2022. This is China's first X-band commercial SAR satellite and has the ability to provide customers with diversified and high-quality SAR image products [44]. The SAR imaging results are represented by 8-bit grayscale images, and the pixel grayscale value ranges from 0 to 255. Figure 19 shows the SAR imaging results of the South Andaman Island in India, and compares the imaging results obtained from our \"CPU + FPGA\" heterogeneous SAR imaging system with the imaging results processed by MATLAB and the optical remote sensing image in the global map. In addition, we performed imaging processing on point target using the entire imaging system and compared the results with the point target imaging results obtained by MATLAB. The imaging results of \"CPU + FPGA\" for South Andaman Island in India, as well as the comparison with global map optical remote sensing image and MATLAB processing results, are shown in Figure 19. The imaging results of point target using \"CPU + FPGA\" and their comparison with MATLAB processing results are shown in Figure 20.  
After imaging processing for point target, the peak-to-side lobe ratio (PSLR) and integral side lobe ratio (ISLR) of the imaging results in the range direction and azimuth direction are evaluated [27, 45]. The simulation parameters of the raw echo data related to the imaging process of the point target are shown in Table 10. The peak-to-side lobe ratio (PSLR) refers to the height ratio of the first side lobe to the main lobe in the sinc function waveform of the SAR image. The integral side lobe ratio (ISLR) is the ratio of side lobe energy to main lobe energy.