## 4 Time-Delay Chaotic Circuit  
The growing research on chaos theory makes the connection between chaos and engineering even tighter. Purposeful enhancing and modeling of chaotic phenomena has become a pressing object of investigation [56]. In this section, we will define a detailed time-lag chaotic circuit with basic circuit components under the mathematical model of chaotic dynamics. Chaotic waveforms and chaotic phase diagrams comparable to the numerical study can be obtained from the oscilloscope. At the same time, the data were manipulated by computer, and various nonlinear dynamics parameters could be extracted, confirming that the chaotic system does coexist in nature. We design simulation circuits for a four-dimensional chaotic time-delay system. The time-lag module is the central part of the system (9) simulation, which consists of a network of T-shaped LCL filters, as shown in Figure 8. As the reactance varies with frequency, the LC low-pass filter is connected to an inductor at serial and a capacitor at parallel. The signal frequency limits the network constructed by the low-pass filter, showing high input impedance and high output impedance when the frequency is increased. Test results showed that the time lag unit has smooth characteristics below the cutoff frequency 1 kHz. A multi-stage filter is formed by placing \(n=10\) filter modules between the input and output ports to avoid single-stage filters failing when the useful signal frequency and the noise frequency are close together. Two matching resistors \(R_{27},R_{28}=1\) k\(\Omega\) are placed at each port, and the characteristic impedance in the passband is constant. The time lag \(\tau\) can be calculated by taking \(R_{23}=R_{24}=R_{26}=10\) k\(\Omega\), \(R_{20}=R_{23}=1\) k\(\Omega\) in the following equation  
\[\tau=n\sqrt{2 LC} \tag{25}\]  
By taking \(L=20\) mH, \(C=500\) nF, \(\tau=1.4\) ms, the calculated delay time \(t\) remains the same as the value of delay time \(t\) set by the time-delay chaotic system (9). After testing the simulation circuit, we found that the \(V_{x}\) variable channel frequency is maintained at about 700 Hz, much smaller than the low-pass filter cutoff frequency \(f_{c}\), thus ensuring that the signal passes through the module with low loss. To test the time-lag effect of the unit, we use a signal generator to input a 700 Hz sine wave to it and, comparing the input and output waveforms in Figure 9, we find that the output delay time is about 1.4 ms.  
Multisim software is used to simulate the oscillator circuit of the time-delay system (2). The operational amplifier LF347 BD and the analog multiplier used in the circuit are active devices. The typical working voltage of LF347 BD is \(\pm 15\) V, and the linear dynamic range is only \(\pm 13.5\) V. It is necessary to ensure that the device voltage output value does not exceed its working voltage and linear dynamic range, otherwise they may appear saturated distortion, affecting the display effect of chaotic graphics. We linearly transform the system (9) so that its signal output level is 10% of the original, let  
\[x=10V_{x}\,\ y=10V_{y}\,\ z=10V_{z}\,\ w=10V_{w} \tag{26}\]  
Figure 8: Time-delay module circuit. Equation (9) is adjusted as  
\[\left\{ \begin{array}{l}\dot{V}_{x}=a(V_{y}-V_{x})-pV_{x}(\tau)\\ \dot{V}_{y}=bV_{x}+cV_{y}-10V_{x}V_{z}+V_{w}\\ \dot{V}_{z}=10V_{x}V_{y}-dV_{z}\\ \dot{V}_{w}=-hV_{x}\end{array} \right. \tag{27}\]  
The circuit in Figure 10 is designed with five inter-coupled channels to perform the integration operations of the four system variables \(x(t),y(t),z(t),w(t)\) and the time-lag functions of the state variable \(x(t)\). An analog multiplier is used to implement the nonlinear terms in the system to avoid changing the initial nonlinear characteristics of the chaotic system, an operational amplifier is used to perform the addition and subtraction operations of the circuit, and linear resistors and capacitors are applied to assist in the addition, subtraction, multiplication and differentiation operations.