# Thermomechanical Stresses in Silicon Chips for
## 4 Discussion  
The biaxial stress values of silicon have been calculated from Raman data with the equation \(\left(\sigma_{xx}+\sigma_{yy}\right)=-2.26\times 10^{5}\Delta\omega_{j}/ \omega_{0}\). A Raman frequency greater than the stress-free frequency indicates compressive stress in the sample, while a Raman frequency smaller than the stress-free frequency indicates tensile stress [7; 10; 25]. The stress values of the Si samples evaluated along the diagonal positions at \(-50\), \(20\), and \(180\)\({}^{\circ}\)C, from Raman spectra, are reported in Figure 10. To evaluate the stress values of the assembled samples, the Raman frequency of the unmounted sample is assumed as the reference value: \(\omega_{j}\) is the Raman shift value of the j-peak of the sample, while \(\omega_{0}\) is chosen as the Raman shift of the unmounted sample relative to the same position on the map, in order to relate the measured stress only to the assembly process, that is, to neglect the intrinsic stresses that are inevitable in the samples. Instead, the stress of the unmounted chip is calculated by considering as a reference the internal value obtained from the average Raman shift of the entire position of the sample in the unmounted sample. The negative sign indicates compressive stress. The experimental data show a compressive stress, whose values vary in a range of \(1\) GPa when the assembly is at high temperature (\(180\)\({}^{\circ}\)C) or low temperature (\(-50\)\({}^{\circ}\)C). Figure 10: Stress distribution along the diagonal recorded at \(-50\) (Black points and lines), \(20\) (Red points and lines) and \(180\)\({}^{\circ}\)C (Blue points and lines), on the Si_Unmounted chip (**a**), the A_AuSn_p sample (**b**) and the A_AuSn sample (**c**). Position \(i\) refers to the position [x, x] of Figure 4b. Figure 9: Raman shift distribution along the diagonal recorded at \(-50\) (black points and lines), \(20\) (red points and lines) and \(180\)\({}^{\circ}\)C (blue points and lines), on (**a**) Si_Unmounted chip, (**b**) A_AuSn_p sample and (**c**) A_AuSn sample (**c**). Position \(i\) refers to the position [i,i] of Figure 4b. The figure shows that the magnitude of stress in the sample prepared under pressure is much lower than in the sample prepared without the use of an additional pressure of 5 N. At first sight, the conclusion would be that the effect of the pressure during soldering of the transition AuSn layer could be helpful, because for the assembly without pressure, the Raman signal of the Si peak changes strongly, in comparison to the signal of unmounted Si. Further measurements were carried out to check the interconnections, in particular, those for the cross-section analyses of the assemblies have revealed that the Si chip was not properly soldered to the substrate, i.e., the use of the pressure of 5 N was a disadvantage on these samples. Studies in this direction are still in progress. Similarly, the stress distribution of the different samples was determined from the Raman mapping data. Color maps, in Figure 11, report the stress values of the Si samples, determined on the entire surface of the samples, at 20 \({}^{\circ}\)C. A\({}_{-}\)AuSn is the most stressed sample, with a variation of 775 MPa on the surface. The stress map of the B\({}_{-}\)AuSn sample shows the highest variation on the total area equal to 329 MPa, a value that is lower compared to the corresponding sample assembled without pressure on the copper substrate. Figures 12 and 13 report the stress values of the Si samples, on copper substrates, determined on the entire surface of the samples, at \(-\)50 and 180 \({}^{\circ}\)C, respectively. The maximum stress is observable at low temperature on A\({}_{-}\)AuSn: it reaches a value of \(-\)928 MPa and is highly symmetric. Figure 11: Stress distribution at 20 \({}^{\circ}\)C, on (**a**) Si\({}_{-}\)Unmounted chip, (**b**) A\({}_{-}\)AuSn\({}_{-}\)p, (**c**) A\({}_{-}\)AuS, and (**d**) B\({}_{-}\)AuSn samples.