# Neural-Network-Assisted Polar Code Decoding Schemes
## 4 Numerical Simulation
### Decoding Complexity
#### 4.6.2 Decoding Steps  
Since the subcodes are not of equal length, a specific expression of the time step cannot be given for each specific polar code. Table 5 shows the decoding steps and node structure of LSNNAD, KSNNAD, and the algorithms proposed in Refs. [17; 33] for a polar code with a code length of 128, a code rate of 0.5, and construction SNR 2.5 dB. Among them, NSCD proposed in Ref. [33], LSNNAD and KSNNAD were simulated under the NN code length  
\begin{table}
\begin{tabular}{l l l l l l} \hline \hline
**Arithmetic** & **FSCFD [19]** & **FSCD** & **LSNNAD** & **KSNNAD** & **RTD [39]** & **RTD [39]** \\
**Operation** & 5984 & 6128 & 6264 & 6315 & 3587 & 60,270 \\ Addition & 15,081 (\(T_{max}+1\)) & 864 & 43,152 & 43,056 & 5358 & 69,256 \\ Multiplication & 11,653 (\(T_{max}+1\)) & 1248 & 43,280 & 43,208 & 0 & 0 \\ \hline \hline \end{tabular}
\end{table}
Table 4: Total number of arithmetic operations for different decoding schemes.  
\begin{table}
\begin{tabular}{l l l l l l} \hline \hline
**Decoding Step** & **Arithmetic Operation** &
\begin{tabular}{l} **FSCFD** \\ [19] \\ \end{tabular} & **FSCD** & **LSNNAD** & **KSNNAD** \\ \hline Subcode & Comparison & 5984 & 6128 & 6264 & 6315 \\  & Configuration & \(9N_{S}-7\) & \(2N_{S}\) & \(2N_{S}\) & \(2N_{S}\) \\ R1 & Multiplication & \(N_{S}-1\) & \(4N_{S}\) & \(4N_{S}\) & \(4N_{S}\) \\ \hline Rep & Addition & \(8N_{S}-6\) & \(N_{S}\) & \(N_{S}\) & \(N_{S}\) \\  & Multiplication & \(N_{S}-1\) & \(3N_{S}\) & \(3N_{S}\) & \(3N_{S}\) \\ \hline SPC & Addition & \(11N_{S}-7\) & \(N_{S}\) & \(N_{S}\) & \(N_{S}\) \\  & Multiplication & \(2N_{S}-1\) & 0 & 0 & 0 \\ \hline Type-I & Addition & \(8N_{S}-7\) & 0 & 0 & 0 \\  & Multiplication & \(N_{S}-1\) & 0 & 0 & 0 \\ \hline Type-II & Addition & \(10N_{S}-5\) & 0 & 0 & 0 \\  & Multiplication & \(N_{S}\) & 0 & 0 & 0 \\ \hline Type-III & Addition & \(10N_{S}-3\) & 0 & 0 & 0 \\  & Multiplication & \(N_{S}+1\) & 0 & 0 & 0 \\ \hline Type-IV & Addition & \(10N_{S}-3\) & 0 & 0 & 0 \\  & Multiplication & \(N_{S}+1\) & 0 & 0 & 0 \\ \hline Type-V & Addition & \(41N_{S}-7\) & 0 & 0 & 0 \\  & Multiplication & \(69N_{S}-1\) & 0 & 0 & 0 \\ \hline NNN & Addition & 0 & 0 & \(164K_{S}^{2}\) & \(164K_{S}^{2}\) \\  & Multiplication & 0 & 0 & \(164K_{S}^{2}\) & \(164K_{S}^{2}\) \\ \hline \hline \end{tabular}
\end{table}
Table 3: Number of arithmetic operations for different decoding steps.  
of \(N_{S}=16/N_{S}=8\). Let None (64) denote 64 bits that have not been recognized by any nodes. Note that the 64 bits are not 64 consecutive bits but several continuous strings scattered of bits. Further, 21R1 denotes that there are 21 R1 nodes to be recognized in total, but we do not provide every length of the R1 nodes.  
It can be seen from Table 5 that the decoding steps of Ref. [33] were greatly affected by the length of the NNN. Moreover, they call the NN model multiple times, and each call will give rise to \(164K_{S}^{2}\) multiplications and \(164K_{S}^{2}+13K_{S}\) additions. In contrast, the decoding schemes proposed in this paper are less affected by the length of the NNN because they only call the decoding model once. Compared with the traditional SCD algorithm, they can still effectively reduce the running time step of the decoding algorithm.