## 3 Optical Coupling between the III-V Device Layer and the Silicon Waveguide Layer
### Adiabatic Taper Interface  
Optical coupling between a waveguided III-V opto-electronic component and the underlying silicon waveguide layer is realized through a taper-based spot-size converter structure. In our heterogeneous III-V/Si devices the optical mode is strongly confined to the III-V waveguide (for efficiency) and a strong wave vector mismatch exists between the III-V and silicon photonic wire waveguide layer. By tapering the  
Figure 2: Step-by-step typical process flow for heterogeneously integrated III-V on Si devices.  
III-V and/or silicon waveguide, wave vector matching can occur and the optical mode can be gradually transformed to eventually reside in the silicon waveguide. If the waveguide dimensions vary slowly along the propagation direction, the tapering is adiabatic [6]. This means that no power exchange occurs between the fundamental waveguide mode and the higher order waveguide modes. In many of our recently developed laser devices, a double adiabatic tapered coupler has been successfully implemented [7; 8; 9]. For use in electro-absorption modulator (EAM) devices, a very compact tri-sectional tapered coupler has recently been proposed [10]. Both structures will be briefly discussed below.  
The device geometry of the double adiabatic tapered coupler is shown in Figure 3a [9]. The coupler is piecewise linear and consists of two parts: the first part (Taper I) has a length of 35 \(\upmu\)m and decreases the III-V waveguide width from 3 \(\upmu\)m to 1 \(\upmu\)m. In the second taper part (Taper II) the actual III-V-to-silicon coupling takes place through gradual tapering of both the III-V and silicon waveguide. Taper II has a length of 150 \(\upmu\)m with the III-V waveguide being tapered from 1 \(\upmu\)m to a narrow taper tip (\(<\)500 nm), whereas the silicon waveguide width is tapered from 180 nm to 1 \(\upmu\)m. A 400 nm thick silicon waveguide is used in this coupling scheme, as this simplifies the III-V-to-silicon coupling compared to the case of direct coupling to a 220 nm thick device layer (considered as a standard layer thickness for the realization of high index contrast silicon photonic waveguide structures). The thick silicon waveguide layer also relaxes the requirements on the III-V taper tip width: a width of 500 nm is sufficient to achieve a highly-efficient, low-reflection power transfer from the III-V mesa to the silicon waveguide. This is illustrated in Figure 3b. A second spot-size converter structure is used to eventually couple the light from the 400 nm thick waveguide to the standard 220 nm single mode silicon strip waveguide. Finally, we note that along with the taper tip width and the III-V/silicon spacing, taper misalignment also has a direct impact on the taper coupling efficiency. A longer taper leads to a more tolerant structure, at the expense of a larger device footprint. Typically, the used adiabatic taper structures allow for a 300 nm misalignment between III-V and silicon waveguide layer.  
Figure 3c shows the geometry of tri-sectional tapered coupler for EAM devices [10]. Because the taper mimics a semi-3D taper to prevent the excitation of higher order modes in the thick p-InP cladding layer, the taper length of this device can be substantially reduced down to 10 \(\upmu\)m. The removal of the p-type  
Figure 3: (**a**) Double adiabatic tapered coupler; (**b**) Simulated power transmission and reflection at the taper tip as a function of III-V taper tip width; (**c**) Tri-sectional tapered coupler. Reproduced from [9] and [10].  
indium phosphide (p-InP) layer in part of the taper structure prevents the electrical driving of part of the taper structure, limiting the types of devices for which this approach can be used.