## 5 Results
The setup used the same conditions as those in the LET-TDMA experimentation: two processing cores implementing an event chain of producer and consumer tasks. The dataset to be transferred was defined to represent a simple ramp with a slope of 1. The task cycle times were set to 10 ms. Table 7 shows the RMSE values calculated using Equation (6). This case depicts how variable the LET case behaves due to the task activation latency introduced by the AUTOSAR OS on the M4 core compared to the execution of the ISR-based task on the M0+ core, which was measured to increase by 62.5 ns on each task activation. In contrast, the LET-TDMA solution maintains the time between read and write operations at an average of 1.00143 ms, exhibiting very low variability with a maximum time of 1.002 ms and a minimum delay of 1.001 ms.  
Figure 12: Variable data read/write operation times for different buffer sizes. The plots illustrate the offset times calculated for tasks at buffer sizes of 8 bits (**a**), 16 bits (**b**), and 32 bits (**c**). Each plot shows the read and write times for the tasks, highlighting the differences in data transfer times across varying buffer sizes. Figure 13 shows the plotted time differences between the producer write operations and the consumer read operations using the proposed LET-TDMA solution. From this information, it can be deduced that the RMSE calculation is consistent with the actual measured time differences between the write and read operations. \begin{table}
\begin{tabular}{l l l l l l l l} \hline
**Author** & **Method** & **Cores** & **Tasks** & **L2L (ms)** & **L2F (ms)** & **F2F (ms)** & **Chain Size** \\ \hline [PERSON] et al. [20] & TDMA-DMA with SPM & 3 & 5–20 & - & 400 & - & - \\ \hline  & Explicit Communication & 2 & 4 & - & 12.746 & 22.746 & 4, 3 labels \\ [PERSON] et al. [33] & Implicit Communication & 2 & 3 & - & - & - & 3, 2 labels \\  & LET Communication & 2 & 5 & 154.234 & - & - & 14 labels \\ \hline  & Explicit Communication & 4 & 3 & - & - & 8.6 & 10,000 labels \\ [PERSON] et al. [6] & Implicit Communication & 4 & 3 & - & - & 36.9 & 10,000 labels \\  & LET & 4 & 3 & - & - & 111.97 & 10,000 labels \\ \hline  & Explicit Communication (C1) & 4 & 3 & 123.718 & - & 125.710 & 3, 2 labels \\  & Implicit Communication (C1) & 4 & 3 & 154.988 & - & 151.855 & 3, 2 labels \\ [PERSON] et al. [7] & LET (C1) & 4 & 3 & 210 & - & 212 & 3, 2 labels \\  & Explicit Communication (C2) & 4 & 3 & 2.844 & - & 64.894 & 3, 2 labels \\  & Implicit Communication (C2) & 4 & 3 & 6.54 & - & 66.33 & 3, 2 labels \\  & LET (C2) & 4 & 3 & 53.597 & - & 103.597 & 3, 2 labels \\ \hline  & LET & 4 & 2–5 & 4040 & 5000 & 420.43 & \\ Maia and Fohler [34] & WCR-LET & 4 & 2–5 & - & 4000 & - & 38 labels \\  & Maia–Fohler & 4 & 2–5 & 3237 & 4197 & - & \\ \hline  & fLETEnum & 4 & 21 & 2725 & 3685 & - & \\ [PERSON] et al. [35] & fLETSBacktracking & 4 & 1 & 2725 & 3685 & - & 31 to 63 labels \\  & fLETSymbOpt & 4 & 1 & 2725 & 3685 & - & \\ \hline  & DI9 & 2–5 & 21 & 3250 & 4750 & - & \\ [PERSON] et al. [36] & K18 & 2–5 & 21 & 2650 & 2700 & - & 30 to 60 labels \\  & B17 & 2–5 & 21 & 2650 & - & - & \\  & Günzel & 2–5 & 21 & 1750 & 3250 & - & \\ \hline  & LET & 2 & 2 & [20\(\sim\)40] & [10\(\sim\)40] & [10\(\sim\)50] & 2, 1 labels \\ Ours & LET and TDMA & 2 & 2 & 10 & 10 & 20 & 2, 1 labels \\  & (8, 16 and 32 bits) & & & & & & \\ \hline \end{tabular}
\end{table} 
Table 6: Comparative results of various communication methods in multicore systems. The table compares the number of cores, tasks, and different latency measurements (L2L, L2F, and F2F) across multiple studies, including ours. Chain sizes and labels are also indicated. Our results demonstrate the performance of the LET and LET-TDMA methods for 8-, 16-, and 32-bit data transfers.