# An Optical Interference Suppression Scheme for TCSPC Flash LiDAR Imagers
## 6 Experimental Results  
The experimental setup is based on a custom-designed field-programmable gate array (FPGA) board (Figure 5) equipped with a custom SPAD sensor with on-chip TDCs (center) and four independent pulsed VCSEL array illuminators, two of which (lower left and lower right) were used in this work. A conventional webcam has been added to the setup to simplify the optical alignment. Table 1 summarizes the key specifications of the system, and Figure 6 shows an overview of the high-level architecture of the detector chip. Figure 4: High-level block diagram of a generic linear feedback shift register of length \(L\). At each clock cycle, the most significant bit (MSB) of the register is set to a linear combination of the outputs of all the \(L\) register stages. The coefficients \([c_{1},c_{2},\ldots,c_{L}]\in[0,1]\) determine which bits are connected to the feedback summing nodes and which ones are not. For a given register length \(L\), the feedback coefficients determine all the properties of the structure, including the length of the pattern being generated by the register. Figure 5: Picture of the experimental setup. The field-programmable gate array (FPGA) board depicted here hosts a custom single-photon avalanche diode (SPAD) sensor integrated circuit (IC) with integrated time-to-digital converters (TDCs) that was used as the sensor front-end of the victim. Timestamps are transferred to the controlling PC (not shown) without further additional processing. The board is equipped with four identical independent pulsed laser illuminators based on vertical-cavity surface-emitting laser (VCSEL) arrays installed around the detector optics. The two illuminators on the bottom were used for the experiments, one being the illuminator of the victim and the other acting as the aggressor. Both illuminators were controlled by custom firmware running on the FPGA. A conventional USB webcam was also part of the setup and was used to align the setup to the wall we used as the target. The victim and the aggressor were installed in front of the same target (a white wall) and operated indoors. When active, the aggressor was assigned a fixed time offset \(t_{a}=75\) ns to emulate a relative distance to the victim. The aggressor was configured to operate at the effective PRF of the victim to actively try to inject an artifact into the victim's histogram. All measurements were taken from a single pixel and a single TDC of the sensor. For each experiment, 300 identical acquisitions were recorded to capture statistical fluctuations in the data. Unless otherwise noted, all acquisitions were repeated for three values of integration time \(T_{\text{int}}\in[10\text{ ms},30\text{ ms},100\text{ ms}]\). \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Parameter** & **Conditions** & **Value** & **Units** \\ \hline Technology node & CMOS image sensor (CIS) & 180 & nm \\ Pixel pitch & & 30 & μm \\ Pixel array size & & 60x1 & \\ TDC LSB & & 50 & ps \\ TDC range & & 408 & ns \\ Victim/aggressor laser wavelength & & 850 & nm \\ Victim/aggressor laser bandwidth & & \textless{}5 & nm \\ Victim/aggressor pulse duration & full-width half-maximum (FWHM) & 2.1 & ns \\ Nominal pulse repetition frequency (PRF) & & 1 & MHz \\ System clock & & 80 & MHz \\ Laser power & continuous wave (CW) & 8 & W \\ Laser divergence & & 18 & deg \\ Target distance & & 4.0 & m \\ Target reflectivity & Estimated & 0.8 & \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Summary of the specifications of the system. Figure 6: High-level block diagram of the detector chip. A single active column of 60 pixels shares one output line carrying the photon time of arrival information to a TDC bank underneath. An address decoding and collision detection block allows the TDC bank to identify the pixel that fired last and to determine if two or more pixels tried to access the photon_hit bus at the same time. The TDC uses a 625 MHz frequency generated by an integrated voltage-controlled oscillator (VCO) as a time base.