# NBTI and Power Reduction Using an Input Vector Control and Supply Voltage Assignment Method
## 4 Experiment and Discussion
### Result and Discusion
The results are shown in Table 5.  
\begin{table}
\begin{tabular}{c c c c c c c} \hline \hline \multirow{2}{*}{**Circuit**} & \multicolumn{3}{c}{\(\Delta D\) **(ps)**} & \multicolumn{3}{c}{\(P_{\text{leak}}\) **(\#W)**} \\ \cline{2-7}  & **IVC \#1** & **IVC \#2** & **IVC \#3** & **IVC \#1** & **IVC \#2** & **IVC \#3** \\ \hline c432 & 10.68 & 11.85 & 10.8 & 6.24 & 5.69 & 5.90 \\ c880 & 9.38 & 10.37 & 9.6 & 14.56 & 11.71 & 12.12 \\ c1908 & 12.33 & 13.11 & 12.45 & 17.65 & 15.72 & 15.95 \\ c2670 & 8.48 & 8.81 & 8.48 & 27.2 & 22.95 & 23.28 \\ c3540 & 14.45 & 15.93 & 14 In Table 5, the \(P_{\text{leak}}\) of SVA combined with IVC #1, IVC #2, and IVC #3 is shown in column two, four, and six, respectively. The \(P_{\text{dyn}}\) of SVA combined with these three IVC methods is shown in column three, five, and seven, respectively. Table 5 illustrates that, first, the \(P_{\text{dyn}}\) of the SVA + IVC #1 method is the lowest because its aging rate is less severe than that for the SVA + IVC #2 and SVA + IVC #3 methods, and the \(V_{dd}\) increase is the slowest. However, for most circuits, the \(P_{\text{leak}}\) of SVA is the highest when the input vector found by IVC #1 is used. This is because the \(P_{\text{leak}}\) that corresponds to the input vector obtained by IVC #1 is far higher than that corresponding to the other two ILP formulations when the circuit is in the initial state. Although the leakage power increase is the slowest for SVA + IVC #1, its total leakage power is still the highest at the end of the lifetime. Second, the \(P_{\text{dyn}}\) of SVA + IVC #2 is the highest because its corresponding input vector will bring in the most severe NBTI-induced aging, and in turn the frequency of \(V_{dd}\) adjustment is the highest. Third, our proposed co-optimization ILP formulation has considered both NBTI and leakage, and it can find the input vectors that help SVA save 13.82% and 2.49% more leakage power on average than IVC #1 and IVC #2, respectively. In addition, because the NBTI-induced delay degradation that corresponds to our proposed ILP formulation is near optimal, its corresponding \(P_{\text{dyn}}\) is close to the \(P_{\text{dyn}}\) of SVA + IVC #1 and is lower than the \(P_{\text{dyn}}\) when the input vector found by IVC #2 is used. Fourth, different from dynamic power, the analysis for the \(P_{\text{leak}}\) of the SVA method is a complex process when using different input vectors. For instance, in the c432 circuit, the input vector obtained by IVC #2 can help SVA save more leakage power than the input vector found by IVC #1. In contrast, the situation is the opposite for c7552 circuit. Figure 7 illustrates the change of the leakage power for the c432 and c7552 circuits at each 2-year time interval during the lifetime. \begin{table}
\begin{tabular}{c c c c c c c} \hline \hline \multirow{2}{*}{**Circuit**} & \multicolumn{2}{c}{**SVA + IVC \#1 (\#W)**} & \multicolumn{2}{c}{**SVA + IVC \#2 (\#W)**} & \multicolumn{2}{c}{**SVA + IVC \#3 (\#W)**} \\ \cline{2-7}  & \(P_{\text{leak}}\) & \(P_{\text{dyn}}\) & \(P_{\text{leak}}\) & \(P_{\text{dyn}}\) & \(P_{\text{leak}}\) & \(P_{\text{dyn}}\) \\ \hline c432 & 9.24 & 17.86 & 8.06 & 18.28 & 7.95 & 17.90 \\ c880 & 19.73 & 41.28 & 16.91 & 42.26 & 16.67 & 41.51 \\ c1908 & 23.80 & 49.39 & 21.82 & 50.03 & 21.61 & 49.51 \\ c2670 & 36.10 & 77.78 & 31.34 & 78.63 & 30.98 & 77.78 \\ c3540 & 51.99 & 101.21 & 50.39 & 103.4 & 49.39 & 101.23 \\ c5315 & 86.02 & 195.08 & 77.18 & 198.46 & 75.08 & 195.59 \\ c7552 & 108.11 & 278.26 & 110.46 & 294.95 & 100.16 & 278.71 \\ s5378 & 63.53 & 117.32 & 56.18 & 118.94 & 55.46 & 117.43 \\ s9234 & 89.62 & 152.26 & 79.78 & 154.48 & 78.22 & 153.20 \\ s13,207 & 138.88 & 204.41 & 117.46 & 207.18 & 115.67 & 204.49 \\ Avg. & 13.82\% & \(-\)0.22\% & 2.49\% & 1.89\% & & \\ \hline \hline \end{tabular}
\end{table} 
Table 5: Leakage and dynamic power of SVA combined with different ILP formulations (\(R_{AS}=0.1\)). Figure 7: Leakage power dissipation of SVA with different input vectors for c432 and c7552 circuits.