## 2 Methodology
### Short-Term Voltage Stability Assessment along with Fault-Induced Delayed Voltage Recovery  
A large number of data samples are generated by running the comprehensive TDS for a broad range of loading situations, fault locations, and different load dynamics to reflect the practical operating conditions of the power system. The post-fault voltage trajectories samples are obtained for different operating scenarios, and the corresponding labeled samples for each STVS category are evaluated. The database structure is shown in the Table 1. Here, \(N\) denotes the number of samples, \(N_{b}\) represents the number of buses in a power system, \(V_{t1}\) represents the post-fault voltage magnitude at fault clearing time \(t_{c}\), and \(V_{t}\) denotes the post-fault voltage magnitude at the end of the simulation period \(T\). In this study, the simulation time of 5 s is taken for the analysis of STVS assessment. In a database, the input are the post-fault voltage trajectories of each bus over the OTW and the output are the STVS state (stable, unstable, and stable-with FIDVR phenomenon). The FIDVR phenomenon occurs when system voltages remain abnormally low for several seconds after a fault is cleared. The primary cause of these incidents is due to the installation of induction motor loads, which causes a high reactive power demand in the post-fault phase [31]. The FIDVR phenomena is assessed in this study by calculating the transient voltage severity index (TVSI) as [32]:  
\[\text{TVSI}=\frac{\sum_{k=1}^{N_{b}}\sum_{t=t_{cr}}^{T_{o}}\text{TVDI}_{k,t}}{ N_{b}\times(T_{o}-t_{cr})} \tag{1}\]  
where \(N_{b}\) is the number of buses in the test system, \(T_{o}\) is the voltage recovery time frame, and \(t_{cr}\) is the fault clearing time. The transient voltage deviation index (TVDI) is calculated as follows [32]:  
\[\text{TVDI}_{k,t}=\begin{cases}\frac{|V_{k,t}-V_{k,0}|}{V_{k,0}},&\frac{|V_{k, t}-V_{k,0}|}{V_{k,0}}\geq a\forall t\in[t_{cr},T_{o}]\\ 0,&\text{otherwise}\end{cases} \tag{2}\]  
where \(V_{k,t}\) at time \(t\) and \(V_{k,0}\) are the post-fault and the pre-fault voltage magnitude of bus \(k\), respectively. The threshold of permissible voltage deviation magnitude is \(\alpha=90\%\)[32], which is frequently employed in industrial criteria. Here, TVSI is used to evaluate the overall system's voltage stability; a lower value indicates that the system is less susceptible to the FIDVR phenomena. Figure 4 shows a thorough illustration of the STVS phenomena and the labeling process for each sample. If all of the bus voltage trajectories are maintained at or above the pre-fault voltage for a settling time more than 3 s during the full simulation time, the samples are designated as stable [18; 33; 34]. On the other hand, samples are classified as unstable if the bus voltage trajectories fall below the pre-fault voltage magnitude. For example, if all the bus voltage trajectories of the power system are maintained above 0.9 p.u. at the settling time and over the simulation period, then the power system is in the STVS stable state. If all the bus voltage trajectories fall below 0.9 p.u. or a sustained low voltage without recovery over the simulation interval has occurred, then the power system is in the STVS unstable state. Furthermore, the STVS stable samples are classified into two labels, i.e, stable and stable-with FIDVR phenomenon. The system prone to FIDVR phenomenon is evaluated based on the TVSI. If the TVSI value is greater than 4 [32], it means that the power system is in the state of FIDVR phenomenon subjected to the disturbance. Then, the stable samples are labeled as stable-with FIDVR phenomenon. Similarly, all the samples at different operating scenarios are classified as unstable, stable, and stable-with