# SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance
## 1 Introduction  
The lithography process refers to an exposure technique in which light is exposed on a circuit diagram-drawn mask pattern plate, following which a circuit pattern is reduced and drawn on a wafer with a photoresistor. As the lithography process develops, a smaller chip can be implemented, which is a key process in semiconductor design. The core equipment of the process is a scanner, a device that exposes light to the wafer. The better the scanner, the less scattering, diffusion, and diffraction of light when using light of a smaller wavelength, enabling sophisticated circuits to be drawn. As semiconductor manufacture processes increasingly require precise and complex nano-patterns, E-beam lithography technology is being mainly used. Electron beam wavelengths are much smaller than light. Currently, the industry utilizes a scanner using a light source of 193 nm ArF (argon fluoride) wavelength and an EUV (extreme ultra-violet) light source with a wavelength of 13.5 nm. However, as EUV devices are very expensive and stability issues are often discussed, technologies such as immersion, double patterning (DPT), and computational lithography, that can expose highly integrated circuits using a light source of 193 nm ArF wavelength, have been developed [1, 2]. Of these, the technology of computation lithography is actively utilized, but its limitation is that the data volume to be calculated for exposure is very large, which leadsto an increase in the TAT (turnaround time) of the mask process [3]. Turnaround time is the total amount of time between the process coming into a ready state for the first time and its completion. To improve this, related research fields are trying to solve the delay problems in various forms, such as scaling up, which invests large computing resources into computation lithography, distributing the processing system scale-out. However, because commercial EDA tools (E-beam) set a license price per computing core, parallel computing leads to an enormous increase in hardware and software cost. As a result, a management and operation methodology that reduces TAT using minimal computing resources is becoming especially important in the field [4; 5]. In this study, we utilized a default DEVS model; its modeling E-beam cluster operational form in the field is shown in Figure 1. We propose a new simulation-based DEVS load balancing method based on the studied model, which applies characteristics of the E-beam cluster. Load balancing is a computer server clustering service that solves bottlenecks by appropriately distributing processing across multiple servers. When an excessive workload is input, a load balancer should predict the optimal job distribution and then load the calculated jobs onto a distributed processing server. The effect of optimized load balancing makes it possible to expand the server without expensive new equipment. Therefore, if a failure occurs in the operating server, packets are automatically distributed to the prepared operating server using a predefined algorithm without service interruption to provide a normal service. When a bottleneck occurs, the load balancer automatically detects this, and distributes the workload without service interruption [6; 7]. DEVS (discrete event system specification) is a methodology that describes the dynamic change of a system by changing the state according to the occurrence of an event [8]. In the early manufacturing field, a hardware-in-the-simulation technology was proposed to create a simulation model for a manufacturing system using DEVS methodology and link it with the control system [9]. The DEVS methodology has been gradually extended to various simulation fields. It has been influential in a wide range of fields related to simulation [10]. DEVS can be used to perform a double verification with the existing simulator, or to add functions not included in original solution; this approach is termed HDEVS [11]. This methodology can also be applied to very large-scale problems, and not only at a small research level [12].