## 3 Results and Discussion
Here, the corresponding transfer characteristic curve surfaces. The specific comparison of these multiple operating modes is shown in Figure 3. In each mode, the transfer characteristic curve (Id-Vgs) is shown under the same coordinates to allow an obvious and intuitive mutual comparison. Under this comparison, the unique curves under each working state  
Figure 6: Output characteristic curves: TCAD simulation of the device used in this study and the traditional device model. can also be obtained comprehensively, which can be used as a relevant reference for the appropriate matching of the working environment in practice and as a reference manual. As seen in Figure 7, in the case of MODEL5 (where all gates are open), which is equivalent to the traditional FinFET, the ON current Id is maximal. The minimum current appears in MODEL2. Owing to the quantum constraint effect, the peak current occurs near the fin center. Therefore, all gates in the FinFET significantly influence the current and the three gates are strongly coupled. Therefore, MODEL5 has a significant coupling effect and a large current is obtained. When gate2 is closed (MODEL4), the coupling between the top and side gates will be interrupted. In addition to reducing the control ability of the gate, the additional electric field from the top gate also has a significant impact on the reverse charge layer formed by the side gate [5]. Therefore, MODEL4 has a lower current than MODEL5. In addition, in MODEL3, the coupling between gate2 and gate1 or gate3 is eliminated; thus, the current in MODEL3 is less than that in MODEL5. Comparing the current in MODEL4 with that in MODEL3, as seen in the structure, because the fin height is much larger than the fin width in our proposed FinFET, the side gate (gate1 or gate3) can induce more reverse-charged layers than the top gate (gate2); thus, the current in MODEL3 will be smaller than that in MODEL4. Similarly, this also explains why the current in MODEL2 is much smaller than that in MODEL1. Compared with MODEL3, because the top gate (gate2) is closed in MODEL1, the gate control ability is reduced, resulting in a lower current in MODEL1 [1]. The semiconductor industry has been studying the famous \"Moore's law\" for more than half a century [8]. By constructing such a novel structure, the five working states of MODEL1, MODEL2, MODEL3, MODEL4, and MODEL5 enable the adoption of this valuable device in different fields. Some key electrical parameters also vary in different operation modes; that is, these parameters can be flexibly controlled in different states, reflecting the adaptive performance of the device under multi-mode operation. These are listed in Table 1 together with the specific data. For example, the characteristic parameters such as the threshold voltage (Vth), saturation current (Isat), off-state leakage current (Ioff), subthreshold swing (SS), and drain-induced barrier reduction (DIBL) achieved using our proposed methods are listed and compared with the existing traditional devices. When all gates are open, the proposed FinFET will be equivalent to the traditional single-fin FinFET; thus, the characteristics of  
Figure 7: Transfer characteristic curves for five independently controlled SOI FinFET devices under different modes of operation. MODEL5 in the FinFET are similar to the traditional FinFET. However, compared with the traditional FinFET, our proposed FinFET shows significant Vth controllability, which can provide five Vth levels according to different modes of operation, can improve the flexibility of the circuit design, and can provide methods to adapt to different working conditions. For example, MODEL1 and MODEL2 can be adopted in low-power applications, whereas MODEL4 and MODEL5 can function in high-speed applications. Moreover, compared with the previously proposed FinFET, when the device is used as an access transistor in the memory, the delay and noise are reduced.