# Stability Analysis of Buck Converter Based on Passivity-Based Stability Criterion
## 3 Model and Passivity Analysis of the Buck-CPL Subsystem  
In the DC microgrid, the loads are usually connected to the DC bus through closed-loop controlled load converters, and they present constant power load characteristics from the input terminal, which are regarded as constant power loads (CPLs), as shown in Figure 1 circled by the red dashed line. Take the Buck-CPL subsystem as an example. In this paper, the classical drop control in the DC microgrid is used to adjust the stability of the Buck-CPL subsystem. The traditional control method of the Buck converter refers to drop control, and its control block diagram is shown in Figure 2, where \(L\) and \(r\) represent the inductor and parasitic resistance, respectively, vs. is the input voltage, \(v_{\rm dc}\) is the DC bus voltage and \(i_{\rm o}\) is the output current. \(v_{\rm dc}^{*}\) is the reference value of the DC bus voltage, \(i_{\rm o}^{*}\) is the reference value of output current, \(V_{\rm bus}\) is the rated value of the DC bus voltage and \(d\) represents the duty cycle. It should be noted that the ideal switch models do not take into account losses in the converter components, and thus it is not possible to determine the switching loss. The detailed device models, such as the model of the diode-IGBT, can be used for the analysis of switching losses [31; 32]. In order to determine the characteristics of the Buck converter, the averaged model is used to obtain the result in the shortest time. The small-signal equivalent model of the Buck converter is shown in Figure 3. In the figure, \(D\) is the steady-state value of the duty cycle, \(\Delta d\) represents the small disturbance signal of the duty cycle and vs. and \(I_{\rm L}\) represent the steady-state values of the input voltage and inductance current, respectively. Figure 1: Topology of the cascade system in the DC microgrid. The small-signal equivalent model in Figure 3 is obtained by the KVL Equation  
\[v_{\rm dc}=Dv_{\rm s}+V_{\rm s}\Delta d-(Ls+r)i_{\rm o} \tag{4}\]  
The closed-loop control small-signal block diagram for traditional control obtained from Figure 2 and Equation (4) is shown in Figure 4.  
The Buck admittance model is obtained from Figure 4.  
\[Y_{1}=-\frac{i_{\rm o}}{v_{\rm dc}}=\frac{a_{2}s^{2}+a_{1}s^{1}+a_{0}}{b_{3}s^{ 3}+b_{2}s^{2}+b_{1}s^{1}+b_{0}} \tag{5}\]  
where  
\[\left\{ \begin{array}{l}a_{2}=1+V_{\rm s}k_{\rm p1}k_{\rm p2}\\ a_{1}=V_{\rm s}k_{\rm p1}k_{\rm 2}+V_{\rm s}k_{\rm p2}k_{\rm i1}\\ a_{0}=V_{\rm s}k_{\rm i1}k_{\rm 2}\\ b_{3}=L\\ b_{2}=R_{\rm d}V_{\rm s}k_{\rm p1}k_{\rm p2}+V_{\rm s}k_{\rm p2}+r\\ b_{1}=R_{\rm d}V_{\rm s}k_{\rm p1}k_{\rm 2}+R_{\rm d}V_{\rm s}k_{\rm p2}k_{\rm i1}+V_{ \rm s}k_{\rm i2}\\ b_{0}=R_{\rm d}V_{\rm s}k_{\rm i1}k_{\rm 2}\end{array} \right.\]  
Figure 4: Closed-loop small-signal model for traditional control. Figure 3: Small-signal model for traditional control. Figure 2: Traditional control diagram of the Buck converter. where \(R_{\rm d}\) represents the drop coefficient, \(k_{\rm p1}\) and \(k_{\rm i1}\) are the proportional and integral coefficients of the PI1 controller, respectively, and \(k_{\rm p2}\) and \(k_{\rm i2}\) are the proportional and integral coefficients of the PI2 controller, respectively. When \(s\) in Equation (5) approaches 0 or infinity, respectively, the admittance \(Y_{1}\) of the Buck converter at low frequency and high frequency is  
\[\left\{ \begin{array}{l}\lim_{s\to 0}Y_{1}=1/R_{\rm d}\\ \lim_{s\to 0}Y_{1}=0\end{array} \right. \tag{6}\]  
First, we set the steady-state value of DC bus voltage to \(V_{\rm dc}\). Then, the admittance of ideal CPL is \(-P_{\rm CPL}/V_{\rm dc}^{2}\). The overall admittance of the subsystem composed of the Buck converter and CPL is \(Y_{s}=Y_{1}-P/V_{\rm dc}^{2}\).