# A Low-Power ECG Processor ASIC Based on an Artificial Neural Network for Arrhythmia Detection
## 4 Hardware Implementation  
To verify the hardware functionality, a behavior-level simulation of this design is conducted using real-world human ECG signals. The ECG signal is acquired from a palm single-lead [19] and digitized by AD7606 (ADI, Norwood, MA, USA), with a signed 16-bit binary format at 360 samples per second (S/s). In the testbench, the digitized raw ECG data are input to the ASIC using the SPI protocol at the same sampling rate. The partial  
Figure 11: Format of the transmitted data frame. Figure 10: The state graph of FSM. simulation waveform is shown in Figure 12, where adc_data and ecg_data represent the raw data and filtered data, respectively. Each R-peak is successfully detected, and after detecting three R-peaks, the RRI and classification results for each heartbeat are obtained. The RRI in the figure are 0 fb, 0f9, and 0 ee (hexadecimal), respectively. According to (1), the corresponding HR can be calculated as 86, 87, and 91 bpm, respectively. The ECG signal used for the test is acquired from a healthy individual, and the waveform diagram shows a classification result of 1, indicating NOR, which means the prediction performed by the ASIC is correct. After each classification, the uart_en signal generates high-level pulses that enable the UART module to transmit the data frame containing the results. The proposed ANN-based ECG processor ASIC is implemented using 55 nm Low-K CMOS technology (UMC, Hsinchu, Taiwan, China). The post placement and routing are completed using the Innovus Implementation System (Cadence, San Jose, CA, USA); Figure 13 shows the layout photograph. The core size is 0.308 mm \(\times\) 0.308 mm, and the entire chip size is 0.578 mm \(\times\) 0.578 mm. The power consumption after the layout is estimated using the Power Analysis tab, and the activity file is generated by a testbench that simulates inputting ECG data to the ASIC at a 360 Hz sampling rate. This design consumes 12.88 uW at a 100 kHz clock frequency and a power supply of 1.2 V, the details of the power analysis are shown in Figure 14. The energy efficiency (Energy Eff.) can be evaluated by the energy consumption of each classification, which is calculated as follows:  
\[\text{Energy Eff. = Power }\times\text{Time/Classifi.} \tag{11}\]  
Figure 12: The behavior-level simulation waveform. Figure 13: The layout photograph of the proposed ECG processor. The time taken for each classification is 18.2 ms, which fully meets the requirements for the inference time. Therefore, the energy consumed for one inference is 234.4 nJ. Table 3 presents a comparison of our proposed ECG processor with other works. It can be seen that our design achieves low power and a low hardware overhead while also having a good classification performance. The accuracy of our design is lower than that of [7,11]. It should be noted that the use of complex neural network models in [7] leads to more memory overhead and computing time, which further increases the classification energy consumption. Reference [11] is capable of processing various bio-signals and features a reconfigurable neural network engine. However, the large-scale MAC unit array and the high SRAM usage of up to 73 kB result in excessive hardware costs, and each classification consumes nearly 10 times the energy compared to our design. The classification engine in [4] can only perform two-class classification and requires a complex feature extraction engine, which occupies a considerable chip area and power. In [10], the inference engine also classifies abnormal beats into two classes. To support multi-dimensional inputs, 10 processing elements (PEs) and a large-capacity matrix memory are employed. However, its power consumption is unacceptable for wearable ECG monitoring. Reference [8] has the lowest power in this table and also has five types of classification. However, its prediction accuracy is relatively low, and the classifier based on 4-layer ANN consumes more energy in the inference.