# A Fully Integrated Low-Power Multi-Mode RF Receiver for BDS-3/GPS
## 5 Measurement Results  
This receiver is fabricated in a standard 55 nm CMOS technology; to shorten the research time and test more pins to facilitate the test, the chip is first directly bonded onto an evaluation PCB, and then housed into a quad flat no-lead (QFN) package. The chip-on-board physical layout, spanning an active area of 852 \(\upmu\)m \(\times\) 405 \(\upmu\)m, is shown in Figure 12. Low-cost copper wires are used for bonding. In this design, the effect of package parasitism on the chip performance has been considered, so there is no significant difference in the performances of the two packages. The hardware platform is shown in Figure 13, where the test board is in the red rectangle. The used equipment is presented in Table 2. The current is 4.8 mA from a 1.2-V supply, and the current consumption of sub-circuits is presented in Table 3. There are pre-amplifiers, a comparator, latches, and coding circuits in ADC, and the currents are 0.75, 0.055, 0.074, and 0.021 mA, respectively. The receiver realizes a good input matching with \(S_{11}\) around \(-\)13 dB at 1575.42 MHz, as shown in Figure 14.  
Figure 11: Timing diagram when (a) enabling AGC and DCOC, (b) enabling AGC and disabling DCOC. Figure 12: Chip-on-board bonding physical map with an active area of 852 \(\upmu\)m \(\times\) 405 \(\upmu\)m.  
As shown in Figure 15, when the input power is from \(-116\) dBm to \(-55\) dBm, the IF single-ended output power is about \(-8.5\) dBm, indicating that the Gr is 61 dB. When the input power is \(-118\) dBm, the receiver achieves a maximum gain of 113.2 dB. In addition, when the input powers are \(-55\) and \(-52.1\) dBm, the single-end output powers are \(-8.74\) and \(-6.842\) dBm, respectively, and the cascaded gains of 52.26 and 51.258 dB are obtained. So the measured \(IP_{\rm 4 dB}\) is about \(-52.1\) dBm. \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Name** & **Type** & **Name** & **Type** \\ \hline Galvanometer & N6705C & Vector signal source & SMBV100B \\ \hline Navigation signal source & GNSS8110 & Frequency spectrometer & N9020B \\ \hline Vector network analyzer & ZND & Frequency meter & 53220A \\ \hline Oscilloscope & DSOX6004A & \\ \hline \hline \end{tabular}
\end{table} 
Table 2: List of the used equipment. Figure 14: Measured input matching. Figure 13: Hardware platform with the test board. \begin{table}
\begin{tabular}{c c c c c c c} \hline \hline
**Sub-Circuit** & **LNA** & **ACTBA** & **GMT** & **CBPF** & **PGA** & **ADC** \\ \hline Current (mA) & 1.2 & 0.5 & 0.6 & 0.9 & 0.7 & 0.9 \\ \hline \hline \end{tabular}
\end{table} 
Table 3: Measured current consumption of sub-circuits with 1.2-V supply. The measured noise figure is described in Figure 16, showing that NF is 1.74 dB at 4 MHz, which is much better than the requirement presented in [10]. When the interference is not weak, as mentioned above, a SAW filter, such as Murata's SAFFB1G57 KE0F0A, is needed after the antenna. It uses physical methods to realize the filtering function and does not consume the current. In order to prevent the SAW filter from worsening the NF, an external monolithic LNA, Silicon Wave's SW7121D, will be added in front of the SAW, whose NF is 0.9 dB with a gain of 16 dB and a current of 1.2 mA. Therefore, the NF of the monolithic LNA and SAW almost does not worsen the NF of the whole system. In addition, the whole NF will not be higher than 0.95 dB. The performance of the RC calibration is measured at the PGA's output, as shown in Figure 17. It can be seen that the center frequency and bandwidth can be well calibrated in the case of a 2 MHz or 4 MHz bandwidth. Figure 18 shows the signal and image response in the I channel of the 2 MHz and 4 MHz bandwidths. The IMRRs are 38 dB and 32 dB, respectively. The navigation signal source GNS8110 is used to generate the navigation signal as the input of this chip, and its performance is tested under normal reception.