# Hardware-Accelerated Data Readout Platform Using Heterogeneous Computing for DNA Data Storage
## 6 Experimental Results and Analysis
### Acceleration Performance Comparison with Software Method  
To verify the acceleration performance of the heterogeneous computing acceleration kernels, a comparison of the runtime was conducted against a CPU-only software implementation using a series of sequencing datasets. The kernel operated at a clock frequency of 180 MHz, with its execution time measured on the host side by capturing the wall-clock time immediately before and after execution. The software implementation was executed on the host server CPU under the same test conditions.  
The test dataset consisted of sequencing reads generated from 12 oligo pools, each containing 415,800 DNA sequences, resulting in a total of 4,989,600 reference sequences. Recovery tests were performed under three error rates (0.6%, 1%, and 1.5%) and three coverages (10\(\times\), 20\(\times\), and 25\(\times\)). These combinations of error rate and coverage had been previously verified to support successful recovery and were used here to compare execution speed.  
As shown in Table 1, the accelerated system consistently achieved a speedup of two orders of magnitude over the software baseline across all test conditions, with even higher  
Figure 14: A comparison of the error-free recovery ratios between hardware and software implementations under varying sequencing coverages. (**a**) The results under an error model with a total base error rate of \(P_{\text{sum}}=0.01\) (\(P_{i}=P_{d}=P_{s}\)). (**b**) The results under the Illumina sequencing error profile reported by [PERSON] et al. [10] (\(P_{i}=0.0004\), \(P_{d}=0.002\), \(P_{s}=0.004\)).  
Figure 13: Comparison of recovery success rates between hardware and software implementations under varying base error rates.  
gains under high error rates. A peak speedup of up to 373.1 times was achieved under a high error rate (1.5%) and low sequencing coverage (15\(\times\)).  
When the error rate was kept constant, increasing sequencing coverage reduced the runtime of the CPU implementation but increased that of the FPGA. This divergence resulted from different system bottlenecks: the CPU runtime was dominated by LDPC decoding iterations, while FPGA performance was constrained by external memory write latency during index checking. Under fixed sequencing coverage, the FPGA kernel execution time decreased slightly as the base error rate increased. This was mainly because higher error rates led to more sequences being discarded during primer sequence identification and index checking, thereby reducing external memory access overhead. In contrast, the CPU execution time increased significantly with rising error rates, primarily due to higher codeword error rates, which resulted in more LDPC decoding iterations.  
It is also important to compare the current implementation with previous works. DNA Assim [28] serves as a representative work in the field of hardware acceleration for DNA data storage. Therefore, we compare the work in this paper with DNA Assim in Table 2. Unlike previous studies, our heterogeneous acceleration platform targets the complete DNA readout pipeline. Due to the use of different algorithms and datasets, the number of sequencing reads processed per second is used as a metric to evaluate the processing speed of each solution. This comparison demonstrates that our method can process over 6 million reads per second, significantly outperforming DNA Assim.