# An Electronically Adjustable Floating Memcapacitor Emulator Circuit Using CDBA
## 3 Simulation and Experimental Results
### Voltage-Charge Characteristics  
The basic simulation results of the time responses of voltage and charge at 250 Hz for incremental and decremental memcapacitor emulators are given in Figure 4. The figure shows that for a sinusoidal input voltage, the charge is seen as a sinusoidal signal with the peak shifted to the right in the incremental memcapacitor, and as a signal with the peak shifted to the left in the decremental memcapacitor. The voltage-charge characteristics of the incremental and decremental memcapacitor emulators are given in Figure 5. It is seen from the figure that the voltage-charge characteristics exhibit pinched hysteresis characteristics for the memcapacitor. Once it was demonstrated that the proposed memcapacitor provides basic memcapacitor properties for both the incremental and decremental memcapacitors, from this point onward, only results based on the incremental memcapacitor emulator will be given. Figure 6 shows the pinched hysteresis voltage-charge curves and its variation with frequency. This is one of the main characteristics of the memcapacitor element. As expected, the area enclosed by the hysteresis curve narrows with increase in frequency value. Furthermore, to verify that the memcapacitor is a variable element with operating frequency, the range of memcapacitance values with respect to the applied voltage is shown in Figure 7. As can be seen from this figure, the range of the memcapacitance value decreases with increasing frequency. Figure 4: Voltage and charge time responses of the memcapacitor emulator circuits: **(a)** incremental, **(b)** decremental. Figure 3: Experimental implementation of the proposed memcapacitor emulator: **(a)** experimental platform, **(b)** breadboard circuit diagram. Experimental results confirming the simulation results in Figure 6 are shown in Figure 8a,b. Again, the hysteresis range in the voltage-charge characteristics narrows with increasing frequency. From (12), it is seen that the voltage \(v_{s}\) is related to the memcapacitance charge and hence to the memcapacitance. Therefore, it can be seen in Figure 8c,d that the range of the \(v_{s}\) voltage, and hence the memcapacitance, decreases with increasing frequency when the \(v_{s}\) voltages at different frequencies are measured experimentally against the applied \(v_{in}\) voltages. This result indirectly confirms Figure 7 experimentally. Memcapacitor ranges calculated based on the obtained hysteresis curves are given in Table 1. The observed small differences between the simulation and experimental circuit results are mainly due to modeling ideality, physical parasitic effects, component tolerances and environmental conditions. While ideal conditions and component models are taken as a basis in simulation environments, real circuits are affected by various factors such as manufacturing variations, temperature changes, electromagnetic interference and measurement errors. In addition, the limited accuracy of the device models used and the ignoring of parasitic elements mean that the experimental results are not fully compatible. Figure 5: The voltage–charge characteristics of the memcapacitor emulator circuits: (**a**) incremental, (**b**) decremental. Figure 6: The voltage–charge characteristics at different operating frequencies. Figure 7: The voltage-memcapacitor characteristics at different operating frequencies. In our study, although the simulation and experimental applications are largely consistent, a small difference is observed due to the reasons listed above. The proposed memcapacitor emulator may require connection in series or parallel in various electronic circuit applications. Therefore, a 300 Hz, 1 V sinusoidal input signal was applied to single, series and parallel connected memcapacitors, and the resulting charge-voltage relationships were investigated. As expected, more capacitor charge values are obtained with memcapacitors connected in parallel than with those connected single and in series, as illustrated in Figure 9.