# A 2.4-GHz Fully-Integrated GaAs pHEMT Front-End Receiver for WLAN and Bluetooth Applications
## 2 Circuit Design  
As shown as Figure 2, the proposed front-end receiver is divided into three main parts, a SP3T switch, a bypass LNA with bias circuitry and a logic controller. The SP3T switch is implemented to provide signal transmission channels for the bypass LNA, the PA and Bluetooth modules. The amplifier made in cascode structure selects and amplifies the 2.4-GHz signal which is driven by the bias circuitry consisting of a current mirror bias circuitry and a resistor divider. When a large power input signal is received, the LNA will switch to the bypass mode with 7-8 dB of loss to prevent damage of LNA itself and subsequent components such as the mixer. The logic controller converts three input logic control signals (CRX, LEN and CBT) into enable signals that allow the receiver to switch between four operating modes. The basic logic gates, including inverter, buffer and NAND gate of the logic controller are realized using both 0.25 \(\upmu\)m E-mode and 0.5 \(\upmu\)m D-mode pHEMTs. Figure 3 illustrates the detailed topology of the SP3T switch. In order to achieve low NF for the receiver LNA and high linearity for the transmit PA, as well as good isolation for the whole system, an asymmetrical series-shunt switch topology is adopted. In transmit \begin{table}
\begin{tabular}{l c c c} \hline \hline \multirow{2}{*}{**Mode**} & \multicolumn{3}{c}{**Control Signals**} \\ \cline{2-4}  & **CRX** & **LEN** & **CBT** \\ \hline High gain mode (ANT to RX) & 1 & 1 & 0 \\ Bypass mode (ANT to RX) & 1 & 0 & 0 \\ Bluetooth switch mode (ANT to BT/BT to ANT) & 0 & 0 & 1 \\ Transmit switch mode (TX to ANT) & 0 & 0 & 0 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Truth table and interfaces for different operation. Figure 2: Overall schematic of proposed front-end receiver. switch mode, the switch needs to handle more than 30 dBm of input power as well as providing sufficient isolation between ANT and other ports during high-power signal transmission condition. Thus, three stacking transistors are employed for all the off arms to hold off the large power level when the transmit switch is on [12; 13; 14; 15]. When the receive or Bluetooth switch is on, all off arms can utilize a smaller stack height since the power is much lower. Hence, only one device is employed for the receive and Bluetooth shunt arms, whereas two stacking transistors are used for the transmit series arm, taking into account the isolation between the transmit and receiving paths. Larger sizes of switch transistors can improve the insertion loss (IL) in on-state but would degenerate the required isolation in off-state. The width of series and shunt switch transistors with 0.5 \(\upmu\)m D-mode pHEMTs are optimized as 900 \(\upmu\)m and 200 \(\upmu\)m, respectively. Additionally, a 20k \(\Omega\) resistor is connected in parallel across the switch FET to share the large voltage swing when the switch transistors in off-state [12]. The operating states of all the series and shunt switch arms in four modes are shown in Table 2. All RF paths are DC blocked using series metal-insulator-metal (MIM) capacitors. In receive high gain mode, the switch transistors M\({}_{\text{sw1}}\), M\({}_{\text{sw3}}\) and M\({}_{\text{sw4}}\) are turned off while M\({}_{\text{sw2}}\) is turned on, the signal from the ANT is fed into the receiving path, ensuring the signal to be amplified by the LNA to the output RX port. For high gain and good reverse isolation, an inductively source-degenerated cascode LNA structure is adopted to \begin{table}
\begin{tabular}{l c c c c c c} \hline \hline
**Mode** & \(\mathbf{SW_{RX1}}\) & \(\mathbf{SW_{RX2}}\) & \(\mathbf{SW_{TX1}}\) & \(\mathbf{SW_{TX2}}\) & \(\mathbf{SW_{BT1}}\) & \(\mathbf{SW_{BT2}}\) \\ \hline High gain mode & on & off & off & on & off & on \\ Bypass mode & on & off & off & on & off & on \\ Bluetooth switch mode & off & on & off & on & off \\ Transmit switch mode & off & on & on & off & off & on \\ \hline \hline \end{tabular}
\end{table} 
Table 2: SP3T switch operating state in four modes.