# A Cache Policy Based on Request Association Analysis for Reliable NAND-Based Storage Systems
## 5 Performance Evaluation  
### Experimental Setup and Performance Metrics  
In the experiments, we used NVIDIA Jetson TX2 to implement a NAND-based storage simulator [22] with different cache sizes (i.e., 4, 8, 16, 32 and 64 MB) to run eight workload traces. Table 1 shows the specification of NVIDIA Jetson TX2. Table 2 shows the characteristics of eight workload traces which can be obtained from the website of the Global Network Storage Industry Association (SNIA). In Table 2, we can find that most workload traces contain a lot of read and write requests with different average request sizes so that the proposed method should both consider the read and write requests. MSR-usr_0 is from the Microsoft Research Cambridge enterprise server [23], which collects the I/O requests when users access data on the server. Systor'17-LUN_0, Systor'17-LUN_1, Systor'17-LUN_2, Systor'17-LUN_3, Systor'17-LUN_4, Systor'17-LUN_6 [24] collect the I/O requests from six virtual drives when users access data on the enterprise virtual desktop architecture. Financial is a collection of the I/O requests in the server when a large financial institution conducts online transactions and applications. For the association analysis, we set 10 groups to collect hot requests during the request sampling, where each group contains a set of 40 hot requests. When the amount of data in 10 groups is full, an association analysis will be performed on the data to obtain the associations between the data. After the association analysis is completed, the oldest group will be removed for the newly generated hot requests.  
In the experiments, we compared the proposed method based on request association analysis (i.e., RAA), the proposed method with execution delay of request association  
\begin{table}
\begin{tabular}{l c c c} \hline \hline CPU & \multicolumn{2}{c}{Dual-Core NVIDIA Denver 2 64-Bit CPU} \\  & \multicolumn{2}{c}{Quad-Core ARM Cortex-A57 MPCore} \\ \hline RAM & \multicolumn{2}{c}{8 GB 128-bit LPDDR4 Memory} \\ \hline Storage & \multicolumn{2}{c}{32 GB eMMC 5.1} \\ \hline OS & \multicolumn{2}{c}{Ubuntu 16.04} \\ \hline \hline \end{tabular}
\end{table}
Table 1: Specification of NVIDIA Jetson TX2.  
\begin{table}
\begin{tabular}{c c c c c} \hline \hline
**Workload** & \multicolumn{2}{c}{**Number of**} & \multicolumn{2}{c}{**Write**} & \multicolumn{2}{c}{**Average Read**} & \multicolumn{2}{c}{**Average Write**} \\  & **Requests** & **Ratio (\%)** & **Request Size (KB)** & **Request Size (KB)** \\ \hline MSR-usr\_0 & 2,237,889 & 59.58 & 40.92 & 10.28 \\ Systor’17-LUN\_0 & 1,768,140 & 22.24 & 27.54 & 8.84 \\ Systor’17-LUN\_1 & 1,390,948 & 27.66 & 20.33 & 16.47 \\ Systor’17-LUN\_2 & 3,615,901 & 12.38 & 19 & 16.7 \\ Systor’17-LUN\_3 & 2,161,973 & 20.49 & 19.5 & 14.38 \\ Systor’17-LUN\_4 & 2,496,148 & 17.66 & 28.73 & 22.98 \\ Systor’17-LUN\_6 & 2,146,801 & 17.09 & 21.76 & 16.55 \\ Financial & 5,334,987 & 76.84 & 2.25 & 3.73 \\ \hline \hline \end{tabular}
\end{table}
Table 2: Characteristics of 8 workload traces.  
analyzer (i.e., RAA-Delay), LRU, ARC and VBBMS. We measured the reduction ratio of the read and write requests to obtain the cache hit ratio under different cache sizes (i.e., 4, 8, 16, 32 and 64 MB). As the cache hit ratio is a key indicator to evaluate the performance, the higher cache hit ratio also means the better performance. Note that the proposed RAA and RAA-Delay are different from the typical cache methods (such as LRU, ARC and VBBMS) because they not only consider the temporal/spatial locality and but also the association rules between the accessed data.