# All-Sputtering, High-Transparency, Good-Stability Coplanar Top-Gate Thin Film Transistors
## 3 Results and Discussion  
Figure 2 exhibits the characteristics of corresponding TFTs after post-annealed at 400 \({}^{\circ}\)C. Figure 2a shows the I\({}_{\text{D}}\)-V\({}_{\text{D}}\) output curves of the coplanar top-gate TFTs, it exhibited good gate-control properties. But there is no gate control for the devices with no post-annealing or post-annealed at 200 \({}^{\circ}\)C and 300 \({}^{\circ}\)C as shown in Figure 3. This may be due to serious ion damage on the active layer when depositing the insulator layer and the damage could not yet be recovered at a lower annealing temperature. The transfer characteristics (I\({}_{\text{D}}\)-V\({}_{\text{G}}\)) of fabricated devices are given in Figure 2b. The transfer curves were measured with V\({}_{\text{G}}\) swept from negative to positive with negligible gate leakage (\(<\)10\({}^{-10}\)A as shown in the inset of Figure 2b). This enables a mobility of 4.25 cm\({}^{2}\) V\({}^{-1}\) s\({}^{-1}\), on/off current ratio exceeds 10\({}^{6}\), V\({}_{\text{th}}\) of \(-\)0.97 V and subthreshold swing (SS) about 0.34 V/decade. No obvious hysteresis was observed, which indicates less electron traps at the interfaces between active layer and dielectric [14], and the remarkably improved storage stability of the device. Figure 4 shows BF STEM image together with the elemental distribution detected by EDS in the channel region of the coplanar top-gate Nd-IZO TFTs. The STEM result shows that the Nd-IZO film was continuous and compact sandwiched between the buffer layer and insulating layer, suggesting good thickness uniformity and no obvious intermixing between adjacent layers. It is known that clear interface and uniform thin films help devices to achieve high performance [15]. The small amount of Nd acted as a superior oxygen binder required to suppress the formation of oxygen vacancies  
Figure 3: Transfer characteristic curve (I\({}_{\text{DS}}\)-V\({}_{\text{GS}}\)) of manufactured coplanar top gate Nd-IZO TFTs under different post-annealing temperatures (**a**) without annealing, (**b**) 200 \({}^{\circ}\)C (**c**) 300 \({}^{\circ}\)C. V\({}_{\text{GS}}\) is varied from \(-\)20 to 20 V with V\({}_{\text{DS}}\) = 10.1 V.  
Figure 2: (**a**) Output characteristic curves (I\({}_{\text{DS}}\)-V\({}_{\text{DS}}\)) and (**b**) transfer characteristic curve (I\({}_{\text{DS}}\)-V\({}_{\text{GS}}\)) of manufactured coplanar top-gate Nd-IZO TFTs. V\({}_{\text{GS}}\) is varied from \(-\)20 to 20 V with V\({}_{\text{DS}}\) = 10.1 V, and the inset was the gate leakage current. and control the carrier concentration can be ascribed to its low electronegativity (\(\sim\)1.1) and stronger bonding strength of Nd-O (703 kJ/mol) [16; 17]. The electrical stability of the coplanar top-gate TFTs was investigated by stressing a prolonged combined gate/drain bias on the device. The devices were stressed under the following conditions: V\({}_{\text{GS}}\) = \(\pm\)20 V, V\({}_{\text{DS}}\) = 10 V and applied V\({}_{\text{GS}}\) = \(\pm\)10 V, which was applied for 3600 s. Figure 5 shows electrical stability under NBS, PBS, NBIS and PBIS, respectively. The corresponding V\({}_{\text{th}}\) is shown in Table 2, where the all sputtered coplanar top-gate TFTs exhibited a slight negative NBS shift and positive PBS shift. The V\({}_{\text{th}}\) shift after 1 h under NBS and PBS was only \(-\)0.04 V and 0.05 V, respectively. This is remarkable for a TFT device. It is also noted that there was no significant degradation in saturation mobility and SS, indicating that no new defects were created when applying gate bias and self-passivated property could effectively prevent the semiconductor from ambience interaction, which is very critical for the stability of devices. The declined I\({}_{\text{off}}\) in NBS indicated that the devices tend to be more stable after negative bias was applied for one hour. However, once illumination was introduced, the transfer curves exhibited a \(-\)0.78 V shift after 1 h under positive V\({}_{\text{G}}\) stress with illumination.