# Quantum Circuit-Width Reduction through Parameterisation and Specialisation
## 9 Demonstration of Reduction of Integer Divider
### Discussion of Results--Implication for Wider Range of Circuits
\begin{table}
\begin{tabular}{r c c c} \hline  & \(|out3|out2|out1|out0|test|a3|a2|a1|a0|qinj2|qinj1|qinj0|\) & \\ \hline \multicolumn{2}{c}{**Operation**} & \multicolumn{2}{c}{**Input**} & \multicolumn{2}{c}{**Output**} & \multicolumn{2}{c}{**Unpacked \(|out\rangle\)**} \\ \hline
64/9 & \(|0|0|0|0|0|1|0|0|0|0|0|0\) & \(|01|1|1|0|0|0|0|0|0\) & \(|01111|0|1|0|0|0\) & \(|01111\rangle\) (7) \\
72/10 & \(|00|0|00|10|1|0|0|0\) & \(|01|11|0|1|0|0\) & \(|01|11|0|1|0|0|1|0\) & \(|01111\rangle\) (7) \\
96/11 & \(|00|0|0|00|11|1|0|0|0\) & \(|10|0|0|0|11|1|0|0\) & \(|10|0|0|11|0|0\) & \(|100|0|0\) (8) \\
104/12 & \(|00|00|0|1|11|1|0|0\) & \(|10|0|0|0\) & \(|10|0|0|0|11|1|0|1|0\) & \(|100|0\) (8) \\
112/13 & \(|00|0|00|0|1|11|0|0|0\) & \(|10|0|0|0|11|1|1|0|0|0\) & \(|100|01|11|1|0|0\) & \(|100|0\) (8) \\
80/14 & \(|00|00|0|1|0|1|0|1|0|0|0\) & \(|01|1|0|1|0|1|0|0\) & \(|01|10|1|0|0\) & \(|010|1\) (5) \\
104/15 & \(|00|00|0|1|1|0|1|0|1|0|0\) & \(|01|1|10|0|1|1|0|0\) & \(|0111|0|0|0\) & \(|01110\rangle\) (6) \\ \hline \end{tabular}
\end{table} 
Table 2: Specialised-divisor long division testing results sample. Today, it is feasible to simulate 20-25 qubits on a typical everyday laptop. For larger problems up to approximately 35 qubits, researchers using full-state vector simulators require distributed computing facilities often available in research centres and universities. For even larger circuit width, regional or national high-performance computing facilities are required, so that circuits simulations cannot be performed routinely in an algorithm development process where many repeated simulations are needed. It is important to recognise that while the implemented examples here are four dividers with 4 divisor bits, the techniques described are applicable to dividers of any size. For example, the complexity analysis in Section 7.1 can be used to determine that a divider with an 8 bit divider would require a 34 qubit circuit to run (requiring over 137 GB of memory to simulate with 32-bit floating point precision). Using the described techniques, 8 qubits can be reduced, requiring only 26 qubits or 0.53 GB to be simulated. The quantum integer divider was used here for illustration purposes; the proposed reduction involving parameterisation and static analysis applies far more widely to quantum arithmetic operations. The quantum circuits for integer arithmetic can naturally be extended to arithmetic of real numbers using fixed-point representation. Additionally, in ongoing work by one of the authors [29; 31], arithmetic operations based on computational basis encoding is used for floating-point operations. In the interest of brevity, this was not discussed in the present work. However, the introduced quantum circuit transformations can be applied to this type of quantum circuit for floating-point arithmetic as well. This will be considered in future work. The introduced circuit width reductions can therefore be of great benefit to algorithm developers by facilitating simulations of larger circuits on available computing resources.