## 6 Conclusions  
The many FA designs in QCA technology use at least three layers for the crossovers; there are also a number of designs that use rotation cells or the design of the coplanar crossover with the utilization of non-adjacent clock phases. That is why we did not use  
\begin{table}
\begin{tabular}{l c c c} \hline \hline
**Design** & **Energy (meV)** & **Power (W)** & **PDP (Ws)** \\ \hline FA [21] & 22.0 & 35.248 \(\times\)\(10^{-10}\) & 35.248 \(\times\)\(10^{-22}\) \\ \hline FA [22] & 27.20 & 43.579 \(\times\)\(10^{-10}\) & 43.579 \(\times\)\(10^{-22}\) \\ \hline FA [23] & 24.20 & 38.772 \(\times\)\(10^{-10}\) & 29.079 \(\times\)\(10^{-22}\) \\ \hline FA [24] & 26.0 & 41.657 \(\times\)\(10^{-10}\) & 41.657 \(\times\)\(10^{-22}\) \\ \hline FA [25] & 28.60 & 45.822 \(\times\)\(10^{-10}\) & 45.822 \(\times\)\(10^{-22}\) \\ \hline FA [26] & 31.50 & 50.469 \(\times\)\(10^{-10}\) & 25.234 \(\times\)\(10^{-22}\) \\ \hline FA [27] & 20.50 & 32.845 \(\times\)\(10^{-10}\) & 49.267 \(\times\)\(10^{-22}\) \\ \hline Proposed FA & 28.20 & 45.181 \(\times\)\(10^{-10}\) & 33.886 \(\times\)\(10^{-22}\) \\ \hline Proposed FA & & & \\ design-2 & 23.70 & 37.972 \(\times\)\(10^{-10}\) & 28.479 \(\times\)\(10^{-22}\) \\ \hline \hline \end{tabular}
\end{table}
Table 4: Energy and power dissipation analysis of the proposed full adder (FA) circuits in comparison with the state of the art.  
Figure 18: Comparison of QCA XOR with delay.  
any crossovers in our designs. As a result, they were designed not only to be coplanar but also to be designs without the use of any NOT gates, crossovers, and rotation cells, which creates a more stable and robust circuit. Our proposed designs are superior to the previous designs; the number of cells in design-2 is superior to that in all compared designs, with 29.51% and 2.27% reductions when compared to the smallest and largest previous examples, respectively, [26; 27]. Moreover, the area consumption of design-2 is superior to that of all the compared designs, with reductions of 10.53% and 51.32% when compared to the most compact previous sample [23] and the largest previous sample [26], respectively. In the case of the delay parameter, the delay in our proposed design-1 and design-2 is shorter than that of any of the previous designs, except for the design in [26]. This design uses rotation cells, and both the number of cells and the area of consumption are higher than those of design-1 and design-2. The proposed XOR circuit can be implemented in QCA technology, which employs reversible logic for its implementation, including Feynman gate, Toffoli gate, Peres gate, and other reversible circuits where the XOR gate is the most important element for the design of these circuits.  
Conceptualization, M.V.; methodology, M.V.; validation, M.V., P.L. and A.N.B.; formal analysis, M.V.; investigation, M.V., P.L. and A.N.B.; writing--original draft preparation, M.V.; writing--review and editing, P.L., A.N.B. and K.A.W.; supervision, P.L., A.N.B. and K.A.W. All authors have read and agreed to the published version of the manuscript.  
[PERSON] would like to acknowledge the financial support of this work by the Ministry of Science and Higher Education of the Russian Federation under assignment No. FSEE-2020-0002.  
Not applicable.  
Data Availability StatementData are contained within the article.  
The authors declare no conflict of interest.