## 2 Lifetime Reliability Sensing in FPGAs
### Lifetime Reliability at the Transistor Level  
[PERSON] et al. discovered the importance of lifetime reliability at the transistor level [32]. The importance of lifetime reliability was supported by [PERSON] et al., who found that aging sensor detection is caused by multiple path delays generated at the transistor level [33]. The Eldo simulator tool was used in this work to predict the lifetime reliability in a 23-stage ring oscillator [34; 35; 36]. The simulation flow using the Eldo simulator is shown in Figure 1. The 45 nm high-power model for positive metal oxide semiconductor (PMOS) and negative metal oxide semiconductor (NMOS) transistors from the predictive technology model (PTM) [37] was used in the 23-stage ring oscillator. The ring oscillator circuit was simulated as a new circuit without an aging property to obtain the oscillation frequency. The new simulation was conducted as a reference point for the zero-degradation effect. The behavioral characteristics of the ring oscillator circuit were verified through the simulation output. The Eldo simulator then employed an advanced reliability model, which took the HCI and NBTI of CMOS devices into account in order to simulate 10 years of aging effects in the circuit. These aging simulations were conducted for the first year until ten years of aging circuit to determine the trend of the device degradation. The models used in this work were based on reaction-diffusion theory [38] and were multimode energy driven [39]. Figure 2 shows the frequency degradations for 45 nm and 32 nm technologies on a ring oscillator for 27 \({}^{\circ}\)C and 100 \({}^{\circ}\)C for up to 10 years of aging, which were obtained from the Eldo simulator. This frequency degradation shows that the frequency increased after aging due to the HCI and NBTI mechanisms at 27 \({}^{\circ}\)C and 100 \({}^{\circ}\)C, respectively [40]. [PERSON] et al. found that the NBTI effect is a dominant factor when the temperature is high, and the effect can be suppressed for lower temperatures [41; 42]. [PERSON] et al. reported that under stressed conditions of PMOS transistor exposed to a gate voltage of 0 V to 2.5 V and a high temperature of 100 \({}^{\circ}\)C, new interface states of Si-SiO\({}_{2}\) cause electric potential augmentation [40]. Furthermore, the threshold voltage causes a negative drift because of fixed charge and interface states caused by a positive hole capture. A reaction-diffusion model was well explained by [PERSON] [43], including the principle of the NBTI effect, which reported the breaking of the Si-H bond in the Si-SiO\({}_{2}\) interface into interface traps [44; 45]. It was shown that these findings support this work due to frequency variations that were caused by the HCI and NBTI degradations. [PERSON] and [PERSON] obtained a threshold voltage shift due to NBTI [46] as given in Equation (1):  
\[\Delta V_{hhx}(t)=C_{x}(f(t_{st})-f(t_{st},0))=\psi_{Bx}(f(t)-f(t_{0})) \tag{1}\]  
where \(C_{x}\) is a constant that depends on the process, voltage, and temperature (PVT); \(t_{st}\) is the effective stress time after the elapsed time between \(t_{0}\) and \(t\). The effective stress time for PMOS devices after NBTI stress with a LOW input signal depends on the stress probability value of the device. Therefore, Equation (2) was obtained using CurveExpert() (Chattanooga, TN, USA) [47] software to calculate the degradation caused by NBTI for a high temperature of 100 \({}^{\circ}\)C for a 45 nm technology node:  
\[\%\Delta f_{NBTI(45 nm)}=\frac{1.907\times 10^{-4}+1.952 year^{0.228}}{2.51+year ^{0.228}} \tag{2}\]  
Figure 1: Simulation flow of the Eldo simulator for fresh and aging devices. Equation (2) can be used to calculate an unknown frequency degradation that is not plotted in Figure 2. As was deduced from Equation (2), the percentage of frequency degradation against new devices for 5 years and 6 months was equal to 0.723% frequency degradation due to the NBTI effect. The HCI degradation mechanism is more influential in NMOS than PMOS transistors [48].