# Broadband Millimeter-Wave 5G Power Amplifier Design in 22 nm CMOS FD-SOI and 40 nm GaN HEMT
## 4 Discussion
\begin{tabular}{c c c c c c c c c c c c} \hline \hline
**Ref.** & **Tech.** & **Design** & \begin{tabular}{c} **Supply** \\ **Voltage (V)** \\ \end{tabular} & \begin{tabular}{c} **Treq.** \\ **(GHz)** \\ \end{tabular} & \begin{tabular}{c} **Pout\_Part \\ **(GHz)** \\ \end{tabular} & \begin{tabular}{c} **P\_Part \\ **(dBm)** \\ \end{tabular} & \begin{tabular}{c} **Peak \\ **PA (%)** \\ \end{tabular} & \
\begin{tabular}{c} **Gain** \\ **(dB)** \\ \end{tabular} &
\begin{tabular}{c} **Signal Type** \\ **(dB)** \\ \end{tabular} & **ACLR (dBc)** \\ \hline
[14] & \begin{tabular}{c} 65-nm \\ CMOS \\ \end{tabular} & \begin{tabular}{c} Multi-port \\ load-pulling \\ \end{tabular} & 1.1 & \begin{tabular}{c} 26-42 \\ (47.1\%) \\ \end{tabular} & 37 & 19.6 & 16 & 21.9 & 16 & \
\begin{tabular}{c} 2 GHz 64- \\ QAM OFDM \\ \end{tabular} &
\begin{tabular}{c} \(P_{OUT}=7.5\) dBm \\ PAE = 5.1\% \\ \end{tabular} \\ \hline
[15] & \begin{tabular}{c} 0.2 \(\mu\) Gan \\ on SiC \\ \end{tabular} & \
\begin{tabular}{c} 3-stage \\ Harmonic \\ Tuning \\ \end{tabular} & 28 &
\begin{tabular}{c} 29-34 \\ (55.1\%) \\ \end{tabular} & 33 & 39.5 & - & 36 & 25 & - & - \\ \hline
[16] & \begin{tabular}{c} 0.1 \(\mu\) Gan \\ on SiC \\ \end{tabular} & \
\begin{tabular}{c} One-order \\ synthesized \\ transformer \\ network \\ \end{tabular} & 12 &
\begin{tabular}{c} 18-40 \\ (75.9\%) \\ \end{tabular} & 25 & 30 & 25 \({}^{**}\) & 23.6 & 18 \({}^{**}\) & - & - \\ \hline
[17] & \begin{tabular}{c} 0.15 \(\mu\)m \\ GaAs \\ \end{tabular} & \begin{tabular}{c} Transformer- \\ Coupled \\ \end{tabular} & 4 & \begin{tabular}{c} 21.6–32.5 \\ (40.3\%) \\ \end{tabular} & 28 & 26.5 & 24.6 & 31 & 12.6 & \
\begin{tabular}{c} 64 QAM 6 \\ Gb/s \\ \end{tabular} &
\begin{tabular}{c} -300P\_OUT = 21.6 dBm \\ PAE = 13.5\% \\ \end{tabular} \\ \hline
[18] & \begin{tabular}{c} 130-nm SiGe \\ \end{tabular} & \begin{tabular}{c} 2-stage \\ Doherty \\ \end{tabular} & 1.5 & \begin{tabular}{c} 23.3–39.7 \\ (52.1\%) \\ \end{tabular} & 37 & 17.1 & 15.5 & 22.6 & 17.1 & \begin{tabular}{c} 64 QAM \\ 500 MSym/s \\ \end{tabular} & \
\begin{tabular}{c} -284.9 \\ (500 MSym/s \\ \end{tabular} &
\begin{tabular}{c} -300P\_OUT = 21.6 dBm \\ PAE = 13.5\% \\ \end{tabular} \\ \hline
[19] & \begin{tabular}{c} 45-nm SOI \\ CMOS \\ \end{tabular} & \begin{tabular}{c} Continuous \\ Hybrid \\ Class F/F\({}^{-1}\) \\ \end{tabular} & 2 & \begin{tabular}{c} 23-40.5 \\ (51.1\%) \\ \end{tabular} & 37 & 18.9 & 17 & 37 & 18 & \
\begin{tabular}{c} 64-QAM \\ 500 MSym/s \\ \end{tabular} &
\begin{tabular}{c} -30.59P\_OUT = 11.7 dBm \\ PAE = 11.9\% \\ \end{tabular} \\ \hline
[20] & \begin{tabular}{c} 45-nm SOI \\ CMOS \\ \end{tabular} & \begin{tabular}{c} Compensated \\ Distributed \\ Balun \\ \end{tabular} & 2 & \
\begin{tabular}{c} 25.8–43.4 \\ (50.9\%) \\ \end{tabular} & 37 & 20.0 & 18.9 & 38.7 & 19.9 \({}^{*}\) &
\begin{tabular}{c} -25.20P\_OUT = 10.9 dBm \\ PAE = 14.2\% \\ \end{tabular} \\ \hline
[20] & \begin{tabular}{c} 45-nm SOI \\ CMOS \\ \end{tabular} & \begin{tabular}{c} Compensated \\ Distributed \\ Balun \\ \end{tabular} & 2 & \begin{tabular}{c} 25.8–43.4 \\ (50.9\%) \\ \end{tabular} & 37 & 20.0 & 18.9 & 38.7 & 19.9 \({}^{*}\) & \
\begin{tabular}{c} 37 \\ 2-CC OFDM \\ \end{tabular} &
\begin{tabular}{c} 20.0 \\ 2-27.90P\_OUT = 10.2 dBm \\ PAE = 13.6\% \\ \end{tabular} \\ \hline
[21] & \begin{tabular}{c} 24-nm \\ CMOS \\ \end{tabular} & \begin{tabular}{c} 1.8 \\ 1-stage diff. \\ FDSOI \\ \end{tabular} & 2 & \
\begin{tabular}{c} 19.1–46.5 \\ (83.5\%) \\ \end{tabular} & 28 & 14.0 & 9.2 & 19.9 & 14.5 &
\begin{tabular}{c} -24.60P\_OUT = 7.3 dBm \\ PAE = 8.1\% \\ \end{tabular} \\ \hline
[22-nm \\ work \\ \end{tabular}  & \begin{tabular}{c} 22-nm \\ CMOS \\ FDSOI \\ \end{tabular}  & 1.8 & \begin{tabular}{c} 19.1–46.5 \\ (83.5\%) \\ \end{tabular}  & 28 & 14.0 & 9.2 & 19.9 & 14.5 & \ \begin{tabular}{c} 28 & 14.0 \\ (83.5\%) \\ \end{tabular}  & \begin{tabular}{c} 19.2–32.70P\_OUT = 6.6 dBm \\ PAE = 6.2\% \\ \end{tabular}  \\ \hline
[23-nm \\ work \\ \end{tabular} & \begin{tabular}{c} 22-nm \\ CMOS \\ FDSOI \\ \end{tabular}