# High-Frequency Limits of Graphene Field-Effect Transistors with Velocity Saturation
## 5 Characterization of RF-GFETs  
The performance of Sample-A as an RF transistor is assessed at high frequency. Measuring the S-parameters gives a direct access to the channel small signal resistance \(r\) and the transconductance \(g_{m}=dI_{ds}/dV_{g}\) shown in the schematic of Figure 2b. We also measure the current gain \(H\) and the Mason gain \(U\) (equivalent to the power gain). Those gains are sensitive to extrinsic parameters such as stray capacitances and, for \(U\) only, the resistance of the gate electrode. After removing the effect of stray capacitances by a de-embedding procedure, we obtain the current gain cut-off frequency \(f_{T}=9\) GHz and the Mason's gain cut-off frequency \(f_{max}=7\) GHz. The fact that \(f_{max}\)\(\sim\)\(f_{T}\) is a distinctive feature of velocity saturation GFETs, as \(f_{max}\ll f_{T}\) in mobility-limited GFETs [29]. The value of \(f_{max}\) is limited here by the large resistance \(R_{G}\)\(\sim\)10 Ohms of the tungsten gate electrode. This is why we built a thick gold gate device in sample-B (shown in Figure 2a).  
In sample-B, the channel width is also further increased to \(W=22\)\(\upmu\)m, to increase the total current in the device. In terms of \(f_{max}\), however, a compromise has to be found between a large current which means a large transconductance and a larger gate resistance which strongly limits \(f_{max}\). The small signal characteristics of sample-B, i.e., the resistance \(r\) and transconductance \(g_{m}\), are plotted in Figure 2c. One can notice the strong saturation effect on the n-side where the high bias \(r\) is larger than the zero bias resistance peak. In this sample, the n-side is also the low contact resistance side which results in a larger \(g_{m}\) on the n-side. Both effects contribute to a larger voltage gain for positive gate voltages. This is confirmed by measuring \(H\) and \(U\) at the maximum bias and \(V_{g}=2\) V plotted in Figure 2d after de-embedding. In Figure 2e, we plot the \(V_{g}\)-dependence of \(f_{T}\) and \(f_{max}\) at \(V_{ds}=2.4\) V. Our model allows estimating \(r\) and \(g_{m}\) which is useful to determine the transistor's figures of merit from \(f_{T}=g_{m}/(2\pi C_{g})\) and  
\[f_{max}=\frac{f_{T}}{2\sqrt{(R_{G}+R_{c})/r+2\pi f_{T}C_{g}R_{G}}} \tag{10}\]  
The predicted \(f_{T}\) and \(f_{max}\) in Figure 2e compare fairly well with our measurement. Both figures of merit present two peaks for p- and n-doping. In the case of \(f_{T}\), the peak asymmetry comes from the  
Figure 5: (**a**) Small signal resistance of the transistor obtained from the model (solid lines) and from the measured scattering parameters of sample-A at 2 GHz (circles). (**b**) Small signal resistance simulated for a remote gate transistor (h-BN dielectric thickness of 300 nm). The saturation effect is enhanced for the local gate device in the n-doping regime.  
contact resistance asymmetry. For \(f_{max}\) the peak asymmetry is stronger because it is also sensitive to a stronger saturation on the n-doping side.  
The availability of a reliable model allows fine tuning parameters to optimize \(f_{max}\). It appears that in our sample the large gate resistance is the main limitation. Engineering the transistor extrinsic elements can improve \(f_{max}\) by a large factor, for example, by using a T-shaped gate [9; 30]. Another important limiting factor is the contact resistance.