# A 11 mW 2.4 GHz 0.18 \(\upmu\)m CMOS Transceivers for Wireless Sensor Networks
## 4 Measurement Results  
The proposed transceiver is fabricated using a 0.18 \(\upmu\)m CMOS technology. Figure 12 shows the die photo of the transceiver, which is packaged in a QFN form for measurements.  
The first step of measurement is to set up the initial status of SPI with determines the working conditions of the circuits; for example, the phase-locked loop of this chip. The frequency of the locked PLL is determined by the integer tuning bits (Ch1-0, D11 and D10 of the SPI register) and fractional tuning bits (F9-0, D21-D12 of the SPI register) of the PLL. The output frequency of the PLL, \(\mathrm{f_{out}}\) is given by:  
\[\mathrm{f_{out}}=(59+\mathrm{Ch1}\text{-}0+\mathrm{F9}\text{-}0/1024)\times 2 \times 20\;\mathrm{MHz} \tag{3}\]  
For proper operation of the PLL, one needs to tune the coarse frequency bits of the VCO manually, namely D2-D0 of the SPI register (maybe with the help of a spectrum analyser). The VCO free running frequency should be close to the targeted 2.4-2.5 GHz range.  
The matching network for the RFIO port is as follows. The inductance value can be from 2.5 to 3 nH. In this work, the LNA and PA share the matching network with a port namely RFIO as shown in Figure 2. The reference clock of the PLL is 20 MHz, which comes from an off-chip crystal. With the three-bit control of the VCO working bands, the PLL can work from 2.2 GHz to 2.5 GHz properly. Figure 13 shows the output spectrum of the PLL working at 2.5 GHz range.  
As mentioned above, the transceiver supports the working mode of FSK, which is achieved by the changing output frequency in the PLL. The output spectrum of this working mode is shown in Figure 14.  
Figure 12: The die photo of the proposed transceiver.  
Figure 13: Output spectrum of the PLL.  
After the verification of the local oscillator, it is possible to connect the output of the PLL to PA, which generates the output of ASK or FSK signal. Figure 15 shows the output spectrum of the PA. The output power is 10 dB lower than the simulation results due to the 0.1\(\times\) probe in the measurement facilities. If a higher output power level is required, more amplifier stages can be added at the expense of power consumption.  
Finally, this signal is received by the RX, which generates the IF signal at around 2.5 MHz (depending on the configuration). Figure 16 shows the output spectrum of the receiver. The IF amplifier has a tunable gain up to 25 dB to support the dynamic range of the RX.  
Figure 16: IF signal of the RX.  
Figure 14: An example of the FSK output spectrum.  
Figure 15: Output spectrum of the PA.  
Based on this analogue performance measurement, it is possible to measure the transceiver using digital signals. Different data patterns, for example, a random generated data of 0001_1111_0101_1011_0111_0111_1100, are used in the transceiver. Figure 17 shows the transmitted data of the TX in OOK modulation (red) and the received IF signal of RX (blue), respectively.  
Figure 18 shows the data to be modulated and transmitted by TX (blue) and the received IF FSK signal before demodulation (red). By using an FSK demodulator, or comparing to the output IF signal, the data signal can be easily recovered as shown in Figure 18. Measurement results suggest that the proposed transceiver is able to work with 500 Kbps data transferring with mW level power consumption. Table 1 compared the proposed work with some of the recent literatures in similar technology. It is not of the lowest power efficient, but it is based on the standard architecture with a large flexibility in system performances and it can be easily changed to different applications. Thanks to the low cost CMOS technology with small silicon area (only one external inductor is needed), it is of a great interest in the applications of WSN.  
Figure 17: Data in TX (red) and IF in RX (blue).  
Figure 18: The output signal of an FSK transmission.