# Hardware Update through Digital TV Signals
## 5 The Proposed Hardware Reconfiguration Scheme Based on the DTV Signals
### Hardware Data Multiplexing in Transport Streams
Figure 6: The FPGA reconfiguration bitstream is divided into sequenced private sections, which are then organized into TS packets. The program map table (PMT) [42] sections provide access points to the newly created UIT, similar to what was already performed for the AIT. UIT gives access to the field hw_core_flag, which is used to signal the existence of hardware content. If it is set to \"0x1\", that means there is hardware content in a DTV signal; otherwise, \"0x0\" indicates that no hardware content is being broadcast. The field fpga_core_number identifies the number of hardware cores being broadcast. The other necessary data are provided by update_hw_identifier(), a specific descriptor regarding transmitted hardware modules similar to application_identifier()used in AIT. The update_hw_identifier() portion presents a list of available hardware cores whose size is reported by fpga_core_number. The syntax of update_hw_identifier() is shown in Table 4. \begin{table}
\begin{tabular}{l c c} \hline \hline \multirow{2}{*}{**Data Structure**} & **Bit Rate** & \multirow{2}{*}{**Mnemonic**} & \multirow{2}{*}{**Value**} \\  & **(No. of Bits)** & & \\ \hline update\_hw\_identifier () \{ & & \\ fpga\_core\_size & 32 & bslbf \\ fpga\_core\_version & 16 & bslbf \\ fpga\_core\_module\_name() & & \\ fpga\_core\_device\_info() & & \\ fpga\_section\_identifier() & & \\ \hline \hline \end{tabular}
\end{table} 
Table 4: The syntax of the descriptor UPDATE_HW_IDENTIFIER. \begin{table}
\begin{tabular}{l c c} \hline \hline \multirow{2}{*}{**Data Structure**} & **Bit Rate** & \multirow{2}{*}{**Mnemonic**} & \multirow{2}{*}{**Value**} \\  & **(No. of Bits)** & & \\ \hline update\_information\_table() \{ & & \\ table\_id & 8 & uimsbf & 0x91 \\ section\_syntax\_indicator & 1 & bslbf & \\ hw\_core\_flag & 1 & bslbf & \\ reserved & 2 & bslbf & \\ section\_length & 12 & uimsbf & \\ fpga\_core\_number & 16 & uimsbf & \\ reserved & 2 & bslbf & \\ version\_number & 5 & uimsbf & \\ current\_next\_indicator & 1 & bslbf & \\ section\_number & 8 & uimsbf & \\ last\_section\_number & 8 & uimsbf & \\ reserved\_future\_use & 4 & uimsbf & \\ update\_loop\_length & 12 & uimsbf & \\ for (i = 0; i \textless{}N; i++) \{ & & \\ descriptor() & & & \\ \hline \hline \end{tabular}
\begin{tabular}{l c c} \hline \hline \multirow{2}{*}{**Data Structure**} & **Bit Rate** & \multirow{2}{*}{**Mnemonic**} & \multirow{2}{*}{**Value**} \\  & **(No. of Bits)** & & \\ \hline update\_hw\_identifier () \{ & & \\ table\_id & 8 & uimsbf & \\ section\_syntax\_indicator & 1 & bslbf & \\ hw\_core\_flag & 1 & bslbf & \\ reserved & 2 & bslbf & \\ section\_length & 12 & uimsbf & \\ fpga\_core\_number & 16 & uimsbf & \\ reserved\_number & 5 & uimsbf & \\ current\_next\_indicator & 1 & bslbf & \\ section\_number & 8 & uimsbf & \\ last\_section\_number & 8 & uimsbf & \\ reserved\_future\_use & 4 & uimsbf & \\ update\_loop\_length & 12 & uimsbf & \\ for (i = 0; i \textless{}N; i++) \{ & & \\ descriptor() & & & \\ \hline \hline \end{tabular}
\end{table} 
Table 3: The update information table (UIT). The field fpga_core_size is 32 bits in length, informs the core size, and is used by applications in receivers to check if the entire bitstream content is reassembled. In turn, fpga_core_version identifies the core update version number and is used during the reassembling process to check if a receiver has already been updated. The following three fields are descriptors, which bear information about each transmitted core. That aside, a list of access points (PID and TID) is used to filter the private sections carrying hardware reconfiguration content. Table 5 presents the syntax of the descriptor fpga_core_module_name(), which is identified by descriptor_tag when set to \"0x01\", while descriptor_length identifies the size of the content located inside the next loop, and the next field, descriptor_core_length, identifies the size of the core_module_name information, where each character is coded with 8 bits.