# A Mayfly-Based Approach for CMOS Inverter Design with Symmetrical Switching
## 6 Conclusions  
This paper employs the Mayfly Algorithm (MA), one of the latest optimization algorithms, to find the optimal design of the CMOS inverter. The design problem is mathematically formulated as an optimization problem. Three case studies with different constraints and design criteria are presented to illustrate the effectiveness of the proposed optimization algorithm to find the global solution of the objective function. The results of the three case studies were used in the spice simulations in order to verify the results. In Case I, estimating of the fall time is found depending on the design parameters and 0.25 \(\upmu\)m TSMC CMOS technology manufacturing parameters. Case I is performed for eight different sets with different ranges of design parameters and design criteria. The results show compatibility between MA results and Spice results. The maximum fall time difference between Mayfly Algorithm and Spice Simulation for all design sets is equal to 2.075711 ns. In the second case, the goal is to design an inverter with symmetrical fall and rise times. In Case II, the MA is performed for eight design sets. The difference between the fall time and rise time is minimized as shown Spice simulations, where the maximum difference between fall time and rise time is equal to 0.9784731 ns. In Case III, the CMOS inverter is designed to achieve a symmetrical fall time and rise time and a symmetrical propagation delay time. Spice simulations show that symmetry was achieved in Case III with minimum difference equal to 0.312893 ns and maximum difference equal to 1.076540 ns. Negligible variations between the MA outcomes and the spice results are observed due to more complicated models used in Spice simulations compared to the theoretical mathematical equations used in the optimization method. When comparing optimization methods, the MA contains very simple approximate expressions, and it has fast convergence and a better chance to find the global best solution of the cost function.  
The values of the width to length ratio have to be slightly modified to meet design rules for the process technology used in fabricating the circuit. This modification will have an almost negligible effect on the rise and fall times. In the future, more work will be conducted to identify the optimal width to length ratio of CMOS transistors used in a CMOS inverter to achieve the minimum power dissipation and time delay. Achieving this optimal ratio is critical for developing more energy-efficient and high-performance electronic devices. The Mayfly Algorithm can not only help in optimizing the CMOS inverter but can also be extended to optimize more complex circuits, such as Schmitt trigger circuits. Schmitt trigger circuits are commonly used in applications such as signal processing, noise filtering, and waveform generation.  
Conceptualization, F.N.Z.; Methodology, A.A.; Software, F.N.Z.; Validation, H.A.; Formal Analysis, F.N.Z. and H.A.; Investigation, A.A. and H.A.; Resources, F.N.Z.; Data Curation, H.A.; Writing-Original Draft Preparation, F.N.Z. and H.A.; Writing-Review & Editing, A.A. and F.N.Z.; Visualization, A.A.; Supervision, F.N.Z.; Project Administration, F.N.Z. All authors have read and agreed to the published version of the manuscript.  
This research was funded by the Deanship of Research at Jordan University of Science and Technology. Grant number: 20220336. Sponsor's website: Jordan University of Science and Technology (just.edu.jo) ([[https://www.just.edu.jo/Pages/Default.aspx](https://www.just.edu.jo/Pages/Default.aspx)]([https://www.just.edu.jo/Pages/Default.aspx](https://www.just.edu.jo/Pages/Default.aspx)), accessed on 29 April 2023).  
**Data Availability Statement:** Not applicable.  
**Acknowledgments:** The author would like to thank the Deanship of Research at Jordan University of Science and Technology for supporting this work.  
**Conflicts of Interest:** The authors declare no conflict of interest.