# All-Digital Computing-in-Memory Macro Supporting FP64-Based Fused Multiply-Add Operation
## 4 Simulation and Discussion
For example, in round-to-nearest-even mode, the action depends on the relationship of the remaining bits to zero if the round bit equals 1. If the remaining bits are greater than zero, then the calculated values need to be increased. If the remaining bits are equal to zero, the calculated values will be rounded to the closest even number, specifically, the calculated values need to be increased when the sticky bit is equal to 1. Moreover, the calculated value will be truncated to obtain the final result if the round bit is equal to 0 in both round-to-nearest-even mode and round-to-zero mode. To verify the rounding functionality of **DCIM-FF**, we use the same set of input data in both round-to-nearest-even mode and round-to-zero mode. At the set of input data in the two rounding modes, a is 0x404a084410882110, which is approximately 52.0645771661 in decimal representation; b is 0 xc0510 df41 be837d0, which is approximately \(-\)68.2180242317 in decimal representation; the value of the sign bit in FP64 is 1 for number b, which is a \begin{table}
\begin{tabular}{c c c c} \hline \hline \multirow{2}{*}{**Input/Output**} & \multicolumn{2}{c}{**Data form**} \\ \cline{3-4}  & & **Normalized** & **Denormalized** \\ \hline \multirow{3}{*}{Input} & a & 0x405676f4 ede9 dbd4 & 0 xac7e15859290f \\ \cline{2-4}  & b & 0x40340 aa015402a80 & 0x3 fd9 fbf3f7 eefd \\ \cline{2-4}  & c & 0x407726f04 de09 bc1 & 0 xd375c9a74d3d \\ \hline Output & d & 0x40a0f6 acacac57 ff & 0x6272 fbb808f07 \\ \hline \multirow{3}{*}{**Input/Output**} & \multicolumn{2}{c}{**Rounding mode**} \\ \cline{3-4}  & & **Round-to-Nearest-even** & **Round-to-Zero** \\ \hline \multirow{3}{*}{Input} & a & 0x404a084410882110 & 0x404a084410882110 \\ \cline{2-4}  & b & 0x0510 df41 be837d0 & 0x0510 df41 be837d0 \\ \cline{2-4}  & c & 0x08603 ab87570 eae & 0x08603 ab87570 eae \\ \hline Output & d & 0 xc0b0a0338b14 cb85 & 0 xc0b0a0338b14 cb84 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Sample 1 results of **DCIM-FF**. negative number; c is 0x0c08603 ab87570 eae, which is approximately \(-704.4587542344\) in decimal representation; the value of the sign bit in FP64 is 1 for number c, which is negative number. For the mantissa calculated result using the above input data, the guard bit is 0; the round bit is 1; and the remaining bits are greater than zero. According to the above theory, the calculated value needs to be increased in round-to-nearest-even mode and truncated in round-to-zero mode. At the set of output data, d is equal to 0 xc0b0a0338b14 cb85 in round-to-nearest-even mode and 0 xc0b0a0338b14 cb84 in round-to-zero mode, which are both approximately \(-4256.2013409612\) in decimal representation; the value of the sign bit in FP64 is 1 for number d, which is a negative number. The results from those two modes shows a 1-bit difference from each other due to different rounding methods, which is consistent with the theory above. Due to the huge amount of data tested in the simulation (2 million groups), it is difficult to show all of them in this article, and only some samples can be used for display. More sampled test results can be found in Table 2, where the numbers in parentheses indicate approximately the decimal value corresponding to the 64b operand. Equation (2) (a \(\times\) b + c = d) can be verified from decimal arithmetic.