# Development of a Datalogger for Submarine Glider: Integration of Fault-Tolerant Software Layers
## 2 Datalogger Design
### Study and Choice of the ECC  
The storage device has two types of errors. The first one is due to the cells of the NAND flash memory chip are densely populated, and generate bit-flipping errors. Figure 5  
Figure 4: Block diagram of the datalogger software with connections to the information source and the NAND flash memory chip. Figure 3: Central controller and datalogger connection diagram. The central controller takes the data from the sensors and sends it to the datalogger. The datalogger is completely dedicated to storage. shows the behavior in the degradation of the NAND flash blocks. To reduce this bit error rate (BER), the storage device must have an error correction code. The second error is due to the existence of bad blocks. A bad block is a block where data cannot be written or erased. The way to detect bad blocks is by reading the first byte of the spare area of the first page in each block [50]. In the case that the first page would have a bad block mark (00 h), then, a table of bad blocks must be updated and stored in a flash section of the microcontroller. This operation must be performed during the first time that the NAND flash device is used. If a block is erased, the bad block marks are also erased. The NAND flash device used has an ECC embedded that corrects 1 bit for every 528 bytes. However, the ECC embedded is not enough to avoid all errors, and the data-logger could host other storage devices that do not contain embedded ECC. In addition, including an ECC increases the correction capability and therefore it is possible in this case to have a NAND flash memory chip reliability up to a \(CEP_{out}\) of 3%, that is, approximately 3 devices out of 100 will have at least one erroneous bit. In order to determine the code length and the corresponding correction capabilities of the BCH code, it was necessary to characterize all error features that are present in the NAND flash memory chip. According to the authors of [51; 52], the most common errors found in a NAND flash memory chip are random; however, erroneous bits are independently distributed, so the errors can be modeled as a Bernoulli process [53], with the following properties:  
* The experiment is based on repeated runs, each run consist of visualizing whether blocks composed of BCH codes of length \(n\) have errors. * For each bit, there are two types of results, i.e., defective and non-defective. * The number of successful runs must be similar at each run. In other words, the error in bits are independent events. The goal is to find a BCH code \((n,k,t)\) capable of achieve a low bit error probability, implementable in the microcontroller, that the data of interest (message) occupies most of the NAND flash memory chip. The parameter \(n\) is the code size, \(k\) is the message size,  
Figure 5: The NAND flash chip degradation shows that the write/erase cycles increase the raw bit error rate (RBER). This graph is for a NAND flash Micron 29F256G08 CJABB with a capacity of 32 GB. The type of input to store is constant. and \(t\) is the correction capability. The formula of the binomial distribution applied to the NAND Flash memory chip model [44,53] is represented in the following equation:  
\[P_{i}=\binom{n}{i}p^{i}(1-p)^{n-i}\quad i=0,1,2,\ldots,t \tag{1}\]  
The above equation \(P_{i}\) represents the probability that there are i errors within a BCH \((n,k,t)\) code of length \(n\). \(p\) is the error probability also known as raw bit error rate (RBER) before using ECC. When there are more than \(t\) errors in a code, then the correction can be considered failed. Then, the failure probability \(b\) in a block code of \(n\) bits to which the ECC that corrects \(t\) errors applied is  
\[b=1-(P_{0}+P_{1}+\cdots+P_{t}) \tag{2}\]  
The probability of error in the \(CEP_{out}\) NAND flash device with \(B\) blocks of \(n\) bits can be approximated with  
\[CEP_{out}(p)=1-(1-b)^{B} \tag{3}\]  
To propose the code and message length of the BCH code, a natural number \(m\) is used to meet the constraint \(m\geq 3\).