# Flexible Wearable Heart Rate Monitoring System and Low-Power Design: A Review
## 2 Overview of Flexible Wearable Heart Rate Monitoring Systems
### Low-Power Design Methods of Flexible Wearable Heart Rate Monitoring Systems
Mitigation strategies include using high-conductivity composites (e.g., silver nanowire/graphene hybrids), optimizing serpentine wiring geometries to reduce deformation-induced resistance changes, and increasing the thickness of the wire to reduce resistance. At the algorithm level, low-power design can be implemented according to the functions of each module to ensure low-power consumption while achieving module functionality. In the heart rate signal acquisition module, instead of using a fixed high sampling rate, a dynamic sampling frequency [68] switching algorithm can be employed. This algorithm allows the module to avoid continuous operation in high-frequency regions, thereby reducing overall power consumption. In the signal preprocessing module, by optimizing algorithm parameters [69], such as filter length, step size, and the number of iterations, the required number of repetitive calculations can be reduced under the same denoising requirements, significantly lowering computational load and energy consumption. For the signal computational processing module, model compression is a viable approach. Leveraging lightweight neural network algorithms [70], such as MobileNet or TinyML architectures, can minimize computational power consumption during the inference phase. In the signal output module, employing compression algorithms [71] can reduce transmission power consumption. Simultaneously, optimizing the transmission protocol is another effective way to decrease power usage. Hardware-algorithm co-design represents a form of deep coupling between hardware architecture and algorithmic characteristics [72], where algorithm optimization reduces hardware load [73] and hardware features enhance algorithm efficiency. Through hardware-algorithm co-design, the power consumption of each module can be effectively reduced. Designing working and sleep modes [74] within modules is a typical example of hardware-algorithm co-design. In the implementation process, sensors can be used to detect changes in the body's state to enable switching between working and sleep modes. These state signals are then transmitted to a microprocessor, which analyzes the data and employs corresponding algorithms to control the system's working or sleep states. This approach of achieving mode switching through hardware-algorithm collaboration can effectively reduce overall system power consumption. On the other hand, adopting customized processors and optimized model algorithms [75] is another effective hardware-algorithm co-design method for power reduction. By designing dedicated circuit architectures and applying model compression techniques, system complexity is significantly reduced, while model size and computational load are minimized. The dual optimization of hardware structure and algorithmic efficiency creates a synergistic effect, ultimately lowering the power consumption of wearable systems. In summary, the low-power design of each module in flexible wearable heart rate monitoring systems requires integrated optimization from three dimensions: hardware, the algorithm, and hardware-algorithm co-design. Hardware optimization reduces module power consumption by selecting low-power materials and piezoelectric materials, as well as optimizing circuit designs such as RC networks and application-specific integrated circuits. Meanwhile, it is necessary to specifically address the contact resistance and wiring resistance issues unique to flexible scenarios--contact resistance is controlled through electrode material optimization and heterogeneous interconnection improvement, while transmission loss is reduced by means of high-conductivity composite materials and structured wiring design. Algorithmic optimization significantly reduces computational load and energy consumption through methods such as dynamic sampling, parameter-tuned filtering, lightweight networks, and transmission compression.