## 2 Feedback Field-Effect Transistors (FBFETs)
### Positive Feedback Mechanism  
Feedback indicates that all or part of the output returns back to the input. Positive feedback has the characteristic that the input condition increases after a single process, and the re-input condition is repeated for the second process. Regenerative cycles thus continue to be positively amplified. FBFETs have two potential barriers, which are located in the channel region next to the source and drain, as in thyristors, and these prevent the flow of electrons and holes. As the potential barrier is formed, a potential wall is simultaneously formed on the opposite side, which has the lowest energy state for carriers. When a gate voltage is applied, positive feedback begins to operate through the lowered potential barrier. It is possible for carriers to flow from the source to the drain through the lowered potential barrier. Some electrons or holes are trapped in the potential wall in the channel region [63; 64; 65]. Charges induced by carriers trapped in the potential wall act on the energy band. Electrons increase the energy band in the adjacent region, meaning that the potential barrier on the opposite side of the potential wall is lowered. Holes have the opposite effect of electrons, causing the energy band to become higher. Trapped holes near the potential wall will cause barrier collapse. As the barriers have a lowered height, additional carrier flow occurs through the lowered barrier to operate the former process repeatedly. Once the operation has begun, the positive feedback loop can continue to operate without any additional voltage. As a result, higher currents can flow, as compared with the case in which only voltage was applied to the gate primarily to lower the potential barrier [63; 64; 65]. Figure 3 shows the loop for showing the positive feedback mechanism after the spacer is conditioned with trapped charges. The potential barrier height to block the electron flow induced by the trapped charge on the spacer is expressed as \(V_{Be}\), with an initial state between the N+ doping concentration region and the spacer region adjacent to the N+ region without the gate and drain bias at equilibrium. If there is super-elevation on the gate bias (\(V_{C0}\)) and drain bias (\(V_{D0}\)) at equilibrium, the additional reduction of the electron (hole) injection barrier can be defined as \(\phi_{e}\) (\(\phi_{h}\)). The height of the potential barrier blocking the electrons can be defined as (\(V_{Be}-\phi_{e}\)) [65]. The drift current can be neglected owing to the dominance of the diffusion current in the ideal diode equation. \(D_{n}\) and \(D_{p}\) are the diffusivity of electrons or holes, and \(L_{n}\) and \(L_{p}\) are the diffusion length for electrons or holes, respectively. \(n_{p}\) is the minority carrier concentration at the boundary \(x=-x_{p}\), and \(p_{n}\) is the minority carrier concentration at the boundary \(x=x_{n}\). \(k\) is Boltzmann's constant. When \(V_{C0}\) is applied to the gate and \(V_{D0}\) is applied to the drain, the initial electron current can be written using the Shockley equation, as follows:  
\[ \begin{split} I_{e0}=qA(D_{p}P_{n}L_{p}^{-1}+D_{n}n_{p}L_{n}^{-1}) \,(e^{[qV/(kT)]}-1),\\ =I_{ei}\,(e^{[q\phi/(kT)]}-1)\end{split}  \tag{1}\]For the same bias, the hole barrier (at the drain side) induced by the initial hole current can be written as follows:  
\[ \begin{array}{c}\mathrm{I_{h0}=qA(D_{p}P_{n}L_{p}{}^{-1}+D_{n}n_{p}L_{n}{}^{-1} )\left(e^{[qV/(kT)]}-1\right)\\ =\mathrm{I_{hi}}\left(e^{[\phi\phi/(kT)]}-1\right)\end{array}  \tag{2}\]  
Step 1. If we set the condition of a small change in the gate voltage or drain voltage, a small perturbation, \(\Delta Y\), of the electron injection barrier will occur. The \(\Delta Y\) caused by an exterior change will allow more electrons to be injected into the intrinsic Si region from the N+ region. The resulting change in electron current (\(\Delta L_{e}\)) is presented as follows:  
\[