## 4 Conclusions  
In this paper, we evaluate the statistical security and hardware metrics on a Xilinx PYNQ-Z2 FPGA board using VHDL of some chaotic maps, which are the basic components of the proposed PRNGs-CS. We first demonstrated that the studied chaotic maps have good hardware metrics but cannot be used alone as a secure PRNG. They are weak against statistical attacks and have recognized attractors. Furthermore, we have shown that XORing the output of a chaotic map with an LFSR improves the cryptographic properties of the coupled system. We then studied and implemented a new chaos-based stream cipher (SC) based on a proposed secure PRNGs-CS. The proposed chaotic systems use a weakly coupled matrix that prevents divide-and-conquer attacks on the initial vector (IV) and improves the randomness of the generated sequences. We then evaluated the cryptographic features of the proposed PRNGs-CS and analyzed their performance on hardware metrics. The achieved results show a high level of security on the one hand and good hardware metrics achieved by the proposed PRNGs-CS on the other hand. We then realized corresponding chaos-based stream ciphers and confirmed their resistance to cryptanalysis attacks. We also evaluated their hardware performance and compared them to several chaotic and non-chaotic systems. All the obtained results demonstrate that the proposed chaos-based stream ciphers are alternative candidates for data confidentiality and integrity. \begin{table}
\begin{tabular}{l l l l l l l} \hline \hline \multirow{2}{*}{**Cipher**} & \multirow{2}{*}{**Device**} & \multicolumn{2}{c}{**Frequency (MHz)**} & \multirow{2}{*}{**Slices**} & \multicolumn{2}{c}{**Throughput**} & \multicolumn{2}{c}{**Efficiency**} & \multirow{2}{*}{**Power (W)**} \\ \cline{3-3} \cline{6-7}  & & **Clock Frequency Max. Freq.** & & & & **(Mbps)** & **(Slices)** \\ \hline LSP-SC & PYNQ-Z2 & 125 & 32.41 & 3160 & 1037.27 & 0.32 & 0.152 \\ LST-SC & PYNQ-Z2 & 125 & 36.84 & 1049 & 1179.07 & 1.12 & 0.099 \\ LSPT-SC & PYNQ-Z2 & 125 & 31.00 & 3385 & 992.21 & 0.29 & 0.182 \\ LST\_RC-SC [7] & PYNQ-Z2 & 125 & 36.78 & 1186 & 1177.20 & 0.99 & 0.101 \\ LWCB SC [20] & Zynq-7000 & - & 18.5 & 2363 LUTs & 565 & - & - \\ Lorenz’s chaotic System [21] & Virtex-II & 50 & 15.598 & 1926 & 124 & 0.06 & - \\ Chaos-ring [22] & Virtex-6 & 125 & 464.688 & 1050 & 464.688 & 0.44 & - \\ Trivium [45] & Spartan 3 & 50 & 190 & 388 & 12,160 & 31.34 & - \\ Grain-128 [46] & Virtex- II & 50 & 181 & 48 & 181 & 3.77 & - \\ Mickey-128 [46] & Virtex- II & 50 & 200 & 190 & 200 & 1.05 & - \\ ZUC stream cipher & PYNQ-Z2 & 125 & 79.52 & 246 & 2544.53 & 10.34 & 0.23 \\ \hline \hline \end{tabular}
\end{table} 
Table 13: Comparison of hardware metrics usage among various chaotic and non-chaotic systems. \begin{table}
\begin{tabular}{l l l l l} \hline \hline  & & \multicolumn{4}{c}{**Chaos-Based Stream Ciphers**} \\ \cline{3-5} \multicolumn{1}{c}{} & & **LSP-SC** & **LST-SC** & **LSPT-SC** \\ \hline \multirow{4}{*}{Resources used} & \multirow{2}{*}{Area} & LUTs & 10,420/19.59\% & 3549/6.67\% & 11,416/21.46\% \\  & & FFs & 448/0.42\% & 531/0.50\% & 577/0.54\% \\  & & Slices & 3160/23.71\% & 1049/7.89\% & 3385/25.45\% \\ \cline{2-5}  & DSPs & & 13/5.91\% & 25/11.36\% & 28/12.73\% \\ \hline \multirow{4}{*}{Speed} & WNSi (ns) & & 0.050 & 0.060 & 0.149 \\  & Ti (ns) & & 30.90 & 27.20 & 32.40 \\ \cline{1-1}  & Max. Freq. (MHz) & & 32.41 & 36.84 & 31.00 \\ \cline{1-1}  & Throughput (Mbps) & & 1037.27 & 1179.07 & 992.21 \\ \cline{1-1} \cline{2-5}  & Efficiency (Mbps/Slices) & & 0.32 & 1.12 & 0.29 \\ \cline{1-1} \cline{2-5}  & Power (W) & & 0.152 & 0.099 & 0.182 \\ \hline \hline \end{tabular}
\end{table} 
Table 12: Hardware metrics results of the proposed chaos-based stream ciphers. **Author Contributions:** Conceptualization, F.D. and S.E.A. ; formal analysis, F.D. and S.E.A. ; methodology, F.D. ; writing--original draft, F.D. ; writing--review & editing, F.D. and S.E.A. ; validation, S.E.A., M.M., and W.E.H.Y. All authors have read and agreed to the published version of the manuscript.