## 3 Enhanced Name Resolution System
### Partitioning-Based Registration and Resolution
#### 3.2.1 HEA partitioning algorithm
\begin{table}
\begin{tabular}{l l l l} \hline \hline
**Symbol** & \multicolumn{1}{c}{**Meaning**} & **Symbol** & **Meaning** \\ \hline \(i\) & the hierarchical number of Hierarchical Elastic Areas & \(j\) & the count of selected resolver location \\ (HEA) & & & \\ \(k\) & the count of partitional i-th level HEA & \(V_{i}^{m}\) & the node set of \(G_{i}^{m}\) \\ \(T_{i}\) & the partitioning latency bound of i-th level HEA & \(N_{i}^{m}\) & the node count of \(G_{i}^{m}\) \\ \(HM_{ik}\) & the k-th resolver of i-th level HEA & \(N\) & the node count of \(G\) \\ \(A_{i}^{j}\) & the candidated resolver location of j-th HEA in i-th level. & \(C_{i}\) & the count of i-th level HEA \\ \(R_{i}\) & the resolver location set of all the i-th level HEA & \(H_{i}^{k}\) & the set of nodes belonging to the k-th \\ \(S_{i}\)\(G_{i}^{m}\) & the node set of i-th level input graph the m-th subgraph & \(\_\) & HEA in i-th level \\ \(S_{i}\)\(G_{i}^{m}\) & the node set of i-th level input graph - & \(\_\) & HEA in i-th level \\ \(S_{i}\)\(G_{i}^{m}\) & the node set of i-th level input graph the m-th subgraph & \(\_\) & HEA in i-th level \\ \(S_{i}\)\(G_{i}^{m}\) & the node set of i-th level input graph the m-th subgraph & \(\_\) & HEA in i-th level \\ \(S_{i}\)\(G_{i}^{m}\) & the node set of i-th level input graph - & \(\_\) & HEA in i-th level \\ \hline \hline \end{tabular}
\end{table} 
Table 1: The meaning of symbols in Algorithm 1. ```
1:Input:\(G(V,E,W)\), \(\{T_{1}\}\), \(L\), \(D\)
2:Output:\(\{HM_{ik}\}\), \(\{H_{i}^{k}\}\), \(1\leq i\leq L\), \(1\leq k\leq K_{i}\)
3:Parameters:\(HM_{i}^{k}\), \(A_{i}^{j}\), \(G_{i}^{m}\) (\(V_{i}^{m},E_{i}^{m},W_{i}^{m}\)), \(V_{i}^{m}\), \(N_{i}^{m}\)
4:Initialization: \(i=L\), \(j=0,k=0\), \(S_{i}=\left\{v_{p}\right\}\)
5:While (\(i\geq 1\)) do:
6:Get \(T_{i}\):
7:Delete the edges in \(G\) where \(w_{pq}\geq T_{i}\) to cut off \(G\);
8:Assume that we get M counts maximum connected component \(\left\{G_{i}^{m}(V_{i}^{m},E_{i}^{m},W_{i}^{m})\right\}\), \(1\leq m\leq M\);
9:Sort all of the \(G_{i}^{m}(V_{i}^{m},E_{i}^{m},W_{i}^{m})\) by descending order according to \(N_{i}^{m}\);
10:for\(m\) from \(1\) to \(M\) do
11:Get \(G_{i}^{m}(V_{i}^{m},E_{i}^{m},W_{i}^{m})\);
12:if\(N_{i}^{m}=1\) then:
13:Set the isolated node as \(A_{i}^{j}\) of i\({}^{\text{th}}\) level HEA; \(HM_{ik}=A_{i}^{j}\)
14:Add the node into \(H_{i}^{k}\);
15:\(\text{k}=\text{k}+1\);
16:\(\text{j}=\text{j}+1\);
17:endif
18:else:
19:Select an anchor node \(A_{i}^{j}\) from \(V_{i}^{m}\) whose weighted sum of bandwidth, CPU, storage capacity is the best as \(HM_{ik^{\prime}}HM_{ik}=A_{i}^{j}\);
20:Set \(A_{i}^{j}\) as root, then use BFS to find those \(v_{p}\) on the path to \(A_{i}^{j}\) whose latency is less than or equal than \(T_{i}\) and add them into \(H_{i}^{k}\);
21:Delete \(A_{i}^{j}\) and all the selected \(v_{p}\) from \(V_{i}^{m}\);
22:if\(i-1>0\):
23:Add \(HM_{i}^{k}\) and selected \(v_{p}\) into \(S_{i-1}\);
24:endif
25:\(\text{k}=\text{k}+1\);
26:\(\text{j}=\text{j}+1\);
27:if\(V_{i}^{m}=\varnothing\) then:
28: finish processing \(G_{i}^{m}\);
29:endif
30:else:
31:return to 16;
32:endif
33:end if
34:end for
35:\(C_{i}=k\)
36:if\(i-1>0\):
37:\(i=i-1\)
38: get the connection information of nodes in \(S_{i-1}\) from \(G\) to generate a new graph \(G^{\prime}(V^{\prime},E^{\prime},W^{\prime})\);
39: set \(G\) as the input graph of the (i-1)-th level HEA partitioning; \(G=G^{\prime}(V^{\prime},E^{\prime},W^{\prime})\);
30:return to 2;
31:endif if
32:end while
```  
**Algorithm 1**Latency-aware HEA Partitioning