# An Electronically Adjustable Floating Memcapacitor Emulator Circuit Using CDBA
## 2 Proposed Memcapacitor Emulator Circuit
The (Current Buffered Transconductance Amplifier) CBTA and Current Differencing Transconductance Amplifier (CDTA) architectures enhance the CDBA by integrating a controllable transconductance stage (g\({}_{\text{m}}\) block) at the output, allowing electronic tuning of critical circuit parameters such as gain and cutoff frequency via an external control voltage or bias current. However, this added tunability comes at the cost of increased power consumption (typically 500-1200 \(\upmu\)W), higher noise levels (ranging from 30 to 100 nV/ \(\sqrt{\text{Hz}}\)), and greater structural complexity [49]. The Second-Generation Current Conveyor (CCII) offers excellent high-frequency performance, often achieving bandwidths exceeding 100 MHz, with noise performance in the 40-100 nV/ \(\sqrt{\text{Hz}}\) range. However, its lack of a current differencing input makes it less suitable for differential signal processing applications where the CDBA naturally excels [50]. In conclusion, the CDBA offers a compelling combination of robust high-frequency behavior, moderate noise, high slope speed, linear differentiation, buffer output capability low power requirements, and design simplicity [51; 52; 53]. These attributes make it a strong candidate for use in high-performance analog and mixed-signal circuits, especially where design stability and signal integrity are critical. Taking these benefits into account, a CDBA-based memcapacitor emulator circuit is proposed as shown in Figure 2. The emulator circuit consists of a CDBA, an integrator, an operational amplifier and some passive elements. The mathematical analysis of the emulator circuit can be given as follows:  
Figure 1: Internal structure of the CDBA. The input voltage of the emulator circuit with the floating characteristic is defined as  
\[v_{in}(t)=v_{x}-v_{y}. \tag{6}\]  
Here, \(v_{x}\) is equal to the voltage across capacitor \(C_{x}\) and is expressed by  
\[v_{x}=v_{C_{x}}=\frac{1}{C_{x}}\int_{t_{0}}^{t}i_{C_{x}}dt=\frac{q(t)}{C_{x}}. \tag{7}\]  
\(v_{y}\) is the output of the four quadrant AD633 analog multiplier and is given by the equation  
\[v_{y}=\pm\alpha.v_{s}.v_{w} \tag{8}\]  
where \(\alpha=1/(10\) Volt) as a property of the AD633 and \(v_{s}\) is the integrator output. If the \(Y_{1}\) terminal in the schematic of the AD633 is used, (8) takes a positive value, and if the \(Y_{2}\) terminal is used, it takes a negative value. The current expression in (5) becomes \(i_{n}=i_{p}/2\) because \(i_{n}\) is equal to \(i_{z}\) due to the resistor \(R_{b}\) in the emulator circuit. Therefore, the voltage of \(R_{b}\) can be written in the form of  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]0  
Since the voltage of \(R_{a}\) is equal to \(v_{x}\) and the current passing through \(R_{a}\) is equal to \(i_{p}\), \(v_{w}\) is stated as  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]1  
The output of the integrator is  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]2  
Taking into account (7), (11) becomes  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]3  
Since the integral of the charge in time is denoted by \(\sigma\), (12) can be expressed simply as follows  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]4  
\[C_{M}(\varphi)=\frac{q(t)}{v(t)}=\frac{d\sigma}{dt}\frac{dt}{d\varphi}=\frac{ d\sigma}{d\varphi}. \tag{2}\]5 Schematic diagram of the proposed CDBA-based memcapacitor emulator circuit.