# A Thorough Evaluation of GaN HEMT Degradation under Realistic Power Amplifier Operation
## 5 Experimental Results
### Class-E Stress at 30 \({}^{\circ}\)C  
As in the previous case, the class-E stress condition was applied to a new sample at 30 \({}^{\circ}\)C for a total of 60 h. We report the waveforms and the performance evolution  
Figure 6: Stress measurement results for the 2 MHz tuned-load class-AB condition at 30 \({}^{\circ}\)C: (**a**) load lines vs. initial DC I/V characteristics (grey lines), (**b**) drain voltage waveforms, (**c**) drain current waveforms, (**d**) input loci, (**e**) gate voltage waveforms, (**f**) gate current waveforms with the evolution of its maximum instantaneous value in the inset, (**g**) average gate current, (**h**) average drain current, (**i**) output power, and (**j**) drain efficiency. From (**a–f**), the black dashed lines represent the initial state of the DUT, whereas the red continuous lines represent the final state of the DUT.  
Figure 7: DC control measurements for the 2 MHz tuned-load class-AB condition at 30 \({}^{\circ}\)C: (**a**) \(I_{D}\)-\(V_{G}\) trans-characteristic measured before (black dashed line) and after (red continuous line) the stress, (**b**) saturated drain current at \(V_{G}\) = 2 V versus stress time, and (**c**) gate voltage for \(I_{D}\) = 100 mA/mm versus stress time.  
throughout the stress measurement in Figure 8. We can observe a slight variation of the load line (Figure 8a), this time due to a reduction in both the drain voltage and the drain current, whose peak value decreased from 86.7 V to 85.3 V (\(-\)1.6%), as illustrated in Figure 8b,c. This produces a reduction in the output power from 3.48 W/mm to 3.33 W/mm (\(-\)4.6%), and in the drain efficiency, from 67.7% to 66.0%, as shown in Figure 8i,j, respectively. In this case, the gate current was negligible throughout the entire experiment, since neither forward nor reverse conduction of the Schottky junction was present. Therefore, no significant change was observed in the input waveforms (Figure 8d-f). The evolution of the average currents over the stress time is also interesting. The average gate current was slightly positive but very small and became very noisy after approximately 0.1 h from the beginning of the measurement. The average drain current also exhibited a peculiar behavior. The largest variation appeared at the very beginning of the test, with a sharp decrease around 0.1 h. Then, it seemed to settle for 10 h, and to decrease again until the end of the measurement. It is interesting to observe that when the average drain current shows the faster variations, the average gate current becomes noisier, highlighting that the device behavior is changing due to some degradation mechanism.  
Figure 8: Stress measurement results for the 2 MHz class-E condition at 30 \({}^{\circ}\)C: (**a**) load lines vs. initial DC I/V characteristics (grey lines), (**b**) drain voltage waveforms, (**c**) drain current waveforms, (**d**) input loci, (**e**) gate voltage waveforms, (**f**) gate current waveforms, (**g**) average gate current, (**h**) average drain current, (**i**) output power, (**j**) and drain efficiency. From (**a–f**), the black dashed lines represent the initial state of the DUT, whereas the red continuous lines represent the final state of the DUT.  
In Figure 9, we show the data collected from the DC control measurements executed in between stress sessions. The results show a similar trend to the previous ones, although the decrease in the DC drain current (from 866 mA/mm to 820 mA/mm, \(-\)5.3%) and the change in the device threshold seem more accentuated.