## 6 Experimental Testbed Design  
The control signal and data acquisition for this testbed application is given through a FRDM-K64F development board, which according to [29], has an MK64 FN1M0 VLL12 Microcontroller working at  
Figure 13: Convergence plot of the error through iterations.  
120 MHz, with 1024 KB of Flash memory, 256 KB of SRAM memory, and an integrated Floating Point Unit (FPU).  
On the other hand, Figure 14 shows the complete schematic (in EAGLE (v.9.6.1)(Autodesk Inc.; San Rafael, CA, USA)) of the designed circuit for the experimental validation; where, for the gate activation of the MOSFET, a UCC27511A single-channel gate driver was selected since (according to [30]) its a high-speed compact gate driver perfectly suitable for DC-DC converters applications. Hence, the layout of the driver was made as recommended in [30], where the resistances are estimated in order to achieve a fast response from the driver with immunity against the parasitic Miller turn-on effect.  
Additionally, it is important to highlight the implementation of the current sensor _MAX44285H_, which was selected due to the high-precision allowable from the Current-Sense Amplifier (as defined in [31]). Therefore, since [31] recommends for a better performance, to operate the sensing voltage difference around 25 mV for the 100 V/V gain amplifier, a 0.3 \(\Omega\) shunt resistor was selected for the design.  
Therefore, following the schematic design from Figure 14, Figure 15 shows the PCB designed (also through EAGLE (v.9.6.1)(Autodesk Inc.; San Rafael, CA, USA)) as testbed for the DC-DC converters evaluation; where it was sought to follow the arrangement pattern of the diagram of a classic buck  
Figure 14: Schematic of the experimental testbed.  
Figure 15: Printed Circuit Board (PCB) design of the experimental testbed.  
converter model (as shown in Figure 2), in order to facilitate the location of the components presented in this work.  
Moreover, it is critical for a correct evaluation of the converters to clarify the purpose of the LED indicators in the circuit, since the LED1 (left-side LED from Figure 15) is for the 24 V source power indicator; but LED2 is implemented for safety purposes in the circuit, since ensures a constant load in the circuit when there is no connection in \(R_{LOAD}\) or \(V_{OUT}\). Nevertheless, LED2 can be decoupled from the rest of the circuit by removing the header that connects the terminals to the circuit.  
Accordingly, the testbed was designed for different applications, where a fixed load can be maintained by welding a resistive load in the \(R_{LOAD}\) drills. In addition, a DC Electronic Load or any other load type can be connected for different tests in the \(V_{OUT}\) terminals.  
Henceforth, in order to properly evaluate the designed converter and compare it against the previous design, two identical PCBs were manufactured with the inductance value as the only difference between them. Then, Figure 16 shows the experimental testbeds designed for the converters evaluation, where it can be clearly seen that both boards are identical PCBs, except for the value of the inductors, where in the first plate there is a 472 inductor and in the second one an inductor 331. The precise values and features of the selected inductors will be explained and detailed in the following section.