# Automatic Initialization Methods for Photonic Components on a Silicon-Based Optical Switch
## 2 Optical Switch Architecture  
The IRIS switch has a cross-bar topology, which is the most appropriate switch fabric for a multi-port switch, where the loss values of the switching elements in both the off- and on-state must be as low as possible [17]. In Figure 1 (left), a comb of 12 WDM channels (200 GHz spacing) reaches one of the four fiber-pigtailed input ports of the chip. At the input port, the optical signal is coupled into the photonic chip, through a single polarization grating coupler (SPGC). A multi-wavelength waveguide leads the signal to a de-interleaving stage (interleavers), which separates the channels into odd and even wavelengths (spacing relaxed to 400 GHz) [18]. Then, the two subsets of wavelengths move toward two \(1\times 6\) AWGs, which take the single optical channels apart into dedicated waveguides [19]. After the de-multiplexing stage, we have the switching matrix, where the double MRR-based switching nodes placed at the waveguide crossings can be trimmed, to drop the signal from each line. In fact, each MRR of the system comes with a dedicated metallic heater, which can be independently biased to shift the MRR resonance by the thermo-optic effect [20; 21]. By design, all MRRs are not resonating with the wavelengths carried by the line waveguides (off-state). However, when a specific bias is applied to the heaters of a switching node, it comes in resonance (on-state) and drops the signal from the line waveguide. Thermal crosstalk is negligible. Simulations and experimental results show that, for an MRR in the off state, the thermal crosstalk from adjacent MRRs move the resonance by less than 16 GHz [11]. Integrated photo-diodes placed after each stage, allow for an optimization based on optical feedback. We will describe the optimization method used to find the proper bias values for the two MRRs of a switching node, to drop a wanted wavelength in the next section. Moreover, at the end of Section 5, we will address how to tackle the case of some MRRs that happened to be partially aligned, even though they should be in the off-state by design. The switching matrix has a total of \(4\times 12\) rows and \(8\times 2\) columns. Each row is dedicated to a single wavelength, as it is depicted in the figure, using different colors. Each column collects the optical signals possibly dropped by the switching nodes and re-combines them (through an interleaver) to one output fiber. Focusing on the path highlighted in light pink, the demultiplexed signal travels into a row, until it gets to a column crossing where the two MRRs are tuned in resonance (second switch node in Figure 1). There, the signal is dropped toward the corresponding output port. If the MRRs are not in resonance with the wavelength carried by the row, the optical signal passes through (as it happens for the other switch nodes in the figure). The 1572 switching node heaters in the IRIS chip are controlled by an electronic chip that is bonded in a 3D fashion on the photonic one (on the right in Figure 1). This makes it easy to access each single heater through copper pillars from the top. As for the MRRs, the interleaves arms can be thermally affected, as well. The interleavers are based on an unbalanced Mach-Zehnder interferometer (MZI) design [22]. Each MZI branch has a dedicated heater on top, which can be independently operated. This makes it possible to cope with the production inaccuracy, which prevent the interleaves to work properly, as they have been designed. The next section describes the automatic method implementedto optimize the interleaver spectral response. Moreover, the IRIS chip is provided for a Peltier cell, which allows shifting the temperature of the whole systems. This can be used to counteract overall fabrication errors (e.g., variations in the SOI thickness [23]), shifting the transfer function of each photonic component on the chip in a rigid way.