# A C-Based Framework for Low-Cost Real-Time Embedded Systems
## 8 Performance Evaluation and Analysis
### Time-Driven Execution Performance
The main conclusion that can be drawn from those results is that the overhead is dominated by Modbus CAN I/O time rather than RtFw. In turn, Modbus CAN I/O time depends for the most part on the CAN bus bit rate [41], which has already been set to the maximum in the experiments. More specifically, the total RtFw overhead \(t_{\text{RtFw}}\) for inter-layer synchronization and I/O setup can be written as  
\[t_{\text{RtFw}}=t_{1}+t_{2}+t_{O,1}+t_{I,2}, \tag{1}\]  
and its average in the experiments was \(\overline{t_{\text{RtFw}}}=37.41\) us. In contrast, the average Modbus CAN I/O time \(t_{IO}\), expressed by  
\[t_{IO}=t_{O,2}+t_{I,1}, \tag{2}\]  
was \(\overline{t_{IO}}=675.53\) us. Therefore, \(t_{\text{RtFw}}\) represents less than 6% of the total overhead even when it is maximized by reducing the I/O time to the minimum (1 input and 1 output 16-bit I/O point). Another important aspect is the extremely low standard deviation of \(t_{\text{RtFw}}\), which stayed consistently below what could be measured during the experiment. This confirms the suitability of RtFw for accurate real-time embedded applications, despite the higher level of abstraction it introduces in programming them. The second part of the evaluation focused on the behavior of \(t_{O}\) and \(t_{I}\) as a function of the number of 16-bit I/O points. The results are shown in Table 2. The maximum number of I/O points considered in the experiments was 8 because Modbus I/O boards typically have between 2 and 8 analog inputs or outputs, each accessed by means of a 16-bit register [55]. The number of digital I/Os may be larger, but up to 16 of them are normally packed into the same I/O register. Besides confirming the expected direct dependency of \begin{table}
\begin{tabular}{l r r r r} \hline \hline \multirow{2}{*}{**Operation**} & \multicolumn{3}{c}{**Delay (\(\mu\)s)**} \\  & \multicolumn{1}{c}{\(\mu\)} & \multicolumn{1}{c}{\(\sigma\)} & \multicolumn{1}{c}{**Min**} & \multicolumn{1}{c}{**Max**} \\ \hline \multicolumn{5}{l}{Local Operations} \\ \(t_{1}\) & (timer task activation) & 3.46 & 0.00 & 3.46 & 3.46 \\ \(t_{2}\) & (control function activation) & 18.75 & 0.06 & 18.69 & 18.89 \\ \hline \multicolumn{5}{l}{Output Operations, 1 16-bit I/O point} \\  & \(t_{O,1}\) (Gathering) & 11.61 & 0.00 & 11.61 & 11.61 \\  & \(t_{O,2}\) (Output bus transaction) & 398.58 & 0.83 & 396.81 & 400.82 \\ \(t_{O}\) & (Total) & 410.19 & 0.83 & 408.42 & 412.43 \\ \hline \multicolumn{5}{l}{Input Operations, 1 16-bit I/O point} \\  & \(t_{I,1}\) (Input bus transactions) & 276.96 & 1.09 & 274.80 & 279.90 \\  & \(t_{I,2}\) (Scattering) & 3.59 & 0.00 & 3.59 & 3.59 \\ \(t_{I}\) & (Total) & 280.55 & 1.09 & 278.39 & 283.49 \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Measurement of the delays shown in Figure 12, 490 sample points. \(t_{I}\) and \(t_{O}\) from the number of I/O points, the additional measurements confirm that the combined input and output standard deviation does not increase significantly and stays below 6 us in all considered scenarios. The extra jitter incurred by \(t_{I}\) when the number of I/O points exceeds two can be attributed to additional interference from the 1 ms RTOS tick handler that overlaps with the I phase of the control cycle in those cases, as also depicted in Figure 12.