# Transimpedance Amplifier for Noise Measurements in Low-Resistance IR Photodetectors
## 3 Materials and Methods  
The schematic of the proposed ultra-low-noise TIA amplifier is presented in Figure 2. The very-low-noise discrete JFET pair IF3602 is used to provide an ultra-low-noise input stage in front of the low-noise BJT input operational amplifier OPA227. The transistor \(Q_{1}\), together with the resistance \(R_{SS}\), behaves as a current source for biasing the JFET pair (\(J_{1}\) and \(J_{2}\)). The collector current \(I_{C1}\) of \(Q_{1}\), with \(V_{DD}=V_{SS}\) = 12 V, is approximately:  
\[I_{C1}=\frac{V_{SS}-V_{BEON}}{R_{SS}}\approx 7\ \mathrm{mA} \tag{7}\]  
where \(V_{BEON}\) is the voltage drop between the base and the emitter of \(Q_{1}\) in the active region (in the range from about 0.6 to 0.7 V). At rest and under ideal conditions, the gate voltages \(V_{G1}\) and \(V_{G2}\) of \(J_{1}\) and \(J_{2}\) are at zero potential, so that the two JFETs operate with the same current: \(I_{D1}=I_{D2}=I_{C1}/2\) = 3.5 mA. The voltage drop across the drain resistances \(R_{D1}\) and \(R_{D2}\) is, therefore, 7 V, so that the drain-to-gate voltages \(V_{DG1}\) and \(V_{DG2}\) are maintained at about 5 V, ensuring operation in the active region (the typical pinch-off voltage for the IF3602 is \(-\)350 mV). The values of the bias currents for \(J_{1}\) and \(J_{2}\) are the result of a compromise between the need for low noise (equivalent input noise decreaseswhen increasing bias) and the need to limit the power dissipated by the active devices in order to limit the convective motion of the air close to the JFET, which can induce large fluctuations at low frequencies. With the selected bias, the total power dissipated by the IF3602 is 35 mW, which is a small fraction of the maximum allowed power dissipation for the device (300 mW). At the same time, the transimpedance gain \(g_{\rm m}\) of each JFET can be expected to be about 70 mA/V [14], and, because \(R_{D1}=R_{D2}=R_{D}=2\) k\(\Omega\), the differential voltage gain \(A_{VDJ}\) of the JFET differential stage at low frequencies can be estimated to be:  
\[ \begin{array}{l}A_{VDJ}=\frac{v_{adj}}{v_{adj}}=g_{m}R_{D}\approx 140\ (43\ {\rm dB}),\\ v_{adj}=v_{D2}-v_{D1};v_{idj}=v_{G1}-v_{G2}\end{array}  \tag{8}\] \begin{table}
\begin{tabular}{c c c} \hline \hline
**Component** & **Name** & **Type/Value** \\ \hline \(J_{1},J_{2}\) & Low-noise JFET differential pair & Interfet IF3602 \\ OA\({}_{1}\) & Low-noise operational amplifier & OPA227 \\ OA\({}_{2}\) & Low-noise operational amplifier & ADA4625 \\ OA\({}_{3}\) & Low-noise operational amplifier & OPA140 \\ \(R_{1},R_{2}\) & 0.1\%, 1/4 W, SMD 1206 & 10 \(\Omega\), 1 k\(\Omega\) \\ \(R_{D1},R_{D2}\) & 0.1\%, 1 W, metallic film & 2 k\(\Omega\) \\ \(R_{SS}\) & 1\%, 1 W, metallic film & 1.65 k\(\Omega\) \\ \(R_{A1},R_{A2}\) & 0.1\%, 1/4 W, SMD 1206 & 1 M\(\Omega\) \\ C\({}_{A1}\) & Polyester & 22 uF \\ C\({}_{A2}\) & Polyester & 10 uF \\ \(Q_{1}\) & Bipolar transistor & ZTX450 \\ \(R_{C1},C_{C1}\) & \(\longrightarrow\) & 470 \(\Omega\), 470 nF \\ \(R_{C2},C_{C2}\) & \(\longrightarrow\) & 100 \(\Omega\), 22 nF \\ \(R_{T}\) & Multitrim potentiometer & 100 k\(\Omega\) \\ \(R_{o}\) & 0.1\%, 1/4 W, SMD 1206 & 10 M\(\Omega\) \\ \(R_{R}\) & 0.1\%, 1/4 W, SMD 1206 & 1 k\(\Omega\) or 10 k\(\Omega\) \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Component list for the circuit in Figure 2.  
Figure 2: Proposed TIA amplifier. The component types and their values are listed in Table 1.  
The cascade of the discrete JFET input stage with the OPA227 operational amplifier results in a Super Operational Amplifier (SOA in Figure 2), where the nodes \(G_{1}\) and \(G_{2}\) represent the non-inverting and inverting inputs, respectively. From Equation (8) and the fact that the DC gain of the OPA227 is about 160 dB, the DC gain of the SOA is above 200 dB, and therefore the internal compensation of the OPA227 is not sufficient to ensure stability for the entire amplifier.