## 2 Proposed Single-Input Multi-Output Inverter
### Operating Principle  
To simplify the analysis, assume the power switches are ideal devices, meaning their state transition is completed immediately. The equivalent circuits of the proposed inverter in all operating modes are shown in Figure 3. The main operating waveforms of the proposed inverter are shown in Figure 4, where the operating cycle is \(T\), the energy storage duty cycle of inductor \(L\) is \(D\), the turned-off duty cycle of \(S_{2}\) is \(D_{1}\), and the turned-off duty cycle of \(S_{3}\) is \(D_{2}\). \(U_{b}\) is defined as the amplitude of the inverter output voltage and can be expressed as  
\[U_{b}=U_{C}+U_{dc} \tag{1}\]Figure 1: Inverter output expansion method. (**a**) Half-bridge inverter. (**b**) The first expansion. (**c**) The second expansion.  
Figure 2: Evolution process of the proposed inverter. (**a**) Topological evolution process. (**b**) Topology of the proposed inverter.  
The analysis of all operating modes of the proposed inverter is as follows.  
1. During time 0-\(t_{1}\), it is in mode 1. \(S_{1}\) is turned off, while \(S_{2}\), \(S_{3}\), and S\({}_{4}\) are turned on. Due to \(S_{1}\) being turned off, \(C\) is connected in series with the DC power supply and supplies power to the load of the first output through \(S_{2}\)-\(S_{4}\). At the same time, \(L\) is  
Figure 4: Main operating waveforms of the proposed inverter.  
Figure 3: All operating modes of the proposed inverter. (**a**) Mode 1. (**b**) Mode 2. (**c**) Mode 3. (**d**) Mode 4.  
connected in parallel with the DC power supply through \(S_{3}\) and \(S_{4}\) to start storing energy, and the current \(i_{L}\) begins to increase linearly. In this mode, the output voltage of the inverter is \(u_{1}=U_{b}\), \(u_{2}=u_{3}=u_{4}=0\).
2. During time \(t_{1}-t_{2}\), it is in mode 2. \(S_{2}\) is turned off, while \(S_{1}\), \(S_{3}\), and \(S_{4}\) are turned on. Due to \(S_{2}\) being turned off, \(C\) is connected in series with the DC power supply and supplies power to the load of the second output through \(S_{1}\), \(S_{3}\), and \(S_{4}\). \(L\) continues to store energy and \(i_{L}\) continues to rise linearly. In this mode, the output voltage of the inverter is \(u_{2}=U_{b}\), \(u_{1}=u_{3}=u_{4}=0\).
3. During time \(t_{2}-t_{3}\), it is in mode 3. \(S_{3}\) is turned off, while \(S_{1}\), \(S_{2}\), and \(S_{4}\) are turned on. Due to \(S_{3}\) being turned off, \(C\) is connected in series with the DC power supply and supplies power to the load of the third output through \(S_{1}\), \(S_{2}\), and \(S_{4}\). At the same time, \(L\) starts to release energy by an anti-parallel connection with \(C\) through \(S_{1}\) and \(S_{2}\), and \(i_{L}\) begins to decrease linearly. In this mode, the output voltage of the inverter is \(u_{3}=U_{b}\), \(u_{1}=u_{2}=u_{4}=0\).
4. During time \(t_{3}-T\), it is in mode 4. \(S_{4}\) is turned off, while \(S_{1}\), \(S_{2}\), and \(S_{3}\) are turned on. Due to \(S_{4}\) being turned off, \(C\) is connected in series with the DC power supply and supplies power to the load of the fourth output through \(S_{1}-S_{3}\). \(L\) continues to release energy and \(i_{L}\) continues to decrease linearly. In this mode, the output voltage of the inverter is \(u_{4}=U_{b}\), \(u_{1}=u_{2}=u_{3}=0\).  
At time \(T\), the current operating cycle ends, then \(S_{1}\) is turned off, while \(S_{2}\), \(S_{3}\), and \(S_{4}\) are turned on, and the proposed inverter enters the next operating cycle.