# Design Techniques for Low-Voltage RF/mm-Wave Circuits in Nanometer CMOS Technologies
## 4 Circuit Topologies for Low-Voltage Operation of RF/mm-Wave Blocks
The CS topology can be adopted for either LNAs [34] or PAs [35; 36; 37], provided that differential cross-coupled neutralization is used to compensate for the gate-drain capacitances, \(C_{\text{gd}}\), thus improving the input/output isolation and guarantying frequency stability. Neutralization can be implemented with simple integrated capacitors, \(C_{\text{N}}\), or by means of an additional pair of MOS transistors, to better track the process variation. Neutralized CS is a very effective solution for low-voltage operations (i.e., \(V_{\text{DD}}>V_{\text{DS,SAT}}\)), but it requires a very careful design to prevent oscillations in the amplifier. The folded cascode topology takes advantage of the availability of complementary devices with good performance in CMOS technology, but it requires an additional inductor, \(L_{\text{d}}\), with consequent extra silicon area consumption [38]. It is also possible to save silicon area and, at the same time, increase the voltage gain by replacing the inductor with the primary winding of a transformer, whose secondary coil is exploited as a load inductor, \(L_{\text{D2}}\). In this way, positive feedback is easily implemented by means of transformer magnetic coupling [31]. Reactive resonant coupling enables the n-MOS cascode topology to also be used at a very low supply voltage, but at the cost of higher current consumption. It can be implemented by using a series resonant \(LC\) network (\(C_{\text{F}}\), \(L_{\text{F}}\)), properly sized to exhibit low impedance at the operating frequency, as shown in Figure 5d. Indeed, both inductors, \(L_{\text{D1}}\) and \(L_{\text{S2}}\), resonate with the capacitances at nodes \(\mathbf{A}\) and \(\mathbf{B}\), respectively. The performance of a capacitive-coupled (CC) cascode amplifier is affected by the \(Q\)-factor of the LC network and, especially, of the inductor. Therefore, it can also be used a pure capacitive coupling through by-pass capacitors if the area consumption is tolerable [39]. The transformer-coupled (TC) cascode topology shown in Figure 5e takes advantage of an integrated transformer to couple the common-source and common-gate transistors of a cascode stage [40]. Coupling transformer losses (i.e., winding \(Q\)-factors and magnetic coupling factor, \(k\)) affect the performance of the TC cascode stage; therefore, resonant mode by means of shunt capacitors (not present in Figure 5e) is mandatory. Moreover, the choice of transformer configuration (i.e., interleaved, stacked or interstacked) is of utmost importance. Generally, the TC cascode topology is area saving in comparison with the CC cascode topology, since it requires a transformer instead of three inductors, excluding the load inductor. Transformer coupling is also a highly convenient method to implement a low-voltage down- (up)-conversion mixer. Indeed, the traditional configuration of the mixer is based on the double-balanced Gilbert cell topology, shown in Figure 6a, which is not suited to low-voltage operations. It can be easily adjusted by using transformer coupling (TC) between the voltage-to-current (\(V\)/\(I\)) converter and the Gilbert cell, as shown in Figure 6b [41; 42]. This solution also improves the linearity performance (i.e., 1-dB compression point), which is crucial in important applications, such as automotive radars [43]. A capacitive-coupled configuration can also be used as shown in Figure 6c. CMOS low-voltage operations greatly affect the performance of PAs, especially at the output stage. Indeed, the delivered power is limited by the reduced voltage swing required for device reliability (i.e., drain-source break-down voltage, \(V_{\text{DS,MAX}}\)). A common solution is to adopt a classical cascode topology made up of a thin-oxide CS transistor and a thick-oxide CG transistor to allow for a higher supply voltage. More complex solutions exploit multistacked devices [44; 45]. However, both cascode and multistacked topologies are not viable when the PA is integrated within a transceiver operated at low voltage.