## 3 Proposed Chaos-Based Stream Ciphers Based on Secure PRNGs of Chaotic Sequences
### Architectures Description of the Proposed PRNGs-CS
#### 3.2.2 The Proposed LST-PRNG  
The design of the proposed LST-PRNG is given in Figure 7. The internal state of the system is constructed by weakly coupling three discrete chaotic maps: Logistic map, STM, and 3D-Ch coupled with an LFSR. The latter can improve the 3D Chebyshev periodicity and its uniformity, as shown in Section 2. The output function is based on modulo addition and XOR operations.  
Compared with the architecture in Figure 6, the proposed LST-PRNG architecture has better hardware performance because the hardware performance of the 3D Ch map is better than those of the PWLCM map. Moreover, using 3D Ch increases the robustness of the system against algebraic attacks.  
The size of the secret key of the proposed LST-PRNG is:  
\[|K2|=|XL0|+|XS0|+|XT0|+|P_{\text{s}}|+(6\times|\epsilon_{ij}|)+|Q0|=190\;\;bits \tag{25}\]  
where \(|XT0|=|Q0|=32\;\;bits\); and \(XT0\), \(Q0\) are the initial conditions of the 3D Ch and the Linear Feedback Shift Register (LFSR), respectively.  
The key space contains \(2^{190}\) different values, which is large enough to make brute-force attacks infeasible.  
The initial values \(XL(0)\), \(XS(0)\) and \(XT(0)\) of the used chaotic maps are given by:  
\[\left\{\begin{array}{l}XL(0){=}\bmod\left(\left(XL0+IVin\right),\;2^{N} \right)\\ XS(0){=}\bmod\left(\left(XS0+IVin\right),\;2^{N}\right)\\ XT(0){=}\bmod\left(\left(XT0+IVin\right),\;2^{N}\right)\end{array}\right. \tag{26}\]  
where:  
\[IVin\;=\;IVL\;\oplus\;IVS\;\oplus\;IVT \tag{27}\]  
and \(IVL\), \(IVS\) and \(IVT\) are provided by the initial value \(IV\) as follows:  
\[\left\{\begin{array}{l}IVL{=}IV(0\;\;to\;31)\\ IVS{=}IV(32\;\;to\;63)\\ IVT{=}IV(64\;\;to\;95)\end{array}\right. \tag{28}\]  
Using the output samples of \(XLC(n)\), \(XSC(n)\) and \(XTIC(n)\), the coupling matrix M (defined in (16)) produces the output sequence \(X(n)\) as shown in Figure 7. The internal system is governed by the following equations.  
\[\left[\begin{array}{l}XLC(n)\\ XSC(n)\\ XTIC(n)\end{array}\right]{=}M\times\left[\begin{array}{l}XL(n)\\ XS(n)\\ XTI(n)\end{array}\right] \tag{29}\]  
with:  
\[XTI(n)=XT(n)\oplus Q(n) \tag{30}\]  
and \(XL(n)\), \(XS(n)\), and \(XT(n)\) are denoted as the maps output values at instant \(n\) of the: Logistic, Skew-Tent, and 3D-Ch map, respectively.  
Figure 7: LST-PRNG design architecture proposed.  
The first three outputs of the matrix M, \(XLC(1),\ XSC(1),\ XTIC(1)\) are given by:  
\[\left[\begin{array}{c}XLC(1)\\ XSC(1)\\ XTIC(1)\end{array}\right]{=}M\times\left[\begin{array}{c}XL(1)\\ XS(1)\\ XTI(1)\end{array}\right] \tag{31}\]  
with:  
\[XTI(1)=XT(1)\oplus Q(1) \tag{32}\]  
and:  
\[XL(1)= Logistic\left\{\text{mod }\left(XL(0),2^{N}\right)\right\} \tag{33}\]  
\[XS(1)= STM\left\{\text{mod }\left(XS(0),2^{N}\right),P_{s}\right\} \tag{34}\]  
\[XT(1)= 3D-Ch\left\{\text{mod }\left(XT(0),2^{N}\right)\right\} \tag{35}\]  
Then, for \(n\geq 2\) and \(n\leq N_{s}\), the matrix \(M\) output is given by Equation (29), with:  
\[XL(n)= Logistic\left\{\text{mod}\left(XLC(n-1),\ 2^{N}\right)\right\} \tag{36}\]  
\[XS(n)= STM\left\{\text{mod}\left(XSC(n-1),\ 2^{N}\right),\ P_{s}\right\} \tag{37}\]  
\[\left\{\begin{array}{c}XT(n){=}3D-Ch\left\{\text{mod}\left(XTIC(n-1),\ 2^{N} \right)\right\}\\ XTI(n){=}XT(n)\oplus Q(n)\end{array}\right. \tag{38}\]  
Finally the output \(X(n)\) is calculated by (see Figure 7):  
\[X(n)=\text{mod }\left(\left(XLC(n)+XTIC(n)\right),\ 2^{N}\right)\ \oplus\ XSC(n) \tag{39}\]