# RT Engine: An Efficient Hardware Architecture for Ray Tracing
## 2 Overall System Architecture
### System Architecture  
Figure 1 shows the overall design of the RT engine, which mainly includes memory and five parts. These five parts are the Shader, Issue Ray, Ray Traversal, Stack Management, and Triangle Intersection.  
The Shader's (SHD) purpose is to provide our system with rays, BVHs, and primitives data. In addition, we can render our system results and generate expected rendering images. This part is in conjunction with the CPU or GPU existing shader.  
The Ray Traversal (TRV) unit is essential to the entire system design. This part corresponds to the _Traverse_ in Algorithm 1. The module completes the intersection between rays and BVHs. Input is ray data and BVH data, and output results control what will happen next. If the ray intersects the two child nodes of BVH, select the farther node, push it to the stack, and choose the one nearer to the following stage. If the ray intersects only a child node of BVH, it needs to be judged whether the node is a leaf node. If the ray does not intersect with the two child nodes of the BVH, then pop the stack.  
The Stack Management unit is the key to ensuring multiple rays in the system parallel processing. This part corresponds to the _Stack.pop_ and _Stack.push_ in Algorithm 1. Its primary role is to operate the stack according to the results of the Ray Traversal unit and the Triangle Intersection unit. To ensure the stacks' accuracy and order, we added a LUT (Look Up Table). This unit ensures that the data of rays and stacks can correspond.  
The Triangle Intersection (IST) unit tests the intersection of the triangle and the ray of the leaf node, which corresponds to the _Intersection_ in Algorithm 1. For the design of this part, we refer to the [PERSON] algorithm [31]. This algorithm has three logical parts: the ray-plane test, the barycentric test, and the final hit-point calculation. IST1 completes the calculation of the ray-plane test. IST2 completes the barycentric test. IST3 completes the final hit-point calculation. The design of this unit uses two optimization methods to achieve a system performance improvement, which we will describe in detail in the subsequent chapters.  
Table 1 illustrates how rays move from unit to unit. The numbers in Table 1 correspond to the numbers in Figure 1.  
\begin{table}
\begin{tabular}{c c c c} \hline
**No** & **From\(\rightarrow\) To** & **Purpose** & **Next Process** \\ \hline
1 & SHD\(\rightarrow\)MEM & Generate data & Input to MEM \\
2 & DIS\(\rightarrow\)ARB & Dispatch new ray & Determine priorities \\
3 & LUT\(\rightarrow\)ARB & Inter from Stack & Determine priorities \\
4 & TRV\(\rightarrow\)ARB & Inter from TRV & Determine priorities \\
5 & ARB\(\rightarrow\)MEM & Input address & Fetch data \\
6 & MEM\(\rightarrow\)TRV & Input to TRV & TRV with the BVH \\
7 & TRV\(\rightarrow\)MEM & Node is a leaf & Fetch leaf data \\
8 & TRV\(\rightarrow\)LUT & Pop or push & Stack process \\
9 & LUT\(\rightarrow\)MEM & Leaf to MEM & Fetch leaf \\
10 & MEM\(\rightarrow\)IST1 & Stage1 of IST & Triangle process \\
11 & IST1\(\rightarrow\)IST2 & Stage2 of IST & Triangle process \\
12 & IST2\(\rightarrow\)IST3 & Stage3 of IST & Triangle process \\
13 & TRI\(\rightarrow\)SHD & _hit_ to SHD & Shader \\
14 & TRI\(\rightarrow\)LUT & Break from IST & Pop \\ \hline \end{tabular}
\end{table}
Table 1: Data flow.  
Figure 1: Overall system architecture of RT engine.