# Design Considerations of Multi-Phase Buck DC-DC Converter
## 2 Power Losses in the Multi-Phase Synchronous Buck Converter  
This article discusses the configuration based on the synchronous buck converter since this circuit is characterized by a higher converter efficiency compared to the conventional buck converter, especially in applications characterized by low voltage and high output current. Furthermore, a Schottky diode is typically placed in parallel to the low-side MOSFET, further reducing the reverse recovery losses during dead time, which is introduced to prevent shoot-through between transistors. Figure 1 presents the \(N\)-phase synchronous buck converter. For the purposes of the study the transistors \(Q1\div Q1N\) are denoted as high-side (HS) MOSFETs and transistors \(Q2\div Q2N\) are denoted as low-side (LS) MOSFETs. The following notations are used: _Ulin_--input voltage; _Uz_--output voltage; _N_--number of phases; output capacitor _Cout_; input capacitor _Cin_; _ESRout_ equivalent series resistance of _Cout_; _ESRin_ equivalent series resistance of _Cout_; output inductances \(L1\div LN\); \(DCR1\div DCRN\) equivalent series resistances of the output inductances. The power losses associated with MOSFETs in synchronous buck converters generally consist of conduction losses and switching losses. In the present study, the power losses in one stage of the multi-phase synchronous buck converter are divided into the following categories [33]:  
Figure 1: A multi-phase synchronous buck converter. 1. Conduction losses \(P_{Qon\_H}\) of the high-side MOSFET and conduction losses \(P_{Qon\_L}\) of the low-side MOSFET;
2. Switching losses in the high-side MOSFET \(P_{QSW\_H}\);
3. Reverse recovery losses in the body diode \(P_{D(R\!R)}\);
4. Dead time losses \(P_{Ql\_Ld}\);
5. Output capacitance losses in the MOSFETs \(P_{C_{QNS}}\);
6. Gate charge losses in MOSFETs \(P_{G}\);
7. Conduction losses in the inductor \(P_{L}\);
8. Losses in the input and output capacitors \(P_{Cin}\) and \(P_{Cout}\). The switching losses of the low-side MOSFET, in the considered applications, are small and are neglected since the transistor is turned on and off with a drain-source voltage equal to the forward voltage of the body diode [34]. In addition, there is no freewheeling current through \(Q1\). Hence, there would not exist any body-diode losses. Also, the gate driver losses are not considered in this study due to the wide variety of control drivers. There are two types of power losses in the inductor: conduction losses caused by the resistance and core losses determined by magnetic properties. Since calculating core losses requires manufacturer-provided data on the core material, which may only sometimes be available, this article does not describe it. The considered methodology includes dependencies discussed in [33; 34; 35; 36; 37; 38]. The ripple current through the inductance in the one buck stage is given by  
\[\Delta I_{L}=\frac{U_{0}(1-D)}{Lf_{SW}}, \tag{1}\]  
where \(L1=L2=\ldots=LN=L\); duty cycle \(D=U_{0}/U_{in}\) and \(f_{SW}\) is the switching frequency. The RMS value of the input current \(I_{IN\_rms}\) in the multiphase converter is expressed by  
\[I_{IN\_rms}=\sqrt{\left(D-\frac{m}{N}\right)\left(\frac{1+m}{N}-D\right)I_{0}^{ 2}+\frac{N\Delta I_{L}^{2}}{12D^{2}}\left[(m+1)^{2}\left(D-\frac{m}{N}\right) ^{3}+m^{2}\left(\frac{1+m}{N}-D\right)^{3}\right]} \tag{2}\]  
where \(m=floor(N\cdot D)\) provides the greatest integer that is smaller than or equal to \((N\cdot D)\)[34] and \(I_{0}\) is the output current. The optimum number of phases should be evaluated over the whole range of variations of the duty cycle. Figure 2a shows the dependence of the RMS input ripple current in normalized form versus the output current \(I_{IN\_rms}/I_{0}\) for different phase configurations and duty cycle range variation.