# A 32-GHz Eight-Way Power Amplifier MMIC in 150 nm GaN HEMT Technology
## 2 32 GHz High-Power Amplifier Design
### Device Selection and Stabilization  
In this work, 150 nm GaN HEMT technology was used, which has an over 120 V gate-drain breakdown voltage and a 34.5 GHz cut-off frequency. There are two types of HEMT models depending on the backside via layout configuration. One is the outside the back via (OSV) HEMT and the other is the internal backside via (ISV) HEMT. With the same number of gate fingers and width, the OSV HEMT layout occupies a smaller area than that of the ISV HEMT. To minimize the chip area consumption, the OSV HEMT was used despite the fact that the ISV HEMT has better self-heating performance with a large number of vias on the backside. The class-AB configuration was selected to improve the power efficiency, and the device was biased to the drain supply of 25 V and the gate voltage of \(-\)1.55 V. Since the power driven by each stage is proportional to the total gate width of each stage, it is necessary to choose the optimal periphery ratio for the power efficiency for a given gain requirement. The gate periphery ratio of 3:8 was selected to obtain proper driving power from the driver stage (first stage) with a desirable power gain, and it guarantees the power stage (final stage) to achieve the desired output power. The size of the OSV HEMT used at the first stage (H\({}_{1-4}\)) was selected to be 6 \(\times\) 50 \(\upmu\)m, and the 8 \(\times\) 50 \(\upmu\)m OSV HEMT was used for the final stage (H\({}_{5-12}\)). Figure 1: (**a**) Schematic of the 32 GHz power amplifier and (**b**) parameters of the utilized components. In designing a robust high-power amplifier (HPA), stable operation of the HPA is essential. In this work, a parallel RC network at the gate was employed to improve stability, especially at a low-frequency region. Since the parallel RC network at the gate of each HEMT degrades the power gain and efficiency, it is critical to determine the proper values of the resistance and capacitance of the parallel RC networks for a high-performance HPA design. To guarantee unconditional stability from 100 MHz to 50 GHz, the parallel RC network comprised a 40 \(\Omega\) resistor and a 580 fF capacitor for the 6 \(\times\) 50 \(\upmu\)m OSV HEMT and a 50 \(\Omega\) resistor and a 630 fF capacitor for the 8 \(\times\) 50 \(\upmu\)m OSV HEMT. Figure 2 shows the simulated maximum power gain (\(G_{ma}\)) and the \(\mu\)-stability factor of the 6 \(\times\) 50 \(\upmu\)m and 8 \(\times\) 50 \(\upmu\)m OSV HEMT devices. The \(G_{ma}\) at 32 GHz is reduced from 13.1 dB to 12 dB for the 6 \(\times\) 50 \(\upmu\)m OSV HEMT device and from 14.4 dB to 11.5 dB for the 8 \(\times\) 50 \(\upmu\)m OSV HEMT device. Meanwhile, the device itself is unconditionally stable with \(\mu>\) 1 from 100 MHz to 50 GHz. Figure 2 presents the effects of the parallel RC network on the maximum available gain (\(G_{ma}\)) and \(\mu\)-stability with and without the parallel RC network. The simulated maximum frequency of oscillation (\(f_{max}\)) of the 6 \(\times\) 50 \(\upmu\)m and 8 \(\times\) 50 \(\upmu\)m OSV HEMT devices is 62.6 GHz and 54.4 GHz, respectively. In combining multiple parallel HEMT devices, there is a possibility of odd-mode oscillations, which can be caused by the electrical asymmetry from the differences in the transconductance, biasing current, and nonlinear parasitic capacitors. It is noted that the  
Figure 2: Maximum available gain (\(G_{ma}\)) and the \(\upmu\)-stability factor of (a) the 6 \(\times\) 50 \(\upmu\)m OSV HEMT device and (b) the 8 \(\times\) 50 \(\upmu\)m OSV HEMT device. odd-mode instability is not predictable from either the \(\mu\) or K-\(\Delta\) stability factor from the small signal S-parameter simulations. To suppress unpredictable instability, resistors are placed between the paralleled transistor branches [14]. Sufficient bypass capacitors are essential to suppress noise, interferences, and RF leakages through the bias circuits.