## 4 Measurement Results  
The prototype op amp is fabricated in a 0.15-\(\upmu\)m SOI Bipolar-CMOS-DMOS (BCD) technology and its micrograph is shown in Figure 11. The total chip area is approximately 800 \(\upmu\)m \(\times\) 950 \(\upmu\)m. It consumes 0.3 mA current from a 5 V supply. The operational amplifier designed in this paper works at \(-\)40 \({}^{\circ}\)C to 250 \({}^{\circ}\)C. Conventional bulk silicon CMOS devices face serious leakage and threshold voltage Vth drift problems at high temperatures, especially above 125 \({}^{\circ}\)C. The SOI process can solve the leakage problem due to its natural structural characteristics. Combined with the interconnection process and special doping treatment, it can effectively solve the problem of threshold voltage \(V\)th drift with temperature. The measurement setup used to characterize the performance of the op amp is shown in Figure 12. The system was tested across a wide temperature range from \(-40\)\({}^{\circ}\)C to \(250\)\({}^{\circ}\)C to evaluate its robustness and stability under extreme operating conditions. The results from this extensive temperature range are crucial for assessing the performance and reliability of the amplifier in high-temperature environments, as detailed in the following sections. The frequency response of the operational amplifier was first evaluated with a 100 pF load capacitor at 250 \({}^{\circ}\)C, and the resulting open-loop gain is depicted in Figure 13. The blue curve represents the overall frequency response of the operational amplifier, while the red curve represents the frequency response of the high-speed channel. As shown, the low-frequency gain is primarily determined by the low-speed channel, while at higher  
Figure 11: The chip micrograph. Figure 12: Measurement setup. frequencies, the gain of the high-speed channel dominates, coinciding with the overall gain. At this point, the overall gain is predominantly governed by the high-speed channel. The maximum open-loop gain at low frequencies reaches 140 dB. However, due to the overall frequency response rolling off with a slope of 40 dB per decade, the gain-bandwidth product (GBW) is approximately 100 kHz. This performance highlights the effectiveness of the multi-path hybrid nested Miller compensation, which enables stable operation over a wide range of frequencies while maintaining a high gain at low frequencies. In a subsequent test, the op amp was configured as a unity-gain buffer, and the small-signal frequency response was measured using a 5 V step input signal with a cycle time of 10 ms. The results of this test are shown in Figure 14. This configuration demonstrates the op amp's ability to maintain linearity and stability in response to a rapid input signal transition, further validating its performance under varying operating conditions. Table 2 summarizes the important parameter test results of the chip at room temperature. It can be seen that under a static current of 0.3 mA, both an offset voltage of 20 \(\upmu\)V and a GBW of 0.1 MHz are ensured, as well as 140 dB. Furthermore, the operational amplifier demonstrates rail-to-rail input and output, ensuring a wide input range and maximizing the output voltage swing. To verify the amplifier's operation in the targeted temperature range between \(-40\)\({}^{\circ}\)C and 250 \({}^{\circ}\)C, extensive measurements have been performed. The temperature regulation involves placing the chip into a temperature chamber, and its model is MC-811B-2. The measurement results of some key parameters of the circuit vary with temperature, as shown in Figure 15. These parameter variations indicate the circuit's stability under temperature changes, ensuring its proper operation in high-temperature environments.