# End to End Delay and Energy Consumption in a Two Tier Cluster Hierarchical Wireless Sensor Networks
## 9 Numerical Results
### Delay Analysis  
Figures 6-11 show the mean value of the end-to-end (E2E) delay for the six scenarios included in Table 7. In all of them, the sink acts as CH of the ring 0. Figure 6 is the case of a single cluster, where only the CONT sub-frame is implemented, i.e., there is no TDMA sub-frame. The E2E delay is 118.99, mini-slots and takes into account only the contention process based on FSA. In the other scenarios the Combi-Frame is implemented with both sub-frames, the CONT and the TDMA. We recall that the E2E delay for data packets generated in ring 0 is only related to the contention process since the sink acts as CH. Those values are 76.07, 18.67, 14.55, 13.71 and 13.34 mini-slots for scenario 1, 2, 3, 4 and 5, respectively. Observe that this E2E delay decreases as the number of rings increases, as expected.  
When \(r_{\max}>0\) and for the ring number 1, we observe a couple of values, first the E2E delay for \(A_{0}\cup S_{0}\), \(A_{2}\cup S_{2}\) and \(A_{4}\cup S_{4}\); and second the E2E delay for \(A_{1}\cup S_{1}\), \(A_{3}\cup S_{3}\) and \(A_{5}\cup S_{5}\). For example, in Figure 7, those E2E delays are 157.06 and 167.06 mini-slots, respectively. This relative asymmetry can be balanced by rotating, from time to time, the slot allocation in the TDMA sub-frame, independently of the CONT sub-frame. A more pronounced asymmetry is observed at ring numbers \(2,\ldots,r_{\max}\). More precisely, in Figures 8-11, we realize that \(A_{0}\cup S_{0}\), \(A_{1}\cup S_{1}\) and \(A_{5}\cup S_{5}\) conform the \"east\" side set while \(A_{2}\cup S_{2}\), \(A_{3}\cup S_{3}\) and \(A_{4}\cup S_{4}\) conform the \"west\" side set. For example, referring to Figure 8 with \(r_{\max}=2\) and ring=2, the average value of the E2E delay \"east\" is, in mini-slots, 97.77 for \(A_{0}\cup S_{0}\), 96.27 for \(A_{1}\cup S_{1}\) and 96.27 for \(A_{5}\cup S_{5}\), while the delay E2E for the group \" west \" turns out to be 81.77, 80.27 and 81.77 mini-slots respectively for \(A_{2}\cup S_{2}\), \(A_{3}\cup S_{3}\) and \(A_{4}\cup S_{4}\). Again, as before, the asymmetry can be compensated by rotating from time to time the slot allocation in the TDMA sub-frame.  
When \(r_{\max}\) increases the number of members per CH decreases and the contribution of the contending phase to the delay E2E is substantially reduced. As we can see in Figure 10 for \(r_{\max}=4\) and Figure 11 for \(r_{\max}=5\), the average E2E delay for ring \(r_{p}=2\) are, respectively 46.75 and 43.91 mini-slot, and for ring \(r_{p}=3\) the respective values are, 51.48 and 48.54 mini-slots, which are rather similar. In fact, the main contribution in those values are mainly due to the \(TT_{(x,y)_{p},(x,y)_{p-1}}\) factors, see Equations (25) and (27), i.e., the time interval between the transmission slot of a CH located on the ring \(r_{p}\), which turns out to be of reception for some neighboring CHs located in the ring \(r_{p-1}\), and the first available transmission slot of one mentioned neighbor CH.  
Figure 7: End to end delay (in mini-slots), from sensor to the sink, for \(r_{\max}=1\), \(p_{act}=0.001\) and \((N_{msc},N_{intra};N_{msc},N_{inter})=(10,3;3,7)\).  
Figure 8: End to end delay (in mini-slots), from sensor to the sink, for \(r_{\max}=2\), \(p_{act}=0.001\) and \((N_{mSC},N_{intra};N_{mST},N_{inter})=(3,3;1,7)\).  
Figure 9: End to end delay (in mini-slots), from sensor to the sink, for \(r_{\max}=3\), \(p_{act}=0.001\) and \((N_{mSC},N_{intra};N_{mST},N_{inter})=(2,3;1,7)\).