## 3 Measurement Results and Discussion
### System Experiments  
The performance of the proposed TIA was also verified within a quasi-coherent receiver setup. In order to simplify testings, a single-polarization receiver was implemented as shown in Figure 10. An externally modulated laser (EML) is used as a transmitter, followed by a variable optical attenuator (VOA) that controls the optical power entering the receiver (\(P_{in}\)). The received signal is combined with a local oscillator laser by means of an optical coupler. After the coupler, a polarization beam splitter (PBS) separates the combined signal into orthogonal polarizations. The LO is an external cavity laser (ECL) with a linewidth of 100 kHz and an emitted power of 14 dBm (\(P_{LO}\)). By means of polarization controllers, the LO polarization is aligned to obtain 50% of the power at each output of the PBS, while the signal polarization is fully aligned to the PBS output being measured. This allows for more accurately relating the obtained system performance to that of a complete receiver implementing polarization diversity, since half of the available LO power is in this case left out, which would be required for the second polarization. The combined LO and signal from the PBS output in use are then focused into a lensed PIN photodiode using a focusing lens. The photodiode has a specified responsivity of 0.8 A/W at 1310 nm (expected to be reduced at 1550 nm) and an opto-electrical (O/E) bandwidth of 37 GHz. The resulting photocurrent is then amplified with the designed TIA and downconverted to baseband with a high-speed envelope detector (ED). Finally, the recovered baseband signal is amplified with a commercial limiting amplifier and processed in a bit-error-rate testset (BERT). The complete chip sub-assembly including PD, TIA, and ED is mounted on an evaluation board as shown in Figure 11, where the individual dies are interconnected by wirebonding. A magnified view of the die sub-assembly is provided in the figure, where the different blocks are identified. The designed TIA chip has dimensions of 0.72 mm \(\times\) 1.1 mm for a total area of around 0.79 mm\({}^{2}\). Figure 9: Measured and simulated 1 dB compression point at 15 and 20 GHz. Linear fits are provided together with markers identifying the 1 dB compression. The magnified view on the right side provides a detailed view around the 1 dB compression points. First, measurements to estimate the opto-electrical 3 dB bandwidth of the complete receiver were carried out. Since an envelope detector is present in the receiver, the test is performed by transmitting a narrowband signal consisting of 3 Gbps non-return-to-zero (NRZ) data (minimum bitrate accepted by the EML transmitter). The LO wavelength is then swept, shifting the IF center frequency accordingly, and the output signal from the detector is monitored in a sampling oscilloscope. The curve in Figure 12 shows the detected power as a function of IF center frequency, with a 3 dB response in the range of 16 to 37 GHz. In the figure, the simulated response is also provided. An inset shows the simulation setup, for which the measured TIA response has been used together with a post-layout simulation of the envelope detector. The simulated response includes a photodetector model with associated parasities, as well as wirebond interconnects modeled as pure inductances. The values for the parasitic capacitance C and series resistance R represent averaged values taken from measured data provided by the manufacturer for the particular chip lot used in the system setup. The wirebond inductance was adjusted in simulation since its actual value cannot be accurately estimated. Using a wirebond inductance of 0.1 nH, good agreement is obtained between measurement and simulation, with a response affected by the bandwidth limiting parasities from both the photodetector and the chip-to-chip interconnects (pad capacitances and wirebond inductances).