# SVPWM Method for Multilevel Indirect Matrix Converter with Eliminate Common Mode Voltage
###### Abstract  
The multilevel indirect matrix converter (IMC) is a merit of power converter for feeding a three-phase load from three-phase power supply because it has several attractive features such as: Sinusoidal input/output currents, bidirectional power flow, long lifetime due to the absence of bulky electrolytic capacitors. As compared to the conventional IMC, the multilevel IMC provides high output performance by increasing the level of output voltage. In this paper, the novel approach topology of multilevel IMC by using the combination of the cascaded rectifier and the three-level T-Type inverter is introduced. Furthermore, the new space vector pulse width modulation (SVPWM) method for the presented multilevel IMC that eliminate the common-mode voltage is proposed in this paper. The simulation study is carried out in PSIM software to verify the proposed modulation method. Then,  
With the limitation of voltage ratings of power switches and voltage transfer ratio, the conventional IMC is not considered for high-power applications. In last few years, there is growing interest in multilevel MC topologies to extend the application of power converters for higher voltage and power ratio. The multilevel MC can synthesize more than two-level output voltage to improve output performance in terms of reduced harmonic content. The development of multilevel MC is classified on two main topologies, i.e., multilevel direct MC (DMC) [9; 10] and multilevel IMC [11; 12]. The multilevel IMC provides some advantages which are not available in the DMC, e.g., simple commutation, possibility of reducing number of power switches, and possibility of reconstructing the direct AC/AC with multi three-phase output. Over the past few years, there has been a significant effort towards addressing the technical challenges associated with the development of topology and control of the multilevel IMC. The conventional multilevel IMC topology was firstly introduced in [12], which is based on the traditional IMC, but with a rear-ends six-switch inverter replaced by a three-level neutral-point-clamped (NPC) inverter as shown in Figure 2. Then, the new multilevel IMC based on the combination of conventional NPC and cascaded-rectifier is presented in [13] in order to improve the voltage transfer ratio. The common-mode voltage (CMV) is known as the main reason of the shaft voltage, leakage current, and bearing current damage, not only harms the motor lifetime, but also degrades the reliability of the electrical system. Thus, the techniques to reduce the CMV or to limit it within certain bounds are very important for the adjustable speed drive system which is fed by MC. The modulation strategies affect the CMV and several methods to reduce the CMV have been introduced in [14; 15; 16; 17; 3; 18]. These SVPWM methods are suggested for conventional IMC and DMC to reduce the peak value of CMV by selecting the suitable zero switching states. The peak value of CMV in [14; 18] is reduced to 42%. In [19; 20], a new space vector modulation method to achieve zero CMV for DMC. However, the multi-step commutation and the limited of voltage transfer ratio are the advantages of the proposed method in [19; 20]. Furthermore, in order to eliminate the CMV for DMC, only rotating vectors are used to synthesize the reference output voltage. Then, the output voltage performance is reduced. Figure 1: The conventional Indirect Matrix Converter topology. Figure 2: The conventional NPC multilevel Indirect Matrix Converter. Despite the multilevel IMC's outstanding advantages, the common mode voltage (CMV) generated by PWM modulation is still problematic and it has received considerable attention to eliminate. In this paper, a novel approach of multilevel IMC topology is introduced. This topology is constructed based on the comprising of cascaded rectifier and the three-level T-Type NPC inverter. Furthermore, the SVPWM strategy is presented to eliminate the CMV with zero average value of neural-point current.