## 3 Mathematical and Problem Formulations
### Power System Modeling with UPFCs and PSSs
#### 3.1.2 UPFC Modeling  
The UPFC represents the most adaptable component within the FACTS group. It employs power electronics to manage the distribution of power within electrical grids [1]. The UPFC combines a shunt controller and a series controller, which are linked via a shared DC bus, as illustrated in Figure 3. This FACTS configuration offers significantly greater flexibility compared to the SSSC when it comes to managing active and reactive power on the transmission line. With this setup, active power can be transferred from the shunt converter to the series converter via the DC bus. In contrast to the SSSC, where the injected voltage (\(Vs\)) must remain in quadrature with the line current (\(I\)), here, the injected voltage (\(Vs\)) can take on any angle relative to the line current. When the magnitude of the \(Vs\) is held constant and its phase angle (\(\phi\)) relative to \(V1\) varies from 0 to 360 degrees, the path followed by the end of vector \(V2\) (\(V2=V1+Vs\)) forms a circle, as depicted in Figure 4 in the phasor diagram. As \(\phi\) changes, the phase shift (\(\delta\)) between voltages V2 and V3 at the two ends of the line also changes. Consequently, both the active power (\(P\)) and reactive power (\(Q\)) transmitted at one end of the line can be controlled using Equations (9) and (10). The controllable region for the UPFC in the P-Q plane is represented by an enclosed ellipse, as illustrated in Figure 4 [3]. \[P=\frac{V_{2}V_{3}\sin(\delta)}{X} \tag{9}\]  
\[Q=\frac{V_{2}(V_{2}-V_{3}\cos(\delta))}{X} \tag{10}\]  
In addition to enabling control of the active and reactive power of the transmission line, the UPFC offers an extra level of flexibility. Its shunt converter, which functions like a STATCOM, manages the V1 voltage by either absorbing or generating reactive power. Both the series and shunt converters employ Voltage-Sourced Converters (VSCs) connected on the secondary side of a coupling transformer. These VSCs utilize power electronic devices like GTOs, IGETs, or IGCTs to generate a voltage from a DC voltage source. A shared  
Figure 4: Phasor diagram of P and Q control in UPFC. capacitor on the DC side of the VSCs serves as the DC voltage source. There are two types of VSC technologies for these converters. 1. VSC employing GTO-based square-wave inverters and specialized interconnection transformers: Typically, four three-level inverters are utilized to create a 48-step voltage waveform. Special interconnection transformers are employed to mitigate the harmonics present in the square waves produced by individual inverters. In this VSC type, the fundamental voltage component is directly proportional to the voltage Vdc. Consequently, Vdc must be adjusted to control the injected voltage. 2. VSC employing IGBT-based Pulse-Width Modulation (PWM) inverters: This inverter type employs PWM techniques to synthesize a sinusoidal waveform from a DC voltage, typically with a chopping frequency in the kilohertz range. Harmonics are eliminated by installing filters on the AC side of the VSC. Unlike the GTO-based VSC, this type maintains a fixed DC voltage (\(V_{dc}\)). To vary the voltage, adjustments are made to the modulation index of the PWM modulator. Control Framework of Shunt and Series Converter  
The shunt converter control system illustrated in Figure 5 functions as a STATCOM and plays a dual role in regulating both the AC voltage at its terminals and the voltage of the DC bus. It employs a dual voltage regulation approach consisting of two interconnected control loops, namely an inner current control loop and an outer loop responsible for regulating AC and DC voltages. As depicted in Figure 5, the control system comprises the following components [3]:  
1. A phase-locked loop (PLL) that synchronizes with the positive-sequence component of the three-phase primary voltage (\(V1\)). The PLL output (angle) is used to calculate the direct-axis and quadrature-axis components of the AC three-phase voltage and currents (referred to as \(Vd\), \(Vq\), \(Id\), and \(Iq\) in the diagram). 2.