# A Mayfly-Based Approach for CMOS Inverter Design with Symmetrical Switching
## 1 Introduction  
The inverter is known as the basic logic gate of any digital Integrated Circuit (IC) technology, and it is an integral part of all digital systems. With the emergence of new technologies, designers are focusing on building the basic blocks, such as inverters [1; 2]. Much work has been conducted to overcome the performance bottleneck in CMOS inverters [3]. The inverters' performance has been investigated in order to come up with robust circuits [4]. As technology has been sized down, circuit design has become more challenging, and the need for designing accurate and fast circuits with low time delay has become an important issue [5; 6]. The switching characteristics of the inverter are the fundamental parameters used to describe the inverter's performance. Thus, the switching speed of the inverter's circuit should be optimized before the design steps to achieve symmetrical switching. Switching time from high to low or from low to high depends on the channel width, length of the transistors, and load capacitance \(\mathrm{C_{L}}\). The physical structure of the transistors in the CMOS inverter causes parasitic capacitances, because of the segregation of mobile charges across different regions within the device. The value of parasitic capacitances in a transistor depends on its width (W) and the length (L) of its channel. The currents charging and discharging these capacitances are \(\mathrm{I_{Ch}}\) and \(\mathrm{I_{Dis}}\), respectively. \(\mathrm{I_{Ch}}\) is responsible for the rise time and \(\mathrm{I_{Dis}}\) is responsible for the fall time. The flow of \(\mathrm{I_{Ch}}\) is through the pull-up section and the flow of \(\mathrm{I_{Dis}}\) flow is through the pull-down section [7]. The significance of output rise and fall time has been discussed on numerous occasions [8; 9; 10; 11; 12]. To ensure symmetrical sequence many techniques havebeen developed. In Ref. [7] two additional transistors were added to regulate the same amount of current from Vdd to match ICh with IDis. The problem with this method is that the addition of new transistors will lead to larger size circuits and can introduce more noise to the circuit. Others have used time-delay elements to correct the mismatch in the time delay on a chip [13; 14]. Nevertheless, creating delay elements can be a challenging task due to their extensive design specifications and various trade-offs involved. In this work, instead of adding any new transistors, we focus on matching the rise time and the fall time by finding the optimum values of W and L using the Mayfly Algorithm. Optimization algorithms use mathematical techniques to iteratively refine the solution until the optimal value is achieved. There are various optimization algorithms available in the literature. Gradient descent [15; 16], genetic algorithms [17; 18; 19], RMSProp [20], and many other optimization algorithms have been used to improve the efficiency and accuracy of solving complex problems. In the published literature, different evolutionary optimization methods have been used to design inverters with optimal switching characteristics. For instance, the PSO technique was used to design the CMOS inverter and its transient performance [21; 22]. The authors investigated the overall performance of the PSO technique. In [23; 24], the PSO algorithm was used to design a nano-scale CMOS inverter to improve its symmetrical switching. The results of the PSO method were compared to Spice simulation results. In [25; 26; 27; 28; 29], [PERSON], [PERSON], et al., implemented different optimization techniques to obtain the symmetrical switching characteristic of CMOS inverters. In [25], the PSO with constriction factor and inertia weight approach PSO-CFIWA was used to get the optimal symmetrical switching properties of the CMOS inverter. The performance of the PSO-CFIWA method was compared to that of the real coded genetic algorithm (RGA) and the results showed an improved performance of the PSO-CFIWA.