## 1 Introduction  
Nowadays, the semiconductor industry is developing rapidly, and more precise products are being designed and produced as a result of the great advances in technology. However, semiconductor failure can occur at any step during the manufacturing process. Such failures are usually caused by human mistakes, particles from equipment, chemical stains, etc. [1]. The wafer map, which is a graphical representation of semiconductor devices containing basic information regarding the thickness, size, and location of failures in semiconductor wafers, can be used to visualize failures on semiconductor wafers [2]. Typically, experienced process engineers are able to define wafer failure pattern types as Center, Donut, Local, Edge-Local, Edge-Ring, Scratch, Random, Near-Full, and None [3]. Each type of wafer failure occurs for different reasons during the manufacturing process. For example, Scratch is caused by machine handling, while Center and Edge-Ring are caused by thin film deposition and etching problems, respectively [4, 5]. Hence, it is necessary to accurately detect wafer map failure types during the semiconductor manufacturing process. The simple recognition of the wafer map failure pattern types can be conducted by experienced semiconductor engineers for the detection of the actual causes of semiconductor failure. However, this entire process is inefficient, expensive, and time-consuming. The recognition of wafer map failure types by human experts has an accuracy of only 45% or lower [6]. To recognize wafer map failure types more efficiently and accurately, various machine learning (ML)-based approaches have been developed. If the wafer map failure types are predefined in the training data, then supervised learning techniques such as k-Nearest Neighbor (KNN) [7], decision tree [4], ANN [8], and SVM [3; 9], etc., can be applied to generate the classification models for the common wafer map failure types. On the other hand, unsupervised learning techniques--such as the clustering [5], adaptive resonance theory network 1 (ART1) [10], multi-step ART1 [11], etc., methods--can be used to recognize wafer map failure types where there is unknown prior information regarding failure type in the training data. In addition, deep learning (DL)-based approaches such as convolutional neural networks (CNN) have recently been used for image processing tasks in many domains [12; 13; 14; 15; 16]. It has become a standard method for achieving outstanding image classification performance [17]. Several different classification models based on CNN have also been used to recognize the failure types of wafer maps [1; 9; 17]. These models were generated by taking the wafer map image as the input and then deciding the wafer map failure types as the output of the models. Nevertheless, there are several challenging problems raised by previous research on wafer map failure pattern identification in semiconductor manufacturing, as described in the following. First, there are no ML or DL algorithms that can always be good in all domains, because each algorithm has various limitations. Second, many previous studies used large-scale raw wafer map data, which may cause the problems such as inefficiency, computational cost, and expensive storage. Third, as manufacturing processes become more complicated and refined, changes often occur in the wafer map failure pattern types [18]. Therefore, this paper proposes a DL-based multi-class classification model using the deep convolutional neural network (DCNN) for the automatic recognition of wafer map failure pattern types during semiconductor manufacturing processes on the basis of real wafer map image data. The model can recognize the wafer map failure types while automatically extracting its features. To demonstrate the performance of our proposed model, we compare the proposed model with several popular ML-based models, such as LR [19], RF [20], gradient boosted decision trees (GBDT) [21], and several well-known DL-based algorithms: VGGNet [22], ResNet [23] and EfficientNet [24].