# Method for Improving the Reliability of SRAM-Based PUF Using Convolution Operation
## 1 Introduction  
The PUF method has attracted much attention in the IoT security field because of its uniqueness and unpredictability. A silicon-based PUF utilizes random differences in the integrated circuit manufacturing process to generate the unique identity information (ID) for the chip [1]. This can be used for secure key and device authentication. Because most IoT devices are equipped with SRAM, SRAM-based PUF represents a promising technology for practical application. SRAM PUF employs a SRAM cell (constructed as two cross-coupled inverters). The state of the cell is determined by the random mismatches in the pair of inverters [2]. However, the output of the SRAM cell is sometimes unstable due to thermal noise, PVT variations, aging, and other factors [3]. Unstable SRAM cells can reduce the reliability of SRAM PUF. Table 1 shows the SRAM PUF stability test results for different products at \(-40\)\({}^{\circ}\)C, \(20\)\({}^{\circ}\)C and \(80\)\({}^{\circ}\)C [4]. On average, about 10% of SRAM cells were unstable, with a worst performance of 14.8% instability. Unstable cells represent the main challenge in SRAM PUF design. Commonly used methods to eliminate unstable cells in SRAM PUF include new SRAM structures, manual intervention and use of software algorithms. In [5], a new structure for a high-precision amplifier circuit was used to compare the resistance values of two RRAM arrays, with the accurate PUF output generated using a resistance difference method. This RRAM PUF achieved a lower than \(6\times 10^{-6}\) bit error rate. In [6,7], two PMOS transistors in the SRAM cell were replaced with two NMOS transistors to produce an enhancement-enhancement SRAM (EE SRAM), the observed reliability improving to 99.79%. The new SRAM structure was able to improve incidence of SRAM PUF stable cells; however, ordinary SRAM is usually used in existing IoT equipment, limiting the application of this technology. Manual intervention is a direct method. In [8], a negative bias temperature instability (NBTI) method was used to increase the mismatch of the inverter in SRAM, thus improving the stability of the SRAM PUF output. When the mismatch reached 50 mV, the reliability was improved by more than 20%. Another direct method involves the detection and marking of unstable or potentially unstable locations [9; 10]. The selected cells are temporarily 100% stable. The disadvantage of this scheme is that it takes a lot of time. In addition, initially stable cells can become unstable as the operating time increases. To address the problems associated with the two methods described above, software algorithms have been introduced. Traditional software algorithms have used an error correction code to correct the response. The error correction code needs auxiliary data to recover data [11]. If the auxiliary data is damaged, the error correction code becomes invalid. However, it is difficult to deploy the fuzzy extractor in resource-constrained systems since the implementation of error correction codes is complicated. Error correction requires considerable hardware resources [12]. In [13; 14], a convolutional neural network (CNN) model was used to classify the results of SRAM PUF to improve the stability of SRAM PUF. The reliability was improved to 97.34% [15]. However, the CNN model is only able to classify SRAM groups--it cannot create the ID number. Moreover, a digital image requires 256 KB SRAM cells. The CNN model relies on the GPU to provide massive initial data [13]. The existing convolution model cannot be implemented on IoT devices. A novel method to obtain a reliable SRAM PUF response is proposed in this paper. This method is applicable to all SRAM circuits and does not consume additional hardware resources. In this scheme, a software algorithm is used to extract PUF with high reliability. In the process of PUF extraction, the SRAM only needs to provide the initial value. After PUF extraction, the SRAM cells can still be used as normal SRAM cells. The following sections describe the scheme in detail.