# Chaos-Based Physical Unclonable Functions
## 2 Chaos-Based PUFs  
In order to tackle the described issues and join the advantages of analog chaotic signals with digital simplicity, it would be very valuable to identify an analog continuous variable that could be utilized in purely digital circuits. Therefore, we propose a concept of system with a continuous time variable (\(\delta\)) that manifests chaotic behavior. For this purpose, we base our PUF on recently introduced concept [45] with switchable chain ring oscillators (SCROs)--the idea incorporates a pair of SCROs (SCRO1 and SCRO2) as shown in Figure 1.  
An SCRO consists of two switchable delay lines formed of inverters (DLa and DLb) and it operates at one of two frequencies (\(f_{1},f_{2}\)) that are never equal:  
\[\left\{ \begin{array}{ll}f_{1}=\frac{1}{2\tau_{a}},&f_{2}=\frac{1}{2(\tau_{a }+\tau_{b})},\\ f_{1}=\frac{1}{2(\tau_{a}+\tau_{b})},&f_{2}=\frac{1}{2\tau_{a}},\end{array} \right. \tag{1}\]  
where \(\tau_{a}\) and \(\tau_{b}\) delays correspond to the DLa and DLb propagation times. Rising slopes at SCRO outputs are detected by a phase detector (PD), which acts as an arbiter providing logical \(s[m]=1\) when the rising slope of SCRO1 appears before SCRO2 (\(\delta[m]>0\) for the \(m\)-th comparison). The logical \(s[m]=0\) occurs in the other case (\(\delta[m]<0\)). The simplest PD implementation consists of one D-flip-flop. The feedback signal from the PD instantly aims to adjust SCRO phase (\(\delta\)) but never succeeds. Moreover, the feedback always comes a little late due to delays (\(\tau\)) of the feedback loop (FB). The higher feedback delay results in the greater range of possible SCROs phases. If \(\tau\) was negligible, the circuit would operate in a periodic mode:  
\[\delta[m+1]=\left\{ \begin{array}{ll}\delta[m]-2\tau_{b},&\delta[m]>0,\\ \delta[m]+2\tau_{b},&\delta[m]<0,\end{array} \right. \tag{2}\]  
but, if the \(\tau\) delay exceeds \(\tau_{a}-\tau_{b}\) (i.e., \(\tau_{a}+\tau_{b}>\tau>\tau_{a}-\tau_{b}\)), the phase correction signal (the slope of a logical value change) for the higher frequency SCRO will not arrive on time (both SCROs will work on the same frequency for a moment). Moreover, if the \(\tau\) delay exceeds \(\tau_{a}+\tau_{b}\), the phase correction appears too late also for the other SCRO (the one operating at lower frequency) and there will be no phase correction on time. An example series of \(\delta\) corrections for consecutive \(m\) steps (\(\delta[m]\)) obtained in the Xilinx CoolRunner II (XC2C256) (San Jose, CA, USA) is shown in Figure 2.  
Three realizations start from the same state (phase) and a wrong phase correction value (\(m=1\)). They properly correct their phases in the next four steps (\(m:2\), \(3\), \(4\), \(5\)). Steps 6 and 7 (8 and 9; 10 and 11, etc.) show the case where the phase correction came too late for one of the SCROs. Figure 1: The block diagram of the proposed chaos-based PUF circuit. Usually, a chaotic 1D map is the easiest way to visualize chaotic behavior [46]; therefore, Figure 3 shows a graph \(\left\{\delta[m+1],\delta[m]\right\}\) of consecutive \(m\) steps. One can see that there are three types of regions (\(A\), \(B\), \(C\)) associated with the circuit's behavior depending on \(\delta\) and complementary regions (\(A^{\prime}\), \(B^{\prime}\), \(C^{\prime}\)) since the phase adjustments are identical for the both positive and negative \(\delta\) values. The standard regions of operation (\(A\) and \(A^{\prime}\)) can be understood as proper \(\delta\) adjustments (as if there was no influence of \(\tau\) delay). Regions \(B\) and \(B^{\prime}\) correspond to the case when the adjustment in two subsequent steps does not apply (mainly due to the \(\tau\) delay). The classification of the steps to the regions was also marked in Figure 2.  
There is an important phenomenon that accelerates divergence of a system's chaotic trajectory--mainly inconsistency of a logical level at multiplexer's inputs (MUX1 or MUX2).