## 3 Simulation Results
### Case 1: Active Power Flow  
Simulation results were presented at various stages of the proposed SST based on multi-stage power switching converters after the transient period was elapsed. Three phase voltage and current at the grid side, for a three-phase balanced load, are shown in Figure 8. As can be observed from Figure 9, SST input voltage (phase A) and current (phase A) at the grid side remained in-phase even though active power demand was varied from 0.0 p.u. to 1.0 p.u, thus delivering power at unity power factor. Results show that presented SST model drew balanced three phase current from the grid. Input current (phase A) had very less harmonic content (THD = 2.16%) as shown in Figure 10. Same results were valid for other phases as well. \begin{table}
\begin{tabular}{c c c} \hline
**Units** & **Quantity** & **Values** \\ \hline \(3F3\) & Ferrite (MnZn), P-Type & 9997 (nH/T\({}^{2}\)) \\ \(B\) & Magnetic flux density & 3200 Gauss (core losses \(<\)100 mW/cm\({}^{3}\)) \\ \(W_{A}A_{c}\) & Product of Core Area and Window Winding Area & 1006.7857 cm\({}^{4}\) \\ \(A_{c}\) & Core Area & 25 cm\({}^{2}\) \\ \(W_{a}\) & Window Winding Area & 40.271429 cm\({}^{2}\) \\ \(P_{o}\) & Power & 200 kVA \\ \(F\) & Frequency & 25 kHz \\ \(J\) & Current Density & 3.5 A/mm\({}^{2}\) \\ \(K\) & Filling Factor & 0.6 \\ \(V_{p}\) & Primary Voltage & 20 kV \\ \(I_{p}\) & Primary Current (with 5\% increase in input & 10.5 A \\  & power to cover losses) & 500 V \\ \(V_{s}\) & Secondary Voltage & 400 A \\ \(I_{s}\) & Secondary Current & 250 Turns \\ \(N_{p}\) & Primary Turns & 7 Turns \\ \(N_{s}\) & Secondary Turns & 0.299947 \(\Omega\) \\ \(R_{p}\) & Primary Winding Resistance & 26676.98 \(\mu\)H \\ \(L_{p}\) & Primary Winding Inductance & 0.34242 m\(\Omega\) \\ \(R_{s}\) & Secondary Winding Inductance & 400.904 \(\mu\)H \\ \(A_{pw}\) & Primary Winding Wire Area (with skin effect & 4.399 mm\({}^{2}\) \\  & compensation) & 122.23 mm\({}^{2}\) \\ \(A_{sw}\) & Secondary Winding Wire Area (with skin effect & \\  & compensation) & 122.23 mm\({}^{2}\) \\ \hline \end{tabular}
\end{table} 
Table 4: Parameters of a high frequency ferrite transformer. Figure 8: (**a**) SST input voltage at the grid side. (**b**) SST input current at the grid side. Figure 10: (**a**) Phase A current drawn from utility. (**b**) Total harmonic distortion (THD) analysis of phase A current. Figure 9: Result displaying that phase A voltage and current are in phase with each other. In the dual active bridge (DAB) circuit, the full bridge square wave inverter cascaded at SST-VSC generated a square wave voltage of 25 kHz for the high frequency transformer (HFT), which reduced the voltage level. The other full bridge square wave converter used within DAB, rectified the voltage at the secondary side of HFT. The voltage and current response of the SST-VSC at the DC -link \(V_{DC,\,mes}\) side is given in Figure 11. Voltage at the primary and secondary side of HFT are shown in Figure 12.  
At the DAB end, the DC -capacitor decreased the ripple content while the SST-VSI cascaded used SVPWM pulses to generate a three phase voltage with variable frequency and amplitude for the consumer end. When the generated frequency was 50 Hz, the SST-VSI output Line to Neutral (L-N) voltage before and after filter circuits are shown in Figure 13.  
The same was true for the case of a 1.0 p.u. three-phase unbalanced load. Figures 14 and 15 display that SST delivers unbalanced current to the unbalanced load while keeping the SST input voltage (phase A) and current (phase A) in-phase at the grid side, thus ensuring power at the unity power factor. Figure 11: SST-VSC voltage and current at the DC -link. Figure 12: Primary and secondary voltage of the high frequency transformer. Figure 14: SST output current to the unbalanced load. Figure 8:0 (**a**) SST-VSI output voltage without filter. (**b**) Filtered SST output voltage. Figure 8:1 Result displaying that phase A voltage and current are in phase.