# Ultra-Low-Loss Silicon Waveguides for Heterogeneously Integrated Silicon/III-V Photonics
## 1 Introduction  
Photonic integration promises significant improvement in performance, reliability and SWaP-C (size, weight, power and cost) due to integration of components, reduced coupling losses and reduced sensitivity to environmental perturbation. Photonic integrated circuits (PICs) have been demonstrated in various material systems such as GaAs, InP, Si,SiN4, LiNbO3 with various levels of functionality [1; 2; 3; 4; 5; 6]. An ideal platform would combine the efficiency of electrically pumped optical sources available in GaAs and InP systems, with high-contrast superior waveguide structures available in Si and ultra-low-loss waveguides available in e.g., Si\({}_{3}\)N4 platform.  
Heterogeneous Si/III-V photonics [5; 7] is an attractive platform for photonic integration as it combines the best of what silicon and III-V platforms can offer and provide many kinds of high-performance passive and active optical devices on a single chip. High-capacity, large-scale PICs for communications and sensing applications have been successfully demonstrated [8; 9; 10; 11]. The high index contrast waveguide formed between silicon and its native oxide (SiO\({}_{2}\)) allows for small waveguides and tight bends enabling very compact photonic devices with small footprint, which is desirable for electronics-photonics integration [12]. However, the high index contrast also results in more scattering loss, especially in waveguide with small cross-sectional mode area. For the best performances of optical amplifiers and lasers on the Si/III-V platform, the silicon thickness is optimally chosen in the range of 400-500 nm as discussed in detail in [13; 14] and Section 2 below. With SOI thickness in the sub-micron range, typical propagation loss of single-mode Si waveguides ranges from 0.5 dB/cm to 2 dB/cm [15; 16; 17], and the lower number requires best-in-class immersion193 nm lithography. This limits the performance of devices requiring on-chip delays larger than a few centimeters.  
When it comes to applications that demand very low propagation loss, such as optical buffer technology [18] or interferometric waveguide coil optical gyroscopes [19], multi-micron scale SOI [20] and dielectric platforms with lower index contrast [21; 22; 23; 24] are superior. [PERSON] et al. has demonstrated the possibility of incorporating the silicon, III-V, and ultra-low loss Si\({}_{3}\)N\({}_{4}\) waveguides on the same chip [25]. The downside of this approach, however, is the increased complexity of the fabrication, which involves an extra bonding step and planarization. It is advantageous to follow a simpler path to ultra-low-loss waveguides that can provide higher yield and lower cost, while maintaining compatibility with III-V heterogeneous integration. The most straightforward approach to achieve this goal is to make lower loss waveguides directly on silicon using the rib waveguide geometry as opposed to a deeply etched geometry. It has been shown in the literature that a propagation loss as low as 2.7 dB/m is achievable with a 200 nm rib on 1 \(\upmu\)m thick silicon waveguide [26], and 15 dB/m loss can be obtained with half-etch rib waveguides on 3 \(\upmu\)m thick SOI platform [20].  
In this work, we apply the shallow rib waveguide idea to achieve ultra-low propagation loss on the 500 nm SOI waveguides of the Si/III-V heterogeneous platform. We report on a propagation loss as low as 4 dB/m that is seamlessly incorporable into the heterogeneous Si/III-V platform with only one additional lithography and etch step. We utilize these ultra-low loss silicon waveguides to successfully make long optical spiral delay lines, high quality-factor (\(Q\)) ring resonators and low kappa (\(\kappa\)), narrow bandwidth Bragg grating reflectors with record performance for sub-micron SOI waveguides. These passive components pave the way to realizing advanced photonic devices, e.g., optical gyroscopes and ultra-narrow linewidth lasers, fully integrated on a silicon chip.