## 4 Evaluation of Electric Energy Output Quality
### Analysis of Responsiveness and Accuracy  
The designed MPSMC controller was tested via a voltage step test under identical motor parameters, main--circuit electrical parameters, circuit connections, and load characteristics. Load resistance was 200 \(\Omega\), and the bus voltage stepped from 200 V to 400 V at 1 s. Simulation yielded load--end voltage and current waveforms as shown in Figure 23.  
Figure 21: Comparison of Two Control Strategies under Sudden Load Changes.  
Figure 22: Comparison of Bus Voltage Fluctuations Before and After Load Sudden Changes.  
As indicated in Figure 23, the load-end bus voltage remains stable at the set value under MPSMC control, highlighting the effectiveness of the voltage outer loop in the control strategy.When a step signal is issued at 1s, the system responds promptly with a response time of only 80 ms, demonstrating the controller's robustness. Under MPSMC control, when the set voltage is 200 V, the peak voltage at the DC terminal reaches approximately 205 V, resulting in an overshoot of about 3.5%. This indicates that the output voltage remains relatively stable. The MPSMC controller exhibits strong anti-interference capabilities, effectively reducing voltage impacts on system components and ensuring stable FPLG system operation. Moreover, the control strategy effectively regulates the current at the DC terminal. As shown in Figure 24, when the voltage steps from 200 V to 400 V under purely resistive load conditions with a resistance of 200 \(\Omega\), the current at the load end is expected to step from 1 A to 2 A. Comparing the simulation results with the expected values confirms the accuracy of the control strategy and shows that the output current remains stable with minimal fluctuations. This further underscores the MPSMC control strategy's effectiveness in maintaining system stability during voltage mutations.  
This paper compares the control effectiveness of MPSMC and PWMC and assesses their dynamic responses through voltage step tests. At 0.5 s, the output voltage steps from 300 V to 400 V. Simulation results in Figures 25 and 26 show that both strategies stabilize the output voltage quickly. Under PWMC, the output voltage initially overshoots to about 330 V and stabilizes in 120 ms. In contrast, the MPSMC-controlled system stabilizes in just 70 ms with less voltage fluctuation, highlighting its superior robustness.  
Figure 24: MPSMC Control Bus Current under Voltage Step.  
Figure 25: Two control strategies for bus output voltage under voltage step.  
When the voltage step occurs at 0.5 s, both strategies quickly restabilize the output voltage near the set value. However, the MPSMC-controlled system achieves stability more rapidly. The output voltage under MPSMC has a peak of 303 V with a 4.3% overshoot, compared to 308 V and a 10% overshoot under PWMC. This demonstrates that MPSMC effectively reduces bus voltage peaks and minimizes the impact of voltage fluctuations on electrical components. The output voltage waveform under MPSMC is also smoother, indicating higher power quality. Additionally, under the same conditions, the DC bus voltage ripple is lower with MPSMC control than with PWMC control.