## 4 Discussion  
In [35] the authors present the implementation of finding direction of arrival of the signal to an array system using MUSIC algorithm. The solution includes finding general eigenvalues and used Jacobi algorithm for the calculation of eigenvalues and eigenvectors, which uses rotation mode to realize Eigenvalue decomposition to reduce computations and finally achieve real-time array direction finding [36; 37]. In [38] the authors present parallel Jacobi EVD Methods on integrated circuits. Table A1 in the appendix shows complexity times of different well-known algorithms.  
Our work focuses, rather, on the synthesis and architectural implementation of an embedded processor on which the MUSIC algorithm dedicated to LiDAR applications are implemented. The MUSIC algorithm is a second-order estimator which is based on the subspaces obtained by the eigenvalue and eigenvector decomposition of the covariance matrix of the signals from the sensors. To estimate echo delays, this new algorithm, simulated and tested with real data, demonstrated high estimation accuracy despite low signal-to-noise ratios and significant overlapping of echoes. The algorithm makes it possible,  
\begin{table}
\begin{tabular}{c c c c} \hline \hline
**Logic Use** & **Used** & **Available** & **Use (\(\%\))** \\ \hline Nb of Slices & 4640 & 19,200 & 25 \\ Nb of slice Flip Flops & 8536 & 38,400 & 23 \\ Nb of 4 input LUTs & 8404 & 38,400 & 22 \\ Nb of IOBs & 68 & 408 & 17 \\ Nb of GCCLKs & 1 & 4 & 25 \\ \hline \hline \end{tabular}
\end{table}
Table 6: Hardware resource utilization of the design (Part 2: CORDIC_IP)  
\begin{table}
\begin{tabular}{c c c} \hline \hline
**Logic Use** & **Used** & **Available** & **Use (\%)** \\ \hline Nb of Slices & 294 & 19,200 & 25 \\ Nb of slice Flip Flops & 128 & 38,400 & 23 \\ Nb of 4 input LUTs & 512 & 38,400 & 22 \\ Nb of IOBs & 443 & 408 & 17 \\ Nb of BRAMs & 128 & 160 & 80 \\ Nb of GCCLKs & 1 & 4 & 25 \\ \hline \hline \end{tabular}
\end{table}
Table 4: Hardware resource utilization of the design (Dual Port Ram 1 and 2)  
\begin{table}
\begin{tabular}{c c} \hline \hline
**Signal** & **Description** \\ \hline \(x_{in}\) & Input \(x\) Coordinate Range \(-1<=x_{in}<=1\) \\ \(y_{in}\) & Input \(y\) Coordinate Range \(-1<=y_{in}<=1\) \\ \(\theta_{in}\) & Input Rotation angle \\ Range & \(-\pi\leqslant\theta_{in}\leqslant\pi\) \\ \(x_{out}\) & Output \(x\) Coordinate \(z\) \\ Range & \(-\sqrt{2}\leqslant x_{out}\leqslant\sqrt{2}\) \\ \(y_{out}\) & Output \(y\) Coordinate \(z\) \\ Range & \(-\sqrt{2}\leqslant y_{out}\leqslant\sqrt{2}\) \\ \hline \hline \end{tabular}
\end{table}
Table 5: Inputs/Outputs-Cortic (Project File: Part 2).  
among other things, to distinguish very close echoes. It was necessary to perform an eigenvalue decomposition to project the received signals into a subspace orthogonal to the source signal subspace. The realized processing processor provides a lot of softness and flexibility, on the one hand, while exploiting the parallel processing resources available in the FPGA to the maximum, to allow the real-time execution of the MUSIC algorithm. This has several advantages, among them we enumerate:  
1. shorter development time;
2. lower cost for small series (less than 10,000 units);
3. possibility of porting from FPGA design to an ASIC version faster and cheaper;
4. modern FPGAs are very high performance and contain enough memory to accommodate a fast processor core to run software.  
The comparison with related work clearly demonstrates that our design can strike a satisfactory balance between resource consumption and computing time cost and is suitable for deployment on embedded devices with a limited resource budget. Table 7 summarizing the allocation of FPGA resources to the implemented proposed EVD processor.