## 3 Manufacturing Procedure  
In order to validate the proposed patch, a prototype utilising the aforementioned dimensions has been manufactured. The manufacturing procedure follows the guidelines for SIC circuits, with a few specific characteristics.  
The welding procedure, while relatively straightforward, must be executed with care by following the following steps:  
1. Weld the ESIW circuit using standard methodologies for SICs.
2. Weld the rod to the bottom cover using a welder and a small amount of tin paste along the joint. Flux can help the tin paste to spread while welding.
3. Weld the patch to the rod using a welder and a small amount of tin paste along the joint.  
These prototypes are highly sensitive to height variations and tilting, making it crucial to ensure the correct height for the patch. In Figure 5, the patch welded to the rod can be seen once the prototype is assembled. Several parametric simulations have been conducted to analyse manufacturing tolerances. A variation of 16.67% in the distance between the patch and the ground results in approximately a 5% change in BW\({}_{-10\text{dB}}\) and a 6% change in gain. Variations in the tilting angle can reduce bandwidth by up to 4.7%, with a rotation angle of \(\pm 5\) degrees. Note that tilting will also produce non-symmetric radiating patterns; this tilting affects two axes, the XZ plane and the YZ plane (see Figure 4), because they break the parallelism between the patch and the top cover.  
To avoid the aforementioned effects, the following process between the feed post and the patch should be considered: The patch was placed on a stack of substrates that matched the simulated height. Pressure was applied during soldering to ensure the patch remained parallel to the ground plane, preventing tilting. After soldering, the stack of substrates was removed.  
Given the wide range of substrate height options available on the market, the height can be adjusted to meet specific antenna requirements. Based on various simulations, it is important to note that increasing the distance between the patch and the ground plane increases bandwidth but decreases directivity, and vice versa. This height was constrained to a discrete value determined by combinations of available substrates in the laboratory:  
\begin{table}
\begin{tabular}{c c c c c c} \hline \hline
**Parameter** & **Initial** & **Optimised** & **Parameter** & **Initial** & **Optimised** \\  & **(mm)** & **(mm)** & **Parameter** & **(mm)** & **(mm)** \\ \hline hcover & 0.8 & 0.8 & hpatch & 0.818 & 0.818 \\ Lpatch & 14.99 & 12.746 & Wpatch & 14.99 & 12.746 \\ Ishort & 9.94 & 12.082 & Dhrod & 5 & 5 \\ Apatch & 2.5 & 2.767 & drod & 3 & 3 \\ hair & 2.439 & 2.439 & hro & 0.813 & 0.813 \\ \hline \hline \end{tabular}
\end{table}
Table 1: Summarised parameters after optimisation, with \(A_{patch}\), \(L_{patch}\), \(L_{short}\), and \(A_{patch}\) being the design parameters.  
Figure 5: Manufactured prototype (**left**) and welded patch detail (**right**).  
the selected height was 2.439 mm, achieved using three layers of Rogers 4003C substrate, each with a thickness of 0.813 mm.  
Another possible source of error is the rotation in the XY plane (see Figure 4) of the patch (negligible according to simulation) or soldering faults (easily avoidable with careful soldering). The patches are slightly bevelled at their corners because, in order to be metallised, patches must have some kind of support. In these structures, die cuts are used to achieve this. The effect on the antenna performance is negligible.  
Yield analysis with typical manufacturing errors (\(\pm\)50 um) for the potential error parameters (_hair_, _lshort_, _Wpatch_, _Apartch_, and _Lpatch_) proves that 97.6352% of the devices maintain over 18% bandwidth for the ESIW patch, demonstrating manufacturing robustness.