## 1 Introduction
Similarly, [PERSON] and [PERSON] [23] explored the nonlinear characteristics of conventional SOAs to implement logic-based comparator operations, emphasizing simplicity but with limited scalability and speed. [PERSON] et al. [24] proposed a 40 Gb/s all-optical 4-bit priority encoder employing cross-gain modulation (XGM) in SOAs, offering high-speed operation but constrained by signal degradation at higher bit levels. [PERSON] et al. [25] further enhanced system efficiency by simultaneously realizing both encoder and comparator functions at 40 Gb/s using SOAs, though integration complexity and noise were noted challenges. Additionally, [PERSON] et al. [26] presented a multifunctional setup capable of simultaneously operating as a digital comparator and a half-subtractor for 40 Gb/s DPSK signals, showcasing the versatility of SOA-based designs. Despite these advances, most existing designs are tailored for specific operations and face limitations in scalability, complexity, or multi-functionality, highlighting the need for more integrated, compact, and high-speed solutions. In this work, we present a comprehensive numerical analysis of a CR-SOA-MZI-based design capable of supporting simultaneous encoding and comparison operations at 120 Gb/s. We evaluate the system's performance using the quality factor (QF) as a key performance metric and examine the influence of key operating parameters on signal integrity and logic accuracy. The calculated QF values for the five logic operations are as follows: 17.56 for \(\overline{\text{AB}}\), 17.04 for \(\overline{\text{AB}}\), 19.05 for AB (AND), 10.95 for \(\overline{\text{A}}\)\(\overline{\text{B}}\) (NOR), and 8.33 for AB + \(\overline{\text{A}}\)\(\overline{\text{B}}\) (XNOR). The design employs return-to-zero (RZ) modulation to preserve signal integrity at high bit rates [27; 28]. By demonstrating multiple logic functions within a single platform, this study provides a scalable and multifunctional framework for future photonic computing systems. It contributes to the growing body of research aimed at integrating various logic functionalities into compact and efficient photonic circuits. This paper is organized as follows: Section 2 introduces the CR-SOA, starting with Section 2.1, which explains the operational principles, detailing how the CR-SOA operates within the system to achieve the intended logic functions. Section 2.2 presents the numerical analysis, highlighting the calculations and simulations used to optimize the design and assess its performance. Section 3 describes the encoder and comparator, outlining their roles in encoding and comparing input signals for efficient optical logic operations. Section 4 discusses the results, providing a comprehensive evaluation of the system's performance with key metrics such as the eye diagram, QF, and signal integrity at high data rates. Section 5 offers a comparison, contrasting the CR-SOA-based logic gate with other related SOA designs and emphasizing the advantages of our approach in terms of speed and reliability. Section 6 details the potential experimental setup, including the configuration and components used to validate the design and assess its practical performance. Finally, Section 7 concludes the paper by summarizing the key findings and highlighting the potential of CR-SOA-based logic gates for high-speed optical communication systems.