## 2 Basics of QDI Circuits
All the two-input OR/AND gates present in the first logic level of the completion detector are combined using a two-input C-element or a tree of two-input C-elements and the output of the completion detector is ACKOP. Two example gate-level completion detectors corresponding to RTZ and RTO handshaking are shown at the bottom of Figure 2 within the dotted boxes by assuming two dual rail inputs (P1,P0) and (Q1,Q0). Figure 1: Describing a two-input Muller C-element; J and K denote the inputs and L denotes the output. As mentioned earlier, the inputs and outputs of a QDI circuit are dual rail encoded. For example, a (single rail) input I is dual rail encoded as (II,I0). Each single rail input is encoded into two rails as per the dual rail data encoding scheme [20]. Depending on whether RTZ handshaking [21] or RTO [22] handshaking is followed for data communication between the current stage and next stage register banks, accordingly, the encodings of the dual rail inputs would differ. Table 1 shows the dual rail encoding of an example single rail input (I) based on RTZ and RTO handshaking. According to RTZ handshaking, I = 0 is represented by I0 = 1 and I1 = 0, and I = 1 is represented by I1 = 1 and I0 = 0. These two encodings are called 'data'. I1 = I0 = 0 is referred to as the'spacer'. I1 = I0 = 1 is an indeterminate (i.e., illegal/invalid) state. According to RTO handshaking, I = 0 is represented by I0 = 0 and I1 = 1, and I = 1 is represented by I1 = 0 and I0 = 1. These two encodings are called 'data'. I1 = I0 = 1 is referred to as the'spacer'. I1 = I0 = 0 is an invalid/indeterminate state. I1 = I0 = 1 and I1 = I0 = 0 are defined as indeterminate states with respect to RTZ and RTO handshaking respectively. This is because the data encoding scheme should be unordered [23] and incomplete [24] to be delay insensitive. \begin{table}
\begin{tabular}{c c c c c c c} \hline \hline \multirow{2}{*}{**Single Rail**} & \multicolumn{3}{c}{**Dual Rail Inputs (I1,I0)**} & \multicolumn{3}{c}{**Dual Rail Inputs (I1,I0)**} \\ \cline{2-7}  & \multicolumn{3}{c}{**RTZ Handshaking**} & \multicolumn{3}{c}{**RTO Handshaking**} \\ \cline{2-7}  & **I1** & **I0** & **Interpretation** & **I1** & **I0** & **Interpretation** \\ \hline
1 & 1 & 0 & Data & 0 & 1 & Data \\ – & 0 & 0 & Spacer & 0 & 0 & Indeterminate \\ – & 1 & 1 & Indeterminate & 1 & 1 & Spacer \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Delay insensitive dual rail encoding of a single rail input based on return-to-zero (RTZ) and return-to-one (RTO) handshake schemes. Figure 2: A quasi delay insensitive (QDI) circuit stage. (P1,P0) and (Q1,Q0) represent the example dual rail encoded inputs. The completion detectors corresponding to four-phase return-to-zero and return-to-one handshake protocols are shown within the dotted boxes. The thick dashed line traversing the current stage register bank and the QDI circuit represents the critical data path. There are four phases involved in RTZ and RTO handshake schemes, which are described below with reference to Figure 2. Handshaking is performed between the current stage (input) and next stage (output) register banks, involving the QDI circuit that is sandwiched between these register banks.