# Quantum Circuit Implementation of Multi-Dimensional Non-Linear Lattice Models
## 7 Detailed Description of Quantum Circuit for \(u^{2}+v^{2}\) Evaluation (Design _EKin2D3_)
### \((2N_{m}+5)=13\)-Qubit Results Register \(|r12|\ldots|r00\rangle\)  
In this design, a mantissa-squaring operation termed \(SQ6\) sets the result in a 13-qubit output register for \(N_{M}=4\). For each of the \(N_{M}+2=6\) steps, six \(u\)-velocity mantissa qubits and six \(v\)-velocity mantissa qubits are added to the results register to employ two controlled, modified 7-qubit full adders. Similar to the modified 5-qubit full adders for the 9-qubit workspace design, the modification is based on the fact that the leading qubit in the original 7-qubit input is \(|0\rangle\). Then, for the mantissa of \(u\) and \(v\), \(N_{M}+1=6\) qubits are conditionally added to a \(N_{M}+3=8\)-qubit output register for the adder. A total of five shift operations are applied to the 13-qubit output register \(|r12|\ldots|r00\rangle\) of the squaring operations, i.e., between each of the controlled-addition steps. This extended squaring operation is detailed in Figure 15.  
Setting up the \(SQ6\) operation differs significantly from setting up \(SQ4\) and \(SQ5\) in the previous designs. Here, six qubits define the \(u\)-velocity mantissa and are set as \(|1|mu2|mu1|mu0|0|0\rangle\) for the normalized \(u\)-velocity and \(|0|mu2|mu1|mu0|0|0\rangle\) for the sub-normal \(u\). For \(E_{u}-E_{v}=0\), the six qubits defining the \(v\)-velocity mantissa are set similarly to \(|1|muv2|muv1|mv0|0\rangle\) for the normalized \(v\)-velocity, and \(|0|mv2|mu1|mu00|0\rangle\) for the sub-normal \(v\). For \(E_{u}-E_{v}=1\), the six \(v\)-mantissa qubits are set as \(|0|1|mv2|mv1|mv0|0\rangle\) for the normalized \(v\)-velocity, and \(|0|0|mv2|mv1|mv0|0\rangle\) for the sub-normal \(v\). Next, for \(E_{u}-E_{v}=2\), the six \(v\)-mantissa qubits are set as \(|0|0|1|mv2|mv1|mv0\rangle\) for the normalized \(v\)-velocity, and \(|0|0|0|mv2|mv1|mv0\rangle\) for the sub-normal \(v\). This means that for \(E_{u}-E_{v}\geq 2\) there is no elimination of the least-significant mantissa-qubit for \(v\). For \(E_{u}-E_{v}\geq 3\), shifts to the \(v\)-mantissa qubits will be applied so that one or more less-significant \(v\)-mantissa qubits will be removed. The two least-significant qubits in the 6-qubit \(u\)-mantissa string are, therefore, always \(|0\rangle\), explaining the absence of the full-adder for \(u\) in the first two steps in \(SQ6\), as shown in Figure 15.  
As observed previously for the design employing \((2N_{M}+3)=11\)-qubits, a quantum circuit design employing the modified controlled \((N_{M}+1)\)-qubit full adders, as used previously in the 9-qubit workspace implementation, can also be created, involving \(N_{M}+4=8\) steps with \(N_{M}+3=7\) shift operations. In the interest of brevity, this alternative circuit design is not discussed further.  
Figure 15: Quantum circuit defining \(SQ6\) used in the computation of \(u^{2}+v^{2}\). The scaled velocity components \(u\) and \(v\) are represented as floating-point numbers with four mantissa qubits (\(N_{M}=4\)) and three exponent qubits (\(N_{E}=3\)). The circuit uses modified 7-qubit Cuccaro full adders (\(FA_{u}\) and \(FA_{v}\)) with a 13-qubit results register. \(Sh\) performs a ‘downward’ shift of the results register.