# A Software Defined Radio Evaluation Platform for WBAN Systems
## 1 Introduction
On the one hand, the evaluation results are affected by different configurations of the platforms, such as the performance of the Field-Programmable Gate Array (FPGA), Random-Access Memory (RAM), and Read-Only Memory (ROM), which leads to unfair comparisons among different designs. On the other hand, establishing evaluation platforms for every individual implementation of WBAN is not only time consuming for the researchers and engineers, but it also increases the complexity of the design. Since each RF front-end design and fabrication can take many months, a platform is needed that can drastically speed up the evaluations. The motivation of this research is to provide a rapidly-configurable SDR evaluation platform for WBAN systems, which not only can provide test cases that can help evaluate different modules in different environments (e.g., the Bit Error Rate (BER) for different distances), but also be reproducible in multiple implementation platforms. To provide a wider benefit to the research community, all the source code for this SDR platform is posted to a publicly-accessible GitHub repository. The SDR evaluation platform may be used to evaluate and prototype different applications, including, but not limited to, healthcare networks and vehicular networks [10], which were found to be good candidates for WBAN implementations. Further, to ensure that the proposed SDR evaluation platform can be supported on various FPGA platforms (other than the MiniBEE), the verification has been performed in the Xilinx Kintex-7 FPGA KC705 Evaluation Kit (Xilinx, Inc., San Jose, CA, USA) and the Altera Arria 10 SoC Development Kit (Intel, Santa Clara, CA, USA). Our contributions are as follows. Firstly, the procedure of designing and validating the WBAN systems is dramatically shortened by utilizing the proposed evaluation platform, since there is no need to build circuits for each specific WBAN system, especially when the transceivers take exorbitantly long time to be developed in Application-Specific Integrated Circuits (ASICs). Secondly, it is more feasible for researchers to evaluate the real performance of a certain optimized module in the WBAN by simply replacing the module in the evaluation platform and comparing the performance. By selecting the appropriate hardware on which the evaluation platform can be implemented, which would be dependent on the application, and evaluating two different modules on it, module optimization can be carried out to a certain extent. At the same time, the evaluation platform can be implemented in a different hardware, should a different application require that. Thirdly, it provides a fair comparison platform to evaluate different designs for WBAN systems at the RTL ferent circuit synthesis technologies. The rest of this paper is organized as follows. Section 2 provides the background and previous work focusing on the IEEE 802.15.6 standard and the general specifications of the SDR testbed. Functionality, structure, and hardware components of the proposed evaluation platform for WBAN systems are detailed in Section 3. The implementation of the proposed testbed for WBAN and a demo performance of a baseband processing module with a WBAN security scheme is shown in Section 4. Section 5 concludes the paper and provides the future work guide. \begin{table}
\begin{tabular}{c c c} \hline \hline
**Wireless Communication Technologies** & **Power (mW)** & **Battery Life** \\ \hline Bluetooth & 5–100 & 1 day–4 weeks \\ ZigBee & 5–60 & 3 days–5 weeks \\ WBAN & 0.1–5 & 6 weeks–12 months \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Power comparison among different wireless communication technologies [5].