# EXPRESS: Exploiting Energy-Accuracy Tradeoffs in 3D NAND Flash Memory for Energy-Efficient Storage
## 4 Experimental Evaluation
### Effects of Program-Erase Cycling on EXPRESS  
NAND flash memory exhibits limited endurance, which is typically specified by the maximum number of program-erase operations (or PE cycles) allowed on a memory block. The number of PE cycles may impact the nominal page program time, \(t_{prog}\), and stressed pages with a high number of PE cycles may take more time to program [29; 30; 31]. Hence, an implementation of EXPRESS needs to consider the number of PE cycles. Figure 12a shows the cumulative distribution of the nominal page program time for SLC pages in a fresh flash memory block, and in a memory block that has been exposed to 10,000 PE cycles. Similarly, Figure 12b shows the cumulative distributions of the nominal-page program times for the LSB and MSB pages in the MLC mode, for a fresh block and a block exposed to 5000 PE cycles. We find that the average \(t_{prog}\) increases with PE cycling in the MLC mode, whereas a minimal change is observed in the SLC mode.  
\begin{table}
\begin{tabular}{c c c c c c c c} \hline \hline
**Storage Mode** & **Page Type** & \(t_{prog}\)**(\(\mathbf{\mu s}\))** & \(n\) & \(t_{pp}\)**(\(\mathbf{\mu s}\))** & \(n_{skip}\) & \
\begin{tabular}{c} **Average BER** \\ **[\%]** \\ \end{tabular} &
\begin{tabular}{c} **Average Energy** \\ **Saved [\%]** \\ \end{tabular} \\ \hline \multirow{3}{*}{**SLC**} & Slow & 560 & 5 & 300 & 2 & \(5\times 10^{-1}\) & 46.48 \\ \cline{2-7}  & Nominal & 320 & 3 & 220 & 1 & 0 & 31.43 \\ \hline \multirow{3}{*}{**LSB**} & Slow & 1022 & 9 & 760 & 2 & \(5\times 10^{-2}\) & 25.67 \\ \cline{2-7}  & Nominal & 460 & 4 & 220 & 2 & \(8\times 10^{-2}\) & 52.15 \\ \hline
**MSB** & Nominal & 1470 & 11 & 1150 & 2 & \(5\times 10^{-1}\) & 21.76 \\ \hline \hline \end{tabular}
\end{table}
Table 2: EXPRESS characterization for NAND flash block in fresh condition.  
Even though the average \(t_{prog}\) increases with an increase in the number of PE cycles in the MLC mode, the intralayer and interlayer \(t_{prog}\) variations remain unchanged relative to the fresh memory blocks. Specifically, our observations (a) and (b) of Section 4.4 remain true, even on stressed memory blocks. Therefore, the algorithm proposed in Section 4.4 can be used unchanged because EXPRESS learns the \(t_{prog}\) from the learning page, regardless of the PE cycles.  
Table 3 summarizes the updated \(t_{prog}\) and the corresponding \(t_{pp}\) on the PE-cycled memory blocks. We find that, for 10K PE cycles in the SLC memory block, the optimal value for \(n_{skip}=1\). Higher \(n_{skip}\) values cause very high BERs in the written data. With \(n_{skip}=1\) in the SLC mode, we find that EXPRESS saves \(\sim\)30% of the write energy for nominal SLC pages. Similarly, in the MLC mode operation, we find that the optimal \(n_{skip}=2\), which ensures that the BER < 1%. Thus, the energy savings are found to be \(\sim\)16% for the MSB pages, and \(\sim\)46% for the LSB pages. Since the \(t_{prog}\) values for the MSB pages are longer compared to the LSB pages, the percentage of energy savings is lower for the MSB pages for the same \(n_{skip}\) value.