## 1 Introduction
However, most of these bridgeless topologies experience a higher level of EMI [19]. Different modifications and types of bridgeless topologies with complex design and higher costs are implemented to decrease these EMI issues [19; 20; 21; 22]. Therefore, the use of the bridgeless PFC topology is limited in the telecom power applications, where the EMI level requires to be at the lower limits. For this reason, and to optimize the economic design for the PFC converter, the bridgeless PFC topology was excluded from the analysis, and the comparison in this work and the design analysis of the conventional and the interleaved PFC topologies are, only, performed. The control circuits of the PFC circuits which implemented based on the boost converter technique usually contains two control loops [23; 24; 25]: the outer voltage loop, which regulate the output voltage value as the specified load value, and the inner current loop to make the AC supply current follow the AC supply voltage and regulate the circuit PF to higher values. Usually, these control loops in analogy control circuits are implemented using proportional-integral (PI) controllers [26; 27; 28]. The parameters of the PI controllers implemented to work with the boost converters are usually optimized by deriving the converter operation equations and linearized the system with using the different linearization techniques. Practically, PFC control circuits can be implemented using integrated circuits (IC) control chips such as the conventional PFC control IC's (UCC28180, UCC29950), and interleaved PFC control IC's (UCC28070, UCC28065) from Texas Instruments (Dallas, Texas, USA) (, country) [29]. The adjustment of the voltage and current control loops in these control IC's is performed by deriving the linearized small signal modeling of the converter system and choosing the closed loop control system stability criteria which are specified by the control system crossover frequency and the damping ratio [15; 24; 30; 31]. The target of this study was to study the optimal design, manufacturing of the conventional and interleaved PFC with the high-power density and verified the performance of both topologies using the simulation and the experimental implementation. The performance of both PFC topologies was investigated by optimizing the parameters of the boost converter voltage and current control loops based on obtaining the proposed small signal stability modeling for both topologies and using the proper stability criterion for the closed loop control loops. The main parts of the power and control circuits in the two topologies were designed for the enhancement of the circuit high power factor, good conversion efficiency, a specified level of the load voltage, and current ripple contents, and the lower values of the THD follows the telecom power applications load class in the standard EN61000-3-2 [32]. The gains of the current-voltage controllers in both topologies have been optimized to adjust the controller's crossover frequency and damping ratio. PSIM simulations have been used to test the performance of the designed PFC converters with the designed components and optimized control loops. Furthermore, the design of the printed circuit board (PCB) for both topologies using the OrCAD(, city and country) capture and ALEGRO PCB (Cadence 17.4, California, USA) (version, city and country) design software to verify the experimental performance and to make the comparative analysis between the designed PFC converters performances with different loading conditions are performed. The following sections in this paper are organized as follows: Section 2 outlines the PFC converters magnetic parts manufacturing and switching elements selection methodology. Section 3 proposed the small signal modeling and the design techniques of the control loops for the different topologies of the PFC converters. Section 4 provides the simulation procedure and results for the different PFC topologies employed.