## 3 Stochastic FIR Filter with Adaptive Scaling
### Stochastic FIR Filter with ASA and AV  
Applying the proposed ASA to the SFIR filter would be helpful to improve calculation accuracy and SNR of the output signal. The hardware architecture of the scaling module (SM) is illustrated in Figure 6, which corresponds to \"Find scaling factor\" and \"Scaling\" step in Algorithm 1. The scaling factor \(\beta_{x}=\lfloor\log_{2}1/x\rfloor\) is easy to find using the left-shift registers. As a general example, consider a input value \(x=0.21875\), whose sign bit \(S(x)=\ ``0\"\) is extracted firstly. The magnitude value in binary format \(|x|=``0^{\prime}00111000\"\) and initial scaling factor value in binary format \(\beta_{x}=``0^{\prime}0000001\"\) are loaded in the left-shift registers. Afterward, all of the registers begin to left-shift until the first \"1\" occurs at the most significant bit (MSB), and the rest cycles are in an idle state. Note that the total number of left-shift cycles equals the date width of \(|x|\). Finally, the scaled value \(|x|\cdot 2^{\beta}=0.875=``b^{\prime}11100000\"\) and scaling factor \(\beta_{x}=2\) are output. After scaling and serials of stochastic-logic-based operations, re-scaling module is required to realize the re-scaling operation, which is corresponding to the \"Bit-wise Rescaling\" step in Algorithm 1. The architecture of re-scaling module (RSM) is shown as Figure 7, where the bit stream \(X(t)\) is accumulated by a counter as,  
\[cnt(t)=X(t)+cnt(t-1). \tag{17}\]  
Figure 5: (a) MSE performance of stochastic bit stream representation (\(X_{i}\), \(i=1,2,...,N\)). (b) MSE performance of stochastic bit stream representation with AV (\(X_{i}^{1}\) and \(X_{i}^{2}\), \(i=1,2,...,N\)). Afterward, the counter \(cnt(t)\) is compared with scaling factor \(\beta_{x}\) with \"XNOR\" logic. The output re-scaled bit stream can be represented as (18). \[X^{\prime}(t)= \begin{cases}0,&cnt(t)\
eq\beta_{x};\\ 1,&cnt(t)=\beta_{x};\end{cases}  \tag{18}\]  
As introduced in Section 1, the two-line scheme-based SFIR [2] outperforms the bipolar format-based scheme [6] on accuracy performance. Using the proposed ASA method, the accuracy performance of the two-line scheme-based SFIR can be further improved. The hardware architecture is shown as Figure 8, where ASA is applied in the scaling stochastic multiplication (SSM) module, involving scaling module (SM) and re-scaling module (RSM). Except for the scaling module and re-scaling module, binary-to-stochastic converter (B2S) and stochastic-to-binary converter (S2B) are required to realize the conversion between binary numbers and stochastic bit streams. The two-line stochastic addition (TSA) module is similar to [2], which is a calculation-error-free addition scheme. The specific steps of the ASA-based SFIR filter are as follows:  
**Step 1:**: The FIR filter coefficient \(c_{k}(k=1,2,...,K)\) is initially scaled up to \(\widetilde{c}_{k}\), while the input signal \(x_{k}\) is scaled up to \(\widetilde{x}_{k}\) in real-time using SM module. Figure 8: Hardware architecture of the proposed SFIR filter with scaling. Figure 6: Hardware architecture of scaling modules. Figure 7: Hardware architecture of re-scaling modules. * In the scaled stochastic multiplication module (SSM), the sign bit \(S(x_{k})\) and \(S(c_{k})\) are extracted from \(\widetilde{x}_{k}\) and \(\widetilde{c}_{k}\), respectively, while the magnitude bit-streams \(M(x_{k})\), \(M(c_{k})\) are transformed from \(\widetilde{c}_{k}\) and \(\widetilde{x}_{k}\), respectively, using B2S module. * Afterward, The multiplication on sign bit and magnitude bit-streams are mapped into \"XOR\" logic and \"AND\" logic, respectively. The bit-wise re-scaling operation is implemented by the RSM module. * Finally, The outputs of the SSM module are summed up with the TSM module and transformed back to binary format using the S2B module. Combining the proposed ASA and AV methods can further improve SNR of the output signal. The only difference between ASA based SFIR filter and ASA-AV based SFIR filter is the scaled stochastic multiplication module (SSM).