# DC Converter with Wide Soft Switching Operation, Wide Input Voltage and Low Current Ripple
## 3 Principles of Operation
**Step 6 [\(t_{5}\leq t<T_{sw}+t_{0}\)]:**\(S_{1}\) and \(S_{4}\) turn off at \(t_{5}\). Since \(i_{Lr}(t_{5})-i_{L1}(t_{5})>0\) and \(i_{Lr}(t_{5})+i_{L2}(t_{5})>0\), the capacitors \(C_{S2}\) and \(C_{S3}\) discharge at time \(t>t_{5}\). Since \(i_{Lr}<i_{Lm}\), \(D_{o2}\) is forward biased and \(v_{Lm}=-nV_{o}/2\). Step 6 ends at \(t=T_{sw}+t_{0}\) and \(v_{CS2}=v_{CS3}=0\). Figure 2: \(Cont.\)  
For high input voltage mode (Figure 1c), \(S_{ac}\) and \(S_{3}\) are off and \(S_{4}\) is on. Only active devices \(S_{1}\) and \(S_{2}\) are gated to adjust load voltage. Therefore, only one boost converter by \(L_{1}\), \(S_{1}\), \(S_{2}\) and \(C\) and the half-bridge structure \(LLC\) resonant converter by \(C\), \(S_{1}\), \(S_{2}\), \(L_{r}\), \(C_{r}\), \(T\) and \(S_{4}\) are used to realize zero-voltage turn-on. In high input voltage mode, the \(LLC\) converter has voltage gain \(G_{H}\) = 2\(nV_{o}/V_{in,\,H}\), where \(V_{in,\,H}\) denotes \(2V_{in,\,min}<V_{in}<4V_{in,\,min}\). Based on the dc voltage gains \(G_{L}\) = \(nV_{o}/V_{in,\,L}\) (low input voltage mode) and \(G_{H}\) = 2\(nV_{o}/V_{in,H}\) (high input voltage mode), it can obtain \(G_{H}\) = \(G_{L}\) due to \(V_{in,\,H}\) = 2\(V_{in,\,L}\). It means the proposed converter has the same circuit characteristics under low and high input voltage modes. Figure 3a gives the PWM signals and Figure 3b-g show the circuits for six operating steps. **Step 1 [\(t_{0}\leq t<t_{1}\)]:**\(v_{\text{C52}}\) = 0 at \(t_{0}\). Owing to \(i_{Lr}(t_{0})-i_{L1}(t_{0})<0\), \(D_{S2}\) is forward bias and \(S_{2}\) turns on after \(t>t_{0}\) to accomplish zero-voltage switching. \(i_{L1}\) increases and \(C_{r}\) and \(L_{r}\) are resonant and \(v_{Lm}\) = -\(nV_{o}/2\). **Step 2 [\(t_{1}\leq t<t_{2}\)]:**\(D_{o2}\) is reverse biased owing to \(i_{Lr}\) = \(i_{Lm}\) at time \(t_{1}\). Thus, \(L_{m}\), \(C_{r}\) and \(L_{r}\) are resonant and \(i_{L1}\) increases due to \(V_{L1}\) = \(V_{in}\). **Step 3 [\(t_{2}\leq t<t_{3}\)]:** Active device S2 is turned off at t = t2. Due to iL1(t2) - iLr(t2) > 0 and iLr(t2) > iLm(t2), CS1 will be discharged and Do1 becomes on. **Step 4 [\(t_{3}\leq t<t_{4}\)]:**\(v_{\text{C51}}\) = 0 at time \(t_{3}\). Owing to \(i_{L1}(t_{3})>i_{Lr}(t_{3})\), the body diode \(D_{S1}\) becomes on and \(S_{1}\) can be turned on after \(t>t_{3}\) to achieve soft switching turn-on. \(i_{L1}\) is decreasing in step 4 and \(D_{o1}\) conducts such that \(v_{Lm}\) = \(nV_{o}/2\). **Step 5 [\(t_{4}\leq t<t_{5}\)]:** At time \(t_{4}\), \(i_{Lm}\) equals \(i_{Lr}\) and \(D_{o1}\) becomes off. \(L_{m}\), \(C_{r}\) and \(L_{r}\) are resonant and \(i_{L1}\) decreases due to \(V_{L1}\) = \(V_{in}-V_{C}<0\). **Step 6 [\(t_{5}\leq t<T_{sw}+t_{0}\)]:** Switch \(S_{1}\) turns off at time \(t_{5}\). Since \(i_{Lr}\) is less than \(i_{Lm}\) and \(i_{L1}\) is less than \(i_{Lr}(t_{5})\), diode \(D_{o2}\) conducts and \(C_{S2}\) is discharged. When the voltage of \(C_{S2}\) is decreased to zero voltage at time \(T_{sw}+t_{0}\). Figure 2: Converter operated at low input voltage mode (**a**) main pulse-width modulation (PWM) signals, (**b**) step 1, (**c**) step 2, (**d**) step 3, (**e**) step 4, (**f**) step 5, (**g**) step 6. Figure 3: _Cont_.