## 1 Introduction  
In modern society, the demand of transmission capacity in wireless communication systems is continuously increasing. Forecasted by Cisco Visual Networking Index (VNI) published in 2017, global mobile data traffic will rise to 49 exabytes per month by 2021, which only reached 7.2 exabytes per month at the end of 2016 [1]. To fulfill this trend, high-speed parallel digital signal processing (PDSP) technologies [2] in wireless communication systems are becoming overwhelmingly prevalent in recent years.  
In 2013, Microelectronics and Nanotechnology (IEMN) demonstrated an offline photoelectronic system [3] with an 8.2 giga bit per second (Gbps) communication rate. In 2012, Fraunhofer Institute for Applied Solid State Physics (IFA) fulfilled an offline electronic system [4] with a 24 Gbps rate, and a high offline bit rate has been achieved at about 50 Gbps from the Nippon Telegraph and Telephone Public Corporation (NTT) of Japan in 2014 [5]. Although with high complexity, the potential of PDSP architectures attracts many research interests, off-line. In optical fiber communication, recent literatures have reported systems based on PDSP architectures [6; 7]. However, to our best knowledge, until now, only offline (non-real time) PDSP architectures [8] have been realized.  
Offline systems can be applied in many areas, such as High Definition (HD) movies and other applications. However, in many applications, real-time is required. For instance, an HD video call system has a large amount of data to be processed. If the baseband digital signal processing is running offline, the users will have to wait for a rather long time of processing before the user on the receiver side can get the information transmitted from the user in the transmitted side. To solve this problem, online (real-time) communication system is becoming an overwhelming prevalent technology nowadays.  
To enjoy the real-time features of communication systems, high order Quadrature Amplitude Modulation (QAM) [9; 10] is thought to be the key to improve the spectrum efficiency. High order QAM modulation communication systems always require quite complicated demodulator architectures. Hardware complexity and resource limitation are thought to be the main challenges in implementing such a real-time tremendous architecture. Field Programmable Gate Array (FPGA)-based [2] PDSP architecture is supposed to be the key to solve this problem, novel architectures emerge endlessly. Baseband PDSPs [11; 12; 13] are necessary in these demodulator architectures, while parallel timing synchronization is essential in baseband PDSPs.  
In this article, an improved two times oversampling parallel timing synchronization architecture aimed at real-time performance is proposed and then implemented on a Xilinx XC7 VX485T FPGA chip. The key technology is PDSP on FPGA, which greatly reduces the system clock frequency and makes it feasible to achieve real-time performance with current existing hardware devices. Specifically, a parallel First In First Out (FIFO) structure based on an index associated rearranging method and a dual feedback loop based on the Gardner algorithm are adopted in our parallel architecture.  
The rest part of this article is organized as follows. Section 2 describes several shortages of two existing parallel structures. The improved parallel structure and FPGA implementation is carried out in Section 3. Section 4 presents the simulation and implementation results. Finally, a conclusion is made in Section 5.