## 3 Materials and Methods
### Experimental Setup
Information on the radial motion of the Zhongxing-10 communication satellite and the ground station was obtained using real measurements in the previous closed-loop locking experiment of the satellite-ground link. From the ground station perspective, this movement was similar to a sinusoidal motion with a period of 24 h, a maximum speed of  
Figure 8: Hardware structure of the ground experimental system. approximately 1-2 m/s, and a maximum change in the distance of approximately 20 km. In the design of the satellite-ground link closed-loop feedback system, to offset the satellite Doppler effect, the host computer must offset a certain frequency on the transmitting end or the receiving end to perform pre-compensation, which counteracts the influence of the satellite's speed. Consequently, for the designed control system, the closed-loop tracking performance was primarily influenced by the rate of change in the velocity of the GEO satellite relative to the ground station, that is, its acceleration. To address this, we used a stepper motor to control the slide's reciprocating motion following a sinusoidal pattern. The module is driven by a high-precision servo-controlled stepper motors, capable of sinusoidal motion with a 1000 mm amplitude, 0.05 mm positioning accuracy, and adjustable period. By analyzing the frequency stability before and after compensation, we can quantitatively assess the dynamic clock recovering performance. The maximum acceleration of the motion was identical to the measured acceleration of the radial motion of the communication satellite, relative to the ground station. Furthermore, we simulated an equivalent 5 km propagation path under dynamic conditions, considering both power attenuation and time delay effects. For the closed-loop delay equivalent simulation of a 5 km bidirectional link, assuming electromagnetic waves propagate at approximately the speed of light, an additional delay of approximately 32 us was introduced into the entire closed-loop system. In the actual implementation, after the signal is sampled by the ADC, it is transferred to the FPGA via Direct Memory Access (DMA). Within the FPGA, the signal undergoes a predefined delay using the Delay Line module, followed by bandpass filtering and quadrature demodulation. The IQ channels of the two demodulation paths are driven by the same decimally zeroed Direct Digital Synthesis (DDS) module. Upon completion of demodulation, two complex baseband signals are generated. By performing a conjugate multiplication of these two complex signals and filtering out the high-frequency components, the phase difference between the two received signals can be obtained. Figure 9: Digital signal processing flow. The architecture and implementation details of the Delay Line module are illustrated in Figure 10. This module consists of a series of cascaded shift registers, operating at a 25 MHz clock rate, to achieve precise and deterministic delay in the digital domain. Since the shift timing of the cascaded registers is entirely determined by the hydrogen maser reference, its accuracy is well ensured. Additionally, to facilitate adjustable delay values in subsequent experiments, each Delay Unit is externally accessible and controlled by a dedicated 8-bit memory cell. When a specific bit is set to 1, the corresponding delay unit is activated. Under ideal conditions, the Delay Line module is capable of introducing a tunable delay, ranging from 0 \(\upmu\)s to 64 \(\upmu\)s, with 8 \(\upmu\)s step resolution. Power attenuation is calculated according to the free-space frequency propagation model, as shown below:  
\[PL(dB)=10\lg\frac{P_{T}}{P_{R}}=-10\lg\left[\frac{G_{T}G_{R}\lambda^{2}}{(4 \pi)^{2}d^{2}}\right]. \tag{11}\]  
where \(PL(dB)\) is the power attenuation value, \(P_{T}\) is the transmitting power, \(P_{R}\) is the receiving power, \(G_{T}\) is the transmitting antenna gain, \(G_{R}\) is the receiving antenna gain, \(\lambda\) is the electromagnetic wave wavelength, and \(d\) is the transmission distance.