# Nonvolatile Organic Floating-Gate Memory Using N2200 as Charge-Trapping Layer
## 1 Introduction
[27] proposed a flexible FG-OFETM based on an integrated molecular FG/tunneling layer and a pn heterojunction channel layer, which was prepared by configuring a mixed solution of polymer semiconductor poly (9,9-dioctylffluorene- co-benzothiazole) (FSBT) NPs and polystyrene (PS) and then spin-coating on poly (vinylidene flifluoride-trifluoro-ethyl-lene-chloroflluoroethylene) [P(VDF-TrFE-CFE)] film to obtain an integrated floating-gate/tunneling layer thin-film memory. The device presents a large memory window of 21.6 V at an operating voltage of \(\pm\)60 V. After 200 cycles of P/E operation, device performance does not degrade significantly, showing excellent erasing endurance and a highly stable charge storage retention capability for up to 10 years. [PERSON] et al. [28] prepared NPs by the mixed solution method and mixed them with poly(methyl methacrylate) (PMMA) to prepare a flexible OFETM with an integrated floating-gate/tunneling layer, which had a memory window of 9.5 V after \(\pm\)40 V P/E operations. After bending 6000 times with a bending radius of 3 mm, it still exhibited excellent retention characteristics. [PERSON] et al. [29] prepared an organic field-effect transistor memory based on single-walled carbon nanotubes as a nano-FG by the solution method. Under an operating voltage of \(\pm\)60 V, the device exhibited a large memory window of 26.7 V, and the device memory switch ratio exceeded \(10^{3}\). After 500 cycles of programming and erasing, it still exhibited excellent erasing endurance and retention characteristics. [PERSON] et al. [30] used polysilicon material as a charge-trapping layer to prepare FG-OFETM. With the assistance of the TCAD tool, simulations were conducted, and it was verified that the device exhibited a large memory window of 57.5 V and a current on/off ratio of more than \(10^{3}\) after \(\pm\)70 \(V_{\text{P/E}}\) operation. From the above literature, it is clear that a large memory window can be obtained by FG-OFETM. However, it is also found that this approach requires a high operating voltage, and the retention characteristics need to be further improved. In order to improve this situation, it is necessary to find a material with a high charge-trapping capability and low operating voltage to enhance the performance of OFETM. An n-type semiconductor material is usually used as the active layer in OFET devices and can also be used as an FG layer in FG-OFETM. For example, [PERSON] et al. [31] prepared nano-FG memory, with ZnO nano-crystals being used as a charge-trapping layer. [PERSON] et al. [32] prepared thin-film transistor memory based on ZnO as a charge-trapping layer by utilizing the atomic layer deposition method. [PERSON] et al. [33] reported an OFET with the n-type semiconductor ZnO embedded in pentacene as the active layer. Based on the theory of electrostatic induction, the hole barrier caused by the pentacene defect layer can be adjusted by the thickness of the n-type semiconductor intermediate layer and the carrier density, which can reduce the barrier height of the hole injection into the pentacene, thus reducing the operating voltage of the device. Due to the low-temperature-processing advantages of organic semiconductors, one study chose the n-type polymer semiconductor N2200 to replace ZnO. As an n-type semiconductor material, N2200 is often used as an active layer in organic field-effect transistors. When it was introduced into the OFET with pentacene as the active layer (N2200 is placed between the pentacene and the gate insulator), it was discovered that when N2200 is utilized as an intermediate layer, it not only reduces the barrier for hole injection into the pentacene, but can also efficiently capture holes from the pentacene, thereby enhancing the performance of the OFET.