## 4 Discussion  
This system integrates an FPGA-based implementation of a chaotic communication system utilizing a modified Chua chaos generator, an error feedback chaotic synchronization method, and FM-ACSK modulation. Within the broader domain of chaotic communication systems, this design distinguishes itself through its unique configuration and innovative approach. The proposed FM-ACSK system, while limited to a modest data rate of 6.1 kbps (with a 50 MHz clock, 8192 clock cycles per symbol, and 1 data bit per symbol), serves as a proof-of-concept for an alternative approach to chaotic communication, specifically tailored for FPGA implementation. The ACSK modulation part employs coherent detection and an error feedback chaotic synchronization technique, which holds potential for establishing secure and reliable communication links. Meanwhile, the use of FM enables stable passband operation, simplifies carrier frequency and bandwidth management compared to chaotic carriers, and eliminates the need for carrier phase synchronization. Additionally, the constant power envelope of the FM transmitter minimizes the peak-to-average power ratio (PAPR), a common limitation in other communication systems that can hinder transmitter efficiency. A Simulink-based mathematical model was developed alongside the FPGA prototype to simulate the digital components of the communication system. Leveraging the FPGA for key system functionalities provides significant flexibility, enabling iterative enhancements and modifications without the need for hardware re-fabrication. This model streamlines the design and validation, allowing for performance evaluation under a range of conditions, and substantially reducing the complexity and time investment typically associated with FPGA-based prototyping. As is common with coherent chaotic communication systems, noise immunity remains a challenge, with system performance closely tied to the quality of chaotic synchronization during demodulation. This trade-off underscores the inherent balance between achieving enhanced physical layer security and managing sensitivity to noise. The performance of the FM-ACSK system was evaluated in an AWGN channel, achieving a BER of \(10^{-4}\) at an SNR of approximately 5.6 dB in simulation. This performance surpasses that of the previously studied ACSK system, where a similar BER for the simulation was achieved at an SNR of 8 dB under comparable conditions. For the FPGA prototype, a BER of \(10^{-4}\) is observed at an SNR of around 6.3 dB, which aligns with expectations when transitioning from a simulation to real hardware. The observed irregularities in the BER curves for the prototype highlight additional areas for further investigation and refinement of the system. When comparing the BER performance of the FM-ACSK system with other chaotic communication systems, a few relevant examples stand out, though such comparisons are approximate due to differences in design and application. For instance, [PERSON] and [PERSON] [28] demonstrated an offset quadrature phase shift keying (OQPSK) modulation scheme with a chaos generator, achieving \(10^{-4}\) BER at an SNR of 8.2 dB. In another study, [PERSON] and [PERSON] [29] proposed a non-coherent modified COOK scheme, achieving \(10^{-4}\) BER at an SNR of 12 dB. [PERSON] et al. [30] observed an SNR of 8.8 dB at \(10^{-4}\) BER in a chaos-based direct sequence spread spectrum (DSSS) system, while [PERSON] [31] reported an enhanced frequency-modulated quadrature chaos shift keying (FM-QCSK) system achieving \(10^{-4}\) BER at a 10 dB SNR. For reference, a conventional non-chaotic binary phase shift keying (BPSK) scheme theoretically achieves \(10^{-4}\) BER at an SNR of around 8.2 dB. These results indicate that the FM-ACSK system's noise performance is competitive with other systems and has potential for improvement as the technology matures.