## 4 Simulation and Experimental Validation  
### Comparison and Verification of Simulation Results  
In order to analyze the anti-interference control effect of the control strategy on the CCM flyback converter, this paper uses MATLAB R2022b simulation software to build a simulation model of the CCM flyback converter. The specific electrical parameters are shown in Table 1. Figure 6 shows the block diagram of the converter with the proposed control method. The effects of input voltage \(u_{\rm in}\) jump, load \(R_{\rm L}\) jump, and internal parameter \(L_{m}\) fluctuation of the converter on the output voltage of the designed converter were simulated. At the same time, PID control algorithms were compared and simulated for the system under the same internal and external conditions. By adjusting the controller parameters of the two control algorithms, the adjustment time and overshoot range of the output voltage response of the converter system are roughly the same, in order to compare the suppression ability of the two control strategies on output voltage fluctuations when the system is subjected to internal and external disturbances. Figure 7 shows the control simulation results of two control strategies. \begin{table}
\begin{tabular}{c c} \hline
**Parameter** & **Rating** \\ \hline Input voltage \(V_{\rm in}/\rm V\) & 311 \\ Maximum duty cycle \(D\) & 0.4 \\ Excitation inductance \(L_{\rm m}/\rm\mu H\) & 580 \\ Transformer turns ratio \(n\) & 10.29 \\ Output power \(P_{\rm o}/\rm W\) & 72 \\ Output voltage \(V_{\rm o}/\rm V\) & 12 \\ Resistive load \(R_{\rm L}/\Omega\) & 2 \\ Output filter capacitor \(C/\rm\mu F\) & 2000 \\ \hline \end{tabular}
\end{table} 
Table 1: Flyback converter electrical parameters. Figure 6: Block diagram of second-order LADRC for flyback converter. Figure 7: _Cont._  
Figure 7a shows the response waveform of the output voltage \(V_{\rm o}\) of the converter when the load suddenly drops by 50% from the rated load 72 W, i.e., jumps to 36 W. Figure 7b shows the response waveform of the system output voltage \(V_{\rm o}\) when the rated load 72 W suddenly increases by 40%, i.e., jumps to 100.8 W. It can be seen that when the load suddenly drops, the output voltage fluctuation range of the second-order LADRC is smaller, with a maximum peak of 12.96 V, a minimum peak of 11.68 V, and an overshoot of 8%. The maximum peak value during PID control is 13.13 V, the minimum peak value is 11.57 V, and the overshoot is 9.42%. When the load suddenly rises, the system can gradually recover a stable 12 V output voltage under second-order LADRC, while the system output voltage under PID control continuously fluctuates between 12.36 V and 11.66 V.  
Figure 7: Simulation results. (**a**) Output voltage waveform during load dip. (**b**) Output voltage waveform during load swelling. (**c**) Output voltage waveform when input voltage surges up. (**d**) Output voltage waveform when input voltage dips. (**e**) Output voltage waveform when the excitation inductor jumps. Figure 7c,d show the dynamic changes of the output voltage when the input voltage suddenly increases by 6.43% and decreases by 6.43%. Meaning, when the output voltage suddenly rises from 311 V by 20 V and drops by 20 V. From the figure, when the input voltage suddenly rises, the maximum output voltage jump of the converter under second-order LADRC is 12.91 V, and the overshoot is 7.58%; the maximum output voltage under PID control is 13.29 V, with an overshoot of 10.75%. When the input voltage drops suddenly, the minimum output voltage drop of the flyback converter under second-order LADRC is 11.65 V, accounting for 2.92% of the steady-state value; under PID control, the minimum output voltage drop is 11.61 V, accounting for 3.25% of the steady-state value. Under second-order LADRC, the system output voltage drop is even smaller. Figure 7e shows the internal parameters of the system.