## 4 Parallel Implementation
Then if \(NV>M\) and \(NV\) is divided by \(M\) without a reminder, the cycle iterations \(\frac{NV}{M}\) are carried out on each processor. The time of cycle performance is  
\[T_{M}=\frac{pNV}{Mc}, \tag{18}\]  
Acceleration \(S_{M}\) can be defined using relationship \(T_{0}\) to \(T_{M}\) and, as a result, obtain  
\[S_{M}=M, \tag{19}\]  
This formula is proven for acceleration and is fair in full absence of losses. The efficiency of parallel computing is calculated using the formulas presented in [67]:  
\[E=\frac{T_{0}}{MT_{M}}, \tag{20}\]  
where \(T_{0}\) is the calculation time in sequential mode, \(T_{M}\) is the calculation time using \(M\) processes. This ratio allows you to calculate the efficiency factor without taking into account losses. In the case when during the operation of the algorithm, there are performance losses for creating and closing processes, as well as losses for data exchange. In this case, the process running time will be described by the \(T^{\prime}_{M}\) parameter. Efficiency is calculated using the formula [67]:  
\[E=\frac{T_{0}}{MT_{M}}=\frac{T_{0}}{M\big{(}T_{M}^{0}+\pi T_{M}^{0}\big{)}}= \frac{1}{(1+\alpha_{M})} \tag{21}\]  
Figure 3: Scheme of parallelization of the calculation along the \(N\) axis. \[\alpha_{M}=\frac{T_{M}^{\prime}}{T_{M}^{0}} \tag{22}\]  
Acceleration can be calculated using the formula [67]:  
\[S_{M}=\frac{M}{(1+\alpha_{M})}, \tag{23}\]  
The calculations were performed on a multiprocessor cluster in the Sirius University of Science and Technology, which consists of 40 computing nodes (Dell PowerEdge R640 Server) and one management server (Dell PowerEdge R640 Server), interconnected using an Infiniband computer network and an Ethernet network for monitoring and managing jobs. Computing nodes are numbered continuously in the form \"cn-X\" (where X is a number from 001 to 040). Each computational node includes:  
* 2 Intel Xeon Gold 6140 processors, 2.3 GHz, 18 cores/36 threads, 10.4 GT/s, 24.75 MB cache, Turbo, HT (140 W), DDR4 2666 MHz. * 8 memory modules RDIMM 32 GB, 2666 MT/s. * Mellanox Technologies MT27800 ConnectX-5 Single Port Infiniband Adapter, EDR (name ib0 within host or cn-X-ib0 within cluster). * Dual Port Ethernet NIC--Intel Corporation Ethernet Controller X710 for 10 GbE SFP + (eth0). * SATA 200 GB. * The control node of the computing cluster consists of:
* 2 Intel Xeon Gold 5118 processors, 2.3 GHz, 18 cores/36 threads, 10.4 GT/s, 24.75 MB cache, Turbo, HT (140 W), DDR4 2666 MHz. * 8 memory modules RDIMM 32 GB, 2666 MT/s. * Mellanox Technologies MT27800 ConnectX-5 Single Port Adapter Infiniband, EDR (name ib0 within the host or nodeXXX-ib0 within the cluster). * Dual Port Ethernet NIC--Intel Corporation Ethernet Controller X710 for 10 GbE SFP + (em0). * Dual Port Ethernet NIC--I350 Gigabit Network Connection (em3). * 4 SAS disks 1.8 TB, 10,000 rpm  
The parallel program is written in Python 3.x. Anaconda version 4.6.2 was used as an interpreter since parallel settlement is performed within one main process. Then the efficiency is considered for each of the calculation blocks separately. Figure 5 shows how the efficiency of a parallel program depends on the number of processes involved in the calculation for the first computational block. The actual efficiency decreases in comparison with the estimated one. This may be due to the fact that the operating time of the function called by the process is less than the time of the process call, and in this case, with a further increase in the number of processes, the efficiency will not increase, but will only decrease. With a further increase in the number of processes, the total execution time is expected to decrease; however, after 16 processes, the efficiency begins to decrease, since the acceleration on each individual process can no longer cover the increase in the time for data merging. The dependence of the acceleration on the program of the first block is shown in Figure 2:0  
Figure 2:1 Block diagram of the algorithm.