# An Efficient On-Chip Data Storage and Exchange Engine for Spaceborne SAR System
## 5 Experiments and Results
### Experimental Results and Performance Evaluation
#### 5.2.1 Superscalar Pipeline Data Storage and Exchange Engine
The schematic diagram of the comparison results is shown in Figure 18.  
The pipeline throughput rate refers to the number of tasks completed by the pipeline per unit time. The most fundamental formula for calculating the pipeline throughput rate is as follows:  
\[TP=\frac{N}{T_{pipeline}} \tag{15}\]  
\(N\) is the number of completed tasks, and \(T\) represents the time it takes to complete these tasks in the pipeline. In this paper, the data processing of four range lines or azimuth lines is regarded as the number of tasks at one time. Pipeline efficiency refers to the utilization rate of pipeline resources, which is one of the important indicators used to measure the idleness of the pipeline. Its calculation formula is as follows:  
\[E=\frac{Z_{Occupied}}{Z_{Total}}\times 100\% \tag{16}\]  
\(Z_{Occupied}\) is the space-time area occupied by the pipeline for completing N tasks, and \(Z_{Total}\) is the total space-time area. The speedup ratio of the pipeline refers to the ratio of the time spent without the pipeline to the time spent with the pipeline when completing the same batch of tasks. The higher the speedup ratio of the pipeline the better, which reflects the quality of the effect of using the pipeline. Its calculation can be expressed by the following formula:  
\[SP=\frac{T_{Non-pipeline}}{T_{pipeline}} \tag{17}\]  
\(T_{Non-pipeline}\) is the time used to complete this batch of tasks without using pipeline technology, and \(T_{pipeline}\) is the time used to complete this batch of tasks under when using pipeline technology. Dual-port RAM must be used as the data buffer exchange region between the DDR3 and the processing engine for the superscalar pipeline data exchange engine to be implemented in the FPGA. The DDR3 burst transfer length is 8 in the actual experiment environment. The burst transmission data read by the two channels at the same time belong to four range lines for the range direction in accordance with the dual-channel, sub-matrix, equally divided, three-dimensional, cross-mapping storage method. For the azimuth direction, the burst transmission data read by the dual-channel at the same time also belong to the four azimuth lines. The utilization rate of the azimuth and range computing engines can thus be 100% after the data have been exchanged and transferred to the computing engine for calculation. In addition, compared with non-pipeline and traditional scalar pipeline, the superscalar pipeline shows greater performance improvements  
Figure 18: Schematic diagram of superscalar pipeline performance comparison. (**a**) Throughput rate; (**b**) Efficiency; (**c**) Speedup ratio. in pipeline throughput rate, efficiency, and speedup ratio, greatly reducing system idle time and improving data exchange efficiency. The experimental results show that the data storage exchange engine based on superscalar pipeline proposed in this paper has a high storage access bandwidth. Both the storage access bandwidths--the azimuth storage access bandwidth, which can reach up to 20.0 GB/s, and the range storage access bandwidth, which can reach up to 16.6 GB/s--have significantly more bandwidth than the previous ones. With the pipeline design of the superscalar structure, the raw data can be stored in two off-chip DDR3 with equal division, which makes the storage capacity double, which will mean that the storage exchange engine designed in this paper can adapt to the larger granularity of SAR raw data. This design also reduces the matrix transposition time by 48% compared with the latest study, effectively improving the data transposition efficiency. The single burst transmission data belong to the four range directions and four azimuth directions. The two-dimensional data accesses are balanced, so that the computing resource utilization rate reaches 100%, and the idle resources are fully utilized.