## 3 Results and Discussion  
Figure 3 presents a comparative thermal analysis with varying numbers of thermal vias. Thermal via arrays with uniform pitch were placed beneath the LED chip. For via numbers ranging from 1 to 9, the pitch was fixed at 0.4 mm. For 16 and 25 vias, the pitch was reduced to 0.3 mm and 0.2 mm, respectively, considering the LED footprint and via dimensions (Figure 3a). Figure 2: Reference simulation of the LED module without thermal vias. (**a**) Transient temperature response of \(T_{\text{LED}}\). (**b**) Three-dimensional temperature distribution across the full body of the LED and substrate. (**c**) Temperature distribution measured at Monitor 1, showing \(T_{\text{LED}}\) reaching 129 \({}^{\circ}\)C at the center. Black lines represent isothermal contours. As shown in Figure 3b,c, the temperatures of both the LED and substrate decreased with the addition of thermal vias. The spatial distribution of the LED temperature on the Monitor 1 plane was represented by the isothermal contours of 97.9\(-\)98.4 \({}^{\circ}\)C, 75.8\(-\)76.1 \({}^{\circ}\)C, 70.6\(-\)70.9 \({}^{\circ}\)C, and 66.3\(-\)66.3 \({}^{\circ}\)C for 1, 5, 9, and 25 vias, respectively (Figure 3b). Similarly, the spatial distribution of the substrate temperature on the Monitor 2 plane was 97.6\(-\)98.4 \({}^{\circ}\)C, 75.3\(-\)75.7 \({}^{\circ}\)C, 70.5\(-\)70.8 \({}^{\circ}\)C, and 66.2\(-\)66.3 \({}^{\circ}\)C, respectively (Figure 3c). The minimum temperature was consistently observed at the center of both the LED and substrate. The full trends in \(T_{\rm LED}\), \(\Delta T_{\rm LED}\), \(T_{\rm sub}\), and \(\Delta T_{\rm sub}\) as a function of the number of thermal vias are shown in Figure 4. Even a single thermal via substantially reduced the temperature (\(T_{\rm LED}\): 129 \({}^{\circ}\)C \(\rightarrow\) 98.4 \({}^{\circ}\)C; \(T_{\rm sub}\): 129 \({}^{\circ}\)C \(\rightarrow\) 98.4 \({}^{\circ}\)C). However, heat dissipation saturates beyond a certain number of vias. For instance, increasing the number of vias from 5 to 9 (80% increase) reduced \(T_{\rm LED}\) by approximately 7.3% (76.1 \({}^{\circ}\)C \(\rightarrow\) 70.9 \({}^{\circ}\)C), whereas increasing from 9 to 16 (77% increase) resulted in only a 3.95% reduction, and from 16 to 25 (56% increase), the reduction was merely 2.5%. For configurations with 16 or 25 vias, the reduced pitch increased via density, and the greater number of vias expanded the total heat transfer area. However, these changes led to a negligible reduction in temperature. The saturation behavior can be understood by considering the effective cross-sectional area available for heat conduction. In the substrate, parallel heat conduction paths are formed by vias and surrounding substrate material in the vertical direction of the module [14; 18; 32; 43; 44; 45]. Analytical models describing thermal resistance in such parallel heat conduction paths have been established in prior studies [43; 44; 45; 46]. In our case, the effective thermal resistance (\(R_{\rm sub}\)) across the substrate can be expressed as:  
\[\frac{1}{R_{\rm sub}}=\frac{k_{\rm via}\cdot A_{\rm via}}{L}+\frac{k_{\rm sub }\cdot A_{\rm sub}}{L} \tag{3}\]  
where \(k_{\rm via}\) and \(k_{\rm sub}\) are the thermal conductivities of thermal via (copper) and substrate material (FR4), respectively (in W/m\(\cdot\)K); \(A_{\rm via}\) and \(A_{\rm sub}\) are their respective cross-sectional areas (in m\({}^{2}\)); and \(L\) is the heat path length (i.e., substrate thickness, in meters). The large disparity between \(k_{\rm via}\) (400 W/m\(\cdot\)K) and \(k_{\rm sub}\) (0.3 W/m\(\cdot\)K) results in a significant reduction in \(R_{\rm sub}\) when even a single via is introduced. While the copper fraction continues to increase with the addition of more vias, its incremental contribution to reducing \(R_{\rm sub}\) becomes marginal due to the already-dominant high-conductivity paths. As a result, the rate of decrease in \(R_{\rm sub}\) gradually diminishes.