# Quantum Circuit Implementation of Multi-Dimensional Non-Linear Lattice Models
## 7 Detailed Description of Quantum Circuit for \(u^{2}+v^{2}\) Evaluation (Design _EKin2D3_)
### \((2N_{M}+3)=11\)-Qubit Results Register \(|r10|\ldots|r00\rangle\)  
In this design, a mantissa-squaring operation termed \(SQ5\) sets the result in an \(11\)-qubit output register for \(N_{M}=4\). For each of the \(N_{M}+1=5\) steps, five \(u\)-mantissa qubits and five \(v\)-mantissa qubits are added to the results register to employ two controlled, modified \(6\)-qubit full adders. Similar to the modified \(5\)-qubit full adders for the \(9\)-qubit workspace design, the modification is based on the fact that the leading qubit in the original \(6\)-qubit  
Figure 11: Design \(EKin2D3\) with \((N_{M}+1)-\)qubit mantissa squaring output register.  
input is \(|0\rangle\). Then, for the mantissa of \(u\) and \(v\), \(N_{M}+1=5\) qubits are conditionally added into a \(N_{M}+3=7\)-qubit output register for the adder. A total of four shift operations are applied to the 11-qubit output register \(|r10|\ldots|r00\rangle\) of the squaring operations, i.e., between each of the controlled-addition steps. This extended squaring operation is detailed in Figure 13.  
Figure 12: Design _EKin2D3_ with \((N_{M}+1)-\)qubit mantissa squaring output register-\(SQ4\) operator.  
Figure 13: Quantum circuit defining \(SQ5\) used in the computation of \(u^{2}+v^{2}\). Scaled velocity components \(u\) and \(v\) are represented as floating-point numbers with four mantissa qubits (\(N_{M}=4\)) and three exponent qubits (\(N_{E}=3\)). Circuit uses modified 6-qubit Cuccaro full adders (\(FA_{u}\) and \(FA_{v}\)) with 11-qubit results register. \(Sh\) performs a ‘downward’ shift of the results register.  
Setting up the \(SQ5\) operation differs significantly from setting up \(SQ4\) in the previous design, as can be seen in Figure 14, where the overall design of the quantum-circuit implementation is shown. Here, five qubits define the mantissa of \(u\)-velocity and are set as \(|1|mu2|mu1|mu0|0\rangle\) for normalized \(u\)-velocity and \(|0|mu2|mu1|mu0|0\rangle\) for sub-normal \(u\). For \(E_{u}-E_{v}=0\), the five qubits defining the \(v\)-velocity are set similarly as \(|1|mv2|mv1|mv0|0\rangle\) for normalized \(v\)-velocity, and \(|0|mv2|mv1|mv0|0\rangle\) for sub-normal \(v\). Next, for \(E_{u}-E_{v}=1\), the five \(v\)-mantissa qubits are set as \(|0|1|mv2|mv1|mv0\rangle\) for normalized \(v\)-velocity, and \(|0|0|mv2|mv1|mv0\rangle\) for sub-normal \(v\). This means that for \(E_{u}-E_{v}=1\), there is no elimination of the least-significant mantissa-qubit for \(v\) (as there was in the \(11\)-qubit workspace design). For \(E_{u}-E_{v}\geq 2\), shifts to the \(v\)-matissa qubits will be applied so that one or more less-significant \(v\)-mantissa qubits will be removed. The least-significant qubit in the \(5-\)qubit \(u\)-mantissa string is, therefore, always \(|0\rangle\), explaining the absence of the full-adder for \(u\) in the first step in \(SQ5\), shown in Figure 13.  
Figure 14: Design \(EKin2D3\) with \((N_{M}+3)-\)qubit mantissa squaring output register.  
An alternative implementation for \(N_{M}=4\) using the modified, controlled 5-qubit full adders, as used previously in the 9-qubit workspace implementation, can also be created. In that case, the squaring operation based on the shift-and-add approach employs \(N_{M}+2=6\) steps with \(N_{M}+1=5\) shift operations. In the interest of brevity, this alternative circuit design is not discussed further.