## 4 JTAG Security Solutions
### Based on Physical Unclonable Functions (PUF)  
[PERSON] et al. [24] (2007) provided unique lightweight \"Physical Unclonable Functions (PUFs)\" scheme to establish a secure communication between master and all slaves. The PUF is an innovative primitive that prefers looking key secrets in complex physical characteristics rather than storing them in digital memory. Usually, the cryptographic secret keys are stored in the non-volatile digital memory and those keys are susceptible to the physical attack [25; 26; 27]. Moreover, continuous battery powered, resource hungry add-on tamper sensing circuitry is often required for higher memory security. On the other hand, each IC has a different microstructure that depends on random physical factors introduced during manufacturing even if same IC manufacturing with same process is being followed. Here, the PUF generates volatile secrets when chip is powered on and running since it considers random delay characteristics of wires and transistors. This experiment proposed challenge response-based solution also known as Ring Oscillator (RO) PUF to provide JTAG security. The challenge sequence fed to the IC circuit for pseudo random generator then PUF delay circuit is evaluated k times. A ring oscillator is simple circuit which oscillates at a certain frequency. However, this ring oscillator in each IC gives slightly different frequency due to the manufacturing variation. Thus, even if the same input is challenged to different ICs, it has different response output. In addition, this ring oscillator is highly sensitive to temperature and voltage changes. Hence, the PUF output could be distorted while generating keys. Thus, the authors proposed the solution of creating challenge response pairs to minimize the error rate. These pairs are created by comparing two ring oscillators that have a huge frequency difference called masking. This ring oscillator solution gives unique key generation but limited number of challenge pairs. To overcome this, the authors proposed two ways to create many challenge response pairs. First, extensions of oscillators need to have configurable delay paths. Here, a challenge can select the configuration path that is within a delay loop so that distinct challenges gives distinct oscillation frequency. Second, a the facility of programmable logic such as FPGA, which hasinverters, look-up tables and wires, can be used to determine oscillator configuration. To authenticate and authorize trusted party with this solution, the manufacturer of IC has to keep record of different challenge response at the time manufacturing process. If response of IC while getting JTAG access is matched with record, then only JTAG access is given to the party considering it as trusted party. To prove this, the authors experimented on ASIC implementation of the 64-stage arbiter PUF on 15 Xilinx Virtex4 LX25 FPGAs (90 nm) which shows PUF can be used secret key generation and authentication. The authors successfully conducted \"inter-chip variation\" and \"intra-chip variation\" experiments to test uniqueness and reliability of PUF output. The PUF is not only lightweight and unique but also ideal for extremely resource constraint platform such as RFID and IOT nodes. Another advantage of PUF is that it does not require any special manufacturing process or programming and testing steps.