## 5 Results: MVLL in Microcontroller Module
```
135 MOV P2,#110; to write in #SB=#110
136 CLR P1.6; enable Rg2 by \(\overline{CE}\)
137 SETB P1.4; write #SB=#110 to Rg2
138 CLR P1.4
139 SETB P1.6; lock Rg2
140 MOV P2,R2; #LB is the counter of pt
141 CLR P1.3; enable SRAM by \(\overline{CE}\)
142 CLR P1.1;\(\overline{OCE}\) enables output of SRAM
143 MOV P0,R0; write result from R0
144 SETB P1.1; disable output of SRAM
145 SETB P1.3; disable SRAM
146 DJINZ R4,NPT; test new pt
147 RETI
148
```
**OUTPUT**:\(\{\mathbf{p}t_{1},\dots,\mathbf{p}t_{m}\}\)\(\rightarrow\) \"Shortened\" product terms are written in SRAM

Second subroutine MINHMPT is given in Algorithm 5 and calculates the set of \"full\" product terms including logic constants \(h^{(i,1)}\), it exploits only operators MIN. ```
137 SETB P1.4; write #SB=#110 to Rg2
138 SETB P1.6; lock Rg2
140 MOV P2,R2; #LB is the counter of pt
141 CLR P1.3; enable SRAM by \(\overline{CE}\)
142 CLR P1.1;\(\overline{OCE}\) enables output of SRAM
143 MOV P0,R0; write result from R0
144 SETB P1.1; disable output of SRAM
145 SETB P1.3; disable SRAM
146 DJINZ R4,NPT; test new pt
147 RETI
148
```
**Algorithm 5**Subroutine MINHMPT to calculate the set of full product terms \(PT_{1}=MIN\Big{(}h^{(1,1)},pt_{1}\Big{)},\dots,PT_{m}=MIN(h^{(m,1)},pt_{m})\). The first of necessary subroutines is the third MVLL procedure MAXPT uses operator MAX for the set of obtained above product terms PTs and is given in Algorithm 6. The obtained value \(h^{(out)}\) is to be compared with the declared external version \(h^{(out)}\) ; this should approve (or not) data of the third party. Given above result has used internal hash values \(H^{(int)}\), which can be calculated by means of two simple hashing procedures for binary \(XOR\) given above in Section 3.4. This method of hashing is represented by subroutines HASHN (I step) and HASHINT (II step). They directly respond to procedures from Algorithm 3 and are shown in Algorithms 7 and 8. The first of them estimates the hash value for quasi-random fragmented key and internal parameters. The used for hashing binary \(XOR\) operator responds in the specification list of MCS-51 to \(XRL\). Name of instruction \(RDWN\) prompts the reading of corresponding \(w_{n}\), as in general case the number of documented parameters of subsystems may differ. ```
INPUT:\(PT_{1}\),..., \(PT_{m}\leftarrow\) \"Full\" product terms
1 MAXPTS:MOV R1,#111; #_SB111 for PTs_ 2 MOV R2,#255; _counter of PTs_
3 MOV P2,#000b; _output #A18-A16 for Rg1_ 4 CLR P1.7; enable Rg1 by \(\overline{CE}\)
5 SETB P1.4; Rg1 writes #A18-A16 6 CLR P1.4
7 SETB P1.7; _lock Rg1_ 8 MOV P2,R1; addressing #SB=#111
9 CLR P1.6; _enable Rg2 by \(\overline{CE}\)_ 10 SETB P1.4; _write #SB=#111 to Rg2_
11 CLR P1.4
13 MOV P2,R2; #_LB is the counter of PTs_ 14 CLR P1.3; _enable SRAM by \(\overline{CE}\)_ 15 CLR P1.1;\(\overline{CE}\)_ enables output of SRAM_ 16 MOV A,P0; _read PT_
17 SETB P1.1; _disable output of SRAM_ 18 SETB P1.3; _disable SRAM_ 20 NEXTMOV P2,R2
2 CLR P1.3; _enable SRAM by \(\overline{CE}\)_ 22 CLR P1.1;\(\overline{CE}\)_ enables output of SRAM_ 24 SETB P1.1; _disable output of SRAM_ 25 SETB P1.3; _disable SRAM_ 26 MOV R3,A; _save value of Acc_ 27 CLR C 28 SUBB A,R7
29 JNC MAX_N1 30 MOV R0,R7
31 MAX_N1:MOV R0,R3
32 DJNZ R2,NEXTMT
33 RETII
```
**OUTPUT**: R0 \(\to h^{(out)}\), result is written in register R0

**Algorithm 6**Subroutine MAXPTS calculates final result \(PT_{m}=\) MAX (\(PT_{1}\),...,\(PT_{m}\)). ``` INPUT:\(N\leftarrow\) number of subsystems (N = 3) \(w_{1}\),..., \(w_{n}\leftarrow\) numbers of documented parameters in sysbystemens \(r_{d_{s}}^{(n)}\leftarrow\) quasi-random fragmented keys \(1\) \  
However, final commutation of schemes in Figures 6 and 7 needs not only to optimize commutation of control pins, but demands modelling of decision-making module and is out of discussion here. Microassembler subroutines for calculation of AGA operators MINIMUM, MAXIMUM, and Literal were also given earlier in [19], and MVL function calculation in C language was shown in Supplement in [18].