## 4 Experimental Results  
The experiments with the proposed structure were conducted on an embedded board used to run the TinyML application and an FPGA, in which a custom I\({}^{2}\)S module was programmed. The STM32F4-Discovery embedded board was used in the experiment as a TinyML application execution system based on ARM Cortex-M4 32-bit MCU. Table 1  
Figure 5: Proposed architecture of the custom I\({}^{2}\)S module. (**a**) I\({}^{2}\)S data path (**b**) synthesized schematics of I\({}^{2}\)S implementation. shows the specifications of the board. The FPGA used an ARM Cortex-A9 processor and Xilinx 7-series combined Zynq-ZZ board [34]. The neural network used in the TinyML application on the embedded board was tiny conv [35; 36]. The network consists of three layers. The first layer performs a convolution operation on a 49 \(\times\) 40 size spectrogram image with eight 10 \(\times\) 8 filters. In the second layer, the images generated by the filter are fully connected to the output layer. The third layer is the output layer, which has two trained words and silence and unknown classes. The softmax function was used to sharpen the differences between the results. The Speech Commands dataset was used to train the above network [37]. This dataset is open-source with over 100,000 WAV files of 1-s duration each. The word pair trained in this application was \"_yes_\" and \"_no_\". Afterward, FFT was applied to audio data to generate the first frequency array. The decision to recognize a word in the audio classification application used in this research was conducted at 1-s intervals. The overhead for audio preprocessing for the entire 1-s period is large. At a sampling frequency of several kHz, the size of data collected for 1-s is too large for signal processing such as FFT. Therefore, the small window is moved as much as the stride and frequency bucket. The result of Hann windowing and FFT operation, is stored as much as the operation result for 1-s. If the period of decision is \(T\) when the window size is \(W\) and the stride size is \(S\), then the number of frequency buckets is determined as the minimum \(i\) that satisfies Equation (3). \[(W\times i)-(W-S)\times(i-1)\leq T \tag{3}\]  
The determined frequency bucket value affects the number of input layer nodes in the neural network. Figure 6 shows the measurement of the ratio of functions corresponding to the front-end, specifically preprocessing, in the entire main loop when the TinyML application is executed on the embedded board. The front-end functions, which comprise 78.8% of the feature-generate function, include windowing, FFT, and log scaling, as described in Figure 4. The feature-generate function occupies 81% of the main loop. In this experiment, the windowing function will be handled in hardware. The I\({}^{2}\)S module was implemented as RTL on the FPGA board. Voice was input through a microphone connected to the I\({}^{2}\)S module, and the embedded system received audio data using the I\({}^{2}\)S protocol. Then, the audio data received by the embedded system was passed from the windowing function in the FPGA. A floating-point operation is required to calculate the coefficient values of the Hann window array. However, if a floating-point unit is added for windowing calculation, an excessive area will be required. Therefore, we quantized the coefficients as the sum of powers of negative 2. Using Equation (1), because of Hann coefficients have values from 0 to 1, the fractional part can be expressed as the sum of powers of negative 2. In this quantization technique, the error from the original coefficient varies according to the highest power of negative 2. As the number of negative power of 2 increases, the resolution of fractional parts that can be expressed increases, so the quantization error is small. The hardware usage is determined by the length of the Hann windowing function, i.e., the number of coefficients. To apply the Hann window sliding for each sample to the audio data input, coefficients need to be stored in