# Technology Mapping of FSM Oriented to LUT-Based FPGA
## 5 The Method of Carrying out FSM Using Sharing of Logic Resources
Example:  
Let us consider mapping of the multi-output function \((\delta+\lambda)_{1}\): \(B^{5}\to B^{2}\) in the _LUT_4/1_. The essence of unicoding may be easily shown while describing the functions using Karnaugh maps. Firstly, let us consider the process of mapping without using the method of unicoding. The functions y0 and D1 are described by Karnaugh maps and presented in Figure 10. Decomposition of each function separately leads to the solution using five blocks, among which, there are four LUT_3/1 and one _LUT_4/1_ (Figure 10a). Carrying out of a multi-output function requires using only four blocks (2*_LUT_3/1_ and 2*_LUT_4/1_) which is illustrated in Figure 10b. Carrying out of the function, shown in Figure 10, is identical with mapping of the function \((\delta+\lambda)_{1}\): \(B^{5}\to B^{2}\) presented in Figure 9.  
It is worth to mention that Karnaugh map of the function D1, presented in Figure 10a, includes only two types of columns. In order to distinguish them, only one bit is needed. Thus, the question is whether it is possible to code the column patterns K, L, M, N in such a way, the values of one of the bits would be the same as those used to distinguish the column patterns A and B. Let us create a compatibility graph of columns for the functions D1 and y0. In such a way, the nodes corresponding to the columns would be placed in one line and let us mark compatibility relations of column patterns for separate functions using the edges placed above (D1) and below (y0) the nodes (Figure 11a). A newly created graph may be divided into two disjoint parts. Let us order the value 0 to the nodes of one subgraph and the value 1 to the second one. Both graphs include the nodes associated with two column patterns of the function y0. The first subgraph includes the patterns K and N, whereas the second one includes the patterns L and M. Such a location of the column patterns enables to use a common bit g0 applied in order to distinguish the column patterns of the function D1 and y0 (Figure 11a). It leads to the solution, presented in Figure 11b, in which the limitation of the number of inputs was obtained in one free block (a free block D1). This solution is said to be 'better' than the solutions shown in Figure 12 as it uses 3*_LUT_3/1_ and only one _LUT_4/1_. The usage of unicoding usually lowers the number of inputs in free blocks but when it is connected with the possibility of configuration of logic block, it may result in a substantial improvement of this solution. Let us presume that without unicoding, technology mapping, in the form of the set of LUTs, requires using 2*_LUT_5/1_ and _LUT_4/1_. Configurable abilities of the Spartan structure [52], in this situation, create the possibility of technology mapping in the form of three logic cells configured to the form of 2*_LUT_5/1_ and 1*_LUT_4/2_. The usage of unicoding may create the possibility to slightly limit the number of inputs of used cells. Let us presume that there is a solution in the form of the set 1*_LUT_5/1_ and 2*_LUT_4/1_. In comparison with the solution without unicoding, it was possible to remove one input. Thus, it leads to a substantial improvement of the effectiveness of technology mapping because, in the Spartan structure, it is possible to carry out on two logic cells configured to the form of 1*_LUT_5/1_ and 1*_LUT_4/2_. Figure 10: Implementation of a multi-output function that is the result of (**a**) decomposition of each function separately; (**b**) decomposition of multi-output function. Therefore, unicoding seems to be a crucial optimization element of the process of decomposition of multi-output function \(\delta+\lambda\) in the method of carrying out FSM automaton in which the method of sharing logic resources is used. It creates the possibility to limit the number of inputs in the area of shared FSM blocks.