## 6 Summary and Conclusions  
This research paper introduces a new and innovative SISO systolic array design specifically tailored for performing Montgomery multiplication over the binary extension field. The proposed architecture brings forth a range of advantageous features that make it highly suitable for VLSI implementations. One key advantage lies in its regular processing element builds, which not only simplify the overall design but also facilitate efficient integration within VLSI systems. Moreover, the architecture incorporates localized interconnections, further enhancing its feasibility for VLSI implementation. What sets this design apart from existing multiplier architectures is its ability to significantly reduce area and delay overhead. This aspect is of utmost importance, as it optimizes resource utilization, making it particularly appealing for implementation in cryptosystems. In the context of IoT applications, where space complexity is a critical concern due to limited resources, this proposed architecture demonstrates its effectiveness. By offering improved efficiency in terms of space utilization, it effectively addresses the specific challenges faced by IoT applications, positioning itself as a highly promising solution for implementing efficient and reliable cryptosystems in the IoT domain. Moving forward, the main area of concentration for future research will be the practical hardware implementation of the proposed solution. By doing so, we can gain valuable insights into the feasibility and performance of the proposed solution in real-world scenarios.  
Conceptualization, A.I.; methodology, A.I. and F.G.; software, A.I.; validation, A.I.; formal analysis, A.I.; investigation, A.I.; resources, A.I.; data curation, A.I.; writing--original draft preparation, A.I.; writing--review and editing, A.I. and F.G.; visualization, A.I.; supervision, A.I.; project administration, A.I.; funding acquisition, A.I. All authors have read and agreed to the published version of the manuscript.  
Prince Sattam bin Abdulaziz University provided funding for this research work through project number (PSAU/2023/01/26738).  
Not Applicable.  
The datasets presented in this article are not readily available because the data are part of an ongoing study. Requests to access the datasets should be directed to the corresponding author.  
The authors extend their appreciation to Prince Sattam bin Abdulaziz University for funding this research work through project number (PSAU/2023/01/26738).  
The authors declare no conflicts of interest.  
\begin{table}
\begin{tabular}{l c c c c c} \hline \hline
**Design** & **A** & **T** & **AT** & **\%A** & **\%AT** \\  & **[_Kgates_]** & **[_ns_]** & & & \\ \hline
[8] & 18.0 & 25.1 & 451.8 & 43.4 & 55.8 \\ \hline
[24] & 17.3 & 21.9 & 378.9 & 41.0 & 47.2 \\ \hline
[26] & 18.0 & 25.0 & 450.0 & 43.3 & 55.6 \\ \hline
[38] & 42.0 & 32.0 & 1344.0 & 75.7 & 85.1 \\ \hline
[9] & 41.0 & 26.0 & 1066.0 & 75.1 & 81.2 \\ \hline
[10] & 16.0 & 21.0 & 336.0 & 36.3 & 40.5 \\ \hline
[13] & 12.6 & 24.8 & 302.6 & 16.4 & 33.9 \\ \hline Proposed & 10.2 & 19.6 & 199.9 & - & - \\ \hline \hline \end{tabular}
\end{table}
Table 2: Evaluating space and time trade-offs in serial constructions for \(k=233\) and \(q=74\).