## 1 Introduction  
The Class-E Power Amplifier (PA), shown in Figure 1, has a wide range of applications due to its high efficiency. It is used in applications such as wireless power transmission systems [1], dedicated short-range communications [2], low-power RF devices [3], induction heater systems [4], and street-lighting [5]. In general, the PA designer analyzes the DC-feed inductance (i.e., \(L_{SH}\) in Figure 1) as an RF-choke or a finite value and designs the overall circuit to guarantee Zero Voltage Switching (ZVS) and Zero Voltage Derivative Switching (ZVDS) conditions. When the value of \(L_{SH}\) is considered in the PA model, the designer could explore the PA design with more flexibility [6; 7; 8], a feature that is particularly useful in applications with many constraints as the integrated PA implementations [7; 9]. In general, the models of the Class-E PA with Finite DC-Feed Inductance (FDI) are more complex than the Class-E with RF-choke models because they considered the feed current behavior in the circuit analysis [9]. Furthermore, the first analytical design equations reported in [6] appeared only 43 years after the topology was born in 1964 [10]. These equations are based on an ideal model of the Class-E PA with FDI, which considers a Class-E amplifier with ideal components (e.g., inductors and capacitors with infinite quality factor), a switch with zero rise and fall commutation times, zero on-resistance, and infinite off-resistance, and an infinite loaded quality factor of the output resonant circuit [6; 8; 11]. Moreover, these equations allow finding the PA circuit components values for ZVS and ZDS with an arbitrary duty-cycle and finite dc-feed inductance (e.g., continuously ranging from Class-E with small finite drain inductance to Class-E with RF choke) without an iterative procedure [8; 12; 13]. Therefore, these equations allow optimizing the ideal Class-Ewith FDI to a particular application because the designer could explore the design space under high-efficiency operation (i.e., defined by the ZVS and ZDVS operation) to find component combinations to solve the trade-offs between specifications and restrictions [14]. On one hand, a high accuracy PA design from the analytical equations of the ideal amplifier is obtained only when the assumptions of the ideal model are fulfilled by the real implementation, which generally is difficult to accomplish [15]. On the other hand, the design of this idealized amplifier is very useful on the design of the real amplifiers because allows reducing the consumed time of the iterative CAD design (commonly used in VLSI and RF applications) [8]. For instance, in [7], the authors design an integrated Class-E PA with FDI, which was designed using its idealized model and an iterative process supported by simulation tools (i.e., Cadence Virtuoso Suite). A successful circuit implementation depends on considering the technical, economical and reliability restrictions in the design process [16; 17]. In particular, to guarantee the manufacturability and reliability of the amplifier, the designer should consider aspects such as components with commercial values, tolerances, maximum ratings, and electrical stress values (i.e., voltage, current, or power) [16; 17; 18]. To guarantee high PA reliability, the designer involves the component degradation (produced by the exposed to voltage and current stress) in the design process by safety margins on the maximum-ratings of the components [16; 19; 20]. In particular, the designer of a Class-E PA with FDI must optimize the component combination to achieve the specifications and restrictions with high-efficiency [7; 21; 22]. The design of the Class-E PA with FDI has been explored in several works [6; 7; 9; 13; 14; 23; 24; 25; 26; 27; 28; 29].