# A Multichannel, High-Bandwidth Wirelane Receiver for D2D Interconnects
## 3 Receiver Circuits
### Mini-Pll
#### 3.3.5 PI
The bottom of each differential pair is composed of 32 controllable current sources, and R1 and R2 are used as load resistors. The phase control terminal is P\(<\)0:2>, which are derived from the Weight Encoder in the CDA module proposed above. BIT0-BIT31 are the phase thermometer codes that control the PI in the range of 45\({}^{\circ}\). The phase control code and thermometer code together divide 0-360\({}^{\circ}\) into 256 points, so the minimum precision of PI is 1.4\({}^{\circ}\). The control bits SWITCH_0, SWITCH_45, SWITCH_90, SWITCH_135, SWITCH_180, SWITCH_225, SWITCH_270, and SWITCH_315 that control the current source current path are generated as shown in \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]1  
By selecting different branches, the phases of different quadrants can be output. For example, when the SWITCH_0 branch and the SWITCH_45 branch work, the phase interpolator works from 0\({}^{\circ}\) to 45\({}^{\circ}\). During the working process of the phase interpolator, only 32 switches can be turned on at the same time, so that the total current of PI will not change in any state. Figure 20 is the phase of the circuit output under different control codes, which corresponds to \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]2 When \(\varphi_{d}=90^{\circ}\)(Figure 20a), the output phase shows obvious inequality. However, the improved one (\(\varphi_{d}=45^{\circ}\) ) shows equality, as shown in Figure 20b. \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]3 Logic design of SWITCH. \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]4 Shown two PI designs. (**a**) Traditional PI design, (**b**) improved PI design. (2) DNL and INL  
The output linearity determines the extra jitter introduced by the phase interpolator and is an important technical indicator of PI, which is mainly measured by the Differential Non-Linearity (DNL) Integral Non-Linearity (INL). Equation (6) is the minimum resolution, Equation (7) is the DNL calculation method, Equation (8) is the INL calculation method [16]. \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]5  
\[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]6  
\[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]7  
Under standard process corner and temperature \(27^{\circ}\), the curve of DNL and INL controlled by N from 0 to 256 (\(0^{\circ}\) to \(360^{\circ}\)) is shown in \[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]8 As can be seen from Figure 21, the maximum value of DNL is 0.54 LSB, and the maximum value of INL is 0.68 LSB. The theoretical maximum value of INL of traditional PI is 1.69 LSB. Therefore, compared with PI of traditional structure, the linearity of PI designed in this work has been improved. Table 3 shows the comparison for three types of PI. Compared with [17; 18], INL is significantly improved, but the power consumption is increased both the accuracy and linearity have been greatly improved. Therefore, we use the improved PI in MINI-PLL for a excellent clock signal, while in the \(\delta\) of each channel, the traditional PI is still used to keep the power consumption low, because the amount of phase rotation is determined by \(\delta\). In this way, the balance between high performance and low power consumption can be better optimized. The power consumption of PI in this work can be allocated to each channel. When the receiver clock is sampled to the best position, Figure 22 shows the two PI clocks that are stabilized and output in MINI-PLL. The traditional way is shown in  
\[V_{out}=A_{1}\sin(\omega t)+A_{2}\sin(\omega t+\varphi_{d}) \tag{2}\]9 DNL and INL of PI. Figure 14:0 PI output under control code BIT. (**a**) is PI output under control code BIT when \(\varphi_{d}=90^{\circ}\), (**b**) is PI output under control code BIT when \(\varphi_{d}=45^{\circ}\). Figure 22a and the jitter is 6 ps, while the improved PI jitter is only 2.4 ps in Figure 22b.