## 3 On-Body Communication and Connectivity
### Transceiver Implementations and Architecture Considerations  
This section gives an overview of existing IEEE 802.15.6 transceiver (front-end and possible digital baseband part) implementations and highlights the key architectural elements typically found in such implementations. Given the high flexibility of the IEEE 802.15.6 standard, few industrial chips only implement the part of IEEE 802.15.6 standard. As illustrated below, most of the publicly documented implementations are multi-mode, e.g., supporting 802.15.6 and Bluetooth and/or Zigbee. A few years ago, the authors of [29; 30] implemented a 0.13-um Complementary Metal-Oxide-Semiconductor (CMOS) front-end chip supporting the IEEE 802.15.6 NB PHY draft and BT-LE 4.0 standards, as well as proprietary protocols. The chip is composed of a 2.4-GHz sliding-IF receiver, a 2.4-GHz polar loop modulator transmitter, a 900-MHz loop modulator transmitter, and a low frequency 10-bit Successive AppRoximation Digital-Analog Conversion (SAR ADC) for bio-telemetry data acquisition, as well as several peripherals and digital interfaces for an Field-Programmable Gate Array (FPGA)-based digital PHY/MAC design. The chip achieves up to 1000 ksps and requires power between 1.7 and 12.3 mW, depending on the selected mode. It can operate both on the 2.36 GHz MBANs spectrum and the worldwide 2.4 GHz ISM band. It also features a transmitter for operation in China, the EU, North America and Japan (780/868/915/950 MHz, respectively). The implementation of a 0.18 um CMOS reconfigurable sliding-IF transceiver targeting 400 MHz/2.4 GHz IEEE 802.15.6/ ZigBee WBAN hubs is presented in [31]. The receiver part comprises a wideband front-end and a reconfigurable amplifier-mixer. The transmitter part comprises a reconfigurable two stage full quadrature mixer, and a delta-sigma fractional-N Phase Locked Loop (PLL), as well as some auxiliary circuits. The chip can operate in the 0.36-0.51 GHz and the 2.36-2.5 GHz ranges. Its power consumption ranges between 13.2 mW and 18 mW. The IEEE-802.15.6-compliant transceiver targeting a multichannel electro-acupuncture application is presented in [32]. As opposed to the two works listed above, this implementation builds upon the Human Body Communication (HBC) physical layer. The chip is implemented on a 0.13-um CMOS process. The possible data rates are 164, 328, 626 Kh/s and 1.3125 Mb/s; its peak power is 5.5 mW (receiver-activated). The works presented in [33; 34] deal with the transceiver and baseband parts, respectively, for a IEEE802.15.6/ Bluetooth Low Energy/ Zigbee system. The transceiver is implemented  
Figure 4: Packet error rate distributions of co-channel interference and evaluation of the IEEE 802.15.6 proposed coexistence techniques. (**a**) Reference scenario, without any coexistence strategy; (**b**) Channel hopping; (**c**) Carrier sense multiple access with collision avoidance (CSMA-CA)-based coexistence; (**d**) Time-shared coexistence. on a 90-nm CMOS process. The transmitter comprises a 2-point fractional-N PLL-based frequency modulator (FM), and a Delta-Sigma digital-controlled polar Power Amplifier (PA). The receiver builds upon a sliding-IF architecture and operates on the 2.36/2.4 GHz bands. The rates supported by the transceiver are 1 Mbps for BT-LE, 250 kbps for IEEE 802.15.4 (ZigBee), and 971 kbps for IEEE 802.15.6. It also supports a proprietary 2 Mb/s mode for data-streaming applications such as hearing aids. Its power consumption is 3.8 mW for the receiver and 4.6-4.4 mW for the transmitter. The digital baseband part is implemented on a 40-nm low-power CMOS process. It comprises the transmitter and receiver digital baseband modules, and sub-modules responsible for processing at the PHY and Down Layer (DL) layers. Its power consumption is 200 \(\upmu\)W for the receiver and 80 \(\upmu\)W for the transmitter. Its data rates are identical to those of the transceiver described above.