# Temperature-Dependent Dynamic on Resistance in Gamma-Irradiated AlGaN/GaN Power HEMTs
## 3 Results and Discussion
### Irradiation at a High Temperature (133 \({}^{\circ}\)C)  
The devices that were irradiated at 133 \({}^{\circ}\)C, regardless of the stress bias voltage conditions, suffered from degradation due to the monotonous increase in drain leakage current (Id), which mostly originated from the increase in gate leakage current (Ig) while the source and substrate currents only offered minor contributions when the total dose was progressively increased. Figure 5 presents the drain leakage current that was measured at 25 \({}^{\circ}\)C after each step of irradiation for 30 min using a B1505A semiconductor power parameter analyser. We observed a fourfold increase in the gate current of the G3 device and a sevenfold increase in that of the G4 device, both of which were measured at 600 V.  
Figure 4: The gate voltage sequence for the double pulse tests. With higher temperatures, the trapping process became faster and the time constants decreased. Additionally, in the off-state condition, when a high drain bias was applied to the device, the drain leakage increased and was favoured by the injection of electrons from the substrate into the GaN layer, which was also strongly dependent on the temperature [19,20]. Figure 6 shows a schematic representation of the trapping processes for two different bias conditions that were used. In the figure, we present the two drain leakage paths that appeared during the GaN HEMT reverse condition tests. In the off state, the trapping processes could occur both at the gate-drain surface (due to the high electric fields between the gate and the drain terminal) and the buffer (due to the large vertical field under the drain). The drain-source current path was established across the silicon substrate and the silicon/nucleation layer interface due to inefficient isolation between the GaN buffer and the Si substrate. It has been reported [21] that the reverse drain leakage of GaN-on-Si HEMTs is due to the injection of electrons into the GaN buffer layer and the tunnelling leakage current of the Schottky gate reverse bias. Therefore, the accumulation of negative charge in the buffer, which is favoured by the positive drain voltage, originates from the increase in dynamic on-resistance (R\({}_{\text{ON}}\)). This vertical leakage that fills the buffer traps is interrelated between the trapping rate and the vertical drain-substrate current [22]. Figure 5: The leakage currents versus drain voltages in the off state (V\({}_{\text{GS}}\) = 0 V) before (black lines) and after (magenta lines) gamma radiation with a total ionising dose of 374 krad(SiO\({}_{2}\)) which were stressed during irradiation with V\({}_{\text{DS}}\) = 500 V and V\({}_{\text{GS}}\) = 0 at a base temperature of 133 \({}^{\circ}\)C. (**a**) Device G3 (**b**) Device G4. Figure 6: A schematic representation of the trapping processes in the analysed GaN HEMTs during the two off-state stresses. (**a**) Whit negative gate voltage. (**b**) Whit zero gate voltage. During the process of reverse gate bias, the AlGaN/GaN interface trap captured electrons in the channel and caused a negative shift of the threshold voltage. Additionally, the Schottky contact of the gate electrode began to irreversibly degenerate under both the high temperature that was applied during radiation and the high electric field that decreased the height of the Schottky barrier. Considering the voltage stress that was applied during radiation, it was also observed that when a negative voltage (Vgs = \(-5\) V) was applied to the gate together with a positive drain voltage (sample G2), the increase in the leakage gate current was lower (or even decreased) compared to samples that only had voltage stress in the drain and gates that were shorted to the source terminals (sample G4). Negative gate-to-source voltages induced lateral trappings due to the injection of electrons at the gate-drain surface.