## 5 Simulation Validation and Discussion
### Analysis of Simulation Results
#### 5.2.2 Analysis and Consideration of GPT Zero-Phase Voltage Results  
Analysis of the GPT zero-phase voltage result was simulated through demonstrating a scenario in which an AC-side bolted SLG fault occurred at 1.2 [s] during normal operation. The GPT zero-phase voltage result was derived by dividing values before and after the fault occurrence. Therefore, the magnitude of the zero-phase voltage constantly induced during normal operation according to the capacity of the inductor-capacitor element and the magnitude of the zero-phase voltage induced in the tertiary side of the GPT when a failure occurs can be analyzed. Figure 12 shows the zero-phase voltage \(V_{CLR}\) induced on the tertiary side of GPT when linking existing IMD to GPT without implementing the proposed method. Figure 13 depicts the GPT zero-phase voltage results for each capacity of the inductor additionally grounded using the proposed method. Finally, Figure 14 shows the GPT zero-phase voltage results for each capacitance of the additionally grounded capacitor. Figure 12: GPT zero-phase voltage when connecting existing IMD and GPT. Figure 13: GPT zero-phase voltage (according to inductor capacity). \begin{table}
\begin{tabular}{c c c c} \hline \hline
**Simulation** & **Duration of** & **IMD Measurement** & **Measured Insulation** \\
**Conditions** & **Insulation** & **Voltage** & **Resistance** \\
**(Capacitor Capacity** & **Resistance** & **U\({}_{m}\) [V]** & \(R_{e}\) [k\(\Omega\)]** \\
**[uF]**) & **Measurement [s]** & & \\ \hline No Capacitor & - & 0.55 & \(-1.0\) \\
3 & Greater than 3 & 0.16 & 443 \\
5 & Greater than 7 & 0.155 & 463 \\
10 & Greater than 12 & 0.155 & 463 \\
20 & Greater than 20 & 0.15 & 485 \\ \hline \hline \end{tabular}
\end{table} 
Table 2: Simulation result of IMD (according to capacitor capacity). The Table 3 above summarizes GPT zero-phase voltage results for existing problem situations and when implementing the proposed method of grounding the inductor-capacitor in series. First, for existing problem situations, the zero-phase voltage induced in the tertiary side of the GPT is 85-95 [V], despite the presence of fault occurrence. When a complete ground fault occurred at 1.2 [s], the GPT tertiary zero-phase voltage increased to 195 [V]. Even in the absence of ground faults, if the GPT tertiary zero-phase voltage exceeds 60 [V], it can cause burnouts of CLR and GPT, and lead to malfunctions in connected devices, as the voltage magnitude correction value of OVGR or SGR is exceeded. Hence, measures are required. When implementing the proposed method, the zero-phase voltage induced in the tertiary side of the GPT at a steady state tends to decrease in proportion to the inductor capacity. In addition, the GPT zero-phase voltage induced in response to a ground fault demonstrated a tendency to increase as the inductor and capacitor capacitances increased, and in particular, the capacitor was dominantly affected. Since the ground fault current possesses commercial frequency (60 [Hz]) characteristics, the impact of a capacitor having a high impedance at a low frequency is significant. In summary, as inductors and capacitors with large capacities are used, the magnitude of the constantly induced zero-phase sequence voltage is small, and the ground fault detection sensitivity of GPT may not be reduced. First, the inductor is effective for harmonics flowing to the primary side of the GPT. By reducing the harmonics due to the dominant influence of the inductor acting as a large impedance to the harmonics, the zero-phase voltage can be reduced. Next, a larger the device capacitance of the inductor-capacitor leads to a series resonance frequency close to 60 [Hz]. This is because the reactance value is minimized when in the vicinity of the corresponding resonance frequency band, and the common frequency component passes without being reduced.