# Automatic Initialization Methods for Photonic Components on a Silicon-Based Optical Switch
## 1 Introduction  
The deployment of next generation internet multimedia services, mobile internet, and internet TV, calls for an augmented capacity in the optical transport network (OTN) nodes. Single channel transmission rates up to 100 Gb/s in the metro networks and 400 Gb/s to 1 Tb/s in the core networks, are forthcoming [1]. Furthermore, next generation OTN are supposed to perform a dynamic re-arrangement of bandwidth for optimizing resources utilization and lowering capital cost and power consumption [2]. To withstand the ever-increasing data traffic, an all optical switching layer has to be implemented in the OTN nodes, based on scalable, high-capacity, and transparent switching sub-systems, to avoid power hungry optical-electrical-optical conversions [3]. This should also be combined with a management plane empowering the software defined networking (SDN), to provide high bandwidth connectivity at a relatively low power consumption and low latency [4]. Such an approach requires an optical switch capable of full remote reconfigurability, without the need of any manual intervention, and of an automatic light-path setup with a speed in the sub-millisecond regime, to allow restoration on the fly, in case there is a fault. This has been the target of the IRIS project (integrated reconfigurable silicon photonics based optical switch--[[http://www.ict-iris.eu](http://www.ict-iris.eu)]([http://www.ict-iris.eu](http://www.ict-iris.eu))), an European project aimed at developing a silicon-based photonic switch, with an unprecedented scale of integration of photonic and electronic circuits. IRIS's goal was to demonstrate a high-capacity wavelength division multiplexing (WDM) switch, to be used as a transponder aggregator (TPA) to the existing reconfigurable optical add/drop multiplexing (ROADM) nodes. Such a TPA, adds attributes such as Colorless, Directionless, Contentionless (CDC), to the current network topology [5]. TPA devices currently on the market are based on mature planar light-wave circuit (PLC) technology [6]. A novel TPA has recently been presented, based on the spatial and planar optical circuit (SPOC) [7]. However, both these approaches need additional external components or have a footprint in the range of tens of squared centimeters. An exhaustive overview on the state of art of Silicon Photonics Switches can be found in [8; 9]. This novel integrated silicon photonic switch comes with more than a thousand optical components, each controlled by a dedicated electronic circuit, over less than 30 mm\({}^{2}\) chip area [10]. The device has been achieved by flip-chip bonding the complementary metal-oxide-semiconductor (CMOS) photonic layer with the electronic chip realized in the BCD8 sP technology [11]. In particular, the photonic layer is based on a silicon-on-insulator (SOI) substrate with 2 um buried oxide featuring a 220 nm thick silicon device layer (see Figure 1). Feature sizes down to 120 nm have been obtained through 193 nm lithography. The CMOS fabrication flow has allowed for different photonic components on chip, such as Ge P-I-N photo-diodes, grating couplers, micro-ring resonators (MRRs), arrayed waveguide gratings (AWGs), and interleavers. Tuning capabilities are enabled by thermal heaters placed above the critical components--MRRs and interleavers [12; 13]. The hybrid (analog-digital) control of the thermal heaters is shown in Figure 1 (right), where an analog input voltage (Vin) is stored in a sample-and-hold (S-and-H) circuit [14]. This allows for setting the heating power with a digital pulse-width modulation (PWM) to minimize the circuit's power dissipation. The digital heater control works at a 1.2 GHz clock frequency in the electronic integrated circuit (EIC) [10]. We used a 7-bit PWM resolution with a PWM frequency of 7.58 MHz, which resulted in a 128 \(\times\) 128 digital voltage grid for every switching element on the chip. 3D integration of electronics on photonics has been obtained through an Al-Cu interconnection via and Cu micro-pillars [15].