## 4 The Efficiency of Hybrid Power Stage under Light-Load Conditions
### 125 kW Si IGBT Converter vs. 10 kW SiC Power Stage under Light-Load Conditions
#### 4.1.1 Conduction Losses of IGBT- and SiC-Based Light-Load Setup  
In order to compare the conduction losses of the three-phase IGBT inverter and the optimized SiC MOSFET power stage, it is important to specify the relevant equations to calculate the respective semiconductor conduction losses of the system. In general, to keep the semiconductor loss evaluation process of a three-phase inverter straightforward, the nominal load condition of the inverter is considered and effects due to current ripple variations are neglected, as the current ripple only forms a minor share of the nominal sinusoidal phase current (e.g., maximum 20% of input peak current). For this study, however, light-load and no-load operations are of significant concern. During these conditions, thus, determining conduction losses of IGBT and MOSFET circuits heavily rely on impact related to the occurring current ripple. Especially during the no-load operation of the power conversion stage, the emerging current ripple is solely liable for both conduction and switching losses. For a MOSFET driven power circuit (as illustrated in Figure 7) averaged and rms relate current stress results in:  
\[S_{\text{P,MOS,avg}}=S_{\text{n,MOS,avg}}=-I_{\text{N,pk}}\frac{M}{4}\cos( \Phi), \tag{12}\]  
Figure 6: Current stress semiconductors of a three-phase six-switch rectifier for (**a**) an IGBT-based and (**b**) a MOSFET-based converter stage. As it is well-known from literature, in a MOSFET half-bridge configuration, the intrinsic diode of the MOSFET only conducts current during dead-time of each leg and, therefore, conduction losses of the forward-biased diode during these time instants can be neglected. Furthermore, it should be noted that the Equations (12)-(15) are valid during nominal-, light-load and no-load conditions, as the MOSFET channel can process current in both directions when the MOSFET is activated \(v_{\text{GS}}>V_{\text{th}}\)) with \(v_{\text{GS}}\) being the gate-source and \(V_{\text{th}}\) the threshold voltage of the transistor, respectively. In addition, it can be observed from Equation (13) that the rms values for this topology are independent of the active and reactive loading. In order to characterize an IGBT-based three-phase six-switch inverter in an analytical manner, it has to be distinguished between nominal and light-/no-load operation. This is caused due to the very nature of the IGBT to conduct current only unidirectional when being turned ON (\(v_{\text{GE}}>V_{\text{th}}\)). Currents in reverse direction must be processed via the dedicated antiparallel diode. Therefore, especially in light- and no-load operation when the current ripple of the circuit starts to get dominant (\(I_{\text{N, pk}}<\Delta I_{\text{Lmax}}\)) and a global assessment and differentiation between positive and negative sinusoidal half-wave of the input current is no longer sufficient for an accurate result. It also has to be considered that the current ripple under light- and no-load operation will split between IGBT and diode. For such an IGBT-based power stage (as illustrated in Figure 8) averaged and rms relate current stress for \(I_{\text{N,pk}}<\Delta I_{\text{Lmax}}\) can be calculated to:  
\[S_{\text{p,IGBT,avg}}=S_{\text{n,IGBT,avg}}=\frac{\Delta I_{\text{L,max}}}{8} \Bigg{(}\frac{1}{2}-\frac{M^{2}}{4}+\frac{I_{\text{N,pk}}^{2}}{\Delta I_{ \text{L,max}}\Delta I_{\text{L,rms}}}-\frac{I_{\text{N,pk}}}{\Delta I_{\text {L,max}}}M\cos(\Phi)\Bigg{)}, \tag{16}\]  
Figure 7: Current stress of a MOSFET-based three-phase six-switch inverter topology, incorporating the existing current ripple, as in particular relevant for light- and no-load operation. With these equations for MOSFET and IGBT-based circuits, the conduction losses of both circuits can now be derived and investigated in detail. The conduction losses of a MOSFET are defined by:  
\[P_{\text{MOS,con}}=R_{\text{on,MOS}}{I_{\text{MOS,rms}}}^{2}, \tag{20}\]  
whereas \(I_{\text{P,MOS,rms}}\) equals \(S_{\text{P,IGBT,rms}}\).