## 2 Basic Generator Topologies
### Pulse Forming Using Capacitor Discharge Circuits  
A direct capacitor discharge pulse forming circuit concept is one of the most common, simple and oldest concepts for PEF pulse forming [15; 43]. It is based on the transfer of energy stored in the capacitors into the load throughout well-defined voltage pulses. The pulse delivery is normally controlled with a semiconductor switch. Depending on the switch type or driving mode, the waveform is either rectangular (using metal-oxide-semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs) [44]) or exponential decay wave (older concept typically used with thyristors [45]). In case of exponential decay pulses, the duration of the pulse (decay time) is defined by RC parameters of the discharge circuit, while in the case of rectangular pulses the parameters are mostly limited by the switch capabilities and the discharge capacitor value. The principle pulse forming circuit of capacitor discharge pulse generator is represented in Figure 4.  
The pulse generator is composed of a variable high-voltage power supply V, a discharge capacitor C, a switch SW and optionally a resistor R. The direct capacitor discharge topology benefits from a simple and inexpensive design [38; 43]. However, to ensure the rectangular wave delivery and limiting the pulse amplitude droop, a high capacity (\(\mu\)F to mF range) capacitor bank is required and the switch must withstand the full voltage amplitude. It limits the selection of available switches in case of high-voltage builds. In such a case, several series switches must be used, which results in increased complexity of the generator due to challenges in switch synchronization. To overcome the limitations of the direct capacitor discharge concept, a more complex modular circuit topology can be used [46]. It provides voltage distribution between several switches and gives additional flexibility for the output pulse shape and amplitude. A simple example of a modular structure is presented in Figure 5.  
The circuit includes several galvanically isolated high-voltage power supplies V1,2...n. Each is controlled individually and can be set to a different amplitude. The voltages of the individual circuits contribute to the generation of a single output pulse at any time. The output voltage will be the sum of the voltages from separate stages, so adjusting the output voltage is possible. However, many stages are required to have enough output voltage levels, which consequently increases the cost of the device [38; 39]. The Marx generator is an example of a modular circuit, however, due to high applicability is often separated as an independent topology. Originally it was developed to test power grid high-voltage components and provide a capability to produce high-voltage pulses using a low-voltage DC supply. This topology has been adopted for PEF generation and widely used in electroporation applications [30; 31]. The simplified circuit is represented in Figure 6.  
Figure 4: The principle circuit of a direct capacitor discharge pulse generator. The full Marx topology is based on separate stages/cells, where each stage has an energy storing capacitor C, a resistor R and a switch SW. The stages are charged in parallel from a direct current power supply V and subsequently connected in series with a load when the switches are triggered. In case of spark gaps the capacitors are fully discharged (decaying pulse), however the current and voltage flexibilities are high. For such a design, the pulse repetition rates are frequently in the order of several Hz, but the total charging voltage can reach tens or even hundreds of kV [47, 48, 49]. The voltage levels between 50 and 100 kV are most commonly used in industrial application [50, 51, 52]. In case when the semiconductor switches are used, a partial discharge of the capacitors can be achieved. The output voltages are frequently determined by the switch breakdown voltage and the number of stages, however, devices in the range of 1-6 kV are common [31, 39, 53].