# Nonvolatile Organic Floating-Gate Memory Using N2200 as Charge-Trapping Layer
## 3 Results and Discussion
### Storage Characteristics
This phenomenon may be explained by the hot carrier injection mechanism [30]:  
Figure 3: (**a**) Transfer characteristics after P/E operation, \(V_{\text{P/E}}=\pm 45\) V, 5 s; (**b**) energy level diagram of N2200 FG-OFETM without application of voltage; (**c**) energy band diagram during P operation; (**d**) energy band diagram during E operation. (1) In certain conditions, the erasing operation is more likely to occur than the programming operation. In Figure 3b, the programming process energy barrier value (1.62 eV) for holes crossing the tunneling layer is slightly higher than the erasing process energy barrier value (0.82 eV). (2) Although the electrons are minority carriers in the p-type pentacene active layer, the energy barrier value (1.54 eV) for electron transport between the LUMO level of pentacene and N2200 is lower than that (1.62 eV) for hole transport between the HOMO level of pentacene and N2200. Furthermore, the impacts of applying different P/E operation times on the device are studied. As shown in Figure 4d, the \(V_{\rm{DS}}=-5\) V, \(V_{\rm{P/E}}=\pm 45\) V, and the P/E operation times are set at 1 s, 5 s, 10 s, and 15 s, respectively. It can be observed that the memory windows of the device rise with the increase in the P/E operation time. The time integration of the FN tunneling current density in Equation (8) shows that the longer the operation time applied is, the more charge carriers are tunneled from the active layer into the FG layer, although the magnitudes of the P/E voltages are the same. However, when the P/E operation time exceeds 5 s, the positive and negative offsets of the transfer characteristic curves do not change significantly. This phenomenon indicates that the ability of the FG to capture charges has a certain limit. The results are also consistent with those previously reported in the literature [30]. As the number of captured charges in the FG layer increases, the built-in electric field generated by the FG layer becomes stronger. The direction of the built-in electric field is opposite to the P/E electric field, which leads to a tunneling electric  
Figure 4: (**a**) Memory windows of N2200 FG-OFETM with different thickness of tunneling layer; (**b**,**c**) memory windows with different P/E voltages (tunneling layer is 8 nm); (**d**) memory windows under \(V_{\rm{P/E}}=\pm 45\) V: operation times are 1 s, 5 s, 10 s, and 15 s, respectively. field decrease during P/E operation. When the actual electric field of the tunneling layer is less than the minimum electric field required for FN tunneling to occur, the charge carried in the active layer will not be further injected into the FG layer. Although the P/E operation time is increasing, the charge in the FG layer will not continue to increase. Therefore, the memory window no longer increases significantly when the P/E operation time exceeds 5 s. Table 2 summarizes the memory windows and P/E voltages of FG-OFETM with different FG layer and tunneling layer materials in the recent literature. The comparison results show that the N2200 FG-OFETM presented in this work has a relatively low P/E voltage and large memory window (\(V_{\text{P/E}}=\pm 45\) V, 5 s; memory window is 16.1 V). Finally, the effect of temperature on the device's performance was investigated. A series of temperature-controlled experiments were designed to test the device in different temperature ranges (40 \({}^{\circ}\)C, 60 \({}^{\circ}\)C, 80 \({}^{\circ}\)C, 100 \({}^{\circ}\)C, and 120 \({}^{\circ}\)C) to study the effect of temperature changes on key performance parameters such as the memory window, as shown in Figure 5. It can be seen from Figure 5a,b that temperature significantly impacts the programming characteristics of the device and has almost no effect on the erasure characteristics.