## 2 Design and Micro-Nano Fabrication
### Design, Optimization and Analysis
#### 2.1.2 Equipment Circuit Analysis  
Owing to the fact that achieving an ideal circuit without loss is impossible, we propose an equivalent circuit diagram of the \(\pi\)-type LC BPF while ignoring some smaller feed-on capacitance and loss impedance values, as shown in Figure 5. The lumped-element model mainly comprises capacitances, inductances, and substrate-associated parasitic capacitances. The loss resistance in the inductor (L) and capacitor (C) including the resistance caused by proximity effect, are denoted by \(\mathrm{R_{L}}\) and \(\mathrm{R_{C}}\), respectively [4]. \(\mathrm{R_{Sub}}\) and \(\mathrm{C_{Sub}}\) represent the resistance and capacitance associated with the substrate whereas \(\mathrm{C_{SiNx}}\) represents the capacitance of the \(\mathrm{SiNx}\) passivation layers. Considering the skin effect, the current density is largest near the surface of the conductor; hence, the above parameters can be expressed [32; 33] as:  
\[\mathrm{R_{L}}=\frac{\mathrm{\rho l}}{\mathrm{w}\delta\left(1-\mathrm{e}^{ \frac{\mathrm{i}}{\delta}}\right)}, \tag{1}\]  
Figure 4: Results of optimization: (**a**) current densities of the passband and stopband; and (**b**) group delay. Figure 5: Equipment circuit model of the proposed BPF. \[C_{\text{Sub}}=\frac{1}{2}\text{Iw}C_{0}, \tag{2}\]  
\[R_{\text{Sub}}=\frac{2}{\text{Iw}G_{0}}, \tag{3}\]  
\[C_{\text{SiN}_{\text{x}}}=\frac{1}{2}\text{Iw}\frac{\varepsilon_{\text{SiN}_{ \text{x}}}}{\text{d}_{\text{SiN}_{\text{x}}}}, \tag{4}\]  
where \(\rho\) is the electrical resistivity, \(\delta\) is the skin depth of the metal trip, and w, t, and l are the, width, thickness and length of the metal strip, respectively. \(C_{0}\) and \(G_{0}\) are the capacitance and conductivity per unit area of the GaAs substrate, respectively. \(\text{d}_{\text{SiN}_{\text{x}}}\) and \(\varepsilon_{\text{SiN}_{\text{x}}}\) are the thickness and dielectric constant of the SiN\({}_{\text{x}}\) passivation layer, respectively. However, the L and C are still dominate the resonant frequency comparing with the various parasitic effects analyzed above. The value of the inductance formed by the outer intertwined metal wire is given [34] as:  
\[L=\frac{\upmu^{2}d}{2}\left[\ln\left(\frac{2.46}{\upeta}\right)+0.2\upeta^{2} \right], \tag{5}\]  
\[\eta=\frac{\text{d}_{\text{out}}-\text{d}_{\text{in}}}{\text{d}_{\text{out}}+ \text{d}_{\text{in}}}, \tag{6}\]  
\[\text{d}=\frac{(\text{d}_{\text{out}}+\text{d}_{\text{in}})}{2}, \tag{7}\]  
where \(\upmu\) is the magnetic permeability, \(\upeta\) is the number of turns of the inductor, d is the average diameter of the inner and outer rings of the inductor, and the value of \(\upeta\) and d are approximately 0.25 and 665, respectively. The parasitic effect of the bridge is related to the overlap of three metal layers, so the thickness of the air-bridge and the dielectric constant of free space are important parameters, which are represented by \(\text{t}_{\text{ab}}\) and \(\varepsilon_{0}\) (overlap area) respectively. Since the length of the air-bridge is much smaller than that of the entire differential inductor, the resistance and inductance of air-bridge can be ignored and only the main capacitance effect is considered, which can be expressed [35] as:  
\[\mathrm{R_{L}}=\frac{\mathrm{\rho l}}{\mathrm{w}\delta\left(1-\mathrm{e}^{ \frac{\mathrm{i}}{\delta}}\right)}, \tag{1}\]0  
By combining Figure 2a and Figure 5, it can be seen that the air-bridges are connected in series. This means that the introduction of series air-bridge reduces the parasitic capacitive effect and increases the inductance and Q-factor of differential inductor. The capacitance can be obtained using the linear function between the radius of the innermost circle and the capacitance of the concentric pattern. Given that the capacitance value is only affected by the material properties of the fixed-width ring and the distance between two adjacent rings [36; 37], a capacitor model is established in ADS to simulate and optimize the capacitance effect between the metal layer and the ground.