## 1 Introduction
Based on (2), the equation for instantaneous power is given as (3). \[P_{Total}=\frac{dE}{dt}=\frac{\hbar}{2}\Bigg{(}\frac{d\overrightarrow{\Gamma} }{dt}\Bigg{)}\cdot\overset{\rightarrow}{\lambda}+\frac{\hbar}{2} \overrightarrow{\Gamma}\cdot\bigg{(}\frac{d}{dt}\overset{\rightarrow}{ \lambda}\bigg{)} \tag{3}\]  
The first term in (4) represents the power going in and out of the clock and inter-cell power flow, and the second term represents the power dissipated. By multiplying these two terms, the power dissipation at a specific time can be obtained. \[P_{diss}(t)=\frac{\hbar}{2}\overrightarrow{\Gamma}(t)\cdot\bigg{(}\frac{d}{ dt}\overset{\rightarrow}{\lambda}(t)\bigg{)} \tag{4}\]  
Therefore, power dissipation can be summarized in terms of energy per clock cycle, as shown in (5). \[P_{diss}=\frac{E_{diss}}{T_{c}}\Bigg{\langle}\frac{\hbar}{2T_{c}}\overset{ \rightarrow}{\Gamma}_{+}\times\left[-\frac{\overset{\rightarrow}{\Gamma}_{ +}}{\big{|}\overset{\rightarrow}{\Gamma}_{+}}\text{tanh}\left(\frac{\overset {\rightarrow}{\Gamma}_{+}}{\frac{\mid\overset{\rightarrow}{\Gamma}_{-}}} \right)+\frac{\overset{\rightarrow}{\Gamma}_{-}}{\big{|}\overset{\rightarrow} {\Gamma}_{-}}\text{tanh}\left(\frac{\overset{\rightarrow}{\Gamma}_{-}}{ \frac{\mid\overset{\rightarrow}{\Gamma}_{-}}}\right)\right]\Bigg{\rangle} \tag{5}\]  
where \(T_{c}\) is the clock period and \(\overset{\rightarrow}{\Gamma}_{+}\) and \(\overset{\rightarrow}{\Gamma}_{-}\) are the Hamiltonian values before and after the transaction processing. Multilayer structures are a design method that minimizes energy dissipation and are a field of QCA design that is being studied extensively. Although feasibility is lower and design cost is higher than that of a co-planar structure, a well-designed multi-layer structure plays a significant role in minimizing space, delay, and energy consumption, and is continuously being studied at various major universities and research institutes. In 2020, [PERSON] et al. [22] and [PERSON] et al. [23] proposed a QCA-based RAM and full adder using a multi-layer structure, respectively, and in 2021, [PERSON] et al. proposed a 3-input XOR-based QCA BCD adder using a multi-layer structure [24]. In 2022, [PERSON] et al. [25] and [PERSON] et al. [26] proposed a QCA multi-bit comparator and a 3:8 decoder using a multi-layer crossover, respectively. In 2023 and 2024, [PERSON] et al. presented various analyses of the latest trends and problems related to QCA design [27; 28]. In particular, much research has been conducted based on QCA on the full adder-subtractor (FAS), the core circuit of the ALU, which consumes the most power in computer processors [29; 30; 31], and research on reversible FAS (RFAS) continues to minimize energy dissipation. Recently, various reversible gates have been implemented using QCA. [PERSON] et al. designed a Toffoli gate and a Fredkin gate using a rotated QCA cell and proposed RFAS based on a QR gate using these gates [32]. [PERSON] et al. and [PERSON] et al. proposed RFA without a subtractor along with a new reversible gate using a QCA-based 3-input majority gate and a 5-input majority gate, respectively [33; 34]. [PERSON] et al. proposed a more efficient RFAS using the newly proposed reversible QCA gate (RQG) and two Feynman gates (FGs) [35], and [PERSON] et al. developed a new reversible gate (NRG) using QCA-based multiple gates and FG, and proposed NRG-based RFAS [36]. [PERSON] efficiently redesigned various reversible gates using QCA and proposed RFAS with excellent performance using the existing RQG [37]. Table 1 summarizes the major contributions to the development of RFA(S). In this study, we review previously proposed QCA-based RFAS circuits and propose the most efficient RFAS that improves the problems of the circuits using QCA. The contributions of this study are summarized as follows.