## 3 Post-Layout Simulation and Experimental Results  
The presented circuit has been designed and simulated in a 0.18 \(\upmu\)m CMOS process. The designed modulator occupies a total area of 17 \(\times\) 27 \(\upmu\)m\({}^{2}\) (Figure 6). Important waveforms that resulted from \begin{table}
\begin{tabular}{c c} \hline \hline
**Device Name** & **W/L** \\ \hline M\({}_{1,2,6,7}\) & 0.88 \(\upmu\)m/0.18 \(\upmu\)m \\ M\({}_{3,4,8,9}\) & 0.22 \(\upmu\)m/0.18 \(\upmu\)m \\ M\({}_{5,10}\) & 0.44 \(\upmu\)m/0.18 \(\upmu\)m \\ \hline \hline \end{tabular}
\end{table} 
Table 1: Transistor dimensions of the data detector circuit. Figure 4: Possible states of data detector inputs. Figure 5: Proposed data detector. post-layout simulations in the typical NMOS and PMOS corner case at 20 MHz carrier frequency are shown in Figure 7. All traces are named with the ones used in Figure 2. A power-on-reset signal makes the reset signal needed to initialize the flip-flops and all other circuits at the beginning and makes them ready for the correct operation. According to post-layout simulations, demodulated data has a latency of 5 ns from the input BPSK signal which can be ignored in noncoherent detection. Figure 6: Layout view of the presented circuit. Figure 7: Transient response of the presented BPSK demodulator at 20 MHz carrier frequency. The proposed circuit was post-layout-simulated in various process/temperature corners, with \(\pm 10\%\) changes in power supply, for all of which correct operation was seen. The demodulated data and the recovered clock, as well as some other waveforms, in some process/temperature corners are shown in Figures 8-10 at a 20 MHz carrier frequency that resulted from post-layout simulations. The results of post-layout simulations for different process corners and temperature variations in 0.18 \(\upmu\)m CMOS process are summarized in Table 2, which indicates that the overall performance of the designed circuit is robust against process/voltage/temperature (PVT) variations. Note that these results obtained from circuit simulations are in the typical NMOS typical PMOS (TT), slow NMOS slow PMOS (SS), and fast NMOS fast PMOS (FF) corner cases. As stated in Section 2, there is no need to place automatic gain control in the receiver in fixed-in position implantable biomedical applications where the minimum required level of received signal for correct operation of the circuit is provided by the power amplifier in the external part according to the link properties. However, in order to show the correct operation of the proposed circuit against variations on received BPSK signal level, Figure 11 depicts the post-layout-simulated behavior of the proposed demodulator with \(\pm\)30% changes in the received BPSK signal level, for all of which correct operation was seen. In order to achieve accurate simulations considering fabrication process variations, the Monte Carlo analysis is performed on the designed BPSK demodulator by applying both process variations (such as variations on threshold voltage) and transistors' aspect ratio mismatches for all the devices \begin{table}
\begin{tabular}{c c c c} \hline Process Corner/Temperature & TT/27 °C & SS/85 °C & FF/\(-\)40 °C \\ \hline Power Consumption \({}^{\star}\) & & & \\ (1.8 V V\({}_{\text{dd}}\)) & & & \\ \hline \({}^{\star}\) \(\emptyset\) 20 MHz carrier frequency and 20 Mbps data rate. & & & \\ \end{tabular}
\end{table} 
Table 2: Performance summary of the proposed demodulator. Figure 11: Demodulated data and the recovered clock with \(\pm\)30% variations on received BPSK signal level. Figure 10: Demodulated data and the recovered clock with \(\pm\)10% V\({}_{\text{dd}}\) variation. employed. Figures 12 and 13 show the simulated transient response of the proposed circuit for demodulated data and the recovered clock, respectively, with 500 iterations. As it can be seen, the effect of non-idealities on the performance of the proposed circuit is negligible. Moreover, Figure 14 illustrates the Monte Carlo simulation of power consumption with 100 iterations.