# Harnessing FPGA Technology for Energy-Efficient Wearable Medical Devices
## 6 Analyses and Discussion  
The increasing demand for real-time physiological monitoring and feedback has significantly driven the incorporation of AI techniques in wearable medical devices. At the same time, there is a rising trend toward integrating multimodal sensors within these devices to achieve comprehensive monitoring of vital parameters, which has increased the data volumes to be stored, transmitted, and processed. Additionally, concerns regarding privacy, security, and the load on cloud computing resources have prompted a shift toward edge computing, where data are processed locally on a device. These advancements have collectively led to a substantial increase in data volumes, computational complexity, memory accesses, and transmission load, which are significant challenges in the design of wearable medical devices. Moreover, the continuous evolution of AI techniques and frequent customization of WMD features for individual patients demand flexibility in reconfigurability, adaptability, and scalability. To address the demand for additional computational resources and flexibility, researchers are exploiting FPGAs due to their unique properties of parallelism, reconfigurability, and partial reconfigurability. Although FPGAs are more power-efficient compared with GPUs and GPPs, they are still power-hungry devices. Consequently, researchers have applied various energy optimization strategies to make FPGAs viable for use in battery-powered WMDs. **Designing an Energy-Conscious Algorithm:** It can be observed that most authors tried to design _energy-conscious algorithms_ for optimized implementation of AI algorithms on resource-constrained devices while maintaining an acceptable level of accuracy. Since full-scale trained AI models are usually large, optimizations such as _simplification of arithmetic operations_, _parameter quantization_, _feature reduction_, and _signal format conversion_ are used to reduce resource consumption. The primary focus of these optimizations is to achieve a trade-off between resource usage and accuracy for better performance, with power optimization as a secondary benefit. FPGAs, being more flexible due to their reconfigurable nature for custom logic design, allow designers to choose any bit width for their operations. Customizing the bit width (e.g., in parameter quantization) can simplify computations, reduce the number of required logic gates, and optimize resource usage, thereby reducing power consumption. Moreover, the parallel processing capabilities of FPGAs are well suited for algorithmic optimization. Unlike sequential processors, FPGAs \begin{table}
\begin{tabular}{p{71.1 pt} p{113.8 pt} p{113.8 pt} p{113.8 pt}} \hline \hline
**Strategy** & **Description** & **Advantages** & **Constraints** \\ \hline \multirow{4}{*}{Dynamic partial reconfiguration} & A distinct feature of FPGAs used to reconfigure parts of the FPGA on the fly & Reduce both dynamic and static power consumption. & \\  & & Used in event-driven \& TDM approaches. & Introduces latency associated with activation or wake-up time. \\ \hline \multirow{4}{*}{Custom clock gating} & Selective enabling of the clocks of different activities. & & Could compromise the reliability if a true event is missed. \\  & Enables event-driven, duty-cycling and fine-grained power modes. & & Reduces dynamic power consumption. & \\ \hline \multirow{2}{*}{Fine-grained power modes} & Putting the components to sleep or into deep sleep mode when in an idle state. & Reduce both dynamic and static power consumption. & \\ \hline \hline \end{tabular}
\end{table} 
Table 6: Optimization strategies while exploiting FPGA features. can execute multiple operations concurrently, leading to faster processing times and, consequently, less energy consumption for a given task. Optimizing algorithms to leverage this parallelism can result in significant power savings, as the FPGA can complete tasks more efficiently than other platforms which might require higher clock speeds and more power to achieve the same performance.