# Thermal Interaction and Cooling of Electronic Device with Chiplet 2.5D Integration
## 2 Thermal Interaction Model of Chiplet 2.5D Integration
### Distributed Parameter Model  
The optimization method to mitigate thermal interaction can be clarified by the collective parameter model. However, due to the large size of the chiplet, there will be a large difference in temperature distribution within one chiplet, and the collective parameter model cannot reflect the effect of parameters on the difference of temperature rise at various points in the passive chip. Based on the collective parameter model, the distributed parameter model is proposed, and two points on one chiplet are selected as temperature nodes to establish a more detailed thermal resistance network, as depicted in Figure 3.  
Figure 3: Two-node distribution parameter model.  
Based on the distribution parameter model depicted in Figure 3, the temperature rise at node \(J_{1\text{-}1}\) will be the maximum in chiplet1, while the temperature rise at node \(J_{1\text{-}2}\) will be the minimum. The maximum temperature rise resulting from thermal interaction will occur in node \(J_{2\text{-}1}\) (in chiplet2), and \(J_{2\text{-}2}\) has the minimum temperature. The temperature rise difference between two nodes in the passive chip is calculated with Equation (8):  
\[\left\{\begin{array}{l}\frac{T_{2\text{-}1}}{R_{JA}}+\frac{T_{2\text{-}1}-T _{2\text{-}2}}{R_{intr\text{-}J}}+\frac{T_{2\text{-}1}-T_{0}}{R_{2\text{-}1}}= 0\\ \frac{T_{2\text{-}2}}{R_{JA}}+\frac{T_{2\text{-}2}-T_{2\text{-}1}}{R_{intr \text{-}J}}+\frac{T_{2\text{-}2}-T_{0}}{R_{2\text{-}2}+R_{intr\text{-}2}}=0\\ \frac{T_{0}-T_{2\text{-}1}}{R_{2\text{-}1}}+\frac{T_{0}-T_{2\text{-}2}}{R_{ \text{-}2}+R_{intr\text{-}2}}=Q_{2}\end{array}\right. \tag{8}\]  
Both nodes are presumed to have the same thermal resistance to the ambient temperature as they are at the same chiplet, with the same TIM and heat sink.  
\[\begin{array}{ll}R_{J2}&=R_{D2\text{-}1}+R_{\text{hs2-}1}+R_{T2\text{-}1}\\ &=R_{D2\text{-}2}+R_{\text{hs2-}2}+R_{T2\text{-}2}\end{array} \tag{9}\]  
The node temperature rise difference can be computed through Equation (8) as follows:  
\[T_{J2\text{-}1}-T_{J2\text{-}2}=Q_{2}\frac{R_{intr\text{2},12}}{\frac{2R_{ibi} }{R_{intr\text{-}J}}+\frac{R_{ibi}}{R_{JA}}+2} \tag{10}\]  
where  
\[R_{ibi\text{-}i}=R_{i\text{-}2\text{-}1}+R_{i\text{-}2\text{-}2}+R_{intr\text {-}12} \tag{11}\]  
According to Equation (2), when the spacing between the active and passive chips decreases, \(Q_{2}\) will increase, and the other thermal resistances in Equation (10) remain unchanged, and the temperature difference between the two nodes in the passive chip increases. When the thermal conductivity of the TIM decreases, \(R_{J1}\) increases, \(Q_{2}\) will increase, and \(R_{J1}\) in Equation (10) increases, while the other thermal resistances remain unchanged, and the temperature difference between the two nodes increases.  
When the thermal conductivity of the interposer decreases, \(R_{intr\text{-}12}\) increases, and according to Equation (2), \(Q_{2}\) will decrease. Equation (10) can be transformed as follows:  
\[T_{J2\text{-}1}-T_{J2\text{-}2}=Q_{2}\frac{1}{\frac{2}{R_{intr\text{-}J}}+ \frac{1}{R_{JA}}+A} \tag{12}\]  
where  
\[A=\frac{2(\frac{R_{\text{hs2}}+R_{\text{hs2}}}{R_{intr\text{-}J}})+\frac{R_{ \text{hs2}}+R_{\text{hs2}}}{R_{JA}}+2}{R_{intr\text{-}12}} \tag{13}\]  
According to Equation (13), an increase in \(R_{intr\text{-}12}\) leads to a decrease in \(A\). The temperature difference at the nodes does not always monotonically increase or decrease with the change in interposer thermal conductivity when \(Q_{2}\) decreases.