# DC Converter with Wide Soft Switching Operation, Wide Input Voltage and Low Current Ripple
## 5 Design Steps and Experimental Verifications
\[V_{S1,stress}=V_{S4,stress}=V_{C,\max}=160V \tag{15}\]  
Figure 4:0  
Figure 4:1  
The selected output split capacitances are \(C_{o1}=C_{o2}=300\)\(\mu\)F and the dc bus capacitance \(C=2000\)\(\mu\)F. Power MOSFETs n-channel IRFB4229 (250 V/46 A) are selected for switches \(S_{1}\)\(\sim\)\(S_{4}\) and \(S_{ac}\). Diodes BYCS-600 (600 V/8 A) are used for rectifier diodes \(D_{o1}\) and \(D_{o2}\). The frequency modulation is implemented by an integrated circuit UCC25600. The input voltage mode detection is implemented by using schmitt trigger comparator. Figure 5 shows the photograph and the experimental setup of the prototype circuit. Figures 6-9 demonstrates the measured waveforms at low input voltage mode operation. Figures 6 and 7  
demonstrate the test results at 20 V input voltage condition. Under low voltage mode operation, the switch \(S_{ac}\) is turned on and the full-bridge-type \(LLC\) converter is worked to obtain high voltage gain. Two input boost converters are interleaved operation to achieve ripple-free input current. Figure 6a illustrates the gating signals of full bridge converter. Figure 6b provides the test results of \(i_{L1}\), \(i_{L2}\) and \(i_{in}\). It can observe that the current ripples \(\Delta i_{L1}\) and\(\Delta i_{L2}\) cancelled each other. Thus, the input current ripple \(\Delta i_{in}\) is close to zero. Figure 6c shows the measured results of resonant current \(i_{Lr}\), resonant voltage \(v_{Cr}\) and the dc bus current \(i_{C}\). Since the switching frequency at 20 V input is less than the resonant frequency, the measured resonant current \(i_{Lr}\) is a quasi-sinusoidal waveform. Figure 6d provides the diode currents and output capacitor voltages. It is clear that \(D_{o1}\) and \(D_{o2}\) are turned off at zero-current switching and \(V_{o1}=V_{o2}=200\) V. Figure 7a,b provides the test results of active device \(S_{1}\) at 20% and 100% rated power, respectively. In the same way, the experimental results of active device \(S_{2}\) at 20% and 100% rated power are demonstrated in Figure 7c,d. It can see that \(S_{1}\) and \(S_{2}\) turn on at zero voltage from 20% rated power. Figures 8 and 9 demonstrate the experimental results at 39 V input condition. Two input boost current ripples are cancelled so that the resultant input current ripple \(\Delta i_{in}\approx 0\) as shown in Figure 8b. Since the switching frequency at 39 V input condition is very close to resonant frequency, the current \(i_{Lr}\) is a sinusoidal waveform as shown in Figure 8c and diodes \(D_{o1}\) and \(D_{o2}\) turn off at zero current switching (Figure 8d). The voltages \(V_{o1}\) and \(V_{o2}\) are balanced each other and \(V_{o1}=V_{o2}=200\) V. Figure 9 shows the experimental waveforms of the switches \(S_{1}\) and \(S_{2}\) at 39 V of input and 20% and 100% load conditions. It is clear that \(S_{1}\) and \(S_{2}\) all turn on at zero-voltage switching from 20% rated power. Figures 10-13 provide the measured waveforms at high input voltage mode operation (\(V_{in}=40\) V-80 V). Under the high input voltage mode, \(S_{ac}\) and \(S_{3}\) are off and \(S_{4}\) is on. Figures 10 and 11 illustrate the experimental results at \(V_{in}=41\) V input condition. At 41 V input condition, the resonant frequency is greater than the switching frequency. Figure 10a demonstrates the test waveforms of \(v_{Cr}\), \(i_{Lr}\), \(v_{S1,g}\) and \(v_{S2,g}\) at the rated power. Figure 10b gives the test results of \(i_{L1}\), \(i_{S1}\), \(i_{S2}\) and \(-i_{Lr}\). The experimental waveforms \(i_{Do1}\), \(i_{Do2}\), \(V_{o1}\) and \(V_{o2}\) are provided in Figure 10c. Diodes \(D_{o1}\) and \(D_{o2}\) are turned off at zero current. The test results of \(S_{1}\) and \(S_{2}\) at 20% and the rated power are provided in Figure 4:2 It is clear that \(S_{1}\) and \(S_{2}\) turn on at zero-voltage voltage from 20% rated power. Similarly, the test waveforms at 80 V input case are shown in Figures 12 and 13.