# Design Trends and Comparative Analysis of Lightweight Block Ciphers for IoTs
## 4 Related Work
### Substitution-Permutation Network (SPN)
It also shows robust resistance to differential, linear, and algebraic attacks, making it highly suitable for securing sensor data in smart agriculture applications. A limitation of LELBC is that, despite its energy efficiency, its reliance on the 4-bit S-box and relatively simplistic structure may not provide the highest level of security in more demanding cryptographic applications. The reduced number of rounds and the simplicity of the diffusion layers could make the cipher more vulnerable to future, more advanced cryptanalysis techniques. Additionally, although LELBC excels in energy and area efficiency, its low complexity might limit its scalability or adaptability to environments that require a higher level of security or more complex cryptographic operations. INLEC [28] is an LWBC designed specifically for energy-constrained IoTs devices, based on a fully involutive substitution-permutation network (SPN) structure. It operates on a 64-bit block size with a 128-bit key over 15 rounds, using two symmetric round functions (F1 and F2) to ensure that encryption and decryption processes share the same circuitry according to Figure 21, minimizing resource duplication and energy overhead. INLEC introduces a novel design called SCIN (Structure and Components INvolution), featuring an involutive 4 \(\times\) 4 S-box optimized via genetic programming and a P-box derived from chaotic maps for high diffusion. Its design results in a compact area footprint (1953.91 GEs) and a combined encryption-decryption energy consumption of just 6.88 \(\mu\)J/bit, making it more efficient than comparable ciphers such as Midori and IVLBC. Security analysis confirms its robustness against differential, linear, algebraic, and impossible differential attacks. While INLEC achieves impressive energy efficiency and cryptographic strength, it has several limitations. Its design and evaluation are primarily based on theoretical analysis and simulations, with limited validation in real-world, large-scale deployments. Additionally, INLEC's security has not yet been assessed against quantum threats, and futureproofing against post-quantum cryptography remains an open challenge. The cipher also lacks built-in error detection or correction mechanisms, which are increasingly critical in noisy, real-world IoTs environments. Figure 6.3 The encryption process of LELBC. LTLBC [29] is a low latency LWBC designed for secure, real-time applications in IoTs environments. It uses a 14-round substitution-permutation network (SPN) structure with a 64-bit block size and 128-bit key. Its core design features a hybrid linear layer combining bit-wise permutation and word-wise involutive mapping, allowing full diffusion after just two rounds. The cipher includes a compact 4 \(\times\) 4 S-box engineered through a bottom-up gate-level approach, minimizing logic depth and improving delay performance. When implemented in a round-based architecture, LTLBC achieves a latency of 14 ns and a hardware area of just 1967 GE, making it comparable to PRESENT (\(\approx\)1570 GE) but with higher security margins and better diffusion. For applications requiring even faster response, its fully unrolled version reaches 4.73 ns latency (at 12,540 GE), showcasing scalability across performance profiles. While LTLBC demonstrates excellent latency and a compact footprint in its round-based form, its fully unrolled implementation incurs a high area cost (12,540 GE), which may not be suitable for ultra-constrained devices such as passive RFID or low-cost smart cards. Furthermore, the cipher's hybrid linear layer and non-standard word-wise involutive mappings, while effective for diffusion, add architectural complexity that could increase design verification overhead and hinder adoption in minimalistic embedded environments. Additionally, LTLBC operates only on 64-bit blocks, which may pose security or efficiency constraints in modern protocols that prefer 128-bit block sizes.