## 5 Conclusions  
In this study, we developed the Mesh-FGT and analyzed the electrical characteristics of the device. To address the limitations of conventional quantum dot floating gates, individual floating gates with dimensions of 3 \(\upmu\)m \(\times\) 3 \(\upmu\)m was fabricated in a mesh-type configuration using platinum, selected for its high thermal stability. SOI wafers were employed during the fabrication process to minimize leakage current and enhance device stability.  
The experimental results showed that the Mesh-FGT effectively controlled synaptic strength through PGM and ERS operations and demonstrated stable electron transport through F-N tunneling. In the retention characteristics, the memory window initially measured 2.4 V and gradually decreased to 1.8 V, which was stably maintained for 2880 min. These findings demonstrate that the Mesh-FGT provides precise control of synaptic connection strength, stable current transmission, and robust retention characteristics, supporting its applicability in neuromorphic array devices. As demonstrated, the Mesh-FGT exhibits stable electrical performance and synaptic behavior, confirming that the primary objective of this study--enhancing reproducibility and overcoming the limitations of conventional NPFG devices through the introduction of a mesh-type floating gate structure--has been successfully achieved.  
The main contribution of this work is the proposal and experimental validation of a mesh-type floating gate transistor (Mesh-FGT) structure, fabricated using lithography and sputtering techniques, to overcome the non-uniform charge storage and reproducibility issues observed in conventional quantum dot-based NPFG transistors. Unlike previous NPFG studies, the proposed structure enables stable control of charge storage regions through a well-defined array configuration, providing a foundation for systematic analysis of electrical characteristics based on the size and number of individual floating gates. By employing a platinum floating gate and SOI substrate, the device exhibited enhanced thermal stability and reduced leakage current. However, the current work is limited to single-device characterization. Long-term reliability tests were not included, and further efforts are required to scale down the floating gate size and implement array-level integration for practical neuromorphic applications.  
Future research will focus on fabricating smaller individual floating gates with dimensions of 10 nm \(\times\) 10 nm to further minimize leakage current and expand the memory window. Additionally, array devices will be developed to facilitate the implementation of parallel processing-based neuromorphic neural networks. Through this study, Mesh-FGT is expected to play an important role in the implementation of next-generation artificial synaptic devices.  
Conceptualization, S.J., J.K. and J.C.; methodology, H.C.; formal analysis, S.J. and T.K.; writing--original draft preparation, S.J.; writing--review and editing, M.J. and J.K.; supervision, M.J. All authors have read and agreed to the published version of the manuscript.  
This research was supported by Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government (MOTIE), grant number RS-2023-KI002684, and by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT), grant number RS-2023-00219703.  
Not applicable.  
The data that support the findings of this study are available upon request from the authors.  
The authors declare no conflicts of interest.