## 6 Experimental Validation
### SDR1 Experimental Setup
Depending on the user's input, this message may contain the information about the new bitstream to be reprogrammed and in particular (i) its size and the SDRAM address where it has been loaded; (ii) what RM must be associated with this bitstream; (iii) whether the firmware has been reconfigured and thus must be executed after the PRC IP core finishes its task. The effect of programming a new partial bitstream and/or reconfiguring the firmware can be observed in the ADI Oscilloscope or in the spectrum analyzer connected to the RF output port of the AD-FMOMMS-2/3. The following steps produce the output of ReproRun:  
* On the bootup of the SDR1, we need to program the filter coefficients with a 1.4 MHz 5 G NR-like config file using Analog Devices IIO Oscilloscope GUI (Figure 12) and disable outputs, i.e., the DAC path. In some tests, not disabling the transmit path at the start results in a DC component presented at the output. * We load a waveform from a set of predefined signals, using the DAC buffer output option of the IIO Oscilloscope GUI (e.g., 5 GNR_5 MHz signal), and we check the spectrum in IIO Oscilloscope GUI or in a spectrum analyzer connected to the TX1 port of the AD-FMOMMD-2/3. * We open the Vivado hardware manager, and we assign the dbg_probes.ltx file in the probes. * We set the value of the VIO register from logical '0' to '1'. This register is basically the control signal of a multiplexor that allows our custom PL block to provide data to the DAC. * As the RR is empty there is basically no output signal in the IIO Oscilloscope GUI (the power of the output signal visually decreases) or the SA. * We use the REWIRE solution to program a DDS DSP block inside RR (one of the two partial bitstreams prepared for this experimental validation): \(\Circle\)./rewire -i 0 -b../pr_bs/DSP_DDS.bin
* A tone signal appears in the SA, as shown in Figure 13. The frequency was set to 100 KHz by default, but it can be changed by doing a firmware reconfiguration (as explained later). You can also switch to a time-domain view in the IIO Oscilloscope GUI (i.e., by setting the resolution bandwidth parameter at 56 kHz to conveniently visualize the signal) or connect an oscilloscope equipment to the TX1 port of the AD-FMOMMD-2/3 (Figure 14). * At this stage the RM can be changed in real-time by running the REWIRE again, this time using the 5 G NR-like 1.4 MHz playback block: \(\Circle\)./rewire -i 1 -b../pr_bs/DSP_5 GNR.bin
* When the reconfiguration is done, the visualized spectrum is the one shown in Figure 15.
* We can switch back to the first configuration by simply executing the following command: \(\Circle\)./rewire -i 0
* As far as the firmware reconfiguration is concerned, we have built two partial firmware objects containing different DDS configurations, i.e., each one of them sets different values for a synthesized tone frequency. * By executing the following commands, the tone frequency is reconfigured on the fly: \(\Circle\)./rewire -i 0 -o../pr_fw/fw_ddds_config_1.o \(\Circle\)./rewire -i 0 -o../pr_fw/fw_ddds_config_2.oFigure 12: A screen capture of some of the settings applied in the Analog Devices IIO Oscilloscope GUI. Figure 13: The output of the AD-FMCOMMS-2/3 when the REWIRE configures the DSP_DDS.bin. Figure 14: A time-domain screen-capture of an oscilloscope connected to the TX1 port of the AD-FMCOMMD-2/3, when the REWIRE configures the DSP_DDS.bin partial bitstream. Figure 15: The output of the AD-FMCOMMS-2/3 when the REWIRE configures the DSP_SGNR.bin partial bitstream.