# Streetlight Control System Based on Wireless Communication over DALI Protocol
## 4 Implementation of the Wireless Node
### Hardware Node: UCODALI Board
#### 4.1.3 DALI Interface  
The DALI bus consists of two wires that transmit information in a differential way. The maximum communication distance is 300 m. Logic levels are determined by the difference in voltage between both wires of the bus. The logic levels of the DALI control interface range from 9.5 V to 22.5 V for the high logic level, with the ballast acting as a receiver, and 11.5 V to 20.5 V when acting as transmitter. Meanwhile, on a low logic level, they vary between \(-4.5\) V and \(+4.5\) V for the transmitter and between \(-6.5\) V and \(+6.5\) V for the receiver, as can be seen in Figure 12. Because the logic levels of DALI are not compatible with those of the CC2530 control module and because both need to be electrically isolated, we designed an interface that meets both requirements.  
Figure 11: CC2530 OEM module [Source: TL.com].  
Even though several manufacturers have developed several types of microcontroller/DALI interfaces, such as Texas Instruments' MSP40 [42], we have decided to design our own interface because the interface from TI does not feature a DALI bus power supply and is not protected against polarity changes.  
Figure 13 shows the designed DALI interface. In its design, we took into account that it must support bidirectional communication. We used two optocouplers with 4N36 phototransistor outputs to isolate both the transmission and the reception of the DALI bus microcontroller. It was designed for a low logic level in microcontroller's pin to correspond to a low logic level in the DALI bus, and in the same way for a high logic level. In this way, the bits of the frames should not be complemented by software, either in transmission or in reception. The diode bridge is included in the connection to the DALI bus to protect against polarity changes, in case further ballasts are connected and an external source is used. This bridge is a Schottky diode to ensure a low forward voltage drop and a fast switching speed.  
Figure 12: DALI logic levels.  
Figure 13: DALI interface.  
The operation is very simple. If the microcontroller sets the transmission signal (TXD) to a high logic level, the optocoupler diode U6 does not conduct. As a result, its output phototransistor will be cut off, just like the Q1 transistor. In this way, the voltage in the DALI bus will be 15 V minus the voltage drops in the diode and the resistances, obtaining a final value of 11.5 V, according to the implemented tests. As a result, the DALI bus will have a high logic level. Oppositely, if the microcontroller sets the TXD to a low logic level, the U6 optocoupler diode will conduct and will saturate its output phototransistor. In this way, the Q1 base will receive enough current to be driven and, due to its high current gain (200 min.), to establish a voltage of 1.5 V maximum in the DALI bus, _i.e._, a low logic level. By using the Q1 transistor to control the DALI bus, a low current will circulate though the optocoupler diode when it is conducting. In this way, the reliability of the circuit will increase.  
The operation of reception is very similar. If the ballast establishes a high logic level in the DALI bus (9.5 V minimum), it will switch on the diode bridge, the Zener diode and the U7 optocoupler diode. As a result, its output phototransistor will saturate and the reception signal (RXD) will be set to a high logic level. If the ballast establishes a low logic level in the DALI bus (6.5 V maximum), the voltage will be insufficient to bias the diode bridge, the zener diode and the U7 optocoupler diode. As a result, its output phototransistor will be cut off and the RXD signal will be set on a low logic level through the R18 resistance.  
Figure 14 shows a DALI frame for transmission/reception. The first 19-bit frame corresponds to a forward frame sent by the microcontroller to the ballast. The second one is the response frame of the ballast (11 bits). As can be seen, appropriate DALI levels are obtained. The signal is set to 11.5 V at the high logic level and to 1.2 V at the low logic level.