# Hardware Countermeasures Benchmarking against Fault Attacks
## 7 Conclusions and Future Works  
In this paper, a comprehensive study of the fault injection, DFA and protection solutions for the AES cipher is presented. It shows that there are a large number of vulnerabilities reported in the literature for the AES cipher when attacked by active attacks called fault injection. At the same time, there are a large number of proposed protection solutions that try to detect possible faults injected into the circuit. The three groups of protection schemes involving fault injection protections have been studied, which are hardware redundancy, temporal redundancy, information redundancy, or a combination of them. Each has different advantages and disadvantages. Herein, a complete study of the main characteristics of the protection approaches has been carried out, considering area overhead, frequency degradation, throughput degradation, and fault coverage. In order to be able to compare all of them, a metric called Fault Coverage Corrected (FCC) was introduced to recalculate the fault coverage according to the types of faults they are able to detect. As a result of this review, it has been possible to compare the most important protections, comparing the trade-off between area consumption versus frequency degradation and the trade-off between fault coverage and area delay product. This has allowed to group the different protection solutions that can be used depending on the level of security and constraints.  
As future work, different directions are proposed. The need to improve the transfer between theoretical studies and the availability of open access implementations. Adequately test the design of countermeasures that consider protection against all possible faults used by DFA in different technologies. Finally, it should not be left out that all countermeasures used must be tested equally against Side Channel Attacks such as Differential Power Analysis or Correlation Power Analysis. The use of countermeasures against fault injection can increase the leakage of information useful for this type of analysis since the greater the data redundancy, the greater the leakage of information. Therefore, a joint countermeasure analysis must be a priority element if maximum protection of this type of ciphers will be achieved.  
Conceptualization, F.E.P.-O., E.T.-S., A.J.-A.-J., C.J.-F. and R.C.; methodology, F.E.P.-O., E.T.-S. and R.C.; formal analysis, F.E.P.-O., E.T.-S., A.J.-J., C.J.-F. and R.C.; investigation, F.E.P.-O. and E.T.-S.; resources, A.J.A.-J., C.J.-F. and R.C.; data curation, F.E.P.-O. and E.T.-S.; writing--original draft preparation, F.E.P.-O., E.T.-S. and R.C.; writing--review and editing, F.E.P.-O., E.T.-S., A.J.-A.-J., C.J.J.-F. and R.C.; visualization, F.E.P.-O., E.T.-S., A.J.-A.-J., C.J.-J.-F. and R.C.; supervision, A.J.A.-J., C.J.-F. and R.C.; project administration, A.J.A.-J., C.J.J.-F. and R.C.; funding acquisition A.J.A.-J., C.J.J.-F. and R.C. All authors have read and agreed to the published version of the manuscript.  
This work was funded by Grant PID2020-116664 RB-I00 funded by MCIN/AEI/10.13039/501100011033.  
Not applicable.  
Authors want to acknowledge to projects Programa Operativo FEDER 2014-2020 and Consejeria de Economia, Conocimiento, Empresas y Universidad de la Junta de Andalucia under Project US-1380823, to the SPIRS (Secure Platform for ICT Systems Rooted at the Silicon Manufacturing Process) Project with Grant Agreement No. 952622 under the European Union's Horizon 2020 research and innovation programme, to Erasmus+, to COST Action CRYTACUS, to FCT (Fundacao para a Ciencia e a Tecnologia, Portugal), to the ERDF (European Regional Development Fund,EU) through the projects FCT: UIDB/50021/2020 and LISBOA-01-0145-FEDER-031901 (PTDC /CCI-COM/31901/2017, HiPrEBio) and to Disruptive Sdn seCuRE communicaTlons for eurOpen deafeNse, EDIDP-CSAMN-SDN-202-74-DISCRETION.