# Demystifying Quantum Gate Fidelity for Electronics Engineers
## 1 Introduction  
A scalable and fault-tolerant quantum processor is the enabling device for the second quantum revolution, which, exploiting the counter-intuitive laws of quantum mechanics, promises to revolutionize, in the near-medium future, how information is processed and transmitted, with relevant impacts in several practical fields, such as cryptography, drug synthesis, and artificial intelligence [1]. Microelectronic technologies seem to assure scalability. In particular, cryogenic RFICs (radio frequency integrated circuits) are a promising solution for scaled quantum microprocessors [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21]. The application of a microwave pulse with an appropriate amplitude, frequency, and time duration to a two-level quantum physical system (quantum bit or qubit for short) indeed enables the implementation of one-qubit quantum gates; likewise, two-qubit quantum gates can be implemented by applying suitable microwave pulses to a pair of qubits [22]. The useful frequency range spans from 100 MHz to 50 GHz for electron spin qubits and from 500 MHz to 15 GHz for superconductive qubits [23]. RFICs are interesting because they are microminiaturized microwave sources that can be placed close to the qubits, minimizing the number of microwave cables connecting the quantum microprocessor to the external room temperature environment. In this way, the size of the whole system is reduced and the adiabaticity of the cryostat is improved. On the one hand, microelectronic technologies seem to assure scalability. However, on the other hand, the intrinsic brittle coherence of quantum objects constitutes the main challenge to achieving fault tolerance because it tends to increase the quantum computation error. The quantum error rate is the correct figure of merit for evaluating the fault-tolerance degree of a quantum processor [24]. An important theorem of quantum information theory, the threshold theorem, states that there exists a threshold error rate under which a quantum processor, even if faulty, is able to correctly run a quantum algorithm by using an efficient number of qubits and quantum gates [25]. The theorem guarantees that a quantum processor is feasible but only on the condition that the quantum error rate is kept low enough. Because of the aforementioned brittleness of the quantum coherence, this condition can be attained only by adopting quantum error correction (QEC) codes [25]. The unavoidable non-idealities in the actual implementation of quantum gates also prevent quantum gates from functioning ideally. Fidelity is the figure of merit that quantifies the difference between the output states generated by actual and ideal quantum gates [26]. The key point is that the QEC codes can be successfully applied only if quantum gate fidelities are higher than a given threshold [27]. A high enough quantum gate fidelity is therefore the prerequisite for achieving quantum fault tolerance. The non-idealities in the electronic circuitry in an RFIC may limit the quantum gate fidelity [28; 29]. For instance, the phase noise, affecting the microwave signal generated by the oscillator/phase locked loop in the RFIC, and the inaccuracies in the amplitude of the controlling microwave signal due to the output pre-drive amplifier in the RFIC can reduce the fidelity. The RFIC should be placed close to the qubits inside the cryostat chamber, whose thermal budget nevertheless limits the amount of power the RFIC is allowed to dissipate. Designing RFICs under power dissipation constraints may lead to device size, bias voltage, and low power circuit solutions that sacrifice ideal behavior for power [4; 20]. For instance, power dissipation is traded for sensitivity to parametric fluctuations, the spurious free dynamic range (SFDR), and linearity. Since quantum gate fidelity enables the application of the QEC codes, it is an important specification for electronics engineers designing the qubit RFIC controllers.