## 2 Proposed Topology and Working Principle  
The topology of the proposed ITLDC is shown in Figure 2. The ACAC consists of a small auxiliary inductor \(L_{\rm A}\), an auxiliary capacitor \(C_{\rm A}\) and an auxiliary switch \(S_{\rm A}\). Two ACACs are applied to the ITLDC's upper bridge and down bridge, respectively. The auxiliary capacitor \(C_{\rm A}\) is large enough so that the voltage of \(C_{\rm A}\) remains unchanged in one period. \(L_{\rm r}\) is the leakage inductance of the transformer and \(C_{\rm b}\) is the DC-blocking capacitor, which is large enough to act as a DC voltage source. \(C_{1}\)\(\sim\)\(C_{\rm t}\) are the equivalent parallel capacitors, which will achieve a quasi-zero-voltage turn-off condition for the main switches. \(V_{\rm S1}\)\(\sim\)\(V_{\rm S4}\) are the drain source voltages of the main switches \(S_{\rm 1}\)\(-\)\(S_{\rm 4}\). The main switches \(S_{\rm 1}\), \(S_{\rm 2}\) are driven by a complementary PWM with dead time and \(S_{\rm 3}\), \(S_{\rm 4}\) are also driven by a complementary PWM with dead time. The PWM phases of \(S_{\rm 1}\) and \(S_{\rm 3}\) are shifted by \(\pi\) degrees. Figure 1: **(a)** ITLDC with the CAC. **(b)** Auxiliary current changes with duty cycle. Where the * represents the dotted terminal of the transformer and the circuits in the red circles are the CACs. The operating principle and auxiliary current of the upper ACAC are shown in Figure 3 and the operating principle of the down ACAC is the same as the upper one. Before the switch S\({}_{2}\) is turned off, the auxiliary switch S\({}_{A1}\) is turned on, the voltage \(V_{CA1}\) is applied to \(L_{A1}\) and the current \(i_{A1}\) will increase linearly from zero. The auxiliary switch S\({}_{A1}\) is turned on at the zero-current condition. The auxiliary current \(i_{A1}\) can be expressed as in (2). \[i_{A1}(t)=\frac{V_{CA1}}{L_{A1}}t \tag{2}\]  
where \(V_{CA1}\) is the voltage of the auxiliary capacitor \(C_{A1}\), and \(L_{A1}\) is the auxiliary inductance. The current \(i_{A1}\) will increase linearly until the main switch S\({}_{2}\) is turned off. When S\({}_{2}\) is turned off, the auxiliary current \(i_{A1}\) increases to \(i_{A\_peak}\), which will be used to achieve the ZVS turn-on of S\({}_{1}\). The auxiliary current \(i_{A1}\) will discharge the equivalent parallel capacitor \(C_{1}\) and charge \(C_{2}\). Once the voltage of \(C_{1}\) decreases to zero, the antiparallel freewheeling diode D\({}_{1}\) is conducted and the zero-voltage turn-on condition of S\({}_{1}\) is ready, as shown in Figure 3. The energy to realize ZVS is taken from \(L_{A1}\) and \(C_{A1}\), which are large enough to maintain the zero-voltage condition throughout the entire dead time. After  
Figure 3: Working principle and the auxiliary current of the upper ACAC. (**a**) ZVS turn on condition for S\({}_{1}\). (**b**) ZVS turn on condition for S\({}_{2}\). (**c**) Theoretical waveforms. Figure 2: The ITLDC with proposed ACACs. Where the * represents the dotted terminal of the transformer and the circuits in the red circles are the proposed ACACs. \(S_{1}\) is turned on at zero-voltage condition, the current \(i_{A1}\) will decrease linearly, which can be expressed as (3). The current \(i_{A1}\) will decrease to negative until \(S_{1}\) is turned off. When \(S_{1}\) is turned off, the switch \(S_{A1}\) is also turned off. The negative current of \(i_{A1}\) will flow through the antiparallel freewheeling diode \(D_{A1}\) and the auxiliary switch \(S_{A1}\) is turned off at zero-voltage condition. The negative current of \(i_{A1}\) will discharge the equivalent parallel capacitor \(C_{2}\) and charge \(C_{1}\). Once the voltage of \(C_{2}\) decreases to zero, the antiparallel freewheeling diode \(D_{2}\) is conducted and the zero-voltage turn-on condition of \(S_{2}\) is ready, as shown in Figure 3b.