## 5 Experimental Results and Discussion
### Characterization of SEB Arrays
#### 5.2.1 Characterization of a Small (\(N=3\)) SEBA
The values of \(C_{L}\) = 86 fF and \(L\) = 215 nH are from the Coilcraft datasheet. The values of \(R_{DC}\) and \(R_{SE}\) are both adjusted based on measured resistivity reduction at low temperature; CPAD is calculated by fitting the resonant frequency to the experimental data, and the value of \(R_{C}\) is adjusted to obtain the observable depth in the magnitude response. (**c**) Experimentally obtained (solid lines) and simulated (dashed lines) frequency response of the reflectometry setup using the MN in (**b**), \(T\) = 11.5 K.  
signal to the experimental data. The initial value of junction resistance is evaluated based upon junction resistance of SETs fabricated in a close proximity to SEBA with the same geometry of island and junction (see Figure 1a,b). The close match of relative amplitudes in FFT (Figure 11b) confirmed a reasonable choice of junction parameters. It is worth noting that at this relatively high temperature, the dominant contribution in formula (2) came from the second term (\"\(C_{box}\)\") related to dynamic capacitance since tunneling rates (\(f_{T}=\gamma/2\pi\approx 20\) GHz at 11.5 K for a 100 k\(\Omega\) tunneling resistor (2)) are much higher than the RF excitation frequency (461 MHz). To investigate temperature limits for the use of SEB arrays we studied how oscillations of reflected signal wash away with increasing temperature, Figure 11c. It can be seen from this plot that oscillations became hardly distinguishable from the background noise at highest \(T\approx 25\) K. The device with the smallest total capacitance is expected to exhibit oscillations until temperature fluctuations overcame the charging energy \(E_{C}\)\(\sim\)\(k_{B}T\). The estimation of charging energy based upon the comparison experiment and simulations in Figure 11a yields \(C_{J}+C_{g}=31\) aF neglecting all other capacitors. This gives the value for charging energy \(E_{C}\approx e^{2}/2(C_{g}+C_{J})=k_{B}\) 30 K or 2.58 meV, in good correlation with the experiment. Figure 11: (**a**) Oscillations of derivatives \(d|\Gamma|dV_{g}\) and phase \(d\Theta iV_{g}\) vs. voltage of sensing gate V\({}_{g}\) of the 3 SEB array at 11.5 K superimposed with simulations. Black—experiment, red—simulations. (**b**) FFT of d\(\Theta\)/dV\({}_{g}\) data over 16 V V\({}_{g}\) span (black) along with the spectrum of simulated data (red in Figure 11a). (**c**) Oscillations of the derivative \(dRe(T)dV_{g}\) vs. V\({}_{g}\) acquired at different temperatures (from 3.9 to 23.5 K). Voltage gain for an SET is determined by the ratio \(\alpha_{\text{set}}~{}=~{}C_{g}/C_{j}\), so that enhanced coupling to the gate increased the gain. Likewise, this ratio determined the voltage sensitivity of an SEB. To obtain higher sensitivity, it is best to design the sensing gate to maximize this ratio within the available capacitance budget (\(\alpha>0.1\)). For array applications, the operating point needs to be chosen on the steepest slope of constructive interference peaks. If each SEB in the array is coupled to the sensing gate using nominally the same \(C^{~{}(i)}_{S}=C_{S}\), it might be difficult to choose the operating point at a specific gate bias \(V_{g\_sens}\) due to random charge offset. For instance, it is difficult to obtain high sensitivity if sensing needs to occur near \(V_{g}=1.05\) V in Figure 11a, because of the destructive interference. To enable flexibility of choice for the operating point, a second, tuning gate, with capacitance \(C^{(i)}_{t}\) that couples the \(i\)-th SEB in the array can be added (see Figure 9a). These capacitors (i.e., \(C^{(i)}_{t}\)) can be designed to be intentionally dissimilar (e.g., linearly decreasing) to ensure the placement of the operating point to the steepest slopes of constructive interference peaks within the reachable span of the tuning gate voltage, \(V_{g\_tune}\).