# The Quanta Image Sensor: Every Photon Counts
## 5 Jot Device  
### Background and Motivation  
The ultimate goals of a jot device include small pitch size (200 nm-500 nm), low read noise (<0.15 e\(-\) r.m.s. ), low dark current (<1 e\(-\)/s), small FWC (1-100 e\(-\)) and strong compatibility with a CIS fabrication line. One big difference between a jot and a conventional CIS pixel is its deep sub-electron read noise and photoelectron counting capability. A conventional CIS often has voltage read noise higher than 100 uV r.m.s. and CG lower than 100 uV/e\(-\), yielding read noise higher than 1 e\(-\) r.m.s. Higher CG and lower voltage noise reduce input-referred read noise. As a possible candidate for a jot device, SPADs are widely used for photon counting [see this Special Issue]. Through the avalanche multiplication effect, it can provide a higher CG (>1 mV/photoelectron) and low read noise (<0.15 e\(-\) r.m.s.). It has been used to demonstrate the QIS concept and showed interesting results [27; 28; 29; 30]. Unfortunately, its relatively large size (typically 5-10 um pitch) limits flux capacity and resolution [32], high electric fields result in high dark count rate (~1000 counts/s/pix), low fill factor and dead time reduce photon detection efficiency, and manufacturing yield is lower than conventional CIS process on a pixel-by-pixel basis. Electron-multiplying CCD (EMCCD) technology provides high CG by an electron multiplication process and is able to achieve 0.45 e\(-\) r.m.s. average read noise [49]. But similar to SPAD arrays, it has a high dark current due to thermal generation of carriers under high electric fields. EMCCDs also have relatively low frame rates as the signal is read out by CCD circuitry. We have considered these devices and other devices such as floating-base bipolar transistors, as candidates [11]. Figure 8: Expected count vs. quanta exposure for various bit depths and read noise levels. Experimental data is shown by the diamond symbols (after [21]). In consideration of fabrication feasibility, we started the jet design based on a conventional intra-pixel charge transfer approach similar to conventional CIS 4T pixels with a \"pinned photodiode\" due to its mature fabrication process, low dark current and high quantum efficiency, which also provides the jet device with good compatibility to many techniques developed in CIS, such as BSI, shared readout and stacked process. For example, in a BSI device, fill factor is very high, nearly unity, and backside treatments to reduce reflection losses are well known from the CCD era. Carrier collection efficiency can also high, depending on detailed device design and the funneling of carriers to the storage well. The readout introduces minimal dead time compared to SPADs, and may be as low as 0.004% in a gigajot sensor. A typical CIS readout chain includes an in-pixel source follower (SF), a correlated double sampling (CDS) circuitry, a high analog-gain amplifier and an ADC. Voltage noise is added to the voltage signal by each readout component before the signal is digitized in the ADC, and in standard practice, it is best to add gain earlier in the signal chain to ameliorate the impact of downstream noise components. Generally, in a low-noise (1 e- r.m.s. to 1.5 e- r.m.s.) CIS, the in-pixel SF contributes most of the input-referred voltage noise, typically 100-200 \(\mu\)V r.m.s. An in-pixel common source amplifier can provide a higher than unity gain and suppress latter noise sources without increasing the pixel size, but it also generates high gain variation [45], which can be detrimental for multi-bit QIS application. The major noise components in an in-pixel SF are \(1/f\) noise and random-telegraph signal (RTS), and both appear to be related to the carrier capture and emission process of surface interface traps, either at the gate oxide-semiconductor interface, or due to shallow trench isolation sidewalls [58], although other sources of \(1/f\) noise such as turbulent flow have been suggested [59; 60].