The CPU includes a cache controller which automates reading and writing from the cache , if the data is already in the cache it simply `` appears '' , whereas if it is not the processor is `` stalled '' while the cache controller reads it in .
The CPU includes a cache controller which automates reading and writing from the cache , if the data is already in the cache it simply `` appears , '' whereas if it is not the processor is `` stalled '' while the cache controller reads it in .