Annual Report (Form 10-K), fiscal year 1994

ITEM 1. BUSINESS.
GENERAL
Altera Corporation (the "Company" or "Altera") designs, develops, and markets CMOS (complementary-metal-oxide-semiconductor) programmable logic integrated circuits and associated computer-aided engineering development software and hardware. The Company's semiconductor products, which are generally known as CPLDs (Complex Programmable Logic Devices), are standard logic chips that customers configure for specific end-use applications using the Company's proprietary software. The Company's customers enjoy the benefits of low development costs, short lead times, and standard product inventories when compared to Application Specific Integrated Circuits ("ASICs").
Altera Corporation was incorporated in January 1984 in California.
BACKGROUND
The CMOS programmable logic market has developed as a result of two primary factors: (i) the need for more logic functions on each integrated circuit in order to achieve the performance and cost objectives of electronic systems manufacturers; and (ii) shortened product life cycles for end products which put an increased premium on time to market for the system manufacturer.
Historically, electronic system manufacturers have used low-density standard TTL integrated circuits as basic building blocks for the logic functions that control their systems. The desire of these manufacturers for further differentiation and improvement of their products, however, has generated demand for higher density logic circuits. Higher density (and thus more "integrated") circuits, which have more logic functions on each chip, allow the electronic equipment manufacturer to make improvements to the end product that reduce physical size, reduce cost, improve performance, reduce power consumption, and add features for further differentiation. However, the need for increased integration and greater product differentiation makes it difficult for electronic system manufacturers to use standard, mass-produced (low cost) logic circuits.
In the 1980's, ASICs gained popularity as a solution to the integration problems noted above. ASICs include a variety of custom and semi-custom alternatives, such as gate arrays, cell libraries, and silicon compilers. Using computer-aided engineering ("CAE") software tools, ASIC designers are able to combine sections of standard logic and generate unique tooling, which can then be used to fabricate a unique custom chip in the manufacturing process. Although ASICs achieve the goal of higher density and more integration by combining a variety of low-density parts into a single chip, they do so by introducing several compromises, resulting from the customized manufacturing process, that are undesirable to many users of standard low-density chips. These compromises can include longer lead time to the marketplace, Non-Recurring Engineering ("NRE") fees, dedicated custom product inventory, lack of control over sources of supply, and inflexibility of design iteration.
Another alternative, historically, has been the bipolar Programmable Logic Device ("PLD"), introduced in the late 1970s. Bipolar PLDs are standard products which are sold by the vendor as blank circuits. By blowing fuses on the chip, the user customizes it to a specific logic application. This alternative addresses some of the compromises required by ASICs, eliminating the up-front design fees, production leadtime, and custom inventory. Bipolar PLDs, however, have been limited to relatively low densities (under 500 gates) due to the significant power consumption and heat dissipation inherent in bipolar technology.
BUSINESS STRATEGY
First introduced by Altera in 1984, CMOS programmable logic products and the related CAE development software have emerged as a significant market. The use of low power CMOS technology, in contrast to bipolar technology, permits higher chip densities and allows system designers to use programmable logic chips to address applications that had previously required ASICs. CMOS programmable logic products are currently offered to the market by semiconductor vendors in various architectures, using EPROM (erasable-programmable-read-only- memory), EEPROM (electrically-erasable-programmable-read-only-memory), SRAM (static random access memory), FLASH (non-volatile memory), and anti-fuse configuration storage elements. The major elements of Altera's strategy include:
Standard Components. The Company's CMOS programmable logic chips are manufactured as standard products (i.e., shipped "blank" for programming by the user). The chips use CMOS technology for low power and use an erasable configuration element: EPROM, EEPROM, SRAM or FLASH. This combination allows Altera's CPLDs to shorten the design cycle which is characteristic of ASIC custom chips, by permitting multiple design iterations without the need to have prototype custom designs fabricated in silicon, redesigned, and refabricated. The end user benefits because Altera's programmable chips are configured at the desktop rather than in the foundry, by means of Altera's proprietary development software, dramatically shortening the time to market. Since Altera's integrated circuits are standard products and have a wide range of uses, inventory risks are minimized for customers, distributors, and the Company. Altera also benefits from economies of scale in the manufacturing process by minimizing logistics, inventory, and overhead costs.
Proprietary Product Architecture. The Company holds patents on various aspects of its chip architectures which combine speed and density with the benefits of user programmability. The Altera CPLD architectures make certain performance paths in the integrated circuits easier to predict and simplify the task of designing with programmable logic chips.
Software Development Tools. Altera has dedicated a significant portion of its research and development staff to the development of its proprietary software. This software permits designers to use their desktop personal computers or workstations to develop and program Altera chips to function as custom logic devices quickly and under their own control. The Company's strategy has been to offer its development software systems at relatively modest prices (beginning at under $5,000) in order to achieve an installed base of design sites that may generate future chip orders.
Broad Product Line. The Company's strategy is to apply its basic technology to a broad general purpose product line spanning a range of densities, pin counts, and speeds. Products currently in production range in density from an estimated 150 to 16,000 usable gates, and the Company has announced its plans for even higher density products in the future. The Company also has a multi-chip module which provides on the order of 50,000 usable gates for certain applications.
Diversified Markets. The Company has sold its semiconductor components to a broad base of customers worldwide in a range of market segments, including telecommunications, computer, industrial, consumer, and military/aerospace.
Technology and Production Relationships. Altera has obtained its CMOS silicon chips through supply arrangements with leading semiconductor manufacturers. The Company has avoided the full capital commitment and overhead burden of establishing its own wafer fabrication facility, and has the flexibility to utilize new process technologies as they become available.
Intel PLD Division Acquisition. On October 1, 1994, the Company purchased the programmable logic device ("PLD") division of Intel Corporation ("Intel"), including associated capital equipment, inventory, and certain intellectual property. The Company paid Intel $22.5 million in cash and issued Intel 701,350 shares of Common Stock as consideration for the purchase. The Intel PLD product line consists of approximately 15 devices, which the Company incorporated into its product line. The Company is incorporating the acquired capital equipment into its manufacturing process. As part of the acquisition, Intel agreed to supply the Company with up to certain specified amounts of associated PLD wafers for three years and to license the Company to make PLDs under certain Intel patents, and the Company agreed to supply Intel for the same three-year period with the finished PLDs Intel had previously manufactured. In addition, the Company agreed to license back to Intel on a limited basis certain acquired intellectual property which the Company purchased.
TECHNOLOGY
Altera's chips incorporate several types of internal architectures which, combined with advanced CMOS semiconductor technology, provide speed and logic density for the customer. The Company holds a number of patents on various parts of its chip architectures. Altera's chips are configured by the Company's proprietary development software that translates an engineer's logic schematics and hardware descriptions into logic functions on an Altera chip.
Altera Logic Chips
Architectures. Altera believes its architectures offer high performance across a broad range of user applications. At the same time they provide simplicity to the system logic designer, making the task of designing and using Altera's chips relatively easy.
The architectures used in the Company's Classic, MAX 5000, MAX 7000, FLASHlogic, and MAX 9000 families are known as array-based architectures. These architectures are very regular, comprised of elements called Macrocells, and are optimized for combinatorial logic. The FLEX architecture is optimized for register-intensive logic applications. The FLEX architecture consists of fine grained logic elements grouped into higher level logic array blocks which are then connected together with a proprietary programmable interconnect structure. The FLASHlogic family uses non-volatile FLASH memory cells that can be configured as on-board memory or logic.
Process Technology. Through technology relationships, Altera has gained access to CMOS process technologies from larger semiconductor manufacturers. The Company's first generation CPLD product line (known as the "Classic" family) is manufactured using processes with 1.0 and 0.8 micron effective channel lengths. MAX, FLEX, and FLASHlogic products are being produced using processes with effective channel lengths of 0.8 and 0.6 microns and are expected to use more advanced CMOS processes when available. The Company procures wafers from various semiconductor manufacturers including Cypress Semiconductor Corporation ("Cypress Semiconductor"), Sharp Corporation of Japan ("Sharp"), and Taiwan Semiconductor Manufacturing Corporation ("TSMC").
Compared to bipolar technology, CMOS provides lower power dissipation and a cooler operating temperature. These attributes have allowed Altera to design and manufacture its higher density programmable logic chips. Unlike bipolar or antifuse devices, which are nonerasable, Altera's programmable chips use EPROM, EEPROM, SRAM, and FLASH programming mechanisms, which make the chips erasable and reconfigurable.
EPROM configuration elements require ultraviolet light for erasure, necessitating relatively expensive quartz-windowed packages. Devices in quartz-windowed packages are primarily used by customers for prototyping and low-volume production. Altera has mitigated this package cost to users by also making its parts available in plastic one-time programmable packages to permit reduced costs for volume production. (One-time programmable means that the parts can only be programmed once and are not erasable once programmed.) In 1992, Altera began offering chips incorporating EEPROM (MAX 7000) and SRAM (FLEX) configuration elements. The EEPROM ("E2") element permits electrical erasure so that erasure can occur even when packaged in plastic packages, providing further flexibility and cost advantage for customers. The SRAM element provides low stand-by power consumption and in-circuit reconfigurability, as well as erasure in plastic packages. FLASH memory elements, used in certain chips acquired in conjunction with the purchase of Intel Corporation's Programmable Logic Device Division on October 1, 1994, also offer these features.
The Company routinely evaluates existing and emerging types of programmable elements. If Altera perceives that such programming methods provide benefits that complement those of its current products, it will consider incorporating them into its products.
Development System Software
The Company's development system software and hardware is used to implement logic designs in its chips. Altera's MAX+PLUS II software system contains approximately two million lines of source code. The MAX+PLUS II software runs under Microsoft's Windows operating environment on personal computers and in the Motif environment on Unix workstations. By utilizing these popular graphical user interfaces, the Company has designed the software for portability to widely used personal computers and engineering workstations.
The Company provides interfaces to many industry standard third party CAE tools via the industry standard EDIF netlist format and hardware description languages (Verilog and VHDL, for example). These connections allow the Altera software to be used in conjunction with software packages including those offered by Cadence Design Systems, Inc., Data I/O Corporation, Exemplar Logic, Inc., Intergraph Corporation, Mentor Graphics Corporation, OrCAD Systems Corporation, Synopsys, Inc., and Viewlogic Systems, Inc.
An Altera chip design for a particular end product application is achieved in four steps: design entry, implementation, verification, and programming. The Company's development software provides complete facilities for each step so that the customer can take advantage of a uniform and relatively easy to learn design environment. Extensive on-line help is available in the software to provide relevant information quickly.
Design entry is accomplished using either the proprietary integrated editors or third party tools. Three basic entry formats are accepted: schematic, where the logic is represented pictorially; hardware description language, where textual logic equations define the circuit; and waveform design entry, where a designer specifies only the input and output waveforms of a circuit. A combination of the three methods may be used hierarchically in a design.
Implementation of the design is performed by Altera's proprietary logic synthesis, partitioning, and fitting software. This software takes a design and uses sophisticated mathematical routines to optimize and compact the user's logic, partition the logic among several chips (if necessary), and then fit each partitioned section into one of these chips. Typically this process requires minimal intervention from the user.
Design verification lets a user confirm the logic correctness of a design by using several proprietary tools in addition to third party simulators. The Company's static timing analyzer allows analysis of the timing of critical logic paths; integrated functional simulation allows rapid functional
logic debugging; and timing simulation allows the validation of full circuit operation. Simulation results may be viewed using the Company's waveform editor.
The final step, programming, may be performed using the Company's programming hardware and integrated software, or third party programmers such as those from Data I/O Corporation. During this step, the optimized logic design is programmed into a CPLD (or serial EPROM in the case of the FLEX SRAM-based logic chips) which is then ready for use on a circuit board in an electronic system product.
PRODUCTS
Altera sells a range of CMOS programmable logic integrated circuits and associated development software and hardware. The integrated circuits include products aimed at general logic replacement as an alternative to ASICs and products targeted at specific functions. The Company's development software allows the user to take advantage of the features of Altera integrated circuits. The Company's strategy has been to provide support for users of its newest integrated circuits from the date of product introduction by developing its software tools in tandem with the related components. Altera currently markets seven families of CMOS programmable logic in over 500 package/chip combinations.
Integrated Circuits
Classic. This is the initial family of integrated circuits introduced to the market by Altera in 1984 and 1985. It originally consisted of four general-purpose CPLD integrated circuits, targeted for the replacement of multiple small scale integrated circuits. The product family was expanded in 1994 with the acquisition of Intel's PLD division and now includes nine different circuits. This architecture provides densities ranging from 150 to 900 usable logic gates in packages ranging from 20 to 68 pins. Wafers for this family of products were initially provided by Intel and were subsequently migrated to more advanced CMOS process technologies to provide faster speed and reduced cost. Prior to the acquisition of Intel's PLD division, wafers for most of these products were manufactured for the Company by Sharp, however as a result of separate agreements related to the PLD division purchase, Intel has re-emerged as a major supplier of wafers for this family. All of these products use EPROM configuration elements. The products generally incorporate the first generation architecture and are currently marketed and sold to customers as the "Classic" family of products.
MAX 5000. This family of CPLDs uses a second generation architecture known as Multiple Array MatriX (MAX) to provide higher densities than products in the Classic family. The MAX architecture provides multiple array logic. Signals in the higher-density devices are routed between multiple arrays by the Programmable Interconnect Array that delivers a high percentage of routability. This multiple array architecture enables MAX 5000 CPLDs to offer the speed of smaller arrays with the integration density of larger arrays - MAX 5000 offers up to 3,750 usable gates. Wafers for MAX 5000 products use EPROM configuration elements and are manufactured by Cypress Semiconductor currently on its 0.8 micron CMOS process technology, though 0.65 micron CMOS process versions are being developed. These products are available in packages ranging from 24 to 100 pins.
MAX 7000. This third family of CPLDs incorporates an enhanced MAX architecture. The MAX 7000 family provides higher integration densities with faster performance and higher pin count than the MAX 5000 family. Current MAX 7000 products offer a range of densities from approximately 600 to 5000 usable gates, in packages ranging from 44 to 208 pins. The Company is currently sourcing wafers for this family from Sharp. The Company began initial shipments of the first products and related software in December 1991. This family incorporates EEPROM configuration elements on all of its chips.
FLEX 8000. The FLEX 8000 family was introduced in 1992 using 0.8 micron CMOS technology from Sharp, and using SRAM configuration elements which provide in-system reconfigurability, and low standby power. In 1994, the family was migrated to a 0.6 micron technology at TSMC providing lower costs and higher performance. The FLEX 8000 architecture provides relatively high register count compared to the Classic and MAX architectures. This family provides the largest capacity single chip the Company currently offers with approximately 16,000 usable gates and 1,500 registers in a 304 pin package.
MAX 9000. This further enhanced MAX family is one of the Company's newest architectures and was announced in September of 1994. MAX 9000 is a feature-rich, high-density macrocell architecture with up to 560 macrocells (12,000 usable gates). The EEPROM-based devices are PCI-compliant and offer non-volatile, five volt, in-system programmability (ISP). ISP functionality allows these devices to be programmed after being soldered onto the circuit board for manufacturing ease. Devices are offered in packages ranging from 84 to 304 pins and have in system clock speeds of up to 100 MHz.
FLEX 10K. The Company recently announced its newest family in March of 1995. The FLEX 10K architecture features an embedded array which can more efficiently implement a variety of memory and specialized logic functions. This family includes the Company's largest devices, which will be capable of addressing designs as large as 100,000 gates. As with each new product family, commercial success will require achievement of targeted yield, product cost, and performance levels, and the development of manufacturing, marketing, and support capabilities. Even if such goals are accomplished, there can be no assurance that new product families will achieve significant market acceptance.
FLASHlogic. This family was acquired through the Company's purchase of the PLD division of Intel. This high-speed, medium-density family combines volatile SRAM elements and non-volatile FLASH memory elements to create one of the most feature-rich families in the PLD industry. Features include on-board RAM, ISP, and in-circuit reconfigurability. Devices are offered in usable gate counts from 800 to 3,200, with up to 208 pin packages, and in-system clock speeds of up to 100 MHz.
Function-Specific. In contrast to the Company's general-purpose CPLDs, which are designed for maximum flexibility, these products dedicate a portion of the circuit to predetermined functions. These Function-Specific devices trade architectural generality for more structured organization, thus providing increased functional density and higher performance, while still providing the benefit of user configurability. Presently, two products are being sold in the marketplace: a microsequencer chip and a synchronous timing generator chip for imaging applications. Both of these products use EPROM configuration elements. The Company intends to develop other Function-Specific products as it sees appropriate market opportunities.
Multi-Chip Module. This programmable logic product uses multi-chip module technology to provide customers with approximately 50,000 usable gates in one product. Four chips from the Company's FLEX 8000 family are combined in a multi-chip module along with an SRAM-based field programmable interconnect chip (supplied by a third party). The resulting product, offered in a 560-pin PGA package, addresses the need for ASIC prototyping at much higher density levels than currently offered by the Company's single-chip products.
The Company offers a variety of plastic and quartz-windowed ceramic packages for its chips, including dual-in-line, surface mount, ball-grid, and pin-grid array configurations. Altera provides components to meet the operating temperature ranges of commercial, industrial, and military users. The Company also offers a conversion option to its customers on a number of its chips, that converts the programmable chip to a non-programmable gate array format. This option is called a Mask Programmable Logic Device (MPLD). By hard coding the programming into the chip with a mask (as with a gate array), Altera is able to provide the customer a lower cost end solution after prototyping with programmable chips.
Development System Software and Hardware
A cornerstone of Altera's strategy is the market penetration of its low-cost proprietary software design tools. These tools improve the productivity of Altera's customers, and the Company, in turn, develops a base of customers who use Altera's software to design their products. Each development software package can be used repeatedly for different designs on an ongoing basis. A number of these designs may become incorporated into long-term customer products, which generate expanded logic chip sales.
Altera's software works only with Altera-designed logic chips, thus providing a competitive advantage for Altera when dealing with customers that use its development system. As of the end of 1994, Altera had licensed over 19,000 of its development system software packages, although at any given time only a portion of these may be active.
The Company attempts to work closely with its installed base of customers, tracking the progress of logic chip designs, providing applications design support, and for those customers who have purchased maintenance agreements, upgrading the customers' software. Management believes that close contact with its development software customers is a key element in customer satisfaction and can also provide insight into new product development areas.
Altera's development software runs under the Microsoft Windows operating system. The compiler software has also been ported and is available for engineering workstations, including Sun, DEC, IBM, and Hewlett-Packard workstation platforms. The software, in general, is typically delivered to the customer on CD ROM or on multiple diskettes, along with documentation manuals. The hardware consists of a programming board which plugs into an expansion slot of the user's personal computer, and a programming unit which uses hardware that accepts various chip package types. High-volume production programming equipment is available from Data I/O Corporation and other companies.
Altera's development software products aid the chip user's design efficiency by allowing the user to continue with proven, familiar methods rather than learn new ones. Accordingly, the most widely-used design methodologies are supported, including Boolean algebra for low-density PLD users, as well as schematic capture and hardware description languages for TTL and ASIC users.
The output from any of these design methodologies is translated into a consistent format for implementation into an Altera chip, and the design is fitted by Altera's proprietary software into the particular chip chosen. This approach frees the system design engineer from the unfamiliar task of chip design and allows the engineer to focus on logic implementation.
MANUFACTURING
The Company does not directly manufacture its silicon wafers. Its products, however, require wafers manufactured with relatively state-of-the-art fabrication techniques. The Company's strategy, therefore, has been to maintain relationships with larger semiconductor manufacturers for production of its wafers. The Company believes that these manufacturers can produce wafers at lower cost due to their advanced production facilities and manufacturing economies of scale. Altera's chips are produced using each manufacturer's high-volume wafer fabrication processes, thus enabling the Company to take advantage of economies of scale and process advances.
Altera presently has its primary wafer supply arrangements with five semiconductor vendors: Sharp, TSMC, Intel Corporation, Cypress Semiconductor, and Texas Instruments. See "Patents and Licenses" for a summary of these arrangements. Assuming timely delivery and no significant yield problems, the Company believes that wafer purchases pursuant to its current supply agreements will be adequate to meet its present requirements. The Company intends to establish other sources of wafer supply for its products as such arrangements become useful or necessary, and is presently
negotiating additional foundry contracts. Worldwide semiconductor foundry capacity remains limited, however, and the Company cannot guarantee that manufacturing capacity constraints will not pose significant problems in the future.
The Company has purchased a 17% equity interest in Cypress Semiconductor (Texas) Inc. (CSTI), a subsidiary of Cypress Semiconductor Corporation. Pursuant to the agreements governing this transaction, Altera can obtain wafer supply from CSTI approximately in proportion to its percentage ownership in CSTI. This investment provides Altera with the option to design, produce, and market certain sole-sourced products and to access the next generation process technology at CSTI. The Company uses this facility for the manufacture of all of its MAX 5000 products. Cypress Semiconductor, which has manufacturing and marketing rights to certain MAX 5000 products, also manufactures its own products in the CSTI facility.
The manufacture of advanced CMOS semiconductor wafers is a highly complex process, and the Company has from time to time experienced difficulties in obtaining anticipated or acceptable yields and timely deliveries from its suppliers. Good production yields are particularly important to the Company's business, including its ability to meet customers' demand for products and to maintain profit margins. State-of-the-art manufacture of semiconductor products is sensitive to a wide variety of factors, including the level of contaminants in the manufacturing environment, impurities in the materials used, and the performance of personnel and equipment. No assurance can be given that the Company will not experience significant production yield problems with any of its product lines, including the Company's newer FLASH and SRAM-based logic chips. Disruptions or adverse supply conditions arising from market conditions, political strife, labor disputes and disruptions, natural or man-made disasters, normal process fluctuations, variances in manufacturing yields, or other factors could adversely affect the Company's operating results. The Company also expects that, as is customary in the semiconductor business, it will in the future seek to convert its fabrication process arrangements to larger wafer sizes, to more advanced process technologies, or to new suppliers in order to maintain or enhance its competitive position. Such conversions entail inherent technological risks that can adversely affect yields and delivery times. In addition, if for any reason the Company were required to seek alternative sources of supply, shipments could be delayed, and any significant delay would have an adverse effect on the Company's operating results.
In 1994 and prior years, the Company purchased the majority of its materials and services in U.S. dollars. Thus, the Company's manufacturing costs have not been subject to substantial currency exchange fluctuations in the past. However, certain contracts for silicon wafer purchases are denominated in Japanese yen, and the volume of such contracts increased significantly in 1994; further increases are anticipated in 1995. The increase of yen-denominated purchases in 1994 and the declining value of the dollar with respect to the yen had an adverse impact on the Company's margins. The Company was able to mitigate much of that impact with improved yields and efficiencies. However, there is no assurance that such improvements will occur in future years. Moreover, the dollar has dropped sharply in value against the yen in early 1995, and there is no assurance that the value of the dollar with respect to the yen will not deteriorate further. Accordingly, the impact of foreign currency exchange rate fluctuations is expected to be more significant in the future.
After wafer manufacturing is completed, each wafer is tested using a variety of test and handling equipment. These tested wafers are assembled in Korea, Hong Kong, Malaysia, and the Philippines by subcontractors. In assembly, the wafers are separated into individual chips which are then encapsulated in ceramic or plastic packages. Although the Company's assembly subcontractors have not recently experienced any serious work stoppages, the political situations in these countries are volatile, and any prolonged work stoppages or other inability of the Company to assemble its products would have a serious adverse effect on the Company's operating results. Furthermore, economic risks, such as changes in tax laws, tariff or freight rates, or interruptions in air transportation, could adversely affect the Company's operations.
Following assembly, the packaged units receive further testing either at Altera's facilities in San Jose, CA, or by subcontractors in the Far East. Altera has developed sophisticated proprietary
test software and hardware that provides relatively high speed, back-end testing. After final testing, each unit goes through marking and final inspection prior to shipment to customers.
Much of the manufacturing, assembly, testing, and packaging of Altera's development system hardware products is done by outside contractors.
MARKETING, SALES, AND CUSTOMERS
The Company markets its products in the United States and Canada through a network of direct sales personnel, independent sales representatives, and electronics distributors to a broad range of customers. The Company's direct sales personnel and independent sales representatives focus on major target accounts. Distributors generally focus selling activities on the broad base of small and medium-size customers and often provide stocking, kitting, and programming services, even to larger accounts.
In the United States, Altera's major distributors currently include Arrow/Schweber Electronics Inc. ("Arrow") and Wyle Electronics Marketing Group, a division of Wyle Laboratories ("Wyle"), which provide nationwide coverage, and Pioneer-Standard Electronics, Inc. covering the eastern half of the United States. From time-to-time the Company expects that it may add or delete distributors from its selling organization as it deems appropriate to the level of business.
To support its distribution network and focus on the target accounts and the direct OEM channel of business, the Company has 23 manufacturer's representative firms throughout the United States and Canada. At December 31, 1994, domestic sales offices were located in San Jose and in the metropolitan areas of Los Angeles, Chicago, Boston, Atlanta, Dallas, Austin, Denver, Raleigh, and New York.
The Company's international business is supported by a network of technical distributors throughout Europe and the Far East. The Company has representation in every major European country, in Israel, Japan, Australia, South America, and the Pacific Rim. International sales management offices are located in the metropolitan areas of London, Paris, Munich, Turin, Seoul, Ontario, Hong Kong, and Tokyo.
Customer service and support are important aspects of the CMOS programmable logic integrated circuit business. Altera provides several levels of user support, including applications assistance, design services, and customer training. The Company's applications engineering staff publishes data sheets and application notes, conducts technical seminars, and provides on-line design assistance via modem links to the customer's design station. Customer service is supported with inventory maintained both at the factory and at distributors' locations to provide short-term delivery of development systems and logic chips.
The Company sells products through domestic and international distribution, and direct to OEMs. During 1992, 1993, and 1994, export sales constituted 48%, 49%, and 48% of sales, respectively. Sales to Europe were $27.8 million, $34.5 million, and $42.6 million, and to Japan were $13.3 million, $24.7 million, and $37.6 million in 1992, 1993, and 1994, respectively. Through 1994, almost all export sales were denominated in U.S. currency. However, the Company is considering doing an increased amount of business in local currency in the future. Altera's export sales are subject to risks common to all export activities, including governmental regulation, possible imposition of tariffs or other trade barriers, and currency fluctuations. Certain export sales must be licensed by the Office of Export Administration of the U.S. Department of Commerce. Although from time to time the Company has experienced delays in obtaining the necessary licenses, to date such delays have not had a material adverse effect on the Company's business.
Two distributors each accounted for approximately 15% and 14% of sales in 1994, and approximately 10% each of sales in 1993. One distributor accounted for more than 10% of sales in
1992. No direct OEM customer accounted for more than 10% of the Company's sales in 1992, 1993, or 1994.
The semiconductor industry overall has historically been characterized by volatile business cycles. In the past, when the industry experienced a significant economic downturn, characterized by diminished product demand and accelerated erosion of average selling prices, the Company was not as severely affected by the semiconductor downturn as companies selling standard commodity products, due to the Company's relatively small revenue base and the specialized nature of the market for its products. Now, as the Company has grown larger and the market in which it participates has become more mature and more competitive, the Company's results are more affected by economic factors. For example, in 1994, FLEX prices were reduced significantly in order to stimulate growth and design activity. In 1992, the Japanese economy weakened considerably and the Company's business there declined sharply. Also during 1992, one of the Company's licensed second sources became much more price competitive, causing a significant decrease in the average selling price of the Company's MAX 5000 chips. The Company expects that economic and competitive factors such as these will have a greater impact on its business and operating results in the future.
BACKLOG
The Company's backlog of released orders at December 31, 1994 was approximately $51.8 million as compared to approximately $23.6 million at December 31, 1993. The Company includes in its backlog OEM customer-released orders that are requested for delivery within the next 12 months, and distributor orders requested for delivery within the next six months. The Company produces standard products which may be shipped from inventory within a short time after receipt of an order. The Company's business in particular, and to some extent that of the entire semiconductor industry, is characterized by a high percentage of short-term orders with short-term shipment schedules (turns orders), rather than long-term volume purchase contracts. Orders constituting the Company's current backlog are cancelable without significant penalty at the option of the purchaser. Accordingly, backlog as of any particular date should not be used as a measure of sales for any future period.
PATENTS AND LICENSES
The Company owns more than 50 United States patents and has additional pending United States patent applications. The Company also has various licenses from Advanced Micro Devices, Inc. ("AMD"), Cypress Semiconductor, Intel, and Texas Instruments relating to the design, manufacture, and packaging of programmable logic products. Although these patents, patent applications, and licenses may have value in discouraging competitive entry into the Company's market segment, the Company believes that its future success will depend primarily upon the technical competence and creative skills of its personnel rather than on its patents. Furthermore, there can be no assurance that any additional patents will be granted to Altera or that Altera's patents will provide meaningful protection from competition.
The Company has entered into technology cross-licensing agreements with Cypress Semiconductor and Texas Instruments, in connection with wafer supply and second source relationships. Pursuant to these agreements, the Company has been granted rights to procure wafers from these companies and to design products using certain technology that may be protected by such companies' patents. The Company has, in turn, granted Cypress Semiconductor and Texas Instruments rights to manufacture and sell certain of the Company's products. In each of the Company's product license agreements, the licensee has been granted a license with respect to a limited portion of the Company's overall product line. Sharp, TSMC, and Intel manufacture wafers for the Company but do not have rights to sell the Company's products. The Company's wafer supply agreements do not require minimum purchases by the Company.
An agreement with Cypress Semiconductor covers certain of the Company's MAX 5000 family products. An initial agreement, entered into in June 1987, was terminated on November 23, 1993, though product licenses continue after termination. In April 1990, the Company entered into an additional agreement with Cypress Semiconductor regarding an 17% equity investment in CSTI and a related supply agreement. This supply agreement was amended effective November 23, 1993, and currently is in effect. See "Manufacturing."
The agreement with Texas Instruments covers certain chip types within the Classic family and the possible production of certain other Altera products. The agreement was entered into in July 1988 and has a term of seven years. It was amended in 1990 to include only particular Classic products and certain foundry services to Altera.
The Company entered into an intellectual property cross-licensing agreement with Intel as part of the Company's purchase of Intel's PLD division in October 1994. The agreement continues for the lives of the licensed patents, and is perpetual with respect to other licensed intellectual property.
In March 1987, the Company and Monolithic Memories, Inc. (MMI) entered into an agreement cross-licensing all of each others' patents covering programmable and reprogrammable logic devices and processes for making such devices having a first filing date prior to April 1, 1989, as part of the settlement of a patent suit against the Company. This agreement covered only patents, and no products or non-patented technology was licensed to either company as a result of this agreement. In connection with the settlement, Altera issued 600,000 shares of its capital stock to MMI. In March, 1988, AMD succeeded to MMI's rights and responsibilities under the license agreement, and agreed to be bound by the terms of the agreement, in connection with its acquisition of MMI. As of June 30, 1990, AMD no longer held the 600,000 shares of Altera stock it acquired from MMI. In March 1994, AMD informed the Company that it believes the scope of the patent license described above is more limited than the Company has interpreted such license in the past. In September, 1994, AMD sued the Company on patents for which the Company believes it is licensed. AMD and the Company are presently discussing these matters, but discussions have only recently begun, and it is not yet possible to determine what effect, if any, these matters might have on the operations of the Company (see Item 3. Legal Proceedings).
As a result of its various technology licensing agreements, the Company has been granted royalty-free rights to design, manufacture, and package products using certain patents controlled by AMD, Cypress Semiconductor, Intel, and Texas Instruments. The Company believes that these licenses will assist the Company in developing further products. The Company attempts to ensure that its products and processes do not infringe the patent and proprietary rights of others, but cannot be certain that they are not doing so. Other companies have filed applications for, or have been issued, other patents and may obtain additional patents and proprietary rights relating to products or processes competitive with those of the Company. Also, the Company, in the normal course of business, from time to time receives and makes inquiries with respect to possible patent infringements. As a result of inquiries received, it may be necessary or desirable for the Company to obtain additional licenses relating to one or more of its current or future products. There is no assurance that such additional licenses could be obtained, and, if obtainable, could be obtained on conditions which would not have a materially adverse financial effect on the Company. As a result of inquiries made, it may be necessary or desirable for the Company to incur litigation expenses to enforce its intellectual property rights. There is no assurance that any such litigation would be successful, or that the Company's patents would be upheld if challenged.
RESEARCH AND DEVELOPMENT
The Company's research and development activities have focused primarily on general-purpose programmable logic chips and on the associated development software and hardware. The Company has developed these related products in parallel to provide software support to customers simultaneously with circuit introduction. Altera believes that advanced software tools are a critical
factor in the advancement of programmable semiconductor technology. Since 1991, the Company's research and development activities have been primarily directed toward the design of the MAX 7000 integrated circuits and subsequently the MAX 9000, FLEX 8000, and FLEX 10K circuits, as well as the development of new software and hardware for these circuits, cost reductions and advancements in other existing products, and development of alternative architectures and technologies. In 1994, the Company announced the MAX 9000 family and an enhanced version of the FLEX 8000 family (the 8000A family) using 0.6 micron, three layer metal technology. In 1995, the Company announced the FLEX 10K family.
The Company's research and development expenditures in 1992, 1993, and 1994 were $15,826,000, $16,847,000, and $22,249,000 (excluding an R&D In Process charge of $23,745,000 associated with the Intel PLD acquisition), respectively. The Company has not capitalized research and development or software costs to date. The Company intends to continue to spend substantial amounts on research and development in order to continue to develop new products and achieve market acceptance for such products. The commercial success of these products will depend upon the achievement of targeted yield, product cost, and performance levels and the development of manufacturing, marketing, and support capabilities. Even if such goals are accomplished, there can be no assurance that these products will achieve significant market acceptance. Moreover, the Company must continue to make significant investments in research and development in order to continue to develop new products and achieve market acceptance for such products, particularly in light of the industry pattern of price erosion for mature products and increasing competition in the programmable logic market. If the Company were unable to successfully define, develop, and introduce competitive new products, its future operating results would be adversely affected.
COMPETITION
The semiconductor industry overall is intensely competitive and is characterized by rapid technological change, rapid rates of product obsolescence, and price erosion. The industry includes many large domestic and foreign companies which have substantially greater financial, technical, and marketing resources than the Company.
The principal factors of competition in the CMOS programmable logic marketplace include the capability of software development tools, the integration capacity and flexibility of the individual circuits, product performance and features, quality and reliability, pricing, technical service and support, and the ability to respond rapidly to technical innovation. The Company believes it competes favorably with respect to these factors, although it may be at a disadvantage in comparison to larger companies with broader product lines, greater technical service and support capabilities, and internal wafer fabrication capabilities. The Company believes, however, that its proprietary device architecture and its installed base of development systems with proprietary software may provide some competitive advantage.
The Company's competition for its general-purpose programmable logic chips has come from many sources. The Company's licensees, Cypress Semiconductor, Texas Instruments, and, formerly, Intel, compete on their particular licensed products. Licensees can compete directly with pin-compatible parts even after a customer has chosen to design its product using the Company's chips. In anticipation of this, the Company structured its licenses so that each individual licensee has rights to a limited portion of the Company's overall product line. In addition, the Company's agreement with Cypress Semiconductor and CSTI allows the Company to manufacture certain products without granting second source rights. At present, only Cypress competes directly with pin-compatible parts, on the MAX 5000 family.
The Company also experiences significant competition from a number of other companies which are in the market with products competitive with those of the Company. These companies include major domestic and international semiconductor companies, traditional programmable logic and application-specific circuit manufacturers, and emerging companies. Among these are
companies such as Advanced Micro Devices, Inc., AT&T, Atmel Corporation, Xilinx, Inc., Actel Corporation, and Lattice Semiconductor Corporation. As the average pin count and functional density of the Company's products continue to increase, the Company expects to compete to an increasing extent with suppliers of products marketed as Field Programmable Gate Arrays (FPGAs), and with ASIC suppliers.
A number of very large, well-financed companies have announced their intentions to compete with the Company in its core business, and in some cases are already shipping products. These companies, including AT&T, Motorola, and others, all have proprietary wafer manufacturing ability, preferred vendor status with many of the Company's customers, extensive marketing power and name recognition, much greater financial resources than those of the Company, and other significant advantages over the Company. As the dollar volume of the Company's business grows, the attractiveness of that business to larger, more powerful competitors will continue to increase.
Substantial direct or indirect competition could have a significant adverse effect on the Company's future sales and operating results.
EMPLOYEES
As of December 31, 1994, the Company had 667 regular employees: 207 in engineering and development, 197 in sales and marketing, 200 in manufacturing, and 63 in administration and finance. The success of the Company is dependent in large part upon the continued service of its key management, technical, sales, and support employees and on its ability to continue to attract and retain additional qualified employees. The competition for such employees is intense and their loss as employees could have an adverse effect on the Company.
ITEM 2.



ITEM 2. PROPERTIES.
The Company's headquarters are in facilities in San Jose, California totaling approximately 220,000 square feet. Design, limited manufacturing, research, marketing, and administrative activities are performed in these facilities. The Company occupies these properties under non-cancelable leases which expire in 1997, and under which it has multiple options to renew for up to 17-1/2 years on the majority of the premises. The Company also leases on a short-term basis small office facilities for its sales staff in the metropolitan areas of Los Angeles, Chicago, Boston, Atlanta, Dallas, Austin, Denver, Raleigh, New York, London, Paris, Munich, Turin, Seoul, Toronto, Hong Kong, and Tokyo.
ITEM 3.

ITEM 3. LEGAL PROCEEDINGS.
In June 1992, a class action lawsuit was filed against the Company and certain of its current and former officers and directors, alleging violations of the federal securities laws. A second complaint, containing similar allegations, was filed in August 1992. The two complaints were subsequently consolidated into one class action. This matter was settled out of court in July 1994.
In June 1993, a lawsuit was filed against the Company by Xilinx, Inc., alleging infringement of certain patents held by Xilinx. The complaint seeks unspecified compensatory damages and costs and attorneys' fees, and an injunction prohibiting continuing infringement. Xilinx subsequently filed a Motion for Preliminary Injunction to prohibit the manufacture and sale of FLEX 8000 products by Altera. In February 1994, Xilinx expanded its infringement claims to cover the Company's MAX 5000 and MAX 7000 products in addition to the FLEX 8000 products. The court ruled against the Motion for Preliminary Injunction in April 1994. Limited discovery has taken place in the case. The Company disputes the merits of Xilinx's allegations and intends to defend this action vigorously.
In June 1993, a lawsuit was filed by the Company against Xilinx for infringement of certain of the Company's patents by the Xilinx XC3000 and XC4000 product families. The complaint seeks unspecified compensatory damages and costs and attorneys' fees, and an injunction prohibiting
continuing infringement. The complaint was amended in July 1993 to add allegations of infringement of an additional patent. In June 1994, Xilinx filed motions for Summary Judgment asking the court to dismiss most of Altera's suit against Xilinx. In December 1994, the court denied these motions. Significant discovery has taken place, but the court has not yet set a schedule for trial. The Company intends to pursue this action vigorously.
Xilinx has moved to consolidate the two lawsuits, and in October 1994, the court denied this motion. Recently a special master was appointed by the court to assist in both lawsuits, though the duties of the special master have not yet been fully established. Due to the nature of the litigation with Xilinx and because the lawsuits are still in pre-trial stage, management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the allegations. Management cannot ensure that Xilinx will not succeed in obtaining an injunction against the manufacture and sale of the MAX 5000, MAX 7000, or FLEX 8000 families of products, or succeed in invalidating any of the Company's patents. However, based on the facts currently known, management does not believe that these matters will have a material adverse effect on the financial position of the Company.
In August 1994, a lawsuit was filed against the Company by Advanced Micro Devices (AMD) alleging infringement of certain patents held by AMD by the MAX 7000 product family. The complaint seeks unspecified compensatory damages and costs and attorneys fees, and an injunction prohibiting continuing infringement. In September 1994 Altera filed a counter-claim against AMD alleging infringement of certain patents held by the Company. Limited discovery has taken place. The Company intends to defend against AMD's claim, and to pursue its counterclaim, vigorously. Due to the nature of the litigation with AMD, and because the lawsuit is at an early stage, management cannot estimate the total expenses, the possible loss, if any, or the range of loss that may ultimately be incurred in connection with the allegations. Management cannot ensure that AMD will not succeed in obtaining an injunction against the manufacture and sale of the MAX 7000 product family, or succeed in invalidating any of the Company's patents. However, based on the facts currently known, management does not believe that this matter will have a material adverse effect on the financial position of the Company.
ITEM 4.

ITEM 4. SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS.
The annual meeting of shareholders of the Company was held on November 16, 1994 at 10:00 a.m., at which the following matters were acted upon:
PART II
ITEM 5.

ITEM 5. MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS.
The textual portion of the section entitled "About Your Investment" and the section entitled "Corporate Directory" in the Company's 1994 Annual Report to Shareholders for the year ended December 31, 1994 ("1994 Annual Report") are incorporated herein by reference.
The Company believes factors such as quarter-to-quarter variances in financial results, announcements of new products, new orders, and order rate variations by the Company or its competitors could cause the market price of its Common Stock to fluctuate substantially. In addition, the stock prices for many high technology companies experience large fluctuations, which are often unrelated to the operating performance of the specific companies. Broad market fluctuations, as well as general economic conditions such as a recessionary period or high interest rates, may adversely affect the market price of the Company's Common Stock.
ITEM 6.

ITEM 6. SELECTED FINANCIAL DATA.
The section entitled "Selected Consolidated Financial Data/Five-Year Summary" in the Company's 1994 Annual Report is incorporated herein by reference.
ITEM 7.

ITEM 7. MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS.
The textual portion of the section entitled "Management's Discussion and Analysis of Financial Conditions and Results of Operations" in the Company's 1994 Annual Report is incorporated herein by reference.
ITEM 8.


ITEM 8. FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA.
The consolidated financial statements, together with the report thereon of Price Waterhouse LLP dated January 18, 1995 and the section entitled "Selected Consolidated Financial Data/Quarterly Data (Unaudited)" in the Company's 1994 Annual Report are incorporated herein by reference.
ITEM 9.

ITEM 9. CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND FINANCIAL DISCLOSURE.
None.
PART III
ITEM 10.



ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT.
The executive officers and directors of the Company and their ages are as follows:
_____________________ (1) Member of Nominating Committee. (2) Member of Compensation Committee. (3) Member of Audit Committee.
All directors hold office until the next annual meeting of shareholders or until their successors have been elected and qualified. There are no family relationships between any of the directors or executive officers of the Company.
Rodney Smith joined the Company in November 1983 as Chairman of the Board of Directors, President, and Chief Executive Officer. Prior to that time, he held various management positions with Fairchild Semiconductor Corporation ("Fairchild"), a semiconductor manufacturer.
Denis M. Berlan joined the Company in December 1989 as Vice President, Product Engineering, and was named Vice President, Operations and Product Engineering in October 1994. He was previously employed by Advanced Micro Devices, Inc. ("AMD"), a semiconductor manufacturer, and by Lattice Semiconductor Corporation, a semiconductor manufacturer, in engineering management capacities.
Erik Cleage joined the Company as International Marketing Manager in February 1986. He became Director, Japan and Asia Pacific Sales in April 1989, and was appointed Vice President, Marketing in August 1990. Previously, he was employed by AMD and Fairchild in various positions.
Clive McCarthy joined the Company in February 1984 as Director of Applications. He was appointed Vice President of Software in March 1987. In March 1990 he was appointed Vice President of Development Engineering. Prior to joining the Company, Mr. McCarthy had been
employed by Fairchild, Northern Telecom, and Texas Instruments in various technical and marketing management positions.
Paul Newhagen, a co-founder of the Company, has served as a director of the Company since July 1987 and as Vice President of Administration since December 1994. Mr. Newhagen served as Vice President of the Company from November 1992 to February 1993, Secretary from July 1987 to January 1993, Vice President of Finance and Administration from June 1983 to November 1992, and Chief Financial Officer from June 1983 to February 1993. From June 1993 to November 1994, Mr. Newhagen served as a consultant to the Company.
Thomas J. Nicoletti joined the Company in October 1992 as Vice President of Finance and was appointed Chief Financial Officer in February 1993. Previously, he was Chief Financial Officer for Procase, Inc., a software company, and for Lam Research Corporation, a semiconductor equipment manufacturer. Prior to that, Mr. Nicoletti was employed by Fairchild and AMD in various accounting and financial positions.
James Sansbury, a co-founder of the Company, served as Vice President of Technology and Operations from June 1983 to March 1987. Since March 1987, he has served as Vice President of Technology. He was previously employed by Hewlett-Packard Company ("Hewlett-Packard"), an electronics manufacturer.
Sandra J. Scarsella joined the Company in March 1991 as Vice President of Human Resources. She was previously associated with Intel Corporation in a variety of Human Resources management positions.
Peter Smyth joined the Company in May 1990 as Vice President of Sales. Prior to joining the Company, Mr. Smyth served as Vice President of Sales at Precision Monolithics, Inc., a semiconductor manufacturer, and Vice President of North American Sales at Mostek, a semiconductor manufacturer. Mr. Smyth was also previously associated with Texas Instruments in a variety of sales and marketing capacities.
Michael A. Ellison has served as a director of the Company since April 1984. Mr. Ellison is a venture capital investor and since October 1994 has been the Chief Executive Officer of Steller, Inc., a distributor of electronic parts. Until December 1992, he was a General Partner at Cable & Howse Ventures, a venture capital investment firm. Mr. Ellison also serves as a director of Wall Data Incorporated.
Robert W. Reed has served as a director of the Company since October 1994. Since 1991, Mr. Reed has been a Senior Vice President of Intel Corporation, a semiconductor manufacturer, and General Manager of its Semiconductor Products Group, which includes Flash Memory Products, Intel's Military and Special Products Division, and Intel's embedded microcontrollers and microprocessors. Previously, Mr. Reed was Intel's Chief Financial Officer.
William E. Terry has served as a director of the Company since August 1994. Mr. Terry is a former director and Executive Vice President of the Hewlett-Packard Company, a diversified electronics manufacturing company. At Hewlett-Packard, he held a number of senior management positions, including general manager of Hewlett-Packard's Data Products and Instrument Groups, and subsequently had overall responsibility for the Measurement Systems Sector. He retired from Hewlett-Packard in November 1993. Mr. Terry also serves as a director of Key Tronic Corporation.
ITEM 11.

ITEM 11. EXECUTIVE COMPENSATION.
The section entitled "Executive Compensation" and the section entitled "Changes to Benefit Plans" in the Company's Proxy Statement dated March 16, 1995 ("Proxy Statement") are incorporated herein by reference.
ITEM 12.

ITEM 12. SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT.
The section entitled "Security Ownership of Certain Beneficial Owners and Management" in the Company's Proxy Statement is incorporated herein by reference.
ITEM 13.

ITEM 13. CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS.
The section entitled "Director Compensation" and the section entitled "Certain Business Relationships" in the Company's Proxy Statement are incorporated herein by reference.
PART IV
ITEM 14.

ITEM 14. EXHIBITS, FINANCIAL STATEMENT SCHEDULES, AND REPORTS ON FORM 8-K.
__________ (1) Incorporated by reference to identically numbered exhibits filed in response to item 16(a), "Exhibits," of the registrant's Registration Statement on Form S-1, as amended, (File No. 33-17717) which became effective March 29, 1988. (2) Incorporated by reference to identically numbered exhibits filed in response to Item 14(a), "Exhibits," of the registrant's Report on Form 10-K for the fiscal year ended December 31, 1988.
(3) Incorporated by reference to identically numbered exhibits filed in response to Item 14(a), "Exhibits," of the registrant's Report on Form 10-K for the fiscal year ended December 31, 1989. (4) Incorporated by reference to identically numbered exhibits filed in response to Item 6(a), "Exhibits," of the registrant's Report on Form 10-Q for the quarter ended March 31, 1990, as amended by a Form 8 filed on July 13, 1990. (5) Incorporated by reference to identically numbered exhibits filed in response to Item 14(a), "Exhibits," of the registrant's Report on Form 10-K for the fiscal year ended December 31, 1990. (6) Incorporated by reference to identically numbered exhibits filed in response to Item 14(a), "Exhibits," of the registrant's Report on Form 10-K for the fiscal year ended December 31, 1992. (7) Incorporated by reference to identically numbered exhibits field in response to Item 14(a), "Exhibits," of the registrants Report on Form 10-K for the fiscal year ended December 31, 1993. (8) Incorporated by reference to identically numbered exhibits field in response to Item 7, "Exhibits," of the registrants' Report on Form 8-K dated October 15, 1994 and 8-KA dated December 15, 1994 (9) Incorporated by reference to identically numbered exhibits filed in response to Item 6(a), "Exhibits," of the registrant's Report on Form 10-Q for the quarter ended September 30, 1994 * Confidential treatment has previously been granted for portions of this exhibit pursuant to an order of the Commission. ** Confidential treatment requested. + Management contract or compensatory plan or arrangement required to be filed as an exhibit to this Report on Form 10-K pursuant to Item 14(c) thereof.
(b) Reports on Form 8-K.
On December 15, 1994, the Company filed its report on Form 8-K/A (the "Form 8-K/A") supplementing the Company's filing on Form 8-K filed on October 15, 1994 (the "Form 8-K"). The Form 8-K reported on the Company's acquisition of the programmable logic device division of Intel Corporation. The Form 8-K/A included financial statements related to that acquisition.
CONSENT OF INDEPENDENT ACCOUNTANTS
We hereby consent to the incorporation by reference in the Prospectus constituting part of the Registration Statements on Form S-8 (No. 33-22877, No. 33-37159, and No. 33-57350) of Altera Corporation of our report dated January 18, 1995 appearing in the Annual Report to Shareholders which is incorporated in this Annual Report on Form 10-K.
/s/ PRICE WATERHOUSE LLP
PRICE WATERHOUSE LLP
San Jose, California March 27, 1995
SIGNATURES
Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange Act of 1934, the registrant has duly caused this Report on Form 10-K to be signed on its behalf, by the undersigned thereto duly authorized.
ALTERA CORPORATION ------------------ Registrant
By: /S/ RODNEY SMITH ----------------------- Rodney Smith, President and Chief Executive Officer
March 27, 1995
POWER OF ATTORNEY
Know all persons by these presents, that each person whose signature appears below constitutes and appoints Rodney Smith and Thomas J. Nicoletti, jointly and severally, his attorneys-in-fact, each with the power of substitution, for him in any and all capacities, to sign any amendments to this Report on Form 10-K, and to file the same, with exhibits thereto and other documents in connection therewith, with the Securities and Exchange Commission, hereby ratifying and confirming all that each of said attorneys-in-fact, or his substitute or substitutes, may do or cause to be done by virtue hereof.
Pursuant to the requirements of the Securities Exchange Act of 1934, this Report on Form 10-K has been signed below by the following persons on behalf of the registrant and in the capacities and on the dates indicated:
INDEX TO EXHIBITS
_________ See Pages 21-22 for footnotes.