Original: The acronym RISC ( pronounced as risk ) , for reduced instruction set computer , represents a CPU design strategy emphasizing the insight that simplified instructions that '' do less '' may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly .
Simplified: A reduced instruction set computing ( acronym RISC pronounced risk ) , represents a CPU design method to simplify instructions which '' do less '' but provide higher performance by making instructions execute very fast .