Theorem: BVExpr.bitblast.blastAdd.go_eq_eval_getLsb (LeanSAT/Reflect/BVExpr/BitBlast/Lemmas/Add.lean)

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
⊢ ∀ (idx : Nat) (hidx1 : idx < w),
    curr ≤ idx →
      ⟦{ aig := (go aig curr hcurr cin s lhs rhs).aig,
            ref := (go aig curr hcurr cin s lhs rhs).stream.getRef idx hidx1 },
          assign⟧ =
        ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
          (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
intro idx hidx1 hidx2
State after:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
⊢ ⟦{ aig := (go aig curr hcurr cin s lhs rhs).aig, ref := (go aig curr hcurr cin s lhs rhs).stream.getRef idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
⊢ ⟦{ aig := (go aig curr hcurr cin s lhs rhs).aig, ref := (go aig curr hcurr cin s lhs rhs).stream.getRef idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
generalize hgo : go aig curr hcurr cin s lhs rhs = res
State after:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo : go aig curr hcurr cin s lhs rhs = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo : go aig curr hcurr cin s lhs rhs = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
unfold go at hgo
State after:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo :
  (if hidx : curr < w then
      let lin := lhs.getRef curr hidx;
      let rin := rhs.getRef curr hidx;
      let res := mkFullAdder aig { lhs := lin, rhs := rin, cin := cin };
      let aig_1 := res.aig;
      let outRef := res.out;
      let carryRef := res.cout;
      let s := s.cast ⋯;
      let lhs := lhs.cast ⋯;
      let rhs := rhs.cast ⋯;
      let s := s.pushRef outRef;
      go aig_1 (curr + 1) ⋯ carryRef s lhs rhs
    else
      let_fun hcurr := ⋯;
      { aig := aig, stream := hcurr ▸ s }) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo :
  (if hidx : curr < w then
      let lin := lhs.getRef curr hidx;
      let rin := rhs.getRef curr hidx;
      let res := mkFullAdder aig { lhs := lin, rhs := rin, cin := cin };
      let aig_1 := res.aig;
      let outRef := res.out;
      let carryRef := res.cout;
      let s := s.cast ⋯;
      let lhs := lhs.cast ⋯;
      let rhs := rhs.cast ⋯;
      let s := s.pushRef outRef;
      go aig_1 (curr + 1) ⋯ carryRef s lhs rhs
    else
      let_fun hcurr := ⋯;
      { aig := aig, stream := hcurr ▸ s }) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
dsimp at hgo
State after:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo :
  (if hidx : curr < w then
      go (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).aig (curr + 1) ⋯
        (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).cout
        ((s.cast ⋯).pushRef
          (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).out)
        (lhs.cast ⋯) (rhs.cast ⋯)
    else { aig := aig, stream := ⋯ ▸ s }) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hgo :
  (if hidx : curr < w then
      go (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).aig (curr + 1) ⋯
        (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).cout
        ((s.cast ⋯).pushRef
          (mkFullAdder aig { lhs := lhs.getRef curr hidx, rhs := rhs.getRef curr hidx, cin := cin }).out)
        (lhs.cast ⋯) (rhs.cast ⋯)
    else { aig := aig, stream := ⋯ ▸ s }) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
split at hgo
State after:
case isTrue
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case isFalse
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : ¬curr < w
hgo : { aig := aig, stream := ⋯ ▸ s } = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case isTrue
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case isFalse
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : ¬curr < w
hgo : { aig := aig, stream := ⋯ ▸ s } = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
. next hlt =>
  cases Nat.eq_or_lt_of_le hidx2 with
  | inl heq =>
    rw [← hgo]
    rw [go_getRef (hidx := by omega)]
    rw [AIG.RefStream.getRef_push_ref_eq' (hidx := by rw [heq])]
    simp only [← heq]
    rw [go_denote_mem_prefix]
    . unfold mkFullAdder
      simp [hcin]
    . simp only [Ref_cast']
      apply Ref.hgate
  | inr hlt =>
    rw [← hgo]
    rw [go_eq_eval_getLsb (lhsExpr := lhsExpr) (rhsExpr := rhsExpr) (curr := curr + 1)]
    . rw [mkFullAdder_denote_mem_prefix]
      rw [mkFullAdder_denote_mem_prefix]
      . simp
      . simp [Ref.hgate]
      . simp [Ref.hgate]
    . intro idx hidx
      rw [mkFullAdder_denote_mem_prefix]
      rw [← hleft idx hidx]
      . simp
      . simp [Ref.hgate]
    . intro idx hidx
      rw [mkFullAdder_denote_mem_prefix]
      rw [← hright idx hidx]
      . simp
      . simp [Ref.hgate]
    . unfold mkFullAdder
      simp only [Ref_cast', id_eq, Int.reduceNeg, denote_projected_entry, denote_mkFullAdderCarry,
        FullAdderInput.lhs_cast, FullAdderInput.rhs_cast, FullAdderInput.cin_cast,
        BitVec.carry_succ]
      rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
      rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
      rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
      rw [hleft, hright, hcin]
      simp [_root_.Bool.atLeastTwo_eq_halfAdder]
    . omega
State after:
case isFalse
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : ¬curr < w
hgo : { aig := aig, stream := ⋯ ▸ s } = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case isFalse
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : ¬curr < w
hgo : { aig := aig, stream := ⋯ ▸ s } = res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
. omega
State after:
no goals

State before:
case isTrue
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
h✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr h✝, rhs := rhs.getRef curr h✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
next hlt =>
cases Nat.eq_or_lt_of_le hidx2 with
| inl heq =>
  rw [← hgo]
  rw [go_getRef (hidx := by omega)]
  rw [AIG.RefStream.getRef_push_ref_eq' (hidx := by rw [heq])]
  simp only [← heq]
  rw [go_denote_mem_prefix]
  . unfold mkFullAdder
    simp [hcin]
  . simp only [Ref_cast']
    apply Ref.hgate
| inr hlt =>
  rw [← hgo]
  rw [go_eq_eval_getLsb (lhsExpr := lhsExpr) (rhsExpr := rhsExpr) (curr := curr + 1)]
  . rw [mkFullAdder_denote_mem_prefix]
    rw [mkFullAdder_denote_mem_prefix]
    . simp
    . simp [Ref.hgate]
    . simp [Ref.hgate]
  . intro idx hidx
    rw [mkFullAdder_denote_mem_prefix]
    rw [← hleft idx hidx]
    . simp
    . simp [Ref.hgate]
  . intro idx hidx
    rw [mkFullAdder_denote_mem_prefix]
    rw [← hright idx hidx]
    . simp
    . simp [Ref.hgate]
  . unfold mkFullAdder
    simp only [Ref_cast', id_eq, Int.reduceNeg, denote_projected_entry, denote_mkFullAdderCarry,
      FullAdderInput.lhs_cast, FullAdderInput.rhs_cast, FullAdderInput.cin_cast,
      BitVec.carry_succ]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [hleft, hright, hcin]
    simp [_root_.Bool.atLeastTwo_eq_halfAdder]
  . omega
State after:
no goals

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
cases Nat.eq_or_lt_of_le hidx2 with
| inl heq =>
  rw [← hgo]
  rw [go_getRef (hidx := by omega)]
  rw [AIG.RefStream.getRef_push_ref_eq' (hidx := by rw [heq])]
  simp only [← heq]
  rw [go_denote_mem_prefix]
  . unfold mkFullAdder
    simp [hcin]
  . simp only [Ref_cast']
    apply Ref.hgate
| inr hlt =>
  rw [← hgo]
  rw [go_eq_eval_getLsb (lhsExpr := lhsExpr) (rhsExpr := rhsExpr) (curr := curr + 1)]
  . rw [mkFullAdder_denote_mem_prefix]
    rw [mkFullAdder_denote_mem_prefix]
    . simp
    . simp [Ref.hgate]
    . simp [Ref.hgate]
  . intro idx hidx
    rw [mkFullAdder_denote_mem_prefix]
    rw [← hleft idx hidx]
    . simp
    . simp [Ref.hgate]
  . intro idx hidx
    rw [mkFullAdder_denote_mem_prefix]
    rw [← hright idx hidx]
    . simp
    . simp [Ref.hgate]
  . unfold mkFullAdder
    simp only [Ref_cast', id_eq, Int.reduceNeg, denote_projected_entry, denote_mkFullAdderCarry,
      FullAdderInput.lhs_cast, FullAdderInput.rhs_cast, FullAdderInput.cin_cast,
      BitVec.carry_succ]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
    rw [hleft, hright, hcin]
    simp [_root_.Bool.atLeastTwo_eq_halfAdder]
  . omega
State after:
no goals

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [← hgo]
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
                  (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
                  ((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
                  (lhs.cast ⋯) (rhs.cast ⋯)).stream.getRef
            idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
                  (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
                  ((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
                  (lhs.cast ⋯) (rhs.cast ⋯)).stream.getRef
            idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [go_getRef (hidx := by omega)]
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out).getRef
                idx ⋯).cast
            ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out).getRef
                idx ⋯).cast
            ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [AIG.RefStream.getRef_push_ref_eq' (hidx := by rw [heq])]
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
simp only [← heq]
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
              (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯ },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))
Tactic:
rw [go_denote_mem_prefix]
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig,
        ref :=
          {
            gate :=
              ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast
                  ⋯).gate,
            hgate := ?inl.hstart } },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))

case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯).gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig,
        ref :=
          {
            gate :=
              ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast
                  ⋯).gate,
            hgate := ?inl.hstart } },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))

case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯).gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size
Tactic:
. unfold mkFullAdder
  simp [hcin]
State after:
case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯).gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size

State before:
case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯).gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size
Tactic:
. simp only [Ref_cast']
  apply Ref.hgate
State after:
no goals

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig✝ : AIG α
curr : Nat
hcurr✝ : curr ≤ w
cin✝ : aig✝.Ref
s✝ : aig✝.RefStream curr
lhs✝ rhs✝ : aig✝.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig✝, ref := lhs✝.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig✝, ref := rhs✝.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig✝, ref := cin✝ }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig✝ { lhs := lhs✝.getRef curr hlt, rhs := rhs✝.getRef curr hlt, cin := cin✝ }).aig (curr + 1) ⋯
      (mkFullAdder aig✝ { lhs := lhs✝.getRef curr hlt, rhs := rhs✝.getRef curr hlt, cin := cin✝ }).cout
      ((s✝.cast ⋯).pushRef
        (mkFullAdder aig✝ { lhs := lhs✝.getRef curr hlt, rhs := rhs✝.getRef curr hlt, cin := cin✝ }).out)
      (lhs✝.cast ⋯) (rhs✝.cast ⋯) =
    res
heq : curr = idx
aig : AIG α
hcurr : curr + 1 ≤ w
cin : aig.Ref
s : aig.RefStream (curr + 1)
lhs rhs : aig.RefStream w
⊢ idx < curr + 1
Tactic:
omega
State after:
no goals

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s✝ : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s✝.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
s : (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.RefStream curr
ref : (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.Ref
⊢ idx = curr
Tactic:
rw [heq]
State after:
no goals

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig,
        ref :=
          {
            gate :=
              ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast
                  ⋯).gate,
            hgate := ?inl.hstart } },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))
Tactic:
unfold mkFullAdder
State after:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).aig,
        ref :=
          {
            gate :=
              ((let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin };
                      let aig_1 := res.aig;
                      let outRef := res.ref;
                      let_fun haig1 := ⋯;
                      let input := { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }.cast haig1;
                      let res_1 := mkFullAdderCarry aig_1 input;
                      let aig_2 := res_1.aig;
                      let carryRef := res_1.ref;
                      let_fun haig2 := ⋯;
                      let outRef := outRef.cast haig2;
                      let_fun hle := ⋯;
                      { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).out.cast
                  ⋯).gate,
            hgate := ?inl.hstart } },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))

State before:
case inl
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ⟦{
        aig :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).aig,
        ref :=
          {
            gate :=
              ((let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin };
                      let aig_1 := res.aig;
                      let outRef := res.ref;
                      let_fun haig1 := ⋯;
                      let input := { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }.cast haig1;
                      let res_1 := mkFullAdderCarry aig_1 input;
                      let aig_2 := res_1.aig;
                      let carryRef := res_1.ref;
                      let_fun haig2 := ⋯;
                      let outRef := outRef.cast haig2;
                      let_fun hle := ⋯;
                      { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).out.cast
                  ⋯).gate,
            hgate := ?inl.hstart } },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef curr ⋯ }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef curr ⋯ }, assign⟧.xor (BitVec.carry curr lhsExpr rhsExpr false))
Tactic:
simp [hcin]
State after:
no goals

State before:
case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ ((mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.cast ⋯).gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size
Tactic:
simp only [Ref_cast']
State after:
case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size

State before:
case inl.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).cout
      ((s.cast ⋯).pushRef (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
heq : curr = idx
⊢ (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).out.gate <
    (mkFullAdder aig { lhs := lhs.getRef curr hlt, rhs := rhs.getRef curr hlt, cin := cin }).aig.decls.size
Tactic:
apply Ref.hgate
State after:
no goals

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := res.aig, ref := res.stream.getRef idx hidx1 }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [← hgo]
State after:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1)
              ⋯ (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1)
                  ⋯ (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
                  ((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
                  (lhs.cast ⋯) (rhs.cast ⋯)).stream.getRef
            idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{
        aig :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1)
              ⋯ (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
              ((s.cast ⋯).pushRef
                (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
              (lhs.cast ⋯) (rhs.cast ⋯)).aig,
        ref :=
          (go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1)
                  ⋯ (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
                  ((s.cast ⋯).pushRef
                    (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
                  (lhs.cast ⋯) (rhs.cast ⋯)).stream.getRef
            idx hidx1 },
      assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [go_eq_eval_getLsb (lhsExpr := lhsExpr) (rhsExpr := rhsExpr) (curr := curr + 1)]
State after:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := (lhs.cast ⋯).getRef idx hidx1 },
          assign⟧.xor
      (⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := (rhs.cast ⋯).getRef idx hidx1 },
            assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (lhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      lhsExpr.getLsb idx

case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := (lhs.cast ⋯).getRef idx hidx1 },
          assign⟧.xor
      (⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := (rhs.cast ⋯).getRef idx hidx1 },
            assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (lhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      lhsExpr.getLsb idx

case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx
Tactic:
. rw [mkFullAdder_denote_mem_prefix]
  rw [mkFullAdder_denote_mem_prefix]
  . simp
  . simp [Ref.hgate]
  . simp [Ref.hgate]
State after:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (lhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      lhsExpr.getLsb idx

case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (lhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      lhsExpr.getLsb idx

case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx
Tactic:
. intro idx hidx
  rw [mkFullAdder_denote_mem_prefix]
  rw [← hleft idx hidx]
  . simp
  . simp [Ref.hgate]
State after:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx
Tactic:
. intro idx hidx
  rw [mkFullAdder_denote_mem_prefix]
  rw [← hright idx hidx]
  . simp
  . simp [Ref.hgate]
State after:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx

State before:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx
Tactic:
. unfold mkFullAdder
  simp only [Ref_cast', id_eq, Int.reduceNeg, denote_projected_entry, denote_mkFullAdderCarry,
    FullAdderInput.lhs_cast, FullAdderInput.rhs_cast, FullAdderInput.cin_cast,
    BitVec.carry_succ]
  rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
  rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
  rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
  rw [hleft, hright, hcin]
  simp [_root_.Bool.atLeastTwo_eq_halfAdder]
State after:
case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx

State before:
case inr.a
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ curr + 1 ≤ idx
Tactic:
. omega
State after:
no goals

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := (lhs.cast ⋯).getRef idx hidx1 },
          assign⟧.xor
      (⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := (rhs.cast ⋯).getRef idx hidx1 },
            assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
rw [mkFullAdder_denote_mem_prefix]
State after:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
      (⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := (rhs.cast ⋯).getRef idx hidx1 },
            assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
      (⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := (rhs.cast ⋯).getRef idx hidx1 },
            assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
rw [mkFullAdder_denote_mem_prefix]
State after:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
      (⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((rhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
      (⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((rhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
. simp
State after:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((rhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

State before:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((rhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
. simp [Ref.hgate]
State after:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

State before:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size

case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
. simp [Ref.hgate]
State after:
no goals

State before:
case inr
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
      (⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx1).gate, hgate := ?inr.hstart } }, assign⟧.xor
        (BitVec.carry idx lhsExpr rhsExpr false)) =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx1 }, assign⟧.xor
      (⟦{ aig := aig, ref := rhs.getRef idx hidx1 }, assign⟧.xor (BitVec.carry idx lhsExpr rhsExpr false))
Tactic:
simp
State after:
no goals

State before:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((rhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
simp [Ref.hgate]
State after:
no goals

State before:
case inr.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ((lhs.cast ⋯).getRef idx hidx1).gate < aig.decls.size
Tactic:
simp [Ref.hgate]
State after:
no goals

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (lhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      lhsExpr.getLsb idx
Tactic:
intro idx hidx
State after:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (lhs.cast ⋯).getRef idx hidx },
      assign⟧ =
    lhsExpr.getLsb idx

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (lhs.cast ⋯).getRef idx hidx },
      assign⟧ =
    lhsExpr.getLsb idx
Tactic:
rw [mkFullAdder_denote_mem_prefix]
State after:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hleft.hstart } }, assign⟧ =
    lhsExpr.getLsb idx

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hleft.hstart } }, assign⟧ =
    lhsExpr.getLsb idx

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
rw [← hleft idx hidx]
State after:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hleft.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hleft.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
. simp
State after:
case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
. simp [Ref.hgate]
State after:
no goals

State before:
case inr.hleft
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((lhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hleft.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧
Tactic:
simp
State after:
no goals

State before:
case inr.hleft.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((lhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
simp [Ref.hgate]
State after:
no goals

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ∀ (idx : Nat) (hidx : idx < w),
    ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
          ref := (rhs.cast ⋯).getRef idx hidx },
        assign⟧ =
      rhsExpr.getLsb idx
Tactic:
intro idx hidx
State after:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (rhs.cast ⋯).getRef idx hidx },
      assign⟧ =
    rhsExpr.getLsb idx

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (rhs.cast ⋯).getRef idx hidx },
      assign⟧ =
    rhsExpr.getLsb idx
Tactic:
rw [mkFullAdder_denote_mem_prefix]
State after:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hright.hstart } }, assign⟧ =
    rhsExpr.getLsb idx

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hright.hstart } }, assign⟧ =
    rhsExpr.getLsb idx

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
rw [← hright idx hidx]
State after:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hright.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hright.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
. simp
State after:
case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

State before:
case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size

case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
. simp [Ref.hgate]
State after:
no goals

State before:
case inr.hright
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ⟦{ aig := aig, ref := { gate := ((rhs.cast ⋯).getRef idx hidx).gate, hgate := ?inr.hright.hstart } }, assign⟧ =
    ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧
Tactic:
simp
State after:
no goals

State before:
case inr.hright.hstart
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx✝ : Nat
hidx1 : idx✝ < w
hidx2 : curr ≤ idx✝
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx✝
idx : Nat
hidx : idx < w
⊢ ((rhs.cast ⋯).getRef idx hidx).gate < aig.decls.size
Tactic:
simp [Ref.hgate]
State after:
no goals

State before:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{ aig := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
        ref := (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false
Tactic:
unfold mkFullAdder
State after:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{
        aig :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).aig,
        ref :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false

State before:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ ⟦{
        aig :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).aig,
        ref :=
          (let res := mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin };
            let aig_1 := res.aig;
            let outRef := res.ref;
            let_fun haig1 := ⋯;
            let input := { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }.cast haig1;
            let res_1 := mkFullAdderCarry aig_1 input;
            let aig_2 := res_1.aig;
            let carryRef := res_1.ref;
            let_fun haig2 := ⋯;
            let outRef := outRef.cast haig2;
            let_fun hle := ⋯;
            { aig := aig_2, out := outRef, cout := carryRef, hle := hle }).cout },
      assign⟧ =
    BitVec.carry (curr + 1) lhsExpr rhsExpr false
Tactic:
simp only [Ref_cast', id_eq, Int.reduceNeg, denote_projected_entry, denote_mkFullAdderCarry,
  FullAdderInput.lhs_cast, FullAdderInput.rhs_cast, FullAdderInput.cin_cast,
  BitVec.carry_succ]
State after:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ (xor
          ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ⋯ } },
            assign⟧
          ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
            assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := cin.gate, hgate := ⋯ } },
          assign⟧ ||
      ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ⋯ } },
          assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
          assign⟧) =
    (lhsExpr.getLsb curr).atLeastTwo (rhsExpr.getLsb curr) (BitVec.carry curr lhsExpr rhsExpr false)

State before:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ (xor
          ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ⋯ } },
            assign⟧
          ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
            assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := cin.gate, hgate := ⋯ } },
          assign⟧ ||
      ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ⋯ } },
          assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
          assign⟧) =
    (lhsExpr.getLsb curr).atLeastTwo (rhsExpr.getLsb curr) (BitVec.carry curr lhsExpr rhsExpr false)
Tactic:
rw [AIG.LawfulOperator.denote_mem_prefix (f := mkFullAdderOut)]
State after:
case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ (xor ⟦{ aig := aig, ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ?inr.hcin } }, assign⟧
          ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
              ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
            assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := cin.gate, hgate := ⋯ } },
          assign⟧ ||
      ⟦{ aig := aig, ref := { gate := (lhs.getRef curr hlt✝).gate, hgate := ?inr.hcin } }, assign⟧ &&
        ⟦{ aig := (mkFullAdderOut aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig,
            ref := { gate := (rhs.getRef curr hlt✝).gate, hgate := ⋯ } },
          assign⟧) =
    (lhsExpr.getLsb curr).atLeastTwo (rhsExpr.getLsb curr) (BitVec.carry curr lhsExpr rhsExpr false)

case inr.hcin
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
w : Nat
aig : AIG α
curr : Nat
hcurr : curr ≤ w
cin : aig.Ref
s : aig.RefStream curr
lhs rhs : aig.RefStream w
assign : α → Bool
lhsExpr rhsExpr : BitVec w
hleft : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := lhs.getRef idx hidx }, assign⟧ = lhsExpr.getLsb idx
hright : ∀ (idx : Nat) (hidx : idx < w), ⟦{ aig := aig, ref := rhs.getRef idx hidx }, assign⟧ = rhsExpr.getLsb idx
hcin : ⟦{ aig := aig, ref := cin }, assign⟧ = BitVec.carry curr lhsExpr rhsExpr false
idx : Nat
hidx1 : idx < w
hidx2 : curr ≤ idx
res : RefStreamEntry α w
hlt✝ : curr < w
hgo :
  go (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).aig (curr + 1) ⋯
      (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).cout
      ((s.cast ⋯).pushRef
        (mkFullAdder aig { lhs := lhs.getRef curr hlt✝, rhs := rhs.getRef curr hlt✝, cin := cin }).out)
      (lhs.cast ⋯) (rhs.cast ⋯) =
    res
hlt : curr < idx
⊢ (lhs.getRef curr hlt✝).gate < aig.decls.size