Theorem: AIG.mkBEqCached_le_size (LeanSAT/AIG/CachedGatesLemmas.lean)

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤ (aig.mkBEqCached input).aig.decls.size
Tactic:
simp only [mkBEqCached]
State after:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤
    (((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
                  ((input.asGateInput true false).cast ⋯)).aig.mkGateCached
            { lhs := { ref := (aig.mkGateCached (input.asGateInput false true)).ref.cast ⋯, inv := true },
              rhs :=
                {
                  ref :=
                    ((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
                        ((input.asGateInput true false).cast ⋯)).ref,
                  inv := true } }).aig.decls.size

State before:
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤
    (((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
                  ((input.asGateInput true false).cast ⋯)).aig.mkGateCached
            { lhs := { ref := (aig.mkGateCached (input.asGateInput false true)).ref.cast ⋯, inv := true },
              rhs :=
                {
                  ref :=
                    ((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
                        ((input.asGateInput true false).cast ⋯)).ref,
                  inv := true } }).aig.decls.size
Tactic:
apply LawfulOperator.le_size_of_le_aig_size
State after:
case h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤
    ((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
            ((input.asGateInput true false).cast ⋯)).aig.decls.size

State before:
case h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤
    ((aig.mkGateCached (input.asGateInput false true)).aig.mkGateCached
            ((input.asGateInput true false).cast ⋯)).aig.decls.size
Tactic:
apply LawfulOperator.le_size_of_le_aig_size
State after:
case h.h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤ (aig.mkGateCached (input.asGateInput false true)).aig.decls.size

State before:
case h.h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤ (aig.mkGateCached (input.asGateInput false true)).aig.decls.size
Tactic:
apply LawfulOperator.le_size_of_le_aig_size
State after:
case h.h.h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤ aig.decls.size

State before:
case h.h.h
α : Type
inst✝² : BEq α
inst✝¹ : Hashable α
inst✝ : DecidableEq α
aig : AIG α
input : aig.BinaryInput
⊢ aig.decls.size ≤ aig.decls.size
Tactic:
omega
State after:
no goals