CWE-1244: Internal Asset Exposed to Unsafe Debug Access Level or State

Description:
The product uses physical debug or test
        interfaces with support for multiple access levels, but it
        assigns the wrong debug access level to an internal asset,
        providing unintended access to the asset from untrusted debug
        agents.

Extended Description:
Debug authorization can have multiple levels of
	  access, defined such that different system internal assets
	  are accessible based on the current authorized debug
	  level. Other than debugger authentication (e.g., using
	  passwords or challenges), the authorization can also be
	  based on the system state or boot stage. For example, full
	  system debug access might only be allowed early in boot
	  after a system reset to ensure that previous session data is
	  not accessible to the authenticated debugger.

Affected languages: Not Language-Specific
Affected technologies: System on Chip
Parent weaknesses: CWE-863

Consequences:
  - Confidentiality: Read Memory
  - Integrity: Modify Memory
  - Authorization: Gain Privileges or Assume Identity

Detection methods:
  - Manual Analysis: Check 2 devices for their passcode to authenticate access to JTAG/debugging ports. If the passcodes are missing or the same, update the design to fix and retest. Check communications over JTAG/debuggi

Mitigations:
  - [Architecture and Design] For security-sensitive assets accessible over debug/test interfaces, only allow trusted agents.
  - [Architecture and Design] Apply blinding [REF-1219] or masking techniques in strategic areas.
  - [Implementation] Add shielding or tamper-resistant protections to the device, which increases the difficulty and cost for accessing debug/test interfaces.

Demonstrative examples:
The JTAG interface is used to perform debugging and provide CPU core access for developers. JTAG-access protection is implemented as part of the JTAG_SHIELD bit in the hw_digctl_ctrl register. This register has no default value at power up and is set only after the system boots from ROM and control is transferred to the user software.
This means that since the end user has access to JTAG at system reset and during ROM code execution before control is transferred to user software, a JTAG user can modify the boot flow and subsequently disclose all CPU information, including data-encryption keys.
1 bit 
                                     0x0 = JTAG debugger is enabled (default) 
                                 
                                 
                                     JTAG_SHI

The example code below is taken from the CVA6 processor core of the HACK@DAC'21 buggy OpenPiton SoC. Debug access allows users to access internal hardware registers that are otherwise not exposed for user access or restricted access through access control protocols. Hence, requests to enter debug mode are checked and authorized only if the processor has sufficient privileges. In addition, debug accesses are also locked behind password checkers. Thus, the processor enters debug mode only when the privilege level requirement is met, and the correct debug password is provided.
The following code [REF-1377] illustrates an instance of a vulnerable implementation of debug mode. The core correctly checks if the debug requests have sufficient privileges and enables the debug_mode_d and debug_mode_

Real-world examples:
  - CVE-2019-18827: After ROM code execution, JTAG access is disabled. But before the ROM code is executed, JTAG access is possible, allowing a user full system access.  This allows a user to modify the boot flow and suc