CWE-1299: Missing Protection Mechanism for Alternate Hardware Interface

Description:
The lack of protections on alternate paths to access
                control-protected assets (such as unprotected shadow registers
                and other external facing unguarded interfaces) allows an
                attacker to bypass existing protections to the asset that are
		only performed against the primary path.

Extended Description:
An asset inside a chip might have access-control
                    protections through one interface. However, if all paths to
                    the asset are not protected, an attacker might compromise
                    the asset through alternate paths. These alternate paths
                    could be through shadow or mirror registers inside the IP
                    core, or could be paths from other external-facing
                    interfaces to the IP core or SoC. 
                 Consider an SoC with various interfaces such as UART,
                    SMBUS, PCIe, USB, etc. If access control is implemented for
                    SoC internal registers only over the PCIe interface, then
                    an attacker could still modify the SoC internal registers
                    through alternate paths by coming through interfaces such
                    as UART, SMBUS, USB, etc.  
                 Alternatively, attackers might be able to bypass
             

Affected languages: Not Language-Specific
Affected technologies: Microcontroller Hardware, Processor Hardware, Bus/Interface Hardware, Not Technology-Specific
Parent weaknesses: CWE-420, CWE-288

Consequences:
  - Confidentiality: Modify Memory

Mitigations:
  - [Requirements] Protect assets from accesses against all potential interfaces and alternate paths.
  - [Architecture and Design] Protect assets from accesses against all potential interfaces and alternate paths.
  - [Implementation] Protect assets from accesses against all potential interfaces and alternate paths.

Demonstrative examples:
Register SECURE_ME is located at address 0xF00. A
                            mirror of this register called COPY_OF_SECURE_ME is
                            at location 0x800F00. The register SECURE_ME is
                            protected from malicious agents and only allows
                            access to select, while COPY_OF_SECURE_ME is not. 
                         
                         
                            Access control is implemented using an allowlist (as
                            indicated by acl_oh_allowlist). The identity of the
                            initiator of the transaction is indicated by the
                            one hot input, incoming_id. This is checked against
                            the acl_oh_allowlist (which contains a li

Real-world examples:
  - CVE-2022-38399: Missing protection mechanism on serial connection allows for arbitrary OS command execution.
  - CVE-2020-9285: Mini-PCI Express slot does not restrict direct memory access.
  - CVE-2020-8004: When the internal flash is protected by blocking access on the Data Bus (DBUS), it can still be indirectly accessed through the Instruction Bus (IBUS).
  - CVE-2017-18293: When GPIO is protected by blocking access
                        to corresponding GPIO resource registers,
                        protection can be bypassed by writing to the
                       
  - CVE-2020-15483: monitor device allows access to physical UART debug port without authentication