As an experimental computer systems researcher, he works on high-performance heterogeneous computer architectures and has contributed to compiler optimization, computer architecture, and performance modelling. Currently, his focus is on accelerator-based systems such as those containing graphics processing units (GPUs) that can be leveraged for massive data processing. Most recently, he has developed the IrGL compiler for irregular graph algorithms that generates highly optimized code for GPUs from high-level specifications and which has been demonstrated to outperform expert-written code. He earned his PhD at the Indian Institute of Science and his B.E. in Computer Engineering at the University of Mumbai. Prior to joining the Department of Computer Science at Rochester, he was a Postdoctoral Fellow at the University of Texas at Austin.