He is involved with the development and deployment of Mixed Signal and Low Power Design & Verification products and methodologies at Cadence. Neyaz has played a key role in the deployment of the Common Power Format (CPF) for Low Power and the Incisive Verification platform at Cadence and has also co-authored books on Advanced Verification using SystemC. Neyaz has over 20 yrs of experience in ASIC Design and Verification. Prior to working for Cadence, he has served in technical-lead roles for a number of companies including Texas Instruments and Bell Northern Research.