Ada Lovelace (microarchitecture)

Ada Lovelace, also referred to simply asLovelace,is agraphics processing unit(GPU) microarchitecture developed byNvidiaas the successor to theAmperearchitecture, officially announced on September 20, 2022. It is named after the 19th century English mathematicianAda Lovelace,one of the first computerprogrammers. Nvidia announced the architecture along with theGeForce RTX 40 seriesconsumer GPUsand the RTX 6000 Ada Generation workstation graphics card.The Lovelace architecture is fabricated onTSMC's custom4Nprocess which offers increased efficiency over the previousSamsung8 nmand TSMCN7processes used by Nvidia for its previous-generation Ampere architecture.
The Ada Lovelace architecture follows on from the Ampere architecture that was released in 2020. The Ada Lovelace architecture was announced by Nvidia CEOJensen Huangduring a GTC 2022 keynote on September 20, 2022 with the architecture powering Nvidia's GPUs for gaming, workstations and datacenters.
Architectural improvements of the Ada Lovelace architecture include the following:
128 CUDA cores are included in each SM.
Ada Lovelace features third-generation RT cores. The RTX 4090 features 128 RT cores compared to the 84 in the previous generation RTX 3090 Ti. These 128 RT cores can provide up to 191 TFLOPS of compute with 1.49 TFLOPS per RT core.A new stage in the ray tracing pipeline called Shader Execution Reordering (SER) is added in the Lovelace architecture which Nvidia claims provides a 2x performance improvement in ray tracing workloads.
Lovelace's new fourth-generation Tensor cores enable the AI technology used in DLSS 3's frame generation techniques. Much like Ampere, each SM contains 4 Tensor cores but Lovelace contains a greater number of Tensor cores overall given its increased number of SMs.
There is a significant increase in clock speeds with the Ada Lovelace architecture with the RTX 4090's base clock speed being higher than the boost clock speed of the RTX 3090 Ti.
The last enabled AD102 Lovelacediefeatures 96MB of L2 cache, a 16x increase from the 6MB in the Ampere-based GA102 die.The GPU having quick access to a high amount of L2 cache benefits complex operations like ray tracing compared to the GPU seeking data from the GDDR video memory which is slower. Relying less on accessing memory for storing important and frequently accessed data means that a narrower memory bus width can be used in tandem with a large L2 cache.
Each memory controller uses a 32-bit connection with up to 12 controllers present for a combined memory bus width of 384-bit. The Lovelace architecture can use eitherGDDR6orGDDR6Xmemory. GDDR6X memory features on the desktop GeForce RTX 40 series while the more energy-efficient GDDR6 memory is used on its corresponding mobile versions and on RTX A6000 workstation GPUs.
The Ada Lovelace architecture is able to use lower voltages compared to its predecessor.Nvidia claims a 2x performance increase for the RTX 4090 at the same 450W used by the previous generation flagship RTX 3090 Ti.
Increased power efficiency can be attributed in part to the smallerfabrication nodeused by the Lovelace architecture. The Ada Lovelace architecture is fabricated onTSMC's cutting-edge4Nprocess, a custom designed process node for Nvidia. The previous generation Ampere architecture usedSamsung's 8nm-based8Nprocess node from 2018, which was two years old by the time of Ampere's launch.The AD102 die with its 76.3 billion transistors has a transistor density of 125.5 million per mm, a 178% increase in density from GA102's 45.1 million per mm.
The Lovelace architecture utilizes the new 8th generation NvidiaNVENCvideo encoder and the 7th generation NVDEC video decoder introduced by Ampere returns.
NVENCAV1hardware encoding with support for up to 8K resolution at 60FPS in10-bit coloris added, enabling higher video fidelity at lower bit rates compared to theH.264andH.265codecs.Nvidia claims that its NVENC AV1 encoder featured in the Lovelace architecture is 40% more efficient than the H.264 encoder in the Ampere architecture.
The Lovelace architecture received criticism for not supporting theDisplayPort 2.0connection that supports higher display data bandwidth and instead uses the older DisplayPort 1.4a which is limited to a peak bandwidth of 32 Gbit/s.As a result, Lovelace GPUs would be limited by DisplayPort 1.4a's supported refresh rates despite the GPU's performance being able to reach higher frame rates.Intel'sArcGPUs that also released in October 2022 included DisplayPort 2.0.AMD's competingRDNA 3architecture released just two months after Lovelace includedDisplayPort 2.1.