Memory cell (computing)

The memory cell is the fundamental building block of computer memory. The memory cell is an electronic circuit that stores one bit of binary information and it must be set to store a logic 1 (high voltage level) and reset to store a logic 0 (low voltage level). Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.
Over the history of computing, different memory cell architectures have been used, including core memory and bubble memory. Today, the most common memory cell architecture is MOS memory, which consists of metal–oxide–semiconductor (MOS) memory cells. Modern random-access memory (RAM) uses MOS field-effect transistors (MOSFETs) as flip-flops, along with MOS capacitors for certain types of RAM.
The SRAM (static RAM) memory cell is a type of flip-flop circuit, typically implemented using MOSFETs. These require very low power to maintain the stored value when not being accessed. A second type, DRAM (dynamic RAM), is based on MOS capacitors. Charging and discharging a capacitor can store either a '1' or a '0' in the cell. However, since the charge in the capacitor slowly dissipates, it must be refreshed periodically. Due to this refresh process, DRAM consumes more power, but it can achieve higher storage densities.
Most non-volatile memory (NVM), on the other hand, is based on floating-gate memory cell architectures. Non-volatile memory technologies such as EPROM, EEPROM, and flash memory utilize floating-gate memory cells, which rely on floating-gate MOSFET transistors.
The memory cell is the fundamental building block of memory. It can be implemented using different technologies, such as bipolar, MOS, and other semiconductor devices. It can also be built from magnetic material such as ferrite cores or magnetic bubbles. Regardless of the implementation technology used, the purpose of the binary memory cell is always the same. It stores one bit of binary information that can be accessed by reading the cell and it must be set to store a 1 and reset to store a 0.
Logic circuits without memory cells are called combinational, meaning the output depends only on the present input. But memory is a key element of digital systems. In computers, it allows to store both programs and data and memory cells are also used for temporary storage of the output of combinational circuits to be used later by digital systems. Logic circuits that use memory cells are called sequential circuits, meaning the output depends not only on the present input, but also on the history of past inputs. This dependence on the history of past inputs makes these circuits stateful and it is the memory cells that store this state. These circuits require a timing generator or clock for their operation.
Computer memory used in most contemporary computer systems is built mainly out of DRAM cells; since the layout is much smaller than SRAM, it can be more densely packed yielding cheaper memory with greater capacity. Since the DRAM memory cell stores its value as the charge of a capacitor, and there are current leakage issues, its value must be constantly rewritten. This is one of the reasons that make DRAM cells slower than the larger SRAM (static RAM) cells, which has its value always available. That is the reason why SRAM memory is used for on-chip cache included in modern microprocessor chips.
On December 11, 1946 Freddie Williams applied for a patent on his cathode-ray tube (CRT) storing device (Williams tube) with 128 40-bit words. It was operational in 1947 and is considered the first practical implementation of random-access memory (RAM). In that year, the first patent applications for magnetic-core memory were filed by Frederick Viehe. Practical magnetic-core memory was developed by An Wang in 1948, and improved by Jay Forrester and Jan A. Rajchman in the early 1950s, before being commercialised with the Whirlwind computer in 1953. Ken Olsen also contributed to its development.
Semiconductor memory began in the early 1960s with bipolar memory cells, made of bipolar transistors. While it improved performance, it could not compete with the lower price of magnetic-core memory.
In 1957, Frosch and Derick were able to manufacture the first silicon dioxide field effect transistors at Bell Labs, the first transistors in which drain and source were adjacent at the surface. Subsequently, a team demonstrated a working MOSFET at Bell Labs 1960. The invention of the MOSFET enabled the practical use of metal–oxide–semiconductor (MOS) transistors as memory cell storage elements, a function previously served by magnetic cores.
The first modern memory cells were introduced in 1964, when John Schmidt designed the first 64-bit p-channel MOS (PMOS) static random-access memory (SRAM).
SRAM typically has six-transistor cells, whereas DRAM (dynamic random-access memory) typically has single-transistor cells. In 1965, Toshiba's Toscal BC-1411 electronic calculator used a form of capacitive bipolar DRAM, storing 180-bit data on discrete memory cells, consisting of germanium bipolar transistors and capacitors. MOS technology is the basis for modern DRAM. In 1966, Robert H. Dennard at the IBM Thomas J. Watson Research Center was working on MOS memory. While examining the characteristics of MOS technology, he found it was capable of building capacitors, and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, while the MOS transistor could control writing the charge to the capacitor. This led to his development of a single-transistor DRAM memory cell. In 1967, Dennard filed a patent for a single-transistor DRAM memory cell, based on MOS technology.
The first commercial bipolar 64-bit SRAM was released by Intel in 1969 with the 3101 Schottky TTL. One year later, it released the first DRAM integrated circuit chip, the Intel 1103, based on MOS technology. By 1972, it beat previous records in semiconductor memory sales. DRAM chips during the early 1970s had three-transistor cells, before single-transistor cells became standard since the mid-1970s.
CMOS memory was commercialized by RCA, which launched a 288-bit CMOS SRAM memory chip in 1968. CMOS memory was initially slower than NMOS memory, which was more widely used by computers in the 1970s. In 1978, Hitachi introduced the twin-well CMOS process, with its HM6147 (4 kb SRAM) memory chip, manufactured with a 3 μm process. The HM6147 chip was able to match the performance of the fastest NMOS memory chip at the time, while the HM6147 also consumed significantly less power. With comparable performance and much less power consumption, the twin-well CMOS process eventually overtook NMOS as the most common semiconductor manufacturing process for computer memory in the 1980s.
The two most common types of DRAM memory cells since the 1980s have been trench-capacitor cells and stacked-capacitor cells. Trench-capacitor cells are where holes (trenches) are made in a silicon substrate, whose side walls are used as a memory cell, whereas stacked-capacitor cells are the earliest form of three-dimensional memory (3D memory), where memory cells are stacked vertically in a three-dimensional cell structure. Both debuted in 1984, when Hitachi introduced trench-capacitor memory and Fujitsu introduced stacked-capacitor memory.
The floating-gate MOSFET (FGMOS) was invented by Dawon Kahng and Simon Sze at Bell Labs in 1967. They proposed the concept of floating-gate memory cells, using FGMOS transistors, which could be used to produce reprogrammable ROM (read-only memory). Floating-gate memory cells later became the basis for non-volatile memory (NVM) technologies including EPROM (erasable programmable ROM), EEPROM (electrically erasable programmable ROM) and flash memory.
Flash memory was invented by Fujio Masuoka at Toshiba in 1980. Masuoka and his colleagues presented the invention of NOR flash in 1984, and then NAND flash in 1987. Multi-level cell (MLC) flash memory was introduced by NEC, which demonstrated quad-level cells in a 64 Mb flash chip storing 2-bit per cell in 1996. 3D V-NAND, where flash memory cells are stacked vertically using 3D charge trap flash (CTP) technology, was first announced by Toshiba in 2007, and first commercially manufactured by Samsung Electronics in 2013.
The following schematics detail the three most used implementations for memory cells:
The flip-flop has many different implementations, its storage element is usually a latch consisting of a NAND gate loop or a NOR gate loop with additional gates used to implement clocking. Its value is always available for reading as an output. The value remains stored until it is changed through the set or reset process. Flip-flops are typically implemented using MOSFETs.
Floating-gate memory cells, based on floating-gate MOSFETs, are used for most non-volatile memory (NVM) technologies, including EPROM, EEPROM and flash memory. According to R. Bez and A. Pirovano: