Document: NUREG-0800
Document ID: 6209b3e7-917d-48d2-a299-4d1230aa5b51
Document Type: srp
Title: Revision 5 - March 2007
Source: NUREG-0800
Source URL: https://www.nrc.gov/docs/ML0705/ML070550070.pdf
Revision Date: 2023-06
Chapter: 7
Section ID: 7
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designs, tests, analyses, or other methods of demonstrating satisfaction of design commitments for applications made under 10 CFR 52, "Early Site Permits; Standard Design Certifications; and Combined Licenses for Nuclear Power Plants." 3. Acceptance Criteria If the following criteria are met, the Staff may conclude that the design or completed system will meet timing requirements, can be verified as correct and timely, or that a prototype system accurately reflects the performance and correctness expected of the actual plant. Some of the criteria described herein may be met by submissions describing a software development process or verification methods that include real-time concerns. Limiting Response Times Limiting response times should be shown to be consistent with safety requirements (e.g., suppress power oscillations, prevent fuel design limits from being exceeded, prevent a non-coolable core geometry). Setpoint analyses and limiting response times should also be shown to be consistent. The reviewer should verify that limiting response times are acceptable to the organizations responsible for reactor systems, electrical systems, and plant systems before accepting the limiting response times as a basis for timing requirements. Digital Computer Timing Requirements Digital computer timing should be shown to be consistent with the limiting response times and characteristics of the computer hardware, software, and data communications systems. Computer system timing requirements that should be addressed in a software requirements specifications are described in SRP BTP 7-14. BTP 7-21-7 Revision 5 - March 2007 Architecture The level of detail in the architectural description should be sufficient that the Staff can determine the number of message delays and computational delays interposed between the sensor and the actuator. An allocation of time delays to elements of the system and software architecture should be available. In initial design phases (e.g., at the