dataesr/scientific-paragraphs-categorization huggingface dataset:
This correction improves the radiometric accuracy of the images; however, it comes at the cost of losing temporal depth as suitable atmospheric correction data are usually not available for all TOA images. This is reflected in the 50% reduction in the number of shorelines mapped by CASSIE compared to CoastSat and SHOREX as indicated in Table  3. Further, ShorelineMonitor and HighTide-SDS do not use the individual images but generate yearly composites using, respectively, the 15th and 10th percentile of the stacked pixel values (these low percentiles are chosen to mitigate the effect of clouds, which are bright pixels). The multispectral index selected to differentiate land from water also varies, with each algorithm using a different combination of bands. ShorelineMonitor and CASSIE use the Normalized Difference Water Index (NDWI, normalized difference between NIR and Green), CoastSat uses the modified-NDWI (normalized difference between SWIR1 and Green), HighTide-SDS uses the Automated Water Extraction Index (AWEI), while SHOREX use both the AWEI and short-wave infrared band (SWIR1).
(iii) continue investigating the influence of tidal levels and wave runup on SDS accuracy and formulate generalized water level corrections based on available datasets at global scales. As new algorithms and enhancements to existing algorithms are developed, this benchmarking framework provides a transparent and reproducible methodology for accuracy evaluation and algorithm inter-comparison with sets of standardized inputs and validation datasets. The open-source platform also promotes collaboration over theoretical concepts, implementation software, and supporting datasets, ensuring that research is conducted effectively and efficiently. As many fields of science are confronted with a 'reproducibility crisis,'  62  in part related to the poor metadata and data publishing practices and the rapid pace of progress in machine learning and predictive modeling  63  , there is a critical need for more reproducible benchmarking frameworks that enable objective assessments using transparent methodologies on standardized input data.
Methods Benchmark sites. Four sandy, wave-dominated, open-ocean beaches, namely Duck, Narrabeen, Torrey Pines, and Truc Vert (described below), where long-term beach monitoring survey data are publicly available, were selected as benchmark datasets. The beach at Duck in North Carolina, USA, is a worldrenowned coastal monitoring center, home to the U. S. Army Corps of Engineers Field Research Facility (USACE-FRF), where cross-shore transects have been surveyed monthly using a Coastal Research Amphibious Buggy (CRAB) and a military amphibious vehicle (LARC) since 1981  75. The site is located on the east coast of the United States, on a barrier island separating the Atlantic Ocean from mainland North Carolina. The tide regime is microtidal (MSTR of 1. 4 m) with a characteristic beach face slope of tan β ¼ 0:1.
The typical beach state is intermediate  1. At this site, the relatively small shoreline variance signal is dominated by interannual variability  32. Narrabeen is a 3. 6 km long embayment situated on the Northern Beaches of Sydney along the south-east coast of Australia. The tide regime is microtidal (MSTR of 1. 7 m) with a characteristic beach face slope of tan β ¼ 0:1. Narrabeen exhibits typically intermediate beach states and varies from Reflective to Longshore Bar Trough based on the Wright and Short (1984)  1  classification. The 40+ year dataset (1976present) of monthly profile surveys along the five cross-shore transects indicated in Fig. 3  is described in detail in Turner et al. 4. The observed range of shoreline variability at Narrabeen over the 40+ year survey period varies from 80 m at transect PF1 to 55 m at transect PF6, and the observed dominant behavior in shoreline response is forced by individual and/or sequential storm events  76.
Torrey Pines Beach is an 8 km-long cliff-backed sandy beach located in San Diego, California, USA. The tide regime is microto mesotidal (MSTR 2. 3 m) with a characteristic beach-face slope of tan β ¼ 0:04. A 16-year topo-bathymetric dataset (sonarmounted jetski + quandbike GNSS surveys) was collected and curated by the Scripps Institute of Oceanography 7 monthly between 2001-2017. The wave climate is seasonally dominated with winter storms and calmer summers, while the shoreline position responds to the wave forcing with a 30-50 m seasonal cycle. Truc Vert beach is situated in the southwest of France along a 100 km-long stretch of exposed sandy coastline, where the much larger tide regime is classified as meso-to macrotidal (MSTR 3. 2 m). The characteristic beach face slope is gentle, tan β ¼ 0:05, and the beach typically exhibits a double-barred configuration: an intermediate (transverse bar and rip) inner bar and a crescentic outer bar  77.
The same input data were provided to each group participating in the benchmarking exercise. Input data for each site included: a region-of-interest polygon, a reference shoreline and set of cross-shore transects, an estimate of the beach-face slope and time-series of tide levels and wave parameters. The beach-face slope was calculated as the linear regression between MSL and MHWS and averaged across all the available surveys. Each group downloaded the imagery for the area in the region-of-interest, pre-processed the imagery (e. g. , pan-sharpening, compositing), and applied their shoreline detection algorithm to extract shoreline positions. The shoreline positions were then intersected with the cross-shore transect to obtain time-series of shoreline change. For the algorithms that produced instantaneous shorelines, mapped on individual images instead of composite images, the time-series were tidally corrected as described in Eq.
1 ('Evaluation Methodology'). Hereafter each shoreline-detection workflow, namely CoastSat, SHOREX, Shor-elineMonitor, CASSIE, and HighTide-SDS, is described. CoastSat  17  is an open-source Python toolbox that uses Landsat (5 to 9) and Sentinel-2 imagery to automatically map the position of the instantaneous waterline on each image. For each scene, the top-of-atmosphere (TOA) multispectral bands, namely Blue, Green, Red, Near-Infrared (NIR), and Short-wave infrared (SWIR1), are cropped to the region-of-interest and downloaded using Google Earth Engine's Application Programming Interface (GEE)  14. Then, the images are pre-processed locally: Landsat 5 bands (TM), which do not include a panchromatic band, are down-sampled from 30 to 15 m/pixel using bilinear-interpolation (GDAL warp function); Landsat 7 (ETM +) Green, Red, and NIR bands are pansharpened, while the Blue and SWIR1 bands are down-sampled to 15 m resolution; Landsat 8 and 9 (OLI) Blue, Green, Red bands are pansharpened, while the NIR and SWIR1 bands are down-sampled 15 m to resolution; Sentinel-2 MSI Blue, Green, Red, and NIR have a native resolution of 10 m while the SWIR1 is down-sampled from 20 to 10 m/pixel.
To map the position of the sand/water interface, an image classifier is first applied to the image to label the 'sand' and 'water' pixels. The Modified Normalized Water-Index (MNDWI) is then used to select the Otsu threshold 80 that maximizes the variance between classified 'sand' and 'water' pixels. The position of the waterline is then extracted using a sub-pixel resolution border segmentation method  26  , known as Marching Squares, to compute the isovalued contour on the MNDWI image for a level equal to the sand/water threshold. The source code is publicly available at https://github. com/kvos/CoastSat. SHOREX  33  is a Python application that enables the automatic extraction of the shoreline position from satellite images. It follows a five-phase workflow that includes image downloading, cloud filtering, sub-pixel georeferencing, image segmentation, and shoreline sub-pixel extraction.
SHOREX downloads the required bands (R, G, B, SWIR1, and AWEInsh 81 ) from the TOA Landsat (5 to 9) and Sentinel-2 collections from GEE  14. In this phase, the area of interest of each image is manually selected and cropped. During the second phase, the cloud filtering module allows the visualization of each image so a trained operator can efficiently approve or reject each image (spending about two seconds per image). This step is necessary to ensure that both the beach segment in which the shoreline will be extracted, and the area used for the sub-pixel geo-referencing process (unchanging urban areas) are cloud-free. The sub-pixel georeferencing step improves the accuracy of the image geolocation by applying a co-registration algorithm  82  to align the satellite image against a very high-resolution orthophoto.
Although compositing also averages out seasonal variability in wave effects, at sites with persistent swell conditions the presence of white-water due to wave breaking introduces a seaward offset in detected shorelines  18. However, as this offset is likely present in all composite images, the wave effects on longterm shoreline change rates at such sites are limited. In summary, the ShorelineMonitor algorithm efficiently uses free cloudcomputing resources, offering a globally applicable solution, and requires no in situ information. The source code is not publicly available. CASSIE  19  (acronym for Coastal Analyst System from Space Imagery Engine) is an open-source web tool for automatic shoreline mapping and analysis using multi-spectral satellite imagery (Landsat 5-9, and Sentinel 2). The web tool consists of a frontend user-friendly graphical interface that was built with ReactJS and JavaScript and communicates with the GEE backend.
After masking out water pixels, based on the land-water binary image, HighTide-SDS counts the number of land pixels along each transect (down-sampled to 1 m) to obtain the crossshore position of the shoreline. The source is publicly available at https://github. com/SatelliteShorelines/SDS_Benchmark/tree/ main/algorithms/UQMAO. Evaluation methodology. The time-series of shoreline change were submitted to the Github repository (https://github. com/ SatelliteShorelines/SDS_Benchmark) by each team of developers. The five algorithms at the four benchmark sites were evaluated against the in situ survey data, extracted programmatically from their respective data archives. The code for the full methodology is available in the form of Jupyter Notebooks (see 'Data and Code Availability'). At each site, the topographic surveys or DEMs were used to extract the location of the Mean Sea Level (MSL) contour, which was then intersected with the cross-shore transects to generate the groundtruth time-series of shoreline change.
The same methodology was applied to the in situ time-series and the trends were estimated along each transect for the common period between the SDS time-series and the surveys. The raw SDS time-series were tidally corrected for the algorithms that used individual images (CoastSat, SHOREX and CASSIE) using the following formula: Δx tide ¼ Δx þ z tide tan β ð1Þ where Δx tide is the tidally corrected cross-shore position, Δx is the instantaneous cross-shore position, z tide is the corresponding tide level, extracted from the closest grid point in the FES2014 global tide model  35  , and tan β is average beach-face slope derived from the topographic data (between Mean Sea Level and Mean High Water Spring). The wave setup correction term was added on top of the tidal correction: Δx setup ¼ Δx tide þ z setup tan β ð2Þ where Δx setup is the cross-shore position corrected for wave setup, Δx tide is the tidally corrected cross-shore position in Eq.
Acknowledgements K. V. is funded under a  USGS Research Cooperative  Agreement. K. D. S. receives funding from the  Australian Research Council  (FT21XX). B Castelle  is supported by the  Agence Nationale de la Recherche (ANR)  grant number  ANR-21-CE01-0015. CGAT-UPV  researchers are supported  MONOBESAT  ( PID2019-111435RB-I00 ) by the  Spanish Ministry of Science, Innovation and Universities ,  C. Cabezas-Rabadán  is supported by the  M. Salas  contract -Re-qualification program by the  Spanish Ministry of Universities (NextGenerationEU) , and  Primeros Proyectos de Investigación  ( PAID-06-22 ) by  Vicerrectorado de Investigación de la Universitat Politècnica de València (UPV). Contributions by  Deltares  ( Arjen Luijendijk ,  Etienne Kras , and  Floris Calkoen ) are funded by the  Deltares Strategic Research Programme 'Seas and Coastal Zones'  and the  H2020  project CoCliCo.
Data availability The data needed to reproduce this analysis is publicly available at https://github. com/ SatelliteShorelines/SDS_Benchmark and archived in a Zenodo repository at https://doi. org/10. 5281/zenodo. 8333435. This repository includes all the input data (regions of interest, transects, tide, and wave time-series) and the SDS time-series of shoreline change generated by each of the 5 algorithms at the 4 benchmark sites.
But unlike digital circuits, where the low-level phases of the design process are automated using fairly standard methodologies, synthesis and layout of analogue circuits are still carried out manually or through some sort of ad hoc automated solution. In this paper, we show a Python framework  [3]  for the generation of modular and reusable electronic designs through the use of powerful manipulation primitives. The purpose of this framework is twofold: (i) to provide tools to create electrical components whose characteristics can be expressed through dynamic models or defined by logical rules and (ii) to provide powerful manipulation primitives to quickly create complex arrangements of components in a simple fashion. This framework benefits from the utilities and flexibility of a programming language like Python to generate modular and re-usable components.
The designs created in Python can then be converted to any text format specified by the user (special focus on SPICE netlists). The framework is focused on the quick generation of complex designs. However, users could write extensions to automatically simulate the generated designs or perform other tools such as Electrical Rule Checker (ERC). This paper is organised as follows: the current state of the art is summarised in Section 2, followed by the motivation for this project in Section 3. In Section 4, the framework is described in detail and some use cases are provided in Section 4. 4. Future lines of work are discussed in Section 5, and, finally, our conclusions are extracted in Section 6.
State of the Art There are currently a plethora of tools available that tackle design space exploration. Chisel  [4]  and PyMTL3  [5]  provide frameworks with a high abstraction level that are able to compile a high level language code, like Scala and Python, into fully functional Verilog code for hardware description. In this way, circuit designers have the expressiveness and power of a programming language in order to quickly create reusable circuits. These tools target Register Transfer Level (RTL) and thus are not very well suited for analogue and mixed signal designs. PySpice  [6]  is an utility to generate SPICE netlists and launch simulations by embedding the design and the simulator configuration under the same language, which facilitates the whole design iteration process. However the simulator is limited to NGspice and Xyce and the netlists can only be exported for PCB designs.
Skidl  [7]  is a layer built on top of PySpice that attempts to to facilitate the process of connecting different components. SPICE netlists are the universal format that any available electronic simulator uses, albeit each simulator has it's slightly different format. Our framework seeks to provide designs for any available simulator by providing the necessary tools to export the designs to different. Alongside these tools, there are projects that provide automatic layout generation mechanism. One of the most famous known tools in this category is Magic  [8]. Magic (available online at http://opencircuitdesign. com/magic/) is an interactive software for creating and modifying very large scale integration (VLSI) circuit layouts. Its most important feature is the creation of a layout and plowing it to scale it for different technology nodes.
The ease of use of this utility comes with a penalty of 5 to 10% increase in area usage. Other tools found online like LibreCell  [9]  try to reduce this tradeoff by reducing the fan of possibilities that are provided to the user. Lower level tools such as GDSTK  [10]  and GDSFactory  [11]  enable the creation and manipulation of GDSII and OASIS files, which are the standard file format for foundries to specify circuit layouts. These tools can be used as the basis of a much more complete software that is able to generate the layout based on a circuit definition. Researchers have also put focus on intelligent methodologies for automatic layout generation for both PCB  [12] [13] [14]  and ASIC  [15]. Genetic algorithms have proven very useful and performant for this type of tasks. AIDA  [16]  is a tool that tackles analogue IC sizing and layout.
It provides powerful utilities to perform parametric analysis, where the underlying parameters and properties of a circuit can be generated and swapped in place before every simulation cycle. However, the user needs to generate the design beforehand, which does not solve the issue of design exploration. There are complete projects like OpenRAM  [17]  that provide a Python framework to create the layout, netlists, timing and power models, placement and routing models to use SRAMs in ASIC design. This tool provides an easy interface to configure the characteristics of the SRAM. This is a very powerful tool but is limited to SRAMs and a selected number of technology nodes (currently NCSU FreePDK 45 nm, MOSIS 0. 35 µm and Skywater 130 nm). There are other projects found in the literature like  [18, 19]  which showcase how certain designs can be optimised.
Motivation The proposed framework focuses on providing utilities that enables users to perform quick design space exploration and parametrization of electronic designs. A high-level abstract interface is provided in order to create modular and reusable components, that can be seamlessly parametrised in order to provide users a general overview of the design under different design constraints and environments. The advantage of using a programming language like Python as an abstraction layer to generate circuits is that we are not limited by a drag-and-drop graphical user interface and we can exploit the expressiveness of Python to quickly generate complex structures as well as having support for the plethora of available scientific libraries. Graphical Interfaces tend to change in time, while a programming language stays fixed.
Electrical Components and Parameters The parameters of an electronic component can be described easily with a Python dictionary. They can also be defined defined statically or dynamically calculated (i. e. , through Python functions or SymPy formulas, that may not be available or accessible in EDA tools). Dynamic parameters bring the possibility of embedding parametric analysis directly into the circuit definition. These parameters can be grouped into ParamSets that behave similar to process corners. The following example shown in Listing 1 shows a reduced number of parameters for a NMOSFET transistor, where the vth of the transistor is drawn from a Gaussian distribution. In order to automatically generate parameters from files that are commonly used, this framework provides a parser interface to extract information from different file formats and Process Design Kits (PDKs).
Another useful manipulation is the Array, which that allows instantiating components in a 1D or 2D array and their connections can be updated dynamically trough their coordinates, as it is shown in the Listing 6. This array generation utility can be of great use to create crossbar arrays, two-dimensional CMOS sensors and Micro Electro-Mechanical Systems (MEMS) matrix that contain a very large number of components. The previous code results in the following netlist. We can see that the array dimensions is parametrized and we can quickly create very large 1D or 2D arrays. M1 (WL_1 BL_1) MEM M2 (WL_1 BL_2) MEM M3 (WL_1 BL_3) MEM M4 (WL_1 BL_4) MEM M5 (WL_2 BL_1) MEM M6 (WL_2 BL_2) MEM M7 (WL_2 BL_3) MEM M8 (WL_2 BL_4) MEM M9 (WL_3 BL_1) MEM M10 (WL_3 BL_2) MEM M11 (WL_3 BL_3) MEM M12 (WL_3 BL_4) MEM Both 2D and 1D arrays are very easy to implement with this framework due to the expressiveness of Python.
The following examples shown in Listing 7 illustrate how easy it is to implement a chain and a matrix of components just by exploiting the list comprehensions or for loops. The matrix of size n × m is generated using only two lines. While this example is intentionally simple, it can be more complex for example by providing different parameters depending on the position of the component in the matrix or chain. These type of modular circuits can be easily created since they be mapped from a mathematical construct, like vectors, arrays or recursive formulas, directly into programming constructs like loops or lists, that can then be shortened through Python expressions, like lists comprehension. It is this direct mapping from mathematical to programming constructs that allow generating large number of parametric components very easily.
The Counter component has been created in Verilog-A. As it has been said before, the framework is not limited to basic HDL components. Any kind of component that is valid in SPICE can be created with this framework. As an example, the BSIM Common Multi-Gate Model (BSIM-CMG) http://bsim. berkeley. edu/ models/bsimcmg/ (accessed on 12 September 2023) which allows FinFET to be modelled, can be used directly by many SPICE simulators, even if the model is described in Verilog-A. The component, called bsimcmg_va, needs to be created in the Python code to instantiate FinFET transistors, as the Listing 10 shows. FinFet = Component("bsimcmg_va", ["d", "g", "s", "e", "t"]) Other type of circuits that could benefit from this framework are Analogue to Digital Converters (ADC) and Digital to Analogue Converters (DAC).
Discussion The framework described here is a powerful interface between Python and SPICE. It can be used as the basis to implement more complex methodologies such as prototyping, design optimisation and variability simulations. Other advantages of using Python to generate netlists is the speed improvement, as compared to generating the circuit by hand. The framework does not impose any time overhead as it can be seen from the next benchmark. The framework is able to create create 1 million instances in approximately 4 s and the SPICE netlist itself can be exported in less than 2 s as it can be seen from the results of a benchmark in Figure  2. These benchmarks were performed on a ASUS ZenBook (Intel ® Core™ i5-8250U processor 1. 6 GHz Quad-core, 8 GB RAM DDR3 sourced from ASUS, Madrid, Spain).
Conclusions The framework proposed in this article provides tools focused on fast design space exploration and modular and re-usable electronic designs. Electronic circuits are modelled through the use of Python objects that allow for easy manipulation and quick iteration cycles. The examples provided above show how the framework excels at generating modular architectures and can adapt to multiple technologies and devices. Moreover, the electrical components can be imported from a plethora of file formats and the designs can be exported to various SPICE formats suitable for any available simulator.