dataesr/scientific-paragraphs-categorization huggingface dataset:
L. and assumed that if a species was known to belong to a module, so would some of its congeners. These calculations were revised because some genera had large host ranges with species assigned to multiple modules. For example, the three species of Vanessa with host records in our dataset were assigned to three different modules. As there is an estimated total of 24 Vanessa species, we calculated that approximately 24/3 = 8 Vanessa species belonged in each of those modules. Calculations for all genera in all modules, and the resulting estimates of module totals and fractions sampled, are provided in Supplementary Table  26.
Biogeography To reconstruct the biogeographic history of butterflies, we aggregated global distribution data from multiple sources to create a butterfly checklist for each country. Data sources included: (1) the Lepidoptera and Other Life Forms Database (http://ftp. funet. fi/index/Tree_of_life/ insecta/lepidoptera); (2) WikiSpecies (https://species. wikimedia. org); and (3) the type locality of each species or subspecies in our list of valid butterfly names, which was obtained from 1, above. This initial global checklist was vetted using published country checklists and the ButterflyNet Trait Database  65. Trait data from ca. 100 comprehensive and country-specific field guides have been entered into this database, allowing us to generate species lists to cross-validate checklists assembled  66.
We designated 14 biogeographic regions across the globe (Supplementary Fig. 11  and Supplementary Table  27 ), determined which of these regions were occupied by each species in our tree and developed a 14-state character matrix. Six countries (Canada, China, Indonesia, Mexico, Russia, US) spanned two or three bioregions, which required manual evaluation of whether species in these countries were found in one or more of the adjoining bioregions. US and Canadian species were assigned to East and/or West Nearctic bioregions based on the palaeogeographic history of North America (that is, whether the species were east or west of the continental divide) with reference to locality records from Butterflies and Moths of North America (https:// www. butterfliesandmoths. org). Russian species were assigned to Eastern and/or Western Palaearctic bioregions based on locality records assembled by the Lepidoptera and Other Life Forms Database  67.
We estimated the ancestral area of origin and geographic range evolution for butterflies using two approaches: the ML approach of the DECX model  68  as implemented in the C++ version  69, 70  (https:// github. com/champost/DECX); and the program BioGeoBEARS v. 1. 1. 2 (ref. 71). DECX uses a time-calibrated tree, the modern distribution of each species for a set of geographic areas and a time-stratified geographic model that is represented by connectivity matrices for specified time intervals spanning the evolutionary history of clade of interest  72. We also ran BioGeoBEARS with seven and eight areas to estimate immigration and emigration rates (Supplementary Figs. 12  and 13  and Supplementary Table  27 ). BioGeoBEARS could not be run with 14 states owing to the complexity of our dataset (2,248 tree tips).
The seven and eight bioregions largely corresponded to the biogeographic realms defined by Udvardy  73. We implemented both the Dispersal Extinction Cladogenesis (DEC)  68, 74  and the Likelihood equivalent of the Dispersal-Vicariance approach (DIVALIKE)  75  models and different adjacency matrices (Supplementary Data 4). Both approaches gave largely consistent results, regardless of the model and parameters used (Supplementary Tables  6  and 30 ). We performed biogeographic stochastic mapping to examine in situ speciation, immigration and emigration between the seven bioregions in BioGeoBEARS. We followed Li et al. 76  and ran 1,000 simulations with the DEC model, and calculated relative mean dispersal rates between all permutations of bioregions (Fig. 3  and Supplementary Data 5). These mean dispersal rates represent dispersal of butterfly lineages throughout the entire evolutionary history of Papilionoidea and thus cannot reveal changes in rates over time.
Larval host plant analyses Larval host records were compiled from nine sources: (1) the Database of the World's Lepidopteran Hostplants (HOSTS)  21   9  and Supplementary Data 6). Whenever possible, we retained the following information for each host record, if available: (1) the taxon and taxonomic authority of butterfly to the lowest available taxonomic level (family, subfamily, tribe, genus, species or subspecies); (2) the taxon and taxonomic authority of host to the lowest available taxonomic level (family, genus, species, subspecies or variety); (3) plant part eaten; (4) record certainty (novel plant accepted in captivity, oviposition record with no observation of herbivory, etc. ); (5) geographic location of observation; and (6) relevant information on all non-plant hosts. The extensive data recorded in the host (food plant) database of D.
H. J. , W. H. , and colleagues were simplified to retain the fields of butterfly genus and specific epithet, as well as plant family, genus and specific epithet, together with an indication of whether the plant was introduced to Costa Rica. This database contains many records of informal, non-ICZN-compliant names of butterfly cryptic species. Rather than discarding the large number of records that would not be compatible with any other data source, we regarded these as the nominal species (for example, Battus polydamas instead of Battus polydamasDHJ01). The number of records for each butterfly species × plant species interaction was recorded. We examined relationships between individual butterfly species and host families that are consumed by their larvae. For these analyses, we chose the rank of plant family because it has been adopted as the standard taxonomic rank for examining host use evolution  6, 85.
For each plant-feeding butterfly species in our tree, we quantified host plant richness and phylogenetic distance using six different metrics implemented in the R package picante v. 1. 8. 2 (ref. 86). To calculate these metrics, we used the calibrated tree of seed plants from Smith and Brown  17. As the number of host groups in our dataset was too large for an ancestral state reconstruction (approximately 200 of the 300 known host plant families 21 plus host insects), we first reduced the number of host groups by using a network analysis. The Beckett algorithm  87  , as implemented in the function 'computeModules' from the package bipartite 88 in R v. 3. 6. 2 (ref. 89), assigns plants and butterflies to modules and computes the modularity index, Q. By maximizing Q, the algorithm finds groups of butterflies and hosts that interact more with each other than with other taxa in the network.
Thus, hosts that are assigned to the same module tend to be used by the same butterflies. We found 13 modules for butterfly host associations in our module analysis (Supplementary Tables  32  and 33 ). We then conducted three larval host ancestral state reconstruction analyses using stochastic character mapping with SIMMAP in phytools v. 0. 7-70 (refs. 90,91) using the 'make. simmap' command. We reconstructed the ancestral state of (A) generalist versus specialist feeding (two states, Supplementary Data 7); (B) plant, lichen, Hemiptera or Hymenoptera as a food source (four states, Supplementary.
, which summarizes data from ~270 other sources; (2) the Lepidoptera and Other Life Forms Database (http://ftp. funet. fi/index/Tree_of_life/insecta/lepidoptera/); (3) 40 years of food plant rearing records from Costa Rica by D. H. J. , W. H. , and colleagues (http://janzen. sas. upenn. edu/); (4) the ButterflyNet Trait Database 65 , which includes host plant records from 109 butterfly field guides and other resources; (5) a comprehensive database for host records for all butterflies in Japan 77 ; (6) a set of papers documenting the hosts of butterflies in India 78-84 ; (7) a database of hosts and ant symbionts of larval Lycaenidae and Riodinidae compiled from 85 literature sources by N. E. P. and members of her laboratory; (8) a database of butterfly host records from Ecuador based on field observations and literature records compiled by K.
Acknowledgements We thank  M. Kuhn  and  E. Mavrodiev  for assembling trait data. S. Epstein ,  T. Girard-Ang ,  P. Pezzi  and  L. Xiao  assisted with laboratory work. J. Barber ,  M. Brownlee ,  N. Chazot ,  S. Cinel ,  J. Daniels ,  R. Godfrey ,  A. Gomez ,  H. Gough ,  C. Hamilton ,  G. Hill ,  P. Houlihan ,  C. Huang ,.
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Comparisons with a pure software solution demonstrate that our hardware-based IP implementation yields up to 9× lower latency and 7× higher throughput (frames/second) while maintaining energy efficiency. Our system has a power footprint as low as 2. 741 W for the whole system, which is up to 5. 5-6× less than what Nvidia Jetson TX2 consumes on average. Our proposed solution offers a promising approach for implementing energy-efficient visual localisation models on FPGA platforms.
A design to port the LPMP model to the hardware using FPGAs. 2. N-LOC, a hardware implementation of the LPMP bio-inspired model for navigation, including a set of benchmarks to compare the performance of N-LOC with the reference software implementation of LPMP. • In particular and compared to our previous published work, we perform a comparison with the original (optimised) implementation running on a lowpower, high-end embedded platform (Nvidia's Jetson TX2). 3. A design for a distributed hardware implementation in order to deal with larger neural networks. The remainder of this paper is as follows: Section 2 discusses the bio-inspired algorithms that exist in the state of the art and the one we chose for our hardware implementation. In Section 3, we outline the computational supports needed for our hardware implementation.
Visual Place Recognition Visual Place Recognition (VPR) is a field of research that addresses the issue of locating a place from visual information. The general idea is to determine the position at which an image was taken by comparing it with a geo-referenced database of images. The proposed methods have been used in many fields such as robotics  [18, 19] , big data  [20]  and machine vision  [21, 22]. Each case has very specific constraints, notably in terms of computational time, accuracy and computational cost, which do not necessarily lend themselves to every use case  [23, 24]. From an architectural point of view, VPR models often follow the following workflow: first, an image is analysed to find its characteristic information; second, the detected information is transformed into a compact and meaningful location code; finally, the code is sent to a memory which has to store the location code (for the learning phase) or send information back (for the using phase), if the image belongs to an already known location  [19, 23].
Thus, it becomes possible to create a complete representation of an environment by memorising images at regular intervals. In general, the performance of a VPR system is evaluated according to three criteria: first, the accuracy of the model, i. e. , the average distance between the coordinates of an image to localise and the coordinates of the image that the model best recognises; second, the computation frequency of the model as a function of the number of images learned; and third the use of computing resources. Currently, the best performing state-of-the-art models are deep models such as NetVlad, HybridNet or RegionVlad  [25]. However, these models are very expensive in terms of computational resources (these models use a very large number of neurons to encode an image and often require the use of a graphics card) with higher complexity than traditional, non-Machine Learning approaches.
Development frameworks like Caffe  [27]  and Tensorflow  [28]  also offer easy-to-use interfaces which makes GPU the first choice for neural network acceleration. Alongside CPUs and GPUs, FPGAs are becoming a platform candidate to achieve energy efficient neural network processing. FPGAs can implement high parallelism and make use of the properties of neural network computation to remove additional logic. Algorithm studies also show that a Neural Network (NN) model can be simplified in a hardwarefriendly fashion without hurting the model accuracy  [29]. Therefore, FPGAs offer the potential to achieve higher energy efficiency compared to CPUs and GPUs. However, FPGAs are also infamous for being hard to design and program energy-efficient and highly performant neural networks, especially from a software developer's perspective, compared to a CPU and/or GPU centric approach.
Hardware Implementation on a Multi-FPGA Platform Wizarde is a unique, custom-designed multi-FPGA board, set up as a 3 × 3 mesh of system-on-chip (SoC) tiles. Each tile features a Zynq xc7z045ffg900-2 SoC (based on the Zynq-7045 chip, as with the zc706 board), which embeds a dual-core Cortex A9 processor and a Kintex-7 FPGA (Table  2  describes a single tile)  [37]. Wizarde enables us to envision various scenarios, e. g. , a multi-camera processing phase, where each tile is tied to a single camera and computes its own image processing phase to feed a shared bio-inspired neural architecture. An important feature of Wizarde is the gigabit transceiver interface set between two neighbouring tiles. This will allow hardware tasks, i. e. , their bitstream representation, to be mapped to different modules of the target FPGA(s) depending on the run-time context.
For example, due to specific resource contention, a given reconfigurable region may not be available to a task which used to run on it. As a result, such a task may be run on a different available slot somewhere else in Wizarde. Wizarde offers the following advantages from a research viewpoint: • Unique, custom platform; • Intent: help prototype complex applications, possibly requiring multiple SoCs/FPGAs; • 3 × 3 2D tile mesh. In addition, each tile is independent (equipped with USB, Ethernet, micro-SD, DRAM, etc. ), but all tiles are connected to their neighbours through gigabit transceivers, as shown in Figure  3. 2 ). The system is meant to retrieve landmark data resulting from the image processing carried out via the VITA-2000 camera module  [38]. The organisation of the architecture is depicted in Figure  4.
It is composed of pipelined blocks of custom IPs, which take their input from a camera through a streaming interface. The image processing IP can be configured in software by the CPU part via a memory-mapped interface, i. e. , a Xilinx AXI bus, which bridges the Processing System (PS) and the Programmable Logic (PL) of the SoC. The results can then be processed in software as follows: • A differences of Gaussian (DoG) or processed intermediate image, selectable thanks to a dedicated register.
The total power consumption (i. e. , the total on-chip power of the design), measured via Vivado, yields 2. 981 W. Table  3  shows the resource usage on the Wizarde platform. The software memory footprint is rather low: each neuron carries an 8-bit value. If we consider 4000 neurons in total and include the Python interpreter code size to run the program, the resulting memory footprint remains below 1MiB. Running such a program on a high-end microprocessor (e. g. , Intel Core i5, i7,. or AMD Ryzen family) will easily have both the code and data fit in its L2 or L3 cache. Such a low memory footprint makes it rather inadequate to run on a GPU, as the PCIe bus latency would likely kill most of the performance gained.
Experimental Setup and Implementation Parameters The target hardware platform is based on the Zynq-7045 system-on-chip, which features a dual-core ARM Cortex A9 processor, coupled with a Kintex-7 FPGA (see Table  2  for additional details). The Processing System (PS, featuring the dual-core Cortex A9) runs a bare-metal executable which streams pixels to the programmable logic (PL). N-LOC was designed using Vivado HLS, i. e. , using the OpenCL language with FPGA-specific pragmas to specify bus sizes, etc. The PL implements our N-LOC IP, which was synthesised and implemented on the FPGA part of the Zynq SoC. Hence the performance results shown below are obtained using an actual implementation of our design (not a simulation). Moreover, we used Vivado 2016. 4 to synthesize the IP on our FPGA.
The Wizarde board was validated with this toolchain and we have not yet qualified and validated Wizarde with a more recent Vivado version (in our future work, we will generate a device tree for a Linux distribution which is compatible with a more recent version of Vivado). Resource-wise, we compared the synthesis reports of Vivado 2016. 4 and 2019. 3. The difference is below 4%. While the synthesis process of a more recent version of Vivado may yield better resource usage in general, we believe the nature of our IPs would see only marginal gains compared to Vivado 2016. 4 in our specific case. Moreover, the number of DSPs would remain the same, even in parts of the IP which can take advantage of them (e. g. , the WTA part). Ideally, we would like to plug the image-processing IP (which performs the pyramidal decomposition of the acquired images) directly to N-LOC.
However, in order to correctly isolate the N-LOC part of the processing chain, we opted to use a small bare-metal executable which will stream images taken from the Oxford dataset  [39]. This will also prove useful when we evaluate the distributed N-LOC architecture, as it also requires a minimal runtime system to orchestrate data synchronisation between multiple N-LOC instances (see  Section 6). Hence, a set of parameters is given to obtain around 90% accuracy when comparing the value of computed place cells after the second WTA and the value in pre-learned images. As explained in Section 5. 3, accuracy does not change significantly when increasing the fixed-point number format to a higher number of bits. The initial training/learning phase uses as many images as there are place cell neurons.
• We used 100 images to "feed" N-LOC. We compare our bio-inspired neural IP with Colomer's Python-based application  [23]  to build the place cells vector. As will be detailed in Section 5. 5. 2, we considered two versions of the software implementation: the baseline and its optimised version. Both make use of Cython, numpy and OpenCV to speed up computations. However, the optimised version of the software implementation is also parallelised and makes better use of Cython to help guide it toward more efficient code generation. As detailed in Section 2, image pre-processing is performed either using OpenCV in the Python script or in the image processing IP. A previous version of this model was validated on large datasets, as shown by  Espada et al. [40]. Iterations over LPMP led to an optimised code, which was tested in a mobile robot in a real-life environment (closed tracks) to evaluate the performance of a software LPMP implementation.
As Colomer et al. show  [23, 24] , the algorithm is accurate and correctly identifies landmarks. However, this implementation does not go fast enough to scale at higher speeds. In addition, only the learning and using phases leading to building the place cell vectors are evaluated; i. e. , we do not time the video pre-processing which does the gray-scaling and applies difference of Gaussians and Log-Polar conversion performed by the previous component in the pipeline. As we described above, the reference code is written in Cython, with uses of NumPy and OpenCV where appropriate. Our application directly embeds all (grayscaled) images to exploit and as a result we subtracted the time taken by the Python application to perform all the processing prior to the actual learning/using phases, i. e.
, I/O operations to read image files, putting colour images to gray scale, dividing images into landmarks, etc. These operations represent roughly 20% of the total execution time in the baseline and optimised software implementations. We used different learning configurations: the system had to learn using 30, 60 and 90 gray-scale images taken from the Oxford dataset  [39]  to train the system (learning mode), then used 100 images in total in the using mode. Each image has a resolution of 640 × 400 pixels. Python results were obtained with Nvidia Jetson TX2 and followed the same principles for the learning/using ratio. Colomer et al. already showed how the LPMP model behaves with large datasets  [23]. In particular, real-life environment data obtained on close tracks using a mobile robot running the software version of LPMP were gathered and validated the LPMP model's accuracy and precision  [41].
See Table  5  for more details about the performance comparison. Table  5. N-LOC: Performance and efficiency. The system is configured with different numbers of place cell neurons, corresponding to the number of neurons to be learned. The system is then evaluated and tested with 100 images for different place cell configurations. Results are generated using Nvidia Jetson TX2 platform for software reference (using all 6 CPU cores when possible for the optimised version) and an FPGA ZC706 board for N-LOC Hardware implementation. The used frequency in FPGA in both 30 and 60 PC neurons is 100 MHZ. For 90 neurons, the frequency is set it 70 MHZ to satisfy timing constraints. A traditional Python implementation is around 10 times slower than sequential implementation with close-to-the-metal languages such as C.