page_title: Toshiba TLCS
section_title: TLCS-90 family
hierarchical_section_title: Toshiba TLCS / TLCS-90 family
caption_attribution_description: Ceramic DIL Package, 40 Pins + 28pin Socket, Toshiba TLCS90-TMP90G840E, 1988
context_page_description: TLCS is a prefix applied to microcontrollers made by Toshiba. The product line includes multiple families of CISC and RISC architectures. Individual components generally have a part number beginning with "TMP". E.g. the TMP8048AP is a member of the TLCS_48 family.
context_section_description: The microcontrollers in the TLCS-90 family use a 8-bit/16-bit architecture reminiscent of the Z80. These are no longer advertised on the Toshiba web site.
  Z80 features present in the TLCS-90 include:
  seven 8-bit registers (A, B, C, D, E, H and L),
  six 16-bit registers (BC, DE, HL, IX, IY, and SP), three of which are 8-bit register pairs,
  the combined parity/overflow flag,
  the unusual EX BC,HL, EX AF,AF' and EXX instructions, and
  the LDIR and LDDR memory copy instructions.
  There are, however, significant differences.  It omits the separate I/O address space of the Z80, but adds operations (notably multiply and divide) and several additional addressing modes:
  stack pointer relative (SP+d),
  one-byte "zero page" addressing of memory from FF00–FFFF₁₆, and
  indexed (HL+A).
  Also, the IX and IY registers are 20 bits wide, allowing the processor to address up to one megabyte of memory.
  Instructions are divided into one-byte basic and two-byte extended instructions.  Opcodes E0₁₆ through FE₁₆ are prefixes which begin an extended instruction.  The instruction encoding is unusual in that the prefix specifies one operand of the extended instruction, and unlike the single-byte prefixes used by the Z80 or x86 architecture, may itself be followed by operand bytes.  After the prefix bytes, the second opcode byte specifies the operation and second operand.
  For example, the instruction ADD (IX+127),5 is encoded as F4 7F 68 05, where the first two bytes specify the destination address, the third byte specifies the operation, and the fourth byte provides the source operand.
caption: Development version of a TLCS-90 family microcontroller with EPROM socket
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