dakies/OSS_Verilog huggingface dataset:
module mul8x4u_2AE (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_12,sig_13,sig_19,sig_27,sig_60,sig_61,sig_67,sig_68,sig_69,sig_97,sig_98,sig_99,sig_100,sig_101,sig_102,sig_103,sig_104,sig_105,sig_106,sig_111;
wire sig_112,sig_113,sig_114,sig_132,sig_133,sig_137,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151;

assign sig_12 = A[6] & B[1];
assign sig_13 = A[3] & B[3];
assign sig_19 = A[7] & B[0];
assign sig_27 = A[7] & B[1];
assign sig_60 = sig_12 & A[7];
assign sig_61 = sig_12 ^ sig_27;
assign sig_67 = A[5] & B[2];
assign sig_68 = A[6] & B[2];
assign sig_69 = A[7] & B[2];
assign sig_97 = sig_61 ^ sig_68;
assign sig_98 = sig_61 & sig_68;
assign sig_99 = sig_97 & sig_67;
assign sig_100 = sig_97 ^ sig_67;
assign sig_101 = sig_98 | sig_99;
assign sig_102 = sig_60 ^ sig_69;
assign sig_103 = sig_60 & B[2];
assign sig_104 = A[7] & sig_101;
assign sig_105 = sig_102 ^ sig_101;
assign sig_106 = sig_103 | sig_104;
assign sig_111 = A[4] & B[3];
assign sig_112 = A[5] & B[3];
assign sig_113 = A[6] & B[3];
assign sig_114 = A[7] & B[3];
assign sig_132 = sig_19 | sig_111;
assign sig_133 = sig_19 & sig_111;
assign sig_137 = sig_100 ^ sig_112;
assign sig_138 = sig_100 & sig_112;
assign sig_139 = sig_137 & sig_133;
assign sig_140 = sig_137 ^ sig_133;
assign sig_141 = sig_138 | sig_139;
assign sig_142 = sig_105 ^ sig_113;
assign sig_143 = sig_105 & sig_113;
assign sig_144 = sig_142 & sig_141;
assign sig_145 = sig_142 ^ sig_141;
assign sig_146 = sig_143 | sig_144;
assign sig_147 = sig_106 ^ sig_114;
assign sig_148 = sig_106 & B[3];
assign sig_149 = sig_114 & sig_146;
assign sig_150 = sig_147 ^ sig_146;
assign sig_151 = sig_148 | sig_149;

assign O[11] = sig_151;
assign O[10] = sig_150;
assign O[9] = sig_145;
assign O[8] = sig_140;
assign O[7] = sig_132;
assign O[6] = sig_13;
assign O[5] = sig_132;
assign O[4] = sig_111;
assign O[3] = sig_13;
assign O[2] = sig_150;
assign O[1] = sig_13;
assign O[0] = 1'b0;

endmodule
module mul8x4u_4Z7 (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_27,sig_68,sig_69,sig_97,sig_104,sig_112,sig_113,sig_114,sig_141,sig_142,sig_144,sig_145,sig_147,sig_148,sig_149,sig_150,sig_151;

assign sig_27 = A[7] & B[1];
assign sig_68 = A[6] & B[2];
assign sig_69 = A[7] & B[2];
assign sig_97 = sig_27 ^ sig_68;
assign sig_104 = sig_27 & sig_68;
assign sig_112 = A[5] & B[3];
assign sig_113 = A[6] & B[3];
assign sig_114 = A[7] & B[3];
assign sig_141 = sig_113 | sig_112;
assign sig_142 = sig_69 | sig_113;
assign sig_144 = sig_142 & sig_141;
assign sig_145 = sig_142 ^ sig_141;
assign sig_147 = sig_104 ^ sig_114;
assign sig_148 = sig_104 & sig_114;
assign sig_149 = A[7] & sig_144;
assign sig_150 = sig_147 ^ sig_144;
assign sig_151 = sig_148 | sig_149;

assign O[11] = sig_151;
assign O[10] = sig_150;
assign O[9] = sig_145;
assign O[8] = sig_97;
assign O[7] = sig_69;
assign O[6] = sig_97;
assign O[5] = sig_69;
assign O[4] = sig_112;
assign O[3] = sig_151;
assign O[2] = sig_27;
assign O[1] = sig_104;
assign O[0] = 1'b0;

endmodule
module mul8x4u_366 (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_15,sig_25,sig_26,sig_27,sig_52,sig_57,sig_58,sig_59,sig_60,sig_61,sig_66,sig_67,sig_68,sig_69,sig_87,sig_88,sig_92,sig_93,sig_94,sig_96;
wire sig_97,sig_98,sig_99,sig_100,sig_101,sig_102,sig_103,sig_104,sig_105,sig_106,sig_110,sig_111,sig_112,sig_113,sig_114,sig_132,sig_133,sig_134,sig_135,sig_136;
wire sig_137,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151;

assign sig_15 = B[0] & A[3];
assign sig_25 = A[5] & B[1];
assign sig_26 = A[6] & B[1];
assign sig_27 = A[7] & B[1];
assign sig_52 = B[3] & sig_15;
assign sig_57 = sig_26 & sig_52;
assign sig_58 = sig_26 | sig_52;
assign sig_59 = B[0] & sig_57;
assign sig_60 = sig_59 & A[7];
assign sig_61 = sig_59 ^ sig_27;
assign sig_66 = A[4] & B[2];
assign sig_67 = A[5] & B[2];
assign sig_68 = A[6] & B[2];
assign sig_69 = A[7] & B[2];
assign sig_87 = sig_25 | sig_66;
assign sig_88 = sig_25 & sig_66;
assign sig_92 = sig_58 | sig_67;
assign sig_93 = sig_58 & sig_67;
assign sig_94 = sig_87 & sig_88;
assign sig_96 = sig_93 | sig_94;
assign sig_97 = sig_61 ^ sig_68;
assign sig_98 = sig_61 & sig_68;
assign sig_99 = sig_97 & sig_96;
assign sig_100 = sig_97 ^ sig_96;
assign sig_101 = sig_98 | sig_99;
assign sig_102 = sig_60 ^ sig_69;
assign sig_103 = sig_60 & B[2];
assign sig_104 = A[7] & sig_101;
assign sig_105 = sig_102 ^ sig_101;
assign sig_106 = sig_103 | sig_104;
assign sig_110 = B[0] & A[7];
assign sig_111 = A[4] & B[3];
assign sig_112 = A[5] & B[3];
assign sig_113 = A[6] & B[3];
assign sig_114 = A[7] & B[3];
assign sig_132 = sig_92 ^ sig_111;
assign sig_133 = sig_92 & sig_111;
assign sig_134 = sig_132 & sig_110;
assign sig_135 = sig_132 ^ sig_110;
assign sig_136 = sig_133 | sig_134;
assign sig_137 = sig_100 ^ sig_112;
assign sig_138 = sig_100 & sig_112;
assign sig_139 = sig_137 & sig_136;
assign sig_140 = sig_137 ^ sig_136;
assign sig_141 = sig_138 | sig_139;
assign sig_142 = sig_105 ^ sig_113;
assign sig_143 = sig_105 & sig_113;
assign sig_144 = sig_142 & sig_141;
assign sig_145 = sig_142 ^ sig_141;
assign sig_146 = sig_143 | sig_144;
assign sig_147 = sig_106 ^ sig_114;
assign sig_148 = sig_106 & B[3];
assign sig_149 = sig_114 & sig_146;
assign sig_150 = sig_147 ^ sig_146;
assign sig_151 = sig_148 | sig_149;

assign O[11] = sig_151;
assign O[10] = sig_150;
assign O[9] = sig_145;
assign O[8] = sig_140;
assign O[7] = sig_135;
assign O[6] = sig_87;
assign O[5] = sig_87;
assign O[4] = sig_92;
assign O[3] = sig_140;
assign O[2] = sig_61;
assign O[1] = sig_88;
assign O[0] = sig_60;

endmodule
module mul8x4u_1XB (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_19,sig_25,sig_26,sig_40,sig_54,sig_55,sig_56,sig_61,sig_66,sig_67,sig_68,sig_69,sig_75,sig_92,sig_93,sig_94,sig_95,sig_96,sig_97,sig_98;
wire sig_99,sig_100,sig_101,sig_102,sig_104,sig_105,sig_106,sig_110,sig_111,sig_112,sig_113,sig_114,sig_132,sig_133,sig_134,sig_135,sig_136,sig_137,sig_138,sig_139;
wire sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151;

assign sig_19 = A[7] & B[0];
assign sig_25 = A[5] & B[0];
assign sig_26 = A[6] & B[1];
assign sig_40 = B[1] & A[7];
assign sig_54 = sig_26 | sig_19;
assign sig_55 = sig_19 & A[6];
assign sig_56 = sig_55 & B[1];
assign sig_61 = sig_56 ^ sig_40;
assign sig_66 = A[4] & B[2];
assign sig_67 = A[5] & B[2];
assign sig_68 = A[6] & B[2];
assign sig_69 = A[7] & B[2];
assign sig_75 = B[2] & sig_56;
assign sig_92 = sig_54 ^ sig_67;
assign sig_93 = sig_54 & sig_67;
assign sig_94 = sig_92 & sig_66;
assign sig_95 = sig_92 ^ sig_66;
assign sig_96 = sig_93 | sig_94;
assign sig_97 = sig_61 ^ sig_68;
assign sig_98 = sig_61 & sig_68;
assign sig_99 = sig_97 & sig_96;
assign sig_100 = sig_97 ^ sig_96;
assign sig_101 = sig_98 | sig_99;
assign sig_102 = sig_56 ^ sig_69;
assign sig_104 = A[7] & sig_101;
assign sig_105 = sig_102 ^ sig_101;
assign sig_106 = sig_75 | sig_104;
assign sig_110 = A[3] & B[3];
assign sig_111 = A[4] & B[3];
assign sig_112 = A[5] & B[3];
assign sig_113 = A[6] & B[3];
assign sig_114 = A[7] & B[3];
assign sig_132 = sig_95 ^ sig_111;
assign sig_133 = sig_95 & sig_111;
assign sig_134 = sig_132 & sig_110;
assign sig_135 = sig_132 ^ sig_110;
assign sig_136 = sig_133 | sig_134;
assign sig_137 = sig_100 ^ sig_112;
assign sig_138 = sig_100 & sig_112;
assign sig_139 = sig_137 & sig_136;
assign sig_140 = sig_137 ^ sig_136;
assign sig_141 = sig_138 | sig_139;
assign sig_142 = sig_105 ^ sig_113;
assign sig_143 = sig_105 & sig_113;
assign sig_144 = sig_142 & sig_141;
assign sig_145 = sig_142 ^ sig_141;
assign sig_146 = sig_143 | sig_144;
assign sig_147 = sig_106 ^ sig_114;
assign sig_148 = sig_106 & B[3];
assign sig_149 = A[7] & sig_146;
assign sig_150 = sig_147 ^ sig_146;
assign sig_151 = sig_148 | sig_149;

assign O[11] = sig_151;
assign O[10] = sig_150;
assign O[9] = sig_145;
assign O[8] = sig_140;
assign O[7] = sig_135;
assign O[6] = sig_25;
assign O[5] = sig_26;
assign O[4] = sig_25;
assign O[3] = sig_112;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = sig_26;

endmodule
module mul8x4u_2FE (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_96,sig_138,sig_150;

assign sig_96 = A[5] & B[1];
assign sig_138 = A[7] & B[3];
assign sig_150 = A[6] & B[2];

assign O[11] = sig_138;
assign O[10] = sig_150;
assign O[9] = 1'b0;
assign O[8] = sig_96;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = sig_138;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8x4u_1YD (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_27,sig_35,sig_40,sig_42,sig_43,sig_74,sig_76,sig_80,sig_97,sig_107,sig_110,sig_113,sig_124,sig_125,sig_127,sig_128,sig_129,sig_130,sig_139,sig_140;
wire sig_143,sig_144,sig_153,sig_154,sig_195,sig_196;

assign sig_27 = A[7] & B[1];
assign sig_35 = A[7] & B[2];
assign sig_40 = A[4] & B[1];
assign sig_42 = A[6] & B[3];
assign sig_43 = A[7] & B[3];
assign sig_74 = ~A[7];
assign sig_76 = sig_35 & A[6];
assign sig_80 = sig_27 & B[1];
assign sig_97 = B[2] & A[6];
assign sig_107 = B[3] & A[5];
assign sig_110 = sig_35 ^ sig_76;
assign sig_113 = sig_110 | sig_42;
assign sig_124 = sig_74 & sig_97;
assign sig_125 = sig_80 | sig_40;
assign sig_127 = sig_113 ^ sig_107;
assign sig_128 = sig_113 & sig_107;
assign sig_129 = sig_43 ^ sig_76;
assign sig_130 = B[3] & sig_76;
assign sig_139 = sig_125 | sig_124;
assign sig_140 = sig_125 & sig_124;
assign sig_143 = sig_129 ^ sig_128;
assign sig_144 = A[7] & sig_128;
assign sig_153 = B[3] & sig_140;
assign sig_154 = sig_127 ^ sig_140;
assign sig_195 = sig_143 | sig_153;
assign sig_196 = sig_130 | sig_144;

assign O[11] = sig_196;
assign O[10] = sig_195;
assign O[9] = sig_154;
assign O[8] = sig_139;
assign O[7] = sig_27;
assign O[6] = sig_127;
assign O[5] = sig_139;
assign O[4] = sig_195;
assign O[3] = sig_43;
assign O[2] = sig_127;
assign O[1] = sig_40;
assign O[0] = sig_42;

endmodule
module mul8x4u_1RU (
    A,
    B,
    O
);

input [7:0] A;
input [3:0] B;
output [11:0] O;

wire sig_26,sig_28,sig_56,sig_57,sig_60,sig_61,sig_66,sig_67,sig_68,sig_69,sig_97,sig_98,sig_99,sig_100,sig_101,sig_102,sig_103,sig_104,sig_105,sig_106;
wire sig_112,sig_114,sig_137,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151;

assign sig_26 = A[6] & B[3];
assign sig_28 = B[1] & A[7];
assign sig_56 = B[0] & A[7];
assign sig_57 = B[1] & A[6];
assign sig_60 = sig_56 & B[1];
assign sig_61 = sig_56 ^ sig_28;
assign sig_66 = A[4] & B[3];
assign sig_67 = A[5] & B[2];
assign sig_68 = A[6] & B[2];
assign sig_69 = A[7] & B[2];
assign sig_97 = sig_61 ^ sig_68;
assign sig_98 = sig_61 & sig_68;
assign sig_99 = sig_97 & sig_67;
assign sig_100 = sig_97 ^ sig_67;
assign sig_101 = sig_98 | sig_99;
assign sig_102 = sig_60 ^ sig_69;
assign sig_103 = sig_60 & sig_69;
assign sig_104 = A[7] & sig_101;
assign sig_105 = sig_102 ^ sig_101;
assign sig_106 = sig_103 | sig_104;
assign sig_112 = A[5] & B[3];
assign sig_114 = A[7] & B[3];
assign sig_137 = sig_100 ^ sig_112;
assign sig_138 = sig_100 & sig_112;
assign sig_139 = sig_137 & sig_66;
assign sig_140 = sig_137 ^ sig_66;
assign sig_141 = sig_138 | sig_139;
assign sig_142 = sig_105 ^ sig_26;
assign sig_143 = sig_105 & sig_26;
assign sig_144 = sig_142 & sig_141;
assign sig_145 = sig_142 ^ sig_141;
assign sig_146 = sig_143 | sig_144;
assign sig_147 = sig_106 ^ sig_114;
assign sig_148 = sig_106 & sig_114;
assign sig_149 = A[7] & sig_146;
assign sig_150 = sig_147 ^ sig_146;
assign sig_151 = sig_148 | sig_149;

assign O[11] = sig_151;
assign O[10] = sig_150;
assign O[9] = sig_145;
assign O[8] = sig_140;
assign O[7] = sig_57;
assign O[6] = sig_57;
assign O[5] = sig_57;
assign O[4] = sig_60;
assign O[3] = sig_140;
assign O[2] = sig_57;
assign O[1] = 1'b0;
assign O[0] = sig_106;

endmodule
module mul7u_013(A, B, O);
  input [6:0] A, B;
  output [13:0] O;
  wire [6:0] A, B;
  wire [13:0] O;
  wire sig_169, sig_172, sig_173, sig_179, sig_180, sig_202;
  wire sig_203, sig_204, sig_205, sig_206, sig_207, sig_209;
  wire sig_211, sig_212, sig_217, sig_219, sig_236, sig_237;
  wire sig_238, sig_239, sig_242, sig_243, sig_244, sig_246;
  wire sig_247, sig_249;
  assign sig_169 = A[5] ^ A[6];
  assign O[5] = A[6] & B[4];
  assign sig_172 = sig_169 & B[4];
  assign sig_173 = O[5] & A[5];
  assign sig_179 = A[5] & B[5];
  assign sig_180 = A[6] & B[5];
  assign O[9] = A[6] & B[3];
  assign sig_202 = A[4] & B[5];
  assign sig_203 = sig_172 ^ sig_179;
  assign sig_204 = sig_172 & sig_179;
  assign sig_205 = sig_203 & sig_202;
  assign sig_206 = sig_203 ^ sig_202;
  assign sig_207 = sig_204 ^ sig_205;
  assign O[4] = sig_173 ^ sig_180;
  assign sig_209 = sig_173 & B[5];
  assign O[0] = A[6] & sig_207;
  assign sig_211 = O[4] ^ sig_207;
  assign sig_212 = sig_209 | O[0];
  assign sig_217 = A[4] & B[6];
  assign O[7] = A[5] & B[6];
  assign sig_219 = A[6] & B[6];
  assign sig_236 = B[6] & A[3];
  assign sig_237 = sig_206 ^ sig_217;
  assign sig_238 = sig_206 & sig_217;
  assign sig_239 = sig_237 & sig_236;
  assign O[10] = sig_237 ^ sig_236;
  assign O[1] = sig_238 | sig_239;
  assign sig_242 = sig_211 ^ O[7];
  assign sig_243 = sig_211 & O[7];
  assign sig_244 = sig_242 & O[1];
  assign O[11] = sig_242 ^ O[1];
  assign sig_246 = sig_243 | sig_244;
  assign sig_247 = sig_212 ^ sig_219;
  assign O[2] = sig_212 & B[6];
  assign sig_249 = A[6] & sig_246;
  assign O[6] = sig_247 ^ sig_246;
  assign O[13] = O[2] | sig_249;
  assign O[3] = O[0];
  assign O[8] = O[0];
  assign O[12] = O[6];
endmodule
module mul7u_0CA(A, B, O);
  input [6:0] A, B;
  output [13:0] O;
  wire [6:0] A, B;
  wire [13:0] O;
  wire sig_194, sig_219, sig_220, sig_223, sig_224, sig_243;
  assign O[3] = A[5] & B[4];
  assign O[0] = A[6] & B[5];
  assign O[2] = B[5] & A[6];
  assign O[9] = A[5] & B[6];
  assign sig_194 = A[6] & B[6];
  assign sig_219 = B[6] & A[4];
  assign sig_220 = O[0] ^ O[9];
  assign sig_223 = sig_220 ^ O[2];
  assign sig_224 = B[5] & A[6];
  assign sig_243 = sig_223 & A[4];
  assign O[8] = sig_194 ^ sig_224;
  assign O[1] = B[6] & sig_224;
  assign O[7] = A[6] & sig_243;
  assign O[5] = O[8] ^ sig_243;
  assign O[6] = O[1] | O[7];
  assign O[4] = sig_223 ^ sig_219;
  assign O[10] = O[3];
  assign O[11] = O[4];
  assign O[12] = O[5];
  assign O[13] = O[6];
endmodule
module mul7u_00M(A, B, O);
  input [6:0] A, B;
  output [13:0] O;
  wire [6:0] A, B;
  wire [13:0] O;
  wire sig_55, sig_61, sig_62, sig_119, sig_120, sig_182;
  wire sig_184, sig_211, sig_212, sig_214, sig_215, sig_216;
  wire sig_219, sig_220, sig_221, sig_254, sig_255;
  assign sig_55 = A[6] & B[5];
  assign sig_61 = A[5] & B[6];
  assign sig_62 = A[6] & B[6];
  assign O[9] = B[6] & A[2];
  assign sig_119 = A[6] & B[4];
  assign sig_120 = A[6] ^ A[6];
  assign sig_182 = sig_120 & B[1];
  assign sig_184 = B[5] & sig_119;
  assign O[7] = sig_55 ^ sig_119;
  assign sig_211 = B[5] & A[5];
  assign sig_212 = B[6] & A[4];
  assign sig_214 = sig_211 | sig_212;
  assign sig_215 = O[7];
  assign sig_216 = B[4] & sig_182;
  assign O[8] = sig_215 & sig_61;
  assign O[1] = sig_215 ^ sig_61;
  assign sig_219 = sig_216 ^ O[8];
  assign sig_220 = sig_184 & B[6];
  assign sig_221 = sig_184 ^ sig_62;
  assign O[10] = A[3] & B[5];
  assign O[11] = O[1] ^ sig_214;
  assign O[0] = O[1] & sig_214;
  assign O[3] = O[0];
  assign sig_254 = sig_221 ^ sig_219;
  assign sig_255 = A[5] & sig_219;
  assign O[5] = sig_254 & O[3];
  assign O[12] = sig_254 ^ O[3];
  assign O[4] = sig_255 ^ O[5];
  assign O[13] = sig_220 ^ O[4];
  assign O[2] = O[0];
  assign O[6] = O[5];
endmodule
module mul8x5u_280 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_34,sig_42,sig_172;

assign sig_34 = A[4] & B[2];
assign sig_42 = A[6] & B[3];
assign sig_172 = B[4] & A[7];

assign O[12] = sig_172;
assign O[11] = 1'b0;
assign O[10] = sig_42;
assign O[9] = sig_172;
assign O[8] = 1'b0;
assign O[7] = sig_34;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = sig_172;
assign O[1] = sig_34;
assign O[0] = 1'b0;

endmodule
module mul8x5u_2ML (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_50,sig_77,sig_92,sig_93,sig_124,sig_125,sig_133,sig_135,sig_136,sig_166,sig_167,sig_168,sig_170,sig_171,sig_182,sig_183,sig_185,sig_196,sig_197,sig_208;

assign sig_50 = A[7] & B[2];
assign sig_77 = B[4] & A[5];
assign sig_92 = A[6] & B[3];
assign sig_93 = A[7] & B[3];
assign sig_124 = sig_50 | sig_92;
assign sig_125 = sig_50 & sig_92;
assign sig_133 = A[4] & B[1];
assign sig_135 = A[6] & B[4];
assign sig_136 = A[7] & B[4];
assign sig_166 = sig_133 | sig_77;
assign sig_167 = sig_93 ^ sig_135;
assign sig_168 = sig_93 & sig_135;
assign sig_170 = sig_167 ^ sig_125;
assign sig_171 = sig_168 | sig_125;
assign sig_182 = sig_170 & sig_166;
assign sig_183 = sig_170 ^ sig_166;
assign sig_185 = sig_136 ^ sig_171;
assign sig_196 = sig_136 & sig_182;
assign sig_197 = sig_185 ^ sig_182;
assign sig_208 = sig_168 | sig_196;

assign O[12] = sig_208;
assign O[11] = sig_197;
assign O[10] = sig_183;
assign O[9] = sig_124;
assign O[8] = sig_124;
assign O[7] = sig_185;
assign O[6] = sig_77;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = sig_77;

endmodule
module mul8x5u_13K (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_21,sig_28,sig_56,sig_58,sig_61,sig_62,sig_68,sig_69,sig_70,sig_98,sig_99,sig_103,sig_104,sig_106,sig_113,sig_114,sig_115,sig_129,sig_134,sig_135;
wire sig_137,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151,sig_152,sig_156,sig_157,sig_158,sig_159;
wire sig_160,sig_178,sig_179,sig_180,sig_181,sig_182,sig_183,sig_184,sig_185,sig_186,sig_187,sig_188,sig_189,sig_190,sig_191,sig_192,sig_193,sig_194,sig_195,sig_196;
wire sig_197;

assign sig_21 = B[0] & A[7];
assign sig_28 = A[7] & B[1];
assign sig_56 = A[2] | A[6];
assign sig_58 = sig_56 & B[1];
assign sig_61 = sig_58 & A[7];
assign sig_62 = sig_58 ^ sig_28;
assign sig_68 = A[5] & B[2];
assign sig_69 = A[6] & B[2];
assign sig_70 = A[7] & B[2];
assign sig_98 = sig_62 ^ sig_69;
assign sig_99 = sig_62 & sig_69;
assign sig_103 = sig_61 ^ sig_70;
assign sig_104 = sig_61 & B[2];
assign sig_106 = sig_103 | sig_99;
assign sig_113 = A[5] & B[3];
assign sig_114 = A[6] & B[3];
assign sig_115 = A[7] & B[3];
assign sig_129 = A[6] & B[0];
assign sig_134 = B[3] & A[4];
assign sig_135 = sig_68 & sig_129;
assign sig_137 = sig_134 | sig_135;
assign sig_138 = sig_98 ^ sig_113;
assign sig_139 = sig_98 & sig_113;
assign sig_140 = sig_138 & sig_137;
assign sig_141 = sig_138 ^ sig_137;
assign sig_142 = sig_139 | sig_140;
assign sig_143 = sig_106 ^ sig_114;
assign sig_144 = sig_106 & sig_114;
assign sig_145 = sig_143 & sig_142;
assign sig_146 = sig_143 ^ sig_142;
assign sig_147 = sig_144 | sig_145;
assign sig_148 = sig_104 ^ sig_115;
assign sig_149 = sig_104 & sig_115;
assign sig_150 = sig_115 & sig_147;
assign sig_151 = sig_148 ^ sig_147;
assign sig_152 = sig_149 | sig_150;
assign sig_156 = A[3] & B[4];
assign sig_157 = A[4] & B[4];
assign sig_158 = A[5] & B[4];
assign sig_159 = A[6] & B[4];
assign sig_160 = A[7] & B[4];
assign sig_178 = sig_141 ^ sig_157;
assign sig_179 = sig_141 & sig_157;
assign sig_180 = sig_178 & sig_156;
assign sig_181 = sig_178 ^ sig_156;
assign sig_182 = sig_179 | sig_180;
assign sig_183 = sig_146 ^ sig_158;
assign sig_184 = sig_146 & sig_158;
assign sig_185 = sig_183 & sig_182;
assign sig_186 = sig_183 ^ sig_182;
assign sig_187 = sig_184 | sig_185;
assign sig_188 = sig_151 ^ sig_159;
assign sig_189 = sig_151 & sig_159;
assign sig_190 = sig_188 & sig_187;
assign sig_191 = sig_188 ^ sig_187;
assign sig_192 = sig_189 | sig_190;
assign sig_193 = sig_152 ^ sig_160;
assign sig_194 = sig_152 & B[4];
assign sig_195 = sig_160 & sig_192;
assign sig_196 = sig_193 ^ sig_192;
assign sig_197 = sig_194 | sig_195;

assign O[12] = sig_197;
assign O[11] = sig_196;
assign O[10] = sig_191;
assign O[9] = sig_186;
assign O[8] = sig_181;
assign O[7] = sig_68;
assign O[6] = sig_21;
assign O[5] = sig_21;
assign O[4] = sig_193;
assign O[3] = sig_191;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = sig_68;

endmodule
module mul8x5u_541 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;
assign O[12] = 1'b0;
assign O[11] = 1'b0;
assign O[10] = 1'b0;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8x5u_2Y9 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_26,sig_27,sig_28,sig_61,sig_62,sig_68,sig_69,sig_70,sig_98,sig_99,sig_100,sig_101,sig_102,sig_103,sig_104,sig_105,sig_106,sig_107,sig_112,sig_113;
wire sig_114,sig_115,sig_133,sig_134,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_144,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151,sig_152,sig_156;
wire sig_157,sig_158,sig_159,sig_160,sig_173,sig_174,sig_178,sig_179,sig_180,sig_181,sig_182,sig_183,sig_184,sig_185,sig_186,sig_187,sig_188,sig_189,sig_190,sig_191;
wire sig_192,sig_193,sig_194,sig_195,sig_196,sig_197;

assign sig_26 = B[0] & A[7];
assign sig_27 = A[6] & B[1];
assign sig_28 = A[7] & B[1];
assign sig_61 = sig_26 & B[1];
assign sig_62 = sig_26 ^ sig_28;
assign sig_68 = A[5] & B[2];
assign sig_69 = A[6] & B[2];
assign sig_70 = A[7] & B[2];
assign sig_98 = sig_62 ^ sig_69;
assign sig_99 = sig_62 & sig_69;
assign sig_100 = sig_98 & sig_68;
assign sig_101 = sig_98 ^ sig_68;
assign sig_102 = sig_99 | sig_100;
assign sig_103 = sig_61 ^ sig_70;
assign sig_104 = sig_61 & B[2];
assign sig_105 = A[7] & sig_102;
assign sig_106 = sig_103 ^ sig_102;
assign sig_107 = sig_104 | sig_105;
assign sig_112 = A[4] & B[3];
assign sig_113 = A[5] & B[3];
assign sig_114 = A[6] & B[3];
assign sig_115 = A[7] & B[3];
assign sig_133 = sig_27 | sig_112;
assign sig_134 = sig_27 & sig_112;
assign sig_138 = sig_101 ^ sig_113;
assign sig_139 = sig_101 & sig_113;
assign sig_140 = sig_138 & sig_134;
assign sig_141 = sig_138 ^ sig_134;
assign sig_142 = sig_139 | sig_140;
assign sig_143 = sig_106 ^ sig_114;
assign sig_144 = sig_106 & sig_114;
assign sig_145 = sig_143 & sig_142;
assign sig_146 = sig_143 ^ sig_142;
assign sig_147 = sig_144 | sig_145;
assign sig_148 = sig_107 ^ sig_115;
assign sig_149 = sig_107 & B[3];
assign sig_150 = sig_115 & sig_147;
assign sig_151 = sig_148 ^ sig_147;
assign sig_152 = sig_149 | sig_150;
assign sig_156 = A[3] & B[4];
assign sig_157 = A[4] & B[4];
assign sig_158 = A[5] & B[4];
assign sig_159 = A[6] & B[4];
assign sig_160 = A[7] & B[4];
assign sig_173 = sig_133 | sig_156;
assign sig_174 = sig_133 & sig_156;
assign sig_178 = sig_141 ^ sig_157;
assign sig_179 = sig_141 & sig_157;
assign sig_180 = sig_178 & sig_174;
assign sig_181 = sig_178 ^ sig_174;
assign sig_182 = sig_179 | sig_180;
assign sig_183 = sig_146 ^ sig_158;
assign sig_184 = sig_146 & sig_158;
assign sig_185 = sig_183 & sig_182;
assign sig_186 = sig_183 ^ sig_182;
assign sig_187 = sig_184 | sig_185;
assign sig_188 = sig_151 ^ sig_159;
assign sig_189 = sig_151 & sig_159;
assign sig_190 = sig_188 & sig_187;
assign sig_191 = sig_188 ^ sig_187;
assign sig_192 = sig_189 | sig_190;
assign sig_193 = sig_152 ^ sig_160;
assign sig_194 = sig_152 & B[4];
assign sig_195 = A[7] & sig_192;
assign sig_196 = sig_193 ^ sig_192;
assign sig_197 = sig_194 | sig_195;

assign O[12] = sig_197;
assign O[11] = sig_196;
assign O[10] = sig_191;
assign O[9] = sig_186;
assign O[8] = sig_181;
assign O[7] = sig_173;
assign O[6] = sig_173;
assign O[5] = sig_160;
assign O[4] = sig_105;
assign O[3] = sig_27;
assign O[2] = sig_70;
assign O[1] = sig_61;
assign O[0] = sig_152;

endmodule
module mul8x5u_0N9 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_36,sig_44,sig_50,sig_51,sig_52,sig_97,sig_99,sig_100,sig_163,sig_167,sig_168,sig_172,sig_173,sig_186,sig_187,sig_188,sig_189,sig_203,sig_204,sig_207;

assign sig_36 = A[7] & B[2];
assign sig_44 = A[7] & B[3];
assign sig_50 = A[5] & B[4];
assign sig_51 = A[6] & B[4];
assign sig_52 = A[7] & B[4];
assign sig_97 = A[6] | A[5];
assign sig_99 = sig_44 ^ sig_51;
assign sig_100 = sig_44 & sig_51;
assign sig_163 = sig_97 & B[3];
assign sig_167 = sig_99 ^ sig_36;
assign sig_168 = sig_99 & sig_36;
assign sig_172 = sig_52 & sig_163;
assign sig_173 = sig_52 ^ sig_100;
assign sig_186 = sig_167 ^ sig_163;
assign sig_187 = sig_167 & sig_163;
assign sig_188 = sig_173 ^ sig_168;
assign sig_189 = B[4] & sig_168;
assign sig_203 = sig_188 ^ sig_187;
assign sig_204 = sig_172 | sig_189;
assign sig_207 = A[4] & B[4];

assign O[12] = sig_204;
assign O[11] = sig_203;
assign O[10] = sig_186;
assign O[9] = sig_207;
assign O[8] = sig_50;
assign O[7] = sig_204;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = sig_172;
assign O[3] = sig_186;
assign O[2] = sig_207;
assign O[1] = 1'b0;
assign O[0] = sig_203;

endmodule
module mul8x5u_0AP (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_51,sig_52,sig_169,sig_224;

assign sig_51 = A[5] & B[2];
assign sig_52 = A[7] & B[4];
assign sig_169 = B[3] & A[6];
assign sig_224 = A[7] & B[4];

assign O[12] = sig_52;
assign O[11] = sig_169;
assign O[10] = sig_51;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = sig_52;
assign O[6] = sig_169;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = sig_224;
assign O[1] = sig_169;
assign O[0] = 1'b0;

endmodule
module mul8x5u_14C (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_70,sig_99,sig_113,sig_114,sig_115,sig_143,sig_145,sig_146,sig_148,sig_149,sig_150,sig_151,sig_152,sig_157,sig_158,sig_159,sig_160,sig_178,sig_181,sig_182;
wire sig_183,sig_184,sig_186,sig_187,sig_188,sig_189,sig_190,sig_191,sig_192,sig_193,sig_194,sig_195,sig_196,sig_197;

assign sig_70 = A[7] & B[2];
assign sig_99 = B[1] & A[6];
assign sig_113 = A[5] & B[3];
assign sig_114 = A[6] & B[3];
assign sig_115 = A[7] & B[3];
assign sig_143 = sig_99 | sig_114;
assign sig_145 = A[6] & sig_113;
assign sig_146 = sig_143 ^ sig_113;
assign sig_148 = sig_70 ^ sig_115;
assign sig_149 = sig_70 & sig_115;
assign sig_150 = sig_148 & sig_145;
assign sig_151 = sig_148 ^ sig_145;
assign sig_152 = sig_149 | sig_150;
assign sig_157 = A[4] & B[4];
assign sig_158 = A[5] & B[4];
assign sig_159 = A[6] & B[4];
assign sig_160 = A[7] & B[4];
assign sig_178 = A[7] ^ sig_157;
assign sig_181 = sig_178 ^ A[7];
assign sig_182 = B[4] & sig_114;
assign sig_183 = sig_146 ^ sig_158;
assign sig_184 = sig_146 & sig_158;
assign sig_186 = sig_183 ^ sig_182;
assign sig_187 = sig_184 | sig_182;
assign sig_188 = sig_151 ^ sig_159;
assign sig_189 = sig_151 & sig_159;
assign sig_190 = sig_188 & sig_187;
assign sig_191 = sig_188 ^ sig_187;
assign sig_192 = sig_189 | sig_190;
assign sig_193 = sig_152 ^ sig_160;
assign sig_194 = sig_152 & B[4];
assign sig_195 = sig_160 & sig_192;
assign sig_196 = sig_193 ^ sig_192;
assign sig_197 = sig_194 | sig_195;

assign O[12] = sig_197;
assign O[11] = sig_196;
assign O[10] = sig_191;
assign O[9] = sig_186;
assign O[8] = sig_181;
assign O[7] = sig_157;
assign O[6] = 1'b0;
assign O[5] = sig_197;
assign O[4] = sig_157;
assign O[3] = sig_70;
assign O[2] = sig_194;
assign O[1] = sig_181;
assign O[0] = sig_191;

endmodule
module mul8x5u_2E0 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_20,sig_53,sig_61,sig_62,sig_68,sig_69,sig_70,sig_79,sig_98,sig_100,sig_101,sig_102,sig_103,sig_104,sig_105,sig_106,sig_107,sig_112,sig_113,sig_114;
wire sig_115,sig_126,sig_129,sig_138,sig_139,sig_140,sig_141,sig_142,sig_143,sig_145,sig_146,sig_147,sig_148,sig_149,sig_150,sig_151,sig_152,sig_156,sig_157,sig_158;
wire sig_159,sig_160,sig_173,sig_174,sig_178,sig_179,sig_180,sig_181,sig_182,sig_183,sig_184,sig_185,sig_186,sig_187,sig_188,sig_189,sig_190,sig_191,sig_192,sig_193;
wire sig_194,sig_195,sig_196,sig_197;

assign sig_20 = B[1] & A[7];
assign sig_53 = A[6] & B[1];
assign sig_61 = sig_53 & A[7];
assign sig_62 = sig_53 ^ sig_20;
assign sig_68 = A[5] & B[2];
assign sig_69 = A[6] & B[2];
assign sig_70 = A[7] & B[2];
assign sig_79 = sig_69 & sig_62;
assign sig_98 = sig_62 ^ sig_69;
assign sig_100 = sig_98 & sig_68;
assign sig_101 = sig_98 ^ sig_68;
assign sig_102 = sig_79 | sig_100;
assign sig_103 = sig_61 ^ sig_70;
assign sig_104 = sig_61 & B[2];
assign sig_105 = A[7] & sig_102;
assign sig_106 = sig_103 ^ sig_102;
assign sig_107 = sig_104 | sig_105;
assign sig_112 = A[4] & B[3];
assign sig_113 = A[5] & B[3];
assign sig_114 = A[6] & B[3];
assign sig_115 = A[7] & B[3];
assign sig_126 = A[7] & B[0];
assign sig_129 = sig_114 & sig_106;
assign sig_138 = sig_101 ^ sig_113;
assign sig_139 = sig_101 & sig_113;
assign sig_140 = sig_138 & sig_112;
assign sig_141 = sig_138 ^ sig_112;
assign sig_142 = sig_139 | sig_140;
assign sig_143 = sig_106 ^ sig_114;
assign sig_145 = sig_143 & sig_142;
assign sig_146 = sig_143 ^ sig_142;
assign sig_147 = sig_129 | sig_145;
assign sig_148 = sig_107 ^ sig_115;
assign sig_149 = sig_107 & B[3];
assign sig_150 = A[7] & sig_147;
assign sig_151 = sig_148 ^ sig_147;
assign sig_152 = sig_149 | sig_150;
assign sig_156 = A[3] & B[4];
assign sig_157 = A[4] & B[4];
assign sig_158 = A[5] & B[4];
assign sig_159 = A[6] & B[4];
assign sig_160 = A[7] & B[4];
assign sig_173 = sig_126 | sig_156;
assign sig_174 = B[0] & sig_156;
assign sig_178 = sig_141 ^ sig_157;
assign sig_179 = sig_141 & sig_157;
assign sig_180 = sig_178 & sig_174;
assign sig_181 = sig_178 ^ sig_174;
assign sig_182 = sig_179 | sig_180;
assign sig_183 = sig_146 ^ sig_158;
assign sig_184 = sig_146 & sig_158;
assign sig_185 = sig_183 & sig_182;
assign sig_186 = sig_183 ^ sig_182;
assign sig_187 = sig_184 | sig_185;
assign sig_188 = sig_151 ^ sig_159;
assign sig_189 = sig_151 & sig_159;
assign sig_190 = sig_188 & sig_187;
assign sig_191 = sig_188 ^ sig_187;
assign sig_192 = sig_189 | sig_190;
assign sig_193 = sig_152 ^ sig_160;
assign sig_194 = sig_152 & B[4];
assign sig_195 = sig_160 & sig_192;
assign sig_196 = sig_193 ^ sig_192;
assign sig_197 = sig_194 | sig_195;

assign O[12] = sig_197;
assign O[11] = sig_196;
assign O[10] = sig_191;
assign O[9] = sig_186;
assign O[8] = sig_181;
assign O[7] = sig_173;
assign O[6] = 1'b0;
assign O[5] = sig_126;
assign O[4] = sig_191;
assign O[3] = sig_104;
assign O[2] = sig_107;
assign O[1] = sig_186;
assign O[0] = sig_70;

endmodule
module mul8x5u_453 (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_114,sig_195;

assign sig_114 = A[6] & B[3];
assign sig_195 = B[4] & A[7];

assign O[12] = sig_195;
assign O[11] = sig_114;
assign O[10] = 1'b0;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = sig_195;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = sig_195;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = sig_195;
assign O[0] = sig_195;

endmodule
module mul8x5u_13N (
    A,
    B,
    O
);

input [7:0] A;
input [4:0] B;
output [12:0] O;

wire sig_41,sig_50,sig_93,sig_130,sig_134,sig_136,sig_142,sig_167,sig_168,sig_169,sig_170,sig_171,sig_182,sig_183,sig_184,sig_185,sig_196,sig_197,sig_208;

assign sig_41 = A[7] & B[2];
assign sig_50 = B[2] & sig_41;
assign sig_93 = A[7] & B[3];
assign sig_130 = A[6] & B[4];
assign sig_134 = A[5] & B[4];
assign sig_136 = A[7] & B[4];
assign sig_142 = A[6] & B[3];
assign sig_167 = sig_93 ^ sig_130;
assign sig_168 = sig_93 & sig_130;
assign sig_169 = sig_167 & sig_50;
assign sig_170 = sig_167 ^ sig_50;
assign sig_171 = sig_168 | sig_169;
assign sig_182 = sig_170 & sig_134;
assign sig_183 = sig_170 ^ sig_134;
assign sig_184 = sig_136 & sig_171;
assign sig_185 = sig_136 ^ sig_171;
assign sig_196 = A[7] & sig_182;
assign sig_197 = sig_185 ^ sig_182;
assign sig_208 = sig_184 | sig_196;

assign O[12] = sig_208;
assign O[11] = sig_197;
assign O[10] = sig_183;
assign O[9] = sig_142;
assign O[8] = sig_142;
assign O[7] = sig_130;
assign O[6] = sig_183;
assign O[5] = sig_142;
assign O[4] = sig_183;
assign O[3] = 1'b0;
assign O[2] = sig_185;
assign O[1] = sig_208;
assign O[0] = sig_41;

endmodule
module mul8x6u_045 (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_203,sig_285,sig_292;

assign sig_203 = B[4] & A[6];
assign sig_285 = B[3] & A[5];
assign sig_292 = A[7] & B[5];

assign O[13] = sig_292;
assign O[12] = sig_203;
assign O[11] = sig_285;
assign O[10] = 1'b0;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = sig_285;
assign O[3] = 1'b0;
assign O[2] = sig_285;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8x6u_0MH (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_71,sig_150,sig_160,sig_161,sig_194,sig_195,sig_196,sig_197,sig_198,sig_203,sig_204,sig_205,sig_206,sig_225,sig_229,sig_231,sig_232,sig_233,sig_234,sig_235;
wire sig_236,sig_237,sig_238,sig_239,sig_240,sig_241,sig_242,sig_243;

assign sig_71 = A[5] & B[2];
assign sig_150 = B[3] & A[7];
assign sig_160 = A[6] & B[4];
assign sig_161 = A[7] & B[4];
assign sig_194 = sig_150 ^ sig_161;
assign sig_195 = sig_150 & B[4];
assign sig_196 = sig_161 & A[6];
assign sig_197 = sig_194 ^ sig_160;
assign sig_198 = sig_195 | sig_196;
assign sig_203 = A[4] & B[5];
assign sig_204 = A[5] & B[5];
assign sig_205 = A[6] & B[5];
assign sig_206 = A[7] & B[5];
assign sig_225 = B[5] & sig_71;
assign sig_229 = sig_71 ^ sig_204;
assign sig_231 = A[5] & sig_203;
assign sig_232 = sig_229 ^ sig_203;
assign sig_233 = sig_225 | sig_231;
assign sig_234 = sig_197 ^ sig_205;
assign sig_235 = sig_197 & sig_205;
assign sig_236 = sig_234 & sig_233;
assign sig_237 = sig_234 ^ sig_233;
assign sig_238 = sig_235 | sig_236;
assign sig_239 = sig_198 ^ sig_206;
assign sig_240 = sig_198 & B[5];
assign sig_241 = sig_206 & sig_238;
assign sig_242 = sig_239 ^ sig_238;
assign sig_243 = sig_240 | sig_241;

assign O[13] = sig_243;
assign O[12] = sig_242;
assign O[11] = sig_237;
assign O[10] = sig_232;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = sig_71;
assign O[6] = sig_237;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = sig_203;
assign O[1] = sig_225;
assign O[0] = 1'b0;

endmodule
module mul8x6u_51C (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;
assign O[13] = 1'b0;
assign O[12] = 1'b0;
assign O[11] = 1'b0;
assign O[10] = 1'b0;
assign O[9] = 1'b0;
assign O[8] = 1'b0;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8x6u_23K (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_105,sig_114,sig_134,sig_160,sig_165,sig_194,sig_195,sig_204,sig_205,sig_206,sig_225,sig_227,sig_229,sig_230,sig_231,sig_232,sig_233,sig_234,sig_235,sig_236;
wire sig_237,sig_238,sig_239,sig_240,sig_241,sig_242,sig_243;

assign sig_105 = B[4] & A[7];
assign sig_114 = A[7] & B[3];
assign sig_134 = ~sig_105;
assign sig_160 = A[6] & B[4];
assign sig_165 = ~sig_134;
assign sig_194 = sig_114 ^ sig_165;
assign sig_195 = sig_114 & B[4];
assign sig_204 = A[5] & B[5];
assign sig_205 = A[6] & B[5];
assign sig_206 = A[7] & B[5];
assign sig_225 = B[5] & A[4];
assign sig_227 = B[4] & A[5];
assign sig_229 = sig_160 | sig_204;
assign sig_230 = sig_160 & sig_204;
assign sig_231 = sig_229 & sig_225;
assign sig_232 = sig_229 | sig_225;
assign sig_233 = sig_230 | sig_231;
assign sig_234 = sig_194 ^ sig_205;
assign sig_235 = sig_194 & sig_205;
assign sig_236 = sig_234 & sig_233;
assign sig_237 = sig_234 ^ sig_233;
assign sig_238 = sig_235 | sig_236;
assign sig_239 = sig_195 ^ sig_206;
assign sig_240 = sig_195 & B[5];
assign sig_241 = sig_206 & sig_238;
assign sig_242 = sig_239 ^ sig_238;
assign sig_243 = sig_240 | sig_241;

assign O[13] = sig_243;
assign O[12] = sig_242;
assign O[11] = sig_237;
assign O[10] = sig_232;
assign O[9] = sig_227;
assign O[8] = sig_227;
assign O[7] = sig_160;
assign O[6] = sig_227;
assign O[5] = sig_195;
assign O[4] = sig_114;
assign O[3] = 1'b0;
assign O[2] = sig_243;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8x6u_2B3 (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_59,sig_61,sig_203,sig_207,sig_256,sig_270;

assign sig_59 = A[6] & B[5];
assign sig_61 = A[7] & B[5];
assign sig_203 = A[4] & B[3];
assign sig_207 = A[7] & B[4];
assign sig_256 = ~sig_207;
assign sig_270 = ~(sig_256 | B[5]);

assign O[13] = sig_61;
assign O[12] = sig_270;
assign O[11] = sig_59;
assign O[10] = sig_203;
assign O[9] = sig_59;
assign O[8] = sig_59;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = sig_59;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = sig_270;

endmodule
module mul8x6u_247 (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_51,sig_93,sig_94,sig_125,sig_126,sig_135,sig_136,sig_137,sig_168,sig_169,sig_171,sig_172,sig_178,sig_179,sig_180,sig_202,sig_206,sig_207,sig_208,sig_209;
wire sig_210,sig_211,sig_212,sig_213,sig_214,sig_215,sig_224,sig_225,sig_226,sig_227,sig_228,sig_229,sig_239,sig_240,sig_241,sig_243,sig_261,sig_265,sig_269,sig_270;
wire sig_271,sig_272,sig_275,sig_276;

assign sig_51 = A[7] & B[2];
assign sig_93 = A[6] & B[3];
assign sig_94 = A[7] & B[3];
assign sig_125 = sig_51 | sig_93;
assign sig_126 = sig_51 & sig_93;
assign sig_135 = A[5] & B[4];
assign sig_136 = A[6] & B[4];
assign sig_137 = A[7] & B[4];
assign sig_168 = sig_94 ^ sig_136;
assign sig_169 = sig_94 & sig_136;
assign sig_171 = sig_168 | sig_126;
assign sig_172 = sig_169 | sig_126;
assign sig_178 = A[5] & B[5];
assign sig_179 = A[6] & B[5];
assign sig_180 = A[7] & B[5];
assign sig_202 = B[5] & A[4];
assign sig_206 = sig_171 ^ sig_178;
assign sig_207 = sig_171 & sig_178;
assign sig_208 = sig_206 & sig_135;
assign sig_209 = sig_206 ^ sig_135;
assign sig_210 = sig_207 | sig_208;
assign sig_211 = sig_137 ^ sig_179;
assign sig_212 = sig_137 & sig_179;
assign sig_213 = sig_211 & sig_172;
assign sig_214 = sig_211 ^ sig_172;
assign sig_215 = sig_212 | sig_213;
assign sig_224 = sig_209 & sig_202;
assign sig_225 = sig_209 ^ sig_202;
assign sig_226 = sig_214 & sig_210;
assign sig_227 = sig_214 ^ sig_210;
assign sig_228 = sig_180 & sig_215;
assign sig_229 = sig_180 ^ sig_215;
assign sig_239 = sig_227 ^ sig_224;
assign sig_240 = sig_180 & sig_226;
assign sig_241 = sig_229 ^ sig_226;
assign sig_243 = sig_224 & sig_227;
assign sig_261 = sig_228 | sig_240;
assign sig_265 = ~sig_229;
assign sig_269 = ~sig_243;
assign sig_270 = sig_241 & sig_269;
assign sig_271 = sig_265 & sig_243;
assign sig_272 = sig_270 | sig_271;
assign sig_275 = A[7] & sig_243;
assign sig_276 = sig_261 | sig_275;

assign O[13] = sig_276;
assign O[12] = sig_272;
assign O[11] = sig_239;
assign O[10] = sig_225;
assign O[9] = sig_125;
assign O[8] = sig_136;
assign O[7] = sig_136;
assign O[6] = 1'b0;
assign O[5] = sig_240;
assign O[4] = sig_94;
assign O[3] = sig_225;
assign O[2] = sig_125;
assign O[1] = sig_169;
assign O[0] = sig_275;

endmodule
module mul8x6u_4MB (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_58,sig_62,sig_71,sig_100,sig_104,sig_105,sig_106,sig_107,sig_108,sig_115,sig_116,sig_144,sig_145,sig_149,sig_150,sig_151,sig_152,sig_153,sig_158,sig_159;
wire sig_160,sig_161,sig_184,sig_185,sig_186,sig_187,sig_188,sig_189,sig_190,sig_191,sig_192,sig_193,sig_194,sig_195,sig_196,sig_197,sig_198,sig_202,sig_203,sig_204;
wire sig_205,sig_206,sig_224,sig_225,sig_226,sig_227,sig_228,sig_229,sig_230,sig_231,sig_232,sig_233,sig_234,sig_235,sig_236,sig_237,sig_238,sig_239,sig_240,sig_241;
wire sig_242,sig_243;

assign sig_58 = B[2] & A[6];
assign sig_62 = B[1] & A[7];
assign sig_71 = A[7] & B[2];
assign sig_100 = B[3] & A[5];
assign sig_104 = sig_62 ^ sig_71;
assign sig_105 = sig_62 & B[2];
assign sig_106 = A[7] & sig_58;
assign sig_107 = sig_104 ^ sig_58;
assign sig_108 = sig_105 | sig_106;
assign sig_115 = A[6] & B[3];
assign sig_116 = A[7] & B[3];
assign sig_144 = sig_107 ^ sig_115;
assign sig_145 = sig_107 & sig_115;
assign sig_149 = sig_108 ^ sig_116;
assign sig_150 = sig_108 & sig_116;
assign sig_151 = sig_116 & sig_145;
assign sig_152 = sig_149 ^ sig_145;
assign sig_153 = sig_150 | sig_151;
assign sig_158 = A[4] & B[4];
assign sig_159 = A[5] & B[4];
assign sig_160 = A[6] & B[4];
assign sig_161 = A[7] & B[4];
assign sig_184 = sig_144 ^ sig_159;
assign sig_185 = sig_144 & sig_159;
assign sig_186 = sig_184 & sig_158;
assign sig_187 = sig_184 ^ sig_158;
assign sig_188 = sig_185 | sig_186;
assign sig_189 = sig_152 ^ sig_160;
assign sig_190 = sig_152 & sig_160;
assign sig_191 = sig_189 & sig_188;
assign sig_192 = sig_189 ^ sig_188;
assign sig_193 = sig_190 | sig_191;
assign sig_194 = sig_153 ^ sig_161;
assign sig_195 = sig_153 & B[4];
assign sig_196 = sig_161 & sig_193;
assign sig_197 = sig_194 ^ sig_193;
assign sig_198 = sig_195 | sig_196;
assign sig_202 = A[3] & B[5];
assign sig_203 = A[4] & B[5];
assign sig_204 = A[5] & B[5];
assign sig_205 = A[6] & B[5];
assign sig_206 = A[7] & B[5];
assign sig_224 = sig_187 ^ sig_203;
assign sig_225 = sig_187 & sig_203;
assign sig_226 = sig_224 & sig_202;
assign sig_227 = sig_224 ^ sig_202;
assign sig_228 = sig_225 | sig_226;
assign sig_229 = sig_192 ^ sig_204;
assign sig_230 = sig_192 & sig_204;
assign sig_231 = sig_229 & sig_228;
assign sig_232 = sig_229 ^ sig_228;
assign sig_233 = sig_230 | sig_231;
assign sig_234 = sig_197 ^ sig_205;
assign sig_235 = sig_197 & sig_205;
assign sig_236 = sig_234 & sig_233;
assign sig_237 = sig_234 ^ sig_233;
assign sig_238 = sig_235 | sig_236;
assign sig_239 = sig_198 ^ sig_206;
assign sig_240 = sig_198 & B[5];
assign sig_241 = sig_239 & sig_238;
assign sig_242 = sig_239 ^ sig_238;
assign sig_243 = sig_240 | sig_241;

assign O[13] = sig_243;
assign O[12] = sig_242;
assign O[11] = sig_237;
assign O[10] = sig_232;
assign O[9] = sig_227;
assign O[8] = sig_100;
assign O[7] = 1'b0;
assign O[6] = sig_108;
assign O[5] = sig_242;
assign O[4] = sig_240;
assign O[3] = 1'b0;
assign O[2] = sig_100;
assign O[1] = sig_106;
assign O[0] = sig_203;

endmodule
module mul8x6u_0SQ (
    A,
    B,
    O
);

input [7:0] A;
input [5:0] B;
output [13:0] O;

wire sig_44,sig_45,sig_52,sig_53,sig_59,sig_60,sig_61,sig_120,sig_122,sig_123,sig_124,sig_125,sig_126,sig_127,sig_128,sig_129,sig_149,sig_196,sig_199,sig_201;
wire sig_202,sig_204,sig_217,sig_219,sig_220,sig_221,sig_222,sig_233,sig_237,sig_238,sig_297,sig_305;

assign sig_44 = A[6] & B[3];
assign sig_45 = A[7] & B[3];
assign sig_52 = A[6] & B[4];
assign sig_53 = A[7] & B[4];
assign sig_59 = A[5] & B[5];
assign sig_60 = A[6] & B[5];
assign sig_61 = A[7] & B[5];
assign sig_120 = B[5] & A[4];
assign sig_122 = sig_44 | sig_120;
assign sig_123 = sig_45 ^ sig_52;
assign sig_124 = sig_45 & sig_52;
assign sig_125 = sig_123 & sig_59;
assign sig_126 = sig_123 ^ sig_59;
assign sig_127 = sig_124 | sig_125;
assign sig_128 = sig_53 & sig_60;
assign sig_129 = sig_53 ^ sig_60;
assign sig_149 = B[4] & A[5];
assign sig_196 = sig_126 | sig_122;
assign sig_199 = sig_196 ^ sig_122;
assign sig_201 = sig_129 & sig_127;
assign sig_202 = sig_129 ^ sig_127;
assign sig_204 = sig_61 ^ sig_128;
assign sig_217 = sig_199 | sig_149;
assign sig_219 = sig_202 ^ sig_122;
assign sig_220 = sig_202 & sig_122;
assign sig_221 = sig_204 ^ sig_201;
assign sig_222 = sig_204 & sig_201;
assign sig_233 = sig_128 | sig_222;
assign sig_237 = A[7] & sig_220;
assign sig_238 = sig_221 ^ sig_220;
assign sig_297 = sig_237 | sig_233;
assign sig_305 = A[7] & B[2];

assign O[13] = sig_297;
assign O[12] = sig_238;
assign O[11] = sig_219;
assign O[10] = sig_217;
assign O[9] = sig_305;
assign O[8] = sig_126;
assign O[7] = sig_126;
assign O[6] = sig_128;
assign O[5] = sig_217;
assign O[4] = sig_128;
assign O[3] = sig_219;
assign O[2] = 1'b0;
assign O[1] = sig_128;
assign O[0] = sig_204;

endmodule
module mul16s_HHP(
	A, 
	B,
	Z
);

input signed [16-1:0] A;
input signed [16-1:0] B;
output signed [2*16-1:0] Z;

wire signed [2*(16-2)-1:0] tmpZ;
assign tmpZ = $signed(A[16-1:2]) * $signed(B[16-1:2]);
assign Z = $signed({tmpZ,{4{1'b0}}});
endmodule
module mul16s_HEB(
	A, 
	B,
	Z
);

input signed [16-1:0] A;
input signed [16-1:0] B;
output signed [2*16-1:0] Z;

wire signed [2*(16-0)-1:0] tmpZ;
assign tmpZ = $signed(A[16-1:0]) * $signed(B[16-1:0]);
assign Z = $signed(tmpZ);
endmodule
module mul8s_1KR3 ( A, B, O );
  input [7:0] A;
  input [7:0] B;
  output [15:0] O;

  wire C_6_1,C_6_7,C_7_0,C_7_1,C_7_2,C_7_3,C_7_4,C_7_5,C_7_6,C_7_7,S_0_7,S_1_6,S_2_5,S_3_4,S_4_3,S_5_2,S_6_0,S_6_1,S_6_2,S_6_3,S_6_4,S_6_5,S_6_6,S_6_7,S_7_0,S_7_1,S_7_2,S_7_3,S_7_4,S_7_5,S_7_6,S_7_7,S_8_0,S_8_1,S_8_2,S_8_3,S_8_4,S_8_5,S_8_6,S_8_7,S_8_8;

  assign S_0_7 = 1'b1;
  assign S_1_6 = 1'b1;
  assign S_2_5 = 1'b1;
  assign S_3_4 = 1'b1;
  assign S_4_3 = 1'b1;
  assign S_5_2 = 1'b1;
  assign S_6_0 = (A[6] & B[0]);
  HAX1 U292374 (.A(S_5_2), .B((A[6] & B[1])), .YS(S_6_1), .YC(C_6_1));
  assign S_6_2 = (A[6] & B[2]);
  assign S_6_3 = (A[6] & B[3]);
  assign S_6_4 = (A[6] & B[4]);
  assign S_6_5 = (A[6] & B[5]);
  assign S_6_6 = (A[6] & B[6]);
  HAX1 U292380 (.A(1'b1), .B(~(A[6] & B[7])), .YS(S_6_7), .YC(C_6_7));
  HAX1 U292381 (.A(S_6_1), .B(~(A[7] & B[0])), .YS(S_7_0), .YC(C_7_0));
  FAX1 U292382 (.A(S_6_2), .B(C_6_1), .C(~(A[7] & B[1])), .YS(S_7_1), .YC(C_7_1));
  HAX1 U292383 (.A(S_6_3), .B(~(A[7] & B[2])), .YS(S_7_2), .YC(C_7_2));
  HAX1 U292384 (.A(S_6_4), .B(~(A[7] & B[3])), .YS(S_7_3), .YC(C_7_3));
  HAX1 U292385 (.A(S_6_5), .B(~(A[7] & B[4])), .YS(S_7_4), .YC(C_7_4));
  HAX1 U292386 (.A(S_6_6), .B(~(A[7] & B[5])), .YS(S_7_5), .YC(C_7_5));
  HAX1 U292387 (.A(S_6_7), .B(~(A[7] & B[6])), .YS(S_7_6), .YC(C_7_6));
  HAX1 U292388 (.A(C_6_7), .B((A[7] & B[7])), .YS(S_7_7), .YC(C_7_7));
  assign {S_8_8, S_8_7, S_8_6, S_8_5, S_8_4, S_8_3, S_8_2, S_8_1, S_8_0} = {C_7_7, C_7_6, C_7_5, C_7_4, C_7_3, C_7_2, C_7_1, C_7_0} + {1'b1, S_7_7, S_7_6, S_7_5, S_7_4, S_7_3, S_7_2, S_7_1};
  assign O = {S_8_7,S_8_6,S_8_5,S_8_4,S_8_3,S_8_2,S_8_1,S_8_0,S_7_0,S_6_0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0};

endmodule