Computer Architecture: Fundamentals and Principles of Computer Design, Second Edition

Introduction to Computer Architecture What is Computer Architecture? Architecture vs. Implementation Brief History of Computer Systems The First Generation The Second Generation The Third Generation The Fourth Generation Modern Computers - The Fifth Generation Types of Computer Systems Single Processor Systems Parallel Processing Systems Special Architectures Quality of Computer Systems Generality and Applicability Ease of Use Expandability Compatibility Reliability Success and Failure of Computer Architectures and Implementations Quality and the Perception of Quality Cost Issues Architectural Openness, Market Timing and Other Issues Measures of Performance CPU Performance Memory System Performance I/O System Performance System Benchmarks Chapter Wrap-Up Review Questions Computer Memory Systems The Memory Hierarchy Characteristics of an Ideal Memory Characteristics of Real Memory Devices Hierarchical Memory Systems Main Memory Interleaving High-Order Interleaving Low-Order Interleaving Logical Organization of Computer Memory Random Access Memories Sequential Access Memories Associative Memories Cache Memory Locality of Reference Hits, Misses, and Performance Mapping Strategies Cache Write Policies Cache Replacement Strategies Cache Initialization Memory Management and Virtual Memory Why Virtual Memory? Virtual Memory Basics Paged Virtual Memory Segmented Virtual Memory Segmentation with Paging The MMU and TLB Cache and Virtual Memory Chapter Wrap-Up Review Questions Basics of the Central Processing Unit The Instruction Set Machine Language Instructions Functional Categories of Instructions Instruction Addressing Modes Number of Operands Per Instruction Memory-Register vs. Load-Store Architectures CISC and RISC Instruction Sets The Datapath The Register Set Integer Arithmetic Hardware Arithmetic with Real Numbers The Control Unit A Simple Example Machine Hardwired Control Unit Microprogrammed Control Unit Chapter Wrap-Up Review Questions Enhancing CPU Performance Pipelining Arithmetic Pipelines Types of Arithmetic Pipelines Pipeline Scheduling and Control Instruction Unit Pipelines Basics of an Instruction Pipeline Control Transfers and the Branch Penalty Branch Prediction Delayed Control Transfers Memory Accesses - Delayed Loads and Stores Data Dependencies and Hazards Controlling Instruction Pipelines Characteristics of RISC Machines Enhancing the Pipelined CPU Superpipelined Architectures Superscalar Architectures Very Long Instruction Word (VLIW) Architectures Chapter Wrap-Up Review Questions Exceptions, Interrupts, and Input/Output Systems Exceptions Hardware-Related Exceptions Software-Related Exceptions Input and Output Device Interfaces Program-Controlled I/O Memory-Mapped I/O Separate I/O Interrupt-Driven I/O Direct Memory Access Input/Output Processors Chapter Wrap-Up Review Questions Parallel and High-Performance Systems Types of Computer Systems - Flynn's Taxonomy Vector Processors Array Processors Multiprocessor Systems Multicomputer Systems Interconnection Networks for Parallel Systems Purposes of Interconnection Networks Interconnection Network Terms and Concepts Static Interconnection Networks Buses Linear and Ring Topologies Star Network Tree and Fat Tree Networks Nearest-Neighbor Mesh Torus and Illiac Networks Hypercube Networks Routing in Static Networks Dynamic Interconnection Networks Crossbar Switch Recirculating Networks Multistage Networks Chapter Wrap-Up Review Questions Special-Purpose and Future Architectures Dataflow Machines Artificial Neural Networks Fuzzy Logic Architectures Quantum Computing Chapter Wrap-Up Review Questions Appendix: Reference and Further Reading Materials with Web Links