Advances in ultrabook™ platform power management

In the beginning (at least the early 90s) PC power management was architected such that it traveled with the PC and would work regardless of the Operating System (OS); you loaded DOS", Windows" or Unix" and the power management just worked. This was accomplished through a combination of special CPU modes (System Management Mode/Interrupt [1]), hardware, and BIOS software (e.g. Advanced Power Management, APM, interface) which allowed a special power management software layer to be called to implement the power management features regardless of the operating mode of the processor. The main power management techniques involved turning off or slowing down idle devices, and freezing operation when the computer was not needed for a long period of time (sleeping). As the OS was bypassed, policy was invoked at a very low level and tended to judge activity by what the hardware could see (interrupts, memory accesses) which resulted in many false positives (e.g. screen blanking in the middle of a presentation).The next step in platform power management came in the guise of OS cooperative power management through the development of the Advanced Configuration and Power Interface, ACPI [2], standard which allowed the operating system to control the hardware, make policy decisions (e.g. doing a presentation, don't turn off the display) and enable finer grain control of the power.In particular CPU power management could now be controlled through the OS scheduler such that it was only running when there was work to be done. Previously the CPU clock was slowed (divided by "n"), or stopped for short periods of time; but now the OS scheduler worked hand-in-hand with processor clock control by placing the CPU in a C-state when not working. Each CPU would have multiple C-states where the exit latency would increase with higher power savings, allowing the OS to schedule "deeper" c-states while the system was idle and "lighter" c-states with the system was active which allowed the system to adjust the power and performance based on the activity of the system.This dramatically increased the CPU power savings as instead of scaling the CPU power by the divided clock rate (divide the clock by 2, 4, 8, 16, ...), the power was now related to the C-state duty cycle where an idle system might be active for 1 us for a 15.6 ms preempt period (0.01% ON/C0 duty cycle). When examining the power of ACPI PC's, the CPU is very well power managed, while we see an offset of platform power referred to as the PC idle power floor.As the platform consists of many subsystems with their own low power states, this power floor can be seen as the power resulting from the power of these different subsystems, plus, and more importantly, the impact of the behavior of these subsystems on each other (i.e. impact of interrupts, bus cycles and use of computer resources).As an example, a 1 mW Bluetooth" radio does not consume much energy itself, but due to its USB [3] interface it can assume exponentially more platform energy. In USB the interface stays connected by periodically reading small descriptors from memory (i.e. every millisecond); this very small amount of activity keeps all of the subsystems, between it and main memory, out of their respective low power states and creates these "platform power effects" that are exponentially higher than the power measured by the Bluetooth subsystem by itself!This PC platform power floor can be thought of as being caused by the seemingly random and uncoordinated activity of the different platform subsystems on each other.The goal of the new Intel™ Power Optimizer architecture was to bring this idle power floor down while still being able to follow our legacy ACPI goals: power management travels with the platform, works with any compliant OS, and work seamlessly with other PC standards (USB, PCIe, ...).To achieve these goals, we looked to power manage the platform similar to how the CPU is power managed in ACPI, where the entire platform could be aggressively scheduled to transition between active and idle states. The main technique was to change the behavior of the system based its activity in order to maximize the opportunities for scheduling these platform power states and thus reducing the idle power floor.This presentation outlines some of the Power Optimizer techniques used to achieve these goals in Ultrabook platforms.