Low Temperature Solid State Gold Bonding of Si Chips to Alumina Substrates

Summary Pure Au joint is successfully made between silicon (Si)chips and alumina substrates by a low temperature low pres-sure solid-state bonding process. There is no molten phaseinvolved in the process. Ductile Au joints can deform torelease the stress caused by CTE mismatch between Si andalumina substrate. The 260 C bonding temperature is compat-ible with the reﬂow temperature of lead-free solders used inindustries. SEM images exhibit nearly perfect Au joints with-out voids on the interfaces. The bonding strength of ﬁve sam-ples tested all passes MIL-STD-883G standard. The Au jointdoes not contain any intermetallic compound (IMC). All reli-ability issues associated with IMC and IMC growth in lead-free solder joints do not exist any more [14]. This novel bond-ingprocesscanbeappliedtovariouselectronicdevicesthatrequire high thermal performance or high operation tempera-ture. It can be used to bond any two objects that can be coatedwithsmoothAulayers. References [1] Tummala, R. R., Rymaszewski, E. J., and Klopfenstein, A. G., 1997, Micro-electronics Packaging Handbook, 2nd ed., Chapman & Hall, New York.[2] Gooch, R., Schimert, T., McCardel, W., Ritchey, B., Gilmour, D., andKoziarz, W., 1999, “Wafer-Level Vacuum Packaging for MEMS,” J. Vac. Sci.Technol. A, 17(4), pp. 2295–2299.[3] Low, Y. L., Scotti, R. E., Ramsey, D. A., Bolle, C. A., O’Neill, S. P., andNguyen, K. C., 2003, “Packaging of Optical MEMS Devices,” ASME J. Elec-tron. Packag., 125(3), pp. 325–328.[4] Barrett, J. J., Hayes, T. F., Doyle, R., Mathuna, S. C. O., Yamada, T., andBoetti, A., 1992, “Reliability Evaluation of High Pin Count Hermetic CeramicIC Packages for Space Applications,” IEEE Trans. Compon. Hybrids Manuf.Technol., 15(6), pp. 1093–1104.[5] Abtew, M., and Selvaduray, G., 2000, “Lead-Free Solders in Micro-electronics,” Mat. Sci. Eng. R., 27(5-6), pp. 95-141.[6] Suganuma, K., 2001, “Advances in Lead-Free Electronics Soldering,” Curr.Opin. Solid State Mater. Sci., 5(1), pp. 55–64.[7] Olsen, D. R., and Berg, H. M., 1979, “Properties of Die Bond Alloys Relatingto Thermal Fatigue,” IEEE Trans. Compon. Hybrids Manuf. Technol., 2(2),pp. 257–263.[8] Frear, D. R., Burchett, S. N., Morgan, H. S., and Lau, J. H., 1994, TheMechanics of Solder Alloy Interconnects, Van Nostrand, New York.[9] Taklo, M. M. V., Stora˚s, P., Schjolberg-Henriksen, K., Hasting, H. K., andJakobsen, H., 2004, “Strong, High-Yield and Low-Temperature Thermocom-pression Silicon Wafer-Level Bonding with Gold,” J. Micromech. Microeng.,14(7), pp. 884–890.[10] Tsau, C. H., Spearing, S. M., and Schmidt, M. A., 2002, “Fabrication of Wa-fer-Level Thermocompression Bonds,” J. Microelectromech. Syst., 11(6), pp.641–647.[11] Park, G. S., Kim, Y. K., Pak, K. K., Kim, J. S., Lee, J. H., and Ju, B. K., 2005,“Low-Temperature Silicon Wafer-Scale Thermocompression Bonding UsingElectroplated Gold Layers in Hermetic Packaging,” Electrochem. Solid-StateLett., 8(12), pp. G330–G332.[12] Lee, C. C., Wang, D. T., and Choi, W. S., 2006, “Design and Construction ofa Compact Vacuum Furnace for Scientiﬁc Research,” Rev. Sci. Instrum.,77(12), p. 125104.[13] Engelmaier, W., 1991, “Solder Attachment Reliability, Accelerated Testing,and Results Evaluation,” in Solder Joint Reliability Theory and Applications,J. H. Lau, ed., Van Nostrand, New York, pp. 545–587.[14] Lee, C. C., Wang, P. J., and Kim, J. S., 2007, “Are Intermetallics in SolderJoints Really Brittle?,” Proceedings of the 57th IEEE Electronic Componentsand Technology Conference, Reno, NV, May–June 2007, pp. 648–652.