Some Notes On Multiplicative Congruential Random Number Generators With Mersenne Prime Modulus 261-1.

Multiplicative congruential random number generators of the form sn = a*Sn_i mod m using the Mersenne prime modulus 2-1 are examined. Results show that they can provide sufficiently long pseudo-random sequences that can be implemented efficiently using 64 bit accumulators without the need of a costly division operation. INTRODUCTION Random number generators are widely used in computer simulations to provide approximate solutions to statistical problems. Hardware devices can efficiently generate non-uniform random sequences of infinite periodicity (Fort et al, 2003), which can be transformed into uniform distributions (Ya et al, 2002). However, all algorithmically implemented random number generators have a period length associated with the random sequences they generate. They are typically described as "pseudo-random" generators (Mascagni and Srinivasan, 2000). Ideally, the period length of the sequence should be long enough so that the period does not repeat within the simulation. In most cases, having the period repeat can severely compromise the results of the simulation. For a good reference on pseudo-random number generators and simulation, see L'Ecuyer, (1990). Pseudo-random sequences should also be "statistically" random. There are barrages of tests that can be performed to determine if a random number generator falls within acceptable limits. The most popular of these tests is the spectral test (Tezuka, 1987; Tang and Kao, 2002; L'Ecuyer and Couture, 1997). In his classical book "The Art of Computer Programming", Donald Knuth (1997) states, "Not only do all good generators pass this test, all generators now known to be bad actually fail it". Random number generators should also be fast. They should be implemented using a minimum number of CPU clock cycles. There are many types of pseudo-random number generators in use today. Common ones include generalized frequency shift-register generators (Wu, 2001), linear congruential generators (Lehmer, 1949) and matrix-congruential generators (Deng et al, 1992). One of the oldest and most commonly implemented random number generators is the linear congruential random number generator (LCG) or Lehmer generator as proposed by D.H. Lehmer (1949) which uses a recurrence relation of the form s„ = (a*sn_i + c) mod m to generate a sequence of pseudo-random integers where the integer a is called the multiplier, the integer c the increment, and the integer m the modulus . The initial integer value of the sequence (so) is called the random seed and is typically provided by a hardware device such as the system clock. If the value of c is taken to be zero, the resulting generator is called a multiplicative linear congruential random number generator (MLCG). In order to generate a pseudo-random sequence of periodicity m-1, the multiplier must be chosen to be relatively prime to m. However, MLCG's with non-prime moduli tend to exhibit non-random characteristics (Knuth, 1997), therefore a natural choice for the modulus is a prime number. Since all elements, other than the identity, of the multiplicative group of integers mod p, where p is prime, are generators of the group, choosing m to be prime guarantees a period length of m-1 independent of the multiplier (other than those multipliers congruent to 0 or 1 mod p). A Mersenne prime is a prime number of the form 2-l. MLCG's with Mersenne prime moduli have many nice properties and have been studies extensively (Entacher, K. 1998; Fishman and Moore, 1986; Wu, 1997; Matsumoto and Nishimura, 1998; Smith, 1971). It has been shown that the Mersenne prime 2-1 is a good choice for MLCG's implemented on CPUs with 32 bit accumulators (Fishman and Moore, 1986; Smith, 1971; Park and Miller, 1988). In fact, Carta (1990) shows how to implement MLCG's with modulus m = 2-1 on 32 bit CPUs without using a costly division operation. RESULTS Over the years the clock speeds of processors have increased to the point where MLCG's can quickly generate all 2 2 numbers in the sequence generated by MLCG's with modulus 2-1, causing the period to repeat. When the Mips R4000 RISC CPU was introduced in 1991, 64-bit CPU's became commercially available for use in high-end workstations. The newer desktop CPU's, such as the Intel Itanium and the Motorola GigaProcessor Ultralite have 64 bit registers. Prime moduli close to, but smaller than 2 are natural choices. The largest Mersenne prime less than 2 is 2-1. This prime number is particularly attractive choice for the modulus. First, it has a very long period length. To get an idea of the sequence length, a processor generating 1 trillion random numbers per second would take over 11 years to repeat the sequence. Second, Carta's method for implementing MLCG's with modulus 2-1 in 32 bit registers without using a division operation (Carta, 1990) can be modified to work for the modulus 2-1 in 64 bit registers. The construction is given below: Given the MLCG sn+i = as„mod (2 -1) Express asn and 2 p+q This form has a representation in hardware. The product of two signed 63 bit integers (a and sn) is stored in two 64 bit accumulators, one storing the high order bits (p) and one storing the low order bits (q). We can then write: sn+i = asn mod (2 -1) = (2p+q) mod (2-1) = [(2-1) (2p+q)(l/(2-l))] mod (2-1)