Thermomechanical Reliability Study of Flip Chip Solder Bumps: Using Laser Ultrasound Technique and Finite Element Method

Current techniques for nondestructive quality evaluation of solder bumps in electronic packages are either incapable of detecting solder bump cracks, or unsuitable for in-line inspection due to high cost and low throughput. As an alternative, a solder bump inspection system is being developed at Georgia Institute of Technology using laser ultrasound and interferometric techniques. This system uses a pulsed Nd:YAG laser to induce ultrasound in electronic packages in the thermoelastic regime; it then measures the transient out-of-plane displacement responses on the package surfaces using laser interferometric technique. The quality of solder bumps in electronic packages is evaluated by analyzing the transient responses. This paper presents a systematic study on thermomechanical reliability of flip chip solder bumps using laser ultrasound-interferometric inspection technique and finite element (FE) method. The correlation between the failure parameter extracted from FE simulation for evaluating solder bump reliability and quality degradation characterization of solder bumps through noncontact, nondestructive laser ultrasound testing has also been investigated. Accelerated thermal cycling (ATC) tests were performed in two phases on flip chip package (FCP) test vehicles with 63Sn37Pb solder bumps. In phase I, four boards were thermal cycled up to 70 cycles. Every ten cycles, the boards were taken out of the chamber and FCPs on each board were tested for detecting presence of cracks using resistance and laser ultrasound testing methods. These measurements were repeated every 10 cycles and stopped after 70 cycles. Laser ultrasound testing results show that starting from 10 cycles, testing values began to increase gradually until 50 cycles when there was a sharp jump (through crack verified at 50 cycles with cross section). Cross section was done only after 70 cycles, and the results show that solder bumps at the corners had through cracks, while solder bumps at the center had partial cracks. Phase II study was a refinement of phase I study. In phase II study, seven boards were thermal cycled starting from 27 cycles to 56 cycles at an increment of approximate five cycles. After every five cycles, only one board was pulled out and tested in order to track crack initialization and propagation in solder bumps. Smaller thermal cycle increments were used in phase II to help determine when cracks initiated and propagated. It was shown that laser ultrasound technique could nondestructively track solder bump crack propagation due to thermal fatigue. The Anand's viscoplastic constitutive model was used in FE simulation to describe the inelastic deformation behavior of solder bumps in thermal cycling. A 3-D FE model was implemented using ANSYS on the same FCP as used in the ATC testing. The stress-strain results were extracted from FE modeling and the inelastic strain energy density (SED) increment per cycle calculated from the critical solder bump was used as a failure parameter. In this paper, it was demonstrated that there is a good correlation between the inelastic SED increment extracted from FE simulation and experimental results from nondestructive laser ultrasound testing.