Special Issue on the 57th International Midwest Symposium on Circuits and Systems

This special issue contains extended papers of the 57th International Midwest Symposium on Circuits and Systems, selected by the Guest Editors based on reviewers’ comments, attendees paper grading and session chair recommendations. The International Midwest Symposium on Circuits and Systems is the oldest Circuits and Systems Symposium sponsored by the IEEE CAS Society. This conference contributes to its strong history by reporting the latest research results and innovations in the field of circuits and systems through Distinguished Speakers featuring the newest innovations relevant to this field and shedding light on its evolution towards breaching the gaps among technologies. MWSCAS-2014 received 336 paper submissions from 32 countries. The papers were evaluated by a minimum of three reviewers. Among all these contributions, a subset of these papers were invited for this special issue. The invited papers went through a peer review process consisting of world recognized experts in related fields. After a long journey, 15 papers were finally accepted. In the first paper, Tripurari et al., propose a wide-band RF channelizer architecture that splits the 0.6-9 GHz input spectrum in seven channels of 1.2 GHz each. The architecture enables multi-Gbps aggregate data reception with the property of agile switching between channels. The average power consumption is only 435 mW while achieving a dynamic range between 58 and 63 dB. Two compact switchless dual-band load networks for class-E power amplifier (PA) operating at 800 and 1900 MHz are reported by Li et al. The PA with transformer-based load network achieves an outstanding power added efficiency of 68.6 % at low band and 62.6 % at high band at an output power of 37.8 and 36.7 dBm, respectively. The LC-based PA shows a similar PAE of 68.3 and 60 % at low band and high band, respectively. A MIMO satellite communication system with accelerated dual paths (ADP) asynchronous design authored by Che et al., reports an asynchronous design approach for multiple input multiple output satellite communication systems. Authors employ an ADP design; the data flow between the two paths, the increase the reliability of the system by circumventing transient faults induced delay. The proposed design can decrease the delay overhead of the entire system from 43.5 to 19.8 % at the fault rate of 400/clock cycle. Ming et al., present a receiveside circuitry that merges the cancellation of both near-end and far-end crosstalk (NEXT/FEXT) and can automatically adapt to different channel environments. The techniques are demonstrated in a prototype fabricated in a 65-nm CMOS process demonstrating effective crosstalk cancellation at 10 Gb/s. Optimal two-stage comb decimators are reported by Salgado et.al. Authors show how to choose the decimation factor of the first stage in order to get simultaneously the best possible power reduction with optimal area tradeoff, in a comparison with a single cascade integrator-comb architecture. The issues related to susceptibility to supply noise in class D amplifiers are analyzed by He and coauthors. In this paper, the class D PSRR is analytically & Jose Silva-Martinez jose-silva-martinez@tamu.edu