Developing and commissioning BABAR Electronics

DEVELOPING AND COMMISSIONING BABAR ELECTRONICS A.J. Lankford, Department of Physics and Astronomy, University of California, Irvine, CA 92697-4575 (email: lankford@lankford.ps.uci.edu) for the B A B AR Collaboration Abstract Many aspects of the architecture and performance requirements of the electronics system for the B A B AR Experiment are similar to those for the much larger LHC experiments. We briefly describe the requirements and architecture of B A B AR Electronics, focusing on aspects that are similar to the LHC. We then discuss the experience of developing the system from design to operation, including such topics as prototype and system tests, manufacturing, grounding and shielding, integration, and initial performance. We focus primarily on front-end electronics, including IC development; however, we also discuss data acquisition. 1. INTRODUCTION This rather informal paper is a recollection of the experience of developing and commissioning the B A B AR Electronics System. Hopefully, this account can serve as a reminder to LHC electronics developers of some of the issues, concerns, and pitfalls to remember during the development process. This paper is not intended as a description of the B A B AR Electronics System. A brief introduction will point out how the B A B AR Electronics System resembles electronics systems under construction for the LHC experiments, despite the fact that it differs in scale. However, neither the common aspects of the system nor the detector-specific electronics will be described. Summary descriptions of these aspects can be found in the paper that I presented at the 1998 LHC Electronics Board Workshop [1] and in the papers to which it refers, and in references [2-5]. Furthermore, this paper is by no means a complete guide to the Do's and Don'ts of electronics development. It is anecdotal, relating personal impressions and the comments of people involved in the B A B AR project. It recounts some of the problems and setbacks encountered during development of B A B AR Electronics; however, it does not recount all. It also includes lessons learned by the individuals during prior projects that were felt to have been successfully applied to B A B AR . Several of the other leaders of the B A B AR electronics development contributed to the preparation of this paper. I have frequently included their comments verbatim in the text. In these cases, I have chosen to include their comments as quotations without identifying the specific contributor since these comments were often informal. The contributors of the quotations are identified in the Acknowledgements. 2. THE BABAR EXPERIMENT The B A B AR Experiment will study CP violation at the SLAC B-Factory. Its detector consists of five major systems: a silicon vertex tracker [6], a cylindrical drift chamber with dE/dx capability [7], a particle identification system (DIRC) based on imaging of Cerenkov rings [8,9], a cesium-iodide crystal calorimeter [10], and a muon identification system (IFR) based on resistive plate chambers [11]. The specialised requirements of each detector system are addressed by front-end electronics customised to the detector technology but integrated into a uniform data acquisition architecture. 3. BABAR ELECTRONICS OVERVIEW In order to address the requirements of its detector and operating environment, B A B AR has designed an electronics, trigger, and data acquisition architecture that is quite similar to architectures being designed for the LHC. For instance, the B A B AR architecture is multilevel, pipelined, and nearly deadtime free. It employs detector- specific custom ICs to realise the full performance of detector systems. Front-end electronics is detector- mounted. It simultaneously digitises analogue signals, writes data to buffers, and is read out to the data acquisition system. Although analogue front-ends and