As in the present case, the integration density of current EPLDs makes it possible to realize the transient recorder with few EPLDs and a handful of other components. The relative low effort in realizing a prototype caused by using EPLDs motivates building an EPLD based transient recorder to support simulation in a VHDL environment very close to system level conditions where signals pass through the same components. So, interactions between signals and system environment can be observed by signal exchange between system environment and simulation. These frames have been scaled to 200x150 pixels with xv , stored as GIFs, and rearranged as a sequence of frames using Microsoft GIF Animator . Such failure could be hidden by viewing just single frames, and would be difficult to discover by inspection of video signal plots.
Similar problems are possible in digital generation of color video signals.
For example, the exchange of video signals between simulation and real TV helps to approximate the behavior of a digital simulation model of a TV with real ones step by step. All components of the circuit VidTrans have been described in VHDL and simulated in common on a system level VHDL environment. Also the contol program PrnTrans has been integrated into the board level simulation. Communication between control program and the behavioral VHDL model of parallel printer port interface of VidTrans was realized via files. Functional simulation was done with the Synopsys VHDL System Simulator .