The 16-bit instructions also reduce the amount of fetch traffic on an external bus, further reducing power consumption. Finally, the instruction width keeps system performance high even when a design uses 16-bit memory to minimize costs. For embedded applications that require real-time processing, MCore provides an exception mechanism that is both flexible and fast. MCore uses a relocatable vector table that contains 128 exception vectors. The fast interrupt request uses a dedicated set of shadow registers that eliminates having to preserve the processor's context on the stack before the interr upt handler executes.
Software can reserve the alternate register file for exclusive use by interrupt handlers.
MCore's hardware accelerator interface supports tightly coupled hardware function blocks that extend the MCore architecture. For flexibility, the interface is generic in nature and makes few assumptions about the actual processing being accelerated. The HAI operates independently of the memory and peripheral interfaces to allow overlapped execution. A base set of instruction primitives allows the explicit transfer of operands and instructions to and from external function blocks. Hardware handshaking can control the rate of the instruction and data transfers.