The first variable controls the bit and error count, and the second controls the counter reset. The first instructions in the interrupt function normally push some or all registers used onto the stack. Thus, the interrupt overhead occurs only once. The result is improved system performance. Listing 1 is an example of standard interrupt-handling software.
Standard practice involves vectoring, pushing, and popping registers for each interrupt request.
A more sophisticated function in Listing 2 tries to handle as many interrupt requests as the peripheral requires. Delay line eases Spice dead-time generation Christophe Basso, On Semiconductor, Toulouse, Cedex, France Generating complementary clock signals in a Spice simulation is an easy task. However, this task gets much harder if you need to introduce some dead time into the signals. The circuit in Figure 1a overcomes this typical Spice problem. The input clock drives two delay lines that feature the same specifications.