This site is best experienced when you have JavaScript enabled. Please enable JavaScript and refresh this page. Well, the engineers at Siemens AG did, with their advanced main processing unit design. With the help of Mentor Graphics' autorouting and signal analysis tools, the team used Mentor Graphics' Concurrent Board Process and achieved first-pass success for this challenging design. In other words, each MPU in the pair executes the same instruction sequence on the same clock edge at the same time.
Telecom is an extremely competitive, fast-paced market.
To keep costs down, we needed to get this design out the door on the first pass. The designers at Siemens started with preplacement, routing and analysis of the critical paths. The physical pinout of the ASICs was not fixed by the ASIC vendor. Instead, the MPU designers determined the optimal pinout based on their routing constraints. That way, we could decide the best pinout for the devices during layout and directly revise the ASIC design.