The following diagram exemplifies one option. This variation is called big-endian byte ordering. Similarly, if we were to do a load from big-endian memory into a register capable of holding multiple bytes of data, then we would start by loading the highest byte of the register from the starting byte in memory. The other variation is called little-endian byte ordering. Some instruction sets support big-endian byte ordering.
Some instruction sets support little-ending byte ordering.
Examples include IA32 and Alpha. A memory access is aligned if the access starts on a natural boundary for the unit of data being accessed. A load from memory into a 32-bit register will require reading 4 memory locations. If the ISA were to restrict access to memory to be aligned, then the design of the memory system hardware becomes significantly easier. However, this places restrictions on the software layer that may not be acceptable.