The design and implementation of these systems pose new research problems. Temporal Partitioning and Scheduling Data Flow Graphs for Reconfigurable Computers . Specialized configurable architectures which are utilized for speeding up specific applications are replacing some ASICs.
Some applications also exploit optimization based on a specific input instance of the computation.
New algorithmic techniques are needed to schedule the computations. Existing algorithmic mapping techniques focus primarily on loops in general purpose programs. Temporal partitioning and scheduling data flow graphs for reconfigurable computers . In IEEE Transactions on Computers, June 1999. Temporal partitioning and scheduling data flow graphs for reconfigurable computers .