The I2C bus consists of two lines, one for the data and one for the clock. Transmission is initiated via a start condition, after which an address byte is transmitted. The byte consists of a 7-bit device address and a direction bit. If a slave recognizes its own address, it acknowledges the transmission. Then, any number of bytes can be transmitted to the slave, until the last byte is not acknowledged.
Transmission ends with a stop condition.
The data is transferred synchronously with the high state of the clock line, when the state of the data signal has to be stable. This rule is broken only for the generation of the start and stop conditions, which encapsulate a transmission. Transfer speed is not fixed, but specifications guarantee speeds up to 100 kHz. If a device cannot cope with the transmission speed it may hold down the clock line, and thus slow the process. When considering the data transmission rate, we can thus only assume the best case, as there are no lower limits.