Our objective is to provide a tool that is easy enough to use that the actual project teams can run the tool to get the numbers they need. And what designers need is consistent timing and power models for the hundreds of memory blocks that are now being used in large designs, said Rod Dudzinski, vice president of corporate marketing at Silicon Metrics. When the user generates a specific instance, they have to interpolate and guess what the performance is. That is why we worked closely with them on this project. That netlist is entered into HSIM along with the foundry Spice models, which tell how fast transistors behave on the silicon.
Users then specify what type of memory they are modeling.
To do that they can import an existing Synopsys .lib model and repopulate the numbers in it, type about a paragraph of text, and it will automatically generate the entire model. From that, the tool creates a complete set of stimulus and a complete .lib model that have all the necessary measurements, said Dudzinski. The tool will also do automatic verification of the model, said Dudzinski. Dudzinski said that Silicon Metrics and Nassda are still trying to figure out whether they are going to jointly license and package their technologies. All rights reserved.