The functional units are multiplexed between the thread contexts. Most approaches store the thread contexts in different register sets on the processor chip. Latencies are masked by switching to another thread. Sequences of instructions are dynamically extracted from sequential binaries and speculatively executed by different processing elements or in multiple thread slots within a single processor. In case of misspeculation, the results of the speculative thread and of subsequent threads are discarded.
Threads start execution as soon as all operands are available.
Such threads may be generated with the aim to decouple memory accesses from execute instructions. Evripidou and Kyriacou propose Networks of Workstations as basis for multithreaded program execution. The hardware implementation of a thread synchronization unit to coordinate such workstations is presented. The overall basis is a decoupled dataflow architecture, where the thread synchronization unit is able to schedule the execution threads on the different workstations as processing elements. However, multithreading may also be applied for event handling due to its fast context switching ability.