The network processing engine maintains and executes the system management functions for the Cisco 7200 series and Cisco uBR7200 series routers. The NPE-200 has an R5000 microprocessor that operates at an internal clock speed of 200 MHz. The system controller provides hardware logic to interconnect the processor, DRAM, and the PCI-based system backplane bus. NPE-200 have unified cache SRAM that functions as the secondary cache for the microprocessor. Primary cache is closest to the processor core and has the fastest access.
Secondary cache has slower access than primary cache, but faster access than tertiary cache.
For example, a processor may have primary cache with separate instruction and data cache memory, but unified secondary cache. Cache memory physically located outside the processor is not integrated, and is sometimes referred to as external cache. To determine the memory configuration of your NPE, use the show version command. NPE 100 Memory Information Table 1-2 provide informations about memory specifications. These products are also available as DRAM upgrades.