On the DR Emulator, the PC may point to a location before the faulting instruction. This may make debugging slightly more challenging when dynamic recompilation is active. Dependencies Developers have been warned not to rely on timing of processor instructions, as exact instruction timings may not be consistent across processors or emulators. Code translation introduces timing anomalies. The first time a piece of code is executed, the code translation process requires extra time.
Subsequent executions are relatively fast.
The DR Emulator attempts to detect and deal with timing-dependent code. Whenever the 680x0 interrupt mask is raised to a non-zero level, code translation is temporarily suspended until the mask drops to zero. This means that any timing-dependent code running at interrupt time or running at a time when the interrupt mask has been raised will run with the interpretive emulator with relatively consistent timing. Inc. All rights reserved.