Close to 20 percent said C-language macros. The vast majority of respondents continue to use schematics and block diagrams for system architectural level design. In addition to the linear performance speedup provided by multi-threaded simulation, CycleDrive 3.1 includes a number of algorithmic optimizations that improve overall simulator performance by up to a factor of two. The tool employs the same logic coning and combinatorial block levelization techniques for both single and multi-threaded simulations. In multi-threaded mode, it automatically identifies, groups, and schedules the appropriate logic blocks for parallel execution.
Users invoke multi-threaded mode at code generation time with a simple command line option.
FrontLine Design Automation Inc. 2860 Zanker Rd. Representatives from the company will be demonstrating the PureSpeed Verilog simulation family in the Digital Equipment Corp. booth at the exhibition. FrontLine Design Automation Inc. 2860 Zanker Rd. O'Rourke joins FrontLine from Virtual Machine Works where he held the position of vice president of business development for the company's digital logic emulation systems. Prior to Virtual Machine Works, O'Rourke was director of field operations for Chronologic Simulation.