3 bins,'All True Data' Mode. From the Model 1810 CAT Module via TR line or from front panel differential ECL input. Terminated in 100 ohm Minimum width 10 nsec. Quenches the Acquisition Oscillator for the duration of the input width. Acquisition Oscillator is active and stable after a time equal to 4 times the Sync pulse width.
Synchronism is achieved with respect to the trailing edge of the Sync pulse.
0.1 time bins at start up. See Long Term Stability spec above. Here f is the Acquisition Oscillator frequency, i.e., input to the divide down circuit. All TDC modules assert their T pin on the following read data cycle. SS Significance 0 Valid action.