The state editor is another way that a design can be entered and synthesized to program a Xilinx chip. It will not warn you that you have an ambiguous state diagram. An ambiguous state diagram has one or more states that can go to two different next states on the same set of conditions.
State diagrams are also ambiguous if conditions occur for which no next state is given.
ABEL code for an ambiguous state diagram is very difficult to debug. When the program first starts, use the Design Wizard to define the inputs and outputs. You will have inputs for Reset, Clk, and Up. The inputs and outputs you defined should appear at the top of the state editor page. On Reset, the counter should go to the 000 state.