This saves cost, weight and board space critical to the highly competitive wireless market. Wireless designers faced with ever increasing demand for smaller, feature-packed handsets will look to new, higher density CSP memory packaging for future designs. With the Intel Stacked-CSP and FDI software, wireless manufacturers can essentially replace three devices with a single package.
Samples are now available.
Volume production will begin in the second half of 1999. In addition to the smaller footprint, Intel Stacked-CSP also provides for outrigger balls, for improved product stability during board soldering, using up to 72 balls to connect the CSP to the printed circuit board, with 0.8 mm pitch between balls. Intel Stacked-CSP is the latest addition to Intel flash package offerings, targeted to specific market needs. This saves board space and lowers part counts for a simpler design solution. The flexible block locking scheme also allows the system to independently lock and unlock every block in the device.