Learned about the testing process. There are more tests that can be run to better characterize ATM performance. There is a lot of data to correlate when mapping lab performance to the real world. Once this is done, we should be able to characterize how the ATM NAPs will perform under various conditions.
Today Bugs in buffering, clock, segmentation chips.
As a result, even a fixed ADSU could perform less than adequately in N to 1 configuration. VBR model requires back pressure in the form of rate shaping Lack of rate shaping in the ADSU makes a large buffer in ATM switch very important. Delay on WAN link is very important to simulate. Homogeneous hosts make test results easier to interpret. There are more tests that can be run to better characterize ATM performance.