Comparative Evaluation of Latency Reducing and Tolerating Techniques. The Sensitivity of Communication Mechanisms to Bandwidth and Latency. The Case for a Single-Chip Multiprocessor. It is often profitable to execute operations in parallel despite apparent a priori constraints because so many apparent constraints turn out to be bogus at run time. Speculative execution may be attempted by instruction or by thread.
Speculative execution is crucial in other domains such as databases.
A Language for Describing Predictors and its Application to Automatic Synthesis. A Hardware Mechanism for Dynamic Reordering of Memory References. IEEE Transactions on Computers, May 1996. The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. Software and Hardware for Exploiting Speculative Parallelism with a Multiprocessor.