InterHDL's staff is extremely responsive to problems, and will add tests once they are aware of them. You need to provide specific examples, and there must be some automated method of detection. I have seen suggestions implemented for the next release in very short order. I am also certain that in general synthesis checks apply primarily to Synopsys Design Compiler. All warnings may be suppressed in a global or case by case manner.
Some syntax errors have very little more than a pointer to where.
Usually these are easy to spot. Verilint-XL licensing has a poor licensing scheme. The first time a user accesses Verilint-XL it locks that license to the user for 27 minutes to that user. During the 27 minute time period, the same user may access verilint multiple times since they exclively own it. At the end of 27 minutes, another user can access it.