In this research we are investigating parallel algorithms for placement, routing, layout verification, logic synthesis, test generation, and fault simulation, and behavioral simulation. The parallel algorithms are designed such that they are portable across a range of parallel machines, including multiprocessor workstations, shared memory multiprocessors, message passing multiprocessors, and networks of workstations. Most ProperCAD related research papers are accessible through the above links. A concise listing of papers with full bibliographic entries is available in Postscript form as well as in BibTeX format. In this research we are investigating scalable, data partitioned parallel algorithms for placement, routing, layout verification, logic synthesis, test generation, and fault simulation, and behavioral simulation.
Work is ongoing on some of the above tools.
State assignment of finite-state machines. Test generation for sequential circuits based on a genetic algorithm. This work has been funded by the Advanced Research Projects Agency, by the National Science Foundation, and by the Semiconductor Research Corporation. We are working closely with several CAD companies such as Cadence, LSI Logic and Sierra Vista Corporation in transferring some of these parallel CAD tools to industry. Project Members Prof.