In theory this means that changing the step size does not affect the phase noise of the synthesizer. In practice however there is the problem of component noise floors. As the reference is divided down the noise cannot go lower than this floor, so only part of the 20 log N improvement occurs. However, when it is then multiplied back up to the output frequency, the full degradation occurs. This problem typically appears with digital dividers and small step sizes.
Nothing is lost due to noise floor.
Now say a 1 MHz step size is required. The noise is 10 dB worse. The noise is already 15 db worse for the 10 Mhz step size. To maintain good noise performance with small step size it is possible to down-convert the oscillator thereby keeping N low and avoiding the noise floor. A typical DDS might have a maximum output frequency of 40 MHz and a frequency resolution as fine as .002 Hz.