Each model has an entity declaration , which is contained in a file. The entity declaration filenames typically reflect the basic model function. For example, the entity declaration file for the RLC filter is called rlc.vhd . Each model has one or more architecture body . Each architecture body resides in its own file.
Users choose which architecture body they use at compile time.
Code listings for the various functional blocks are included throughout the examples. It is not required to read nor understand the VHDL-AMS model listings. They are included for those familiar with, or interested in VHDL-AMS modeling. You may skip the code listings and go directly to the topics relating to simulation. Code listings and schematics for the various functional blocks are included throughout the tutorial examples.