Us Real-Time Prototyping Settles the Design of a Mobile Handset by Stelios Podimatis A system prototype using programmable emulation hardware and FPGAs made it practical to iron out the bugs of a CDMA telecom design before fabricating silicon. ESL Design Entry Delivers a Chip Primed for Reuse by David Tonks Shifting to an HDL design methodology within a tight schedule, to allow reuse, called for a versatile design entry tool. By optimizing clock trees based on physical placement information, a new-generation clock tree generator will help Toshiba avoid timing failures. The Art of Embedding SRAM by Ron DiGiuseppe Designers must weigh performance, cost, and functionality trade-offs before choosing an appropriate design flow and testability methodologies. The downpour of data from accurate physical analysis threatens design productivity.
New tools seek to shore up the design flow.
Simulation by James Lee and John Miklosz Pentium II-based workstations running Windows NT offer a powerful platform for today's demanding EDA applications. 2001 CMP Media Inc. All rights reserved.