The DRLE also utilizes multi-mode architecture to merge conventional logic and interconnect cell functions into one cell, optimizing the resource balance between them according to each of the mapped applications. Through these developments, the DRLE can reconfigure itself at high-speed to the optimal configuration for the task at hand and the most suitable configuration for the characteristics of the data being processed. As a result, it offers a solution to the various needs being made for flexibility in processing, and realizes the concept of 'virtual hardware'. Conventional microprocessors, however, use a fixed configuration for performing processing functions. Software utilizes this fixed processing configuration to enable these conventional processors to perform a variety of tasks.
Virtual hardware is a new concept that has quickly gained attention in the semiconductor industry.
The concept involves programming various hardware configurations into a device so that an optimal configuration can be quickly selected and implemented for each task the processor has to perform. This method offers considerable increases in processing speeds as well as power reduction over conventional microprocessors, which are very difficult to use efficiently in applications such as data communications, multimedia processing and non-fixed continuous data streaming. This virtual hardware research and development effort began with investigation of programmable logic LSIs but changes of hardware configuration during processing operations proved slow, and detailed control proved problematic. Because of this, it was decided to pursue research into virtual hardware instead of programmable logic, and the result was the new dynamic reconfigurable logic engine announced today. The company is now developing design tools to program hardware configurations into the chip, while evaluating the DRLE in data communications and other processing applications and making determined efforts to introduce it to practical use.