Many circuits that we design are iterative in nature. That is, the circuit consists of a simple cell that is repeated some number of times. There are common patterns and some real opportunities to exploit these patterns, so we'll come back to this topic later, but for now, we just want to see how higher-order logic can be used to specify the behavior and structure of such devices. We can use the same example that we used for sequential circuits in an iterative example. Most hardware description languages have facilities for specifying these kinds of structures.
Questions Verify that the two unit delay specification is equivalent to the implementation.
There's a tricky existential witness. I'm not asking for you to debug the code, I'm asking what is different about what we're asking it to do here and what we asked it to do in the last lecture. Verify that the n unit delay circuit is equivalent to its specification. The existential witness here is exactly the same as it was for the 2 unit delay circuit. My answer is available.