Other chip companies that are just beginning their copper development efforts may have yields close to zero. Yield is a touchy subject for fabs, and hard data on copper production has yet to be disclosed. But it appears early results are disappointing. Copper interconnects require a manufacturing process significantly different from that of aluminum-based chips and therefore relatively untested. For most CMOS chips, aluminum lines are laid onto a dielectric bed, but copper lines are sprayed into a deep trench dug into the dielectric.
Potential pitfalls abound.
Often the molten copper is studded with tiny gaps, which drive up the chip's resistivity and must be filled with residual electrolyte solution from the electroplating process. The metal is also subject to corrosion during the CMP slurry process, and Hutcheson said IBM may be the only company to have solved this problem. The copper is also easily scratched during manufacturing. So complex is the process that many vendors are putting off copper as long as they can, and it does appear that certain types of chips won't benefit from copper until line widths drop below 0.15 micron. But when we looked at the tools that would be available to manufacture copper chips, it seemed like copper technology was moving further out and our 0.18-micron process was moving in, so the schedule was just too tight.