CMP is then used to nearly flatten the surface and remove any protruding oxide. CMP is a very critical process step, because the memory cells are very sensitive to any scratches or other surface damage. Yield loss from CMP problems can be very high. The uniformity of the CMP process can also be difficult to control, which may impair the visibility of the edges of the features on the chips during later metrology steps. In many cases, the registration targets used to measure the optical overlay are nearly invisible after CMP is performed.
Measurement problems are particularly prevalent when an opaque film has been deposited on the wafer.
A combination of low topography and mirroring can not only prevent optical overlay metrology tools from functioning but can also contribute to feature alignment uncertainty and potential yield loss. The short-term solution to the STI metrology challenge adopted by Micron Technology was to pattern and etch the opaque material off the registration targets before performing the photo steps for that level. Because these process steps were time-consuming and costly, Micron has been collaborating with Schlumberger to develop a new algorithm for an overlay tool that is capable of measuring very faint images. The first requirement for such a tool was the use of an optical spatial filter to enhance the quality of the image prior to measurement. Without such filtering, there would not be enough signal for any algorithm to be successful.