Optimisation is a key facet of the behavioural synthesis problem.
The process may be carried out at different levels in the processing, usually at the source or datapath level, or both. In a previous paper, we have reported a source level VHDL optimiser, which applies optimisation techniques derived from conventional sequential and parallel programming languages. In this paper, we describe a further set of optimisation transforms that may be applied at the source level to a VHDL behavioural description. These transforms have no conventional programming language counterpart, and are specific to hardware description languages.