The program then enters a dormant state for the appropriate time, during which the system is doing nothing except lighting the appropriate lights. After this period, which is most of the cycle, it turns off all lights, and then terminates the minor cycle, incrementing the count on D0-D5, the major cycle. The major cycle, indexed by the D lines, starts at 0 for the first student station and the right column. After reaching 48 it is addressing nonexistent columns and has no effect. But shortly thereafter the PC will experience the clock interrupt, and will take control, transfer the data, and reset the clocks.
More detailed information is available.
The controller currently in use is a wire-wrapped board, though it is in the process of being replaced by a new design on PC boards. For the wire-wrapped version, we have the clock circuit diagram and the diagram for the rest of the controller . For the new PC board version, which is on three boards, the documentation is separate for each piece. There are separate complete lists of pins and connections, part a, part b, and part c , and PC board layouts for part a, part b, and part c . Also available are the details of the microprogram in ROM and allocation of RAM addresses .