Just as important, the new process will make it easier to boost chip power than in the past. Still, a lot of work remains. To commercialize the process, the industry will have to adjust to a completely new way of making chips, said Sunlin Chou, senior vice president of the technology and manufacturing group at Intel. With current lithographic techniques, circuit patterns are reduced through a series of lenses and then get printed onto a silicon wafer. In EUV lithography, the pattern bounces off a series of highly polished mirrors during the reduction process.
Mirrors present a whole new cavalcade of scientific challenges.
Techniques for keeping dust out of the manufacturing process also have to be developed. Currently, anufacturers put a reticle, or membrane, on top of the wafer to capture debris. The reticle, though, interferes with the reflecting images. One possible solution now, he said, is thermothoresis, which involves creating an envelope of heated air. The conversion will also cost a lot of money.