The US-3 offers options such as a low latency pipeline, advanced data caching, and massive amounts of both core and system bus bandwidth. From the technological standpoint, this CPU is the most advanced 64-bit solution available today. Not only built for performance, the US-3 also offers several features to insure both data integrity and coherence. These options include L2 cache error correction, parity memory protection, and automatic error recovery. The main benefit of a short pipeline is the ability to process more instructions in fewer CPU clock cycles.
Most manufacturers use much longer pipelines to reach higher megahertz ratings in their CPU designs.
As the core pipeline lengthens, the speed of a CPU is more easily ramped to higher values. The downside is that the CPU requires more cycles to complete a given instruction than it does in shorter pipeline designs. The short core pipeline combined with the high system bandwidth allows each core unit to operate at maximum efficiency while retaining a low latency throughput. RISC executes all core operations natively, whereas CISC must first decode series of complex operations into smaller instructions before the core execution stage can perform the required tasks. While the distinction between the two standards is narrowing with each new generation of CPU designs, the fundamental premise remains the same.