The output bits of the instruction register control all the components directly. The x's in the component boxes, indicate how many bits of control are needed to control them. There are 16 x's on the diagram. Only 16 bits are needed from the instruction register. This is a nice match with 16 bit memory but as we'll see later, we are not restricted to 16 bits.
Operation is synchronous.
All data transfers take place on the positive clock edge. This allows many data paths to be active at the same time. Each component has at most two data paths feeding into it, one of them will be selected as needed. The data flows are all valid on the positive edge of the system clock. Data paths out of and into a block are valid at the same time since all transfers take place on the same clock edge.