Such combination is called cosimulation. 15, we show a refined specification for the system design shown in Fig. 8. Due to space limitations, the figure shows only a part of the refined specification. Since Poseidon executes simulation of system partitioned and codesigned at operation level, one can obtain accurate timing information such as the number of clock cycles, but at a cost of long simulation time. They used C and Verilog in describing the software and the hardware components, respectively.
Models interact each other by exchanging data using socket.
129-134, June 1992. An accurate timing can be achieved at the expense of simulation effort. DAC'92, Anaheim, USA, June 8-12, 1992. Therefore it provides a very accurate simulation. Since its targeting a specific application, it uses a fixed communication model between the hardware and software.