The VCS512 mkII is a Video Processing PCB designed as a successor to the Vision Dynamics VCS512 intelligent frame grabber. It is based on the IDT R3051 MIPS embedded processor running at 33MHz. Images are captured under software control via the serial input of the VRAMs. Captured data is accessible randomly by the processor bus.
Pixel data is packed four pixels per word.
An optional additional image memory module of 1 or 4 Mbytes is provided for storage of imtermediate processed data. If a grab is in progress, the displayed data will be that available at the output of the input look-up table. If non-grab, the output will be from the software selected image plane. It also responds to the overlay bits from the software selected graphics planes. The serial channels are data only and will be interfaces at RS232 levels, the former to allow for local terminal connection and the latter for longer distance communication.