This software is undergoing further evolution as RC distributive networks are being examined by several vendors as a possible refinement. The program provides files that can be used on the workstations and which include the actual metal delays of each net. Back-annotation must be run and accepted as final before the generation of the actual arrays. When a path is having timing problems after routing, the solutions are still those listed before, to reevaluate the problem and to determine an acceptable solution. Minor problems can often be solved by a post-route edit.
More serious problems require a more serious solution, including a return to the design phase.
All timing problems must be resolved before committing the design to production. Repeat 1. and 2. for a BiCMOS array series.