Interpretation of this expression immediately indicates that the output will be a logic low when the input conditions are met. Again, the expression describes what is required. The assertion of the C and D signals require logic highs. 10 Switch circuit demonstrating an asserted high output signal. The diagram shown in Fig.
Positive logic can obscure circuit understanding.
The conflicted condition is indicated by placing a dot over the input of the conflicted node. Not all mixed logic textbooks use the dot to indicate a conflict. However, the authors have found that using only the dot is most useful. The example of this notation is shown in Fig. Inspection of the output assertion level in the circuit diagram shows that the output will be a logic high when asserted.