It meant people could program the component to do things which the original builders of the IC never conceived. This allows parallel computation of operators and direct dataflow from the producers of an intermediate result to the consumers. Strictly speaking, the distinction is a bit artificial. The microprocessors we built a decade ago resembled the fully temporal computation, whereas today's superscalar and VLIW processors exploit some low-level parallelism. If I have a task with low data dependencies and high throughput requirements, it may require only a few instruction cycles on a decent size array of spatial processing elements, and hence require only a shallow instruction memory.
Processors have deep instruction memories.
The architectures we normally classify as configurable fall on the shallow instruction depth end of the continuum, whereas the architectures with deep instruction depth are normally classified as programmable. We've established that these reconfigurable architectures are different from conventional, general-purpose architectures. Reconfigurable architectures are interesting because they provide greater computing capacity per unit area than conventional alternatives. The metric we define abstracts away a number of details, and is, therefore, a bit crude, but it helps us see part of what is going on with these architectures. Here we show a slice of some of the better processor implementations over the last decade, along with the last decade of Xilinx FPGA implementations.