Pipe topologies can vary greatly. Additionally, multiple parallel pipes can be run simultaneously. PC ImageFlow element flow diagrams for each pipeline processor device provide a basis for algorithm mapping. These diagrams show all pipeline elements on the device, and all data pathways between them. After the pipeline elements needed to implement the algorithm are defined, a processing pipeline is built.
Most applications require efficient allocation of processing resources.
The goal, therefore, is to choose paths that contain the required elements, and include only those elements that are actually needed. Bypassed elements are then available to implement another portion of the algorithm, or another algorithm in a different pipe that can run simultaneously with the first. Next, attribute-setting functions are called. Once the pipe has been built and the processing attributes have been set, the next step is to arm the pipe. The DSM traces each pipe's topology, determines the amount of delay in each branch of each pipe, accounts for the horizontal and vertical size of source and destination image data, and takes care of other details.