This would be especially useful, for example, in a PDA, such as the Personal Palm Pilot . The architecture of the IRAM is the vector architecture. This was chosen because there are elegant compiler options for use on the vector architecture. Also, vectors allow increased efficiency because parallel instructions can be performed. Among other applications, PDAs can make use of this parallel processing due to their multimedia needs.
Extra components can be included on the chip in case one of the components is corrupt.
IRAM has not yet been implemented, but its specifications suggest a whole new world for computer memory. The traditional DRAM will be reaching its potential soon, but system bus speed is only increasing. There has to be a dramatic change in our memory architecture in order to close the gap between processor and bus speeds and memory access time. I think the IRAM is a more revolutionary architecture, and I am interested in its implementation. However, due to the head start that Rambus has in the implementation of its architecture, and due to its big-company backing, I think that Rambus will definitely become the next standard.