These cancerous infections may lurk for months or years before manifesting themselves as noticeable bugs. Components of Disaster A simple embedded system with a single interrupt clearly will run correctly as long as the ISR never takes longer to execute than the frequency of the interrupt. Unless you have very smart hardware that can stack up backlogged interrupts, then the software must service each interrupt before two get backed up. The obvious moral is to make sure interrupts are never disabled for so long that one can be missed. Crummy hardware design will create significant interrupt service problems as well.
Most processors have level sensitive interrupt inputs.
Any device requesting an interrupt must assert the request until the processor acknowledges it. You can't just bleep the input and expect the CPU to catch it. Design your hardware to assert the input until the CPU responds with an interrupt acknowledge cycle. Most modern processors will require this, as you'll have to drop a vector on the bus at the same time. Well designed interrupt handlers are largely reentrant.