Logical Instructions Table 3. PowerPC Logical Instructions AND OR Exclusive OR Rotate and Mask Shift Misc. Table 3 lists PowerPC logical instructions. PowerPC has the ability to perform a 32-bit rotate and combine with a mask in a single cycle. In the miscellaneous column are instructions to count the leading zeros in a register, and sign extension instructions.
Instructions exist for byte, halfword, and word sizes.
The associated store instruction stwcx . EQ is set to the state of the reservation bit at the start of the instruction so that software can determine if the write was successful. Synchronization Instructions Commonly misunderstood PowerPC instructions are those that perform synchronization. Since PowerPC defines a weakly ordered storage model in which loads and stores can complete out of order, this instruction exists to guarantee ordering where necessary. This instruction guarantees that the preceding instructions complete before the sync completes.