It measures slope degradation, interconnect delay, and capacitive shielding effects. Generates various wire load models for the synthesis tools.
Execution time is practically independent of the table size.
The delay accuracy is never compromised, making the best use of the available information and properly taking into account the dependencies of the outputs on the inputs of the cells. In addition, it can use dynamic, state dependent, and load dependent input loads to achieve more accurate delays, making it suitable for use in block characterization flow. PLI-Calc can mix and match various cells using various delay models. It takes in DSPF netlist and generates wire delays, effective loads and input slope information for PLI-Calc to complete cell level delay calculation. Back-annotation happens in several stages and involves iterations to resolve dependencies between the inputs and outputs of the cells.