Therefore most high performance chips uses pipelining techniques. Often chip producers even increase the number of parts needed for one instruction, for instance split up A in A1 and A2, so that less time is needed for each step, and the chip will be able to run at higher MHz. This is also called deep pipelining . The length of the pipeline isn t tat important in this respect because if it is filled the throughput will be one instruction per cycle no matter what the length is. We see that pipelining increases performance.
Problem is now to keep the pipelines filled to get maximum performance possible.
Let us look at the internal design of a PC, see figure 3. I took a K6-III CPU, because it has both L2 and L3 cache. It might look a bit complicated to some of you, but the important part is that the memory is not directly accessible at full CPU-speed. Therefore is the CPU needs to get information out of the memory it needs to wait for a long time. During all this time the pipelines are not getting filled.