You can easily accomplish a BCD left shift with carry using the 8051's ADDC and then DA instructions. Rather than always performing a 3-byte BCD shift, which is necessary if you implement the program with a loop, each shift need include only as many bytes as are necessary to hold the result after that shift. Single-byte BCD shifts suffice for the first 6 binary bits. For the next 7 bits, you can use 2-byte BCD shifts. Only the last 3 bits require 3-byte BCD shifts.
Further optimization is also possible.
You can use a binary left shift in place of a BCD left shift whenever the result cannot produce a half-carry, that is, if the result of the shift cannot exceed 0x09. Combined with careful use of the XCH instruction to minimize cycles used moving data around, these optimizations result in an execution time of just 92 instruction cycles, or 92 sec with a 12-MHz clock. This conversion time is constant for any input data. The code size is only 91 instructions, totaling 126 bytes. During the calibration cycle, the test equipment calculates the AGC output voltage necessary to achieve the accuracy requirements and then increments the AGC output voltage until the system is within specifications.