The Net List generated by Pro-Net aids in routing by highlighting the Pins to be connected in each Net. You will not have to refer to the schematic or count pins to know which connections to make. Net List optimization function re-orders the list of connections in each Net according to actual Device Placement on the PCB to provide the shortest interconnects. Powerful Maze Search algorithm is used to find the shortest path to connect two points. If suitable, a trace will be drawn to another pin if already connected, or a trace segment will be drawn to an existing trace if that provides the best results.
Powerful commands exist for modifying traces to increase routability.
Traces may be pushed out of the way, rerouted around areas, stretched between two points, or broken in the middle and modified by sections. Direct support for 16 layer PCBs, plus automatic Power and Ground layer generation. Error Checking can be dynamic or advisory. Dynamic error checking presents each incorrectly routed Net in sequence for correction. Advisory error checking sends a list of incorrectly routed Nets to the printer, screen, or a file.