Approximately 11 faculty and 60 graduate students in these centers are working on a wide array of electronic design automation problems, all of which are of great importance to the U.S. semiconductor industry. Outlined below are some of the challenging research projects currently in progress. The resulting optimized register-transfer level output can be used to drive logic synthesis and semicustom layout tools, completing the path to a working chip. The result is a simulation system that can formally verify circuit behavior over many different operating conditions by executing a single symbolic pattern sequence. Novel circuit design projects push the limits of circuit performance and offer examples of new problems for CAD tools.
Recent designs focus on low-power electronics.
Visit the SRC's home page to learn more. To date, it has been necessary to improve the yield experimentally, during the actual course of the manufacturing process, an approach which is inefficient and costly. For the past decade, a group of faculty and students in the ECE Department has been working on methods to increase yield before bringing the circuit to the production line. One of the principal goals of the Pennsylvania SCOE is to understand the causes of yield losses and to minimize their effect. Parametric effects are changes in the manufacturing process that cause small variations in the circuits that result in some quantities of interest falling outside of acceptable limits, e.g., the power that the circuit consumes, or the speed at which it operates.