The goal of the course is to provide the ASIC newcomer with a general understanding of the design process and to equip the experienced engineer with additional insight into the design steps. The course covers the terminology, tools, and methods used throughout the design process, from conception through chip layout to manufacturing. Design techniques such as state machine encoding, power conservation, and design for test are also discussed. Topics include VHDL entry, simulation, synthesis, layout, FPGAs, gate arrays, standard cells, full custom, submicron issues, wire delays, floorplanning, clock skew, intellectual property, synchronous design techniques, pipeline, logic optimization, synchronization, and power dissipation. The course is intended for ASIC engineers, marketing and application engineers, design managers, verification engineers, and test engineers.
Enrollment is limited.
Previously, he was a staff engineer at Sun Microsystems, where he designed hardware for Java media processors, and was a member of technical staff at Silicon Graphics. He has been teaching at UC Berkeley Extension for several years. Conference Room, Fremont Center, 47655-B Warm Springs Blvd.