New Directions in VLSI Circuit Partitioning and Placement for Power and Area Optimization 7. Methodologies and Algorithms 8. New Techniques for Timing-driven Placement 9. Search Mechanisms for Combinatorial Optimization in CAD for VLSI Parallel and Distributed Fault Diagnosis R. Beigel National Science Foundation L arge scale distributed systems and parallel machines may have many thousands of processors that communicate via a network. It is inevitable that some of the processors will, in the course of time, fail.
Fault diagnosis uses tests between the processors to discover which processors are faulty.
The faulty processors can then be isolated or repaired. T his project will investigate fast algorithms for more realistic models of fault diagnosis. It considers dynamic models, in which processors can fail during the testing procedure, and distributed models, in which there is no central diagnoser with global knowledge about the system. The project will discover efficient algorithms for these models and attempt to show their optimality. In the distributed model this information must be passed on to all the nonfaulty processors.