Simplicity You'll recall that RISC was envisioned as move away from the complexity of CISC, towards a more simple and elegant approach. But now that RISC architectures have increased in complexity, it's time for a dose of the same medicine. A CPU based on an EPIC-style architecture will be lean and mean, with much of its transistor logic devoted to doing actual computation, and the rest devoted to cache and registers. The ISA can accommodate as many integer and floating-point pipelines as you can fit on the chip. Parallelism Parallel power is what will drive the computing performance into the future.
EPIC includes a number of techniques to extract parallelism from code.
It also includes techniques to create parallelism where there wasn't any in the first place. There's been a lot of good research in compiler technology over the past few years, but none of the existing architectures are in a position to take full advantage of it. Two of the main attributes of a 64-bit environment are data types for pointers and long integers that are 64 bits wide. This design yields a number of advantages, some of which will only be of interest to somebody using IA-64 in a server environment, but I'll cover them here anyway. In order to deal with address offsets in a file larger than 2GB, you need something bigger than a 32-bit pointer.