Application-specific suites for system ASICs. S-MOS signals welcome to new ASIC users. Cascade to make physical-memory generators available. HLDS taps OEA Int'l for RC extraction. Phoenix and Virtual Chips to form standards-based interconnects team.
EPIC readies for nanometer silicon.
Synopsys makes SVR In-Sync partner. TSMC licenses DSP Group's Pine core. Cypress CPLDs feature in-system programmability. You can be assured that your designs are testable, as long as you follow your vendor's guidelines and methodology.