After baking to solidify the liquid, exposure of specific patterns is performed using a photomask. Material remaining after development shields regions of the wafer from subsequent etch or implant operations. The signal paths are then routed on the interconnect layers. Currently, two layers of routing are used, with three layers being the next step. PLCC P lastic L eaded C hip C arrier.
External connections consist of leads around all four sides of the package.
PMOS P -channel MOS . Compare NMOS . In such a device, the current amplification arises from the injection of holes from the emitter into the base, and their subsequent collection in the collector. See bipolar transistor and complementary . Compare NPN transistor .