The maximum frequency is 1.25 GHz and 2.85 GHz at 1.0V and 1.8V supply voltages, respectively. Active and passive device performance and building block requirements, as well as on-chip isolation issues are first addressed. It will be shown that in future technologies the power consumption of high-speed ADC's will increase to achieve the same accuracy and speed. The method is based on high-level simulation that can be combined with an acceleration algorithm and has been implemented in C. Also, the decimator has been included yielding a complete and fast simulation of the whole converter. Different topologies are included as well as the effects of most important nonidealities.
Experimental results show the effectiveness of the approach.
The presented results show the efficiency and effectiveness of the method. These theoretical upper bounds lead to two new capacitor structures with high lateral-field efficiency. Simulation and experimental results demonstrate higher capacitance density and superior matching properties compared to the standard Horizontal Parallel Plate and previously reported lateral-flux capacitors. Today's networking products are based on hardware designed for a relatively fixed task. Network Processors claim to change this whole model by enabling the vendors to modify the personality of a product simply by downloading new software and perhaps adding a different physical interface.