15 PSIG Jedec Std. 883 TM-1011, Cond. Static bias conditions to be used as applied to CMOS technology device types which dissipate minimal power. Applicable to device types for which HAST circuits exist or can be designed for minimal power dissipation. Electrical end point tests are to be performed at 25 o C room ambient with the addition of Hot Continuity for Liquid Thermal Shock.
Frequency applies to each process technology and package.
C Jedec Std. 883 TM-1010, Cond. Electrical end point tests are to be performed at 25 o C room ambient with the addition of hot continuity at the start and final down point of temperature cycle. Devices shall be read within 96 hours after removal from stress. Humidity tests are to be stored at room ambient for 16 to 24 hours prior to end point test.