Blue Ring Status Reg. Interrupt Clock Fail Par. Spare Interrupt Spare Failure Fid.
Interrupts occur at every change of status.
If the event is lost over numerous Beam cycles a single interrupt occurs. With the appearance of the first subsequent Fiducial a second interrupt is implemented. This will cause Status Register 2 to be read. Reading Status Reg. 2 clears bit 7, bit 6, and bit 5 only.