It uses 36 signal pins for each of the two high speed SCI links, so pin count is low. The IBM chip also dynamically compensates for cable skew, using SCI's standard deskewing protocol, so inexpensive cables can be used. Advanced CMOS processes are expected to be fast enough in 1995 that BiCMOS will no longer be needed for this speed. Performance degrades only slowly as distance increases, so distributed systems like a ship or plane or campus can have integrated communication via SCI that is far faster than can be provided by any other open interconnect. That is 150 times less latency than achieved by previous network connections.
Low latency is critically important for efficient distributed computing.
Adding nodes to an SCI system also adds bandwidth, so performance scales well. If SCI isn't fast enough, just add more links. If SCI is too fast, connect the links as a ring, sharing the excess link bandwidth with other nodes. Serialbus shares much of the architectural model of SCI, as the two were deliberately designed to be conveniently interconnected. In the commercial world, Convex Computer is now shipping their Exemplar supercomputer based on SCI, and most other computer companies are designing next-generation machines either with SCI or with a similar but deliberately incompatible interconnect.