Following the bit slice concept of conventional digital processors, the neural network slice chips provide building blocks to construct networks of arbitrary size and precision. Bigger networks and networks with higher bit inputs can be constructed with multiple chips. A 16-bit accumulator limits the total number of inputs because of overflows. A common 16-bit input is multiplied by a weight in each PE in parallel. New weights are read from off-chip.
Internal feedback allows for multi-layer networks.
Multiple chips can build large networks .