Current research involves ways of automatically finding and generating assist threads, as well as evaluating their effectiveness in enhancing program performance. Modern architectures strive to exploit instruction level parallelism. Whenever possible, independent instructions are executed in parallel. Dead values, which are no longer needed, can clog registers and limit performance. With compiler assistance, dead registers can be recognized and freed as a program executes.
Errors involving pointers and array indices are especially common.
Using one processor to run a program and another to monitor the program, it is possible to routinely check programs as they execute, with little or no apparent slowdown. The ultimate in register allocation is interprocedural register allocation in which all the procedures of a program are analyzed. We have studied interprocedural allocation models that optimally allocate register among procedures in polynomial time. What's more, the approach seems to be effective in practice. Other models that explicitly quantify the likelihood and benefit of register residence are very attractive.