Of course, for this reason, compiler technology and programming algorithms will have a massive impact on Itanium performance. In addition to grouping operations into instructions, the compiler handles several other important tasks that improve efficiency, parallelism and speed. CISC puts most of the burden of scheduling instructions onto the CPU hardware. RISC gives some of this responsibility to the compiler. VLIW removes even more load of the CPU and gives more importance to the compiler.
EPIC takes things much, much further.
The compiler adds branch hints, register stack and rotation, data and control speculation, and memory hints into EPIC instructions. The compiler also uses predication. We will have more on some of these features later on, but at this point, it is enough to know that these EPIC instructions and features contribute to an increase in parallelism. Copyright 2001 INT Media Group, Incorporated. All Rights Reserved.