Counts overflows of the primary data cache miss counter. This counter is incremented on the cycle after a primary cache data refill is begun. Counts overflows of the secondary data cache miss counter. This counter is incremented on the cycle after the second 16-byte block of a primary data cache line is written into the data cache. This counter is incremented on the cycle after the TLB miss handler is invoked.
Counts overflows of the graduated floating-point instruction counter.
This counter is incremented by the number of floatingpoint instructions that graduated on the previous cycle. Uses statistical PC sampling, based on overflows of the failed store conditionals counter. Note that these environment variables cannot be used to override the counter numbers or interval for the other defined experiments. Lets you select a hardware counter to use in the experiment and set a counter overflow interval. Accepts a hardware counter number between 0 and 31.