Current software and OS's expect a single thread to be associated with a processor, and assume that all exceptions thrown by that processor belong to that thread. This by itself seams to be of limited use and a strange thing for Intel to be involved in. On the other hand if it is the software support for a SMT chip then the P4 would be ready for a huge performance boost. This would be a serious blow to the rest of the industry Alpha and other RISC chips included. Up until now the only processor planning on using SMT is the Alpha EV8 and that is several years away.
Life is complex.
It has real and imaginary parts. I have got to say that this is one of the most interesting rumors I have heard in a long time. If true it could change the whole shape of the industry like the P6 did. It also fits nicely with the design trade offs made in the P7 and the Jackson stuff is almost spooky. I want to see it for real before I am convinced it is true, but that is probably because I see it as such a big leap forward.