The Switch Cache Interconnect Network topology plays an important role in determining the paths from a source to a destination in the system. In addition, the MIN is highly scalable and it provides a bisection bandwidth that scales linearly with the number of nodes in the system. Symp. on Comp. When a cache line is purged, the purge is propagated to only those children that have copies. To save space, a parent need only store a vector if children have copies.
Dynamic networks can connect any input to any output by enabling some switches.
They are applicable to both shared memory and message passing multiprocessors. They are applicable to both shared memory and message passing multiprocessors. The use of multiple buses makes the hierarchical bus based systems more scalable compared to the popular single bus multiprocessors. Symp. on Comp. Their scheme primarily focused on increasing processor memory bandwidth and not on dealing with associated cache coherence problems such as races.