In all cases we verified that the simulations correlated well with the measurements. On the strength of those results, we decided that Layin would be able to properly characterize the features we wanted in new devices. After validating Layin's accuracy, we extended its use to investigate scenarios that can be difficult to test experimentally because of setup and measurement limitations. For example, to obtain the measurements presented in Figure 3, we used a 0-volt substrate bias. The tool allowed us to evaluate the influence of different substrate bias voltages, which was impossible to achieve experimentally.
Large designs can prove difficult to analyze using software tools.
Simulation time and computer resource consumption grow in a non-linear fashion as the number of circuit elements increases. For a large design, such as a complex circuit block or a complete chip, certain simulations performed with full accuracy can take an impractical amount of time to complete. However, for a large block maximum accuracy is frequently not a crucial consideration. When we analyze substrate effects from a layout, floorplanning, and block placement perspective, it's more important to obtain a good estimate of where noise is coupling from or to determine the approximate effects of placement options. Once we've established those values, we can perform a more accurate analysis on a specific section.