A fully asynchronous fixed point FFT processor is introduced for low power space applications. The architecture is based on an algorithm developed by Suter and Stevens specifically for a low power implementation. The novelty of this architecture lies in its high localization of components and pipelining with no need to share a global memory.
High throughput is attained using large numbers of small, local components working in parallel.
The generic architecture is explained with a survey of the 16-point FFT architecture specific to this project. Finally, simulation results based on layout extractions are presented and an outline for future work is given.