This oversight was rectified in the 65C02 which added INA and DEA instructions. The index register instructions are implied mode for obvious reasons while the INC and DEC instructions use a number of addressing modes. These instructions perform a bitwise binary operation according to the tables given above. They set the Z flag if the net result is zero and set the N flag if bit 7 of the result is set. This large group includes all instructions that alter the flow of the program or perform a comparison of values or bits.
Execution proceeds from the new address.
The branch instructions are relative jumps. Code that only uses branch instructions is relocatable and can be run anywhere in memory. The three compare instructions are used to set processor status bits. After the comparison one frequently branches to a new place in the program based on the settings of the status register. The BIT instruction tests bits in memory with the accumulator but changes neither.