Lynx is recomended.
However, the performance improvement of such microprocessors will become difficult because of its complicated structure and limitation of instruction level parallelism. To utilize silicon resources efficiently, a on-chip multiprocessor has been widely researched. The speed of shared bus inside the chip will become far faster than that of the backplane bus. But on the other hand, the large gap of the transfer bandwidth between inside and outside of the chip will become a substantial problem. We proposed New Keio protocol which optimized for an on-chip multiprocessor.