The graduated instruction counter is incremented by the number of instructions that were graduated on the previous cycle. Counts overflows of the cycle counter. The cycle counter is incremented on each clock cycle. Counts overflows of the primary instruction cache miss counter. This counter is incremented one cycle after an instruction fetch request is entered into the miss handling table.
Counts overflows of the secondary instruction cache miss counter.
Counts overflows of the primary data cache miss counter. This counter is incremented on the cycle after a primary cache data refill is begun. Counts overflows of the secondary data cache miss counter. This counter is incremented on the cycle after the second 16-byte block of a primary data cache line is written into the data cache. This counter is incremented on the cycle after the TLB miss handler is invoked.