The LDI chipset block diagram is shown in figure 2. Other enhancements to the chipset included a user selectable pre-emphasis feature, optional DC Balancing of the data payload, and a cable deskew feature. These three features allowed cable lengths to exceed 10 meters in length in most applications, and even 20 meters in some XGA applications. This provides a wide open eye pattern at the far end of the cable at the receiver inputs. Pre-emphasis is optimal to use, as it does not burn up any bandwidth on the bus.
Every bit still carries one bit of pixel or control information.
DC Balancing is also an optional feature for long cable applications typically over 5 meters in length. Instead of sending long strings of ones or zeros that can fully charge the cable and then make if difficult for a transition to the opposite state to make it through the receiver s threshold. The transmitter basically monitors the data being sent and compares it to the prior frame of data that was just sent. It the line is charging to one direction too much it simply inverts the current data to discharge the line. Decode at the receiver is very simple, the receiver only needs to look at a flag bit which informs the receiver to invert the data back to its original state if set.