The metodes above is most for processors where timing need to bee kept, else do much better methodes exist. In fact, it is possible to make instruction lookahead, and then will anyone could be able to reach any speed, but not in conditoinal jumps in different direction than expected. The designtask of any compatible processor is to keep the timing and cycles per instruction. Else is it possible to reach any speed at all. Example of an asynchronous processor .
Instruction look ahead works as carry lookahead, in fact it is the same.
However, it uses a lot of transistors, because it may require multiple ALU's. The idea with the PIC above, is to show that it is possible to keep timing, and also to read two instructions at same time. That means, that full-compatibility even at any jump. Also, that issue of two instructions at same time is possible and full compatible. The time to issue the two instructions is same as a random access for the instruction memory, and the ALU have about same to do both instructions.