Fig 14 shows an example of applying this rule. The sensitive radio-input area is in a far corner of the board. All the digital ICs, interconnected with short traces, populate the left side of the board. A slot exists on the ground plane between the digital ICs and the radio front end. Electrons cannot traverse the slot, so the slot effectively adds a series impedance to any current trying to flow near the radio's front end.
All grounds connect firmly at dc, so no troublesome voltage offsets can develop.
When you use this technique, ensure than no signals traverse the ground slot on the top of the board. Rule 3 discusses the reason for this caveat. Ensure ground-plane continuity below traces. For signals of any appreciable speed, the return path of lowest impedance is directly below the source trace. This spreading directly defeats the effort to contain the bias currents.