The gate dielectric thickness decreased from generation to generation and has reached about 4 nm in today's mainstream devices. Assuming continued scaling of device dimensions this thickness will be reduced to 1 nm within the next few years. The studies of our group in this field focus on the deposition of zirconium and hafnium dioxide by metal-organic CVD and the optimization of processing parameters to achieve superior electrical characteristics.
Examinations reach from chemical analysis to electrical testing.
Important electrical parameters in this respect are not only the dielectric constant and the resistivity of the thin films, but also bandgap and band-mismatch between dielectric and semiconductor. A further research topic of our group is thermal oxidation of silicon in the thin and ultrathin film range. These insulating films serve as dielectric for a wide area of electrical testing. The characteristics of the films even fullfill the advanced needs of scanning capacitance naoscopic imaging techniques just recently established at our institute to measure semiconductor doping densities. Materials, integration and reliability, IBM J. Res.