Sometimes, due to layout aspect ratios and speed, dividing the problem into smaller RAMs may yield significant benefits. Embedded Arrays shorter production cycle very small, fast typically same compilers as Standard Cell early commitment to floorplan and RAM configuration, cost Gate Array short production cycle, cost Smaller selection larger and slower than Standard Cell Table 1. A comparison of technologies and design types indicates areas for trade-offs. Besides design changes which can cause gate count growth, there are selections between standard cell, embedded arrays, and gate arrays which will affect speed at the expense of price and schedule. If production volume is expected to be high, standard cell can be a good choice.
Equivalent memories are smaller in standard cell and therefore can operate somewhat faster.
The problem is that mask production takes a few weeks longer. If the memory content and associated block placements can be determined early in the design cycle, an embedded array often gives the advantage of smaller RAM sizes and faster speeds of the standard cell with the restriction being the early release and commitment to the masterslice configurations. Again, the cost is higher, but the delivery time is comparable to standard gate arrays. The high-density RAMs are often faster at the expense of power for the sense amps. Also high density may not be available for smaller RAMs.