The visit itself pointed out the importance of these topics and a common interest in developing possible solutions. The goal is to give first results on asynchronous systems of the same order of complexity of modern synchronous processors. The TAA presents new features like a software model, a new predication implementation, but it has also challenges like shared data memory and the interface between software and hardware. Its goal is to give a first non-definitive answer to what asynchronous circuits can do for parallel systems. Theory on the TAA is under refinement for extension to multithreaded parallelism and exception handling.
Actual goals are the design of a simple test machine and completion of proper software.
The discussions have analyzed the general theory of TAA and the design of the most critical parts. The feasibility of the whole project has been verified. Attention has been devoted for the problem of shared memories with SIMD architectures, when the arbiter element seemed unavoidable. Some possible ideas to handle shared memory without arbiters have been found. To fulfill their goal they have developed a design flow based on CHP as functional language to describe DI systems.