This means the next 3 instructions cannot use the result without a stall. The same is true for branch delays. If the CPU is not able to get a useful instruction in one of the two slots, the CPI increases and approaches 1. 2.4 clks per iteration. This is true because the CPU can dual issue instructions with dependencies and serialize them later using hazard detection logic.
Dynamic scheduling allows the CPU to keep the functional units busy as often as possible.
It also permits the CPU to run well on code that was not scheduled for superscalar execution. VLIW processors Superscalar machines use hardware to reorder instructions and keep functional units busy. The functional units might include integer ALUs, FP ALUs, memory units, and a branch unit. To control these units, the instruction must allocate 16 or more bits to each unit to describe the operation that the unit will run on each cycle. To keep the functional units busy, parallelism is uncovered by the compiler by unrolling loops and scheduling code across basic blocks.